Added KDE3 version of PikLab

git-svn-id: svn://anonsvn.kde.org/home/kde/branches/trinity/applications/piklab@1095639 283d02a7-25f6-0310-bc7c-ecb5cbfe19da

1452 files changed, 303251 insertions, 0 deletions

diff --git a/COPYING b/COPYING
new file mode 100644
index 0000000..d511905
--- /dev/null
+++ b/COPYING
@@ -0,0 +1,339 @@
+		    GNU GENERAL PUBLIC LICENSE
+		       Version 2, June 1991
+
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+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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diff --git a/Changelog b/Changelog
new file mode 100644
index 0000000..f1c5122
--- /dev/null
+++ b/Changelog
@@ -0,0 +1,440 @@
+0.15.2 (24 November 2007)
+ * fixed loading some hex files [thanks to Xiaofan Chen and Hector Martin]
+ * added 24FJ128/96/64
+ * added missing register information for some devices
+ * added ETT direct programmer [thanks to Jimkirk]
+ * added 16F690/913/917 support to Picstart+
+ * fixed crash when manually updating firmwares [reported by Claus Bjerre]
+ * fixed blank-checking with icd2 debugger
+ * fixed crashes when halting debugging session
+ * added option to create a library from a project (gputils, sdcc, picc)
+ * added simple views for object and library files
+ * fixed crash in configuration generation dialog [report by Milan]
+ * fixed several problems with progress bar
+ * fixed crash when closing main window while programming
+ * better watch window
+ * add memory graph view to device information [idea by F. Gerin]
+ * fixed disappearing bookmarks and save them in project file [report by Luke Orland]
+ * updated Spanish translation [thanks to Felipe Caminos]
+ * fixed piklab-prog option "target-self-powered"
+
+0.15.1 (11 November 2007)
+ * added 18F66J11/66J16/67J11 86J11/86J16/87J11
+         18F65J50/66J50/66J55/67J50 85J50/86J50/86J55/87J50
+         18F6393/8393 6493/8493
+         24HJ16GP304/32GP202/32GP204
+ * fixed config/template generator and I/O registers for some devices
+ * added "custom" toolchain for custom shell commands
+ * fixed coff parsing for PIC30 toolchain
+ * fixed crash when running device
+ * fixed device selection in project manager
+ * C source debugging (only for 18F devices due to sdcc/gputils bug)
+ * fixed debugging of C18 projects with gpsim 0.21.x
+ * fixed display of bootloader option window
+ * config bits comboboxes now ignore wheel events in hex editor
+ * added "piklab-coff", a command-line utility for viewing coff, object and library files
+ * updated French translation [thanks to Alain Portal]
+ * fixed some compilation issues
+
+0.15.0 (20 October 2007)
+ * added 12F519 18F2423/4423/2523/4523 30F1010/2020/2023
+         18F24J10/25J10/44J10/45J10 65J10/65J15/66J10/66J15/67J10
+         18F85J10/85J15/86J10/86J15/87J10 18F63J11/64J11/65J11 83J11/84J11/85J11
+         18F63J90/64J90/65J90 83J90/84J90/85J90
+ * fixed checksum computations for some devices
+ * fixed configuration bits for some devices
+ * fixed config and template source generation for some devices
+ * fixed crash while programming 12F510 [report by Scott Dattalo]
+ * added option to disable eeprom programming
+ * added option to skip verification after programming
+ * fixed programming with picdem bootloader [thanks to Xiaofan Chen]
+ * fixed pickit2 bootloader [thanks to Xiaofan Chen]
+ * added icd2 support for 18F2450/4450/2423/4423/2523/4523/6527/6622/8527/8622
+                          16F506/616/631/677
+ * fixed simulating some 18F devices with some versions of gpsim
+ * added support for EPE Toolkit mk3 direct programmer [thanks to Chris Lale]
+ * added support for the 'EPE Toolkit mk3' direct programmer [thanks to Chris Lale]
+ * better support for PIC30 toolchain [report by Brian Neltner]
+ * added option to run after successfull programming [proposed by jda2158]
+ * fixed "compile file" action [report by Alain Portal]
+ * fixed adding objects from outside project directory
+ * added option to automatically recompile before programming when the
+   project is modified [proposed by pryyanek]
+ * added status and feature filters in device chooser dialog
+ * added menu item to call "kfind" inside project directory [proposed by Polly Lister]
+ * added option to show/hide the close buttons on the tabs of the editor manager
+   [proposed by james and bjohan]
+ * added option to piklab-prog to set hardware type for direct programmers
+ * added check for device compatibility and file creation commands to piklab-hex
+ * move checksum command from piklab-prog to piklab-hex
+
+0.14.5 (16 August 2007)
+ * better error reporting if USB not compiled in
+ * fixed USB support when compiling with qt only [report by Martin Goldack]
+
+0.14.4 (5 August 2007)
+ * fixed bug where osccal would be lost and piklab would crash when programming
+   devices without osccal backup [report by Ed Spremolla]
+ * fixed "likeback" not showing
+ * added display in hex editor when configuration bits are invalid
+ * fixed CodeGuard configuration bits and hex editor
+
+0.14.3 (26 July 2007)
+ * added support for 24H devices
+ * updated register definitions to MPLAB 7.41
+ * added 18F66J60 family [contribution by Alan Page]
+ * added 12F609/HV609 16F610/HV610 16F882
+ * added configuration for tiny bootloader (retries, port speed, delay)
+ * added configuration for picdem bootloader (USB ids)
+ * fixed tinybootloader for 16F88 [patch by Balaji Ramani]
+ * fixed direct programming of 16F87XA (again)
+ * fixed programming of 18F2410/2420/4410/4420 [report by Yuri Shnol]
+ * fixed problem with tab history [reported by agalliazzo]
+ * fixed crash in hex editor due to protected config bits (12F675, ...)
+ * Spanish translation by Felipe Caminos
+ * Czech translation by Milan Horák
+ * try to open unrecognized devices as serial port
+   instead of just failing in piklab-prog [reported by Jan Berkel]
+ * fixed crash using upload_firmware in piklab-prog [report by John McCullough]
+ * more resilient hex file parser [reported by Stefan Vonhalenbach]
+
+0.14.2b (14 June 2007)
+ * support for USB ICD2 under Windows [fixed by Minh Nguyen]
+
+0.14.2 (9 April 2007)
+ * device id and eeprom fixes for some 18F devices
+ * fixed debugging of 18F2455 family [report by Florian Brabetz]
+ * added parallel port support for FreeBSD (with ppbus)
+ * added support for Pickit2 and Picdem fsusb bootloaders (untested + no data eeprom operations)
+ * fixed device memory reading [broken in 0.14.1, report by Xiaofan Chen]
+ * fixed direct programming of 16F87XA [report by Jorus Cbaoth]
+ * do not open empty editor when file does not exit
+ * no "added file to project" in new file dialog when there is no project
+ * also include code for absent source files in disassembly listing (fixed debugging with sdcc + 18F devices)
+ * fixed output hex filename for CCSC projects [report by krengersi and Bill Sack]
+ * fixed CCSC options for version 3 (only detected for linux executables)
+
+0.14.1 (11 March 2007)
+ * fixed alignment problem with icd2 (for some 18F devices)
+ * fixed some i18n inconsistency [thanks to Alain Portal]
+ * fixed crash with config/template generator [report by Alain Portal]
+ * fixed adding files in same directory with project wizard
+ * fixed output hex filename for CC5X projects [report by philter_777]
+ * fixed inverted "read-only" toggle for hex editor
+ * fixed saving in editors (freeze with hex editor and display for text files)
+ * support for Tiny Bootloader
+
+0.14.0 (4 March 2007)
+ * merge in kate gui for source editor (many more menu items available)
+ * added console tool [idea by Rajesh Sankaran]
+ * new project wizard
+ * template source file generator
+ * fixed gui problems with fast comment system
+ * fixed crash when compiling assembler file with sdcc [report by Stefan von Halenbach]
+ * fixed support for linux version of CCSC [report by Alan Page and Rajesh Sankaran]
+ * fixed configuration dialog for PIC30 toolchain
+ * added support for MPC and CCX5 compilers
+ * added possibility to use custom device name for serial and parallel port
+ * allow read/write/erase of individual memory range with command-line utility
+ * speed-up programming and fixed timeouts for pickit2 [patch from Mark Stanley]
+ * added pickit2 support for 16F87X
+ * fixed freeze for connecting gpsim with an empty project [report by Florian Brabetz]
+ * fixed crash when showing PC while debugging [report by Florian Brabetz]
+ * added "--force" option for command-line programmer (answer "yes" to question and overwrite files)
+ * new command-line utility for manipulating hex files (check, info, fix, and compare)
+ * added Hungarian translation [thanks to Nagy Lázló]
+
+0.13.3 (8 February 2007)
+ * fixed compilation for OpenSuse and Fedora 5 [report by Xiaofan Chen and Alain Portal]
+ * fixed support for CCSC
+ * fixlet for asm highlighting
+ * possibility to added several source files at once [idea by Gyula Kampfner]
+ * fixed tool views (new user layout; fixed "show all" menu item; added "reset layout" menu item)
+ * fixed toolchain config dialog: update/reset buttons work better
+ * added serial USB devices under Slackware [thanks to Mark Stanley]
+
+0.13.2 (31 January 2007)
+ * better support for CCSC (windows and linux executables) [thanks to Mark Stanley]
+ * german translation by Stephan von Halenbach
+ * fixed 16F7X7 debugging
+ * fixed Picstart+ support [thanks to Mark Stanley]
+ * fixed debug executive name for some 18F devices [thanks to mkgrajek]
+ * fixed register view for 18F devices
+ * added icd2 support for 16F946
+ * fixed spurious errors with gpsim
+ * show warning when config generation is incomplete
+
+0.13.1 (27 January 2007)
+ * proper fixed for debug vector write/read for 18F devices with icd2 [thanks to Martin Forster]
+ * fixed 16F877 debugging [thanks to Martin Forster]
+ * fixed for ICD2 programming (verifying would fail when the code is at a large offset) [reported by Luke Cole]
+ * fixed compilation with KDE 3.3
+ * use toggle menu items for tool views [idea by Christoph Schäfer]
+ * fixed view unsplitting [reported by Christoph Schäfer]
+ * rows of 16 bytes for eeprom hex view [idea by Gyula Kampfner]
+ * allow includes and better messages parsing for jalv2
+
+0.13.0 (19 January 2007)
+ * more flexible interface (by using dockable windows)
+ * better editor navigation
+ * fixed bug in register watch
+ * debugging from a standalone file is now possible
+ * read/write 24C eeproms with direct programmers
+ * added support for 18F1230/1330, 18F2682/4682/2685/4685 (direct programmers + ICD2)
+ * added direct programming support for 18F2439/4439/2539/4539,
+   18F6310/6410/8310/8410, 18F6390/6490/8390/8490
+ * "as-we-read" verify
+ * more robust usb detection (hopefully)
+ * more flexible compilation configuration
+ * added support for CCS, JALV2, BoostC, BoostC++, and BoostBasic compilers
+ * support for GPSim 0.22
+ * less CPU usage and errors when verifying with serial ICD2 [fixed from Steve Moskovchenko]
+ * extend even more the erase timeout for serial ICD2 [report by Ramiro del Corro]
+
+0.12.2 (16 October 2006)
+ * fixed register view while not debugging
+ * fixed compilation for Slackware
+
+0.12.1 (5 October 2006)
+ * fixes for Qt4
+ * fixed crash in advanced dialog
+ * added French translation [thanks to Alain Portal]
+ * fixed for sdcc and custom or debugging linker scripts
+ * only use icd2 linker script with icd2 debugger
+
+0.12.0 (1 October 2006)
+ * pinout schematic for some devices
+ * added LikeBack for fast feedback
+ * icd2 debugging for 18F devices (tested with 18F452)
+ * more robust icd2 programming (fixed timeout for long erase) [bug reported by lonely_soul]
+ * fixed register view for 18F devices
+ * added detailed I/O and combined registers into watch view
+ * added register write to watch view
+ * save/restore watched registers per project
+ * fixed some problems with gpsim debugging
+ * fixed "--target-self-powered" option for command-line programmer
+ * added register read/write and breakpoints to command-line programmer
+ * fixed launching of pikloops [bug reported by chcarver]
+ * fixed 30F devices detection [bug reported by Yuri Ovcharenko]
+ * fixed for custom libraries and custom script for PIC30 [bug reported by Yuri Ovcharenko]
+ * fixed config generator for some 30F devices [bug reported by Yuri Ovcharenko]
+ * fixed some issues with PICC integration [bugs reported by gduprey]
+ * fixed integration of SDCC 2.6.0 [bugs reported by ambro]
+ * much faster parsing and correct disassembly listing for coff files generated by picc
+ * speed-up interface
+ * fixed select all/find in editor [bug reported by gduprey]
+
+0.11.3 (7 September 2006)
+ * fixed crashes due to dependence on libkio for piklab-prog
+
+0.11.2 (6 September 2006)
+ * fixed compilation by detecting libncurses under Suse
+ * fixed custom direct programmer configuration not appearing in dialog
+ * fixed duplicated message boxes
+ * fixed "command-list" option for command-line programmer
+ * fixed crash in register view for 18F devices
+ * fixed device information view
+
+0.11.1 (23 August 2006)
+ * fixed crashes with command-line programmer
+ * fixed debugging for custom-made ICD2 [thanks to Nagy László]
+
+0.11.0 (19 August 2006)
+ * support for the Picstart+ programmer [many thanks to Nestor A. Marchesini for testing]
+ * added support for gpsim (mid-range devices only)
+ * speed-up coff file parsing at end of compilation with picc compilers
+ * correctly highlight C lines in disassembly listing
+ * fixed register view to work correctly in debugging
+ * fixed watch view: changed status of registers was not correctly updated
+ * added variable names in register and watch views
+ * improved breakpoints management: fixed interaction with program counter
+   display, invalid and reached indicators, breakpoints can be disabled,
+   and listing tab.
+ * added action to switch between header and implementation
+ * added "port", "firmware-dir", and "target-self-powered" options to command-line programmer
+ * command-line programmer can be compiled without kdelibs (Qt3 or Qt4)
+ * command-line programmer for Windows (Qt4): works for serial ICD2 and serial "direct" programmers
+ * interactive mode for command-line programmer with debugging support
+
+0.10.0 (7 July 2006)
+ * added support for JAL compiler + editor syntax highlighting
+ * source files can be reordered by drag and drop in project manager
+ * added disassembly listing for PICC compilers
+ * added support for C18 compiler
+ * added support for C30 with Wine and with coff format
+ * added support for custom linker script in project (GPUtils/SDCC and C18)
+ * display file full path as tooltip in project manager
+ * speed-up serial ICD1/2 programming [help by Steve Moskovchenko]
+ * fixed alignment bug in ICD2 programming [reported by Steve Moskovchenko]
+ * fixed "verify only programmed" option for ICD2 programming
+ * improved breakpoints management (updated in all editors, persistent if editors are closed)
+ * ICD2 debugging supported with PICC compilers
+ * fixed bug in register watching
+ * fixed slow update on keystroke in editor [reported by zoiks]
+ * some fixes and enhancements in asm and disassembly highlighting
+
+0.9.0 (29 May 2006)
+ * added calibration information and debug executive version to advanced dialog
+ * added osccal regeneration for PICkit1 and PICkit2 (12F629/675/630/676)
+ * fixed PICkit2 firmware upload
+ * support for new PICkit2 firmware
+ * fixed programming of 18F devices with PICkit2
+ * initial support of ICD1 (not tested at all)
+ * fixed bug in parallel direct programming [thanks to kein0r]
+ * fixed checksum computation for some devices
+ * added devices 12F615 16F616/16F631/677 18F2450/4450
+ * faster loading, smaller executable, and smaller memory footprint
+ * fixed crash opening config generator with auto device
+ * added native coff parser (remove reliance on gpvo) + fixed disassembly highlighting
+ * added native disassembler (remove reliance on gpdasm) + now includes user ids and eeprom data
+ * support development version of sdcc and gputils
+
+0.8.0 (6 May 2006)
+ * added support for 16F716, 16HV785, and 16F87/88 with PICkit2
+ * added action button for memory ranges (read/program/verify/erase/clear/zero/reload)
+ * added option to preserve data eeprom and to blank check after erase
+ * icd2 debugging: fixed STATUS/FSR/PCL/PCLATH read/write + added WREG/PC/STATUS/bank in status bar
+ * icd2 debugging: disable watchdog timer
+ * several fixes for hex editor
+ * added checksum computation (with command-line too)
+ * added option to set user id to unprotected checksum
+ * added read-only/read-write toggle to editors
+ * only display first and last banks for 18C/F chips (too slow otherwise...)
+ * fixed dsPICS programming with ICD2 [thanks to Laurent Pinchard]
+ * fixed calibration programming for baseline devices
+ * added option to run tools with wine
+ * added "advanced" dialog to programmers (firmware version + voltages)
+ * added manual firmware uploading for ICD2 (with command-line too)
+
+0.7.0 (23 April 2006)
+ * fixed "program calibration" to write second word when present
+ * speed-up direct programming for some devices
+ * fixed direct programming of 18F devices
+ * fixed direct programmers on parallel port [thanks to Andrea Fadda]
+ * added direct programming for all remaining 16F and 18F devices
+   but 18FXX39-X310-X410-X390-X490
+ * option to only verify programmed words for direct programming
+ * added support for 16F946 and 18F devices with pickit2
+ * added support for Pickit1 programmer (baseline and midrange devices)
+ * added 16C84, 16CR73/74/76/77 devices
+ * added configuration generator for dsPICs and PIC30 toolchain
+ * added "power device" toolbar/menu entry
+ * fixed some issues with libusb
+ * read/write/watch registers while debugging
+
+0.6.1 (22 March 2006)
+ * warn when hex file cannot be saved [reported by freddy]
+ * tweak desktop file
+ * added mimetype for project file
+ * fixed lost calibration word for some 12F and 16F parts [reported by Xiaofan Chen]
+ * fixed crash when creating new hex file with "auto" device
+
+0.6.0 (14 March 2006)
+ * save dialog sizes and splitter positions
+ * config generator (baseline, midrange and some 18F devices)
+ * support for pic30 toolchain
+ * support for PICC-Lite, PICC and PICC-18
+ * configurable executable paths
+ * save opened files per project
+ * fixed crash with "auto" device [reported by y2kmi]
+ * added 16F7X7 support for direct programmers
+ * warn if firmware version is not the one tested
+ * fixed osccal read/write with pickit2 [reported by Xiaofan Chen]
+ * fixed alignment bug in 18F programming [reported by Xiaofan Chen]
+ * added device view to project manager
+ * added register view to project manager
+
+0.5.2 (1 March 2006)
+ * partial fixed for aligment bug in 18F programming [reported by Xiaofan Chen]
+ * fixed broken hex file save
+
+0.5.1 (28 February 2006)
+ * fixed crash at startup [reported by Ed Bennett]
+
+0.5.0 (24 February 2006)
+ * new project file format (xml)
+ * several fixes in user interface
+ * breapoints for ICD2 debugging of 16F parts
+ * support for Small Device C Compiler (sdcc)
+ * group config options for standalone file inside its own section
+ * fixed compilation for gcc>4.0.1
+ * added devices 16F506, 16F946, and 30F6010A/6011A/6012A/6013A/6014A/6015
+ * added 10F2XX, 12F5XX, 14000, all 12C and 16C parts support for direct programmers
+ * added 12F510, 16F59/627/628/685/687/689/690/7X/785/84A/91X,
+   18F24XX/25XX/44XX/45XX/6310/6390/8310/8390/6627/8627/6722/8722,
+   30F2011/2012/3011/3014/5011/5013 to icd2 programmer
+ * fixed configuration blank check for several 18F devices
+
+0.4.2 (18 February 2006)
+ * if self-test failed, ask user if he wants to continue (ICD2)
+ * added support for 12F510, 16F54-57-59 and 16F7X7 for PICkit2
+ * fixed osccal and user ids read/write for some baseline chips with PICkit2 (12F508...)
+ * fixed osccal read/write for some mid-range chips with PICkit2 (12F675...)
+ * fixed osccal read/write for 12F675 with direct programmer
+ * fixed compilation issue
+
+0.4.1 (14 February 2006)
+ * linker now generates coff files by default (fixed disassembly listing)
+ * warn when device not supported by gputils
+ * correctly display bang gap bits
+
+0.4.0 (12 February 2006)
+ * option to only program memory than need to be programmed (speed-up)
+ * several fixes for editors
+ * disassembly listing
+ * warn if DEBUG configuration bit is on when not debugging
+ * added included files in project listview
+ * support for PICkit2 (baseline and midrange devices)
+ * option to program after successful build
+ * option to power off target after programming
+ * basic ICD2 debugging (start/interrupt/step)
+ * fixed for calibration words and band gap bits
+
+0.3.2 (27 January 2006)
+ * fixed for 16F81X/F87/F88 and 16F87XA direct programming bug
+ * fixed compilation (gcc 3.4)
+ * command-line programmer should now work without any running X server
+
+0.3.1 (22 January 2006)
+ * fixed freeze if serial cable disconnected from ICD2
+
+0.3.0 (21 January 2006)
+ * protected areas are excluded from verification
+ * display code memory blocks in hex editor
+ * display protected areas in hex editor
+ * better configuration center
+ * make compilation framework more flexible
+ * show linker script in project listview
+ * stand alone files now act as pseudo-projects
+ * direct programmers now use global device data
+ * JDM-type serial programmer works
+ * fixed and simplify direct programmer configuration widget
+ * incorporate some fixes from pikdev 0.8.2
+ * fixed crash and bugs with ICD2 [reported by Xiaofan Chen]
+ * fixed detection of libusb [reported by Xiaofan Chen]
+ * fixed some FreeBSD compilation issues [help by Xiaofan Chen]
+ * make serial and usb operations more reliable
+
+0.2.0 (11 December 2005)
+ * command line programmer
+ * use XML files for device data (hex editor is now independent from
+   selected programmer).
+ * enhanced device chooser: sorts devices by family;
+   information page (with link to device page on Microchip website and status).
+ * "connect" and "hold_reset" programmer action
+ * incorporate some fixes from pikdev 0.8.1
+ * enhanced hex editor: disable wheel scrolling on config comboboxes;
+   fixed memory display focus; added navigation keys; check compatibility with
+   device type.
+ * upload firmware for icd2
+ * icd2 over USB
+
+0.1.0 (22 June 2005)
+ * convert config and new project windows to KDialogBase
+ * added ICD2 programmer infrastructure (from "lplab")
+ * reorganize in subprojects
+ * clean-up and factor code
+ * convert programmer window in hex editor
+ * lots of GUI fixes
+
+This changelog is relative to pikdev 0.7.2
diff --git a/Doxyfile b/Doxyfile
new file mode 100644
index 0000000..f263322
--- /dev/null
+++ b/Doxyfile
@@ -0,0 +1,1161 @@
+# Doxyfile 1.3.9.1
+
+# This file describes the settings to be used by the documentation system
+# doxygen (www.doxygen.org) for a project
+#
+# All text after a hash (#) is considered a comment and will be ignored
+# The format is:
+#       TAG = value [value, ...]
+# For lists items can also be appended using:
+#       TAG += value [value, ...]
+# Values that contain spaces should be placed between quotes (" ")
+
+#---------------------------------------------------------------------------
+# Project related configuration options
+#---------------------------------------------------------------------------
+
+# The PROJECT_NAME tag is a single word (or a sequence of words surrounded 
+# by quotes) that should identify the project.
+
+PROJECT_NAME           = piklab
+
+# The PROJECT_NUMBER tag can be used to enter a project or revision number. 
+# This could be handy for archiving the generated documentation or 
+# if some version control system is used.
+
+PROJECT_NUMBER         = 
+
+# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) 
+# base path where the generated documentation will be put. 
+# If a relative path is entered, it will be relative to the location 
+# where doxygen was started. If left blank the current directory will be used.
+
+OUTPUT_DIRECTORY       = 
+
+# If the CREATE_SUBDIRS tag is set to YES, then doxygen will create 
+# 4096 sub-directories (in 2 levels) under the output directory of each output 
+# format and will distribute the generated files over these directories. 
+# Enabling this option can be useful when feeding doxygen a huge amount of source 
+# files, where putting all generated files in the same directory would otherwise 
+# cause performance problems for the file system.
+
+CREATE_SUBDIRS         = YES
+
+# The OUTPUT_LANGUAGE tag is used to specify the language in which all 
+# documentation generated by doxygen is written. Doxygen will use this 
+# information to generate all constant output in the proper language. 
+# The default language is English, other supported languages are: 
+# Brazilian, Catalan, Chinese, Chinese-Traditional, Croatian, Czech, Danish, 
+# Dutch, Finnish, French, German, Greek, Hungarian, Italian, Japanese, 
+# Japanese-en (Japanese with English messages), Korean, Korean-en, Norwegian, 
+# Polish, Portuguese, Romanian, Russian, Serbian, Slovak, Slovene, Spanish, 
+# Swedish, and Ukrainian.
+
+OUTPUT_LANGUAGE        = English
+
+# This tag can be used to specify the encoding used in the generated output. 
+# The encoding is not always determined by the language that is chosen, 
+# but also whether or not the output is meant for Windows or non-Windows users. 
+# In case there is a difference, setting the USE_WINDOWS_ENCODING tag to YES 
+# forces the Windows encoding (this is the default for the Windows binary), 
+# whereas setting the tag to NO uses a Unix-style encoding (the default for 
+# all platforms other than Windows).
+
+USE_WINDOWS_ENCODING   = NO
+
+# If the BRIEF_MEMBER_DESC tag is set to YES (the default) Doxygen will 
+# include brief member descriptions after the members that are listed in 
+# the file and class documentation (similar to JavaDoc). 
+# Set to NO to disable this.
+
+BRIEF_MEMBER_DESC      = YES
+
+# If the REPEAT_BRIEF tag is set to YES (the default) Doxygen will prepend 
+# the brief description of a member or function before the detailed description. 
+# Note: if both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the 
+# brief descriptions will be completely suppressed.
+
+REPEAT_BRIEF           = YES
+
+# This tag implements a quasi-intelligent brief description abbreviator 
+# that is used to form the text in various listings. Each string 
+# in this list, if found as the leading text of the brief description, will be 
+# stripped from the text and the result after processing the whole list, is used 
+# as the annotated text. Otherwise, the brief description is used as-is. If left 
+# blank, the following values are used ("$name" is automatically replaced with the 
+# name of the entity): "The $name class" "The $name widget" "The $name file" 
+# "is" "provides" "specifies" "contains" "represents" "a" "an" "the"
+
+ABBREVIATE_BRIEF       = 
+
+# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then 
+# Doxygen will generate a detailed section even if there is only a brief 
+# description.
+
+ALWAYS_DETAILED_SEC    = NO
+
+# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all inherited 
+# members of a class in the documentation of that class as if those members were 
+# ordinary class members. Constructors, destructors and assignment operators of 
+# the base classes will not be shown.
+
+INLINE_INHERITED_MEMB  = NO
+
+# If the FULL_PATH_NAMES tag is set to YES then Doxygen will prepend the full 
+# path before files name in the file list and in the header files. If set 
+# to NO the shortest path that makes the file name unique will be used.
+
+FULL_PATH_NAMES        = YES
+
+# If the FULL_PATH_NAMES tag is set to YES then the STRIP_FROM_PATH tag 
+# can be used to strip a user-defined part of the path. Stripping is 
+# only done if one of the specified strings matches the left-hand part of 
+# the path. The tag can be used to show relative paths in the file list. 
+# If left blank the directory from which doxygen is run is used as the 
+# path to strip.
+
+STRIP_FROM_PATH        = 
+
+# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of 
+# the path mentioned in the documentation of a class, which tells 
+# the reader which header file to include in order to use a class. 
+# If left blank only the name of the header file containing the class 
+# definition is used. Otherwise one should specify the include paths that 
+# are normally passed to the compiler using the -I flag.
+
+STRIP_FROM_INC_PATH    = 
+
+# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter 
+# (but less readable) file names. This can be useful is your file systems 
+# doesn't support long names like on DOS, Mac, or CD-ROM.
+
+SHORT_NAMES            = NO
+
+# If the JAVADOC_AUTOBRIEF tag is set to YES then Doxygen 
+# will interpret the first line (until the first dot) of a JavaDoc-style 
+# comment as the brief description. If set to NO, the JavaDoc 
+# comments will behave just like the Qt-style comments (thus requiring an 
+# explicit @brief command for a brief description.
+
+JAVADOC_AUTOBRIEF      = NO
+
+# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make Doxygen 
+# treat a multi-line C++ special comment block (i.e. a block of //! or /// 
+# comments) as a brief description. This used to be the default behaviour. 
+# The new default is to treat a multi-line C++ comment block as a detailed 
+# description. Set this tag to YES if you prefer the old behaviour instead.
+
+MULTILINE_CPP_IS_BRIEF = NO
+
+# If the DETAILS_AT_TOP tag is set to YES then Doxygen 
+# will output the detailed description near the top, like JavaDoc.
+# If set to NO, the detailed description appears after the member 
+# documentation.
+
+DETAILS_AT_TOP         = NO
+
+# If the INHERIT_DOCS tag is set to YES (the default) then an undocumented 
+# member inherits the documentation from any documented member that it 
+# re-implements.
+
+INHERIT_DOCS           = YES
+
+# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC 
+# tag is set to YES, then doxygen will reuse the documentation of the first 
+# member in the group (if any) for the other members of the group. By default 
+# all members of a group must be documented explicitly.
+
+DISTRIBUTE_GROUP_DOC   = NO
+
+# The TAB_SIZE tag can be used to set the number of spaces in a tab. 
+# Doxygen uses this value to replace tabs by spaces in code fragments.
+
+TAB_SIZE               = 8
+
+# This tag can be used to specify a number of aliases that acts 
+# as commands in the documentation. An alias has the form "name=value". 
+# For example adding "sideeffect=\par Side Effects:\n" will allow you to 
+# put the command \sideeffect (or @sideeffect) in the documentation, which 
+# will result in a user-defined paragraph with heading "Side Effects:". 
+# You can put \n's in the value part of an alias to insert newlines.
+
+ALIASES                = 
+
+# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C sources 
+# only. Doxygen will then generate output that is more tailored for C. 
+# For instance, some of the names that are used will be different. The list 
+# of all members will be omitted, etc.
+
+OPTIMIZE_OUTPUT_FOR_C  = NO
+
+# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java sources 
+# only. Doxygen will then generate output that is more tailored for Java. 
+# For instance, namespaces will be presented as packages, qualified scopes 
+# will look different, etc.
+
+OPTIMIZE_OUTPUT_JAVA   = NO
+
+# Set the SUBGROUPING tag to YES (the default) to allow class member groups of 
+# the same type (for instance a group of public functions) to be put as a 
+# subgroup of that type (e.g. under the Public Functions section). Set it to 
+# NO to prevent subgrouping. Alternatively, this can be done per class using 
+# the \nosubgrouping command.
+
+SUBGROUPING            = YES
+
+#---------------------------------------------------------------------------
+# Build related configuration options
+#---------------------------------------------------------------------------
+
+# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in 
+# documentation are documented, even if no documentation was available. 
+# Private class members and static file members will be hidden unless 
+# the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES
+
+EXTRACT_ALL            = YES
+
+# If the EXTRACT_PRIVATE tag is set to YES all private members of a class 
+# will be included in the documentation.
+
+EXTRACT_PRIVATE        = NO
+
+# If the EXTRACT_STATIC tag is set to YES all static members of a file 
+# will be included in the documentation.
+
+EXTRACT_STATIC         = NO
+
+# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs) 
+# defined locally in source files will be included in the documentation. 
+# If set to NO only classes defined in header files are included.
+
+EXTRACT_LOCAL_CLASSES  = YES
+
+# This flag is only useful for Objective-C code. When set to YES local 
+# methods, which are defined in the implementation section but not in 
+# the interface are included in the documentation. 
+# If set to NO (the default) only methods in the interface are included.
+
+EXTRACT_LOCAL_METHODS  = NO
+
+# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all 
+# undocumented members of documented classes, files or namespaces. 
+# If set to NO (the default) these members will be included in the 
+# various overviews, but no documentation section is generated. 
+# This option has no effect if EXTRACT_ALL is enabled.
+
+HIDE_UNDOC_MEMBERS     = NO
+
+# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all 
+# undocumented classes that are normally visible in the class hierarchy. 
+# If set to NO (the default) these classes will be included in the various 
+# overviews. This option has no effect if EXTRACT_ALL is enabled.
+
+HIDE_UNDOC_CLASSES     = NO
+
+# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, Doxygen will hide all 
+# friend (class|struct|union) declarations. 
+# If set to NO (the default) these declarations will be included in the 
+# documentation.
+
+HIDE_FRIEND_COMPOUNDS  = NO
+
+# If the HIDE_IN_BODY_DOCS tag is set to YES, Doxygen will hide any 
+# documentation blocks found inside the body of a function. 
+# If set to NO (the default) these blocks will be appended to the 
+# function's detailed documentation block.
+
+HIDE_IN_BODY_DOCS      = NO
+
+# The INTERNAL_DOCS tag determines if documentation 
+# that is typed after a \internal command is included. If the tag is set 
+# to NO (the default) then the documentation will be excluded. 
+# Set it to YES to include the internal documentation.
+
+INTERNAL_DOCS          = NO
+
+# If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate 
+# file names in lower-case letters. If set to YES upper-case letters are also 
+# allowed. This is useful if you have classes or files whose names only differ 
+# in case and if your file system supports case sensitive file names. Windows 
+# and Mac users are advised to set this option to NO.
+
+CASE_SENSE_NAMES       = YES
+
+# If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen 
+# will show members with their full class and namespace scopes in the 
+# documentation. If set to YES the scope will be hidden.
+
+HIDE_SCOPE_NAMES       = NO
+
+# If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen 
+# will put a list of the files that are included by a file in the documentation 
+# of that file.
+
+SHOW_INCLUDE_FILES     = YES
+
+# If the INLINE_INFO tag is set to YES (the default) then a tag [inline] 
+# is inserted in the documentation for inline members.
+
+INLINE_INFO            = YES
+
+# If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen 
+# will sort the (detailed) documentation of file and class members 
+# alphabetically by member name. If set to NO the members will appear in 
+# declaration order.
+
+SORT_MEMBER_DOCS       = YES
+
+# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the 
+# brief documentation of file, namespace and class members alphabetically 
+# by member name. If set to NO (the default) the members will appear in 
+# declaration order.
+
+SORT_BRIEF_DOCS        = NO
+
+# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be 
+# sorted by fully-qualified names, including namespaces. If set to 
+# NO (the default), the class list will be sorted only by class name, 
+# not including the namespace part. 
+# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES.
+# Note: This option applies only to the class list, not to the 
+# alphabetical list.
+
+SORT_BY_SCOPE_NAME     = NO
+
+# The GENERATE_TODOLIST tag can be used to enable (YES) or 
+# disable (NO) the todo list. This list is created by putting \todo 
+# commands in the documentation.
+
+GENERATE_TODOLIST      = YES
+
+# The GENERATE_TESTLIST tag can be used to enable (YES) or 
+# disable (NO) the test list. This list is created by putting \test 
+# commands in the documentation.
+
+GENERATE_TESTLIST      = YES
+
+# The GENERATE_BUGLIST tag can be used to enable (YES) or 
+# disable (NO) the bug list. This list is created by putting \bug 
+# commands in the documentation.
+
+GENERATE_BUGLIST       = YES
+
+# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or 
+# disable (NO) the deprecated list. This list is created by putting 
+# \deprecated commands in the documentation.
+
+GENERATE_DEPRECATEDLIST= YES
+
+# The ENABLED_SECTIONS tag can be used to enable conditional 
+# documentation sections, marked by \if sectionname ... \endif.
+
+ENABLED_SECTIONS       = 
+
+# The MAX_INITIALIZER_LINES tag determines the maximum number of lines 
+# the initial value of a variable or define consists of for it to appear in 
+# the documentation. If the initializer consists of more lines than specified 
+# here it will be hidden. Use a value of 0 to hide initializers completely. 
+# The appearance of the initializer of individual variables and defines in the 
+# documentation can be controlled using \showinitializer or \hideinitializer 
+# command in the documentation regardless of this setting.
+
+MAX_INITIALIZER_LINES  = 30
+
+# Set the SHOW_USED_FILES tag to NO to disable the list of files generated 
+# at the bottom of the documentation of classes and structs. If set to YES the 
+# list will mention the files that were used to generate the documentation.
+
+SHOW_USED_FILES        = YES
+
+# If the sources in your project are distributed over multiple directories 
+# then setting the SHOW_DIRECTORIES tag to YES will show the directory hierarchy 
+# in the documentation.
+
+SHOW_DIRECTORIES       = YES
+
+#---------------------------------------------------------------------------
+# configuration options related to warning and progress messages
+#---------------------------------------------------------------------------
+
+# The QUIET tag can be used to turn on/off the messages that are generated 
+# by doxygen. Possible values are YES and NO. If left blank NO is used.
+
+QUIET                  = NO
+
+# The WARNINGS tag can be used to turn on/off the warning messages that are 
+# generated by doxygen. Possible values are YES and NO. If left blank 
+# NO is used.
+
+WARNINGS               = YES
+
+# If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings 
+# for undocumented members. If EXTRACT_ALL is set to YES then this flag will 
+# automatically be disabled.
+
+WARN_IF_UNDOCUMENTED   = YES
+
+# If WARN_IF_DOC_ERROR is set to YES, doxygen will generate warnings for 
+# potential errors in the documentation, such as not documenting some 
+# parameters in a documented function, or documenting parameters that 
+# don't exist or using markup commands wrongly.
+
+WARN_IF_DOC_ERROR      = YES
+
+# The WARN_FORMAT tag determines the format of the warning messages that 
+# doxygen can produce. The string should contain the $file, $line, and $text 
+# tags, which will be replaced by the file and line number from which the 
+# warning originated and the warning text.
+
+WARN_FORMAT            = "$file:$line: $text"
+
+# The WARN_LOGFILE tag can be used to specify a file to which warning 
+# and error messages should be written. If left blank the output is written 
+# to stderr.
+
+WARN_LOGFILE           = 
+
+#---------------------------------------------------------------------------
+# configuration options related to the input files
+#---------------------------------------------------------------------------
+
+# The INPUT tag can be used to specify the files and/or directories that contain 
+# documented source files. You may enter file names like "myfile.cpp" or 
+# directories like "/usr/src/myproject". Separate the files or directories 
+# with spaces.
+
+INPUT                  = 
+
+# If the value of the INPUT tag contains directories, you can use the 
+# FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp 
+# and *.h) to filter out the source-files in the directories. If left 
+# blank the following patterns are tested: 
+# *.c *.cc *.cxx *.cpp *.c++ *.java *.ii *.ixx *.ipp *.i++ *.inl *.h *.hh *.hxx *.hpp 
+# *.h++ *.idl *.odl *.cs *.php *.php3 *.inc *.m *.mm
+
+FILE_PATTERNS          = 
+
+# The RECURSIVE tag can be used to turn specify whether or not subdirectories 
+# should be searched for input files as well. Possible values are YES and NO. 
+# If left blank NO is used.
+
+RECURSIVE              = NO
+
+# The EXCLUDE tag can be used to specify files and/or directories that should 
+# excluded from the INPUT source files. This way you can easily exclude a 
+# subdirectory from a directory tree whose root is specified with the INPUT tag.
+
+EXCLUDE                = 
+
+# The EXCLUDE_SYMLINKS tag can be used select whether or not files or directories 
+# that are symbolic links (a Unix filesystem feature) are excluded from the input.
+
+EXCLUDE_SYMLINKS       = NO
+
+# If the value of the INPUT tag contains directories, you can use the 
+# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude 
+# certain files from those directories.
+
+EXCLUDE_PATTERNS       = 
+
+# The EXAMPLE_PATH tag can be used to specify one or more files or 
+# directories that contain example code fragments that are included (see 
+# the \include command).
+
+EXAMPLE_PATH           = 
+
+# If the value of the EXAMPLE_PATH tag contains directories, you can use the 
+# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp 
+# and *.h) to filter out the source-files in the directories. If left 
+# blank all files are included.
+
+EXAMPLE_PATTERNS       = 
+
+# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be 
+# searched for input files to be used with the \include or \dontinclude 
+# commands irrespective of the value of the RECURSIVE tag. 
+# Possible values are YES and NO. If left blank NO is used.
+
+EXAMPLE_RECURSIVE      = NO
+
+# The IMAGE_PATH tag can be used to specify one or more files or 
+# directories that contain image that are included in the documentation (see 
+# the \image command).
+
+IMAGE_PATH             = 
+
+# The INPUT_FILTER tag can be used to specify a program that doxygen should 
+# invoke to filter for each input file. Doxygen will invoke the filter program 
+# by executing (via popen()) the command <filter> <input-file>, where <filter> 
+# is the value of the INPUT_FILTER tag, and <input-file> is the name of an 
+# input file. Doxygen will then use the output that the filter program writes 
+# to standard output.  If FILTER_PATTERNS is specified, this tag will be 
+# ignored.
+
+INPUT_FILTER           = 
+
+# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern 
+# basis.  Doxygen will compare the file name with each pattern and apply the 
+# filter if there is a match.  The filters are a list of the form: 
+# pattern=filter (like *.cpp=my_cpp_filter). See INPUT_FILTER for further 
+# info on how filters are used. If FILTER_PATTERNS is empty, INPUT_FILTER 
+# is applied to all files.
+
+FILTER_PATTERNS        = 
+
+# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using 
+# INPUT_FILTER) will be used to filter the input files when producing source 
+# files to browse (i.e. when SOURCE_BROWSER is set to YES).
+
+FILTER_SOURCE_FILES    = NO
+
+#---------------------------------------------------------------------------
+# configuration options related to source browsing
+#---------------------------------------------------------------------------
+
+# If the SOURCE_BROWSER tag is set to YES then a list of source files will 
+# be generated. Documented entities will be cross-referenced with these sources. 
+# Note: To get rid of all source code in the generated output, make sure also 
+# VERBATIM_HEADERS is set to NO.
+
+SOURCE_BROWSER         = NO
+
+# Setting the INLINE_SOURCES tag to YES will include the body 
+# of functions and classes directly in the documentation.
+
+INLINE_SOURCES         = NO
+
+# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct 
+# doxygen to hide any special comment blocks from generated source code 
+# fragments. Normal C and C++ comments will always remain visible.
+
+STRIP_CODE_COMMENTS    = YES
+
+# If the REFERENCED_BY_RELATION tag is set to YES (the default) 
+# then for each documented function all documented 
+# functions referencing it will be listed.
+
+REFERENCED_BY_RELATION = YES
+
+# If the REFERENCES_RELATION tag is set to YES (the default) 
+# then for each documented function all documented entities 
+# called/used by that function will be listed.
+
+REFERENCES_RELATION    = YES
+
+# If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen 
+# will generate a verbatim copy of the header file for each class for 
+# which an include is specified. Set to NO to disable this.
+
+VERBATIM_HEADERS       = YES
+
+#---------------------------------------------------------------------------
+# configuration options related to the alphabetical class index
+#---------------------------------------------------------------------------
+
+# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index 
+# of all compounds will be generated. Enable this if the project 
+# contains a lot of classes, structs, unions or interfaces.
+
+ALPHABETICAL_INDEX     = NO
+
+# If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then 
+# the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns 
+# in which this list will be split (can be a number in the range [1..20])
+
+COLS_IN_ALPHA_INDEX    = 5
+
+# In case all classes in a project start with a common prefix, all 
+# classes will be put under the same header in the alphabetical index. 
+# The IGNORE_PREFIX tag can be used to specify one or more prefixes that 
+# should be ignored while generating the index headers.
+
+IGNORE_PREFIX          = 
+
+#---------------------------------------------------------------------------
+# configuration options related to the HTML output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_HTML tag is set to YES (the default) Doxygen will 
+# generate HTML output.
+
+GENERATE_HTML          = YES
+
+# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. 
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be 
+# put in front of it. If left blank `html' will be used as the default path.
+
+HTML_OUTPUT            = html
+
+# The HTML_FILE_EXTENSION tag can be used to specify the file extension for 
+# each generated HTML page (for example: .htm,.php,.asp). If it is left blank 
+# doxygen will generate files with .html extension.
+
+HTML_FILE_EXTENSION    = .html
+
+# The HTML_HEADER tag can be used to specify a personal HTML header for 
+# each generated HTML page. If it is left blank doxygen will generate a 
+# standard header.
+
+HTML_HEADER            = 
+
+# The HTML_FOOTER tag can be used to specify a personal HTML footer for 
+# each generated HTML page. If it is left blank doxygen will generate a 
+# standard footer.
+
+HTML_FOOTER            = 
+
+# The HTML_STYLESHEET tag can be used to specify a user-defined cascading 
+# style sheet that is used by each HTML page. It can be used to 
+# fine-tune the look of the HTML output. If the tag is left blank doxygen 
+# will generate a default style sheet. Note that doxygen will try to copy 
+# the style sheet file to the HTML output directory, so don't put your own 
+# stylesheet in the HTML output directory as well, or it will be erased!
+
+HTML_STYLESHEET        = 
+
+# If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes, 
+# files or namespaces will be aligned in HTML using tables. If set to 
+# NO a bullet list will be used.
+
+HTML_ALIGN_MEMBERS     = YES
+
+# If the GENERATE_HTMLHELP tag is set to YES, additional index files 
+# will be generated that can be used as input for tools like the 
+# Microsoft HTML help workshop to generate a compressed HTML help file (.chm) 
+# of the generated HTML documentation.
+
+GENERATE_HTMLHELP      = NO
+
+# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can 
+# be used to specify the file name of the resulting .chm file. You 
+# can add a path in front of the file if the result should not be 
+# written to the html output directory.
+
+CHM_FILE               = 
+
+# If the GENERATE_HTMLHELP tag is set to YES, the HHC_LOCATION tag can 
+# be used to specify the location (absolute path including file name) of 
+# the HTML help compiler (hhc.exe). If non-empty doxygen will try to run 
+# the HTML help compiler on the generated index.hhp.
+
+HHC_LOCATION           = 
+
+# If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag 
+# controls if a separate .chi index file is generated (YES) or that 
+# it should be included in the master .chm file (NO).
+
+GENERATE_CHI           = NO
+
+# If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag 
+# controls whether a binary table of contents is generated (YES) or a 
+# normal table of contents (NO) in the .chm file.
+
+BINARY_TOC             = NO
+
+# The TOC_EXPAND flag can be set to YES to add extra items for group members 
+# to the contents of the HTML help documentation and to the tree view.
+
+TOC_EXPAND             = NO
+
+# The DISABLE_INDEX tag can be used to turn on/off the condensed index at 
+# top of each HTML page. The value NO (the default) enables the index and 
+# the value YES disables it.
+
+DISABLE_INDEX          = NO
+
+# This tag can be used to set the number of enum values (range [1..20]) 
+# that doxygen will group on one line in the generated HTML documentation.
+
+ENUM_VALUES_PER_LINE   = 4
+
+# If the GENERATE_TREEVIEW tag is set to YES, a side panel will be
+# generated containing a tree-like index structure (just like the one that 
+# is generated for HTML Help). For this to work a browser that supports 
+# JavaScript, DHTML, CSS and frames is required (for instance Mozilla 1.0+, 
+# Netscape 6.0+, Internet explorer 5.0+, or Konqueror). Windows users are 
+# probably better off using the HTML help feature.
+
+GENERATE_TREEVIEW      = NO
+
+# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be 
+# used to set the initial width (in pixels) of the frame in which the tree 
+# is shown.
+
+TREEVIEW_WIDTH         = 250
+
+#---------------------------------------------------------------------------
+# configuration options related to the LaTeX output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_LATEX tag is set to YES (the default) Doxygen will 
+# generate Latex output.
+
+GENERATE_LATEX         = YES
+
+# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put. 
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be 
+# put in front of it. If left blank `latex' will be used as the default path.
+
+LATEX_OUTPUT           = latex
+
+# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be 
+# invoked. If left blank `latex' will be used as the default command name.
+
+LATEX_CMD_NAME         = latex
+
+# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to 
+# generate index for LaTeX. If left blank `makeindex' will be used as the 
+# default command name.
+
+MAKEINDEX_CMD_NAME     = makeindex
+
+# If the COMPACT_LATEX tag is set to YES Doxygen generates more compact 
+# LaTeX documents. This may be useful for small projects and may help to 
+# save some trees in general.
+
+COMPACT_LATEX          = NO
+
+# The PAPER_TYPE tag can be used to set the paper type that is used 
+# by the printer. Possible values are: a4, a4wide, letter, legal and 
+# executive. If left blank a4wide will be used.
+
+PAPER_TYPE             = a4wide
+
+# The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX 
+# packages that should be included in the LaTeX output.
+
+EXTRA_PACKAGES         = 
+
+# The LATEX_HEADER tag can be used to specify a personal LaTeX header for 
+# the generated latex document. The header should contain everything until 
+# the first chapter. If it is left blank doxygen will generate a 
+# standard header. Notice: only use this tag if you know what you are doing!
+
+LATEX_HEADER           = 
+
+# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated 
+# is prepared for conversion to pdf (using ps2pdf). The pdf file will 
+# contain links (just like the HTML output) instead of page references 
+# This makes the output suitable for online browsing using a pdf viewer.
+
+PDF_HYPERLINKS         = NO
+
+# If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of 
+# plain latex in the generated Makefile. Set this option to YES to get a 
+# higher quality PDF documentation.
+
+USE_PDFLATEX           = NO
+
+# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode. 
+# command to the generated LaTeX files. This will instruct LaTeX to keep 
+# running if errors occur, instead of asking the user for help. 
+# This option is also used when generating formulas in HTML.
+
+LATEX_BATCHMODE        = NO
+
+# If LATEX_HIDE_INDICES is set to YES then doxygen will not 
+# include the index chapters (such as File Index, Compound Index, etc.) 
+# in the output.
+
+LATEX_HIDE_INDICES     = NO
+
+#---------------------------------------------------------------------------
+# configuration options related to the RTF output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output 
+# The RTF output is optimized for Word 97 and may not look very pretty with 
+# other RTF readers or editors.
+
+GENERATE_RTF           = NO
+
+# The RTF_OUTPUT tag is used to specify where the RTF docs will be put. 
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be 
+# put in front of it. If left blank `rtf' will be used as the default path.
+
+RTF_OUTPUT             = rtf
+
+# If the COMPACT_RTF tag is set to YES Doxygen generates more compact 
+# RTF documents. This may be useful for small projects and may help to 
+# save some trees in general.
+
+COMPACT_RTF            = NO
+
+# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated 
+# will contain hyperlink fields. The RTF file will 
+# contain links (just like the HTML output) instead of page references. 
+# This makes the output suitable for online browsing using WORD or other 
+# programs which support those fields. 
+# Note: wordpad (write) and others do not support links.
+
+RTF_HYPERLINKS         = NO
+
+# Load stylesheet definitions from file. Syntax is similar to doxygen's 
+# config file, i.e. a series of assignments. You only have to provide 
+# replacements, missing definitions are set to their default value.
+
+RTF_STYLESHEET_FILE    = 
+
+# Set optional variables used in the generation of an rtf document. 
+# Syntax is similar to doxygen's config file.
+
+RTF_EXTENSIONS_FILE    = 
+
+#---------------------------------------------------------------------------
+# configuration options related to the man page output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_MAN tag is set to YES (the default) Doxygen will 
+# generate man pages
+
+GENERATE_MAN           = NO
+
+# The MAN_OUTPUT tag is used to specify where the man pages will be put. 
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be 
+# put in front of it. If left blank `man' will be used as the default path.
+
+MAN_OUTPUT             = man
+
+# The MAN_EXTENSION tag determines the extension that is added to 
+# the generated man pages (default is the subroutine's section .3)
+
+MAN_EXTENSION          = .3
+
+# If the MAN_LINKS tag is set to YES and Doxygen generates man output, 
+# then it will generate one additional man file for each entity 
+# documented in the real man page(s). These additional files 
+# only source the real man page, but without them the man command 
+# would be unable to find the correct page. The default is NO.
+
+MAN_LINKS              = NO
+
+#---------------------------------------------------------------------------
+# configuration options related to the XML output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_XML tag is set to YES Doxygen will 
+# generate an XML file that captures the structure of 
+# the code including all documentation.
+
+GENERATE_XML           = NO
+
+# The XML_OUTPUT tag is used to specify where the XML pages will be put. 
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be 
+# put in front of it. If left blank `xml' will be used as the default path.
+
+XML_OUTPUT             = xml
+
+# The XML_SCHEMA tag can be used to specify an XML schema, 
+# which can be used by a validating XML parser to check the 
+# syntax of the XML files.
+
+XML_SCHEMA             = 
+
+# The XML_DTD tag can be used to specify an XML DTD, 
+# which can be used by a validating XML parser to check the 
+# syntax of the XML files.
+
+XML_DTD                = 
+
+# If the XML_PROGRAMLISTING tag is set to YES Doxygen will 
+# dump the program listings (including syntax highlighting 
+# and cross-referencing information) to the XML output. Note that 
+# enabling this will significantly increase the size of the XML output.
+
+XML_PROGRAMLISTING     = YES
+
+#---------------------------------------------------------------------------
+# configuration options for the AutoGen Definitions output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_AUTOGEN_DEF tag is set to YES Doxygen will 
+# generate an AutoGen Definitions (see autogen.sf.net) file 
+# that captures the structure of the code including all 
+# documentation. Note that this feature is still experimental 
+# and incomplete at the moment.
+
+GENERATE_AUTOGEN_DEF   = NO
+
+#---------------------------------------------------------------------------
+# configuration options related to the Perl module output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_PERLMOD tag is set to YES Doxygen will 
+# generate a Perl module file that captures the structure of 
+# the code including all documentation. Note that this 
+# feature is still experimental and incomplete at the 
+# moment.
+
+GENERATE_PERLMOD       = NO
+
+# If the PERLMOD_LATEX tag is set to YES Doxygen will generate 
+# the necessary Makefile rules, Perl scripts and LaTeX code to be able 
+# to generate PDF and DVI output from the Perl module output.
+
+PERLMOD_LATEX          = NO
+
+# If the PERLMOD_PRETTY tag is set to YES the Perl module output will be 
+# nicely formatted so it can be parsed by a human reader.  This is useful 
+# if you want to understand what is going on.  On the other hand, if this 
+# tag is set to NO the size of the Perl module output will be much smaller 
+# and Perl will parse it just the same.
+
+PERLMOD_PRETTY         = YES
+
+# The names of the make variables in the generated doxyrules.make file 
+# are prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX. 
+# This is useful so different doxyrules.make files included by the same 
+# Makefile don't overwrite each other's variables.
+
+PERLMOD_MAKEVAR_PREFIX = 
+
+#---------------------------------------------------------------------------
+# Configuration options related to the preprocessor   
+#---------------------------------------------------------------------------
+
+# If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will 
+# evaluate all C-preprocessor directives found in the sources and include 
+# files.
+
+ENABLE_PREPROCESSING   = YES
+
+# If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro 
+# names in the source code. If set to NO (the default) only conditional 
+# compilation will be performed. Macro expansion can be done in a controlled 
+# way by setting EXPAND_ONLY_PREDEF to YES.
+
+MACRO_EXPANSION        = NO
+
+# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES 
+# then the macro expansion is limited to the macros specified with the 
+# PREDEFINED and EXPAND_AS_PREDEFINED tags.
+
+EXPAND_ONLY_PREDEF     = NO
+
+# If the SEARCH_INCLUDES tag is set to YES (the default) the includes files 
+# in the INCLUDE_PATH (see below) will be search if a #include is found.
+
+SEARCH_INCLUDES        = YES
+
+# The INCLUDE_PATH tag can be used to specify one or more directories that 
+# contain include files that are not input files but should be processed by 
+# the preprocessor.
+
+INCLUDE_PATH           = 
+
+# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard 
+# patterns (like *.h and *.hpp) to filter out the header-files in the 
+# directories. If left blank, the patterns specified with FILE_PATTERNS will 
+# be used.
+
+INCLUDE_FILE_PATTERNS  = 
+
+# The PREDEFINED tag can be used to specify one or more macro names that 
+# are defined before the preprocessor is started (similar to the -D option of 
+# gcc). The argument of the tag is a list of macros of the form: name 
+# or name=definition (no spaces). If the definition and the = are 
+# omitted =1 is assumed. To prevent a macro definition from being 
+# undefined via #undef or recursively expanded use the := operator 
+# instead of the = operator.
+
+PREDEFINED             = 
+
+# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then 
+# this tag can be used to specify a list of macro names that should be expanded. 
+# The macro definition that is found in the sources will be used. 
+# Use the PREDEFINED tag if you want to use a different macro definition.
+
+EXPAND_AS_DEFINED      = 
+
+# If the SKIP_FUNCTION_MACROS tag is set to YES (the default) then 
+# doxygen's preprocessor will remove all function-like macros that are alone 
+# on a line, have an all uppercase name, and do not end with a semicolon. Such 
+# function macros are typically used for boiler-plate code, and will confuse the 
+# parser if not removed.
+
+SKIP_FUNCTION_MACROS   = YES
+
+#---------------------------------------------------------------------------
+# Configuration::additions related to external references   
+#---------------------------------------------------------------------------
+
+# The TAGFILES option can be used to specify one or more tagfiles. 
+# Optionally an initial location of the external documentation 
+# can be added for each tagfile. The format of a tag file without 
+# this location is as follows: 
+#   TAGFILES = file1 file2 ... 
+# Adding location for the tag files is done as follows: 
+#   TAGFILES = file1=loc1 "file2 = loc2" ... 
+# where "loc1" and "loc2" can be relative or absolute paths or 
+# URLs. If a location is present for each tag, the installdox tool 
+# does not have to be run to correct the links.
+# Note that each tag file must have a unique name
+# (where the name does NOT include the path)
+# If a tag file is not located in the directory in which doxygen 
+# is run, you must also specify the path to the tagfile here.
+
+TAGFILES               = 
+
+# When a file name is specified after GENERATE_TAGFILE, doxygen will create 
+# a tag file that is based on the input files it reads.
+
+GENERATE_TAGFILE       = 
+
+# If the ALLEXTERNALS tag is set to YES all external classes will be listed 
+# in the class index. If set to NO only the inherited external classes 
+# will be listed.
+
+ALLEXTERNALS           = NO
+
+# If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed 
+# in the modules index. If set to NO, only the current project's groups will 
+# be listed.
+
+EXTERNAL_GROUPS        = YES
+
+# The PERL_PATH should be the absolute path and name of the perl script 
+# interpreter (i.e. the result of `which perl').
+
+PERL_PATH              = /usr/bin/perl
+
+#---------------------------------------------------------------------------
+# Configuration options related to the dot tool   
+#---------------------------------------------------------------------------
+
+# If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will 
+# generate a inheritance diagram (in HTML, RTF and LaTeX) for classes with base or 
+# super classes. Setting the tag to NO turns the diagrams off. Note that this 
+# option is superseded by the HAVE_DOT option below. This is only a fallback. It is 
+# recommended to install and use dot, since it yields more powerful graphs.
+
+CLASS_DIAGRAMS         = YES
+
+# If set to YES, the inheritance and collaboration graphs will hide 
+# inheritance and usage relations if the target is undocumented 
+# or is not a class.
+
+HIDE_UNDOC_RELATIONS   = YES
+
+# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is 
+# available from the path. This tool is part of Graphviz, a graph visualization 
+# toolkit from AT&T and Lucent Bell Labs. The other options in this section 
+# have no effect if this option is set to NO (the default)
+
+HAVE_DOT               = NO
+
+# If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen 
+# will generate a graph for each documented class showing the direct and 
+# indirect inheritance relations. Setting this tag to YES will force the 
+# the CLASS_DIAGRAMS tag to NO.
+
+CLASS_GRAPH            = YES
+
+# If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen 
+# will generate a graph for each documented class showing the direct and 
+# indirect implementation dependencies (inheritance, containment, and 
+# class references variables) of the class with other documented classes.
+
+COLLABORATION_GRAPH    = YES
+
+# If the UML_LOOK tag is set to YES doxygen will generate inheritance and 
+# collaboration diagrams in a style similar to the OMG's Unified Modeling 
+# Language.
+
+UML_LOOK               = NO
+
+# If set to YES, the inheritance and collaboration graphs will show the 
+# relations between templates and their instances.
+
+TEMPLATE_RELATIONS     = NO
+
+# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT 
+# tags are set to YES then doxygen will generate a graph for each documented 
+# file showing the direct and indirect include dependencies of the file with 
+# other documented files.
+
+INCLUDE_GRAPH          = YES
+
+# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and 
+# HAVE_DOT tags are set to YES then doxygen will generate a graph for each 
+# documented header file showing the documented files that directly or 
+# indirectly include this file.
+
+INCLUDED_BY_GRAPH      = YES
+
+# If the CALL_GRAPH and HAVE_DOT tags are set to YES then doxygen will 
+# generate a call dependency graph for every global function or class method. 
+# Note that enabling this option will significantly increase the time of a run. 
+# So in most cases it will be better to enable call graphs for selected 
+# functions only using the \callgraph command.
+
+CALL_GRAPH             = NO
+
+# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen 
+# will graphical hierarchy of all classes instead of a textual one.
+
+GRAPHICAL_HIERARCHY    = YES
+
+# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images 
+# generated by dot. Possible values are png, jpg, or gif
+# If left blank png will be used.
+
+DOT_IMAGE_FORMAT       = png
+
+# The tag DOT_PATH can be used to specify the path where the dot tool can be 
+# found. If left blank, it is assumed the dot tool can be found on the path.
+
+DOT_PATH               = 
+
+# The DOTFILE_DIRS tag can be used to specify one or more directories that 
+# contain dot files that are included in the documentation (see the 
+# \dotfile command).
+
+DOTFILE_DIRS           = 
+
+# The MAX_DOT_GRAPH_WIDTH tag can be used to set the maximum allowed width 
+# (in pixels) of the graphs generated by dot. If a graph becomes larger than 
+# this value, doxygen will try to truncate the graph, so that it fits within 
+# the specified constraint. Beware that most browsers cannot cope with very 
+# large images.
+
+MAX_DOT_GRAPH_WIDTH    = 1024
+
+# The MAX_DOT_GRAPH_HEIGHT tag can be used to set the maximum allows height 
+# (in pixels) of the graphs generated by dot. If a graph becomes larger than 
+# this value, doxygen will try to truncate the graph, so that it fits within 
+# the specified constraint. Beware that most browsers cannot cope with very 
+# large images.
+
+MAX_DOT_GRAPH_HEIGHT   = 1024
+
+# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the 
+# graphs generated by dot. A depth value of 3 means that only nodes reachable 
+# from the root by following a path via at most 3 edges will be shown. Nodes that 
+# lay further from the root node will be omitted. Note that setting this option to 
+# 1 or 2 may greatly reduce the computation time needed for large code bases. Also 
+# note that a graph may be further truncated if the graph's image dimensions are 
+# not sufficient to fit the graph (see MAX_DOT_GRAPH_WIDTH and MAX_DOT_GRAPH_HEIGHT). 
+# If 0 is used for the depth value (the default), the graph is not depth-constrained.
+
+MAX_DOT_GRAPH_DEPTH    = 0
+
+# If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will 
+# generate a legend page explaining the meaning of the various boxes and 
+# arrows in the dot generated graphs.
+
+GENERATE_LEGEND        = YES
+
+# If the DOT_CLEANUP tag is set to YES (the default) Doxygen will 
+# remove the intermediate dot files that are used to generate 
+# the various graphs.
+
+DOT_CLEANUP            = YES
+
+#---------------------------------------------------------------------------
+# Configuration::additions related to the search engine   
+#---------------------------------------------------------------------------
+
+# The SEARCHENGINE tag specifies whether or not a search engine should be 
+# used. If set to NO the values of all tags below this one will be ignored.
+
+SEARCHENGINE           = NO
diff --git a/INSTALL b/INSTALL
new file mode 100644
index 0000000..d851a7d
--- /dev/null
+++ b/INSTALL
@@ -0,0 +1,8 @@
+
+COMPILATION:
+ - "make -f Makefile.cvs" (usually not needed for distributed tarballs)
+ - "./configure --enable-debug=full" (check ./configure --help for other options)
+ - "make"
+
+INSTALLATION:
+ - "make install" (as root)
diff --git a/Makefile.am b/Makefile.am
new file mode 100644
index 0000000..1860d65
--- /dev/null
+++ b/Makefile.am
@@ -0,0 +1,13 @@
+AUTOMAKE_OPTIONS = foreign 1.5
+
+EXTRA_DIST = README COPYING Changelog
+
+MAINTAINERCLEANFILES = configure.files subdirs
+
+dist-hook:
+	cd $(top_distdir) && perl $(top_srcdir)/admin/am_edit -padmin
+
+distclean-local:
+	rm -rf autom4te.cache
+	rm -f svn-commit.*
+SUBDIRS=$(TOPSUBDIRS)
diff --git a/Makefile.am.in b/Makefile.am.in
new file mode 100644
index 0000000..69c5959
--- /dev/null
+++ b/Makefile.am.in
@@ -0,0 +1,12 @@
+AUTOMAKE_OPTIONS = foreign 1.5
+
+EXTRA_DIST = README COPYING Changelog
+
+MAINTAINERCLEANFILES = configure.files subdirs
+
+dist-hook:
+	cd $(top_distdir) && perl $(top_srcdir)/admin/am_edit -padmin
+
+distclean-local:
+	rm -rf autom4te.cache
+	rm -f svn-commit.*
diff --git a/Makefile.cvs b/Makefile.cvs
new file mode 100644
index 0000000..e267ae6
--- /dev/null
+++ b/Makefile.cvs
@@ -0,0 +1,20 @@
+all:
+	@echo "This Makefile is only for the SVN repository"
+	@echo ""
+	@if test ! -d admin; then \
+	   echo "Please update this module!" ;\
+	   exit 1 ;\
+	fi
+	@echo "Extract messages"
+	$(MAKE) -f admin/Makefile.common package-messages
+	cd po && sh merge.sh
+	@echo ""
+	@echo "Create configure & co"
+	$(MAKE) -f admin/Makefile.common cvs
+
+messages:
+	@echo "Extract messages"
+	$(MAKE) -f admin/Makefile.common package-messages
+	cd po && sh merge.sh
+
+.SILENT:
diff --git a/README b/README
new file mode 100644
index 0000000..dfb7c64
--- /dev/null
+++ b/README
@@ -0,0 +1,27 @@
+Piklab: An integrated development environment for PIC microcontrollers
+Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>
+Copyright (C) 2006      Sébastien Laoût
+Copyright (C) 2002-2005 Alain Gibaud
+Copyright (C) 2003-2004 Stephen Landamore
+Copyright (C) 2001-2005 Craig Franklin
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License along
+    with this program; if not, write to the Free Software Foundation, Inc.,
+    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+
+--------------------------------------------------------------------------------
+BEWARE: this is beta software. BUGS are likely!!!
+IMPORTANT: see http://piklab.sourceforge.net for support and notes.
+
+FEEDBACK is greatly appreciated (go to http://piklab.sourceforge.net or
+send me an email at hadacek@kde.org): report bugs, successes,...
diff --git a/TODO b/TODO
new file mode 100644
index 0000000..cbd4880
--- /dev/null
+++ b/TODO
@@ -0,0 +1,145 @@
+icd2: assert in progress when programming with icd2 debugger
+
+TODO programmers:
+* icd1/2: optimize programming/reading: only program/read what's necessary!!
+* direct: alternate method to direct-program "Vdd first" chips (needed ?)
+* pickit2: protocol for firmware 2.x
+* support for other bootloaders (AN851, ...)
+* look into xwisp2/avrdude
+* pickit1/2: speed-up by not programming mask words and by programming 4/n words when possible...
+* pickit2: now supports 16F886/887
+* add promate2
+* direct: support dsPIC
+* add option to not autoload firmware (?)
+* direct: support 16F88X devices
+* icd2: 12F609/615 16F610 16F677(debug) 16F88X 30F1010/2020/2023
+        famid for 18J devices
+* pickit2: configuration to set target voltage to different values (?)
+* icd2: progress for firmware uploading
+* psp: add 18F support
+* psp: detection of programmer type (PSP, JuPIC, or Warp13)
+* psp: for Warp13, there are some differences for 18F devices...
+
+TODO debuggers:
+* gpsim: add stopwatch feature + clock speed config
+* icd2: fix 16FXXX debugging: init + reset + ...
+* 18F1330-ICD ?
+* icd2: how to read PORTB from 16F7X7
+* device power toggle action: problem while running/debugging... (?)
+* should be able to read/verify/blankcheck while debugging: restart debug: ask ?
+* icd2: support more than one breakpoint for 18F
+* advanced breakpoints (register, function, ...)
+* add icd1 debugging
+* support sdcdb (?)
+* support ICD from CCS
+* PIC30: no disassembly in disassembly listing
+
+TODO interface:
+* set breakpoint in disassembly listing, close, reopen: not displayed...
+* escaping in string register entry
+* add serial terminal
+* "read all" registers is slow (gui refresh for each read)
+* add PC and goto PC in breakpoint list view (?)
+* add "random/set_range/..." actions to each range in hex editor
+* more filters in device selector
+* undo/redo + better selection in hex editor
+* .o view: more complete (?)
+* renaming of source files
+* COFF disassembly highlighting does not properly highlight multiline comments for C
+
+TODO toolchains:
+* support CC8E
+* PICC: no need to compile and assemble in two steps for C files
+* PICC: test debugging (from C or ASM files)
+* mix different compiler and assembler in a project... (subproject ?)
+* support for MPASM/MPLINK (mpasm freezes my version of wine...)
+* error/warning filter for C30/PICC/JAL/C18
+* syntax highlighting for JAL: highlight assembler blocks
+* better syntax highlighting for Boost Basic
+* PICC Lite windows executable crashes with wine
+* support dsPICC: demo windows only and not working with wine
+* support C2C, C2C++, P2C: exception in wine...
+* support Proton Basic compiler
+* library project: other toolchains ?
+
+TODO generators:
+* fix cname generation for BSSEC/BSSIZ SSSEC/SSSIZ (none supported yet by gputils/sdcc ?)
+* add missing template generators
+* config generator: add/fix config names for gpasm/sdcc (18F) + picc + ...
+
+TODO command-line:
+* add "merge" commands to "piklab-hex"
+* add utility to disassemble (?)
+
+TODO misc:
+* if CTRL+D in konsole: should restart it...
+* check endianness: it should be alright since we are reading from hex file and outputing strings (?)
+* add log settings: log file / timestamp
+* allow saving hex to other formats
+* shouldn't we always use the IHX32 format for devices 18 and up ???
+* Vdd-frequency graphs ignore different osc/modes...
+* code for UserId disassembly doesn't seem to be right...
+
+DEVICES:
+- finish checking device XML with XML Schema...
+- make an automatic parser for file "gpprocessor.c" of gputils to extract coff codes.
+- check list of devices against MPLAB for missing devices and discrepencies.
+- config bits: check config bits from MPLAB
+- vdd/freq: not sure I understand the Vdd range in 30F datasheets
+- sometimes "vpp" depends on "vdd"...
+- revision names...
+- 16F630-ICD has lower Vdd requirements for read/write
+- for 18F1230/1330 16F88X: Vdd-F graphs not available yet...
+- 12F6XX-16F6XX-ICD have lower Vdd requirements for bulk erase
+- checksums:
+    unknown             : 16C641/C661/C84 18J 18F2XXX/4XXX
+    all wrong (?)       : 16CE923/CE925 30F
+    protected wrong (?) : 16CR73/CR74/CR76/CR77 16F72/F73/F74/F76/F77 16F873A/874A
+                          18F1230/1330
+    datasheet wrong (?) : 12F508(Off:cc=DC68)
+                          16C55A (All:cc=F332) 16C56A(All:not XOR4)
+                          16C712(size=3FF)
+                          16F616 (All:bc=FFBE cc=CBD8)
+                          18F4331(same as 18F2331)
+                          18F2439/4439/6520/8520 (wrong program size)
+    blank value discrepencies : 18F6525
+- 16C433: config bits datasheet do not agree with progsheet (used progsheet)
+- 16CR54/16C557: status ?
+- 16HV540: discrepency between datasheet and progsheet for CP bits
+- 18F2585/4585/2680/4680: data sheet is wrong for block description (boot block size is variable)
+- 18F6X10/6X90: discrepencies between datasheet and progsheet for PM and EBTR bits
+
+- unknown devices (from gpasm) : 18F2681/F4681/F64J15/F84J15
+- 16CR57A ?
+- nr: PS501 PS810 PS700
+- new devices:
+    33F
+    24F16/32/48
+    18F6628/8628/6723/8723 (compatible 18F8722)
+- future devices:
+    16F526
+    18F23K20/24K20/25K20/26K20
+    18F43K20/44K20/45K20/46K20
+    24FJ256GA110
+
+GPUTILS: 0.13.5
+- 16C54A: _CP_ON doesn't yield 0x007 [fixed in trunk]
+- 16C715: _CP_75 is missing [fixed in trunk]
+- 16F737/767/777 16F87/88: _FCMEN_OFF doesn't yield 0xFFE [submitted]
+- 16F883/884/886/887: BORV_21 doesn't yield 0xEFF
+- 17C42A/C43/C44: _PMC_MODE doesn't yield 0x7FAF
+- 18F1230/1330: BORV doesn't have the correct values in .inc file
+- 18F258/458: BORV_25 should be BORV_20
+- 18F2510: using 12F510 lkr (?)
+- 18F6X10/6X90/8X10/8X90: missing PM/EBTR (if they exists on these devices ??)
+- 18J: config bits commented in "inc" file
+
+SDCC: 2.7.0
+- 16CR620A/CR73/CR74/CR76/CR77: missing include
+- 16F616/F747/F946: missing include
+- 16F737/767/777/87/88: cf gputils
+- 16F886/887: missing DEBUG define [fixed in trunk]
+- 18F1320/2320/2525/4525: missing include
+- 18F2221/2321/4221/4320: not supported by GPUtils 0.13.5
+- 18F4455/4550: missing ENICPORT_ON
+- 18F4620: missing XINST
diff --git a/acinclude.m4 b/acinclude.m4
new file mode 100644
index 0000000..32025e6
--- /dev/null
+++ b/acinclude.m4
@@ -0,0 +1,11922 @@
+##   -*- autoconf -*-
+
+dnl    This file is part of the KDE libraries/packages
+dnl    Copyright (C) 1997 Janos Farkas (chexum@shadow.banki.hu)
+dnl              (C) 1997,98,99 Stephan Kulow (coolo@kde.org)
+
+dnl    This file is free software; you can redistribute it and/or
+dnl    modify it under the terms of the GNU Library General Public
+dnl    License as published by the Free Software Foundation; either
+dnl    version 2 of the License, or (at your option) any later version.
+
+dnl    This library is distributed in the hope that it will be useful,
+dnl    but WITHOUT ANY WARRANTY; without even the implied warranty of
+dnl    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+dnl    Library General Public License for more details.
+
+dnl    You should have received a copy of the GNU Library General Public License
+dnl    along with this library; see the file COPYING.LIB.  If not, write to
+dnl    the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+dnl    Boston, MA 02110-1301, USA.
+
+dnl IMPORTANT NOTE:
+dnl Please do not modify this file unless you expect your modifications to be
+dnl carried into every other module in the repository. 
+dnl
+dnl Single-module modifications are best placed in configure.in for kdelibs
+dnl and kdebase or configure.in.in if present.
+
+# KDE_PATH_X_DIRECT
+dnl Internal subroutine of AC_PATH_X.
+dnl Set ac_x_includes and/or ac_x_libraries.
+AC_DEFUN([KDE_PATH_X_DIRECT],
+[
+AC_REQUIRE([KDE_CHECK_LIB64])
+
+if test "$ac_x_includes" = NO; then
+  # Guess where to find include files, by looking for this one X11 .h file.
+  test -z "$x_direct_test_include" && x_direct_test_include=X11/Intrinsic.h
+
+  # First, try using that file with no special directory specified.
+AC_TRY_CPP([#include <$x_direct_test_include>],
+[# We can compile using X headers with no special include directory.
+ac_x_includes=],
+[# Look for the header file in a standard set of common directories.
+# Check X11 before X11Rn because it is often a symlink to the current release.
+  for ac_dir in               \
+    /usr/X11/include          \
+    /usr/X11R6/include        \
+    /usr/X11R5/include        \
+    /usr/X11R4/include        \
+                              \
+    /usr/include/X11          \
+    /usr/include/X11R6        \
+    /usr/include/X11R5        \
+    /usr/include/X11R4        \
+                              \
+    /usr/local/X11/include    \
+    /usr/local/X11R6/include  \
+    /usr/local/X11R5/include  \
+    /usr/local/X11R4/include  \
+                              \
+    /usr/local/include/X11    \
+    /usr/local/include/X11R6  \
+    /usr/local/include/X11R5  \
+    /usr/local/include/X11R4  \
+                              \
+    /usr/X386/include         \
+    /usr/x386/include         \
+    /usr/XFree86/include/X11  \
+                              \
+    /usr/include              \
+    /usr/local/include        \
+    /usr/unsupported/include  \
+    /usr/athena/include       \
+    /usr/local/x11r5/include  \
+    /usr/lpp/Xamples/include  \
+                              \
+    /usr/openwin/include      \
+    /usr/openwin/share/include \
+    ; \
+  do
+    if test -r "$ac_dir/$x_direct_test_include"; then
+      ac_x_includes=$ac_dir
+      break
+    fi
+  done])
+fi # $ac_x_includes = NO
+
+if test "$ac_x_libraries" = NO; then
+  # Check for the libraries.
+
+  test -z "$x_direct_test_library" && x_direct_test_library=Xt
+  test -z "$x_direct_test_function" && x_direct_test_function=XtMalloc
+
+  # See if we find them without any special options.
+  # Don't add to $LIBS permanently.
+  ac_save_LIBS="$LIBS"
+  LIBS="-l$x_direct_test_library $LIBS"
+AC_TRY_LINK([#include <X11/Intrinsic.h>], [${x_direct_test_function}(1)],
+[LIBS="$ac_save_LIBS"
+# We can link X programs with no special library path.
+ac_x_libraries=],
+[LIBS="$ac_save_LIBS"
+# First see if replacing the include by lib works.
+# Check X11 before X11Rn because it is often a symlink to the current release.
+for ac_dir in `echo "$ac_x_includes" | sed s/include/lib${kdelibsuff}/` \
+    /usr/X11/lib${kdelibsuff}           \
+    /usr/X11R6/lib${kdelibsuff}         \
+    /usr/X11R5/lib${kdelibsuff}         \
+    /usr/X11R4/lib${kdelibsuff}         \
+                                        \
+    /usr/lib${kdelibsuff}/X11           \
+    /usr/lib${kdelibsuff}/X11R6         \
+    /usr/lib${kdelibsuff}/X11R5         \
+    /usr/lib${kdelibsuff}/X11R4         \
+                                        \
+    /usr/local/X11/lib${kdelibsuff}     \
+    /usr/local/X11R6/lib${kdelibsuff}   \
+    /usr/local/X11R5/lib${kdelibsuff}   \
+    /usr/local/X11R4/lib${kdelibsuff}   \
+                                        \
+    /usr/local/lib${kdelibsuff}/X11     \
+    /usr/local/lib${kdelibsuff}/X11R6   \
+    /usr/local/lib${kdelibsuff}/X11R5   \
+    /usr/local/lib${kdelibsuff}/X11R4   \
+                                        \
+    /usr/X386/lib${kdelibsuff}          \
+    /usr/x386/lib${kdelibsuff}          \
+    /usr/XFree86/lib${kdelibsuff}/X11   \
+                                        \
+    /usr/lib${kdelibsuff}               \
+    /usr/local/lib${kdelibsuff}         \
+    /usr/unsupported/lib${kdelibsuff}   \
+    /usr/athena/lib${kdelibsuff}        \
+    /usr/local/x11r5/lib${kdelibsuff}   \
+    /usr/lpp/Xamples/lib${kdelibsuff}   \
+    /lib/usr/lib${kdelibsuff}/X11       \
+                                        \
+    /usr/openwin/lib${kdelibsuff}       \
+    /usr/openwin/share/lib${kdelibsuff} \
+    ; \
+do
+dnl Don't even attempt the hair of trying to link an X program!
+  for ac_extension in a so sl; do
+    if test -r $ac_dir/lib${x_direct_test_library}.$ac_extension; then
+      ac_x_libraries=$ac_dir
+      break 2
+    fi
+  done
+done])
+fi # $ac_x_libraries = NO
+])
+
+
+dnl ------------------------------------------------------------------------
+dnl Find a file (or one of more files in a list of dirs)
+dnl ------------------------------------------------------------------------
+dnl
+AC_DEFUN([AC_FIND_FILE],
+[
+$3=NO
+for i in $2;
+do
+  for j in $1;
+  do
+    echo "configure: __oline__: $i/$j" >&AC_FD_CC
+    if test -r "$i/$j"; then
+      echo "taking that" >&AC_FD_CC
+      $3=$i
+      break 2
+    fi
+  done
+done
+])
+
+dnl KDE_FIND_PATH(program-name, variable-name, list-of-dirs,
+dnl	if-not-found, test-parameter, prepend-path)
+dnl
+dnl Look for program-name in list-of-dirs+$PATH.
+dnl If prepend-path is set, look in $PATH+list-of-dirs instead.
+dnl If found, $variable-name is set. If not, if-not-found is evaluated.
+dnl test-parameter: if set, the program is executed with this arg,
+dnl                 and only a successful exit code is required.
+AC_DEFUN([KDE_FIND_PATH],
+[
+   AC_MSG_CHECKING([for $1])
+   if test -n "$$2"; then
+        kde_cv_path="$$2";
+   else
+        kde_cache=`echo $1 | sed 'y%./+-%__p_%'`
+
+        AC_CACHE_VAL(kde_cv_path_$kde_cache,
+        [
+        kde_cv_path="NONE"
+	kde_save_IFS=$IFS
+	IFS=':'
+	dirs=""
+	for dir in $PATH; do
+	  dirs="$dirs $dir"
+	done
+	if test -z "$6"; then  dnl Append dirs in PATH (default)
+	  dirs="$3 $dirs"
+        else  dnl Prepend dirs in PATH (if 6th arg is set)
+	  dirs="$dirs $3"
+	fi
+	IFS=$kde_save_IFS
+
+        for dir in $dirs; do
+	  if test -x "$dir/$1"; then
+	    if test -n "$5"
+	    then
+              evalstr="$dir/$1 $5 2>&1 "
+	      if eval $evalstr; then
+                kde_cv_path="$dir/$1"
+                break
+	      fi
+            else
+		kde_cv_path="$dir/$1"
+                break
+	    fi
+          fi
+        done
+
+        eval "kde_cv_path_$kde_cache=$kde_cv_path"
+
+        ])
+
+      eval "kde_cv_path=\"`echo '$kde_cv_path_'$kde_cache`\""
+
+   fi
+
+   if test -z "$kde_cv_path" || test "$kde_cv_path" = NONE; then
+      AC_MSG_RESULT(not found)
+      $4
+   else
+      AC_MSG_RESULT($kde_cv_path)
+      $2=$kde_cv_path
+
+   fi
+])
+
+AC_DEFUN([KDE_MOC_ERROR_MESSAGE],
+[
+    AC_MSG_ERROR([No Qt meta object compiler (moc) found!
+Please check whether you installed Qt correctly.
+You need to have a running moc binary.
+configure tried to run $ac_cv_path_moc and the test didn't
+succeed. If configure shouldn't have tried this one, set
+the environment variable MOC to the right one before running
+configure.
+])
+])
+
+AC_DEFUN([KDE_UIC_ERROR_MESSAGE],
+[
+    AC_MSG_WARN([No Qt ui compiler (uic) found!
+Please check whether you installed Qt correctly.
+You need to have a running uic binary.
+configure tried to run $ac_cv_path_uic and the test didn't
+succeed. If configure shouldn't have tried this one, set
+the environment variable UIC to the right one before running
+configure.
+])
+])
+
+
+AC_DEFUN([KDE_CHECK_UIC_FLAG],
+[
+    AC_MSG_CHECKING([whether uic supports -$1 ])
+    kde_cache=`echo $1 | sed 'y% .=/+-%____p_%'`
+    AC_CACHE_VAL(kde_cv_prog_uic_$kde_cache,
+    [
+        cat >conftest.ui <<EOT
+        <!DOCTYPE UI><UI version="3" stdsetdef="1"></UI>
+EOT
+        ac_uic_testrun="$UIC_PATH -$1 $2 conftest.ui >/dev/null"
+        if AC_TRY_EVAL(ac_uic_testrun); then
+            eval "kde_cv_prog_uic_$kde_cache=yes"
+        else
+            eval "kde_cv_prog_uic_$kde_cache=no"
+        fi
+        rm -f conftest*
+    ])
+
+    if eval "test \"`echo '$kde_cv_prog_uic_'$kde_cache`\" = yes"; then
+        AC_MSG_RESULT([yes])
+        :
+        $3
+    else
+        AC_MSG_RESULT([no])
+        :
+        $4
+    fi
+])
+
+
+dnl ------------------------------------------------------------------------
+dnl Find the meta object compiler and the ui compiler in the PATH,
+dnl in $QTDIR/bin, and some more usual places
+dnl ------------------------------------------------------------------------
+dnl
+AC_DEFUN([AC_PATH_QT_MOC_UIC],
+[
+   AC_REQUIRE([KDE_CHECK_PERL])
+   qt_bindirs=""
+   for dir in $kde_qt_dirs; do
+      qt_bindirs="$qt_bindirs $dir/bin $dir/src/moc"
+   done
+   qt_bindirs="$qt_bindirs /usr/bin /usr/X11R6/bin /usr/local/qt/bin"
+   if test ! "$ac_qt_bindir" = "NO"; then
+      qt_bindirs="$ac_qt_bindir $qt_bindirs"
+   fi
+
+   KDE_FIND_PATH(moc, MOC, [$qt_bindirs], [KDE_MOC_ERROR_MESSAGE])
+   if test -z "$UIC_NOT_NEEDED"; then
+     KDE_FIND_PATH(uic, UIC_PATH, [$qt_bindirs], [UIC_PATH=""])
+     if test -z "$UIC_PATH" ; then
+       KDE_UIC_ERROR_MESSAGE
+       exit 1
+     else
+       UIC=$UIC_PATH
+
+       if test $kde_qtver = 3; then
+         KDE_CHECK_UIC_FLAG(L,[/nonexistent],ac_uic_supports_libpath=yes,ac_uic_supports_libpath=no)
+         KDE_CHECK_UIC_FLAG(nounload,,ac_uic_supports_nounload=yes,ac_uic_supports_nounload=no)
+
+         if test x$ac_uic_supports_libpath = xyes; then
+             UIC="$UIC -L \$(kde_widgetdir)"
+         fi
+         if test x$ac_uic_supports_nounload = xyes; then
+             UIC="$UIC -nounload"
+         fi
+       fi
+     fi
+   else
+     UIC="echo uic not available: "
+   fi
+
+   AC_SUBST(MOC)
+   AC_SUBST(UIC)
+
+   UIC_TR="i18n"
+   if test $kde_qtver = 3; then
+     UIC_TR="tr2i18n"
+   fi
+
+   AC_SUBST(UIC_TR)
+])
+
+AC_DEFUN([KDE_1_CHECK_PATHS],
+[
+  KDE_1_CHECK_PATH_HEADERS
+
+  KDE_TEST_RPATH=
+
+  if test -n "$USE_RPATH"; then
+
+     if test -n "$kde_libraries"; then
+       KDE_TEST_RPATH="-R $kde_libraries"
+     fi
+
+     if test -n "$qt_libraries"; then
+       KDE_TEST_RPATH="$KDE_TEST_RPATH -R $qt_libraries"
+     fi
+
+     if test -n "$x_libraries"; then
+       KDE_TEST_RPATH="$KDE_TEST_RPATH -R $x_libraries"
+     fi
+
+     KDE_TEST_RPATH="$KDE_TEST_RPATH $KDE_EXTRA_RPATH"
+  fi
+
+AC_MSG_CHECKING([for KDE libraries installed])
+ac_link='$LIBTOOL_SHELL --silent --mode=link ${CXX-g++} -o conftest $CXXFLAGS $all_includes $CPPFLAGS $LDFLAGS $all_libraries conftest.$ac_ext $LIBS -lkdecore $LIBQT $KDE_TEST_RPATH 1>&5'
+
+if AC_TRY_EVAL(ac_link) && test -s conftest; then
+  AC_MSG_RESULT(yes)
+else
+  AC_MSG_ERROR([your system fails at linking a small KDE application!
+Check, if your compiler is installed correctly and if you have used the
+same compiler to compile Qt and kdelibs as you did use now.
+For more details about this problem, look at the end of config.log.])
+fi
+
+if eval `KDEDIR= ./conftest 2>&5`; then
+  kde_result=done
+else
+  kde_result=problems
+fi
+
+KDEDIR= ./conftest 2> /dev/null >&5 # make an echo for config.log
+kde_have_all_paths=yes
+
+KDE_SET_PATHS($kde_result)
+
+])
+
+AC_DEFUN([KDE_SET_PATHS],
+[
+  kde_cv_all_paths="kde_have_all_paths=\"yes\" \
+	kde_htmldir=\"$kde_htmldir\" \
+	kde_appsdir=\"$kde_appsdir\" \
+	kde_icondir=\"$kde_icondir\" \
+	kde_sounddir=\"$kde_sounddir\" \
+	kde_datadir=\"$kde_datadir\" \
+	kde_locale=\"$kde_locale\" \
+	kde_cgidir=\"$kde_cgidir\" \
+	kde_confdir=\"$kde_confdir\" \
+	kde_kcfgdir=\"$kde_kcfgdir\" \
+	kde_mimedir=\"$kde_mimedir\" \
+	kde_toolbardir=\"$kde_toolbardir\" \
+	kde_wallpaperdir=\"$kde_wallpaperdir\" \
+	kde_templatesdir=\"$kde_templatesdir\" \
+	kde_bindir=\"$kde_bindir\" \
+	kde_servicesdir=\"$kde_servicesdir\" \
+	kde_servicetypesdir=\"$kde_servicetypesdir\" \
+	kde_moduledir=\"$kde_moduledir\" \
+	kde_styledir=\"$kde_styledir\" \
+	kde_widgetdir=\"$kde_widgetdir\" \
+	xdg_appsdir=\"$xdg_appsdir\" \
+	xdg_menudir=\"$xdg_menudir\" \
+	xdg_directorydir=\"$xdg_directorydir\" \
+	kde_result=$1"
+])
+
+AC_DEFUN([KDE_SET_DEFAULT_PATHS],
+[
+if test "$1" = "default"; then
+
+  if test -z "$kde_htmldir"; then
+    kde_htmldir='\${datadir}/doc/HTML'
+  fi
+  if test -z "$kde_appsdir"; then
+    kde_appsdir='\${datadir}/applnk'
+  fi
+  if test -z "$kde_icondir"; then
+    kde_icondir='\${datadir}/icons'
+  fi
+  if test -z "$kde_sounddir"; then
+    kde_sounddir='\${datadir}/sounds'
+  fi
+  if test -z "$kde_datadir"; then
+    kde_datadir='\${datadir}/apps'
+  fi
+  if test -z "$kde_locale"; then
+    kde_locale='\${datadir}/locale'
+  fi
+  if test -z "$kde_cgidir"; then
+    kde_cgidir='\${exec_prefix}/cgi-bin'
+  fi
+  if test -z "$kde_confdir"; then
+    kde_confdir='\${datadir}/config'
+  fi
+  if test -z "$kde_kcfgdir"; then
+    kde_kcfgdir='\${datadir}/config.kcfg'
+  fi
+  if test -z "$kde_mimedir"; then
+    kde_mimedir='\${datadir}/mimelnk'
+  fi
+  if test -z "$kde_toolbardir"; then
+    kde_toolbardir='\${datadir}/toolbar'
+  fi
+  if test -z "$kde_wallpaperdir"; then
+    kde_wallpaperdir='\${datadir}/wallpapers'
+  fi
+  if test -z "$kde_templatesdir"; then
+    kde_templatesdir='\${datadir}/templates'
+  fi
+  if test -z "$kde_bindir"; then
+    kde_bindir='\${exec_prefix}/bin'
+  fi
+  if test -z "$kde_servicesdir"; then
+    kde_servicesdir='\${datadir}/services'
+  fi
+  if test -z "$kde_servicetypesdir"; then
+    kde_servicetypesdir='\${datadir}/servicetypes'
+  fi
+  if test -z "$kde_moduledir"; then
+    if test "$kde_qtver" = "2"; then
+      kde_moduledir='\${libdir}/kde2'
+    else
+      kde_moduledir='\${libdir}/kde3'
+    fi
+  fi
+  if test -z "$kde_styledir"; then
+    kde_styledir='\${libdir}/kde3/plugins/styles'
+  fi
+  if test -z "$kde_widgetdir"; then
+    kde_widgetdir='\${libdir}/kde3/plugins/designer'
+  fi
+  if test -z "$xdg_appsdir"; then
+    xdg_appsdir='\${datadir}/applications/kde'
+  fi
+  if test -z "$xdg_menudir"; then
+    xdg_menudir='\${sysconfdir}/xdg/menus'
+  fi
+  if test -z "$xdg_directorydir"; then
+    xdg_directorydir='\${datadir}/desktop-directories'
+  fi
+
+  KDE_SET_PATHS(defaults)
+
+else
+
+  if test $kde_qtver = 1; then
+     AC_MSG_RESULT([compiling])
+     KDE_1_CHECK_PATHS
+  else
+     AC_MSG_ERROR([path checking not yet supported for KDE 2])
+  fi
+
+fi
+])
+
+AC_DEFUN([KDE_CHECK_PATHS_FOR_COMPLETENESS],
+[ if test -z "$kde_htmldir" || test -z "$kde_appsdir" ||
+   test -z "$kde_icondir" || test -z "$kde_sounddir" ||
+   test -z "$kde_datadir" || test -z "$kde_locale"  ||
+   test -z "$kde_cgidir"  || test -z "$kde_confdir" ||
+   test -z "$kde_kcfgdir" ||
+   test -z "$kde_mimedir" || test -z "$kde_toolbardir" ||
+   test -z "$kde_wallpaperdir" || test -z "$kde_templatesdir" ||
+   test -z "$kde_bindir" || test -z "$kde_servicesdir" ||
+   test -z "$kde_servicetypesdir" || test -z "$kde_moduledir" ||
+   test -z "$kde_styledir" || test -z "kde_widgetdir" ||
+   test -z "$xdg_appsdir" || test -z "$xdg_menudir" || test -z "$xdg_directorydir" ||
+   test "x$kde_have_all_paths" != "xyes"; then
+     kde_have_all_paths=no
+  fi
+])
+
+AC_DEFUN([KDE_MISSING_PROG_ERROR],
+[
+    AC_MSG_ERROR([The important program $1 was not found!
+Please check whether you installed KDE correctly.
+])
+])
+
+AC_DEFUN([KDE_MISSING_ARTS_ERROR],
+[
+    AC_MSG_ERROR([The important program $1 was not found!
+Please check whether you installed aRts correctly or use
+--without-arts to compile without aRts support (this will remove functionality).
+])
+])
+
+AC_DEFUN([KDE_SET_DEFAULT_BINDIRS],
+[
+    kde_default_bindirs="/usr/bin /usr/local/bin /opt/local/bin /usr/X11R6/bin /opt/kde/bin /opt/kde3/bin /usr/kde/bin /usr/local/kde/bin"
+    test -n "$KDEDIR" && kde_default_bindirs="$KDEDIR/bin $kde_default_bindirs"
+    if test -n "$KDEDIRS"; then
+       kde_save_IFS=$IFS
+       IFS=:
+       for dir in $KDEDIRS; do
+            kde_default_bindirs="$dir/bin $kde_default_bindirs "
+       done
+       IFS=$kde_save_IFS
+    fi
+])
+
+AC_DEFUN([KDE_SUBST_PROGRAMS],
+[
+    AC_ARG_WITH(arts,
+        AC_HELP_STRING([--without-arts],[build without aRts [default=no]]),
+        [build_arts=$withval],
+        [build_arts=yes]
+    )
+    AM_CONDITIONAL(include_ARTS, test "$build_arts" '!=' "no")
+    if test "$build_arts" = "no"; then
+        AC_DEFINE(WITHOUT_ARTS, 1, [Defined if compiling without arts])
+    fi
+
+        KDE_SET_DEFAULT_BINDIRS
+        kde_default_bindirs="$exec_prefix/bin $prefix/bin $kde_libs_prefix/bin $kde_default_bindirs"
+        KDE_FIND_PATH(dcopidl, DCOPIDL, [$kde_default_bindirs], [KDE_MISSING_PROG_ERROR(dcopidl)])
+        KDE_FIND_PATH(dcopidl2cpp, DCOPIDL2CPP, [$kde_default_bindirs], [KDE_MISSING_PROG_ERROR(dcopidl2cpp)])
+        if test "$build_arts" '!=' "no"; then
+          KDE_FIND_PATH(mcopidl, MCOPIDL, [$kde_default_bindirs], [KDE_MISSING_ARTS_ERROR(mcopidl)])
+          KDE_FIND_PATH(artsc-config, ARTSCCONFIG, [$kde_default_bindirs], [KDE_MISSING_ARTS_ERROR(artsc-config)])
+        fi
+        KDE_FIND_PATH(meinproc, MEINPROC, [$kde_default_bindirs])
+
+        kde32ornewer=1
+        kde33ornewer=1
+        if test -n "$kde_qtver" && test "$kde_qtver" -lt 3; then
+            kde32ornewer=
+            kde33ornewer=
+        else
+            if test "$kde_qtver" = "3"; then
+              if test "$kde_qtsubver" -le 1; then
+                kde32ornewer=
+              fi
+              if test "$kde_qtsubver" -le 2; then
+                kde33ornewer=
+              fi
+              if test "$KDECONFIG" != "compiled"; then
+                if test `$KDECONFIG --version | grep KDE | sed 's/KDE: \(...\).*/\1/'` = 3.2; then
+                  kde33ornewer=
+                fi
+              fi
+            fi
+        fi
+
+        if test -n "$kde32ornewer"; then
+            KDE_FIND_PATH(kconfig_compiler, KCONFIG_COMPILER, [$kde_default_bindirs], [KDE_MISSING_PROG_ERROR(kconfig_compiler)])
+            KDE_FIND_PATH(dcopidlng, DCOPIDLNG, [$kde_default_bindirs], [KDE_MISSING_PROG_ERROR(dcopidlng)])
+        fi
+        if test -n "$kde33ornewer"; then
+            KDE_FIND_PATH(makekdewidgets, MAKEKDEWIDGETS, [$kde_default_bindirs], [KDE_MISSING_PROG_ERROR(makekdewidgets)])
+            AC_SUBST(MAKEKDEWIDGETS)
+        fi
+        KDE_FIND_PATH(xmllint, XMLLINT, [${prefix}/bin ${exec_prefix}/bin], [XMLLINT=""])
+
+        if test -n "$MEINPROC" -a "$MEINPROC" != "compiled"; then
+ 	    kde_sharedirs="/usr/share/kde /usr/local/share /usr/share /opt/kde3/share /opt/kde/share $prefix/share"
+            test -n "$KDEDIR" && kde_sharedirs="$KDEDIR/share $kde_sharedirs"
+            AC_FIND_FILE(apps/ksgmltools2/customization/kde-chunk.xsl, $kde_sharedirs, KDE_XSL_STYLESHEET)
+	    if test "$KDE_XSL_STYLESHEET" = "NO"; then
+		KDE_XSL_STYLESHEET=""
+	    else
+                KDE_XSL_STYLESHEET="$KDE_XSL_STYLESHEET/apps/ksgmltools2/customization/kde-chunk.xsl"
+	    fi
+        fi
+
+        DCOP_DEPENDENCIES='$(DCOPIDL)'
+        if test -n "$kde32ornewer"; then
+            KCFG_DEPENDENCIES='$(KCONFIG_COMPILER)'
+            DCOP_DEPENDENCIES='$(DCOPIDL) $(DCOPIDLNG)'
+            AC_SUBST(KCONFIG_COMPILER)
+            AC_SUBST(KCFG_DEPENDENCIES)
+            AC_SUBST(DCOPIDLNG)
+        fi
+        AC_SUBST(DCOPIDL)
+        AC_SUBST(DCOPIDL2CPP)
+        AC_SUBST(DCOP_DEPENDENCIES)
+        AC_SUBST(MCOPIDL)
+        AC_SUBST(ARTSCCONFIG)
+	AC_SUBST(MEINPROC)
+ 	AC_SUBST(KDE_XSL_STYLESHEET)
+	AC_SUBST(XMLLINT)
+])dnl
+
+AC_DEFUN([AC_CREATE_KFSSTND],
+[
+AC_REQUIRE([AC_CHECK_RPATH])
+
+AC_MSG_CHECKING([for KDE paths])
+kde_result=""
+kde_cached_paths=yes
+AC_CACHE_VAL(kde_cv_all_paths,
+[
+  KDE_SET_DEFAULT_PATHS($1)
+  kde_cached_paths=no
+])
+eval "$kde_cv_all_paths"
+KDE_CHECK_PATHS_FOR_COMPLETENESS
+if test "$kde_have_all_paths" = "no" && test "$kde_cached_paths" = "yes"; then
+  # wrong values were cached, may be, we can set better ones
+  kde_result=
+  kde_htmldir= kde_appsdir= kde_icondir= kde_sounddir=
+  kde_datadir= kde_locale=  kde_cgidir=  kde_confdir= kde_kcfgdir=
+  kde_mimedir= kde_toolbardir= kde_wallpaperdir= kde_templatesdir=
+  kde_bindir= kde_servicesdir= kde_servicetypesdir= kde_moduledir=
+  kde_have_all_paths=
+  kde_styledir=
+  kde_widgetdir=
+  xdg_appsdir = xdg_menudir= xdg_directorydir= 
+  KDE_SET_DEFAULT_PATHS($1)
+  eval "$kde_cv_all_paths"
+  KDE_CHECK_PATHS_FOR_COMPLETENESS
+  kde_result="$kde_result (cache overridden)"
+fi
+if test "$kde_have_all_paths" = "no"; then
+  AC_MSG_ERROR([configure could not run a little KDE program to test the environment.
+Since it had compiled and linked before, it must be a strange problem on your system.
+Look at config.log for details. If you are not able to fix this, look at
+http://www.kde.org/faq/installation.html or any www.kde.org mirror.
+(If you're using an egcs version on Linux, you may update binutils!)
+])
+else
+  rm -f conftest*
+  AC_MSG_RESULT($kde_result)
+fi
+
+bindir=$kde_bindir
+
+KDE_SUBST_PROGRAMS
+
+])
+
+AC_DEFUN([AC_SUBST_KFSSTND],
+[
+AC_SUBST(kde_htmldir)
+AC_SUBST(kde_appsdir)
+AC_SUBST(kde_icondir)
+AC_SUBST(kde_sounddir)
+AC_SUBST(kde_datadir)
+AC_SUBST(kde_locale)
+AC_SUBST(kde_confdir)
+AC_SUBST(kde_kcfgdir)
+AC_SUBST(kde_mimedir)
+AC_SUBST(kde_wallpaperdir)
+AC_SUBST(kde_bindir)
+dnl X Desktop Group standards
+AC_SUBST(xdg_appsdir)
+AC_SUBST(xdg_menudir)
+AC_SUBST(xdg_directorydir)
+dnl for KDE 2
+AC_SUBST(kde_templatesdir)
+AC_SUBST(kde_servicesdir)
+AC_SUBST(kde_servicetypesdir)
+AC_SUBST(kde_moduledir)
+AC_SUBST(kdeinitdir, '$(kde_moduledir)')
+AC_SUBST(kde_styledir)
+AC_SUBST(kde_widgetdir)
+if test "$kde_qtver" = 1; then
+  kde_minidir="$kde_icondir/mini"
+else
+# for KDE 1 - this breaks KDE2 apps using minidir, but
+# that's the plan ;-/
+  kde_minidir="/dev/null"
+fi
+dnl AC_SUBST(kde_minidir)
+dnl AC_SUBST(kde_cgidir)
+dnl AC_SUBST(kde_toolbardir)
+])
+
+AC_DEFUN([KDE_MISC_TESTS],
+[
+   dnl Checks for libraries.
+   AC_CHECK_LIB(util, main, [LIBUTIL="-lutil"]) dnl for *BSD 
+   AC_SUBST(LIBUTIL)
+   AC_CHECK_LIB(compat, main, [LIBCOMPAT="-lcompat"]) dnl for *BSD
+   AC_SUBST(LIBCOMPAT)
+   kde_have_crypt=
+   AC_CHECK_LIB(crypt, crypt, [LIBCRYPT="-lcrypt"; kde_have_crypt=yes],
+      AC_CHECK_LIB(c, crypt, [kde_have_crypt=yes], [
+        AC_MSG_WARN([you have no crypt in either libcrypt or libc.
+You should install libcrypt from another source or configure with PAM
+support])
+	kde_have_crypt=no
+      ]))
+   AC_SUBST(LIBCRYPT)
+   if test $kde_have_crypt = yes; then
+      AC_DEFINE_UNQUOTED(HAVE_CRYPT, 1, [Defines if your system has the crypt function])
+   fi
+   AC_CHECK_SOCKLEN_T
+   AC_CHECK_LIB(dnet, dnet_ntoa, [X_EXTRA_LIBS="$X_EXTRA_LIBS -ldnet"])
+   if test $ac_cv_lib_dnet_dnet_ntoa = no; then
+      AC_CHECK_LIB(dnet_stub, dnet_ntoa,
+        [X_EXTRA_LIBS="$X_EXTRA_LIBS -ldnet_stub"])
+   fi
+   AC_CHECK_FUNC(inet_ntoa)
+   if test $ac_cv_func_inet_ntoa = no; then
+     AC_CHECK_LIB(nsl, inet_ntoa, X_EXTRA_LIBS="$X_EXTRA_LIBS -lnsl")
+   fi
+   AC_CHECK_FUNC(connect)
+   if test $ac_cv_func_connect = no; then
+      AC_CHECK_LIB(socket, connect, X_EXTRA_LIBS="-lsocket $X_EXTRA_LIBS", ,
+        $X_EXTRA_LIBS)
+   fi
+
+   AC_CHECK_FUNC(remove)
+   if test $ac_cv_func_remove = no; then
+      AC_CHECK_LIB(posix, remove, X_EXTRA_LIBS="$X_EXTRA_LIBS -lposix")
+   fi
+
+   # BSDI BSD/OS 2.1 needs -lipc for XOpenDisplay.
+   AC_CHECK_FUNC(shmat, ,
+     AC_CHECK_LIB(ipc, shmat, X_EXTRA_LIBS="$X_EXTRA_LIBS -lipc"))
+   
+   # more headers that need to be explicitly included on darwin
+   AC_CHECK_HEADERS(sys/types.h stdint.h)
+
+   # sys/bitypes.h is needed for uint32_t and friends on Tru64
+   AC_CHECK_HEADERS(sys/bitypes.h)
+
+   # darwin requires a poll emulation library
+   AC_CHECK_LIB(poll, poll, LIB_POLL="-lpoll")
+
+   # for some image handling on Mac OS X
+   AC_CHECK_HEADERS(Carbon/Carbon.h)
+
+   # CoreAudio framework
+   AC_CHECK_HEADER(CoreAudio/CoreAudio.h, [
+     AC_DEFINE(HAVE_COREAUDIO, 1, [Define if you have the CoreAudio API])
+     FRAMEWORK_COREAUDIO="-Wl,-framework,CoreAudio"
+   ])
+
+   AC_CHECK_RES_INIT
+   AC_SUBST(LIB_POLL)
+   AC_SUBST(FRAMEWORK_COREAUDIO)
+   LIBSOCKET="$X_EXTRA_LIBS"
+   AC_SUBST(LIBSOCKET)
+   AC_SUBST(X_EXTRA_LIBS)
+   AC_CHECK_LIB(ucb, killpg, [LIBUCB="-lucb"]) dnl for Solaris2.4
+   AC_SUBST(LIBUCB)
+
+   case $host in  dnl this *is* LynxOS specific
+   *-*-lynxos* )
+        AC_MSG_CHECKING([LynxOS header file wrappers])
+        [CFLAGS="$CFLAGS -D__NO_INCLUDE_WARN__"]
+        AC_MSG_RESULT(disabled)
+        AC_CHECK_LIB(bsd, gethostbyname, [LIBSOCKET="-lbsd"]) dnl for LynxOS
+         ;;
+    esac
+
+   KDE_CHECK_TYPES
+   KDE_CHECK_LIBDL
+   KDE_CHECK_STRLCPY
+   KDE_CHECK_PIE_SUPPORT
+
+# darwin needs this to initialize the environment
+AC_CHECK_HEADERS(crt_externs.h)
+AC_CHECK_FUNC(_NSGetEnviron, [AC_DEFINE(HAVE_NSGETENVIRON, 1, [Define if your system needs _NSGetEnviron to set up the environment])])
+ 
+AH_VERBATIM(_DARWIN_ENVIRON,
+[
+#if defined(HAVE_NSGETENVIRON) && defined(HAVE_CRT_EXTERNS_H)
+# include <sys/time.h>
+# include <crt_externs.h>
+# define environ (*_NSGetEnviron())
+#endif
+])
+
+AH_VERBATIM(_AIX_STRINGS_H_BZERO,
+[
+/*
+ * AIX defines FD_SET in terms of bzero, but fails to include <strings.h>
+ * that defines bzero.
+ */
+
+#if defined(_AIX)
+#include <strings.h>
+#endif
+])
+
+AC_CHECK_FUNCS([vsnprintf snprintf])
+
+AH_VERBATIM(_TRU64,[
+/*
+ * On HP-UX, the declaration of vsnprintf() is needed every time !
+ */
+
+#if !defined(HAVE_VSNPRINTF) || defined(hpux)
+#if __STDC__
+#include <stdarg.h>
+#include <stdlib.h>
+#else
+#include <varargs.h>
+#endif
+#ifdef __cplusplus
+extern "C"
+#endif
+int vsnprintf(char *str, size_t n, char const *fmt, va_list ap);
+#ifdef __cplusplus
+extern "C"
+#endif
+int snprintf(char *str, size_t n, char const *fmt, ...);
+#endif
+])
+
+])
+
+dnl ------------------------------------------------------------------------
+dnl Find the header files and libraries for X-Windows. Extended the
+dnl macro AC_PATH_X
+dnl ------------------------------------------------------------------------
+dnl
+AC_DEFUN([K_PATH_X],
+[
+AC_REQUIRE([KDE_MISC_TESTS])dnl
+AC_REQUIRE([KDE_CHECK_LIB64])
+
+AC_ARG_ENABLE(
+  embedded,
+  AC_HELP_STRING([--enable-embedded],[link to Qt-embedded, don't use X]),
+  kde_use_qt_emb=$enableval,
+  kde_use_qt_emb=no
+)
+
+AC_ARG_ENABLE(
+  qtopia,
+  AC_HELP_STRING([--enable-qtopia],[link to Qt-embedded, link to the Qtopia Environment]),
+  kde_use_qt_emb_palm=$enableval,
+  kde_use_qt_emb_palm=no
+)
+
+AC_ARG_ENABLE(
+  mac,
+  AC_HELP_STRING([--enable-mac],[link to Qt/Mac (don't use X)]),
+  kde_use_qt_mac=$enableval,
+  kde_use_qt_mac=no
+)
+
+# used to disable x11-specific stuff on special platforms
+AM_CONDITIONAL(include_x11, test "$kde_use_qt_emb" = "no" && test "$kde_use_qt_mac" = "no")
+
+if test "$kde_use_qt_emb" = "no" && test "$kde_use_qt_mac" = "no"; then
+
+AC_MSG_CHECKING(for X)
+
+AC_CACHE_VAL(kde_cv_have_x,
+[# One or both of the vars are not set, and there is no cached value.
+if test "{$x_includes+set}" = set || test "$x_includes" = NONE; then
+   kde_x_includes=NO
+else
+   kde_x_includes=$x_includes
+fi
+if test "{$x_libraries+set}" = set || test "$x_libraries" = NONE; then
+   kde_x_libraries=NO
+else
+   kde_x_libraries=$x_libraries
+fi
+
+# below we use the standard autoconf calls
+ac_x_libraries=$kde_x_libraries
+ac_x_includes=$kde_x_includes
+
+KDE_PATH_X_DIRECT
+dnl AC_PATH_X_XMKMF picks /usr/lib as the path for the X libraries.
+dnl Unfortunately, if compiling with the N32 ABI, this is not the correct
+dnl location. The correct location is /usr/lib32 or an undefined value
+dnl (the linker is smart enough to pick the correct default library).
+dnl Things work just fine if you use just AC_PATH_X_DIRECT.
+dnl Solaris has a similar problem. AC_PATH_X_XMKMF forces x_includes to
+dnl /usr/openwin/include, which doesn't work. /usr/include does work, so
+dnl x_includes should be left alone.
+case "$host" in
+mips-sgi-irix6*)
+  ;;
+*-*-solaris*)
+  ;;
+*)
+  _AC_PATH_X_XMKMF
+  if test -z "$ac_x_includes"; then
+    ac_x_includes="."
+  fi
+  if test -z "$ac_x_libraries"; then
+    ac_x_libraries="/usr/lib${kdelibsuff}"
+  fi
+esac
+#from now on we use our own again
+
+# when the user already gave --x-includes, we ignore
+# what the standard autoconf macros told us.
+if test "$kde_x_includes" = NO; then
+  kde_x_includes=$ac_x_includes
+fi
+
+# for --x-libraries too
+if test "$kde_x_libraries" = NO; then
+  kde_x_libraries=$ac_x_libraries
+fi
+
+if test "$kde_x_includes" = NO; then
+  AC_MSG_ERROR([Can't find X includes. Please check your installation and add the correct paths!])
+fi
+
+if test "$kde_x_libraries" = NO; then
+  AC_MSG_ERROR([Can't find X libraries. Please check your installation and add the correct paths!])
+fi
+
+# Record where we found X for the cache.
+kde_cv_have_x="have_x=yes \
+         kde_x_includes=$kde_x_includes kde_x_libraries=$kde_x_libraries"
+])dnl
+
+eval "$kde_cv_have_x"
+
+if test "$have_x" != yes; then
+  AC_MSG_RESULT($have_x)
+  no_x=yes
+else
+  AC_MSG_RESULT([libraries $kde_x_libraries, headers $kde_x_includes])
+fi
+
+if test -z "$kde_x_includes" || test "x$kde_x_includes" = xNONE; then
+  X_INCLUDES=""
+  x_includes="."; dnl better than nothing :-
+ else
+  x_includes=$kde_x_includes
+  X_INCLUDES="-I$x_includes"
+fi
+
+if test -z "$kde_x_libraries" || test "x$kde_x_libraries" = xNONE; then
+  X_LDFLAGS=""
+  x_libraries="/usr/lib"; dnl better than nothing :-
+ else
+  x_libraries=$kde_x_libraries
+  X_LDFLAGS="-L$x_libraries"
+fi
+all_includes="$X_INCLUDES"
+all_libraries="$X_LDFLAGS $LDFLAGS_AS_NEEDED $LDFLAGS_NEW_DTAGS"
+
+# Check for libraries that X11R6 Xt/Xaw programs need.
+ac_save_LDFLAGS="$LDFLAGS"
+LDFLAGS="$LDFLAGS $X_LDFLAGS"
+# SM needs ICE to (dynamically) link under SunOS 4.x (so we have to
+# check for ICE first), but we must link in the order -lSM -lICE or
+# we get undefined symbols.  So assume we have SM if we have ICE.
+# These have to be linked with before -lX11, unlike the other
+# libraries we check for below, so use a different variable.
+#  --interran@uluru.Stanford.EDU, kb@cs.umb.edu.
+AC_CHECK_LIB(ICE, IceConnectionNumber,
+  [LIBSM="-lSM -lICE"], , $X_EXTRA_LIBS)
+LDFLAGS="$ac_save_LDFLAGS"
+
+LIB_X11='-lX11 $(LIBSOCKET)'
+
+AC_MSG_CHECKING(for libXext)
+AC_CACHE_VAL(kde_cv_have_libXext,
+[
+kde_ldflags_safe="$LDFLAGS"
+kde_libs_safe="$LIBS"
+
+LDFLAGS="$LDFLAGS $X_LDFLAGS $USER_LDFLAGS"
+LIBS="-lXext -lX11 $LIBSOCKET"
+
+AC_TRY_LINK([
+#include <stdio.h>
+#ifdef STDC_HEADERS
+# include <stdlib.h>
+#endif
+],
+[
+printf("hello Xext\n");
+],
+kde_cv_have_libXext=yes,
+kde_cv_have_libXext=no
+)
+
+LDFLAGS=$kde_ldflags_safe
+LIBS=$kde_libs_safe
+])
+
+AC_MSG_RESULT($kde_cv_have_libXext)
+
+if test "$kde_cv_have_libXext" = "no"; then
+  AC_MSG_ERROR([We need a working libXext to proceed. Since configure
+can't find it itself, we stop here assuming that make wouldn't find
+them either.])
+fi
+
+LIB_XEXT="-lXext"
+QTE_NORTTI=""
+
+elif test "$kde_use_qt_emb" = "yes"; then
+  dnl We're using QT Embedded
+  CPPFLAGS=-DQWS
+  CXXFLAGS="$CXXFLAGS -fno-rtti"
+  QTE_NORTTI="-fno-rtti -DQWS"
+  X_PRE_LIBS=""
+  LIB_X11=""
+  LIB_XEXT=""
+  LIB_XRENDER=""
+  LIBSM=""
+  X_INCLUDES=""
+  X_LDFLAGS=""
+  x_includes=""
+  x_libraries=""
+elif test "$kde_use_qt_mac" = "yes"; then
+  dnl We're using QT/Mac (I use QT_MAC so that qglobal.h doesn't *have* to
+  dnl be included to get the information) --Sam
+  CXXFLAGS="$CXXFLAGS -DQT_MAC -no-cpp-precomp"
+  CFLAGS="$CFLAGS -DQT_MAC -no-cpp-precomp"
+  X_PRE_LIBS=""
+  LIB_X11=""
+  LIB_XEXT=""
+  LIB_XRENDER=""
+  LIBSM=""
+  X_INCLUDES=""
+  X_LDFLAGS=""
+  x_includes=""
+  x_libraries=""
+fi
+AC_SUBST(X_PRE_LIBS)
+AC_SUBST(LIB_X11)
+AC_SUBST(LIB_XRENDER)
+AC_SUBST(LIBSM)
+AC_SUBST(X_INCLUDES)
+AC_SUBST(X_LDFLAGS)
+AC_SUBST(x_includes)
+AC_SUBST(x_libraries)
+AC_SUBST(QTE_NORTTI)
+AC_SUBST(LIB_XEXT)
+
+])
+
+AC_DEFUN([KDE_PRINT_QT_PROGRAM],
+[
+AC_REQUIRE([KDE_USE_QT])
+cat > conftest.$ac_ext <<EOF
+#include "confdefs.h"
+#include <qglobal.h>
+#include <qapplication.h>
+EOF
+if test "$kde_qtver" = "2"; then
+cat >> conftest.$ac_ext <<EOF
+#include <qevent.h>
+#include <qstring.h>
+#include <qstyle.h>
+EOF
+
+if test $kde_qtsubver -gt 0; then
+cat >> conftest.$ac_ext <<EOF
+#if QT_VERSION < 210
+#error 1
+#endif
+EOF
+fi
+fi
+
+if test "$kde_qtver" = "3"; then
+cat >> conftest.$ac_ext <<EOF
+#include <qcursor.h>
+#include <qstylefactory.h>
+#include <private/qucomextra_p.h>
+EOF
+fi
+
+echo "#if ! ($kde_qt_verstring)" >> conftest.$ac_ext
+cat >> conftest.$ac_ext <<EOF
+#error 1
+#endif
+
+int main() {
+EOF
+if test "$kde_qtver" = "2"; then
+cat >> conftest.$ac_ext <<EOF
+    QStringList *t = new QStringList();
+    Q_UNUSED(t);
+EOF
+if test $kde_qtsubver -gt 0; then
+cat >> conftest.$ac_ext <<EOF
+    QString s;
+    s.setLatin1("Elvis is alive", 14);
+EOF
+fi
+fi
+if test "$kde_qtver" = "3"; then
+cat >> conftest.$ac_ext <<EOF
+    (void)QStyleFactory::create(QString::null);
+    QCursor c(Qt::WhatsThisCursor);
+EOF
+fi
+cat >> conftest.$ac_ext <<EOF
+    return 0;
+}
+EOF
+])
+
+AC_DEFUN([KDE_USE_QT],
+[
+if test -z "$1"; then
+  # Current default Qt version: 3.3
+  kde_qtver=3
+  kde_qtsubver=3
+else
+  kde_qtsubver=`echo "$1" | sed -e 's#[0-9][0-9]*\.\([0-9][0-9]*\).*#\1#'`
+  # following is the check if subversion isnt found in passed argument
+  if test "$kde_qtsubver" = "$1"; then
+    kde_qtsubver=1
+  fi
+  kde_qtver=`echo "$1" | sed -e 's#^\([0-9][0-9]*\)\..*#\1#'`
+  if test "$kde_qtver" = "1"; then
+    kde_qtsubver=42
+  fi
+fi
+
+if test -z "$2"; then
+  if test "$kde_qtver" = "2"; then
+    if test $kde_qtsubver -gt 0; then
+      kde_qt_minversion=">= Qt 2.2.2"
+    else
+      kde_qt_minversion=">= Qt 2.0.2"
+    fi
+  fi
+  if test "$kde_qtver" = "3"; then
+    if test $kde_qtsubver -gt 0; then
+	 if test $kde_qtsubver -gt 1; then
+	    if test $kde_qtsubver -gt 2; then
+		kde_qt_minversion=">= Qt 3.3 and < 4.0"
+	    else
+	        kde_qt_minversion=">= Qt 3.2 and < 4.0"
+	    fi
+	 else
+            kde_qt_minversion=">= Qt 3.1 (20021021) and < 4.0"
+         fi
+    else
+      kde_qt_minversion=">= Qt 3.0 and < 4.0"
+    fi
+  fi
+  if test "$kde_qtver" = "1"; then
+    kde_qt_minversion=">= 1.42 and < 2.0"
+  fi
+else
+   kde_qt_minversion="$2"
+fi
+
+if test -z "$3"; then
+   if test $kde_qtver = 3; then
+     if test $kde_qtsubver -gt 0; then
+       kde_qt_verstring="QT_VERSION >= 0x03@VER@00 && QT_VERSION < 0x040000"
+       qtsubver=`echo "00$kde_qtsubver" | sed -e 's,.*\(..\)$,\1,'`
+       kde_qt_verstring=`echo $kde_qt_verstring | sed -e "s,@VER@,$qtsubver,"`
+     else
+       kde_qt_verstring="QT_VERSION >= 300 && QT_VERSION < 0x040000"
+     fi
+   fi
+   if test $kde_qtver = 2; then
+     if test $kde_qtsubver -gt 0; then
+       kde_qt_verstring="QT_VERSION >= 222"
+     else
+       kde_qt_verstring="QT_VERSION >= 200"
+     fi
+   fi
+   if test $kde_qtver = 1; then
+    kde_qt_verstring="QT_VERSION >= 142 && QT_VERSION < 200"
+   fi
+else
+   kde_qt_verstring="$3"
+fi
+
+if test $kde_qtver = 4; then
+  kde_qt_dirs="$QTDIR /usr/lib/qt4 /usr/lib/qt /usr/share/qt4"
+fi
+if test $kde_qtver = 3; then
+  kde_qt_dirs="$QTDIR /usr/lib/qt3 /usr/lib/qt /usr/share/qt3"
+fi
+if test $kde_qtver = 2; then
+   kde_qt_dirs="$QTDIR /usr/lib/qt2 /usr/lib/qt"
+fi
+if test $kde_qtver = 1; then
+   kde_qt_dirs="$QTDIR /usr/lib/qt"
+fi
+])
+
+AC_DEFUN([KDE_CHECK_QT_DIRECT],
+[
+AC_REQUIRE([KDE_USE_QT])
+AC_MSG_CHECKING([if Qt compiles without flags])
+AC_CACHE_VAL(kde_cv_qt_direct,
+[
+AC_LANG_SAVE
+AC_LANG_CPLUSPLUS
+ac_LD_LIBRARY_PATH_safe=$LD_LIBRARY_PATH
+ac_LIBRARY_PATH="$LIBRARY_PATH"
+ac_cxxflags_safe="$CXXFLAGS"
+ac_ldflags_safe="$LDFLAGS"
+ac_libs_safe="$LIBS"
+
+CXXFLAGS="$CXXFLAGS -I$qt_includes"
+LDFLAGS="$LDFLAGS $X_LDFLAGS"
+if test "x$kde_use_qt_emb" != "xyes" && test "x$kde_use_qt_mac" != "xyes"; then
+LIBS="$LIBQT -lXext -lX11 $LIBSOCKET"
+else
+LIBS="$LIBQT $LIBSOCKET"
+fi
+LD_LIBRARY_PATH=
+export LD_LIBRARY_PATH
+LIBRARY_PATH=
+export LIBRARY_PATH
+
+KDE_PRINT_QT_PROGRAM
+
+if AC_TRY_EVAL(ac_link) && test -s conftest; then
+  kde_cv_qt_direct="yes"
+else
+  kde_cv_qt_direct="no"
+  echo "configure: failed program was:" >&AC_FD_CC
+  cat conftest.$ac_ext >&AC_FD_CC
+fi
+
+rm -f conftest*
+CXXFLAGS="$ac_cxxflags_safe"
+LDFLAGS="$ac_ldflags_safe"
+LIBS="$ac_libs_safe"
+
+LD_LIBRARY_PATH="$ac_LD_LIBRARY_PATH_safe"
+export LD_LIBRARY_PATH
+LIBRARY_PATH="$ac_LIBRARY_PATH"
+export LIBRARY_PATH
+AC_LANG_RESTORE
+])
+
+if test "$kde_cv_qt_direct" = "yes"; then
+  AC_MSG_RESULT(yes)
+  $1
+else
+  AC_MSG_RESULT(no)
+  $2
+fi
+])
+
+dnl ------------------------------------------------------------------------
+dnl Try to find the Qt headers and libraries.
+dnl $(QT_LDFLAGS) will be -Lqtliblocation (if needed)
+dnl and $(QT_INCLUDES) will be -Iqthdrlocation (if needed)
+dnl ------------------------------------------------------------------------
+dnl
+AC_DEFUN([AC_PATH_QT_1_3],
+[
+AC_REQUIRE([K_PATH_X])
+AC_REQUIRE([KDE_USE_QT])
+AC_REQUIRE([KDE_CHECK_LIB64])
+
+dnl ------------------------------------------------------------------------
+dnl Add configure flag to enable linking to MT version of Qt library.
+dnl ------------------------------------------------------------------------
+
+AC_ARG_ENABLE(
+  mt,
+  AC_HELP_STRING([--disable-mt],[link to non-threaded Qt (deprecated)]),
+  kde_use_qt_mt=$enableval,
+  [
+    if test $kde_qtver = 3; then
+      kde_use_qt_mt=yes
+    else
+      kde_use_qt_mt=no
+    fi
+  ]
+)
+
+USING_QT_MT=""
+
+dnl ------------------------------------------------------------------------
+dnl If we not get --disable-qt-mt then adjust some vars for the host.
+dnl ------------------------------------------------------------------------
+
+KDE_MT_LDFLAGS=
+KDE_MT_LIBS=
+if test "x$kde_use_qt_mt" = "xyes"; then
+  KDE_CHECK_THREADING
+  if test "x$kde_use_threading" = "xyes"; then
+    CPPFLAGS="$USE_THREADS -DQT_THREAD_SUPPORT $CPPFLAGS"
+    KDE_MT_LDFLAGS="$USE_THREADS"
+    KDE_MT_LIBS="$LIBPTHREAD"
+  else
+    kde_use_qt_mt=no
+  fi
+fi
+AC_SUBST(KDE_MT_LDFLAGS)
+AC_SUBST(KDE_MT_LIBS)
+
+kde_qt_was_given=yes
+
+dnl ------------------------------------------------------------------------
+dnl If we haven't been told how to link to Qt, we work it out for ourselves.
+dnl ------------------------------------------------------------------------
+if test -z "$LIBQT_GLOB"; then
+  if test "x$kde_use_qt_emb" = "xyes"; then
+    LIBQT_GLOB="libqte.*"
+  else
+    LIBQT_GLOB="libqt.*"
+  fi
+fi
+
+dnl ------------------------------------------------------------
+dnl If we got --enable-embedded then adjust the Qt library name.
+dnl ------------------------------------------------------------
+if test "x$kde_use_qt_emb" = "xyes"; then
+  qtlib="qte"
+else
+  qtlib="qt"
+fi
+
+kde_int_qt="-l$qtlib"
+
+if test -z "$LIBQPE"; then
+dnl ------------------------------------------------------------
+dnl If we got --enable-palmtop then add -lqpe to the link line
+dnl ------------------------------------------------------------
+  if test "x$kde_use_qt_emb" = "xyes"; then
+    if test "x$kde_use_qt_emb_palm" = "xyes"; then
+      LIB_QPE="-lqpe"
+    else
+      LIB_QPE=""
+    fi
+  else
+    LIB_QPE=""
+  fi
+fi
+
+dnl ------------------------------------------------------------------------
+dnl If we got --enable-qt-mt then adjust the Qt library name for the host.
+dnl ------------------------------------------------------------------------
+
+if test "x$kde_use_qt_mt" = "xyes"; then
+  LIBQT="-l$qtlib-mt"
+  kde_int_qt="-l$qtlib-mt"
+  LIBQT_GLOB="lib$qtlib-mt.*"
+  USING_QT_MT="using -mt"
+else
+  LIBQT="-l$qtlib"
+fi
+
+if test $kde_qtver != 1; then
+
+  AC_REQUIRE([AC_FIND_PNG])
+  AC_REQUIRE([AC_FIND_JPEG])
+  LIBQT="$LIBQT $LIBPNG $LIBJPEG"
+fi
+
+if test $kde_qtver = 3; then
+  AC_REQUIRE([KDE_CHECK_LIBDL])
+  LIBQT="$LIBQT $LIBDL"
+fi
+
+AC_MSG_CHECKING([for Qt])
+
+if test "x$kde_use_qt_emb" != "xyes" && test "x$kde_use_qt_mac" != "xyes"; then
+LIBQT="$LIBQT $X_PRE_LIBS -lXext -lX11 $LIBSM $LIBSOCKET"
+fi
+ac_qt_includes=NO ac_qt_libraries=NO ac_qt_bindir=NO
+qt_libraries=""
+qt_includes=""
+AC_ARG_WITH(qt-dir,
+    AC_HELP_STRING([--with-qt-dir=DIR],[where the root of Qt is installed ]),
+    [  ac_qt_includes="$withval"/include
+       ac_qt_libraries="$withval"/lib${kdelibsuff}
+       ac_qt_bindir="$withval"/bin
+    ])
+
+AC_ARG_WITH(qt-includes,
+    AC_HELP_STRING([--with-qt-includes=DIR],[where the Qt includes are. ]),
+    [
+       ac_qt_includes="$withval"
+    ])
+
+kde_qt_libs_given=no
+
+AC_ARG_WITH(qt-libraries,
+    AC_HELP_STRING([--with-qt-libraries=DIR],[where the Qt library is installed.]),
+    [  ac_qt_libraries="$withval"
+       kde_qt_libs_given=yes
+    ])
+
+AC_CACHE_VAL(ac_cv_have_qt,
+[#try to guess Qt locations
+
+qt_incdirs=""
+for dir in $kde_qt_dirs; do
+   qt_incdirs="$qt_incdirs $dir/include $dir"
+done
+qt_incdirs="$QTINC $qt_incdirs /usr/local/qt/include /usr/include/qt /usr/include /usr/X11R6/include/X11/qt /usr/X11R6/include/qt /usr/X11R6/include/qt2 /usr/include/qt3 $x_includes"
+if test ! "$ac_qt_includes" = "NO"; then
+   qt_incdirs="$ac_qt_includes $qt_incdirs"
+fi
+
+if test "$kde_qtver" != "1"; then
+  kde_qt_header=qstyle.h
+else
+  kde_qt_header=qglobal.h
+fi
+
+AC_FIND_FILE($kde_qt_header, $qt_incdirs, qt_incdir)
+ac_qt_includes="$qt_incdir"
+
+qt_libdirs=""
+for dir in $kde_qt_dirs; do
+   qt_libdirs="$qt_libdirs $dir/lib${kdelibsuff} $dir"
+done
+qt_libdirs="$QTLIB $qt_libdirs /usr/X11R6/lib /usr/lib /usr/local/qt/lib $x_libraries"
+if test ! "$ac_qt_libraries" = "NO"; then
+  qt_libdir=$ac_qt_libraries
+else
+  qt_libdirs="$ac_qt_libraries $qt_libdirs"
+  # if the Qt was given, the chance is too big that libqt.* doesn't exist
+  qt_libdir=NONE
+  for dir in $qt_libdirs; do
+    try="ls -1 $dir/${LIBQT_GLOB}"
+    if test -n "`$try 2> /dev/null`"; then qt_libdir=$dir; break; else echo "tried $dir" >&AC_FD_CC ; fi
+  done
+fi
+for a in $qt_libdir/lib`echo ${kde_int_qt} | sed 's,^-l,,'`_incremental.*; do
+  if test -e "$a"; then
+    LIBQT="$LIBQT ${kde_int_qt}_incremental"
+    break
+  fi
+done
+
+ac_qt_libraries="$qt_libdir"
+
+AC_LANG_SAVE
+AC_LANG_CPLUSPLUS
+
+ac_cxxflags_safe="$CXXFLAGS"
+ac_ldflags_safe="$LDFLAGS"
+ac_libs_safe="$LIBS"
+
+CXXFLAGS="$CXXFLAGS -I$qt_incdir $all_includes"
+LDFLAGS="$LDFLAGS -L$qt_libdir $all_libraries $USER_LDFLAGS $KDE_MT_LDFLAGS"
+LIBS="$LIBS $LIBQT $KDE_MT_LIBS"
+
+KDE_PRINT_QT_PROGRAM
+
+if AC_TRY_EVAL(ac_link) && test -s conftest; then
+  rm -f conftest*
+else
+  echo "configure: failed program was:" >&AC_FD_CC
+  cat conftest.$ac_ext >&AC_FD_CC
+  ac_qt_libraries="NO"
+fi
+rm -f conftest*
+CXXFLAGS="$ac_cxxflags_safe"
+LDFLAGS="$ac_ldflags_safe"
+LIBS="$ac_libs_safe"
+
+AC_LANG_RESTORE
+if test "$ac_qt_includes" = NO || test "$ac_qt_libraries" = NO; then
+  ac_cv_have_qt="have_qt=no"
+  ac_qt_notfound=""
+  missing_qt_mt=""
+  if test "$ac_qt_includes" = NO; then
+    if test "$ac_qt_libraries" = NO; then
+      ac_qt_notfound="(headers and libraries)";
+    else
+      ac_qt_notfound="(headers)";
+    fi
+  else
+    if test "x$kde_use_qt_mt" = "xyes"; then
+       missing_qt_mt="
+Make sure that you have compiled Qt with thread support!"
+       ac_qt_notfound="(library $qtlib-mt)";
+    else
+       ac_qt_notfound="(library $qtlib)";
+    fi
+  fi
+
+  AC_MSG_ERROR([Qt ($kde_qt_minversion) $ac_qt_notfound not found. Please check your installation!
+For more details about this problem, look at the end of config.log.$missing_qt_mt])
+else
+  have_qt="yes"
+fi
+])
+
+eval "$ac_cv_have_qt"
+
+if test "$have_qt" != yes; then
+  AC_MSG_RESULT([$have_qt]);
+else
+  ac_cv_have_qt="have_qt=yes \
+    ac_qt_includes=$ac_qt_includes ac_qt_libraries=$ac_qt_libraries"
+  AC_MSG_RESULT([libraries $ac_qt_libraries, headers $ac_qt_includes $USING_QT_MT])
+
+  qt_libraries="$ac_qt_libraries"
+  qt_includes="$ac_qt_includes"
+fi
+
+if test ! "$kde_qt_libs_given" = "yes" && test ! "$kde_qtver" = 3; then
+     KDE_CHECK_QT_DIRECT(qt_libraries= ,[])
+fi
+
+AC_SUBST(qt_libraries)
+AC_SUBST(qt_includes)
+
+if test "$qt_includes" = "$x_includes" || test -z "$qt_includes"; then
+ QT_INCLUDES=""
+else
+ QT_INCLUDES="-I$qt_includes"
+ all_includes="$QT_INCLUDES $all_includes"
+fi
+
+if test "$qt_libraries" = "$x_libraries" || test -z "$qt_libraries"; then
+ QT_LDFLAGS=""
+else
+ QT_LDFLAGS="-L$qt_libraries"
+ all_libraries="$QT_LDFLAGS $all_libraries"
+fi
+test -z "$KDE_MT_LDFLAGS" || all_libraries="$all_libraries $KDE_MT_LDFLAGS"
+
+AC_SUBST(QT_INCLUDES)
+AC_SUBST(QT_LDFLAGS)
+AC_PATH_QT_MOC_UIC
+
+KDE_CHECK_QT_JPEG
+
+if test "x$kde_use_qt_emb" != "xyes" && test "x$kde_use_qt_mac" != "xyes"; then
+LIB_QT="$kde_int_qt $LIBJPEG_QT "'$(LIBZ) $(LIBPNG) -lXext $(LIB_X11) $(LIBSM)'
+else
+LIB_QT="$kde_int_qt $LIBJPEG_QT "'$(LIBZ) $(LIBPNG)'
+fi
+test -z "$KDE_MT_LIBS" || LIB_QT="$LIB_QT $KDE_MT_LIBS"
+for a in $qt_libdir/lib`echo ${kde_int_qt} | sed 's,^-l,,'`_incremental.*; do
+  if test -e "$a"; then
+     LIB_QT="$LIB_QT ${kde_int_qt}_incremental"
+     break
+  fi
+done
+
+AC_SUBST(LIB_QT)
+AC_SUBST(LIB_QPE)
+
+AC_SUBST(kde_qtver)
+])
+
+AC_DEFUN([AC_PATH_QT],
+[
+AC_PATH_QT_1_3
+])
+
+AC_DEFUN([KDE_CHECK_UIC_PLUGINS],
+[
+AC_REQUIRE([AC_PATH_QT_MOC_UIC])
+
+if test x$ac_uic_supports_libpath = xyes; then
+
+AC_MSG_CHECKING([if UIC has KDE plugins available])
+AC_CACHE_VAL(kde_cv_uic_plugins,
+[
+cat > actest.ui << EOF
+<!DOCTYPE UI><UI version="3.0" stdsetdef="1">
+<class>NewConnectionDialog</class>
+<widget class="QDialog">
+   <widget class="KLineEdit">
+        <property name="name">
+           <cstring>testInput</cstring>
+        </property>
+   </widget>
+</widget>
+</UI>
+EOF
+       
+
+
+kde_cv_uic_plugins=no
+kde_line="$UIC_PATH -L $kde_widgetdir"
+if test x$ac_uic_supports_nounload = xyes; then
+   kde_line="$kde_line -nounload"
+fi
+kde_line="$kde_line -impl actest.h actest.ui > actest.cpp"
+if AC_TRY_EVAL(kde_line); then
+	# if you're trying to debug this check and think it's incorrect,
+	# better check your installation. The check _is_ correct - your
+	# installation is not.
+	if test -f actest.cpp && grep klineedit actest.cpp > /dev/null; then
+		kde_cv_uic_plugins=yes
+	fi
+fi
+rm -f actest.ui actest.cpp
+])
+
+AC_MSG_RESULT([$kde_cv_uic_plugins])
+if test "$kde_cv_uic_plugins" != yes; then
+	AC_MSG_ERROR([
+you need to install kdelibs first.
+
+If you did install kdelibs, then the Qt version that is picked up by
+this configure is not the same version you used to compile kdelibs. 
+The Qt Plugin installed by kdelibs is *ONLY* loadable if it is the 
+_same Qt version_, compiled with the _same compiler_ and the same Qt
+configuration settings.
+])
+fi
+fi
+])
+
+AC_DEFUN([KDE_CHECK_FINAL],
+[
+  AC_ARG_ENABLE(final,
+	AC_HELP_STRING([--enable-final],
+		       [build size optimized apps (experimental - needs lots of memory)]),
+	kde_use_final=$enableval, kde_use_final=no)
+
+  if test "x$kde_use_final" = "xyes"; then
+      KDE_USE_FINAL_TRUE=""
+      KDE_USE_FINAL_FALSE="#"
+   else
+      KDE_USE_FINAL_TRUE="#"
+      KDE_USE_FINAL_FALSE=""
+  fi
+  AC_SUBST(KDE_USE_FINAL_TRUE)
+  AC_SUBST(KDE_USE_FINAL_FALSE)
+])
+
+AC_DEFUN([KDE_CHECK_CLOSURE],
+[
+  AC_ARG_ENABLE(closure,
+		AC_HELP_STRING([--enable-closure],[delay template instantiation]),
+  	kde_use_closure=$enableval, kde_use_closure=no)
+
+  KDE_NO_UNDEFINED=""
+  if test "x$kde_use_closure" = "xyes"; then
+       KDE_USE_CLOSURE_TRUE=""
+       KDE_USE_CLOSURE_FALSE="#"
+#       CXXFLAGS="$CXXFLAGS $REPO"
+  else
+       KDE_USE_CLOSURE_TRUE="#"
+       KDE_USE_CLOSURE_FALSE=""
+       KDE_NO_UNDEFINED=""
+       case $host in 
+         *-*-linux-gnu)
+           KDE_CHECK_COMPILER_FLAG([Wl,--no-undefined],
+                [KDE_CHECK_COMPILER_FLAG([Wl,--allow-shlib-undefined],
+		[KDE_NO_UNDEFINED="-Wl,--no-undefined -Wl,--allow-shlib-undefined"],
+		[KDE_NO_UNDEFINED=""])],
+	    [KDE_NO_UNDEFINED=""])
+           ;;
+       esac
+  fi
+  AC_SUBST(KDE_USE_CLOSURE_TRUE)
+  AC_SUBST(KDE_USE_CLOSURE_FALSE)
+  AC_SUBST(KDE_NO_UNDEFINED)
+])
+
+dnl Check if the linker supports --enable-new-dtags and --as-needed
+AC_DEFUN([KDE_CHECK_NEW_LDFLAGS],
+[
+  AC_ARG_ENABLE(new_ldflags,
+		AC_HELP_STRING([--enable-new-ldflags],
+		[enable the new linker flags]),
+	kde_use_new_ldflags=$enableval, 
+	kde_use_new_ldflags=no)
+
+  LDFLAGS_AS_NEEDED=""
+  LDFLAGS_NEW_DTAGS=""
+  if test "x$kde_use_new_ldflags" = "xyes"; then
+       LDFLAGS_NEW_DTAGS=""
+       KDE_CHECK_COMPILER_FLAG([Wl,--enable-new-dtags],
+		[LDFLAGS_NEW_DTAGS="-Wl,--enable-new-dtags"],)
+
+       KDE_CHECK_COMPILER_FLAG([Wl,--as-needed],
+		[LDFLAGS_AS_NEEDED="-Wl,--as-needed"],)
+  fi
+  AC_SUBST(LDFLAGS_AS_NEEDED)
+  AC_SUBST(LDFLAGS_NEW_DTAGS)
+])
+
+AC_DEFUN([KDE_CHECK_NMCHECK],
+[
+  AC_ARG_ENABLE(nmcheck,AC_HELP_STRING([--enable-nmcheck],[enable automatic namespace cleanness check]),
+	kde_use_nmcheck=$enableval, kde_use_nmcheck=no)
+
+  if test "$kde_use_nmcheck" = "yes"; then
+      KDE_USE_NMCHECK_TRUE=""
+      KDE_USE_NMCHECK_FALSE="#"
+   else
+      KDE_USE_NMCHECK_TRUE="#"
+      KDE_USE_NMCHECK_FALSE=""
+  fi
+  AC_SUBST(KDE_USE_NMCHECK_TRUE)
+  AC_SUBST(KDE_USE_NMCHECK_FALSE)
+])
+
+AC_DEFUN([KDE_EXPAND_MAKEVAR], [
+savex=$exec_prefix
+test "x$exec_prefix" = xNONE && exec_prefix=$prefix
+tmp=$$2
+while $1=`eval echo "$tmp"`; test "x$$1" != "x$tmp"; do tmp=$$1; done
+exec_prefix=$savex
+])
+
+dnl ------------------------------------------------------------------------
+dnl Now, the same with KDE
+dnl $(KDE_LDFLAGS) will be the kdeliblocation (if needed)
+dnl and $(kde_includes) will be the kdehdrlocation (if needed)
+dnl ------------------------------------------------------------------------
+dnl
+AC_DEFUN([AC_BASE_PATH_KDE],
+[
+AC_REQUIRE([KDE_CHECK_STL])
+AC_REQUIRE([AC_PATH_QT])dnl
+AC_REQUIRE([KDE_CHECK_LIB64])
+
+AC_CHECK_RPATH
+AC_MSG_CHECKING([for KDE])
+
+if test "${prefix}" != NONE; then
+  kde_includes=${includedir}
+  KDE_EXPAND_MAKEVAR(ac_kde_includes, includedir)
+
+  kde_libraries=${libdir}
+  KDE_EXPAND_MAKEVAR(ac_kde_libraries, libdir)
+
+else
+  ac_kde_includes=
+  ac_kde_libraries=
+  kde_libraries=""
+  kde_includes=""
+fi
+
+AC_CACHE_VAL(ac_cv_have_kde,
+[#try to guess kde locations
+
+if test "$kde_qtver" = 1; then
+  kde_check_header="ksock.h"
+  kde_check_lib="libkdecore.la"
+else
+  kde_check_header="ksharedptr.h"
+  kde_check_lib="libkio.la"
+fi
+
+if test -z "$1"; then
+
+kde_incdirs="$kde_libs_prefix/include /opt/kde3/include/kde /usr/lib/kde/include /usr/local/kde/include /usr/local/include /usr/kde/include /usr/include/kde /usr/include /opt/kde3/include /opt/kde/include $x_includes $qt_includes"
+test -n "$KDEDIR" && kde_incdirs="$KDEDIR/include $KDEDIR/include/kde $KDEDIR $kde_incdirs"
+kde_incdirs="$ac_kde_includes $kde_incdirs"
+AC_FIND_FILE($kde_check_header, $kde_incdirs, kde_incdir)
+ac_kde_includes="$kde_incdir"
+
+if test -n "$ac_kde_includes" && test ! -r "$ac_kde_includes/$kde_check_header"; then
+  AC_MSG_ERROR([
+in the prefix, you've chosen, are no KDE headers installed. This will fail.
+So, check this please and use another prefix!])
+fi
+
+kde_libdirs="$kde_libs_prefix/lib${kdelibsuff} /usr/lib/kde/lib${kdelibsuff} /usr/local/kde/lib${kdelibsuff} /usr/kde/lib${kdelibsuff} /usr/lib${kdelibsuff}/kde /usr/lib${kdelibsuff}/kde3 /usr/lib${kdelibsuff} /usr/X11R6/lib${kdelibsuff} /usr/local/lib${kdelibsuff} /opt/kde3/lib${kdelibsuff} /opt/kde/lib${kdelibsuff} /usr/X11R6/kde/lib${kdelibsuff}"
+test -n "$KDEDIR" && kde_libdirs="$KDEDIR/lib${kdelibsuff} $KDEDIR $kde_libdirs"
+kde_libdirs="$ac_kde_libraries $libdir $kde_libdirs"
+AC_FIND_FILE($kde_check_lib, $kde_libdirs, kde_libdir)
+ac_kde_libraries="$kde_libdir"
+
+kde_widgetdir=NO
+dnl this might be somewhere else
+AC_FIND_FILE("kde3/plugins/designer/kdewidgets.la", $kde_libdirs, kde_widgetdir)
+
+if test -n "$ac_kde_libraries" && test ! -r "$ac_kde_libraries/$kde_check_lib"; then
+AC_MSG_ERROR([
+in the prefix, you've chosen, are no KDE libraries installed. This will fail.
+So, check this please and use another prefix!])
+fi
+
+if test -n "$kde_widgetdir" && test ! -r "$kde_widgetdir/kde3/plugins/designer/kdewidgets.la"; then
+AC_MSG_ERROR([
+I can't find the designer plugins. These are required and should have been installed
+by kdelibs])
+fi
+
+if test -n "$kde_widgetdir"; then
+    kde_widgetdir="$kde_widgetdir/kde3/plugins/designer"
+fi
+
+
+if test "$ac_kde_includes" = NO || test "$ac_kde_libraries" = NO || test "$kde_widgetdir" = NO; then
+  ac_cv_have_kde="have_kde=no"
+else
+  ac_cv_have_kde="have_kde=yes \
+    ac_kde_includes=$ac_kde_includes ac_kde_libraries=$ac_kde_libraries"
+fi
+
+else dnl test -z $1, e.g. from kdelibs
+
+  ac_cv_have_kde="have_kde=no"
+
+fi
+])dnl
+
+eval "$ac_cv_have_kde"
+
+if test "$have_kde" != "yes"; then
+ if test "${prefix}" = NONE; then
+  ac_kde_prefix="$ac_default_prefix"
+ else
+  ac_kde_prefix="$prefix"
+ fi
+ if test "$exec_prefix" = NONE; then
+  ac_kde_exec_prefix="$ac_kde_prefix"
+  AC_MSG_RESULT([will be installed in $ac_kde_prefix])
+ else
+  ac_kde_exec_prefix="$exec_prefix"
+  AC_MSG_RESULT([will be installed in $ac_kde_prefix and $ac_kde_exec_prefix])
+ fi
+
+ kde_libraries="${libdir}"
+ kde_includes="${includedir}"
+
+else
+  ac_cv_have_kde="have_kde=yes \
+    ac_kde_includes=$ac_kde_includes ac_kde_libraries=$ac_kde_libraries"
+  AC_MSG_RESULT([libraries $ac_kde_libraries, headers $ac_kde_includes])
+
+  kde_libraries="$ac_kde_libraries"
+  kde_includes="$ac_kde_includes"
+fi
+AC_SUBST(kde_libraries)
+AC_SUBST(kde_includes)
+
+if test "$kde_includes" = "$x_includes" || test "$kde_includes" = "$qt_includes"  || test "$kde_includes" = "/usr/include"; then
+ KDE_INCLUDES=""
+else
+ KDE_INCLUDES="-I$kde_includes"
+ all_includes="$KDE_INCLUDES $all_includes"
+fi
+
+KDE_DEFAULT_CXXFLAGS="-DQT_CLEAN_NAMESPACE -DQT_NO_ASCII_CAST -DQT_NO_STL -DQT_NO_COMPAT -DQT_NO_TRANSLATION"
+ 
+KDE_LDFLAGS="-L$kde_libraries"
+if test ! "$kde_libraries" = "$x_libraries" && test ! "$kde_libraries" = "$qt_libraries" ; then 
+ all_libraries="$KDE_LDFLAGS $all_libraries"
+fi
+
+AC_SUBST(KDE_LDFLAGS)
+AC_SUBST(KDE_INCLUDES)
+
+AC_REQUIRE([KDE_CHECK_EXTRA_LIBS])
+
+all_libraries="$all_libraries $USER_LDFLAGS"
+all_includes="$all_includes $USER_INCLUDES"
+AC_SUBST(all_includes)
+AC_SUBST(all_libraries)
+
+if test -z "$1"; then
+KDE_CHECK_UIC_PLUGINS
+fi
+
+ac_kde_libraries="$kde_libdir"
+
+AC_SUBST(AUTODIRS)
+
+
+])
+
+AC_DEFUN([KDE_CHECK_EXTRA_LIBS],
+[
+AC_MSG_CHECKING(for extra includes)
+AC_ARG_WITH(extra-includes,AC_HELP_STRING([--with-extra-includes=DIR],[adds non standard include paths]),
+  kde_use_extra_includes="$withval",
+  kde_use_extra_includes=NONE
+)
+kde_extra_includes=
+if test -n "$kde_use_extra_includes" && \
+   test "$kde_use_extra_includes" != "NONE"; then
+
+   ac_save_ifs=$IFS
+   IFS=':'
+   for dir in $kde_use_extra_includes; do
+     kde_extra_includes="$kde_extra_includes $dir"
+     USER_INCLUDES="$USER_INCLUDES -I$dir"
+   done
+   IFS=$ac_save_ifs
+   kde_use_extra_includes="added"
+else
+   kde_use_extra_includes="no"
+fi
+AC_SUBST(USER_INCLUDES)
+
+AC_MSG_RESULT($kde_use_extra_includes)
+
+kde_extra_libs=
+AC_MSG_CHECKING(for extra libs)
+AC_ARG_WITH(extra-libs,AC_HELP_STRING([--with-extra-libs=DIR],[adds non standard library paths]),
+  kde_use_extra_libs=$withval,
+  kde_use_extra_libs=NONE
+)
+if test -n "$kde_use_extra_libs" && \
+   test "$kde_use_extra_libs" != "NONE"; then
+
+   ac_save_ifs=$IFS
+   IFS=':'
+   for dir in $kde_use_extra_libs; do
+     kde_extra_libs="$kde_extra_libs $dir"
+     KDE_EXTRA_RPATH="$KDE_EXTRA_RPATH -R $dir"
+     USER_LDFLAGS="$USER_LDFLAGS -L$dir"
+   done
+   IFS=$ac_save_ifs
+   kde_use_extra_libs="added"
+else
+   kde_use_extra_libs="no"
+fi
+
+AC_SUBST(USER_LDFLAGS)
+
+AC_MSG_RESULT($kde_use_extra_libs)
+
+])
+
+AC_DEFUN([KDE_1_CHECK_PATH_HEADERS],
+[
+    AC_MSG_CHECKING([for KDE headers installed])
+    AC_LANG_SAVE
+    AC_LANG_CPLUSPLUS
+cat > conftest.$ac_ext <<EOF
+#ifdef STDC_HEADERS
+# include <stdlib.h>
+#endif
+#include <stdio.h>
+#include "confdefs.h"
+#include <kapp.h>
+
+int main() {
+    printf("kde_htmldir=\\"%s\\"\n", KApplication::kde_htmldir().data());
+    printf("kde_appsdir=\\"%s\\"\n", KApplication::kde_appsdir().data());
+    printf("kde_icondir=\\"%s\\"\n", KApplication::kde_icondir().data());
+    printf("kde_sounddir=\\"%s\\"\n", KApplication::kde_sounddir().data());
+    printf("kde_datadir=\\"%s\\"\n", KApplication::kde_datadir().data());
+    printf("kde_locale=\\"%s\\"\n", KApplication::kde_localedir().data());
+    printf("kde_cgidir=\\"%s\\"\n", KApplication::kde_cgidir().data());
+    printf("kde_confdir=\\"%s\\"\n", KApplication::kde_configdir().data());
+    printf("kde_mimedir=\\"%s\\"\n", KApplication::kde_mimedir().data());
+    printf("kde_toolbardir=\\"%s\\"\n", KApplication::kde_toolbardir().data());
+    printf("kde_wallpaperdir=\\"%s\\"\n",
+	KApplication::kde_wallpaperdir().data());
+    printf("kde_bindir=\\"%s\\"\n", KApplication::kde_bindir().data());
+    printf("kde_partsdir=\\"%s\\"\n", KApplication::kde_partsdir().data());
+    printf("kde_servicesdir=\\"/tmp/dummy\\"\n");
+    printf("kde_servicetypesdir=\\"/tmp/dummy\\"\n");
+    printf("kde_moduledir=\\"/tmp/dummy\\"\n");
+    printf("kde_styledir=\\"/tmp/dummy\\"\n");
+    printf("kde_widgetdir=\\"/tmp/dummy\\"\n");
+    printf("xdg_appsdir=\\"/tmp/dummy\\"\n");
+    printf("xdg_menudir=\\"/tmp/dummy\\"\n");
+    printf("xdg_directorydir=\\"/tmp/dummy\\"\n");
+    printf("kde_kcfgdir=\\"/tmp/dummy\\"\n");
+    return 0;
+    }
+EOF
+
+ ac_save_CPPFLAGS=$CPPFLAGS
+ CPPFLAGS="$all_includes $CPPFLAGS"
+ if AC_TRY_EVAL(ac_compile); then
+   AC_MSG_RESULT(yes)
+ else
+   AC_MSG_ERROR([your system is not able to compile a small KDE application!
+Check, if you installed the KDE header files correctly.
+For more details about this problem, look at the end of config.log.])
+  fi
+  CPPFLAGS=$ac_save_CPPFLAGS
+
+  AC_LANG_RESTORE
+])
+
+AC_DEFUN([KDE_CHECK_KDEQTADDON],
+[
+AC_MSG_CHECKING(for kde-qt-addon)
+AC_CACHE_VAL(kde_cv_have_kdeqtaddon,
+[
+ kde_ldflags_safe="$LDFLAGS"
+ kde_libs_safe="$LIBS"
+ kde_cxxflags_safe="$CXXFLAGS"
+
+ LIBS="-lkde-qt-addon $LIBQT $LIBS"
+ CXXFLAGS="$CXXFLAGS -I$prefix/include -I$prefix/include/kde $all_includes"
+ LDFLAGS="$LDFLAGS $all_libraries $USER_LDFLAGS"
+
+ AC_TRY_LINK([
+   #include <qdom.h>
+ ],
+ [
+   QDomDocument doc;
+ ],
+  kde_cv_have_kdeqtaddon=yes,
+  kde_cv_have_kdeqtaddon=no
+ )
+
+ LDFLAGS=$kde_ldflags_safe
+ LIBS=$kde_libs_safe
+ CXXFLAGS=$kde_cxxflags_safe
+])
+
+AC_MSG_RESULT($kde_cv_have_kdeqtaddon)
+
+if test "$kde_cv_have_kdeqtaddon" = "no"; then
+  AC_MSG_ERROR([Can't find libkde-qt-addon. You need to install it first.
+It is a separate package (and CVS module) named kde-qt-addon.])
+fi
+])
+
+AC_DEFUN([KDE_CREATE_LIBS_ALIASES],
+[
+   AC_REQUIRE([KDE_MISC_TESTS])
+   AC_REQUIRE([KDE_CHECK_LIBDL])
+   AC_REQUIRE([K_PATH_X])
+
+if test $kde_qtver = 3; then
+   case $host in 
+               *cygwin*) lib_kded="-lkdeinit_kded" ;;
+               *) lib_kded="" ;;
+       esac
+   AC_SUBST(LIB_KDED, $lib_kded)
+   AC_SUBST(LIB_KDECORE, "-lkdecore")
+   AC_SUBST(LIB_KDEUI, "-lkdeui")
+   AC_SUBST(LIB_KIO, "-lkio")
+   AC_SUBST(LIB_KJS, "-lkjs")
+   AC_SUBST(LIB_SMB, "-lsmb")
+   AC_SUBST(LIB_KAB, "-lkab")
+   AC_SUBST(LIB_KABC, "-lkabc")
+   AC_SUBST(LIB_KHTML, "-lkhtml")
+   AC_SUBST(LIB_KSPELL, "-lkspell")
+   AC_SUBST(LIB_KPARTS, "-lkparts")
+   AC_SUBST(LIB_KDEPRINT, "-lkdeprint")
+   AC_SUBST(LIB_KUTILS, "-lkutils")
+   AC_SUBST(LIB_KDEPIM, "-lkdepim")
+   AC_SUBST(LIB_KIMPROXY, "-lkimproxy")
+   AC_SUBST(LIB_KNEWSTUFF, "-lknewstuff")
+   AC_SUBST(LIB_KDNSSD, "-lkdnssd")
+   AC_SUBST(LIB_KUNITTEST, "-lkunittest")
+# these are for backward compatibility
+   AC_SUBST(LIB_KSYCOCA, "-lkio")
+   AC_SUBST(LIB_KFILE, "-lkio")
+elif test $kde_qtver = 2; then
+   AC_SUBST(LIB_KDECORE, "-lkdecore")
+   AC_SUBST(LIB_KDEUI, "-lkdeui")
+   AC_SUBST(LIB_KIO, "-lkio")
+   AC_SUBST(LIB_KSYCOCA, "-lksycoca")
+   AC_SUBST(LIB_SMB, "-lsmb")
+   AC_SUBST(LIB_KFILE, "-lkfile")
+   AC_SUBST(LIB_KAB, "-lkab")
+   AC_SUBST(LIB_KHTML, "-lkhtml")
+   AC_SUBST(LIB_KSPELL, "-lkspell")
+   AC_SUBST(LIB_KPARTS, "-lkparts")
+   AC_SUBST(LIB_KDEPRINT, "-lkdeprint")
+else
+   AC_SUBST(LIB_KDECORE, "-lkdecore -lXext $(LIB_QT)")
+   AC_SUBST(LIB_KDEUI, "-lkdeui $(LIB_KDECORE)")
+   AC_SUBST(LIB_KFM, "-lkfm $(LIB_KDECORE)")
+   AC_SUBST(LIB_KFILE, "-lkfile $(LIB_KFM) $(LIB_KDEUI)")
+   AC_SUBST(LIB_KAB, "-lkab $(LIB_KIMGIO) $(LIB_KDECORE)")
+fi
+])
+
+AC_DEFUN([AC_PATH_KDE],
+[
+  AC_BASE_PATH_KDE
+  AC_ARG_ENABLE(path-check,AC_HELP_STRING([--disable-path-check],[don't try to find out, where to install]),
+  [
+  if test "$enableval" = "no";
+    then ac_use_path_checking="default"
+    else ac_use_path_checking=""
+  fi
+  ],
+  [
+  if test "$kde_qtver" = 1;
+    then ac_use_path_checking=""
+    else ac_use_path_checking="default"
+  fi
+  ]
+  )
+
+  AC_CREATE_KFSSTND($ac_use_path_checking)
+
+  AC_SUBST_KFSSTND
+  KDE_CREATE_LIBS_ALIASES
+])
+
+dnl KDE_CHECK_FUNC_EXT(<func>, [headers], [sample-use], [C prototype], [autoheader define], [call if found])
+AC_DEFUN([KDE_CHECK_FUNC_EXT],
+[
+AC_MSG_CHECKING(for $1)
+AC_CACHE_VAL(kde_cv_func_$1,
+[
+AC_LANG_SAVE
+AC_LANG_CPLUSPLUS
+save_CXXFLAGS="$CXXFLAGS"
+kde_safe_LIBS="$LIBS"
+LIBS="$LIBS $X_EXTRA_LIBS"
+if test "$GXX" = "yes"; then
+CXXFLAGS="$CXXFLAGS -pedantic-errors"
+fi
+AC_TRY_COMPILE([
+$2
+],
+[
+$3
+],
+kde_cv_func_$1=yes,
+kde_cv_func_$1=no)
+CXXFLAGS="$save_CXXFLAGS"
+LIBS="$kde_safe_LIBS"
+AC_LANG_RESTORE
+])
+
+AC_MSG_RESULT($kde_cv_func_$1)
+
+AC_MSG_CHECKING([if $1 needs custom prototype])
+AC_CACHE_VAL(kde_cv_proto_$1,
+[
+if test "x$kde_cv_func_$1" = xyes; then
+  kde_cv_proto_$1=no
+else
+  case "$1" in
+	setenv|unsetenv|usleep|random|srandom|seteuid|mkstemps|mkstemp|revoke|vsnprintf|strlcpy|strlcat)
+		kde_cv_proto_$1="yes - in libkdefakes"
+		;;
+	*)
+		kde_cv_proto_$1=unknown
+		;;
+  esac
+fi
+
+if test "x$kde_cv_proto_$1" = xunknown; then
+
+AC_LANG_SAVE
+AC_LANG_CPLUSPLUS
+  kde_safe_libs=$LIBS
+  LIBS="$LIBS $X_EXTRA_LIBS"
+  AC_TRY_LINK([
+$2
+
+extern "C" $4;
+],
+[
+$3
+],
+[ kde_cv_func_$1=yes
+  kde_cv_proto_$1=yes ],
+  [kde_cv_proto_$1="$1 unavailable"]
+)
+LIBS=$kde_safe_libs
+AC_LANG_RESTORE
+fi
+])
+AC_MSG_RESULT($kde_cv_proto_$1)
+
+if test "x$kde_cv_func_$1" = xyes; then
+  AC_DEFINE(HAVE_$5, 1, [Define if you have $1])
+  $6
+fi
+if test "x$kde_cv_proto_$1" = xno; then
+  AC_DEFINE(HAVE_$5_PROTO, 1,
+  [Define if you have the $1 prototype])
+fi
+
+AH_VERBATIM([_HAVE_$5_PROTO],
+[
+#if !defined(HAVE_$5_PROTO)
+#ifdef __cplusplus
+extern "C" {
+#endif
+$4;
+#ifdef __cplusplus
+}
+#endif
+#endif
+])
+])
+
+AC_DEFUN([AC_CHECK_SETENV],
+[
+	KDE_CHECK_FUNC_EXT(setenv, [
+#include <stdlib.h>
+], 
+		[setenv("VAR", "VALUE", 1);],
+	        [int setenv (const char *, const char *, int)],
+		[SETENV])
+])
+
+AC_DEFUN([AC_CHECK_UNSETENV],
+[
+	KDE_CHECK_FUNC_EXT(unsetenv, [
+#include <stdlib.h>
+], 
+		[unsetenv("VAR");],
+	        [void unsetenv (const char *)],
+		[UNSETENV])
+])
+
+AC_DEFUN([AC_CHECK_GETDOMAINNAME],
+[
+	KDE_CHECK_FUNC_EXT(getdomainname, [
+#include <stdlib.h>
+#include <unistd.h>
+#include <netdb.h>
+], 
+		[
+char buffer[200];
+getdomainname(buffer, 200);
+], 	
+	        [#include <sys/types.h>
+		int getdomainname (char *, size_t)],
+		[GETDOMAINNAME])
+])
+
+AC_DEFUN([AC_CHECK_GETHOSTNAME],
+[
+	KDE_CHECK_FUNC_EXT(gethostname, [
+#include <stdlib.h>
+#include <unistd.h>
+], 
+		[
+char buffer[200];
+gethostname(buffer, 200);
+], 	
+	        [int gethostname (char *, unsigned int)],
+		[GETHOSTNAME])
+])
+
+AC_DEFUN([AC_CHECK_USLEEP],
+[
+	KDE_CHECK_FUNC_EXT(usleep, [
+#include <unistd.h>
+], 
+		[
+usleep(200);
+], 	
+	        [int usleep (unsigned int)],
+		[USLEEP])
+])
+
+
+AC_DEFUN([AC_CHECK_RANDOM],
+[
+	KDE_CHECK_FUNC_EXT(random, [
+#include <stdlib.h>
+], 
+		[
+random();
+], 	
+	        [long int random(void)],
+		[RANDOM])
+
+	KDE_CHECK_FUNC_EXT(srandom, [
+#include <stdlib.h>
+], 
+		[
+srandom(27);
+], 	
+	        [void srandom(unsigned int)],
+		[SRANDOM])
+
+])
+
+AC_DEFUN([AC_CHECK_INITGROUPS],
+[
+	KDE_CHECK_FUNC_EXT(initgroups, [
+#include <sys/types.h>
+#include <unistd.h>
+#include <grp.h>
+],
+	[
+char buffer[200];
+initgroups(buffer, 27);
+],
+	[int initgroups(const char *, gid_t)],
+	[INITGROUPS])
+])
+
+AC_DEFUN([AC_CHECK_MKSTEMPS],
+[
+	KDE_CHECK_FUNC_EXT(mkstemps, [
+#include <stdlib.h>
+#include <unistd.h>
+],
+	[
+mkstemps("/tmp/aaaXXXXXX", 6);
+],
+	[int mkstemps(char *, int)],
+	[MKSTEMPS])
+])
+
+AC_DEFUN([AC_CHECK_MKSTEMP],
+[
+	KDE_CHECK_FUNC_EXT(mkstemp, [
+#include <stdlib.h>
+#include <unistd.h>
+],
+	[
+mkstemp("/tmp/aaaXXXXXX");
+],
+	[int mkstemp(char *)],
+	[MKSTEMP])
+])
+
+AC_DEFUN([AC_CHECK_MKDTEMP],
+[
+	KDE_CHECK_FUNC_EXT(mkdtemp, [
+#include <stdlib.h>
+#include <unistd.h>
+],
+	[
+mkdtemp("/tmp/aaaXXXXXX");
+],
+	[char *mkdtemp(char *)],
+	[MKDTEMP])
+])
+
+
+AC_DEFUN([AC_CHECK_RES_INIT],
+[
+  AC_MSG_CHECKING([if res_init needs -lresolv])
+  kde_libs_safe="$LIBS"
+  LIBS="$LIBS $X_EXTRA_LIBS -lresolv"
+  AC_TRY_LINK(
+    [
+#include <sys/types.h>
+#include <netinet/in.h>
+#include <arpa/nameser.h>
+#include <resolv.h>
+    ],
+    [
+      res_init(); 
+    ],
+    [
+      LIBRESOLV="-lresolv"
+      AC_MSG_RESULT(yes)
+      AC_DEFINE(HAVE_RES_INIT, 1, [Define if you have the res_init function])
+    ],
+    [ AC_MSG_RESULT(no) ]
+  )
+  LIBS=$kde_libs_safe
+  AC_SUBST(LIBRESOLV)
+
+  KDE_CHECK_FUNC_EXT(res_init,
+    [
+#include <sys/types.h>
+#include <netinet/in.h>
+#include <arpa/nameser.h>
+#include <resolv.h>
+    ],
+    [res_init()],
+    [int res_init(void)],
+    [RES_INIT])
+])
+
+AC_DEFUN([AC_CHECK_STRLCPY],
+[
+	KDE_CHECK_FUNC_EXT(strlcpy, [
+#include <string.h>
+],
+[ char buf[20];
+  strlcpy(buf, "KDE function test", sizeof(buf));
+],
+ 	[unsigned long strlcpy(char*, const char*, unsigned long)],
+	[STRLCPY])
+])
+
+AC_DEFUN([AC_CHECK_STRLCAT],
+[
+	KDE_CHECK_FUNC_EXT(strlcat, [
+#include <string.h>
+],
+[ char buf[20];
+  buf[0]='\0';
+  strlcat(buf, "KDE function test", sizeof(buf));
+],
+ 	[unsigned long strlcat(char*, const char*, unsigned long)],
+	[STRLCAT])
+])
+
+AC_DEFUN([AC_CHECK_RES_QUERY],
+[
+	KDE_CHECK_FUNC_EXT(res_query, [
+#include <sys/types.h>
+#include <netinet/in.h>
+#include <arpa/nameser.h>
+#include <resolv.h>
+#include <netdb.h>
+],
+[
+res_query(NULL, 0, 0, NULL, 0);
+],
+	[int res_query(const char *, int, int, unsigned char *, int)],
+	[RES_QUERY])
+])
+
+AC_DEFUN([AC_CHECK_DN_SKIPNAME],
+[
+	KDE_CHECK_FUNC_EXT(dn_skipname, [
+#include <sys/types.h>
+#include <netinet/in.h>
+#include <arpa/nameser.h>
+#include <resolv.h>
+],
+[
+dn_skipname (NULL, NULL);
+],
+	[int dn_skipname (unsigned char *, unsigned char *)],
+	[DN_SKIPNAME])
+])
+
+
+AC_DEFUN([AC_FIND_GIF],
+   [AC_MSG_CHECKING([for giflib])
+AC_CACHE_VAL(ac_cv_lib_gif,
+[ac_save_LIBS="$LIBS"
+if test "x$kde_use_qt_emb" != "xyes" && test "x$kde_use_qt_mac" != "xyes"; then
+LIBS="$all_libraries -lgif -lX11 $LIBSOCKET"
+else
+LIBS="$all_libraries -lgif"
+fi
+AC_TRY_LINK(dnl
+[
+#ifdef __cplusplus
+extern "C" {
+#endif
+int GifLastError(void);
+#ifdef __cplusplus
+}
+#endif
+/* We use char because int might match the return type of a gcc2
+    builtin and then its argument prototype would still apply.  */
+],
+            [return GifLastError();],
+            eval "ac_cv_lib_gif=yes",
+            eval "ac_cv_lib_gif=no")
+LIBS="$ac_save_LIBS"
+])dnl
+if eval "test \"`echo $ac_cv_lib_gif`\" = yes"; then
+  AC_MSG_RESULT(yes)
+  AC_DEFINE_UNQUOTED(HAVE_LIBGIF, 1, [Define if you have libgif])
+else
+  AC_MSG_ERROR(You need giflib30. Please install the kdesupport package)
+fi
+])
+
+AC_DEFUN([KDE_FIND_JPEG_HELPER],
+[
+AC_MSG_CHECKING([for libjpeg$2])
+AC_CACHE_VAL(ac_cv_lib_jpeg_$1,
+[
+ac_save_LIBS="$LIBS"
+LIBS="$all_libraries $USER_LDFLAGS -ljpeg$2 -lm"
+ac_save_CFLAGS="$CFLAGS"
+CFLAGS="$CFLAGS $all_includes $USER_INCLUDES"
+AC_TRY_LINK(
+[
+#ifdef __cplusplus
+extern "C" {
+#endif
+void jpeg_CreateDecompress();
+#ifdef __cplusplus
+}
+#endif
+],
+[jpeg_CreateDecompress();],
+            eval "ac_cv_lib_jpeg_$1=-ljpeg$2",
+            eval "ac_cv_lib_jpeg_$1=no")
+LIBS="$ac_save_LIBS"
+CFLAGS="$ac_save_CFLAGS"
+])
+
+if eval "test ! \"`echo $ac_cv_lib_jpeg_$1`\" = no"; then
+  LIBJPEG="$ac_cv_lib_jpeg_$1"
+  AC_MSG_RESULT($ac_cv_lib_jpeg_$1)
+else
+  AC_MSG_RESULT(no)
+  $3
+fi
+
+])
+
+AC_DEFUN([AC_FIND_JPEG],
+[
+dnl first look for libraries
+KDE_FIND_JPEG_HELPER(6b, 6b,
+   KDE_FIND_JPEG_HELPER(normal, [],
+    [
+       LIBJPEG=
+    ]
+   )
+)
+
+dnl then search the headers (can't use simply AC_TRY_xxx, as jpeglib.h
+dnl requires system dependent includes loaded before it)
+jpeg_incdirs="$includedir /usr/include /usr/local/include $kde_extra_includes"
+AC_FIND_FILE(jpeglib.h, $jpeg_incdirs, jpeg_incdir)
+test "x$jpeg_incdir" = xNO && jpeg_incdir=
+
+dnl if headers _and_ libraries are missing, this is no error, and we
+dnl continue with a warning (the user will get no jpeg support in khtml)
+dnl if only one is missing, it means a configuration error, but we still
+dnl only warn
+if test -n "$jpeg_incdir" && test -n "$LIBJPEG" ; then
+  AC_DEFINE_UNQUOTED(HAVE_LIBJPEG, 1, [Define if you have libjpeg])
+else
+  if test -n "$jpeg_incdir" || test -n "$LIBJPEG" ; then
+    AC_MSG_WARN([
+There is an installation error in jpeg support. You seem to have only one
+of either the headers _or_ the libraries installed. You may need to either
+provide correct --with-extra-... options, or the development package of
+libjpeg6b. You can get a source package of libjpeg from http://www.ijg.org/
+Disabling JPEG support.
+])
+  else
+    AC_MSG_WARN([libjpeg not found. disable JPEG support.])
+  fi
+  jpeg_incdir=
+  LIBJPEG=
+fi
+
+AC_SUBST(LIBJPEG)
+AH_VERBATIM(_AC_CHECK_JPEG,
+[/*
+ * jpeg.h needs HAVE_BOOLEAN, when the system uses boolean in system
+ * headers and I'm too lazy to write a configure test as long as only
+ * unixware is related
+ */
+#ifdef _UNIXWARE
+#define HAVE_BOOLEAN
+#endif
+])
+])
+
+AC_DEFUN([KDE_CHECK_QT_JPEG],
+[
+if test -n "$LIBJPEG"; then
+AC_MSG_CHECKING([if Qt needs $LIBJPEG])
+AC_CACHE_VAL(kde_cv_qt_jpeg,
+[
+AC_LANG_SAVE
+AC_LANG_CPLUSPLUS
+ac_save_LIBS="$LIBS"
+LIBS="$all_libraries $USER_LDFLAGS $LIBQT"
+LIBS=`echo $LIBS | sed "s/$LIBJPEG//"`
+ac_save_CXXFLAGS="$CXXFLAGS"
+CXXFLAGS="$CXXFLAGS $all_includes $USER_INCLUDES"
+AC_TRY_LINK(
+[#include <qapplication.h>],
+            [
+            int argc;
+            char** argv;
+            QApplication app(argc, argv);],
+            eval "kde_cv_qt_jpeg=no",
+            eval "kde_cv_qt_jpeg=yes")
+LIBS="$ac_save_LIBS"
+CXXFLAGS="$ac_save_CXXFLAGS"
+AC_LANG_RESTORE
+fi
+])
+
+if eval "test ! \"`echo $kde_cv_qt_jpeg`\" = no"; then
+  AC_MSG_RESULT(yes)
+  LIBJPEG_QT='$(LIBJPEG)'
+else
+  AC_MSG_RESULT(no)
+  LIBJPEG_QT=
+fi
+
+])
+
+AC_DEFUN([AC_FIND_ZLIB],
+[
+AC_REQUIRE([KDE_CHECK_EXTRA_LIBS])
+AC_MSG_CHECKING([for libz])
+AC_CACHE_VAL(ac_cv_lib_z,
+[
+kde_save_LIBS="$LIBS"
+LIBS="$all_libraries $USER_LDFLAGS -lz $LIBSOCKET"
+kde_save_CFLAGS="$CFLAGS"
+CFLAGS="$CFLAGS $all_includes $USER_INCLUDES"
+AC_TRY_LINK(dnl
+[
+#include<zlib.h>
+],
+[
+  char buf[42];
+  gzFile f = (gzFile) 0;
+  /* this would segfault.. but we only link, don't run */
+  (void) gzgets(f, buf, sizeof(buf));
+
+  return (zlibVersion() == ZLIB_VERSION); 
+],
+            eval "ac_cv_lib_z='-lz'",
+            eval "ac_cv_lib_z=no")
+LIBS="$kde_save_LIBS"
+CFLAGS="$kde_save_CFLAGS"
+])dnl
+if test ! "$ac_cv_lib_z" = no; then
+  AC_DEFINE_UNQUOTED(HAVE_LIBZ, 1, [Define if you have libz])
+  LIBZ="$ac_cv_lib_z"
+  AC_MSG_RESULT($ac_cv_lib_z)
+else
+  AC_MSG_ERROR(not found. 
+          Possibly configure picks up an outdated version
+          installed by XFree86. Remove it from your system.
+
+          Check your installation and look into config.log)
+  LIBZ=""
+fi
+AC_SUBST(LIBZ)
+])
+
+AC_DEFUN([KDE_TRY_TIFFLIB],
+[
+AC_MSG_CHECKING([for libtiff $1])
+
+AC_CACHE_VAL(kde_cv_libtiff_$1,
+[
+AC_LANG_SAVE
+AC_LANG_CPLUSPLUS
+kde_save_LIBS="$LIBS"
+if test "x$kde_use_qt_emb" != "xyes" && test "x$kde_use_qt_mac" != "xyes"; then
+LIBS="$all_libraries $USER_LDFLAGS -l$1 $LIBJPEG $LIBZ -lX11 $LIBSOCKET -lm"
+else
+LIBS="$all_libraries $USER_LDFLAGS -l$1 $LIBJPEG $LIBZ -lm"
+fi
+kde_save_CXXFLAGS="$CXXFLAGS"
+CXXFLAGS="$CXXFLAGS $all_includes $USER_INCLUDES"
+
+AC_TRY_LINK(dnl
+[
+#include<tiffio.h>
+],
+    [return (TIFFOpen( "", "r") == 0); ],
+[
+    kde_cv_libtiff_$1="-l$1 $LIBJPEG $LIBZ"
+], [
+    kde_cv_libtiff_$1=no
+])
+
+LIBS="$kde_save_LIBS"
+CXXFLAGS="$kde_save_CXXFLAGS"
+AC_LANG_RESTORE
+])
+
+if test "$kde_cv_libtiff_$1" = "no"; then
+    AC_MSG_RESULT(no)
+    LIBTIFF=""
+    $3
+else
+    LIBTIFF="$kde_cv_libtiff_$1"
+    AC_MSG_RESULT(yes)
+    AC_DEFINE_UNQUOTED(HAVE_LIBTIFF, 1, [Define if you have libtiff])
+    $2
+fi
+
+])
+
+AC_DEFUN([AC_FIND_TIFF],
+[
+AC_REQUIRE([K_PATH_X])
+AC_REQUIRE([AC_FIND_ZLIB])
+AC_REQUIRE([AC_FIND_JPEG])
+AC_REQUIRE([KDE_CHECK_EXTRA_LIBS])
+
+KDE_TRY_TIFFLIB(tiff, [],
+   KDE_TRY_TIFFLIB(tiff34))
+
+AC_SUBST(LIBTIFF)
+])
+
+AC_DEFUN([KDE_FIND_LIBEXR],
+[
+AC_REQUIRE([KDE_CHECK_EXTRA_LIBS])
+AC_REQUIRE([AC_FIND_ZLIB])
+AC_CACHE_VAL(ac_cv_libexr,
+[
+  if test -z "$PKG_CONFIG"; then
+    AC_PATH_PROG(PKG_CONFIG, pkg-config, no)
+  fi
+
+  AC_MSG_CHECKING([for OpenEXR libraries])
+
+  if test "$PKG_CONFIG" = "no" ; then
+     AC_MSG_RESULT(no)
+     echo "*** The pkg-config script could not be found. Make sure it is"
+     echo "*** in your path, or set the PKG_CONFIG environment variable"
+     echo "*** to the full path to pkg-config."
+     echo "*** Or see http://www.freedesktop.org/software/pkgconfig to get pkg-config."
+  else
+     if !(`$PKG_CONFIG --exists OpenEXR`) ; then
+        AC_MSG_RESULT(no)
+        EXRSTATUS=no
+     else
+        if !(`$PKG_CONFIG --atleast-version="1.1.1" OpenEXR`) ; then
+           AC_MSG_RESULT(no)
+           EXRSTATUS=old
+        else
+           kde_save_LIBS="$LIBS"
+           LIBS="$LIBS $all_libraries $USER_LDFLAGS $LIBZ `pkg-config --libs OpenEXR`"
+           AC_LANG_SAVE
+           AC_LANG_CPLUSPLUS
+           kde_save_CXXFLAGS="$CXXFLAGS"
+           EXR_FLAGS=`$PKG_CONFIG --cflags OpenEXR`
+           CXXFLAGS="$CXXFLAGS $all_includes $USER_INCLUDES $EXR_FLAGS"
+
+           AC_TRY_LINK(dnl
+               [
+               #include <ImfRgbaFile.h>
+               ],
+               [
+               using namespace Imf;
+               RgbaInputFile file ("dummy");
+               return 0;
+               ],
+               eval "ac_cv_libexr='`pkg-config --libs OpenEXR`'",
+               eval "ac_cv_libexr=no"
+           )
+           LIBS="$kde_save_LIBS"
+           CXXFLAGS="$kde_save_CXXFLAGS"
+           AC_LANG_RESTORE
+           ])dnl
+           if eval "test ! \"`echo $ac_cv_libexr`\" = no"; then
+               AC_DEFINE_UNQUOTED(HAVE_EXR, 1, [Define if you have OpenEXR])
+               LIB_EXR="$ac_cv_libexr"
+               AC_MSG_RESULT($ac_cv_libexr)
+           else
+               AC_MSG_RESULT(no)
+               LIB_EXR=""
+           fi
+        fi
+     fi
+  fi
+  AC_SUBST(LIB_EXR)
+  AC_SUBST(EXR_FLAGS)
+])
+
+
+
+AC_DEFUN([AC_FIND_PNG],
+[
+AC_REQUIRE([KDE_CHECK_EXTRA_LIBS])
+AC_REQUIRE([AC_FIND_ZLIB])
+AC_MSG_CHECKING([for libpng])
+AC_CACHE_VAL(ac_cv_lib_png,
+[
+kde_save_LIBS="$LIBS"
+if test "x$kde_use_qt_emb" != "xyes" && test "x$kde_use_qt_mac" != "xyes"; then
+LIBS="$LIBS $all_libraries $USER_LDFLAGS -lpng $LIBZ -lm -lX11 $LIBSOCKET"
+else
+LIBS="$LIBS $all_libraries $USER_LDFLAGS -lpng $LIBZ -lm"
+fi
+kde_save_CFLAGS="$CFLAGS"
+CFLAGS="$CFLAGS $all_includes $USER_INCLUDES"
+
+AC_TRY_LINK(dnl
+    [
+    #include<png.h>
+    ],
+    [
+    png_structp png_ptr = png_create_read_struct(  /* image ptr */
+		PNG_LIBPNG_VER_STRING, 0, 0, 0 );
+    return( png_ptr != 0 );
+    ],
+    eval "ac_cv_lib_png='-lpng $LIBZ -lm'",
+    eval "ac_cv_lib_png=no"
+)
+LIBS="$kde_save_LIBS"
+CFLAGS="$kde_save_CFLAGS"
+])dnl
+if eval "test ! \"`echo $ac_cv_lib_png`\" = no"; then
+  AC_DEFINE_UNQUOTED(HAVE_LIBPNG, 1, [Define if you have libpng])
+  LIBPNG="$ac_cv_lib_png"
+  AC_SUBST(LIBPNG)
+  AC_MSG_RESULT($ac_cv_lib_png)
+else
+  AC_MSG_RESULT(no)
+  LIBPNG=""
+  AC_SUBST(LIBPNG)
+fi
+])
+
+
+AC_DEFUN([AC_FIND_JASPER],
+[
+AC_REQUIRE([KDE_CHECK_EXTRA_LIBS])
+AC_REQUIRE([AC_FIND_JPEG])
+AC_MSG_CHECKING([for jasper])
+AC_CACHE_VAL(ac_cv_jasper,
+[
+kde_save_LIBS="$LIBS"
+LIBS="$LIBS $all_libraries $USER_LDFLAGS -ljasper $LIBJPEG -lm"
+kde_save_CFLAGS="$CFLAGS"
+CFLAGS="$CFLAGS $all_includes $USER_INCLUDES"
+
+AC_TRY_LINK(dnl
+    [
+    #include<jasper/jasper.h>
+    ],
+    [
+    return( jas_init() );
+    ],
+    eval "ac_cv_jasper='-ljasper $LIBJPEG -lm'",
+    eval "ac_cv_jasper=no"
+)
+LIBS="$kde_save_LIBS"
+CFLAGS="$kde_save_CFLAGS"
+])dnl
+if eval "test ! \"`echo $ac_cv_jasper`\" = no"; then
+  AC_DEFINE_UNQUOTED(HAVE_JASPER, 1, [Define if you have jasper])
+  LIB_JASPER="$ac_cv_jasper"
+  AC_MSG_RESULT($ac_cv_jasper)
+else
+  AC_MSG_RESULT(no)
+  LIB_JASPER=""
+fi
+AC_SUBST(LIB_JASPER)
+])
+
+AC_DEFUN([AC_CHECK_BOOL],
+[
+  AC_DEFINE_UNQUOTED(HAVE_BOOL, 1, [You _must_ have bool])
+])
+
+AC_DEFUN([AC_CHECK_GNU_EXTENSIONS],
+[
+AC_MSG_CHECKING(if you need GNU extensions)
+AC_CACHE_VAL(ac_cv_gnu_extensions,
+[
+cat > conftest.c << EOF
+#include <features.h>
+
+#ifdef __GNU_LIBRARY__
+yes
+#endif
+EOF
+
+if (eval "$ac_cpp conftest.c") 2>&5 |
+  egrep "yes" >/dev/null 2>&1; then
+  rm -rf conftest*
+  ac_cv_gnu_extensions=yes
+else
+  ac_cv_gnu_extensions=no
+fi
+])
+
+AC_MSG_RESULT($ac_cv_gnu_extensions)
+if test "$ac_cv_gnu_extensions" = "yes"; then
+  AC_DEFINE_UNQUOTED(_GNU_SOURCE, 1, [Define if you need to use the GNU extensions])
+fi
+])
+
+AC_DEFUN([KDE_CHECK_COMPILER_FLAG],
+[
+AC_MSG_CHECKING([whether $CXX supports -$1])
+kde_cache=`echo $1 | sed 'y% .=/+-,%____p__%'`
+AC_CACHE_VAL(kde_cv_prog_cxx_$kde_cache,
+[
+  AC_LANG_SAVE
+  AC_LANG_CPLUSPLUS
+  save_CXXFLAGS="$CXXFLAGS"
+  CXXFLAGS="$CXXFLAGS -$1"
+  AC_TRY_LINK([],[ return 0; ], [eval "kde_cv_prog_cxx_$kde_cache=yes"], [])
+  CXXFLAGS="$save_CXXFLAGS"
+  AC_LANG_RESTORE
+])
+if eval "test \"`echo '$kde_cv_prog_cxx_'$kde_cache`\" = yes"; then
+ AC_MSG_RESULT(yes)
+ :
+ $2
+else
+ AC_MSG_RESULT(no)
+ :
+ $3
+fi
+])
+
+AC_DEFUN([KDE_CHECK_C_COMPILER_FLAG],
+[
+AC_MSG_CHECKING([whether $CC supports -$1])
+kde_cache=`echo $1 | sed 'y% .=/+-,%____p__%'`
+AC_CACHE_VAL(kde_cv_prog_cc_$kde_cache,
+[
+  AC_LANG_SAVE
+  AC_LANG_C
+  save_CFLAGS="$CFLAGS"
+  CFLAGS="$CFLAGS -$1"
+  AC_TRY_LINK([],[ return 0; ], [eval "kde_cv_prog_cc_$kde_cache=yes"], [])
+  CFLAGS="$save_CFLAGS"
+  AC_LANG_RESTORE
+])
+if eval "test \"`echo '$kde_cv_prog_cc_'$kde_cache`\" = yes"; then
+ AC_MSG_RESULT(yes)
+ :
+ $2
+else
+ AC_MSG_RESULT(no)
+ :
+ $3
+fi
+])
+
+
+dnl AC_REMOVE_FORBIDDEN removes forbidden arguments from variables
+dnl use: AC_REMOVE_FORBIDDEN(CC, [-forbid -bad-option whatever])
+dnl it's all white-space separated
+AC_DEFUN([AC_REMOVE_FORBIDDEN],
+[ __val=$$1
+  __forbid=" $2 "
+  if test -n "$__val"; then
+    __new=""
+    ac_save_IFS=$IFS
+    IFS=" 	"
+    for i in $__val; do
+      case "$__forbid" in
+        *" $i "*) AC_MSG_WARN([found forbidden $i in $1, removing it]) ;;
+	*) # Careful to not add spaces, where there were none, because otherwise
+	   # libtool gets confused, if we change e.g. CXX
+	   if test -z "$__new" ; then __new=$i ; else __new="$__new $i" ; fi ;;
+      esac
+    done
+    IFS=$ac_save_IFS
+    $1=$__new
+  fi
+])
+
+
+AC_DEFUN([KDE_CHECK_FOR_BAD_COMPILER],
+[
+  AC_MSG_CHECKING([whether $CC is blacklisted])
+
+  dnl In theory we have tu run this test against $CC and $CXX
+  dnl in C and in C++ mode, because its perfectly legal for
+  dnl the user to mix compiler versions, since C has a defined
+  dnl ABI. 
+  dnl 
+  dnl For now, we assume the user is not on crack.
+
+  AC_TRY_COMPILE([
+#ifdef __GNUC__
+#if __GNUC__ == 4 && __GNUC_MINOR__ == 0 && __GNUC_PATCHLEVEL__ == 0
+choke me
+#endif
+#endif
+], ,
+  kde_bad_compiler=no, 
+  kde_bad_compiler=yes
+)
+
+  AC_MSG_RESULT($kde_bad_compiler)
+
+if test "$kde_bad_compiler" = "yes"; then
+  AC_MSG_ERROR([
+
+This particular compiler version is blacklisted because it
+is known to miscompile KDE. Please use a newer version, or
+if that is not yet available, choose an older version. 
+
+Please do not report a bug or bother us reporting this
+configure error. We know about it, and we introduced
+it by intention to avoid untraceable bugs or crashes in KDE.
+
+])
+fi
+
+])
+
+
+AC_DEFUN([KDE_CHECK_FOR_OPT_NOINLINE_MATCH],
+[
+  AC_CACHE_CHECK([whether system headers can cope with -O2 -fno-inline],
+    kde_cv_opt_noinline_match,
+  [
+  kde_cv_opt_noinline_match=irrelevant
+  dnl if we don't use both -O2 and -fno-inline, this check is moot
+  if echo "$CFLAGS" | grep -e -O2 >/dev/null 2>/dev/null \
+     && echo "$CFLAGS" | grep -e -fno-inline >/dev/null 2>/dev/null ; then
+
+    ac_cflags_save="$CFLAGS"
+    CFLAGS="$CFLAGS -D_USE_GNU"
+
+    AC_TRY_LINK([
+  #include <string.h>
+], [  const char *pt, *et;
+  et = __extension__      ({ char __a0, __a1, __a2;       (__builtin_constant_p (  ";,"  ) && ((size_t)(const void *)((   ";,"   )+ 1) - (size_t)(const void *)(   ";,"   ) == 1)        ? ((__a0 =((__const char  *) (  ";,"  ))[0], __a0 == '\0')     ? ((void) (  pt ),((void *)0) )        : ((__a1 = ((__const char *) (  ";,"  ))[1], __a1== '\0')      ? (__extension__ (__builtin_constant_p (  __a0 ) && ( __a0 ) == '\0'   ? (char *) __rawmemchr (   pt  ,   __a0)       : strchr(   pt  ,   __a0 )))   : ((__a2 = ((__const char *) (  ";,"  ))[2], __a2 == '\0')      ? __strpbrk_c2 (  pt , __a0, __a1)      :(((__const char *) (  ";,"  ))[3] == '\0'     ? __strpbrk_c3 (  pt ,__a0, __a1, __a2): strpbrk (  pt ,   ";,"  ))))) : strpbrk (  pt ,  ";,"  )); }) ;
+],
+    kde_cv_opt_noinline_match=yes,
+    kde_cv_opt_noinline_match=no
+    )
+
+    CFLAGS="$ac_cflags_save"
+  fi
+  ])
+])
+
+
+dnl AC_VALIDIFY_CXXFLAGS checks for forbidden flags the user may have given
+AC_DEFUN([AC_VALIDIFY_CXXFLAGS],
+[dnl
+if test "x$kde_use_qt_emb" != "xyes"; then
+ AC_REMOVE_FORBIDDEN(CXX, [-fno-rtti -rpath])
+ AC_REMOVE_FORBIDDEN(CXXFLAGS, [-fno-rtti -rpath])
+else
+ AC_REMOVE_FORBIDDEN(CXX, [-rpath])
+ AC_REMOVE_FORBIDDEN(CXXFLAGS, [-rpath])
+fi
+])
+
+AC_DEFUN([AC_CHECK_COMPILERS],
+[
+  AC_ARG_ENABLE(debug,
+	        AC_HELP_STRING([--enable-debug=ARG],[enables debug symbols (yes|no|full) [default=no]]),
+  [
+    case $enableval in
+      yes)
+        kde_use_debug_code="yes"
+        kde_use_debug_define=no
+        ;;
+      full)
+        kde_use_debug_code="full"
+        kde_use_debug_define=no
+        ;;
+      *)
+        kde_use_debug_code="no"
+        kde_use_debug_define=yes
+        ;;
+    esac
+  ], 
+    [kde_use_debug_code="no"
+      kde_use_debug_define=no
+  ])
+
+  dnl Just for configure --help
+  AC_ARG_ENABLE(dummyoption,
+	        AC_HELP_STRING([--disable-debug],
+	  		       [disables debug output and debug symbols [default=no]]),
+		[],[])
+
+  AC_ARG_ENABLE(strict,
+		AC_HELP_STRING([--enable-strict],
+			      [compiles with strict compiler options (may not work!)]),
+   [
+    if test $enableval = "no"; then
+         kde_use_strict_options="no"
+       else
+         kde_use_strict_options="yes"
+    fi
+   ], [kde_use_strict_options="no"])
+
+  AC_ARG_ENABLE(warnings,AC_HELP_STRING([--disable-warnings],[disables compilation with -Wall and similar]),
+   [
+    if test $enableval = "no"; then
+         kde_use_warnings="no"
+       else
+         kde_use_warnings="yes"
+    fi
+   ], [kde_use_warnings="yes"])
+
+  dnl enable warnings for debug build
+  if test "$kde_use_debug_code" != "no"; then
+    kde_use_warnings=yes
+  fi
+
+  AC_ARG_ENABLE(profile,AC_HELP_STRING([--enable-profile],[creates profiling infos [default=no]]),
+    [kde_use_profiling=$enableval],
+    [kde_use_profiling="no"]
+  )
+
+  dnl this prevents stupid AC_PROG_CC to add "-g" to the default CFLAGS
+  CFLAGS=" $CFLAGS"
+
+  AC_PROG_CC 
+
+  AC_PROG_CPP
+
+  if test "$GCC" = "yes"; then
+    if test "$kde_use_debug_code" != "no"; then
+      if test $kde_use_debug_code = "full"; then
+        CFLAGS="-g3 -fno-inline $CFLAGS"
+      else
+        CFLAGS="-g -O2 -fno-schedule-insns -fno-inline $CFLAGS"
+      fi
+    else
+      CFLAGS="-O2 $CFLAGS"
+    fi
+  fi
+
+  if test "$kde_use_debug_define" = "yes"; then
+    CFLAGS="-DNDEBUG $CFLAGS"
+  fi
+
+
+  case "$host" in
+  *-*-sysv4.2uw*) CFLAGS="-D_UNIXWARE $CFLAGS";;
+  *-*-sysv5uw7*) CFLAGS="-D_UNIXWARE7 $CFLAGS";;
+  esac
+
+  if test -z "$LDFLAGS" && test "$kde_use_debug_code" = "no" && test "$GCC" = "yes"; then
+     LDFLAGS=""
+  fi
+
+  CXXFLAGS=" $CXXFLAGS"
+
+  AC_PROG_CXX
+
+  KDE_CHECK_FOR_BAD_COMPILER
+
+  if test "$GXX" = "yes" || test "$CXX" = "KCC"; then
+    if test "$kde_use_debug_code" != "no"; then
+      if test "$CXX" = "KCC"; then
+        CXXFLAGS="+K0 -Wall -pedantic -W -Wpointer-arith -Wwrite-strings $CXXFLAGS"
+      else
+        if test "$kde_use_debug_code" = "full"; then
+          CXXFLAGS="-g3 -fno-inline $CXXFLAGS"
+        else
+          CXXFLAGS="-g -O2 -fno-schedule-insns -fno-inline $CXXFLAGS"
+        fi
+      fi
+      KDE_CHECK_COMPILER_FLAG(fno-builtin,[CXXFLAGS="-fno-builtin $CXXFLAGS"])
+
+      dnl convenience compiler flags
+      KDE_CHECK_COMPILER_FLAG(Woverloaded-virtual, [WOVERLOADED_VIRTUAL="-Woverloaded-virtual"], [WOVERLOADED_VRITUAL=""])
+      AC_SUBST(WOVERLOADED_VIRTUAL)
+    else
+      if test "$CXX" = "KCC"; then
+        CXXFLAGS="+K3 $CXXFLAGS"
+      else
+        CXXFLAGS="-O2 $CXXFLAGS"
+      fi
+    fi
+  fi
+
+  if test "$kde_use_debug_define" = "yes"; then
+    CXXFLAGS="-DNDEBUG -DNO_DEBUG $CXXFLAGS"
+  fi  
+
+  if test "$kde_use_profiling" = "yes"; then
+    KDE_CHECK_COMPILER_FLAG(pg,
+    [
+      CFLAGS="-pg $CFLAGS"
+      CXXFLAGS="-pg $CXXFLAGS"
+    ])
+  fi
+
+  if test "$kde_use_warnings" = "yes"; then
+      if test "$GCC" = "yes"; then
+        CXXFLAGS="-Wall -W -Wpointer-arith $CXXFLAGS"
+        case $host in
+          *-*-linux-gnu)	
+            CFLAGS="-std=iso9899:1990 -W -Wall -Wchar-subscripts -Wshadow -Wpointer-arith -Wmissing-prototypes -Wwrite-strings -D_XOPEN_SOURCE=500 -D_BSD_SOURCE $CFLAGS"
+            CXXFLAGS="-ansi -D_XOPEN_SOURCE=500 -D_BSD_SOURCE -Wcast-align -Wconversion -Wchar-subscripts $CXXFLAGS"
+            KDE_CHECK_COMPILER_FLAG(Wmissing-format-attribute, [CXXFLAGS="$CXXFLAGS -Wformat-security -Wmissing-format-attribute"])
+            KDE_CHECK_C_COMPILER_FLAG(Wmissing-format-attribute, [CFLAGS="$CFLAGS -Wformat-security -Wmissing-format-attribute"])
+          ;;
+        esac
+        KDE_CHECK_COMPILER_FLAG(Wundef,[CXXFLAGS="-Wundef $CXXFLAGS"])
+        KDE_CHECK_COMPILER_FLAG(Wno-long-long,[CXXFLAGS="-Wno-long-long $CXXFLAGS"])
+        dnl ### FIXME: revert for KDE 4
+        KDE_CHECK_COMPILER_FLAG(Wno-non-virtual-dtor,[CXXFLAGS="$CXXFLAGS -Wno-non-virtual-dtor"])
+     fi
+  fi
+
+  if test "$GXX" = "yes" && test "$kde_use_strict_options" = "yes"; then
+    CXXFLAGS="-Wcast-qual -Wshadow -Wcast-align $CXXFLAGS"
+  fi
+
+  AC_ARG_ENABLE(pch,
+     AC_HELP_STRING([--enable-pch],
+                    [enables precompiled header support (currently only KCC or gcc >=3.4+unsermake) [default=no]]),
+    [ kde_use_pch=$enableval ],[ kde_use_pch=no ])
+ 
+  HAVE_GCC_VISIBILITY=0
+  AC_SUBST([HAVE_GCC_VISIBILITY])
+
+  if test "$GXX" = "yes"; then
+    gcc_no_reorder_blocks=NO
+    KDE_CHECK_COMPILER_FLAG(fno-reorder-blocks,[gcc_no_reorder_blocks=YES])
+    if test $kde_use_debug_code != "no" && \
+       test $kde_use_debug_code != "full" && \
+       test "YES" = "$gcc_no_reorder_blocks" ; then
+          CXXFLAGS="$CXXFLAGS -fno-reorder-blocks"
+          CFLAGS="$CFLAGS -fno-reorder-blocks"
+    fi
+    KDE_CHECK_COMPILER_FLAG(fno-exceptions,[CXXFLAGS="$CXXFLAGS -fno-exceptions"])
+    KDE_CHECK_COMPILER_FLAG(fno-check-new, [CXXFLAGS="$CXXFLAGS -fno-check-new"])
+    KDE_CHECK_COMPILER_FLAG(fno-common, [CXXFLAGS="$CXXFLAGS -fno-common"])
+    KDE_CHECK_COMPILER_FLAG(fexceptions, [USE_EXCEPTIONS="-fexceptions"], USE_EXCEPTIONS=	)
+    ENABLE_PERMISSIVE_FLAG="-fpermissive"
+
+    if test "$kde_use_pch" = "yes"; then
+        AC_MSG_CHECKING(whether gcc supports precompiling c header files)
+        echo >conftest.h
+        if $CC -x c-header conftest.h >/dev/null 2>/dev/null; then
+            kde_gcc_supports_pch=yes
+            AC_MSG_RESULT(yes)
+        else
+            kde_gcc_supports_pch=no
+            AC_MSG_RESULT(no)
+        fi
+        if test "$kde_gcc_supports_pch" = "yes"; then
+            AC_MSG_CHECKING(whether gcc supports precompiling c++ header files)
+            if $CXX -x c++-header conftest.h >/dev/null 2>/dev/null; then
+                kde_gcc_supports_pch=yes
+                AC_MSG_RESULT(yes)
+            else
+                kde_gcc_supports_pch=no
+                AC_MSG_RESULT(no)
+            fi
+        fi
+        rm -f conftest.h conftest.h.gch
+    fi
+
+    KDE_CHECK_FOR_OPT_NOINLINE_MATCH
+    if test "x$kde_cv_opt_noinline_match" = "xno" ; then
+       CFLAGS="`echo "$CFLAGS" | sed "s/ -fno-inline//"`"
+    fi
+  fi
+  AM_CONDITIONAL(unsermake_enable_pch, test "$kde_use_pch" = "yes" && test "$kde_gcc_supports_pch" = "yes")
+  if test "$CXX" = "KCC"; then
+    dnl unfortunately we currently cannot disable exception support in KCC
+    dnl because doing so is binary incompatible and Qt by default links with exceptions :-(
+    dnl KDE_CHECK_COMPILER_FLAG(-no_exceptions,[CXXFLAGS="$CXXFLAGS --no_exceptions"])
+    dnl KDE_CHECK_COMPILER_FLAG(-exceptions, [USE_EXCEPTIONS="--exceptions"], USE_EXCEPTIONS=	)
+
+    if test "$kde_use_pch" = "yes"; then
+      dnl TODO: support --pch-dir!
+      KDE_CHECK_COMPILER_FLAG(-pch,[CXXFLAGS="$CXXFLAGS --pch"])
+      dnl the below works (but the dir must exist), but it's
+      dnl useless for a whole package.
+      dnl The are precompiled headers for each source file, so when compiling
+      dnl from scratch, it doesn't make a difference, and they take up
+      dnl around ~5Mb _per_ sourcefile.
+      dnl KDE_CHECK_COMPILER_FLAG(-pch_dir /tmp,
+      dnl   [CXXFLAGS="$CXXFLAGS --pch_dir `pwd`/pcheaders"])
+    fi
+    dnl this flag controls inlining. by default KCC inlines in optimisation mode
+    dnl all implementations that are defined inside the class {} declaration. 
+    dnl because of templates-compatibility with broken gcc compilers, this
+    dnl can cause excessive inlining. This flag limits it to a sane level
+    KDE_CHECK_COMPILER_FLAG(-inline_keyword_space_time=6,[CXXFLAGS="$CXXFLAGS --inline_keyword_space_time=6"])
+    KDE_CHECK_COMPILER_FLAG(-inline_auto_space_time=2,[CXXFLAGS="$CXXFLAGS --inline_auto_space_time=2"])
+    KDE_CHECK_COMPILER_FLAG(-inline_implicit_space_time=2.0,[CXXFLAGS="$CXXFLAGS --inline_implicit_space_time=2.0"])
+    KDE_CHECK_COMPILER_FLAG(-inline_generated_space_time=2.0,[CXXFLAGS="$CXXFLAGS --inline_generated_space_time=2.0"])
+    dnl Some source files are shared between multiple executables
+    dnl (or libraries) and some of those need template instantiations.
+    dnl In that case KCC needs to compile those sources with
+    dnl --one_instantiation_per_object.  To make it easy for us we compile
+    dnl _all_ objects with that flag (--one_per is a shorthand).
+    KDE_CHECK_COMPILER_FLAG(-one_per, [CXXFLAGS="$CXXFLAGS --one_per"])
+  fi
+  AC_SUBST(USE_EXCEPTIONS)
+  dnl obsolete macro - provided to keep things going
+  USE_RTTI=
+  AC_SUBST(USE_RTTI)
+
+  case "$host" in
+      *-*-irix*)  test "$GXX" = yes && CXXFLAGS="-D_LANGUAGE_C_PLUS_PLUS -D__LANGUAGE_C_PLUS_PLUS $CXXFLAGS" ;;
+      *-*-sysv4.2uw*) CXXFLAGS="-D_UNIXWARE $CXXFLAGS";;
+      *-*-sysv5uw7*) CXXFLAGS="-D_UNIXWARE7 $CXXFLAGS";;
+      *-*-solaris*) 
+        if test "$GXX" = yes; then
+          libstdcpp=`$CXX -print-file-name=libstdc++.so`
+          if test ! -f $libstdcpp; then
+             AC_MSG_ERROR([You've compiled gcc without --enable-shared. This doesn't work with KDE. Please recompile gcc with --enable-shared to receive a libstdc++.so])
+          fi
+        fi
+        ;;
+  esac
+
+  AC_VALIDIFY_CXXFLAGS
+
+  AC_PROG_CXXCPP
+
+  if test "$GCC" = yes; then
+     NOOPT_CFLAGS=-O0
+  fi
+  KDE_CHECK_COMPILER_FLAG(O0,[NOOPT_CXXFLAGS=-O0])
+
+  AC_ARG_ENABLE(coverage,
+    AC_HELP_STRING([--enable-coverage],[use gcc coverage testing]), [
+      if test "$am_cv_CC_dependencies_compiler_type" = "gcc3"; then
+        ac_coverage_compiler="-fprofile-arcs -ftest-coverage"
+        ac_coverage_linker="-lgcc"
+      elif test "$am_cv_CC_dependencies_compiler_type" = "gcc"; then
+        ac_coverage_compiler="-fprofile-arcs -ftest-coverage"
+        ac_coverage_linker=""
+      else
+        AC_MSG_ERROR([coverage with your compiler is not supported])
+      fi
+      CFLAGS="$CFLAGS $ac_coverage_compiler"
+      CXXFLAGS="$CXXFLAGS $ac_coverage_compiler"
+      LDFLAGS="$LDFLAGS $ac_coverage_linker"
+    ])
+
+  AC_SUBST(NOOPT_CXXFLAGS)
+  AC_SUBST(NOOPT_CFLAGS)
+  AC_SUBST(ENABLE_PERMISSIVE_FLAG)
+
+  KDE_CHECK_NEW_LDFLAGS
+  KDE_CHECK_FINAL
+  KDE_CHECK_CLOSURE
+  KDE_CHECK_NMCHECK
+
+  ifdef([AM_DEPENDENCIES], AC_REQUIRE([KDE_ADD_DEPENDENCIES]), [])
+])
+
+AC_DEFUN([KDE_CHECK_VISIBILITY_GCC_BUG],
+  [
+    AC_CACHE_CHECK([for gcc -fvisibility-inlines-hidden bug], kde_cv_val_gcc_visibility_bug,
+      [
+        AC_LANG_SAVE
+        AC_LANG_CPLUSPLUS
+
+        safe_CXXFLAGS=$CXXFLAGS
+        safe_LDFLAGS=$LDFLAGS
+        CXXFLAGS="$CXXFLAGS -fPIC -fvisibility-inlines-hidden -O0"
+        LDFLAGS="$LDFLAGS -shared -fPIC"
+
+        AC_TRY_LINK(
+        [
+          /* http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19664 */
+	  #include <string>
+          int some_function( void ) __attribute__ ((visibility("default")));
+          int some_function( void )
+          {
+	    std::string s("blafasel");
+            return 0;
+          }
+        ], [/* elvis is alive */],
+        kde_cv_val_gcc_visibility_bug=no, kde_cv_val_gcc_visibility_bug=yes)
+
+        CXXFLAGS=$safe_CXXFLAGS
+        LDFLAGS=$safe_LDFLAGS
+        AC_LANG_RESTORE
+      ]
+    )
+
+    if test x$kde_cv_val_gcc_visibility_bug = xno; then
+      CXXFLAGS="$CXXFLAGS -fvisibility-inlines-hidden"
+    fi
+  ]
+)
+
+AC_DEFUN([KDE_ENABLE_HIDDEN_VISIBILITY],
+[
+  AC_BEFORE([AC_PATH_QT_1_3], [KDE_ENABLE_HIDDEN_VISIBILITY])
+
+  AC_MSG_CHECKING([grepping for visibility push/pop in headers])
+
+  if test "x$GXX" = "xyes"; then
+    AC_LANG_SAVE
+    AC_LANG_CPLUSPLUS
+    AC_EGREP_CPP(
+       [GCC visibility push],
+       [ #include <exception> 
+       ], 
+    [
+      AC_MSG_RESULT(yes)
+      kde_stdc_visibility_patched=yes ],
+    [ 
+      AC_MSG_RESULT(no)
+      AC_MSG_WARN([Your libstdc++ doesn't appear to be patched for 
+                   visibility support. Disabling -fvisibility=hidden])
+
+      kde_stdc_visibility_patched=no ])
+
+    AC_LANG_RESTORE
+
+    kde_have_gcc_visibility=no
+    KDE_CHECK_COMPILER_FLAG(fvisibility=hidden, 
+    [
+      kde_have_gcc_visibility=yes
+      dnl the whole toolchain is just a mess, gcc is just too buggy
+      dnl to handle STL with visibility enabled. Lets reconsider 
+      dnl when gcc 4.2 is out or when things get fixed in the compiler.
+      dnl Contact mueller@kde.org for details.
+      AC_ARG_ENABLE(gcc-hidden-visibility,
+        AC_HELP_STRING([--enable-gcc-hidden-visibility],[toolchain hidden visibility [default=no]]),
+          [kde_have_gcc_visibility=$enableval],
+          [kde_have_gcc_visibility=no])
+
+      AC_CACHE_CHECK([if Qt is patched for -fvisibility], kde_cv_val_qt_gcc_visibility_patched,
+        [
+          AC_LANG_SAVE
+          AC_LANG_CPLUSPLUS
+
+          safe_CXXFLAGS=$CXXFLAGS
+          CXXFLAGS="$CXXFLAGS $all_includes"
+
+          AC_TRY_COMPILE(
+          [
+#include <qglobal.h>
+#if Q_EXPORT - 0 != 0
+/* if this compiles, then Q_EXPORT is undefined */
+/* if Q_EXPORT is nonempty, this will break compilation */
+#endif
+          ], [/* elvis is alive */],
+          kde_cv_val_qt_gcc_visibility_patched=no, kde_cv_val_qt_gcc_visibility_patched=yes)
+
+          CXXFLAGS=$safe_CXXFLAGS
+          AC_LANG_RESTORE
+        ]
+      )
+
+      if test x$kde_have_gcc_visibility = "xyes" && test x$kde_stdc_visibility_patched = "xyes" && test x$kde_cv_val_qt_gcc_visibility_patched = "xyes"; then
+        CXXFLAGS="$CXXFLAGS -fvisibility=hidden"
+        KDE_CHECK_VISIBILITY_GCC_BUG
+        HAVE_GCC_VISIBILITY=1
+        AC_DEFINE_UNQUOTED(__KDE_HAVE_GCC_VISIBILITY, "$HAVE_GCC_VISIBILITY", [define to 1 if -fvisibility is supported])
+      fi
+    ])
+  fi
+])
+
+AC_DEFUN([KDE_ADD_DEPENDENCIES],
+[
+   [A]M_DEPENDENCIES(CC)
+   [A]M_DEPENDENCIES(CXX)
+])
+
+dnl just a wrapper to clean up configure.in
+AC_DEFUN([KDE_PROG_LIBTOOL],
+[
+AC_REQUIRE([AC_CHECK_COMPILERS])
+AC_REQUIRE([AC_ENABLE_SHARED])
+AC_REQUIRE([AC_ENABLE_STATIC])
+
+AC_REQUIRE([AC_LIBTOOL_DLOPEN])
+AC_REQUIRE([KDE_CHECK_LIB64])
+
+AC_OBJEXT
+AC_EXEEXT
+
+AM_PROG_LIBTOOL
+AC_LIBTOOL_CXX
+
+LIBTOOL_SHELL="/bin/sh ./libtool"
+#  LIBTOOL="$LIBTOOL --silent"
+KDE_PLUGIN="-avoid-version -module -no-undefined \$(KDE_NO_UNDEFINED) \$(KDE_RPATH) \$(KDE_MT_LDFLAGS)"
+AC_SUBST(KDE_PLUGIN)
+
+# This hack ensures that libtool creates shared libs for kunittest plugins. By default check_LTLIBRARIES makes static libs.
+KDE_CHECK_PLUGIN="\$(KDE_PLUGIN) -rpath \$(libdir)"
+AC_SUBST(KDE_CHECK_PLUGIN)
+
+# we patch configure quite some so we better keep that consistent for incremental runs 
+AC_SUBST(AUTOCONF,'$(SHELL) $(top_srcdir)/admin/cvs.sh configure || touch configure')
+])
+
+AC_DEFUN([KDE_CHECK_LIB64],
+[
+    kdelibsuff="$kde_libs_suffix"
+    if test -z "$kdelibsuff"; then
+       kdelibsuff="no"
+    fi
+    AC_ARG_ENABLE(libsuffix,
+        AC_HELP_STRING([--enable-libsuffix],
+            [/lib directory suffix (64,32,none,auto[=default])]),
+            kdelibsuff=$enableval)
+    
+    if test "$kdelibsuff" = "auto"; then
+    
+cat > conftest.c << EOF
+#include <stdio.h>
+int main() {
+ return 0;
+}
+EOF
+        kdelibsuff=`$CC conftest.c -o conftest.out; ldd conftest.out |sed -ne '/libc.so/{
+    s,.*/lib\([[^\/]]*\)/.*,\1, 
+    p 
+}'`
+	rm -rf conftest.*
+    fi	
+	
+    if test "$kdelibsuff" = "no" || test "$kdelibsuff" = "none"; then
+       kdelibsuff=
+    fi
+    if test -z "$kdelibsuff"; then
+        AC_MSG_RESULT([not using lib directory suffix])
+        AC_DEFINE(KDELIBSUFF, [""], Suffix for lib directories)
+    else
+        if test "$libdir" = '${exec_prefix}/lib'; then
+            libdir="$libdir${kdelibsuff}"
+            AC_SUBST([libdir], ["$libdir"])  dnl ugly hack for lib64 platforms
+        fi
+        AC_DEFINE_UNQUOTED(KDELIBSUFF, ["${kdelibsuff}"], Suffix for lib directories)
+        AC_MSG_RESULT([using lib directory suffix $kdelibsuff])
+    fi
+])
+
+AC_DEFUN([KDE_CHECK_TYPES],
+[  AC_CHECK_SIZEOF(int, 4)dnl
+   AC_CHECK_SIZEOF(short)dnl
+  AC_CHECK_SIZEOF(long, 4)dnl
+  AC_CHECK_SIZEOF(char *, 4)dnl
+])dnl
+
+dnl Not used - kept for compat only?
+AC_DEFUN([KDE_DO_IT_ALL],
+[
+AC_CANONICAL_SYSTEM
+AC_ARG_PROGRAM
+AM_INIT_AUTOMAKE($1, $2)
+AM_DISABLE_LIBRARIES
+AC_PREFIX_DEFAULT(${KDEDIR:-/usr/local/kde})
+AC_CHECK_COMPILERS
+KDE_PROG_LIBTOOL
+AM_KDE_WITH_NLS
+AC_PATH_KDE
+])
+
+AC_DEFUN([AC_CHECK_RPATH],
+[
+AC_MSG_CHECKING(for rpath)
+AC_ARG_ENABLE(rpath,
+      AC_HELP_STRING([--disable-rpath],[do not use the rpath feature of ld]),
+      USE_RPATH=$enableval, USE_RPATH=yes)
+
+if test -z "$KDE_RPATH" && test "$USE_RPATH" = "yes"; then
+
+  KDE_RPATH="-R \$(libdir)"
+
+  if test "$kde_libraries" != "$libdir"; then
+      KDE_RPATH="$KDE_RPATH -R \$(kde_libraries)"
+  fi
+
+  if test -n "$qt_libraries"; then
+    KDE_RPATH="$KDE_RPATH -R \$(qt_libraries)"
+  fi
+  dnl $x_libraries is set to /usr/lib in case
+  if test -n "$X_LDFLAGS"; then
+    X_RPATH="-R \$(x_libraries)"
+    KDE_RPATH="$KDE_RPATH $X_RPATH"
+  fi
+  if test -n "$KDE_EXTRA_RPATH"; then
+    KDE_RPATH="$KDE_RPATH \$(KDE_EXTRA_RPATH)"
+  fi
+fi
+AC_SUBST(KDE_EXTRA_RPATH)
+AC_SUBST(KDE_RPATH)
+AC_SUBST(X_RPATH)
+AC_MSG_RESULT($USE_RPATH)
+])
+
+dnl Check for the type of the third argument of getsockname
+AC_DEFUN([AC_CHECK_SOCKLEN_T],
+[
+   AC_MSG_CHECKING(for socklen_t)
+   AC_CACHE_VAL(kde_cv_socklen_t,
+   [
+      AC_LANG_PUSH(C++)
+      kde_cv_socklen_t=no
+      AC_TRY_COMPILE([
+         #include <sys/types.h>
+         #include <sys/socket.h>
+      ],
+      [
+         socklen_t len;
+         getpeername(0,0,&len);
+      ],
+      [
+         kde_cv_socklen_t=yes
+         kde_cv_socklen_t_equiv=socklen_t
+      ])
+      AC_LANG_POP(C++)
+   ])
+   AC_MSG_RESULT($kde_cv_socklen_t)
+   if test $kde_cv_socklen_t = no; then
+      AC_MSG_CHECKING([for socklen_t equivalent for socket functions])
+      AC_CACHE_VAL(kde_cv_socklen_t_equiv,
+      [
+         kde_cv_socklen_t_equiv=int
+         AC_LANG_PUSH(C++)
+         for t in int size_t unsigned long "unsigned long"; do
+            AC_TRY_COMPILE([
+               #include <sys/types.h>
+               #include <sys/socket.h>
+            ],
+            [
+               $t len;
+               getpeername(0,0,&len);
+            ],
+            [
+               kde_cv_socklen_t_equiv="$t"
+               break
+            ])
+         done
+         AC_LANG_POP(C++)
+      ])
+      AC_MSG_RESULT($kde_cv_socklen_t_equiv)
+   fi
+   AC_DEFINE_UNQUOTED(kde_socklen_t, $kde_cv_socklen_t_equiv,
+                     [type to use in place of socklen_t if not defined])
+   AC_DEFINE_UNQUOTED(ksize_t, $kde_cv_socklen_t_equiv,
+                     [type to use in place of socklen_t if not defined (deprecated, use kde_socklen_t)])
+])
+
+dnl This is a merge of some macros out of the gettext aclocal.m4
+dnl since we don't need anything, I took the things we need
+dnl the copyright for them is:
+dnl >
+dnl Copyright (C) 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
+dnl This Makefile.in is free software; the Free Software Foundation
+dnl gives unlimited permission to copy and/or distribute it,
+dnl with or without modifications, as long as this notice is preserved.
+
+dnl This program is distributed in the hope that it will be useful,
+dnl but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+dnl even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+dnl PARTICULAR PURPOSE.
+dnl >
+dnl for this file it is relicensed under LGPL
+
+AC_DEFUN([AM_KDE_WITH_NLS],
+  [
+    dnl If we use NLS figure out what method
+
+    AM_PATH_PROG_WITH_TEST_KDE(MSGFMT, msgfmt,
+        [test -n "`$ac_dir/$ac_word --version 2>&1 | grep 'GNU gettext'`"], msgfmt)
+    AC_PATH_PROG(GMSGFMT, gmsgfmt, $MSGFMT)
+
+     if test -z "`$GMSGFMT --version 2>&1 | grep 'GNU gettext'`"; then
+        AC_MSG_RESULT([found msgfmt program is not GNU msgfmt; ignore it])
+        GMSGFMT=":"
+      fi
+      MSGFMT=$GMSGFMT
+      AC_SUBST(GMSGFMT)
+      AC_SUBST(MSGFMT)
+
+      AM_PATH_PROG_WITH_TEST_KDE(XGETTEXT, xgettext,
+	[test -z "`$ac_dir/$ac_word -h 2>&1 | grep '(HELP)'`"], :)
+
+      dnl Test whether we really found GNU xgettext.
+      if test "$XGETTEXT" != ":"; then
+	dnl If it is no GNU xgettext we define it as : so that the
+	dnl Makefiles still can work.
+	if $XGETTEXT --omit-header /dev/null 2> /dev/null; then
+	  : ;
+	else
+	  AC_MSG_RESULT(
+	    [found xgettext programs is not GNU xgettext; ignore it])
+	  XGETTEXT=":"
+	fi
+      fi
+     AC_SUBST(XGETTEXT)
+
+  ])
+
+# Search path for a program which passes the given test.
+# Ulrich Drepper <drepper@cygnus.com>, 1996.
+
+# serial 1
+# Stephan Kulow: I appended a _KDE against name conflicts
+
+dnl AM_PATH_PROG_WITH_TEST_KDE(VARIABLE, PROG-TO-CHECK-FOR,
+dnl   TEST-PERFORMED-ON-FOUND_PROGRAM [, VALUE-IF-NOT-FOUND [, PATH]])
+AC_DEFUN([AM_PATH_PROG_WITH_TEST_KDE],
+[# Extract the first word of "$2", so it can be a program name with args.
+set dummy $2; ac_word=[$]2
+AC_MSG_CHECKING([for $ac_word])
+AC_CACHE_VAL(ac_cv_path_$1,
+[case "[$]$1" in
+  /*)
+  ac_cv_path_$1="[$]$1" # Let the user override the test with a path.
+  ;;
+  *)
+  IFS="${IFS= 	}"; ac_save_ifs="$IFS"; IFS="${IFS}:"
+  for ac_dir in ifelse([$5], , $PATH, [$5]); do
+    test -z "$ac_dir" && ac_dir=.
+    if test -f $ac_dir/$ac_word; then
+      if [$3]; then
+	ac_cv_path_$1="$ac_dir/$ac_word"
+	break
+      fi
+    fi
+  done
+  IFS="$ac_save_ifs"
+dnl If no 4th arg is given, leave the cache variable unset,
+dnl so AC_PATH_PROGS will keep looking.
+ifelse([$4], , , [  test -z "[$]ac_cv_path_$1" && ac_cv_path_$1="$4"
+])dnl
+  ;;
+esac])dnl
+$1="$ac_cv_path_$1"
+if test -n "[$]$1"; then
+  AC_MSG_RESULT([$]$1)
+else
+  AC_MSG_RESULT(no)
+fi
+AC_SUBST($1)dnl
+])
+
+
+# Check whether LC_MESSAGES is available in <locale.h>.
+# Ulrich Drepper <drepper@cygnus.com>, 1995.
+
+# serial 1
+
+AC_DEFUN([AM_LC_MESSAGES],
+  [if test $ac_cv_header_locale_h = yes; then
+    AC_CACHE_CHECK([for LC_MESSAGES], am_cv_val_LC_MESSAGES,
+      [AC_TRY_LINK([#include <locale.h>], [return LC_MESSAGES],
+       am_cv_val_LC_MESSAGES=yes, am_cv_val_LC_MESSAGES=no)])
+    if test $am_cv_val_LC_MESSAGES = yes; then
+      AC_DEFINE(HAVE_LC_MESSAGES, 1, [Define if your locale.h file contains LC_MESSAGES])
+    fi
+  fi])
+
+dnl From Jim Meyering.
+dnl FIXME: migrate into libit.
+
+AC_DEFUN([AM_FUNC_OBSTACK],
+[AC_CACHE_CHECK([for obstacks], am_cv_func_obstack,
+ [AC_TRY_LINK([#include "obstack.h"],
+	      [struct obstack *mem;obstack_free(mem,(char *) 0)],
+	      am_cv_func_obstack=yes,
+	      am_cv_func_obstack=no)])
+ if test $am_cv_func_obstack = yes; then
+   AC_DEFINE(HAVE_OBSTACK)
+ else
+   LIBOBJS="$LIBOBJS obstack.o"
+ fi
+])
+
+dnl From Jim Meyering.  Use this if you use the GNU error.[ch].
+dnl FIXME: Migrate into libit
+
+AC_DEFUN([AM_FUNC_ERROR_AT_LINE],
+[AC_CACHE_CHECK([for error_at_line], am_cv_lib_error_at_line,
+ [AC_TRY_LINK([],[error_at_line(0, 0, "", 0, "");],
+              am_cv_lib_error_at_line=yes,
+	      am_cv_lib_error_at_line=no)])
+ if test $am_cv_lib_error_at_line = no; then
+   LIBOBJS="$LIBOBJS error.o"
+ fi
+ AC_SUBST(LIBOBJS)dnl
+])
+
+# Macro to add for using GNU gettext.
+# Ulrich Drepper <drepper@cygnus.com>, 1995.
+
+# serial 1
+# Stephan Kulow: I put a KDE in it to avoid name conflicts
+
+AC_DEFUN([AM_KDE_GNU_GETTEXT],
+  [AC_REQUIRE([AC_PROG_MAKE_SET])dnl
+   AC_REQUIRE([AC_PROG_RANLIB])dnl
+   AC_REQUIRE([AC_HEADER_STDC])dnl
+   AC_REQUIRE([AC_TYPE_OFF_T])dnl
+   AC_REQUIRE([AC_TYPE_SIZE_T])dnl
+   AC_REQUIRE([AC_FUNC_ALLOCA])dnl
+   AC_REQUIRE([AC_FUNC_MMAP])dnl
+   AC_REQUIRE([AM_KDE_WITH_NLS])dnl
+   AC_CHECK_HEADERS([limits.h locale.h nl_types.h string.h values.h alloca.h])
+   AC_CHECK_FUNCS([getcwd munmap putenv setlocale strchr strcasecmp \
+__argz_count __argz_stringify __argz_next])
+
+   AC_MSG_CHECKING(for stpcpy)
+   AC_CACHE_VAL(kde_cv_func_stpcpy,
+   [
+   kde_safe_cxxflags=$CXXFLAGS
+   CXXFLAGS="-Werror"
+   AC_LANG_SAVE
+   AC_LANG_CPLUSPLUS
+   AC_TRY_COMPILE([
+   #include <string.h>
+   ],
+   [
+   char buffer[200];
+   stpcpy(buffer, buffer);
+   ],
+   kde_cv_func_stpcpy=yes,
+   kde_cv_func_stpcpy=no)
+   AC_LANG_RESTORE
+   CXXFLAGS=$kde_safe_cxxflags
+   ])
+   AC_MSG_RESULT($kde_cv_func_stpcpy)
+   if eval "test \"`echo $kde_cv_func_stpcpy`\" = yes"; then
+     AC_DEFINE(HAVE_STPCPY, 1, [Define if you have stpcpy])
+   fi
+
+   AM_LC_MESSAGES
+
+   if test "x$CATOBJEXT" != "x"; then
+     if test "x$ALL_LINGUAS" = "x"; then
+       LINGUAS=
+     else
+       AC_MSG_CHECKING(for catalogs to be installed)
+       NEW_LINGUAS=
+       for lang in ${LINGUAS=$ALL_LINGUAS}; do
+         case "$ALL_LINGUAS" in
+          *$lang*) NEW_LINGUAS="$NEW_LINGUAS $lang" ;;
+         esac
+       done
+       LINGUAS=$NEW_LINGUAS
+       AC_MSG_RESULT($LINGUAS)
+     fi
+
+     dnl Construct list of names of catalog files to be constructed.
+     if test -n "$LINGUAS"; then
+       for lang in $LINGUAS; do CATALOGS="$CATALOGS $lang$CATOBJEXT"; done
+     fi
+   fi
+
+  ])
+
+AC_DEFUN([AC_HAVE_XPM],
+ [AC_REQUIRE_CPP()dnl
+  AC_REQUIRE([KDE_CHECK_EXTRA_LIBS])
+
+ test -z "$XPM_LDFLAGS" && XPM_LDFLAGS=
+ test -z "$XPM_INCLUDE" && XPM_INCLUDE=
+
+ AC_ARG_WITH(xpm,AC_HELP_STRING([--without-xpm],[disable color pixmap XPM tests]),
+	xpm_test=$withval, xpm_test="yes")
+ if test "x$xpm_test" = xno; then
+   ac_cv_have_xpm=no
+ else
+   AC_MSG_CHECKING(for XPM)
+   AC_CACHE_VAL(ac_cv_have_xpm,
+   [
+    ac_save_ldflags="$LDFLAGS"
+    ac_save_cflags="$CFLAGS"
+    if test "x$kde_use_qt_emb" != "xyes" && test "x$kde_use_qt_mac" != "xyes"; then
+      LDFLAGS="$LDFLAGS $X_LDFLAGS $USER_LDFLAGS $LDFLAGS $XPM_LDFLAGS $all_libraries -lXpm -lX11 -lXext $LIBZ $LIBSOCKET"
+    else
+      LDFLAGS="$LDFLAGS $X_LDFLAGS $USER_LDFLAGS $LDFLAGS $XPM_LDFLAGS $all_libraries -lXpm $LIBZ $LIBSOCKET"
+    fi
+    CFLAGS="$CFLAGS $X_INCLUDES $USER_INCLUDES"
+    test -n "$XPM_INCLUDE" && CFLAGS="-I$XPM_INCLUDE $CFLAGS"
+    AC_TRY_LINK([#include <X11/xpm.h>],[],
+	ac_cv_have_xpm="yes",ac_cv_have_xpm="no")
+    LDFLAGS="$ac_save_ldflags"
+    CFLAGS="$ac_save_cflags"
+   ])dnl
+
+  if test "$ac_cv_have_xpm" = no; then
+    AC_MSG_RESULT(no)
+    XPM_LDFLAGS=""
+    XPMINC=""
+    $2
+  else
+    AC_DEFINE(HAVE_XPM, 1, [Define if you have XPM support])
+    if test "$XPM_LDFLAGS" = ""; then
+       XPMLIB='-lXpm $(LIB_X11)'
+    else
+       XPMLIB="-L$XPM_LDFLAGS -lXpm "'$(LIB_X11)'
+    fi
+    if test "$XPM_INCLUDE" = ""; then
+       XPMINC=""
+    else
+       XPMINC="-I$XPM_INCLUDE"
+    fi
+    AC_MSG_RESULT(yes)
+    $1
+  fi
+ fi
+ AC_SUBST(XPMINC)
+ AC_SUBST(XPMLIB)
+])
+
+AC_DEFUN([AC_HAVE_DPMS],
+ [AC_REQUIRE_CPP()dnl
+  AC_REQUIRE([KDE_CHECK_EXTRA_LIBS])
+
+ test -z "$DPMS_LDFLAGS" && DPMS_LDFLAGS=
+ test -z "$DPMS_INCLUDE" && DPMS_INCLUDE=
+ DPMS_LIB=
+
+ AC_ARG_WITH(dpms,AC_HELP_STRING([--without-dpms],[disable DPMS power saving]),
+	dpms_test=$withval, dpms_test="yes")
+ if test "x$dpms_test" = xno; then
+   ac_cv_have_dpms=no
+ else
+   AC_MSG_CHECKING(for DPMS)
+   dnl Note: ac_cv_have_dpms can be no, yes, or -lXdpms.
+   dnl 'yes' means DPMS_LIB="", '-lXdpms' means DPMS_LIB="-lXdpms".
+   AC_CACHE_VAL(ac_cv_have_dpms,
+   [
+    if test "x$kde_use_qt_emb" = "xyes" || test "x$kde_use_qt_mac" = "xyes"; then
+      AC_MSG_RESULT(no)
+      ac_cv_have_dpms="no"
+    else
+      ac_save_ldflags="$LDFLAGS"
+      ac_save_cflags="$CFLAGS"
+      ac_save_libs="$LIBS"
+      LDFLAGS="$LDFLAGS $DPMS_LDFLAGS $all_libraries"
+      LIBS="-lX11 -lXext $LIBSOCKET"
+      CFLAGS="$CFLAGS $X_INCLUDES"
+      test -n "$DPMS_INCLUDE" && CFLAGS="-I$DPMS_INCLUDE $CFLAGS"
+      AC_TRY_LINK([
+	  #include <X11/Xproto.h>
+	  #include <X11/X.h>
+	  #include <X11/Xlib.h>
+	  #include <X11/extensions/dpms.h>
+	  int foo_test_dpms()
+	  { return DPMSSetTimeouts( 0, 0, 0, 0 ); }],[],
+	  ac_cv_have_dpms="yes", [
+              LIBS="-lXdpms $LIBS"
+              AC_TRY_LINK([
+	          #include <X11/Xproto.h>
+        	  #include <X11/X.h>
+        	  #include <X11/Xlib.h>
+        	  #include <X11/extensions/dpms.h>
+        	  int foo_test_dpms()
+        	  { return DPMSSetTimeouts( 0, 0, 0, 0 ); }],[],
+        	  [
+                  ac_cv_have_dpms="-lXdpms"
+                  ],ac_cv_have_dpms="no")
+              ])
+      LDFLAGS="$ac_save_ldflags"
+      CFLAGS="$ac_save_cflags"
+      LIBS="$ac_save_libs"
+    fi
+   ])dnl
+
+  if test "$ac_cv_have_dpms" = no; then
+    AC_MSG_RESULT(no)
+    DPMS_LDFLAGS=""
+    DPMSINC=""
+    $2
+  else
+    AC_DEFINE(HAVE_DPMS, 1, [Define if you have DPMS support])
+    if test "$ac_cv_have_dpms" = "-lXdpms"; then
+       DPMS_LIB="-lXdpms"
+    fi
+    if test "$DPMS_LDFLAGS" = ""; then
+       DPMSLIB="$DPMS_LIB "'$(LIB_X11)'
+    else
+       DPMSLIB="$DPMS_LDFLAGS $DPMS_LIB "'$(LIB_X11)'
+    fi
+    if test "$DPMS_INCLUDE" = ""; then
+       DPMSINC=""
+    else
+       DPMSINC="-I$DPMS_INCLUDE"
+    fi
+    AC_MSG_RESULT(yes)
+    $1
+  fi
+ fi
+ ac_save_cflags="$CFLAGS"
+ CFLAGS="$CFLAGS $X_INCLUDES"
+ test -n "$DPMS_INCLUDE" && CFLAGS="-I$DPMS_INCLUDE $CFLAGS"
+ AH_TEMPLATE(HAVE_DPMSCAPABLE_PROTO,
+   [Define if you have the DPMSCapable prototype in <X11/extensions/dpms.h>])
+ AC_CHECK_DECL(DPMSCapable,
+   AC_DEFINE(HAVE_DPMSCAPABLE_PROTO),,
+   [#include <X11/Xlib.h>
+   #include <X11/extensions/dpms.h>])
+ AH_TEMPLATE(HAVE_DPMSINFO_PROTO,
+   [Define if you have the DPMSInfo prototype in <X11/extensions/dpms.h>])
+ AC_CHECK_DECL(DPMSInfo,
+   AC_DEFINE(HAVE_DPMSINFO_PROTO),,
+   [#include <X11/Xlib.h>
+   #include <X11/extensions/dpms.h>])
+ CFLAGS="$ac_save_cflags"
+ AC_SUBST(DPMSINC)
+ AC_SUBST(DPMSLIB)
+])
+
+AC_DEFUN([AC_HAVE_GL],
+ [AC_REQUIRE_CPP()dnl
+  AC_REQUIRE([KDE_CHECK_EXTRA_LIBS])
+
+ test -z "$GL_LDFLAGS" && GL_LDFLAGS=
+ test -z "$GL_INCLUDE" && GL_INCLUDE=
+
+ AC_ARG_WITH(gl,AC_HELP_STRING([--without-gl],[disable 3D GL modes]),
+	gl_test=$withval, gl_test="yes")
+ if test "x$kde_use_qt_emb" = "xyes"; then
+   # GL and Qt Embedded is a no-go for now.
+   ac_cv_have_gl=no
+ elif test "x$gl_test" = xno; then
+   ac_cv_have_gl=no
+ else
+   AC_MSG_CHECKING(for GL)
+   AC_CACHE_VAL(ac_cv_have_gl,
+   [
+    AC_LANG_SAVE
+    AC_LANG_CPLUSPLUS
+    ac_save_ldflags=$LDFLAGS
+    ac_save_cxxflags=$CXXFLAGS
+    ac_save_libs=$LIBS
+    LDFLAGS="$LDFLAGS $GL_LDFLAGS $X_LDFLAGS $all_libraries"
+    LIBS="$LIBS -lGL -lGLU"
+    test "x$kde_use_qt_mac" != xyes && test "x$kde_use_qt_emb" != xyes && LIBS="$LIBS -lX11"
+    LIBS="$LIBS $LIB_XEXT -lm $LIBSOCKET"
+    CXXFLAGS="$CFLAGS $X_INCLUDES"
+    test -n "$GL_INCLUDE" && CFLAGS="-I$GL_INCLUDE $CFLAGS"
+    AC_TRY_LINK([#include <GL/gl.h>
+#include <GL/glu.h>
+], [],
+	ac_cv_have_gl="yes", ac_cv_have_gl="no")
+    AC_LANG_RESTORE
+    LDFLAGS=$ac_save_ldflags
+    CXXFLAGS=$ac_save_cxxflags
+    LIBS=$ac_save_libs
+   ])dnl
+
+  if test "$ac_cv_have_gl" = "no"; then
+    AC_MSG_RESULT(no)
+    GL_LDFLAGS=""
+    GLINC=""
+    $2
+  else
+    AC_DEFINE(HAVE_GL, 1, [Defines if you have GL (Mesa, OpenGL, ...)])
+    if test "$GL_LDFLAGS" = ""; then
+       GLLIB='-lGLU -lGL $(LIB_X11)'
+    else
+       GLLIB="$GL_LDFLAGS -lGLU -lGL "'$(LIB_X11)'
+    fi
+    if test "$GL_INCLUDE" = ""; then
+       GLINC=""
+    else
+       GLINC="-I$GL_INCLUDE"
+    fi
+    AC_MSG_RESULT($ac_cv_have_gl)
+    $1
+  fi
+ fi
+ AC_SUBST(GLINC)
+ AC_SUBST(GLLIB)
+])
+
+
+ dnl shadow password and PAM magic - maintained by ossi@kde.org
+
+AC_DEFUN([KDE_PAM], [
+  AC_REQUIRE([KDE_CHECK_LIBDL])
+
+  want_pam=
+  AC_ARG_WITH(pam,
+    AC_HELP_STRING([--with-pam[=ARG]],[enable support for PAM: ARG=[yes|no|service name]]),
+    [ if test "x$withval" = "xyes"; then
+        want_pam=yes
+        pam_service=kde
+      elif test "x$withval" = "xno"; then
+        want_pam=no
+      else
+        want_pam=yes
+        pam_service=$withval
+      fi
+    ], [ pam_service=kde ])
+
+  use_pam=
+  PAMLIBS=
+  if test "x$want_pam" != xno; then
+    AC_CHECK_LIB(pam, pam_start, [
+      AC_CHECK_HEADER(security/pam_appl.h,
+        [ pam_header=security/pam_appl.h ],
+        [ AC_CHECK_HEADER(pam/pam_appl.h,
+            [ pam_header=pam/pam_appl.h ],
+            [
+    AC_MSG_WARN([PAM detected, but no headers found!
+Make sure you have the necessary development packages installed.])
+            ]
+          )
+        ]
+      )
+    ], , $LIBDL)
+    if test -z "$pam_header"; then
+      if test "x$want_pam" = xyes; then
+        AC_MSG_ERROR([--with-pam was specified, but cannot compile with PAM!])
+      fi
+    else
+      AC_DEFINE(HAVE_PAM, 1, [Defines if you have PAM (Pluggable Authentication Modules)])
+      PAMLIBS="$PAM_MISC_LIB -lpam $LIBDL"
+      use_pam=yes
+
+      dnl darwin claims to be something special
+      if test "$pam_header" = "pam/pam_appl.h"; then
+        AC_DEFINE(HAVE_PAM_PAM_APPL_H, 1, [Define if your PAM headers are in pam/ instead of security/])
+      fi
+
+      dnl test whether struct pam_message is const (Linux) or not (Sun)
+      AC_MSG_CHECKING(for const pam_message)
+      AC_EGREP_HEADER([struct pam_message], $pam_header,
+        [ AC_EGREP_HEADER([const struct pam_message], $pam_header,
+                          [AC_MSG_RESULT([const: Linux-type PAM])],
+                          [AC_MSG_RESULT([nonconst: Sun-type PAM])
+                          AC_DEFINE(PAM_MESSAGE_NONCONST, 1, [Define if your PAM support takes non-const arguments (Solaris)])]
+                          )],
+        [AC_MSG_RESULT([not found - assume const, Linux-type PAM])])
+    fi
+  fi
+
+  AC_SUBST(PAMLIBS)
+])
+
+dnl DEF_PAM_SERVICE(arg name, full name, define name)
+AC_DEFUN([DEF_PAM_SERVICE], [
+  AC_ARG_WITH($1-pam,
+    AC_HELP_STRING([--with-$1-pam=[val]],[override PAM service from --with-pam for $2]),
+    [ if test "x$use_pam" = xyes; then
+        $3_PAM_SERVICE=$withval
+      else
+        AC_MSG_ERROR([Cannot use use --with-$1-pam, as no PAM was detected.
+You may want to enforce it by using --with-pam.])
+      fi
+    ], 
+    [ if test "x$use_pam" = xyes; then
+        $3_PAM_SERVICE="$pam_service"
+      fi
+    ])
+    if test -n "$$3_PAM_SERVICE"; then
+      AC_MSG_RESULT([The PAM service used by $2 will be $$3_PAM_SERVICE])
+      AC_DEFINE_UNQUOTED($3_PAM_SERVICE, "$$3_PAM_SERVICE", [The PAM service to be used by $2])
+    fi
+    AC_SUBST($3_PAM_SERVICE)
+])
+
+AC_DEFUN([KDE_SHADOWPASSWD], [
+  AC_REQUIRE([KDE_PAM])
+
+  AC_CHECK_LIB(shadow, getspent,
+    [ LIBSHADOW="-lshadow"
+      ac_use_shadow=yes
+    ],
+    [ dnl for UnixWare
+      AC_CHECK_LIB(gen, getspent, 
+        [ LIBGEN="-lgen"
+          ac_use_shadow=yes
+        ], 
+        [ AC_CHECK_FUNC(getspent, 
+            [ ac_use_shadow=yes ],
+            [ ac_use_shadow=no ])
+	])
+    ])
+  AC_SUBST(LIBSHADOW)
+  AC_SUBST(LIBGEN)
+  
+  AC_MSG_CHECKING([for shadow passwords])
+
+  AC_ARG_WITH(shadow,
+    AC_HELP_STRING([--with-shadow],[If you want shadow password support]),
+    [ if test "x$withval" != "xno"; then
+        use_shadow=yes
+      else
+        use_shadow=no
+      fi
+    ], [
+      use_shadow="$ac_use_shadow"
+    ])
+
+  if test "x$use_shadow" = xyes; then
+    AC_MSG_RESULT(yes)
+    AC_DEFINE(HAVE_SHADOW, 1, [Define if you use shadow passwords])
+  else
+    AC_MSG_RESULT(no)
+    LIBSHADOW=
+    LIBGEN=
+  fi
+
+  dnl finally make the relevant binaries setuid root, if we have shadow passwds.
+  dnl this still applies, if we could use it indirectly through pam.
+  if test "x$use_shadow" = xyes || 
+     ( test "x$use_pam" = xyes && test "x$ac_use_shadow" = xyes ); then
+      case $host in
+      *-*-freebsd* | *-*-netbsd* | *-*-openbsd*)
+	SETUIDFLAGS="-m 4755 -o root";;
+      *)
+	SETUIDFLAGS="-m 4755";;
+      esac
+  fi
+  AC_SUBST(SETUIDFLAGS)
+
+])
+
+AC_DEFUN([KDE_PASSWDLIBS], [
+  AC_REQUIRE([KDE_MISC_TESTS]) dnl for LIBCRYPT
+  AC_REQUIRE([KDE_PAM])
+  AC_REQUIRE([KDE_SHADOWPASSWD])
+
+  if test "x$use_pam" = "xyes"; then 
+    PASSWDLIBS="$PAMLIBS"
+  else
+    PASSWDLIBS="$LIBCRYPT $LIBSHADOW $LIBGEN"
+  fi
+
+  dnl FreeBSD uses a shadow-like setup, where /etc/passwd holds the users, but
+  dnl /etc/master.passwd holds the actual passwords.  /etc/master.passwd requires
+  dnl root to read, so kcheckpass needs to be root (even when using pam, since pam
+  dnl may need to read /etc/master.passwd).
+  case $host in
+  *-*-freebsd*)
+    SETUIDFLAGS="-m 4755 -o root"
+    ;;
+  *)
+    ;;
+  esac
+
+  AC_SUBST(PASSWDLIBS)
+])
+
+AC_DEFUN([KDE_CHECK_LIBDL],
+[
+AC_CHECK_LIB(dl, dlopen, [
+LIBDL="-ldl"
+ac_cv_have_dlfcn=yes
+])
+
+AC_CHECK_LIB(dld, shl_unload, [
+LIBDL="-ldld"
+ac_cv_have_shload=yes
+])
+
+AC_SUBST(LIBDL)
+])
+
+AC_DEFUN([KDE_CHECK_DLOPEN],
+[
+KDE_CHECK_LIBDL
+AC_CHECK_HEADERS(dlfcn.h dl.h)
+if test "$ac_cv_header_dlfcn_h" = "no"; then
+  ac_cv_have_dlfcn=no
+fi
+
+if test "$ac_cv_header_dl_h" = "no"; then
+  ac_cv_have_shload=no
+fi
+
+dnl XXX why change enable_dlopen? its already set by autoconf's AC_ARG_ENABLE
+dnl (MM)
+AC_ARG_ENABLE(dlopen,
+AC_HELP_STRING([--disable-dlopen],[link statically [default=no]]),
+enable_dlopen=$enableval,
+enable_dlopen=yes)
+
+# override the user's opinion, if we know it better ;)
+if test "$ac_cv_have_dlfcn" = "no" && test "$ac_cv_have_shload" = "no"; then
+  enable_dlopen=no
+fi
+
+if test "$ac_cv_have_dlfcn" = "yes"; then
+  AC_DEFINE_UNQUOTED(HAVE_DLFCN, 1, [Define if you have dlfcn])
+fi
+
+if test "$ac_cv_have_shload" = "yes"; then
+  AC_DEFINE_UNQUOTED(HAVE_SHLOAD, 1, [Define if you have shload])
+fi
+
+if test "$enable_dlopen" = no ; then
+  test -n "$1" && eval $1
+else
+  test -n "$2" && eval $2
+fi
+
+])
+
+AC_DEFUN([KDE_CHECK_DYNAMIC_LOADING],
+[
+KDE_CHECK_DLOPEN(libtool_enable_shared=yes, libtool_enable_static=no)
+KDE_PROG_LIBTOOL
+AC_MSG_CHECKING([dynamic loading])
+eval "`egrep '^build_libtool_libs=' libtool`"
+if test "$build_libtool_libs" = "yes" && test "$enable_dlopen" = "yes"; then
+  dynamic_loading=yes
+  AC_DEFINE_UNQUOTED(HAVE_DYNAMIC_LOADING)
+else
+  dynamic_loading=no
+fi
+AC_MSG_RESULT($dynamic_loading)
+if test "$dynamic_loading" = "yes"; then
+  $1
+else
+  $2
+fi
+])
+
+AC_DEFUN([KDE_ADD_INCLUDES],
+[
+if test -z "$1"; then
+  test_include="Pix.h"
+else
+  test_include="$1"
+fi
+
+AC_MSG_CHECKING([for libg++ ($test_include)])
+
+AC_CACHE_VAL(kde_cv_libgpp_includes,
+[
+kde_cv_libgpp_includes=no
+
+   for ac_dir in               \
+                               \
+     /usr/include/g++          \
+     /usr/include              \
+     /usr/unsupported/include  \
+     /opt/include              \
+     $extra_include            \
+     ; \
+   do
+     if test -r "$ac_dir/$test_include"; then
+       kde_cv_libgpp_includes=$ac_dir
+       break
+     fi
+   done
+])
+
+AC_MSG_RESULT($kde_cv_libgpp_includes)
+if test "$kde_cv_libgpp_includes" != "no"; then
+  all_includes="-I$kde_cv_libgpp_includes $all_includes $USER_INCLUDES"
+fi
+])
+])
+
+AC_DEFUN([KDE_CHECK_LIBPTHREAD],
+[
+  dnl This code is here specifically to handle the
+  dnl various flavors of threading library on FreeBSD
+  dnl 4-, 5-, and 6-, and the (weird) rules around it.
+  dnl There may be an environment PTHREAD_LIBS that 
+  dnl specifies what to use; otherwise, search for it.
+  dnl -pthread is special cased and unsets LIBPTHREAD
+  dnl below if found.
+  LIBPTHREAD=""
+
+  if test -n "$PTHREAD_LIBS"; then
+    if test "x$PTHREAD_LIBS" = "x-pthread" ; then
+      LIBPTHREAD="PTHREAD"
+    else
+      PTHREAD_LIBS_save="$PTHREAD_LIBS"
+      PTHREAD_LIBS=`echo "$PTHREAD_LIBS_save" | sed -e 's,^-l,,g'`
+      AC_MSG_CHECKING([for pthread_create in $PTHREAD_LIBS])
+      KDE_CHECK_LIB($PTHREAD_LIBS, pthread_create, [
+          LIBPTHREAD="$PTHREAD_LIBS_save"])
+      PTHREAD_LIBS="$PTHREAD_LIBS_save"
+    fi
+  fi
+
+  dnl Is this test really needed, in the face of the Tru64 test below?
+  if test -z "$LIBPTHREAD"; then
+    AC_CHECK_LIB(pthread, pthread_create, [LIBPTHREAD="-lpthread"])
+  fi
+
+  dnl This is a special Tru64 check, see BR 76171 issue #18.
+  if test -z "$LIBPTHREAD" ; then
+    AC_MSG_CHECKING([for pthread_create in -lpthread])
+    kde_safe_libs=$LIBS
+    LIBS="$LIBS -lpthread"
+    AC_TRY_LINK([#include <pthread.h>],[(void)pthread_create(0,0,0,0);],[
+        AC_MSG_RESULT(yes)
+        LIBPTHREAD="-lpthread"],[
+	AC_MSG_RESULT(no)])
+    LIBS=$kde_safe_libs
+  fi
+
+  dnl Un-special-case for FreeBSD.
+  if test "x$LIBPTHREAD" = "xPTHREAD" ; then
+    LIBPTHREAD=""
+  fi
+
+  AC_SUBST(LIBPTHREAD)
+])
+
+AC_DEFUN([KDE_CHECK_PTHREAD_OPTION],
+[
+      USE_THREADS=""
+      if test -z "$LIBPTHREAD"; then
+        KDE_CHECK_COMPILER_FLAG(pthread, [USE_THREADS="-D_THREAD_SAFE -pthread"])
+      fi
+
+    AH_VERBATIM(__svr_define, [
+#if defined(__SVR4) && !defined(__svr4__)
+#define __svr4__ 1
+#endif
+])
+    case $host_os in
+ 	solaris*)
+		KDE_CHECK_COMPILER_FLAG(mt, [USE_THREADS="-mt"])
+                CPPFLAGS="$CPPFLAGS -D_REENTRANT -D_POSIX_PTHREAD_SEMANTICS -DUSE_SOLARIS -DSVR4"
+    		;;
+        freebsd*)
+                CPPFLAGS="$CPPFLAGS -D_THREAD_SAFE $PTHREAD_CFLAGS"
+                ;;
+        aix*)
+                CPPFLAGS="$CPPFLAGS -D_THREAD_SAFE"
+                LIBPTHREAD="$LIBPTHREAD -lc_r"
+                ;;
+        linux*) CPPFLAGS="$CPPFLAGS -D_REENTRANT"
+                if test "$CXX" = "KCC"; then
+                  CXXFLAGS="$CXXFLAGS --thread_safe"
+		  NOOPT_CXXFLAGS="$NOOPT_CXXFLAGS --thread_safe"
+                fi
+                ;;
+	*)
+		;;
+    esac
+    AC_SUBST(USE_THREADS)
+    AC_SUBST(LIBPTHREAD)
+])
+
+AC_DEFUN([KDE_CHECK_THREADING],
+[
+  AC_REQUIRE([KDE_CHECK_LIBPTHREAD])
+  AC_REQUIRE([KDE_CHECK_PTHREAD_OPTION])
+  dnl default is yes if libpthread is found and no if no libpthread is available
+  if test -z "$LIBPTHREAD"; then
+    if test -z "$USE_THREADS"; then
+      kde_check_threading_default=no
+    else
+      kde_check_threading_default=yes
+    fi
+  else
+    kde_check_threading_default=yes
+  fi
+  AC_ARG_ENABLE(threading,AC_HELP_STRING([--disable-threading],[disables threading even if libpthread found]),
+   kde_use_threading=$enableval, kde_use_threading=$kde_check_threading_default)
+  if test "x$kde_use_threading" = "xyes"; then
+    AC_DEFINE(HAVE_LIBPTHREAD, 1, [Define if you have a working libpthread (will enable threaded code)])
+  fi
+])
+
+AC_DEFUN([KDE_TRY_LINK_PYTHON],
+[
+if test "$kde_python_link_found" = no; then
+
+if test "$1" = normal; then
+  AC_MSG_CHECKING(if a Python application links)
+else
+  AC_MSG_CHECKING(if Python depends on $2)
+fi
+
+AC_CACHE_VAL(kde_cv_try_link_python_$1,
+[
+kde_save_cflags="$CFLAGS"
+CFLAGS="$CFLAGS $PYTHONINC"
+kde_save_libs="$LIBS"
+LIBS="$LIBS $LIBPYTHON $2 $LIBDL $LIBSOCKET"
+kde_save_ldflags="$LDFLAGS"
+LDFLAGS="$LDFLAGS $PYTHONLIB"
+
+AC_TRY_LINK(
+[
+#include <Python.h>
+],[
+	PySys_SetArgv(1, 0);
+],
+	[kde_cv_try_link_python_$1=yes],
+	[kde_cv_try_link_python_$1=no]
+)
+CFLAGS="$kde_save_cflags"
+LIBS="$kde_save_libs"
+LDFLAGS="$kde_save_ldflags"
+])
+
+if test "$kde_cv_try_link_python_$1" = "yes"; then
+  AC_MSG_RESULT(yes)
+  kde_python_link_found=yes
+  if test ! "$1" = normal; then
+    LIBPYTHON="$LIBPYTHON $2"
+  fi
+  $3
+else
+  AC_MSG_RESULT(no)
+  $4
+fi
+
+fi
+
+])
+
+AC_DEFUN([KDE_CHECK_PYTHON_DIR],
+[
+AC_MSG_CHECKING([for Python directory])
+ 
+AC_CACHE_VAL(kde_cv_pythondir,
+[
+  if test -z "$PYTHONDIR"; then
+    kde_cv_pythondir=/usr/local
+  else
+    kde_cv_pythondir="$PYTHONDIR"
+  fi
+])
+ 
+AC_ARG_WITH(pythondir,
+AC_HELP_STRING([--with-pythondir=pythondir],[use python installed in pythondir]),
+[
+  ac_python_dir=$withval
+], ac_python_dir=$kde_cv_pythondir
+)
+ 
+AC_MSG_RESULT($ac_python_dir)
+])
+
+AC_DEFUN([KDE_CHECK_PYTHON_INTERN],
+[
+AC_REQUIRE([KDE_CHECK_LIBDL])
+AC_REQUIRE([KDE_CHECK_LIBPTHREAD])
+AC_REQUIRE([KDE_CHECK_PYTHON_DIR])
+
+if test -z "$1"; then
+  version="1.5"
+else
+  version="$1"
+fi
+
+AC_MSG_CHECKING([for Python$version])
+
+python_incdirs="$ac_python_dir/include /usr/include /usr/local/include/ $kde_extra_includes"
+AC_FIND_FILE(Python.h, $python_incdirs, python_incdir)
+if test ! -r $python_incdir/Python.h; then
+  AC_FIND_FILE(python$version/Python.h, $python_incdirs, python_incdir)
+  python_incdir=$python_incdir/python$version
+  if test ! -r $python_incdir/Python.h; then
+    python_incdir=no
+  fi
+fi
+
+PYTHONINC=-I$python_incdir
+
+python_libdirs="$ac_python_dir/lib$kdelibsuff /usr/lib$kdelibsuff /usr/local /usr/lib$kdelibsuff $kde_extra_libs"
+AC_FIND_FILE(libpython$version.so, $python_libdirs, python_libdir)
+if test ! -r $python_libdir/libpython$version.so; then
+  AC_FIND_FILE(libpython$version.a, $python_libdirs, python_libdir)
+  if test ! -r $python_libdir/libpython$version.a; then
+    AC_FIND_FILE(python$version/config/libpython$version.a, $python_libdirs, python_libdir)
+    python_libdir=$python_libdir/python$version/config
+    if test ! -r $python_libdir/libpython$version.a; then
+      python_libdir=no
+    fi
+  fi
+fi
+
+PYTHONLIB=-L$python_libdir
+kde_orig_LIBPYTHON=$LIBPYTHON
+if test -z "$LIBPYTHON"; then
+  LIBPYTHON=-lpython$version
+fi
+
+AC_FIND_FILE(python$version/copy.py, $python_libdirs, python_moddir)
+python_moddir=$python_moddir/python$version
+if test ! -r $python_moddir/copy.py; then
+  python_moddir=no
+fi
+
+PYTHONMODDIR=$python_moddir
+
+AC_MSG_RESULT(header $python_incdir library $python_libdir modules $python_moddir)
+
+if test x$python_incdir = xno ||  test x$python_libdir = xno ||  test x$python_moddir = xno; then
+   LIBPYTHON=$kde_orig_LIBPYTHON
+   test "x$PYTHONLIB" = "x-Lno" && PYTHONLIB=""
+   test "x$PYTHONINC" = "x-Ino" && PYTHONINC=""
+   $2
+else 
+  dnl Note: this test is very weak
+  kde_python_link_found=no
+  KDE_TRY_LINK_PYTHON(normal)
+  KDE_TRY_LINK_PYTHON(m, -lm)
+  KDE_TRY_LINK_PYTHON(pthread, $LIBPTHREAD)
+  KDE_TRY_LINK_PYTHON(tcl, -ltcl)
+  KDE_TRY_LINK_PYTHON(db2, -ldb2)
+  KDE_TRY_LINK_PYTHON(m_and_thread, [$LIBPTHREAD -lm])
+  KDE_TRY_LINK_PYTHON(m_and_thread_and_util, [$LIBPTHREAD -lm -lutil])
+  KDE_TRY_LINK_PYTHON(m_and_thread_and_db3, [$LIBPTHREAD -lm -ldb-3 -lutil])
+  KDE_TRY_LINK_PYTHON(pthread_and_db3, [$LIBPTHREAD -ldb-3])
+  KDE_TRY_LINK_PYTHON(m_and_thread_and_db, [$LIBPTHREAD -lm -ldb -ltermcap -lutil])
+  KDE_TRY_LINK_PYTHON(pthread_and_dl, [$LIBPTHREAD $LIBDL -lutil -lreadline -lncurses -lm])
+  KDE_TRY_LINK_PYTHON(pthread_and_panel_curses, [$LIBPTHREAD $LIBDL -lm -lpanel -lcurses])
+  KDE_TRY_LINK_PYTHON(m_and_thread_and_db_special, [$LIBPTHREAD -lm -ldb -lutil], [],
+	[AC_MSG_WARN([it seems, Python depends on another library.
+    Please set LIBPYTHON to '-lpython$version -lotherlib' before calling configure to fix this
+    and contact the authors to let them know about this problem])
+	])
+
+  LIBPYTHON="$LIBPYTHON $LIBDL $LIBSOCKET"
+  AC_SUBST(PYTHONINC)
+  AC_SUBST(PYTHONLIB)
+  AC_SUBST(LIBPYTHON)
+  AC_SUBST(PYTHONMODDIR)
+  AC_DEFINE(HAVE_PYTHON, 1, [Define if you have the development files for python])
+fi
+
+])
+
+
+AC_DEFUN([KDE_CHECK_PYTHON],
+[
+  KDE_CHECK_PYTHON_INTERN("2.4",
+   [KDE_CHECK_PYTHON_INTERN("2.3", 
+     [KDE_CHECK_PYTHON_INTERN("2.2", 
+       [KDE_CHECK_PYTHON_INTERN("2.1", 
+         [KDE_CHECK_PYTHON_INTERN("2.0", 
+           [KDE_CHECK_PYTHON_INTERN($1, $2) ])
+         ])
+       ])
+     ])
+  ])
+])
+
+AC_DEFUN([KDE_CHECK_STL],
+[
+    AC_LANG_SAVE
+    AC_LANG_CPLUSPLUS
+    ac_save_CXXFLAGS="$CXXFLAGS"
+    CXXFLAGS="`echo $CXXFLAGS | sed s/-fno-exceptions//`"
+
+    AC_MSG_CHECKING([if C++ programs can be compiled])
+    AC_CACHE_VAL(kde_cv_stl_works,
+    [
+      AC_TRY_COMPILE([
+#include <string>
+using namespace std;
+],[
+  string astring="Hallo Welt.";
+  astring.erase(0, 6); // now astring is "Welt"
+  return 0;
+], kde_cv_stl_works=yes,
+   kde_cv_stl_works=no)
+])
+
+   AC_MSG_RESULT($kde_cv_stl_works)
+
+   if test "$kde_cv_stl_works" = "yes"; then
+     # back compatible
+	 AC_DEFINE_UNQUOTED(HAVE_SGI_STL, 1, [Define if you have a STL implementation by SGI])
+   else
+	 AC_MSG_ERROR([Your Installation isn't able to compile simple C++ programs.
+Check config.log for details - if you're using a Linux distribution you might miss
+a package named similar to libstdc++-dev.])
+   fi
+
+   CXXFLAGS="$ac_save_CXXFLAGS"
+   AC_LANG_RESTORE
+])
+
+AC_DEFUN([AC_FIND_QIMGIO],
+   [AC_REQUIRE([AC_FIND_JPEG])
+AC_REQUIRE([KDE_CHECK_EXTRA_LIBS])
+AC_MSG_CHECKING([for qimgio])
+AC_CACHE_VAL(ac_cv_lib_qimgio,
+[
+AC_LANG_SAVE
+AC_LANG_CPLUSPLUS
+ac_save_LIBS="$LIBS"
+ac_save_CXXFLAGS="$CXXFLAGS"
+LIBS="$all_libraries -lqimgio -lpng -lz $LIBJPEG $LIBQT"
+CXXFLAGS="$CXXFLAGS -I$qt_incdir $all_includes"
+AC_TRY_RUN(dnl
+[
+#include <qimageio.h>
+#include <qstring.h>
+int main() {
+		QString t = "hallo";
+		t.fill('t');
+		qInitImageIO();
+}
+],
+            ac_cv_lib_qimgio=yes,
+            ac_cv_lib_qimgio=no,
+	    ac_cv_lib_qimgio=no)
+LIBS="$ac_save_LIBS"
+CXXFLAGS="$ac_save_CXXFLAGS"
+AC_LANG_RESTORE
+])dnl
+if eval "test \"`echo $ac_cv_lib_qimgio`\" = yes"; then
+  LIBQIMGIO="-lqimgio -lpng -lz $LIBJPEG"
+  AC_MSG_RESULT(yes)
+  AC_DEFINE_UNQUOTED(HAVE_QIMGIO, 1, [Define if you have the Qt extension qimgio available])
+  AC_SUBST(LIBQIMGIO)
+else
+  AC_MSG_RESULT(not found)
+fi
+])
+
+AC_DEFUN([AM_DISABLE_LIBRARIES],
+[
+    AC_PROVIDE([AM_ENABLE_STATIC])
+    AC_PROVIDE([AM_ENABLE_SHARED])
+    enable_static=no
+    enable_shared=yes
+])
+
+
+AC_DEFUN([AC_CHECK_UTMP_FILE],
+[
+    AC_MSG_CHECKING([for utmp file])
+
+    AC_CACHE_VAL(kde_cv_utmp_file,
+    [
+    kde_cv_utmp_file=no
+
+    for ac_file in    \
+                      \
+	/var/run/utmp \
+	/var/adm/utmp \
+	/etc/utmp     \
+     ; \
+    do
+     if test -r "$ac_file"; then
+       kde_cv_utmp_file=$ac_file
+       break
+     fi
+    done
+    ])
+
+    if test "$kde_cv_utmp_file" != "no"; then
+	AC_DEFINE_UNQUOTED(UTMP, "$kde_cv_utmp_file", [Define the file for utmp entries])
+	$1
+	AC_MSG_RESULT($kde_cv_utmp_file)
+    else
+    	$2
+	AC_MSG_RESULT([non found])
+    fi
+])
+
+
+AC_DEFUN([KDE_CREATE_SUBDIRSLIST],
+[
+
+DO_NOT_COMPILE="$DO_NOT_COMPILE CVS debian bsd-port admin"
+TOPSUBDIRS=""
+
+if test ! -s $srcdir/subdirs; then
+  dnl Note: Makefile.common creates subdirs, so this is just a fallback
+  files=`cd $srcdir && ls -1`
+  dirs=`for i in $files; do if test -d $i; then echo $i; fi; done`
+  for i in $dirs; do
+    echo $i >> $srcdir/subdirs
+  done
+fi
+
+ac_topsubdirs=
+if test -s $srcdir/inst-apps; then
+  ac_topsubdirs="`cat $srcdir/inst-apps`"
+elif test -s $srcdir/subdirs; then
+  ac_topsubdirs="`cat $srcdir/subdirs`"
+fi
+
+for i in $ac_topsubdirs; do
+  AC_MSG_CHECKING([if $i should be compiled])
+  if test -d $srcdir/$i; then
+    install_it="yes"
+    for j in $DO_NOT_COMPILE; do
+      if test $i = $j; then
+        install_it="no"
+      fi
+    done
+  else
+    install_it="no"
+  fi
+  AC_MSG_RESULT($install_it)
+  vari=`echo $i | sed -e 's,[[-+.@]],_,g'`
+  if test $install_it = "yes"; then
+    TOPSUBDIRS="$TOPSUBDIRS $i"
+    eval "$vari""_SUBDIR_included=yes"
+  else
+    eval "$vari""_SUBDIR_included=no"
+  fi
+done
+
+AC_SUBST(TOPSUBDIRS)
+])
+
+AC_DEFUN([KDE_CHECK_NAMESPACES],
+[
+AC_MSG_CHECKING(whether C++ compiler supports namespaces)
+AC_LANG_SAVE
+AC_LANG_CPLUSPLUS
+AC_TRY_COMPILE([
+],
+[
+namespace Foo {
+  extern int i;
+  namespace Bar {
+    extern int i;
+  }
+}
+
+int Foo::i = 0;
+int Foo::Bar::i = 1;
+],[
+  AC_MSG_RESULT(yes)
+  AC_DEFINE(HAVE_NAMESPACES)
+], [
+AC_MSG_RESULT(no)
+])
+AC_LANG_RESTORE
+])
+
+dnl ------------------------------------------------------------------------
+dnl Check for S_ISSOCK macro. Doesn't exist on Unix SCO. faure@kde.org
+dnl ------------------------------------------------------------------------
+dnl
+AC_DEFUN([AC_CHECK_S_ISSOCK],
+[
+AC_MSG_CHECKING(for S_ISSOCK)
+AC_CACHE_VAL(ac_cv_have_s_issock,
+[
+AC_TRY_LINK(
+[
+#include <sys/stat.h>
+],
+[
+struct stat buff;
+int b = S_ISSOCK( buff.st_mode );
+],
+ac_cv_have_s_issock=yes,
+ac_cv_have_s_issock=no)
+])
+AC_MSG_RESULT($ac_cv_have_s_issock)
+if test "$ac_cv_have_s_issock" = "yes"; then
+  AC_DEFINE_UNQUOTED(HAVE_S_ISSOCK, 1, [Define if sys/stat.h declares S_ISSOCK.])
+fi
+
+AH_VERBATIM(_ISSOCK,
+[
+#ifndef HAVE_S_ISSOCK
+#define HAVE_S_ISSOCK
+#define S_ISSOCK(mode) (1==0)
+#endif
+])
+
+])
+
+dnl ------------------------------------------------------------------------
+dnl Check for MAXPATHLEN macro, defines KDEMAXPATHLEN. faure@kde.org
+dnl ------------------------------------------------------------------------
+dnl
+AC_DEFUN([AC_CHECK_KDEMAXPATHLEN],
+[
+AC_MSG_CHECKING(for MAXPATHLEN)
+AC_CACHE_VAL(ac_cv_maxpathlen,
+[
+cat > conftest.$ac_ext <<EOF
+#ifdef STDC_HEADERS
+# include <stdlib.h>
+#endif
+#include <stdio.h>
+#include <sys/param.h>
+#ifndef MAXPATHLEN
+#define MAXPATHLEN 1024
+#endif
+
+KDE_HELLO MAXPATHLEN
+
+EOF
+
+ac_try="$ac_cpp conftest.$ac_ext 2>/dev/null | grep '^KDE_HELLO' >conftest.out"
+
+if AC_TRY_EVAL(ac_try) && test -s conftest.out; then
+    ac_cv_maxpathlen=`sed 's#KDE_HELLO ##' conftest.out`
+else
+    ac_cv_maxpathlen=1024
+fi
+
+rm conftest.*
+
+])
+AC_MSG_RESULT($ac_cv_maxpathlen)
+AC_DEFINE_UNQUOTED(KDEMAXPATHLEN,$ac_cv_maxpathlen, [Define a safe value for MAXPATHLEN] )
+])
+
+AC_DEFUN([KDE_CHECK_HEADER],
+[
+   kde_safe_cppflags=$CPPFLAGS
+   CPPFLAGS="$CPPFLAGS $all_includes"
+   AC_LANG_SAVE
+   AC_LANG_CPLUSPLUS
+   AC_CHECK_HEADER([$1], [$2], [$3], [$4])
+   AC_LANG_RESTORE
+   CPPFLAGS=$kde_safe_cppflags
+])
+
+AC_DEFUN([KDE_CHECK_HEADERS],
+[
+   AH_CHECK_HEADERS([$1])
+   AC_LANG_SAVE
+   kde_safe_cppflags=$CPPFLAGS
+   CPPFLAGS="$CPPFLAGS $all_includes"
+   AC_LANG_CPLUSPLUS
+   AC_CHECK_HEADERS([$1], [$2], [$3], [$4])
+   CPPFLAGS=$kde_safe_cppflags
+   AC_LANG_RESTORE
+])
+
+AC_DEFUN([KDE_FAST_CONFIGURE],
+[
+  dnl makes configure fast (needs perl)
+  AC_ARG_ENABLE(fast-perl, AC_HELP_STRING([--disable-fast-perl],[disable fast Makefile generation (needs perl)]),
+      with_fast_perl=$enableval, with_fast_perl=yes)
+])
+
+AC_DEFUN([KDE_CONF_FILES],
+[
+  val=
+  if test -f $srcdir/configure.files ; then
+    val=`sed -e 's%^%\$(top_srcdir)/%' $srcdir/configure.files`
+  fi
+  CONF_FILES=
+  if test -n "$val" ; then
+    for i in $val ; do
+      CONF_FILES="$CONF_FILES $i"
+    done
+  fi
+  AC_SUBST(CONF_FILES)
+])dnl
+
+dnl This sets the prefix, for arts and kdelibs
+dnl Do NOT use in any other module.
+dnl It only looks at --prefix, KDEDIR and falls back to /usr/local/kde
+AC_DEFUN([KDE_SET_PREFIX_CORE],
+[
+  unset CDPATH
+  dnl make $KDEDIR the default for the installation
+  AC_PREFIX_DEFAULT(${KDEDIR:-/usr/local/kde})
+
+  if test "x$prefix" = "xNONE"; then
+    prefix=$ac_default_prefix
+    ac_configure_args="$ac_configure_args --prefix=$prefix"
+  fi
+  # And delete superfluous '/' to make compares easier
+  prefix=`echo "$prefix" | sed 's,//*,/,g' | sed -e 's,/$,,'`
+  exec_prefix=`echo "$exec_prefix" | sed 's,//*,/,g' | sed -e 's,/$,,'`
+
+  kde_libs_prefix='$(prefix)'
+  kde_libs_htmldir='$(kde_htmldir)'
+  AC_SUBST(kde_libs_prefix)
+  AC_SUBST(kde_libs_htmldir)
+  KDE_FAST_CONFIGURE
+  KDE_CONF_FILES
+])
+
+
+AC_DEFUN([KDE_SET_PREFIX],
+[
+  unset CDPATH
+  dnl We can't give real code to that macro, only a value.
+  dnl It only matters for --help, since we set the prefix in this function anyway.
+  AC_PREFIX_DEFAULT(${KDEDIR:-the kde prefix})
+
+  KDE_SET_DEFAULT_BINDIRS
+  if test "x$prefix" = "xNONE"; then
+    dnl no prefix given: look for kde-config in the PATH and deduce the prefix from it
+    KDE_FIND_PATH(kde-config, KDECONFIG, [$kde_default_bindirs], [KDE_MISSING_PROG_ERROR(kde-config)], [], prepend)
+  else
+    dnl prefix given: look for kde-config, preferrably in prefix, otherwise in PATH
+    kde_save_PATH="$PATH"
+    PATH="$exec_prefix/bin:$prefix/bin:$PATH"
+    KDE_FIND_PATH(kde-config, KDECONFIG, [$kde_default_bindirs], [KDE_MISSING_PROG_ERROR(kde-config)], [], prepend)
+    PATH="$kde_save_PATH"
+  fi
+
+  kde_libs_prefix=`$KDECONFIG --prefix`
+  if test -z "$kde_libs_prefix" || test ! -x "$kde_libs_prefix"; then
+       AC_MSG_ERROR([$KDECONFIG --prefix outputed the non existant prefix '$kde_libs_prefix' for kdelibs.
+                    This means it has been moved since you installed it.
+                    This won't work. Please recompile kdelibs for the new prefix.
+                    ])
+  fi
+  kde_libs_htmldir=`$KDECONFIG --install html --expandvars`
+  kde_libs_suffix=`$KDECONFIG --libsuffix` || kde_libs_suffix=auto
+
+  AC_MSG_CHECKING([where to install])
+  if test "x$prefix" = "xNONE"; then
+    prefix=$kde_libs_prefix
+    AC_MSG_RESULT([$prefix (as returned by kde-config)])
+  else
+    dnl --prefix was given. Compare prefixes and warn (in configure.in.bot.end) if different
+    given_prefix=$prefix
+    AC_MSG_RESULT([$prefix (as requested)])
+  fi
+
+  # And delete superfluous '/' to make compares easier
+  prefix=`echo "$prefix" | sed 's,//*,/,g' | sed -e 's,/$,,'`
+  exec_prefix=`echo "$exec_prefix" | sed 's,//*,/,g' | sed -e 's,/$,,'`
+  given_prefix=`echo "$given_prefix" | sed 's,//*,/,g' | sed -e 's,/$,,'`
+
+  AC_SUBST(KDECONFIG)
+  AC_SUBST(kde_libs_prefix)
+  AC_SUBST(kde_libs_htmldir)
+
+  KDE_FAST_CONFIGURE
+  KDE_CONF_FILES
+])
+
+pushdef([AC_PROG_INSTALL],
+[
+  dnl our own version, testing for a -p flag
+  popdef([AC_PROG_INSTALL])
+  dnl as AC_PROG_INSTALL works as it works we first have
+  dnl to save if the user didn't specify INSTALL, as the
+  dnl autoconf one overwrites INSTALL and we have no chance to find
+  dnl out afterwards
+  test -n "$INSTALL" && kde_save_INSTALL_given=$INSTALL
+  test -n "$INSTALL_PROGRAM" && kde_save_INSTALL_PROGRAM_given=$INSTALL_PROGRAM
+  test -n "$INSTALL_SCRIPT" && kde_save_INSTALL_SCRIPT_given=$INSTALL_SCRIPT
+  AC_PROG_INSTALL
+
+  if test -z "$kde_save_INSTALL_given" ; then
+    # OK, user hasn't given any INSTALL, autoconf found one for us
+    # now we test, if it supports the -p flag
+    AC_MSG_CHECKING(for -p flag to install)
+    rm -f confinst.$$.* > /dev/null 2>&1
+    echo "Testtest" > confinst.$$.orig
+    ac_res=no
+    if ${INSTALL} -p confinst.$$.orig confinst.$$.new > /dev/null 2>&1 ; then
+      if test -f confinst.$$.new ; then
+        # OK, -p seems to do no harm to install
+	INSTALL="${INSTALL} -p"
+	ac_res=yes
+      fi
+    fi
+    rm -f confinst.$$.*
+    AC_MSG_RESULT($ac_res)
+  fi
+  dnl the following tries to resolve some signs and wonders coming up
+  dnl with different autoconf/automake versions
+  dnl e.g.:
+  dnl  *automake 1.4 install-strip sets A_M_INSTALL_PROGRAM_FLAGS to -s
+  dnl   and has INSTALL_PROGRAM = @INSTALL_PROGRAM@ $(A_M_INSTALL_PROGRAM_FLAGS)
+  dnl   it header-vars.am, so there the actual INSTALL_PROGRAM gets the -s
+  dnl  *automake 1.4a (and above) use INSTALL_STRIP_FLAG and only has
+  dnl   INSTALL_PROGRAM = @INSTALL_PROGRAM@ there, but changes the
+  dnl   install-@DIR@PROGRAMS targets to explicitly use that flag
+  dnl  *autoconf 2.13 is dumb, and thinks it can use INSTALL_PROGRAM as
+  dnl   INSTALL_SCRIPT, which breaks with automake <= 1.4
+  dnl  *autoconf >2.13 (since 10.Apr 1999) has not that failure
+  dnl  *sometimes KDE does not use the install-@DIR@PROGRAM targets from
+  dnl   automake (due to broken Makefile.am or whatever) to install programs,
+  dnl   and so does not see the -s flag in automake > 1.4
+  dnl to clean up that mess we:
+  dnl  +set INSTALL_PROGRAM to use INSTALL_STRIP_FLAG
+  dnl   which cleans KDE's program with automake > 1.4;
+  dnl  +set INSTALL_SCRIPT to only use INSTALL, to clean up autoconf's problems
+  dnl   with automake<=1.4
+  dnl  note that dues to this sometimes two '-s' flags are used (if KDE
+  dnl   properly uses install-@DIR@PROGRAMS, but I don't care
+  dnl
+  dnl And to all this comes, that I even can't write in comments variable
+  dnl  names used by automake, because it is so stupid to think I wanted to
+  dnl  _use_ them, therefor I have written A_M_... instead of AM_
+  dnl hmm, I wanted to say something ... ahh yes: Arghhh.
+
+  if test -z "$kde_save_INSTALL_PROGRAM_given" ; then
+    INSTALL_PROGRAM='${INSTALL} $(INSTALL_STRIP_FLAG)'
+  fi
+  if test -z "$kde_save_INSTALL_SCRIPT_given" ; then
+    INSTALL_SCRIPT='${INSTALL}'
+  fi
+])dnl
+
+AC_DEFUN([KDE_LANG_CPLUSPLUS],
+[AC_LANG_CPLUSPLUS
+ac_link='rm -rf SunWS_cache; ${CXX-g++} -o conftest${ac_exeext} $CXXFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&AC_FD_CC'
+pushdef([AC_LANG_CPLUSPLUS], [popdef([AC_LANG_CPLUSPLUS]) KDE_LANG_CPLUSPLUS])
+])
+
+pushdef([AC_LANG_CPLUSPLUS],
+[popdef([AC_LANG_CPLUSPLUS])
+KDE_LANG_CPLUSPLUS
+])
+
+AC_DEFUN([KDE_CHECK_LONG_LONG],
+[
+AC_MSG_CHECKING(for long long)
+AC_CACHE_VAL(kde_cv_c_long_long,
+[
+  AC_LANG_SAVE
+  AC_LANG_CPLUSPLUS
+  AC_TRY_LINK([], [
+  long long foo = 0;
+  foo = foo+1;
+  ],
+  kde_cv_c_long_long=yes, kde_cv_c_long_long=no)
+  AC_LANG_RESTORE
+])
+AC_MSG_RESULT($kde_cv_c_long_long)
+if test "$kde_cv_c_long_long" = yes; then
+   AC_DEFINE(HAVE_LONG_LONG, 1, [Define if you have long long as datatype])
+fi
+])
+
+AC_DEFUN([KDE_CHECK_LIB],
+[
+     kde_save_LDFLAGS="$LDFLAGS"
+     dnl AC_CHECK_LIB modifies LIBS, so save it here
+     kde_save_LIBS="$LIBS"
+     LDFLAGS="$LDFLAGS $all_libraries"
+     case $host_os in
+      aix*) LDFLAGS="-brtl $LDFLAGS"
+	test "$GCC" = yes && LDFLAGS="-Wl,$LDFLAGS"
+	;;
+     esac
+     AC_CHECK_LIB($1, $2, $3, $4, $5)
+     LDFLAGS="$kde_save_LDFLAGS"
+     LIBS="$kde_save_LIBS"
+])
+
+AC_DEFUN([KDE_JAVA_PREFIX],
+[
+	dir=`dirname "$1"`
+	base=`basename "$1"`
+	list=`ls -1 $dir 2> /dev/null`
+	for entry in $list; do 
+		if test -d $dir/$entry/bin; then
+			case $entry in
+			   $base)
+				javadirs="$javadirs $dir/$entry/bin"
+				;;
+			esac
+		elif test -d $dir/$entry/jre/bin; then
+			case $entry in
+			   $base)
+				javadirs="$javadirs $dir/$entry/jre/bin"
+				;;
+			esac
+		fi
+	done
+])
+
+dnl KDE_CHEC_JAVA_DIR(onlyjre)
+AC_DEFUN([KDE_CHECK_JAVA_DIR],
+[
+
+AC_ARG_WITH(java,
+AC_HELP_STRING([--with-java=javadir],[use java installed in javadir, --without-java disables]),
+[  ac_java_dir=$withval
+], ac_java_dir=""
+)
+
+AC_MSG_CHECKING([for Java])
+
+dnl at this point ac_java_dir is either a dir, 'no' to disable, or '' to say look in $PATH
+if test "x$ac_java_dir" = "xno"; then
+   kde_java_bindir=no
+   kde_java_includedir=no
+   kde_java_libjvmdir=no
+   kde_java_libgcjdir=no
+   kde_java_libhpidir=no
+else
+  if test "x$ac_java_dir" = "x"; then
+     
+     
+      dnl No option set -> collect list of candidate paths
+      if test -n "$JAVA_HOME"; then
+        KDE_JAVA_PREFIX($JAVA_HOME)
+      fi
+      KDE_JAVA_PREFIX(/usr/j2se)
+      KDE_JAVA_PREFIX(/usr/lib/j2se)
+      KDE_JAVA_PREFIX(/usr/j*dk*)
+      KDE_JAVA_PREFIX(/usr/lib/j*dk*)
+      KDE_JAVA_PREFIX(/opt/j*sdk*)
+      KDE_JAVA_PREFIX(/usr/lib/java*)
+      KDE_JAVA_PREFIX(/usr/java*)
+      KDE_JAVA_PREFIX(/usr/java/j*dk*)
+      KDE_JAVA_PREFIX(/usr/java/j*re*)
+      KDE_JAVA_PREFIX(/usr/lib/SunJava2*)
+      KDE_JAVA_PREFIX(/usr/lib/SunJava*)
+      KDE_JAVA_PREFIX(/usr/lib/IBMJava2*)
+      KDE_JAVA_PREFIX(/usr/lib/IBMJava*)
+      KDE_JAVA_PREFIX(/opt/java*)
+
+      kde_cv_path="NONE"
+      kde_save_IFS=$IFS
+      IFS=':'
+      for dir in $PATH; do
+	  if test -d "$dir"; then
+	      javadirs="$javadirs $dir"
+	  fi
+      done
+      IFS=$kde_save_IFS
+      jredirs=
+
+      dnl Now javadirs contains a list of paths that exist, all ending with bin/
+      for dir in $javadirs; do
+          dnl Check for the java executable
+	  if test -x "$dir/java"; then
+	      dnl And also check for a libjvm.so somewhere under there
+	      dnl Since we have to go to the parent dir, /usr/bin is excluded, /usr is too big.
+              if test "$dir" != "/usr/bin"; then
+                  libjvmdir=`find $dir/.. -name libjvm.so | sed 's,libjvm.so,,'|head -n 1`
+		  if test ! -f $libjvmdir/libjvm.so; then continue; fi
+		  jredirs="$jredirs $dir"
+	      fi
+	  fi
+      done
+
+      dnl Now jredirs contains a reduced list, of paths where both java and ../**/libjvm.so was found
+      JAVAC=
+      JAVA=
+      kde_java_bindir=no
+      for dir in $jredirs; do
+	  JAVA="$dir/java"
+	  kde_java_bindir=$dir
+	  if test -x "$dir/javac"; then
+		JAVAC="$dir/javac"
+                break
+	  fi
+      done
+
+      if test -n "$JAVAC"; then
+          dnl this substitution might not work - well, we test for jni.h below
+          kde_java_includedir=`echo $JAVAC | sed -e 's,bin/javac$,include/,'`
+      else
+          kde_java_includedir=no
+      fi
+  else
+    dnl config option set
+    kde_java_bindir=$ac_java_dir/bin
+    if test -x $ac_java_dir/bin/java && test ! -x $ac_java_dir/bin/javac; then
+	kde_java_includedir=no
+    else
+        kde_java_includedir=$ac_java_dir/include
+    fi
+  fi
+fi
+
+dnl At this point kde_java_bindir and kde_java_includedir are either set or "no"
+if test "x$kde_java_bindir" != "xno"; then
+
+  dnl Look for libjvm.so
+  kde_java_libjvmdir=`find $kde_java_bindir/.. -name libjvm.so | sed 's,libjvm.so,,'|head -n 1`
+  dnl Look for libgcj.so
+  kde_java_libgcjdir=`find $kde_java_bindir/.. -name libgcj.so | sed 's,libgcj.so,,'|head -n 1`
+  dnl Look for libhpi.so and avoid green threads
+  kde_java_libhpidir=`find $kde_java_bindir/.. -name libhpi.so | grep -v green | sed 's,libhpi.so,,' | head -n 1`
+
+  dnl Now check everything's fine under there
+  dnl the include dir is our flag for having the JDK
+  if test -d "$kde_java_includedir"; then
+    if test ! -x "$kde_java_bindir/javac"; then
+      AC_MSG_ERROR([javac not found under $kde_java_bindir - it seems you passed a wrong --with-java.])
+    fi
+    if test ! -x "$kde_java_bindir/javah"; then
+      AC_MSG_ERROR([javah not found under $kde_java_bindir. javac was found though! Use --with-java or --without-java.])
+    fi
+    if test ! -x "$kde_java_bindir/jar"; then
+      AC_MSG_ERROR([jar not found under $kde_java_bindir. javac was found though! Use --with-java or --without-java.])
+    fi
+    if test ! -r "$kde_java_includedir/jni.h"; then
+      AC_MSG_ERROR([jni.h not found under $kde_java_includedir. Use --with-java or --without-java.])
+    fi
+
+    jni_includes="-I$kde_java_includedir"
+    dnl Strange thing, jni.h requires jni_md.h which is under genunix here..
+    dnl and under linux here.. 
+    
+    dnl not needed for gcj
+
+    if test "x$kde_java_libgcjdir" = "x"; then 
+      test -d "$kde_java_includedir/linux" && jni_includes="$jni_includes -I$kde_java_includedir/linux"
+      test -d "$kde_java_includedir/solaris" && jni_includes="$jni_includes -I$kde_java_includedir/solaris"
+      test -d "$kde_java_includedir/genunix" && jni_includes="$jni_includes -I$kde_java_includedir/genunix"
+    fi
+
+  else
+    JAVAC=
+    jni_includes=
+  fi
+
+  if test "x$kde_java_libgcjdir" = "x"; then 
+     if test ! -r "$kde_java_libjvmdir/libjvm.so"; then
+        AC_MSG_ERROR([libjvm.so not found under $kde_java_libjvmdir. Use --without-java.])
+     fi 
+  else
+     if test ! -r "$kde_java_libgcjdir/libgcj.so"; then
+        AC_MSG_ERROR([libgcj.so not found under $kde_java_libgcjdir. Use --without-java.])
+     fi 
+  fi
+
+  if test ! -x "$kde_java_bindir/java"; then
+      AC_MSG_ERROR([java not found under $kde_java_bindir. javac was found though! Use --with-java or --without-java.])
+  fi
+
+  dnl not needed for gcj compile
+
+  if test "x$kde_java_libgcjdir" = "x"; then 
+      if test ! -r "$kde_java_libhpidir/libhpi.so"; then
+        AC_MSG_ERROR([libhpi.so not found under $kde_java_libhpidir. Use --without-java.])
+      fi
+  fi
+
+  if test -n "$jni_includes"; then
+    dnl Check for JNI version
+    AC_LANG_SAVE
+    AC_LANG_CPLUSPLUS
+    ac_cxxflags_safe="$CXXFLAGS"
+    CXXFLAGS="$CXXFLAGS $all_includes $jni_includes"
+
+    AC_TRY_COMPILE([
+  #include <jni.h>
+	      ],
+	      [
+  #ifndef JNI_VERSION_1_2
+  Syntax Error
+  #endif
+	      ],[ kde_jni_works=yes ],
+	      [ kde_jni_works=no ])
+
+    if test $kde_jni_works = no; then
+      AC_MSG_ERROR([Incorrect version of $kde_java_includedir/jni.h.
+		    You need to have Java Development Kit (JDK) version 1.2. 
+
+		    Use --with-java to specify another location.
+		    Use --without-java to configure without java support.
+		    Or download a newer JDK and try again. 
+		    See e.g. http://java.sun.com/products/jdk/1.2 ])
+    fi
+
+    CXXFLAGS="$ac_cxxflags_safe"    
+    AC_LANG_RESTORE
+
+    dnl All tests ok, inform and subst the variables
+
+    JAVAC=$kde_java_bindir/javac
+    JAVAH=$kde_java_bindir/javah
+    JAR=$kde_java_bindir/jar
+    AC_DEFINE_UNQUOTED(PATH_JAVA, "$kde_java_bindir/java", [Define where your java executable is])
+    if test "x$kde_java_libgcjdir" = "x"; then 
+      JVMLIBS="-L$kde_java_libjvmdir -ljvm -L$kde_java_libhpidir -lhpi"
+    else
+      JVMLIBS="-L$kde_java_libgcjdir -lgcj"
+    fi
+    AC_MSG_RESULT([java JDK in $kde_java_bindir])
+
+  else
+      AC_DEFINE_UNQUOTED(PATH_JAVA, "$kde_java_bindir/java", [Define where your java executable is])
+      AC_MSG_RESULT([java JRE in $kde_java_bindir])
+  fi
+elif test -d "/Library/Java/Home"; then
+  kde_java_bindir="/Library/Java/Home/bin"
+  jni_includes="-I/Library/Java/Home/include"
+
+  JAVAC=$kde_java_bindir/javac
+  JAVAH=$kde_java_bindir/javah
+  JAR=$kde_java_bindir/jar
+  JVMLIBS="-Wl,-framework,JavaVM"
+
+  AC_DEFINE_UNQUOTED(PATH_JAVA, "$kde_java_bindir/java", [Define where your java executable is])
+  AC_MSG_RESULT([Apple Java Framework])
+else
+  AC_MSG_RESULT([none found])
+fi
+
+AC_SUBST(JAVAC)
+AC_SUBST(JAVAH)
+AC_SUBST(JAR)
+AC_SUBST(JVMLIBS)
+AC_SUBST(jni_includes)
+
+# for backward compat
+kde_cv_java_includedir=$kde_java_includedir
+kde_cv_java_bindir=$kde_java_bindir
+])
+
+dnl this is a redefinition of autoconf 2.5x's AC_FOREACH.
+dnl When the argument list becomes big, as in KDE for AC_OUTPUT in
+dnl big packages, m4_foreach is dog-slow.  So use our own version of
+dnl it.  (matz@kde.org)
+m4_define([mm_foreach],
+[m4_pushdef([$1])_mm_foreach($@)m4_popdef([$1])])
+m4_define([mm_car], [[$1]])
+m4_define([mm_car2], [[$@]])
+m4_define([_mm_foreach],
+[m4_if(m4_quote($2), [], [],
+       [m4_define([$1], mm_car($2))$3[]_mm_foreach([$1],
+                                                   mm_car2(m4_shift($2)),
+                                                   [$3])])])
+m4_define([AC_FOREACH],
+[mm_foreach([$1], m4_split(m4_normalize([$2])), [$3])])
+
+AC_DEFUN([KDE_NEED_FLEX],
+[
+kde_libs_safe=$LIBS
+LIBS="$LIBS $USER_LDFLAGS"
+AM_PROG_LEX
+LIBS=$kde_libs_safe
+if test -z "$LEXLIB"; then
+    AC_MSG_ERROR([You need to have flex installed.])
+fi
+AC_SUBST(LEXLIB)
+])
+
+AC_DEFUN([AC_PATH_QTOPIA],
+[
+  dnl TODO: use AC_CACHE_VAL
+
+  if test -z "$1"; then
+    qtopia_minver_maj=1
+    qtopia_minver_min=5
+    qtopia_minver_pat=0
+  else
+    qtopia_minver_maj=`echo "$1" | sed -e "s/^\(.*\)\..*\..*$/\1/"`
+    qtopia_minver_min=`echo "$1" | sed -e "s/^.*\.\(.*\)\..*$/\1/"`
+    qtopia_minver_pat=`echo "$1" | sed -e "s/^.*\..*\.\(.*\)$/\1/"`
+  fi
+
+  qtopia_minver="$qtopia_minver_maj$qtopia_minver_min$qtopia_minver_pat"
+  qtopia_minverstr="$qtopia_minver_maj.$qtopia_minver_min.$qtopia_minver_pat"
+
+  AC_REQUIRE([AC_PATH_QT])
+
+  AC_MSG_CHECKING([for Qtopia])
+
+  LIB_QTOPIA="-lqpe"
+  AC_SUBST(LIB_QTOPIA)
+
+  kde_qtopia_dirs="$QPEDIR /opt/Qtopia"
+
+  ac_qtopia_incdir=NO
+
+  AC_ARG_WITH(qtopia-dir,
+              AC_HELP_STRING([--with-qtopia-dir=DIR],[where the root of Qtopia is installed]),
+              [  ac_qtopia_incdir="$withval"/include] ) 
+  
+  qtopia_incdirs=""
+  for dir in $kde_qtopia_dirs; do
+    qtopia_incdirs="$qtopia_incdirs $dir/include"
+  done
+
+  if test ! "$ac_qtopia_incdir" = "NO"; then
+    qtopia_incdirs="$ac_qtopia_incdir $qtopia_incdirs"
+  fi
+
+  qtopia_incdir=""
+  AC_FIND_FILE(qpe/qpeapplication.h, $qtopia_incdirs, qtopia_incdir)
+  ac_qtopia_incdir="$qtopia_incdir"
+
+  if test -z "$qtopia_incdir"; then
+    AC_MSG_ERROR([Cannot find Qtopia headers. Please check your installation.])
+  fi
+
+  qtopia_ver_maj=`cat $qtopia_incdir/qpe/version.h | sed -n -e 's,.*QPE_VERSION "\(.*\)\..*\..*".*,\1,p'`;
+  qtopia_ver_min=`cat $qtopia_incdir/qpe/version.h | sed -n -e 's,.*QPE_VERSION ".*\.\(.*\)\..*".*,\1,p'`;
+  qtopia_ver_pat=`cat $qtopia_incdir/qpe/version.h | sed -n -e 's,.*QPE_VERSION ".*\..*\.\(.*\)".*,\1,p'`;
+
+  qtopia_ver="$qtopia_ver_maj$qtopia_ver_min$qtopia_ver_pat"
+  qtopia_verstr="$qtopia_ver_maj.$qtopia_ver_min.$qtopia_ver_pat"
+  if test "$qtopia_ver" -lt "$qtopia_minver"; then
+    AC_MSG_ERROR([found Qtopia version $qtopia_verstr but version $qtopia_minverstr
+is required.])
+  fi
+
+  AC_LANG_SAVE
+  AC_LANG_CPLUSPLUS
+
+  ac_cxxflags_safe="$CXXFLAGS"
+  ac_ldflags_safe="$LDFLAGS"
+  ac_libs_safe="$LIBS"
+
+  CXXFLAGS="$CXXFLAGS -I$qtopia_incdir $all_includes"
+  LDFLAGS="$LDFLAGS $QT_LDFLAGS $all_libraries $USER_LDFLAGS $KDE_MT_LDFLAGS"
+  LIBS="$LIBS $LIB_QTOPIA $LIBQT"
+
+  cat > conftest.$ac_ext <<EOF
+#include "confdefs.h"
+#include <qpe/qpeapplication.h>
+#include <qpe/version.h>
+
+int main( int argc, char **argv )
+{
+    QPEApplication app( argc, argv );
+    return 0;
+}
+EOF
+
+  if AC_TRY_EVAL(ac_link) && test -s conftest; then
+    rm -f conftest*
+  else
+    rm -f conftest*
+    AC_MSG_ERROR([Cannot link small Qtopia Application. For more details look at
+the end of config.log])
+  fi
+
+  CXXFLAGS="$ac_cxxflags_safe"
+  LDFLAGS="$ac_ldflags_safe"
+  LIBS="$ac_libs_safe"
+
+  AC_LANG_RESTORE
+
+  QTOPIA_INCLUDES="-I$qtopia_incdir"
+  AC_SUBST(QTOPIA_INCLUDES)
+
+  AC_MSG_RESULT([found version $qtopia_verstr with headers at $qtopia_incdir])
+])
+
+
+AC_DEFUN([KDE_INIT_DOXYGEN],
+[
+AC_MSG_CHECKING([for Qt docs])
+kde_qtdir=
+if test "${with_qt_dir+set}" = set; then
+  kde_qtdir="$with_qt_dir"
+fi
+
+AC_FIND_FILE(qsql.html, [ $kde_qtdir/doc/html $QTDIR/doc/html /usr/share/doc/packages/qt3/html /usr/lib/qt/doc /usr/lib/qt3/doc /usr/lib/qt3/doc/html /usr/doc/qt3/html /usr/doc/qt3 /usr/share/doc/qt3-doc /usr/share/qt3/doc/html /usr/X11R6/share/doc/qt/html ], QTDOCDIR)
+AC_MSG_RESULT($QTDOCDIR)
+
+AC_SUBST(QTDOCDIR)
+
+KDE_FIND_PATH(dot, DOT, [], [])
+if test -n "$DOT"; then
+  KDE_HAVE_DOT="YES"
+else
+  KDE_HAVE_DOT="NO"
+fi
+AC_SUBST(KDE_HAVE_DOT)
+KDE_FIND_PATH(doxygen, DOXYGEN, [], [])
+AC_SUBST(DOXYGEN)
+
+DOXYGEN_PROJECT_NAME="$1"
+DOXYGEN_PROJECT_NUMBER="$2"
+AC_SUBST(DOXYGEN_PROJECT_NAME)
+AC_SUBST(DOXYGEN_PROJECT_NUMBER)
+
+KDE_HAS_DOXYGEN=no
+if test -n "$DOXYGEN" && test -x "$DOXYGEN" && test -f $QTDOCDIR/qsql.html; then
+  KDE_HAS_DOXYGEN=yes
+fi
+AC_SUBST(KDE_HAS_DOXYGEN)
+
+])
+
+
+AC_DEFUN([AC_FIND_BZIP2],
+[
+AC_MSG_CHECKING([for bzDecompress in libbz2])
+AC_CACHE_VAL(ac_cv_lib_bzip2,
+[
+AC_LANG_SAVE
+AC_LANG_CPLUSPLUS
+kde_save_LIBS="$LIBS"
+LIBS="$all_libraries $USER_LDFLAGS -lbz2 $LIBSOCKET"
+kde_save_CXXFLAGS="$CXXFLAGS"
+CXXFLAGS="$CXXFLAGS $all_includes $USER_INCLUDES"
+AC_TRY_LINK(dnl
+[
+#define BZ_NO_STDIO
+#include<bzlib.h>
+],
+            [ bz_stream s; (void) bzDecompress(&s); ],
+            eval "ac_cv_lib_bzip2='-lbz2'",
+            eval "ac_cv_lib_bzip2=no")
+LIBS="$kde_save_LIBS"
+CXXFLAGS="$kde_save_CXXFLAGS"
+AC_LANG_RESTORE
+])dnl
+AC_MSG_RESULT($ac_cv_lib_bzip2)
+
+if test ! "$ac_cv_lib_bzip2" = no; then
+  BZIP2DIR=bzip2
+
+  LIBBZ2="$ac_cv_lib_bzip2"
+  AC_SUBST(LIBBZ2)
+
+else
+
+   cxx_shared_flag=
+   ld_shared_flag=
+   KDE_CHECK_COMPILER_FLAG(shared, [
+	ld_shared_flag="-shared"
+   ])
+   KDE_CHECK_COMPILER_FLAG(fPIC, [
+        cxx_shared_flag="-fPIC"
+   ])
+
+   AC_MSG_CHECKING([for BZ2_bzDecompress in (shared) libbz2])
+   AC_CACHE_VAL(ac_cv_lib_bzip2_prefix,
+   [
+   AC_LANG_SAVE
+   AC_LANG_CPLUSPLUS
+   kde_save_LIBS="$LIBS"
+   LIBS="$all_libraries $USER_LDFLAGS $ld_shared_flag -lbz2 $LIBSOCKET"
+   kde_save_CXXFLAGS="$CXXFLAGS"
+   CXXFLAGS="$CFLAGS $cxx_shared_flag $all_includes $USER_INCLUDES"
+
+   AC_TRY_LINK(dnl
+   [
+   #define BZ_NO_STDIO
+   #include<bzlib.h>
+   ],
+               [ bz_stream s; (void) BZ2_bzDecompress(&s); ],
+               eval "ac_cv_lib_bzip2_prefix='-lbz2'",
+               eval "ac_cv_lib_bzip2_prefix=no")
+   LIBS="$kde_save_LIBS"
+   CXXFLAGS="$kde_save_CXXFLAGS"
+   AC_LANG_RESTORE
+   ])dnl
+
+   AC_MSG_RESULT($ac_cv_lib_bzip2_prefix)
+   
+   if test ! "$ac_cv_lib_bzip2_prefix" = no; then
+     BZIP2DIR=bzip2
+    
+     LIBBZ2="$ac_cv_lib_bzip2_prefix"
+     AC_SUBST(LIBBZ2)
+
+     AC_DEFINE(NEED_BZ2_PREFIX, 1, [Define if the libbz2 functions need the BZ2_ prefix])
+   dnl else, we just ignore this
+   fi
+
+fi
+AM_CONDITIONAL(include_BZIP2, test -n "$BZIP2DIR")
+])
+
+dnl ------------------------------------------------------------------------
+dnl Try to find the SSL headers and libraries.
+dnl $(SSL_LDFLAGS) will be -Lsslliblocation (if needed)
+dnl and $(SSL_INCLUDES) will be -Isslhdrlocation (if needed)
+dnl ------------------------------------------------------------------------
+dnl
+AC_DEFUN([KDE_CHECK_SSL],
+[
+LIBSSL="-lssl -lcrypto"
+AC_REQUIRE([KDE_CHECK_LIB64])
+
+ac_ssl_includes=NO ac_ssl_libraries=NO
+ssl_libraries=""
+ssl_includes=""
+AC_ARG_WITH(ssl-dir,
+    AC_HELP_STRING([--with-ssl-dir=DIR],[where the root of OpenSSL is installed]),
+    [  ac_ssl_includes="$withval"/include
+       ac_ssl_libraries="$withval"/lib$kdelibsuff
+    ])
+
+want_ssl=yes
+AC_ARG_WITH(ssl,
+    AC_HELP_STRING([--without-ssl],[disable SSL checks]),
+    [want_ssl=$withval])
+
+if test $want_ssl = yes; then
+
+AC_MSG_CHECKING(for OpenSSL)
+
+AC_CACHE_VAL(ac_cv_have_ssl,
+[#try to guess OpenSSL locations
+  
+  ssl_incdirs="/usr/include /usr/local/include /usr/ssl/include /usr/local/ssl/include $prefix/include $kde_extra_includes"
+  ssl_incdirs="$ac_ssl_includes $ssl_incdirs"
+  AC_FIND_FILE(openssl/ssl.h, $ssl_incdirs, ssl_incdir)
+  ac_ssl_includes="$ssl_incdir"
+
+  ssl_libdirs="/usr/lib$kdelibsuff /usr/local/lib$kdelibsuff /usr/ssl/lib$kdelibsuff /usr/local/ssl/lib$kdelibsuff $libdir $prefix/lib$kdelibsuff $exec_prefix/lib$kdelibsuff $kde_extra_libs"
+  if test ! "$ac_ssl_libraries" = "NO"; then
+    ssl_libdirs="$ac_ssl_libraries $ssl_libdirs"
+  fi
+
+  test=NONE
+  ssl_libdir=NONE
+  for dir in $ssl_libdirs; do
+    try="ls -1 $dir/libssl*"
+    if test=`eval $try 2> /dev/null`; then ssl_libdir=$dir; break; else echo "tried $dir" >&AC_FD_CC ; fi
+  done
+
+  ac_ssl_libraries="$ssl_libdir"
+
+  ac_ldflags_safe="$LDFLAGS"
+  ac_libs_safe="$LIBS"
+
+  LDFLAGS="$LDFLAGS -L$ssl_libdir $all_libraries"
+  LIBS="$LIBS $LIBSSL -lRSAglue -lrsaref"
+
+  AC_TRY_LINK(,void RSAPrivateEncrypt(void);RSAPrivateEncrypt();,
+  ac_ssl_rsaref="yes"
+  ,
+  ac_ssl_rsaref="no"
+  )
+
+  LDFLAGS="$ac_ldflags_safe"
+  LIBS="$ac_libs_safe"
+
+  if test "$ac_ssl_includes" = NO || test "$ac_ssl_libraries" = NO; then
+    have_ssl=no
+  else
+    have_ssl=yes;
+  fi
+
+  ])
+
+  eval "$ac_cv_have_ssl"
+
+  AC_MSG_RESULT([libraries $ac_ssl_libraries, headers $ac_ssl_includes])
+
+  AC_MSG_CHECKING([whether OpenSSL uses rsaref])
+  AC_MSG_RESULT($ac_ssl_rsaref)
+
+  AC_MSG_CHECKING([for easter eggs])
+  AC_MSG_RESULT([none found])
+
+else
+  have_ssl=no
+fi
+
+if test "$have_ssl" = yes; then
+  AC_MSG_CHECKING(for OpenSSL version)
+  dnl Check for SSL version
+  AC_CACHE_VAL(ac_cv_ssl_version,
+  [
+
+    cat >conftest.$ac_ext <<EOF
+#include <openssl/opensslv.h>
+#include <stdio.h>
+    int main() {
+ 
+#ifndef OPENSSL_VERSION_NUMBER
+      printf("ssl_version=\\"error\\"\n");
+#else
+      if (OPENSSL_VERSION_NUMBER < 0x00906000)
+        printf("ssl_version=\\"old\\"\n");
+      else
+        printf("ssl_version=\\"ok\\"\n");
+#endif
+     return (0);
+    }
+EOF
+
+    ac_save_CPPFLAGS=$CPPFLAGS
+    if test "$ac_ssl_includes" != "/usr/include"; then
+        CPPFLAGS="$CPPFLAGS -I$ac_ssl_includes"
+    fi
+
+    if AC_TRY_EVAL(ac_link); then 
+
+      if eval `./conftest 2>&5`; then
+        if test $ssl_version = error; then
+          AC_MSG_ERROR([$ssl_incdir/openssl/opensslv.h doesn't define OPENSSL_VERSION_NUMBER !])
+        else
+          if test $ssl_version = old; then
+            AC_MSG_WARN([OpenSSL version too old. Upgrade to 0.9.6 at least, see http://www.openssl.org. SSL support disabled.])
+            have_ssl=no
+          fi
+        fi
+        ac_cv_ssl_version="ssl_version=$ssl_version"
+      else
+        AC_MSG_ERROR([Your system couldn't run a small SSL test program.
+        Check config.log, and if you can't figure it out, send a mail to 
+        David Faure <faure@kde.org>, attaching your config.log])
+      fi
+
+    else
+      AC_MSG_ERROR([Your system couldn't link a small SSL test program.
+      Check config.log, and if you can't figure it out, send a mail to 
+      David Faure <faure@kde.org>, attaching your config.log])
+    fi 
+    CPPFLAGS=$ac_save_CPPFLAGS
+
+  ])
+
+  eval "$ac_cv_ssl_version"
+  AC_MSG_RESULT($ssl_version)
+fi
+
+if test "$have_ssl" != yes; then
+  LIBSSL="";
+else
+  AC_DEFINE(HAVE_SSL, 1, [If we are going to use OpenSSL])
+  ac_cv_have_ssl="have_ssl=yes \
+    ac_ssl_includes=$ac_ssl_includes ac_ssl_libraries=$ac_ssl_libraries ac_ssl_rsaref=$ac_ssl_rsaref"
+  
+  
+  ssl_libraries="$ac_ssl_libraries"
+  ssl_includes="$ac_ssl_includes"
+
+  if test "$ac_ssl_rsaref" = yes; then
+    LIBSSL="-lssl -lcrypto -lRSAglue -lrsaref" 
+  fi
+
+  if test $ssl_version = "old"; then
+    AC_DEFINE(HAVE_OLD_SSL_API, 1, [Define if you have OpenSSL < 0.9.6])
+  fi
+fi
+
+SSL_INCLUDES=
+
+if test "$ssl_includes" = "/usr/include"; then
+  if test -f /usr/kerberos/include/krb5.h; then
+	SSL_INCLUDES="-I/usr/kerberos/include"
+  fi
+elif test  "$ssl_includes" != "/usr/local/include" && test -n "$ssl_includes"; then
+  SSL_INCLUDES="-I$ssl_includes"
+fi
+
+if test "$ssl_libraries" = "/usr/lib" || test "$ssl_libraries" = "/usr/local/lib" || test -z "$ssl_libraries" || test "$ssl_libraries" = "NONE"; then
+ SSL_LDFLAGS=""
+else
+ SSL_LDFLAGS="-L$ssl_libraries -R$ssl_libraries"
+fi
+
+AC_SUBST(SSL_INCLUDES)
+AC_SUBST(SSL_LDFLAGS)
+AC_SUBST(LIBSSL)
+])
+
+AC_DEFUN([KDE_CHECK_STRLCPY],
+[
+  AC_REQUIRE([AC_CHECK_STRLCAT])
+  AC_REQUIRE([AC_CHECK_STRLCPY])
+  AC_CHECK_SIZEOF(size_t)
+  AC_CHECK_SIZEOF(unsigned long)
+
+  AC_MSG_CHECKING([sizeof size_t == sizeof unsigned long])
+  AC_TRY_COMPILE(,[
+    #if SIZEOF_SIZE_T != SIZEOF_UNSIGNED_LONG
+       choke me
+    #endif
+    ],AC_MSG_RESULT([yes]),[
+      AC_MSG_RESULT(no)
+      AC_MSG_ERROR([
+       Apparently on your system our assumption sizeof size_t == sizeof unsigned long 
+       does not apply. Please mail kde-devel@kde.org with a description of your system!
+      ])
+  ])
+])
+
+AC_DEFUN([KDE_CHECK_BINUTILS],
+[
+  AC_MSG_CHECKING([if ld supports unversioned version maps])
+
+  kde_save_LDFLAGS="$LDFLAGS"
+  LDFLAGS="$LDFLAGS -Wl,--version-script=conftest.map"
+  echo "{ local: extern \"C++\" { foo }; };" > conftest.map
+  AC_TRY_LINK([int foo;],
+[
+#ifdef __INTEL_COMPILER
+icc apparently does not support libtools version-info and version-script
+at the same time. Dunno where the bug is, but until somebody figured out,
+better disable the optional version scripts.
+#endif
+
+  foo = 42;
+], kde_supports_versionmaps=yes, kde_supports_versionmaps=no)
+  LDFLAGS="$kde_save_LDFLAGS"
+  rm -f conftest.map
+  AM_CONDITIONAL(include_VERSION_SCRIPT, 
+    [test "$kde_supports_versionmaps" = "yes" && test "$kde_use_debug_code" = "no"])
+
+  AC_MSG_RESULT($kde_supports_versionmaps)
+])
+
+AC_DEFUN([AM_PROG_OBJC],[
+AC_CHECK_PROGS(OBJC, gcc, gcc)
+test -z "$OBJC" && AC_MSG_ERROR([no acceptable objective-c gcc found in \$PATH])
+if test "x${OBJCFLAGS-unset}" = xunset; then
+   OBJCFLAGS="-g -O2"
+fi
+AC_SUBST(OBJCFLAGS)
+_AM_IF_OPTION([no-dependencies],, [_AM_DEPENDENCIES(OBJC)])
+])
+
+AC_DEFUN([KDE_CHECK_PERL],
+[
+	KDE_FIND_PATH(perl, PERL, [$bindir $exec_prefix/bin $prefix/bin], [
+		    AC_MSG_ERROR([No Perl found in your $PATH.
+We need perl to generate some code.])
+	])
+    AC_SUBST(PERL)
+])
+
+AC_DEFUN([KDE_CHECK_LARGEFILE],
+[
+AC_SYS_LARGEFILE
+if test "$ac_cv_sys_file_offset_bits" != no; then
+  CPPFLAGS="$CPPFLAGS -D_FILE_OFFSET_BITS=$ac_cv_sys_file_offset_bits"
+fi
+
+if test "x$ac_cv_sys_large_files" != "xno"; then
+  CPPFLAGS="$CPPFLAGS -D_LARGE_FILES=1"
+fi
+
+])
+
+dnl A small extension to PKG_CHECK_MODULES (defined in pkg.m4.in)
+dnl which allows to search for libs that get installed into the KDE prefix.
+dnl
+dnl Syntax:  KDE_PKG_CHECK_MODULES(KSTUFF, libkexif >= 0.2 glib = 1.3.4, action-if, action-not)
+dnl defines KSTUFF_LIBS, KSTUFF_CFLAGS, see pkg-config man page
+dnl also defines KSTUFF_PKG_ERRORS on error
+AC_DEFUN([KDE_PKG_CHECK_MODULES], [
+
+   PKG_CONFIG_PATH="$prefix/lib${kdelibsuff}/pkgconfig:$PKG_CONFIG_PATH"
+   if test "$prefix" != "$kde_libs_prefix"; then
+       PKG_CONFIG_PATH="$kde_libs_prefix/lib${kdelibsuff}/pkgconfig:$PKG_CONFIG_PATH"
+   fi
+   export PKG_CONFIG_PATH
+   PKG_CHECK_MODULES([$1],[$2],[$3],[$4])
+])
+
+
+dnl Check for PIE support in the compiler and linker
+AC_DEFUN([KDE_CHECK_PIE_SUPPORT],
+[
+  AC_CACHE_CHECK([for PIE support], kde_cv_val_pie_support,
+  [
+    AC_LANG_SAVE
+    AC_LANG_CPLUSPLUS
+    safe_CXXFLAGS=$CXXFLAGS
+    safe_LDFLAGS=$LDFLAGS
+    CXXFLAGS="$CXXFLAGS -fPIE"
+    LDFLAGS="$LDFLAGS -pie"
+
+    AC_TRY_LINK([int foo;], [], [kde_cv_val_pie_support=yes], [kde_cv_val_pie_support=no])
+
+    CXXFLAGS=$safe_CXXFLAGS
+    LDFLAGS=$safe_LDFLAGS
+    AC_LANG_RESTORE
+  ])
+
+  AC_MSG_CHECKING(if enabling -pie/fPIE support)
+
+  AC_ARG_ENABLE(pie,
+    AC_HELP_STRING([--enable-pie],[platform supports PIE linking [default=detect]]),
+      [kde_has_pie_support=$enableval],
+      [kde_has_pie_support=detect])
+
+  if test "$kde_has_pie_support" = "detect"; then
+    kde_has_pie_support=$kde_cv_val_pie_support
+  fi
+
+  AC_MSG_RESULT([$kde_has_pie_support])
+
+  KDE_USE_FPIE=""
+  KDE_USE_PIE=""
+
+  AC_SUBST([KDE_USE_FPIE])
+  AC_SUBST([KDE_USE_PIE])
+
+  if test "$kde_has_pie_support" = "yes"; then
+    KDE_USE_FPIE="-fPIE"
+    KDE_USE_PIE="-pie"
+  fi
+])
+# libtool.m4 - Configure libtool for the host system. -*-Autoconf-*-
+## Copyright 1996, 1997, 1998, 1999, 2000, 2001
+## Free Software Foundation, Inc.
+## Originally by Gordon Matzigkeit <gord@gnu.ai.mit.edu>, 1996
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful, but
+## WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+## General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
+##
+## As a special exception to the GNU General Public License, if you
+## distribute this file as part of a program that contains a
+## configuration script generated by Autoconf, you may include it under
+## the same distribution terms that you use for the rest of that program.
+
+# serial 47 AC_PROG_LIBTOOL
+
+
+# AC_PROVIDE_IFELSE(MACRO-NAME, IF-PROVIDED, IF-NOT-PROVIDED)
+# -----------------------------------------------------------
+# If this macro is not defined by Autoconf, define it here.
+m4_ifdef([AC_PROVIDE_IFELSE],
+         [],
+         [m4_define([AC_PROVIDE_IFELSE],
+	         [m4_ifdef([AC_PROVIDE_$1],
+		           [$2], [$3])])])
+
+
+# AC_PROG_LIBTOOL
+# ---------------
+AC_DEFUN([AC_PROG_LIBTOOL],
+[AC_REQUIRE([_AC_PROG_LIBTOOL])dnl
+dnl If AC_PROG_CXX has already been expanded, run AC_LIBTOOL_CXX
+dnl immediately, otherwise, hook it in at the end of AC_PROG_CXX.
+  AC_PROVIDE_IFELSE([AC_PROG_CXX],
+    [AC_LIBTOOL_CXX],
+    [define([AC_PROG_CXX], defn([AC_PROG_CXX])[AC_LIBTOOL_CXX
+  ])])
+dnl And a similar setup for Fortran 77 support
+  AC_PROVIDE_IFELSE([AC_PROG_F77],
+    [AC_LIBTOOL_F77],
+    [define([AC_PROG_F77], defn([AC_PROG_F77])[AC_LIBTOOL_F77
+])])
+
+dnl Quote A][M_PROG_GCJ so that aclocal doesn't bring it in needlessly.
+dnl If either AC_PROG_GCJ or A][M_PROG_GCJ have already been expanded, run
+dnl AC_LIBTOOL_GCJ immediately, otherwise, hook it in at the end of both.
+  AC_PROVIDE_IFELSE([AC_PROG_GCJ],
+    [AC_LIBTOOL_GCJ],
+    [AC_PROVIDE_IFELSE([A][M_PROG_GCJ],
+      [AC_LIBTOOL_GCJ],
+      [AC_PROVIDE_IFELSE([LT_AC_PROG_GCJ],
+	[AC_LIBTOOL_GCJ],
+      [ifdef([AC_PROG_GCJ],
+	     [define([AC_PROG_GCJ], defn([AC_PROG_GCJ])[AC_LIBTOOL_GCJ])])
+       ifdef([A][M_PROG_GCJ],
+	     [define([A][M_PROG_GCJ], defn([A][M_PROG_GCJ])[AC_LIBTOOL_GCJ])])
+       ifdef([LT_AC_PROG_GCJ],
+	     [define([LT_AC_PROG_GCJ],
+		defn([LT_AC_PROG_GCJ])[AC_LIBTOOL_GCJ])])])])
+])])# AC_PROG_LIBTOOL
+
+
+# _AC_PROG_LIBTOOL
+# ----------------
+AC_DEFUN([_AC_PROG_LIBTOOL],
+[AC_REQUIRE([AC_LIBTOOL_SETUP])dnl
+AC_BEFORE([$0],[AC_LIBTOOL_CXX])dnl
+AC_BEFORE([$0],[AC_LIBTOOL_F77])dnl
+AC_BEFORE([$0],[AC_LIBTOOL_GCJ])dnl
+
+# This can be used to rebuild libtool when needed
+LIBTOOL_DEPS="$ac_aux_dir/ltmain.sh"
+
+# Always use our own libtool.
+LIBTOOL='$(SHELL) $(top_builddir)/libtool --silent'
+AC_SUBST(LIBTOOL)dnl
+
+# Prevent multiple expansion
+define([AC_PROG_LIBTOOL], [])
+])# _AC_PROG_LIBTOOL
+
+
+# AC_LIBTOOL_SETUP
+# ----------------
+AC_DEFUN([AC_LIBTOOL_SETUP],
+[AC_PREREQ(2.50)dnl
+AC_REQUIRE([AC_ENABLE_SHARED])dnl
+AC_REQUIRE([AC_ENABLE_STATIC])dnl
+AC_REQUIRE([AC_ENABLE_FAST_INSTALL])dnl
+AC_REQUIRE([AC_CANONICAL_HOST])dnl
+AC_REQUIRE([AC_CANONICAL_BUILD])dnl
+AC_REQUIRE([AC_PROG_CC])dnl
+AC_REQUIRE([AC_PROG_LD])dnl
+AC_REQUIRE([AC_PROG_LD_RELOAD_FLAG])dnl
+AC_REQUIRE([AC_PROG_NM])dnl
+
+AC_REQUIRE([AC_PROG_LN_S])dnl
+AC_REQUIRE([AC_DEPLIBS_CHECK_METHOD])dnl
+# Autoconf 2.13's AC_OBJEXT and AC_EXEEXT macros only works for C compilers!
+AC_REQUIRE([AC_OBJEXT])dnl
+AC_REQUIRE([AC_EXEEXT])dnl
+dnl
+
+AC_LIBTOOL_SYS_MAX_CMD_LEN
+AC_LIBTOOL_SYS_GLOBAL_SYMBOL_PIPE
+AC_LIBTOOL_OBJDIR
+
+AC_REQUIRE([_LT_AC_SYS_COMPILER])dnl
+_LT_AC_PROG_ECHO_BACKSLASH
+
+case $host_os in
+aix3*)
+  # AIX sometimes has problems with the GCC collect2 program.  For some
+  # reason, if we set the COLLECT_NAMES environment variable, the problems
+  # vanish in a puff of smoke.
+  if test "X${COLLECT_NAMES+set}" != Xset; then
+    COLLECT_NAMES=
+    export COLLECT_NAMES
+  fi
+  ;;
+esac
+
+# Sed substitution that helps us do robust quoting.  It backslashifies
+# metacharacters that are still active within double-quoted strings.
+Xsed='sed -e s/^X//'
+[sed_quote_subst='s/\([\\"\\`$\\\\]\)/\\\1/g']
+
+# Same as above, but do not quote variable references.
+[double_quote_subst='s/\([\\"\\`\\\\]\)/\\\1/g']
+
+# Sed substitution to delay expansion of an escaped shell variable in a
+# double_quote_subst'ed string.
+delay_variable_subst='s/\\\\\\\\\\\$/\\\\\\$/g'
+
+# Sed substitution to avoid accidental globbing in evaled expressions
+no_glob_subst='s/\*/\\\*/g'
+
+# Constants:
+rm="rm -f"
+
+# Global variables:
+default_ofile=libtool
+can_build_shared=yes
+
+# All known linkers require a `.a' archive for static linking (except M$VC,
+# which needs '.lib').
+libext=a
+ltmain="$ac_aux_dir/ltmain.sh"
+ofile="$default_ofile"
+with_gnu_ld="$lt_cv_prog_gnu_ld"
+
+AC_CHECK_TOOL(AR, ar, false)
+AC_CHECK_TOOL(RANLIB, ranlib, :)
+AC_CHECK_TOOL(STRIP, strip, :)
+
+old_CC="$CC"
+old_CFLAGS="$CFLAGS"
+
+# Set sane defaults for various variables
+test -z "$AR" && AR=ar
+test -z "$AR_FLAGS" && AR_FLAGS=cru
+test -z "$AS" && AS=as
+test -z "$CC" && CC=cc
+test -z "$LTCC" && LTCC=$CC
+test -z "$DLLTOOL" && DLLTOOL=dlltool
+test -z "$LD" && LD=ld
+test -z "$LN_S" && LN_S="ln -s"
+test -z "$MAGIC_CMD" && MAGIC_CMD=file
+test -z "$NM" && NM=nm
+test -z "$SED" && SED=sed
+test -z "$OBJDUMP" && OBJDUMP=objdump
+test -z "$RANLIB" && RANLIB=:
+test -z "$STRIP" && STRIP=:
+test -z "$ac_objext" && ac_objext=o
+
+# Determine commands to create old-style static archives.
+old_archive_cmds='$AR $AR_FLAGS $oldlib$oldobjs$old_deplibs'
+old_postinstall_cmds='chmod 644 $oldlib'
+old_postuninstall_cmds=
+
+if test -n "$RANLIB"; then
+  case $host_os in
+  openbsd*)
+    old_postinstall_cmds="\$RANLIB -t \$oldlib~$old_postinstall_cmds"
+    ;;
+  *)
+    old_postinstall_cmds="\$RANLIB \$oldlib~$old_postinstall_cmds"
+    ;;
+  esac
+  old_archive_cmds="$old_archive_cmds~\$RANLIB \$oldlib"
+fi
+
+# Only perform the check for file, if the check method requires it
+case $deplibs_check_method in
+file_magic*)
+  if test "$file_magic_cmd" = '$MAGIC_CMD'; then
+    AC_PATH_MAGIC
+  fi
+  ;;
+esac
+
+AC_PROVIDE_IFELSE([AC_LIBTOOL_DLOPEN], enable_dlopen=yes, enable_dlopen=no)
+AC_PROVIDE_IFELSE([AC_LIBTOOL_WIN32_DLL],
+enable_win32_dll=yes, enable_win32_dll=no)
+
+AC_ARG_ENABLE([libtool-lock],
+    [AC_HELP_STRING([--disable-libtool-lock],
+	[avoid locking (might break parallel builds)])])
+test "x$enable_libtool_lock" != xno && enable_libtool_lock=yes
+
+AC_ARG_WITH([pic],
+    [AC_HELP_STRING([--with-pic],
+	[try to use only PIC/non-PIC objects @<:@default=use both@:>@])],
+    [pic_mode="$withval"],
+    [pic_mode=default])
+test -z "$pic_mode" && pic_mode=default
+
+# Use C for the default configuration in the libtool script
+tagname=
+AC_LIBTOOL_LANG_C_CONFIG
+_LT_AC_TAGCONFIG
+])# AC_LIBTOOL_SETUP
+
+
+# _LT_AC_SYS_COMPILER
+# -------------------
+AC_DEFUN([_LT_AC_SYS_COMPILER],
+[AC_REQUIRE([AC_PROG_CC])dnl
+
+# If no C compiler was specified, use CC.
+LTCC=${LTCC-"$CC"}
+
+# Allow CC to be a program name with arguments.
+compiler=$CC
+])# _LT_AC_SYS_COMPILER
+
+
+# _LT_AC_SYS_LIBPATH_AIX
+# ----------------------
+# Links a minimal program and checks the executable
+# for the system default hardcoded library path. In most cases,
+# this is /usr/lib:/lib, but when the MPI compilers are used
+# the location of the communication and MPI libs are included too.
+# If we don't find anything, use the default library path according
+# to the aix ld manual.
+AC_DEFUN([_LT_AC_SYS_LIBPATH_AIX],
+[AC_LINK_IFELSE(AC_LANG_PROGRAM,[
+aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e '/Import File Strings/,/^$/ { /^0/ { s/^0  *\(.*\)$/\1/; p; }
+}'`
+# Check for a 64-bit object if we didn't find anything.
+if test -z "$aix_libpath"; then aix_libpath=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e '/Import File Strings/,/^$/ { /^0/ { s/^0  *\(.*\)$/\1/; p; }
+}'`; fi],[])
+if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi
+])# _LT_AC_SYS_LIBPATH_AIX
+
+
+# _LT_AC_SHELL_INIT(ARG)
+# ----------------------
+AC_DEFUN([_LT_AC_SHELL_INIT],
+[ifdef([AC_DIVERSION_NOTICE],
+	     [AC_DIVERT_PUSH(AC_DIVERSION_NOTICE)],
+	 [AC_DIVERT_PUSH(NOTICE)])
+$1
+AC_DIVERT_POP
+])# _LT_AC_SHELL_INIT
+
+
+# _LT_AC_PROG_ECHO_BACKSLASH
+# --------------------------
+# Add some code to the start of the generated configure script which
+# will find an echo command which doesn't interpret backslashes.
+AC_DEFUN([_LT_AC_PROG_ECHO_BACKSLASH],
+[_LT_AC_SHELL_INIT([
+# Check that we are running under the correct shell.
+SHELL=${CONFIG_SHELL-/bin/sh}
+
+case X$ECHO in
+X*--fallback-echo)
+  # Remove one level of quotation (which was required for Make).
+  ECHO=`echo "$ECHO" | sed 's,\\\\\[$]\\[$]0,'[$]0','`
+  ;;
+esac
+
+echo=${ECHO-echo}
+if test "X[$]1" = X--no-reexec; then
+  # Discard the --no-reexec flag, and continue.
+  shift
+elif test "X[$]1" = X--fallback-echo; then
+  # Avoid inline document here, it may be left over
+  :
+elif test "X`($echo '\t') 2>/dev/null`" = 'X\t' ; then
+  # Yippee, $echo works!
+  :
+else
+  # Restart under the correct shell.
+  exec $SHELL "[$]0" --no-reexec ${1+"[$]@"}
+fi
+
+if test "X[$]1" = X--fallback-echo; then
+  # used as fallback echo
+  shift
+  cat <<EOF
+[$]*
+EOF
+  exit 0
+fi
+
+# The HP-UX ksh and POSIX shell print the target directory to stdout
+# if CDPATH is set.
+if test "X${CDPATH+set}" = Xset; then CDPATH=:; export CDPATH; fi
+
+if test -z "$ECHO"; then
+if test "X${echo_test_string+set}" != Xset; then
+# find a string as large as possible, as long as the shell can cope with it
+  for cmd in 'sed 50q "[$]0"' 'sed 20q "[$]0"' 'sed 10q "[$]0"' 'sed 2q "[$]0"' 'echo test'; do
+    # expected sizes: less than 2Kb, 1Kb, 512 bytes, 16 bytes, ...
+    if (echo_test_string="`eval $cmd`") 2>/dev/null &&
+       echo_test_string="`eval $cmd`" &&
+       (test "X$echo_test_string" = "X$echo_test_string") 2>/dev/null
+    then
+      break
+    fi
+  done
+fi
+
+if test "X`($echo '\t') 2>/dev/null`" = 'X\t' &&
+   echo_testing_string=`($echo "$echo_test_string") 2>/dev/null` &&
+   test "X$echo_testing_string" = "X$echo_test_string"; then
+  :
+else
+  # The Solaris, AIX, and Digital Unix default echo programs unquote
+  # backslashes.  This makes it impossible to quote backslashes using
+  #   echo "$something" | sed 's/\\/\\\\/g'
+  #
+  # So, first we look for a working echo in the user's PATH.
+
+  lt_save_ifs="$IFS"; IFS=$PATH_SEPARATOR
+  for dir in $PATH /usr/ucb; do
+    IFS="$lt_save_ifs"
+    if (test -f $dir/echo || test -f $dir/echo$ac_exeext) &&
+       test "X`($dir/echo '\t') 2>/dev/null`" = 'X\t' &&
+       echo_testing_string=`($dir/echo "$echo_test_string") 2>/dev/null` &&
+       test "X$echo_testing_string" = "X$echo_test_string"; then
+      echo="$dir/echo"
+      break
+    fi
+  done
+  IFS="$lt_save_ifs"
+
+  if test "X$echo" = Xecho; then
+    # We didn't find a better echo, so look for alternatives.
+    if test "X`(print -r '\t') 2>/dev/null`" = 'X\t' &&
+       echo_testing_string=`(print -r "$echo_test_string") 2>/dev/null` &&
+       test "X$echo_testing_string" = "X$echo_test_string"; then
+      # This shell has a builtin print -r that does the trick.
+      echo='print -r'
+    elif (test -f /bin/ksh || test -f /bin/ksh$ac_exeext) &&
+	 test "X$CONFIG_SHELL" != X/bin/ksh; then
+      # If we have ksh, try running configure again with it.
+      ORIGINAL_CONFIG_SHELL=${CONFIG_SHELL-/bin/sh}
+      export ORIGINAL_CONFIG_SHELL
+      CONFIG_SHELL=/bin/ksh
+      export CONFIG_SHELL
+      exec $CONFIG_SHELL "[$]0" --no-reexec ${1+"[$]@"}
+    else
+      # Try using printf.
+      echo='printf %s\n'
+      if test "X`($echo '\t') 2>/dev/null`" = 'X\t' &&
+	 echo_testing_string=`($echo "$echo_test_string") 2>/dev/null` &&
+	 test "X$echo_testing_string" = "X$echo_test_string"; then
+	# Cool, printf works
+	:
+      elif echo_testing_string=`($ORIGINAL_CONFIG_SHELL "[$]0" --fallback-echo '\t') 2>/dev/null` &&
+	   test "X$echo_testing_string" = 'X\t' &&
+	   echo_testing_string=`($ORIGINAL_CONFIG_SHELL "[$]0" --fallback-echo "$echo_test_string") 2>/dev/null` &&
+	   test "X$echo_testing_string" = "X$echo_test_string"; then
+	CONFIG_SHELL=$ORIGINAL_CONFIG_SHELL
+	export CONFIG_SHELL
+	SHELL="$CONFIG_SHELL"
+	export SHELL
+	echo="$CONFIG_SHELL [$]0 --fallback-echo"
+      elif echo_testing_string=`($CONFIG_SHELL "[$]0" --fallback-echo '\t') 2>/dev/null` &&
+	   test "X$echo_testing_string" = 'X\t' &&
+	   echo_testing_string=`($CONFIG_SHELL "[$]0" --fallback-echo "$echo_test_string") 2>/dev/null` &&
+	   test "X$echo_testing_string" = "X$echo_test_string"; then
+	echo="$CONFIG_SHELL [$]0 --fallback-echo"
+      else
+	# maybe with a smaller string...
+	prev=:
+
+	for cmd in 'echo test' 'sed 2q "[$]0"' 'sed 10q "[$]0"' 'sed 20q "[$]0"' 'sed 50q "[$]0"'; do
+	  if (test "X$echo_test_string" = "X`eval $cmd`") 2>/dev/null
+	  then
+	    break
+	  fi
+	  prev="$cmd"
+	done
+
+	if test "$prev" != 'sed 50q "[$]0"'; then
+	  echo_test_string=`eval $prev`
+	  export echo_test_string
+	  exec ${ORIGINAL_CONFIG_SHELL-${CONFIG_SHELL-/bin/sh}} "[$]0" ${1+"[$]@"}
+	else
+	  # Oops.  We lost completely, so just stick with echo.
+	  echo=echo
+	fi
+      fi
+    fi
+  fi
+fi
+fi
+
+# Copy echo and quote the copy suitably for passing to libtool from
+# the Makefile, instead of quoting the original, which is used later.
+ECHO=$echo
+if test "X$ECHO" = "X$CONFIG_SHELL [$]0 --fallback-echo"; then
+   ECHO="$CONFIG_SHELL \\\$\[$]0 --fallback-echo"
+fi
+
+AC_SUBST(ECHO)
+])])# _LT_AC_PROG_ECHO_BACKSLASH
+
+
+# _LT_AC_LOCK
+# -----------
+AC_DEFUN([_LT_AC_LOCK],
+[AC_ARG_ENABLE([libtool-lock],
+    [AC_HELP_STRING([--disable-libtool-lock],
+	[avoid locking (might break parallel builds)])])
+test "x$enable_libtool_lock" != xno && enable_libtool_lock=yes
+
+# Some flags need to be propagated to the compiler or linker for good
+# libtool support.
+case $host in
+ia64-*-hpux*)
+  # Find out which ABI we are using.
+  echo 'int i;' > conftest.$ac_ext
+  if AC_TRY_EVAL(ac_compile); then
+    case `/usr/bin/file conftest.$ac_objext` in
+    *ELF-32*)
+      HPUX_IA64_MODE="32"
+      ;;
+    *ELF-64*)
+      HPUX_IA64_MODE="64"
+      ;;
+    esac
+  fi
+  rm -rf conftest*
+  ;;
+*-*-irix6*)
+  # Find out which ABI we are using.
+  echo '[#]line __oline__ "configure"' > conftest.$ac_ext
+  if AC_TRY_EVAL(ac_compile); then
+   if test "$lt_cv_prog_gnu_ld" = yes; then
+    case `/usr/bin/file conftest.$ac_objext` in
+    *32-bit*)
+      LD="${LD-ld} -melf32bsmip"
+      ;;
+    *N32*)
+      LD="${LD-ld} -melf32bmipn32"
+      ;;
+    *64-bit*)
+      LD="${LD-ld} -melf64bmip"
+      ;;
+    esac
+   else
+    case `/usr/bin/file conftest.$ac_objext` in
+    *32-bit*)
+      LD="${LD-ld} -32"
+      ;;
+    *N32*)
+      LD="${LD-ld} -n32"
+      ;;
+    *64-bit*)
+      LD="${LD-ld} -64"
+      ;;
+    esac
+   fi
+  fi
+  rm -rf conftest*
+  ;;
+
+x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*|s390*-*linux*|sparc*-*linux*)
+  # Find out which ABI we are using.
+  echo 'int i;' > conftest.$ac_ext
+  if AC_TRY_EVAL(ac_compile); then
+    case "`/usr/bin/file conftest.o`" in
+    *32-bit*)
+      LINUX_64_MODE="32"
+      case $host in
+        x86_64-*linux*)
+          LD="${LD-ld} -m elf_i386"
+          ;;
+        ppc64-*linux*)
+          LD="${LD-ld} -m elf32ppclinux"
+          ;;
+        s390x-*linux*)
+          LD="${LD-ld} -m elf_s390"
+          ;;
+        sparc64-*linux*)
+          LD="${LD-ld} -m elf32_sparc"
+          ;;
+      esac
+      ;;
+    *64-bit*)
+      LINUX_64_MODE="64"
+      case $host in
+        x86_64-*linux*)
+          LD="${LD-ld} -m elf_x86_64"
+          ;;
+        ppc*-*linux*|powerpc*-*linux*)
+          LD="${LD-ld} -m elf64ppc"
+          ;;
+        s390*-*linux*)
+          LD="${LD-ld} -m elf64_s390"
+          ;;
+        sparc*-*linux*)
+          LD="${LD-ld} -m elf64_sparc"
+          ;;
+      esac
+      ;;
+    esac
+  fi
+  rm -rf conftest*
+  ;;
+
+*-*-sco3.2v5*)
+  # On SCO OpenServer 5, we need -belf to get full-featured binaries.
+  SAVE_CFLAGS="$CFLAGS"
+  CFLAGS="$CFLAGS -belf"
+  AC_CACHE_CHECK([whether the C compiler needs -belf], lt_cv_cc_needs_belf,
+    [AC_LANG_PUSH(C)
+     AC_TRY_LINK([],[],[lt_cv_cc_needs_belf=yes],[lt_cv_cc_needs_belf=no])
+     AC_LANG_POP])
+  if test x"$lt_cv_cc_needs_belf" != x"yes"; then
+    # this is probably gcc 2.8.0, egcs 1.0 or newer; no need for -belf
+    CFLAGS="$SAVE_CFLAGS"
+  fi
+  ;;
+AC_PROVIDE_IFELSE([AC_LIBTOOL_WIN32_DLL],
+[*-*-cygwin* | *-*-mingw* | *-*-pw32*)
+  AC_CHECK_TOOL(DLLTOOL, dlltool, false)
+  AC_CHECK_TOOL(AS, as, false)
+  AC_CHECK_TOOL(OBJDUMP, objdump, false)
+  ;;
+  ])
+esac
+
+need_locks="$enable_libtool_lock"
+
+])# _LT_AC_LOCK
+
+
+# AC_LIBTOOL_COMPILER_OPTION(MESSAGE, VARIABLE-NAME, FLAGS,
+#		[OUTPUT-FILE], [ACTION-SUCCESS], [ACTION-FAILURE])
+# ----------------------------------------------------------------
+# Check whether the given compiler option works
+AC_DEFUN([AC_LIBTOOL_COMPILER_OPTION],
+[AC_REQUIRE([LT_AC_PROG_SED])
+AC_CACHE_CHECK([$1], [$2],
+  [$2=no
+  ifelse([$4], , [ac_outfile=conftest.$ac_objext], [ac_outfile=$4])
+   printf "$lt_simple_compile_test_code" > conftest.$ac_ext
+   lt_compiler_flag="$3"
+   # Insert the option either (1) after the last *FLAGS variable, or
+   # (2) before a word containing "conftest.", or (3) at the end.
+   # Note that $ac_compile itself does not contain backslashes and begins
+   # with a dollar sign (not a hyphen), so the echo should work correctly.
+   # The option is referenced via a variable to avoid confusing sed.
+   lt_compile=`echo "$ac_compile" | $SED \
+   -e 's:.*FLAGS}? :&$lt_compiler_flag :; t' \
+   -e 's: [[^ ]]*conftest\.: $lt_compiler_flag&:; t' \
+   -e 's:$: $lt_compiler_flag:'`
+   (eval echo "\"\$as_me:__oline__: $lt_compile\"" >&AS_MESSAGE_LOG_FD)
+   (eval "$lt_compile" 2>conftest.err)
+   ac_status=$?
+   cat conftest.err >&AS_MESSAGE_LOG_FD
+   echo "$as_me:__oline__: \$? = $ac_status" >&AS_MESSAGE_LOG_FD
+   if (exit $ac_status) && test -s "$ac_outfile"; then
+     # The compiler can only warn and ignore the option if not recognized
+     # So say no if there are warnings
+     if test ! -s conftest.err; then
+       $2=yes
+     fi
+   fi
+   $rm conftest*
+])
+
+if test x"[$]$2" = xyes; then
+    ifelse([$5], , :, [$5])
+else
+    ifelse([$6], , :, [$6])
+fi
+])# AC_LIBTOOL_COMPILER_OPTION
+
+
+# AC_LIBTOOL_LINKER_OPTION(MESSAGE, VARIABLE-NAME, FLAGS,
+#                          [ACTION-SUCCESS], [ACTION-FAILURE])
+# ------------------------------------------------------------
+# Check whether the given compiler option works
+AC_DEFUN([AC_LIBTOOL_LINKER_OPTION],
+[AC_CACHE_CHECK([$1], [$2],
+  [$2=no
+   save_LDFLAGS="$LDFLAGS"
+   LDFLAGS="$LDFLAGS $3"
+   printf "$lt_simple_link_test_code" > conftest.$ac_ext
+   if (eval $ac_link 2>conftest.err) && test -s conftest$ac_exeext; then
+     # The compiler can only warn and ignore the option if not recognized
+     # So say no if there are warnings
+     if test -s conftest.err; then
+       # Append any errors to the config.log.
+       cat conftest.err 1>&AS_MESSAGE_LOG_FD
+     else
+       $2=yes
+     fi
+   fi
+   $rm conftest*
+   LDFLAGS="$save_LDFLAGS"
+])
+
+if test x"[$]$2" = xyes; then
+    ifelse([$4], , :, [$4])
+else
+    ifelse([$5], , :, [$5])
+fi
+])# AC_LIBTOOL_LINKER_OPTION
+
+
+# AC_LIBTOOL_SYS_MAX_CMD_LEN
+# --------------------------
+AC_DEFUN([AC_LIBTOOL_SYS_MAX_CMD_LEN],
+[# find the maximum length of command line arguments
+AC_MSG_CHECKING([the maximum length of command line arguments])
+AC_CACHE_VAL([lt_cv_sys_max_cmd_len], [dnl
+  i=0
+  testring="ABCD"
+
+  case $build_os in
+  msdosdjgpp*)
+    # On DJGPP, this test can blow up pretty badly due to problems in libc
+    # (any single argument exceeding 2000 bytes causes a buffer overrun
+    # during glob expansion).  Even if it were fixed, the result of this
+    # check would be larger than it should be.
+    lt_cv_sys_max_cmd_len=12288;    # 12K is about right
+    ;;
+
+  gnu*)
+    # Under GNU Hurd, this test is not required because there is
+    # no limit to the length of command line arguments.
+    # Libtool will interpret -1 as no limit whatsoever
+    lt_cv_sys_max_cmd_len=-1;
+    ;;
+
+  cygwin* | mingw*)
+    # On Win9x/ME, this test blows up -- it succeeds, but takes
+    # about 5 minutes as the teststring grows exponentially.
+    # Worse, since 9x/ME are not pre-emptively multitasking,
+    # you end up with a "frozen" computer, even though with patience
+    # the test eventually succeeds (with a max line length of 256k).
+    # Instead, let's just punt: use the minimum linelength reported by
+    # all of the supported platforms: 8192 (on NT/2K/XP).
+    lt_cv_sys_max_cmd_len=8192;
+    ;;
+
+ *)
+    # If test is not a shell built-in, we'll probably end up computing a
+    # maximum length that is only half of the actual maximum length, but
+    # we can't tell.
+    while (test "X"`$CONFIG_SHELL [$]0 --fallback-echo "X$testring" 2>/dev/null` \
+	       = "XX$testring") >/dev/null 2>&1 &&
+	    new_result=`expr "X$testring" : ".*" 2>&1` &&
+	    lt_cv_sys_max_cmd_len=$new_result &&
+	    test $i != 17 # 1/2 MB should be enough
+    do
+      i=`expr $i + 1`
+      testring=$testring$testring
+    done
+    testring=
+    # Add a significant safety factor because C++ compilers can tack on massive
+    # amounts of additional arguments before passing them to the linker.
+    # It appears as though 1/2 is a usable value.
+    lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 2`
+    ;;
+  esac
+])
+if test -n $lt_cv_sys_max_cmd_len ; then
+  AC_MSG_RESULT($lt_cv_sys_max_cmd_len)
+else
+  AC_MSG_RESULT(none)
+fi
+])# AC_LIBTOOL_SYS_MAX_CMD_LEN
+
+
+# _LT_AC_CHECK_DLFCN
+# --------------------
+AC_DEFUN([_LT_AC_CHECK_DLFCN],
+[AC_CHECK_HEADERS(dlfcn.h)dnl
+])# _LT_AC_CHECK_DLFCN
+
+
+# _LT_AC_TRY_DLOPEN_SELF (ACTION-IF-TRUE, ACTION-IF-TRUE-W-USCORE,
+#                           ACTION-IF-FALSE, ACTION-IF-CROSS-COMPILING)
+# ------------------------------------------------------------------
+AC_DEFUN([_LT_AC_TRY_DLOPEN_SELF],
+[AC_REQUIRE([_LT_AC_CHECK_DLFCN])dnl
+if test "$cross_compiling" = yes; then :
+  [$4]
+else
+  lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
+  lt_status=$lt_dlunknown
+  cat > conftest.$ac_ext <<EOF
+[#line __oline__ "configure"
+#include "confdefs.h"
+
+#if HAVE_DLFCN_H
+#include <dlfcn.h>
+#endif
+
+#include <stdio.h>
+
+#ifdef RTLD_GLOBAL
+#  define LT_DLGLOBAL		RTLD_GLOBAL
+#else
+#  ifdef DL_GLOBAL
+#    define LT_DLGLOBAL		DL_GLOBAL
+#  else
+#    define LT_DLGLOBAL		0
+#  endif
+#endif
+
+/* We may have to define LT_DLLAZY_OR_NOW in the command line if we
+   find out it does not work in some platform. */
+#ifndef LT_DLLAZY_OR_NOW
+#  ifdef RTLD_LAZY
+#    define LT_DLLAZY_OR_NOW		RTLD_LAZY
+#  else
+#    ifdef DL_LAZY
+#      define LT_DLLAZY_OR_NOW		DL_LAZY
+#    else
+#      ifdef RTLD_NOW
+#        define LT_DLLAZY_OR_NOW	RTLD_NOW
+#      else
+#        ifdef DL_NOW
+#          define LT_DLLAZY_OR_NOW	DL_NOW
+#        else
+#          define LT_DLLAZY_OR_NOW	0
+#        endif
+#      endif
+#    endif
+#  endif
+#endif
+
+#ifdef __cplusplus
+extern "C" void exit (int);
+#endif
+
+void fnord() { int i=42;}
+int main ()
+{
+  void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW);
+  int status = $lt_dlunknown;
+
+  if (self)
+    {
+      if (dlsym (self,"fnord"))       status = $lt_dlno_uscore;
+      else if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore;
+      /* dlclose (self); */
+    }
+
+    exit (status);
+}]
+EOF
+  if AC_TRY_EVAL(ac_link) && test -s conftest${ac_exeext} 2>/dev/null; then
+    (./conftest; exit; ) 2>/dev/null
+    lt_status=$?
+    case x$lt_status in
+      x$lt_dlno_uscore) $1 ;;
+      x$lt_dlneed_uscore) $2 ;;
+      x$lt_unknown|x*) $3 ;;
+    esac
+  else :
+    # compilation failed
+    $3
+  fi
+fi
+rm -fr conftest*
+])# _LT_AC_TRY_DLOPEN_SELF
+
+
+# AC_LIBTOOL_DLOPEN_SELF
+# -------------------
+AC_DEFUN([AC_LIBTOOL_DLOPEN_SELF],
+[AC_REQUIRE([_LT_AC_CHECK_DLFCN])dnl
+if test "x$enable_dlopen" != xyes; then
+  enable_dlopen=unknown
+  enable_dlopen_self=unknown
+  enable_dlopen_self_static=unknown
+else
+  lt_cv_dlopen=no
+  lt_cv_dlopen_libs=
+
+  case $host_os in
+  beos*)
+    lt_cv_dlopen="load_add_on"
+    lt_cv_dlopen_libs=
+    lt_cv_dlopen_self=yes
+    ;;
+
+  mingw* | pw32*)
+    lt_cv_dlopen="LoadLibrary"
+    lt_cv_dlopen_libs=
+   ;;
+
+  cygwin*)
+    lt_cv_dlopen="dlopen"
+    lt_cv_dlopen_libs=
+   ;;
+
+  darwin*)
+  # if libdl is installed we need to link against it
+    AC_CHECK_LIB([dl], [dlopen],
+		[lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-ldl"],[
+    lt_cv_dlopen="dyld"
+    lt_cv_dlopen_libs=
+    lt_cv_dlopen_self=yes
+    ])
+   ;;
+    
+  *)
+    AC_CHECK_FUNC([shl_load],
+	  [lt_cv_dlopen="shl_load"],
+      [AC_CHECK_LIB([dld], [shl_load],
+	    [lt_cv_dlopen="shl_load" lt_cv_dlopen_libs="-dld"],
+	[AC_CHECK_FUNC([dlopen],
+	      [lt_cv_dlopen="dlopen"],
+	  [AC_CHECK_LIB([dl], [dlopen],
+		[lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-ldl"],
+	    [AC_CHECK_LIB([svld], [dlopen],
+		  [lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-lsvld"],
+	      [AC_CHECK_LIB([dld], [dld_link],
+		    [lt_cv_dlopen="dld_link" lt_cv_dlopen_libs="-dld"])
+	      ])
+	    ])
+	  ])
+	])
+      ])
+    ;;
+  esac
+
+  if test "x$lt_cv_dlopen" != xno; then
+    enable_dlopen=yes
+  else
+    enable_dlopen=no
+  fi
+
+  case $lt_cv_dlopen in
+  dlopen)
+    save_CPPFLAGS="$CPPFLAGS"
+    test "x$ac_cv_header_dlfcn_h" = xyes && CPPFLAGS="$CPPFLAGS -DHAVE_DLFCN_H"
+
+    save_LDFLAGS="$LDFLAGS"
+    eval LDFLAGS=\"\$LDFLAGS $export_dynamic_flag_spec\"
+
+    save_LIBS="$LIBS"
+    LIBS="$lt_cv_dlopen_libs $LIBS"
+
+    AC_CACHE_CHECK([whether a program can dlopen itself],
+	  lt_cv_dlopen_self, [dnl
+	  _LT_AC_TRY_DLOPEN_SELF(
+	    lt_cv_dlopen_self=yes, lt_cv_dlopen_self=yes,
+	    lt_cv_dlopen_self=no, lt_cv_dlopen_self=cross)
+    ])
+
+    if test "x$lt_cv_dlopen_self" = xyes; then
+      LDFLAGS="$LDFLAGS $link_static_flag"
+      AC_CACHE_CHECK([whether a statically linked program can dlopen itself],
+    	  lt_cv_dlopen_self_static, [dnl
+	  _LT_AC_TRY_DLOPEN_SELF(
+	    lt_cv_dlopen_self_static=yes, lt_cv_dlopen_self_static=yes,
+	    lt_cv_dlopen_self_static=no,  lt_cv_dlopen_self_static=cross)
+      ])
+    fi
+
+    CPPFLAGS="$save_CPPFLAGS"
+    LDFLAGS="$save_LDFLAGS"
+    LIBS="$save_LIBS"
+    ;;
+  esac
+
+  case $lt_cv_dlopen_self in
+  yes|no) enable_dlopen_self=$lt_cv_dlopen_self ;;
+  *) enable_dlopen_self=unknown ;;
+  esac
+
+  case $lt_cv_dlopen_self_static in
+  yes|no) enable_dlopen_self_static=$lt_cv_dlopen_self_static ;;
+  *) enable_dlopen_self_static=unknown ;;
+  esac
+fi
+])# AC_LIBTOOL_DLOPEN_SELF
+
+
+# AC_LIBTOOL_PROG_CC_C_O([TAGNAME])
+# ---------------------------------
+# Check to see if options -c and -o are simultaneously supported by compiler
+AC_DEFUN([AC_LIBTOOL_PROG_CC_C_O],
+[AC_REQUIRE([_LT_AC_SYS_COMPILER])dnl
+AC_CACHE_CHECK([if $compiler supports -c -o file.$ac_objext],
+  [_LT_AC_TAGVAR(lt_cv_prog_compiler_c_o, $1)],
+  [_LT_AC_TAGVAR(lt_cv_prog_compiler_c_o, $1)=no
+   $rm -r conftest 2>/dev/null
+   mkdir conftest
+   cd conftest
+   mkdir out
+   printf "$lt_simple_compile_test_code" > conftest.$ac_ext
+
+   # According to Tom Tromey, Ian Lance Taylor reported there are C compilers
+   # that will create temporary files in the current directory regardless of
+   # the output directory.  Thus, making CWD read-only will cause this test
+   # to fail, enabling locking or at least warning the user not to do parallel
+   # builds.
+   chmod -w .
+
+   lt_compiler_flag="-o out/conftest2.$ac_objext"
+   # Insert the option either (1) after the last *FLAGS variable, or
+   # (2) before a word containing "conftest.", or (3) at the end.
+   # Note that $ac_compile itself does not contain backslashes and begins
+   # with a dollar sign (not a hyphen), so the echo should work correctly.
+   lt_compile=`echo "$ac_compile" | $SED \
+   -e 's:.*FLAGS}? :&$lt_compiler_flag :; t' \
+   -e 's: [[^ ]]*conftest\.: $lt_compiler_flag&:; t' \
+   -e 's:$: $lt_compiler_flag:'`
+   (eval echo "\"\$as_me:__oline__: $lt_compile\"" >&AS_MESSAGE_LOG_FD)
+   (eval "$lt_compile" 2>out/conftest.err)
+   ac_status=$?
+   cat out/conftest.err >&AS_MESSAGE_LOG_FD
+   echo "$as_me:__oline__: \$? = $ac_status" >&AS_MESSAGE_LOG_FD
+   if (exit $ac_status) && test -s out/conftest2.$ac_objext
+   then
+     # The compiler can only warn and ignore the option if not recognized
+     # So say no if there are warnings
+     if test ! -s out/conftest.err; then
+       _LT_AC_TAGVAR(lt_cv_prog_compiler_c_o, $1)=yes
+     fi
+   fi
+   chmod u+w .
+   $rm conftest* out/*
+   rmdir out
+   cd ..
+   rmdir conftest
+   $rm conftest*
+])
+])# AC_LIBTOOL_PROG_CC_C_O
+
+
+# AC_LIBTOOL_SYS_HARD_LINK_LOCKS([TAGNAME])
+# -----------------------------------------
+# Check to see if we can do hard links to lock some files if needed
+AC_DEFUN([AC_LIBTOOL_SYS_HARD_LINK_LOCKS],
+[AC_REQUIRE([_LT_AC_LOCK])dnl
+
+hard_links="nottested"
+if test "$_LT_AC_TAGVAR(lt_cv_prog_compiler_c_o, $1)" = no && test "$need_locks" != no; then
+  # do not overwrite the value of need_locks provided by the user
+  AC_MSG_CHECKING([if we can lock with hard links])
+  hard_links=yes
+  $rm conftest*
+  ln conftest.a conftest.b 2>/dev/null && hard_links=no
+  touch conftest.a
+  ln conftest.a conftest.b 2>&5 || hard_links=no
+  ln conftest.a conftest.b 2>/dev/null && hard_links=no
+  AC_MSG_RESULT([$hard_links])
+  if test "$hard_links" = no; then
+    AC_MSG_WARN([`$CC' does not support `-c -o', so `make -j' may be unsafe])
+    need_locks=warn
+  fi
+else
+  need_locks=no
+fi
+])# AC_LIBTOOL_SYS_HARD_LINK_LOCKS
+
+
+# AC_LIBTOOL_OBJDIR
+# -----------------
+AC_DEFUN([AC_LIBTOOL_OBJDIR],
+[AC_CACHE_CHECK([for objdir], [lt_cv_objdir],
+[rm -f .libs 2>/dev/null
+mkdir .libs 2>/dev/null
+if test -d .libs; then
+  lt_cv_objdir=.libs
+else
+  # MS-DOS does not allow filenames that begin with a dot.
+  lt_cv_objdir=_libs
+fi
+rmdir .libs 2>/dev/null])
+objdir=$lt_cv_objdir
+])# AC_LIBTOOL_OBJDIR
+
+
+# AC_LIBTOOL_PROG_LD_HARDCODE_LIBPATH([TAGNAME])
+# ----------------------------------------------
+# Check hardcoding attributes.
+AC_DEFUN([AC_LIBTOOL_PROG_LD_HARDCODE_LIBPATH],
+[AC_MSG_CHECKING([how to hardcode library paths into programs])
+_LT_AC_TAGVAR(hardcode_action, $1)=
+if test -n "$_LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)" || \
+   test -n "$_LT_AC_TAGVAR(runpath_var $1)" || \
+   test "X$_LT_AC_TAGVAR(hardcode_automatic, $1)"="Xyes" ; then
+
+  # We can hardcode non-existant directories.
+  if test "$_LT_AC_TAGVAR(hardcode_direct, $1)" != no &&
+     # If the only mechanism to avoid hardcoding is shlibpath_var, we
+     # have to relink, otherwise we might link with an installed library
+     # when we should be linking with a yet-to-be-installed one
+     ## test "$_LT_AC_TAGVAR(hardcode_shlibpath_var, $1)" != no &&
+     test "$_LT_AC_TAGVAR(hardcode_minus_L, $1)" != no; then
+    # Linking always hardcodes the temporary library directory.
+    _LT_AC_TAGVAR(hardcode_action, $1)=relink
+  else
+    # We can link without hardcoding, and we can hardcode nonexisting dirs.
+    _LT_AC_TAGVAR(hardcode_action, $1)=immediate
+  fi
+else
+  # We cannot hardcode anything, or else we can only hardcode existing
+  # directories.
+  _LT_AC_TAGVAR(hardcode_action, $1)=unsupported
+fi
+AC_MSG_RESULT([$_LT_AC_TAGVAR(hardcode_action, $1)])
+
+if test "$_LT_AC_TAGVAR(hardcode_action, $1)" = relink; then
+  # Fast installation is not supported
+  enable_fast_install=no
+elif test "$shlibpath_overrides_runpath" = yes ||
+     test "$enable_shared" = no; then
+  # Fast installation is not necessary
+  enable_fast_install=needless
+fi
+])# AC_LIBTOOL_PROG_LD_HARDCODE_LIBPATH
+
+
+# AC_LIBTOOL_SYS_LIB_STRIP
+# ------------------------
+AC_DEFUN([AC_LIBTOOL_SYS_LIB_STRIP],
+[striplib=
+old_striplib=
+AC_MSG_CHECKING([whether stripping libraries is possible])
+if test -n "$STRIP" && $STRIP -V 2>&1 | grep "GNU strip" >/dev/null; then
+  test -z "$old_striplib" && old_striplib="$STRIP --strip-debug"
+  test -z "$striplib" && striplib="$STRIP --strip-unneeded"
+  AC_MSG_RESULT([yes])
+else
+# FIXME - insert some real tests, host_os isn't really good enough
+  case $host_os in
+   darwin*)
+       if test -n "$STRIP" ; then
+         striplib="$STRIP -x"
+         AC_MSG_RESULT([yes])
+       else
+  AC_MSG_RESULT([no])
+fi
+       ;;
+   *)
+  AC_MSG_RESULT([no])
+    ;;
+  esac  
+fi
+])# AC_LIBTOOL_SYS_LIB_STRIP
+
+
+# AC_LIBTOOL_SYS_DYNAMIC_LINKER
+# -----------------------------
+# PORTME Fill in your ld.so characteristics
+AC_DEFUN([AC_LIBTOOL_SYS_DYNAMIC_LINKER],
+[AC_MSG_CHECKING([dynamic linker characteristics])
+library_names_spec=
+libname_spec='lib$name'
+soname_spec=
+shrext=".so"
+postinstall_cmds=
+postuninstall_cmds=
+finish_cmds=
+finish_eval=
+shlibpath_var=
+shlibpath_overrides_runpath=unknown
+version_type=none
+dynamic_linker="$host_os ld.so"
+sys_lib_dlsearch_path_spec="/lib /usr/lib"
+sys_lib_search_path_spec="/lib /usr/lib /usr/local/lib"
+need_lib_prefix=unknown
+hardcode_into_libs=no
+
+# when you set need_version to no, make sure it does not cause -set_version
+# flags to be left without arguments
+need_version=unknown
+
+case $host_os in
+aix3*)
+  version_type=linux
+  library_names_spec='${libname}${release}${shared_ext}$versuffix $libname.a'
+  shlibpath_var=LIBPATH
+
+  # AIX 3 has no versioning support, so we append a major version to the name.
+  soname_spec='${libname}${release}${shared_ext}$major'
+  ;;
+
+aix4* | aix5*)
+  version_type=linux
+  need_lib_prefix=no
+  need_version=no
+  hardcode_into_libs=yes
+  if test "$host_cpu" = ia64; then
+    # AIX 5 supports IA64
+    library_names_spec='${libname}${release}${shared_ext}$major ${libname}${release}${shared_ext}$versuffix $libname${shared_ext}'
+    shlibpath_var=LD_LIBRARY_PATH
+  else
+    # With GCC up to 2.95.x, collect2 would create an import file
+    # for dependence libraries.  The import file would start with
+    # the line `#! .'.  This would cause the generated library to
+    # depend on `.', always an invalid library.  This was fixed in
+    # development snapshots of GCC prior to 3.0.
+    case $host_os in
+      aix4 | aix4.[[01]] | aix4.[[01]].*)
+      if { echo '#if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 97)'
+	   echo ' yes '
+	   echo '#endif'; } | ${CC} -E - | grep yes > /dev/null; then
+	:
+      else
+	can_build_shared=no
+      fi
+      ;;
+    esac
+    # AIX (on Power*) has no versioning support, so currently we can not hardcode correct
+    # soname into executable. Probably we can add versioning support to
+    # collect2, so additional links can be useful in future.
+    if test "$aix_use_runtimelinking" = yes; then
+      # If using run time linking (on AIX 4.2 or later) use lib<name>.so
+      # instead of lib<name>.a to let people know that these are not
+      # typical AIX shared libraries.
+      library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}'
+    else
+      # We preserve .a as extension for shared libraries through AIX4.2
+      # and later when we are not doing run time linking.
+      library_names_spec='${libname}${release}.a $libname.a'
+      soname_spec='${libname}${release}${shared_ext}$major'
+    fi
+    shlibpath_var=LIBPATH
+  fi
+  ;;
+
+amigaos*)
+  library_names_spec='$libname.ixlibrary $libname.a'
+  # Create ${libname}_ixlibrary.a entries in /sys/libs.
+  finish_eval='for lib in `ls $libdir/*.ixlibrary 2>/dev/null`; do libname=`$echo "X$lib" | $Xsed -e '\''s%^.*/\([[^/]]*\)\.ixlibrary$%\1%'\''`; test $rm /sys/libs/${libname}_ixlibrary.a; $show "(cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a)"; (cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a) || exit 1; done'
+  ;;
+
+beos*)
+  library_names_spec='${libname}${shared_ext}'
+  dynamic_linker="$host_os ld.so"
+  shlibpath_var=LIBRARY_PATH
+  ;;
+
+bsdi4*)
+  version_type=linux
+  need_version=no
+  library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}'
+  soname_spec='${libname}${release}${shared_ext}$major'
+  finish_cmds='PATH="\$PATH:/sbin" ldconfig $libdir'
+  shlibpath_var=LD_LIBRARY_PATH
+  sys_lib_search_path_spec="/shlib /usr/lib /usr/X11/lib /usr/contrib/lib /lib /usr/local/lib"
+  sys_lib_dlsearch_path_spec="/shlib /usr/lib /usr/local/lib"
+  # the default ld.so.conf also contains /usr/contrib/lib and
+  # /usr/X11R6/lib (/usr/X11 is a link to /usr/X11R6), but let us allow
+  # libtool to hard-code these into programs
+  ;;
+
+cygwin* | mingw* | pw32*)
+  version_type=windows
+  shrext=".dll"
+  need_version=no
+  need_lib_prefix=no
+
+  case $GCC,$host_os in
+  yes,cygwin* | yes,mingw* | yes,pw32*)
+    library_names_spec='$libname.dll.a'
+    # DLL is installed to $(libdir)/../bin by postinstall_cmds
+    postinstall_cmds='base_file=`basename \${file}`~
+      dlpath=`$SHELL 2>&1 -c '\''. $dir/'\''\${base_file}'\''i;echo \$dlname'\''`~
+      dldir=$destdir/`dirname \$dlpath`~
+      test -d \$dldir || mkdir -p \$dldir~
+      $install_prog $dir/$dlname \$dldir/$dlname'
+    postuninstall_cmds='dldll=`$SHELL 2>&1 -c '\''. $file; echo \$dlname'\''`~
+      dlpath=$dir/\$dldll~
+       $rm \$dlpath'
+    shlibpath_overrides_runpath=yes
+
+    case $host_os in
+    cygwin*)
+      # Cygwin DLLs use 'cyg' prefix rather than 'lib'
+      soname_spec='`echo ${libname} | sed -e 's/^lib/cyg/'``echo ${release} | $SED -e 's/[[.]]/-/g'`${versuffix}${shared_ext}'
+      sys_lib_search_path_spec="/usr/lib /lib/w32api /lib /usr/local/lib"
+      ;;
+    mingw*)
+      # MinGW DLLs use traditional 'lib' prefix
+      soname_spec='${libname}`echo ${release} | $SED -e 's/[[.]]/-/g'`${versuffix}${shared_ext}'
+      sys_lib_search_path_spec=`$CC -print-search-dirs | grep "^libraries:" | $SED -e "s/^libraries://" -e "s,=/,/,g"`
+      if echo "$sys_lib_search_path_spec" | [grep ';[c-zC-Z]:/' >/dev/null]; then
+        # It is most probably a Windows format PATH printed by
+        # mingw gcc, but we are running on Cygwin. Gcc prints its search
+        # path with ; separators, and with drive letters. We can handle the
+        # drive letters (cygwin fileutils understands them), so leave them,
+        # especially as we might pass files found there to a mingw objdump,
+        # which wouldn't understand a cygwinified path. Ahh.
+        sys_lib_search_path_spec=`echo "$sys_lib_search_path_spec" | $SED -e 's/;/ /g'`
+      else
+        sys_lib_search_path_spec=`echo "$sys_lib_search_path_spec" | $SED  -e "s/$PATH_SEPARATOR/ /g"`
+      fi
+      ;;
+    pw32*)
+      # pw32 DLLs use 'pw' prefix rather than 'lib'
+      library_names_spec='`echo ${libname} | sed -e 's/^lib/pw/'``echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
+      ;;
+    esac
+    ;;
+
+  *)
+    library_names_spec='${libname}`echo ${release} | $SED -e 's/[[.]]/-/g'`${versuffix}${shared_ext} $libname.lib'
+    ;;
+  esac
+  dynamic_linker='Win32 ld.exe'
+  # FIXME: first we should search . and the directory the executable is in
+  shlibpath_var=PATH
+  ;;
+
+darwin* | rhapsody*)
+  dynamic_linker="$host_os dyld"
+  version_type=darwin
+  need_lib_prefix=no
+  need_version=no
+  library_names_spec='${libname}${release}${versuffix}$shared_ext ${libname}${release}${major}$shared_ext ${libname}$shared_ext'
+  soname_spec='${libname}${release}${major}$shared_ext'
+  shlibpath_overrides_runpath=yes
+  shlibpath_var=DYLD_LIBRARY_PATH
+  shrext='$(test .$module = .yes && echo .so || echo .dylib)'
+  # Apple's gcc prints 'gcc -print-search-dirs' doesn't operate the same.
+  if test "$GCC" = yes; then
+    sys_lib_search_path_spec=`$CC -print-search-dirs | tr "\n" "$PATH_SEPARATOR" | sed -e 's/libraries:/@libraries:/' | tr "@" "\n" | grep "^libraries:" | sed -e "s/^libraries://" -e "s,=/,/,g" -e "s,$PATH_SEPARATOR, ,g" -e "s,.*,& /lib /usr/lib /usr/local/lib,g"`
+  else
+    sys_lib_search_path_spec='/lib /usr/lib /usr/local/lib'
+  fi
+  sys_lib_dlsearch_path_spec='/usr/local/lib /lib /usr/lib'
+  ;;
+
+dgux*)
+  version_type=linux
+  need_lib_prefix=no
+  need_version=no
+  library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname$shared_ext'
+  soname_spec='${libname}${release}${shared_ext}$major'
+  shlibpath_var=LD_LIBRARY_PATH
+  ;;
+
+freebsd1*)
+  dynamic_linker=no
+  ;;
+
+kfreebsd*-gnu*)
+  version_type=linux
+  need_lib_prefix=no
+  need_version=no
+  library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major ${libname}${shared_ext}'
+  soname_spec='${libname}${release}${shared_ext}$major'
+  shlibpath_var=LD_LIBRARY_PATH
+  shlibpath_overrides_runpath=no
+  hardcode_into_libs=yes
+  dynamic_linker='GNU ld.so'
+  ;;
+
+freebsd*)
+  objformat=`test -x /usr/bin/objformat && /usr/bin/objformat || echo aout`
+  version_type=freebsd-$objformat
+  case $version_type in
+    freebsd-elf*)
+      library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext} $libname${shared_ext}'
+      need_version=no
+      need_lib_prefix=no
+      ;;
+    freebsd-*)
+      library_names_spec='${libname}${release}${shared_ext}$versuffix $libname${shared_ext}$versuffix'
+      need_version=yes
+      ;;
+  esac
+  shlibpath_var=LD_LIBRARY_PATH
+  case $host_os in
+  freebsd2*)
+    shlibpath_overrides_runpath=yes
+    ;;
+  freebsd3.[01]* | freebsdelf3.[01]*)
+    shlibpath_overrides_runpath=yes
+    hardcode_into_libs=yes
+    ;;
+  *) # from 3.2 on
+    shlibpath_overrides_runpath=no
+    hardcode_into_libs=yes
+    ;;
+  esac
+  ;;
+
+gnu*)
+  version_type=linux
+  need_lib_prefix=no
+  need_version=no
+  library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}${major} ${libname}${shared_ext}'
+  soname_spec='${libname}${release}${shared_ext}$major'
+  shlibpath_var=LD_LIBRARY_PATH
+  hardcode_into_libs=yes
+  ;;
+
+hpux9* | hpux10* | hpux11*)
+  # Give a soname corresponding to the major version so that dld.sl refuses to
+  # link against other versions.
+  version_type=sunos
+  need_lib_prefix=no
+  need_version=no
+  case "$host_cpu" in
+  ia64*)
+    shrext='.so'
+    hardcode_into_libs=yes
+    dynamic_linker="$host_os dld.so"
+    shlibpath_var=LD_LIBRARY_PATH
+    shlibpath_overrides_runpath=yes # Unless +noenvvar is specified.
+    library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}'
+    soname_spec='${libname}${release}${shared_ext}$major'
+    if test "X$HPUX_IA64_MODE" = X32; then
+      sys_lib_search_path_spec="/usr/lib/hpux32 /usr/local/lib/hpux32 /usr/local/lib"
+    else
+      sys_lib_search_path_spec="/usr/lib/hpux64 /usr/local/lib/hpux64"
+    fi
+    sys_lib_dlsearch_path_spec=$sys_lib_search_path_spec
+    ;;
+   hppa*64*)
+     shrext='.sl'
+     hardcode_into_libs=yes
+     dynamic_linker="$host_os dld.sl"
+     shlibpath_var=LD_LIBRARY_PATH # How should we handle SHLIB_PATH
+     shlibpath_overrides_runpath=yes # Unless +noenvvar is specified.
+     library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}'
+     soname_spec='${libname}${release}${shared_ext}$major'
+     sys_lib_search_path_spec="/usr/lib/pa20_64 /usr/ccs/lib/pa20_64"
+     sys_lib_dlsearch_path_spec=$sys_lib_search_path_spec
+     ;;
+   *)
+    shrext='.sl'
+    dynamic_linker="$host_os dld.sl"
+    shlibpath_var=SHLIB_PATH
+    shlibpath_overrides_runpath=no # +s is required to enable SHLIB_PATH
+    library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}'
+    soname_spec='${libname}${release}${shared_ext}$major'
+    ;;
+  esac
+  # HP-UX runs *really* slowly unless shared libraries are mode 555.
+  postinstall_cmds='chmod 555 $lib'
+  ;;
+
+irix5* | irix6* | nonstopux*)
+  case $host_os in
+    nonstopux*) version_type=nonstopux ;;
+    *)
+	if test "$lt_cv_prog_gnu_ld" = yes; then
+		version_type=linux
+	else
+		version_type=irix
+	fi ;;
+  esac
+  need_lib_prefix=no
+  need_version=no
+  soname_spec='${libname}${release}${shared_ext}$major'
+  library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major ${libname}${release}${shared_ext} $libname${shared_ext}'
+  case $host_os in
+  irix5* | nonstopux*)
+    libsuff= shlibsuff=
+    ;;
+  *)
+    case $LD in # libtool.m4 will add one of these switches to LD
+    *-32|*"-32 "|*-melf32bsmip|*"-melf32bsmip ")
+      libsuff= shlibsuff= libmagic=32-bit;;
+    *-n32|*"-n32 "|*-melf32bmipn32|*"-melf32bmipn32 ")
+      libsuff=32 shlibsuff=N32 libmagic=N32;;
+    *-64|*"-64 "|*-melf64bmip|*"-melf64bmip ")
+      libsuff=64 shlibsuff=64 libmagic=64-bit;;
+    *) libsuff= shlibsuff= libmagic=never-match;;
+    esac
+    ;;
+  esac
+  shlibpath_var=LD_LIBRARY${shlibsuff}_PATH
+  shlibpath_overrides_runpath=no
+  sys_lib_search_path_spec="/usr/lib${libsuff} /lib${libsuff} /usr/local/lib${libsuff}"
+  sys_lib_dlsearch_path_spec="/usr/lib${libsuff} /lib${libsuff}"
+  hardcode_into_libs=yes
+  ;;
+
+# No shared lib support for Linux oldld, aout, or coff.
+linux*oldld* | linux*aout* | linux*coff*)
+  dynamic_linker=no
+  ;;
+
+# This must be Linux ELF.
+linux*)
+  version_type=linux
+  need_lib_prefix=no
+  need_version=no
+  library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}'
+  soname_spec='${libname}${release}${shared_ext}$major'
+  finish_cmds='PATH="\$PATH:/sbin" ldconfig -n $libdir'
+  libsuff=
+  if test "x$LINUX_64_MODE" = x64; then
+    # Some platforms are per default 64-bit, so there's no /lib64
+    if test -d /lib64; then
+      libsuff=64
+    fi
+  fi
+  shlibpath_var=LD_LIBRARY_PATH
+  shlibpath_overrides_runpath=no
+  sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}"
+  sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}"
+  # This implies no fast_install, which is unacceptable.
+  # Some rework will be needed to allow for fast_install
+  # before this can be enabled.
+  hardcode_into_libs=yes
+
+  # We used to test for /lib/ld.so.1 and disable shared libraries on
+  # powerpc, because MkLinux only supported shared libraries with the
+  # GNU dynamic linker.  Since this was broken with cross compilers,
+  # most powerpc-linux boxes support dynamic linking these days and
+  # people can always --disable-shared, the test was removed, and we
+  # assume the GNU/Linux dynamic linker is in use.
+  dynamic_linker='GNU/Linux ld.so'
+  ;;
+
+netbsd*)
+  version_type=sunos
+  need_lib_prefix=no
+  need_version=no
+  if echo __ELF__ | $CC -E - | grep __ELF__ >/dev/null; then
+    library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${shared_ext}$versuffix'
+    finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir'
+    dynamic_linker='NetBSD (a.out) ld.so'
+  else
+    library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major ${libname}${release}${shared_ext} ${libname}${shared_ext}'
+    soname_spec='${libname}${release}${shared_ext}$major'
+    dynamic_linker='NetBSD ld.elf_so'
+  fi
+  shlibpath_var=LD_LIBRARY_PATH
+  shlibpath_overrides_runpath=yes
+  hardcode_into_libs=yes
+  ;;
+
+newsos6)
+  version_type=linux
+  library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}'
+  shlibpath_var=LD_LIBRARY_PATH
+  shlibpath_overrides_runpath=yes
+  ;;
+
+nto-qnx*)
+  version_type=linux
+  need_lib_prefix=no
+  need_version=no
+  library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}'
+  soname_spec='${libname}${release}${shared_ext}$major'
+  shlibpath_var=LD_LIBRARY_PATH
+  shlibpath_overrides_runpath=yes
+  ;;
+
+openbsd*)
+  version_type=sunos
+  need_lib_prefix=no
+  need_version=no
+  library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${shared_ext}$versuffix'
+  finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir'
+  shlibpath_var=LD_LIBRARY_PATH
+  if test -z "`echo __ELF__ | $CC -E - | grep __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then
+    case $host_os in
+      openbsd2.[[89]] | openbsd2.[[89]].*)
+	shlibpath_overrides_runpath=no
+	;;
+      *)
+	shlibpath_overrides_runpath=yes
+	;;
+      esac
+  else
+    shlibpath_overrides_runpath=yes
+  fi
+  ;;
+
+os2*)
+  libname_spec='$name'
+  shrext=".dll"
+  need_lib_prefix=no
+  library_names_spec='$libname${shared_ext} $libname.a'
+  dynamic_linker='OS/2 ld.exe'
+  shlibpath_var=LIBPATH
+  ;;
+
+osf3* | osf4* | osf5*)
+  version_type=osf
+  need_lib_prefix=no
+  need_version=no
+  soname_spec='${libname}${release}${shared_ext}$major'
+  library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}'
+  shlibpath_var=LD_LIBRARY_PATH
+  sys_lib_search_path_spec="/usr/shlib /usr/ccs/lib /usr/lib/cmplrs/cc /usr/lib /usr/local/lib /var/shlib"
+  sys_lib_dlsearch_path_spec="$sys_lib_search_path_spec"
+  ;;
+
+sco3.2v5*)
+  version_type=osf
+  soname_spec='${libname}${release}${shared_ext}$major'
+  library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}'
+  shlibpath_var=LD_LIBRARY_PATH
+  ;;
+
+solaris*)
+  version_type=linux
+  need_lib_prefix=no
+  need_version=no
+  library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}'
+  soname_spec='${libname}${release}${shared_ext}$major'
+  shlibpath_var=LD_LIBRARY_PATH
+  shlibpath_overrides_runpath=yes
+  hardcode_into_libs=yes
+  # ldd complains unless libraries are executable
+  postinstall_cmds='chmod +x $lib'
+  ;;
+
+sunos4*)
+  version_type=sunos
+  library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${shared_ext}$versuffix'
+  finish_cmds='PATH="\$PATH:/usr/etc" ldconfig $libdir'
+  shlibpath_var=LD_LIBRARY_PATH
+  shlibpath_overrides_runpath=yes
+  if test "$with_gnu_ld" = yes; then
+    need_lib_prefix=no
+  fi
+  need_version=yes
+  ;;
+
+sysv4 | sysv4.2uw2* | sysv4.3* | sysv5*)
+  version_type=linux
+  library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}'
+  soname_spec='${libname}${release}${shared_ext}$major'
+  shlibpath_var=LD_LIBRARY_PATH
+  case $host_vendor in
+    sni)
+      shlibpath_overrides_runpath=no
+      need_lib_prefix=no
+      export_dynamic_flag_spec='${wl}-Blargedynsym'
+      runpath_var=LD_RUN_PATH
+      ;;
+    siemens)
+      need_lib_prefix=no
+      ;;
+    motorola)
+      need_lib_prefix=no
+      need_version=no
+      shlibpath_overrides_runpath=no
+      sys_lib_search_path_spec='/lib /usr/lib /usr/ccs/lib'
+      ;;
+  esac
+  ;;
+
+sysv4*MP*)
+  if test -d /usr/nec ;then
+    version_type=linux
+    library_names_spec='$libname${shared_ext}.$versuffix $libname${shared_ext}.$major $libname${shared_ext}'
+    soname_spec='$libname${shared_ext}.$major'
+    shlibpath_var=LD_LIBRARY_PATH
+  fi
+  ;;
+
+uts4*)
+  version_type=linux
+  library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}'
+  soname_spec='${libname}${release}${shared_ext}$major'
+  shlibpath_var=LD_LIBRARY_PATH
+  ;;
+
+*)
+  dynamic_linker=no
+  ;;
+esac
+AC_MSG_RESULT([$dynamic_linker])
+test "$dynamic_linker" = no && can_build_shared=no
+])# AC_LIBTOOL_SYS_DYNAMIC_LINKER
+
+
+# _LT_AC_TAGCONFIG
+# ----------------
+AC_DEFUN([_LT_AC_TAGCONFIG],
+[AC_ARG_WITH([tags],
+    [AC_HELP_STRING([--with-tags@<:@=TAGS@:>@],
+        [include additional configurations @<:@automatic@:>@])],
+    [tagnames="$withval"])
+
+if test -f "$ltmain" && test -n "$tagnames"; then
+  if test ! -f "${ofile}"; then
+    AC_MSG_WARN([output file `$ofile' does not exist])
+  fi
+
+  if test -z "$LTCC"; then
+    eval "`$SHELL ${ofile} --config | grep '^LTCC='`"
+    if test -z "$LTCC"; then
+      AC_MSG_WARN([output file `$ofile' does not look like a libtool script])
+    else
+      AC_MSG_WARN([using `LTCC=$LTCC', extracted from `$ofile'])
+    fi
+  fi
+
+  # Extract list of available tagged configurations in $ofile.
+  # Note that this assumes the entire list is on one line.
+  available_tags=`grep "^available_tags=" "${ofile}" | $SED -e 's/available_tags=\(.*$\)/\1/' -e 's/\"//g'`
+
+  lt_save_ifs="$IFS"; IFS="${IFS}$PATH_SEPARATOR,"
+  for tagname in $tagnames; do
+    IFS="$lt_save_ifs"
+    # Check whether tagname contains only valid characters
+    case `$echo "X$tagname" | $Xsed -e 's:[[-_ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz1234567890,/]]::g'` in
+    "") ;;
+    *)  AC_MSG_ERROR([invalid tag name: $tagname])
+	;;
+    esac
+
+    if grep "^# ### BEGIN LIBTOOL TAG CONFIG: $tagname$" < "${ofile}" > /dev/null
+    then
+      AC_MSG_ERROR([tag name \"$tagname\" already exists])
+    fi
+
+    # Update the list of available tags.
+    if test -n "$tagname"; then
+      echo appending configuration tag \"$tagname\" to $ofile
+
+      case $tagname in
+      CXX)
+	if test -n "$CXX" && test "X$CXX" != "Xno"; then
+	  AC_LIBTOOL_LANG_CXX_CONFIG
+	else
+	  tagname=""
+	fi
+	;;
+
+      F77)
+	if test -n "$F77" && test "X$F77" != "Xno"; then
+	  AC_LIBTOOL_LANG_F77_CONFIG
+	else
+	  tagname=""
+	fi
+	;;
+
+      GCJ)
+	if test -n "$GCJ" && test "X$GCJ" != "Xno"; then
+	  AC_LIBTOOL_LANG_GCJ_CONFIG
+	else
+	  tagname=""
+	fi
+	;;
+
+      RC)
+	AC_LIBTOOL_LANG_RC_CONFIG
+	;;
+
+      *)
+	AC_MSG_ERROR([Unsupported tag name: $tagname])
+	;;
+      esac
+
+      # Append the new tag name to the list of available tags.
+      if test -n "$tagname" ; then
+      available_tags="$available_tags $tagname"
+    fi
+    fi
+  done
+  IFS="$lt_save_ifs"
+
+  # Now substitute the updated list of available tags.
+  if eval "sed -e 's/^available_tags=.*\$/available_tags=\"$available_tags\"/' \"$ofile\" > \"${ofile}T\""; then
+    mv "${ofile}T" "$ofile"
+    chmod +x "$ofile"
+  else
+    rm -f "${ofile}T"
+    AC_MSG_ERROR([unable to update list of available tagged configurations.])
+  fi
+fi
+])# _LT_AC_TAGCONFIG
+
+
+# AC_LIBTOOL_DLOPEN
+# -----------------
+# enable checks for dlopen support
+AC_DEFUN([AC_LIBTOOL_DLOPEN],
+ [AC_BEFORE([$0],[AC_LIBTOOL_SETUP])
+])# AC_LIBTOOL_DLOPEN
+
+
+# AC_LIBTOOL_WIN32_DLL
+# --------------------
+# declare package support for building win32 dll's
+AC_DEFUN([AC_LIBTOOL_WIN32_DLL],
+[AC_BEFORE([$0], [AC_LIBTOOL_SETUP])
+])# AC_LIBTOOL_WIN32_DLL
+
+
+# AC_ENABLE_SHARED([DEFAULT])
+# ---------------------------
+# implement the --enable-shared flag
+# DEFAULT is either `yes' or `no'.  If omitted, it defaults to `yes'.
+AC_DEFUN([AC_ENABLE_SHARED],
+[define([AC_ENABLE_SHARED_DEFAULT], ifelse($1, no, no, yes))dnl
+AC_ARG_ENABLE([shared],
+    [AC_HELP_STRING([--enable-shared@<:@=PKGS@:>@],
+	[build shared libraries @<:@default=]AC_ENABLE_SHARED_DEFAULT[@:>@])],
+    [p=${PACKAGE-default}
+    case $enableval in
+    yes) enable_shared=yes ;;
+    no) enable_shared=no ;;
+    *)
+      enable_shared=no
+      # Look at the argument we got.  We use all the common list separators.
+      lt_save_ifs="$IFS"; IFS="${IFS}$PATH_SEPARATOR,"
+      for pkg in $enableval; do
+	IFS="$lt_save_ifs"
+	if test "X$pkg" = "X$p"; then
+	  enable_shared=yes
+	fi
+      done
+      IFS="$lt_save_ifs"
+      ;;
+    esac],
+    [enable_shared=]AC_ENABLE_SHARED_DEFAULT)
+])# AC_ENABLE_SHARED
+
+
+# AC_DISABLE_SHARED
+# -----------------
+#- set the default shared flag to --disable-shared
+AC_DEFUN([AC_DISABLE_SHARED],
+[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl
+AC_ENABLE_SHARED(no)
+])# AC_DISABLE_SHARED
+
+
+# AC_ENABLE_STATIC([DEFAULT])
+# ---------------------------
+# implement the --enable-static flag
+# DEFAULT is either `yes' or `no'.  If omitted, it defaults to `yes'.
+AC_DEFUN([AC_ENABLE_STATIC],
+[define([AC_ENABLE_STATIC_DEFAULT], ifelse($1, no, no, yes))dnl
+AC_ARG_ENABLE([static],
+    [AC_HELP_STRING([--enable-static@<:@=PKGS@:>@],
+	[build static libraries @<:@default=]AC_ENABLE_STATIC_DEFAULT[@:>@])],
+    [p=${PACKAGE-default}
+    case $enableval in
+    yes) enable_static=yes ;;
+    no) enable_static=no ;;
+    *)
+     enable_static=no
+      # Look at the argument we got.  We use all the common list separators.
+      lt_save_ifs="$IFS"; IFS="${IFS}$PATH_SEPARATOR,"
+      for pkg in $enableval; do
+	IFS="$lt_save_ifs"
+	if test "X$pkg" = "X$p"; then
+	  enable_static=yes
+	fi
+      done
+      IFS="$lt_save_ifs"
+      ;;
+    esac],
+    [enable_static=]AC_ENABLE_STATIC_DEFAULT)
+])# AC_ENABLE_STATIC
+
+
+# AC_DISABLE_STATIC
+# -----------------
+# set the default static flag to --disable-static
+AC_DEFUN([AC_DISABLE_STATIC],
+[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl
+AC_ENABLE_STATIC(no)
+])# AC_DISABLE_STATIC
+
+
+# AC_ENABLE_FAST_INSTALL([DEFAULT])
+# ---------------------------------
+# implement the --enable-fast-install flag
+# DEFAULT is either `yes' or `no'.  If omitted, it defaults to `yes'.
+AC_DEFUN([AC_ENABLE_FAST_INSTALL],
+[define([AC_ENABLE_FAST_INSTALL_DEFAULT], ifelse($1, no, no, yes))dnl
+AC_ARG_ENABLE([fast-install],
+    [AC_HELP_STRING([--enable-fast-install@<:@=PKGS@:>@],
+    [optimize for fast installation @<:@default=]AC_ENABLE_FAST_INSTALL_DEFAULT[@:>@])],
+    [p=${PACKAGE-default}
+    case $enableval in
+    yes) enable_fast_install=yes ;;
+    no) enable_fast_install=no ;;
+    *)
+      enable_fast_install=no
+      # Look at the argument we got.  We use all the common list separators.
+      lt_save_ifs="$IFS"; IFS="${IFS}$PATH_SEPARATOR,"
+      for pkg in $enableval; do
+	IFS="$lt_save_ifs"
+	if test "X$pkg" = "X$p"; then
+	  enable_fast_install=yes
+	fi
+      done
+      IFS="$lt_save_ifs"
+      ;;
+    esac],
+    [enable_fast_install=]AC_ENABLE_FAST_INSTALL_DEFAULT)
+])# AC_ENABLE_FAST_INSTALL
+
+
+# AC_DISABLE_FAST_INSTALL
+# -----------------------
+# set the default to --disable-fast-install
+AC_DEFUN([AC_DISABLE_FAST_INSTALL],
+[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl
+AC_ENABLE_FAST_INSTALL(no)
+])# AC_DISABLE_FAST_INSTALL
+
+
+# AC_LIBTOOL_PICMODE([MODE])
+# --------------------------
+# implement the --with-pic flag
+# MODE is either `yes' or `no'.  If omitted, it defaults to `both'.
+AC_DEFUN([AC_LIBTOOL_PICMODE],
+[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl
+pic_mode=ifelse($#,1,$1,default)
+])# AC_LIBTOOL_PICMODE
+
+
+# AC_PROG_EGREP
+# -------------
+# This is predefined starting with Autoconf 2.54, so this conditional
+# definition can be removed once we require Autoconf 2.54 or later.
+m4_ifndef([AC_PROG_EGREP], [AC_DEFUN([AC_PROG_EGREP],
+[AC_CACHE_CHECK([for egrep], [ac_cv_prog_egrep],
+   [if echo a | (grep -E '(a|b)') >/dev/null 2>&1
+    then ac_cv_prog_egrep='grep -E'
+    else ac_cv_prog_egrep='egrep'
+    fi])
+ EGREP=$ac_cv_prog_egrep
+ AC_SUBST([EGREP])
+])])
+
+
+# AC_PATH_TOOL_PREFIX
+# -------------------
+# find a file program which can recognise shared library
+AC_DEFUN([AC_PATH_TOOL_PREFIX],
+[AC_REQUIRE([AC_PROG_EGREP])dnl
+AC_MSG_CHECKING([for $1])
+AC_CACHE_VAL(lt_cv_path_MAGIC_CMD,
+[case $MAGIC_CMD in
+[[\\/*] |  ?:[\\/]*])
+  lt_cv_path_MAGIC_CMD="$MAGIC_CMD" # Let the user override the test with a path.
+  ;;
+*)
+  lt_save_MAGIC_CMD="$MAGIC_CMD"
+  lt_save_ifs="$IFS"; IFS=$PATH_SEPARATOR
+dnl $ac_dummy forces splitting on constant user-supplied paths.
+dnl POSIX.2 word splitting is done only on the output of word expansions,
+dnl not every word.  This closes a longstanding sh security hole.
+  ac_dummy="ifelse([$2], , $PATH, [$2])"
+  for ac_dir in $ac_dummy; do
+    IFS="$lt_save_ifs"
+    test -z "$ac_dir" && ac_dir=.
+    if test -f $ac_dir/$1; then
+      lt_cv_path_MAGIC_CMD="$ac_dir/$1"
+      if test -n "$file_magic_test_file"; then
+	case $deplibs_check_method in
+	"file_magic "*)
+	  file_magic_regex="`expr \"$deplibs_check_method\" : \"file_magic \(.*\)\"`"
+	  MAGIC_CMD="$lt_cv_path_MAGIC_CMD"
+	  if eval $file_magic_cmd \$file_magic_test_file 2> /dev/null |
+	    $EGREP "$file_magic_regex" > /dev/null; then
+	    :
+	  else
+	    cat <<EOF 1>&2
+
+*** Warning: the command libtool uses to detect shared libraries,
+*** $file_magic_cmd, produces output that libtool cannot recognize.
+*** The result is that libtool may fail to recognize shared libraries
+*** as such.  This will affect the creation of libtool libraries that
+*** depend on shared libraries, but programs linked with such libtool
+*** libraries will work regardless of this problem.  Nevertheless, you
+*** may want to report the problem to your system manager and/or to
+*** bug-libtool@gnu.org
+
+EOF
+	  fi ;;
+	esac
+      fi
+      break
+    fi
+  done
+  IFS="$lt_save_ifs"
+  MAGIC_CMD="$lt_save_MAGIC_CMD"
+  ;;
+esac])
+MAGIC_CMD="$lt_cv_path_MAGIC_CMD"
+if test -n "$MAGIC_CMD"; then
+  AC_MSG_RESULT($MAGIC_CMD)
+else
+  AC_MSG_RESULT(no)
+fi
+])# AC_PATH_TOOL_PREFIX
+
+
+# AC_PATH_MAGIC
+# -------------
+# find a file program which can recognise a shared library
+AC_DEFUN([AC_PATH_MAGIC],
+[AC_PATH_TOOL_PREFIX(${ac_tool_prefix}file, /usr/bin$PATH_SEPARATOR$PATH)
+if test -z "$lt_cv_path_MAGIC_CMD"; then
+  if test -n "$ac_tool_prefix"; then
+    AC_PATH_TOOL_PREFIX(file, /usr/bin$PATH_SEPARATOR$PATH)
+  else
+    MAGIC_CMD=:
+  fi
+fi
+])# AC_PATH_MAGIC
+
+
+# AC_PROG_LD
+# ----------
+# find the pathname to the GNU or non-GNU linker
+AC_DEFUN([AC_PROG_LD],
+[AC_ARG_WITH([gnu-ld],
+    [AC_HELP_STRING([--with-gnu-ld],
+	[assume the C compiler uses GNU ld @<:@default=no@:>@])],
+    [test "$withval" = no || with_gnu_ld=yes],
+    [with_gnu_ld=no])
+AC_REQUIRE([LT_AC_PROG_SED])dnl
+AC_REQUIRE([AC_PROG_CC])dnl
+AC_REQUIRE([AC_CANONICAL_HOST])dnl
+AC_REQUIRE([AC_CANONICAL_BUILD])dnl
+ac_prog=ld
+if test "$GCC" = yes; then
+  # Check if gcc -print-prog-name=ld gives a path.
+  AC_MSG_CHECKING([for ld used by $CC])
+  case $host in
+  *-*-mingw*)
+    # gcc leaves a trailing carriage return which upsets mingw
+    ac_prog=`($CC -print-prog-name=ld) 2>&5 | tr -d '\015'` ;;
+  *)
+    ac_prog=`($CC -print-prog-name=ld) 2>&5` ;;
+  esac
+  case $ac_prog in
+    # Accept absolute paths.
+    [[\\/]]* | ?:[[\\/]]*)
+      re_direlt='/[[^/]][[^/]]*/\.\./'
+      # Canonicalize the pathname of ld
+      ac_prog=`echo $ac_prog| $SED 's%\\\\%/%g'`
+      while echo $ac_prog | grep "$re_direlt" > /dev/null 2>&1; do
+	ac_prog=`echo $ac_prog| $SED "s%$re_direlt%/%"`
+      done
+      test -z "$LD" && LD="$ac_prog"
+      ;;
+  "")
+    # If it fails, then pretend we aren't using GCC.
+    ac_prog=ld
+    ;;
+  *)
+    # If it is relative, then search for the first ld in PATH.
+    with_gnu_ld=unknown
+    ;;
+  esac
+elif test "$with_gnu_ld" = yes; then
+  AC_MSG_CHECKING([for GNU ld])
+else
+  AC_MSG_CHECKING([for non-GNU ld])
+fi
+AC_CACHE_VAL(lt_cv_path_LD,
+[if test -z "$LD"; then
+  lt_save_ifs="$IFS"; IFS=$PATH_SEPARATOR
+  for ac_dir in $PATH; do
+    IFS="$lt_save_ifs"
+    test -z "$ac_dir" && ac_dir=.
+    if test -f "$ac_dir/$ac_prog" || test -f "$ac_dir/$ac_prog$ac_exeext"; then
+      lt_cv_path_LD="$ac_dir/$ac_prog"
+      # Check to see if the program is GNU ld.  I'd rather use --version,
+      # but apparently some GNU ld's only accept -v.
+      # Break only if it was the GNU/non-GNU ld that we prefer.
+      case `"$lt_cv_path_LD" -v 2>&1 </dev/null` in
+      *GNU* | *'with BFD'*)
+	test "$with_gnu_ld" != no && break
+	;;
+      *)
+	test "$with_gnu_ld" != yes && break
+	;;
+      esac
+    fi
+  done
+  IFS="$lt_save_ifs"
+else
+  lt_cv_path_LD="$LD" # Let the user override the test with a path.
+fi])
+LD="$lt_cv_path_LD"
+if test -n "$LD"; then
+  AC_MSG_RESULT($LD)
+else
+  AC_MSG_RESULT(no)
+fi
+test -z "$LD" && AC_MSG_ERROR([no acceptable ld found in \$PATH])
+AC_PROG_LD_GNU
+])# AC_PROG_LD
+
+
+# AC_PROG_LD_GNU
+# --------------
+AC_DEFUN([AC_PROG_LD_GNU],
+[AC_REQUIRE([AC_PROG_EGREP])dnl
+AC_CACHE_CHECK([if the linker ($LD) is GNU ld], lt_cv_prog_gnu_ld,
+[# I'd rather use --version here, but apparently some GNU ld's only accept -v.
+case `$LD -v 2>&1 </dev/null` in
+*GNU* | *'with BFD'*)
+  lt_cv_prog_gnu_ld=yes
+  ;;
+*)
+  lt_cv_prog_gnu_ld=no
+  ;;
+esac])
+with_gnu_ld=$lt_cv_prog_gnu_ld
+])# AC_PROG_LD_GNU
+
+
+# AC_PROG_LD_RELOAD_FLAG
+# ----------------------
+# find reload flag for linker
+#   -- PORTME Some linkers may need a different reload flag.
+AC_DEFUN([AC_PROG_LD_RELOAD_FLAG],
+[AC_CACHE_CHECK([for $LD option to reload object files],
+  lt_cv_ld_reload_flag,
+  [lt_cv_ld_reload_flag='-r'])
+reload_flag=$lt_cv_ld_reload_flag
+case $reload_flag in
+"" | " "*) ;;
+*) reload_flag=" $reload_flag" ;;
+esac
+reload_cmds='$LD$reload_flag -o $output$reload_objs'
+])# AC_PROG_LD_RELOAD_FLAG
+
+
+# AC_DEPLIBS_CHECK_METHOD
+# -----------------------
+# how to check for library dependencies
+#  -- PORTME fill in with the dynamic library characteristics
+AC_DEFUN([AC_DEPLIBS_CHECK_METHOD],
+[AC_CACHE_CHECK([how to recognise dependent libraries],
+lt_cv_deplibs_check_method,
+[lt_cv_file_magic_cmd='$MAGIC_CMD'
+lt_cv_file_magic_test_file=
+lt_cv_deplibs_check_method='unknown'
+# Need to set the preceding variable on all platforms that support
+# interlibrary dependencies.
+# 'none' -- dependencies not supported.
+# `unknown' -- same as none, but documents that we really don't know.
+# 'pass_all' -- all dependencies passed with no checks.
+# 'test_compile' -- check by making test program.
+# 'file_magic [[regex]]' -- check by looking for files in library path
+# which responds to the $file_magic_cmd with a given extended regex.
+# If you have `file' or equivalent on your system and you're not sure
+# whether `pass_all' will *always* work, you probably want this one.
+
+case $host_os in
+aix4* | aix5*)
+  lt_cv_deplibs_check_method=pass_all
+  ;;
+
+beos*)
+  lt_cv_deplibs_check_method=pass_all
+  ;;
+
+bsdi4*)
+  lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[ML]]SB (shared object|dynamic lib)'
+  lt_cv_file_magic_cmd='/usr/bin/file -L'
+  lt_cv_file_magic_test_file=/shlib/libc.so
+  ;;
+
+cygwin*)
+  lt_cv_deplibs_check_method=pass_all
+  ;;
+  
+mingw* | pw32*)
+  # win32_libid is a shell function defined in ltmain.sh
+  lt_cv_deplibs_check_method='file_magic ^x86 archive import|^x86 DLL'
+  lt_cv_file_magic_cmd='win32_libid'
+  ;;
+
+darwin* | rhapsody*)
+  # this will be overwritten by pass_all, but leave it in just in case
+  lt_cv_deplibs_check_method='file_magic Mach-O dynamically linked shared library'
+  lt_cv_file_magic_cmd='/usr/bin/file -L'
+  case "$host_os" in
+  rhapsody* | darwin1.[[012]])
+    lt_cv_file_magic_test_file=`/System/Library/Frameworks/System.framework/System`
+    ;;
+  *) # Darwin 1.3 on
+    lt_cv_file_magic_test_file='/usr/lib/libSystem.dylib'
+    ;;
+  esac
+  lt_cv_deplibs_check_method=pass_all
+  ;;
+
+freebsd* | kfreebsd*-gnu)
+  if echo __ELF__ | $CC -E - | grep __ELF__ > /dev/null; then
+    case $host_cpu in
+    i*86 )
+      # Not sure whether the presence of OpenBSD here was a mistake.
+      # Let's accept both of them until this is cleared up.
+      lt_cv_deplibs_check_method='file_magic (FreeBSD|OpenBSD)/i[[3-9]]86 (compact )?demand paged shared library'
+      lt_cv_file_magic_cmd=/usr/bin/file
+      lt_cv_file_magic_test_file=`echo /usr/lib/libc.so.*`
+      ;;
+    esac
+  else
+    lt_cv_deplibs_check_method=pass_all
+  fi
+  ;;
+
+gnu*)
+  lt_cv_deplibs_check_method=pass_all
+  ;;
+
+hpux10.20* | hpux11*)
+  lt_cv_file_magic_cmd=/usr/bin/file
+  case "$host_cpu" in
+  ia64*)
+    lt_cv_deplibs_check_method='file_magic (s[[0-9]][[0-9]][[0-9]]|ELF-[[0-9]][[0-9]]) shared object file - IA64'
+    lt_cv_file_magic_test_file=/usr/lib/hpux32/libc.so
+    ;;
+  hppa*64*)
+    [lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF-[0-9][0-9]) shared object file - PA-RISC [0-9].[0-9]']
+    lt_cv_file_magic_test_file=/usr/lib/pa20_64/libc.sl
+    ;;
+  *)
+    lt_cv_deplibs_check_method='file_magic (s[[0-9]][[0-9]][[0-9]]|PA-RISC[[0-9]].[[0-9]]) shared library'
+    lt_cv_file_magic_test_file=/usr/lib/libc.sl
+    ;;
+  esac
+  ;;
+
+irix5* | irix6* | nonstopux*)
+  case $host_os in
+  irix5* | nonstopux*)
+    # this will be overridden with pass_all, but let us keep it just in case
+    lt_cv_deplibs_check_method="file_magic ELF 32-bit MSB dynamic lib MIPS - version 1"
+    ;;
+  *)
+    case $LD in
+    *-32|*"-32 ") libmagic=32-bit;;
+    *-n32|*"-n32 ") libmagic=N32;;
+    *-64|*"-64 ") libmagic=64-bit;;
+    *) libmagic=never-match;;
+    esac
+    # this will be overridden with pass_all, but let us keep it just in case
+    lt_cv_deplibs_check_method="file_magic ELF ${libmagic} MSB mips-[[1234]] dynamic lib MIPS - version 1"
+    ;;
+  esac
+  lt_cv_file_magic_test_file=`echo /lib${libsuff}/libc.so*`
+  lt_cv_deplibs_check_method=pass_all
+  ;;
+
+# This must be Linux ELF.
+linux*)
+  case $host_cpu in
+  alpha* | hppa* | i*86 | ia64* | m68* | mips* | powerpc* | sparc* | s390* | sh* | x86_64* )
+    lt_cv_deplibs_check_method=pass_all ;;
+  # the debian people say, arm and glibc 2.3.1 works for them with pass_all
+  arm* )
+    lt_cv_deplibs_check_method=pass_all ;;
+  *)
+    # glibc up to 2.1.1 does not perform some relocations on ARM
+    lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[LM]]SB (shared object|dynamic lib )' ;;
+  esac
+  lt_cv_file_magic_test_file=`echo /lib/libc.so* /lib/libc-*.so`
+  ;;
+
+netbsd*)
+  if echo __ELF__ | $CC -E - | grep __ELF__ > /dev/null; then
+    lt_cv_deplibs_check_method='match_pattern /lib[[^/]]+(\.so\.[[0-9]]+\.[[0-9]]+|_pic\.a)$'
+  else
+    lt_cv_deplibs_check_method='match_pattern /lib[[^/]]+(\.so|_pic\.a)$'
+  fi
+  ;;
+
+newos6*)
+  lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[ML]]SB (executable|dynamic lib)'
+  lt_cv_file_magic_cmd=/usr/bin/file
+  lt_cv_file_magic_test_file=/usr/lib/libnls.so
+  ;;
+
+nto-qnx*)
+  lt_cv_deplibs_check_method=unknown
+  ;;
+
+openbsd*)
+  lt_cv_file_magic_cmd=/usr/bin/file
+  lt_cv_file_magic_test_file=`echo /usr/lib/libc.so.*`
+  if test -z "`echo __ELF__ | $CC -E - | grep __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then
+    lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[LM]]SB shared object'
+  else
+    lt_cv_deplibs_check_method='file_magic OpenBSD.* shared library'
+  fi
+  ;;
+
+osf3* | osf4* | osf5*)
+  # this will be overridden with pass_all, but let us keep it just in case
+  lt_cv_deplibs_check_method='file_magic COFF format alpha shared library'
+  lt_cv_file_magic_test_file=/shlib/libc.so
+  lt_cv_deplibs_check_method=pass_all
+  ;;
+
+sco3.2v5*)
+  lt_cv_deplibs_check_method=pass_all
+  ;;
+
+solaris*)
+  lt_cv_deplibs_check_method=pass_all
+  lt_cv_file_magic_test_file=/lib/libc.so
+  ;;
+
+sysv4 | sysv4.2uw2* | sysv4.3* | sysv5*)
+  case $host_vendor in
+  motorola)
+    lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[ML]]SB (shared object|dynamic lib) M[[0-9]][[0-9]]* Version [[0-9]]'
+    lt_cv_file_magic_test_file=`echo /usr/lib/libc.so*`
+    ;;
+  ncr)
+    lt_cv_deplibs_check_method=pass_all
+    ;;
+  sequent)
+    lt_cv_file_magic_cmd='/bin/file'
+    lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[LM]]SB (shared object|dynamic lib )'
+    ;;
+  sni)
+    lt_cv_file_magic_cmd='/bin/file'
+    lt_cv_deplibs_check_method="file_magic ELF [[0-9]][[0-9]]*-bit [[LM]]SB dynamic lib"
+    lt_cv_file_magic_test_file=/lib/libc.so
+    ;;
+  siemens)
+    lt_cv_deplibs_check_method=pass_all
+    ;;
+  esac
+  ;;
+
+sysv5OpenUNIX8* | sysv5UnixWare7* | sysv5uw[[78]]* | unixware7* | sysv4*uw2*)
+  lt_cv_deplibs_check_method=pass_all
+  ;;
+esac
+])
+file_magic_cmd=$lt_cv_file_magic_cmd
+deplibs_check_method=$lt_cv_deplibs_check_method
+test -z "$deplibs_check_method" && deplibs_check_method=unknown
+])# AC_DEPLIBS_CHECK_METHOD
+
+
+# AC_PROG_NM
+# ----------
+# find the pathname to a BSD-compatible name lister
+AC_DEFUN([AC_PROG_NM],
+[AC_CACHE_CHECK([for BSD-compatible nm], lt_cv_path_NM,
+[if test -n "$NM"; then
+  # Let the user override the test.
+  lt_cv_path_NM="$NM"
+else
+  lt_save_ifs="$IFS"; IFS=$PATH_SEPARATOR
+  for ac_dir in $PATH /usr/ccs/bin /usr/ucb /bin; do
+    IFS="$lt_save_ifs"
+    test -z "$ac_dir" && ac_dir=.
+    tmp_nm="$ac_dir/${ac_tool_prefix}nm"
+    if test -f "$tmp_nm" || test -f "$tmp_nm$ac_exeext" ; then
+      # Check to see if the nm accepts a BSD-compat flag.
+      # Adding the `sed 1q' prevents false positives on HP-UX, which says:
+      #   nm: unknown option "B" ignored
+      # Tru64's nm complains that /dev/null is an invalid object file
+      case `"$tmp_nm" -B /dev/null 2>&1 | sed '1q'` in
+      */dev/null* | *'Invalid file or object type'*)
+	lt_cv_path_NM="$tmp_nm -B"
+	break
+        ;;
+      *)
+	case `"$tmp_nm" -p /dev/null 2>&1 | sed '1q'` in
+	*/dev/null*)
+	  lt_cv_path_NM="$tmp_nm -p"
+	  break
+	  ;;
+	*)
+	  lt_cv_path_NM=${lt_cv_path_NM="$tmp_nm"} # keep the first match, but
+	  continue # so that we can try to find one that supports BSD flags
+	  ;;
+	esac
+      esac
+    fi
+  done
+  IFS="$lt_save_ifs"
+  test -z "$lt_cv_path_NM" && lt_cv_path_NM=nm
+fi])
+NM="$lt_cv_path_NM"
+])# AC_PROG_NM
+
+
+# AC_CHECK_LIBM
+# -------------
+# check for math library
+AC_DEFUN([AC_CHECK_LIBM],
+[AC_REQUIRE([AC_CANONICAL_HOST])dnl
+LIBM=
+case $host in
+*-*-beos* | *-*-cygwin* | *-*-pw32* | *-*-darwin*)
+  # These system don't have libm, or don't need it
+  ;;
+*-ncr-sysv4.3*)
+  AC_CHECK_LIB(mw, _mwvalidcheckl, LIBM="-lmw")
+  AC_CHECK_LIB(m, cos, LIBM="$LIBM -lm")
+  ;;
+*)
+  AC_CHECK_LIB(m, cos, LIBM="-lm")
+  ;;
+esac
+])# AC_CHECK_LIBM
+
+
+# AC_LIBLTDL_CONVENIENCE([DIRECTORY])
+# -----------------------------------
+# sets LIBLTDL to the link flags for the libltdl convenience library and
+# LTDLINCL to the include flags for the libltdl header and adds
+# --enable-ltdl-convenience to the configure arguments.  Note that LIBLTDL
+# and LTDLINCL are not AC_SUBSTed, nor is AC_CONFIG_SUBDIRS called.  If
+# DIRECTORY is not provided, it is assumed to be `libltdl'.  LIBLTDL will
+# be prefixed with '${top_builddir}/' and LTDLINCL will be prefixed with
+# '${top_srcdir}/' (note the single quotes!).  If your package is not
+# flat and you're not using automake, define top_builddir and
+# top_srcdir appropriately in the Makefiles.
+AC_DEFUN([AC_LIBLTDL_CONVENIENCE],
+[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl
+  case $enable_ltdl_convenience in
+  no) AC_MSG_ERROR([this package needs a convenience libltdl]) ;;
+  "") enable_ltdl_convenience=yes
+      ac_configure_args="$ac_configure_args --enable-ltdl-convenience" ;;
+  esac
+  LIBLTDL='${top_builddir}/'ifelse($#,1,[$1],['libltdl'])/libltdlc.la
+  LTDLINCL='-I${top_srcdir}/'ifelse($#,1,[$1],['libltdl'])
+  # For backwards non-gettext consistent compatibility...
+  INCLTDL="$LTDLINCL"
+])# AC_LIBLTDL_CONVENIENCE
+
+
+# AC_LIBLTDL_INSTALLABLE([DIRECTORY])
+# -----------------------------------
+# sets LIBLTDL to the link flags for the libltdl installable library and
+# LTDLINCL to the include flags for the libltdl header and adds
+# --enable-ltdl-install to the configure arguments.  Note that LIBLTDL
+# and LTDLINCL are not AC_SUBSTed, nor is AC_CONFIG_SUBDIRS called.  If
+# DIRECTORY is not provided and an installed libltdl is not found, it is
+# assumed to be `libltdl'.  LIBLTDL will be prefixed with '${top_builddir}/'
+# and LTDLINCL will be prefixed with '${top_srcdir}/' (note the single
+# quotes!).  If your package is not flat and you're not using automake,
+# define top_builddir and top_srcdir appropriately in the Makefiles.
+# In the future, this macro may have to be called after AC_PROG_LIBTOOL.
+AC_DEFUN([AC_LIBLTDL_INSTALLABLE],
+[AC_BEFORE([$0],[AC_LIBTOOL_SETUP])dnl
+  AC_CHECK_LIB(ltdl, lt_dlinit,
+  [test x"$enable_ltdl_install" != xyes && enable_ltdl_install=no],
+  [if test x"$enable_ltdl_install" = xno; then
+     AC_MSG_WARN([libltdl not installed, but installation disabled])
+   else
+     enable_ltdl_install=yes
+   fi
+  ])
+  if test x"$enable_ltdl_install" = x"yes"; then
+    ac_configure_args="$ac_configure_args --enable-ltdl-install"
+    LIBLTDL='${top_builddir}/'ifelse($#,1,[$1],['libltdl'])/libltdl.la
+    LTDLINCL='-I${top_srcdir}/'ifelse($#,1,[$1],['libltdl'])
+  else
+    ac_configure_args="$ac_configure_args --enable-ltdl-install=no"
+    LIBLTDL="-lltdl"
+    LTDLINCL=
+  fi
+  # For backwards non-gettext consistent compatibility...
+  INCLTDL="$LTDLINCL"
+])# AC_LIBLTDL_INSTALLABLE
+
+
+# AC_LIBTOOL_CXX
+# --------------
+# enable support for C++ libraries
+AC_DEFUN([AC_LIBTOOL_CXX],
+[AC_REQUIRE([_LT_AC_LANG_CXX])
+])# AC_LIBTOOL_CXX
+
+
+# _LT_AC_LANG_CXX
+# ---------------
+AC_DEFUN([_LT_AC_LANG_CXX],
+[AC_REQUIRE([AC_PROG_CXX])
+AC_REQUIRE([AC_PROG_CXXCPP])
+_LT_AC_SHELL_INIT([tagnames=${tagnames+${tagnames},}CXX])
+])# _LT_AC_LANG_CXX
+
+
+# AC_LIBTOOL_F77
+# --------------
+# enable support for Fortran 77 libraries
+AC_DEFUN([AC_LIBTOOL_F77],
+[AC_REQUIRE([_LT_AC_LANG_F77])
+])# AC_LIBTOOL_F77
+
+
+# _LT_AC_LANG_F77
+# ---------------
+AC_DEFUN([_LT_AC_LANG_F77],
+[AC_REQUIRE([AC_PROG_F77])
+_LT_AC_SHELL_INIT([tagnames=${tagnames+${tagnames},}F77])
+])# _LT_AC_LANG_F77
+
+
+# AC_LIBTOOL_GCJ
+# --------------
+# enable support for GCJ libraries
+AC_DEFUN([AC_LIBTOOL_GCJ],
+[AC_REQUIRE([_LT_AC_LANG_GCJ])
+])# AC_LIBTOOL_GCJ
+
+
+# _LT_AC_LANG_GCJ
+# ---------------
+AC_DEFUN([_LT_AC_LANG_GCJ],
+[AC_PROVIDE_IFELSE([AC_PROG_GCJ],[],
+  [AC_PROVIDE_IFELSE([A][M_PROG_GCJ],[],
+    [AC_PROVIDE_IFELSE([LT_AC_PROG_GCJ],[],
+      [ifdef([AC_PROG_GCJ],[AC_REQUIRE([AC_PROG_GCJ])],
+	 [ifdef([A][M_PROG_GCJ],[AC_REQUIRE([A][M_PROG_GCJ])],
+	   [AC_REQUIRE([A][C_PROG_GCJ_OR_A][M_PROG_GCJ])])])])])])
+_LT_AC_SHELL_INIT([tagnames=${tagnames+${tagnames},}GCJ])
+])# _LT_AC_LANG_GCJ
+
+
+# AC_LIBTOOL_RC
+# --------------
+# enable support for Windows resource files
+AC_DEFUN([AC_LIBTOOL_RC],
+[AC_REQUIRE([LT_AC_PROG_RC])
+_LT_AC_SHELL_INIT([tagnames=${tagnames+${tagnames},}RC])
+])# AC_LIBTOOL_RC
+
+
+# AC_LIBTOOL_LANG_C_CONFIG
+# ------------------------
+# Ensure that the configuration vars for the C compiler are
+# suitably defined.  Those variables are subsequently used by
+# AC_LIBTOOL_CONFIG to write the compiler configuration to `libtool'.
+AC_DEFUN([AC_LIBTOOL_LANG_C_CONFIG], [_LT_AC_LANG_C_CONFIG])
+AC_DEFUN([_LT_AC_LANG_C_CONFIG],
+[lt_save_CC="$CC"
+AC_LANG_PUSH(C)
+
+# Source file extension for C test sources.
+ac_ext=c
+
+# Object file extension for compiled C test sources.
+objext=o
+_LT_AC_TAGVAR(objext, $1)=$objext
+
+# Code to be used in simple compile tests
+lt_simple_compile_test_code="int some_variable = 0;\n"
+
+# Code to be used in simple link tests
+lt_simple_link_test_code='int main(){return(0);}\n'
+
+_LT_AC_SYS_COMPILER
+
+#
+# Check for any special shared library compilation flags.
+#
+_LT_AC_TAGVAR(lt_prog_cc_shlib, $1)=
+if test "$GCC" = no; then
+  case $host_os in
+  sco3.2v5*)
+    _LT_AC_TAGVAR(lt_prog_cc_shlib, $1)='-belf'
+    ;;
+  esac
+fi
+if test -n "$_LT_AC_TAGVAR(lt_prog_cc_shlib, $1)"; then
+  AC_MSG_WARN([`$CC' requires `$_LT_AC_TAGVAR(lt_prog_cc_shlib, $1)' to build shared libraries])
+  if echo "$old_CC $old_CFLAGS " | grep "[[ 	]]$]_LT_AC_TAGVAR(lt_prog_cc_shlib, $1)[[[ 	]]" >/dev/null; then :
+  else
+    AC_MSG_WARN([add `$_LT_AC_TAGVAR(lt_prog_cc_shlib, $1)' to the CC or CFLAGS env variable and reconfigure])
+    _LT_AC_TAGVAR(lt_cv_prog_cc_can_build_shared, $1)=no
+  fi
+fi
+
+
+#
+# Check to make sure the static flag actually works.
+#
+AC_LIBTOOL_LINKER_OPTION([if $compiler static flag $_LT_AC_TAGVAR(lt_prog_compiler_static, $1) works],
+  _LT_AC_TAGVAR(lt_prog_compiler_static_works, $1),
+  $_LT_AC_TAGVAR(lt_prog_compiler_static, $1),
+  [],
+  [_LT_AC_TAGVAR(lt_prog_compiler_static, $1)=])
+
+
+## CAVEAT EMPTOR:
+## There is no encapsulation within the following macros, do not change
+## the running order or otherwise move them around unless you know exactly
+## what you are doing...
+AC_LIBTOOL_PROG_COMPILER_NO_RTTI($1)
+AC_LIBTOOL_PROG_COMPILER_PIC($1)
+AC_LIBTOOL_PROG_CC_C_O($1)
+AC_LIBTOOL_SYS_HARD_LINK_LOCKS($1)
+AC_LIBTOOL_PROG_LD_SHLIBS($1)
+AC_LIBTOOL_SYS_DYNAMIC_LINKER($1)
+AC_LIBTOOL_PROG_LD_HARDCODE_LIBPATH($1)
+AC_LIBTOOL_SYS_LIB_STRIP
+AC_LIBTOOL_DLOPEN_SELF($1)
+
+# Report which librarie types wil actually be built
+AC_MSG_CHECKING([if libtool supports shared libraries])
+AC_MSG_RESULT([$can_build_shared])
+
+AC_MSG_CHECKING([whether to build shared libraries])
+test "$can_build_shared" = "no" && enable_shared=no
+
+# On AIX, shared libraries and static libraries use the same namespace, and
+# are all built from PIC.
+case "$host_os" in
+aix3*)
+  test "$enable_shared" = yes && enable_static=no
+  if test -n "$RANLIB"; then
+    archive_cmds="$archive_cmds~\$RANLIB \$lib"
+    postinstall_cmds='$RANLIB $lib'
+  fi
+  ;;
+
+aix4*)
+  if test "$host_cpu" != ia64 && test "$aix_use_runtimelinking" = no ; then
+    test "$enable_shared" = yes && enable_static=no
+  fi
+  ;;
+  darwin* | rhapsody*)
+  if test "$GCC" = yes; then
+    _LT_AC_TAGVAR(archive_cmds_need_lc, $1)=no
+    case "$host_os" in
+    rhapsody* | darwin1.[[012]])
+      _LT_AC_TAGVAR(allow_undefined_flag, $1)='-Wl,-undefined -Wl,suppress'
+      ;;
+    *) # Darwin 1.3 on
+      if test -z ${MACOSX_DEPLOYMENT_TARGET} ; then
+	_LT_AC_TAGVAR(allow_undefined_flag, $1)='-Wl,-flat_namespace -Wl,-undefined -Wl,suppress'
+      else
+	case ${MACOSX_DEPLOYMENT_TARGET} in
+	  10.[012])
+	    _LT_AC_TAGVAR(allow_undefined_flag, $1)='-Wl,-flat_namespace -Wl,-undefined -Wl,suppress'
+	    ;;
+	  10.*)
+	    _LT_AC_TAGVAR(allow_undefined_flag, $1)='-Wl,-undefined -Wl,dynamic_lookup'
+	    ;;
+	esac
+      fi
+      ;;
+    esac
+    output_verbose_link_cmd='echo'
+    _LT_AC_TAGVAR(archive_cmds, $1)='$CC -dynamiclib $allow_undefined_flag -o $lib $compiler_flags $libobjs $deplibs -install_name $rpath/$soname $verstring'
+    _LT_AC_TAGVAR(module_cmds, $1)='$CC $allow_undefined_flag -o $lib -bundle $compiler_flags $libobjs $deplibs'
+    # Don't fix this by using the ld -exported_symbols_list flag, it doesn't exist in older darwin ld's
+    _LT_AC_TAGVAR(archive_expsym_cmds, $1)='sed -e "s,#.*,," -e "s,^[    ]*,," -e "s,^\(..*\),_&," < $export_symbols > $output_objdir/${libname}-symbols.expsym~$CC -dynamiclib $allow_undefined_flag  -o $lib $compiler_flags $libobjs $deplibs -install_name $rpath/$soname $verstring~nmedit -s $output_objdir/${libname}-symbols.expsym ${lib}'
+    _LT_AC_TAGVAR(module_expsym_cmds, $1)='sed -e "s,#.*,," -e "s,^[    ]*,," -e "s,^\(..*\),_&," < $export_symbols > $output_objdir/${libname}-symbols.expsym~$CC $allow_undefined_flag  -o $lib -bundle $compiler_flags $libobjs $deplibs~nmedit -s $output_objdir/${libname}-symbols.expsym ${lib}'
+    _LT_AC_TAGVAR(hardcode_direct, $1)=no
+    _LT_AC_TAGVAR(hardcode_automatic, $1)=yes
+    _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=unsupported
+    _LT_AC_TAGVAR(whole_archive_flag_spec, $1)='-all_load $convenience'
+    _LT_AC_TAGVAR(link_all_deplibs, $1)=yes
+  else
+    _LT_AC_TAGVAR(ld_shlibs, $1)=no
+  fi  
+    ;;  
+esac
+AC_MSG_RESULT([$enable_shared])
+
+AC_MSG_CHECKING([whether to build static libraries])
+# Make sure either enable_shared or enable_static is yes.
+test "$enable_shared" = yes || enable_static=yes
+AC_MSG_RESULT([$enable_static])
+
+AC_LIBTOOL_CONFIG($1)
+
+AC_LANG_POP
+CC="$lt_save_CC"
+])# AC_LIBTOOL_LANG_C_CONFIG
+
+
+# AC_LIBTOOL_LANG_CXX_CONFIG
+# --------------------------
+# Ensure that the configuration vars for the C compiler are
+# suitably defined.  Those variables are subsequently used by
+# AC_LIBTOOL_CONFIG to write the compiler configuration to `libtool'.
+AC_DEFUN([AC_LIBTOOL_LANG_CXX_CONFIG], [_LT_AC_LANG_CXX_CONFIG(CXX)])
+AC_DEFUN([_LT_AC_LANG_CXX_CONFIG],
+[AC_LANG_PUSH(C++)
+AC_REQUIRE([AC_PROG_CXX])
+AC_REQUIRE([AC_PROG_CXXCPP])
+
+_LT_AC_TAGVAR(archive_cmds_need_lc, $1)=no
+_LT_AC_TAGVAR(allow_undefined_flag, $1)=
+_LT_AC_TAGVAR(always_export_symbols, $1)=no
+_LT_AC_TAGVAR(archive_expsym_cmds, $1)=
+_LT_AC_TAGVAR(export_dynamic_flag_spec, $1)=
+_LT_AC_TAGVAR(hardcode_direct, $1)=no
+_LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)=
+_LT_AC_TAGVAR(hardcode_libdir_flag_spec_ld, $1)=
+_LT_AC_TAGVAR(hardcode_libdir_separator, $1)=
+_LT_AC_TAGVAR(hardcode_minus_L, $1)=no
+_LT_AC_TAGVAR(hardcode_automatic, $1)=no
+_LT_AC_TAGVAR(module_cmds, $1)=
+_LT_AC_TAGVAR(module_expsym_cmds, $1)=
+_LT_AC_TAGVAR(link_all_deplibs, $1)=unknown
+_LT_AC_TAGVAR(old_archive_cmds, $1)=$old_archive_cmds
+_LT_AC_TAGVAR(no_undefined_flag, $1)=
+_LT_AC_TAGVAR(whole_archive_flag_spec, $1)=
+_LT_AC_TAGVAR(enable_shared_with_static_runtimes, $1)=no
+
+# Dependencies to place before and after the object being linked:
+_LT_AC_TAGVAR(predep_objects, $1)=
+_LT_AC_TAGVAR(postdep_objects, $1)=
+_LT_AC_TAGVAR(predeps, $1)=
+_LT_AC_TAGVAR(postdeps, $1)=
+_LT_AC_TAGVAR(compiler_lib_search_path, $1)=
+
+# Source file extension for C++ test sources.
+ac_ext=cc
+
+# Object file extension for compiled C++ test sources.
+objext=o
+_LT_AC_TAGVAR(objext, $1)=$objext
+
+# Code to be used in simple compile tests
+lt_simple_compile_test_code="int some_variable = 0;\n"
+
+# Code to be used in simple link tests
+lt_simple_link_test_code='int main(int, char *[]) { return(0); }\n'
+
+# ltmain only uses $CC for tagged configurations so make sure $CC is set.
+_LT_AC_SYS_COMPILER
+
+# Allow CC to be a program name with arguments.
+lt_save_CC=$CC
+lt_save_LD=$LD
+lt_save_GCC=$GCC
+GCC=$GXX
+lt_save_with_gnu_ld=$with_gnu_ld
+lt_save_path_LD=$lt_cv_path_LD
+if test -n "${lt_cv_prog_gnu_ldcxx+set}"; then
+  lt_cv_prog_gnu_ld=$lt_cv_prog_gnu_ldcxx
+else
+  unset lt_cv_prog_gnu_ld
+fi
+if test -n "${lt_cv_path_LDCXX+set}"; then
+  lt_cv_path_LD=$lt_cv_path_LDCXX
+else
+  unset lt_cv_path_LD
+fi
+test -z "${LDCXX+set}" || LD=$LDCXX
+CC=${CXX-"c++"}
+compiler=$CC
+_LT_AC_TAGVAR(compiler, $1)=$CC
+cc_basename=`$echo X"$compiler" | $Xsed -e 's%^.*/%%'`
+
+# We don't want -fno-exception wen compiling C++ code, so set the
+# no_builtin_flag separately
+if test "$GXX" = yes; then
+  _LT_AC_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)=' -fno-builtin'
+else
+  _LT_AC_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)=
+fi
+
+if test "$GXX" = yes; then
+  # Set up default GNU C++ configuration
+
+  AC_PROG_LD
+
+  # Check if GNU C++ uses GNU ld as the underlying linker, since the
+  # archiving commands below assume that GNU ld is being used.
+  if test "$with_gnu_ld" = yes; then
+    _LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects ${wl}-soname $wl$soname -o $lib'
+    _LT_AC_TAGVAR(archive_expsym_cmds, $1)='$CC -shared -nostdlib $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+
+    _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}--rpath ${wl}$libdir'
+    _LT_AC_TAGVAR(export_dynamic_flag_spec, $1)='${wl}--export-dynamic'
+
+    # If archive_cmds runs LD, not CC, wlarc should be empty
+    # XXX I think wlarc can be eliminated in ltcf-cxx, but I need to
+    #     investigate it a little bit more. (MM)
+    wlarc='${wl}'
+
+    # ancient GNU ld didn't support --whole-archive et. al.
+    if eval "`$CC -print-prog-name=ld` --help 2>&1" | \
+	grep 'no-whole-archive' > /dev/null; then
+      _LT_AC_TAGVAR(whole_archive_flag_spec, $1)="$wlarc"'--whole-archive$convenience '"$wlarc"'--no-whole-archive'
+    else
+      _LT_AC_TAGVAR(whole_archive_flag_spec, $1)=
+    fi
+  else
+    with_gnu_ld=no
+    wlarc=
+
+    # A generic and very simple default shared library creation
+    # command for GNU C++ for the case where it uses the native
+    # linker, instead of GNU ld.  If possible, this setting should
+    # overridden to take advantage of the native linker features on
+    # the platform it is being used on.
+    _LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects -o $lib'
+  fi
+
+  # Commands to make compiler produce verbose output that lists
+  # what "hidden" libraries, object files and flags are used when
+  # linking a shared library.
+  output_verbose_link_cmd='$CC -shared $CFLAGS -v conftest.$objext 2>&1 | grep "\-L"'
+
+else
+  GXX=no
+  with_gnu_ld=no
+  wlarc=
+fi
+
+# PORTME: fill in a description of your system's C++ link characteristics
+AC_MSG_CHECKING([whether the $compiler linker ($LD) supports shared libraries])
+_LT_AC_TAGVAR(ld_shlibs, $1)=yes
+case $host_os in
+  aix3*)
+    # FIXME: insert proper C++ library support
+    _LT_AC_TAGVAR(ld_shlibs, $1)=no
+    ;;
+  aix4* | aix5*)
+    if test "$host_cpu" = ia64; then
+      # On IA64, the linker does run time linking by default, so we don't
+      # have to do anything special.
+      aix_use_runtimelinking=no
+      exp_sym_flag='-Bexport'
+      no_entry_flag=""
+    else
+      # KDE requires run time linking.  Make it the default.
+      aix_use_runtimelinking=yes
+      exp_sym_flag='-bexport'
+      no_entry_flag='-bnoentry'
+    fi
+
+    # When large executables or shared objects are built, AIX ld can
+    # have problems creating the table of contents.  If linking a library
+    # or program results in "error TOC overflow" add -mminimal-toc to
+    # CXXFLAGS/CFLAGS for g++/gcc.  In the cases where that is not
+    # enough to fix the problem, add -Wl,-bbigtoc to LDFLAGS.
+
+    _LT_AC_TAGVAR(archive_cmds, $1)=''
+    _LT_AC_TAGVAR(hardcode_direct, $1)=yes
+    _LT_AC_TAGVAR(hardcode_libdir_separator, $1)=':'
+    _LT_AC_TAGVAR(link_all_deplibs, $1)=yes
+
+    if test "$GXX" = yes; then
+      case $host_os in aix4.[012]|aix4.[012].*)
+      # We only want to do this on AIX 4.2 and lower, the check
+      # below for broken collect2 doesn't work under 4.3+
+	collect2name=`${CC} -print-prog-name=collect2`
+	if test -f "$collect2name" && \
+	   strings "$collect2name" | grep resolve_lib_name >/dev/null
+	then
+	  # We have reworked collect2
+	  _LT_AC_TAGVAR(hardcode_direct, $1)=yes
+	else
+	  # We have old collect2
+	  _LT_AC_TAGVAR(hardcode_direct, $1)=unsupported
+	  # It fails to find uninstalled libraries when the uninstalled
+	  # path is not listed in the libpath.  Setting hardcode_minus_L
+	  # to unsupported forces relinking
+	  _LT_AC_TAGVAR(hardcode_minus_L, $1)=yes
+	  _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir'
+	  _LT_AC_TAGVAR(hardcode_libdir_separator, $1)=
+	fi
+      esac
+      shared_flag='-shared'
+    else
+      # not using gcc
+      if test "$host_cpu" = ia64; then
+	# VisualAge C++, Version 5.5 for AIX 5L for IA-64, Beta 3 Release
+	# chokes on -Wl,-G. The following line is correct:
+	shared_flag='-G'
+      else
+	if test "$aix_use_runtimelinking" = yes; then
+	  shared_flag='-qmkshrobj ${wl}-G'
+	else
+	  shared_flag='-qmkshrobj'
+	fi
+      fi
+    fi
+
+    # Let the compiler handle the export list.
+    _LT_AC_TAGVAR(always_export_symbols, $1)=no
+    if test "$aix_use_runtimelinking" = yes; then
+      # Warning - without using the other runtime loading flags (-brtl),
+      # -berok will link without error, but may produce a broken library.
+      _LT_AC_TAGVAR(allow_undefined_flag, $1)='-berok'
+      # Determine the default libpath from the value encoded in an empty executable.
+      _LT_AC_SYS_LIBPATH_AIX
+      _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-blibpath:$libdir:'"$aix_libpath"
+
+      _LT_AC_TAGVAR(archive_cmds, $1)="\$CC"' -o $output_objdir/$soname $compiler_flags $libobjs $deplibs `if test "x${allow_undefined_flag}" != "x"; then echo "${wl}${allow_undefined_flag}"; else :; fi` '" $shared_flag"
+      _LT_AC_TAGVAR(archive_expsym_cmds, $1)="\$CC"' -o $output_objdir/$soname $compiler_flags $libobjs $deplibs `if test "x${allow_undefined_flag}" != "x"; then echo "${wl}${allow_undefined_flag}"; else :; fi` '"\${wl}$exp_sym_flag:\$export_symbols $shared_flag"
+     else
+      if test "$host_cpu" = ia64; then
+	_LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-R $libdir:/usr/lib:/lib'
+	_LT_AC_TAGVAR(allow_undefined_flag, $1)="-z nodefs"
+	_LT_AC_TAGVAR(archive_expsym_cmds, $1)="\$CC $shared_flag"' -o $output_objdir/$soname $compiler_flags $libobjs $deplibs ${wl}${allow_undefined_flag} '"\${wl}$no_entry_flag \${wl}$exp_sym_flag:\$export_symbols"
+      else
+	# Determine the default libpath from the value encoded in an empty executable.
+	_LT_AC_SYS_LIBPATH_AIX
+	_LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-blibpath:$libdir:'"$aix_libpath"
+	# Warning - without using the other run time loading flags,
+	# -berok will link without error, but may produce a broken library.
+	_LT_AC_TAGVAR(no_undefined_flag, $1)=' ${wl}-bernotok'
+	_LT_AC_TAGVAR(allow_undefined_flag, $1)=' ${wl}-berok'
+	# -bexpall does not export symbols beginning with underscore (_)
+	_LT_AC_TAGVAR(always_export_symbols, $1)=yes
+	# Exported symbols can be pulled into shared objects from archives
+	_LT_AC_TAGVAR(whole_archive_flag_spec, $1)=' '
+	_LT_AC_TAGVAR(archive_cmds_need_lc, $1)=yes
+	# This is similar to how AIX traditionally builds it's shared libraries.
+	_LT_AC_TAGVAR(archive_expsym_cmds, $1)="\$CC $shared_flag"' -o $output_objdir/$soname $compiler_flags $libobjs $deplibs ${wl}-bE:$export_symbols ${wl}-bnoentry${allow_undefined_flag}~$AR $AR_FLAGS $output_objdir/$libname$release.a $output_objdir/$soname'
+      fi
+    fi
+    ;;
+  chorus*)
+    case $cc_basename in
+      *)
+	# FIXME: insert proper C++ library support
+	_LT_AC_TAGVAR(ld_shlibs, $1)=no
+	;;
+    esac
+    ;;
+
+  cygwin* | mingw* | pw32*)
+    # _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1) is actually meaningless,
+    # as there is no search path for DLLs.
+    _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir'
+    _LT_AC_TAGVAR(allow_undefined_flag, $1)=no
+    _LT_AC_TAGVAR(always_export_symbols, $1)=no
+    _LT_AC_TAGVAR(enable_shared_with_static_runtimes, $1)=yes
+
+    if $LD --help 2>&1 | grep 'auto-import' > /dev/null; then
+      _LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects -o $output_objdir/$soname ${wl}--image-base=0x10000000 ${wl}--out-implib,$lib'
+      # If the export-symbols file already is a .def file (1st line
+      # is EXPORTS), use it as is; otherwise, prepend...
+      _LT_AC_TAGVAR(archive_expsym_cmds, $1)='if test "x`$SED 1q $export_symbols`" = xEXPORTS; then
+	cp $export_symbols $output_objdir/$soname.def;
+      else
+	echo EXPORTS > $output_objdir/$soname.def;
+	cat $export_symbols >> $output_objdir/$soname.def;
+      fi~
+      $CC -shared -nostdlib $output_objdir/$soname.def $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects -o $output_objdir/$soname ${wl}--image-base=0x10000000 ${wl}--out-implib,$lib'
+    else
+      _LT_AC_TAGVAR(ld_shlibs, $1)=no
+    fi
+  ;;
+
+  darwin* | rhapsody*)
+  if test "$GXX" = yes; then
+    _LT_AC_TAGVAR(archive_cmds_need_lc, $1)=no
+    case "$host_os" in
+    rhapsody* | darwin1.[[012]])
+      _LT_AC_TAGVAR(allow_undefined_flag, $1)='-Wl,-undefined -Wl,suppress'
+      ;;
+    *) # Darwin 1.3 on
+      if test -z ${MACOSX_DEPLOYMENT_TARGET} ; then
+	_LT_AC_TAGVAR(allow_undefined_flag, $1)='-Wl,-flat_namespace -Wl,-undefined -Wl,suppress'
+      else
+	case ${MACOSX_DEPLOYMENT_TARGET} in
+	  10.[012])
+	    _LT_AC_TAGVAR(allow_undefined_flag, $1)='-Wl,-flat_namespace -Wl,-undefined -Wl,suppress'
+	    ;;
+	  10.*)
+	    _LT_AC_TAGVAR(allow_undefined_flag, $1)='-Wl,-undefined -Wl,dynamic_lookup'
+	    ;;
+	esac
+      fi
+      ;;
+    esac
+    lt_int_apple_cc_single_mod=no
+    output_verbose_link_cmd='echo'
+    if $CC -dumpspecs 2>&1 | grep 'single_module' >/dev/null ; then
+      lt_int_apple_cc_single_mod=yes
+    fi
+    if test "X$lt_int_apple_cc_single_mod" = Xyes ; then
+      _LT_AC_TAGVAR(archive_cmds, $1)='$CC -dynamiclib -single_module $allow_undefined_flag -o $lib $compiler_flags $libobjs $deplibs -install_name $rpath/$soname $verstring'
+    else
+      _LT_AC_TAGVAR(archive_cmds, $1)='$CC -r ${wl}-bind_at_load -keep_private_externs -nostdlib -o ${lib}-master.o $libobjs~$CC -dynamiclib $allow_undefined_flag -o $lib ${lib}-master.o $compiler_flags $deplibs -install_name $rpath/$soname $verstring'
+    fi
+    _LT_AC_TAGVAR(module_cmds, $1)='$CC ${wl}-bind_at_load $allow_undefined_flag -o $lib -bundle $compiler_flags $libobjs $deplibs'
+
+    # Don't fix this by using the ld -exported_symbols_list flag, it doesn't exist in older darwin ld's
+    if test "X$lt_int_apple_cc_single_mod" = Xyes ; then
+      _LT_AC_TAGVAR(archive_expsym_cmds, $1)='sed -e "s,#.*,," -e "s,^[    ]*,," -e "s,^\(..*\),_&," < $export_symbols > $output_objdir/${libname}-symbols.expsym~$CC -dynamiclib -single_module $allow_undefined_flag -o $lib $compiler_flags $libobjs $deplibs -install_name $rpath/$soname $verstring~nmedit -s $output_objdir/${libname}-symbols.expsym ${lib}'
+    else
+      _LT_AC_TAGVAR(archive_expsym_cmds, $1)='sed -e "s,#.*,," -e "s,^[    ]*,," -e "s,^\(..*\),_&," < $export_symbols > $output_objdir/${libname}-symbols.expsym~$CC -r ${wl}-bind_at_load -keep_private_externs -nostdlib -o ${lib}-master.o $libobjs~$CC -dynamiclib $allow_undefined_flag -o $lib ${lib}-master.o $compiler_flags $deplibs -install_name $rpath/$soname $verstring~nmedit -s $output_objdir/${libname}-symbols.expsym ${lib}'
+    fi
+    _LT_AC_TAGVAR(module_expsym_cmds, $1)='sed -e "s,#.*,," -e "s,^[    ]*,," -e "s,^\(..*\),_&," < $export_symbols > $output_objdir/${libname}-symbols.expsym~$CC $allow_undefined_flag  -o $lib -bundle $compiler_flags $libobjs $deplibs~nmedit -s $output_objdir/${libname}-symbols.expsym ${lib}'
+    _LT_AC_TAGVAR(hardcode_direct, $1)=no
+    _LT_AC_TAGVAR(hardcode_automatic, $1)=yes
+    _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=unsupported
+    _LT_AC_TAGVAR(whole_archive_flag_spec, $1)='-all_load $convenience'
+    _LT_AC_TAGVAR(link_all_deplibs, $1)=yes
+  else
+    _LT_AC_TAGVAR(ld_shlibs, $1)=no
+  fi
+    ;;
+
+  dgux*)
+    case $cc_basename in
+      ec++)
+	# FIXME: insert proper C++ library support
+	_LT_AC_TAGVAR(ld_shlibs, $1)=no
+	;;
+      ghcx)
+	# Green Hills C++ Compiler
+	# FIXME: insert proper C++ library support
+	_LT_AC_TAGVAR(ld_shlibs, $1)=no
+	;;
+      *)
+	# FIXME: insert proper C++ library support
+	_LT_AC_TAGVAR(ld_shlibs, $1)=no
+	;;
+    esac
+    ;;
+  freebsd[12]*)
+    # C++ shared libraries reported to be fairly broken before switch to ELF
+    _LT_AC_TAGVAR(ld_shlibs, $1)=no
+    ;;
+  freebsd-elf*)
+    _LT_AC_TAGVAR(archive_cmds_need_lc, $1)=no
+    ;;
+  freebsd* | kfreebsd*-gnu)
+    # FreeBSD 3 and later use GNU C++ and GNU ld with standard ELF
+    # conventions
+    _LT_AC_TAGVAR(ld_shlibs, $1)=yes
+    ;;
+  gnu*)
+    ;;
+  hpux9*)
+    _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}+b ${wl}$libdir'
+    _LT_AC_TAGVAR(hardcode_libdir_separator, $1)=:
+    _LT_AC_TAGVAR(export_dynamic_flag_spec, $1)='${wl}-E'
+    _LT_AC_TAGVAR(hardcode_direct, $1)=yes
+    _LT_AC_TAGVAR(hardcode_minus_L, $1)=yes # Not in the search PATH,
+				# but as the default
+				# location of the library.
+
+    case $cc_basename in
+    CC)
+      # FIXME: insert proper C++ library support
+      _LT_AC_TAGVAR(ld_shlibs, $1)=no
+      ;;
+    aCC)
+      _LT_AC_TAGVAR(archive_cmds, $1)='$rm $output_objdir/$soname~$CC -b ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
+      # Commands to make compiler produce verbose output that lists
+      # what "hidden" libraries, object files and flags are used when
+      # linking a shared library.
+      #
+      # There doesn't appear to be a way to prevent this compiler from
+      # explicitly linking system object files so we need to strip them
+      # from the output so that they don't get included in the library
+      # dependencies.
+      output_verbose_link_cmd='templist=`($CC -b $CFLAGS -v conftest.$objext 2>&1) | egrep "\-L"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; echo $list'
+      ;;
+    *)
+      if test "$GXX" = yes; then
+        _LT_AC_TAGVAR(archive_cmds, $1)='$rm $output_objdir/$soname~$CC -shared -nostdlib -fPIC ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
+      else
+        # FIXME: insert proper C++ library support
+        _LT_AC_TAGVAR(ld_shlibs, $1)=no
+      fi
+      ;;
+    esac
+    ;;
+  hpux10*|hpux11*)
+    if test $with_gnu_ld = no; then
+      case "$host_cpu" in
+      hppa*64*)
+	_LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}+b ${wl}$libdir'
+	_LT_AC_TAGVAR(hardcode_libdir_flag_spec_ld, $1)='+b $libdir'
+	_LT_AC_TAGVAR(hardcode_libdir_separator, $1)=:
+        ;;
+      ia64*)
+	_LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir'
+        ;;
+      *)
+	_LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}+b ${wl}$libdir'
+	_LT_AC_TAGVAR(hardcode_libdir_separator, $1)=:
+	_LT_AC_TAGVAR(export_dynamic_flag_spec, $1)='${wl}-E'
+        ;;
+      esac
+    fi
+    case "$host_cpu" in
+    hppa*64*)
+      _LT_AC_TAGVAR(hardcode_direct, $1)=no
+      _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+      ;;
+    ia64*)
+      _LT_AC_TAGVAR(hardcode_direct, $1)=no
+      _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+      _LT_AC_TAGVAR(hardcode_minus_L, $1)=yes # Not in the search PATH,
+					      # but as the default
+					      # location of the library.
+      ;;
+    *)
+      _LT_AC_TAGVAR(hardcode_direct, $1)=yes
+      _LT_AC_TAGVAR(hardcode_minus_L, $1)=yes # Not in the search PATH,
+					      # but as the default
+					      # location of the library.
+      ;;
+    esac
+
+    case $cc_basename in
+      CC)
+	# FIXME: insert proper C++ library support
+	_LT_AC_TAGVAR(ld_shlibs, $1)=no
+	;;
+      aCC)
+	case "$host_cpu" in
+	hppa*64*|ia64*)
+	  _LT_AC_TAGVAR(archive_cmds, $1)='$LD -b +h $soname -o $lib $linker_flags $libobjs $deplibs'
+	  ;;
+	*)
+	  _LT_AC_TAGVAR(archive_cmds, $1)='$CC -b ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects'
+	  ;;
+	esac
+	# Commands to make compiler produce verbose output that lists
+	# what "hidden" libraries, object files and flags are used when
+	# linking a shared library.
+	#
+	# There doesn't appear to be a way to prevent this compiler from
+	# explicitly linking system object files so we need to strip them
+	# from the output so that they don't get included in the library
+	# dependencies.
+	output_verbose_link_cmd='templist=`($CC -b $CFLAGS -v conftest.$objext 2>&1) | grep "\-L"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; echo $list'
+	;;
+      *)
+	if test "$GXX" = yes; then
+	  if test $with_gnu_ld = no; then
+	    case "$host_cpu" in
+	    ia64*|hppa*64*)
+	      _LT_AC_TAGVAR(archive_cmds, $1)='$LD -b +h $soname -o $lib $linker_flags $libobjs $deplibs'
+	      ;;
+	    *)
+	      _LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib -fPIC ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects'
+	      ;;
+	    esac
+	  fi
+	else
+	  # FIXME: insert proper C++ library support
+	  _LT_AC_TAGVAR(ld_shlibs, $1)=no
+	fi
+	;;
+    esac
+    ;;
+  irix5* | irix6*)
+    case $cc_basename in
+      CC)
+	# SGI C++
+	_LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared -all -multigot $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${objdir}/so_locations -o $lib'
+
+	# Archives containing C++ object files must be created using
+	# "CC -ar", where "CC" is the IRIX C++ compiler.  This is
+	# necessary to make sure instantiated templates are included
+	# in the archive.
+	_LT_AC_TAGVAR(old_archive_cmds, $1)='$CC -ar -WR,-u -o $oldlib $oldobjs'
+	;;
+      *)
+	if test "$GXX" = yes; then
+	  if test "$with_gnu_ld" = no; then
+	    _LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${objdir}/so_locations -o $lib'
+	  else
+	    _LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` -o $lib'
+	  fi
+	fi
+	_LT_AC_TAGVAR(link_all_deplibs, $1)=yes
+	;;
+    esac
+    _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir'
+    _LT_AC_TAGVAR(hardcode_libdir_separator, $1)=:
+    ;;
+  linux*)
+    case $cc_basename in
+      KCC)
+	# Kuck and Associates, Inc. (KAI) C++ Compiler
+
+	# KCC will only create a shared library if the output file
+	# ends with ".so" (or ".sl" for HP-UX), so rename the library
+	# to its proper name (with version) after linking.
+	_LT_AC_TAGVAR(archive_cmds, $1)='tempext=`echo $shared_ext | $SED -e '\''s/\([[^()0-9A-Za-z{}]]\)/\\\\\1/g'\''`; templib=`echo $lib | $SED -e "s/\${tempext}\..*/.so/"`; $CC $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects --soname $soname -o \$templib; mv \$templib $lib'
+	_LT_AC_TAGVAR(archive_expsym_cmds, $1)='tempext=`echo $shared_ext | $SED -e '\''s/\([[^()0-9A-Za-z{}]]\)/\\\\\1/g'\''`; templib=`echo $lib | $SED -e "s/\${tempext}\..*/.so/"`; $CC $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects --soname $soname -o \$templib ${wl}-retain-symbols-file,$export_symbols; mv \$templib $lib'
+	# Commands to make compiler produce verbose output that lists
+	# what "hidden" libraries, object files and flags are used when
+	# linking a shared library.
+	#
+	# There doesn't appear to be a way to prevent this compiler from
+	# explicitly linking system object files so we need to strip them
+	# from the output so that they don't get included in the library
+	# dependencies.
+	output_verbose_link_cmd='templist=`$CC $CFLAGS -v conftest.$objext -o libconftest$shared_ext 2>&1 | grep "ld"`; rm -f libconftest$shared_ext; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; echo $list'
+
+	_LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}--rpath,$libdir'
+	_LT_AC_TAGVAR(export_dynamic_flag_spec, $1)='${wl}--export-dynamic'
+
+	# Archives containing C++ object files must be created using
+	# "CC -Bstatic", where "CC" is the KAI C++ compiler.
+	_LT_AC_TAGVAR(old_archive_cmds, $1)='$CC -Bstatic -o $oldlib $oldobjs'
+	;;
+      icpc)
+	# Intel C++
+	with_gnu_ld=yes
+	_LT_AC_TAGVAR(archive_cmds_need_lc, $1)=no
+	_LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects ${wl}-soname $wl$soname -o $lib'
+	_LT_AC_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+	_LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath,$libdir'
+	_LT_AC_TAGVAR(export_dynamic_flag_spec, $1)='${wl}--export-dynamic'
+	_LT_AC_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive$convenience ${wl}--no-whole-archive'
+	;;
+      cxx)
+	# Compaq C++
+	_LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects ${wl}-soname $wl$soname -o $lib'
+	_LT_AC_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects ${wl}-soname $wl$soname  -o $lib ${wl}-retain-symbols-file $wl$export_symbols'
+
+	runpath_var=LD_RUN_PATH
+	_LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='-rpath $libdir'
+	_LT_AC_TAGVAR(hardcode_libdir_separator, $1)=:
+
+	# Commands to make compiler produce verbose output that lists
+	# what "hidden" libraries, object files and flags are used when
+	# linking a shared library.
+	#
+	# There doesn't appear to be a way to prevent this compiler from
+	# explicitly linking system object files so we need to strip them
+	# from the output so that they don't get included in the library
+	# dependencies.
+	output_verbose_link_cmd='templist=`$CC -shared $CFLAGS -v conftest.$objext 2>&1 | grep "ld"`; templist=`echo $templist | $SED "s/\(^.*ld.*\)\( .*ld .*$\)/\1/"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; echo $list'
+	;;
+    esac
+    ;;
+  lynxos*)
+    # FIXME: insert proper C++ library support
+    _LT_AC_TAGVAR(ld_shlibs, $1)=no
+    ;;
+  m88k*)
+    # FIXME: insert proper C++ library support
+    _LT_AC_TAGVAR(ld_shlibs, $1)=no
+    ;;
+  mvs*)
+    case $cc_basename in
+      cxx)
+	# FIXME: insert proper C++ library support
+	_LT_AC_TAGVAR(ld_shlibs, $1)=no
+	;;
+      *)
+	# FIXME: insert proper C++ library support
+	_LT_AC_TAGVAR(ld_shlibs, $1)=no
+	;;
+    esac
+    ;;
+  netbsd*)
+    if echo __ELF__ | $CC -E - | grep __ELF__ >/dev/null; then
+      _LT_AC_TAGVAR(archive_cmds, $1)='$LD -Bshareable  -o $lib $predep_objects $libobjs $deplibs $postdep_objects $linker_flags'
+      wlarc=
+      _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='-R$libdir'
+      _LT_AC_TAGVAR(hardcode_direct, $1)=yes
+      _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+    fi
+    # Workaround some broken pre-1.5 toolchains
+    output_verbose_link_cmd='$CC -shared $CFLAGS -v conftest.$objext 2>&1 | grep conftest.$objext | $SED -e "s:-lgcc -lc -lgcc::"'
+    ;;
+  osf3*)
+    case $cc_basename in
+      KCC)
+	# Kuck and Associates, Inc. (KAI) C++ Compiler
+
+	# KCC will only create a shared library if the output file
+	# ends with ".so" (or ".sl" for HP-UX), so rename the library
+	# to its proper name (with version) after linking.
+	_LT_AC_TAGVAR(archive_cmds, $1)='tempext=`echo $shared_ext | $SED -e '\''s/\([[^()0-9A-Za-z{}]]\)/\\\\\1/g'\''`; templib=`echo $lib | $SED -e "s/\${tempext}\..*/.so/"`; $CC $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects --soname $soname -o \$templib; mv \$templib $lib'
+
+	_LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath,$libdir'
+	_LT_AC_TAGVAR(hardcode_libdir_separator, $1)=:
+
+	# Archives containing C++ object files must be created using
+	# "CC -Bstatic", where "CC" is the KAI C++ compiler.
+	_LT_AC_TAGVAR(old_archive_cmds, $1)='$CC -Bstatic -o $oldlib $oldobjs'
+
+	;;
+      RCC)
+	# Rational C++ 2.4.1
+	# FIXME: insert proper C++ library support
+	_LT_AC_TAGVAR(ld_shlibs, $1)=no
+	;;
+      cxx)
+	_LT_AC_TAGVAR(allow_undefined_flag, $1)=' ${wl}-expect_unresolved ${wl}\*'
+	_LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared${allow_undefined_flag} $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects ${wl}-soname $soname `test -n "$verstring" && echo ${wl}-set_version $verstring` -update_registry ${objdir}/so_locations -o $lib'
+
+	_LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir'
+	_LT_AC_TAGVAR(hardcode_libdir_separator, $1)=:
+
+	# Commands to make compiler produce verbose output that lists
+	# what "hidden" libraries, object files and flags are used when
+	# linking a shared library.
+	#
+	# There doesn't appear to be a way to prevent this compiler from
+	# explicitly linking system object files so we need to strip them
+	# from the output so that they don't get included in the library
+	# dependencies.
+	output_verbose_link_cmd='templist=`$CC -shared $CFLAGS -v conftest.$objext 2>&1 | grep "ld" | grep -v "ld:"`; templist=`echo $templist | $SED "s/\(^.*ld.*\)\( .*ld.*$\)/\1/"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; echo $list'
+	;;
+      *)
+	if test "$GXX" = yes && test "$with_gnu_ld" = no; then
+	  _LT_AC_TAGVAR(allow_undefined_flag, $1)=' ${wl}-expect_unresolved ${wl}\*'
+	  _LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib ${allow_undefined_flag} $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${objdir}/so_locations -o $lib'
+
+	  _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir'
+	  _LT_AC_TAGVAR(hardcode_libdir_separator, $1)=:
+
+	  # Commands to make compiler produce verbose output that lists
+	  # what "hidden" libraries, object files and flags are used when
+	  # linking a shared library.
+	  output_verbose_link_cmd='$CC -shared $CFLAGS -v conftest.$objext 2>&1 | grep "\-L"'
+
+	else
+	  # FIXME: insert proper C++ library support
+	  _LT_AC_TAGVAR(ld_shlibs, $1)=no
+	fi
+	;;
+    esac
+    ;;
+  osf4* | osf5*)
+    case $cc_basename in
+      KCC)
+	# Kuck and Associates, Inc. (KAI) C++ Compiler
+
+	# KCC will only create a shared library if the output file
+	# ends with ".so" (or ".sl" for HP-UX), so rename the library
+	# to its proper name (with version) after linking.
+	_LT_AC_TAGVAR(archive_cmds, $1)='tempext=`echo $shared_ext | $SED -e '\''s/\([[^()0-9A-Za-z{}]]\)/\\\\\1/g'\''`; templib=`echo $lib | $SED -e "s/\${tempext}\..*/.so/"`; $CC $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects --soname $soname -o \$templib; mv \$templib $lib'
+
+	_LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath,$libdir'
+	_LT_AC_TAGVAR(hardcode_libdir_separator, $1)=:
+
+	# Archives containing C++ object files must be created using
+	# the KAI C++ compiler.
+	_LT_AC_TAGVAR(old_archive_cmds, $1)='$CC -o $oldlib $oldobjs'
+	;;
+      RCC)
+	# Rational C++ 2.4.1
+	# FIXME: insert proper C++ library support
+	_LT_AC_TAGVAR(ld_shlibs, $1)=no
+	;;
+      cxx)
+	_LT_AC_TAGVAR(allow_undefined_flag, $1)=' -expect_unresolved \*'
+	_LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared${allow_undefined_flag} $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects -msym -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${objdir}/so_locations -o $lib'
+	_LT_AC_TAGVAR(archive_expsym_cmds, $1)='for i in `cat $export_symbols`; do printf "%s %s\\n" -exported_symbol "\$i" >> $lib.exp; done~
+	  echo "-hidden">> $lib.exp~
+	  $CC -shared$allow_undefined_flag $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects -msym -soname $soname -Wl,-input -Wl,$lib.exp  `test -n "$verstring" && echo -set_version	$verstring` -update_registry $objdir/so_locations -o $lib~
+	  $rm $lib.exp'
+
+	_LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='-rpath $libdir'
+	_LT_AC_TAGVAR(hardcode_libdir_separator, $1)=:
+
+	# Commands to make compiler produce verbose output that lists
+	# what "hidden" libraries, object files and flags are used when
+	# linking a shared library.
+	#
+	# There doesn't appear to be a way to prevent this compiler from
+	# explicitly linking system object files so we need to strip them
+	# from the output so that they don't get included in the library
+	# dependencies.
+	output_verbose_link_cmd='templist=`$CC -shared $CFLAGS -v conftest.$objext 2>&1 | grep "ld" | grep -v "ld:"`; templist=`echo $templist | $SED "s/\(^.*ld.*\)\( .*ld.*$\)/\1/"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; echo $list'
+	;;
+      *)
+	if test "$GXX" = yes && test "$with_gnu_ld" = no; then
+	  _LT_AC_TAGVAR(allow_undefined_flag, $1)=' ${wl}-expect_unresolved ${wl}\*'
+	 _LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib ${allow_undefined_flag} $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${objdir}/so_locations -o $lib'
+
+	  _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir'
+	  _LT_AC_TAGVAR(hardcode_libdir_separator, $1)=:
+
+	  # Commands to make compiler produce verbose output that lists
+	  # what "hidden" libraries, object files and flags are used when
+	  # linking a shared library.
+	  output_verbose_link_cmd='$CC -shared $CFLAGS -v conftest.$objext 2>&1 | grep "\-L"'
+
+	else
+	  # FIXME: insert proper C++ library support
+	  _LT_AC_TAGVAR(ld_shlibs, $1)=no
+	fi
+	;;
+    esac
+    ;;
+  psos*)
+    # FIXME: insert proper C++ library support
+    _LT_AC_TAGVAR(ld_shlibs, $1)=no
+    ;;
+  sco*)
+    _LT_AC_TAGVAR(archive_cmds_need_lc, $1)=no
+    case $cc_basename in
+      CC)
+	# FIXME: insert proper C++ library support
+	_LT_AC_TAGVAR(ld_shlibs, $1)=no
+	;;
+      *)
+	# FIXME: insert proper C++ library support
+	_LT_AC_TAGVAR(ld_shlibs, $1)=no
+	;;
+    esac
+    ;;
+  sunos4*)
+    case $cc_basename in
+      CC)
+	# Sun C++ 4.x
+	# FIXME: insert proper C++ library support
+	_LT_AC_TAGVAR(ld_shlibs, $1)=no
+	;;
+      lcc)
+	# Lucid
+	# FIXME: insert proper C++ library support
+	_LT_AC_TAGVAR(ld_shlibs, $1)=no
+	;;
+      *)
+	# FIXME: insert proper C++ library support
+	_LT_AC_TAGVAR(ld_shlibs, $1)=no
+	;;
+    esac
+    ;;
+  solaris*)
+    case $cc_basename in
+      CC)
+	# Sun C++ 4.2, 5.x and Centerline C++
+	_LT_AC_TAGVAR(no_undefined_flag, $1)=' -zdefs'
+	_LT_AC_TAGVAR(archive_cmds, $1)='$CC -G${allow_undefined_flag} -nolib -h$soname -o $lib $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects'
+	_LT_AC_TAGVAR(archive_expsym_cmds, $1)='$echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~$echo "local: *; };" >> $lib.exp~
+	$CC -G${allow_undefined_flag} -nolib ${wl}-M ${wl}$lib.exp -h$soname -o $lib $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects~$rm $lib.exp'
+
+	_LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='-R$libdir'
+	_LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+	case $host_os in
+	  solaris2.[0-5] | solaris2.[0-5].*) ;;
+	  *)
+	    # The C++ compiler is used as linker so we must use $wl
+	    # flag to pass the commands to the underlying system
+	    # linker.
+	    # Supported since Solaris 2.6 (maybe 2.5.1?)
+	    _LT_AC_TAGVAR(whole_archive_flag_spec, $1)='${wl}-z ${wl}allextract$convenience ${wl}-z ${wl}defaultextract'
+	    ;;
+	esac
+	_LT_AC_TAGVAR(link_all_deplibs, $1)=yes
+
+	# Commands to make compiler produce verbose output that lists
+	# what "hidden" libraries, object files and flags are used when
+	# linking a shared library.
+	#
+	# There doesn't appear to be a way to prevent this compiler from
+	# explicitly linking system object files so we need to strip them
+	# from the output so that they don't get included in the library
+	# dependencies.
+	output_verbose_link_cmd='templist=`$CC -G $CFLAGS -v conftest.$objext 2>&1 | grep "\-[[LR]]"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; echo $list'
+
+	# Archives containing C++ object files must be created using
+	# "CC -xar", where "CC" is the Sun C++ compiler.  This is
+	# necessary to make sure instantiated templates are included
+	# in the archive.
+	_LT_AC_TAGVAR(old_archive_cmds, $1)='$CC -xar -o $oldlib $oldobjs'
+	;;
+      gcx)
+	# Green Hills C++ Compiler
+	_LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects ${wl}-h $wl$soname -o $lib'
+
+	# The C++ compiler must be used to create the archive.
+	_LT_AC_TAGVAR(old_archive_cmds, $1)='$CC $LDFLAGS -archive -o $oldlib $oldobjs'
+	;;
+      *)
+	# GNU C++ compiler with Solaris linker
+	if test "$GXX" = yes && test "$with_gnu_ld" = no; then
+	  _LT_AC_TAGVAR(no_undefined_flag, $1)=' ${wl}-z ${wl}defs'
+	  if $CC --version | grep -v '^2\.7' > /dev/null; then
+	    _LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib $LDFLAGS $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects ${wl}-h $wl$soname -o $lib'
+	    _LT_AC_TAGVAR(archive_expsym_cmds, $1)='$echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~$echo "local: *; };" >> $lib.exp~
+		$CC -shared -nostdlib ${wl}-M $wl$lib.exp -o $lib $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects~$rm $lib.exp'
+
+	    # Commands to make compiler produce verbose output that lists
+	    # what "hidden" libraries, object files and flags are used when
+	    # linking a shared library.
+	    output_verbose_link_cmd="$CC -shared $CFLAGS -v conftest.$objext 2>&1 | grep \"\-L\""
+	  else
+	    # g++ 2.7 appears to require `-G' NOT `-shared' on this
+	    # platform.
+	    _LT_AC_TAGVAR(archive_cmds, $1)='$CC -G -nostdlib $LDFLAGS $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects ${wl}-h $wl$soname -o $lib'
+	    _LT_AC_TAGVAR(archive_expsym_cmds, $1)='$echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~$echo "local: *; };" >> $lib.exp~
+		$CC -G -nostdlib ${wl}-M $wl$lib.exp -o $lib $compiler_flags $predep_objects $libobjs $deplibs $postdep_objects~$rm $lib.exp'
+
+	    # Commands to make compiler produce verbose output that lists
+	    # what "hidden" libraries, object files and flags are used when
+	    # linking a shared library.
+	    output_verbose_link_cmd="$CC -G $CFLAGS -v conftest.$objext 2>&1 | grep \"\-L\""
+	  fi
+
+	  _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-R $wl$libdir'
+	fi
+	;;
+    esac
+    ;;
+  sysv5OpenUNIX8* | sysv5UnixWare7* | sysv5uw[[78]]* | unixware7*)
+    _LT_AC_TAGVAR(archive_cmds_need_lc, $1)=no
+    ;;
+  tandem*)
+    case $cc_basename in
+      NCC)
+	# NonStop-UX NCC 3.20
+	# FIXME: insert proper C++ library support
+	_LT_AC_TAGVAR(ld_shlibs, $1)=no
+	;;
+      *)
+	# FIXME: insert proper C++ library support
+	_LT_AC_TAGVAR(ld_shlibs, $1)=no
+	;;
+    esac
+    ;;
+  vxworks*)
+    # FIXME: insert proper C++ library support
+    _LT_AC_TAGVAR(ld_shlibs, $1)=no
+    ;;
+  *)
+    # FIXME: insert proper C++ library support
+    _LT_AC_TAGVAR(ld_shlibs, $1)=no
+    ;;
+esac
+AC_MSG_RESULT([$_LT_AC_TAGVAR(ld_shlibs, $1)])
+test "$_LT_AC_TAGVAR(ld_shlibs, $1)" = no && can_build_shared=no
+
+_LT_AC_TAGVAR(GCC, $1)="$GXX"
+_LT_AC_TAGVAR(LD, $1)="$LD"
+
+## CAVEAT EMPTOR:
+## There is no encapsulation within the following macros, do not change
+## the running order or otherwise move them around unless you know exactly
+## what you are doing...
+AC_LIBTOOL_POSTDEP_PREDEP($1)
+AC_LIBTOOL_PROG_COMPILER_PIC($1)
+AC_LIBTOOL_PROG_CC_C_O($1)
+AC_LIBTOOL_SYS_HARD_LINK_LOCKS($1)
+AC_LIBTOOL_PROG_LD_SHLIBS($1)
+AC_LIBTOOL_SYS_DYNAMIC_LINKER($1)
+AC_LIBTOOL_PROG_LD_HARDCODE_LIBPATH($1)
+AC_LIBTOOL_SYS_LIB_STRIP
+AC_LIBTOOL_DLOPEN_SELF($1)
+
+AC_LIBTOOL_CONFIG($1)
+
+AC_LANG_POP
+CC=$lt_save_CC
+LDCXX=$LD
+LD=$lt_save_LD
+GCC=$lt_save_GCC
+with_gnu_ldcxx=$with_gnu_ld
+with_gnu_ld=$lt_save_with_gnu_ld
+lt_cv_path_LDCXX=$lt_cv_path_LD
+lt_cv_path_LD=$lt_save_path_LD
+lt_cv_prog_gnu_ldcxx=$lt_cv_prog_gnu_ld
+lt_cv_prog_gnu_ld=$lt_save_with_gnu_ld
+])# AC_LIBTOOL_LANG_CXX_CONFIG
+
+# AC_LIBTOOL_POSTDEP_PREDEP([TAGNAME])
+# ------------------------
+# Figure out "hidden" library dependencies from verbose
+# compiler output when linking a shared library.
+# Parse the compiler output and extract the necessary
+# objects, libraries and library flags.
+AC_DEFUN([AC_LIBTOOL_POSTDEP_PREDEP],[
+dnl we can't use the lt_simple_compile_test_code here,
+dnl because it contains code intended for an executable,
+dnl not a library.  It's possible we should let each
+dnl tag define a new lt_????_link_test_code variable,
+dnl but it's only used here...
+ifelse([$1],[],[cat > conftest.$ac_ext <<EOF
+int a;
+void foo (void) { a = 0; }
+EOF
+],[$1],[CXX],[cat > conftest.$ac_ext <<EOF
+class Foo
+{
+public:
+  Foo (void) { a = 0; }
+private:
+  int a;
+};
+EOF
+],[$1],[F77],[cat > conftest.$ac_ext <<EOF
+      subroutine foo
+      implicit none
+      integer*4 a
+      a=0
+      return
+      end
+EOF
+],[$1],[GCJ],[cat > conftest.$ac_ext <<EOF
+public class foo {
+  private int a;
+  public void bar (void) {
+    a = 0;
+  }
+};
+EOF
+])
+dnl Parse the compiler output and extract the necessary
+dnl objects, libraries and library flags.
+if AC_TRY_EVAL(ac_compile); then
+  # Parse the compiler output and extract the necessary
+  # objects, libraries and library flags.
+
+  # Sentinel used to keep track of whether or not we are before
+  # the conftest object file.
+  pre_test_object_deps_done=no
+
+  # The `*' in the case matches for architectures that use `case' in
+  # $output_verbose_cmd can trigger glob expansion during the loop
+  # eval without this substitution.
+  output_verbose_link_cmd="`$echo \"X$output_verbose_link_cmd\" | $Xsed -e \"$no_glob_subst\"`"
+
+  for p in `eval $output_verbose_link_cmd`; do
+    case $p in
+
+    -L* | -R* | -l*)
+       # Some compilers place space between "-{L,R}" and the path.
+       # Remove the space.
+       if test $p = "-L" \
+	  || test $p = "-R"; then
+	 prev=$p
+	 continue
+       else
+	 prev=
+       fi
+
+       if test "$pre_test_object_deps_done" = no; then
+	 case $p in
+	 -L* | -R*)
+	   # Internal compiler library paths should come after those
+	   # provided the user.  The postdeps already come after the
+	   # user supplied libs so there is no need to process them.
+	   if test -z "$_LT_AC_TAGVAR(compiler_lib_search_path, $1)"; then
+	     _LT_AC_TAGVAR(compiler_lib_search_path, $1)="${prev}${p}"
+	   else
+	     _LT_AC_TAGVAR(compiler_lib_search_path, $1)="${_LT_AC_TAGVAR(compiler_lib_search_path, $1)} ${prev}${p}"
+	   fi
+	   ;;
+	 # The "-l" case would never come before the object being
+	 # linked, so don't bother handling this case.
+	 esac
+       else
+	 if test -z "$_LT_AC_TAGVAR(postdeps, $1)"; then
+	   _LT_AC_TAGVAR(postdeps, $1)="${prev}${p}"
+	 else
+	   _LT_AC_TAGVAR(postdeps, $1)="${_LT_AC_TAGVAR(postdeps, $1)} ${prev}${p}"
+	 fi
+       fi
+       ;;
+
+    *.$objext|*.$libext)
+       # This assumes that the test object file only shows up
+       # once in the compiler output.
+       if test "$p" = "conftest.$objext"; then
+	 pre_test_object_deps_done=yes
+	 continue
+       fi
+
+       if test "$pre_test_object_deps_done" = no; then
+	 if test -z "$_LT_AC_TAGVAR(predep_objects, $1)"; then
+	   _LT_AC_TAGVAR(predep_objects, $1)="$p"
+	 else
+	   _LT_AC_TAGVAR(predep_objects, $1)="$_LT_AC_TAGVAR(predep_objects, $1) $p"
+	 fi
+       else
+	 if test -z "$_LT_AC_TAGVAR(postdep_objects, $1)"; then
+	   _LT_AC_TAGVAR(postdep_objects, $1)="$p"
+	 else
+	   _LT_AC_TAGVAR(postdep_objects, $1)="$_LT_AC_TAGVAR(postdep_objects, $1) $p"
+	 fi
+       fi
+       ;;
+
+    *) ;; # Ignore the rest.
+
+    esac
+  done
+
+  # Clean up.
+  rm -f a.out a.exe
+else
+  echo "libtool.m4: error: problem compiling $1 test program"
+fi
+
+$rm -f confest.$objext
+
+case " $_LT_AC_TAGVAR(postdeps, $1) " in
+*" -lc "*) _LT_AC_TAGVAR(archive_cmds_need_lc, $1)=no ;;
+esac
+])# AC_LIBTOOL_POSTDEP_PREDEP
+
+# AC_LIBTOOL_LANG_F77_CONFIG
+# ------------------------
+# Ensure that the configuration vars for the C compiler are
+# suitably defined.  Those variables are subsequently used by
+# AC_LIBTOOL_CONFIG to write the compiler configuration to `libtool'.
+AC_DEFUN([AC_LIBTOOL_LANG_F77_CONFIG], [_LT_AC_LANG_F77_CONFIG(F77)])
+AC_DEFUN([_LT_AC_LANG_F77_CONFIG],
+[AC_REQUIRE([AC_PROG_F77])
+AC_LANG_PUSH(Fortran 77)
+
+_LT_AC_TAGVAR(archive_cmds_need_lc, $1)=no
+_LT_AC_TAGVAR(allow_undefined_flag, $1)=
+_LT_AC_TAGVAR(always_export_symbols, $1)=no
+_LT_AC_TAGVAR(archive_expsym_cmds, $1)=
+_LT_AC_TAGVAR(export_dynamic_flag_spec, $1)=
+_LT_AC_TAGVAR(hardcode_direct, $1)=no
+_LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)=
+_LT_AC_TAGVAR(hardcode_libdir_flag_spec_ld, $1)=
+_LT_AC_TAGVAR(hardcode_libdir_separator, $1)=
+_LT_AC_TAGVAR(hardcode_minus_L, $1)=no
+_LT_AC_TAGVAR(hardcode_automatic, $1)=no
+_LT_AC_TAGVAR(module_cmds, $1)=
+_LT_AC_TAGVAR(module_expsym_cmds, $1)=
+_LT_AC_TAGVAR(link_all_deplibs, $1)=unknown
+_LT_AC_TAGVAR(old_archive_cmds, $1)=$old_archive_cmds
+_LT_AC_TAGVAR(no_undefined_flag, $1)=
+_LT_AC_TAGVAR(whole_archive_flag_spec, $1)=
+_LT_AC_TAGVAR(enable_shared_with_static_runtimes, $1)=no
+
+# Source file extension for f77 test sources.
+ac_ext=f
+
+# Object file extension for compiled f77 test sources.
+objext=o
+_LT_AC_TAGVAR(objext, $1)=$objext
+
+# Code to be used in simple compile tests
+lt_simple_compile_test_code="      subroutine t\n      return\n      end\n"
+
+# Code to be used in simple link tests
+lt_simple_link_test_code="      program t\n      end\n"
+
+# ltmain only uses $CC for tagged configurations so make sure $CC is set.
+_LT_AC_SYS_COMPILER
+
+# Allow CC to be a program name with arguments.
+lt_save_CC="$CC"
+CC=${F77-"f77"}
+compiler=$CC
+_LT_AC_TAGVAR(compiler, $1)=$CC
+cc_basename=`$echo X"$compiler" | $Xsed -e 's%^.*/%%'`
+
+AC_MSG_CHECKING([if libtool supports shared libraries])
+AC_MSG_RESULT([$can_build_shared])
+
+AC_MSG_CHECKING([whether to build shared libraries])
+test "$can_build_shared" = "no" && enable_shared=no
+
+# On AIX, shared libraries and static libraries use the same namespace, and
+# are all built from PIC.
+case "$host_os" in
+aix3*)
+  test "$enable_shared" = yes && enable_static=no
+  if test -n "$RANLIB"; then
+    archive_cmds="$archive_cmds~\$RANLIB \$lib"
+    postinstall_cmds='$RANLIB $lib'
+  fi
+  ;;
+aix4*)
+  test "$enable_shared" = yes && enable_static=no
+  ;;
+esac
+AC_MSG_RESULT([$enable_shared])
+
+AC_MSG_CHECKING([whether to build static libraries])
+# Make sure either enable_shared or enable_static is yes.
+test "$enable_shared" = yes || enable_static=yes
+AC_MSG_RESULT([$enable_static])
+
+test "$_LT_AC_TAGVAR(ld_shlibs, $1)" = no && can_build_shared=no
+
+_LT_AC_TAGVAR(GCC, $1)="$G77"
+_LT_AC_TAGVAR(LD, $1)="$LD"
+
+AC_LIBTOOL_PROG_COMPILER_PIC($1)
+AC_LIBTOOL_PROG_CC_C_O($1)
+AC_LIBTOOL_SYS_HARD_LINK_LOCKS($1)
+AC_LIBTOOL_PROG_LD_SHLIBS($1)
+AC_LIBTOOL_SYS_DYNAMIC_LINKER($1)
+AC_LIBTOOL_PROG_LD_HARDCODE_LIBPATH($1)
+AC_LIBTOOL_SYS_LIB_STRIP
+
+
+AC_LIBTOOL_CONFIG($1)
+
+AC_LANG_POP
+CC="$lt_save_CC"
+])# AC_LIBTOOL_LANG_F77_CONFIG
+
+
+# AC_LIBTOOL_LANG_GCJ_CONFIG
+# --------------------------
+# Ensure that the configuration vars for the C compiler are
+# suitably defined.  Those variables are subsequently used by
+# AC_LIBTOOL_CONFIG to write the compiler configuration to `libtool'.
+AC_DEFUN([AC_LIBTOOL_LANG_GCJ_CONFIG], [_LT_AC_LANG_GCJ_CONFIG(GCJ)])
+AC_DEFUN([_LT_AC_LANG_GCJ_CONFIG],
+[AC_LANG_SAVE
+
+# Source file extension for Java test sources.
+ac_ext=java
+
+# Object file extension for compiled Java test sources.
+objext=o
+_LT_AC_TAGVAR(objext, $1)=$objext
+
+# Code to be used in simple compile tests
+lt_simple_compile_test_code="class foo {}\n"
+
+# Code to be used in simple link tests
+lt_simple_link_test_code='public class conftest { public static void main(String[] argv) {}; }\n'
+
+# ltmain only uses $CC for tagged configurations so make sure $CC is set.
+_LT_AC_SYS_COMPILER
+
+# Allow CC to be a program name with arguments.
+lt_save_CC="$CC"
+CC=${GCJ-"gcj"}
+compiler=$CC
+_LT_AC_TAGVAR(compiler, $1)=$CC
+
+# GCJ did not exist at the time GCC didn't implicitly link libc in.
+_LT_AC_TAGVAR(archive_cmds_need_lc, $1)=no
+
+## CAVEAT EMPTOR:
+## There is no encapsulation within the following macros, do not change
+## the running order or otherwise move them around unless you know exactly
+## what you are doing...
+AC_LIBTOOL_PROG_COMPILER_NO_RTTI($1)
+AC_LIBTOOL_PROG_COMPILER_PIC($1)
+AC_LIBTOOL_PROG_CC_C_O($1)
+AC_LIBTOOL_SYS_HARD_LINK_LOCKS($1)
+AC_LIBTOOL_PROG_LD_SHLIBS($1)
+AC_LIBTOOL_SYS_DYNAMIC_LINKER($1)
+AC_LIBTOOL_PROG_LD_HARDCODE_LIBPATH($1)
+AC_LIBTOOL_SYS_LIB_STRIP
+AC_LIBTOOL_DLOPEN_SELF($1)
+
+AC_LIBTOOL_CONFIG($1)
+
+AC_LANG_RESTORE
+CC="$lt_save_CC"
+])# AC_LIBTOOL_LANG_GCJ_CONFIG
+
+
+# AC_LIBTOOL_LANG_RC_CONFIG
+# --------------------------
+# Ensure that the configuration vars for the Windows resource compiler are
+# suitably defined.  Those variables are subsequently used by
+# AC_LIBTOOL_CONFIG to write the compiler configuration to `libtool'.
+AC_DEFUN([AC_LIBTOOL_LANG_RC_CONFIG], [_LT_AC_LANG_RC_CONFIG(RC)])
+AC_DEFUN([_LT_AC_LANG_RC_CONFIG],
+[AC_LANG_SAVE
+
+# Source file extension for RC test sources.
+ac_ext=rc
+
+# Object file extension for compiled RC test sources.
+objext=o
+_LT_AC_TAGVAR(objext, $1)=$objext
+
+# Code to be used in simple compile tests
+lt_simple_compile_test_code='sample MENU { MENUITEM "&Soup", 100, CHECKED }\n'
+
+# Code to be used in simple link tests
+lt_simple_link_test_code="$lt_simple_compile_test_code"
+
+# ltmain only uses $CC for tagged configurations so make sure $CC is set.
+_LT_AC_SYS_COMPILER
+
+# Allow CC to be a program name with arguments.
+lt_save_CC="$CC"
+CC=${RC-"windres"}
+compiler=$CC
+_LT_AC_TAGVAR(compiler, $1)=$CC
+_LT_AC_TAGVAR(lt_cv_prog_compiler_c_o, $1)=yes
+
+AC_LIBTOOL_CONFIG($1)
+
+AC_LANG_RESTORE
+CC="$lt_save_CC"
+])# AC_LIBTOOL_LANG_RC_CONFIG
+
+
+# AC_LIBTOOL_CONFIG([TAGNAME])
+# ----------------------------
+# If TAGNAME is not passed, then create an initial libtool script
+# with a default configuration from the untagged config vars.  Otherwise
+# add code to config.status for appending the configuration named by
+# TAGNAME from the matching tagged config vars.
+AC_DEFUN([AC_LIBTOOL_CONFIG],
+[# The else clause should only fire when bootstrapping the
+# libtool distribution, otherwise you forgot to ship ltmain.sh
+# with your package, and you will get complaints that there are
+# no rules to generate ltmain.sh.
+if test -f "$ltmain"; then
+  # See if we are running on zsh, and set the options which allow our commands through
+  # without removal of \ escapes.
+  if test -n "${ZSH_VERSION+set}" ; then
+    setopt NO_GLOB_SUBST
+  fi  
+  # Now quote all the things that may contain metacharacters while being
+  # careful not to overquote the AC_SUBSTed values.  We take copies of the
+  # variables and quote the copies for generation of the libtool script.
+  for var in echo old_CC old_CFLAGS AR AR_FLAGS EGREP RANLIB LN_S LTCC NM SED SHELL \
+    libname_spec library_names_spec soname_spec extract_expsyms_cmds \
+    old_striplib striplib file_magic_cmd finish_cmds finish_eval \
+    deplibs_check_method reload_flag reload_cmds need_locks \
+    lt_cv_sys_global_symbol_pipe lt_cv_sys_global_symbol_to_cdecl \
+    lt_cv_sys_global_symbol_to_c_name_address \
+    sys_lib_search_path_spec sys_lib_dlsearch_path_spec \
+    old_postinstall_cmds old_postuninstall_cmds \
+    _LT_AC_TAGVAR(compiler, $1) \
+    _LT_AC_TAGVAR(CC, $1) \
+    _LT_AC_TAGVAR(LD, $1) \
+    _LT_AC_TAGVAR(lt_prog_compiler_wl, $1) \
+    _LT_AC_TAGVAR(lt_prog_compiler_pic, $1) \
+    _LT_AC_TAGVAR(lt_prog_compiler_static, $1) \
+    _LT_AC_TAGVAR(lt_prog_compiler_no_builtin_flag, $1) \
+    _LT_AC_TAGVAR(export_dynamic_flag_spec, $1) \
+    _LT_AC_TAGVAR(thread_safe_flag_spec, $1) \
+    _LT_AC_TAGVAR(whole_archive_flag_spec, $1) \
+    _LT_AC_TAGVAR(enable_shared_with_static_runtimes, $1) \
+    _LT_AC_TAGVAR(old_archive_cmds, $1) \
+    _LT_AC_TAGVAR(old_archive_from_new_cmds, $1) \
+    _LT_AC_TAGVAR(predep_objects, $1) \
+    _LT_AC_TAGVAR(postdep_objects, $1) \
+    _LT_AC_TAGVAR(predeps, $1) \
+    _LT_AC_TAGVAR(postdeps, $1) \
+    _LT_AC_TAGVAR(compiler_lib_search_path, $1) \
+    _LT_AC_TAGVAR(archive_cmds, $1) \
+    _LT_AC_TAGVAR(archive_expsym_cmds, $1) \
+    _LT_AC_TAGVAR(postinstall_cmds, $1) \
+    _LT_AC_TAGVAR(postuninstall_cmds, $1) \
+    _LT_AC_TAGVAR(old_archive_from_expsyms_cmds, $1) \
+    _LT_AC_TAGVAR(allow_undefined_flag, $1) \
+    _LT_AC_TAGVAR(no_undefined_flag, $1) \
+    _LT_AC_TAGVAR(export_symbols_cmds, $1) \
+    _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1) \
+    _LT_AC_TAGVAR(hardcode_libdir_flag_spec_ld, $1) \
+    _LT_AC_TAGVAR(hardcode_libdir_separator, $1) \
+    _LT_AC_TAGVAR(hardcode_automatic, $1) \
+    _LT_AC_TAGVAR(module_cmds, $1) \
+    _LT_AC_TAGVAR(module_expsym_cmds, $1) \
+    _LT_AC_TAGVAR(lt_cv_prog_compiler_c_o, $1) \
+    _LT_AC_TAGVAR(exclude_expsyms, $1) \
+    _LT_AC_TAGVAR(include_expsyms, $1); do
+
+    case $var in
+    _LT_AC_TAGVAR(old_archive_cmds, $1) | \
+    _LT_AC_TAGVAR(old_archive_from_new_cmds, $1) | \
+    _LT_AC_TAGVAR(archive_cmds, $1) | \
+    _LT_AC_TAGVAR(archive_expsym_cmds, $1) | \
+    _LT_AC_TAGVAR(module_cmds, $1) | \
+    _LT_AC_TAGVAR(module_expsym_cmds, $1) | \   
+    _LT_AC_TAGVAR(old_archive_from_expsyms_cmds, $1) | \
+    _LT_AC_TAGVAR(export_symbols_cmds, $1) | \
+    extract_expsyms_cmds | reload_cmds | finish_cmds | \
+    postinstall_cmds | postuninstall_cmds | \
+    old_postinstall_cmds | old_postuninstall_cmds | \
+    sys_lib_search_path_spec | sys_lib_dlsearch_path_spec)
+      # Double-quote double-evaled strings.
+      eval "lt_$var=\\\"\`\$echo \"X\$$var\" | \$Xsed -e \"\$double_quote_subst\" -e \"\$sed_quote_subst\" -e \"\$delay_variable_subst\"\`\\\""
+      ;;
+    *)
+      eval "lt_$var=\\\"\`\$echo \"X\$$var\" | \$Xsed -e \"\$sed_quote_subst\"\`\\\""
+      ;;
+    esac
+  done
+
+  case $lt_echo in
+  *'\[$]0 --fallback-echo"')
+    lt_echo=`$echo "X$lt_echo" | $Xsed -e 's/\\\\\\\[$]0 --fallback-echo"[$]/[$]0 --fallback-echo"/'`
+    ;;
+  esac
+
+ifelse([$1], [],
+  [cfgfile="${ofile}T"
+  trap "$rm \"$cfgfile\"; exit 1" 1 2 15
+  $rm -f "$cfgfile"
+  AC_MSG_NOTICE([creating $ofile])],
+  [cfgfile="$ofile"])
+
+  cat <<__EOF__ >> "$cfgfile"
+ifelse([$1], [],
+[#! $SHELL
+
+# `$echo "$cfgfile" | sed 's%^.*/%%'` - Provide generalized library-building support services.
+# Generated automatically by $PROGRAM (GNU $PACKAGE $VERSION$TIMESTAMP)
+# NOTE: Changes made to this file will be lost: look at ltmain.sh.
+#
+# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001
+# Free Software Foundation, Inc.
+#
+# This file is part of GNU Libtool:
+# Originally by Gordon Matzigkeit <gord@gnu.ai.mit.edu>, 1996
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
+#
+# As a special exception to the GNU General Public License, if you
+# distribute this file as part of a program that contains a
+# configuration script generated by Autoconf, you may include it under
+# the same distribution terms that you use for the rest of that program.
+
+# A sed program that does not truncate output.
+SED=$lt_SED
+
+# Sed that helps us avoid accidentally triggering echo(1) options like -n.
+Xsed="$SED -e s/^X//"
+
+# The HP-UX ksh and POSIX shell print the target directory to stdout
+# if CDPATH is set.
+if test "X\${CDPATH+set}" = Xset; then CDPATH=:; export CDPATH; fi
+
+# The names of the tagged configurations supported by this script.
+available_tags=
+
+# ### BEGIN LIBTOOL CONFIG],
+[# ### BEGIN LIBTOOL TAG CONFIG: $tagname])
+
+# Libtool was configured on host `(hostname || uname -n) 2>/dev/null | sed 1q`:
+
+# Shell to use when invoking shell scripts.
+SHELL=$lt_SHELL
+
+# Whether or not to build shared libraries.
+build_libtool_libs=$enable_shared
+
+# Whether or not to build static libraries.
+build_old_libs=$enable_static
+
+# Whether or not to add -lc for building shared libraries.
+build_libtool_need_lc=$_LT_AC_TAGVAR(archive_cmds_need_lc, $1)
+
+# Whether or not to disallow shared libs when runtime libs are static
+allow_libtool_libs_with_static_runtimes=$_LT_AC_TAGVAR(enable_shared_with_static_runtimes, $1)
+
+# Whether or not to optimize for fast installation.
+fast_install=$enable_fast_install
+
+# The host system.
+host_alias=$host_alias
+host=$host
+
+# An echo program that does not interpret backslashes.
+echo=$lt_echo
+
+# The archiver.
+AR=$lt_AR
+AR_FLAGS=$lt_AR_FLAGS
+
+# A C compiler.
+LTCC=$lt_LTCC
+
+# A language-specific compiler.
+CC=$lt_[]_LT_AC_TAGVAR(compiler, $1)
+
+# Is the compiler the GNU C compiler?
+with_gcc=$_LT_AC_TAGVAR(GCC, $1)
+
+# An ERE matcher.
+EGREP=$lt_EGREP
+
+# The linker used to build libraries.
+LD=$lt_[]_LT_AC_TAGVAR(LD, $1)
+
+# Whether we need hard or soft links.
+LN_S=$lt_LN_S
+
+# A BSD-compatible nm program.
+NM=$lt_NM
+
+# A symbol stripping program
+STRIP=$STRIP
+
+# Used to examine libraries when file_magic_cmd begins "file"
+MAGIC_CMD=$MAGIC_CMD
+
+# Used on cygwin: DLL creation program.
+DLLTOOL="$DLLTOOL"
+
+# Used on cygwin: object dumper.
+OBJDUMP="$OBJDUMP"
+
+# Used on cygwin: assembler.
+AS="$AS"
+
+# The name of the directory that contains temporary libtool files.
+objdir=$objdir
+
+# How to create reloadable object files.
+reload_flag=$lt_reload_flag
+reload_cmds=$lt_reload_cmds
+
+# How to pass a linker flag through the compiler.
+wl=$lt_[]_LT_AC_TAGVAR(lt_prog_compiler_wl, $1)
+
+# Object file suffix (normally "o").
+objext="$ac_objext"
+
+# Old archive suffix (normally "a").
+libext="$libext"
+
+# Shared library suffix (normally ".so").
+shrext='$shrext'
+
+# Executable file suffix (normally "").
+exeext="$exeext"
+
+# Additional compiler flags for building library objects.
+pic_flag=$lt_[]_LT_AC_TAGVAR(lt_prog_compiler_pic, $1)
+pic_mode=$pic_mode
+
+# What is the maximum length of a command?
+max_cmd_len=$lt_cv_sys_max_cmd_len
+
+# Does compiler simultaneously support -c and -o options?
+compiler_c_o=$lt_[]_LT_AC_TAGVAR(lt_cv_prog_compiler_c_o, $1)
+
+# Must we lock files when doing compilation ?
+need_locks=$lt_need_locks
+
+# Do we need the lib prefix for modules?
+need_lib_prefix=$need_lib_prefix
+
+# Do we need a version for libraries?
+need_version=$need_version
+
+# Whether dlopen is supported.
+dlopen_support=$enable_dlopen
+
+# Whether dlopen of programs is supported.
+dlopen_self=$enable_dlopen_self
+
+# Whether dlopen of statically linked programs is supported.
+dlopen_self_static=$enable_dlopen_self_static
+
+# Compiler flag to prevent dynamic linking.
+link_static_flag=$lt_[]_LT_AC_TAGVAR(lt_prog_compiler_static, $1)
+
+# Compiler flag to turn off builtin functions.
+no_builtin_flag=$lt_[]_LT_AC_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)
+
+# Compiler flag to allow reflexive dlopens.
+export_dynamic_flag_spec=$lt_[]_LT_AC_TAGVAR(export_dynamic_flag_spec, $1)
+
+# Compiler flag to generate shared objects directly from archives.
+whole_archive_flag_spec=$lt_[]_LT_AC_TAGVAR(whole_archive_flag_spec, $1)
+
+# Compiler flag to generate thread-safe objects.
+thread_safe_flag_spec=$lt_[]_LT_AC_TAGVAR(thread_safe_flag_spec, $1)
+
+# Library versioning type.
+version_type=$version_type
+
+# Format of library name prefix.
+libname_spec=$lt_libname_spec
+
+# List of archive names.  First name is the real one, the rest are links.
+# The last name is the one that the linker finds with -lNAME.
+library_names_spec=$lt_library_names_spec
+
+# The coded name of the library, if different from the real name.
+soname_spec=$lt_soname_spec
+
+# Commands used to build and install an old-style archive.
+RANLIB=$lt_RANLIB
+old_archive_cmds=$lt_[]_LT_AC_TAGVAR(old_archive_cmds, $1)
+old_postinstall_cmds=$lt_old_postinstall_cmds
+old_postuninstall_cmds=$lt_old_postuninstall_cmds
+
+# Create an old-style archive from a shared archive.
+old_archive_from_new_cmds=$lt_[]_LT_AC_TAGVAR(old_archive_from_new_cmds, $1)
+
+# Create a temporary old-style archive to link instead of a shared archive.
+old_archive_from_expsyms_cmds=$lt_[]_LT_AC_TAGVAR(old_archive_from_expsyms_cmds, $1)
+
+# Commands used to build and install a shared archive.
+archive_cmds=$lt_[]_LT_AC_TAGVAR(archive_cmds, $1)
+archive_expsym_cmds=$lt_[]_LT_AC_TAGVAR(archive_expsym_cmds, $1)
+postinstall_cmds=$lt_postinstall_cmds
+postuninstall_cmds=$lt_postuninstall_cmds
+
+# Commands used to build a loadable module (assumed same as above if empty)
+module_cmds=$lt_[]_LT_AC_TAGVAR(module_cmds, $1)
+module_expsym_cmds=$lt_[]_LT_AC_TAGVAR(module_expsym_cmds, $1)
+
+# Commands to strip libraries.
+old_striplib=$lt_old_striplib
+striplib=$lt_striplib
+
+# Dependencies to place before the objects being linked to create a
+# shared library.
+predep_objects=$lt_[]_LT_AC_TAGVAR(predep_objects, $1)
+
+# Dependencies to place after the objects being linked to create a
+# shared library.
+postdep_objects=$lt_[]_LT_AC_TAGVAR(postdep_objects, $1)
+
+# Dependencies to place before the objects being linked to create a
+# shared library.
+predeps=$lt_[]_LT_AC_TAGVAR(predeps, $1)
+
+# Dependencies to place after the objects being linked to create a
+# shared library.
+postdeps=$lt_[]_LT_AC_TAGVAR(postdeps, $1)
+
+# The library search path used internally by the compiler when linking
+# a shared library.
+compiler_lib_search_path=$lt_[]_LT_AC_TAGVAR(compiler_lib_search_path, $1)
+
+# Method to check whether dependent libraries are shared objects.
+deplibs_check_method=$lt_deplibs_check_method
+
+# Command to use when deplibs_check_method == file_magic.
+file_magic_cmd=$lt_file_magic_cmd
+
+# Flag that allows shared libraries with undefined symbols to be built.
+allow_undefined_flag=$lt_[]_LT_AC_TAGVAR(allow_undefined_flag, $1)
+
+# Flag that forces no undefined symbols.
+no_undefined_flag=$lt_[]_LT_AC_TAGVAR(no_undefined_flag, $1)
+
+# Commands used to finish a libtool library installation in a directory.
+finish_cmds=$lt_finish_cmds
+
+# Same as above, but a single script fragment to be evaled but not shown.
+finish_eval=$lt_finish_eval
+
+# Take the output of nm and produce a listing of raw symbols and C names.
+global_symbol_pipe=$lt_lt_cv_sys_global_symbol_pipe
+
+# Transform the output of nm in a proper C declaration
+global_symbol_to_cdecl=$lt_lt_cv_sys_global_symbol_to_cdecl
+
+# Transform the output of nm in a C name address pair
+global_symbol_to_c_name_address=$lt_lt_cv_sys_global_symbol_to_c_name_address
+
+# This is the shared library runtime path variable.
+runpath_var=$runpath_var
+
+# This is the shared library path variable.
+shlibpath_var=$shlibpath_var
+
+# Is shlibpath searched before the hard-coded library search path?
+shlibpath_overrides_runpath=$shlibpath_overrides_runpath
+
+# How to hardcode a shared library path into an executable.
+hardcode_action=$_LT_AC_TAGVAR(hardcode_action, $1)
+
+# Whether we should hardcode library paths into libraries.
+hardcode_into_libs=$hardcode_into_libs
+
+# Flag to hardcode \$libdir into a binary during linking.
+# This must work even if \$libdir does not exist.
+hardcode_libdir_flag_spec=$lt_[]_LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)
+
+# If ld is used when linking, flag to hardcode \$libdir into
+# a binary during linking. This must work even if \$libdir does
+# not exist.
+hardcode_libdir_flag_spec_ld=$lt_[]_LT_AC_TAGVAR(hardcode_libdir_flag_spec_ld, $1)
+
+# Whether we need a single -rpath flag with a separated argument.
+hardcode_libdir_separator=$lt_[]_LT_AC_TAGVAR(hardcode_libdir_separator, $1)
+
+# Set to yes if using DIR/libNAME${shared_ext} during linking hardcodes DIR into the
+# resulting binary.
+hardcode_direct=$_LT_AC_TAGVAR(hardcode_direct, $1)
+
+# Set to yes if using the -LDIR flag during linking hardcodes DIR into the
+# resulting binary.
+hardcode_minus_L=$_LT_AC_TAGVAR(hardcode_minus_L, $1)
+
+# Set to yes if using SHLIBPATH_VAR=DIR during linking hardcodes DIR into
+# the resulting binary.
+hardcode_shlibpath_var=$_LT_AC_TAGVAR(hardcode_shlibpath_var, $1)
+
+# Set to yes if building a shared library automatically hardcodes DIR into the library
+# and all subsequent libraries and executables linked against it.
+hardcode_automatic=$_LT_AC_TAGVAR(hardcode_automatic, $1)
+
+# Variables whose values should be saved in libtool wrapper scripts and
+# restored at relink time.
+variables_saved_for_relink="$variables_saved_for_relink"
+
+# Whether libtool must link a program against all its dependency libraries.
+link_all_deplibs=$_LT_AC_TAGVAR(link_all_deplibs, $1)
+
+# Compile-time system search path for libraries
+sys_lib_search_path_spec=$lt_sys_lib_search_path_spec
+
+# Run-time system search path for libraries
+sys_lib_dlsearch_path_spec=$lt_sys_lib_dlsearch_path_spec
+
+# Fix the shell variable \$srcfile for the compiler.
+fix_srcfile_path="$_LT_AC_TAGVAR(fix_srcfile_path, $1)"
+
+# Set to yes if exported symbols are required.
+always_export_symbols=$_LT_AC_TAGVAR(always_export_symbols, $1)
+
+# The commands to list exported symbols.
+export_symbols_cmds=$lt_[]_LT_AC_TAGVAR(export_symbols_cmds, $1)
+
+# The commands to extract the exported symbol list from a shared archive.
+extract_expsyms_cmds=$lt_extract_expsyms_cmds
+
+# Symbols that should not be listed in the preloaded symbols.
+exclude_expsyms=$lt_[]_LT_AC_TAGVAR(exclude_expsyms, $1)
+
+# Symbols that must always be exported.
+include_expsyms=$lt_[]_LT_AC_TAGVAR(include_expsyms, $1)
+
+ifelse([$1],[],
+[# ### END LIBTOOL CONFIG],
+[# ### END LIBTOOL TAG CONFIG: $tagname])
+
+__EOF__
+
+ifelse([$1],[], [
+  case $host_os in
+  aix3*)
+    cat <<\EOF >> "$cfgfile"
+
+# AIX sometimes has problems with the GCC collect2 program.  For some
+# reason, if we set the COLLECT_NAMES environment variable, the problems
+# vanish in a puff of smoke.
+if test "X${COLLECT_NAMES+set}" != Xset; then
+  COLLECT_NAMES=
+  export COLLECT_NAMES
+fi
+EOF
+    ;;
+  esac
+
+  # We use sed instead of cat because bash on DJGPP gets confused if
+  # if finds mixed CR/LF and LF-only lines.  Since sed operates in
+  # text mode, it properly converts lines to CR/LF.  This bash problem
+  # is reportedly fixed, but why not run on old versions too?
+  sed '$q' "$ltmain" >> "$cfgfile" || (rm -f "$cfgfile"; exit 1)
+
+  mv -f "$cfgfile" "$ofile" || \
+    (rm -f "$ofile" && cp "$cfgfile" "$ofile" && rm -f "$cfgfile")
+  chmod +x "$ofile"
+])
+else
+  # If there is no Makefile yet, we rely on a make rule to execute
+  # `config.status --recheck' to rerun these tests and create the
+  # libtool script then.
+  test -f Makefile && make "$ltmain"
+fi
+])# AC_LIBTOOL_CONFIG
+
+
+# AC_LIBTOOL_PROG_COMPILER_NO_RTTI([TAGNAME])
+# -------------------------------------------
+AC_DEFUN([AC_LIBTOOL_PROG_COMPILER_NO_RTTI],
+[AC_REQUIRE([_LT_AC_SYS_COMPILER])dnl
+
+_LT_AC_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)=
+
+if test "$GCC" = yes; then
+  _LT_AC_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)=' -fno-builtin'
+
+  AC_LIBTOOL_COMPILER_OPTION([if $compiler supports -fno-rtti -fno-exceptions],
+    lt_cv_prog_compiler_rtti_exceptions,
+    [-fno-rtti -fno-exceptions], [],
+    [_LT_AC_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)="$_LT_AC_TAGVAR(lt_prog_compiler_no_builtin_flag, $1) -fno-rtti -fno-exceptions"])
+fi
+])# AC_LIBTOOL_PROG_COMPILER_NO_RTTI
+
+
+# AC_LIBTOOL_SYS_GLOBAL_SYMBOL_PIPE
+# ---------------------------------
+AC_DEFUN([AC_LIBTOOL_SYS_GLOBAL_SYMBOL_PIPE],
+[AC_REQUIRE([AC_CANONICAL_HOST])
+AC_REQUIRE([AC_PROG_NM])
+AC_REQUIRE([AC_OBJEXT])
+# Check for command to grab the raw symbol name followed by C symbol from nm.
+AC_MSG_CHECKING([command to parse $NM output from $compiler object])
+AC_CACHE_VAL([lt_cv_sys_global_symbol_pipe],
+[
+# These are sane defaults that work on at least a few old systems.
+# [They come from Ultrix.  What could be older than Ultrix?!! ;)]
+
+# Character class describing NM global symbol codes.
+symcode='[[BCDEGRST]]'
+
+# Regexp to match symbols that can be accessed directly from C.
+sympat='\([[_A-Za-z]][[_A-Za-z0-9]]*\)'
+
+# Transform the above into a raw symbol and a C symbol.
+symxfrm='\1 \2\3 \3'
+
+# Transform an extracted symbol line into a proper C declaration
+lt_cv_sys_global_symbol_to_cdecl="sed -n -e 's/^. .* \(.*\)$/extern int \1;/p'"
+
+# Transform an extracted symbol line into symbol name and symbol address
+lt_cv_sys_global_symbol_to_c_name_address="sed -n -e 's/^: \([[^ ]]*\) $/  {\\\"\1\\\", (lt_ptr) 0},/p' -e 's/^$symcode \([[^ ]]*\) \([[^ ]]*\)$/  {\"\2\", (lt_ptr) \&\2},/p'"
+
+# Define system-specific variables.
+case $host_os in
+aix*)
+  symcode='[[BCDT]]'
+  ;;
+cygwin* | mingw* | pw32*)
+  symcode='[[ABCDGISTW]]'
+  ;;
+hpux*) # Its linker distinguishes data from code symbols
+  if test "$host_cpu" = ia64; then
+    symcode='[[ABCDEGRST]]'
+  fi
+  lt_cv_sys_global_symbol_to_cdecl="sed -n -e 's/^T .* \(.*\)$/extern int \1();/p' -e 's/^$symcode* .* \(.*\)$/extern char \1;/p'"
+  lt_cv_sys_global_symbol_to_c_name_address="sed -n -e 's/^: \([[^ ]]*\) $/  {\\\"\1\\\", (lt_ptr) 0},/p' -e 's/^$symcode* \([[^ ]]*\) \([[^ ]]*\)$/  {\"\2\", (lt_ptr) \&\2},/p'"
+  ;;
+irix* | nonstopux*)
+  symcode='[[BCDEGRST]]'
+  ;;
+osf*)
+  symcode='[[BCDEGQRST]]'
+  ;;
+solaris* | sysv5*)
+  symcode='[[BDT]]'
+  ;;
+sysv4)
+  symcode='[[DFNSTU]]'
+  ;;
+esac
+
+# Handle CRLF in mingw tool chain
+opt_cr=
+case $build_os in
+mingw*)
+  opt_cr=`echo 'x\{0,1\}' | tr x '\015'` # option cr in regexp
+  ;;
+esac
+
+# If we're using GNU nm, then use its standard symbol codes.
+case `$NM -V 2>&1` in
+*GNU* | *'with BFD'*)
+  symcode='[[ABCDGISTW]]' ;;
+esac
+
+# Try without a prefix undercore, then with it.
+for ac_symprfx in "" "_"; do
+
+  # Write the raw and C identifiers.
+  lt_cv_sys_global_symbol_pipe="sed -n -e 's/^.*[[ 	]]\($symcode$symcode*\)[[ 	]][[ 	]]*\($ac_symprfx\)$sympat$opt_cr$/$symxfrm/p'"
+
+  # Check to see that the pipe works correctly.
+  pipe_works=no
+
+  rm -f conftest*
+  cat > conftest.$ac_ext <<EOF
+#ifdef __cplusplus
+extern "C" {
+#endif
+char nm_test_var;
+void nm_test_func(){}
+#ifdef __cplusplus
+}
+#endif
+int main(){nm_test_var='a';nm_test_func();return(0);}
+EOF
+
+  if AC_TRY_EVAL(ac_compile); then
+    # Now try to grab the symbols.
+    nlist=conftest.nm
+    if AC_TRY_EVAL(NM conftest.$ac_objext \| $lt_cv_sys_global_symbol_pipe \> $nlist) && test -s "$nlist"; then
+      # Try sorting and uniquifying the output.
+      if sort "$nlist" | uniq > "$nlist"T; then
+	mv -f "$nlist"T "$nlist"
+      else
+	rm -f "$nlist"T
+      fi
+
+      # Make sure that we snagged all the symbols we need.
+      if grep ' nm_test_var$' "$nlist" >/dev/null; then
+	if grep ' nm_test_func$' "$nlist" >/dev/null; then
+	  cat <<EOF > conftest.$ac_ext
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+EOF
+	  # Now generate the symbol file.
+	  eval "$lt_cv_sys_global_symbol_to_cdecl"' < "$nlist" | grep -v main >> conftest.$ac_ext'
+
+	  cat <<EOF >> conftest.$ac_ext
+#if defined (__STDC__) && __STDC__
+# define lt_ptr_t void *
+#else
+# define lt_ptr_t char *
+# define const
+#endif
+
+/* The mapping between symbol names and symbols. */
+const struct {
+  const char *name;
+  lt_ptr_t address;
+}
+lt_preloaded_symbols[[]] =
+{
+EOF
+	  $SED "s/^$symcode$symcode* \(.*\) \(.*\)$/  {\"\2\", (lt_ptr_t) \&\2},/" < "$nlist" | grep -v main >> conftest.$ac_ext
+	  cat <<\EOF >> conftest.$ac_ext
+  {0, (lt_ptr_t) 0}
+};
+
+#ifdef __cplusplus
+}
+#endif
+EOF
+	  # Now try linking the two files.
+	  mv conftest.$ac_objext conftstm.$ac_objext
+	  lt_save_LIBS="$LIBS"
+	  lt_save_CFLAGS="$CFLAGS"
+	  LIBS="conftstm.$ac_objext"
+	  CFLAGS="$CFLAGS$_LT_AC_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)"
+	  if AC_TRY_EVAL(ac_link) && test -s conftest${ac_exeext}; then
+	    pipe_works=yes
+	  fi
+	  LIBS="$lt_save_LIBS"
+	  CFLAGS="$lt_save_CFLAGS"
+	else
+	  echo "cannot find nm_test_func in $nlist" >&AS_MESSAGE_LOG_FD
+	fi
+      else
+	echo "cannot find nm_test_var in $nlist" >&AS_MESSAGE_LOG_FD
+      fi
+    else
+      echo "cannot run $lt_cv_sys_global_symbol_pipe" >&AS_MESSAGE_LOG_FD
+    fi
+  else
+    echo "$progname: failed program was:" >&AS_MESSAGE_LOG_FD
+    cat conftest.$ac_ext >&5
+  fi
+  rm -f conftest* conftst*
+
+  # Do not use the global_symbol_pipe unless it works.
+  if test "$pipe_works" = yes; then
+    break
+  else
+    lt_cv_sys_global_symbol_pipe=
+  fi
+done
+])
+if test -z "$lt_cv_sys_global_symbol_pipe"; then
+  lt_cv_sys_global_symbol_to_cdecl=
+fi
+if test -z "$lt_cv_sys_global_symbol_pipe$lt_cv_sys_global_symbol_to_cdecl"; then
+  AC_MSG_RESULT(failed)
+else
+  AC_MSG_RESULT(ok)
+fi
+]) # AC_LIBTOOL_SYS_GLOBAL_SYMBOL_PIPE
+
+
+# AC_LIBTOOL_PROG_COMPILER_PIC([TAGNAME])
+# ---------------------------------------
+AC_DEFUN([AC_LIBTOOL_PROG_COMPILER_PIC],
+[_LT_AC_TAGVAR(lt_prog_compiler_wl, $1)=
+_LT_AC_TAGVAR(lt_prog_compiler_pic, $1)=
+_LT_AC_TAGVAR(lt_prog_compiler_static, $1)=
+
+AC_MSG_CHECKING([for $compiler option to produce PIC])
+ ifelse([$1],[CXX],[
+  # C++ specific cases for pic, static, wl, etc.
+  if test "$GXX" = yes; then
+    _LT_AC_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,'
+    _LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-static'
+
+    case $host_os in
+    aix*)
+      # All AIX code is PIC.
+      if test "$host_cpu" = ia64; then
+	# AIX 5 now supports IA64 processor
+	_LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic'
+      fi
+      ;;
+    amigaos*)
+      # FIXME: we need at least 68020 code to build shared libraries, but
+      # adding the `-m68020' flag to GCC prevents building anything better,
+      # like `-m68040'.
+      _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-m68020 -resident32 -malways-restore-a4'
+      ;;
+    beos* | cygwin* | irix5* | irix6* | nonstopux* | osf3* | osf4* | osf5*)
+      # PIC is the default for these OSes.
+      ;;
+    mingw* | os2* | pw32*)
+      # This hack is so that the source file can tell whether it is being
+      # built for inclusion in a dll (and should export symbols for example).
+      _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT'
+      ;;
+    darwin* | rhapsody*)
+      # PIC is the default on this platform
+      # Common symbols not allowed in MH_DYLIB files
+      _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-fno-common'
+      ;;
+    *djgpp*)
+      # DJGPP does not support shared libraries at all
+      _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)=
+      ;;
+    sysv4*MP*)
+      if test -d /usr/nec; then
+	_LT_AC_TAGVAR(lt_prog_compiler_pic, $1)=-Kconform_pic
+      fi
+      ;;
+    hpux*)
+      # PIC is the default for IA64 HP-UX and 64-bit HP-UX, but
+      # not for PA HP-UX.
+      case "$host_cpu" in
+      hppa*64*|ia64*)
+	;;
+      *)
+	_LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC'
+	;;
+      esac
+      ;;
+    *)
+      _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC'
+      ;;
+    esac
+  else
+    case $host_os in
+      aix4* | aix5*)
+	# All AIX code is PIC.
+	if test "$host_cpu" = ia64; then
+	  # AIX 5 now supports IA64 processor
+	  _LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic'
+	else
+	  _LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-bnso -bI:/lib/syscalls.exp'
+	fi
+	;;
+      chorus*)
+	case $cc_basename in
+	cxch68)
+	  # Green Hills C++ Compiler
+	  # _LT_AC_TAGVAR(lt_prog_compiler_static, $1)="--no_auto_instantiation -u __main -u __premain -u _abort -r $COOL_DIR/lib/libOrb.a $MVME_DIR/lib/CC/libC.a $MVME_DIR/lib/classix/libcx.s.a"
+	  ;;
+	esac
+	;;
+      dgux*)
+	case $cc_basename in
+	  ec++)
+	    _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC'
+	    ;;
+	  ghcx)
+	    # Green Hills C++ Compiler
+	    _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-pic'
+	    ;;
+	  *)
+	    ;;
+	esac
+	;;
+      freebsd* | kfreebsd*-gnu)
+	# FreeBSD uses GNU C++
+	;;
+      hpux9* | hpux10* | hpux11*)
+	case $cc_basename in
+	  CC)
+	    _LT_AC_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,'
+	    _LT_AC_TAGVAR(lt_prog_compiler_static, $1)="${ac_cv_prog_cc_wl}-a ${ac_cv_prog_cc_wl}archive"
+	    if test "$host_cpu" != ia64; then
+	      _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='+Z'
+	    fi
+	    ;;
+	  aCC)
+	    _LT_AC_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,'
+	    _LT_AC_TAGVAR(lt_prog_compiler_static, $1)="${ac_cv_prog_cc_wl}-a ${ac_cv_prog_cc_wl}archive"
+	    case "$host_cpu" in
+	    hppa*64*|ia64*)
+	      # +Z the default
+	      ;;
+	    *)
+	      _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='+Z'
+	      ;;
+	    esac
+	    ;;
+	  *)
+	    ;;
+	esac
+	;;
+      irix5* | irix6* | nonstopux*)
+	case $cc_basename in
+	  CC)
+	    _LT_AC_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,'
+	    _LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-non_shared'
+	    # CC pic flag -KPIC is the default.
+	    ;;
+	  *)
+	    ;;
+	esac
+	;;
+      linux*)
+	case $cc_basename in
+	  KCC)
+	    # KAI C++ Compiler
+	    _LT_AC_TAGVAR(lt_prog_compiler_wl, $1)='--backend -Wl,'
+	    _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC'
+	    ;;
+	  icpc)
+	    # Intel C++
+	    _LT_AC_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,'
+	    _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC'
+	    _LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-static'
+	    ;; 
+	  cxx)
+	    # Compaq C++
+	    # Make sure the PIC flag is empty.  It appears that all Alpha
+	    # Linux and Compaq Tru64 Unix objects are PIC.
+	    _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)=
+	    _LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-non_shared'
+	    ;;
+	  *)
+	    ;;
+	esac
+	;;
+      lynxos*)
+	;;
+      m88k*)
+	;;
+      mvs*)
+	case $cc_basename in
+	  cxx)
+	    _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-W c,exportall'
+	    ;;
+	  *)
+	    ;;
+	esac
+	;;
+      netbsd*)
+	;;
+      osf3* | osf4* | osf5*)
+	case $cc_basename in
+	  KCC)
+	    _LT_AC_TAGVAR(lt_prog_compiler_wl, $1)='--backend -Wl,'
+	    ;;
+	  RCC)
+	    # Rational C++ 2.4.1
+	    _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-pic'
+	    ;;
+	  cxx)
+	    # Digital/Compaq C++
+	    _LT_AC_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,'
+	    # Make sure the PIC flag is empty.  It appears that all Alpha
+	    # Linux and Compaq Tru64 Unix objects are PIC.
+	    _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)=
+	    _LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-non_shared'
+	    ;;
+	  *)
+	    ;;
+	esac
+	;;
+      psos*)
+	;;
+      sco*)
+	case $cc_basename in
+	  CC)
+	    _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC'
+	    ;;
+	  *)
+	    ;;
+	esac
+	;;
+      solaris*)
+	case $cc_basename in
+	  CC)
+	    # Sun C++ 4.2, 5.x and Centerline C++
+	    _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC'
+	    _LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic'
+	    _LT_AC_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld '
+	    ;;
+	  gcx)
+	    # Green Hills C++ Compiler
+	    _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-PIC'
+	    ;;
+	  *)
+	    ;;
+	esac
+	;;
+      sunos4*)
+	case $cc_basename in
+	  CC)
+	    # Sun C++ 4.x
+	    _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-pic'
+	    _LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic'
+	    ;;
+	  lcc)
+	    # Lucid
+	    _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-pic'
+	    ;;
+	  *)
+	    ;;
+	esac
+	;;
+      tandem*)
+	case $cc_basename in
+	  NCC)
+	    # NonStop-UX NCC 3.20
+	    _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC'
+	    ;;
+	  *)
+	    ;;
+	esac
+	;;
+      unixware*)
+	;;
+      vxworks*)
+	;;
+      *)
+	_LT_AC_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no
+	;;
+    esac
+  fi
+],
+[
+  if test "$GCC" = yes; then
+    _LT_AC_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,'
+    _LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-static'
+
+    case $host_os in
+      aix*)
+      # All AIX code is PIC.
+      if test "$host_cpu" = ia64; then
+	# AIX 5 now supports IA64 processor
+	_LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic'
+      fi
+      ;;
+
+    amigaos*)
+      # FIXME: we need at least 68020 code to build shared libraries, but
+      # adding the `-m68020' flag to GCC prevents building anything better,
+      # like `-m68040'.
+      _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-m68020 -resident32 -malways-restore-a4'
+      ;;
+
+    beos* | cygwin* | irix5* | irix6* | nonstopux* | osf3* | osf4* | osf5*)
+      # PIC is the default for these OSes.
+      ;;
+
+    mingw* | pw32* | os2*)
+      # This hack is so that the source file can tell whether it is being
+      # built for inclusion in a dll (and should export symbols for example).
+      _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT'
+      ;;
+
+    darwin* | rhapsody*)
+      # PIC is the default on this platform
+      # Common symbols not allowed in MH_DYLIB files
+      _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-fno-common'
+      ;;
+
+    msdosdjgpp*)
+      # Just because we use GCC doesn't mean we suddenly get shared libraries
+      # on systems that don't support them.
+      _LT_AC_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no
+      enable_shared=no
+      ;;
+
+    sysv4*MP*)
+      if test -d /usr/nec; then
+	_LT_AC_TAGVAR(lt_prog_compiler_pic, $1)=-Kconform_pic
+      fi
+      ;;
+
+    hpux*)
+      # PIC is the default for IA64 HP-UX and 64-bit HP-UX, but
+      # not for PA HP-UX.
+      case "$host_cpu" in
+      hppa*64*|ia64*)
+	# +Z the default
+	;;
+      *)
+	_LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC'
+	;;
+      esac
+      ;;
+
+    *)
+      _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC'
+      ;;
+    esac
+  else
+    # PORTME Check for flag to pass linker flags through the system compiler.
+    case $host_os in
+    aix*)
+      _LT_AC_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,'
+      if test "$host_cpu" = ia64; then
+	# AIX 5 now supports IA64 processor
+	_LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic'
+      else
+	_LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-bnso -bI:/lib/syscalls.exp'
+      fi
+      ;;
+
+    mingw* | pw32* | os2*)
+      # This hack is so that the source file can tell whether it is being
+      # built for inclusion in a dll (and should export symbols for example).
+      _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT'
+      ;;
+
+    hpux9* | hpux10* | hpux11*)
+      _LT_AC_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,'
+      # PIC is the default for IA64 HP-UX and 64-bit HP-UX, but
+      # not for PA HP-UX.
+      case "$host_cpu" in
+      hppa*64*|ia64*)
+	# +Z the default
+	;;
+      *)
+	_LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='+Z'
+	;;
+      esac
+      # Is there a better lt_prog_compiler_static that works with the bundled CC?
+      _LT_AC_TAGVAR(lt_prog_compiler_static, $1)='${wl}-a ${wl}archive'
+      ;;
+
+    irix5* | irix6* | nonstopux*)
+      _LT_AC_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,'
+      # PIC (with -KPIC) is the default.
+      _LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-non_shared'
+      ;;
+
+    newsos6)
+      _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC'
+      _LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic'
+      ;;
+
+    linux*)
+      case $CC in
+      icc* | ecc*)
+	_LT_AC_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,'
+	_LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC'
+	_LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-static'
+        ;;
+      ccc*)
+        _LT_AC_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,'
+        # All Alpha code is PIC.
+        _LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-non_shared'
+        ;;
+      esac
+      ;;
+
+    osf3* | osf4* | osf5*)
+      _LT_AC_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,'
+      # All OSF/1 code is PIC.
+      _LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-non_shared'
+      ;;
+
+    sco3.2v5*)
+      _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-Kpic'
+      _LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-dn'
+      ;;
+
+    solaris*)
+      _LT_AC_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,'
+      _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC'
+      _LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic'
+      ;;
+
+    sunos4*)
+      _LT_AC_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld '
+      _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-PIC'
+      _LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic'
+      ;;
+
+    sysv4 | sysv4.2uw2* | sysv4.3* | sysv5*)
+      _LT_AC_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,'
+      _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC'
+      _LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic'
+      ;;
+
+    sysv4*MP*)
+      if test -d /usr/nec ;then
+	_LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-Kconform_pic'
+	_LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic'
+      fi
+      ;;
+
+    uts4*)
+      _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)='-pic'
+      _LT_AC_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic'
+      ;;
+
+    *)
+      _LT_AC_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no
+      ;;
+    esac
+  fi
+])
+AC_MSG_RESULT([$_LT_AC_TAGVAR(lt_prog_compiler_pic, $1)])
+
+#
+# Check to make sure the PIC flag actually works.
+#
+if test -n "$_LT_AC_TAGVAR(lt_prog_compiler_pic, $1)"; then
+  AC_LIBTOOL_COMPILER_OPTION([if $compiler PIC flag $_LT_AC_TAGVAR(lt_prog_compiler_pic, $1) works],
+    _LT_AC_TAGVAR(lt_prog_compiler_pic_works, $1),
+    [$_LT_AC_TAGVAR(lt_prog_compiler_pic, $1)ifelse([$1],[],[ -DPIC],[ifelse([$1],[CXX],[ -DPIC],[])])], [],
+    [case $_LT_AC_TAGVAR(lt_prog_compiler_pic, $1) in
+     "" | " "*) ;;
+     *) _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)=" $_LT_AC_TAGVAR(lt_prog_compiler_pic, $1)" ;;
+     esac],
+    [_LT_AC_TAGVAR(lt_prog_compiler_pic, $1)=
+     _LT_AC_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no])
+fi
+case "$host_os" in
+  # For platforms which do not support PIC, -DPIC is meaningless:
+  *djgpp*)
+    _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)=
+    ;;
+  *)
+    _LT_AC_TAGVAR(lt_prog_compiler_pic, $1)="$_LT_AC_TAGVAR(lt_prog_compiler_pic, $1)ifelse([$1],[],[ -DPIC],[ifelse([$1],[CXX],[ -DPIC],[])])"
+    ;;
+esac
+])
+
+
+# AC_LIBTOOL_PROG_LD_SHLIBS([TAGNAME])
+# ------------------------------------
+# See if the linker supports building shared libraries.
+AC_DEFUN([AC_LIBTOOL_PROG_LD_SHLIBS],
+[AC_MSG_CHECKING([whether the $compiler linker ($LD) supports shared libraries])
+ifelse([$1],[CXX],[
+  _LT_AC_TAGVAR(export_symbols_cmds, $1)='$NM $libobjs $convenience | $global_symbol_pipe | $SED '\''s/.* //'\'' | sort | uniq > $export_symbols'
+  case $host_os in
+  aix4* | aix5*)
+    # If we're using GNU nm, then we don't want the "-C" option.
+    # -C means demangle to AIX nm, but means don't demangle with GNU nm
+    if $NM -V 2>&1 | grep 'GNU' > /dev/null; then
+      _LT_AC_TAGVAR(export_symbols_cmds, $1)='$NM -Bpg $libobjs $convenience | awk '\''{ if (((\[$]2 == "T") || (\[$]2 == "D") || (\[$]2 == "B")) && ([substr](\[$]3,1,1) != ".")) { print \[$]3 } }'\'' | sort -u > $export_symbols'
+    else
+      _LT_AC_TAGVAR(export_symbols_cmds, $1)='$NM -BCpg $libobjs $convenience | awk '\''{ if (((\[$]2 == "T") || (\[$]2 == "D") || (\[$]2 == "B")) && ([substr](\[$]3,1,1) != ".")) { print \[$]3 } }'\'' | sort -u > $export_symbols'
+    fi
+    ;;
+  pw32*)
+    _LT_AC_TAGVAR(export_symbols_cmds, $1)="$ltdll_cmds"
+  ;;
+  cygwin* | mingw*)
+    _LT_AC_TAGVAR(export_symbols_cmds, $1)='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[[BCDGS]] /s/.* \([[^ ]]*\)/\1 DATA/'\'' | $SED -e '\''/^[[AITW]] /s/.* //'\'' | sort | uniq > $export_symbols'
+  ;;
+  *)
+    _LT_AC_TAGVAR(export_symbols_cmds, $1)='$NM $libobjs $convenience | $global_symbol_pipe | $SED '\''s/.* //'\'' | sort | uniq > $export_symbols'
+  ;;
+  esac
+],[
+  runpath_var=
+  _LT_AC_TAGVAR(allow_undefined_flag, $1)=
+  _LT_AC_TAGVAR(enable_shared_with_static_runtimes, $1)=no
+  _LT_AC_TAGVAR(archive_cmds, $1)=
+  _LT_AC_TAGVAR(archive_expsym_cmds, $1)=
+  _LT_AC_TAGVAR(old_archive_From_new_cmds, $1)=
+  _LT_AC_TAGVAR(old_archive_from_expsyms_cmds, $1)=
+  _LT_AC_TAGVAR(export_dynamic_flag_spec, $1)=
+  _LT_AC_TAGVAR(whole_archive_flag_spec, $1)=
+  _LT_AC_TAGVAR(thread_safe_flag_spec, $1)=
+  _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)=
+  _LT_AC_TAGVAR(hardcode_libdir_flag_spec_ld, $1)=
+  _LT_AC_TAGVAR(hardcode_libdir_separator, $1)=
+  _LT_AC_TAGVAR(hardcode_direct, $1)=no
+  _LT_AC_TAGVAR(hardcode_minus_L, $1)=no
+  _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=unsupported
+  _LT_AC_TAGVAR(link_all_deplibs, $1)=unknown
+  _LT_AC_TAGVAR(hardcode_automatic, $1)=no
+  _LT_AC_TAGVAR(module_cmds, $1)=
+  _LT_AC_TAGVAR(module_expsym_cmds, $1)=  
+  _LT_AC_TAGVAR(always_export_symbols, $1)=no
+  _LT_AC_TAGVAR(export_symbols_cmds, $1)='$NM $libobjs $convenience | $global_symbol_pipe | $SED '\''s/.* //'\'' | sort | uniq > $export_symbols'
+  # include_expsyms should be a list of space-separated symbols to be *always*
+  # included in the symbol list
+  _LT_AC_TAGVAR(include_expsyms, $1)=
+  # exclude_expsyms can be an extended regexp of symbols to exclude
+  # it will be wrapped by ` (' and `)$', so one must not match beginning or
+  # end of line.  Example: `a|bc|.*d.*' will exclude the symbols `a' and `bc',
+  # as well as any symbol that contains `d'.
+  _LT_AC_TAGVAR(exclude_expsyms, $1)="_GLOBAL_OFFSET_TABLE_"
+  # Although _GLOBAL_OFFSET_TABLE_ is a valid symbol C name, most a.out
+  # platforms (ab)use it in PIC code, but their linkers get confused if
+  # the symbol is explicitly referenced.  Since portable code cannot
+  # rely on this symbol name, it's probably fine to never include it in
+  # preloaded symbol tables.
+  extract_expsyms_cmds=
+
+  case $host_os in
+  cygwin* | mingw* | pw32*)
+    # FIXME: the MSVC++ port hasn't been tested in a loooong time
+    # When not using gcc, we currently assume that we are using
+    # Microsoft Visual C++.
+    if test "$GCC" != yes; then
+      with_gnu_ld=no
+    fi
+    ;;
+  openbsd*)
+    with_gnu_ld=no
+    ;;
+  esac
+
+  _LT_AC_TAGVAR(ld_shlibs, $1)=yes
+  if test "$with_gnu_ld" = yes; then
+    # If archive_cmds runs LD, not CC, wlarc should be empty
+    wlarc='${wl}'
+
+    # See if GNU ld supports shared libraries.
+    case $host_os in
+    aix3* | aix4* | aix5*)
+      # On AIX/PPC, the GNU linker is very broken
+      if test "$host_cpu" != ia64; then
+	_LT_AC_TAGVAR(ld_shlibs, $1)=no
+	cat <<EOF 1>&2
+
+*** Warning: the GNU linker, at least up to release 2.9.1, is reported
+*** to be unable to reliably create shared libraries on AIX.
+*** Therefore, libtool is disabling shared libraries support.  If you
+*** really care for shared libraries, you may want to modify your PATH
+*** so that a non-GNU linker is found, and then restart.
+
+EOF
+      fi
+      ;;
+
+    amigaos*)
+      _LT_AC_TAGVAR(archive_cmds, $1)='$rm $output_objdir/a2ixlibrary.data~$echo "#define NAME $libname" > $output_objdir/a2ixlibrary.data~$echo "#define LIBRARY_ID 1" >> $output_objdir/a2ixlibrary.data~$echo "#define VERSION $major" >> $output_objdir/a2ixlibrary.data~$echo "#define REVISION $revision" >> $output_objdir/a2ixlibrary.data~$AR $AR_FLAGS $lib $libobjs~$RANLIB $lib~(cd $output_objdir && a2ixlibrary -32)'
+      _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir'
+      _LT_AC_TAGVAR(hardcode_minus_L, $1)=yes
+
+      # Samuel A. Falvo II <kc5tja@dolphin.openprojects.net> reports
+      # that the semantics of dynamic libraries on AmigaOS, at least up
+      # to version 4, is to share data among multiple programs linked
+      # with the same dynamic library.  Since this doesn't match the
+      # behavior of shared libraries on other platforms, we can't use
+      # them.
+      _LT_AC_TAGVAR(ld_shlibs, $1)=no
+      ;;
+
+    beos*)
+      if $LD --help 2>&1 | grep ': supported targets:.* elf' > /dev/null; then
+	_LT_AC_TAGVAR(allow_undefined_flag, $1)=unsupported
+	# Joseph Beckenbach <jrb3@best.com> says some releases of gcc
+	# support --undefined.  This deserves some investigation.  FIXME
+	_LT_AC_TAGVAR(archive_cmds, $1)='$CC -nostart $compiler_flags $libobjs $deplibs ${wl}-soname $wl$soname -o $lib'
+      else
+	_LT_AC_TAGVAR(ld_shlibs, $1)=no
+      fi
+      ;;
+
+    cygwin* | mingw* | pw32*)
+      # _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1) is actually meaningless,
+      # as there is no search path for DLLs.
+      _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir'
+      _LT_AC_TAGVAR(allow_undefined_flag, $1)=no
+      _LT_AC_TAGVAR(always_export_symbols, $1)=no
+      _LT_AC_TAGVAR(enable_shared_with_static_runtimes, $1)=yes
+      _LT_AC_TAGVAR(export_symbols_cmds, $1)='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[[BCDGS]] /s/.* \([[^ ]]*\)/\1 DATA/'\'' | $SED -e '\''/^[[AITW]] /s/.* //'\'' | sort | uniq > $export_symbols'
+
+      if $LD --help 2>&1 | grep 'auto-import' > /dev/null; then
+        _LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared $compiler_flags $libobjs $deplibs -o $output_objdir/$soname ${wl}--image-base=0x10000000 ${wl}--out-implib,$lib'
+	# If the export-symbols file already is a .def file (1st line
+	# is EXPORTS), use it as is; otherwise, prepend...
+	_LT_AC_TAGVAR(archive_expsym_cmds, $1)='if test "x`$SED 1q $export_symbols`" = xEXPORTS; then
+	  cp $export_symbols $output_objdir/$soname.def;
+	else
+	  echo EXPORTS > $output_objdir/$soname.def;
+	  cat $export_symbols >> $output_objdir/$soname.def;
+	fi~
+	$CC -shared $output_objdir/$soname.def $compiler_flags $libobjs $deplibs -o $output_objdir/$soname ${wl}--image-base=0x10000000  ${wl}--out-implib,$lib'
+      else
+	ld_shlibs=no
+      fi
+      ;;
+
+    netbsd*)
+      if echo __ELF__ | $CC -E - | grep __ELF__ >/dev/null; then
+	_LT_AC_TAGVAR(archive_cmds, $1)='$LD -Bshareable $libobjs $deplibs $linker_flags -o $lib'
+	wlarc=
+      else
+	_LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared $compiler_flags $libobjs $deplibs ${wl}-soname $wl$soname -o $lib'
+	_LT_AC_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $compiler_flags $libobjs $deplibs ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+      fi
+      ;;
+
+    solaris* | sysv5*)
+      if $LD -v 2>&1 | grep 'BFD 2\.8' > /dev/null; then
+	_LT_AC_TAGVAR(ld_shlibs, $1)=no
+	cat <<EOF 1>&2
+
+*** Warning: The releases 2.8.* of the GNU linker cannot reliably
+*** create shared libraries on Solaris systems.  Therefore, libtool
+*** is disabling shared libraries support.  We urge you to upgrade GNU
+*** binutils to release 2.9.1 or newer.  Another option is to modify
+*** your PATH or compiler configuration so that the native linker is
+*** used, and then restart.
+
+EOF
+      elif $LD --help 2>&1 | grep ': supported targets:.* elf' > /dev/null; then
+	_LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared $compiler_flags $libobjs $deplibs ${wl}-soname $wl$soname -o $lib'
+	_LT_AC_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $compiler_flags $libobjs $deplibs ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+      else
+	_LT_AC_TAGVAR(ld_shlibs, $1)=no
+      fi
+      ;;
+
+    sunos4*)
+      _LT_AC_TAGVAR(archive_cmds, $1)='$LD -assert pure-text -Bshareable -o $lib $libobjs $deplibs $linker_flags'
+      wlarc=
+      _LT_AC_TAGVAR(hardcode_direct, $1)=yes
+      _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+      ;;
+
+    *)
+      if $LD --help 2>&1 | grep ': supported targets:.* elf' > /dev/null; then
+	_LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared $compiler_flags $libobjs $deplibs ${wl}-soname $wl$soname -o $lib'
+	_LT_AC_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $compiler_flags $libobjs $deplibs ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+      else
+	_LT_AC_TAGVAR(ld_shlibs, $1)=no
+      fi
+      ;;
+    esac
+
+    if test "$_LT_AC_TAGVAR(ld_shlibs, $1)" = yes; then
+      runpath_var=LD_RUN_PATH
+      _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}--rpath ${wl}$libdir'
+      _LT_AC_TAGVAR(export_dynamic_flag_spec, $1)='${wl}--export-dynamic'
+      # ancient GNU ld didn't support --whole-archive et. al.
+      if $LD --help 2>&1 | grep 'no-whole-archive' > /dev/null; then
+ 	_LT_AC_TAGVAR(whole_archive_flag_spec, $1)="$wlarc"'--whole-archive$convenience '"$wlarc"'--no-whole-archive'
+      else
+  	_LT_AC_TAGVAR(whole_archive_flag_spec, $1)=
+      fi
+    fi
+  else
+    # PORTME fill in a description of your system's linker (not GNU ld)
+    case $host_os in
+    aix3*)
+      _LT_AC_TAGVAR(allow_undefined_flag, $1)=unsupported
+      _LT_AC_TAGVAR(always_export_symbols, $1)=yes
+      _LT_AC_TAGVAR(archive_expsym_cmds, $1)='$LD -o $output_objdir/$soname $libobjs $deplibs $linker_flags -bE:$export_symbols -T512 -H512 -bM:SRE~$AR $AR_FLAGS $lib $output_objdir/$soname'
+      # Note: this linker hardcodes the directories in LIBPATH if there
+      # are no directories specified by -L.
+      _LT_AC_TAGVAR(hardcode_minus_L, $1)=yes
+      if test "$GCC" = yes && test -z "$link_static_flag"; then
+	# Neither direct hardcoding nor static linking is supported with a
+	# broken collect2.
+	_LT_AC_TAGVAR(hardcode_direct, $1)=unsupported
+      fi
+      ;;
+
+    aix4* | aix5*)
+      if test "$host_cpu" = ia64; then
+	# On IA64, the linker does run time linking by default, so we don't
+	# have to do anything special.
+	aix_use_runtimelinking=no
+	exp_sym_flag='-Bexport'
+	no_entry_flag=""
+      else
+	# If we're using GNU nm, then we don't want the "-C" option.
+	# -C means demangle to AIX nm, but means don't demangle with GNU nm
+	if $NM -V 2>&1 | grep 'GNU' > /dev/null; then
+	  _LT_AC_TAGVAR(export_symbols_cmds, $1)='$NM -Bpg $libobjs $convenience | awk '\''{ if (((\[$]2 == "T") || (\[$]2 == "D") || (\[$]2 == "B")) && ([substr](\[$]3,1,1) != ".")) { print \[$]3 } }'\'' | sort -u > $export_symbols'
+	else
+	  _LT_AC_TAGVAR(export_symbols_cmds, $1)='$NM -BCpg $libobjs $convenience | awk '\''{ if (((\[$]2 == "T") || (\[$]2 == "D") || (\[$]2 == "B")) && ([substr](\[$]3,1,1) != ".")) { print \[$]3 } }'\'' | sort -u > $export_symbols'
+	fi
+
+	# KDE requires run time linking.  Make it the default.
+	aix_use_runtimelinking=yes
+	exp_sym_flag='-bexport'
+	no_entry_flag='-bnoentry'
+      fi
+
+      # When large executables or shared objects are built, AIX ld can
+      # have problems creating the table of contents.  If linking a library
+      # or program results in "error TOC overflow" add -mminimal-toc to
+      # CXXFLAGS/CFLAGS for g++/gcc.  In the cases where that is not
+      # enough to fix the problem, add -Wl,-bbigtoc to LDFLAGS.
+
+      _LT_AC_TAGVAR(archive_cmds, $1)=''
+      _LT_AC_TAGVAR(hardcode_direct, $1)=yes
+      _LT_AC_TAGVAR(hardcode_libdir_separator, $1)=':'
+      _LT_AC_TAGVAR(link_all_deplibs, $1)=yes
+
+      if test "$GCC" = yes; then
+	case $host_os in aix4.[012]|aix4.[012].*)
+	# We only want to do this on AIX 4.2 and lower, the check
+	# below for broken collect2 doesn't work under 4.3+
+	  collect2name=`${CC} -print-prog-name=collect2`
+	  if test -f "$collect2name" && \
+  	   strings "$collect2name" | grep resolve_lib_name >/dev/null
+	  then
+  	  # We have reworked collect2
+  	  _LT_AC_TAGVAR(hardcode_direct, $1)=yes
+	  else
+  	  # We have old collect2
+  	  _LT_AC_TAGVAR(hardcode_direct, $1)=unsupported
+  	  # It fails to find uninstalled libraries when the uninstalled
+  	  # path is not listed in the libpath.  Setting hardcode_minus_L
+  	  # to unsupported forces relinking
+  	  _LT_AC_TAGVAR(hardcode_minus_L, $1)=yes
+  	  _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir'
+  	  _LT_AC_TAGVAR(hardcode_libdir_separator, $1)=
+	  fi
+	esac
+	shared_flag='-shared'
+      else
+	# not using gcc
+	if test "$host_cpu" = ia64; then
+  	# VisualAge C++, Version 5.5 for AIX 5L for IA-64, Beta 3 Release
+  	# chokes on -Wl,-G. The following line is correct:
+	  shared_flag='-G'
+	else
+  	if test "$aix_use_runtimelinking" = yes; then
+	    shared_flag='-qmkshrobj ${wl}-G'
+	  else
+	    shared_flag='-qmkshrobj'
+  	fi
+	fi
+      fi
+
+      # Let the compiler handle the export list.
+      _LT_AC_TAGVAR(always_export_symbols, $1)=no
+      if test "$aix_use_runtimelinking" = yes; then
+	# Warning - without using the other runtime loading flags (-brtl),
+	# -berok will link without error, but may produce a broken library.
+	_LT_AC_TAGVAR(allow_undefined_flag, $1)='-berok'
+       # Determine the default libpath from the value encoded in an empty executable.
+	_LT_AC_SYS_LIBPATH_AIX
+	_LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-blibpath:$libdir:'"$aix_libpath"
+	_LT_AC_TAGVAR(archive_cmds, $1)="\$CC"' -o $output_objdir/$soname $compiler_flags $libobjs $deplibs `if test "x${allow_undefined_flag}" != "x"; then echo "${wl}${allow_undefined_flag}"; else :; fi` '" $shared_flag"
+	_LT_AC_TAGVAR(archive_expsym_cmds, $1)="\$CC"' -o $output_objdir/$soname $compiler_flags $libobjs $deplibs `if test "x${allow_undefined_flag}" != "x"; then echo "${wl}${allow_undefined_flag}"; else :; fi` '"\${wl}$exp_sym_flag:\$export_symbols $shared_flag"
+       else
+	if test "$host_cpu" = ia64; then
+	  _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-R $libdir:/usr/lib:/lib'
+	  _LT_AC_TAGVAR(allow_undefined_flag, $1)="-z nodefs"
+	  _LT_AC_TAGVAR(archive_expsym_cmds, $1)="\$CC $shared_flag"' -o $output_objdir/$soname $compiler_flags $libobjs $deplibs ${wl}${allow_undefined_flag} '"\${wl}$no_entry_flag \${wl}$exp_sym_flag:\$export_symbols"
+	else
+	 # Determine the default libpath from the value encoded in an empty executable.
+	 _LT_AC_SYS_LIBPATH_AIX
+	 _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-blibpath:$libdir:'"$aix_libpath"
+	  # Warning - without using the other run time loading flags,
+	  # -berok will link without error, but may produce a broken library.
+	  _LT_AC_TAGVAR(no_undefined_flag, $1)=' ${wl}-bernotok'
+	  _LT_AC_TAGVAR(allow_undefined_flag, $1)=' ${wl}-berok'
+	  # -bexpall does not export symbols beginning with underscore (_)
+	  _LT_AC_TAGVAR(always_export_symbols, $1)=yes
+	  # Exported symbols can be pulled into shared objects from archives
+	  _LT_AC_TAGVAR(whole_archive_flag_spec, $1)=' '
+	  _LT_AC_TAGVAR(archive_cmds_need_lc, $1)=yes
+	  # This is similar to how AIX traditionally builds it's shared libraries.
+	  _LT_AC_TAGVAR(archive_expsym_cmds, $1)="\$CC $shared_flag"' -o $output_objdir/$soname $compiler_flags $libobjs $deplibs ${wl}-bE:$export_symbols ${wl}-bnoentry${allow_undefined_flag}~$AR $AR_FLAGS $output_objdir/$libname$release.a $output_objdir/$soname'
+	fi
+      fi
+      ;;
+
+    amigaos*)
+      _LT_AC_TAGVAR(archive_cmds, $1)='$rm $output_objdir/a2ixlibrary.data~$echo "#define NAME $libname" > $output_objdir/a2ixlibrary.data~$echo "#define LIBRARY_ID 1" >> $output_objdir/a2ixlibrary.data~$echo "#define VERSION $major" >> $output_objdir/a2ixlibrary.data~$echo "#define REVISION $revision" >> $output_objdir/a2ixlibrary.data~$AR $AR_FLAGS $lib $libobjs~$RANLIB $lib~(cd $output_objdir && a2ixlibrary -32)'
+      _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir'
+      _LT_AC_TAGVAR(hardcode_minus_L, $1)=yes
+      # see comment about different semantics on the GNU ld section
+      _LT_AC_TAGVAR(ld_shlibs, $1)=no
+      ;;
+
+    bsdi4*)
+      _LT_AC_TAGVAR(export_dynamic_flag_spec, $1)=-rdynamic
+      ;;
+
+    cygwin* | mingw* | pw32*)
+      # When not using gcc, we currently assume that we are using
+      # Microsoft Visual C++.
+      # hardcode_libdir_flag_spec is actually meaningless, as there is
+      # no search path for DLLs.
+      _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)=' '
+      _LT_AC_TAGVAR(allow_undefined_flag, $1)=no
+      # Tell ltmain to make .lib files, not .a files.
+      libext=lib
+      # Tell ltmain to make .dll files, not .so files.
+      shrext=".dll"
+      # FIXME: Setting linknames here is a bad hack.
+      _LT_AC_TAGVAR(archive_cmds, $1)='$CC -o $lib $compiler_flags $libobjs `echo "$deplibs" | $SED -e '\''s/ -lc$//'\''` -link -dll~linknames='
+      # The linker will automatically build a .lib file if we build a DLL.
+      _LT_AC_TAGVAR(old_archive_From_new_cmds, $1)='true'
+      # FIXME: Should let the user specify the lib program.
+      _LT_AC_TAGVAR(old_archive_cmds, $1)='lib /OUT:$oldlib$oldobjs$old_deplibs'
+      fix_srcfile_path='`cygpath -w "$srcfile"`'
+      _LT_AC_TAGVAR(enable_shared_with_static_runtimes, $1)=yes
+      ;;
+
+    darwin* | rhapsody*)
+    if test "$GXX" = yes ; then
+      _LT_AC_TAGVAR(archive_cmds_need_lc, $1)=no
+      case "$host_os" in
+      rhapsody* | darwin1.[[012]])
+	_LT_AC_TAGVAR(allow_undefined_flag, $1)='-Wl,-undefined -Wl,suppress'
+	;;
+      *) # Darwin 1.3 on
+	if test -z ${MACOSX_DEPLOYMENT_TARGET} ; then
+	  _LT_AC_TAGVAR(allow_undefined_flag, $1)='-Wl,-flat_namespace -Wl,-undefined -Wl,suppress'
+	else
+	  case ${MACOSX_DEPLOYMENT_TARGET} in
+	    10.[012])
+	      _LT_AC_TAGVAR(allow_undefined_flag, $1)='-Wl,-flat_namespace -Wl,-undefined -Wl,suppress'
+	      ;;
+	    10.*)
+	      _LT_AC_TAGVAR(allow_undefined_flag, $1)='-Wl,-undefined -Wl,dynamic_lookup'
+	      ;;
+	  esac
+	fi
+	;;
+      esac
+    	lt_int_apple_cc_single_mod=no
+    	output_verbose_link_cmd='echo'
+    	if $CC -dumpspecs 2>&1 | grep 'single_module' >/dev/null ; then
+    	  lt_int_apple_cc_single_mod=yes
+    	fi
+    	if test "X$lt_int_apple_cc_single_mod" = Xyes ; then
+    	  _LT_AC_TAGVAR(archive_cmds, $1)='$CC -dynamiclib -single_module $allow_undefined_flag -o $lib $compiler_flags $libobjs $deplibs -install_name $rpath/$soname $verstring'
+    	else
+        _LT_AC_TAGVAR(archive_cmds, $1)='$CC -r ${wl}-bind_at_load -keep_private_externs -nostdlib -o ${lib}-master.o $libobjs~$CC -dynamiclib $allow_undefined_flag -o $lib ${lib}-master.o $compiler_flags $deplibs -install_name $rpath/$soname $verstring'
+      fi
+      _LT_AC_TAGVAR(module_cmds, $1)='$CC ${wl}-bind_at_load $allow_undefined_flag -o $lib -bundle $compiler_flags $libobjs $deplibs'
+      # Don't fix this by using the ld -exported_symbols_list flag, it doesn't exist in older darwin ld's
+        if test "X$lt_int_apple_cc_single_mod" = Xyes ; then
+          _LT_AC_TAGVAR(archive_expsym_cmds, $1)='sed -e "s,#.*,," -e "s,^[    ]*,," -e "s,^\(..*\),_&," < $export_symbols > $output_objdir/${libname}-symbols.expsym~$CC -dynamiclib -single_module $allow_undefined_flag -o $lib $compiler_flags $libobjs $deplibs -install_name $rpath/$soname $verstring~nmedit -s $output_objdir/${libname}-symbols.expsym ${lib}'
+        else
+          _LT_AC_TAGVAR(archive_expsym_cmds, $1)='sed -e "s,#.*,," -e "s,^[    ]*,," -e "s,^\(..*\),_&," < $export_symbols > $output_objdir/${libname}-symbols.expsym~$CC -r ${wl}-bind_at_load -keep_private_externs -nostdlib -o ${lib}-master.o $libobjs~$CC -dynamiclib $allow_undefined_flag -o $lib ${lib}-master.o $compiler_flags $deplibs -install_name $rpath/$soname $verstring~nmedit -s $output_objdir/${libname}-symbols.expsym ${lib}'
+        fi
+          _LT_AC_TAGVAR(module_expsym_cmds, $1)='sed -e "s,#.*,," -e "s,^[    ]*,," -e "s,^\(..*\),_&," < $export_symbols > $output_objdir/${libname}-symbols.expsym~$CC $allow_undefined_flag  -o $lib -bundle $compiler_flags $libobjs $deplibs~nmedit -s $output_objdir/${libname}-symbols.expsym ${lib}'
+      _LT_AC_TAGVAR(hardcode_direct, $1)=no
+      _LT_AC_TAGVAR(hardcode_automatic, $1)=yes
+      _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=unsupported
+      _LT_AC_TAGVAR(whole_archive_flag_spec, $1)='-all_load $convenience'
+      _LT_AC_TAGVAR(link_all_deplibs, $1)=yes
+    else  
+      _LT_AC_TAGVAR(ld_shlibs, $1)=no
+    fi  
+      ;;
+
+    dgux*)
+      _LT_AC_TAGVAR(archive_cmds, $1)='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags'
+      _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir'
+      _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+      ;;
+
+    freebsd1*)
+      _LT_AC_TAGVAR(ld_shlibs, $1)=no
+      ;;
+
+    # FreeBSD 2.2.[012] allows us to include c++rt0.o to get C++ constructor
+    # support.  Future versions do this automatically, but an explicit c++rt0.o
+    # does not break anything, and helps significantly (at the cost of a little
+    # extra space).
+    freebsd2.2*)
+      _LT_AC_TAGVAR(archive_cmds, $1)='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags /usr/lib/c++rt0.o'
+      _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='-R$libdir'
+      _LT_AC_TAGVAR(hardcode_direct, $1)=yes
+      _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+      ;;
+
+    # Unfortunately, older versions of FreeBSD 2 do not have this feature.
+    freebsd2*)
+      _LT_AC_TAGVAR(archive_cmds, $1)='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags'
+      _LT_AC_TAGVAR(hardcode_direct, $1)=yes
+      _LT_AC_TAGVAR(hardcode_minus_L, $1)=yes
+      _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+      ;;
+
+    # FreeBSD 3 and greater uses gcc -shared to do shared libraries.
+    freebsd* | kfreebsd*-gnu)
+      _LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared -o $lib $compiler_flags $libobjs $deplibs'
+      _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='-R$libdir'
+      _LT_AC_TAGVAR(hardcode_direct, $1)=yes
+      _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+      ;;
+
+    hpux9*)
+      if test "$GCC" = yes; then
+	_LT_AC_TAGVAR(archive_cmds, $1)='$rm $output_objdir/$soname~$CC -shared -fPIC ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $compiler_flags $libobjs $deplibs~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
+      else
+	_LT_AC_TAGVAR(archive_cmds, $1)='$rm $output_objdir/$soname~$LD -b +b $install_libdir -o $output_objdir/$soname $libobjs $deplibs $linker_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
+      fi
+      _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}+b ${wl}$libdir'
+      _LT_AC_TAGVAR(hardcode_libdir_separator, $1)=:
+      _LT_AC_TAGVAR(hardcode_direct, $1)=yes
+
+      # hardcode_minus_L: Not really in the search PATH,
+      # but as the default location of the library.
+      _LT_AC_TAGVAR(hardcode_minus_L, $1)=yes
+      _LT_AC_TAGVAR(export_dynamic_flag_spec, $1)='${wl}-E'
+      ;;
+
+    hpux10* | hpux11*)
+      if test "$GCC" = yes -a "$with_gnu_ld" = no; then
+	case "$host_cpu" in
+	hppa*64*|ia64*)
+	  _LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared ${wl}+h ${wl}$soname -o $lib $compiler_flags $libobjs $deplibs'
+	  ;;
+	*)
+	  _LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared -fPIC ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $compiler_flags $libobjs $deplibs'
+	  ;;
+	esac
+      else
+	case "$host_cpu" in
+	hppa*64*|ia64*)
+	  _LT_AC_TAGVAR(archive_cmds, $1)='$LD -b +h $soname -o $lib $libobjs $deplibs $linker_flags'
+	  ;;
+	*)
+	  _LT_AC_TAGVAR(archive_cmds, $1)='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags'
+	  ;;
+	esac
+      fi
+      if test "$with_gnu_ld" = no; then
+	case "$host_cpu" in
+	hppa*64*)
+	  _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}+b ${wl}$libdir'
+	  _LT_AC_TAGVAR(hardcode_libdir_flag_spec_ld, $1)='+b $libdir'
+	  _LT_AC_TAGVAR(hardcode_libdir_separator, $1)=:
+	  _LT_AC_TAGVAR(hardcode_direct, $1)=no
+	  _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+	  ;;
+	ia64*)
+	  _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir'
+	  _LT_AC_TAGVAR(hardcode_direct, $1)=no
+	  _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+
+	  # hardcode_minus_L: Not really in the search PATH,
+	  # but as the default location of the library.
+	  _LT_AC_TAGVAR(hardcode_minus_L, $1)=yes
+	  ;;
+	*)
+	  _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}+b ${wl}$libdir'
+	  _LT_AC_TAGVAR(hardcode_libdir_separator, $1)=:
+	  _LT_AC_TAGVAR(hardcode_direct, $1)=yes
+	  _LT_AC_TAGVAR(export_dynamic_flag_spec, $1)='${wl}-E'
+
+	  # hardcode_minus_L: Not really in the search PATH,
+	  # but as the default location of the library.
+	  _LT_AC_TAGVAR(hardcode_minus_L, $1)=yes
+	  ;;
+	esac
+      fi
+      ;;
+
+    irix5* | irix6* | nonstopux*)
+      if test "$GCC" = yes; then
+	_LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared $compiler_flags $libobjs $deplibs ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+      else
+	_LT_AC_TAGVAR(archive_cmds, $1)='$LD -shared $libobjs $deplibs $linker_flags -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${output_objdir}/so_locations -o $lib'
+	_LT_AC_TAGVAR(hardcode_libdir_flag_spec_ld, $1)='-rpath $libdir'
+      fi
+      _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir'
+      _LT_AC_TAGVAR(hardcode_libdir_separator, $1)=:
+      _LT_AC_TAGVAR(link_all_deplibs, $1)=yes
+      ;;
+
+    netbsd*)
+      if echo __ELF__ | $CC -E - | grep __ELF__ >/dev/null; then
+	_LT_AC_TAGVAR(archive_cmds, $1)='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags'  # a.out
+      else
+	_LT_AC_TAGVAR(archive_cmds, $1)='$LD -shared -o $lib $libobjs $deplibs $linker_flags'      # ELF
+      fi
+      _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='-R$libdir'
+      _LT_AC_TAGVAR(hardcode_direct, $1)=yes
+      _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+      ;;
+
+    newsos6)
+      _LT_AC_TAGVAR(archive_cmds, $1)='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags'
+      _LT_AC_TAGVAR(hardcode_direct, $1)=yes
+      _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir'
+      _LT_AC_TAGVAR(hardcode_libdir_separator, $1)=:
+      _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+      ;;
+
+    openbsd*)
+      _LT_AC_TAGVAR(hardcode_direct, $1)=yes
+      _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+      if test -z "`echo __ELF__ | $CC -E - | grep __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then
+	_LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag -o $lib $compiler_flags $libobjs $deplibs'
+	_LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath,$libdir'
+	_LT_AC_TAGVAR(export_dynamic_flag_spec, $1)='${wl}-E'
+      else
+       case $host_os in
+	 openbsd[[01]].* | openbsd2.[[0-7]] | openbsd2.[[0-7]].*)
+	   _LT_AC_TAGVAR(archive_cmds, $1)='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags'
+	   _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='-R$libdir'
+	   ;;
+	 *)
+	   _LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag -o $lib $compiler_flags $libobjs $deplibs'
+	   _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath,$libdir'
+	   ;;
+       esac
+      fi
+      ;;
+
+    os2*)
+      _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir'
+      _LT_AC_TAGVAR(hardcode_minus_L, $1)=yes
+      _LT_AC_TAGVAR(allow_undefined_flag, $1)=unsupported
+      _LT_AC_TAGVAR(archive_cmds, $1)='$echo "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$echo "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~$echo DATA >> $output_objdir/$libname.def~$echo " SINGLE NONSHARED" >> $output_objdir/$libname.def~$echo EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $compiler_flags $libobjs $deplibs$output_objdir/$libname.def'
+      _LT_AC_TAGVAR(old_archive_From_new_cmds, $1)='emximp -o $output_objdir/$libname.a $output_objdir/$libname.def'
+      ;;
+
+    osf3*)
+      if test "$GCC" = yes; then
+	_LT_AC_TAGVAR(allow_undefined_flag, $1)=' ${wl}-expect_unresolved ${wl}\*'
+	_LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared${allow_undefined_flag} $compiler_flags $libobjs $deplibs ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+      else
+	_LT_AC_TAGVAR(allow_undefined_flag, $1)=' -expect_unresolved \*'
+	_LT_AC_TAGVAR(archive_cmds, $1)='$LD -shared${allow_undefined_flag} $libobjs $deplibs $linker_flags -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${output_objdir}/so_locations -o $lib'
+      fi
+      _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir'
+      _LT_AC_TAGVAR(hardcode_libdir_separator, $1)=:
+      ;;
+
+    osf4* | osf5*)	# as osf3* with the addition of -msym flag
+      if test "$GCC" = yes; then
+	_LT_AC_TAGVAR(allow_undefined_flag, $1)=' ${wl}-expect_unresolved ${wl}\*'
+	_LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared${allow_undefined_flag} $compiler_flags $libobjs $deplibs ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && echo ${wl}-set_version ${wl}$verstring` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+	_LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir'
+      else
+	_LT_AC_TAGVAR(allow_undefined_flag, $1)=' -expect_unresolved \*'
+	_LT_AC_TAGVAR(archive_cmds, $1)='$LD -shared${allow_undefined_flag} $libobjs $deplibs $linker_flags -msym -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${output_objdir}/so_locations -o $lib'
+	_LT_AC_TAGVAR(archive_expsym_cmds, $1)='for i in `cat $export_symbols`; do printf "%s %s\\n" -exported_symbol "\$i" >> $lib.exp; done; echo "-hidden">> $lib.exp~
+	$LD -shared${allow_undefined_flag} -input $lib.exp $linker_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && echo -set_version $verstring` -update_registry ${objdir}/so_locations -o $lib~$rm $lib.exp'
+
+	# Both c and cxx compiler support -rpath directly
+	_LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='-rpath $libdir'
+      fi
+      _LT_AC_TAGVAR(hardcode_libdir_separator, $1)=:
+      ;;
+
+    sco3.2v5*)
+      _LT_AC_TAGVAR(archive_cmds, $1)='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags'
+      _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+      _LT_AC_TAGVAR(export_dynamic_flag_spec, $1)='${wl}-Bexport'
+      runpath_var=LD_RUN_PATH
+      hardcode_runpath_var=yes
+      ;;
+
+    solaris*)
+      _LT_AC_TAGVAR(no_undefined_flag, $1)=' -z text'
+      if test "$GCC" = yes; then
+	_LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared ${wl}-h ${wl}$soname -o $lib $compiler_flags $libobjs $deplibs'
+	_LT_AC_TAGVAR(archive_expsym_cmds, $1)='$echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~$echo "local: *; };" >> $lib.exp~
+	  $CC -shared ${wl}-M ${wl}$lib.exp ${wl}-h ${wl}$soname -o $lib $compiler_flags $libobjs $deplibs~$rm $lib.exp'
+      else
+	_LT_AC_TAGVAR(archive_cmds, $1)='$LD -G${allow_undefined_flag} -h $soname -o $lib $libobjs $deplibs $linker_flags'
+	_LT_AC_TAGVAR(archive_expsym_cmds, $1)='$echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~$echo "local: *; };" >> $lib.exp~
+  	$LD -G${allow_undefined_flag} -M $lib.exp -h $soname -o $lib $libobjs $deplibs $linker_flags~$rm $lib.exp'
+      fi
+      _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='-R$libdir'
+      _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+      case $host_os in
+      solaris2.[[0-5]] | solaris2.[[0-5]].*) ;;
+      *) # Supported since Solaris 2.6 (maybe 2.5.1?)
+	_LT_AC_TAGVAR(whole_archive_flag_spec, $1)='-z allextract$convenience -z defaultextract' ;;
+      esac
+      _LT_AC_TAGVAR(link_all_deplibs, $1)=yes
+      ;;
+
+    sunos4*)
+      if test "x$host_vendor" = xsequent; then
+	# Use $CC to link under sequent, because it throws in some extra .o
+	# files that make .init and .fini sections work.
+	_LT_AC_TAGVAR(archive_cmds, $1)='$CC -G ${wl}-h $soname -o $lib $compiler_flags $libobjs $deplibs'
+      else
+	_LT_AC_TAGVAR(archive_cmds, $1)='$LD -assert pure-text -Bstatic -o $lib $libobjs $deplibs $linker_flags'
+      fi
+      _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir'
+      _LT_AC_TAGVAR(hardcode_direct, $1)=yes
+      _LT_AC_TAGVAR(hardcode_minus_L, $1)=yes
+      _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+      ;;
+
+    sysv4)
+      case $host_vendor in
+	sni)
+	  _LT_AC_TAGVAR(archive_cmds, $1)='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags'
+	  _LT_AC_TAGVAR(hardcode_direct, $1)=yes # is this really true???
+	;;
+	siemens)
+	  ## LD is ld it makes a PLAMLIB
+	  ## CC just makes a GrossModule.
+	  _LT_AC_TAGVAR(archive_cmds, $1)='$LD -G -o $lib $libobjs $deplibs $linker_flags'
+	  _LT_AC_TAGVAR(reload_cmds, $1)='$CC -r -o $output$reload_objs'
+	  _LT_AC_TAGVAR(hardcode_direct, $1)=no
+        ;;
+	motorola)
+	  _LT_AC_TAGVAR(archive_cmds, $1)='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags'
+	  _LT_AC_TAGVAR(hardcode_direct, $1)=no #Motorola manual says yes, but my tests say they lie
+	;;
+      esac
+      runpath_var='LD_RUN_PATH'
+      _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+      ;;
+
+    sysv4.3*)
+      _LT_AC_TAGVAR(archive_cmds, $1)='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags'
+      _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+      _LT_AC_TAGVAR(export_dynamic_flag_spec, $1)='-Bexport'
+      ;;
+
+    sysv4*MP*)
+      if test -d /usr/nec; then
+	_LT_AC_TAGVAR(archive_cmds, $1)='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags'
+	_LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+	runpath_var=LD_RUN_PATH
+	hardcode_runpath_var=yes
+	_LT_AC_TAGVAR(ld_shlibs, $1)=yes
+      fi
+      ;;
+
+    sysv4.2uw2*)
+      _LT_AC_TAGVAR(archive_cmds, $1)='$LD -G -o $lib $libobjs $deplibs $linker_flags'
+      _LT_AC_TAGVAR(hardcode_direct, $1)=yes
+      _LT_AC_TAGVAR(hardcode_minus_L, $1)=no
+      _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+      hardcode_runpath_var=yes
+      runpath_var=LD_RUN_PATH
+      ;;
+
+   sysv5OpenUNIX8* | sysv5UnixWare7* |  sysv5uw[[78]]* | unixware7*)
+      _LT_AC_TAGVAR(no_undefined_flag, $1)='${wl}-z ${wl}text'
+      if test "$GCC" = yes; then
+	_LT_AC_TAGVAR(archive_cmds, $1)='$CC -shared ${wl}-h ${wl}$soname -o $lib $compiler_flags $libobjs $deplibs'
+      else
+	_LT_AC_TAGVAR(archive_cmds, $1)='$CC -G ${wl}-h ${wl}$soname -o $lib $compiler_flags $libobjs $deplibs'
+      fi
+      runpath_var='LD_RUN_PATH'
+      _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+      ;;
+
+    sysv5*)
+      _LT_AC_TAGVAR(no_undefined_flag, $1)=' -z text'
+      # $CC -shared without GNU ld will not create a library from C++
+      # object files and a static libstdc++, better avoid it by now
+      _LT_AC_TAGVAR(archive_cmds, $1)='$LD -G${allow_undefined_flag} -h $soname -o $lib $libobjs $deplibs $linker_flags'
+      _LT_AC_TAGVAR(archive_expsym_cmds, $1)='$echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~$echo "local: *; };" >> $lib.exp~
+  		$LD -G${allow_undefined_flag} -M $lib.exp -h $soname -o $lib $libobjs $deplibs $linker_flags~$rm $lib.exp'
+      _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)=
+      _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+      runpath_var='LD_RUN_PATH'
+      ;;
+
+    uts4*)
+      _LT_AC_TAGVAR(archive_cmds, $1)='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags'
+      _LT_AC_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir'
+      _LT_AC_TAGVAR(hardcode_shlibpath_var, $1)=no
+      ;;
+
+    *)
+      _LT_AC_TAGVAR(ld_shlibs, $1)=no
+      ;;
+    esac
+  fi
+])
+AC_MSG_RESULT([$_LT_AC_TAGVAR(ld_shlibs, $1)])
+test "$_LT_AC_TAGVAR(ld_shlibs, $1)" = no && can_build_shared=no
+
+variables_saved_for_relink="PATH $shlibpath_var $runpath_var"
+if test "$GCC" = yes; then
+  variables_saved_for_relink="$variables_saved_for_relink GCC_EXEC_PREFIX COMPILER_PATH LIBRARY_PATH"
+fi
+
+#
+# Do we need to explicitly link libc?
+#
+case "x$_LT_AC_TAGVAR(archive_cmds_need_lc, $1)" in
+x|xyes)
+  # Assume -lc should be added
+  _LT_AC_TAGVAR(archive_cmds_need_lc, $1)=yes
+
+  if test "$enable_shared" = yes && test "$GCC" = yes; then
+    case $_LT_AC_TAGVAR(archive_cmds, $1) in
+    *'~'*)
+      # FIXME: we may have to deal with multi-command sequences.
+      ;;
+    '$CC '*)
+      # Test whether the compiler implicitly links with -lc since on some
+      # systems, -lgcc has to come before -lc. If gcc already passes -lc
+      # to ld, don't add -lc before -lgcc.
+      AC_MSG_CHECKING([whether -lc should be explicitly linked in])
+      $rm conftest*
+      printf "$lt_simple_compile_test_code" > conftest.$ac_ext
+  
+      if AC_TRY_EVAL(ac_compile) 2>conftest.err; then
+        soname=conftest
+        lib=conftest
+        libobjs=conftest.$ac_objext
+        deplibs=
+        wl=$_LT_AC_TAGVAR(lt_prog_compiler_wl, $1)
+        compiler_flags=-v
+        linker_flags=-v
+        verstring=
+        output_objdir=.
+        libname=conftest
+        lt_save_allow_undefined_flag=$_LT_AC_TAGVAR(allow_undefined_flag, $1)
+        _LT_AC_TAGVAR(allow_undefined_flag, $1)=
+        if AC_TRY_EVAL(_LT_AC_TAGVAR(archive_cmds, $1) 2\>\&1 \| grep \" -lc \" \>/dev/null 2\>\&1)
+        then
+	  _LT_AC_TAGVAR(archive_cmds_need_lc, $1)=no
+        else
+	  _LT_AC_TAGVAR(archive_cmds_need_lc, $1)=yes
+        fi
+        _LT_AC_TAGVAR(allow_undefined_flag, $1)=$lt_save_allow_undefined_flag
+      else
+        cat conftest.err 1>&5
+      fi
+      $rm conftest*
+      AC_MSG_RESULT([$_LT_AC_TAGVAR(archive_cmds_need_lc, $1)])
+      ;;
+    esac
+  fi
+  ;;
+esac
+])# AC_LIBTOOL_PROG_LD_SHLIBS
+
+
+# _LT_AC_FILE_LTDLL_C
+# -------------------
+# Be careful that the start marker always follows a newline.
+AC_DEFUN([_LT_AC_FILE_LTDLL_C], [
+# /* ltdll.c starts here */
+# #define WIN32_LEAN_AND_MEAN
+# #include <windows.h>
+# #undef WIN32_LEAN_AND_MEAN
+# #include <stdio.h>
+#
+# #ifndef __CYGWIN__
+# #  ifdef __CYGWIN32__
+# #    define __CYGWIN__ __CYGWIN32__
+# #  endif
+# #endif
+#
+# #ifdef __cplusplus
+# extern "C" {
+# #endif
+# BOOL APIENTRY DllMain (HINSTANCE hInst, DWORD reason, LPVOID reserved);
+# #ifdef __cplusplus
+# }
+# #endif
+#
+# #ifdef __CYGWIN__
+# #include <cygwin/cygwin_dll.h>
+# DECLARE_CYGWIN_DLL( DllMain );
+# #endif
+# HINSTANCE __hDllInstance_base;
+#
+# BOOL APIENTRY
+# DllMain (HINSTANCE hInst, DWORD reason, LPVOID reserved)
+# {
+#   __hDllInstance_base = hInst;
+#   return TRUE;
+# }
+# /* ltdll.c ends here */
+])# _LT_AC_FILE_LTDLL_C
+
+
+# _LT_AC_TAGVAR(VARNAME, [TAGNAME])
+# ---------------------------------
+AC_DEFUN([_LT_AC_TAGVAR], [ifelse([$2], [], [$1], [$1_$2])])
+
+
+# old names
+AC_DEFUN([AM_PROG_LIBTOOL],   [AC_PROG_LIBTOOL])
+AC_DEFUN([AM_ENABLE_SHARED],  [AC_ENABLE_SHARED($@)])
+AC_DEFUN([AM_ENABLE_STATIC],  [AC_ENABLE_STATIC($@)])
+AC_DEFUN([AM_DISABLE_SHARED], [AC_DISABLE_SHARED($@)])
+AC_DEFUN([AM_DISABLE_STATIC], [AC_DISABLE_STATIC($@)])
+AC_DEFUN([AM_PROG_LD],        [AC_PROG_LD])
+AC_DEFUN([AM_PROG_NM],        [AC_PROG_NM])
+
+# This is just to silence aclocal about the macro not being used
+ifelse([AC_DISABLE_FAST_INSTALL])
+
+AC_DEFUN([LT_AC_PROG_GCJ],
+[AC_CHECK_TOOL(GCJ, gcj, no)
+  test "x${GCJFLAGS+set}" = xset || GCJFLAGS="-g -O2"
+  AC_SUBST(GCJFLAGS)
+])
+
+AC_DEFUN([LT_AC_PROG_RC],
+[AC_CHECK_TOOL(RC, windres, no)
+])
+
+############################################################
+# NOTE: This macro has been submitted for inclusion into   #
+#  GNU Autoconf as AC_PROG_SED.  When it is available in   #
+#  a released version of Autoconf we should remove this    #
+#  macro and use it instead.                               #
+############################################################
+# LT_AC_PROG_SED
+# --------------
+# Check for a fully-functional sed program, that truncates
+# as few characters as possible.  Prefer GNU sed if found.
+AC_DEFUN([LT_AC_PROG_SED],
+[AC_MSG_CHECKING([for a sed that does not truncate output])
+AC_CACHE_VAL(lt_cv_path_SED,
+[# Loop through the user's path and test for sed and gsed.
+# Then use that list of sed's as ones to test for truncation.
+as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+  IFS=$as_save_IFS
+  test -z "$as_dir" && as_dir=.
+  for lt_ac_prog in sed gsed; do
+    for ac_exec_ext in '' $ac_executable_extensions; do
+      if $as_executable_p "$as_dir/$lt_ac_prog$ac_exec_ext"; then
+        lt_ac_sed_list="$lt_ac_sed_list $as_dir/$lt_ac_prog$ac_exec_ext"
+      fi
+    done
+  done
+done
+lt_ac_max=0
+lt_ac_count=0
+# Add /usr/xpg4/bin/sed as it is typically found on Solaris
+# along with /bin/sed that truncates output.
+for lt_ac_sed in $lt_ac_sed_list /usr/xpg4/bin/sed; do
+  test ! -f $lt_ac_sed && break
+  cat /dev/null > conftest.in
+  lt_ac_count=0
+  echo $ECHO_N "0123456789$ECHO_C" >conftest.in
+  # Check for GNU sed and select it if it is found.
+  if "$lt_ac_sed" --version 2>&1 < /dev/null | grep 'GNU' > /dev/null; then
+    lt_cv_path_SED=$lt_ac_sed
+    break
+  fi
+  while true; do
+    cat conftest.in conftest.in >conftest.tmp
+    mv conftest.tmp conftest.in
+    cp conftest.in conftest.nl
+    echo >>conftest.nl
+    $lt_ac_sed -e 's/a$//' < conftest.nl >conftest.out || break
+    cmp -s conftest.out conftest.nl || break
+    # 10000 chars as input seems more than enough
+    test $lt_ac_count -gt 10 && break
+    lt_ac_count=`expr $lt_ac_count + 1`
+    if test $lt_ac_count -gt $lt_ac_max; then
+      lt_ac_max=$lt_ac_count
+      lt_cv_path_SED=$lt_ac_sed
+    fi
+  done
+done
+])
+SED=$lt_cv_path_SED
+AC_MSG_RESULT([$SED])
+])
+
+dnl PKG_CHECK_MODULES(GSTUFF, gtk+-2.0 >= 1.3 glib = 1.3.4, action-if, action-not)
+dnl defines GSTUFF_LIBS, GSTUFF_CFLAGS, see pkg-config man page
+dnl also defines GSTUFF_PKG_ERRORS on error
+AC_DEFUN([PKG_CHECK_MODULES], [
+  succeeded=no
+
+  if test -z "$PKG_CONFIG"; then
+    AC_PATH_PROG(PKG_CONFIG, pkg-config, no)
+  fi
+
+  if test "$PKG_CONFIG" = "no" ; then
+     echo "*** The pkg-config script could not be found. Make sure it is"
+     echo "*** in your path, or set the PKG_CONFIG environment variable"
+     echo "*** to the full path to pkg-config."
+     echo "*** Or see http://www.freedesktop.org/software/pkgconfig to get pkg-config."
+  else
+     PKG_CONFIG_MIN_VERSION=0.9.0
+     if $PKG_CONFIG --atleast-pkgconfig-version $PKG_CONFIG_MIN_VERSION; then
+        AC_MSG_CHECKING(for $2)
+
+        if $PKG_CONFIG --exists "$2" ; then
+            AC_MSG_RESULT(yes)
+            succeeded=yes
+
+            AC_MSG_CHECKING($1_CFLAGS)
+            $1_CFLAGS=`$PKG_CONFIG --cflags "$2"`
+            AC_MSG_RESULT($$1_CFLAGS)
+
+            AC_MSG_CHECKING($1_LIBS)
+            $1_LIBS=`$PKG_CONFIG --libs "$2"`
+            AC_MSG_RESULT($$1_LIBS)
+        else
+            $1_CFLAGS=""
+            $1_LIBS=""
+            ## If we have a custom action on failure, don't print errors, but 
+            ## do set a variable so people can do so.
+            $1_PKG_ERRORS=`$PKG_CONFIG --errors-to-stdout --print-errors "$2"`
+            ifelse([$4], ,echo $$1_PKG_ERRORS,)
+        fi
+
+        AC_SUBST($1_CFLAGS)
+        AC_SUBST($1_LIBS)
+     else
+        echo "*** Your version of pkg-config is too old. You need version $PKG_CONFIG_MIN_VERSION or newer."
+        echo "*** See http://www.freedesktop.org/software/pkgconfig"
+     fi
+  fi
+
+  if test $succeeded = yes; then
+     ifelse([$3], , :, [$3])
+  else
+     ifelse([$4], , AC_MSG_ERROR([Library requirements ($2) not met; consider adjusting the PKG_CONFIG_PATH environment variable if your libraries are in a nonstandard prefix so pkg-config can find them.]), [$4])
+  fi
+])
+
+
diff --git a/aclocal.m4 b/aclocal.m4
new file mode 100644
index 0000000..dd92cb3
--- /dev/null
+++ b/aclocal.m4
@@ -0,0 +1,863 @@
+# generated automatically by aclocal 1.9.6 -*- Autoconf -*-
+
+# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
+# 2005  Free Software Foundation, Inc.
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+# Copyright (C) 2002, 2003, 2005  Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# AM_AUTOMAKE_VERSION(VERSION)
+# ----------------------------
+# Automake X.Y traces this macro to ensure aclocal.m4 has been
+# generated from the m4 files accompanying Automake X.Y.
+AC_DEFUN([AM_AUTOMAKE_VERSION], [am__api_version="1.9"])
+
+# AM_SET_CURRENT_AUTOMAKE_VERSION
+# -------------------------------
+# Call AM_AUTOMAKE_VERSION so it can be traced.
+# This function is AC_REQUIREd by AC_INIT_AUTOMAKE.
+AC_DEFUN([AM_SET_CURRENT_AUTOMAKE_VERSION],
+	 [AM_AUTOMAKE_VERSION([1.9.6])])
+
+# AM_AUX_DIR_EXPAND                                         -*- Autoconf -*-
+
+# Copyright (C) 2001, 2003, 2005  Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# For projects using AC_CONFIG_AUX_DIR([foo]), Autoconf sets
+# $ac_aux_dir to `$srcdir/foo'.  In other projects, it is set to
+# `$srcdir', `$srcdir/..', or `$srcdir/../..'.
+#
+# Of course, Automake must honor this variable whenever it calls a
+# tool from the auxiliary directory.  The problem is that $srcdir (and
+# therefore $ac_aux_dir as well) can be either absolute or relative,
+# depending on how configure is run.  This is pretty annoying, since
+# it makes $ac_aux_dir quite unusable in subdirectories: in the top
+# source directory, any form will work fine, but in subdirectories a
+# relative path needs to be adjusted first.
+#
+# $ac_aux_dir/missing
+#    fails when called from a subdirectory if $ac_aux_dir is relative
+# $top_srcdir/$ac_aux_dir/missing
+#    fails if $ac_aux_dir is absolute,
+#    fails when called from a subdirectory in a VPATH build with
+#          a relative $ac_aux_dir
+#
+# The reason of the latter failure is that $top_srcdir and $ac_aux_dir
+# are both prefixed by $srcdir.  In an in-source build this is usually
+# harmless because $srcdir is `.', but things will broke when you
+# start a VPATH build or use an absolute $srcdir.
+#
+# So we could use something similar to $top_srcdir/$ac_aux_dir/missing,
+# iff we strip the leading $srcdir from $ac_aux_dir.  That would be:
+#   am_aux_dir='\$(top_srcdir)/'`expr "$ac_aux_dir" : "$srcdir//*\(.*\)"`
+# and then we would define $MISSING as
+#   MISSING="\${SHELL} $am_aux_dir/missing"
+# This will work as long as MISSING is not called from configure, because
+# unfortunately $(top_srcdir) has no meaning in configure.
+# However there are other variables, like CC, which are often used in
+# configure, and could therefore not use this "fixed" $ac_aux_dir.
+#
+# Another solution, used here, is to always expand $ac_aux_dir to an
+# absolute PATH.  The drawback is that using absolute paths prevent a
+# configured tree to be moved without reconfiguration.
+
+AC_DEFUN([AM_AUX_DIR_EXPAND],
+[dnl Rely on autoconf to set up CDPATH properly.
+AC_PREREQ([2.50])dnl
+# expand $ac_aux_dir to an absolute path
+am_aux_dir=`cd $ac_aux_dir && pwd`
+])
+
+# AM_CONDITIONAL                                            -*- Autoconf -*-
+
+# Copyright (C) 1997, 2000, 2001, 2003, 2004, 2005
+# Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 7
+
+# AM_CONDITIONAL(NAME, SHELL-CONDITION)
+# -------------------------------------
+# Define a conditional.
+AC_DEFUN([AM_CONDITIONAL],
+[AC_PREREQ(2.52)dnl
+ ifelse([$1], [TRUE],  [AC_FATAL([$0: invalid condition: $1])],
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+AC_SUBST([$1_TRUE])
+AC_SUBST([$1_FALSE])
+if $2; then
+  $1_TRUE=
+  $1_FALSE='#'
+else
+  $1_TRUE='#'
+  $1_FALSE=
+fi
+AC_CONFIG_COMMANDS_PRE(
+[if test -z "${$1_TRUE}" && test -z "${$1_FALSE}"; then
+  AC_MSG_ERROR([[conditional "$1" was never defined.
+Usually this means the macro was only invoked conditionally.]])
+fi])])
+
+
+# Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005
+# Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 8
+
+# There are a few dirty hacks below to avoid letting `AC_PROG_CC' be
+# written in clear, in which case automake, when reading aclocal.m4,
+# will think it sees a *use*, and therefore will trigger all it's
+# C support machinery.  Also note that it means that autoscan, seeing
+# CC etc. in the Makefile, will ask for an AC_PROG_CC use...
+
+
+# _AM_DEPENDENCIES(NAME)
+# ----------------------
+# See how the compiler implements dependency checking.
+# NAME is "CC", "CXX", "GCJ", or "OBJC".
+# We try a few techniques and use that to set a single cache variable.
+#
+# We don't AC_REQUIRE the corresponding AC_PROG_CC since the latter was
+# modified to invoke _AM_DEPENDENCIES(CC); we would have a circular
+# dependency, and given that the user is not expected to run this macro,
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+AC_DEFUN([_AM_DEPENDENCIES],
+[AC_REQUIRE([AM_SET_DEPDIR])dnl
+AC_REQUIRE([AM_OUTPUT_DEPENDENCY_COMMANDS])dnl
+AC_REQUIRE([AM_MAKE_INCLUDE])dnl
+AC_REQUIRE([AM_DEP_TRACK])dnl
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+ifelse([$1], CC,   [depcc="$CC"   am_compiler_list=],
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+       [$1], GCJ,  [depcc="$GCJ"  am_compiler_list='gcc3 gcc'],
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+AC_CACHE_CHECK([dependency style of $depcc],
+               [am_cv_$1_dependencies_compiler_type],
+[if test -z "$AMDEP_TRUE" && test -f "$am_depcomp"; then
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+  mkdir conftest.dir
+  # Copy depcomp to subdir because otherwise we won't find it if we're
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+  cp "$am_depcomp" conftest.dir
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+  # We will build objects and dependencies in a subdirectory because
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+  # side effect of compilation, but ICC will put the dependencies in
+  # the current directory while Tru64 will put them in the object
+  # directory.
+  mkdir sub
+
+  am_cv_$1_dependencies_compiler_type=none
+  if test "$am_compiler_list" = ""; then
+     am_compiler_list=`sed -n ['s/^#*\([a-zA-Z0-9]*\))$/\1/p'] < ./depcomp`
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+  for depmode in $am_compiler_list; do
+    # Setup a source with many dependencies, because some compilers
+    # like to wrap large dependency lists on column 80 (with \), and
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+    #
+    # We need to recreate these files for each test, as the compiler may
+    # overwrite some of them when testing with obscure command lines.
+    # This happens at least with the AIX C compiler.
+    : > sub/conftest.c
+    for i in 1 2 3 4 5 6; do
+      echo '#include "conftst'$i'.h"' >> sub/conftest.c
+      # Using `: > sub/conftst$i.h' creates only sub/conftst1.h with
+      # Solaris 8's {/usr,}/bin/sh.
+      touch sub/conftst$i.h
+    done
+    echo "${am__include} ${am__quote}sub/conftest.Po${am__quote}" > confmf
+
+    case $depmode in
+    nosideeffect)
+      # after this tag, mechanisms are not by side-effect, so they'll
+      # only be used when explicitly requested
+      if test "x$enable_dependency_tracking" = xyes; then
+	continue
+      else
+	break
+      fi
+      ;;
+    none) break ;;
+    esac
+    # We check with `-c' and `-o' for the sake of the "dashmstdout"
+    # mode.  It turns out that the SunPro C++ compiler does not properly
+    # handle `-M -o', and we need to detect this.
+    if depmode=$depmode \
+       source=sub/conftest.c object=sub/conftest.${OBJEXT-o} \
+       depfile=sub/conftest.Po tmpdepfile=sub/conftest.TPo \
+       $SHELL ./depcomp $depcc -c -o sub/conftest.${OBJEXT-o} sub/conftest.c \
+         >/dev/null 2>conftest.err &&
+       grep sub/conftst6.h sub/conftest.Po > /dev/null 2>&1 &&
+       grep sub/conftest.${OBJEXT-o} sub/conftest.Po > /dev/null 2>&1 &&
+       ${MAKE-make} -s -f confmf > /dev/null 2>&1; then
+      # icc doesn't choke on unknown options, it will just issue warnings
+      # or remarks (even with -Werror).  So we grep stderr for any message
+      # that says an option was ignored or not supported.
+      # When given -MP, icc 7.0 and 7.1 complain thusly:
+      #   icc: Command line warning: ignoring option '-M'; no argument required
+      # The diagnosis changed in icc 8.0:
+      #   icc: Command line remark: option '-MP' not supported
+      if (grep 'ignoring option' conftest.err ||
+          grep 'not supported' conftest.err) >/dev/null 2>&1; then :; else
+        am_cv_$1_dependencies_compiler_type=$depmode
+        break
+      fi
+    fi
+  done
+
+  cd ..
+  rm -rf conftest.dir
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+  am_cv_$1_dependencies_compiler_type=none
+fi
+])
+AC_SUBST([$1DEPMODE], [depmode=$am_cv_$1_dependencies_compiler_type])
+AM_CONDITIONAL([am__fastdep$1], [
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+
+
+# AM_SET_DEPDIR
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+[AC_REQUIRE([AM_SET_LEADING_DOT])dnl
+AC_SUBST([DEPDIR], ["${am__leading_dot}deps"])dnl
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+# AM_DEP_TRACK
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+  AMDEPBACKSLASH='\'
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+AC_SUBST([AMDEPBACKSLASH])
+])
+
+# Generate code to set up dependency tracking.              -*- Autoconf -*-
+
+# Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005
+# Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+#serial 3
+
+# _AM_OUTPUT_DEPENDENCY_COMMANDS
+# ------------------------------
+AC_DEFUN([_AM_OUTPUT_DEPENDENCY_COMMANDS],
+[for mf in $CONFIG_FILES; do
+  # Strip MF so we end up with the name of the file.
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+  # Check whether this is an Automake generated Makefile or not.
+  # We used to match only the files named `Makefile.in', but
+  # some people rename them; so instead we look at the file content.
+  # Grep'ing the first line is not enough: some people post-process
+  # each Makefile.in and add a new line on top of each file to say so.
+  # So let's grep whole file.
+  if grep '^#.*generated by automake' $mf > /dev/null 2>&1; then
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+  # Extract the definition of DEPDIR, am__include, and am__quote
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+  am__include=`sed -n 's/^am__include = //p' < "$mf"`
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+  am__quote=`sed -n 's/^am__quote = //p' < "$mf"`
+  # When using ansi2knr, U may be empty or an underscore; expand it
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+  # Find all dependency output files, they are included files with
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+  # simplest approach to changing $(DEPDIR) to its actual value in the
+  # expansion.
+  for file in `sed -n "
+    s/^$am__include $am__quote\(.*(DEPDIR).*\)$am__quote"'$/\1/p' <"$mf" | \
+       sed -e 's/\$(DEPDIR)/'"$DEPDIR"'/g' -e 's/\$U/'"$U"'/g'`; do
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+    # echo "creating $dirpart/$file"
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+done
+])# _AM_OUTPUT_DEPENDENCY_COMMANDS
+
+
+# AM_OUTPUT_DEPENDENCY_COMMANDS
+# -----------------------------
+# This macro should only be invoked once -- use via AC_REQUIRE.
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+AC_DEFUN([AM_OUTPUT_DEPENDENCY_COMMANDS],
+[AC_CONFIG_COMMANDS([depfiles],
+     [test x"$AMDEP_TRUE" != x"" || _AM_OUTPUT_DEPENDENCY_COMMANDS],
+     [AMDEP_TRUE="$AMDEP_TRUE" ac_aux_dir="$ac_aux_dir"])
+])
+
+# Copyright (C) 1996, 1997, 2000, 2001, 2003, 2005
+# Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 8
+
+# AM_CONFIG_HEADER is obsolete.  It has been replaced by AC_CONFIG_HEADERS.
+AU_DEFUN([AM_CONFIG_HEADER], [AC_CONFIG_HEADERS($@)])
+
+# Do all the work for Automake.                             -*- Autoconf -*-
+
+# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
+# Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 12
+
+# This macro actually does too much.  Some checks are only needed if
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+
+# AM_INIT_AUTOMAKE(PACKAGE, VERSION, [NO-DEFINE])
+# AM_INIT_AUTOMAKE([OPTIONS])
+# -----------------------------------------------
+# The call with PACKAGE and VERSION arguments is the old style
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+# the call to AM_INIT_AUTOMAKE.
+# We support both call styles for the transition.  After
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+AC_DEFUN([AM_INIT_AUTOMAKE],
+[AC_PREREQ([2.58])dnl
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+AC_REQUIRE([AM_SET_CURRENT_AUTOMAKE_VERSION])dnl
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+# test to see if srcdir already configured
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+  AC_MSG_ERROR([source directory already configured; run "make distclean" there first])
+fi
+
+# test whether we have cygpath
+if test -z "$CYGPATH_W"; then
+  if (cygpath --version) >/dev/null 2>/dev/null; then
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+    CYGPATH_W=echo
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+AC_SUBST([CYGPATH_W])
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+_AM_IF_OPTION([no-define],,
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+AC_PROVIDE_IFELSE([AC_PROG_CXX],
+                  [_AM_DEPENDENCIES(CXX)],
+                  [define([AC_PROG_CXX],
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+])
+
+
+# When config.status generates a header, we must update the stamp-h file.
+# This file resides in the same directory as the config header
+# that is generated.  The stamp files are numbered to have different names.
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+# Autoconf calls _AC_AM_CONFIG_HEADER_HOOK (when defined) in the
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+echo "timestamp for $1" >`AS_DIRNAME([$1])`/stamp-h[]$_am_stamp_count])
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+# Copyright (C) 2001, 2003, 2005  Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# AM_PROG_INSTALL_SH
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+AC_DEFUN([AM_PROG_INSTALL_SH],
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+install_sh=${install_sh-"$am_aux_dir/install-sh"}
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+# Copyright (C) 2003, 2005  Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 2
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+# Check whether the underlying file-system supports filenames
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+AC_SUBST([am__leading_dot])])
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+# Check to see how 'make' treats includes.	            -*- Autoconf -*-
+
+# Copyright (C) 2001, 2002, 2003, 2005  Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 3
+
+# AM_MAKE_INCLUDE()
+# -----------------
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+AC_DEFUN([AM_MAKE_INCLUDE],
+[am_make=${MAKE-make}
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+   if test "`$am_make -s -f confmf 2> /dev/null`" = "done"; then
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+AC_SUBST([am__include])
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+AC_MSG_RESULT([$_am_result])
+rm -f confinc confmf
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+# Fake the existence of programs that GNU maintainers use.  -*- Autoconf -*-
+
+# Copyright (C) 1997, 1999, 2000, 2001, 2003, 2005
+# Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 4
+
+# AM_MISSING_PROG(NAME, PROGRAM)
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+# AM_MISSING_HAS_RUN
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+  am_missing_run=
+  AC_MSG_WARN([`missing' script is too old or missing])
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+
+# Copyright (C) 2003, 2004, 2005  Free Software Foundation, Inc.
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+# gives unlimited permission to copy and/or distribute it,
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+# AM_PROG_MKDIR_P
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+  #   $(mkdir_p) $(somedir)
+  # where $(somedir) is conditionally defined.  However this is wrong
+  # for two reasons:
+  #  1. if the package is installed by a user who cannot write `.'
+  #     make install will fail,
+  #  2. the above comment should most certainly read
+  #     $(mkdir_p) $(DESTDIR)$(somedir)
+  #     so it does not work when $(somedir) is undefined and
+  #     $(DESTDIR) is not.
+  #  To support the latter case, we have to write
+  #     test -z "$(somedir)" || $(mkdir_p) $(DESTDIR)$(somedir),
+  #  so the `.' trick is pointless.
+  mkdir_p='mkdir -p --'
+else
+  # On NextStep and OpenStep, the `mkdir' command does not
+  # recognize any option.  It will interpret all options as
+  # directories to create, and then abort because `.' already
+  # exists.
+  for d in ./-p ./--version;
+  do
+    test -d $d && rmdir $d
+  done
+  # $(mkinstalldirs) is defined by Automake if mkinstalldirs exists.
+  if test -f "$ac_aux_dir/mkinstalldirs"; then
+    mkdir_p='$(mkinstalldirs)'
+  else
+    mkdir_p='$(install_sh) -d'
+  fi
+fi
+AC_SUBST([mkdir_p])])
+
+# Helper functions for option handling.                     -*- Autoconf -*-
+
+# Copyright (C) 2001, 2002, 2003, 2005  Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 3
+
+# _AM_MANGLE_OPTION(NAME)
+# -----------------------
+AC_DEFUN([_AM_MANGLE_OPTION],
+[[_AM_OPTION_]m4_bpatsubst($1, [[^a-zA-Z0-9_]], [_])])
+
+# _AM_SET_OPTION(NAME)
+# ------------------------------
+# Set option NAME.  Presently that only means defining a flag for this option.
+AC_DEFUN([_AM_SET_OPTION],
+[m4_define(_AM_MANGLE_OPTION([$1]), 1)])
+
+# _AM_SET_OPTIONS(OPTIONS)
+# ----------------------------------
+# OPTIONS is a space-separated list of Automake options.
+AC_DEFUN([_AM_SET_OPTIONS],
+[AC_FOREACH([_AM_Option], [$1], [_AM_SET_OPTION(_AM_Option)])])
+
+# _AM_IF_OPTION(OPTION, IF-SET, [IF-NOT-SET])
+# -------------------------------------------
+# Execute IF-SET if OPTION is set, IF-NOT-SET otherwise.
+AC_DEFUN([_AM_IF_OPTION],
+[m4_ifset(_AM_MANGLE_OPTION([$1]), [$2], [$3])])
+
+# Check to make sure that the build environment is sane.    -*- Autoconf -*-
+
+# Copyright (C) 1996, 1997, 2000, 2001, 2003, 2005
+# Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 4
+
+# AM_SANITY_CHECK
+# ---------------
+AC_DEFUN([AM_SANITY_CHECK],
+[AC_MSG_CHECKING([whether build environment is sane])
+# Just in case
+sleep 1
+echo timestamp > conftest.file
+# Do `set' in a subshell so we don't clobber the current shell's
+# arguments.  Must try -L first in case configure is actually a
+# symlink; some systems play weird games with the mod time of symlinks
+# (eg FreeBSD returns the mod time of the symlink's containing
+# directory).
+if (
+   set X `ls -Lt $srcdir/configure conftest.file 2> /dev/null`
+   if test "$[*]" = "X"; then
+      # -L didn't work.
+      set X `ls -t $srcdir/configure conftest.file`
+   fi
+   rm -f conftest.file
+   if test "$[*]" != "X $srcdir/configure conftest.file" \
+      && test "$[*]" != "X conftest.file $srcdir/configure"; then
+
+      # If neither matched, then we have a broken ls.  This can happen
+      # if, for instance, CONFIG_SHELL is bash and it inherits a
+      # broken ls alias from the environment.  This has actually
+      # happened.  Such a system could not be considered "sane".
+      AC_MSG_ERROR([ls -t appears to fail.  Make sure there is not a broken
+alias in your environment])
+   fi
+
+   test "$[2]" = conftest.file
+   )
+then
+   # Ok.
+   :
+else
+   AC_MSG_ERROR([newly created file is older than distributed files!
+Check your system clock])
+fi
+AC_MSG_RESULT(yes)])
+
+# Copyright (C) 2001, 2003, 2005  Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# AM_PROG_INSTALL_STRIP
+# ---------------------
+# One issue with vendor `install' (even GNU) is that you can't
+# specify the program used to strip binaries.  This is especially
+# annoying in cross-compiling environments, where the build's strip
+# is unlikely to handle the host's binaries.
+# Fortunately install-sh will honor a STRIPPROG variable, so we
+# always use install-sh in `make install-strip', and initialize
+# STRIPPROG with the value of the STRIP variable (set by the user).
+AC_DEFUN([AM_PROG_INSTALL_STRIP],
+[AC_REQUIRE([AM_PROG_INSTALL_SH])dnl
+# Installed binaries are usually stripped using `strip' when the user
+# run `make install-strip'.  However `strip' might not be the right
+# tool to use in cross-compilation environments, therefore Automake
+# will honor the `STRIP' environment variable to overrule this program.
+dnl Don't test for $cross_compiling = yes, because it might be `maybe'.
+if test "$cross_compiling" != no; then
+  AC_CHECK_TOOL([STRIP], [strip], :)
+fi
+INSTALL_STRIP_PROGRAM="\${SHELL} \$(install_sh) -c -s"
+AC_SUBST([INSTALL_STRIP_PROGRAM])])
+
+# Check how to create a tarball.                            -*- Autoconf -*-
+
+# Copyright (C) 2004, 2005  Free Software Foundation, Inc.
+#
+# This file is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# serial 2
+
+# _AM_PROG_TAR(FORMAT)
+# --------------------
+# Check how to create a tarball in format FORMAT.
+# FORMAT should be one of `v7', `ustar', or `pax'.
+#
+# Substitute a variable $(am__tar) that is a command
+# writing to stdout a FORMAT-tarball containing the directory
+# $tardir.
+#     tardir=directory && $(am__tar) > result.tar
+#
+# Substitute a variable $(am__untar) that extract such
+# a tarball read from stdin.
+#     $(am__untar) < result.tar
+AC_DEFUN([_AM_PROG_TAR],
+[# Always define AMTAR for backward compatibility.
+AM_MISSING_PROG([AMTAR], [tar])
+m4_if([$1], [v7],
+     [am__tar='${AMTAR} chof - "$$tardir"'; am__untar='${AMTAR} xf -'],
+     [m4_case([$1], [ustar],, [pax],,
+              [m4_fatal([Unknown tar format])])
+AC_MSG_CHECKING([how to create a $1 tar archive])
+# Loop over all known methods to create a tar archive until one works.
+_am_tools='gnutar m4_if([$1], [ustar], [plaintar]) pax cpio none'
+_am_tools=${am_cv_prog_tar_$1-$_am_tools}
+# Do not fold the above two line into one, because Tru64 sh and
+# Solaris sh will not grok spaces in the rhs of `-'.
+for _am_tool in $_am_tools
+do
+  case $_am_tool in
+  gnutar)
+    for _am_tar in tar gnutar gtar;
+    do
+      AM_RUN_LOG([$_am_tar --version]) && break
+    done
+    am__tar="$_am_tar --format=m4_if([$1], [pax], [posix], [$1]) -chf - "'"$$tardir"'
+    am__tar_="$_am_tar --format=m4_if([$1], [pax], [posix], [$1]) -chf - "'"$tardir"'
+    am__untar="$_am_tar -xf -"
+    ;;
+  plaintar)
+    # Must skip GNU tar: if it does not support --format= it doesn't create
+    # ustar tarball either.
+    (tar --version) >/dev/null 2>&1 && continue
+    am__tar='tar chf - "$$tardir"'
+    am__tar_='tar chf - "$tardir"'
+    am__untar='tar xf -'
+    ;;
+  pax)
+    am__tar='pax -L -x $1 -w "$$tardir"'
+    am__tar_='pax -L -x $1 -w "$tardir"'
+    am__untar='pax -r'
+    ;;
+  cpio)
+    am__tar='find "$$tardir" -print | cpio -o -H $1 -L'
+    am__tar_='find "$tardir" -print | cpio -o -H $1 -L'
+    am__untar='cpio -i -H $1 -d'
+    ;;
+  none)
+    am__tar=false
+    am__tar_=false
+    am__untar=false
+    ;;
+  esac
+
+  # If the value was cached, stop now.  We just wanted to have am__tar
+  # and am__untar set.
+  test -n "${am_cv_prog_tar_$1}" && break
+
+  # tar/untar a dummy directory, and stop if the command works
+  rm -rf conftest.dir
+  mkdir conftest.dir
+  echo GrepMe > conftest.dir/file
+  AM_RUN_LOG([tardir=conftest.dir && eval $am__tar_ >conftest.tar])
+  rm -rf conftest.dir
+  if test -s conftest.tar; then
+    AM_RUN_LOG([$am__untar <conftest.tar])
+    grep GrepMe conftest.dir/file >/dev/null 2>&1 && break
+  fi
+done
+rm -rf conftest.dir
+
+AC_CACHE_VAL([am_cv_prog_tar_$1], [am_cv_prog_tar_$1=$_am_tool])
+AC_MSG_RESULT([$am_cv_prog_tar_$1])])
+AC_SUBST([am__tar])
+AC_SUBST([am__untar])
+]) # _AM_PROG_TAR
+
+m4_include([acinclude.m4])
diff --git a/all.pro b/all.pro
new file mode 100644
index 0000000..d0be7a8
--- /dev/null
+++ b/all.pro
@@ -0,0 +1,18 @@
+## adjust or comment the following lines to reflect your configuration
+DEFINES      += HAVE_USB
+unix:DEFINES += HAVE_PPDEV
+unix:DEFINES += HAVE_READLINE
+## for directories with a space in their name, use the short filename format
+## for e.g. "Program Files" should be "Progra~1"
+win32: LIBUSB_PATH = "C:\Progra~1\LibUSB-Win32"
+
+###############################################################################
+DEFINES      += NO_KDE QT_NO_ASCII_CAST
+OBJECTS_DIR   = .libs
+MOC_DIR       = .libs
+QT            = qt3support core xml network
+CONFIG       += qt thread warn_on console
+unix:CONFIG  += release #debug
+win32:CONFIG += release
+INCLUDEPATH  += $${STOPDIR}/src $${STOPDIR}
+DEPENDPATH   += $${STOPDIR}/app.pro $${STOPDIR}/all.pro $${STOPDIR}/lib.pro
diff --git a/app.pro b/app.pro
new file mode 100644
index 0000000..6694183
--- /dev/null
+++ b/app.pro
@@ -0,0 +1,6 @@
+include($${STOPDIR}/all.pro)
+
+TEMPLATE           = app
+unix:QMAKE_CLEAN  += $${TARGET}
+win32:DESTDIR      = .\
+win32:QMAKE_CLEAN += $${TARGET}.exe
diff --git a/config.guess b/config.guess
new file mode 100755
index 0000000..da83314
--- /dev/null
+++ b/config.guess
@@ -0,0 +1,1561 @@
+#! /bin/sh
+# Attempt to guess a canonical system name.
+#   Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+#   2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
+#   Free Software Foundation, Inc.
+
+timestamp='2009-04-27'
+
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
+# 02110-1301, USA.
+#
+# As a special exception to the GNU General Public License, if you
+# distribute this file as part of a program that contains a
+# configuration script generated by Autoconf, you may include it under
+# the same distribution terms that you use for the rest of that program.
+
+
+# Originally written by Per Bothner <per@bothner.com>.
+# Please send patches to <config-patches@gnu.org>.  Submit a context
+# diff and a properly formatted ChangeLog entry.
+#
+# This script attempts to guess a canonical system name similar to
+# config.sub.  If it succeeds, it prints the system name on stdout, and
+# exits with 0.  Otherwise, it exits with 1.
+#
+# The plan is that this can be called by configure scripts if you
+# don't specify an explicit build system type.
+
+me=`echo "$0" | sed -e 's,.*/,,'`
+
+usage="\
+Usage: $0 [OPTION]
+
+Output the configuration name of the system \`$me' is run on.
+
+Operation modes:
+  -h, --help         print this help, then exit
+  -t, --time-stamp   print date of last modification, then exit
+  -v, --version      print version number, then exit
+
+Report bugs and patches to <config-patches@gnu.org>."
+
+version="\
+GNU config.guess ($timestamp)
+
+Originally written by Per Bothner.
+Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
+2002, 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+
+This is free software; see the source for copying conditions.  There is NO
+warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE."
+
+help="
+Try \`$me --help' for more information."
+
+# Parse command line
+while test $# -gt 0 ; do
+  case $1 in
+    --time-stamp | --time* | -t )
+       echo "$timestamp" ; exit ;;
+    --version | -v )
+       echo "$version" ; exit ;;
+    --help | --h* | -h )
+       echo "$usage"; exit ;;
+    -- )     # Stop option processing
+       shift; break ;;
+    - )	# Use stdin as input.
+       break ;;
+    -* )
+       echo "$me: invalid option $1$help" >&2
+       exit 1 ;;
+    * )
+       break ;;
+  esac
+done
+
+if test $# != 0; then
+  echo "$me: too many arguments$help" >&2
+  exit 1
+fi
+
+trap 'exit 1' 1 2 15
+
+# CC_FOR_BUILD -- compiler used by this script. Note that the use of a
+# compiler to aid in system detection is discouraged as it requires
+# temporary files to be created and, as you can see below, it is a
+# headache to deal with in a portable fashion.
+
+# Historically, `CC_FOR_BUILD' used to be named `HOST_CC'. We still
+# use `HOST_CC' if defined, but it is deprecated.
+
+# Portable tmp directory creation inspired by the Autoconf team.
+
+set_cc_for_build='
+trap "exitcode=\$?; (rm -f \$tmpfiles 2>/dev/null; rmdir \$tmp 2>/dev/null) && exit \$exitcode" 0 ;
+trap "rm -f \$tmpfiles 2>/dev/null; rmdir \$tmp 2>/dev/null; exit 1" 1 2 13 15 ;
+: ${TMPDIR=/tmp} ;
+ { tmp=`(umask 077 && mktemp -d "$TMPDIR/cgXXXXXX") 2>/dev/null` && test -n "$tmp" && test -d "$tmp" ; } ||
+ { test -n "$RANDOM" && tmp=$TMPDIR/cg$$-$RANDOM && (umask 077 && mkdir $tmp) ; } ||
+ { tmp=$TMPDIR/cg-$$ && (umask 077 && mkdir $tmp) && echo "Warning: creating insecure temp directory" >&2 ; } ||
+ { echo "$me: cannot create a temporary directory in $TMPDIR" >&2 ; exit 1 ; } ;
+dummy=$tmp/dummy ;
+tmpfiles="$dummy.c $dummy.o $dummy.rel $dummy" ;
+case $CC_FOR_BUILD,$HOST_CC,$CC in
+ ,,)    echo "int x;" > $dummy.c ;
+	for c in cc gcc c89 c99 ; do
+	  if ($c -c -o $dummy.o $dummy.c) >/dev/null 2>&1 ; then
+	     CC_FOR_BUILD="$c"; break ;
+	  fi ;
+	done ;
+	if test x"$CC_FOR_BUILD" = x ; then
+	  CC_FOR_BUILD=no_compiler_found ;
+	fi
+	;;
+ ,,*)   CC_FOR_BUILD=$CC ;;
+ ,*,*)  CC_FOR_BUILD=$HOST_CC ;;
+esac ; set_cc_for_build= ;'
+
+# This is needed to find uname on a Pyramid OSx when run in the BSD universe.
+# (ghazi@noc.rutgers.edu 1994-08-24)
+if (test -f /.attbin/uname) >/dev/null 2>&1 ; then
+	PATH=$PATH:/.attbin ; export PATH
+fi
+
+UNAME_MACHINE=`(uname -m) 2>/dev/null` || UNAME_MACHINE=unknown
+UNAME_RELEASE=`(uname -r) 2>/dev/null` || UNAME_RELEASE=unknown
+UNAME_SYSTEM=`(uname -s) 2>/dev/null`  || UNAME_SYSTEM=unknown
+UNAME_VERSION=`(uname -v) 2>/dev/null` || UNAME_VERSION=unknown
+
+# Note: order is significant - the case branches are not exclusive.
+
+case "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" in
+    *:NetBSD:*:*)
+	# NetBSD (nbsd) targets should (where applicable) match one or
+	# more of the tupples: *-*-netbsdelf*, *-*-netbsdaout*,
+	# *-*-netbsdecoff* and *-*-netbsd*.  For targets that recently
+	# switched to ELF, *-*-netbsd* would select the old
+	# object file format.  This provides both forward
+	# compatibility and a consistent mechanism for selecting the
+	# object file format.
+	#
+	# Note: NetBSD doesn't particularly care about the vendor
+	# portion of the name.  We always set it to "unknown".
+	sysctl="sysctl -n hw.machine_arch"
+	UNAME_MACHINE_ARCH=`(/sbin/$sysctl 2>/dev/null || \
+	    /usr/sbin/$sysctl 2>/dev/null || echo unknown)`
+	case "${UNAME_MACHINE_ARCH}" in
+	    armeb) machine=armeb-unknown ;;
+	    arm*) machine=arm-unknown ;;
+	    sh3el) machine=shl-unknown ;;
+	    sh3eb) machine=sh-unknown ;;
+	    sh5el) machine=sh5le-unknown ;;
+	    *) machine=${UNAME_MACHINE_ARCH}-unknown ;;
+	esac
+	# The Operating System including object format, if it has switched
+	# to ELF recently, or will in the future.
+	case "${UNAME_MACHINE_ARCH}" in
+	    arm*|i386|m68k|ns32k|sh3*|sparc|vax)
+		eval $set_cc_for_build
+		if echo __ELF__ | $CC_FOR_BUILD -E - 2>/dev/null \
+			| grep __ELF__ >/dev/null
+		then
+		    # Once all utilities can be ECOFF (netbsdecoff) or a.out (netbsdaout).
+		    # Return netbsd for either.  FIX?
+		    os=netbsd
+		else
+		    os=netbsdelf
+		fi
+		;;
+	    *)
+	        os=netbsd
+		;;
+	esac
+	# The OS release
+	# Debian GNU/NetBSD machines have a different userland, and
+	# thus, need a distinct triplet. However, they do not need
+	# kernel version information, so it can be replaced with a
+	# suitable tag, in the style of linux-gnu.
+	case "${UNAME_VERSION}" in
+	    Debian*)
+		release='-gnu'
+		;;
+	    *)
+		release=`echo ${UNAME_RELEASE}|sed -e 's/[-_].*/\./'`
+		;;
+	esac
+	# Since CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM:
+	# contains redundant information, the shorter form:
+	# CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM is used.
+	echo "${machine}-${os}${release}"
+	exit ;;
+    *:OpenBSD:*:*)
+	UNAME_MACHINE_ARCH=`arch | sed 's/OpenBSD.//'`
+	echo ${UNAME_MACHINE_ARCH}-unknown-openbsd${UNAME_RELEASE}
+	exit ;;
+    *:ekkoBSD:*:*)
+	echo ${UNAME_MACHINE}-unknown-ekkobsd${UNAME_RELEASE}
+	exit ;;
+    *:SolidBSD:*:*)
+	echo ${UNAME_MACHINE}-unknown-solidbsd${UNAME_RELEASE}
+	exit ;;
+    macppc:MirBSD:*:*)
+	echo powerpc-unknown-mirbsd${UNAME_RELEASE}
+	exit ;;
+    *:MirBSD:*:*)
+	echo ${UNAME_MACHINE}-unknown-mirbsd${UNAME_RELEASE}
+	exit ;;
+    alpha:OSF1:*:*)
+	case $UNAME_RELEASE in
+	*4.0)
+		UNAME_RELEASE=`/usr/sbin/sizer -v | awk '{print $3}'`
+		;;
+	*5.*)
+	        UNAME_RELEASE=`/usr/sbin/sizer -v | awk '{print $4}'`
+		;;
+	esac
+	# According to Compaq, /usr/sbin/psrinfo has been available on
+	# OSF/1 and Tru64 systems produced since 1995.  I hope that
+	# covers most systems running today.  This code pipes the CPU
+	# types through head -n 1, so we only detect the type of CPU 0.
+	ALPHA_CPU_TYPE=`/usr/sbin/psrinfo -v | sed -n -e 's/^  The alpha \(.*\) processor.*$/\1/p' | head -n 1`
+	case "$ALPHA_CPU_TYPE" in
+	    "EV4 (21064)")
+		UNAME_MACHINE="alpha" ;;
+	    "EV4.5 (21064)")
+		UNAME_MACHINE="alpha" ;;
+	    "LCA4 (21066/21068)")
+		UNAME_MACHINE="alpha" ;;
+	    "EV5 (21164)")
+		UNAME_MACHINE="alphaev5" ;;
+	    "EV5.6 (21164A)")
+		UNAME_MACHINE="alphaev56" ;;
+	    "EV5.6 (21164PC)")
+		UNAME_MACHINE="alphapca56" ;;
+	    "EV5.7 (21164PC)")
+		UNAME_MACHINE="alphapca57" ;;
+	    "EV6 (21264)")
+		UNAME_MACHINE="alphaev6" ;;
+	    "EV6.7 (21264A)")
+		UNAME_MACHINE="alphaev67" ;;
+	    "EV6.8CB (21264C)")
+		UNAME_MACHINE="alphaev68" ;;
+	    "EV6.8AL (21264B)")
+		UNAME_MACHINE="alphaev68" ;;
+	    "EV6.8CX (21264D)")
+		UNAME_MACHINE="alphaev68" ;;
+	    "EV6.9A (21264/EV69A)")
+		UNAME_MACHINE="alphaev69" ;;
+	    "EV7 (21364)")
+		UNAME_MACHINE="alphaev7" ;;
+	    "EV7.9 (21364A)")
+		UNAME_MACHINE="alphaev79" ;;
+	esac
+	# A Pn.n version is a patched version.
+	# A Vn.n version is a released version.
+	# A Tn.n version is a released field test version.
+	# A Xn.n version is an unreleased experimental baselevel.
+	# 1.2 uses "1.2" for uname -r.
+	echo ${UNAME_MACHINE}-dec-osf`echo ${UNAME_RELEASE} | sed -e 's/^[PVTX]//' | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz'`
+	exit ;;
+    Alpha\ *:Windows_NT*:*)
+	# How do we know it's Interix rather than the generic POSIX subsystem?
+	# Should we change UNAME_MACHINE based on the output of uname instead
+	# of the specific Alpha model?
+	echo alpha-pc-interix
+	exit ;;
+    21064:Windows_NT:50:3)
+	echo alpha-dec-winnt3.5
+	exit ;;
+    Amiga*:UNIX_System_V:4.0:*)
+	echo m68k-unknown-sysv4
+	exit ;;
+    *:[Aa]miga[Oo][Ss]:*:*)
+	echo ${UNAME_MACHINE}-unknown-amigaos
+	exit ;;
+    *:[Mm]orph[Oo][Ss]:*:*)
+	echo ${UNAME_MACHINE}-unknown-morphos
+	exit ;;
+    *:OS/390:*:*)
+	echo i370-ibm-openedition
+	exit ;;
+    *:z/VM:*:*)
+	echo s390-ibm-zvmoe
+	exit ;;
+    *:OS400:*:*)
+        echo powerpc-ibm-os400
+	exit ;;
+    arm:RISC*:1.[012]*:*|arm:riscix:1.[012]*:*)
+	echo arm-acorn-riscix${UNAME_RELEASE}
+	exit ;;
+    arm:riscos:*:*|arm:RISCOS:*:*)
+	echo arm-unknown-riscos
+	exit ;;
+    SR2?01:HI-UX/MPP:*:* | SR8000:HI-UX/MPP:*:*)
+	echo hppa1.1-hitachi-hiuxmpp
+	exit ;;
+    Pyramid*:OSx*:*:* | MIS*:OSx*:*:* | MIS*:SMP_DC-OSx*:*:*)
+	# akee@wpdis03.wpafb.af.mil (Earle F. Ake) contributed MIS and NILE.
+	if test "`(/bin/universe) 2>/dev/null`" = att ; then
+		echo pyramid-pyramid-sysv3
+	else
+		echo pyramid-pyramid-bsd
+	fi
+	exit ;;
+    NILE*:*:*:dcosx)
+	echo pyramid-pyramid-svr4
+	exit ;;
+    DRS?6000:unix:4.0:6*)
+	echo sparc-icl-nx6
+	exit ;;
+    DRS?6000:UNIX_SV:4.2*:7* | DRS?6000:isis:4.2*:7*)
+	case `/usr/bin/uname -p` in
+	    sparc) echo sparc-icl-nx7; exit ;;
+	esac ;;
+    s390x:SunOS:*:*)
+	echo ${UNAME_MACHINE}-ibm-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'`
+	exit ;;
+    sun4H:SunOS:5.*:*)
+	echo sparc-hal-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'`
+	exit ;;
+    sun4*:SunOS:5.*:* | tadpole*:SunOS:5.*:*)
+	echo sparc-sun-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'`
+	exit ;;
+    i86pc:SunOS:5.*:* | i86xen:SunOS:5.*:*)
+	eval $set_cc_for_build
+	SUN_ARCH="i386"
+	# If there is a compiler, see if it is configured for 64-bit objects.
+	# Note that the Sun cc does not turn __LP64__ into 1 like gcc does.
+	# This test works for both compilers.
+	if [ "$CC_FOR_BUILD" != 'no_compiler_found' ]; then
+	    if (echo '#ifdef __amd64'; echo IS_64BIT_ARCH; echo '#endif') | \
+		(CCOPTS= $CC_FOR_BUILD -E - 2>/dev/null) | \
+		grep IS_64BIT_ARCH >/dev/null
+	    then
+		SUN_ARCH="x86_64"
+	    fi
+	fi
+	echo ${SUN_ARCH}-pc-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'`
+	exit ;;
+    sun4*:SunOS:6*:*)
+	# According to config.sub, this is the proper way to canonicalize
+	# SunOS6.  Hard to guess exactly what SunOS6 will be like, but
+	# it's likely to be more like Solaris than SunOS4.
+	echo sparc-sun-solaris3`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'`
+	exit ;;
+    sun4*:SunOS:*:*)
+	case "`/usr/bin/arch -k`" in
+	    Series*|S4*)
+		UNAME_RELEASE=`uname -v`
+		;;
+	esac
+	# Japanese Language versions have a version number like `4.1.3-JL'.
+	echo sparc-sun-sunos`echo ${UNAME_RELEASE}|sed -e 's/-/_/'`
+	exit ;;
+    sun3*:SunOS:*:*)
+	echo m68k-sun-sunos${UNAME_RELEASE}
+	exit ;;
+    sun*:*:4.2BSD:*)
+	UNAME_RELEASE=`(sed 1q /etc/motd | awk '{print substr($5,1,3)}') 2>/dev/null`
+	test "x${UNAME_RELEASE}" = "x" && UNAME_RELEASE=3
+	case "`/bin/arch`" in
+	    sun3)
+		echo m68k-sun-sunos${UNAME_RELEASE}
+		;;
+	    sun4)
+		echo sparc-sun-sunos${UNAME_RELEASE}
+		;;
+	esac
+	exit ;;
+    aushp:SunOS:*:*)
+	echo sparc-auspex-sunos${UNAME_RELEASE}
+	exit ;;
+    # The situation for MiNT is a little confusing.  The machine name
+    # can be virtually everything (everything which is not
+    # "atarist" or "atariste" at least should have a processor
+    # > m68000).  The system name ranges from "MiNT" over "FreeMiNT"
+    # to the lowercase version "mint" (or "freemint").  Finally
+    # the system name "TOS" denotes a system which is actually not
+    # MiNT.  But MiNT is downward compatible to TOS, so this should
+    # be no problem.
+    atarist[e]:*MiNT:*:* | atarist[e]:*mint:*:* | atarist[e]:*TOS:*:*)
+        echo m68k-atari-mint${UNAME_RELEASE}
+	exit ;;
+    atari*:*MiNT:*:* | atari*:*mint:*:* | atarist[e]:*TOS:*:*)
+	echo m68k-atari-mint${UNAME_RELEASE}
+        exit ;;
+    *falcon*:*MiNT:*:* | *falcon*:*mint:*:* | *falcon*:*TOS:*:*)
+        echo m68k-atari-mint${UNAME_RELEASE}
+	exit ;;
+    milan*:*MiNT:*:* | milan*:*mint:*:* | *milan*:*TOS:*:*)
+        echo m68k-milan-mint${UNAME_RELEASE}
+        exit ;;
+    hades*:*MiNT:*:* | hades*:*mint:*:* | *hades*:*TOS:*:*)
+        echo m68k-hades-mint${UNAME_RELEASE}
+        exit ;;
+    *:*MiNT:*:* | *:*mint:*:* | *:*TOS:*:*)
+        echo m68k-unknown-mint${UNAME_RELEASE}
+        exit ;;
+    m68k:machten:*:*)
+	echo m68k-apple-machten${UNAME_RELEASE}
+	exit ;;
+    powerpc:machten:*:*)
+	echo powerpc-apple-machten${UNAME_RELEASE}
+	exit ;;
+    RISC*:Mach:*:*)
+	echo mips-dec-mach_bsd4.3
+	exit ;;
+    RISC*:ULTRIX:*:*)
+	echo mips-dec-ultrix${UNAME_RELEASE}
+	exit ;;
+    VAX*:ULTRIX*:*:*)
+	echo vax-dec-ultrix${UNAME_RELEASE}
+	exit ;;
+    2020:CLIX:*:* | 2430:CLIX:*:*)
+	echo clipper-intergraph-clix${UNAME_RELEASE}
+	exit ;;
+    mips:*:*:UMIPS | mips:*:*:RISCos)
+	eval $set_cc_for_build
+	sed 's/^	//' << EOF >$dummy.c
+#ifdef __cplusplus
+#include <stdio.h>  /* for printf() prototype */
+	int main (int argc, char *argv[]) {
+#else
+	int main (argc, argv) int argc; char *argv[]; {
+#endif
+	#if defined (host_mips) && defined (MIPSEB)
+	#if defined (SYSTYPE_SYSV)
+	  printf ("mips-mips-riscos%ssysv\n", argv[1]); exit (0);
+	#endif
+	#if defined (SYSTYPE_SVR4)
+	  printf ("mips-mips-riscos%ssvr4\n", argv[1]); exit (0);
+	#endif
+	#if defined (SYSTYPE_BSD43) || defined(SYSTYPE_BSD)
+	  printf ("mips-mips-riscos%sbsd\n", argv[1]); exit (0);
+	#endif
+	#endif
+	  exit (-1);
+	}
+EOF
+	$CC_FOR_BUILD -o $dummy $dummy.c &&
+	  dummyarg=`echo "${UNAME_RELEASE}" | sed -n 's/\([0-9]*\).*/\1/p'` &&
+	  SYSTEM_NAME=`$dummy $dummyarg` &&
+	    { echo "$SYSTEM_NAME"; exit; }
+	echo mips-mips-riscos${UNAME_RELEASE}
+	exit ;;
+    Motorola:PowerMAX_OS:*:*)
+	echo powerpc-motorola-powermax
+	exit ;;
+    Motorola:*:4.3:PL8-*)
+	echo powerpc-harris-powermax
+	exit ;;
+    Night_Hawk:*:*:PowerMAX_OS | Synergy:PowerMAX_OS:*:*)
+	echo powerpc-harris-powermax
+	exit ;;
+    Night_Hawk:Power_UNIX:*:*)
+	echo powerpc-harris-powerunix
+	exit ;;
+    m88k:CX/UX:7*:*)
+	echo m88k-harris-cxux7
+	exit ;;
+    m88k:*:4*:R4*)
+	echo m88k-motorola-sysv4
+	exit ;;
+    m88k:*:3*:R3*)
+	echo m88k-motorola-sysv3
+	exit ;;
+    AViiON:dgux:*:*)
+        # DG/UX returns AViiON for all architectures
+        UNAME_PROCESSOR=`/usr/bin/uname -p`
+	if [ $UNAME_PROCESSOR = mc88100 ] || [ $UNAME_PROCESSOR = mc88110 ]
+	then
+	    if [ ${TARGET_BINARY_INTERFACE}x = m88kdguxelfx ] || \
+	       [ ${TARGET_BINARY_INTERFACE}x = x ]
+	    then
+		echo m88k-dg-dgux${UNAME_RELEASE}
+	    else
+		echo m88k-dg-dguxbcs${UNAME_RELEASE}
+	    fi
+	else
+	    echo i586-dg-dgux${UNAME_RELEASE}
+	fi
+ 	exit ;;
+    M88*:DolphinOS:*:*)	# DolphinOS (SVR3)
+	echo m88k-dolphin-sysv3
+	exit ;;
+    M88*:*:R3*:*)
+	# Delta 88k system running SVR3
+	echo m88k-motorola-sysv3
+	exit ;;
+    XD88*:*:*:*) # Tektronix XD88 system running UTekV (SVR3)
+	echo m88k-tektronix-sysv3
+	exit ;;
+    Tek43[0-9][0-9]:UTek:*:*) # Tektronix 4300 system running UTek (BSD)
+	echo m68k-tektronix-bsd
+	exit ;;
+    *:IRIX*:*:*)
+	echo mips-sgi-irix`echo ${UNAME_RELEASE}|sed -e 's/-/_/g'`
+	exit ;;
+    ????????:AIX?:[12].1:2)   # AIX 2.2.1 or AIX 2.1.1 is RT/PC AIX.
+	echo romp-ibm-aix     # uname -m gives an 8 hex-code CPU id
+	exit ;;               # Note that: echo "'`uname -s`'" gives 'AIX '
+    i*86:AIX:*:*)
+	echo i386-ibm-aix
+	exit ;;
+    ia64:AIX:*:*)
+	if [ -x /usr/bin/oslevel ] ; then
+		IBM_REV=`/usr/bin/oslevel`
+	else
+		IBM_REV=${UNAME_VERSION}.${UNAME_RELEASE}
+	fi
+	echo ${UNAME_MACHINE}-ibm-aix${IBM_REV}
+	exit ;;
+    *:AIX:2:3)
+	if grep bos325 /usr/include/stdio.h >/dev/null 2>&1; then
+		eval $set_cc_for_build
+		sed 's/^		//' << EOF >$dummy.c
+		#include <sys/systemcfg.h>
+
+		main()
+			{
+			if (!__power_pc())
+				exit(1);
+			puts("powerpc-ibm-aix3.2.5");
+			exit(0);
+			}
+EOF
+		if $CC_FOR_BUILD -o $dummy $dummy.c && SYSTEM_NAME=`$dummy`
+		then
+			echo "$SYSTEM_NAME"
+		else
+			echo rs6000-ibm-aix3.2.5
+		fi
+	elif grep bos324 /usr/include/stdio.h >/dev/null 2>&1; then
+		echo rs6000-ibm-aix3.2.4
+	else
+		echo rs6000-ibm-aix3.2
+	fi
+	exit ;;
+    *:AIX:*:[456])
+	IBM_CPU_ID=`/usr/sbin/lsdev -C -c processor -S available | sed 1q | awk '{ print $1 }'`
+	if /usr/sbin/lsattr -El ${IBM_CPU_ID} | grep ' POWER' >/dev/null 2>&1; then
+		IBM_ARCH=rs6000
+	else
+		IBM_ARCH=powerpc
+	fi
+	if [ -x /usr/bin/oslevel ] ; then
+		IBM_REV=`/usr/bin/oslevel`
+	else
+		IBM_REV=${UNAME_VERSION}.${UNAME_RELEASE}
+	fi
+	echo ${IBM_ARCH}-ibm-aix${IBM_REV}
+	exit ;;
+    *:AIX:*:*)
+	echo rs6000-ibm-aix
+	exit ;;
+    ibmrt:4.4BSD:*|romp-ibm:BSD:*)
+	echo romp-ibm-bsd4.4
+	exit ;;
+    ibmrt:*BSD:*|romp-ibm:BSD:*)            # covers RT/PC BSD and
+	echo romp-ibm-bsd${UNAME_RELEASE}   # 4.3 with uname added to
+	exit ;;                             # report: romp-ibm BSD 4.3
+    *:BOSX:*:*)
+	echo rs6000-bull-bosx
+	exit ;;
+    DPX/2?00:B.O.S.:*:*)
+	echo m68k-bull-sysv3
+	exit ;;
+    9000/[34]??:4.3bsd:1.*:*)
+	echo m68k-hp-bsd
+	exit ;;
+    hp300:4.4BSD:*:* | 9000/[34]??:4.3bsd:2.*:*)
+	echo m68k-hp-bsd4.4
+	exit ;;
+    9000/[34678]??:HP-UX:*:*)
+	HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'`
+	case "${UNAME_MACHINE}" in
+	    9000/31? )            HP_ARCH=m68000 ;;
+	    9000/[34]?? )         HP_ARCH=m68k ;;
+	    9000/[678][0-9][0-9])
+		if [ -x /usr/bin/getconf ]; then
+		    sc_cpu_version=`/usr/bin/getconf SC_CPU_VERSION 2>/dev/null`
+                    sc_kernel_bits=`/usr/bin/getconf SC_KERNEL_BITS 2>/dev/null`
+                    case "${sc_cpu_version}" in
+                      523) HP_ARCH="hppa1.0" ;; # CPU_PA_RISC1_0
+                      528) HP_ARCH="hppa1.1" ;; # CPU_PA_RISC1_1
+                      532)                      # CPU_PA_RISC2_0
+                        case "${sc_kernel_bits}" in
+                          32) HP_ARCH="hppa2.0n" ;;
+                          64) HP_ARCH="hppa2.0w" ;;
+			  '') HP_ARCH="hppa2.0" ;;   # HP-UX 10.20
+                        esac ;;
+                    esac
+		fi
+		if [ "${HP_ARCH}" = "" ]; then
+		    eval $set_cc_for_build
+		    sed 's/^              //' << EOF >$dummy.c
+
+              #define _HPUX_SOURCE
+              #include <stdlib.h>
+              #include <unistd.h>
+
+              int main ()
+              {
+              #if defined(_SC_KERNEL_BITS)
+                  long bits = sysconf(_SC_KERNEL_BITS);
+              #endif
+                  long cpu  = sysconf (_SC_CPU_VERSION);
+
+                  switch (cpu)
+              	{
+              	case CPU_PA_RISC1_0: puts ("hppa1.0"); break;
+              	case CPU_PA_RISC1_1: puts ("hppa1.1"); break;
+              	case CPU_PA_RISC2_0:
+              #if defined(_SC_KERNEL_BITS)
+              	    switch (bits)
+              		{
+              		case 64: puts ("hppa2.0w"); break;
+              		case 32: puts ("hppa2.0n"); break;
+              		default: puts ("hppa2.0"); break;
+              		} break;
+              #else  /* !defined(_SC_KERNEL_BITS) */
+              	    puts ("hppa2.0"); break;
+              #endif
+              	default: puts ("hppa1.0"); break;
+              	}
+                  exit (0);
+              }
+EOF
+		    (CCOPTS= $CC_FOR_BUILD -o $dummy $dummy.c 2>/dev/null) && HP_ARCH=`$dummy`
+		    test -z "$HP_ARCH" && HP_ARCH=hppa
+		fi ;;
+	esac
+	if [ ${HP_ARCH} = "hppa2.0w" ]
+	then
+	    eval $set_cc_for_build
+
+	    # hppa2.0w-hp-hpux* has a 64-bit kernel and a compiler generating
+	    # 32-bit code.  hppa64-hp-hpux* has the same kernel and a compiler
+	    # generating 64-bit code.  GNU and HP use different nomenclature:
+	    #
+	    # $ CC_FOR_BUILD=cc ./config.guess
+	    # => hppa2.0w-hp-hpux11.23
+	    # $ CC_FOR_BUILD="cc +DA2.0w" ./config.guess
+	    # => hppa64-hp-hpux11.23
+
+	    if echo __LP64__ | (CCOPTS= $CC_FOR_BUILD -E - 2>/dev/null) |
+		grep __LP64__ >/dev/null
+	    then
+		HP_ARCH="hppa2.0w"
+	    else
+		HP_ARCH="hppa64"
+	    fi
+	fi
+	echo ${HP_ARCH}-hp-hpux${HPUX_REV}
+	exit ;;
+    ia64:HP-UX:*:*)
+	HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'`
+	echo ia64-hp-hpux${HPUX_REV}
+	exit ;;
+    3050*:HI-UX:*:*)
+	eval $set_cc_for_build
+	sed 's/^	//' << EOF >$dummy.c
+	#include <unistd.h>
+	int
+	main ()
+	{
+	  long cpu = sysconf (_SC_CPU_VERSION);
+	  /* The order matters, because CPU_IS_HP_MC68K erroneously returns
+	     true for CPU_PA_RISC1_0.  CPU_IS_PA_RISC returns correct
+	     results, however.  */
+	  if (CPU_IS_PA_RISC (cpu))
+	    {
+	      switch (cpu)
+		{
+		  case CPU_PA_RISC1_0: puts ("hppa1.0-hitachi-hiuxwe2"); break;
+		  case CPU_PA_RISC1_1: puts ("hppa1.1-hitachi-hiuxwe2"); break;
+		  case CPU_PA_RISC2_0: puts ("hppa2.0-hitachi-hiuxwe2"); break;
+		  default: puts ("hppa-hitachi-hiuxwe2"); break;
+		}
+	    }
+	  else if (CPU_IS_HP_MC68K (cpu))
+	    puts ("m68k-hitachi-hiuxwe2");
+	  else puts ("unknown-hitachi-hiuxwe2");
+	  exit (0);
+	}
+EOF
+	$CC_FOR_BUILD -o $dummy $dummy.c && SYSTEM_NAME=`$dummy` &&
+		{ echo "$SYSTEM_NAME"; exit; }
+	echo unknown-hitachi-hiuxwe2
+	exit ;;
+    9000/7??:4.3bsd:*:* | 9000/8?[79]:4.3bsd:*:* )
+	echo hppa1.1-hp-bsd
+	exit ;;
+    9000/8??:4.3bsd:*:*)
+	echo hppa1.0-hp-bsd
+	exit ;;
+    *9??*:MPE/iX:*:* | *3000*:MPE/iX:*:*)
+	echo hppa1.0-hp-mpeix
+	exit ;;
+    hp7??:OSF1:*:* | hp8?[79]:OSF1:*:* )
+	echo hppa1.1-hp-osf
+	exit ;;
+    hp8??:OSF1:*:*)
+	echo hppa1.0-hp-osf
+	exit ;;
+    i*86:OSF1:*:*)
+	if [ -x /usr/sbin/sysversion ] ; then
+	    echo ${UNAME_MACHINE}-unknown-osf1mk
+	else
+	    echo ${UNAME_MACHINE}-unknown-osf1
+	fi
+	exit ;;
+    parisc*:Lites*:*:*)
+	echo hppa1.1-hp-lites
+	exit ;;
+    C1*:ConvexOS:*:* | convex:ConvexOS:C1*:*)
+	echo c1-convex-bsd
+        exit ;;
+    C2*:ConvexOS:*:* | convex:ConvexOS:C2*:*)
+	if getsysinfo -f scalar_acc
+	then echo c32-convex-bsd
+	else echo c2-convex-bsd
+	fi
+        exit ;;
+    C34*:ConvexOS:*:* | convex:ConvexOS:C34*:*)
+	echo c34-convex-bsd
+        exit ;;
+    C38*:ConvexOS:*:* | convex:ConvexOS:C38*:*)
+	echo c38-convex-bsd
+        exit ;;
+    C4*:ConvexOS:*:* | convex:ConvexOS:C4*:*)
+	echo c4-convex-bsd
+        exit ;;
+    CRAY*Y-MP:*:*:*)
+	echo ymp-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/'
+	exit ;;
+    CRAY*[A-Z]90:*:*:*)
+	echo ${UNAME_MACHINE}-cray-unicos${UNAME_RELEASE} \
+	| sed -e 's/CRAY.*\([A-Z]90\)/\1/' \
+	      -e y/ABCDEFGHIJKLMNOPQRSTUVWXYZ/abcdefghijklmnopqrstuvwxyz/ \
+	      -e 's/\.[^.]*$/.X/'
+	exit ;;
+    CRAY*TS:*:*:*)
+	echo t90-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/'
+	exit ;;
+    CRAY*T3E:*:*:*)
+	echo alphaev5-cray-unicosmk${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/'
+	exit ;;
+    CRAY*SV1:*:*:*)
+	echo sv1-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/'
+	exit ;;
+    *:UNICOS/mp:*:*)
+	echo craynv-cray-unicosmp${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/'
+	exit ;;
+    F30[01]:UNIX_System_V:*:* | F700:UNIX_System_V:*:*)
+	FUJITSU_PROC=`uname -m | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz'`
+        FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'`
+        FUJITSU_REL=`echo ${UNAME_RELEASE} | sed -e 's/ /_/'`
+        echo "${FUJITSU_PROC}-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}"
+        exit ;;
+    5000:UNIX_System_V:4.*:*)
+        FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'`
+        FUJITSU_REL=`echo ${UNAME_RELEASE} | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/ /_/'`
+        echo "sparc-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}"
+	exit ;;
+    i*86:BSD/386:*:* | i*86:BSD/OS:*:* | *:Ascend\ Embedded/OS:*:*)
+	echo ${UNAME_MACHINE}-pc-bsdi${UNAME_RELEASE}
+	exit ;;
+    sparc*:BSD/OS:*:*)
+	echo sparc-unknown-bsdi${UNAME_RELEASE}
+	exit ;;
+    *:BSD/OS:*:*)
+	echo ${UNAME_MACHINE}-unknown-bsdi${UNAME_RELEASE}
+	exit ;;
+    *:FreeBSD:*:*)
+	case ${UNAME_MACHINE} in
+	    pc98)
+		echo i386-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;;
+	    amd64)
+		echo x86_64-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;;
+	    *)
+		echo ${UNAME_MACHINE}-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;;
+	esac
+	exit ;;
+    i*:CYGWIN*:*)
+	echo ${UNAME_MACHINE}-pc-cygwin
+	exit ;;
+    *:MINGW*:*)
+	echo ${UNAME_MACHINE}-pc-mingw32
+	exit ;;
+    i*:windows32*:*)
+    	# uname -m includes "-pc" on this system.
+    	echo ${UNAME_MACHINE}-mingw32
+	exit ;;
+    i*:PW*:*)
+	echo ${UNAME_MACHINE}-pc-pw32
+	exit ;;
+    *:Interix*:[3456]*)
+    	case ${UNAME_MACHINE} in
+	    x86)
+		echo i586-pc-interix${UNAME_RELEASE}
+		exit ;;
+	    EM64T | authenticamd | genuineintel)
+		echo x86_64-unknown-interix${UNAME_RELEASE}
+		exit ;;
+	    IA64)
+		echo ia64-unknown-interix${UNAME_RELEASE}
+		exit ;;
+	esac ;;
+    [345]86:Windows_95:* | [345]86:Windows_98:* | [345]86:Windows_NT:*)
+	echo i${UNAME_MACHINE}-pc-mks
+	exit ;;
+    i*:Windows_NT*:* | Pentium*:Windows_NT*:*)
+	# How do we know it's Interix rather than the generic POSIX subsystem?
+	# It also conflicts with pre-2.0 versions of AT&T UWIN. Should we
+	# UNAME_MACHINE based on the output of uname instead of i386?
+	echo i586-pc-interix
+	exit ;;
+    i*:UWIN*:*)
+	echo ${UNAME_MACHINE}-pc-uwin
+	exit ;;
+    amd64:CYGWIN*:*:* | x86_64:CYGWIN*:*:*)
+	echo x86_64-unknown-cygwin
+	exit ;;
+    p*:CYGWIN*:*)
+	echo powerpcle-unknown-cygwin
+	exit ;;
+    prep*:SunOS:5.*:*)
+	echo powerpcle-unknown-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'`
+	exit ;;
+    *:GNU:*:*)
+	# the GNU system
+	echo `echo ${UNAME_MACHINE}|sed -e 's,[-/].*$,,'`-unknown-gnu`echo ${UNAME_RELEASE}|sed -e 's,/.*$,,'`
+	exit ;;
+    *:GNU/*:*:*)
+	# other systems with GNU libc and userland
+	echo ${UNAME_MACHINE}-unknown-`echo ${UNAME_SYSTEM} | sed 's,^[^/]*/,,' | tr '[A-Z]' '[a-z]'``echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'`-gnu
+	exit ;;
+    i*86:Minix:*:*)
+	echo ${UNAME_MACHINE}-pc-minix
+	exit ;;
+    arm*:Linux:*:*)
+	eval $set_cc_for_build
+	if echo __ARM_EABI__ | $CC_FOR_BUILD -E - 2>/dev/null \
+	    | grep -q __ARM_EABI__
+	then
+	    echo ${UNAME_MACHINE}-unknown-linux-gnu
+	else
+	    echo ${UNAME_MACHINE}-unknown-linux-gnueabi
+	fi
+	exit ;;
+    avr32*:Linux:*:*)
+	echo ${UNAME_MACHINE}-unknown-linux-gnu
+	exit ;;
+    cris:Linux:*:*)
+	echo cris-axis-linux-gnu
+	exit ;;
+    crisv32:Linux:*:*)
+	echo crisv32-axis-linux-gnu
+	exit ;;
+    frv:Linux:*:*)
+    	echo frv-unknown-linux-gnu
+	exit ;;
+    ia64:Linux:*:*)
+	echo ${UNAME_MACHINE}-unknown-linux-gnu
+	exit ;;
+    m32r*:Linux:*:*)
+	echo ${UNAME_MACHINE}-unknown-linux-gnu
+	exit ;;
+    m68*:Linux:*:*)
+	echo ${UNAME_MACHINE}-unknown-linux-gnu
+	exit ;;
+    mips:Linux:*:*)
+	eval $set_cc_for_build
+	sed 's/^	//' << EOF >$dummy.c
+	#undef CPU
+	#undef mips
+	#undef mipsel
+	#if defined(__MIPSEL__) || defined(__MIPSEL) || defined(_MIPSEL) || defined(MIPSEL)
+	CPU=mipsel
+	#else
+	#if defined(__MIPSEB__) || defined(__MIPSEB) || defined(_MIPSEB) || defined(MIPSEB)
+	CPU=mips
+	#else
+	CPU=
+	#endif
+	#endif
+EOF
+	eval "`$CC_FOR_BUILD -E $dummy.c 2>/dev/null | sed -n '
+	    /^CPU/{
+		s: ::g
+		p
+	    }'`"
+	test x"${CPU}" != x && { echo "${CPU}-unknown-linux-gnu"; exit; }
+	;;
+    mips64:Linux:*:*)
+	eval $set_cc_for_build
+	sed 's/^	//' << EOF >$dummy.c
+	#undef CPU
+	#undef mips64
+	#undef mips64el
+	#if defined(__MIPSEL__) || defined(__MIPSEL) || defined(_MIPSEL) || defined(MIPSEL)
+	CPU=mips64el
+	#else
+	#if defined(__MIPSEB__) || defined(__MIPSEB) || defined(_MIPSEB) || defined(MIPSEB)
+	CPU=mips64
+	#else
+	CPU=
+	#endif
+	#endif
+EOF
+	eval "`$CC_FOR_BUILD -E $dummy.c 2>/dev/null | sed -n '
+	    /^CPU/{
+		s: ::g
+		p
+	    }'`"
+	test x"${CPU}" != x && { echo "${CPU}-unknown-linux-gnu"; exit; }
+	;;
+    or32:Linux:*:*)
+	echo or32-unknown-linux-gnu
+	exit ;;
+    ppc:Linux:*:*)
+	echo powerpc-unknown-linux-gnu
+	exit ;;
+    ppc64:Linux:*:*)
+	echo powerpc64-unknown-linux-gnu
+	exit ;;
+    alpha:Linux:*:*)
+	case `sed -n '/^cpu model/s/^.*: \(.*\)/\1/p' < /proc/cpuinfo` in
+	  EV5)   UNAME_MACHINE=alphaev5 ;;
+	  EV56)  UNAME_MACHINE=alphaev56 ;;
+	  PCA56) UNAME_MACHINE=alphapca56 ;;
+	  PCA57) UNAME_MACHINE=alphapca56 ;;
+	  EV6)   UNAME_MACHINE=alphaev6 ;;
+	  EV67)  UNAME_MACHINE=alphaev67 ;;
+	  EV68*) UNAME_MACHINE=alphaev68 ;;
+        esac
+	objdump --private-headers /bin/sh | grep ld.so.1 >/dev/null
+	if test "$?" = 0 ; then LIBC="libc1" ; else LIBC="" ; fi
+	echo ${UNAME_MACHINE}-unknown-linux-gnu${LIBC}
+	exit ;;
+    padre:Linux:*:*)
+	echo sparc-unknown-linux-gnu
+	exit ;;
+    parisc:Linux:*:* | hppa:Linux:*:*)
+	# Look for CPU level
+	case `grep '^cpu[^a-z]*:' /proc/cpuinfo 2>/dev/null | cut -d' ' -f2` in
+	  PA7*) echo hppa1.1-unknown-linux-gnu ;;
+	  PA8*) echo hppa2.0-unknown-linux-gnu ;;
+	  *)    echo hppa-unknown-linux-gnu ;;
+	esac
+	exit ;;
+    parisc64:Linux:*:* | hppa64:Linux:*:*)
+	echo hppa64-unknown-linux-gnu
+	exit ;;
+    s390:Linux:*:* | s390x:Linux:*:*)
+	echo ${UNAME_MACHINE}-ibm-linux
+	exit ;;
+    sh64*:Linux:*:*)
+    	echo ${UNAME_MACHINE}-unknown-linux-gnu
+	exit ;;
+    sh*:Linux:*:*)
+	echo ${UNAME_MACHINE}-unknown-linux-gnu
+	exit ;;
+    sparc:Linux:*:* | sparc64:Linux:*:*)
+	echo ${UNAME_MACHINE}-unknown-linux-gnu
+	exit ;;
+    vax:Linux:*:*)
+	echo ${UNAME_MACHINE}-dec-linux-gnu
+	exit ;;
+    x86_64:Linux:*:*)
+	echo x86_64-unknown-linux-gnu
+	exit ;;
+    xtensa*:Linux:*:*)
+    	echo ${UNAME_MACHINE}-unknown-linux-gnu
+	exit ;;
+    i*86:Linux:*:*)
+	# The BFD linker knows what the default object file format is, so
+	# first see if it will tell us. cd to the root directory to prevent
+	# problems with other programs or directories called `ld' in the path.
+	# Set LC_ALL=C to ensure ld outputs messages in English.
+	ld_supported_targets=`cd /; LC_ALL=C ld --help 2>&1 \
+			 | sed -ne '/supported targets:/!d
+				    s/[ 	][ 	]*/ /g
+				    s/.*supported targets: *//
+				    s/ .*//
+				    p'`
+        case "$ld_supported_targets" in
+	  elf32-i386)
+		TENTATIVE="${UNAME_MACHINE}-pc-linux-gnu"
+		;;
+	  a.out-i386-linux)
+		echo "${UNAME_MACHINE}-pc-linux-gnuaout"
+		exit ;;
+	  "")
+		# Either a pre-BFD a.out linker (linux-gnuoldld) or
+		# one that does not give us useful --help.
+		echo "${UNAME_MACHINE}-pc-linux-gnuoldld"
+		exit ;;
+	esac
+	# Determine whether the default compiler is a.out or elf
+	eval $set_cc_for_build
+	sed 's/^	//' << EOF >$dummy.c
+	#include <features.h>
+	#ifdef __ELF__
+	# ifdef __GLIBC__
+	#  if __GLIBC__ >= 2
+	LIBC=gnu
+	#  else
+	LIBC=gnulibc1
+	#  endif
+	# else
+	LIBC=gnulibc1
+	# endif
+	#else
+	#if defined(__INTEL_COMPILER) || defined(__PGI) || defined(__SUNPRO_C) || defined(__SUNPRO_CC)
+	LIBC=gnu
+	#else
+	LIBC=gnuaout
+	#endif
+	#endif
+	#ifdef __dietlibc__
+	LIBC=dietlibc
+	#endif
+EOF
+	eval "`$CC_FOR_BUILD -E $dummy.c 2>/dev/null | sed -n '
+	    /^LIBC/{
+		s: ::g
+		p
+	    }'`"
+	test x"${LIBC}" != x && {
+		echo "${UNAME_MACHINE}-pc-linux-${LIBC}"
+		exit
+	}
+	test x"${TENTATIVE}" != x && { echo "${TENTATIVE}"; exit; }
+	;;
+    i*86:DYNIX/ptx:4*:*)
+	# ptx 4.0 does uname -s correctly, with DYNIX/ptx in there.
+	# earlier versions are messed up and put the nodename in both
+	# sysname and nodename.
+	echo i386-sequent-sysv4
+	exit ;;
+    i*86:UNIX_SV:4.2MP:2.*)
+        # Unixware is an offshoot of SVR4, but it has its own version
+        # number series starting with 2...
+        # I am not positive that other SVR4 systems won't match this,
+	# I just have to hope.  -- rms.
+        # Use sysv4.2uw... so that sysv4* matches it.
+	echo ${UNAME_MACHINE}-pc-sysv4.2uw${UNAME_VERSION}
+	exit ;;
+    i*86:OS/2:*:*)
+	# If we were able to find `uname', then EMX Unix compatibility
+	# is probably installed.
+	echo ${UNAME_MACHINE}-pc-os2-emx
+	exit ;;
+    i*86:XTS-300:*:STOP)
+	echo ${UNAME_MACHINE}-unknown-stop
+	exit ;;
+    i*86:atheos:*:*)
+	echo ${UNAME_MACHINE}-unknown-atheos
+	exit ;;
+    i*86:syllable:*:*)
+	echo ${UNAME_MACHINE}-pc-syllable
+	exit ;;
+    i*86:LynxOS:2.*:* | i*86:LynxOS:3.[01]*:* | i*86:LynxOS:4.0*:*)
+	echo i386-unknown-lynxos${UNAME_RELEASE}
+	exit ;;
+    i*86:*DOS:*:*)
+	echo ${UNAME_MACHINE}-pc-msdosdjgpp
+	exit ;;
+    i*86:*:4.*:* | i*86:SYSTEM_V:4.*:*)
+	UNAME_REL=`echo ${UNAME_RELEASE} | sed 's/\/MP$//'`
+	if grep Novell /usr/include/link.h >/dev/null 2>/dev/null; then
+		echo ${UNAME_MACHINE}-univel-sysv${UNAME_REL}
+	else
+		echo ${UNAME_MACHINE}-pc-sysv${UNAME_REL}
+	fi
+	exit ;;
+    i*86:*:5:[678]*)
+    	# UnixWare 7.x, OpenUNIX and OpenServer 6.
+	case `/bin/uname -X | grep "^Machine"` in
+	    *486*)	     UNAME_MACHINE=i486 ;;
+	    *Pentium)	     UNAME_MACHINE=i586 ;;
+	    *Pent*|*Celeron) UNAME_MACHINE=i686 ;;
+	esac
+	echo ${UNAME_MACHINE}-unknown-sysv${UNAME_RELEASE}${UNAME_SYSTEM}${UNAME_VERSION}
+	exit ;;
+    i*86:*:3.2:*)
+	if test -f /usr/options/cb.name; then
+		UNAME_REL=`sed -n 's/.*Version //p' </usr/options/cb.name`
+		echo ${UNAME_MACHINE}-pc-isc$UNAME_REL
+	elif /bin/uname -X 2>/dev/null >/dev/null ; then
+		UNAME_REL=`(/bin/uname -X|grep Release|sed -e 's/.*= //')`
+		(/bin/uname -X|grep i80486 >/dev/null) && UNAME_MACHINE=i486
+		(/bin/uname -X|grep '^Machine.*Pentium' >/dev/null) \
+			&& UNAME_MACHINE=i586
+		(/bin/uname -X|grep '^Machine.*Pent *II' >/dev/null) \
+			&& UNAME_MACHINE=i686
+		(/bin/uname -X|grep '^Machine.*Pentium Pro' >/dev/null) \
+			&& UNAME_MACHINE=i686
+		echo ${UNAME_MACHINE}-pc-sco$UNAME_REL
+	else
+		echo ${UNAME_MACHINE}-pc-sysv32
+	fi
+	exit ;;
+    pc:*:*:*)
+	# Left here for compatibility:
+        # uname -m prints for DJGPP always 'pc', but it prints nothing about
+        # the processor, so we play safe by assuming i586.
+	# Note: whatever this is, it MUST be the same as what config.sub
+	# prints for the "djgpp" host, or else GDB configury will decide that
+	# this is a cross-build.
+	echo i586-pc-msdosdjgpp
+        exit ;;
+    Intel:Mach:3*:*)
+	echo i386-pc-mach3
+	exit ;;
+    paragon:*:*:*)
+	echo i860-intel-osf1
+	exit ;;
+    i860:*:4.*:*) # i860-SVR4
+	if grep Stardent /usr/include/sys/uadmin.h >/dev/null 2>&1 ; then
+	  echo i860-stardent-sysv${UNAME_RELEASE} # Stardent Vistra i860-SVR4
+	else # Add other i860-SVR4 vendors below as they are discovered.
+	  echo i860-unknown-sysv${UNAME_RELEASE}  # Unknown i860-SVR4
+	fi
+	exit ;;
+    mini*:CTIX:SYS*5:*)
+	# "miniframe"
+	echo m68010-convergent-sysv
+	exit ;;
+    mc68k:UNIX:SYSTEM5:3.51m)
+	echo m68k-convergent-sysv
+	exit ;;
+    M680?0:D-NIX:5.3:*)
+	echo m68k-diab-dnix
+	exit ;;
+    M68*:*:R3V[5678]*:*)
+	test -r /sysV68 && { echo 'm68k-motorola-sysv'; exit; } ;;
+    3[345]??:*:4.0:3.0 | 3[34]??A:*:4.0:3.0 | 3[34]??,*:*:4.0:3.0 | 3[34]??/*:*:4.0:3.0 | 4400:*:4.0:3.0 | 4850:*:4.0:3.0 | SKA40:*:4.0:3.0 | SDS2:*:4.0:3.0 | SHG2:*:4.0:3.0 | S7501*:*:4.0:3.0)
+	OS_REL=''
+	test -r /etc/.relid \
+	&& OS_REL=.`sed -n 's/[^ ]* [^ ]* \([0-9][0-9]\).*/\1/p' < /etc/.relid`
+	/bin/uname -p 2>/dev/null | grep 86 >/dev/null \
+	  && { echo i486-ncr-sysv4.3${OS_REL}; exit; }
+	/bin/uname -p 2>/dev/null | /bin/grep entium >/dev/null \
+	  && { echo i586-ncr-sysv4.3${OS_REL}; exit; } ;;
+    3[34]??:*:4.0:* | 3[34]??,*:*:4.0:*)
+        /bin/uname -p 2>/dev/null | grep 86 >/dev/null \
+          && { echo i486-ncr-sysv4; exit; } ;;
+    NCR*:*:4.2:* | MPRAS*:*:4.2:*)
+	OS_REL='.3'
+	test -r /etc/.relid \
+	    && OS_REL=.`sed -n 's/[^ ]* [^ ]* \([0-9][0-9]\).*/\1/p' < /etc/.relid`
+	/bin/uname -p 2>/dev/null | grep 86 >/dev/null \
+	    && { echo i486-ncr-sysv4.3${OS_REL}; exit; }
+	/bin/uname -p 2>/dev/null | /bin/grep entium >/dev/null \
+	    && { echo i586-ncr-sysv4.3${OS_REL}; exit; }
+	/bin/uname -p 2>/dev/null | /bin/grep pteron >/dev/null \
+	    && { echo i586-ncr-sysv4.3${OS_REL}; exit; } ;;
+    m68*:LynxOS:2.*:* | m68*:LynxOS:3.0*:*)
+	echo m68k-unknown-lynxos${UNAME_RELEASE}
+	exit ;;
+    mc68030:UNIX_System_V:4.*:*)
+	echo m68k-atari-sysv4
+	exit ;;
+    TSUNAMI:LynxOS:2.*:*)
+	echo sparc-unknown-lynxos${UNAME_RELEASE}
+	exit ;;
+    rs6000:LynxOS:2.*:*)
+	echo rs6000-unknown-lynxos${UNAME_RELEASE}
+	exit ;;
+    PowerPC:LynxOS:2.*:* | PowerPC:LynxOS:3.[01]*:* | PowerPC:LynxOS:4.0*:*)
+	echo powerpc-unknown-lynxos${UNAME_RELEASE}
+	exit ;;
+    SM[BE]S:UNIX_SV:*:*)
+	echo mips-dde-sysv${UNAME_RELEASE}
+	exit ;;
+    RM*:ReliantUNIX-*:*:*)
+	echo mips-sni-sysv4
+	exit ;;
+    RM*:SINIX-*:*:*)
+	echo mips-sni-sysv4
+	exit ;;
+    *:SINIX-*:*:*)
+	if uname -p 2>/dev/null >/dev/null ; then
+		UNAME_MACHINE=`(uname -p) 2>/dev/null`
+		echo ${UNAME_MACHINE}-sni-sysv4
+	else
+		echo ns32k-sni-sysv
+	fi
+	exit ;;
+    PENTIUM:*:4.0*:*) # Unisys `ClearPath HMP IX 4000' SVR4/MP effort
+                      # says <Richard.M.Bartel@ccMail.Census.GOV>
+        echo i586-unisys-sysv4
+        exit ;;
+    *:UNIX_System_V:4*:FTX*)
+	# From Gerald Hewes <hewes@openmarket.com>.
+	# How about differentiating between stratus architectures? -djm
+	echo hppa1.1-stratus-sysv4
+	exit ;;
+    *:*:*:FTX*)
+	# From seanf@swdc.stratus.com.
+	echo i860-stratus-sysv4
+	exit ;;
+    i*86:VOS:*:*)
+	# From Paul.Green@stratus.com.
+	echo ${UNAME_MACHINE}-stratus-vos
+	exit ;;
+    *:VOS:*:*)
+	# From Paul.Green@stratus.com.
+	echo hppa1.1-stratus-vos
+	exit ;;
+    mc68*:A/UX:*:*)
+	echo m68k-apple-aux${UNAME_RELEASE}
+	exit ;;
+    news*:NEWS-OS:6*:*)
+	echo mips-sony-newsos6
+	exit ;;
+    R[34]000:*System_V*:*:* | R4000:UNIX_SYSV:*:* | R*000:UNIX_SV:*:*)
+	if [ -d /usr/nec ]; then
+	        echo mips-nec-sysv${UNAME_RELEASE}
+	else
+	        echo mips-unknown-sysv${UNAME_RELEASE}
+	fi
+        exit ;;
+    BeBox:BeOS:*:*)	# BeOS running on hardware made by Be, PPC only.
+	echo powerpc-be-beos
+	exit ;;
+    BeMac:BeOS:*:*)	# BeOS running on Mac or Mac clone, PPC only.
+	echo powerpc-apple-beos
+	exit ;;
+    BePC:BeOS:*:*)	# BeOS running on Intel PC compatible.
+	echo i586-pc-beos
+	exit ;;
+    BePC:Haiku:*:*)	# Haiku running on Intel PC compatible.
+	echo i586-pc-haiku
+	exit ;;
+    SX-4:SUPER-UX:*:*)
+	echo sx4-nec-superux${UNAME_RELEASE}
+	exit ;;
+    SX-5:SUPER-UX:*:*)
+	echo sx5-nec-superux${UNAME_RELEASE}
+	exit ;;
+    SX-6:SUPER-UX:*:*)
+	echo sx6-nec-superux${UNAME_RELEASE}
+	exit ;;
+    SX-7:SUPER-UX:*:*)
+	echo sx7-nec-superux${UNAME_RELEASE}
+	exit ;;
+    SX-8:SUPER-UX:*:*)
+	echo sx8-nec-superux${UNAME_RELEASE}
+	exit ;;
+    SX-8R:SUPER-UX:*:*)
+	echo sx8r-nec-superux${UNAME_RELEASE}
+	exit ;;
+    Power*:Rhapsody:*:*)
+	echo powerpc-apple-rhapsody${UNAME_RELEASE}
+	exit ;;
+    *:Rhapsody:*:*)
+	echo ${UNAME_MACHINE}-apple-rhapsody${UNAME_RELEASE}
+	exit ;;
+    *:Darwin:*:*)
+	UNAME_PROCESSOR=`uname -p` || UNAME_PROCESSOR=unknown
+	case $UNAME_PROCESSOR in
+	    unknown) UNAME_PROCESSOR=powerpc ;;
+	esac
+	echo ${UNAME_PROCESSOR}-apple-darwin${UNAME_RELEASE}
+	exit ;;
+    *:procnto*:*:* | *:QNX:[0123456789]*:*)
+	UNAME_PROCESSOR=`uname -p`
+	if test "$UNAME_PROCESSOR" = "x86"; then
+		UNAME_PROCESSOR=i386
+		UNAME_MACHINE=pc
+	fi
+	echo ${UNAME_PROCESSOR}-${UNAME_MACHINE}-nto-qnx${UNAME_RELEASE}
+	exit ;;
+    *:QNX:*:4*)
+	echo i386-pc-qnx
+	exit ;;
+    NSE-?:NONSTOP_KERNEL:*:*)
+	echo nse-tandem-nsk${UNAME_RELEASE}
+	exit ;;
+    NSR-?:NONSTOP_KERNEL:*:*)
+	echo nsr-tandem-nsk${UNAME_RELEASE}
+	exit ;;
+    *:NonStop-UX:*:*)
+	echo mips-compaq-nonstopux
+	exit ;;
+    BS2000:POSIX*:*:*)
+	echo bs2000-siemens-sysv
+	exit ;;
+    DS/*:UNIX_System_V:*:*)
+	echo ${UNAME_MACHINE}-${UNAME_SYSTEM}-${UNAME_RELEASE}
+	exit ;;
+    *:Plan9:*:*)
+	# "uname -m" is not consistent, so use $cputype instead. 386
+	# is converted to i386 for consistency with other x86
+	# operating systems.
+	if test "$cputype" = "386"; then
+	    UNAME_MACHINE=i386
+	else
+	    UNAME_MACHINE="$cputype"
+	fi
+	echo ${UNAME_MACHINE}-unknown-plan9
+	exit ;;
+    *:TOPS-10:*:*)
+	echo pdp10-unknown-tops10
+	exit ;;
+    *:TENEX:*:*)
+	echo pdp10-unknown-tenex
+	exit ;;
+    KS10:TOPS-20:*:* | KL10:TOPS-20:*:* | TYPE4:TOPS-20:*:*)
+	echo pdp10-dec-tops20
+	exit ;;
+    XKL-1:TOPS-20:*:* | TYPE5:TOPS-20:*:*)
+	echo pdp10-xkl-tops20
+	exit ;;
+    *:TOPS-20:*:*)
+	echo pdp10-unknown-tops20
+	exit ;;
+    *:ITS:*:*)
+	echo pdp10-unknown-its
+	exit ;;
+    SEI:*:*:SEIUX)
+        echo mips-sei-seiux${UNAME_RELEASE}
+	exit ;;
+    *:DragonFly:*:*)
+	echo ${UNAME_MACHINE}-unknown-dragonfly`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'`
+	exit ;;
+    *:*VMS:*:*)
+    	UNAME_MACHINE=`(uname -p) 2>/dev/null`
+	case "${UNAME_MACHINE}" in
+	    A*) echo alpha-dec-vms ; exit ;;
+	    I*) echo ia64-dec-vms ; exit ;;
+	    V*) echo vax-dec-vms ; exit ;;
+	esac ;;
+    *:XENIX:*:SysV)
+	echo i386-pc-xenix
+	exit ;;
+    i*86:skyos:*:*)
+	echo ${UNAME_MACHINE}-pc-skyos`echo ${UNAME_RELEASE}` | sed -e 's/ .*$//'
+	exit ;;
+    i*86:rdos:*:*)
+	echo ${UNAME_MACHINE}-pc-rdos
+	exit ;;
+    i*86:AROS:*:*)
+	echo ${UNAME_MACHINE}-pc-aros
+	exit ;;
+esac
+
+#echo '(No uname command or uname output not recognized.)' 1>&2
+#echo "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" 1>&2
+
+eval $set_cc_for_build
+cat >$dummy.c <<EOF
+#ifdef _SEQUENT_
+# include <sys/types.h>
+# include <sys/utsname.h>
+#endif
+main ()
+{
+#if defined (sony)
+#if defined (MIPSEB)
+  /* BFD wants "bsd" instead of "newsos".  Perhaps BFD should be changed,
+     I don't know....  */
+  printf ("mips-sony-bsd\n"); exit (0);
+#else
+#include <sys/param.h>
+  printf ("m68k-sony-newsos%s\n",
+#ifdef NEWSOS4
+          "4"
+#else
+	  ""
+#endif
+         ); exit (0);
+#endif
+#endif
+
+#if defined (__arm) && defined (__acorn) && defined (__unix)
+  printf ("arm-acorn-riscix\n"); exit (0);
+#endif
+
+#if defined (hp300) && !defined (hpux)
+  printf ("m68k-hp-bsd\n"); exit (0);
+#endif
+
+#if defined (NeXT)
+#if !defined (__ARCHITECTURE__)
+#define __ARCHITECTURE__ "m68k"
+#endif
+  int version;
+  version=`(hostinfo | sed -n 's/.*NeXT Mach \([0-9]*\).*/\1/p') 2>/dev/null`;
+  if (version < 4)
+    printf ("%s-next-nextstep%d\n", __ARCHITECTURE__, version);
+  else
+    printf ("%s-next-openstep%d\n", __ARCHITECTURE__, version);
+  exit (0);
+#endif
+
+#if defined (MULTIMAX) || defined (n16)
+#if defined (UMAXV)
+  printf ("ns32k-encore-sysv\n"); exit (0);
+#else
+#if defined (CMU)
+  printf ("ns32k-encore-mach\n"); exit (0);
+#else
+  printf ("ns32k-encore-bsd\n"); exit (0);
+#endif
+#endif
+#endif
+
+#if defined (__386BSD__)
+  printf ("i386-pc-bsd\n"); exit (0);
+#endif
+
+#if defined (sequent)
+#if defined (i386)
+  printf ("i386-sequent-dynix\n"); exit (0);
+#endif
+#if defined (ns32000)
+  printf ("ns32k-sequent-dynix\n"); exit (0);
+#endif
+#endif
+
+#if defined (_SEQUENT_)
+    struct utsname un;
+
+    uname(&un);
+
+    if (strncmp(un.version, "V2", 2) == 0) {
+	printf ("i386-sequent-ptx2\n"); exit (0);
+    }
+    if (strncmp(un.version, "V1", 2) == 0) { /* XXX is V1 correct? */
+	printf ("i386-sequent-ptx1\n"); exit (0);
+    }
+    printf ("i386-sequent-ptx\n"); exit (0);
+
+#endif
+
+#if defined (vax)
+# if !defined (ultrix)
+#  include <sys/param.h>
+#  if defined (BSD)
+#   if BSD == 43
+      printf ("vax-dec-bsd4.3\n"); exit (0);
+#   else
+#    if BSD == 199006
+      printf ("vax-dec-bsd4.3reno\n"); exit (0);
+#    else
+      printf ("vax-dec-bsd\n"); exit (0);
+#    endif
+#   endif
+#  else
+    printf ("vax-dec-bsd\n"); exit (0);
+#  endif
+# else
+    printf ("vax-dec-ultrix\n"); exit (0);
+# endif
+#endif
+
+#if defined (alliant) && defined (i860)
+  printf ("i860-alliant-bsd\n"); exit (0);
+#endif
+
+  exit (1);
+}
+EOF
+
+$CC_FOR_BUILD -o $dummy $dummy.c 2>/dev/null && SYSTEM_NAME=`$dummy` &&
+	{ echo "$SYSTEM_NAME"; exit; }
+
+# Apollos put the system type in the environment.
+
+test -d /usr/apollo && { echo ${ISP}-apollo-${SYSTYPE}; exit; }
+
+# Convex versions that predate uname can use getsysinfo(1)
+
+if [ -x /usr/convex/getsysinfo ]
+then
+    case `getsysinfo -f cpu_type` in
+    c1*)
+	echo c1-convex-bsd
+	exit ;;
+    c2*)
+	if getsysinfo -f scalar_acc
+	then echo c32-convex-bsd
+	else echo c2-convex-bsd
+	fi
+	exit ;;
+    c34*)
+	echo c34-convex-bsd
+	exit ;;
+    c38*)
+	echo c38-convex-bsd
+	exit ;;
+    c4*)
+	echo c4-convex-bsd
+	exit ;;
+    esac
+fi
+
+cat >&2 <<EOF
+$0: unable to guess system type
+
+This script, last modified $timestamp, has failed to recognize
+the operating system you are using. It is advised that you
+download the most up to date version of the config scripts from
+
+  http://git.savannah.gnu.org/gitweb/?p=config.git;a=blob_plain;f=config.guess;hb=HEAD
+and
+  http://git.savannah.gnu.org/gitweb/?p=config.git;a=blob_plain;f=config.sub;hb=HEAD
+
+If the version you run ($0) is already up to date, please
+send the following data and any information you think might be
+pertinent to <config-patches@gnu.org> in order to provide the needed
+information to handle your system.
+
+config.guess timestamp = $timestamp
+
+uname -m = `(uname -m) 2>/dev/null || echo unknown`
+uname -r = `(uname -r) 2>/dev/null || echo unknown`
+uname -s = `(uname -s) 2>/dev/null || echo unknown`
+uname -v = `(uname -v) 2>/dev/null || echo unknown`
+
+/usr/bin/uname -p = `(/usr/bin/uname -p) 2>/dev/null`
+/bin/uname -X     = `(/bin/uname -X) 2>/dev/null`
+
+hostinfo               = `(hostinfo) 2>/dev/null`
+/bin/universe          = `(/bin/universe) 2>/dev/null`
+/usr/bin/arch -k       = `(/usr/bin/arch -k) 2>/dev/null`
+/bin/arch              = `(/bin/arch) 2>/dev/null`
+/usr/bin/oslevel       = `(/usr/bin/oslevel) 2>/dev/null`
+/usr/convex/getsysinfo = `(/usr/convex/getsysinfo) 2>/dev/null`
+
+UNAME_MACHINE = ${UNAME_MACHINE}
+UNAME_RELEASE = ${UNAME_RELEASE}
+UNAME_SYSTEM  = ${UNAME_SYSTEM}
+UNAME_VERSION = ${UNAME_VERSION}
+EOF
+
+exit 1
+
+# Local variables:
+# eval: (add-hook 'write-file-hooks 'time-stamp)
+# time-stamp-start: "timestamp='"
+# time-stamp-format: "%:y-%02m-%02d"
+# time-stamp-end: "'"
+# End:
diff --git a/config.h.in b/config.h.in
new file mode 100644
index 0000000..218dcd8
--- /dev/null
+++ b/config.h.in
@@ -0,0 +1,259 @@
+/* config.h.in.  Generated from configure.in by autoheader.  */
+
+/* Define to 1 if you have the <Carbon/Carbon.h> header file. */
+#undef HAVE_CARBON_CARBON_H
+
+/* Define if you have the CoreAudio API */
+#undef HAVE_COREAUDIO
+
+/* Define to 1 if you have the <crt_externs.h> header file. */
+#undef HAVE_CRT_EXTERNS_H
+
+/* Defines if your system has the crypt function */
+#undef HAVE_CRYPT
+
+/* Define to 1 if you have the <dlfcn.h> header file. */
+#undef HAVE_DLFCN_H
+
+/* Define to 1 if you have the <inttypes.h> header file. */
+#undef HAVE_INTTYPES_H
+
+/* Define if you have libjpeg */
+#undef HAVE_LIBJPEG
+
+/* Define if you have libpng */
+#undef HAVE_LIBPNG
+
+/* Define if you have a working libpthread (will enable threaded code) */
+#undef HAVE_LIBPTHREAD
+
+/* Define if you have libz */
+#undef HAVE_LIBZ
+
+/* Define to 1 if you have the <memory.h> header file. */
+#undef HAVE_MEMORY_H
+
+/* Define if your system needs _NSGetEnviron to set up the environment */
+#undef HAVE_NSGETENVIRON
+
+/* Define if we can use ppbus for parallel port access */
+#undef HAVE_PPBUS
+
+/* Define if we can use ppdev for parallel port access */
+#undef HAVE_PPDEV
+
+/* Define if libreadline header is present. */
+#undef HAVE_READLINE
+
+/* Define if you have res_init */
+#undef HAVE_RES_INIT
+
+/* Define if you have the res_init prototype */
+#undef HAVE_RES_INIT_PROTO
+
+/* Define if you have a STL implementation by SGI */
+#undef HAVE_SGI_STL
+
+/* Define to 1 if you have the `snprintf' function. */
+#undef HAVE_SNPRINTF
+
+/* Define to 1 if you have the <stdint.h> header file. */
+#undef HAVE_STDINT_H
+
+/* Define to 1 if you have the <stdlib.h> header file. */
+#undef HAVE_STDLIB_H
+
+/* Define to 1 if you have the <strings.h> header file. */
+#undef HAVE_STRINGS_H
+
+/* Define to 1 if you have the <string.h> header file. */
+#undef HAVE_STRING_H
+
+/* Define if you have strlcat */
+#undef HAVE_STRLCAT
+
+/* Define if you have the strlcat prototype */
+#undef HAVE_STRLCAT_PROTO
+
+/* Define if you have strlcpy */
+#undef HAVE_STRLCPY
+
+/* Define if you have the strlcpy prototype */
+#undef HAVE_STRLCPY_PROTO
+
+/* Define to 1 if you have the <sys/bitypes.h> header file. */
+#undef HAVE_SYS_BITYPES_H
+
+/* Define to 1 if you have the <sys/stat.h> header file. */
+#undef HAVE_SYS_STAT_H
+
+/* Define to 1 if you have the <sys/types.h> header file. */
+#undef HAVE_SYS_TYPES_H
+
+/* Define to 1 if you have the <unistd.h> header file. */
+#undef HAVE_UNISTD_H
+
+/* Define if libusb is available */
+#undef HAVE_USB
+
+/* Define to 1 if you have the <usb.h> header file. */
+#undef HAVE_USB_H
+
+/* Define to 1 if you have the `vsnprintf' function. */
+#undef HAVE_VSNPRINTF
+
+/* Suffix for lib directories */
+#undef KDELIBSUFF
+
+/* libusb version */
+#undef LIBUSB_VERSION
+
+/* Name of package */
+#undef PACKAGE
+
+/* Define to the address where bug reports for this package should be sent. */
+#undef PACKAGE_BUGREPORT
+
+/* Define to the full name of this package. */
+#undef PACKAGE_NAME
+
+/* Define to the full name and version of this package. */
+#undef PACKAGE_STRING
+
+/* Define to the one symbol short name of this package. */
+#undef PACKAGE_TARNAME
+
+/* Define to the version of this package. */
+#undef PACKAGE_VERSION
+
+/* The size of `char *', as computed by sizeof. */
+#undef SIZEOF_CHAR_P
+
+/* The size of `int', as computed by sizeof. */
+#undef SIZEOF_INT
+
+/* The size of `long', as computed by sizeof. */
+#undef SIZEOF_LONG
+
+/* The size of `short', as computed by sizeof. */
+#undef SIZEOF_SHORT
+
+/* The size of `size_t', as computed by sizeof. */
+#undef SIZEOF_SIZE_T
+
+/* The size of `unsigned long', as computed by sizeof. */
+#undef SIZEOF_UNSIGNED_LONG
+
+/* Define to 1 if you have the ANSI C header files. */
+#undef STDC_HEADERS
+
+/* Version number of package */
+#undef VERSION
+
+/* Defined if compiling without arts */
+#undef WITHOUT_ARTS
+
+/* Define to 1 if your processor stores words with the most significant byte
+   first (like Motorola and SPARC, unlike Intel and VAX). */
+#undef WORDS_BIGENDIAN
+
+/*
+ * jpeg.h needs HAVE_BOOLEAN, when the system uses boolean in system
+ * headers and I'm too lazy to write a configure test as long as only
+ * unixware is related
+ */
+#ifdef _UNIXWARE
+#define HAVE_BOOLEAN
+#endif
+
+
+
+/*
+ * AIX defines FD_SET in terms of bzero, but fails to include <strings.h>
+ * that defines bzero.
+ */
+
+#if defined(_AIX)
+#include <strings.h>
+#endif
+
+
+
+#if defined(HAVE_NSGETENVIRON) && defined(HAVE_CRT_EXTERNS_H)
+# include <sys/time.h>
+# include <crt_externs.h>
+# define environ (*_NSGetEnviron())
+#endif
+
+
+
+#if !defined(HAVE_RES_INIT_PROTO)
+#ifdef __cplusplus
+extern "C" {
+#endif
+int res_init(void);
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+
+
+#if !defined(HAVE_STRLCAT_PROTO)
+#ifdef __cplusplus
+extern "C" {
+#endif
+unsigned long strlcat(char*, const char*, unsigned long);
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+
+
+#if !defined(HAVE_STRLCPY_PROTO)
+#ifdef __cplusplus
+extern "C" {
+#endif
+unsigned long strlcpy(char*, const char*, unsigned long);
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+
+
+/*
+ * On HP-UX, the declaration of vsnprintf() is needed every time !
+ */
+
+#if !defined(HAVE_VSNPRINTF) || defined(hpux)
+#if __STDC__
+#include <stdarg.h>
+#include <stdlib.h>
+#else
+#include <varargs.h>
+#endif
+#ifdef __cplusplus
+extern "C"
+#endif
+int vsnprintf(char *str, size_t n, char const *fmt, va_list ap);
+#ifdef __cplusplus
+extern "C"
+#endif
+int snprintf(char *str, size_t n, char const *fmt, ...);
+#endif
+
+
+
+#if defined(__SVR4) && !defined(__svr4__)
+#define __svr4__ 1
+#endif
+
+
+/* type to use in place of socklen_t if not defined */
+#undef kde_socklen_t
+
+/* type to use in place of socklen_t if not defined (deprecated, use
+   kde_socklen_t) */
+#undef ksize_t
diff --git a/config.log b/config.log
new file mode 100644
index 0000000..39e499c
--- /dev/null
+++ b/config.log
@@ -0,0 +1,379 @@
+This file contains any messages produced by compilers while
+running configure, to aid debugging if configure makes a mistake.
+
+It was created by configure, which was
+generated by GNU Autoconf 2.61.  Invocation command line was
+
+  $ ./configure CFLAGS=-Wall -g -O2 LDFLAGS=-Wl,-z,defs -Wl,--as-needed --host=x86_64-linux-gnu --build=x86_64-linux-gnu --prefix=/opt/kde3 --with-extra-libs=/opt/kde3/lib --with-extra-includes=/opt/kde3/include/kde --mandir=/opt/kde3/share/man --infodir=/opt/kde3/share/info --enable-rpath
+
+## --------- ##
+## Platform. ##
+## --------- ##
+
+hostname = argus4
+uname -m = x86_64
+uname -r = 2.6.31-16-generic
+uname -s = Linux
+uname -v = #53-Ubuntu SMP Tue Dec 8 04:02:15 UTC 2009
+
+/usr/bin/uname -p = unknown
+/bin/uname -X     = unknown
+
+/bin/arch              = unknown
+/usr/bin/arch -k       = unknown
+/usr/convex/getsysinfo = unknown
+/usr/bin/hostinfo      = unknown
+/bin/machine           = unknown
+/usr/bin/oslevel       = unknown
+/bin/universe          = unknown
+
+PATH: /opt/kde3/bin
+PATH: /opt/kde3/games
+PATH: /opt/kde3/bin
+PATH: /home/eldarion/bin
+PATH: /usr/local/sbin
+PATH: /usr/local/bin
+PATH: /usr/sbin
+PATH: /usr/bin
+PATH: /sbin
+PATH: /bin
+PATH: /usr/games
+
+
+## ----------- ##
+## Core tests. ##
+## ----------- ##
+
+configure:2156: checking build system type
+configure:2174: result: x86_64-pc-linux-gnu
+configure:2196: checking host system type
+configure:2211: result: x86_64-pc-linux-gnu
+configure:2233: checking target system type
+configure:2248: result: x86_64-pc-linux-gnu
+configure:2309: checking for a BSD-compatible install
+configure:2365: result: /usr/bin/install -c
+configure:2380: checking for -p flag to install
+configure:2393: result: yes
+configure:2404: checking whether build environment is sane
+
+## ---------------- ##
+## Cache variables. ##
+## ---------------- ##
+
+ac_cv_build=x86_64-pc-linux-gnu
+ac_cv_env_CCC_set=
+ac_cv_env_CCC_value=
+ac_cv_env_CC_set=
+ac_cv_env_CC_value=
+ac_cv_env_CFLAGS_set=set
+ac_cv_env_CFLAGS_value='-Wall -g -O2'
+ac_cv_env_CPPFLAGS_set=set
+ac_cv_env_CPPFLAGS_value=
+ac_cv_env_CPP_set=
+ac_cv_env_CPP_value=
+ac_cv_env_CXXCPP_set=
+ac_cv_env_CXXCPP_value=
+ac_cv_env_CXXFLAGS_set=set
+ac_cv_env_CXXFLAGS_value='-g -O2'
+ac_cv_env_CXX_set=
+ac_cv_env_CXX_value=
+ac_cv_env_F77_set=
+ac_cv_env_F77_value=
+ac_cv_env_FFLAGS_set=set
+ac_cv_env_FFLAGS_value='-g -O2'
+ac_cv_env_LDFLAGS_set=set
+ac_cv_env_LDFLAGS_value='-Wl,-z,defs -Wl,--as-needed'
+ac_cv_env_LIBS_set=
+ac_cv_env_LIBS_value=
+ac_cv_env_XMKMF_set=
+ac_cv_env_XMKMF_value=
+ac_cv_env_build_alias_set=set
+ac_cv_env_build_alias_value=x86_64-linux-gnu
+ac_cv_env_host_alias_set=set
+ac_cv_env_host_alias_value=x86_64-linux-gnu
+ac_cv_env_target_alias_set=
+ac_cv_env_target_alias_value=
+ac_cv_host=x86_64-pc-linux-gnu
+ac_cv_path_install='/usr/bin/install -c'
+ac_cv_target=x86_64-pc-linux-gnu
+
+## ----------------- ##
+## Output variables. ##
+## ----------------- ##
+
+ACLOCAL=''
+AMDEPBACKSLASH=''
+AMDEP_FALSE=''
+AMDEP_TRUE=''
+AMTAR=''
+AR=''
+ARTSCCONFIG=''
+AUTOCONF=''
+AUTODIRS=''
+AUTOHEADER=''
+AUTOMAKE=''
+AWK=''
+BSD_FALSE=''
+BSD_TRUE=''
+CC=''
+CCDEPMODE=''
+CFLAGS='-Wall -g -O2'
+CONF_FILES=''
+CPP=''
+CPPFLAGS=''
+CXX=''
+CXXCPP=''
+CXXDEPMODE=''
+CXXFLAGS='-g -O2'
+CYGPATH_W=''
+DCOPIDL2CPP=''
+DCOPIDL=''
+DCOPIDLNG=''
+DCOP_DEPENDENCIES=''
+DEFS=''
+DEPDIR=''
+ECHO='echo'
+ECHO_C=''
+ECHO_N='-n'
+ECHO_T=''
+EGREP=''
+ENABLE_PERMISSIVE_FLAG=''
+EXEEXT=''
+F77=''
+FFLAGS='-g -O2'
+FRAMEWORK_COREAUDIO=''
+GMSGFMT=''
+GREP=''
+HAVE_GCC_VISIBILITY=''
+INSTALL_DATA='${INSTALL} -m 644'
+INSTALL_PROGRAM='${INSTALL} $(INSTALL_STRIP_FLAG)'
+INSTALL_SCRIPT='${INSTALL}'
+INSTALL_STRIP_PROGRAM=''
+KCFG_DEPENDENCIES=''
+KCONFIG_COMPILER=''
+KDECONFIG=''
+KDE_CHECK_PLUGIN=''
+KDE_EXTRA_RPATH=''
+KDE_INCLUDES=''
+KDE_LDFLAGS=''
+KDE_MT_LDFLAGS=''
+KDE_MT_LIBS=''
+KDE_NO_UNDEFINED=''
+KDE_PLUGIN=''
+KDE_RPATH=''
+KDE_USE_CLOSURE_FALSE=''
+KDE_USE_CLOSURE_TRUE=''
+KDE_USE_FINAL_FALSE=''
+KDE_USE_FINAL_TRUE=''
+KDE_USE_FPIE=''
+KDE_USE_NMCHECK_FALSE=''
+KDE_USE_NMCHECK_TRUE=''
+KDE_USE_PIE=''
+KDE_XSL_STYLESHEET=''
+LDFLAGS='-Wl,-z,defs -Wl,--as-needed'
+LDFLAGS_AS_NEEDED=''
+LDFLAGS_NEW_DTAGS=''
+LIBCOMPAT=''
+LIBCRYPT=''
+LIBDL=''
+LIBJPEG=''
+LIBOBJS=''
+LIBPNG=''
+LIBPTHREAD=''
+LIBREADLINE_LIBS=''
+LIBRESOLV=''
+LIBS=''
+LIBSM=''
+LIBSOCKET=''
+LIBTOOL=''
+LIBUCB=''
+LIBUSBCONFIG=''
+LIBUSB_CFLAGS=''
+LIBUSB_LIBS=''
+LIBUTIL=''
+LIBZ=''
+LIB_KAB=''
+LIB_KABC=''
+LIB_KDECORE=''
+LIB_KDED=''
+LIB_KDEPIM=''
+LIB_KDEPRINT=''
+LIB_KDEUI=''
+LIB_KDNSSD=''
+LIB_KFILE=''
+LIB_KFM=''
+LIB_KHTML=''
+LIB_KIMPROXY=''
+LIB_KIO=''
+LIB_KJS=''
+LIB_KNEWSTUFF=''
+LIB_KPARTS=''
+LIB_KSPELL=''
+LIB_KSYCOCA=''
+LIB_KUNITTEST=''
+LIB_KUTILS=''
+LIB_POLL=''
+LIB_QPE=''
+LIB_QT=''
+LIB_SMB=''
+LIB_X11=''
+LIB_XEXT=''
+LIB_XRENDER=''
+LINUX_FALSE=''
+LINUX_TRUE=''
+LN_S=''
+LTLIBOBJS=''
+MAKEINFO=''
+MAKEKDEWIDGETS=''
+MCOPIDL=''
+MEINPROC=''
+MOC=''
+MSGFMT=''
+NOOPT_CFLAGS=''
+NOOPT_CXXFLAGS=''
+NULL_FALSE=''
+NULL_TRUE=''
+OBJEXT=''
+PACKAGE=''
+PACKAGE_BUGREPORT=''
+PACKAGE_NAME=''
+PACKAGE_STRING=''
+PACKAGE_TARNAME=''
+PACKAGE_VERSION=''
+PATH_SEPARATOR=':'
+PERL=''
+QTE_NORTTI=''
+QT_INCLUDES=''
+QT_LDFLAGS=''
+RANLIB=''
+SET_MAKE=''
+SHELL='/bin/bash'
+STRIP=''
+TOPSUBDIRS=''
+UIC=''
+UIC_TR=''
+USER_INCLUDES=''
+USER_LDFLAGS=''
+USE_EXCEPTIONS=''
+USE_RTTI=''
+USE_THREADS=''
+VERSION=''
+WOVERLOADED_VIRTUAL=''
+XGETTEXT=''
+XMKMF=''
+XMLLINT=''
+X_EXTRA_LIBS=''
+X_INCLUDES=''
+X_LDFLAGS=''
+X_PRE_LIBS=''
+X_RPATH=''
+ac_ct_CC=''
+ac_ct_CXX=''
+ac_ct_F77=''
+all_includes=''
+all_libraries=''
+am__fastdepCC_FALSE=''
+am__fastdepCC_TRUE=''
+am__fastdepCXX_FALSE=''
+am__fastdepCXX_TRUE=''
+am__include=''
+am__leading_dot=''
+am__quote=''
+am__tar=''
+am__untar=''
+bindir='${exec_prefix}/bin'
+build='x86_64-pc-linux-gnu'
+build_alias='x86_64-linux-gnu'
+build_cpu='x86_64'
+build_os='linux-gnu'
+build_vendor='pc'
+datadir='${datarootdir}'
+datarootdir='${prefix}/share'
+doc_SUBDIR_included_FALSE=''
+doc_SUBDIR_included_TRUE=''
+docdir='${datarootdir}/doc/${PACKAGE}'
+dvidir='${docdir}'
+exec_prefix='NONE'
+host='x86_64-pc-linux-gnu'
+host_alias='x86_64-linux-gnu'
+host_cpu='x86_64'
+host_os='linux-gnu'
+host_vendor='pc'
+htmldir='${docdir}'
+include_ARTS_FALSE=''
+include_ARTS_TRUE=''
+include_x11_FALSE=''
+include_x11_TRUE=''
+includedir='${prefix}/include'
+infodir='/opt/kde3/share/info'
+install_sh=''
+kde_appsdir=''
+kde_bindir=''
+kde_confdir=''
+kde_datadir=''
+kde_htmldir=''
+kde_icondir=''
+kde_includes=''
+kde_kcfgdir=''
+kde_libraries=''
+kde_libs_htmldir=''
+kde_libs_prefix=''
+kde_locale=''
+kde_mimedir=''
+kde_moduledir=''
+kde_qtver=''
+kde_servicesdir=''
+kde_servicetypesdir=''
+kde_sounddir=''
+kde_styledir=''
+kde_templatesdir=''
+kde_wallpaperdir=''
+kde_widgetdir=''
+kdeinitdir=''
+libdir='${exec_prefix}/lib'
+libexecdir='${exec_prefix}/libexec'
+localedir='${datarootdir}/locale'
+localstatedir='${prefix}/var'
+man_SUBDIR_included_FALSE=''
+man_SUBDIR_included_TRUE=''
+mandir='/opt/kde3/share/man'
+mkdir_p=''
+oldincludedir='/usr/include'
+pdfdir='${docdir}'
+po_SUBDIR_included_FALSE=''
+po_SUBDIR_included_TRUE=''
+prefix='/opt/kde3'
+program_transform_name='s,x,x,'
+psdir='${docdir}'
+qt_includes=''
+qt_libraries=''
+sbindir='${exec_prefix}/sbin'
+sharedstatedir='${prefix}/com'
+src_SUBDIR_included_FALSE=''
+src_SUBDIR_included_TRUE=''
+sysconfdir='${prefix}/etc'
+target='x86_64-pc-linux-gnu'
+target_alias=''
+target_cpu='x86_64'
+target_os='linux-gnu'
+target_vendor='pc'
+unsermake_enable_pch_FALSE=''
+unsermake_enable_pch_TRUE=''
+x_includes='NONE'
+x_libraries='NONE'
+xdg_appsdir=''
+xdg_directorydir=''
+xdg_menudir=''
+
+## ----------- ##
+## confdefs.h. ##
+## ----------- ##
+
+#define PACKAGE_NAME ""
+#define PACKAGE_TARNAME ""
+#define PACKAGE_VERSION ""
+#define PACKAGE_STRING ""
+#define PACKAGE_BUGREPORT ""
+
+configure: caught signal 2
+configure: exit 1
diff --git a/config.sub b/config.sub
new file mode 100755
index 0000000..a39437d
--- /dev/null
+++ b/config.sub
@@ -0,0 +1,1686 @@
+#! /bin/sh
+# Configuration validation subroutine script.
+#   Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+#   2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
+#   Free Software Foundation, Inc.
+
+timestamp='2009-04-17'
+
+# This file is (in principle) common to ALL GNU software.
+# The presence of a machine in this file suggests that SOME GNU software
+# can handle that machine.  It does not imply ALL GNU software can.
+#
+# This file is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
+# 02110-1301, USA.
+#
+# As a special exception to the GNU General Public License, if you
+# distribute this file as part of a program that contains a
+# configuration script generated by Autoconf, you may include it under
+# the same distribution terms that you use for the rest of that program.
+
+
+# Please send patches to <config-patches@gnu.org>.  Submit a context
+# diff and a properly formatted ChangeLog entry.
+#
+# Configuration subroutine to validate and canonicalize a configuration type.
+# Supply the specified configuration type as an argument.
+# If it is invalid, we print an error message on stderr and exit with code 1.
+# Otherwise, we print the canonical config type on stdout and succeed.
+
+# This file is supposed to be the same for all GNU packages
+# and recognize all the CPU types, system types and aliases
+# that are meaningful with *any* GNU software.
+# Each package is responsible for reporting which valid configurations
+# it does not support.  The user should be able to distinguish
+# a failure to support a valid configuration from a meaningless
+# configuration.
+
+# The goal of this file is to map all the various variations of a given
+# machine specification into a single specification in the form:
+#	CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM
+# or in some cases, the newer four-part form:
+#	CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM
+# It is wrong to echo any other type of specification.
+
+me=`echo "$0" | sed -e 's,.*/,,'`
+
+usage="\
+Usage: $0 [OPTION] CPU-MFR-OPSYS
+       $0 [OPTION] ALIAS
+
+Canonicalize a configuration name.
+
+Operation modes:
+  -h, --help         print this help, then exit
+  -t, --time-stamp   print date of last modification, then exit
+  -v, --version      print version number, then exit
+
+Report bugs and patches to <config-patches@gnu.org>."
+
+version="\
+GNU config.sub ($timestamp)
+
+Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
+2002, 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+
+This is free software; see the source for copying conditions.  There is NO
+warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE."
+
+help="
+Try \`$me --help' for more information."
+
+# Parse command line
+while test $# -gt 0 ; do
+  case $1 in
+    --time-stamp | --time* | -t )
+       echo "$timestamp" ; exit ;;
+    --version | -v )
+       echo "$version" ; exit ;;
+    --help | --h* | -h )
+       echo "$usage"; exit ;;
+    -- )     # Stop option processing
+       shift; break ;;
+    - )	# Use stdin as input.
+       break ;;
+    -* )
+       echo "$me: invalid option $1$help"
+       exit 1 ;;
+
+    *local*)
+       # First pass through any local machine types.
+       echo $1
+       exit ;;
+
+    * )
+       break ;;
+  esac
+done
+
+case $# in
+ 0) echo "$me: missing argument$help" >&2
+    exit 1;;
+ 1) ;;
+ *) echo "$me: too many arguments$help" >&2
+    exit 1;;
+esac
+
+# Separate what the user gave into CPU-COMPANY and OS or KERNEL-OS (if any).
+# Here we must recognize all the valid KERNEL-OS combinations.
+maybe_os=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\2/'`
+case $maybe_os in
+  nto-qnx* | linux-gnu* | linux-dietlibc | linux-newlib* | linux-uclibc* | \
+  uclinux-uclibc* | uclinux-gnu* | kfreebsd*-gnu* | knetbsd*-gnu* | netbsd*-gnu* | \
+  kopensolaris*-gnu* | \
+  storm-chaos* | os2-emx* | rtmk-nova*)
+    os=-$maybe_os
+    basic_machine=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\1/'`
+    ;;
+  *)
+    basic_machine=`echo $1 | sed 's/-[^-]*$//'`
+    if [ $basic_machine != $1 ]
+    then os=`echo $1 | sed 's/.*-/-/'`
+    else os=; fi
+    ;;
+esac
+
+### Let's recognize common machines as not being operating systems so
+### that things like config.sub decstation-3100 work.  We also
+### recognize some manufacturers as not being operating systems, so we
+### can provide default operating systems below.
+case $os in
+	-sun*os*)
+		# Prevent following clause from handling this invalid input.
+		;;
+	-dec* | -mips* | -sequent* | -encore* | -pc532* | -sgi* | -sony* | \
+	-att* | -7300* | -3300* | -delta* | -motorola* | -sun[234]* | \
+	-unicom* | -ibm* | -next | -hp | -isi* | -apollo | -altos* | \
+	-convergent* | -ncr* | -news | -32* | -3600* | -3100* | -hitachi* |\
+	-c[123]* | -convex* | -sun | -crds | -omron* | -dg | -ultra | -tti* | \
+	-harris | -dolphin | -highlevel | -gould | -cbm | -ns | -masscomp | \
+	-apple | -axis | -knuth | -cray)
+		os=
+		basic_machine=$1
+		;;
+	-sim | -cisco | -oki | -wec | -winbond)
+		os=
+		basic_machine=$1
+		;;
+	-scout)
+		;;
+	-wrs)
+		os=-vxworks
+		basic_machine=$1
+		;;
+	-chorusos*)
+		os=-chorusos
+		basic_machine=$1
+		;;
+ 	-chorusrdb)
+ 		os=-chorusrdb
+		basic_machine=$1
+ 		;;
+	-hiux*)
+		os=-hiuxwe2
+		;;
+	-sco6)
+		os=-sco5v6
+		basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+		;;
+	-sco5)
+		os=-sco3.2v5
+		basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+		;;
+	-sco4)
+		os=-sco3.2v4
+		basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+		;;
+	-sco3.2.[4-9]*)
+		os=`echo $os | sed -e 's/sco3.2./sco3.2v/'`
+		basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+		;;
+	-sco3.2v[4-9]*)
+		# Don't forget version if it is 3.2v4 or newer.
+		basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+		;;
+	-sco5v6*)
+		# Don't forget version if it is 3.2v4 or newer.
+		basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+		;;
+	-sco*)
+		os=-sco3.2v2
+		basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+		;;
+	-udk*)
+		basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+		;;
+	-isc)
+		os=-isc2.2
+		basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+		;;
+	-clix*)
+		basic_machine=clipper-intergraph
+		;;
+	-isc*)
+		basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+		;;
+	-lynx*)
+		os=-lynxos
+		;;
+	-ptx*)
+		basic_machine=`echo $1 | sed -e 's/86-.*/86-sequent/'`
+		;;
+	-windowsnt*)
+		os=`echo $os | sed -e 's/windowsnt/winnt/'`
+		;;
+	-psos*)
+		os=-psos
+		;;
+	-mint | -mint[0-9]*)
+		basic_machine=m68k-atari
+		os=-mint
+		;;
+esac
+
+# Decode aliases for certain CPU-COMPANY combinations.
+case $basic_machine in
+	# Recognize the basic CPU types without company name.
+	# Some are omitted here because they have special meanings below.
+	1750a | 580 \
+	| a29k \
+	| alpha | alphaev[4-8] | alphaev56 | alphaev6[78] | alphapca5[67] \
+	| alpha64 | alpha64ev[4-8] | alpha64ev56 | alpha64ev6[78] | alpha64pca5[67] \
+	| am33_2.0 \
+	| arc | arm | arm[bl]e | arme[lb] | armv[2345] | armv[345][lb] | avr | avr32 \
+	| bfin \
+	| c4x | clipper \
+	| d10v | d30v | dlx | dsp16xx \
+	| fido | fr30 | frv \
+	| h8300 | h8500 | hppa | hppa1.[01] | hppa2.0 | hppa2.0[nw] | hppa64 \
+	| i370 | i860 | i960 | ia64 \
+	| ip2k | iq2000 \
+	| lm32 \
+	| m32c | m32r | m32rle | m68000 | m68k | m88k \
+	| maxq | mb | microblaze | mcore | mep | metag \
+	| mips | mipsbe | mipseb | mipsel | mipsle \
+	| mips16 \
+	| mips64 | mips64el \
+	| mips64octeon | mips64octeonel \
+	| mips64orion | mips64orionel \
+	| mips64r5900 | mips64r5900el \
+	| mips64vr | mips64vrel \
+	| mips64vr4100 | mips64vr4100el \
+	| mips64vr4300 | mips64vr4300el \
+	| mips64vr5000 | mips64vr5000el \
+	| mips64vr5900 | mips64vr5900el \
+	| mipsisa32 | mipsisa32el \
+	| mipsisa32r2 | mipsisa32r2el \
+	| mipsisa64 | mipsisa64el \
+	| mipsisa64r2 | mipsisa64r2el \
+	| mipsisa64sb1 | mipsisa64sb1el \
+	| mipsisa64sr71k | mipsisa64sr71kel \
+	| mipstx39 | mipstx39el \
+	| mn10200 | mn10300 \
+	| moxie \
+	| mt \
+	| msp430 \
+	| nios | nios2 \
+	| ns16k | ns32k \
+	| or32 \
+	| pdp10 | pdp11 | pj | pjl \
+	| powerpc | powerpc64 | powerpc64le | powerpcle | ppcbe \
+	| pyramid \
+	| score \
+	| sh | sh[1234] | sh[24]a | sh[24]aeb | sh[23]e | sh[34]eb | sheb | shbe | shle | sh[1234]le | sh3ele \
+	| sh64 | sh64le \
+	| sparc | sparc64 | sparc64b | sparc64v | sparc86x | sparclet | sparclite \
+	| sparcv8 | sparcv9 | sparcv9b | sparcv9v \
+	| spu | strongarm \
+	| tahoe | thumb | tic4x | tic80 | tron \
+	| v850 | v850e \
+	| we32k \
+	| x86 | xc16x | xscale | xscalee[bl] | xstormy16 | xtensa \
+	| z8k | z80)
+		basic_machine=$basic_machine-unknown
+		;;
+	m6811 | m68hc11 | m6812 | m68hc12)
+		# Motorola 68HC11/12.
+		basic_machine=$basic_machine-unknown
+		os=-none
+		;;
+	m88110 | m680[12346]0 | m683?2 | m68360 | m5200 | v70 | w65 | z8k)
+		;;
+	ms1)
+		basic_machine=mt-unknown
+		;;
+
+	# We use `pc' rather than `unknown'
+	# because (1) that's what they normally are, and
+	# (2) the word "unknown" tends to confuse beginning users.
+	i*86 | x86_64)
+	  basic_machine=$basic_machine-pc
+	  ;;
+	# Object if more than one company name word.
+	*-*-*)
+		echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2
+		exit 1
+		;;
+	# Recognize the basic CPU types with company name.
+	580-* \
+	| a29k-* \
+	| alpha-* | alphaev[4-8]-* | alphaev56-* | alphaev6[78]-* \
+	| alpha64-* | alpha64ev[4-8]-* | alpha64ev56-* | alpha64ev6[78]-* \
+	| alphapca5[67]-* | alpha64pca5[67]-* | arc-* \
+	| arm-*  | armbe-* | armle-* | armeb-* | armv*-* \
+	| avr-* | avr32-* \
+	| bfin-* | bs2000-* \
+	| c[123]* | c30-* | [cjt]90-* | c4x-* | c54x-* | c55x-* | c6x-* \
+	| clipper-* | craynv-* | cydra-* \
+	| d10v-* | d30v-* | dlx-* \
+	| elxsi-* \
+	| f30[01]-* | f700-* | fido-* | fr30-* | frv-* | fx80-* \
+	| h8300-* | h8500-* \
+	| hppa-* | hppa1.[01]-* | hppa2.0-* | hppa2.0[nw]-* | hppa64-* \
+	| i*86-* | i860-* | i960-* | ia64-* \
+	| ip2k-* | iq2000-* \
+	| lm32-* \
+	| m32c-* | m32r-* | m32rle-* \
+	| m68000-* | m680[012346]0-* | m68360-* | m683?2-* | m68k-* \
+	| m88110-* | m88k-* | maxq-* | mcore-* | metag-* \
+	| mips-* | mipsbe-* | mipseb-* | mipsel-* | mipsle-* \
+	| mips16-* \
+	| mips64-* | mips64el-* \
+	| mips64octeon-* | mips64octeonel-* \
+	| mips64orion-* | mips64orionel-* \
+	| mips64r5900-* | mips64r5900el-* \
+	| mips64vr-* | mips64vrel-* \
+	| mips64vr4100-* | mips64vr4100el-* \
+	| mips64vr4300-* | mips64vr4300el-* \
+	| mips64vr5000-* | mips64vr5000el-* \
+	| mips64vr5900-* | mips64vr5900el-* \
+	| mipsisa32-* | mipsisa32el-* \
+	| mipsisa32r2-* | mipsisa32r2el-* \
+	| mipsisa64-* | mipsisa64el-* \
+	| mipsisa64r2-* | mipsisa64r2el-* \
+	| mipsisa64sb1-* | mipsisa64sb1el-* \
+	| mipsisa64sr71k-* | mipsisa64sr71kel-* \
+	| mipstx39-* | mipstx39el-* \
+	| mmix-* \
+	| mt-* \
+	| msp430-* \
+	| nios-* | nios2-* \
+	| none-* | np1-* | ns16k-* | ns32k-* \
+	| orion-* \
+	| pdp10-* | pdp11-* | pj-* | pjl-* | pn-* | power-* \
+	| powerpc-* | powerpc64-* | powerpc64le-* | powerpcle-* | ppcbe-* \
+	| pyramid-* \
+	| romp-* | rs6000-* \
+	| sh-* | sh[1234]-* | sh[24]a-* | sh[24]aeb-* | sh[23]e-* | sh[34]eb-* | sheb-* | shbe-* \
+	| shle-* | sh[1234]le-* | sh3ele-* | sh64-* | sh64le-* \
+	| sparc-* | sparc64-* | sparc64b-* | sparc64v-* | sparc86x-* | sparclet-* \
+	| sparclite-* \
+	| sparcv8-* | sparcv9-* | sparcv9b-* | sparcv9v-* | strongarm-* | sv1-* | sx?-* \
+	| tahoe-* | thumb-* \
+	| tic30-* | tic4x-* | tic54x-* | tic55x-* | tic6x-* | tic80-* | tile-* \
+	| tron-* \
+	| v850-* | v850e-* | vax-* \
+	| we32k-* \
+	| x86-* | x86_64-* | xc16x-* | xps100-* | xscale-* | xscalee[bl]-* \
+	| xstormy16-* | xtensa*-* \
+	| ymp-* \
+	| z8k-* | z80-*)
+		;;
+	# Recognize the basic CPU types without company name, with glob match.
+	xtensa*)
+		basic_machine=$basic_machine-unknown
+		;;
+	# Recognize the various machine names and aliases which stand
+	# for a CPU type and a company and sometimes even an OS.
+	386bsd)
+		basic_machine=i386-unknown
+		os=-bsd
+		;;
+	3b1 | 7300 | 7300-att | att-7300 | pc7300 | safari | unixpc)
+		basic_machine=m68000-att
+		;;
+	3b*)
+		basic_machine=we32k-att
+		;;
+	a29khif)
+		basic_machine=a29k-amd
+		os=-udi
+		;;
+    	abacus)
+		basic_machine=abacus-unknown
+		;;
+	adobe68k)
+		basic_machine=m68010-adobe
+		os=-scout
+		;;
+	alliant | fx80)
+		basic_machine=fx80-alliant
+		;;
+	altos | altos3068)
+		basic_machine=m68k-altos
+		;;
+	am29k)
+		basic_machine=a29k-none
+		os=-bsd
+		;;
+	amd64)
+		basic_machine=x86_64-pc
+		;;
+	amd64-*)
+		basic_machine=x86_64-`echo $basic_machine | sed 's/^[^-]*-//'`
+		;;
+	amdahl)
+		basic_machine=580-amdahl
+		os=-sysv
+		;;
+	amiga | amiga-*)
+		basic_machine=m68k-unknown
+		;;
+	amigaos | amigados)
+		basic_machine=m68k-unknown
+		os=-amigaos
+		;;
+	amigaunix | amix)
+		basic_machine=m68k-unknown
+		os=-sysv4
+		;;
+	apollo68)
+		basic_machine=m68k-apollo
+		os=-sysv
+		;;
+	apollo68bsd)
+		basic_machine=m68k-apollo
+		os=-bsd
+		;;
+	aros)
+		basic_machine=i386-pc
+		os=-aros
+		;;
+	aux)
+		basic_machine=m68k-apple
+		os=-aux
+		;;
+	balance)
+		basic_machine=ns32k-sequent
+		os=-dynix
+		;;
+	blackfin)
+		basic_machine=bfin-unknown
+		os=-linux
+		;;
+	blackfin-*)
+		basic_machine=bfin-`echo $basic_machine | sed 's/^[^-]*-//'`
+		os=-linux
+		;;
+	c90)
+		basic_machine=c90-cray
+		os=-unicos
+		;;
+        cegcc)
+		basic_machine=arm-unknown
+		os=-cegcc
+		;;
+	convex-c1)
+		basic_machine=c1-convex
+		os=-bsd
+		;;
+	convex-c2)
+		basic_machine=c2-convex
+		os=-bsd
+		;;
+	convex-c32)
+		basic_machine=c32-convex
+		os=-bsd
+		;;
+	convex-c34)
+		basic_machine=c34-convex
+		os=-bsd
+		;;
+	convex-c38)
+		basic_machine=c38-convex
+		os=-bsd
+		;;
+	cray | j90)
+		basic_machine=j90-cray
+		os=-unicos
+		;;
+	craynv)
+		basic_machine=craynv-cray
+		os=-unicosmp
+		;;
+	cr16)
+		basic_machine=cr16-unknown
+		os=-elf
+		;;
+	crds | unos)
+		basic_machine=m68k-crds
+		;;
+	crisv32 | crisv32-* | etraxfs*)
+		basic_machine=crisv32-axis
+		;;
+	cris | cris-* | etrax*)
+		basic_machine=cris-axis
+		;;
+	crx)
+		basic_machine=crx-unknown
+		os=-elf
+		;;
+	da30 | da30-*)
+		basic_machine=m68k-da30
+		;;
+	decstation | decstation-3100 | pmax | pmax-* | pmin | dec3100 | decstatn)
+		basic_machine=mips-dec
+		;;
+	decsystem10* | dec10*)
+		basic_machine=pdp10-dec
+		os=-tops10
+		;;
+	decsystem20* | dec20*)
+		basic_machine=pdp10-dec
+		os=-tops20
+		;;
+	delta | 3300 | motorola-3300 | motorola-delta \
+	      | 3300-motorola | delta-motorola)
+		basic_machine=m68k-motorola
+		;;
+	delta88)
+		basic_machine=m88k-motorola
+		os=-sysv3
+		;;
+	dicos)
+		basic_machine=i686-pc
+		os=-dicos
+		;;
+	djgpp)
+		basic_machine=i586-pc
+		os=-msdosdjgpp
+		;;
+	dpx20 | dpx20-*)
+		basic_machine=rs6000-bull
+		os=-bosx
+		;;
+	dpx2* | dpx2*-bull)
+		basic_machine=m68k-bull
+		os=-sysv3
+		;;
+	ebmon29k)
+		basic_machine=a29k-amd
+		os=-ebmon
+		;;
+	elxsi)
+		basic_machine=elxsi-elxsi
+		os=-bsd
+		;;
+	encore | umax | mmax)
+		basic_machine=ns32k-encore
+		;;
+	es1800 | OSE68k | ose68k | ose | OSE)
+		basic_machine=m68k-ericsson
+		os=-ose
+		;;
+	fx2800)
+		basic_machine=i860-alliant
+		;;
+	genix)
+		basic_machine=ns32k-ns
+		;;
+	gmicro)
+		basic_machine=tron-gmicro
+		os=-sysv
+		;;
+	go32)
+		basic_machine=i386-pc
+		os=-go32
+		;;
+	h3050r* | hiux*)
+		basic_machine=hppa1.1-hitachi
+		os=-hiuxwe2
+		;;
+	h8300hms)
+		basic_machine=h8300-hitachi
+		os=-hms
+		;;
+	h8300xray)
+		basic_machine=h8300-hitachi
+		os=-xray
+		;;
+	h8500hms)
+		basic_machine=h8500-hitachi
+		os=-hms
+		;;
+	harris)
+		basic_machine=m88k-harris
+		os=-sysv3
+		;;
+	hp300-*)
+		basic_machine=m68k-hp
+		;;
+	hp300bsd)
+		basic_machine=m68k-hp
+		os=-bsd
+		;;
+	hp300hpux)
+		basic_machine=m68k-hp
+		os=-hpux
+		;;
+	hp3k9[0-9][0-9] | hp9[0-9][0-9])
+		basic_machine=hppa1.0-hp
+		;;
+	hp9k2[0-9][0-9] | hp9k31[0-9])
+		basic_machine=m68000-hp
+		;;
+	hp9k3[2-9][0-9])
+		basic_machine=m68k-hp
+		;;
+	hp9k6[0-9][0-9] | hp6[0-9][0-9])
+		basic_machine=hppa1.0-hp
+		;;
+	hp9k7[0-79][0-9] | hp7[0-79][0-9])
+		basic_machine=hppa1.1-hp
+		;;
+	hp9k78[0-9] | hp78[0-9])
+		# FIXME: really hppa2.0-hp
+		basic_machine=hppa1.1-hp
+		;;
+	hp9k8[67]1 | hp8[67]1 | hp9k80[24] | hp80[24] | hp9k8[78]9 | hp8[78]9 | hp9k893 | hp893)
+		# FIXME: really hppa2.0-hp
+		basic_machine=hppa1.1-hp
+		;;
+	hp9k8[0-9][13679] | hp8[0-9][13679])
+		basic_machine=hppa1.1-hp
+		;;
+	hp9k8[0-9][0-9] | hp8[0-9][0-9])
+		basic_machine=hppa1.0-hp
+		;;
+	hppa-next)
+		os=-nextstep3
+		;;
+	hppaosf)
+		basic_machine=hppa1.1-hp
+		os=-osf
+		;;
+	hppro)
+		basic_machine=hppa1.1-hp
+		os=-proelf
+		;;
+	i370-ibm* | ibm*)
+		basic_machine=i370-ibm
+		;;
+# I'm not sure what "Sysv32" means.  Should this be sysv3.2?
+	i*86v32)
+		basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
+		os=-sysv32
+		;;
+	i*86v4*)
+		basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
+		os=-sysv4
+		;;
+	i*86v)
+		basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
+		os=-sysv
+		;;
+	i*86sol2)
+		basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
+		os=-solaris2
+		;;
+	i386mach)
+		basic_machine=i386-mach
+		os=-mach
+		;;
+	i386-vsta | vsta)
+		basic_machine=i386-unknown
+		os=-vsta
+		;;
+	iris | iris4d)
+		basic_machine=mips-sgi
+		case $os in
+		    -irix*)
+			;;
+		    *)
+			os=-irix4
+			;;
+		esac
+		;;
+	isi68 | isi)
+		basic_machine=m68k-isi
+		os=-sysv
+		;;
+	m68knommu)
+		basic_machine=m68k-unknown
+		os=-linux
+		;;
+	m68knommu-*)
+		basic_machine=m68k-`echo $basic_machine | sed 's/^[^-]*-//'`
+		os=-linux
+		;;
+	m88k-omron*)
+		basic_machine=m88k-omron
+		;;
+	magnum | m3230)
+		basic_machine=mips-mips
+		os=-sysv
+		;;
+	merlin)
+		basic_machine=ns32k-utek
+		os=-sysv
+		;;
+	mingw32)
+		basic_machine=i386-pc
+		os=-mingw32
+		;;
+	mingw32ce)
+		basic_machine=arm-unknown
+		os=-mingw32ce
+		;;
+	miniframe)
+		basic_machine=m68000-convergent
+		;;
+	*mint | -mint[0-9]* | *MiNT | *MiNT[0-9]*)
+		basic_machine=m68k-atari
+		os=-mint
+		;;
+	mips3*-*)
+		basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'`
+		;;
+	mips3*)
+		basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'`-unknown
+		;;
+	monitor)
+		basic_machine=m68k-rom68k
+		os=-coff
+		;;
+	morphos)
+		basic_machine=powerpc-unknown
+		os=-morphos
+		;;
+	msdos)
+		basic_machine=i386-pc
+		os=-msdos
+		;;
+	ms1-*)
+		basic_machine=`echo $basic_machine | sed -e 's/ms1-/mt-/'`
+		;;
+	mvs)
+		basic_machine=i370-ibm
+		os=-mvs
+		;;
+	ncr3000)
+		basic_machine=i486-ncr
+		os=-sysv4
+		;;
+	netbsd386)
+		basic_machine=i386-unknown
+		os=-netbsd
+		;;
+	netwinder)
+		basic_machine=armv4l-rebel
+		os=-linux
+		;;
+	news | news700 | news800 | news900)
+		basic_machine=m68k-sony
+		os=-newsos
+		;;
+	news1000)
+		basic_machine=m68030-sony
+		os=-newsos
+		;;
+	news-3600 | risc-news)
+		basic_machine=mips-sony
+		os=-newsos
+		;;
+	necv70)
+		basic_machine=v70-nec
+		os=-sysv
+		;;
+	next | m*-next )
+		basic_machine=m68k-next
+		case $os in
+		    -nextstep* )
+			;;
+		    -ns2*)
+		      os=-nextstep2
+			;;
+		    *)
+		      os=-nextstep3
+			;;
+		esac
+		;;
+	nh3000)
+		basic_machine=m68k-harris
+		os=-cxux
+		;;
+	nh[45]000)
+		basic_machine=m88k-harris
+		os=-cxux
+		;;
+	nindy960)
+		basic_machine=i960-intel
+		os=-nindy
+		;;
+	mon960)
+		basic_machine=i960-intel
+		os=-mon960
+		;;
+	nonstopux)
+		basic_machine=mips-compaq
+		os=-nonstopux
+		;;
+	np1)
+		basic_machine=np1-gould
+		;;
+	nsr-tandem)
+		basic_machine=nsr-tandem
+		;;
+	op50n-* | op60c-*)
+		basic_machine=hppa1.1-oki
+		os=-proelf
+		;;
+	openrisc | openrisc-*)
+		basic_machine=or32-unknown
+		;;
+	os400)
+		basic_machine=powerpc-ibm
+		os=-os400
+		;;
+	OSE68000 | ose68000)
+		basic_machine=m68000-ericsson
+		os=-ose
+		;;
+	os68k)
+		basic_machine=m68k-none
+		os=-os68k
+		;;
+	pa-hitachi)
+		basic_machine=hppa1.1-hitachi
+		os=-hiuxwe2
+		;;
+	paragon)
+		basic_machine=i860-intel
+		os=-osf
+		;;
+	parisc)
+		basic_machine=hppa-unknown
+		os=-linux
+		;;
+	parisc-*)
+		basic_machine=hppa-`echo $basic_machine | sed 's/^[^-]*-//'`
+		os=-linux
+		;;
+	pbd)
+		basic_machine=sparc-tti
+		;;
+	pbb)
+		basic_machine=m68k-tti
+		;;
+	pc532 | pc532-*)
+		basic_machine=ns32k-pc532
+		;;
+	pc98)
+		basic_machine=i386-pc
+		;;
+	pc98-*)
+		basic_machine=i386-`echo $basic_machine | sed 's/^[^-]*-//'`
+		;;
+	pentium | p5 | k5 | k6 | nexgen | viac3)
+		basic_machine=i586-pc
+		;;
+	pentiumpro | p6 | 6x86 | athlon | athlon_*)
+		basic_machine=i686-pc
+		;;
+	pentiumii | pentium2 | pentiumiii | pentium3)
+		basic_machine=i686-pc
+		;;
+	pentium4)
+		basic_machine=i786-pc
+		;;
+	pentium-* | p5-* | k5-* | k6-* | nexgen-* | viac3-*)
+		basic_machine=i586-`echo $basic_machine | sed 's/^[^-]*-//'`
+		;;
+	pentiumpro-* | p6-* | 6x86-* | athlon-*)
+		basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'`
+		;;
+	pentiumii-* | pentium2-* | pentiumiii-* | pentium3-*)
+		basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'`
+		;;
+	pentium4-*)
+		basic_machine=i786-`echo $basic_machine | sed 's/^[^-]*-//'`
+		;;
+	pn)
+		basic_machine=pn-gould
+		;;
+	power)	basic_machine=power-ibm
+		;;
+	ppc)	basic_machine=powerpc-unknown
+		;;
+	ppc-*)	basic_machine=powerpc-`echo $basic_machine | sed 's/^[^-]*-//'`
+		;;
+	ppcle | powerpclittle | ppc-le | powerpc-little)
+		basic_machine=powerpcle-unknown
+		;;
+	ppcle-* | powerpclittle-*)
+		basic_machine=powerpcle-`echo $basic_machine | sed 's/^[^-]*-//'`
+		;;
+	ppc64)	basic_machine=powerpc64-unknown
+		;;
+	ppc64-*) basic_machine=powerpc64-`echo $basic_machine | sed 's/^[^-]*-//'`
+		;;
+	ppc64le | powerpc64little | ppc64-le | powerpc64-little)
+		basic_machine=powerpc64le-unknown
+		;;
+	ppc64le-* | powerpc64little-*)
+		basic_machine=powerpc64le-`echo $basic_machine | sed 's/^[^-]*-//'`
+		;;
+	ps2)
+		basic_machine=i386-ibm
+		;;
+	pw32)
+		basic_machine=i586-unknown
+		os=-pw32
+		;;
+	rdos)
+		basic_machine=i386-pc
+		os=-rdos
+		;;
+	rom68k)
+		basic_machine=m68k-rom68k
+		os=-coff
+		;;
+	rm[46]00)
+		basic_machine=mips-siemens
+		;;
+	rtpc | rtpc-*)
+		basic_machine=romp-ibm
+		;;
+	s390 | s390-*)
+		basic_machine=s390-ibm
+		;;
+	s390x | s390x-*)
+		basic_machine=s390x-ibm
+		;;
+	sa29200)
+		basic_machine=a29k-amd
+		os=-udi
+		;;
+	sb1)
+		basic_machine=mipsisa64sb1-unknown
+		;;
+	sb1el)
+		basic_machine=mipsisa64sb1el-unknown
+		;;
+	sde)
+		basic_machine=mipsisa32-sde
+		os=-elf
+		;;
+	sei)
+		basic_machine=mips-sei
+		os=-seiux
+		;;
+	sequent)
+		basic_machine=i386-sequent
+		;;
+	sh)
+		basic_machine=sh-hitachi
+		os=-hms
+		;;
+	sh5el)
+		basic_machine=sh5le-unknown
+		;;
+	sh64)
+		basic_machine=sh64-unknown
+		;;
+	sparclite-wrs | simso-wrs)
+		basic_machine=sparclite-wrs
+		os=-vxworks
+		;;
+	sps7)
+		basic_machine=m68k-bull
+		os=-sysv2
+		;;
+	spur)
+		basic_machine=spur-unknown
+		;;
+	st2000)
+		basic_machine=m68k-tandem
+		;;
+	stratus)
+		basic_machine=i860-stratus
+		os=-sysv4
+		;;
+	sun2)
+		basic_machine=m68000-sun
+		;;
+	sun2os3)
+		basic_machine=m68000-sun
+		os=-sunos3
+		;;
+	sun2os4)
+		basic_machine=m68000-sun
+		os=-sunos4
+		;;
+	sun3os3)
+		basic_machine=m68k-sun
+		os=-sunos3
+		;;
+	sun3os4)
+		basic_machine=m68k-sun
+		os=-sunos4
+		;;
+	sun4os3)
+		basic_machine=sparc-sun
+		os=-sunos3
+		;;
+	sun4os4)
+		basic_machine=sparc-sun
+		os=-sunos4
+		;;
+	sun4sol2)
+		basic_machine=sparc-sun
+		os=-solaris2
+		;;
+	sun3 | sun3-*)
+		basic_machine=m68k-sun
+		;;
+	sun4)
+		basic_machine=sparc-sun
+		;;
+	sun386 | sun386i | roadrunner)
+		basic_machine=i386-sun
+		;;
+	sv1)
+		basic_machine=sv1-cray
+		os=-unicos
+		;;
+	symmetry)
+		basic_machine=i386-sequent
+		os=-dynix
+		;;
+	t3e)
+		basic_machine=alphaev5-cray
+		os=-unicos
+		;;
+	t90)
+		basic_machine=t90-cray
+		os=-unicos
+		;;
+	tic54x | c54x*)
+		basic_machine=tic54x-unknown
+		os=-coff
+		;;
+	tic55x | c55x*)
+		basic_machine=tic55x-unknown
+		os=-coff
+		;;
+	tic6x | c6x*)
+		basic_machine=tic6x-unknown
+		os=-coff
+		;;
+	tile*)
+		basic_machine=tile-unknown
+		os=-linux-gnu
+		;;
+	tx39)
+		basic_machine=mipstx39-unknown
+		;;
+	tx39el)
+		basic_machine=mipstx39el-unknown
+		;;
+	toad1)
+		basic_machine=pdp10-xkl
+		os=-tops20
+		;;
+	tower | tower-32)
+		basic_machine=m68k-ncr
+		;;
+	tpf)
+		basic_machine=s390x-ibm
+		os=-tpf
+		;;
+	udi29k)
+		basic_machine=a29k-amd
+		os=-udi
+		;;
+	ultra3)
+		basic_machine=a29k-nyu
+		os=-sym1
+		;;
+	v810 | necv810)
+		basic_machine=v810-nec
+		os=-none
+		;;
+	vaxv)
+		basic_machine=vax-dec
+		os=-sysv
+		;;
+	vms)
+		basic_machine=vax-dec
+		os=-vms
+		;;
+	vpp*|vx|vx-*)
+		basic_machine=f301-fujitsu
+		;;
+	vxworks960)
+		basic_machine=i960-wrs
+		os=-vxworks
+		;;
+	vxworks68)
+		basic_machine=m68k-wrs
+		os=-vxworks
+		;;
+	vxworks29k)
+		basic_machine=a29k-wrs
+		os=-vxworks
+		;;
+	w65*)
+		basic_machine=w65-wdc
+		os=-none
+		;;
+	w89k-*)
+		basic_machine=hppa1.1-winbond
+		os=-proelf
+		;;
+	xbox)
+		basic_machine=i686-pc
+		os=-mingw32
+		;;
+	xps | xps100)
+		basic_machine=xps100-honeywell
+		;;
+	ymp)
+		basic_machine=ymp-cray
+		os=-unicos
+		;;
+	z8k-*-coff)
+		basic_machine=z8k-unknown
+		os=-sim
+		;;
+	z80-*-coff)
+		basic_machine=z80-unknown
+		os=-sim
+		;;
+	none)
+		basic_machine=none-none
+		os=-none
+		;;
+
+# Here we handle the default manufacturer of certain CPU types.  It is in
+# some cases the only manufacturer, in others, it is the most popular.
+	w89k)
+		basic_machine=hppa1.1-winbond
+		;;
+	op50n)
+		basic_machine=hppa1.1-oki
+		;;
+	op60c)
+		basic_machine=hppa1.1-oki
+		;;
+	romp)
+		basic_machine=romp-ibm
+		;;
+	mmix)
+		basic_machine=mmix-knuth
+		;;
+	rs6000)
+		basic_machine=rs6000-ibm
+		;;
+	vax)
+		basic_machine=vax-dec
+		;;
+	pdp10)
+		# there are many clones, so DEC is not a safe bet
+		basic_machine=pdp10-unknown
+		;;
+	pdp11)
+		basic_machine=pdp11-dec
+		;;
+	we32k)
+		basic_machine=we32k-att
+		;;
+	sh[1234] | sh[24]a | sh[24]aeb | sh[34]eb | sh[1234]le | sh[23]ele)
+		basic_machine=sh-unknown
+		;;
+	sparc | sparcv8 | sparcv9 | sparcv9b | sparcv9v)
+		basic_machine=sparc-sun
+		;;
+	cydra)
+		basic_machine=cydra-cydrome
+		;;
+	orion)
+		basic_machine=orion-highlevel
+		;;
+	orion105)
+		basic_machine=clipper-highlevel
+		;;
+	mac | mpw | mac-mpw)
+		basic_machine=m68k-apple
+		;;
+	pmac | pmac-mpw)
+		basic_machine=powerpc-apple
+		;;
+	*-unknown)
+		# Make sure to match an already-canonicalized machine name.
+		;;
+	*)
+		echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2
+		exit 1
+		;;
+esac
+
+# Here we canonicalize certain aliases for manufacturers.
+case $basic_machine in
+	*-digital*)
+		basic_machine=`echo $basic_machine | sed 's/digital.*/dec/'`
+		;;
+	*-commodore*)
+		basic_machine=`echo $basic_machine | sed 's/commodore.*/cbm/'`
+		;;
+	*)
+		;;
+esac
+
+# Decode manufacturer-specific aliases for certain operating systems.
+
+if [ x"$os" != x"" ]
+then
+case $os in
+        # First match some system type aliases
+        # that might get confused with valid system types.
+	# -solaris* is a basic system type, with this one exception.
+	-solaris1 | -solaris1.*)
+		os=`echo $os | sed -e 's|solaris1|sunos4|'`
+		;;
+	-solaris)
+		os=-solaris2
+		;;
+	-svr4*)
+		os=-sysv4
+		;;
+	-unixware*)
+		os=-sysv4.2uw
+		;;
+	-gnu/linux*)
+		os=`echo $os | sed -e 's|gnu/linux|linux-gnu|'`
+		;;
+	# First accept the basic system types.
+	# The portable systems comes first.
+	# Each alternative MUST END IN A *, to match a version number.
+	# -sysv* is not here because it comes later, after sysvr4.
+	-gnu* | -bsd* | -mach* | -minix* | -genix* | -ultrix* | -irix* \
+	      | -*vms* | -sco* | -esix* | -isc* | -aix* | -sunos | -sunos[34]*\
+	      | -hpux* | -unos* | -osf* | -luna* | -dgux* | -solaris* | -sym* \
+	      | -kopensolaris* \
+	      | -amigaos* | -amigados* | -msdos* | -newsos* | -unicos* | -aof* \
+	      | -aos* | -aros* \
+	      | -nindy* | -vxsim* | -vxworks* | -ebmon* | -hms* | -mvs* \
+	      | -clix* | -riscos* | -uniplus* | -iris* | -rtu* | -xenix* \
+	      | -hiux* | -386bsd* | -knetbsd* | -mirbsd* | -netbsd* \
+	      | -openbsd* | -solidbsd* \
+	      | -ekkobsd* | -kfreebsd* | -freebsd* | -riscix* | -lynxos* \
+	      | -bosx* | -nextstep* | -cxux* | -aout* | -elf* | -oabi* \
+	      | -ptx* | -coff* | -ecoff* | -winnt* | -domain* | -vsta* \
+	      | -udi* | -eabi* | -lites* | -ieee* | -go32* | -aux* \
+	      | -chorusos* | -chorusrdb* | -cegcc* \
+	      | -cygwin* | -pe* | -psos* | -moss* | -proelf* | -rtems* \
+	      | -mingw32* | -linux-gnu* | -linux-newlib* | -linux-uclibc* \
+	      | -uxpv* | -beos* | -mpeix* | -udk* \
+	      | -interix* | -uwin* | -mks* | -rhapsody* | -darwin* | -opened* \
+	      | -openstep* | -oskit* | -conix* | -pw32* | -nonstopux* \
+	      | -storm-chaos* | -tops10* | -tenex* | -tops20* | -its* \
+	      | -os2* | -vos* | -palmos* | -uclinux* | -nucleus* \
+	      | -morphos* | -superux* | -rtmk* | -rtmk-nova* | -windiss* \
+	      | -powermax* | -dnix* | -nx6 | -nx7 | -sei* | -dragonfly* \
+	      | -skyos* | -haiku* | -rdos* | -toppers* | -drops*)
+	# Remember, each alternative MUST END IN *, to match a version number.
+		;;
+	-qnx*)
+		case $basic_machine in
+		    x86-* | i*86-*)
+			;;
+		    *)
+			os=-nto$os
+			;;
+		esac
+		;;
+	-nto-qnx*)
+		;;
+	-nto*)
+		os=`echo $os | sed -e 's|nto|nto-qnx|'`
+		;;
+	-sim | -es1800* | -hms* | -xray | -os68k* | -none* | -v88r* \
+	      | -windows* | -osx | -abug | -netware* | -os9* | -beos* | -haiku* \
+	      | -macos* | -mpw* | -magic* | -mmixware* | -mon960* | -lnews*)
+		;;
+	-mac*)
+		os=`echo $os | sed -e 's|mac|macos|'`
+		;;
+	-linux-dietlibc)
+		os=-linux-dietlibc
+		;;
+	-linux*)
+		os=`echo $os | sed -e 's|linux|linux-gnu|'`
+		;;
+	-sunos5*)
+		os=`echo $os | sed -e 's|sunos5|solaris2|'`
+		;;
+	-sunos6*)
+		os=`echo $os | sed -e 's|sunos6|solaris3|'`
+		;;
+	-opened*)
+		os=-openedition
+		;;
+        -os400*)
+		os=-os400
+		;;
+	-wince*)
+		os=-wince
+		;;
+	-osfrose*)
+		os=-osfrose
+		;;
+	-osf*)
+		os=-osf
+		;;
+	-utek*)
+		os=-bsd
+		;;
+	-dynix*)
+		os=-bsd
+		;;
+	-acis*)
+		os=-aos
+		;;
+	-atheos*)
+		os=-atheos
+		;;
+	-syllable*)
+		os=-syllable
+		;;
+	-386bsd)
+		os=-bsd
+		;;
+	-ctix* | -uts*)
+		os=-sysv
+		;;
+	-nova*)
+		os=-rtmk-nova
+		;;
+	-ns2 )
+		os=-nextstep2
+		;;
+	-nsk*)
+		os=-nsk
+		;;
+	# Preserve the version number of sinix5.
+	-sinix5.*)
+		os=`echo $os | sed -e 's|sinix|sysv|'`
+		;;
+	-sinix*)
+		os=-sysv4
+		;;
+        -tpf*)
+		os=-tpf
+		;;
+	-triton*)
+		os=-sysv3
+		;;
+	-oss*)
+		os=-sysv3
+		;;
+	-svr4)
+		os=-sysv4
+		;;
+	-svr3)
+		os=-sysv3
+		;;
+	-sysvr4)
+		os=-sysv4
+		;;
+	# This must come after -sysvr4.
+	-sysv*)
+		;;
+	-ose*)
+		os=-ose
+		;;
+	-es1800*)
+		os=-ose
+		;;
+	-xenix)
+		os=-xenix
+		;;
+	-*mint | -mint[0-9]* | -*MiNT | -MiNT[0-9]*)
+		os=-mint
+		;;
+	-aros*)
+		os=-aros
+		;;
+	-kaos*)
+		os=-kaos
+		;;
+	-zvmoe)
+		os=-zvmoe
+		;;
+	-dicos*)
+		os=-dicos
+		;;
+	-none)
+		;;
+	*)
+		# Get rid of the `-' at the beginning of $os.
+		os=`echo $os | sed 's/[^-]*-//'`
+		echo Invalid configuration \`$1\': system \`$os\' not recognized 1>&2
+		exit 1
+		;;
+esac
+else
+
+# Here we handle the default operating systems that come with various machines.
+# The value should be what the vendor currently ships out the door with their
+# machine or put another way, the most popular os provided with the machine.
+
+# Note that if you're going to try to match "-MANUFACTURER" here (say,
+# "-sun"), then you have to tell the case statement up towards the top
+# that MANUFACTURER isn't an operating system.  Otherwise, code above
+# will signal an error saying that MANUFACTURER isn't an operating
+# system, and we'll never get to this point.
+
+case $basic_machine in
+        score-*)
+		os=-elf
+		;;
+        spu-*)
+		os=-elf
+		;;
+	*-acorn)
+		os=-riscix1.2
+		;;
+	arm*-rebel)
+		os=-linux
+		;;
+	arm*-semi)
+		os=-aout
+		;;
+        c4x-* | tic4x-*)
+        	os=-coff
+		;;
+	# This must come before the *-dec entry.
+	pdp10-*)
+		os=-tops20
+		;;
+	pdp11-*)
+		os=-none
+		;;
+	*-dec | vax-*)
+		os=-ultrix4.2
+		;;
+	m68*-apollo)
+		os=-domain
+		;;
+	i386-sun)
+		os=-sunos4.0.2
+		;;
+	m68000-sun)
+		os=-sunos3
+		# This also exists in the configure program, but was not the
+		# default.
+		# os=-sunos4
+		;;
+	m68*-cisco)
+		os=-aout
+		;;
+        mep-*)
+		os=-elf
+		;;
+	mips*-cisco)
+		os=-elf
+		;;
+	mips*-*)
+		os=-elf
+		;;
+	or32-*)
+		os=-coff
+		;;
+	*-tti)	# must be before sparc entry or we get the wrong os.
+		os=-sysv3
+		;;
+	sparc-* | *-sun)
+		os=-sunos4.1.1
+		;;
+	*-be)
+		os=-beos
+		;;
+	*-haiku)
+		os=-haiku
+		;;
+	*-ibm)
+		os=-aix
+		;;
+    	*-knuth)
+		os=-mmixware
+		;;
+	*-wec)
+		os=-proelf
+		;;
+	*-winbond)
+		os=-proelf
+		;;
+	*-oki)
+		os=-proelf
+		;;
+	*-hp)
+		os=-hpux
+		;;
+	*-hitachi)
+		os=-hiux
+		;;
+	i860-* | *-att | *-ncr | *-altos | *-motorola | *-convergent)
+		os=-sysv
+		;;
+	*-cbm)
+		os=-amigaos
+		;;
+	*-dg)
+		os=-dgux
+		;;
+	*-dolphin)
+		os=-sysv3
+		;;
+	m68k-ccur)
+		os=-rtu
+		;;
+	m88k-omron*)
+		os=-luna
+		;;
+	*-next )
+		os=-nextstep
+		;;
+	*-sequent)
+		os=-ptx
+		;;
+	*-crds)
+		os=-unos
+		;;
+	*-ns)
+		os=-genix
+		;;
+	i370-*)
+		os=-mvs
+		;;
+	*-next)
+		os=-nextstep3
+		;;
+	*-gould)
+		os=-sysv
+		;;
+	*-highlevel)
+		os=-bsd
+		;;
+	*-encore)
+		os=-bsd
+		;;
+	*-sgi)
+		os=-irix
+		;;
+	*-siemens)
+		os=-sysv4
+		;;
+	*-masscomp)
+		os=-rtu
+		;;
+	f30[01]-fujitsu | f700-fujitsu)
+		os=-uxpv
+		;;
+	*-rom68k)
+		os=-coff
+		;;
+	*-*bug)
+		os=-coff
+		;;
+	*-apple)
+		os=-macos
+		;;
+	*-atari*)
+		os=-mint
+		;;
+	*)
+		os=-none
+		;;
+esac
+fi
+
+# Here we handle the case where we know the os, and the CPU type, but not the
+# manufacturer.  We pick the logical manufacturer.
+vendor=unknown
+case $basic_machine in
+	*-unknown)
+		case $os in
+			-riscix*)
+				vendor=acorn
+				;;
+			-sunos*)
+				vendor=sun
+				;;
+			-aix*)
+				vendor=ibm
+				;;
+			-beos*)
+				vendor=be
+				;;
+			-hpux*)
+				vendor=hp
+				;;
+			-mpeix*)
+				vendor=hp
+				;;
+			-hiux*)
+				vendor=hitachi
+				;;
+			-unos*)
+				vendor=crds
+				;;
+			-dgux*)
+				vendor=dg
+				;;
+			-luna*)
+				vendor=omron
+				;;
+			-genix*)
+				vendor=ns
+				;;
+			-mvs* | -opened*)
+				vendor=ibm
+				;;
+			-os400*)
+				vendor=ibm
+				;;
+			-ptx*)
+				vendor=sequent
+				;;
+			-tpf*)
+				vendor=ibm
+				;;
+			-vxsim* | -vxworks* | -windiss*)
+				vendor=wrs
+				;;
+			-aux*)
+				vendor=apple
+				;;
+			-hms*)
+				vendor=hitachi
+				;;
+			-mpw* | -macos*)
+				vendor=apple
+				;;
+			-*mint | -mint[0-9]* | -*MiNT | -MiNT[0-9]*)
+				vendor=atari
+				;;
+			-vos*)
+				vendor=stratus
+				;;
+		esac
+		basic_machine=`echo $basic_machine | sed "s/unknown/$vendor/"`
+		;;
+esac
+
+echo $basic_machine$os
+exit
+
+# Local variables:
+# eval: (add-hook 'write-file-hooks 'time-stamp)
+# time-stamp-start: "timestamp='"
+# time-stamp-format: "%:y-%02m-%02d"
+# time-stamp-end: "'"
+# End:
diff --git a/configure.files b/configure.files
new file mode 100644
index 0000000..b9ddcb5
--- /dev/null
+++ b/configure.files
@@ -0,0 +1,3 @@
+./admin/configure.in.min
+configure.in.in
+configure.in.mid
diff --git a/configure.in b/configure.in
new file mode 100644
index 0000000..d526768
--- /dev/null
+++ b/configure.in
@@ -0,0 +1,370 @@
+dnl =======================================================
+dnl FILE: ./admin/configure.in.min
+dnl =======================================================
+
+dnl    This file is part of the KDE libraries/packages
+dnl    Copyright (C) 2001 Stephan Kulow (coolo@kde.org)
+ 
+dnl    This file is free software; you can redistribute it and/or
+dnl    modify it under the terms of the GNU Library General Public
+dnl    License as published by the Free Software Foundation; either
+dnl    version 2 of the License, or (at your option) any later version.
+ 
+dnl    This library is distributed in the hope that it will be useful,
+dnl    but WITHOUT ANY WARRANTY; without even the implied warranty of
+dnl    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+dnl    Library General Public License for more details.
+ 
+dnl    You should have received a copy of the GNU Library General Public License
+dnl    along with this library; see the file COPYING.LIB.  If not, write to
+dnl    the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+dnl    Boston, MA 02110-1301, USA.
+
+# Original Author was Kalle@kde.org
+# I lifted it in some mater. (Stephan Kulow)
+# I used much code from Janos Farkas
+
+dnl Process this file with autoconf to produce a configure script.
+
+AC_INIT(acinclude.m4) dnl a source file from your sub dir
+
+dnl This is so we can use kde-common
+AC_CONFIG_AUX_DIR(admin)
+
+dnl This ksh/zsh feature conflicts with `cd blah ; pwd`
+unset CDPATH
+
+dnl Checking host/target/build systems, for make, install etc.
+AC_CANONICAL_SYSTEM 
+dnl Perform program name transformation
+AC_ARG_PROGRAM
+
+dnl Automake doc recommends to do this only here. (Janos)
+AM_INIT_AUTOMAKE(piklab, 0.15.2) dnl searches for some needed programs
+
+KDE_SET_PREFIX
+
+dnl generate the config header
+AM_CONFIG_HEADER(config.h) dnl at the distribution this done
+
+dnl Checks for programs.
+AC_CHECK_COMPILERS
+AC_ENABLE_SHARED(yes)
+AC_ENABLE_STATIC(no)
+KDE_PROG_LIBTOOL
+
+dnl for NLS support. Call them in this order!
+dnl WITH_NLS is for the po files
+AM_KDE_WITH_NLS
+
+KDE_USE_QT(3)
+AC_PATH_KDE
+dnl =======================================================
+dnl FILE: configure.in.in
+dnl =======================================================
+
+#MIN_CONFIG(3)
+
+dnl PACKAGE set before
+
+dnl CXXFLAGS="$NOOPT_CXXFLAGS" dnl __kdevelop[noopt]__
+dnl CFLAGS="$NOOPT_CFLAGS" dnl __kdevelop[noopt]__
+dnl CXXFLAGS="$CXXFLAGS $USE_EXCEPTIONS" dnl __kdevelop[exc]__
+
+dnl KDE_NEED_FLEX dnl __kdevelop__
+dnl AC_PROG_YACC dnl __kdevelop__
+
+# --------------------------------------------------------------------------
+# check os
+case "${host_os}" in
+       *linux* ) OSDIR=linux ;;
+       *bsd*   ) OSDIR=bsd   LDFLAGS="$LDFLAGS $LIBPTHREAD";;
+       *       ) OSDIR=null  ;;
+esac
+AM_CONDITIONAL(BSD, test x$OSDIR = xbsd)
+AM_CONDITIONAL(LINUX, test x$OSDIR = xlinux)
+AM_CONDITIONAL(NULL, test x$OSDIR = xnull)
+AC_C_BIGENDIAN
+
+# --------------------------------------------------------------------------
+# check for parport header (linux)
+AC_CACHE_CHECK([for parport header/ppdev.h], ac_cv_c_ppdev,
+ AC_TRY_COMPILE(
+   [#include <linux/ppdev.h>],
+   [ioctl (1,PPCLAIM,0)],
+   [ac_cv_c_ppdev="yes"],
+   [ac_cv_c_ppdev="no"])
+ )
+if test "$ac_cv_c_ppdev" = "yes"
+then
+   AC_DEFINE(HAVE_PPDEV, 1, [Define if we can use ppdev for parallel port access])
+fi
+
+# check for ppbus header (FreeBSD)
+AC_CACHE_CHECK([for ppbus header/ppi.h], ac_cv_c_ppbus,
+ AC_TRY_COMPILE(
+   [#include <dev/ppbus/ppi.h>],
+   [ioctl (1,PPIGCTRL,0)],
+   [ac_cv_c_ppbus="yes"],
+   [ac_cv_c_ppbus="no"])
+ )
+if test "$ac_cv_c_ppbus" = "yes"
+then
+   AC_DEFINE(HAVE_PPBUS, 1, [Define if we can use ppbus for parallel port access])
+fi
+
+# ----------------------------------------------------------------------------
+# check for libusb
+have_libusb=no
+AC_ARG_ENABLE(libusb, AC_HELP_STRING([--disable-libusb],[do not use libusb]),
+              [ try_libusb="${enableval}" ], [ try_libusb=yes ] )
+if test "x$try_libusb" != xno ; then
+  AC_CHECK_PROG([LIBUSBCONFIG], [libusb-config], [yes])
+  if test "$LIBUSBCONFIG" = "yes" ; then
+    LIBUSB_CFLAGS="$LIBUSB_CFLAGS `libusb-config --cflags`"
+    LIBUSB_LIBS="$LIBUSB_LIBS `libusb-config --libs`"
+    LIBUSB_VERSION="`libusb-config --version`"
+  else
+    AC_MSG_WARN([libusb-config not found.])
+  fi
+  saved_CPPFLAGS="$CPPFLAGS"
+  saved_LIBS="$LIBS"
+  CPPFLAGS="$CPPFLAGS $LIBUSB_CFLAGS"
+  LIBS="$LDFLAGS $LIBUSB_LIBS"
+  AC_CHECK_HEADERS(usb.h, [],
+    [ AC_MSG_ERROR([usb.h not found, use ./configure LIBUSB_CFLAGS=...]) ])
+  AC_MSG_CHECKING([for usb_init])
+  AC_TRY_LINK_FUNC(usb_init, [ AC_MSG_RESULT([yes]) ],
+    [ AC_MSG_ERROR([libusb not found, use ./configure LIBUSB_LIBS=...]) ])
+  CPPFLAGS="$saved_CPPFLAGS"
+  LIBS="$saved_LIBS"
+  have_libusb=yes
+fi
+AC_SUBST(LIBUSB_CFLAGS)
+AC_SUBST(LIBUSB_LIBS)
+if test "$have_libusb" = "yes"
+then
+  AC_DEFINE(HAVE_USB, 1, [Define if libusb is available])
+  AC_DEFINE_UNQUOTED(LIBUSB_VERSION, "$LIBUSB_VERSION", [libusb version])
+fi
+
+# ----------------------------------------------------------------------------
+# check which libcurses
+CPPFLAGS="$CPPFLAGS -L/usr/lib"
+AC_CHECK_LIB(curses, main, CURSESLIB="-lcurses",
+  [AC_CHECK_LIB(ncurses, main, CURSESLIB="-lncurses")]
+)
+
+# ----------------------------------------------------------------------------
+# check for readline
+have_libreadline=no
+AC_ARG_ENABLE(libreadline, AC_HELP_STRING([--disable-libreadline],[do not use libreadline]),
+              [ try_libreadline="${enableval}" ], [ try_libreadline=yes ] )
+if test "x$try_libreadline" != xno ; then
+  LIBREADLINE_LIBS="-lhistory -lreadline $CURSESLIB"
+  AC_CHECK_HEADER(readline/readline.h, HAVE_READLINE=true, [ AC_MSG_WARN([readline/readline.h not found]) ])
+  if test x${HAVE_READLINE} = xtrue ; then
+    saved_CPPFLAGS="$CPPFLAGS"
+    saved_LIBS="$LIBS"
+    LIBS="$LDFLAGS $LIBREADLINE_LIBS"
+    AC_MSG_CHECKING([for rl_initialize])
+    AC_TRY_LINK_FUNC(rl_initialize, [
+      AC_MSG_RESULT([yes])
+      AC_MSG_CHECKING([for using_history])
+      AC_TRY_LINK_FUNC(using_history, [
+        have_libreadline=yes
+        AC_MSG_RESULT([yes])
+      ], [ AC_MSG_ERROR([libhistory not found]) ])
+    ], [ AC_MSG_ERROR([libreadline not found]) ])
+    CPPFLAGS="$saved_CPPFLAGS"
+    LIBS="$saved_LIBS"
+  fi
+fi
+AC_SUBST(LIBREADLINE_LIBS)
+if test "$have_libreadline" = "yes"
+then
+  AC_DEFINE(HAVE_READLINE, 1, [Define if libreadline header is present.])
+fi
+KDE_CREATE_SUBDIRSLIST
+AM_CONDITIONAL(doc_SUBDIR_included, test "x$doc_SUBDIR_included" = xyes)
+AM_CONDITIONAL(man_SUBDIR_included, test "x$man_SUBDIR_included" = xyes)
+AM_CONDITIONAL(po_SUBDIR_included, test "x$po_SUBDIR_included" = xyes)
+AM_CONDITIONAL(src_SUBDIR_included, test "x$src_SUBDIR_included" = xyes)
+AC_CONFIG_FILES([ Makefile ])
+AC_CONFIG_FILES([ doc/Makefile ])
+AC_CONFIG_FILES([ man/Makefile ])
+AC_CONFIG_FILES([ po/Makefile ])
+AC_CONFIG_FILES([ src/Makefile ])
+AC_CONFIG_FILES([ src/coff/Makefile ])
+AC_CONFIG_FILES([ src/coff/base/Makefile ])
+AC_CONFIG_FILES([ src/coff/xml/Makefile ])
+AC_CONFIG_FILES([ src/common/Makefile ])
+AC_CONFIG_FILES([ src/common/cli/Makefile ])
+AC_CONFIG_FILES([ src/common/common/Makefile ])
+AC_CONFIG_FILES([ src/common/global/Makefile ])
+AC_CONFIG_FILES([ src/common/global/svn_revision/Makefile ])
+AC_CONFIG_FILES([ src/common/gui/Makefile ])
+AC_CONFIG_FILES([ src/common/port/Makefile ])
+AC_CONFIG_FILES([ src/data/Makefile ])
+AC_CONFIG_FILES([ src/data/app_data/Makefile ])
+AC_CONFIG_FILES([ src/data/likeback/Makefile ])
+AC_CONFIG_FILES([ src/devices/Makefile ])
+AC_CONFIG_FILES([ src/devices/base/Makefile ])
+AC_CONFIG_FILES([ src/devices/gui/Makefile ])
+AC_CONFIG_FILES([ src/devices/list/Makefile ])
+AC_CONFIG_FILES([ src/devices/mem24/Makefile ])
+AC_CONFIG_FILES([ src/devices/mem24/base/Makefile ])
+AC_CONFIG_FILES([ src/devices/mem24/gui/Makefile ])
+AC_CONFIG_FILES([ src/devices/mem24/mem24/Makefile ])
+AC_CONFIG_FILES([ src/devices/mem24/prog/Makefile ])
+AC_CONFIG_FILES([ src/devices/mem24/xml/Makefile ])
+AC_CONFIG_FILES([ src/devices/mem24/xml_data/Makefile ])
+AC_CONFIG_FILES([ src/devices/pic/Makefile ])
+AC_CONFIG_FILES([ src/devices/pic/base/Makefile ])
+AC_CONFIG_FILES([ src/devices/pic/gui/Makefile ])
+AC_CONFIG_FILES([ src/devices/pic/pic/Makefile ])
+AC_CONFIG_FILES([ src/devices/pic/prog/Makefile ])
+AC_CONFIG_FILES([ src/devices/pic/xml/Makefile ])
+AC_CONFIG_FILES([ src/devices/pic/xml_data/Makefile ])
+AC_CONFIG_FILES([ src/libgui/Makefile ])
+AC_CONFIG_FILES([ src/piklab/Makefile ])
+AC_CONFIG_FILES([ src/piklab-coff/Makefile ])
+AC_CONFIG_FILES([ src/piklab-hex/Makefile ])
+AC_CONFIG_FILES([ src/piklab-prog/Makefile ])
+AC_CONFIG_FILES([ src/piklab-test/Makefile ])
+AC_CONFIG_FILES([ src/piklab-test/base/Makefile ])
+AC_CONFIG_FILES([ src/piklab-test/checksum/Makefile ])
+AC_CONFIG_FILES([ src/piklab-test/generators/Makefile ])
+AC_CONFIG_FILES([ src/piklab-test/misc/Makefile ])
+AC_CONFIG_FILES([ src/piklab-test/save_load_memory/Makefile ])
+AC_CONFIG_FILES([ src/progs/Makefile ])
+AC_CONFIG_FILES([ src/progs/base/Makefile ])
+AC_CONFIG_FILES([ src/progs/bootloader/Makefile ])
+AC_CONFIG_FILES([ src/progs/bootloader/base/Makefile ])
+AC_CONFIG_FILES([ src/progs/bootloader/gui/Makefile ])
+AC_CONFIG_FILES([ src/progs/direct/Makefile ])
+AC_CONFIG_FILES([ src/progs/direct/base/Makefile ])
+AC_CONFIG_FILES([ src/progs/direct/gui/Makefile ])
+AC_CONFIG_FILES([ src/progs/direct/xml/Makefile ])
+AC_CONFIG_FILES([ src/progs/gpsim/Makefile ])
+AC_CONFIG_FILES([ src/progs/gpsim/base/Makefile ])
+AC_CONFIG_FILES([ src/progs/gpsim/gui/Makefile ])
+AC_CONFIG_FILES([ src/progs/gui/Makefile ])
+AC_CONFIG_FILES([ src/progs/icd1/Makefile ])
+AC_CONFIG_FILES([ src/progs/icd1/base/Makefile ])
+AC_CONFIG_FILES([ src/progs/icd1/gui/Makefile ])
+AC_CONFIG_FILES([ src/progs/icd1/xml/Makefile ])
+AC_CONFIG_FILES([ src/progs/icd2/Makefile ])
+AC_CONFIG_FILES([ src/progs/icd2/base/Makefile ])
+AC_CONFIG_FILES([ src/progs/icd2/gui/Makefile ])
+AC_CONFIG_FILES([ src/progs/icd2/icd2_data/Makefile ])
+AC_CONFIG_FILES([ src/progs/icd2/xml/Makefile ])
+AC_CONFIG_FILES([ src/progs/list/Makefile ])
+AC_CONFIG_FILES([ src/progs/manager/Makefile ])
+AC_CONFIG_FILES([ src/progs/picdem_bootloader/Makefile ])
+AC_CONFIG_FILES([ src/progs/picdem_bootloader/base/Makefile ])
+AC_CONFIG_FILES([ src/progs/picdem_bootloader/gui/Makefile ])
+AC_CONFIG_FILES([ src/progs/picdem_bootloader/xml/Makefile ])
+AC_CONFIG_FILES([ src/progs/pickit1/Makefile ])
+AC_CONFIG_FILES([ src/progs/pickit1/base/Makefile ])
+AC_CONFIG_FILES([ src/progs/pickit1/gui/Makefile ])
+AC_CONFIG_FILES([ src/progs/pickit1/xml/Makefile ])
+AC_CONFIG_FILES([ src/progs/pickit2/Makefile ])
+AC_CONFIG_FILES([ src/progs/pickit2/base/Makefile ])
+AC_CONFIG_FILES([ src/progs/pickit2/gui/Makefile ])
+AC_CONFIG_FILES([ src/progs/pickit2/xml/Makefile ])
+AC_CONFIG_FILES([ src/progs/pickit2_bootloader/Makefile ])
+AC_CONFIG_FILES([ src/progs/pickit2_bootloader/base/Makefile ])
+AC_CONFIG_FILES([ src/progs/pickit2_bootloader/gui/Makefile ])
+AC_CONFIG_FILES([ src/progs/pickit2_bootloader/xml/Makefile ])
+AC_CONFIG_FILES([ src/progs/pickit2v2/Makefile ])
+AC_CONFIG_FILES([ src/progs/pickit2v2/base/Makefile ])
+AC_CONFIG_FILES([ src/progs/pickit2v2/gui/Makefile ])
+AC_CONFIG_FILES([ src/progs/psp/Makefile ])
+AC_CONFIG_FILES([ src/progs/psp/base/Makefile ])
+AC_CONFIG_FILES([ src/progs/psp/gui/Makefile ])
+AC_CONFIG_FILES([ src/progs/psp/xml/Makefile ])
+AC_CONFIG_FILES([ src/progs/sdcdb/Makefile ])
+AC_CONFIG_FILES([ src/progs/sdcdb/base/Makefile ])
+AC_CONFIG_FILES([ src/progs/tbl_bootloader/Makefile ])
+AC_CONFIG_FILES([ src/progs/tbl_bootloader/base/Makefile ])
+AC_CONFIG_FILES([ src/progs/tbl_bootloader/gui/Makefile ])
+AC_CONFIG_FILES([ src/progs/tbl_bootloader/xml/Makefile ])
+AC_CONFIG_FILES([ src/tools/Makefile ])
+AC_CONFIG_FILES([ src/tools/base/Makefile ])
+AC_CONFIG_FILES([ src/tools/boost/Makefile ])
+AC_CONFIG_FILES([ src/tools/boost/gui/Makefile ])
+AC_CONFIG_FILES([ src/tools/c18/Makefile ])
+AC_CONFIG_FILES([ src/tools/c18/gui/Makefile ])
+AC_CONFIG_FILES([ src/tools/cc5x/Makefile ])
+AC_CONFIG_FILES([ src/tools/cc5x/gui/Makefile ])
+AC_CONFIG_FILES([ src/tools/ccsc/Makefile ])
+AC_CONFIG_FILES([ src/tools/ccsc/gui/Makefile ])
+AC_CONFIG_FILES([ src/tools/custom/Makefile ])
+AC_CONFIG_FILES([ src/tools/gputils/Makefile ])
+AC_CONFIG_FILES([ src/tools/gputils/gui/Makefile ])
+AC_CONFIG_FILES([ src/tools/gui/Makefile ])
+AC_CONFIG_FILES([ src/tools/jal/Makefile ])
+AC_CONFIG_FILES([ src/tools/jal/gui/Makefile ])
+AC_CONFIG_FILES([ src/tools/jalv2/Makefile ])
+AC_CONFIG_FILES([ src/tools/jalv2/gui/Makefile ])
+AC_CONFIG_FILES([ src/tools/list/Makefile ])
+AC_CONFIG_FILES([ src/tools/mpc/Makefile ])
+AC_CONFIG_FILES([ src/tools/mpc/gui/Makefile ])
+AC_CONFIG_FILES([ src/tools/pic30/Makefile ])
+AC_CONFIG_FILES([ src/tools/pic30/gui/Makefile ])
+AC_CONFIG_FILES([ src/tools/picc/Makefile ])
+AC_CONFIG_FILES([ src/tools/picc/gui/Makefile ])
+AC_CONFIG_FILES([ src/tools/sdcc/Makefile ])
+AC_CONFIG_FILES([ src/tools/sdcc/gui/Makefile ])
+AC_CONFIG_FILES([ src/xml_to_data/Makefile ])
+dnl put here things which have to be done after all usual autoconf macros
+dnl have been run, but before the Makefiles are created
+
+CXXFLAGS="$CXXFLAGS $KDE_DEFAULT_CXXFLAGS"
+AC_OUTPUT
+# Check if KDE_SET_PREFIX was called, and --prefix was passed to configure
+if test -n "$kde_libs_prefix" -a -n "$given_prefix"; then
+  # And if so, warn when they don't match
+  if test "$kde_libs_prefix" != "$given_prefix"; then
+    # And if kde doesn't know about the prefix yet
+    echo ":"`kde-config --path exe`":" | grep ":$given_prefix/bin/:" 2>&1 >/dev/null
+    if test $? -ne 0; then
+      echo ""
+      echo "Warning: you chose to install this package in $given_prefix,"
+      echo "but KDE was found in $kde_libs_prefix."
+      echo "For this to work, you will need to tell KDE about the new prefix, by ensuring"
+      echo "that KDEDIRS contains it, e.g. export KDEDIRS=$given_prefix:$kde_libs_prefix"
+      echo "Then restart KDE."
+      echo ""
+    fi
+  fi
+fi
+
+if test x$GXX = "xyes" -a x$kde_have_gcc_visibility = "xyes" -a x$kde_cv_val_qt_gcc_visibility_patched = "xno"; then
+  echo ""
+  echo "Your GCC supports symbol visibility, but the patch for Qt supporting visibility"
+  echo "was not included. Therefore, GCC symbol visibility support remains disabled."
+  echo ""
+  echo "For better performance, consider including the Qt visibility supporting patch"
+  echo "located at:"
+  echo ""
+  echo "http://bugs.kde.org/show_bug.cgi?id=109386"
+  echo ""
+  echo "and recompile all of Qt and KDE. Note, this is entirely optional and"
+  echo "everything will continue to work just fine without it."
+  echo ""
+fi
+
+if test "$all_tests" = "bad"; then
+  if test ! "$cache_file" = "/dev/null"; then
+    echo ""
+    echo "Please remove the file $cache_file after changing your setup"
+    echo "so that configure will find the changes next time."
+    echo ""
+  fi
+else
+  echo ""
+  echo "Good - your configure finished. Start make now"
+  echo ""
+fi
diff --git a/configure.in.in b/configure.in.in
new file mode 100644
index 0000000..de9fbf2
--- /dev/null
+++ b/configure.in.in
@@ -0,0 +1,122 @@
+#MIN_CONFIG(3)
+
+AM_INIT_AUTOMAKE(piklab, 0.15.2)
+
+dnl CXXFLAGS="$NOOPT_CXXFLAGS" dnl __kdevelop[noopt]__
+dnl CFLAGS="$NOOPT_CFLAGS" dnl __kdevelop[noopt]__
+dnl CXXFLAGS="$CXXFLAGS $USE_EXCEPTIONS" dnl __kdevelop[exc]__
+
+dnl KDE_NEED_FLEX dnl __kdevelop__
+dnl AC_PROG_YACC dnl __kdevelop__
+
+# --------------------------------------------------------------------------
+# check os
+case "${host_os}" in
+       *linux* ) OSDIR=linux ;;
+       *bsd*   ) OSDIR=bsd   LDFLAGS="$LDFLAGS $LIBPTHREAD";;
+       *       ) OSDIR=null  ;;
+esac
+AM_CONDITIONAL(BSD, test x$OSDIR = xbsd)
+AM_CONDITIONAL(LINUX, test x$OSDIR = xlinux)
+AM_CONDITIONAL(NULL, test x$OSDIR = xnull)
+AC_C_BIGENDIAN
+
+# --------------------------------------------------------------------------
+# check for parport header (linux)
+AC_CACHE_CHECK([for parport header/ppdev.h], ac_cv_c_ppdev,
+ AC_TRY_COMPILE(
+   [#include <linux/ppdev.h>],
+   [ioctl (1,PPCLAIM,0)],
+   [ac_cv_c_ppdev="yes"],
+   [ac_cv_c_ppdev="no"])
+ )
+if test "$ac_cv_c_ppdev" = "yes"
+then
+   AC_DEFINE(HAVE_PPDEV, 1, [Define if we can use ppdev for parallel port access])
+fi
+
+# check for ppbus header (FreeBSD)
+AC_CACHE_CHECK([for ppbus header/ppi.h], ac_cv_c_ppbus,
+ AC_TRY_COMPILE(
+   [#include <dev/ppbus/ppi.h>],
+   [ioctl (1,PPIGCTRL,0)],
+   [ac_cv_c_ppbus="yes"],
+   [ac_cv_c_ppbus="no"])
+ )
+if test "$ac_cv_c_ppbus" = "yes"
+then
+   AC_DEFINE(HAVE_PPBUS, 1, [Define if we can use ppbus for parallel port access])
+fi
+
+# ----------------------------------------------------------------------------
+# check for libusb
+have_libusb=no
+AC_ARG_ENABLE(libusb, AC_HELP_STRING([--disable-libusb],[do not use libusb]),
+              [ try_libusb="${enableval}" ], [ try_libusb=yes ] )
+if test "x$try_libusb" != xno ; then
+  AC_CHECK_PROG([LIBUSBCONFIG], [libusb-config], [yes])
+  if test "$LIBUSBCONFIG" = "yes" ; then
+    LIBUSB_CFLAGS="$LIBUSB_CFLAGS `libusb-config --cflags`"
+    LIBUSB_LIBS="$LIBUSB_LIBS `libusb-config --libs`"
+    LIBUSB_VERSION="`libusb-config --version`"
+  else
+    AC_MSG_WARN([libusb-config not found.])
+  fi
+  saved_CPPFLAGS="$CPPFLAGS"
+  saved_LIBS="$LIBS"
+  CPPFLAGS="$CPPFLAGS $LIBUSB_CFLAGS"
+  LIBS="$LDFLAGS $LIBUSB_LIBS"
+  AC_CHECK_HEADERS(usb.h, [],
+    [ AC_MSG_ERROR([usb.h not found, use ./configure LIBUSB_CFLAGS=...]) ])
+  AC_MSG_CHECKING([for usb_init])
+  AC_TRY_LINK_FUNC(usb_init, [ AC_MSG_RESULT([yes]) ],
+    [ AC_MSG_ERROR([libusb not found, use ./configure LIBUSB_LIBS=...]) ])
+  CPPFLAGS="$saved_CPPFLAGS"
+  LIBS="$saved_LIBS"
+  have_libusb=yes
+fi
+AC_SUBST(LIBUSB_CFLAGS)
+AC_SUBST(LIBUSB_LIBS)
+if test "$have_libusb" = "yes"
+then
+  AC_DEFINE(HAVE_USB, 1, [Define if libusb is available])
+  AC_DEFINE_UNQUOTED(LIBUSB_VERSION, "$LIBUSB_VERSION", [libusb version])
+fi
+
+# ----------------------------------------------------------------------------
+# check which libcurses
+CPPFLAGS="$CPPFLAGS -L/usr/lib"
+AC_CHECK_LIB(curses, main, CURSESLIB="-lcurses",
+  [AC_CHECK_LIB(ncurses, main, CURSESLIB="-lncurses")]
+)
+
+# ----------------------------------------------------------------------------
+# check for readline
+have_libreadline=no
+AC_ARG_ENABLE(libreadline, AC_HELP_STRING([--disable-libreadline],[do not use libreadline]),
+              [ try_libreadline="${enableval}" ], [ try_libreadline=yes ] )
+if test "x$try_libreadline" != xno ; then
+  LIBREADLINE_LIBS="-lhistory -lreadline $CURSESLIB"
+  AC_CHECK_HEADER(readline/readline.h, HAVE_READLINE=true, [ AC_MSG_WARN([readline/readline.h not found]) ])
+  if test x${HAVE_READLINE} = xtrue ; then
+    saved_CPPFLAGS="$CPPFLAGS"
+    saved_LIBS="$LIBS"
+    LIBS="$LDFLAGS $LIBREADLINE_LIBS"
+    AC_MSG_CHECKING([for rl_initialize])
+    AC_TRY_LINK_FUNC(rl_initialize, [
+      AC_MSG_RESULT([yes])
+      AC_MSG_CHECKING([for using_history])
+      AC_TRY_LINK_FUNC(using_history, [
+        have_libreadline=yes
+        AC_MSG_RESULT([yes])
+      ], [ AC_MSG_ERROR([libhistory not found]) ])
+    ], [ AC_MSG_ERROR([libreadline not found]) ])
+    CPPFLAGS="$saved_CPPFLAGS"
+    LIBS="$saved_LIBS"
+  fi
+fi
+AC_SUBST(LIBREADLINE_LIBS)
+if test "$have_libreadline" = "yes"
+then
+  AC_DEFINE(HAVE_READLINE, 1, [Define if libreadline header is present.])
+fi
diff --git a/configure.in.mid b/configure.in.mid
new file mode 100644
index 0000000..2cd575c
--- /dev/null
+++ b/configure.in.mid
@@ -0,0 +1,4 @@
+dnl put here things which have to be done after all usual autoconf macros
+dnl have been run, but before the Makefiles are created
+
+CXXFLAGS="$CXXFLAGS $KDE_DEFAULT_CXXFLAGS"
diff --git a/doc/Makefile.am b/doc/Makefile.am
new file mode 100644
index 0000000..5eaf9b4
--- /dev/null
+++ b/doc/Makefile.am
@@ -0,0 +1,3 @@
+KDE_LANG = en
+KDE_DOCS = piklab
+
diff --git a/doc/index.docbook b/doc/index.docbook
new file mode 100644
index 0000000..bf0dd88
--- /dev/null
+++ b/doc/index.docbook
@@ -0,0 +1,67 @@
+<?xml version="1.0" ?>
+<!DOCTYPE book PUBLIC "-//KDE//DTD DocBook XML V4.2-Based Variant V1.1//EN" "dtd/kdex.dtd" [
+<!ENTITY % imageobjectco.module "INCLUDE">
+  <!ENTITY piklab "<application>Piklab</application>">
+  <!ENTITY kappname "&piklab;">
+  <!ENTITY % addindex "IGNORE">
+  <!ENTITY % English "INCLUDE">
+]>
+
+<book lang="&language;">
+
+<bookinfo>
+<title>The &piklab; Handbook</title>
+
+<authorgroup>
+<author>
+<personname>
+<firstname>Nicolas</firstname>
+<surname>Hadacek</surname>
+</personname>
+<email>hadacek@kde.org</email>
+</author>
+</authorgroup>
+
+<!-- TRANS:ROLES_OF_TRANSLATORS -->
+
+<copyright>
+<year>2005</year>
+<holder>Nicolas Hadacek</holder>
+</copyright>
+<!--<legalnotice>&FDLNotice;</legalnotice>-->
+
+<date>2006-05-29</date>
+<releaseinfo>0.1</releaseinfo>
+
+<abstract>
+<para>
+&piklab; is an integrated development environment for applications based on Microchip PIC and
+dsPIC microcontrollers similar to the MPLAB environment. Support for several compiler and
+assembler toolchains is integrated. The ICD2 debugger, the PICkit1 and PICkit2 programmers,
+and most direct programmers are supported. A command-line programmer "piklab-prog" is also available.
+</para>
+
+<para>
+Check <ulink
+url="http://piklab.sourceforge.net">&piklab;</ulink> website for up-to-date information and help.
+</para>
+</abstract>
+
+<keywordset>
+<keyword>KDE</keyword>
+</keywordset>
+
+</bookinfo>
+
+</book>
+
+<!--
+Local Variables:
+mode: xml
+sgml-minimize-attributes:nil
+sgml-general-insert-case:lower
+sgml-indent-step:0
+sgml-indent-data:nil
+End:
+
+-->
diff --git a/lib.pro b/lib.pro
new file mode 100644
index 0000000..f1a2917
--- /dev/null
+++ b/lib.pro
@@ -0,0 +1,7 @@
+include($${STOPDIR}/all.pro)
+
+TEMPLATE           = lib
+CONFIG            += staticlib
+win32:DESTDIR      = .\
+unix:CLEAN_FILES  += $${DESTDIR_TARGET}
+win32:QMAKE_CLEAN += $${DESTDIR_TARGET} #not working ??
\ No newline at end of file
diff --git a/man/Makefile.am b/man/Makefile.am
new file mode 100644
index 0000000..d95deac
--- /dev/null
+++ b/man/Makefile.am
@@ -0,0 +1,3 @@
+man_MANS = piklab.1x piklab-prog.1 piklab-hex.1 piklab-coff.1
+
+EXTRA_DIST = $(man_MANS)
diff --git a/man/piklab-coff.1 b/man/piklab-coff.1
new file mode 100644
index 0000000..bc3ba99
--- /dev/null
+++ b/man/piklab-coff.1
@@ -0,0 +1,130 @@
+.\" Hey, EMACS: -*- nroff -*-
+.\" First parameter, NAME, should be all caps
+.\" Second parameter, SECTION, should be 1-8, maybe w/ subsection
+.\" other parameters are allowed: see man(7), man(1)
+.\" Please adjust this date whenever revising the manpage.
+.\" 
+.\" Some roff macros, for reference:
+.\" .nh        disable hyphenation
+.\" .hy        enable hyphenation
+.\" .ad l      left justify
+.\" .ad b      justify to both left and right margins
+.\" .nf        disable filling
+.\" .fi        enable filling
+.\" .br        insert line break
+.\" .sp <n>    insert n+1 empty lines
+.\" for manpage-specific macros, see man(7)
+.TH "PIKLAB" "1" "January 25, 2008" "" ""
+.SH "NAME"
+piklab\-coff \- Command\-line utility to view COFF files.
+.SH "SYNOPSIS"
+.B piklab\-coff [Qt\-options] [KDE\-options] [options] [file]
+.RI 
+
+.SH "DESCRIPTION"
+This manual page documents briefly the
+.B piklab\-coff command.
+
+.\" TeX users may be more comfortable with the \fB<whatever>\fP and
+.\" \fI<whatever>\fP escape sequences to invode bold face and italics,
+.\" respectively.
+\fBPiklab\-coff\fP is a command line tool to view COFF files.
+
+.SH "OPTIONS"
+These programs follow the usual GNU command line syntax, with long
+options starting with two dashes (`\-').
+A summary of options is included below.
+
+Generic options:
+.TP 
+.B \-h, \-\-help
+Show summary of options.
+.TP 
+.B \-v, \-\-version
+Show version of program.
+.TP 
+.B \-\-help\-qt
+	Show Qt specific options
+.TP 
+.B \-\-help\-kde
+	Show KDE specific options
+.TP 
+.B \-\-help\-all
+	Show all options
+.TP 
+.B \-\-author
+	Show author information
+.TP 
+.B \-\-license
+	Show license information
+.TP 
+.B \-\-
+	End of options
+.TP 
+.br 
+
+Options:
+.TP 
+.B \-c, \-\-command <name>
+Perform the requested command.
+.TP 
+.B \-\-command\-list
+Return the list of recognized commands.
+.TP 
+.B \-\-debug
+Display debug messages.
+.TP 
+.B \-\-extra\-debug
+Display extra debug messages.
+.TP 
+.B \-\-max\-debug
+Display all debug messages.
+.TP 
+.B \-\-lowlevel\-debug
+Display low level debug messages.
+.TP 
+.B \-\-quiet
+Do not display messages.
+.TP 
+.B \-f, \-\-force
+Overwrite files and answer "yes" to questions.
+.TP 
+.B \-d, \-\-device <name>
+Target device.
+.TP 
+.B \-\-device\-list
+Return the list of supported devices.
+.sp 3
+.SH "SEE ALSO"
+.BR piklab (1),
+.BR piklab\-prog (1),
+.BR piklab\-hex (1).
+.br 
+.SH "AUTHORS"
+piklab was written by Nicolas Hadacek and many others, including:
+    * Alain Gibaud: author of Pikdev; main infrastructure; IDE interface; direct programmers; gputils integration.
+    * Keith Baker: direct programmer support for 16F7X devices.
+    * Xiaofan Chen: numerous tests of PICkit1/2 and ICD2 programmers.
+    * Craig Franklin: author of gputils (disassembler and coff parser).
+    * Manwlis Giannos: direct programmer support for PIC18FXX2/FXX8 devices.
+    * Stephen Landamore: author of LPLAB (microchip command\-line programmer).
+    * Brian C. Lane: original code for direct programming.
+    * Sébastion Laoût: author of Likeback.
+    * Nestor A. Marchesini: tests of PicStart+ programmer.
+    * Lorenz Mösenlechner and Matthias Kranz: USB support for ICD2 programmer.
+    * Mirko Panciri: direct programmers with bidirectionnal buffers.
+    * Sean A. Walberg: direct programmer support for 16F676/630 devices.
+
+.B Translations:
+    * Michele Petrecca: Italian translation.
+    * Alain Portal: French translation.
+    * Stefan von Halenbach: German translation.
+    * Nagy Lázló: Hungarian translation.
+.sp 3
+.SH "COPYRIGHT"
+This  is  free  software.   You  may  redistribute  copies  of  it  under  the  terms   of   the   GNU   General   Public   License
+       	<http://www.gnu.org/licenses/gpl.html>.  There is NO WARRANTY, to the extent permitted by law.
+
+.PP 
+This manual page was written by Miriam Ruiz <little_miry@yahoo.es>,
+for the Debian project (but may be used by others).
diff --git a/man/piklab-hex.1 b/man/piklab-hex.1
new file mode 100755
index 0000000..4903a43
--- /dev/null
+++ b/man/piklab-hex.1
@@ -0,0 +1,97 @@
+.\" Hey, EMACS: -*- nroff -*-
+.\" First parameter, NAME, should be all caps
+.\" Second parameter, SECTION, should be 1-8, maybe w/ subsection
+.\" other parameters are allowed: see man(7), man(1)
+.\" Please adjust this date whenever revising the manpage.
+.\" 
+.\" Some roff macros, for reference:
+.\" .nh        disable hyphenation
+.\" .hy        enable hyphenation
+.\" .ad l      left justify
+.\" .ad b      justify to both left and right margins
+.\" .nf        disable filling
+.\" .fi        enable filling
+.\" .br        insert line break
+.\" .sp <n>    insert n+1 empty lines
+.\" for manpage-specific macros, see man(7)
+.TH "PIKLAB" "1" "April 11, 2007" "" ""
+.SH "NAME"
+piklab\-hex \- Tool to check INHEX\-files.
+.SH "SYNOPSIS"
+.B piklab\-hex [options] [command] [file].hex
+.RI 
+
+.SH "DESCRIPTION"
+This manual page documents briefly the
+.B piklab\-hex command.
+
+.\" TeX users may be more comfortable with the \fB<whatever>\fP and
+.\" \fI<whatever>\fP escape sequences to invode bold face and italics,
+.\" respectively.
+\fBPiklab\-hex\fP is a command line tool to check files, if they are valid Hex\-files which comply with the INHEX\-Standard defined by Intel corporation.
+
+.SH "OPTIONS"
+This program follows the usual GNU command line syntax, with long
+options starting with two dashes (`\-').
+A summary of options is included below.
+.TP 
+.B \-h, \-\-help
+	Show summary of options.
+.TP 
+.B \-v, \-\-version
+	Show version of program.
+.TP 
+.B \-\-author
+	Show author information
+.TP 
+.B \-\-license
+	Show license information
+.TP 
+.B \-c [command]
+	Option to issue a command.
+.TP 
+.SH "COMMANDS"
+.TP 
+.B check		Check file, if it is a valid intel\-hex\-file.
+.TP 
+.B info			Return information about hex file.
+.TP 
+.B fix			Clean hex file and fix errors (wrong CRC, truncated line, truncated file).
+.TP 
+.B compare		Compare two hex files.
+.TP 
+.br 
+.sp 3
+.SH "SEE ALSO"
+.BR piklab (1),
+.BR piklab\-prog (1),
+.BR piklab\-coff (1).
+.br 
+.SH "AUTHORS"
+piklab was written by Nicolas Hadacek and many others, including:
+    * Alain Gibaud: author of Pikdev; main infrastructure; IDE interface; direct programmers; gputils integration.
+    * Keith Baker: direct programmer support for 16F7X devices.
+    * Xiaofan Chen: numerous tests of PICkit1/2 and ICD2 programmers.
+    * Craig Franklin: author of gputils (disassembler and coff parser).
+    * Manwlis Giannos: direct programmer support for PIC18FXX2/FXX8 devices.
+    * Stephen Landamore: author of LPLAB (microchip command\-line programmer).
+    * Brian C. Lane: original code for direct programming.
+    * Sébastion Laoût: author of Likeback.
+    * Nestor A. Marchesini: tests of PicStart+ programmer.
+    * Lorenz Mösenlechner and Matthias Kranz: USB support for ICD2 programmer.
+    * Mirko Panciri: direct programmers with bidirectionnal buffers.
+    * Sean A. Walberg: direct programmer support for 16F676/630 devices.
+
+.B Translations:
+    * Michele Petrecca: Italian translation.
+    * Alain Portal: French translation.
+    * Stefan von Halenbach: German translation.
+    * Nagy Lázló: Hungarian translation.
+.sp 3
+.SH "COPYRIGHT"
+This  is  free  software.   You  may  redistribute  copies  of  it  under  the  terms   of   the   GNU   General   Public   License
+       	<http://www.gnu.org/licenses/gpl.html>.  There is NO WARRANTY, to the extent permitted by law.
+
+.PP 
+This manual page was written by Stefan <vonHalenbach@users.sf.net>,
+for the Debian project (but may be used by others).
diff --git a/man/piklab-prog.1 b/man/piklab-prog.1
new file mode 100755
index 0000000..6a06f7a
--- /dev/null
+++ b/man/piklab-prog.1
@@ -0,0 +1,164 @@
+.\" Hey, EMACS: -*- nroff -*-
+.\" First parameter, NAME, should be all caps
+.\" Second parameter, SECTION, should be 1-8, maybe w/ subsection
+.\" other parameters are allowed: see man(7), man(1)
+.\" Please adjust this date whenever revising the manpage.
+.\" 
+.\" Some roff macros, for reference:
+.\" .nh        disable hyphenation
+.\" .hy        enable hyphenation
+.\" .ad l      left justify
+.\" .ad b      justify to both left and right margins
+.\" .nf        disable filling
+.\" .fi        enable filling
+.\" .br        insert line break
+.\" .sp <n>    insert n+1 empty lines
+.\" for manpage-specific macros, see man(7)
+.TH "PIKLAB" "1" "April 11, 2007" "" ""
+.SH "NAME"
+piklab\-prog \- Commandline program for PIC\-microcontroller programming.
+.SH "SYNOPSIS"
+.B piklab\-prog [Qt\-options] [KDE\-options] [options] [file]
+.RI 
+
+.br 
+.SH "DESCRIPTION"
+This manual page documents briefly the
+.B piklab\-prog command.
+.PP 
+.\" TeX users may be more comfortable with the \fB<whatever>\fP and
+.\" \fI<whatever>\fP escape sequences to invode bold face and italics,
+.\" respectively.
+\fBPiklab\-prog\fP is a command line tool, which can be used to program microcontrollers with program and data, stored in a HEX\-file to a connected programmer. It supports the most common serial, parallel and usb programmers, like  ICD2, Pickit2, PicStart+) and debuggers (ICD2).
+
+.SH "OPTIONS"
+This program follows the usual GNU command line syntax, with long
+options starting with two dashes (`\-').
+A summary of options is included below.
+.TP 
+.B \-h, \-\-help
+	Show summary of options.
+.TP 
+.B \-v, \-\-version
+	Show version of program.
+.TP 
+.B \-\-help\-qt
+	Show Qt specific options
+.TP 
+.B \-\-help\-kde
+	Show KDE specific options
+.TP 
+.B \-\-help\-all
+	Show all options
+.TP 
+.B \-\-author
+	Show author information
+.TP 
+.B \-\-license
+	Show license information
+.TP 
+.B \-\-
+	End of options
+.br 
+.B Options:
+.B \-c, \-\-command <name>
+	Perform the requested command.
+.TP 
+.B \-\-command\-list
+	Return the list of recognized commands.
+.TP 
+.B \-\-debug
+	Display debug messages.
+.TP 
+.B \-\-extra\-debug
+	Display extra debug messages.
+.TP 
+.B \-\-max\-debug
+	Display all debug messages.
+.TP 
+.B \-\-quiet
+	Do not display messages.
+.TP 
+.B \-f, \-\-force
+	Overwrite files and answer "yes" to questions.
+.TP 
+.B \-i, \-\-cli
+	Interactive mode
+.TP 
+.B \-r, \-\-range <name>
+	Memory range to operate on.
+.TP 
+.B \-\-range\-list
+	Return the list of memory ranges.
+.TP 
+.B \-p, \-\-programmer <name>
+	Programmer to use.
+.TP 
+.B \-\-programmer\-list
+	Return the list of supported programmers.
+.TP 
+.B \-d, \-\-device <name>
+	Target device.
+.TP 
+.B \-\-device\-list
+	Return the list of supported devices.
+.TP 
+.B \-f, \-\-format <name>
+	HEX output file format.
+.TP 
+.B \-\-format\-list
+	Return the list of supported HEX file formats.
+.TP 
+.B \-t, \-\-port <name>
+	Programmer port ("usb" or device such as "/dev/ttyS0")
+.TP 
+.B \-\-port\-list
+	Return the list of detected ports.
+.TP 
+.B \-\-firmware\-dir <dir>
+	Firmware directory.
+.TP 
+.B \-\-target\-self\-powered
+	Indicates that device is self\-powered.
+.br 
+.SH "Arguments:"
+.B file  <HEX\-filename for programming>.
+.br 
+.sp 2
+.SH "SEE ALSO"
+.BR piklab\-prog (1),
+.BR piklab\-hex (1),
+.BR piklab\-coff (1), 
+.BR gputils (1),
+.BR sdcc (1).
+.br 
+.SH "AUTHORS"
+piklab was written by Nicolas Hadacek and many others, including:
+
+    * Alain Gibaud: author of Pikdev; main infrastructure; IDE interface; direct programmers; gputils integration.
+
+    * Keith Baker: direct programmer support for 16F7X devices.
+    * Xiaofan Chen: numerous tests of PICkit1/2 and ICD2 programmers.
+    * Craig Franklin: author of gputils (disassembler and coff parser).
+    * Manwlis Giannos: direct programmer support for PIC18FXX2/FXX8 devices.
+    * Stephen Landamore: author of LPLAB (microchip command\-line programmer).
+    * Brian C. Lane: original code for direct programming.
+    * Sébastion Laoût: author of Likeback.
+    * Nestor A. Marchesini: tests of PicStart+ programmer.
+    * Lorenz Mösenlechner and Matthias Kranz: USB support for ICD2 programmer.
+    * Mirko Panciri: direct programmers with bidirectionnal buffers.
+    * Sean A. Walberg: direct programmer support for 16F676/630 devices.
+
+.B Translations:
+    * Michele Petrecca: Italian translation.
+    * Alain Portal: French translation.
+    * Stefan von Halenbach: German translation.
+    * Nagy Lázló: Hungarian translation.
+.sp 2
+.SH "COPYRIGHT"
+This  is  free  software.   You  may  redistribute  copies  of  it  under  the  terms   of   the   GNU   General   Public   License
+       	<http://www.gnu.org/licenses/gpl.html>.  There is NO WARRANTY, to the extent permitted by law.
+
+.PP 
+This manual page was written by Stefan <vonHalenbach@users.sf.net>,
+for the Debian project (but may be used by others).
diff --git a/man/piklab.1x b/man/piklab.1x
new file mode 100755
index 0000000..6d3ed55
--- /dev/null
+++ b/man/piklab.1x
@@ -0,0 +1,99 @@
+.\" Hey, EMACS: -*- nroff -*-
+.\" First parameter, NAME, should be all caps
+.\" Second parameter, SECTION, should be 1-8, maybe w/ subsection
+.\" other parameters are allowed: see man(7), man(1)
+.\" Please adjust this date whenever revising the manpage.
+.\" 
+.\" Some roff macros, for reference:
+.\" .nh        disable hyphenation
+.\" .hy        enable hyphenation
+.\" .ad l      left justify
+.\" .ad b      justify to both left and right margins
+.\" .nf        disable filling
+.\" .fi        enable filling
+.\" .br        insert line break
+.\" .sp <n>    insert n+1 empty lines
+.\" for manpage-specific macros, see man(7)
+.TH "PIKLAB" "1" "April 11, 2007" "" ""
+.SH "NAME"
+piklab \- IDE for PIC\-microcontroller development.
+.TP 
+.SH "SYNOPSIS"
+.B piklab [Qt\-options] [KDE\-options] [file]
+
+.br 
+.\" TeX users may be more comfortable with the \fB<whatever>\fP and
+.\" \fI<whatever>\fP escape sequences to invode bold face and italics,
+.\" respectively.
+\fBPiklab\fP is an integrated development environment for applications based on Microchip PIC and dsPIC microcontrollers
+similar to the MPLAB environment. It integrates with several compiler and assembler toolchains (like gputils, sdcc, c18) and with the
+simulator gpsim. It supports the most common programmers (serial, parallel, ICD2, Pickit2, PicStart+) and debuggers (ICD2).
+
+.TP 
+.SH "OPTIONS"
+These programs follow the usual GNU command line syntax, with long
+options starting with two dashes (`\-').
+A summary of options is included below.
+.TP 
+.B \-h, \-\-help
+Show summary of options.
+.TP 
+.B \-v, \-\-version
+Show version of program.
+.TP 
+.B \-\-help\-qt
+	Show Qt specific options
+.TP 
+.B \-\-help\-kde
+	Show KDE specific options
+.TP 
+.B \-\-help\-all
+	Show all options
+.TP 
+.B \-\-author
+	Show author information
+.TP 
+.B \-\-license
+	Show license information
+.TP 
+.B \-\-
+	End of options
+.TP 
+.br 
+.sp 3
+.SH "SEE ALSO"
+.BR piklab\-prog (1),
+.BR piklab\-hex (1),
+.BR piklab\-coff (1),  
+.BR gputils (1),
+.BR sdcc (1).
+.br 
+.SH "AUTHORS"
+piklab was written by Nicolas Hadacek and many others, including:
+
+    * Alain Gibaud: author of Pikdev; main infrastructure; IDE interface; direct programmers; gputils integration.
+    * Keith Baker: direct programmer support for 16F7X devices.
+    * Xiaofan Chen: numerous tests of PICkit1/2 and ICD2 programmers.
+    * Craig Franklin: author of gputils (disassembler and coff parser).
+    * Manwlis Giannos: direct programmer support for PIC18FXX2/FXX8 devices.
+    * Stephen Landamore: author of LPLAB (microchip command\-line programmer).
+    * Brian C. Lane: original code for direct programming.
+    * Sébastion Laoût: author of Likeback.
+    * Nestor A. Marchesini: tests of PicStart+ programmer.
+    * Lorenz Mösenlechner and Matthias Kranz: USB support for ICD2 programmer.
+    * Mirko Panciri: direct programmers with bidirectionnal buffers.
+    * Sean A. Walberg: direct programmer support for 16F676/630 devices.
+
+.B Translations:
+    * Michele Petrecca: Italian translation.
+    * Alain Portal: French translation.
+    * Stefan von Halenbach: German translation.
+    * Nagy Lázló: Hungarian translation.
+.sp 3
+.SH "COPYRIGHT"
+This  is  free  software.   You  may  redistribute  copies  of  it  under  the  terms   of   the   GNU   General   Public   License
+       	<http://www.gnu.org/licenses/gpl.html>.  There is NO WARRANTY, to the extent permitted by law.
+
+.PP 
+This manual page was written by Stefan <vonHalenbach@users.sf.net>,
+for the Debian project (but may be used by others).
diff --git a/piklab-prog-qt3.spec b/piklab-prog-qt3.spec
new file mode 100644
index 0000000..c3e7411
--- /dev/null
+++ b/piklab-prog-qt3.spec
@@ -0,0 +1,96 @@
+%define name     piklab-prog-qt3
+%define version  0.15.2
+%define release  %mkrel 1
+
+Summary:       Command-line programmer and debugger for PIC and dsPIC microcontrollers
+Name:          %{name}
+Version:       %{version}
+Release:       %{release}
+Source0:       piklab-%{version}.tar.bz2
+License:       GPL
+Group:         Development/Other
+Url:           http://piklab.sourceforge.net/
+BuildRoot:     %{_tmppath}/%{name}-%{version}-%{release}-buildroot
+BuildRequires: qt3-devel
+BuildRequires: libusb-devel libreadline-devel ncurses-devel
+
+Conflicts:     piklab piklab-prog-qt4
+Packager:      hadacek@kde.org
+Provides:      piklab-prog piklab-hex
+
+%description
+"piklab-prog" is a command-line programmer and debugger for PIC and dsPIC
+microcontrollers. It supports GPSim, and several Microchip and direct
+programmers.
+"piklab-hex" is a command-line utility to manipulate hex files.
+
+%prep
+%setup -q -n piklab-%{version}
+
+%build
+cd %_builddir/%buildsubdir
+qmake piklab-prog.pro
+#%make uses -j3 which fails
+%__make
+
+%install
+rm -rf %{buildroot}
+%__mkdir_p %{buildroot}/%{_bindir}
+cd %_builddir/%buildsubdir/src/piklab-prog
+%__install -s -m 755 piklab-prog %{buildroot}/%{_bindir}/piklab-prog
+cd %_builddir/%buildsubdir/src/piklab-hex
+%__install -s -m 755 piklab-hex %{buildroot}/%{_bindir}/piklab-hex
+%__mkdir_p %{buildroot}/%{_mandir}/man1
+cd %_builddir/%buildsubdir/man
+%__install -m 755 piklab-prog.1 %{buildroot}/%{_mandir}/man1/piklab-prog.1
+%__install -m 755 piklab-hex.1 %{buildroot}/%{_mandir}/man1/piklab-hex.1
+
+%clean
+rm -rf %{buildroot}
+
+%files
+%defattr(-,root,root,0755)
+%doc README INSTALL COPYING Changelog TODO
+%{_bindir}/*
+%{_mandir}/man1/*
+
+# --- changelog -----------------------------------------------------
+%changelog
+* Sun Nov 25 2007 Nicolas Hadacek <hadacek@kde.org> 0.15.2-1mdv2008.0
+- new upstream release
+* Sun Nov 11 2007 Nicolas Hadacek <hadacek@kde.org> 0.15.1-1mdv2008.0
+- fixes
+* Sat Oct 20 2007 Nicolas Hadacek <hadacek@kde.org> 0.15.0-1mdv2007.0
+- new release
+* Fri Aug 17 2007 Nicolas Hadacek <hadacek@kde.org> 0.14.5-1mdv2007.0
+- fix
+* Sun Aug 5 2007 Nicolas Hadacek <hadacek@kde.org> 0.14.4-1mdv2007.0
+- fixes
+* Fri Jul 27 2007 Nicolas Hadacek <hadacek@kde.org> 0.14.3-1mdk
+- fixes + new features
+* Mon Apr 9 2007 Nicolas Hadacek <hadacek@kde.org> 0.14.2-1mdk
+- fixes + new features
+* Sun Mar 11 2007 Nicolas Hadacek <hadacek@kde.org> 0.14.1-1mdk
+- fixes + new feature
+* Sun Mar 4 2007 Nicolas Hadacek <hadacek@kde.org> 0.14.0-1mdk
+- new version
+* Thu Feb 8 2007 Nicolas Hadacek <hadacek@kde.org> 0.13.3-1mdk
+- fixes
+* Wed Jan 31 2007 Nicolas Hadacek <hadacek@kde.org> 0.13.2-1mdk
+- fixes
+* Sun Jan 28 2007 Nicolas Hadacek <hadacek@kde.org> 0.13.1-1mdk
+- fixes
+* Fri Jan 19 2007 Nicolas Hadacek <hadacek@kde.org> 0.13.0-1mdk
+- new version
+* Mon Oct 16 2006 Nicolas Hadacek <hadacek@kde.org> 0.12.2-1mdk
+- fixes
+* Sun Oct 15 2006 Nicolas Hadacek <hadacek@kde.org> 0.12.1-1mdk
+- fixes
+* Sun Oct 1 2006 Nicolas Hadacek <hadacek@kde.org> 0.12.0-1mdk
+- new version
+* Tue Sep 5 2006 Nicolas Hadacek <hadacek@kde.org> 0.11.2-1mdk
+- more fixes
+* Wed Aug 23 2006 Nicolas Hadacek <hadacek@kde.org> 0.11.1-1mdk
+- some fixes
+* Sun Aug 20 2006 Nicolas Hadacek <hadacek@kde.org> 0.11.0-1mdk
+- new version
diff --git a/piklab-prog-qt4.spec b/piklab-prog-qt4.spec
new file mode 100644
index 0000000..3759376
--- /dev/null
+++ b/piklab-prog-qt4.spec
@@ -0,0 +1,99 @@
+%define name     piklab-prog-qt4
+%define version  0.15.2
+%define release  %mkrel 1
+
+Summary:       Command-line programmer and debugger for PIC and dsPIC microcontrollers
+Name:          %{name}
+Version:       %{version}
+Release:       %{release}
+Source0:       piklab-%{version}.tar.bz2
+License:       GPL
+Group:         Development/Other
+Url:           http://piklab.sourceforge.net/
+BuildRoot:     %{_tmppath}/%{name}-%{version}-%{release}-buildroot
+BuildRequires: qt3-devel
+BuildRequires: libusb-devel libreadline-devel ncurses-devel
+
+Conflicts:     piklab piklab-prog-qt3
+Packager:      hadacek@kde.org
+Provides:      piklab-prog piklab-hex
+
+%description
+"piklab-prog" is a command-line programmer and debugger for PIC and dsPIC
+microcontrollers. It supports GPSim, and several Microchip and direct
+programmers.
+"piklab-hex" is a command-line utility to manipulate hex files.
+
+%prep
+%setup -q -n piklab-%{version}
+
+%build
+export QTDIR=%_prefix/%{_lib}/qt4
+export LD_LIBRARY_PATH=$QTDIR/%{_lib}:$LD_LIBRARY_PATH
+export PATH=$QTDIR/bin:$PATH
+export QTLIB=$QTDIR/%{_lib}
+cd %_builddir/%buildsubdir
+qmake piklab-prog.pro
+%make -j1
+
+%install
+rm -rf %{buildroot}
+%__mkdir_p %{buildroot}/%{_bindir}
+cd %_builddir/%buildsubdir/src/piklab-prog
+%__install -s -m 755 piklab-prog %{buildroot}/%{_bindir}/piklab-prog
+cd %_builddir/%buildsubdir/src/piklab-hex
+%__install -s -m 755 piklab-hex %{buildroot}/%{_bindir}/piklab-hex
+%__mkdir_p %{buildroot}/%{_mandir}/man1
+cd %_builddir/%buildsubdir/man
+%__install -m 755 piklab-prog.1 %{buildroot}/%{_mandir}/man1/piklab-prog.1
+%__install -m 755 piklab-hex.1 %{buildroot}/%{_mandir}/man1/piklab-hex.1
+
+%clean
+rm -rf %{buildroot}
+
+%files
+%defattr(-,root,root,0755)
+%doc README INSTALL COPYING Changelog TODO
+%{_bindir}/*
+%{_mandir}/man1/*
+
+# --- changelog -----------------------------------------------------
+%changelog
+* Sun Nov 25 2007 Nicolas Hadacek <hadacek@kde.org> 0.15.2-1mdv2008.0
+- new upstream release
+* Sun Nov 11 2007 Nicolas Hadacek <hadacek@kde.org> 0.15.1-1mdv2008.0
+- fixes
+* Sat Oct 20 2007 Nicolas Hadacek <hadacek@kde.org> 0.15.0-1mdv2007.0
+- new release
+* Fri Aug 17 2007 Nicolas Hadacek <hadacek@kde.org> 0.14.5-1mdv2007.0
+- fix
+* Sun Aug 5 2007 Nicolas Hadacek <hadacek@kde.org> 0.14.4-1mdv2007.0
+- fixes
+* Fri Jul 27 2007 Nicolas Hadacek <hadacek@kde.org> 0.14.3-1mdk
+- fixes + new features
+* Mon Apr 9 2007 Nicolas Hadacek <hadacek@kde.org> 0.14.2-1mdk
+- fixes + new features
+* Sun Mar 11 2007 Nicolas Hadacek <hadacek@kde.org> 0.14.1-1mdk
+- fixes + new feature
+* Sun Mar 4 2007 Nicolas Hadacek <hadacek@kde.org> 0.14.0-1mdk
+- new version
+* Thu Feb 8 2007 Nicolas Hadacek <hadacek@kde.org> 0.13.3-1mdk
+- fixes
+* Wed Jan 31 2007 Nicolas Hadacek <hadacek@kde.org> 0.13.2-1mdk
+- fixes
+* Sun Jan 28 2007 Nicolas Hadacek <hadacek@kde.org> 0.13.1-1mdk
+- fixes
+* Fri Jan 19 2007 Nicolas Hadacek <hadacek@kde.org> 0.13.0-1mdk
+- new version
+* Mon Oct 16 2006 Nicolas Hadacek <hadacek@kde.org> 0.12.2-1mdk
+- fixes
+* Sun Oct 15 2006 Nicolas Hadacek <hadacek@kde.org> 0.12.1-1mdk
+- fixes
+* Sun Oct 1 2006 Nicolas Hadacek <hadacek@kde.org> 0.12.0-1mdk
+- new version
+* Tue Sep 5 2006 Nicolas Hadacek <hadacek@kde.org> 0.11.2-1mdk
+- more fixes
+* Wed Aug 23 2006 Nicolas Hadacek <hadacek@kde.org> 0.11.1-1mdk
+- some fixes
+* Sun Aug 20 2006 Nicolas Hadacek <hadacek@kde.org> 0.11.0-1mdk
+- new version
diff --git a/piklab-prog.pro b/piklab-prog.pro
new file mode 100644
index 0000000..5cf2d6d
--- /dev/null
+++ b/piklab-prog.pro
@@ -0,0 +1,2 @@
+TEMPLATE = subdirs
+SUBDIRS  = src
diff --git a/piklab.kdevelop b/piklab.kdevelop
new file mode 100644
index 0000000..301c3f8
--- /dev/null
+++ b/piklab.kdevelop
@@ -0,0 +1,265 @@
+<!DOCTYPE kdevelop>
+<kdevelop>
+  <general>
+    <author>Nicolas Hadacek</author>
+    <email>hadacek@kde.org</email>
+    <projectmanagement>KDevKDEAutoProject</projectmanagement>
+    <primarylanguage>C++</primarylanguage>
+    <keywords>
+      <keyword>KDE</keyword>
+      <keyword>Qt</keyword>
+    </keywords>
+    <projectdirectory>.</projectdirectory>
+    <absoluteprojectpath>false</absoluteprojectpath>
+    <version>$VERSION</version>
+    <description/>
+    <ignoreparts>
+      <part>kdevabbrev</part>
+      <part>kdevbookmarks</part>
+      <part>kdevclassview</part>
+      <part>kdevsnippet</part>
+      <part>kdevctags2</part>
+      <part>kdevdocumentation</part>
+      <part>kdevdoxygen</part>
+      <part>kdevfilegroups</part>
+      <part>kdevfileselector</part>
+      <part>kdevfileview</part>
+      <part>kdevopenwith</part>
+      <part>kdevpartexplorer</part>
+      <part>kdevquickopen</part>
+      <part>kdevscripting</part>
+      <part>kdevfilter</part>
+      <part>kdevtexttools</part>
+      <part>kdevtools</part>
+      <part>kdevvalgrind</part>
+    </ignoreparts>
+    <secondaryLanguages/>
+    <versioncontrol/>
+    <projectname>piklab</projectname>
+    <defaultencoding/>
+  </general>
+  <kdevautoproject>
+    <general>
+      <mainprogram>pikdev</mainprogram>
+      <activetarget>src/piklab/piklab</activetarget>
+      <useconfiguration>default</useconfiguration>
+    </general>
+    <configure>
+      <configargs>--prefix=/usr\s</configargs>
+    </configure>
+    <make>
+      <abortonerror>false</abortonerror>
+      <numberofjobs>1</numberofjobs>
+      <dontact>false</dontact>
+      <makebin/>
+      <envvars>
+        <envvar value="1" name="WANT_AUTOCONF_2_5" />
+        <envvar value="1" name="WANT_AUTOMAKE_1_6" />
+      </envvars>
+      <prio>0</prio>
+      <runmultiplejobs>false</runmultiplejobs>
+    </make>
+    <compiler>
+      <cflags/>
+      <cxxflags>\s-O0</cxxflags>
+    </compiler>
+    <run>
+      <directoryradio>executable</directoryradio>
+      <customdirectory>/</customdirectory>
+      <mainprogram>src/piklab/piklab</mainprogram>
+      <programargs/>
+      <terminal>false</terminal>
+      <autocompile>true</autocompile>
+      <envvars/>
+      <runarguments>
+        <xml_to_data/>
+        <piklab/>
+        <piklab-prog/>
+        <pickit2_to_data/>
+        <usb_log_filter/>
+        <dev_parser/>
+        <xml_to_data_device/>
+        <html_generator/>
+        <xml_to_data_direct/>
+        <xml_to_data_icd2/>
+        <xml_to_data_pickit2/>
+        <xml_to_pic/>
+        <xml_to_mem24/>
+        <xml_to_data_pickit1/>
+        <xml_coff_parser/>
+        <syntax_xml_generator/>
+        <xml_direct_parser/>
+        <xml_icd2_parser/>
+        <xml_pickit2_parser/>
+        <xml_pickit1_parser/>
+        <xml_icd1_parser/>
+        <xml_psp_parser/>
+      </runarguments>
+    </run>
+    <configurations>
+      <default>
+        <envvars/>
+        <configargs>--enable-debug=full</configargs>
+        <builddir/>
+        <topsourcedir/>
+        <cppflags/>
+        <ldflags/>
+        <ccompiler>kdevgccoptions</ccompiler>
+        <cxxcompiler>kdevgppoptions</cxxcompiler>
+        <f77compiler>kdevpgf77options</f77compiler>
+        <ccompilerbinary/>
+        <cxxcompilerbinary/>
+        <f77compilerbinary/>
+        <cflags/>
+        <cxxflags>-pedantic</cxxflags>
+        <f77flags/>
+      </default>
+    </configurations>
+  </kdevautoproject>
+  <kdevfileview>
+    <groups>
+      <group pattern="*.h;*.hh;*.hxx;*.hpp;*.H" name="En-têtes" />
+      <group pattern="*.cpp;*.c;*.cc;*.C;*.cxx;*.ec;*.ecpp;*.lxx;*.l++;*.ll;*.l" name="Sources" />
+      <group pattern="*.kdevdlg;*.ui;*.rc;*.dlg" name="Interface utilisateur" />
+      <group pattern="*.po" name="Traductions" />
+      <group pattern="*" name="Autres" />
+      <hidenonprojectfiles>false</hidenonprojectfiles>
+      <hidenonlocation>false</hidenonlocation>
+    </groups>
+    <tree>
+      <showvcsfields>true</showvcsfields>
+      <hidenonprojectfiles>false</hidenonprojectfiles>
+      <hidepatterns>*.o,*.lo,CVS</hidepatterns>
+    </tree>
+  </kdevfileview>
+  <kdevdoctreeview>
+    <ignoretocs>
+      <toc>gtk</toc>
+      <toc>gnustep</toc>
+      <toc>python</toc>
+      <toc>php</toc>
+      <toc>perl</toc>
+    </ignoretocs>
+  </kdevdoctreeview>
+  <kdevdebugger>
+    <general>
+      <dbgshell>libtool</dbgshell>
+      <programargs/>
+      <gdbpath/>
+      <configGdbScript/>
+      <runShellScript/>
+      <runGdbScript/>
+      <breakonloadinglibs>true</breakonloadinglibs>
+      <separatetty>false</separatetty>
+      <floatingtoolbar>false</floatingtoolbar>
+    </general>
+    <display>
+      <staticmembers>false</staticmembers>
+      <demanglenames>true</demanglenames>
+      <outputradix>10</outputradix>
+    </display>
+  </kdevdebugger>
+  <kdevcppsupport>
+    <references/>
+    <codecompletion>
+      <includeGlobalFunctions>false</includeGlobalFunctions>
+      <includeTypes>false</includeTypes>
+      <includeEnums>false</includeEnums>
+      <includeTypedefs>false</includeTypedefs>
+      <automaticCodeCompletion>false</automaticCodeCompletion>
+      <automaticArgumentsHint>false</automaticArgumentsHint>
+      <automaticHeaderCompletion>true</automaticHeaderCompletion>
+      <codeCompletionDelay>250</codeCompletionDelay>
+      <argumentsHintDelay>400</argumentsHintDelay>
+      <headerCompletionDelay>250</headerCompletionDelay>
+      <showOnlyAccessibleItems>false</showOnlyAccessibleItems>
+      <completionBoxItemOrder>0</completionBoxItemOrder>
+      <howEvaluationContextMenu>true</howEvaluationContextMenu>
+      <showCommentWithArgumentHint>true</showCommentWithArgumentHint>
+      <statusBarTypeEvaluation>false</statusBarTypeEvaluation>
+      <namespaceAliases>std=_GLIBCXX_STD;__gnu_cxx=std</namespaceAliases>
+      <processPrimaryTypes>true</processPrimaryTypes>
+      <processFunctionArguments>false</processFunctionArguments>
+      <preProcessAllHeaders>false</preProcessAllHeaders>
+      <parseMissingHeaders>false</parseMissingHeaders>
+      <resolveIncludePaths>true</resolveIncludePaths>
+      <alwaysParseInBackground>true</alwaysParseInBackground>
+      <usePermanentCaching>true</usePermanentCaching>
+      <alwaysIncludeNamespaces>false</alwaysIncludeNamespaces>
+      <includePaths>.;</includePaths>
+      <parseMissingHeadersExperimental>false</parseMissingHeadersExperimental>
+      <resolveIncludePathsUsingMakeExperimental>false</resolveIncludePathsUsingMakeExperimental>
+    </codecompletion>
+    <creategettersetter>
+      <prefixGet/>
+      <prefixSet>set</prefixSet>
+      <prefixVariable>m_,_</prefixVariable>
+      <parameterName>theValue</parameterName>
+      <inlineGet>true</inlineGet>
+      <inlineSet>true</inlineSet>
+    </creategettersetter>
+    <qt>
+      <used>true</used>
+      <version>3</version>
+      <root>/usr/lib/qt3</root>
+      <includestyle>3</includestyle>
+      <designerintegration>EmbeddedKDevDesigner</designerintegration>
+      <qmake>/usr/lib/qt3/bin/qmake</qmake>
+      <designer>/usr/bin/designer-qt3</designer>
+      <designerpluginpaths/>
+    </qt>
+    <splitheadersource>
+      <enabled>false</enabled>
+      <synchronize>true</synchronize>
+      <orientation>Vertical</orientation>
+    </splitheadersource>
+  </kdevcppsupport>
+  <kdevcvsservice>
+    <recursivewhenupdate>true</recursivewhenupdate>
+    <prunedirswhenupdate>true</prunedirswhenupdate>
+    <createdirswhenupdate>true</createdirswhenupdate>
+    <recursivewhencommitremove>true</recursivewhencommitremove>
+    <revertoptions>-C</revertoptions>
+  </kdevcvsservice>
+  <cppsupportpart>
+    <filetemplates>
+      <interfacesuffix>.h</interfacesuffix>
+      <implementationsuffix>.cpp</implementationsuffix>
+    </filetemplates>
+  </cppsupportpart>
+  <kdevfilecreate>
+    <filetypes/>
+    <useglobaltypes/>
+  </kdevfilecreate>
+  <kdevdocumentation>
+    <projectdoc>
+      <docsystem/>
+      <docurl/>
+      <usermanualurl/>
+    </projectdoc>
+  </kdevdocumentation>
+  <dist>
+    <custom>false</custom>
+    <bzip>false</bzip>
+    <archname/>
+    <appname>Piclab</appname>
+    <version>0.1</version>
+    <release/>
+    <vendor/>
+    <licence/>
+    <summary/>
+    <group/>
+    <packager/>
+    <description/>
+    <changelog/>
+    <devpackage>false</devpackage>
+    <docspackage>false</docspackage>
+    <appicon>false</appicon>
+    <arch>0</arch>
+    <genHTML>false</genHTML>
+    <useRPM>false</useRPM>
+    <ftpkde>false</ftpkde>
+    <appskde>false</appskde>
+    <url/>
+  </dist>
+</kdevelop>
diff --git a/piklab.spec b/piklab.spec
new file mode 100644
index 0000000..7128516
--- /dev/null
+++ b/piklab.spec
@@ -0,0 +1,140 @@
+%define name piklab
+%define version 0.15.2
+%define release %mkrel 1
+
+Summary: IDE for applications based on PIC microcontrollers
+Name: %{name}
+Version: %{version}
+Release: %{release}
+Source0: %{name}-%{version}.tar.bz2
+License: GPL
+Group: Development/Other
+Url: http://piklab.sourceforge.net/
+BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-buildroot
+BuildRequires: kdelibs-devel
+#BuildRequires: kdebase-devel
+BuildRequires: libusb-devel libreadline-devel ncurses-devel
+
+Packager:       hadacek@kde.org
+Conflicts:      piklab-prog-qt3 piklab-prog-qt4
+
+%description
+Piklab is an integrated development environment for applications based on
+PIC microcontrollers. Gputils tools are used for assembling. Microchip
+programmers and several direct programmers are supported.
+
+%prep
+%setup -q -n %{name}-%{version}
+
+%build
+%configure
+# --disable-rpath --with-qt-libraries=$QTDIR/%{_lib}
+%make
+
+%install
+rm -rf %{buildroot}
+%makeinstall
+
+mkdir -p %{buildroot}%{_iconsdir} %{buildroot}%{_miconsdir} %{buildroot}%{_liconsdir}
+convert -resize 16x16 piklab.xpm %{buildroot}%{_miconsdir}/%name.png
+convert -resize 32x32 piklab.xpm %{buildroot}%{_iconsdir}/%name.png
+convert -resize 48x48 piklab.xpm %{buildroot}%{_liconsdir}/%name.png
+
+%find_lang %{name}
+%clean
+rm -rf %{buildroot}
+
+%post
+%{update_menus}
+
+%postun
+%{clean_menus}
+
+%files -f %{name}.lang
+%defattr(755,root,root)
+%{_bindir}/*
+%defattr(644,root,root,755)
+%{_datadir}/apps/%{name}
+%{_datadir}/applications/kde/piklab.desktop
+%{_datadir}/icons/hicolor/*/*/*.png
+%{_datadir}/mimelnk/application/x-piklab.desktop
+%{_datadir}/apps/katepart/syntax/*
+%{_mandir}/man1/*
+%_docdir/HTML/en/%name
+%{_miconsdir}/%name.png
+%{_iconsdir}/%name.png
+%{_liconsdir}/%name.png
+
+%changelog
+* Sun Nov 25 2007 Nicolas Hadacek <hadacek@kde.org> 0.15.2-1mdv2008.0
+- new upstream release
+* Sun Nov 11 2007 Nicolas Hadacek <hadacek@kde.org> 0.15.1-1mdv2008.0
+- fixes
+* Sat Oct 20 2007 Nicolas Hadacek <hadacek@kde.org> 0.15.0-1mdv2007.0
+- new release
+* Fri Aug 17 2007 Nicolas Hadacek <hadacek@kde.org> 0.14.5-1mdv2007.0
+- fix
+* Sun Aug 5 2007 Nicolas Hadacek <hadacek@kde.org> 0.14.4-1mdv2007.0
+- fixes
+* Fri Jul 27 2007 Nicolas Hadacek <hadacek@kde.org> 0.14.3-1mdk
+- fixes + new features
+* Mon Apr 9 2007 Nicolas Hadacek <hadacek@kde.org> 0.14.2-1mdk
+- fixes + new features
+* Sun Mar 11 2007 Nicolas Hadacek <hadacek@kde.org> 0.14.1-1mdk
+- fixes + new feature
+* Sun Mar 4 2007 Nicolas Hadacek <hadacek@kde.org> 0.14.0-1mdk
+- new version
+* Thu Feb 8 2007 Nicolas Hadacek <hadacek@kde.org> 0.13.3-1mdk
+- fixes
+* Wed Jan 31 2007 Nicolas Hadacek <hadacek@kde.org> 0.13.2-1mdk
+- fixes
+* Sun Jan 28 2007 Nicolas Hadacek <hadacek@kde.org> 0.13.1-1mdk
+- fixes
+* Fri Jan 19 2007 Nicolas Hadacek <hadacek@kde.org> 0.13.0-1mdk
+- new version
+* Mon Oct 16 2006 Nicolas Hadacek <hadacek@kde.org> 0.12.2-1mdk
+- fixes
+* Sun Oct 15 2006 Nicolas Hadacek <hadacek@kde.org> 0.12.1-1mdk
+- fixes
+* Sun Oct 1 2006 Nicolas Hadacek <hadacek@kde.org> 0.12.0-1mdk
+- new version
+* Tue Sep 7 2006 Nicolas Hadacek <hadacek@kde.org> 0.11.2-2mdk
+- fix linking of piklab-prog
+* Tue Sep 5 2006 Nicolas Hadacek <hadacek@kde.org> 0.11.2-1mdk
+- more fixes
+* Wed Aug 23 2006 Nicolas Hadacek <hadacek@kde.org> 0.11.1-1mdk
+- some fixes
+* Sun Aug 20 2006 Nicolas Hadacek <hadacek@kde.org> 0.11.0-1mdk
+- new version
+* Thu Jul 6 2006 Nicolas Hadacek <hadacek@kde.org> 0.10.0-1mdk
+- new version
+* Mon May 29 2006 Nicolas Hadacek <hadacek@kde.org> 0.9.0-1mdk
+- new version
+* Sat May 6 2006 Nicolas Hadacek <hadacek@kde.org> 0.8.0-1mdk
+- new version
+* Sat Apr 22 2006 Nicolas Hadacek <hadacek@kde.org> 0.7.0-1mdk
+- new version
+* Wed Mar 23 2006 Nicolas Hadacek <hadacek@kde.org> 0.6.1-1mdk
+- fixes
+* Wed Mar 15 2006 Nicolas Hadacek <hadacek@kde.org> 0.6.0-1mdk
+- new version
+* Wed Mar 1 2006 Nicolas Hadacek <hadacek@kde.org> 0.5.2-1mdk
+- some fixes
+* Tue Feb 28 2006 Nicolas Hadacek <hadacek@kde.org> 0.5.1-1mdk
+- some fixes
+* Sun Feb 26 2006 Nicolas Hadacek <hadacek@kde.org> 0.5.0-1mdk
+- new version
+* Sat Feb 18 2006 Nicolas Hadacek <hadacek@kde.org> 0.4.2-1mdk
+- some fixes
+* Tue Feb 14 2006 Nicolas Hadacek <hadacek@kde.org> 0.4.1-1mdk
+- some fixes
+* Sun Feb 12 2006 Nicolas Hadacek <hadacek@kde.org> 0.4-1mdk
+- new version
+* Sun Jan 22 2006 Nicolas Hadacek <hadacek@kde.org> 0.3.1-1mdk
+- freeze fix for serial ICD2
+* Sat Jan 21 2006 Nicolas Hadacek <hadacek@kde.org> 0.3-1mdk
+- new version
+* Tue Dec 12 2005 Nicolas Hadacek <hadacek@kde.org> 0.2-1mdk
+- new version
+* Thu Jun 29 2005 Nicolas Hadacek <hadacek@kde.org> 0.1-1mdk
+- initial release
diff --git a/piklab.xpm b/piklab.xpm
new file mode 100644
index 0000000..31b5a1a
--- /dev/null
+++ b/piklab.xpm
@@ -0,0 +1,104 @@
+/* XPM */
+static char * pikdev_xpm[] = {
+"32 32 69 1",
+" 	c None",
+".	c #585858",
+"+	c #303030",
+"@	c #FFFF00",
+"#	c #A0A0A4",
+"$	c #DADADA",
+"%	c #BFBFBF",
+"&	c #2F2F2F",
+"*	c #808080",
+"=	c #FFFFFF",
+"-	c #BDBDBD",
+";	c #000000",
+">	c #B9B9B9",
+",	c #2B2B2B",
+"'	c #2D2D2D",
+")	c #2E2E2E",
+"!	c #C0C0C0",
+"~	c #B4B4B4",
+"{	c #272727",
+"]	c #292929",
+"^	c #2A2A2A",
+"/	c #C1C1C3",
+"(	c #B0B0B0",
+"_	c #232323",
+":	c #252525",
+"<	c #1F1F1F",
+"[	c #202020",
+"}	c #262626",
+"|	c #1C1C1C",
+"1	c #222222",
+"2	c #BABABA",
+"3	c #DCDCDC",
+"4	c #B6B6B6",
+"5	c #1E1E1E",
+"6	c #B1B1B1",
+"7	c #9A9A9A",
+"8	c #0F0F0F",
+"9	c #101010",
+"0	c #1A1A1A",
+"a	c #1B1B1B",
+"b	c #ADADAD",
+"c	c #E1E1E1",
+"d	c #969696",
+"e	c #0A0A0A",
+"f	c #0C0C0C",
+"g	c #171717",
+"h	c #181818",
+"i	c #A9A9A9",
+"j	c #D2D2D2",
+"k	c #919191",
+"l	c #060606",
+"m	c #080808",
+"n	c #141414",
+"o	c #151515",
+"p	c #A4A4A4",
+"q	c #8D8D8D",
+"r	c #020202",
+"s	c #040404",
+"t	c #111111",
+"u	c #A0A0A0",
+"v	c #8C8C8C",
+"w	c #010101",
+"x	c #050505",
+"y	c #090909",
+"z	c #0D0D0D",
+"A	c #9C9C9C",
+"B	c #979797",
+"C	c #939393",
+"D	c #8E8E8E",
+"                                ",
+"                                ",
+"     .          ++              ",
+"    .@.        +#$.+%&&         ",
+"   .@@@.      +*$=+-&&.;        ",
+"  .@@@@@.     +$=+-&&.;*.       ",
+"   .@@@@@.  ++.++-&&.;.++*      ",
+"    .@@@@@.+#$.+>,')&#++!&&     ",
+"     .@@@@@.$=+~{]^,')#/&&&&    ",
+"      .@@@@@.+(_:;{]^,')&&&%;   ",
+"       .@@@@@.<[;@:}{]^,')%;;   ",
+"       +.@@@@@|;@@1_:}{]^2;;;;  ",
+"      +*3.@@@@@@@@<[1_:}4;;;=;  ",
+"      +$=+.@@@@@@@|5<[16;;;==.  ",
+"    ++.++789@@@@@@0a|5b;;;===c. ",
+"   +#$=+def;@@@@@@gh0i;;;;;jc.. ",
+"  +*3=+klm;@@@@@@@nop;;;=; +..  ",
+"  +$=+qrs;@@@@@@@@tu;;;==. #+*  ",
+"  .++v;;wrsxlmyefzA;;;===j. +   ",
+"  + ;;v;;;wrsxlmyB;;;;;jj.. +   ",
+"  + ;;;v;;;;wrsxC;;;=; +..#     ",
+"    ;;;;v;;;;;wD;;;==. #+*      ",
+"     ;;;;v;;;;v;;;$$6v. +       ",
+"     ;;;;;v;;v;;;;;6v.. +       ",
+"      ;;;;;vv;;;=; +..#         ",
+"       ;;;;+.;;=$. #+*          ",
+"        ;;;;.;=$6v. +           ",
+"         ;;;.;;6v.. +           ",
+"          ;.;+ ;..#             ",
+"               #;*              ",
+"                ;               ",
+"                ;               "};
diff --git a/po/Makefile.am b/po/Makefile.am
new file mode 100644
index 0000000..0fa209c
--- /dev/null
+++ b/po/Makefile.am
@@ -0,0 +1 @@
+POFILES = AUTO
diff --git a/po/cs.po b/po/cs.po
new file mode 100644
index 0000000..50ff091
--- /dev/null
+++ b/po/cs.po
@@ -0,0 +1,7356 @@
+# translation of cs.po to Czech
+# Czech translations for PACKAGE package.
+# This file is put in the public domain.
+#
+# Milan Horák <stranger@tiscali.cz>, 2007.
+# Milan Horak <stranger@tiscali.cz>, 2007.
+msgid ""
+msgstr ""
+"Project-Id-Version: cs\n"
+"Report-Msgid-Bugs-To: \n"
+"POT-Creation-Date: 2007-11-25 14:15+0100\n"
+"PO-Revision-Date: 2007-06-18 10:07+0200\n"
+"Last-Translator: Milan Horák\n"
+"Language-Team: Czech <cs@li.org>\n"
+"MIME-Version: 1.0\n"
+"Content-Type: text/plain; charset=UTF-8\n"
+"Content-Transfer-Encoding: 8bit\n"
+"Plural-Forms:  nplurals=3; plural=(n==1) ? 0 : (n>=2 && n<=4) ? 1 : 2;\n"
+"X-Generator: KBabel 1.11.4\n"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:802
+msgid ""
+"\n"
+"%1:\n"
+msgstr ""
+"\n"
+"%1:\n"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:946
+msgid ""
+"\n"
+"Arguments:\n"
+msgstr ""
+"\n"
+"Parametry:\n"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:885
+msgid ""
+"\n"
+"Options:\n"
+msgstr ""
+"\n"
+"Přepínače:\n"
+
+#: devices/pic/prog/pic_prog.cpp:109
+msgid "  %1 = %2 V: error in voltage level."
+msgstr "  %1 = %2 V:chybné napětí."
+
+#: progs/icd2/base/icd2_debug_specific.cpp:58
+msgid "  According to ICD2 manual, instruction at address 0x0 should be \"nop\"."
+msgstr "Podle příručky k ICD2 by instrukce na adrese 0x0 měla být \"nop\"."
+
+#: devices/pic/prog/pic_prog.cpp:387
+msgid "  Band gap bits have been preserved."
+msgstr "Bity napěťové reference byly zachovány."
+
+#: devices/pic/prog/pic_prog.cpp:630
+#, fuzzy
+msgid "  Blank check successful"
+msgstr "Zkouška prázdné paměti úspěšná"
+
+#: progs/icd2/base/icd2_debug.cpp:314
+msgid "  Debug executive version: %1"
+msgstr "Ladění prováděcí verze: %1"
+
+#: devices/pic/prog/pic_prog.cpp:626
+#, fuzzy
+msgid "  EPROM device: blank checking first..."
+msgstr "EPROM: zkouška prázdné paměti..."
+
+#: devices/pic/prog/pic_prog.cpp:658 devices/pic/prog/pic_prog.cpp:714
+msgid "  Erasing device"
+msgstr "Mažu zařízení"
+
+#: progs/icd2/base/icd2_prog.cpp:111
+msgid "  Firmware succesfully uploaded."
+msgstr "Firmware úspěšně nahrán."
+
+#: progs/icd2/base/icd2_prog.cpp:82
+msgid "  Incorrect firmware loaded."
+msgstr "Nahrán nesprávný firmware."
+
+#: devices/pic/prog/pic_prog.cpp:360
+msgid "  Osccal backup has been preserved."
+msgstr "Záloha OSCCAL zachována."
+
+#: devices/pic/prog/pic_prog.cpp:355
+msgid "  Osccal backup is unchanged."
+msgstr "Záloha OSCCAL nezměněna."
+
+#: devices/pic/prog/pic_prog.cpp:346
+msgid "  Osccal has been preserved."
+msgstr "OSCCAL zůstala zachována."
+
+#: devices/pic/prog/pic_prog.cpp:341
+msgid "  Osccal is unchanged."
+msgstr "OSCCAL nezměněna. "
+
+#: progs/icd2/base/icd2_debug_specific.cpp:76
+#: progs/icd2/base/icd2_debug_specific.cpp:83
+#: progs/icd2/base/icd2_debug_specific.cpp:166
+#: progs/icd2/base/icd2_debug_specific.cpp:244
+msgid "  PC is not at address %1 (%2)"
+msgstr "PC není na adrese %1 (%2)"
+
+#: devices/pic/prog/pic_prog.cpp:508
+msgid "  Part of device memory is protected (in %1) and cannot be verified."
+msgstr "Část paměti mikrokontroléru je chráněna (v %1) a nemůže být ověřena."
+
+#: devices/pic/prog/pic_prog.cpp:512
+msgid "  Read memory: %1"
+msgstr "Načíst paměť: %1"
+
+#: devices/pic/prog/pic_prog.cpp:334
+msgid "  Replace invalid osccal with backup value."
+msgstr "Nahradit neplatnou OSCCAL záložní hodnotou."
+
+#: progs/base/generic_prog.cpp:101
+msgid "  Set target self powered: %1"
+msgstr "Nastavit cílové zařízení s vlastním napájením: %1"
+
+#: devices/pic/prog/pic_prog.cpp:277
+msgid "  Unknown or incorrect device (Read id is %1)."
+msgstr "Neznámý nebo nesprávný mikrokontrolér (Načtené ID je %1)."
+
+#: progs/pickit2/base/pickit2_prog.cpp:63
+msgid "  Uploading PICkit2 firmware..."
+msgstr "Nahrávám firmware pro PICkit2..."
+
+#: progs/icd2/base/icd2_debug.cpp:247
+msgid "  Verify debug executive"
+msgstr "Ověřit ladění prováděcí části"
+
+#: devices/pic/prog/pic_prog.cpp:505
+msgid "  Verify memory: %1"
+msgstr "Ověřit paměť: %1"
+
+#: progs/icd2/base/icd2_debug.cpp:244
+msgid "  Write debug executive"
+msgstr "Zapsat ladění prováděcí části"
+
+#: devices/pic/prog/pic_prog.cpp:565 devices/pic/prog/pic_prog.cpp:683
+#: devices/pic/prog/pic_prog.cpp:694
+msgid "  Write memory: %1"
+msgstr "Zapsat paměť: %1"
+
+#: devices/pic/pic/pic_group.cpp:31 devices/pic/pic/pic_group.cpp:37
+msgid " (%2 bits)"
+msgstr " (%2 bity)"
+
+#: libgui/project_manager_ui.cpp:106 libgui/project_manager_ui.cpp:175
+msgid " (default)"
+msgstr " (výchozí)"
+
+#: devices/gui/register_view.cpp:72
+msgid " (input)"
+msgstr " (vstup)"
+
+#: devices/pic/pic/pic_group.cpp:38
+msgid " (not programmable)"
+msgstr " (neprogramovatelné)"
+
+#: devices/gui/register_view.cpp:68
+msgid " (output)"
+msgstr " (výstup)"
+
+#: devices/pic/gui/pic_memory_editor.cpp:255
+msgid " - not programmed by default"
+msgstr " - neprogramovatelné (výchozí)"
+
+#: devices/pic/gui/pic_memory_editor.cpp:254
+#, fuzzy
+msgid " - recommended mask: %1"
+msgstr " - maska pro čtení: %1"
+
+#: piklab-coff/main.cpp:176
+#, fuzzy
+msgid " Filename:Line"
+msgstr "Název souboru"
+
+#: piklab-prog/cmdline.cpp:137
+#, fuzzy
+msgid " no port detected."
+msgstr " port nenalezen"
+
+#: piklab-prog/cmdline.cpp:133
+#, fuzzy
+msgid " support disabled."
+msgstr " port nenalezen"
+
+#: tools/gui/toolchain_config_widget.cpp:167
+msgid "\"%1\" found"
+msgstr "\"%1\" nalezeno"
+
+#: tools/gui/toolchain_config_widget.cpp:234
+msgid "\"%1\" not found"
+msgstr "\"%1\" nenalezeno"
+
+#: tools/gui/toolchain_config_widget.cpp:168
+msgid "\"%1\" not recognized"
+msgstr "\"%1\" nerozpoznáno"
+
+#: progs/gpsim/base/gpsim.cpp:68
+#, fuzzy
+msgid "\"gpsim\" unexpectedly exited."
+msgstr "\"gpsim\" nečekaně skončil"
+
+#: coff/base/text_coff.cpp:252 coff/base/text_coff.cpp:257
+msgid "%1 (magic id: %2)"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:221
+msgid "%1 (proc. %2; rev. %3.%4)"
+msgstr "%1 (proc. %2; rev. %3.%4)"
+
+#: devices/pic/base/pic.cpp:215 devices/pic/base/pic.cpp:225
+msgid "%1 (rev. %2)"
+msgstr "%1 (rev. %2)"
+
+#: devices/pic/base/pic.cpp:218
+#, fuzzy
+msgid "%1 (rev. %2.%3)"
+msgstr "%1 (rev. %2)"
+
+#: progs/gui/hardware_config_widget.cpp:178
+msgid "%1 <custom>"
+msgstr "%1 <vlastní>"
+
+#: piklab-prog/cli_interactive.cpp:312
+msgid "%1 = %2"
+msgstr "%1 = %2"
+
+#: progs/gui/hardware_config_widget.cpp:50
+msgid "%1 at %2:"
+msgstr "%1 na %2:"
+
+#: devices/mem24/mem24/mem24_group.cpp:21 devices/pic/pic/pic_group.cpp:36
+msgid "%1 bytes"
+msgstr "%1 bytů"
+
+#: devices/pic/base/pic_config.cpp:308
+msgid "%1 for block %2"
+msgstr "%1 pro blok %2"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:883
+msgid "%1 options"
+msgstr "%1 přepínače"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:647
+msgid "%1 was written by somebody who wants to remain anonymous."
+msgstr "%1 byl napsán někým, kdo chce zůstat neznámý."
+
+#: devices/pic/pic/pic_group.cpp:30
+msgid "%1 words"
+msgstr "%1 slov"
+
+#: devices/pic/gui/pic_memory_editor.cpp:256
+msgid "%1-bit words - mask: %2"
+msgstr "%1-bitových slov - maska: %2"
+
+#: devices/pic/prog/pic_prog.cpp:467
+msgid "%1: Erasing this range only is not supported with this programmer. This will erase the whole chip and restore the other memory ranges."
+msgstr "%1: Mazání jen tohoto rozsahu není zvoleným programátorem podporováno. Tato operace vymaže celý mikrokontrolér a obnoví ostatní rozsahy paměti."
+
+#: libgui/toplevel.cpp:278
+msgid "&Advanced..."
+msgstr "&Pokročilé."
+
+#: devices/gui/memory_editor.cpp:283 libgui/toplevel.cpp:270
+msgid "&Blank Check"
+msgstr "&Kontrola vymazání"
+
+#: libgui/toplevel.cpp:294
+msgid "&Break<Translators: it is the verb>"
+msgstr ""
+
+#: libgui/toplevel.cpp:246
+msgid "&Build Project"
+msgstr "&Sestavit projekt"
+
+#: devices/gui/memory_editor.cpp:275
+msgid "&Clear"
+msgstr "&Vyčistit"
+
+#: libgui/toplevel.cpp:248
+msgid "&Compile File"
+msgstr "Z&kompilovat soubor"
+
+#: libgui/toplevel.cpp:314
+msgid "&Config Generator..."
+msgstr "&Generátor konfigurace..."
+
+#: libgui/likeback.cpp:97
+msgid "&Configure Email Address..."
+msgstr "&Nastavit e-mail."
+
+#: libgui/toplevel.cpp:256
+msgid "&Connect"
+msgstr "&Připojit"
+
+#. i18n: file ./data/app_data/piklabui.rc line 101
+#: rc.cpp:30
+#, no-c-format
+msgid "&Debugger"
+msgstr "&Ladění"
+
+#: libgui/toplevel.cpp:312
+msgid "&Device Information..."
+msgstr "&Informace o mikrokontroléru..."
+
+#: libgui/toplevel.cpp:260
+msgid "&Disconnect"
+msgstr "O&dpojit"
+
+#: libgui/toplevel.cpp:296
+#, fuzzy
+msgid "&Disconnect/Stop"
+msgstr "O&dpojit"
+
+#: devices/gui/memory_editor.cpp:282 libgui/toplevel.cpp:268
+msgid "&Erase"
+msgstr "&Smazat"
+
+#: libgui/toplevel.cpp:310
+#, fuzzy
+msgid "&Find Files..."
+msgstr "Přidat soubor..."
+
+#: libgui/toplevel.cpp:183
+msgid "&New Source File..."
+msgstr "&Nový zdrojový soubor..."
+
+#: libgui/toplevel.cpp:308
+msgid "&Pikloops..."
+msgstr "&Pikloops..."
+
+#: devices/gui/memory_editor.cpp:279 libgui/toplevel.cpp:262
+msgid "&Program"
+msgstr "&Programovat"
+
+#. i18n: file ./data/app_data/piklabui.rc line 63
+#: rc.cpp:21
+#, no-c-format
+msgid "&Project"
+msgstr "&Projekt"
+
+#: devices/gui/memory_editor.cpp:281 libgui/toplevel.cpp:266
+msgid "&Read"
+msgstr "&Načíst"
+
+#: libgui/toplevel.cpp:219
+msgid "&Reset Layout"
+msgstr "Obnovit &Rozvržení"
+
+#: libgui/toplevel.cpp:272 libgui/toplevel.cpp:286
+msgid "&Run"
+msgstr "&Spustit"
+
+#: libgui/device_gui.cpp:90
+msgid "&Select"
+msgstr "&Vybrat"
+
+#: libgui/toplevel.cpp:288
+msgid "&Step"
+msgstr "&Krokovat"
+
+#: libgui/toplevel.cpp:274
+msgid "&Stop"
+msgstr "Za&stavit"
+
+#: libgui/toplevel.cpp:316
+msgid "&Template Generator..."
+msgstr "Generá&tor šablon..."
+
+#: devices/gui/memory_editor.cpp:280 libgui/toplevel.cpp:264
+msgid "&Verify"
+msgstr "O&věřit"
+
+#: devices/gui/memory_editor.cpp:276
+msgid "&Zero"
+msgstr "Vy&nulovat"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:545
+msgid "'%1' missing."
+msgstr "'%1' chybí."
+
+#: devices/pic/gui/pic_memory_editor.cpp:366
+msgid "(backup)"
+msgstr "(záloha)"
+
+#: tools/list/compile_manager.cpp:83 tools/list/compile_manager.cpp:112
+#: tools/list/compile_manager.cpp:137
+msgid "*** Aborted ***"
+msgstr "*** Přerušeno ***"
+
+#: tools/list/compile_process.cpp:143
+msgid "*** Error ***"
+msgstr "*** Chyba ***"
+
+#: tools/list/compile_process.cpp:140
+msgid "*** Exited with status: %1 ***"
+msgstr "*** Ukončeno se zprávou: %1 ***"
+
+#: tools/list/compile_manager.cpp:194 tools/list/compile_manager.cpp:268
+msgid "*** Success ***"
+msgstr "*** Úspěch ***"
+
+#: tools/list/compile_process.cpp:150
+msgid "*** Timeout ***"
+msgstr "*** Timeout ***"
+
+#: common/cli/cli_log.cpp:62
+msgid "*no*"
+msgstr "*ne*"
+
+#: common/cli/cli_log.cpp:62
+msgid "*yes*"
+msgstr "*ano*"
+
+#: progs/base/generic_prog.cpp:28
+msgid "---"
+msgstr "---"
+
+#: devices/pic/base/pic_config.cpp:74
+msgid "00"
+msgstr "00"
+
+#: devices/pic/base/pic_config.cpp:74
+msgid "01"
+msgstr "01"
+
+#: devices/pic/base/pic_config.cpp:75
+msgid "10"
+msgstr "10"
+
+#: tools/jal/jal_generator.cpp:22
+msgid "10MHz crystal"
+msgstr "10MHz krystal"
+
+#: devices/pic/base/pic_config.cpp:75
+msgid "11"
+msgstr "11"
+
+#: devices/pic/base/pic_config.cpp:216
+msgid "12-bit external bus"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:217
+msgid "16-bit external bus"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:53
+#, fuzzy
+msgid "17C Family"
+msgstr "Rodina 17X"
+
+#: devices/pic/base/pic.cpp:54
+#, fuzzy
+msgid "18C Family"
+msgstr "Rodina 18Xx"
+
+#: devices/pic/base/pic.cpp:55
+#, fuzzy
+msgid "18F Family"
+msgstr "Rodina 18Xx"
+
+#: devices/pic/base/pic.cpp:56
+#, fuzzy
+msgid "18J Family"
+msgstr "Rodina 18Xx"
+
+#: devices/pic/base/pic_config.cpp:218
+msgid "20-bit external bus"
+msgstr ""
+
+#: devices/mem24/base/mem24.h:25
+#, fuzzy
+msgid "24 EEPROM"
+msgstr "EEPROM dat"
+
+#: devices/pic/base/pic.cpp:57
+#, fuzzy
+msgid "24F Family"
+msgstr "Rodina 18Xx"
+
+#: devices/pic/base/pic.cpp:58
+#, fuzzy
+msgid "24H Family"
+msgstr "Rodina 18Xx"
+
+#: devices/pic/base/pic.cpp:59
+#, fuzzy
+msgid "30F Family"
+msgstr "Rodina 18Xx"
+
+#: devices/pic/base/pic.cpp:60
+#, fuzzy
+msgid "33F Family"
+msgstr "Rodina 18Xx"
+
+#: devices/pic/base/pic_config.cpp:207
+msgid "4 MHz"
+msgstr "4 MHz"
+
+#: devices/pic/base/pic_config.cpp:222
+msgid "5-bit address mask mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:221
+msgid "7-bit address mask mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:206
+msgid "8 MHz"
+msgstr "8 MHz"
+
+#: libgui/device_gui.cpp:155
+#, fuzzy
+msgid "<Feature>"
+msgstr "Vyspělý"
+
+#: libgui/device_gui.cpp:142
+msgid "<Memory Type>"
+msgstr "<Typ paměti>"
+
+#: libgui/device_gui.cpp:118
+msgid "<Programmer>"
+msgstr "<Programátor>"
+
+#: libgui/device_gui.cpp:150
+#, fuzzy
+msgid "<Status>"
+msgstr "Stav"
+
+#: libgui/device_gui.cpp:130
+msgid "<Toolchain>"
+msgstr "<Sada nástrojů>"
+
+#: tools/boost/boostbasic.cpp:22
+#, fuzzy
+msgid "<a href=\"%1\">BoostBasic Compiler</a> is a Basic compiler distributed by SourceBoost Technologies."
+msgstr "<a href=\"http://www.sourceboost.com/Products/BoostBasic/Overview.html\">BoostBasic Compiler</a> je kompilátor jazyka Basic distribuovaný společností SourceBoost Technologies."
+
+#: tools/boost/boostc.cpp:22
+#, fuzzy
+msgid "<a href=\"%1\">BoostC Compiler</a> is a C compiler distributed by SourceBoost Technologies."
+msgstr "<a href=\"http://www.sourceboost.com/Products/BoostC/Overview.html\">BoostC Compiler</a> je kompilátor jazyka C distribuovaný společností SourceBoost Technologies."
+
+#: tools/boost/boostcpp.cpp:23
+#, fuzzy
+msgid "<a href=\"%1\">BoostC++ Compiler</a> is a C compiler distributed by SourceBoost Technologies."
+msgstr "<a href=\"http://www.sourceboost.com/Products/BoostCpp/Overview.html\">BoostC++ Compiler</a> je kompilátor jazyka C++ distribuovaný společností SourceBoost Technologies."
+
+#: tools/cc5x/cc5x.cpp:55
+#, fuzzy
+msgid "<a href=\"%1\">CC5X</a> is a C compiler distributed by B Knudsen Data."
+msgstr "<a href=\"http://www.bknd.com/cc5x/index.shtml\">CC5X</a> je kompilátor jazyka C distribuovaný společností B Knudsen Data."
+
+#: tools/ccsc/ccsc.cpp:90
+#, fuzzy
+msgid "<a href=\"%1\">CCS Compiler</a> is a C compiler distributed by CCS."
+msgstr "<a href=\"http://www.ccsinfo.com/content.php?page=compilers\">CCS Compiler</a> je kompilátor jazyka C distribuovaný společností CCS."
+
+#: tools/gputils/gputils.cpp:40
+msgid "<a href=\"%1\">GPUtils</a> is an open-source assembler and linker suite.<br>"
+msgstr ""
+
+#: tools/jalv2/jalv2.cpp:31
+msgid "<a href=\"%1\">JAL V2</a> is a new compiler for the high-level language JAL."
+msgstr ""
+
+#: tools/jal/jal.cpp:31
+msgid "<a href=\"%1\">JAL</a> is a high-level language for PIC microcontrollers."
+msgstr ""
+
+#: tools/mpc/mpc.cpp:50
+#, fuzzy
+msgid "<a href=\"%1\">MPC Compiler</a> is a C compiler distributed by Byte Craft."
+msgstr "<a href=\"http://www.bytecraft.com/mpccaps.html\">MPC Compiler</a> je kompilátor jazyka C distribuovaný společností Byte Craft."
+
+#: tools/picc/picc.cpp:119
+#, fuzzy
+msgid "<a href=\"%1\">PICC 18</a> is a C compiler distributed by HTSoft."
+msgstr "<a href=\"http://www.htsoft.com\">PICC 18</a> je kompilátor jazyka C distribuovaný společností HTSoft."
+
+#: tools/picc/picc.cpp:93
+#, fuzzy
+msgid "<a href=\"%1\">PICC-Lite</a> is a freeware C compiler distributed by HTSoft."
+msgstr "<a href=\"http://www.htsoft.com\">PICC-Lite</a>  je volná verze kompilátoru jazyka C distribuovaného společností HTSoft."
+
+#: tools/picc/picc.cpp:106
+#, fuzzy
+msgid "<a href=\"%1\">PICC</a> is a C compiler distributed by HTSoft."
+msgstr "<a href=\"http://www.htsoft.com\">PICC</a> je kompilátor jazyka C distribuovaný společností HTSoft."
+
+#: progs/gui/port_selector.cpp:88
+#, fuzzy
+msgid "<a href=\"%1\">See Piklab homepage for help</a>."
+msgstr "Nápověda na internetu."
+
+#: devices/list/device_list.cpp:16
+msgid "<auto>"
+msgstr "<automaticky>"
+
+#: tools/gui/toolchain_config_widget.cpp:299
+msgid "<b>Device string #%1:</b><br>%2<br>"
+msgstr "<b>Mikrokontrolér #%1:</b><br>%2<br>"
+
+#: tools/gui/toolchain_config_widget.cpp:298
+msgid "<b>Device string:</b><br>%1<br>"
+msgstr "<b>Mikrokontrolér:</b><br>%1<br>"
+
+#: tools/gui/toolchain_config_widget.cpp:271
+msgid "<b>Version string:</b><br>%1<br></qt>"
+msgstr "<b>Verze:</b><br>%1<br></qt>"
+
+#: libgui/hex_editor.cpp:101
+msgid "<b>Warning:</b> hex file seems to be incompatible with the selected device %1:<br>%2"
+msgstr "<b>Upozornění:</b> hex soubor není určen pro zvolený mikrokontrolér %1:<br>%2"
+
+#: libgui/project_manager_ui.cpp:165
+msgid "<default>"
+msgstr "<výchozí>"
+
+#: piklab-prog/cmdline.cpp:411 piklab-prog/cmdline.cpp:426
+#: piklab-prog/cmdline.cpp:431 piklab-prog/cmdline.cpp:435
+msgid "<from config>"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:182
+msgid "<invalid>"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:62
+msgid "<no project>"
+msgstr "<žádný projekt>"
+
+#: devices/pic/pic/pic_group.cpp:54
+msgid "<none>"
+msgstr "<žádný>"
+
+#: piklab-hex/main.cpp:241 piklab-hex/main.cpp:245 piklab-prog/cmdline.cpp:403
+#: piklab-prog/cmdline.cpp:408 piklab-prog/cmdline.cpp:413
+#: piklab-prog/cmdline.cpp:416 piklab-prog/cmdline.cpp:422
+#: piklab-prog/cmdline.cpp:430 piklab-prog/cmdline.cpp:439
+#: piklab-prog/cmdline.cpp:443 piklab-coff/main.cpp:247
+msgid "<not set>"
+msgstr "<nenastaveno>"
+
+#: libgui/likeback.cpp:657
+msgid "<p>Error while trying to send the report.</p><p>Please retry later.</p>"
+msgstr "<p>Chyba při odesílání hlášení.</p><p>Zkuste to prosím později.</p>"
+
+#: libgui/likeback.cpp:659
+msgid "<p>Your comment has been sent successfully. It will help improve the application.</p><p>Thanks for your time.</p>"
+msgstr "<p>Vaše připomínka byla úspěšně odeslána a pomůže nám vylepšit tuto aplikaci.</p><p>Děkujeme za váš čas.</p>"
+
+#: tools/c18/c18.cpp:85
+#, fuzzy
+msgid "<qt><a href=\"%1\">C18</a> is a C compiler distributed by Microchip.</qt>"
+msgstr "<a href=\"http://www.htsoft.com\">PICC 18</a> je kompilátor jazyka C distribuovaný společností HTSoft."
+
+#: tools/gui/toolchain_config_widget.cpp:296
+msgid "<qt><b>Command #%1 for devices detection:</b><br>%2<br>"
+msgstr "<qt><b>Příkaz #%1 pro zjištění mikrokontroléru:</b><br>%2<br>"
+
+#: tools/gui/toolchain_config_widget.cpp:295
+msgid "<qt><b>Command for devices detection:</b><br>%1<br>"
+msgstr "<qt><b>Příkaz pro zjištění mikrokontroléru:</b><br>%1<br>"
+
+#: tools/gui/toolchain_config_widget.cpp:270
+msgid "<qt><b>Command for executable detection:</b><br>%1<br>"
+msgstr "<qt><b>Příkaz pro zjištění spustitelnosti:</b><br>%1<br>"
+
+#: tools/gui/tool_config_widget.cpp:113
+msgid "<qt>This values will be placed after the linked objects.</qt>"
+msgstr "<qt>Tyto hodnoty budou umístěny za připojené objekty.</qt>"
+
+#: piklab-hex/main.cpp:278
+#, fuzzy
+msgid "<value>"
+msgstr "<automaticky>"
+
+#: devices/pic/base/pic.cpp:72
+msgid "ADC"
+msgstr ""
+
+#: coff/base/coff_object.cpp:124
+msgid "Absolute Value"
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:47
+msgid "Access Bank (high)"
+msgstr "Přístup do banky (vysoká)"
+
+#: devices/pic/gui/pic_register_view.cpp:47
+msgid "Access Bank (low)"
+msgstr "Přístup do banky (nízká)"
+
+#: progs/direct/base/direct_mem24.cpp:168
+msgid "Acknowledge bit incorrect"
+msgstr "Nesprávný potvrzovací bit"
+
+#: devices/pic/base/pic_config.cpp:108 devices/pic/base/pic_config.cpp:111
+msgid "Active high"
+msgstr "Aktivní vysoká"
+
+#: devices/pic/base/pic_config.cpp:109 devices/pic/base/pic_config.cpp:112
+msgid "Active low"
+msgstr "Aktivní nízká"
+
+#: libgui/project_manager.cpp:200 libgui/toplevel.cpp:242
+msgid "Add Current File"
+msgstr "Přidat aktuální soubor"
+
+#: libgui/toplevel.cpp:240
+msgid "Add Object File..."
+msgstr "Přidat objektový soubor."
+
+#: libgui/project_manager.cpp:199 libgui/project_manager.cpp:214
+#, fuzzy
+msgid "Add Object Files..."
+msgstr "Přidat objektový soubor."
+
+#: libgui/toplevel.cpp:238
+msgid "Add Source File..."
+msgstr "Přidat zdrojový soubor..."
+
+#: libgui/project_wizard.cpp:149
+msgid "Add Source Files"
+msgstr "Přidat zdrojové soubory"
+
+#: libgui/project_manager.cpp:198 libgui/project_manager.cpp:219
+#, fuzzy
+msgid "Add Source Files..."
+msgstr "Přidat zdrojový soubor..."
+
+#: libgui/project_wizard.cpp:151
+msgid "Add existing files."
+msgstr "Přidat existující soubory."
+
+#: libgui/project_manager.cpp:314
+msgid "Add only"
+msgstr ""
+
+#: libgui/new_dialogs.cpp:66
+msgid "Add to project"
+msgstr "Přidat do projektu"
+
+#: libgui/breakpoint_view.cpp:49 piklab-coff/main.cpp:176
+msgid "Address"
+msgstr "Adresa"
+
+#: devices/pic/base/pic_config.cpp:129
+msgid "Address bus width (in bits)"
+msgstr "Šířka adresové sběrnice (v bitech)"
+
+#: progs/gui/prog_group_ui.cpp:50
+msgid "Advanced Dialog"
+msgstr "Pokročilé"
+
+#: devices/pic/base/pic_config.cpp:393
+msgid "All"
+msgstr "Vše"
+
+#: libgui/toplevel.cpp:553
+msgid "All Files"
+msgstr "Všechny soubory"
+
+#: common/common/purl_base.cpp:117
+msgid "All Object Files"
+msgstr "Všechny objektové soubory"
+
+#: common/common/purl_base.cpp:105
+msgid "All Source Files"
+msgstr "Všechny zdrojové soubory"
+
+#: piklab-prog/cli_interactive.cpp:192
+#, fuzzy
+msgid "All breakpoints removed."
+msgstr "Všechny body přerušení odstraněny"
+
+#: common/global/log.cpp:29
+msgid "All debug messages"
+msgstr "Všechny ladící zprávy"
+
+#: tools/gputils/gputils_config.cpp:13 tools/c18/c18_config.cpp:12
+msgid "All messages"
+msgstr "Všechny zprávy"
+
+#: devices/pic/prog/pic_prog.cpp:191
+#, fuzzy
+msgid "All or part of code memory is protected so it cannot be preserved. Continue anyway?"
+msgstr "Celá paměť kódu nebo její část je chráněná a nemůže být zachována. Přesto pokračovat?"
+
+#: devices/pic/prog/pic_prog.cpp:198
+#, fuzzy
+msgid "All or part of data EEPROM is protected so it cannot be preserved. Continue anyway?"
+msgstr "Celá paměť dat EEPROM nebo její část je chráněná a nemůže být zachována. Přesto pokračovat?"
+
+#: devices/pic/base/pic_config.cpp:271
+msgid "Allow multiple reconfigurations"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:270
+msgid "Allow only one reconfiguration"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:275
+#, fuzzy
+msgid "Alternate"
+msgstr "Alternativy"
+
+#: devices/pic/base/pic_config.cpp:272
+#, fuzzy
+msgid "Alternate I2C pins"
+msgstr "Alternativy"
+
+#: devices/base/device_group.cpp:239
+msgid "Alternatives"
+msgstr "Alternativy"
+
+#: devices/pic/base/pic_config.cpp:105
+msgid "Analog"
+msgstr "Analogový"
+
+#: coff/base/coff.cpp:22
+msgid "Archive"
+msgstr ""
+
+#: libgui/likeback.cpp:135
+msgid "Are you sure you do not want to participate anymore in the application enhancing program?"
+msgstr "Opravdu se již nechcete podílet na vylepšování této aplikace?"
+
+#: piklab-prog/cmdline.cpp:221
+msgid "Argument file type not recognized."
+msgstr "Typ souboru s parametry nerozpoznán."
+
+#: piklab-prog/cli_interactive.cpp:196
+#, fuzzy
+msgid "Argument should be breakpoint index."
+msgstr "Parametr by měl být index bodů přerušení"
+
+#: piklab-prog/cli_interactive.cpp:186
+#, fuzzy
+msgid "Arguments not recognized."
+msgstr "Parametry nerozpoznány"
+
+#: tools/gui/tool_config_widget.cpp:44
+msgid "Arguments:"
+msgstr "Parametry:"
+
+#: coff/base/cdb_parser.cpp:23 coff/base/coff_object.cpp:180
+msgid "Array"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:59
+msgid "Asix Piccolo"
+msgstr "Asix Piccolo"
+
+#: progs/direct/base/direct_prog_config.cpp:61
+msgid "Asix Piccolo Grande"
+msgstr "Asix Piccolo Grande"
+
+#: tools/base/generic_tool.cpp:18 common/common/purl_base.cpp:20
+#: common/common/purl_base.cpp:25
+msgid "Assembler"
+msgstr "Assembler"
+
+#: common/common/purl_base.cpp:33
+msgid "Assembler File"
+msgstr "Soubor assembleru"
+
+#: common/common/purl_base.cpp:34
+msgid "Assembler File for PIC30"
+msgstr "Soubor assembleru pro PIC30"
+
+#: common/common/purl_base.cpp:35
+msgid "Assembler File for PICC"
+msgstr "Soubor assembleru pro PICC"
+
+#: tools/base/generic_tool.cpp:18
+msgid "Assembler:"
+msgstr "Assembler:"
+
+#: devices/base/generic_memory.cpp:34
+msgid "At least one value (at address %1) is defined outside memory ranges."
+msgstr "Nejméně jedna hodnota (na adrese %1) je definována mimo paměťový rozsah."
+
+#: devices/mem24/mem24/mem24_memory.cpp:86 devices/pic/pic/pic_memory.cpp:545
+msgid "At least one word (at offset %1) is larger (%2) than the corresponding mask (%3)."
+msgstr "Nejméně jedno slovo (na offsetu %1) je větší (%2) než odpovídající maska (%3). "
+
+#: common/global/about.cpp:79
+msgid "Author and maintainer."
+msgstr "Autor a správce."
+
+#: common/global/about.cpp:82
+msgid "Author of gputils"
+msgstr "Autor gputils"
+
+#: common/global/about.cpp:83
+msgid "Author of likeback"
+msgstr "Autor likeback"
+
+#: coff/base/coff_object.cpp:147
+#, fuzzy
+msgid "Auto Argument"
+msgstr "Parametry:"
+
+#: tools/gui/tool_config_widget.cpp:24
+msgid "Automatic"
+msgstr "Automatické"
+
+#: coff/base/coff_object.cpp:129
+#, fuzzy
+msgid "Automatic Variable"
+msgstr "Automatické"
+
+#: libgui/global_config.cpp:20
+msgid "Automatically rebuild project before programming if it is modified."
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:351
+msgid "Bad checksum for read block: %1 (%2 expected)."
+msgstr "Špatný kontrolní součet při čtení bloku: %1 (očekáváno %2)."
+
+#: progs/icd2/base/icd2.cpp:232
+msgid "Bad checksum for received string"
+msgstr "Špatný kontrolní součet přijatého řetězce"
+
+#: devices/pic/base/pic_config.cpp:68
+msgid "Bandgap voltage calibration"
+msgstr "Kalibrace referenčního napětí"
+
+#: devices/pic/gui/pic_group_ui.cpp:59
+#: devices/pic/gui/pic_register_view.cpp:61
+msgid "Bank %1"
+msgstr "Banka %1"
+
+#: devices/pic/gui/pic_register_view.cpp:54
+msgid "Bank %1 (high)"
+msgstr "Banka %1 (high)"
+
+#: devices/pic/gui/pic_register_view.cpp:54
+msgid "Bank %1 (low)"
+msgstr "Banka %1 (low)"
+
+#: devices/pic/base/pic.cpp:51
+msgid "Baseline Family"
+msgstr "Základní rodina"
+
+#: common/common/purl_base.cpp:29
+msgid "Basic Compiler"
+msgstr "Kompilátor Basicu"
+
+#: common/common/purl_base.cpp:41
+msgid "Basic Source File"
+msgstr "Zdrojový soubor Basicu"
+
+#: coff/base/coff_object.cpp:149
+msgid "Beginning or End of Block"
+msgstr ""
+
+#: coff/base/coff_object.cpp:150
+msgid "Beginning or End of Function"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:20
+msgid "Bin to Hex"
+msgstr "Bin do Hex"
+
+#: tools/base/generic_tool.cpp:20
+msgid "Bin to Hex:"
+msgstr "Bin do Hex:"
+
+#: common/common/number.cpp:21
+msgid "Binary"
+msgstr "Binární"
+
+#: coff/base/cdb_parser.cpp:55
+#, fuzzy
+msgid "Bit Addressable"
+msgstr "Adresa"
+
+#: coff/base/cdb_parser.cpp:39 coff/base/coff_object.cpp:146
+#, fuzzy
+msgid "Bit Field"
+msgstr "Vypiš soubor"
+
+#: progs/base/generic_prog.cpp:36
+msgid "Blank Checking..."
+msgstr "Kontrola vymazání..."
+
+#: progs/base/prog_config.cpp:74
+msgid "Blank check after erase."
+msgstr "Kontrola vymazání po mazání."
+
+#: piklab-prog/cmdline.cpp:49
+msgid "Blank check device memory."
+msgstr "Kontrola vymazání paměti mikrokontroléru."
+
+#: progs/base/generic_prog.cpp:289
+msgid "Blank checking done."
+msgstr "Kontrola vymazání ukončena."
+
+#: progs/base/generic_prog.cpp:400
+msgid "Blank checking successful."
+msgstr "Kontrola vymazání úspěšná."
+
+#: progs/base/generic_prog.cpp:287 progs/base/generic_prog.cpp:398
+msgid "Blank checking..."
+msgstr "Kontrola vymazání..."
+
+#: piklab-prog/cmdline.cpp:316
+msgid "Blank-checking device memory not supported for specified programmer."
+msgstr "Kontrola vymazání paměti mikrokontroléru není zvoleným programátorem podporována."
+
+#: devices/mem24/mem24/mem24_group.cpp:38
+#: devices/pic/base/pic_protection.cpp:360
+#, fuzzy
+msgid "Block #%1"
+msgstr "Blok %1"
+
+#: tools/boost/boostbasic.h:51
+msgid "BoostBasic Compiler for PIC16"
+msgstr "BoostBasic kompilátor pro PIC16"
+
+#: tools/boost/boostbasic.h:62
+msgid "BoostBasic Compiler for PIC18"
+msgstr "BoostBasic kompilátor proPIC18"
+
+#: tools/boost/boostc.h:51
+msgid "BoostC Compiler for PIC16"
+msgstr "BoostC kompilátor pro PIC16"
+
+#: tools/boost/boostc.h:62
+msgid "BoostC Compiler for PIC18"
+msgstr "BoostC kompilátor pro PIC18"
+
+#: tools/boost/boostcpp.h:51
+msgid "BoostC++ Compiler for PIC16"
+msgstr "BoostC++ kompilátor pro PIC16"
+
+#: tools/boost/boostcpp.h:62
+msgid "BoostC++ Compiler for PIC18"
+msgstr "BoostC++ kompilátor pro PIC18"
+
+#: devices/pic/base/pic_protection.cpp:351
+msgid "Boot Block"
+msgstr "Zaváděcí blok"
+
+#: devices/pic/base/pic_protection.cpp:350
+#, fuzzy
+msgid "Boot Segment"
+msgstr "Příliš málo parametrů."
+
+#: devices/pic/base/pic_config.cpp:125
+msgid "Boot block size"
+msgstr "Velikost zaváděcího bloku"
+
+#: devices/pic/base/pic_config.cpp:23
+msgid "Boot code-protection"
+msgstr "Ochrana spouštěcího kódu"
+
+#: devices/pic/base/pic_config.cpp:233
+#, fuzzy
+msgid "Boot segment EEPROM size"
+msgstr "Velikost zaváděcího bloku"
+
+#: devices/pic/base/pic_config.cpp:234
+msgid "Boot segment RAM size"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:230
+msgid "Boot segment security"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:229
+#, fuzzy
+msgid "Boot segment size"
+msgstr "Velikost zaváděcího bloku"
+
+#: devices/pic/base/pic_config.cpp:228
+#, fuzzy
+msgid "Boot segment write-protection"
+msgstr "Ochrana spouštěče proti zápisu"
+
+#: devices/pic/base/pic_config.cpp:31
+msgid "Boot table read-protection"
+msgstr "Ochrana spouštěcí tabulky proti čtení"
+
+#: devices/pic/base/pic_config.cpp:27
+msgid "Boot write-protection"
+msgstr "Ochrana spouštěče proti zápisu"
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:89
+msgid "Bootloader identified device as: %1"
+msgstr "Zavaděč identifikoval mikrokontrolér jako: %1"
+
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:84
+msgid "Bootloader version %1 detected"
+msgstr "Zavaděč verze %1 detekován"
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:36
+#, fuzzy
+msgid "Bootloader version %1 detected."
+msgstr "Zavaděč verze %1 detekován"
+
+#: progs/base/generic_prog.cpp:231
+#, fuzzy
+msgid "Breaking..."
+msgstr "Mažu..."
+
+#: piklab-prog/cli_interactive.cpp:161
+#, fuzzy
+msgid "Breakpoint already set at %1."
+msgstr "Na %1 již bod přerušení je"
+
+#: piklab-prog/cli_interactive.cpp:201
+#, fuzzy
+msgid "Breakpoint at %1 removed."
+msgstr "Bod přerušení z %1 odstraněn"
+
+#: libgui/gui_debug_manager.cpp:125
+msgid "Breakpoint at non-code line cannot be activated."
+msgstr "Bod přerušení nemůže být mimo řádek s kódem"
+
+#: progs/manager/debug_manager.cpp:142
+msgid "Breakpoint at non-code line."
+msgstr "Bod přerušení mimo řádek s kódem"
+
+#: progs/manager/debug_manager.cpp:147
+msgid "Breakpoint corresponds to several addresses. Using the first one."
+msgstr "Bod přerušení ukazuje na více adres. Používám první z nich."
+
+#: piklab-prog/cli_interactive.cpp:197
+#, fuzzy
+msgid "Breakpoint index too large."
+msgstr "Index bodů přerušení je příliš velký"
+
+#: piklab-prog/cli_interactive.cpp:165
+#, fuzzy
+msgid "Breakpoint set at %1."
+msgstr "Bod přerušení nastaven na %1"
+
+#: libgui/toplevel.cpp:150
+msgid "Breakpoints"
+msgstr "Body přerušení"
+
+#: piklab-prog/cli_interactive.cpp:172
+msgid "Breakpoints:"
+msgstr "Body přerušení:"
+
+#: devices/pic/base/pic_config.cpp:76
+msgid "Brown-out detect"
+msgstr "Detekce brown-out"
+
+#: devices/pic/base/pic_config.cpp:89
+msgid "Brown-out reset software"
+msgstr "Brown-out reset software"
+
+#: devices/pic/base/pic_config.cpp:84
+msgid "Brown-out reset voltage"
+msgstr "Brown-out reset napětí"
+
+#. i18n: file ./data/app_data/piklabui.rc line 76
+#: rc.cpp:24
+#, no-c-format
+msgid "Bu&ild"
+msgstr "Sestav&it"
+
+#: libgui/project_manager.cpp:194
+msgid "Build Project"
+msgstr "Sestavit projekt"
+
+#. i18n: file ./data/app_data/piklabui.rc line 155
+#: rc.cpp:45
+#, no-c-format
+msgid "Build Toolbar"
+msgstr "Nástrojová lišta sestavení"
+
+#: tools/list/compile_manager.cpp:53
+msgid "Building project..."
+msgstr "Sestavuji projekt..."
+
+#: common/common/purl_base.cpp:26
+msgid "C Compiler"
+msgstr "C kompilátor"
+
+#: common/common/purl_base.cpp:39
+msgid "C Header File"
+msgstr "C hlavičkový soubor"
+
+#: common/common/purl_base.cpp:37
+msgid "C Source File"
+msgstr "C zdrojový soubor"
+
+#: libgui/toplevel.cpp:193
+msgid "C&lose All"
+msgstr "&Zavřít vše"
+
+#: common/common/purl_base.cpp:28
+msgid "C++ Compiler"
+msgstr "C++ kompilátor"
+
+#: common/common/purl_base.cpp:38
+msgid "C++ Source File"
+msgstr "C zdrojový soubor"
+
+#: tools/c18/c18.h:42
+msgid "C18 Compiler"
+msgstr "C18 kompilátor"
+
+#: devices/pic/base/pic.cpp:77
+msgid "CAN"
+msgstr ""
+
+#: tools/cc5x/cc5x.h:33
+msgid "CC5X Compiler"
+msgstr "CC5X kompilátor"
+
+#: devices/pic/base/pic.cpp:71
+msgid "CCP"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:88
+msgid "CCP1 multiplex"
+msgstr "CCP1 multiplex"
+
+#: devices/pic/base/pic_config.cpp:87
+msgid "CCP2 multiplex"
+msgstr "CCP2 multiplex"
+
+#: tools/ccsc/ccsc.h:36 coff/base/coff_object.cpp:38
+msgid "CCS Compiler"
+msgstr "CCS kompilátor"
+
+#: common/common/purl_base.cpp:54
+msgid "COD File"
+msgstr "COD soubor"
+
+#: tools/base/generic_tool.cpp:38
+#, fuzzy
+msgid "COFF"
+msgstr "COFF soubor"
+
+#: common/common/purl_base.cpp:55
+msgid "COFF File"
+msgstr "COFF soubor"
+
+#: coff/base/coff.cpp:67 coff/base/coff.cpp:77
+msgid "COFF file is truncated (offset: %1  nbBytes: %2  size:%3)."
+msgstr "COFF soubor ořezán (offset: %1  nbBytů: %2  velikost:%3)."
+
+#: piklab-prog/cli_interactive.cpp:61
+msgid "COFF file to be used for debugging."
+msgstr "COFF soubor pro ladění."
+
+#: piklab-coff/main.cpp:279
+#, fuzzy
+msgid "COFF filename."
+msgstr "Název souboru"
+
+#: coff/base/coff_object.cpp:454
+msgid "COFF format not supported: magic number is %1."
+msgstr "Formát COFF souboru nepodporován: magické číslo je %1."
+
+#: piklab-coff/main.cpp:212
+#, fuzzy
+msgid "COFF type:"
+msgstr "COFF soubor"
+
+#: devices/pic/base/pic_config.cpp:199
+msgid "CPU system clock (divided by)"
+msgstr "Systémové hodiny CPU (děleno)"
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:149
+msgid "CRC error from bootloader: retrying..."
+msgstr "CRC chyba ze zavaděče: zkouším znovu..."
+
+#: devices/base/hex_buffer.cpp:142
+msgid "CRC mismatch (line %1)."
+msgstr "CRC chyba (řádek.%1)."
+
+#: devices/pic/base/pic.cpp:26 progs/gui/prog_group_ui.cpp:92
+msgid "Calibration"
+msgstr "Kalibrace"
+
+#: devices/pic/base/pic.cpp:33
+msgid "Calibration Backup"
+msgstr "Záloha kalibrace"
+
+#: devices/pic/base/pic_config.cpp:22
+msgid "Calibration code-protection"
+msgstr "Kalibrace ochrana kódu"
+
+#: progs/pickit2/base/pickit_prog.cpp:46
+msgid "Calibration firmware file seems incompatible with selected device %1."
+msgstr "Kalibrační firmware není kompatibilní se zvoleným mikrokontrolérem %1."
+
+#: devices/pic/base/pic.cpp:239
+msgid "Calibration word at address %1 is blank."
+msgstr "Kalibrační slovo na adrese %1 je prázdné."
+
+#: devices/pic/base/pic.cpp:245
+msgid "Calibration word is not a compatible opcode (%2)."
+msgstr "Kalibrační slovo není kompatibilní opcode (%2)."
+
+#: tools/list/compile_manager.cpp:65
+msgid "Cannot build empty project."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:406
+msgid "Cannot erase ROM or EPROM device."
+msgstr "Nemohu smazat ROM nebo EPROM obvod."
+
+#: devices/pic/prog/pic_prog.cpp:446
+msgid "Cannot erase protected code memory. Consider erasing the whole chip."
+msgstr "Nemohu smazat chráněnou paměť programu. Zvažte smazání celého mikrokontroléru."
+
+#: devices/pic/prog/pic_prog.cpp:450
+msgid "Cannot erase protected data EEPROM. Consider erasing the whole chip."
+msgstr "Nemohu smazat chráněnou EEPROM dat. Zvažte smazání celého mikrokontroléru."
+
+#: devices/pic/prog/pic_prog.cpp:464
+msgid "Cannot erase specified range because of programmer limitations."
+msgstr "Nemohu smazat zadaný rozsah kvůli omezením programátoru."
+
+#: libgui/project_manager.cpp:420
+msgid "Cannot open without device specified."
+msgstr "Nemohu otevřít bez zvolení mikrokontroléru."
+
+#: devices/pic/prog/pic_prog.cpp:526
+msgid "Cannot read ROMless device."
+msgstr "Nemohu číst mikrokontrolér bez ROM."
+
+#: progs/pickit2/base/pickit2.cpp:116
+msgid "Cannot read voltages with this firmware version."
+msgstr "S touto verzí firmware nemohu číst úrovně napájení."
+
+#: libgui/gui_debug_manager.cpp:242
+msgid "Cannot show disassembly location for non-code line."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:250
+msgid "Cannot specify range without specifying device."
+msgstr "Nemohu určit rozsah bez volby mikrokontroléru."
+
+#: progs/manager/debug_manager.cpp:387
+msgid "Cannot start debugging session without input file (%1)."
+msgstr "Nemohu spustit ladění bez vstupního souboru (%1)."
+
+#: progs/manager/debug_manager.cpp:372
+msgid "Cannot start debugging session without input file (not specified)."
+msgstr "Nemohu spustit ladění bez vstupního souboru (neurčeno)."
+
+#: libgui/gui_prog_manager.cpp:34
+msgid "Cannot start debugging without a COFF file. Please compile the project."
+msgstr "Nemohu spustit ladění bez COFF souboru. Prosím zkompilujte projekt."
+
+#: progs/manager/prog_manager.cpp:138
+#, fuzzy
+msgid "Cannot toggle target power since target is self-powered."
+msgstr "Znamená, že zařízení má vlastní napájení."
+
+#: devices/pic/prog/pic_prog.cpp:606
+msgid "Cannot write ROM or ROMless device."
+msgstr "Nemohu zapsat ROM nebo mikrokontrolér bez ROM."
+
+#: coff/base/cdb_parser.cpp:33 coff/base/coff_object.cpp:160
+#, fuzzy
+msgid "Char"
+msgstr "&Vyčistit"
+
+#: piklab-hex/main.cpp:25
+msgid "Check hex file for correctness (if a device is specified, check if hex file is compatible with it)."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:41
+msgid "Check this box to change DATA buffer direction."
+msgstr "Zatrhněte toto políčko pro změnu směru střadače dat."
+
+#: progs/direct/base/direct.cpp:26 progs/direct/base/direct.cpp:29
+#: progs/direct/base/direct.cpp:32 progs/direct/base/direct.cpp:35
+msgid "Check this box to turn voltage on/off for this pin."
+msgstr "Zatrhněte toto políčko pro zapnutí/vypnutí napětí pro tento vývod."
+
+#: progs/direct/gui/direct_config_widget.cpp:27
+msgid "Check this option if your hardware uses negative logic for this pin."
+msgstr "Zatrhněte toto políčko pokud používá vaše zařízení pro tento vývod negované úrovně."
+
+#: devices/pic/gui/pic_config_word_editor.cpp:98
+msgid "Checksum Mask:"
+msgstr "Maska pro kontrolní součet:"
+
+#: piklab-hex/main.cpp:178
+msgid "Checksum computation is experimental and is not always correct!"
+msgstr ""
+
+#: piklab-hex/main.cpp:180 libgui/hex_editor.cpp:189
+msgid "Checksum: %1"
+msgstr "Kontrolní součet: %1"
+
+#: libgui/toplevel.cpp:250
+msgid "Clean"
+msgstr "Vyčistit"
+
+#: libgui/project_manager.cpp:195
+msgid "Clean Project"
+msgstr "Vyčistit projekt"
+
+#: piklab-hex/main.cpp:27
+msgid "Clean hex file and fix errors (wrong CRC, truncated line, truncated file)."
+msgstr "Vyčistit hex soubor a opravit chyby (špatný kontrolní součet, ořezaný řádek, ořezaný soubor)."
+
+#: libgui/toplevel.cpp:302
+msgid "Clear All Breakpoints"
+msgstr "Vymazat všechny body přerušení"
+
+#: piklab-prog/cli_interactive.cpp:47
+msgid "Clear a breakpoint \"clear 0\", \"clear e 0x04\", or clear all breakpoints \"clear all\"."
+msgstr "Vymazat bod přerušení \"clear 0\", \"clear e 0x04\", nebo vymazat všechny body přerušení \"clear all\"."
+
+#: devices/pic/gui/pic_register_view.cpp:265
+msgid "Clear all watching"
+msgstr "Vyprázdnit všechna sledování"
+
+#: progs/direct/base/direct.cpp:30
+msgid "Clock"
+msgstr "Hodiny"
+
+#: progs/direct/gui/direct_config_widget.cpp:68
+msgid "Clock delay"
+msgstr "Prodleva hodin"
+
+#: devices/pic/base/pic_config.cpp:264
+#, fuzzy
+msgid "Clock output"
+msgstr " (výstup)"
+
+#: devices/pic/base/pic_config.cpp:136
+msgid "Clock switching mode"
+msgstr "Mód přepínání hodin"
+
+#: libgui/editor_manager.cpp:403 libgui/toplevel.cpp:195
+msgid "Close All Others"
+msgstr "Zavřít všechny ostatní"
+
+#: libgui/toplevel.cpp:236
+msgid "Close Project"
+msgstr "Zavřít projekt"
+
+#: progs/gui/hardware_config_widget.cpp:91
+msgid "Closing will discard changes you have made. Close anyway?"
+msgstr "Zavřením přijdete o všechny provedené změny. Přesto  zavřít?"
+
+#: coff/base/cdb_parser.cpp:50 coff/base/coff_object.cpp:332
+msgid "Code"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:51
+#, fuzzy
+msgid "Code / Static Segment"
+msgstr "Příliš málo parametrů."
+
+#: coff/base/cdb_parser.cpp:26
+#, fuzzy
+msgid "Code Pointer"
+msgstr "Paměť kódu"
+
+#: devices/pic/base/pic_config.cpp:20
+msgid "Code code-protection"
+msgstr "Kód chráněný"
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:53
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:163
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:111
+msgid "Code is present in bootloader reserved area (at address %1). It will be ignored."
+msgstr "Kód je v oblasti rezervované pro zavaděč (na adrese %1). Bude vynechán."
+
+#: devices/pic/base/pic.cpp:25
+msgid "Code memory"
+msgstr "Paměť kódu"
+
+#: devices/pic/base/pic_config.cpp:96
+msgid "Code protected microcontroller"
+msgstr "Mikrokontrolér s chráněným kódem"
+
+#: devices/pic/gui/pic_memory_editor.cpp:77
+#, fuzzy
+msgid "Code protection"
+msgstr "Kód chráněný"
+
+#: devices/pic/base/pic_config.cpp:25
+msgid "Code write-protection"
+msgstr "Ochrana proti zápisu kódu"
+
+#: coff/base/coff_object.cpp:286 coff/base/coff_object.cpp:299
+#, fuzzy
+msgid "Codeline has unknown symbol: %1"
+msgstr "Relokace má neznámý symbol: %1"
+
+#: coff/base/coff_object.cpp:290 coff/base/coff_object.cpp:303
+#, fuzzy
+msgid "Codeline is an auxiliary symbol: %1"
+msgstr "Symbol bez potřebného doplňkového symbolu (typ=%1)"
+
+#: piklab-coff/main.cpp:128
+#, fuzzy
+msgid "Command not available for COFF of type Archive."
+msgstr "Nespecifikován žádný COFF soubor"
+
+#: piklab-coff/main.cpp:204
+msgid "Command not available for COFF of type Object."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:453
+msgid "Command-line programmer/debugger."
+msgstr "Programátor/debugger pro příkazový řádek."
+
+#: piklab-hex/main.cpp:287
+msgid "Command-line utility to manipulate hex files."
+msgstr "Utilita pro úpravu hex souborů pro příkazový řádek."
+
+#: piklab-coff/main.cpp:278
+#, fuzzy
+msgid "Command-line utility to view COFF files."
+msgstr "Utilita pro úpravu hex souborů pro příkazový řádek."
+
+#: libgui/likeback.cpp:659
+msgid "Comment Sent"
+msgstr "Komentář odeslán"
+
+#: devices/base/generic_device.cpp:33
+msgid "Commercial"
+msgstr "Komerční"
+
+#: piklab-hex/main.cpp:28
+msgid "Compare two hex files."
+msgstr "Porovnat dva hex soubory."
+
+#: progs/direct/base/direct_prog_config.cpp:83
+msgid "Compatible with ET-CAB10PIN V2 programmer shipped by Futurlec, with their PIC16F877 controler board."
+msgstr ""
+
+#: libgui/toplevel.cpp:138
+msgid "Compile Log"
+msgstr "Záznam kompilace"
+
+#: tools/base/generic_tool.cpp:17 common/common/purl_base.cpp:21
+msgid "Compiler"
+msgstr "Kompilátor"
+
+#: tools/base/generic_tool.cpp:17
+msgid "Compiler:"
+msgstr "Kompilátor:"
+
+#: tools/list/compile_manager.cpp:29
+msgid "Compiling file..."
+msgstr "Kompiluji soubor..."
+
+#: coff/base/coff_object.cpp:326
+#, fuzzy
+msgid "Config"
+msgstr "Nastavení..."
+
+#: libgui/config_gen.cpp:145
+msgid "Config Generator"
+msgstr "Generátor konfigurace"
+
+#: devices/pic/gui/pic_config_word_editor.cpp:51
+msgid "Config Word Details"
+msgstr "Podrobnosti konfiguračního slova"
+
+#: common/port/usb_port.cpp:242
+msgid "Configuration %1 not present: using %2"
+msgstr "Konfigurace %1 nenalezena: použiji %2"
+
+#: devices/pic/base/pic.cpp:29
+msgid "Configuration Bits"
+msgstr "Konfigurační bity"
+
+#: coff/base/disassembler.cpp:282
+msgid "Configuration bits: adapt to your setup and needs"
+msgstr "Konfigurační bity: upravte dle vašeho nastavení a potřeb"
+
+#: devices/pic/base/pic_config.cpp:28
+msgid "Configuration write-protection"
+msgstr "Ochrana konfigurace proti zápisu"
+
+#: tools/gui/tool_config_widget.cpp:37
+msgid "Configuration:"
+msgstr "Nastavení:"
+
+#: libgui/toplevel_ui.cpp:40
+msgid "Configure Compilation..."
+msgstr "Nastavení kompilace..."
+
+#: libgui/config_center.cpp:113
+msgid "Configure Piklab"
+msgstr "Nastavit Piklab"
+
+#: libgui/toplevel_ui.cpp:39
+msgid "Configure Toolchain..."
+msgstr "Nastavit sadu nástrojů..."
+
+#: tools/gui/toolchain_config_center.cpp:24
+msgid "Configure Toolchains"
+msgstr "Nastavení sady nástrojů"
+
+#: libgui/toplevel.cpp:320
+msgid "Configure Toolchains..."
+msgstr "Nastavit sadu nástrojů..."
+
+#: libgui/toplevel.cpp:346
+msgid "Configure email..."
+msgstr "Nastavit e-mail..."
+
+#: libgui/project_manager.cpp:186 libgui/toplevel_ui.cpp:22
+#: libgui/likeback.cpp:89
+msgid "Configure..."
+msgstr "Nastavení..."
+
+#: piklab-prog/cmdline.cpp:35
+msgid "Connect programmer."
+msgstr "Připojit programátor."
+
+#: progs/gui/hardware_config_widget.cpp:61
+msgid "Connected"
+msgstr "Připojen"
+
+#: devices/pic/base/pic_config.cpp:224
+#, fuzzy
+msgid "Connected to EMB"
+msgstr "Připojen"
+
+#: progs/base/generic_prog.cpp:108
+msgid "Connected."
+msgstr "Připojen."
+
+#: progs/base/generic_prog.cpp:81
+msgid "Connecting %1 on %2 with device %3..."
+msgstr "Připojuji %1 na %2 s mikrokontrolérem %3..."
+
+#: progs/base/generic_prog.cpp:75
+msgid "Connecting %1 with device %2..."
+msgstr "Připojuji %1 s mikrokontrolérem %2..."
+
+#: progs/base/generic_prog.cpp:89
+msgid "Connecting..."
+msgstr "Připojuji..."
+
+#: progs/gui/prog_config_center.cpp:92
+msgid "Connection: Error"
+msgstr "Chyba spojení"
+
+#: progs/gui/prog_config_center.cpp:92
+msgid "Connection: Ok"
+msgstr "Spojení: Ok"
+
+#: tools/pic30/pic30_generator.cpp:51
+msgid "Constants in program space"
+msgstr "Konstanty v oblasti programu"
+
+#: libgui/toplevel.cpp:905
+msgid "Continue Anyway"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:284
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:86
+msgid "Continue with the specified device name: \"%1\"..."
+msgstr "Pokračovat se zvoleným názvem mikrokontroléru: \"%1\"..."
+
+#: progs/direct/gui/direct_config_widget.cpp:81
+msgid "Continuously send 0xA55A on \"Data out\" pin."
+msgstr "Neustále posílat  0xA55A na \"Data out\" vývod."
+
+#: libgui/project_manager.cpp:314
+msgid "Copy and Add"
+msgstr ""
+
+#: libgui/config_gen.cpp:66
+msgid "Copy to clipboard"
+msgstr "Zkopírovat do schránky"
+
+#: libgui/project_manager.cpp:325
+msgid "Copying file to project directory failed."
+msgstr "Kopírování souboru do adresáře projektu selhalo."
+
+#: common/port/usb_port.cpp:259
+msgid "Could not claim USB interface %1"
+msgstr "Nemohu přistupovat na USB rozhraní %1"
+
+#: common/port/parallel.cpp:173
+msgid "Could not claim device \"%1\": check it is read/write enabled"
+msgstr "Nemohu přistupovat do mikrokontroléru \"%1\": zkontrolujte zda je povoleno čtení/zápis"
+
+#: progs/gui/prog_group_ui.cpp:121
+msgid "Could not connect programmer."
+msgstr "Nemohu připojit programátor."
+
+#: progs/psp/base/psp_serial.cpp:40
+msgid "Could not contact Picstart+"
+msgstr "Nemohu se připojit na Picstart+"
+
+#: common/gui/purl_ext.cpp:31
+msgid "Could not copy file"
+msgstr "Nemohu zkopírovat soubor"
+
+#: common/gui/purl_ext.cpp:108
+msgid "Could not create directory"
+msgstr "Nemohu vytvořit adresář"
+
+#: common/gui/purl_ext.cpp:52
+msgid "Could not create file"
+msgstr "Nemohu vytvořit soubor"
+
+#: common/gui/pfile_ext.cpp:24 common/gui/pfile_ext.cpp:109
+msgid "Could not create temporary file."
+msgstr "Nemohu vytvořit dočasný soubor."
+
+#: common/gui/purl_ext.cpp:75
+msgid "Could not delete file."
+msgstr "Nemohu smazat soubor."
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:35
+msgid "Could not detect \"gpsim\" version"
+msgstr "Nemohu zjistit verzi \"gpsim\""
+
+#: progs/direct/base/direct_mem24.cpp:51
+msgid "Could not detect EEPROM"
+msgstr "Nemohu rozeznat EEPROM"
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:31
+#, fuzzy
+msgid "Could not detect device in bootloader mode."
+msgstr "Nemohu rozeznat mikrokontrolér v módu zavaděče"
+
+#: progs/manager/prog_manager.cpp:64 libgui/device_gui.cpp:263
+msgid "Could not detect supported devices for \"%1\". Please check installation."
+msgstr "Nemohu zjistit mikrokontroléry podporované \"%1\". Prosím zkontrolujte instalaci."
+
+#: libgui/config_gen.cpp:131
+msgid "Could not detect supported devices for selected toolchain. Please check installation."
+msgstr "Nemohu zjistit mikrokontroléry podporované zvolenou sadou nástrojů. Prosím zkontrolujte instalaci."
+
+#: libgui/device_gui.cpp:268
+msgid "Could not detect supported devices for toolchain \"%1\". Please check installation."
+msgstr "Nemohu zjistit mikrokontroléry podporované sadou nástrojů \"%1\". Prosím zkontrolujte instalaci."
+
+#: coff/base/coff_object.cpp:567
+#, fuzzy
+msgid "Could not determine processor (%1)."
+msgstr "Nemohu najít soubor s chybami (%1)."
+
+#: libgui/console.cpp:30
+msgid "Could not find \"konsolepart\"; please install kdebase."
+msgstr "Nemohu najít \"konsolepart\": Prosím nainstalujte kdebase."
+
+#: common/port/usb_port.cpp:210
+msgid "Could not find USB device (vendor=%1 product=%2)."
+msgstr "Nemohu najít USB zařízení (poskytovatel=%1 výrobek=%2)."
+
+#: progs/icd2/base/icd2_debug.cpp:155
+msgid "Could not find debug executive file \"%1\"."
+msgstr "Nemohu najít povelový soubor ladění \"%1\"."
+
+#: piklab-prog/cli_prog_manager.cpp:28
+#, fuzzy
+msgid "Could not find device \"%1\" as serial or parallel port. Will try to open as serial port."
+msgstr "Nemohu otevřít mikrokontrolér \"%1\" jako sériový nebo paralelní port. Zkontrolujte prosím jeho přítomnost a přístupová práva."
+
+#: tools/mpc/mpc_compile.cpp:40 tools/ccsc/ccsc_compile.cpp:86
+msgid "Could not find error file (%1)."
+msgstr "Nemohu najít soubor s chybami (%1)."
+
+#: libgui/project_manager.cpp:307
+msgid "Could not find file."
+msgstr "Nemohu najít soubor."
+
+#: progs/icd2/base/icd2_prog.cpp:90
+msgid "Could not find firmware file \"%1\" in directory \"%2\"."
+msgstr "Nemohu najít soubor s firmwarem \"%1\" v adresáři \"%2\"."
+
+#: common/port/serial.cpp:329
+msgid "Could not flush device"
+msgstr "Nemohu vyprázdnit mikrokontrolér"
+
+#: common/port/serial.cpp:165
+msgid "Could not get file descriptor parameters"
+msgstr "Nemohu najít vlastnosti popisovače souborů"
+
+#: piklab-prog/cmdline.cpp:173
+#, fuzzy
+msgid "Could not load hex file \"%1\"."
+msgstr "Nemohu načíst hex soubor: %1."
+
+#: common/port/serial.cpp:198
+msgid "Could not modify file descriptor flags"
+msgstr "Nemohu změnit příznaky popisovače souboru"
+
+#: common/port/parallel.cpp:169 common/port/parallel.cpp:179
+msgid "Could not open device \"%1\""
+msgstr "Nemohu otevřít mikrokontrolér \"%1\""
+
+#: common/port/serial.cpp:190
+msgid "Could not open device \"%1\" read-write"
+msgstr "Nemohu otevřít mikrokontrolér \"%1\" pro čtení/zápis"
+
+#: common/gui/pfile_ext.cpp:58 common/cli/cli_pfile.cpp:37
+msgid "Could not open file for reading."
+msgstr "Nemohu otevřít soubor pro čtení."
+
+#: common/cli/cli_pfile.cpp:19
+msgid "Could not open file for writing."
+msgstr "Nemohu otevřít soubor pro zápis."
+
+#: piklab-prog/cli_interactive.cpp:320
+#, fuzzy
+msgid "Could not open filename \"%1\"."
+msgstr "Nemohu otevřít ne název soubor \"%1\""
+
+#: progs/icd2/base/icd2_prog.cpp:100 progs/icd2/base/icd2_debug.cpp:162
+#: progs/pickit2/base/pickit_prog.cpp:35 progs/base/generic_prog.cpp:250
+msgid "Could not open firmware file \"%1\"."
+msgstr "Nemohu otevřít firmware soubor \"%1\"."
+
+#: libgui/project_manager.cpp:531
+msgid "Could not open project file."
+msgstr "Nemohu otevřít soubor projektu."
+
+#: common/gui/pfile_ext.cpp:63
+msgid "Could not open temporary file."
+msgstr "Nemohu otevřít dočasný soubor."
+
+#: progs/pickit2/base/pickit_prog.cpp:42
+msgid "Could not read calibration firmware file \"%1\" (%2)."
+msgstr "Nemohu načíst soubor s kalibračním firmware \"%1\" (%2)."
+
+#: progs/icd2/base/icd2_debug.cpp:168
+msgid "Could not read debug executive file \"%1\": %2."
+msgstr "Nemohu načíst povelový soubor ladění \"%1\": %2."
+
+#: progs/pickit2/base/pickit2_prog.cpp:56
+msgid "Could not read firmware hex file \"%1\" (%2)."
+msgstr "Nemohu načíst hex soubor s firmware \"%1\" (%2)."
+
+#: progs/icd2/base/icd_prog.cpp:22
+msgid "Could not read firmware hex file \"%1\": %2."
+msgstr "Nemohu načíst hex soubor s firmware \"%1\": (%2)."
+
+#: coff/base/coff.cpp:93
+#, fuzzy
+msgid "Could not recognize file (magic number is %1)."
+msgstr "Nemohu určit verzi gpsim."
+
+#: progs/gpsim/base/gpsim.cpp:127
+#, fuzzy
+msgid "Could not recognize gpsim version."
+msgstr "Nemohu určit verzi gpsim."
+
+#: devices/pic/prog/pic_prog.cpp:381
+msgid "Could not restore band gap bits because programmer does not support writing config bits."
+msgstr "Nemohu obnovit bity napěťové reference, protože programátor nepodporuje zápis konfiguračních bitů."
+
+#: libgui/toplevel.cpp:715
+#, fuzzy
+msgid "Could not run \"kfind\""
+msgstr "Nemohu spustit \"pikloops\""
+
+#: libgui/toplevel.cpp:731
+msgid "Could not run \"pikloops\""
+msgstr "Nemohu spustit \"pikloops\""
+
+#: progs/gui/hardware_config_widget.cpp:67
+msgid "Could not save configuration: hardware name is empty."
+msgstr "Nemohu uložit konfiguraci: název hardware je prázdný."
+
+#: common/gui/pfile_ext.cpp:45
+msgid "Could not save file."
+msgstr "Nemohu uložit soubor."
+
+#: libgui/project_manager.cpp:245
+msgid "Could not save project file \"%1\"."
+msgstr "Nemohu uložit soubor projektu \"%1\"."
+
+#: common/port/serial.cpp:180
+msgid "Could not set file descriptor parameters"
+msgstr "Nemohu nastavit parametry popisovače souboru soubor"
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:34
+msgid "Could not start \"gpsim\""
+msgstr "Nemohu spustit \"gpsim\""
+
+#: common/gui/pfile_ext.cpp:94
+msgid "Could not write to temporary file."
+msgstr "Nemohu zapisovat do dočasného souboru."
+
+#: libgui/new_dialogs.cpp:61
+msgid "Create New File"
+msgstr "Vytvořit nový soubor"
+
+#: piklab-hex/main.cpp:30
+#, fuzzy
+msgid "Create an hex file for the specified device."
+msgstr "Rozsahy paměti nejsou pro zvolený mikrokontrolér podporovány."
+
+#: libgui/project_wizard.cpp:150
+msgid "Create template source file."
+msgstr "Vytvořit vzorový zdrojový soubor."
+
+#: devices/pic/base/pic_config.cpp:46
+msgid "Crystal/resonator"
+msgstr "Krystal/rezonátor"
+
+#: devices/pic/base/pic_config.cpp:47
+msgid "Crystal/resonator, PLL enabled"
+msgstr "Krystal/rezonátor, PLL povoleno"
+
+#: tools/gui/tool_config_widget.cpp:24 tools/custom/custom.h:21
+msgid "Custom"
+msgstr "Vlastní"
+
+#: tools/gui/tool_config_widget.cpp:109
+msgid "Custom libraries:"
+msgstr "Vlastní knihovny:"
+
+#: tools/gui/tool_config_widget.cpp:99
+msgid "Custom options:"
+msgstr "Vlastní volby:"
+
+#: tools/list/tools_config_widget.cpp:81
+#, fuzzy
+msgid "Custom shell commands:"
+msgstr "Podporované příkazy:"
+
+#: devices/pic/prog/pic_prog.cpp:610
+msgid "DEBUG configuration bit is on. Are you sure you want to continue programming the chip?"
+msgstr "Je nastaven konfigurační bit DEBUG. Opravdu chcete pokračovat v programování?"
+
+#: devices/base/generic_device.cpp:61
+#, fuzzy
+msgid "DFN"
+msgstr "DFN-S"
+
+#: devices/base/generic_device.cpp:56
+msgid "DFN-S"
+msgstr "DFN-S"
+
+#: devices/pic/base/pic.cpp:30
+msgid "Data EEPROM"
+msgstr "EEPROM dat"
+
+#: progs/direct/base/direct.cpp:36
+msgid "Data In"
+msgstr "Vstup dat"
+
+#: progs/direct/base/direct.cpp:33
+msgid "Data Out"
+msgstr "Výstup dat"
+
+#: progs/direct/base/direct.cpp:39
+msgid "Data R/W"
+msgstr "Data R/W"
+
+#: devices/pic/base/pic_config.cpp:21
+msgid "Data code-protection"
+msgstr "Data ochrana kódu"
+
+#: devices/pic/base/pic_config.cpp:26
+msgid "Data write-protection"
+msgstr "Ochrana proti zápisu dat"
+
+#: tools/list/device_info.cpp:33
+msgid "Datasheet"
+msgstr ""
+
+#: progs/icd2/gui/icd2_group_ui.cpp:29
+msgid "Debug Executive"
+msgstr "Povely pro ladění"
+
+#: coff/base/coff_object.cpp:125
+msgid "Debug Symbol"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:31
+msgid "Debug Vector"
+msgstr "Vektor ladění "
+
+#. i18n: file ./data/app_data/piklabui.rc line 177
+#: rc.cpp:51
+#, no-c-format
+msgid "Debugger Toolbar"
+msgstr "Nástrojová lišta debuggeru"
+
+#: progs/gui/debug_config_center.h:21 progs/gui/debug_config_center.h:22
+msgid "Debugging Options"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:282 piklab-prog/cmdline.cpp:287
+msgid "Debugging is not supported for specified programmer."
+msgstr "Ladění pro daný programátor není podporováno."
+
+#: progs/icd2/base/icd2_debug.cpp:275
+msgid "Debugging test successful"
+msgstr "Test ladění úspěšný"
+
+#: common/common/number.cpp:19
+msgid "Decimal"
+msgstr "Desítkový"
+
+#: devices/pic/base/pic_config.cpp:126
+msgid "Dedicated in-circuit port"
+msgstr "Vyhrazený obvodový port"
+
+#: devices/pic/base/pic_config.cpp:211
+#, fuzzy
+msgid "Default system clock select"
+msgstr "Přepínač systémových hodin oscilátoru"
+
+#: libgui/project_editor.cpp:36
+#, fuzzy
+msgid "Description:"
+msgstr "Popis"
+
+#: piklab-hex/main.cpp:102 piklab-coff/main.cpp:73
+msgid "Destination file already exists."
+msgstr "Cílový soubor již existuje."
+
+#: devices/pic/gui/pic_config_word_editor.cpp:116
+msgid "Details..."
+msgstr "Detaily..."
+
+#: tools/gui/toolchain_config_widget.cpp:190
+msgid "Detected (%1)"
+msgstr "Rozpoznáno (%1)"
+
+#: progs/icd2/base/icd2_debug_specific.cpp:241
+msgid "Detected custom ICD2"
+msgstr "Rozpoznán upravený ICD2"
+
+#: piklab-prog/cmdline.cpp:127
+msgid "Detected ports supported by \"%1\":"
+msgstr "Rozpoznané port podporované \"%1\":"
+
+#: piklab-prog/cmdline.cpp:128
+msgid "Detected ports:"
+msgstr "Rozpoznané porty:"
+
+#: tools/gui/toolchain_config_widget.cpp:235
+msgid "Detecting \"%1\"..."
+msgstr "Rozpoznávám \"%1\"..."
+
+#: tools/gui/toolchain_config_widget.cpp:251
+msgid "Detecting ..."
+msgstr "Rozpoznávám..."
+
+#: libgui/editor_manager.cpp:478 libgui/device_gui.cpp:175
+#: libgui/project_manager_ui.cpp:33
+msgid "Device"
+msgstr "Mikrokontrolér"
+
+#: devices/pic/base/pic.cpp:28 coff/base/coff_object.cpp:327
+msgid "Device ID"
+msgstr "ID mikrokontroléru"
+
+#: tools/list/device_info.cpp:21
+#, fuzzy
+msgid "Device Page"
+msgstr "Napájení mikrokontroléru"
+
+#: libgui/toplevel.cpp:258
+msgid "Device Power"
+msgstr "Napájení mikrokontroléru"
+
+#: tools/gui/toolchain_config_widget.cpp:89
+msgid "Device detection:"
+msgstr "Rozpoznávání mikrokontroléru:"
+
+#: libgui/device_editor.cpp:66
+msgid "Device guessed from file: %1"
+msgstr "Mikrokontrolér odhadnut ze souboru: %1"
+
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:159
+msgid "Device memory does not match hex file (at address 0x%2: reading 0x%3 and expecting 0x%4)."
+msgstr "Paměť mikrokontroléru neodpovídá hex souboru (na adrese 0x%2: přečteno 0x%3 a očekáváno 0x%4)."
+
+#: devices/pic/prog/pic_prog_specific.cpp:104
+msgid "Device memory does not match hex file (in %1 at address %2: reading %3 and expecting %4)."
+msgstr "Paměť mikrokontroléru neodpovídá hex souboru (v %1 na adrese %2: přečteno %3 a očekáváno %4)."
+
+#: progs/icd2/base/icd2_debug.cpp:253
+msgid "Device memory doesn't match debug executive (at address %1: reading %2 and expecting %3)."
+msgstr "Paměť mikrokontroléru neodpovídá ladícím povelům (na adrese %1: přečteno %2 a očekáváno %3)."
+
+#: devices/mem24/prog/mem24_prog.cpp:42
+msgid "Device memory doesn't match hex file (at address %1: reading %2 and expecting %3)."
+msgstr "Paměť mikrokontroléru neodpovídá hex souboru (na adrese %1: přečteno %2 a očekáváno %3)."
+
+#: devices/mem24/prog/mem24_prog.cpp:40
+msgid "Device memory is not blank (at address %1: reading %2 and expecting %3)."
+msgstr "Paměť mikrokontroléru není prázdná (na adrese %1: přečteno %2 a očekáváno %3)."
+
+#: devices/pic/prog/pic_prog_specific.cpp:101
+msgid "Device memory is not blank (in %1 at address %2: reading %3 and expecting %4)."
+msgstr "Paměť mikrokontroléru není prázdná (v %1 na adrese %2: přečteno %3 a očekáváno %4)."
+
+#: devices/pic/prog/pic_prog.cpp:253
+msgid "Device not autodetectable: continuing with the specified device name \"%1\"..."
+msgstr "Nemohu zjistit typ mikrokontroléru: pokračuji se zvoleným názvem mikrokontroléru \"%1\"..."
+
+#: devices/pic/prog/pic_prog.cpp:126
+msgid "Device not in programming"
+msgstr "Mikrokontrolér není programován"
+
+#: piklab-hex/main.cpp:104 piklab-prog/cmdline.cpp:157 piklab-coff/main.cpp:75
+msgid "Device not specified."
+msgstr "Nezvolen typ mikrokontroléru."
+
+#: libgui/config_gen.cpp:132
+msgid "Device not supported by the selected toolchain."
+msgstr "Zařízení není podporováno zvolenou sadou nástrojů."
+
+#: libgui/config_gen.cpp:32 libgui/config_center.cpp:66
+#: libgui/project_editor.cpp:46 libgui/project_wizard.cpp:129
+#: coff/base/text_coff.cpp:254
+msgid "Device:"
+msgstr "Mikrokontrolér:"
+
+#: devices/pic/base/pic_config.cpp:104
+msgid "Digital"
+msgstr "Číslicový"
+
+#: devices/pic/base/pic_config.cpp:263
+#, fuzzy
+msgid "Digital I/O"
+msgstr "Číslicový"
+
+#: coff/base/coff_object.cpp:52
+#, fuzzy
+msgid "Direct"
+msgstr "Adresář:"
+
+#: progs/direct/base/direct_prog.h:59
+msgid "Direct Programmer"
+msgstr "Přímý programátor"
+
+#: common/global/about.cpp:87
+msgid "Direct programming for 16F676/630."
+msgstr "Přímé programování pro 16F676/630."
+
+#: common/global/about.cpp:89
+msgid "Direct programming for 16F73/74/76/77."
+msgstr "Přímé programování pro 16F73/74/76/77."
+
+#: common/global/about.cpp:93
+msgid "Direct programming for 24C EEPROM is inspired from his program \"prog84\"."
+msgstr "Přímé programování pro 24C EEPROM podle jeho programu \"prog84\"."
+
+#: common/global/about.cpp:86
+msgid "Direct programming for PIC18F devices."
+msgstr "Přímé programování pro PIC18F mikrokontroléry."
+
+#: common/global/about.cpp:92
+msgid "Direct programming for dsPICs is inspired from his program \"dspicprg\"."
+msgstr "Přímé programování pro dsPIC podle jeho programu \"dspicprg\"."
+
+#: libgui/project_wizard.cpp:181
+msgid "Directory does not exists. Create it?"
+msgstr "Adresář neexistuje. Vytvořit?"
+
+#: libgui/project_wizard.cpp:176
+msgid "Directory is empty."
+msgstr "Adresář je prázdný."
+
+#: libgui/project_wizard.cpp:125
+msgid "Directory:"
+msgstr "Adresář:"
+
+#: libgui/breakpoint_view.cpp:27
+msgid "Disable breakpoint"
+msgstr "Zakázat bod přerušení"
+
+#: devices/pic/base/pic_config.cpp:91 devices/pic/base/pic_config.cpp:191
+#: devices/pic/base/pic_config.cpp:215 devices/pic/base/pic_config.cpp:394
+#: devices/pic/base/pic_config.cpp:398
+msgid "Disabled"
+msgstr "Zakázán"
+
+#: devices/pic/base/pic_config.cpp:36
+msgid "Disabled (connected to Vdd)"
+msgstr "Zakázán (připojen k Vdd)"
+
+#: progs/icd2/base/icd2_debug.cpp:215
+msgid "Disabling code program protection for debugging"
+msgstr "Zakazuji ochranu kódu pro ladění"
+
+#: progs/icd2/base/icd2_debug.cpp:223
+msgid "Disabling code read protection for debugging"
+msgstr "Zakazuji ochranu kódu proti přečtení pro ladění"
+
+#: progs/icd2/base/icd2_debug.cpp:219
+msgid "Disabling code write protection for debugging"
+msgstr "Zakazuji ochranu kódu proti zápisu pro ladění"
+
+#: progs/icd2/base/icd2_debug.cpp:211
+msgid "Disabling watchdog timer for debugging"
+msgstr "Zakazuji watchdog timer pro ladění"
+
+#: libgui/object_view.cpp:139
+msgid "Disassembling content of hex file editor."
+msgstr "Zpětně překládám obsah editoru hex souboru."
+
+#: libgui/object_view.cpp:126
+msgid "Disassembling hex file: %1"
+msgstr "Zpětně překládám hex soubor: %1"
+
+#: libgui/project_manager.cpp:380
+msgid "Disassembly"
+msgstr "Zpětný překlad"
+
+#: libgui/project_manager_ui.cpp:98
+msgid "Disassembly Listing"
+msgstr "Výpis zpětného překladu"
+
+#: libgui/object_view.cpp:120
+msgid "Disassembly not supported for the selected device."
+msgstr "Zpětný překlad není pro zvolený mikrokontrolér podporován."
+
+#: libgui/object_view.cpp:115
+msgid "Disassembly not supported for the selected toolchain."
+msgstr "Zpětný překlad není pro zvolenou sadu nástrojů podporován."
+
+#: piklab-prog/cli_interactive.cpp:42
+msgid "Disconnect programmer."
+msgstr "Odpojit programátor."
+
+#: progs/manager/prog_manager.cpp:150
+msgid "Disconnecting..."
+msgstr "Odpojuji..."
+
+#: common/cli/cli_main.cpp:55
+msgid "Display all debug messages."
+msgstr "Zobrazit všechny ladící zprávy."
+
+#: common/cli/cli_main.cpp:53
+msgid "Display debug messages."
+msgstr "Zobrazit ladící zprávy."
+
+#: common/cli/cli_main.cpp:54
+msgid "Display extra debug messages."
+msgstr "Zobrazit dodatečné ladící zprávy."
+
+#: piklab-prog/cli_interactive.cpp:37
+msgid "Display help."
+msgstr "Zobrazit nápovědu."
+
+#: common/cli/cli_main.cpp:56
+msgid "Display low level debug messages."
+msgstr "Zobrazit low-level ladící zprávy."
+
+#: piklab-prog/cli_interactive.cpp:33
+msgid "Display the list of available properties."
+msgstr "Zobrazit seznam dostupných vlastností."
+
+#: piklab-prog/cli_interactive.cpp:36
+msgid "Display the list of memory ranges."
+msgstr "Zobrazit seznam paměťových rozsahů."
+
+#: piklab-prog/cli_interactive.cpp:34
+msgid "Display the list of registers."
+msgstr "Zobrazit seznam registrů."
+
+#: piklab-prog/cli_interactive.cpp:35
+msgid "Display the list of variables."
+msgstr "Zobrazit seznam proměnných."
+
+#: libgui/likeback.cpp:136
+msgid "Do not Help Anymore"
+msgstr "Už nenapovídat"
+
+#: libgui/project_wizard.cpp:152
+msgid "Do not add files now."
+msgstr "Teď soubory nepřidávat."
+
+#: libgui/likeback.cpp:603
+msgid "Do not ask for features: your wishes will be ignored."
+msgstr "Nežádejte vylepšení: vašim přáním nebudeme věnovat pozornost."
+
+#: common/cli/cli_main.cpp:57
+msgid "Do not display messages."
+msgstr "Nezobrazovat zprávy."
+
+#: progs/gui/hardware_config_widget.cpp:200
+msgid "Do you want to delete custom hardware \"%1\"?"
+msgstr "Chcete smazat vlastní zařízení \"%1\"?"
+
+#: devices/pic/prog/pic_prog.cpp:678
+msgid "Do you want to overwrite the device calibration with %1?"
+msgstr "Chcete přepsat kalibraci mikrokontroléru %1?"
+
+#: progs/gui/hardware_config_widget.cpp:76
+msgid "Do you want to overwrite this custom hardware \"%1\"?"
+msgstr "Chcete přepsat toto vlastní zařízení \"%1\"?"
+
+#: tools/list/device_info.cpp:35
+#, fuzzy
+msgid "Documents"
+msgstr "Parametry:"
+
+#: coff/base/coff_object.cpp:165
+msgid "Double"
+msgstr ""
+
+#: coff/base/coff_object.cpp:148
+msgid "Dummy Entry (end of block)"
+msgstr ""
+
+#: coff/base/coff_object.cpp:154
+msgid "Duplicate Tag"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:78
+msgid "ECAN"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:130
+msgid "ECCP mux"
+msgstr "ECCP multiplexer"
+
+#: devices/mem24/gui/mem24_memory_editor.cpp:41
+msgid "EEPROM Memory"
+msgstr "Paměť EEPROM"
+
+#: progs/direct/base/direct_mem24.cpp:54
+msgid "EEPROM detected"
+msgstr "Nalezena EEPROM"
+
+#: progs/direct/base/direct_prog_config.cpp:72
+msgid "EL Cheapo classic"
+msgstr "EL Cheapo classic"
+
+#: tools/base/generic_tool.cpp:39
+#, fuzzy
+msgid "ELF"
+msgstr "MLF"
+
+#: progs/direct/base/direct_prog_config.cpp:76
+msgid "EPE Toolkit mk3"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:38
+msgid "EPIC+"
+msgstr "EPIC+"
+
+#: devices/base/generic_device.cpp:27
+msgid "EPROM (OTP)"
+msgstr "EPROM (OTP)"
+
+#: progs/direct/base/direct_prog_config.cpp:80
+msgid "ETT High Vpp"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:82
+msgid "ETT Low Vpp"
+msgstr ""
+
+#: libgui/likeback.cpp:176
+msgid "Each time you have a great or frustrating experience, please click the appropriate hand below the window title-bar, briefly describe what you like or dislike and click Send."
+msgstr "Pokaždé když máte dobrou či špatnou zkušenost klikněte prosím na odpovídající symbol pod titulkem okna programu, stručně popište co se vám líbí nebo nelíbí a klikněte Odeslat."
+
+#: progs/gui/hardware_config_widget.cpp:36
+msgid "Edit and test hardware"
+msgstr "Upravit a otestovat zařízení"
+
+#: progs/gui/hardware_config_widget.cpp:159
+msgid "Edit/Test..."
+msgstr "Upravit/Testovat..."
+
+#: common/common/purl_base.cpp:50
+msgid "Elf File"
+msgstr "Elf soubor"
+
+#: libgui/breakpoint_view.cpp:27
+msgid "Enable breakpoint"
+msgstr "Povolit bod přerušení"
+
+#: devices/pic/base/pic_config.cpp:397
+msgid "Enabled"
+msgstr "Povoleno"
+
+#: devices/pic/base/pic_config.cpp:77
+msgid "Enabled in run - Disabled in sleep"
+msgstr "Povoleno za běhu - Zakázáno při spánku"
+
+#: devices/base/generic_device.cpp:20
+msgid "End Of Life"
+msgstr "Výroba ukončena"
+
+#: coff/base/coff_object.cpp:151
+msgid "End of Structure"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:104
+msgid "End of all code sections"
+msgstr "Konec všech částí kódu"
+
+#: piklab-prog/cli_interactive.cpp:346
+msgid "End of command file reached."
+msgstr "Dosažen konec příkazového souboru."
+
+#: common/nokde/nokde_kcmdlineargs.cpp:861
+msgid "End of options"
+msgstr "Konec přepínačů"
+
+#: piklab-hex/main.cpp:141
+msgid "End:"
+msgstr "Konec:"
+
+#: coff/base/coff_object.cpp:168
+#, fuzzy
+msgid "Enumeration"
+msgstr "Nastavení:"
+
+#: coff/base/coff_object.cpp:143
+#, fuzzy
+msgid "Enumeration Tag"
+msgstr "Informační stránka"
+
+#: piklab-prog/cmdline.cpp:47
+msgid "Erase device memory."
+msgstr "Smazat paměť mikrokontroléru."
+
+#: progs/psp/base/psp.cpp:342
+msgid "Erase failed"
+msgstr "Mazání selhalo"
+
+#: progs/icd1/base/icd1.cpp:155
+msgid "Erase failed (returned value is %1)"
+msgstr "Mazání selhalo (návratová hodnota je %1)"
+
+#: piklab-prog/cmdline.cpp:311
+msgid "Erasing device memory not supported for specified programmer."
+msgstr "Mazání paměti mikrokontroléru není tímto programátorem podporováno."
+
+#: progs/base/generic_prog.cpp:284
+msgid "Erasing done"
+msgstr "Mazání hotovo"
+
+#: progs/base/generic_prog.cpp:35 progs/base/generic_prog.cpp:282
+msgid "Erasing..."
+msgstr "Mažu..."
+
+#: common/port/serial.cpp:300
+msgid "Error checking for data in output buffer"
+msgstr "Chyba při kontrole dat ve výstupním střadači"
+
+#: common/port/serial.cpp:475
+msgid "Error clearing up break"
+msgstr "Chyba při zotavování ze zastavení"
+
+#: libgui/project_wizard.cpp:183
+msgid "Error creating directory."
+msgstr "Chyba při vytváření adresáře."
+
+#: libgui/project_wizard.cpp:246
+#, fuzzy
+msgid "Error creating template file."
+msgstr "Chyba(y) při čtení hex souboru."
+
+#: common/port/usb_port.cpp:217 common/port/usb_port.cpp:231
+msgid "Error opening USB device."
+msgstr "Chyba při otvírání USB zařízení."
+
+#: common/global/xml_data_file.cpp:29
+#, fuzzy
+msgid "Error opening file: %1"
+msgstr "Chyba při zápisu souboru \"%1\"."
+
+#: libgui/object_view.cpp:87
+#, fuzzy
+msgid "Error parsing library:\n"
+msgstr "Chyba při nahrávání firmware."
+
+#: libgui/object_view.cpp:70
+#, fuzzy
+msgid "Error parsing object:\n"
+msgstr "Chyba při zotavování ze zastavení"
+
+#: progs/direct/base/direct_16.cpp:108
+msgid "Error programming %1 at %2."
+msgstr "Chyba při programování %1 na %2."
+
+#: common/port/parallel.cpp:231
+msgid "Error reading bit on pin %1"
+msgstr "Chyba při čtení bitu na vývodu %1"
+
+#: progs/gpsim/base/gpsim_debug.cpp:238 progs/sdcdb/base/sdcdb_debug.cpp:237
+msgid "Error reading driven state of IO bit: %1"
+msgstr "Chyba při čtení řízeného stavu V/V bitu: %1"
+
+#: progs/gpsim/base/gpsim_debug.cpp:225 progs/gpsim/base/gpsim_debug.cpp:231
+#: progs/sdcdb/base/sdcdb_debug.cpp:224 progs/sdcdb/base/sdcdb_debug.cpp:230
+msgid "Error reading driving state of IO bit: %1"
+msgstr "Chyba při čtení řídícího stavu V/V bitu: %1"
+
+#: progs/gpsim/base/gpsim_debug.cpp:107 progs/gpsim/base/gpsim_debug.cpp:129
+#: progs/sdcdb/base/sdcdb_debug.cpp:128
+msgid "Error reading register \"%1\""
+msgstr "Chyba při čtení registru \"%1\""
+
+#: progs/sdcdb/base/sdcdb_debug.cpp:106
+msgid "Error reading register \"W\""
+msgstr "Chyba při čtení registru \"W\""
+
+#: common/port/serial.cpp:409
+msgid "Error reading serial pin %1"
+msgstr "Chyba při čtení sériového vývodu %1"
+
+#: progs/gpsim/base/gpsim_debug.cpp:207 progs/sdcdb/base/sdcdb_debug.cpp:206
+msgid "Error reading state of IO bit: %1"
+msgstr "Chyba při čtení stavu V/V bitu: %1"
+
+#: common/port/serial.cpp:261 common/port/serial.cpp:274
+msgid "Error receiving data"
+msgstr "Chyba při příjmu dat"
+
+#: common/port/usb_port.cpp:393
+msgid "Error receiving data (ep=%1 res=%2)"
+msgstr "Chyba při příjmu dat (ep=%1 res=%2)"
+
+#: common/port/usb_port.cpp:224
+msgid "Error resetting USB device."
+msgstr "Chyba při nulování USB zařízení."
+
+#: common/global/xml_data_file.cpp:51
+#, fuzzy
+msgid "Error saving file: %1"
+msgstr "Chyba při čtení COFF souboru."
+
+#: progs/gpsim/base/gpsim.cpp:94
+#, fuzzy
+msgid "Error send a signal to the subprocess."
+msgstr "Chyba při posílání signálu pro podproces."
+
+#: common/port/usb_port.cpp:294
+msgid "Error sending control message to USB port."
+msgstr "Chyba při posílání řídící zprávy na USB port."
+
+#: common/port/serial.cpp:229
+msgid "Error sending data"
+msgstr "Chyba při odesílání dat"
+
+#: common/port/usb_port.cpp:359
+msgid "Error sending data (ep=%1 res=%2)"
+msgstr "Chyba při odesílání dat (ep=%1 res=%2)"
+
+#: common/port/usb_port.cpp:246
+msgid "Error setting USB configuration %1."
+msgstr "Chyba nastavování konfigurace USB %1."
+
+#: common/port/serial.cpp:367
+msgid "Error setting bit %1 of serial port to %2"
+msgstr "Chyba při nastavování bitu %1 sériového portu do %2"
+
+#: common/port/parallel.cpp:211
+msgid "Error setting pin %1 to %2"
+msgstr "Chyba při nastavování vývodu %1 do %2"
+
+#: common/port/serial.cpp:466
+msgid "Error setting up break"
+msgstr "Chyba při nastavování zastavení"
+
+#: progs/gui/prog_group_ui.cpp:148
+msgid "Error uploading firmware."
+msgstr "Chyba při nahrávání firmware."
+
+#: common/port/serial.cpp:311
+msgid "Error while draining"
+msgstr "Chyba při odčerpávání"
+
+#: piklab-prog/cmdline.cpp:306 libgui/hex_editor.cpp:150
+msgid "Error while writing file \"%1\"."
+msgstr "Chyba při zápisu souboru \"%1\"."
+
+#: libgui/hex_editor.cpp:133
+msgid "Error(s) reading hex file."
+msgstr "Chyba(y) při čtení hex souboru."
+
+#: tools/gputils/gputils_config.cpp:13 tools/c18/c18_config.cpp:12
+msgid "Errors only"
+msgstr "Jen chyby"
+
+#: devices/pic/base/pic.cpp:79
+#, fuzzy
+msgid "Ethernet"
+msgstr "Rozšířené"
+
+#: devices/pic/base/pic_config.cpp:210
+msgid "Ethernet LED enable"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:110
+msgid "Even PWM output polarity"
+msgstr "Sudá polarita PWM výstupu"
+
+#: tools/base/generic_tool.cpp:43
+#, fuzzy
+msgid "Executable"
+msgstr "Typ spustitelného souboru:"
+
+#: tools/gui/toolchain_config_widget.cpp:52
+msgid "Executable Type:"
+msgstr "Typ spustitelného souboru:"
+
+#: tools/base/generic_tool.cpp:30
+msgid "Executable directory"
+msgstr "Adresář pro spouštění"
+
+#: tools/list/compile_manager.cpp:290
+msgid "Executing custom commands..."
+msgstr ""
+
+#: devices/base/generic_device.cpp:35
+msgid "Extended"
+msgstr "Rozšířené"
+
+#: devices/pic/base/pic_config.cpp:124
+msgid "Extended instruction set"
+msgstr "Rozšířená instrukční sada"
+
+#: devices/pic/base/pic_config.cpp:93
+msgid "Extended microcontroller"
+msgstr "Rozšířený mikrokontrolér"
+
+#: devices/pic/base/pic_config.cpp:35
+msgid "External"
+msgstr "Externí"
+
+#: coff/base/coff_object.cpp:133
+#, fuzzy
+msgid "External Definition"
+msgstr "Externí rezistor"
+
+#: coff/base/cdb_parser.cpp:53
+#, fuzzy
+msgid "External RAM"
+msgstr "Externí"
+
+#: coff/base/cdb_parser.cpp:27
+#, fuzzy
+msgid "External RAM Pointer"
+msgstr "Externí RC oscilátor"
+
+#: devices/pic/base/pic_config.cpp:40
+msgid "External RC oscillator"
+msgstr "Externí RC oscilátor"
+
+#: devices/pic/base/pic_config.cpp:42 devices/pic/base/pic_config.cpp:159
+#: devices/pic/base/pic_config.cpp:185
+msgid "External RC oscillator (no CLKOUT)"
+msgstr "Externí RC oscilátor (bez CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:41 devices/pic/base/pic_config.cpp:158
+#: devices/pic/base/pic_config.cpp:184
+msgid "External RC oscillator with CLKOUT"
+msgstr "Externí RC oscilátor s CLKOUT"
+
+#: coff/base/cdb_parser.cpp:48
+#, fuzzy
+msgid "External Stack"
+msgstr "Externí hodiny"
+
+#: coff/base/coff_object.cpp:130
+#, fuzzy
+msgid "External Symbol"
+msgstr "Externí"
+
+#: devices/pic/base/pic_config.cpp:219
+#, fuzzy
+msgid "External address bus shift"
+msgstr "Externí rezistor"
+
+#: devices/pic/base/pic_config.cpp:128
+msgid "External bus data wait"
+msgstr "Čekání externí datové sběrnice"
+
+#: devices/pic/base/pic_config.cpp:102
+msgid "External bus data width (in bits)"
+msgstr "Šířka externí datové sběrnice (v bitech)"
+
+#: devices/pic/base/pic_config.cpp:49 devices/pic/base/pic_config.cpp:260
+msgid "External clock"
+msgstr "Externí hodiny"
+
+#: devices/pic/base/pic_config.cpp:51 devices/pic/base/pic_config.cpp:153
+#: devices/pic/base/pic_config.cpp:174
+msgid "External clock (no CLKOUT)"
+msgstr "Externí hodiny (bez CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:53
+msgid "External clock (no CLKOUT), PLL enabled"
+msgstr "Externí hodiny (bez CLKOUT), PLL povoleno"
+
+#: devices/pic/base/pic_config.cpp:156 devices/pic/base/pic_config.cpp:177
+msgid "External clock with 16x PLL"
+msgstr "Externí hodiny s 16x PLL"
+
+#: devices/pic/base/pic_config.cpp:154 devices/pic/base/pic_config.cpp:175
+msgid "External clock with 4x PLL"
+msgstr "Externí hodiny s 4x PLL"
+
+#: devices/pic/base/pic_config.cpp:55
+msgid "External clock with 4x PLL (no CLKOUT)"
+msgstr "Externí hodiny s 4x PLL (bez CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:54
+msgid "External clock with 4x PLL and with CLKOUT"
+msgstr "Externí hodiny s 4x PLL a s CLKOUT"
+
+#: devices/pic/base/pic_config.cpp:155 devices/pic/base/pic_config.cpp:176
+msgid "External clock with 8x PLL"
+msgstr "Externí hodiny s 8x PLL"
+
+#: devices/pic/base/pic_config.cpp:50 devices/pic/base/pic_config.cpp:152
+#: devices/pic/base/pic_config.cpp:173
+msgid "External clock with CLKOUT"
+msgstr "Externí hodiny s CLKOUT"
+
+#: devices/pic/base/pic_config.cpp:52
+msgid "External clock with CLKOUT, PLL enabled"
+msgstr "Externí hodiny s CLKOUT, PLL povoleno"
+
+#: devices/pic/base/pic_config.cpp:56
+msgid "External clock with software controlled 4x PLL (no CLKOUT)"
+msgstr "Externí hodiny se softwarově ovládaným 4x PLL (bez CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:214
+#, fuzzy
+msgid "External memory bus"
+msgstr "Externí rezistor"
+
+#: devices/pic/base/pic_config.cpp:57
+msgid "External resistor"
+msgstr "Externí rezistor"
+
+#: devices/pic/base/pic_config.cpp:59
+msgid "External resistor (no CLKOUT)"
+msgstr "Externí rezistor (bez CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:58
+msgid "External resistor with CLKOUT"
+msgstr "Externí rezistor s CLKOUT"
+
+#: common/global/log.cpp:27
+msgid "Extra debug messages"
+msgstr "Dodatečné ladící zprávy"
+
+#: devices/base/device_group.cpp:295
+msgid "F (MHz)"
+msgstr "F (MHz)"
+
+#: devices/pic/base/pic_config.cpp:120
+msgid "FLTA mux"
+msgstr "FLTA multiplexer"
+
+#: devices/pic/base/pic_config.cpp:212
+msgid "FOSC1:FOSC0"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:27
+msgid "Fail"
+msgstr "Selhání"
+
+#: devices/pic/base/pic_config.cpp:79
+msgid "Fail-safe clock monitor"
+msgstr "Bezporuchový sledovač hodin"
+
+#: tools/gui/toolchain_config_widget.cpp:250
+msgid "Failed"
+msgstr "Selhalo"
+
+#: libgui/project_manager.cpp:503
+msgid "Failed to create new project file"
+msgstr "Selhalo vytváření nového projektového souboru"
+
+#: tools/list/compile_manager.cpp:223
+#, fuzzy
+msgid "Failed to execute command: check toolchain configuration."
+msgstr "Selhalo spuštění příkazu: zkontrolujte konfiguraci sady nástrojů"
+
+#: tools/list/compile_manager.cpp:277
+#, fuzzy
+msgid "Failed to execute custom command #%1."
+msgstr "Selhalo nastavování portu do módu '%1'."
+
+#: progs/gpsim/base/gpsim_debug.cpp:39 progs/sdcdb/base/sdcdb_debug.cpp:39
+msgid "Failed to halt target: kill process."
+msgstr "Selhalo zastavování cíle: zabijte proces."
+
+#: progs/icd2/base/icd2_debug.cpp:75
+msgid "Failed to halt target: try a reset."
+msgstr "Selhalo zastavování cíle: zkuste reset."
+
+#: progs/base/generic_debug.cpp:45
+msgid "Failed to initialize device for debugging."
+msgstr "Selhala inicializace mikrokontroléru pro ladění."
+
+#: progs/icd1/base/icd1.cpp:34 progs/icd2/base/icd2_serial.cpp:43
+msgid "Failed to set port mode to '%1'."
+msgstr "Selhalo nastavování portu do módu '%1'."
+
+#: progs/psp/base/psp.cpp:227
+msgid "Failed to set range"
+msgstr "Selhalo nastavování rozsahu"
+
+#: progs/gpsim/base/gpsim.cpp:58
+#, fuzzy
+msgid "Failed to start \"gpsim\"."
+msgstr "Selhalo spouštění \"gpsim\""
+
+#: progs/icd2/base/icd_prog.cpp:30 progs/pickit2/base/pickit2_prog.cpp:67
+msgid "Failed to upload firmware."
+msgstr "Selhalo nahrávání firmware."
+
+#: libgui/device_gui.cpp:82
+msgid "Family Tree"
+msgstr "Strom rodiny"
+
+#: devices/pic/base/pic_config.cpp:248
+#, fuzzy
+msgid "Fast RC oscillator"
+msgstr "Externí RC oscilátor"
+
+#: devices/pic/pic/pic_group.cpp:65
+#, fuzzy
+msgid "Features"
+msgstr "Vyspělý"
+
+#: common/gui/purl_gui.cpp:43
+msgid "File \"%1\" already exists. Overwrite ?"
+msgstr "Soubor \"%1\" již existuje. Přepsat?"
+
+#: libgui/editor_manager.cpp:109
+msgid "File \"%1\" already loaded. Reload?"
+msgstr "Soubor \"%1\" je již načten. Znovu načíst?"
+
+#: libgui/project_manager.cpp:313
+#, fuzzy
+msgid "File \"%1\" is not inside the project directory. Do you want to copy the file to your project directory?"
+msgstr "Soubor \"%1\" není v adresáři projektu."
+
+#: libgui/device_editor.cpp:74 libgui/editor.cpp:80
+msgid "File %1 not saved."
+msgstr "Soubor %1 neuložen."
+
+#: coff/base/coff_archive.cpp:115
+#, fuzzy
+msgid "File Members:"
+msgstr "Jméno souboru:"
+
+#: libgui/new_dialogs.cpp:63
+msgid "File Name:"
+msgstr "Jméno souboru:"
+
+#: libgui/hex_editor.cpp:142
+msgid "File URL: \"%1\"."
+msgstr "URL souboru: \"%1\"."
+
+#: coff/base/text_coff.cpp:128
+msgid "File could not be read"
+msgstr "Nelze číst soubor"
+
+#: piklab-hex/main.cpp:202
+#, fuzzy
+msgid "File created."
+msgstr "Hex soubor vyčištěn."
+
+#: libgui/project_manager.cpp:319
+msgid "File is already in the project."
+msgstr "Soubor již v projektu je."
+
+#: common/global/xml_data_file.cpp:35
+msgid "File is not of correct type."
+msgstr "Nesprávný typ souboru."
+
+#: common/global/pfile.cpp:55
+msgid "File not open."
+msgstr "Soubor neotevřen."
+
+#: coff/base/coff_archive.cpp:27
+msgid "File size not terminated by 'l' (\"%1\")."
+msgstr ""
+
+#: tools/list/compile_manager.cpp:111 tools/list/compile_manager.cpp:136
+#: common/gui/pfile_ext.cpp:25 common/gui/pfile_ext.cpp:64
+#: common/gui/pfile_ext.cpp:95 common/gui/pfile_ext.cpp:110
+#: common/cli/cli_pfile.cpp:20 common/cli/cli_pfile.cpp:38
+#: libgui/project_manager.cpp:307 libgui/project_manager.cpp:319
+msgid "File: %1"
+msgstr "Soubor: %1"
+
+#: libgui/project_manager.cpp:325 libgui/project_wizard.cpp:246
+msgid "File: %1\n"
+msgstr "Soubor: %1\n"
+
+#: libgui/project_wizard.cpp:82 coff/base/coff_object.cpp:152
+msgid "Filename"
+msgstr "Název souboru"
+
+#: piklab-coff/main.cpp:197
+#, fuzzy
+msgid "Files:"
+msgstr "Filtry:"
+
+#: piklab-hex/main.cpp:50
+msgid "Fill for checksum verification (cf datasheets)."
+msgstr ""
+
+#: piklab-hex/main.cpp:39
+#, fuzzy
+msgid "Fill option."
+msgstr "Soubor neotevřen."
+
+#: piklab-hex/main.cpp:275
+#, fuzzy
+msgid "Fill options:"
+msgstr "%1 přepínače"
+
+#: piklab-hex/main.cpp:48
+msgid "Fill with blank values (default)."
+msgstr ""
+
+#: piklab-hex/main.cpp:278
+#, fuzzy
+msgid "Fill with the specified numeric value."
+msgstr "Pokračovat se zvoleným názvem mikrokontroléru: \"%1\"..."
+
+#: piklab-hex/main.cpp:49
+msgid "Fill with zeroes."
+msgstr ""
+
+#: libgui/device_gui.cpp:110
+msgid "Filters:"
+msgstr "Filtry:"
+
+#: libgui/project_manager.cpp:192
+#, fuzzy
+msgid "Find Files..."
+msgstr "Přidat soubor..."
+
+#: progs/gui/prog_group_ui.cpp:64
+msgid "Firmware"
+msgstr "Firmware"
+
+#: progs/base/generic_prog.cpp:126
+msgid "Firmware directory is not configured or does not exist."
+msgstr "Adresář s firmware není nastaven nebo neexistuje."
+
+#: progs/icd2/base/icd2_debug.cpp:142
+msgid "Firmware directory not configured."
+msgstr "Adresář s firmware není nastaven."
+
+#: piklab-prog/cli_interactive.cpp:58
+msgid "Firmware directory."
+msgstr "Adresář s firmware."
+
+#: progs/gui/prog_config_widget.cpp:26
+msgid "Firmware directory:"
+msgstr "Adresář s firmware:"
+
+#: progs/icd2/base/icd_prog.cpp:26
+msgid "Firmware hex file seems incompatible with device 16F876 inside ICD."
+msgstr "Hex soubor s firmware není kompatibilní s mikrokontrolérem 16F876 v ICD."
+
+#: progs/pickit2/base/pickit2_prog.cpp:60
+msgid "Firmware hex file seems incompatible with device 18F2550 inside PICkit2."
+msgstr "Hex soubor s firmware není kompatibilní s mikrokontrolérem 18F2550 v PICkit2."
+
+#: progs/pickit2/base/pickit2.cpp:52
+msgid "Firmware memory does not match hex file (at address 0x%2: reading 0x%3 and expecting 0x%4)."
+msgstr "Paměť firmware se neshoduje s hex souborem (na adrese 0x%2: přečteno 0x%3 očekáváno 0x%4)."
+
+#: progs/icd2/base/icd2_prog.cpp:108
+msgid "Firmware still incorrect after uploading."
+msgstr "Firmware i po nahrání stále nesprávný."
+
+#: progs/pickit2/base/pickit2_prog.cpp:70
+msgid "Firmware succesfully uploaded."
+msgstr "Firmware úspěšně nahrán."
+
+#: progs/gui/prog_group_ui.cpp:147
+msgid "Firmware uploaded successfully."
+msgstr "Firmware nahrán úspěšně."
+
+#: progs/base/generic_prog.cpp:136
+msgid "Firmware version is %1"
+msgstr "Verze firmware je %1"
+
+#: piklab-hex/main.cpp:82
+msgid "First hex file: "
+msgstr "První hex soubor: "
+
+#: devices/base/generic_device.cpp:26
+#, fuzzy
+msgid "Flash"
+msgstr "Formát"
+
+#: libgui/device_gui.cpp:83
+msgid "Flat List"
+msgstr "Plochý seznam"
+
+#: coff/base/cdb_parser.cpp:36 coff/base/coff_object.cpp:164
+#, fuzzy
+msgid "Float"
+msgstr "Formát"
+
+#: devices/gui/memory_editor.cpp:277
+msgid "For checksum check"
+msgstr ""
+
+#: libgui/watch_view.cpp:99 libgui/watch_view.cpp:101
+msgid "Format"
+msgstr "Formát"
+
+#: piklab-hex/main.cpp:123 coff/base/text_coff.cpp:252
+msgid "Format:"
+msgstr "Formát:"
+
+#: libgui/toplevel.cpp:204
+msgid "Forward"
+msgstr "Vpřed"
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:36
+msgid "Found version \"%1\""
+msgstr "Nalezena verze \"%1\""
+
+#: devices/pic/base/pic_config.cpp:276
+msgid "Frequency range selection for FRC oscillator"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:24 coff/base/coff_object.cpp:179
+#, fuzzy
+msgid "Function"
+msgstr "Umístění"
+
+#: coff/base/coff_object.cpp:137
+#, fuzzy
+msgid "Function Argument"
+msgstr "Umístění"
+
+#: coff/base/cdb_parser.cpp:59
+msgid "Function or Undefined Space"
+msgstr ""
+
+#: devices/base/generic_device.cpp:18
+msgid "Future Product"
+msgstr "Budoucí produkt"
+
+#: devices/pic/gui/pic_group_ui.cpp:54
+msgid "GPRs"
+msgstr "GPRs"
+
+#: progs/gpsim/base/gpsim_debug.h:76
+msgid "GPSim"
+msgstr "GPSim"
+
+#: progs/gpsim/base/gpsim_debug.cpp:251 progs/sdcdb/base/sdcdb_debug.cpp:250
+msgid "GPSim (4MHz)"
+msgstr "GPSim (4MHz)"
+
+#: tools/gputils/gputils.h:33
+msgid "GPUtils"
+msgstr "GPUtils"
+
+#: libgui/config_center.h:34 libgui/project_editor.cpp:30
+msgid "General"
+msgstr "Obecné"
+
+#: libgui/config_center.h:35
+msgid "General Configuration"
+msgstr "Obecné nastavení"
+
+#: piklab-prog/cli_interactive.cpp:251
+msgid "General Purpose Registers:"
+msgstr "Obecné registry:"
+
+#: devices/pic/base/pic_protection.cpp:358
+#, fuzzy
+msgid "General Segment"
+msgstr "Obecné"
+
+#: devices/pic/base/pic_config.cpp:192
+msgid "General code segment read-protection"
+msgstr "Ochrana proti čtení obecného kódu"
+
+#: devices/pic/base/pic_config.cpp:193
+msgid "General code segment write-protection"
+msgstr "Ochrana proti zápisu obecného kódu"
+
+#: devices/pic/base/pic_config.cpp:243
+#, fuzzy
+msgid "General segment security"
+msgstr "Ochrana proti čtení obecného kódu"
+
+#: devices/pic/base/pic_config.cpp:242
+#, fuzzy
+msgid "General segment write-protection"
+msgstr "Ochrana proti zápisu obecného kódu"
+
+#: libgui/project_manager_ui.cpp:35
+msgid "Generated"
+msgstr "Generováno"
+
+#: libgui/config_gen.cpp:112
+msgid "Generation is not supported yet for the selected toolchain or device."
+msgstr "Generování není touto sadou nástrojů nebo tímto mikrokontrolérem podporováno."
+
+#: libgui/config_gen.cpp:126
+msgid "Generation is only partially supported for this device."
+msgstr "Generování je tímto mikrokontrolérem podporováno jen částečně."
+
+#: coff/base/cdb_parser.cpp:25
+#, fuzzy
+msgid "Generic Pointer"
+msgstr "Obecné přepínače"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:841
+msgid "Generic options"
+msgstr "Obecné přepínače"
+
+#: piklab-prog/cli_interactive.cpp:41
+msgid "Get property value: \"get <property>\" or \"<property>\"."
+msgstr "Získat hodnotu vlastnosti: \"get <vlastnost>\" nebo \"<vlastnost>\"."
+
+#: coff/base/cdb_parser.cpp:16
+msgid "Global"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:45
+msgid "Global declarations"
+msgstr "Globální deklarace"
+
+#: devices/pic/gui/pic_memory_editor.cpp:44
+msgid "Go to end"
+msgstr "Přejít na konec"
+
+#: devices/pic/gui/pic_memory_editor.cpp:41
+msgid "Go to start"
+msgstr "Přejít na začátek"
+
+#: piklab/main.cpp:21
+msgid "Graphical development environment for applications based on PIC and dsPIC microcontrollers."
+msgstr "Grafické vývojové prostředí pro aplikace s mikrokontroléry PIC a dsPIC."
+
+#: progs/direct/base/direct_prog_config.cpp:51
+msgid "HOODMICRO"
+msgstr "HOODMICRO"
+
+#: devices/pic/base/pic_config.cpp:258
+#, fuzzy
+msgid "HS crystal oscillator"
+msgstr "Vnitřní oscilátor"
+
+#: devices/pic/base/pic_config.cpp:169
+msgid "HS/2 Crystal with 16x PLL"
+msgstr "HS/2 krystal s 16x PLL"
+
+#: devices/pic/base/pic_config.cpp:167
+msgid "HS/2 Crystal with 4x PLL"
+msgstr "HS/2 krystal s 4x PLL"
+
+#: devices/pic/base/pic_config.cpp:168
+msgid "HS/2 Crystal with 8x PLL"
+msgstr "HS/2 krystal s 8x PLL"
+
+#: devices/pic/base/pic_config.cpp:172
+msgid "HS/3 Crystal with 16x PLL"
+msgstr "HS/3 krystal s 16x PLL"
+
+#: devices/pic/base/pic_config.cpp:170
+msgid "HS/3 Crystal with 4x PLL"
+msgstr "HS/3 krystal s 4x PLL"
+
+#: devices/pic/base/pic_config.cpp:171
+msgid "HS/3 Crystal with 8x PLL"
+msgstr "HS/3 krystal s 8x PLL"
+
+#: tools/gui/toolchain_config_widget.cpp:240
+msgid "Hardcoded (%1)"
+msgstr "Napevno zapsáno (%1)"
+
+#: devices/pic/base/pic.cpp:32
+msgid "Hardware Stack"
+msgstr "Hardwarový zásobník"
+
+#: progs/gui/hardware_config_widget.cpp:45
+msgid "Hardware name:"
+msgstr "Název hardware:"
+
+#: tools/base/generic_tool.cpp:31
+msgid "Header directory"
+msgstr "Adresář s hlavičkou"
+
+#: libgui/project_manager_ui.cpp:33
+msgid "Headers"
+msgstr "Hlavičky"
+
+#: tools/list/tools_config_widget.cpp:24
+msgid "Help Dialog"
+msgstr "Nápověda"
+
+#: libgui/likeback.cpp:184
+msgid "Help Improve the Application"
+msgstr "Pomozte vylepšit aplikaci"
+
+#: libgui/toplevel.cpp:539
+msgid "Hex"
+msgstr "Hex"
+
+#: common/common/purl_base.cpp:49 libgui/project_manager_ui.cpp:97
+msgid "Hex File"
+msgstr "Hex soubor"
+
+#: piklab-hex/main.cpp:148
+msgid "Hex file cannot be fixed because the format was not recognized or is inconsistent."
+msgstr "Hex soubor nemůže být opraven, protože nebyl rozeznán jeho formát nebo je soubor porušený."
+
+#: piklab-hex/main.cpp:156
+msgid "Hex file cleaned and fixed."
+msgstr "Hex soubor vyčištěn a opraven."
+
+#: piklab-hex/main.cpp:155
+msgid "Hex file cleaned."
+msgstr "Hex soubor vyčištěn."
+
+#: tools/gui/tool_config_widget.cpp:120
+msgid "Hex file format:"
+msgstr "Formát hex souboru:"
+
+#: piklab-hex/main.cpp:118
+#, fuzzy
+msgid "Hex file is compatible with device \"%1\"."
+msgstr "Hex soubor není kompatibilní s mikrokontrolérem: %1"
+
+#: piklab-hex/main.cpp:115 piklab-hex/main.cpp:144
+msgid "Hex file is valid."
+msgstr "Hex soubor je platný."
+
+#: piklab-prog/cmdline.cpp:175
+#, fuzzy
+msgid "Hex file seems incompatible with device \"%1\"."
+msgstr "Hex soubor není kompatibilní s mikrokontrolérem: %1"
+
+#: piklab-prog/cli_interactive.cpp:60
+msgid "Hex file to be used for programming."
+msgstr "Hex soubor, který se má použít k naprogramování."
+
+#: piklab-prog/cmdline.cpp:454
+msgid "Hex filename for programming."
+msgstr "Hex soubor k naprogramování."
+
+#: piklab-prog/cmdline.cpp:161
+msgid "Hex filename not specified."
+msgstr "Jméno hex souboru neurčeno."
+
+#: piklab-hex/main.cpp:288
+msgid "Hex filename(s)."
+msgstr "Název hex souboru."
+
+#: piklab-prog/cli_interactive.cpp:56
+msgid "Hex output file format."
+msgstr "Formát výstupního hex souboru."
+
+#: common/common/number.cpp:20
+msgid "Hexadecimal"
+msgstr "Šestnáctkový"
+
+#: progs/base/generic_prog.cpp:26
+msgid "High"
+msgstr "Vysoká"
+
+#: devices/pic/gui/pic_memory_editor.cpp:77
+#: devices/pic/base/pic_config.cpp:231 devices/pic/base/pic_config.cpp:238
+#, fuzzy
+msgid "High Security"
+msgstr "Nejvyšší"
+
+#: devices/base/generic_device.cpp:42
+#, fuzzy
+msgid "High Voltage"
+msgstr "Napětí"
+
+#: devices/pic/base/pic_config.cpp:277
+msgid "High range (nominal FRC frequency is 14.1 MHz)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:245
+#, fuzzy
+msgid "High security"
+msgstr "Nejvyšší"
+
+#: devices/pic/base/pic_config.cpp:147 devices/pic/base/pic_config.cpp:162
+msgid "High speed crystal"
+msgstr "High speed krystal"
+
+#: devices/pic/base/pic_config.cpp:60
+msgid "High speed crystal/resonator"
+msgstr "High speed krystal/rezonátor"
+
+#: devices/pic/base/pic_config.cpp:62
+msgid "High speed crystal/resonator with 4x PLL"
+msgstr "High speed krystal/rezonátor s 4x PLL"
+
+#: devices/pic/base/pic_config.cpp:63
+msgid "High speed crystal/resonator with software controlled 4x PLL"
+msgstr "High speed krystal/rezonátor se softwarově ovládaným 4x PLL"
+
+#: devices/pic/base/pic_config.cpp:61
+msgid "High speed crystal/resonator, PLL enabled"
+msgstr "High speed krystal/rezonátor, PLL povolen"
+
+#: devices/pic/base/pic_config.cpp:72
+msgid "Highest"
+msgstr "Nejvyšší"
+
+#: libgui/likeback.cpp:74
+msgid "I Do not Like..."
+msgstr "Nelíbí se mi..."
+
+#: libgui/likeback.cpp:81
+msgid "I Found a Bug..."
+msgstr "Našel jsem chybu..."
+
+#: libgui/likeback.cpp:67
+msgid "I Like..."
+msgstr "Líbí se mi..."
+
+#: libgui/toplevel.cpp:338 libgui/likeback.cpp:537
+msgid "I do not like..."
+msgstr "Nelíbí se mi..."
+
+#: libgui/toplevel.cpp:342 libgui/likeback.cpp:544
+msgid "I found a bug..."
+msgstr "Našel jsem chybu..."
+
+#: libgui/toplevel.cpp:334 libgui/likeback.cpp:530
+msgid "I like..."
+msgstr "Líbí se mi..."
+
+#: devices/pic/gui/pic_group_ui.cpp:47
+msgid "I/Os"
+msgstr "V/V"
+
+#: devices/pic/base/pic_config.cpp:273
+#, fuzzy
+msgid "I2C pins selection"
+msgstr "Popisy ikon:"
+
+#: devices/pic/base/pic_config.cpp:195
+msgid "ICD communication channel"
+msgstr "ICD komunikační kanál"
+
+#: progs/icd1/base/icd1_prog.h:44
+msgid "ICD1 Programmer"
+msgstr "ICD1 programátor"
+
+#: progs/icd2/base/icd2_debug.h:76
+msgid "ICD2 Debugger"
+msgstr "ICD2 debugger"
+
+#: progs/icd2/base/icd2_prog.h:76
+msgid "ICD2 Programmer"
+msgstr "ICD2 programátor"
+
+#: tools/gputils/gputils_generator.cpp:179
+#, fuzzy
+msgid "INT pin interrupt service routine"
+msgstr "podprogram pro obsluhu přerušení"
+
+#: devices/pic/base/pic_config.cpp:213
+msgid "INTRC"
+msgstr ""
+
+#: devices/pic/pic/pic_group.cpp:55
+msgid "IO Ports"
+msgstr "V/V porty"
+
+#: libgui/likeback.cpp:179
+msgid "Icons description:"
+msgstr "Popisy ikon:"
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:85
+msgid "Id returned by bootloader corresponds to other devices: %1 (%2 read and %3 expected)."
+msgstr "ID navrácené zavaděčem odpovídá jiným mikrokontrolérům: %1 (%2 přečteno a %3 očekáváno)."
+
+#: progs/icd2/gui/icd2_group_ui.cpp:21
+msgid "Id:"
+msgstr "Id:"
+
+#: devices/base/generic_device.cpp:17
+msgid "In Production"
+msgstr "Vyrábí se"
+
+#: devices/pic/prog/pic_prog_specific.cpp:19
+msgid "In Programming"
+msgstr "Programuje se"
+
+#: devices/pic/base/pic_config.cpp:82
+msgid "In-circuit debugger"
+msgstr "In-circuit debugger"
+
+#: common/common/purl_base.cpp:36
+msgid "Include File"
+msgstr "Vložit soubor"
+
+#: tools/gui/tool_config_widget.h:57
+msgid "Include directories:"
+msgstr "Vložit adresáře:"
+
+#: libgui/project_manager_ui.cpp:35
+msgid "Included"
+msgstr "Vložené"
+
+#: progs/psp/base/psp_serial.cpp:59
+msgid "Incorrect ack: expecting %1, received %2"
+msgstr "Nesprávné potvrzení: očekáváno %1, přijato %2"
+
+#: progs/psp/base/psp_serial.cpp:67
+msgid "Incorrect received data end: expecting 00, received %1"
+msgstr "Nesprávný konec přijatých dat: očekáváno 00, přijato %1"
+
+#: coff/base/coff_object.cpp:54
+#, fuzzy
+msgid "Indentifier"
+msgstr "Nedefinováno"
+
+#: devices/pic/gui/pic_config_word_editor.cpp:63
+msgid "Index:"
+msgstr "Index:"
+
+#: devices/base/generic_device.cpp:34
+msgid "Industrial"
+msgstr "Průmyslový"
+
+#: coff/base/coff_archive.cpp:107
+#, fuzzy
+msgid "Information:"
+msgstr "Nastavení:"
+
+#: devices/pic/base/pic_config.cpp:247
+#, fuzzy
+msgid "Initial oscillator source"
+msgstr "Zdroj oscilátoru"
+
+#: coff/base/coff_object.cpp:330
+#, fuzzy
+msgid "Initialized Data"
+msgstr "inicializuj PCLATH"
+
+#: coff/base/coff_object.cpp:122
+#, fuzzy
+msgid "Inside Section"
+msgstr "Popisy ikon:"
+
+#: coff/base/cdb_parser.cpp:32 coff/base/coff_object.cpp:162
+msgid "Int"
+msgstr ""
+
+#: common/cli/cli_main.cpp:69
+msgid "Interactive mode"
+msgstr "Interaktivní mód"
+
+#: piklab-prog/cmdline.cpp:228
+msgid "Interactive mode: type help for help"
+msgstr "Interaktivní mód: napište help pro nápovědu"
+
+#: common/port/usb_port.cpp:255
+msgid "Interface %1 not present: using %2"
+msgstr "Rozhraní %1 nenalezeno: použiji %2"
+
+#: coff/base/cdb_parser.cpp:54
+#, fuzzy
+msgid "Internal RAM"
+msgstr "Vnitřní doladění"
+
+#: coff/base/cdb_parser.cpp:28
+#, fuzzy
+msgid "Internal RAM Pointer"
+msgstr "Vnitřní oscilátor"
+
+#: coff/base/cdb_parser.cpp:49
+#, fuzzy
+msgid "Internal Stack"
+msgstr "Vnitřní rychlý RC"
+
+#: devices/pic/base/pic_config.cpp:73
+msgid "Internal Trim"
+msgstr "Vnitřní doladění"
+
+#: devices/pic/base/pic_config.cpp:141
+msgid "Internal fast RC"
+msgstr "Vnitřní rychlý RC"
+
+#: devices/pic/base/pic_config.cpp:249
+#, fuzzy
+msgid "Internal fast RC oscillator"
+msgstr "Vnitřní rychlý RC oscilátor s 8x PLL"
+
+#: devices/pic/base/pic_config.cpp:182
+msgid "Internal fast RC oscillator (no PLL)"
+msgstr "Vnitřní rychlý RC oscilátor (bez PLL)"
+
+#: devices/pic/base/pic_config.cpp:180
+msgid "Internal fast RC oscillator with 16x PLL"
+msgstr "Vnitřní rychlý RC oscilátor s 16x PLL"
+
+#: devices/pic/base/pic_config.cpp:178
+msgid "Internal fast RC oscillator with 4x PLL"
+msgstr "Vnitřní rychlý RC oscilátor s 4x PLL"
+
+#: devices/pic/base/pic_config.cpp:157 devices/pic/base/pic_config.cpp:179
+msgid "Internal fast RC oscillator with 8x PLL"
+msgstr "Vnitřní rychlý RC oscilátor s 8x PLL"
+
+#: devices/pic/base/pic_config.cpp:250
+#, fuzzy
+msgid "Internal fast RC oscillator with PLL"
+msgstr "Vnitřní rychlý RC oscilátor s 8x PLL"
+
+#: devices/pic/base/pic_config.cpp:255
+#, fuzzy
+msgid "Internal fast RC oscillator with postscaler"
+msgstr "Vnitřní rychlý RC oscilátor s 4x PLL"
+
+#: devices/pic/base/pic_config.cpp:142
+msgid "Internal low-power RC"
+msgstr "Vnitřní nízkopříkonový RC"
+
+#: devices/pic/base/pic_config.cpp:183
+msgid "Internal low-power RC oscillator"
+msgstr "Vnitřní nízkopříkonový RC oscilátor"
+
+#: devices/pic/base/pic_config.cpp:43
+msgid "Internal oscillator"
+msgstr "Vnitřní oscilátor"
+
+#: devices/pic/base/pic_config.cpp:45
+msgid "Internal oscillator (no CLKOUT)"
+msgstr "Vnitřní oscilátor (bez CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:205
+msgid "Internal oscillator speed"
+msgstr "Rychlost vnitřního oscilátoru"
+
+#: devices/pic/base/pic_config.cpp:44
+msgid "Internal oscillator with CLKOUT"
+msgstr "Vnitřní oscilátor s CLKOUT"
+
+#: devices/pic/base/pic_config.cpp:65
+msgid "Internal oscillator, HS used by USB"
+msgstr "Vnitřní oscilátor, HS použito USB"
+
+#: devices/pic/base/pic_config.cpp:64
+msgid "Internal oscillator, XT used by USB"
+msgstr "Vnitřní oscilátor, XT použito USB"
+
+#: devices/pic/base/pic_config.cpp:80
+msgid "Internal-external switchover"
+msgstr "Vnitřní-vnější přepínač"
+
+#: progs/icd2/base/icd2.cpp:332
+msgid "Invalid begin or end character for read block."
+msgstr "Neplatný počáteční nebo koncový znak čteného bloku."
+
+#: progs/psp/base/psp.cpp:185
+msgid "Invalid firmware version"
+msgstr "Neplatná verze firmware"
+
+#: progs/direct/gui/direct_config_widget.cpp:48
+msgid "Inverted"
+msgstr "Negovaný"
+
+#: libgui/toplevel.cpp:938
+#, fuzzy
+msgid "It is not possible to start a debugging session with an hex file not generated with the current project."
+msgstr "<qt>Není možné spustit ladění s hex souborem nevytvořeným s tímto projektem.</qt>"
+
+#: progs/icd2/base/icd2_prog.cpp:38
+msgid "It is not recommended to power dsPICs from ICD. Continue anyway?"
+msgstr "Není doporučeno napájet dsPIC z ICD. Přesto pokračovat?"
+
+#: libgui/likeback.cpp:395
+msgid "It will only be used to contact you back if more information is needed about your comments, how to reproduce the bugs you report, send bug corrections for you to test..."
+msgstr "Bude použit jen pro upřesnění vaší připomínky, například jak zreprodukovat vámi hlášenou chybu, zaslat vám opravu k testování..."
+
+#: devices/pic/base/pic.cpp:44
+msgid "J"
+msgstr ""
+
+#: tools/jal/jal.h:32
+msgid "JAL"
+msgstr "JAL"
+
+#: common/common/purl_base.cpp:27
+msgid "JAL Compiler"
+msgstr "Kompilátor JAL"
+
+#: common/common/purl_base.cpp:40
+msgid "JAL File"
+msgstr "Soubor JAL"
+
+#: tools/jalv2/jalv2.h:32
+msgid "JAL V2"
+msgstr "JAL V2"
+
+#: progs/direct/base/direct_prog_config.cpp:41
+msgid "JDM classic"
+msgstr "JDM classic"
+
+#: progs/direct/base/direct_prog_config.cpp:43
+msgid "JDM classic (delay 10)"
+msgstr "JDM classic (prodleva 10)"
+
+#: progs/direct/base/direct_prog_config.cpp:45
+msgid "JDM classic (delay 20)"
+msgstr "JDM classic (prodleva 20)"
+
+#: devices/pic/base/pic_config.cpp:268
+#, fuzzy
+msgid "JTAG port enabled"
+msgstr " port nenalezen"
+
+#: devices/pic/base/pic.cpp:45
+msgid "K"
+msgstr ""
+
+#: libgui/toplevel.cpp:156
+msgid "Konsole"
+msgstr "Konsole"
+
+#: devices/pic/base/pic.cpp:80
+msgid "LCD"
+msgstr ""
+
+#: common/global/about.cpp:81
+msgid "LPLAB author (original microchip programmer support)."
+msgstr "Autor LPLAB (podpora pro původní programátor Microchip)."
+
+#: coff/base/coff_object.cpp:134
+#, fuzzy
+msgid "Label"
+msgstr "Umístění"
+
+#: tools/base/generic_tool.cpp:21
+#, fuzzy
+msgid "Librarian"
+msgstr "Soubor knihovny"
+
+#: tools/base/generic_tool.cpp:21
+#, fuzzy
+msgid "Librarian:"
+msgstr "Soubor knihovny"
+
+#: tools/base/generic_tool.cpp:44
+#, fuzzy
+msgid "Library"
+msgstr "Soubor knihovny"
+
+#: tools/base/generic_tool.cpp:33
+msgid "Library Directory"
+msgstr "Adresář s knihovnami"
+
+#: common/common/purl_base.cpp:44
+msgid "Library File"
+msgstr "Soubor knihovny"
+
+#: coff/base/coff_object.cpp:153
+msgid "Line Number"
+msgstr ""
+
+#: libgui/text_editor.cpp:170
+msgid "Line: %1  Col: %2"
+msgstr "Řádek: %1  Sloupec: %2"
+
+#: tools/base/generic_tool.cpp:19
+msgid "Linker"
+msgstr "Linker"
+
+#: common/common/purl_base.cpp:46 libgui/project_manager.cpp:165
+#: libgui/project_manager_ui.cpp:33
+msgid "Linker Script"
+msgstr "Skript linkeru"
+
+#: tools/base/generic_tool.cpp:32
+msgid "Linker Script Directory"
+msgstr "Adresář se skripty linkeru"
+
+#: common/common/purl_base.cpp:47
+msgid "Linker Script for PIC30"
+msgstr "Skript linkeru pro PIC30"
+
+#: tools/base/generic_tool.cpp:19
+msgid "Linker:"
+msgstr "Linker:"
+
+#: libgui/project_manager_ui.cpp:99
+msgid "List"
+msgstr "Seznam"
+
+#: common/common/purl_base.cpp:52
+msgid "List File"
+msgstr "Vypiš soubor"
+
+#: coff/base/cdb_parser.cpp:18
+#, fuzzy
+msgid "Local"
+msgstr "Umístění"
+
+#: libgui/breakpoint_view.cpp:48
+msgid "Location"
+msgstr "Umístění"
+
+#: libgui/new_dialogs.cpp:32
+msgid "Location:"
+msgstr "Umístění:"
+
+#: coff/base/cdb_parser.cpp:31 coff/base/coff_object.cpp:163
+#, fuzzy
+msgid "Long"
+msgstr "na"
+
+#: coff/base/coff_object.cpp:174
+msgid "Long Double"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:25
+msgid "Low"
+msgstr "Nízký"
+
+#: devices/base/generic_device.cpp:40
+msgid "Low Power"
+msgstr "Nízký příkon"
+
+#: devices/base/generic_device.cpp:41
+msgid "Low Voltage"
+msgstr "Nízké napětí"
+
+#: devices/pic/base/pic.cpp:74
+#, fuzzy
+msgid "Low Voltage Detect"
+msgstr "Nízké napětí"
+
+#: devices/pic/base/pic_config.cpp:254
+#, fuzzy
+msgid "Low power RC oscillator"
+msgstr "Nízkopříkonový Timer1 oscilátor"
+
+#: devices/pic/base/pic_config.cpp:48
+msgid "Low power crystal"
+msgstr "Nízkopříkonový krystal"
+
+#: devices/pic/base/pic_config.cpp:116
+msgid "Low power in sleep mode"
+msgstr "Nízký příkon v režimu spánku"
+
+#: devices/pic/base/pic_config.cpp:278
+msgid "Low range (nominal FRC frequency is 9.7 MHz)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:86
+msgid "Low voltage programming"
+msgstr "Programování nízkým napětím"
+
+#: devices/pic/base/pic_config.cpp:181
+msgid "Low-power 32 kHz oscillator (TMR1 oscillator)"
+msgstr "Nízkopříkonový 32 kHz oscilátor (oscilátor TMR1)"
+
+#: devices/pic/base/pic_config.cpp:123
+msgid "Low-power timer1 oscillator"
+msgstr "Nízkopříkonový Timer1 oscilátor"
+
+#: devices/pic/base/pic_config.cpp:146 devices/pic/base/pic_config.cpp:161
+msgid "Low-power/low-frequency crystal"
+msgstr "Nízkopříkonový/nízkofrekvenční krystal"
+
+#: coff/base/cdb_parser.cpp:52
+#, fuzzy
+msgid "Lower-128-byte Internal RAM"
+msgstr "Vnitřní doladění"
+
+#: devices/pic/base/pic_config.cpp:69
+msgid "Lowest"
+msgstr "Nejnižší"
+
+#: progs/direct/base/direct.cpp:24
+msgid "MCLR (Vpp)"
+msgstr "MCLR (Vpp)"
+
+#: progs/icd2/base/icd2.cpp:52
+msgid "MCLR Vdd"
+msgstr "MCLR Vdd"
+
+#: progs/icd2/base/icd2.cpp:52
+msgid "MCLR Vpp"
+msgstr "MCLR Vpp"
+
+#: progs/icd2/base/icd2.cpp:51
+msgid "MCLR ground"
+msgstr "MCLR zem"
+
+#: devices/base/generic_device.cpp:60
+msgid "MLF"
+msgstr "MLF"
+
+#: tools/mpc/mpc.h:32
+msgid "MPC Compiler"
+msgstr "MPC kompilátor"
+
+#: progs/base/generic_prog.cpp:141 progs/base/generic_prog.cpp:149
+#: progs/base/generic_prog.cpp:157
+msgid "MPLAB %1"
+msgstr ""
+
+#: devices/base/generic_device.cpp:55
+msgid "MQFP"
+msgstr "MQFP"
+
+#: devices/base/generic_device.cpp:50
+msgid "MSOP"
+msgstr "MSOP"
+
+#: devices/pic/base/pic_config.cpp:220
+msgid "MSSP address select bit"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:138
+msgid "Macros"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:38
+msgid "Magic number: %1"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:109
+#, fuzzy
+msgid "Malformed record: "
+msgstr "Přijat poškozený řetězec \"%1\""
+
+#: progs/icd2/base/icd2.cpp:220
+msgid "Malformed string received \"%1\""
+msgstr "Přijat poškozený řetězec \"%1\""
+
+#: common/common/purl_base.cpp:53
+msgid "Map File"
+msgstr "Mapový soubor"
+
+#: devices/pic/base/pic_config.cpp:204
+msgid "Master clear pull-up resistor"
+msgstr "Master clear pull-up rezistor"
+
+#: devices/pic/base/pic_config.cpp:34
+msgid "Master clear reset"
+msgstr "Master clear reset"
+
+#: devices/base/generic_device.cpp:22
+msgid "Mature"
+msgstr "Vyspělý"
+
+#: common/global/log.cpp:28
+msgid "Max debug messages"
+msgstr "Maximum ladících zpráv"
+
+#: coff/base/coff_object.cpp:169
+msgid "Member Of Enumeration"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:19
+msgid "Member name not terminated by '/' (\"%1\")."
+msgstr ""
+
+#: coff/base/coff_object.cpp:144
+#, fuzzy
+msgid "Member of Enumeration"
+msgstr "Obecné nastavení"
+
+#: coff/base/coff_object.cpp:136
+msgid "Member of Structure"
+msgstr ""
+
+#: coff/base/coff_object.cpp:139
+msgid "Member of Union"
+msgstr ""
+
+#: libgui/device_gui.cpp:408 libgui/project_manager_ui.cpp:100
+msgid "Memory Map"
+msgstr "Mapa paměti"
+
+#: devices/mem24/mem24/mem24_group.cpp:22
+msgid "Memory Size"
+msgstr "Velikost paměti"
+
+#: devices/pic/pic/pic_group.cpp:27
+msgid "Memory Type"
+msgstr "Typ paměti"
+
+#: progs/icd2/base/icd2_debug.cpp:237
+msgid "Memory area for debug executive was not empty. Overwrite it and continue anyway..."
+msgstr "Oblast paměti pro ladění nebyla prázdná. Přepsat a pokračovat..."
+
+#: devices/pic/base/pic_config.cpp:83
+msgid "Memory parity error"
+msgstr "Chyba parity paměti"
+
+#: piklab-prog/cmdline.cpp:254
+msgid "Memory range not present on this device."
+msgstr "Tento rozsah paměti ve zvoleném mikrokontroléru není."
+
+#: piklab-prog/cmdline.cpp:258
+msgid "Memory range not recognized."
+msgstr "Rozsah paměti nerozpoznán."
+
+#: piklab-prog/cmdline.cpp:57
+msgid "Memory range to operate on."
+msgstr "Pracovat v rozsahu paměti."
+
+#: piklab-prog/cmdline.cpp:259
+msgid "Memory ranges are not supported for the specified device."
+msgstr "Rozsahy paměti nejsou pro zvolený mikrokontrolér podporovány."
+
+#: piklab-prog/cmdline.cpp:148
+msgid "Memory ranges for PIC/dsPIC devices:"
+msgstr "Rozsahy paměti pro PIC/dsPIC mikrokontroléry:"
+
+#: devices/pic/base/pic_config.cpp:94
+msgid "Microcontroller"
+msgstr "Mikrokontrolér"
+
+#: devices/pic/base/pic_config.cpp:95
+msgid "Microprocessor"
+msgstr "Mikroprocesor"
+
+#: devices/pic/base/pic_config.cpp:97
+msgid "Microprocessor with boot block"
+msgstr "Mikroprocesor se zavaděčem"
+
+#: devices/pic/base/pic_config.cpp:71
+msgid "Mid/High"
+msgstr "Střední/Vysoká"
+
+#: devices/pic/base/pic_config.cpp:70
+msgid "Mid/Low"
+msgstr "Střední/Nízká"
+
+#: devices/pic/base/pic.cpp:52
+msgid "Midrange Family"
+msgstr "Střední rodina"
+
+#: devices/pic/base/pic_register.cpp:76
+msgid "Mirror of %1"
+msgstr "Zrcadleno z %1"
+
+#: devices/pic/prog/pic_prog.cpp:260
+msgid "Missing or incorrect device (Read id is %1)."
+msgstr "Nepřipojený nebo chybný mikrokontrolér (Načtené ID je %1)."
+
+#: progs/icd2/base/icd2.cpp:51
+msgid "Module Vpp"
+msgstr "Vpp modulu"
+
+#: progs/direct/base/direct_prog_config.cpp:74
+msgid "Monty-Robot programmer"
+msgstr "Monty-Robot programátor"
+
+#: devices/pic/base/pic.cpp:82
+msgid "Motion Feeback"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:81
+msgid "Motor Control"
+msgstr ""
+
+#: common/gui/editlistbox.cpp:147
+msgid "Move &Down"
+msgstr "Posunout &dolů"
+
+#: common/gui/editlistbox.cpp:142
+msgid "Move &Up"
+msgstr "Posunout nahor&u"
+
+#: progs/direct/base/direct_prog_config.cpp:70
+msgid "Myke's EL Cheapo"
+msgstr "Myke's EL Cheapo"
+
+#: devices/pic/gui/pic_config_word_editor.cpp:58 libgui/project_editor.cpp:32
+#: libgui/project_wizard.cpp:120
+msgid "Name:"
+msgstr "Název:"
+
+#: libgui/project_manager.cpp:218
+msgid "New File..."
+msgstr "Nový soubor..."
+
+#: coff/base/coff.cpp:29 coff/base/coff_object.cpp:36
+msgid "New Microchip"
+msgstr ""
+
+#: libgui/project_manager.cpp:181 libgui/toplevel.cpp:226
+msgid "New Project..."
+msgstr "Nový projekt..."
+
+#: libgui/project_wizard.cpp:158
+msgid "New Project: Add Files"
+msgstr "Nový projekt: Přidat soubory"
+
+#: libgui/project_wizard.cpp:117
+msgid "New Project: Basic Settings"
+msgstr "Nový projekt: Základní nastavení"
+
+#: libgui/project_wizard.cpp:147
+msgid "New Project: Source Files"
+msgstr "Nový projekt: Zdrojové soubory"
+
+#: libgui/project_manager.cpp:197
+msgid "New Source File..."
+msgstr "Nový zdrojový soubor..."
+
+#: libgui/toplevel.cpp:184
+msgid "New hex File..."
+msgstr "Nový hex soubor..."
+
+#: progs/gui/hardware_config_widget.cpp:159
+#, fuzzy
+msgid "New/Test..."
+msgstr "Upravit/Testovat..."
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:180
+msgid "No \"goto\" instruction in the first four instructions."
+msgstr "Žádná \"goto\" instrukce v prvních čtyřech instrukcích."
+
+#: piklab-prog/cli_interactive.cpp:261
+#, fuzzy
+msgid "No COFF file specified."
+msgstr "Nespecifikován žádný COFF soubor"
+
+#: piklab-prog/cli_interactive.cpp:171
+#, fuzzy
+msgid "No breakpoint set."
+msgstr "Nenastaven žádný bod přerušení"
+
+#: common/cli/cli_main.cpp:27
+msgid "No command specified"
+msgstr "Nespecifikován žádný příkaz"
+
+#: tools/list/compile_manager.cpp:286
+#, fuzzy
+msgid "No custom commands specified."
+msgstr "Nespecifikován žádný příkaz"
+
+#: common/global/log.cpp:25
+msgid "No debug message"
+msgstr "Žádná ladící zpráva"
+
+#: progs/gui/prog_group_ui.cpp:98
+#, fuzzy
+msgid "No device selected."
+msgstr "Nezvolen žádný mikrokontrolér"
+
+#: piklab-prog/cli_interactive.cpp:243 piklab-prog/cli_interactive.cpp:259
+#, fuzzy
+msgid "No device specified."
+msgstr "Nespecifikován žádný mikrokontrolér"
+
+#: common/nokde/nokde_kaboutdata.cpp:430
+msgid ""
+"No licensing terms for this program have been specified.\n"
+"Please check the documentation or the source for any\n"
+"licensing terms.\n"
+msgstr ""
+"Pro tento program nebyly specifikovány žádné licenční podmínky.\n"
+"Prosím prohlédněte si dokumentaci nebo zdrojové texty,\n"
+"chcete-li se dozvědět o licenčních podmínkách.\n"
+
+#: progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp:37
+msgid "No of Retries:"
+msgstr "Počet opakování:"
+
+#: piklab-prog/cli_interactive.cpp:244 piklab-prog/cli_interactive.cpp:262
+#, fuzzy
+msgid "No register."
+msgstr "Žádný registr"
+
+#: devices/pic/gui/pic_group_ui.cpp:72
+msgid "No variable"
+msgstr "Žádná proměnná"
+
+#: piklab-prog/cli_interactive.cpp:266
+#, fuzzy
+msgid "No variable."
+msgstr "Žádná proměnná"
+
+#: piklab-hex/main.cpp:137
+msgid "No. of Words:"
+msgstr "Počet slov:"
+
+#: coff/base/coff_archive.cpp:108
+#, fuzzy
+msgid "No. of file members:"
+msgstr "Žádná proměnná"
+
+#: coff/base/text_coff.cpp:258
+#, fuzzy
+msgid "No. of sections:"
+msgstr "Počet opakování:"
+
+#: coff/base/text_coff.cpp:259 coff/base/coff_archive.cpp:109
+#, fuzzy
+msgid "No. of symbols:"
+msgstr "Počet slov:"
+
+#: coff/base/text_coff.cpp:260
+#, fuzzy
+msgid "No. of variables:"
+msgstr "Žádná proměnná"
+
+#: libgui/breakpoint_view.cpp:64
+msgid "Non-code breakpoint"
+msgstr "Bod přerušení mimo kód"
+
+#: devices/base/generic_device.cpp:39 devices/pic/base/pic.cpp:43
+msgid "Normal"
+msgstr "Normální"
+
+#: common/global/log.cpp:26
+msgid "Normal debug messages"
+msgstr "Normální ladící zprávy"
+
+#: progs/gui/hardware_config_widget.cpp:61
+msgid "Not Connected"
+msgstr "Nepřipojen"
+
+#: devices/base/generic_device.cpp:19
+msgid "Not Recommended for New Design"
+msgstr "Není doporučen pro nová zařízení"
+
+#: common/common/group.cpp:13
+#, fuzzy
+msgid "Not Supported"
+msgstr "Podporováno"
+
+#: devices/pic/base/pic_config.cpp:225
+#, fuzzy
+msgid "Not connected to EMB"
+msgstr "Nepřipojen"
+
+#: progs/direct/base/direct_prog_config.cpp:72
+#, fuzzy
+msgid "Not tested."
+msgstr "netestováno"
+
+#: libgui/likeback.cpp:598
+msgid "Note that to improve this application, it's important to tell us the things you like as much as the things you dislike."
+msgstr "Abychom mohli vylepšovat tuto aplikaci, je důležité abyste nám sdělili co se vám líbí stejně jako to co se vám nelíbí."
+
+#: common/port/usb_port.cpp:401
+msgid "Nothing received: retrying..."
+msgstr "Nic nepřijato: zkouším znovu..."
+
+#: common/port/usb_port.cpp:363
+msgid "Nothing sent: retrying..."
+msgstr "Nic neodesláno: zkouším znovu..."
+
+#: piklab-hex/main.cpp:232 piklab-prog/cli_interactive.cpp:158
+#: piklab-prog/cli_interactive.cpp:298
+#, fuzzy
+msgid "Number format not recognized."
+msgstr "Formát čísla nerozeznán"
+
+#: devices/pic/base/pic_config.cpp:262
+msgid "OSC2 pin function"
+msgstr ""
+
+#: coff/base/coff.cpp:23
+#, fuzzy
+msgid "Object"
+msgstr "Objekty"
+
+#: common/common/purl_base.cpp:43
+msgid "Object File"
+msgstr "Objektový soubor"
+
+#: libgui/project_manager.cpp:213 libgui/project_manager_ui.cpp:34
+msgid "Objects"
+msgstr "Objekty"
+
+#: common/common/number.cpp:22
+msgid "Octal"
+msgstr "Osmičkový"
+
+#: devices/pic/base/pic_config.cpp:107
+msgid "Odd PWM output polarity"
+msgstr "Nesprávná polarita PWM výstupu"
+
+#: coff/base/coff.cpp:27 coff/base/coff_object.cpp:35
+msgid "Old Microchip"
+msgstr ""
+
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:86
+msgid "Only bootloader version 1.x is supported"
+msgstr "Pouze zavaděč verze 1.x je podporován"
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:38
+#, fuzzy
+msgid "Only bootloader version 2.x is supported."
+msgstr "Pouze zavaděč verze 2.x je podporován"
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:315
+msgid "Only code and EEPROM will be erased."
+msgstr "Bude smazán jen program a EEPROM."
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:316
+msgid "Only code will be erased."
+msgstr "Bude smazán jen program."
+
+#: libgui/likeback.cpp:594
+msgid "Only english language is accepted."
+msgstr "Je povolen pouze anglický jazyk."
+
+#: progs/base/prog_config.cpp:69
+#, fuzzy
+msgid "Only program what is needed (faster)."
+msgstr "Ověřit pouze programovanou část paměti programu (rychlejší)."
+
+#: progs/base/debug_config.cpp:13
+msgid "Only stop stepping on project source line."
+msgstr ""
+
+#: progs/base/debug_config.cpp:12
+msgid "Only stop stepping on source line."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:177
+msgid "Only the first word of the \"goto\" instruction is into the first four instructions."
+msgstr "Pouze první slovo instrukce \"goto\" je v prvních čtyřech instrukcích."
+
+#: progs/base/prog_config.cpp:71
+msgid "Only verify programmed words in code memory (faster)."
+msgstr "Ověřit pouze programovanou část paměti programu (rychlejší)."
+
+#: progs/pickit2/gui/pickit2_group_ui.cpp:33
+msgid "Open Calibration Firmware"
+msgstr "Otevřít kalibrační firmware"
+
+#: libgui/toplevel.cpp:554
+msgid "Open File"
+msgstr "Otevřít soubor"
+
+#: progs/gui/prog_group_ui.cpp:142
+msgid "Open Firmware"
+msgstr "Otevřít firmware"
+
+#: libgui/project_manager.cpp:182 libgui/toplevel.cpp:228
+msgid "Open Project..."
+msgstr "Otevřít projekt..."
+
+#: libgui/toplevel.cpp:230
+msgid "Open Recent Project"
+msgstr "Otevřít nedávný projekt"
+
+#: common/global/log.cpp:58
+msgid "Operation aborted by user."
+msgstr "Operace přerušena uživatelem."
+
+#: coff/base/text_coff.cpp:257
+msgid "Option header:"
+msgstr ""
+
+#: piklab/main.cpp:15
+msgid "Optional filenames to be opened upon startup."
+msgstr "Názvy souborů, které mají být otevřeny po spuštění."
+
+#: coff/base/coff_object.cpp:469
+#, fuzzy
+msgid "Optional header format not supported: magic number is %1."
+msgstr "Volitelný formát hlavičky nepodporován: magické číslo je %1"
+
+#: coff/base/coff_object.cpp:538
+msgid "Optionnal header size is not %1: %2"
+msgstr "Velikost volitelné hlavičky není %1: %2"
+
+#: libgui/project_manager.cpp:191
+msgid "Options..."
+msgstr "Možnosti..."
+
+#: common/global/about.cpp:80
+msgid "Original author of PiKdev."
+msgstr "Původní autor PiKdev."
+
+#: common/global/about.cpp:85
+msgid "Original code for direct programming."
+msgstr "Původní kód pro přímé programování."
+
+#: devices/pic/prog/pic_prog.cpp:351
+msgid "Osccal backup cannot be read by selected programmer"
+msgstr "Záloha OSCCAL nemůže být přečtena zvoleným programátorem"
+
+#: devices/pic/prog/pic_prog.cpp:314
+msgid "Osccal backup cannot be read by the selected programmer"
+msgstr "Záloha OSCCAL nemůže být přečtena zvoleným programátorem"
+
+#: devices/pic/prog/pic_prog.cpp:303
+msgid "Osccal cannot be read by the selected programmer"
+msgstr "OSCCAL nemůže být přečtena zvoleným programátorem"
+
+#: progs/pickit2/gui/pickit2_group_ui.cpp:28
+msgid "Osccal regeneration not available for the selected device."
+msgstr "Navrácení OSCCAL není dostupné pro zvolený mikrokontrolér programátorem"
+
+#: devices/pic/base/pic_config.cpp:39
+msgid "Oscillator"
+msgstr "Oscilátor"
+
+#: progs/gui/prog_group_ui.cpp:175
+#, fuzzy
+msgid "Oscillator calibration regeneration is not available with the selected programmer."
+msgstr "Navrácení OSCCAL nemůže být provedeno zvoleným programátorem"
+
+#: devices/pic/base/pic_config.cpp:160
+msgid "Oscillator mode"
+msgstr "Mód oscilátoru"
+
+#: devices/pic/base/pic_config.cpp:140
+msgid "Oscillator source"
+msgstr "Zdroj oscilátoru"
+
+#: devices/pic/base/pic_config.cpp:100
+msgid "Oscillator system clock switch"
+msgstr "Přepínač systémových hodin oscilátoru"
+
+#: tools/gui/toolchain_config_widget.cpp:64
+#, fuzzy
+msgid "Output Executable Type:"
+msgstr "Typ spustitelného souboru:"
+
+#: piklab-prog/cmdline.cpp:178
+msgid "Output hex filename already exists."
+msgstr "Název výstupního hex souboru již existuje."
+
+#: libgui/log_view.cpp:89
+msgid "Output in console"
+msgstr "Výstup v konzoli"
+
+#: tools/list/tools_config_widget.cpp:53
+#, fuzzy
+msgid "Output type:"
+msgstr "Typ výstupního objektu:"
+
+#: common/cli/cli_main.cpp:63
+msgid "Overwrite files and answer \"yes\" to questions."
+msgstr "Přepsat soubory a odpovědět \"ano\" na otázky."
+
+#: progs/direct/base/direct_prog_config.cpp:32
+msgid "P16PRO40 7407"
+msgstr "P16PRO40 7407"
+
+#: progs/direct/base/direct_prog_config.cpp:30
+msgid "P16PRO40 classic"
+msgstr "P16PRO40 classic"
+
+#: progs/direct/base/direct_prog_config.cpp:36
+msgid "P16PRO40-VPP40 7407"
+msgstr "P16PRO40-VPP40 7407"
+
+#: progs/direct/base/direct_prog_config.cpp:34
+msgid "P16PRO40-VPP40 classic"
+msgstr "P16PRO40-VPP40 classic"
+
+#: devices/base/generic_device.cpp:46
+msgid "PDIP"
+msgstr "PDIP"
+
+#: devices/pic/pic/pic_group.h:25
+msgid "PIC"
+msgstr "PIC"
+
+#: progs/direct/base/direct_prog_config.cpp:47
+msgid "PIC Elmer"
+msgstr "PIC Elmer"
+
+#: coff/base/coff.cpp:28
+#, fuzzy
+msgid "PIC30"
+msgstr "PIC"
+
+#: tools/pic30/pic30.h:33
+msgid "PIC30 Toolchain"
+msgstr "Sada nástrojů PIC30"
+
+#: tools/picc/picc.h:76 coff/base/coff_object.cpp:37
+msgid "PICC Compiler"
+msgstr "PICC kompilátor"
+
+#: tools/picc/picc.h:64
+msgid "PICC Lite Compiler"
+msgstr "PICC Lite kompilátor"
+
+#: tools/picc/picc.h:88
+msgid "PICC-18 Compiler"
+msgstr "PICC-18 kompilátor"
+
+#: progs/pickit1/base/pickit1_prog.h:35
+msgid "PICkit1"
+msgstr "PICkit1"
+
+#: progs/pickit2/base/pickit2_prog.h:37
+msgid "PICkit2 Firmware 1.x"
+msgstr "PICkit2 Firmware 1.x"
+
+#: progs/pickit2v2/base/pickit2v2_prog.h:39
+msgid "PICkit2 Firmware 2.x"
+msgstr "PICkit2 Firmware 2.x"
+
+#: devices/base/generic_device.cpp:59
+msgid "PLCC"
+msgstr "PLCC"
+
+#: devices/pic/base/pic_config.cpp:201
+msgid "PLL clock (divided by)"
+msgstr "PLL hodiny (děleno)"
+
+#: devices/pic/base/pic_config.cpp:223
+msgid "PMP pin select bit"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:103
+msgid "PORTB A/D"
+msgstr "PORTB A/D"
+
+#: devices/pic/base/pic_config.cpp:131
+msgid "PWM multiplexed onto RE6 and RE3"
+msgstr "PWM multiplexováno mezi RE6 a RE3"
+
+#: devices/pic/base/pic_config.cpp:133
+msgid "PWM multiplexed onto RE6 and RE5"
+msgstr "PWM multiplexováno mezi RE6 a RE5"
+
+#: devices/pic/base/pic_config.cpp:132
+msgid "PWM multiplexed onto RH7 and RH4"
+msgstr "PWM multiplexováno mezi RE7 a RE4"
+
+#: devices/pic/base/pic_config.cpp:134
+msgid "PWM multiplexed onto RH7 and RH6"
+msgstr "PWM multiplexováno mezi RE7 a RE6"
+
+#: devices/pic/base/pic_config.cpp:113
+msgid "PWM output pin reset state"
+msgstr "Stav reset pinu PWM výstupu"
+
+#: devices/pic/base/pic_config.cpp:121
+msgid "PWM4 mux"
+msgstr "PWM4 multiplex"
+
+#: devices/base/device_group.cpp:251
+msgid "Packaging"
+msgstr "Pouzdro"
+
+#: coff/base/cdb_parser.cpp:29
+msgid "Paged Pointer"
+msgstr ""
+
+#: progs/gui/port_selector.cpp:21
+msgid "Parallel"
+msgstr "Paralelní"
+
+#: common/port/port.cpp:62
+msgid "Parallel Port"
+msgstr "Paralelní port"
+
+#: coff/base/text_coff.cpp:245
+#, fuzzy
+msgid "Parsing COFF file is not supported for this device or an error occured."
+msgstr "Nahrávání firmware není pro zvolený programátor podporováno."
+
+#: progs/manager/debug_manager.cpp:84
+msgid "Parsing COFF file: %1"
+msgstr "Parsuji COFF soubor: %1"
+
+#: progs/base/generic_prog.cpp:24
+msgid "Pass"
+msgstr "Úspěch"
+
+#: common/cli/cli_main.cpp:51
+msgid "Perform the requested command."
+msgstr "Provést požadovaný příkaz."
+
+#: devices/pic/base/pic_config.cpp:269
+#, fuzzy
+msgid "Peripheral pin select configuration"
+msgstr "Obecné nastavení"
+
+#: progs/picdem_bootloader/base/picdem_bootloader_prog.h:31
+msgid "Picdem Bootloader"
+msgstr "Picdem Bootloader"
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader_prog.h:32
+msgid "Pickit2 Bootloader"
+msgstr "Pickit2 Bootloader"
+
+#: progs/psp/base/psp_prog.h:37
+msgid "Picstart Plus"
+msgstr "Picstart Plus"
+
+#: common/common/purl_base.cpp:58
+msgid "Pikdev Project File"
+msgstr "Projektový soubor PikDev"
+
+#: piklab/main.cpp:21
+msgid "Piklab"
+msgstr "Piklab"
+
+#: piklab-coff/main.cpp:278
+#, fuzzy
+msgid "Piklab COFF Utility"
+msgstr "Piklab Hex Utility"
+
+#: piklab-hex/main.cpp:287
+msgid "Piklab Hex Utility"
+msgstr "Piklab Hex Utility"
+
+#: piklab-prog/cmdline.cpp:453
+msgid "Piklab Programmer Utility"
+msgstr "Piklab Programmer Utility"
+
+#: progs/gui/port_selector.cpp:68
+#, fuzzy
+msgid "Piklab has been compiled without support for USB port."
+msgstr "<qt>Piklab byl zkompilován bez podpory pro USB port.</qt>"
+
+#: progs/gui/port_selector.cpp:65
+#, fuzzy
+msgid "Piklab has been compiled without support for parallel port."
+msgstr "<qt>Piklab byl zkompilován bez podpory pro paralelní port.</qt>"
+
+#: libgui/device_gui.cpp:418
+msgid "Pin Diagrams"
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:34
+msgid "Pin assignment"
+msgstr "Přiřazení pinů"
+
+#: libgui/likeback.cpp:545
+msgid "Please briefly describe the bug you encountered."
+msgstr "Popište prosím stručně chybu, na kterou jste narazil."
+
+#: libgui/likeback.cpp:538
+msgid "Please briefly describe what you do not like."
+msgstr "Popište prosím stručně co se vám nelíbí."
+
+#: libgui/likeback.cpp:531
+msgid "Please briefly describe what you like."
+msgstr "Popište prosím stručně co se vám líbí."
+
+#: piklab-prog/cmdline.cpp:333
+msgid "Please check installation of selected software debugger."
+msgstr "Prosím zkontrolujte instalaci softwarového debuggeru."
+
+#: devices/pic/gui/pic_group_ui.cpp:79
+msgid "Please compile the current project"
+msgstr "Prosím zkompilujte projekt"
+
+#: libgui/likeback.cpp:394
+msgid "Please provide your email address."
+msgstr "Prosím zadejte svůj e-mail."
+
+#: common/nokde/nokde_kcmdlineargs.cpp:654
+msgid "Please use %1 to report bugs, do not mail the authors directly.\n"
+msgstr "Použijte prosím %1 k nahlášení chyby, nepište přímo autorům.\n"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:652
+msgid "Please use http://bugs.kde.org to report bugs, do not mail the authors directly.\n"
+msgstr "Použijte prosím http://bugs.kde.org k nahlášení chyby, nepište přímo autorům.\n"
+
+#: coff/base/coff_object.cpp:178
+#, fuzzy
+msgid "Pointer"
+msgstr "Paměť kódu"
+
+#: progs/gui/prog_config_center.cpp:119
+msgid "Port Selection"
+msgstr "Výběr portu"
+
+#: progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp:20
+msgid "Port Speed:"
+msgstr "Rychlost portu:"
+
+#: progs/direct/base/direct.cpp:27
+msgid "Power (Vdd)"
+msgstr "Napájení (Vdd)"
+
+#: progs/base/prog_config.cpp:72
+msgid "Power down target after programming."
+msgstr "Odpojit napájení cílového zařízení po skončení programování."
+
+#: devices/pic/base/pic_config.cpp:190
+msgid "Power-on reset timer value (ms)"
+msgstr "Hodnota power-on-reset časovače (ms)"
+
+#: devices/pic/base/pic_config.cpp:37
+msgid "Power-up timer"
+msgstr "Power-up časovač"
+
+#. i18n: file ./data/app_data/piklabui.rc line 83
+#: rc.cpp:27
+#, no-c-format
+msgid "Pr&ogrammer"
+msgstr "Pr&ogramátor"
+
+#: progs/base/prog_config.cpp:75
+msgid "Preserve data EEPROM when programming."
+msgstr "Zachovat EEPROM dat při programování."
+
+#: devices/pic/base/pic_config.cpp:143
+msgid "Primary"
+msgstr "Primární"
+
+#: devices/pic/base/pic_config.cpp:251
+#, fuzzy
+msgid "Primary oscillator"
+msgstr "Primární mód oscilátoru"
+
+#: devices/pic/base/pic_config.cpp:145 devices/pic/base/pic_config.cpp:256
+msgid "Primary oscillator mode"
+msgstr "Primární mód oscilátoru"
+
+#: devices/pic/base/pic_config.cpp:252
+#, fuzzy
+msgid "Primary oscillator with PLL"
+msgstr "Primární mód oscilátoru"
+
+#: progs/icd2/base/icd2_usb.cpp:77
+msgid "Problem connecting ICD2: please try again after unplug-replug."
+msgstr "Problém při připojování ICD2: odpojte jej, znovu připojte a zkuste to prosím znovu."
+
+#: devices/pic/base/pic_config.cpp:92
+msgid "Processor mode"
+msgstr "Mód procesoru"
+
+#: devices/pic/base/pic.cpp:34
+msgid "Program Executive"
+msgstr "Prováděcí část programu"
+
+#: libgui/toplevel.cpp:144
+msgid "Program Log"
+msgstr "Log programu"
+
+#: progs/base/prog_config.cpp:76
+#, fuzzy
+msgid "Program data EEPROM."
+msgstr "EEPROM dat"
+
+#: libgui/global_config.cpp:21
+msgid "Program device after successful build."
+msgstr "Naprogramovat mikrokontrolér po úspěšné kompilaci."
+
+#: piklab-prog/cmdline.cpp:41
+msgid "Program device memory: \"program <hexfilename>\"."
+msgstr "Naprogramovat paměť mikrokontroléru : \"program <hex_soubor>\"."
+
+#: progs/gui/prog_group_ui.cpp:56
+msgid "Programmer"
+msgstr "Programátor"
+
+#: progs/gui/prog_config_center.h:23 progs/gui/prog_config_center.h:24
+msgid "Programmer Options"
+msgstr "Možnosti programátoru"
+
+#: progs/gui/prog_config_center.h:35 progs/gui/prog_config_center.h:36
+msgid "Programmer Selection"
+msgstr "Výběr programátoru"
+
+#. i18n: file ./data/app_data/piklabui.rc line 161
+#: rc.cpp:48
+#, no-c-format
+msgid "Programmer Toolbar"
+msgstr "Nástrojová lišta programátoru"
+
+#: devices/pic/prog/pic_prog_specific.cpp:15
+msgid "Programmer Vpp"
+msgstr "Vpp programátoru"
+
+#: piklab-prog/cli_interactive.cpp:54
+msgid "Programmer hardware configuration to use (for direct programmer)."
+msgstr ""
+
+#: progs/gui/prog_config_center.cpp:41
+msgid "Programmer in use:"
+msgstr "Používaný programátor:"
+
+#: piklab-prog/cmdline.cpp:270
+msgid "Programmer is already disconnected."
+msgstr "Programátor je již odpojen."
+
+#: piklab-prog/cmdline.cpp:274
+msgid "Programmer is already running."
+msgstr "Programátor již běží."
+
+#: piklab-prog/cmdline.cpp:278
+msgid "Programmer is already stopped."
+msgstr "Programátor již zastavil."
+
+#: progs/base/generic_prog.cpp:134
+msgid "Programmer is in bootload mode."
+msgstr "Programátor je v módu zavaděče."
+
+#: piklab-prog/cmdline.cpp:158
+msgid "Programmer not specified."
+msgstr "Není zvolen programátor."
+
+#: piklab-prog/cli_interactive.cpp:57
+msgid "Programmer port (\"usb\" or device such as \"/dev/ttyS0\")"
+msgstr "Port programátoru (\"usb\" nebo zařízení jako \"/dev/ttyS0\")"
+
+#: piklab-prog/cli_interactive.cpp:53
+msgid "Programmer to use."
+msgstr "Použít programátor."
+
+#: tools/list/device_info.cpp:59
+#, fuzzy
+msgid "Programmers"
+msgstr "Programátor"
+
+#: tools/list/device_info.cpp:34
+#, fuzzy
+msgid "Programming Specifications"
+msgstr "Programování kalibrace..."
+
+#: devices/pic/prog/pic_prog.cpp:710
+msgid "Programming calibration data needs a chip erase. Continue anyway?"
+msgstr "K programování kalibračních dat je třeba smazat celý čip. Pokračovat?"
+
+#: devices/pic/prog/pic_prog.cpp:738
+msgid "Programming calibration successful"
+msgstr "Programování kalibrace úspěšné"
+
+#: devices/pic/prog/pic_prog.cpp:735 devices/pic/prog/pic_prog.cpp:736
+msgid "Programming calibration..."
+msgstr "Programování kalibrace..."
+
+#: progs/icd2/base/icd2_debug.cpp:272
+msgid "Programming device for debugging test..."
+msgstr "Programování mikrokontroléru pro ladění..."
+
+#: progs/icd2/base/icd2_debug.cpp:277 progs/base/generic_prog.cpp:341
+msgid "Programming device memory..."
+msgstr "Programování paměti mikrokontroléru..."
+
+#: libgui/toplevel.cpp:849
+msgid "Programming in progress. Cannot be aborted."
+msgstr "Probíhá programování. Nemohu přerušit."
+
+#: progs/icd2/base/icd2_debug.cpp:279
+msgid "Programming successful"
+msgstr "Programování úspěšné"
+
+#: progs/base/generic_prog.cpp:343
+msgid "Programming successful."
+msgstr "Programování úspěšné."
+
+#: progs/base/generic_prog.cpp:33
+msgid "Programming..."
+msgstr "Programování..."
+
+#: libgui/project_manager.cpp:190
+msgid "Project"
+msgstr "Projekt"
+
+#: libgui/project_wizard.cpp:187
+msgid "Project \"%1\"already exists. Overwrite it?"
+msgstr "Projekt \"%1\" již existuje. Přepsat?"
+
+#: common/common/purl_base.cpp:51
+msgid "Project File"
+msgstr "Soubor projektu"
+
+#: common/common/purl_base.cpp:127
+msgid "Project Files"
+msgstr "Soubory projektu"
+
+#: libgui/toplevel.cpp:121
+msgid "Project Manager"
+msgstr "Správce projektu"
+
+#: libgui/project_editor.cpp:21
+msgid "Project Options"
+msgstr "Možnosti projektu"
+
+#: libgui/toplevel.cpp:234
+msgid "Project Options..."
+msgstr "Možnosti projektu..."
+
+#. i18n: file ./data/app_data/piklabui.rc line 145
+#: rc.cpp:42
+#, no-c-format
+msgid "Project Toolbar"
+msgstr "Nástrojová lišta projektu"
+
+#: libgui/project_manager.cpp:526
+msgid "Project already loaded. Reload?"
+msgstr "Projekt je již načten. Obnovit?"
+
+#: libgui/project.cpp:24
+msgid "Project file %1 does not exist."
+msgstr "Projektový soubor %1 neexistuje."
+
+#: libgui/project_wizard.cpp:171
+msgid "Project name is empty."
+msgstr "Název projektu je prázdný."
+
+#: progs/direct/base/direct_prog_config.cpp:64
+msgid "Propic2 Vpp-1"
+msgstr "Propic2 Vpp-1"
+
+#: progs/direct/base/direct_prog_config.cpp:66
+msgid "Propic2 Vpp-2"
+msgstr "Propic2 Vpp-2"
+
+#: progs/direct/base/direct_prog_config.cpp:68
+msgid "Propic2 Vpp-3"
+msgstr "Propic2 Vpp-3"
+
+#: devices/pic/gui/pic_config_word_editor.cpp:93
+msgid "Protected Mask:"
+msgstr "Chráněná maska:"
+
+#: devices/pic/prog/pic_prog.cpp:635
+msgid "Protecting code memory or data EEPROM on OTP devices is disabled as a security..."
+msgstr "Ochrana paměti kódu nebo EEPROM dat na OTP mikrokontrolérech je zapnuta z důvodu bezpečnosti..."
+
+#: devices/base/generic_device.cpp:57
+msgid "QFN"
+msgstr "QFN"
+
+#: devices/base/generic_device.cpp:58
+#, fuzzy
+msgid "QFN-S"
+msgstr "DFN-S"
+
+#: piklab-prog/cli_interactive.cpp:38
+msgid "Quit."
+msgstr "Ukončit."
+
+#: libgui/toplevel.cpp:298
+msgid "R&eset"
+msgstr "O&bnovit"
+
+#: libgui/toplevel.cpp:276
+msgid "R&estart"
+msgstr "R&estartovat"
+
+#: libgui/text_editor.cpp:171
+msgid "R/O"
+msgstr "R/O"
+
+#: devices/base/generic_device.cpp:28
+msgid "ROM"
+msgstr "ROM"
+
+#: devices/base/generic_device.cpp:29
+msgid "ROM-less"
+msgstr "Bez ROM"
+
+#: devices/pic/gui/pic_config_word_editor.cpp:78
+msgid "Raw Blank Value:"
+msgstr "Hrubá hodnota mazání:"
+
+#: devices/pic/gui/pic_config_word_editor.cpp:68
+msgid "Raw Value:"
+msgstr "Hrubá hodnota:"
+
+#: devices/gui/memory_editor.cpp:278
+msgid "Re&load"
+msgstr "Znovu načís&t"
+
+#: progs/manager/debug_manager.cpp:317
+msgid "Reached breakpoint."
+msgstr "Dosažen bod přerušení."
+
+#: devices/pic/gui/pic_register_view.cpp:83 progs/gui/prog_group_ui.cpp:34
+#: progs/gui/prog_group_ui.cpp:45 libgui/toplevel.cpp:953
+msgid "Read"
+msgstr "Načíst"
+
+#: devices/pic/gui/pic_register_view.cpp:262
+msgid "Read All"
+msgstr "Načíst vše"
+
+#: libgui/hex_editor.cpp:39
+msgid "Read Only Mode"
+msgstr "Režim jen pro čtení"
+
+#: piklab-prog/cmdline.cpp:45
+msgid "Read device memory: \"read <hexfilename>\"."
+msgstr "Načíst paměť mikrokontroléru: \"read <hex_soubor>\"."
+
+#: devices/pic/prog/pic_prog.cpp:275
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:78
+msgid "Read id does not match the specified device name \"%1\"."
+msgstr "Načtení ID neodpovídá zvolenému mikrokontroléru \"%1\"."
+
+#: devices/pic/prog/pic_prog.cpp:273
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:76
+msgid "Read id: %1"
+msgstr "Načtené ID: %1"
+
+#: piklab-prog/cli_interactive.cpp:45
+msgid "Read or set a register or variable: \"x PORTB\" or \"x W 0x1A\"."
+msgstr "Přečíst nebo nastavit registr nebo proměnnou: \"x PORTB\" nebo \"x W 0x1A\"."
+
+#: piklab-prog/cli_interactive.cpp:343
+#, fuzzy
+msgid "Read string is different than expected: %1 (%2)."
+msgstr "Načtený řetězec je jiný než bylo očekáváno: %1 (%2)"
+
+#: piklab-prog/cmdline.cpp:291 piklab-prog/cmdline.cpp:296
+#: piklab-prog/cmdline.cpp:301
+msgid "Reading device memory not supported for specified programmer."
+msgstr "Čtení paměti mikrokontroléru není zvoleným programátorem podporováno."
+
+#: progs/base/generic_prog.cpp:319
+msgid "Reading device memory..."
+msgstr "Čtení paměti mikrokontroléru..."
+
+#: progs/base/generic_prog.cpp:322
+msgid "Reading done."
+msgstr "Čtení hotovo."
+
+#: progs/base/generic_prog.cpp:32
+msgid "Reading..."
+msgstr "Čtení..."
+
+#: progs/base/generic_debug.cpp:48
+msgid "Ready to start debugging."
+msgstr "Připraven spustit ladění."
+
+#: progs/icd2/base/icd2.cpp:212
+msgid "Received length too short."
+msgstr "Přijatá délka příliš malá."
+
+#: progs/icd2/base/icd2.cpp:216
+msgid "Received string too short."
+msgstr "Přijatý řetězec příliž krátký."
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:107
+msgid "Received unexpected character ('%1' received; 'K' expected)."
+msgstr "Přijat neočekávaný znak ('%1' přijat; 'K' očekáván)."
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:104
+msgid "Received unexpected character ('%1' received; 'K' or 'N' expected)."
+msgstr "Přijat neočekávaný znak ('%1' přijat; 'K' nebo 'N' očekáván)"
+
+#: libgui/toplevel.cpp:905
+#, fuzzy
+msgid "Recompile First"
+msgstr "Z&kompilovat soubor"
+
+#: progs/gui/prog_group_ui.cpp:36
+#, fuzzy
+msgid "Regenerating..."
+msgstr "Obnovuji..."
+
+#: coff/base/coff_object.cpp:145
+#, fuzzy
+msgid "Register Parameter"
+msgstr "Registry"
+
+#: coff/base/cdb_parser.cpp:58
+#, fuzzy
+msgid "Register Space"
+msgstr "Registry"
+
+#: coff/base/coff_object.cpp:132
+#, fuzzy
+msgid "Register Variable"
+msgstr "Registry"
+
+#: libgui/editor_manager.cpp:489 libgui/watch_view.cpp:48
+#: libgui/project_manager_ui.cpp:127
+msgid "Registers"
+msgstr "Registry"
+
+#: devices/pic/gui/pic_register_view.cpp:273
+msgid "Registers information not available."
+msgstr "Informace o registrech není dostupná."
+
+#: coff/base/coff_object.cpp:248
+msgid "Relocation address beyong section size: %1/%2"
+msgstr "Adresa pro relokaci je za hranicí sekce: %1/%2"
+
+#: coff/base/coff_object.cpp:251
+msgid "Relocation has unknown symbol: %1"
+msgstr "Relokace má neznámý symbol: %1"
+
+#: coff/base/coff_object.cpp:255
+#, fuzzy
+msgid "Relocation is an auxiliary symbol: %1"
+msgstr "Relokace má neznámý symbol: %1"
+
+#: common/gui/editlistbox.cpp:131
+msgid "Remove All"
+msgstr "Odstranit vše"
+
+#: libgui/project_manager.cpp:208
+msgid "Remove From Project"
+msgstr "Odstranit z projektu"
+
+#: libgui/breakpoint_view.cpp:24
+msgid "Remove breakpoint"
+msgstr "Odstranit bod přerušení"
+
+#: tools/list/compile_process.cpp:28
+msgid "Replaced by \"xxx\" when \"wine\" is used."
+msgstr "Nahrazeno \"xxx\" při použití \"wine\"."
+
+#: tools/list/compile_process.cpp:29
+#, fuzzy
+msgid "Replaced by \"xxx\" when the device name is specified."
+msgstr "Nahrazeno \"xxx\" při použití \"wine\"."
+
+#: tools/list/compile_process.cpp:27
+msgid "Replaced by \"xxx\" when there is a custom linker script."
+msgstr "Nahrazeno \"xxx\" při použití uživatelského skriptu pro linker."
+
+#: tools/list/compile_process.cpp:45
+msgid "Replaced by a separation into two arguments."
+msgstr "Nahrazeno rozdělením do dvou parametrů."
+
+#: tools/list/compile_process.cpp:34
+msgid "Replaced by the COFF filename."
+msgstr "Nahrazeno názvem COFF souboru."
+
+#: tools/list/compile_process.cpp:39
+msgid "Replaced by the device family name (when needed)."
+msgstr "Nahrazen názvem skupiny mikrokontrolérů (v případě potřeby)."
+
+#: tools/list/compile_process.cpp:38
+msgid "Replaced by the device name."
+msgstr "Nahrazeno názvem mikrokontroléru."
+
+#: tools/list/compile_process.cpp:43
+msgid "Replaced by the linker script basename."
+msgstr "Nahrazeno názvem skriptu pro linker."
+
+#: tools/list/compile_process.cpp:44
+msgid "Replaced by the linker script filename."
+msgstr "Nahrazeno názvem souboru se skriptem pro linker."
+
+#: tools/list/compile_process.cpp:42
+msgid "Replaced by the linker script path."
+msgstr "Nahrazeno cestou ke skriptu pro linker."
+
+#: tools/list/compile_process.cpp:37
+msgid "Replaced by the list filename."
+msgstr "Nahrazeno názvem seznamu."
+
+#: tools/list/compile_process.cpp:31
+msgid "Replaced by the list of additionnal libraries."
+msgstr "Nahrazeno seznamem dodatečných knihoven."
+
+#: tools/list/compile_process.cpp:30
+msgid "Replaced by the list of additionnal objects."
+msgstr "Nahrazeno seznamem dodatečných objektů."
+
+#: tools/list/compile_process.cpp:35
+msgid "Replaced by the map filename."
+msgstr "Nahrazeno názvem souboru mapy."
+
+#: tools/list/compile_process.cpp:41
+#, fuzzy
+msgid "Replaced by the object file name."
+msgstr "Nahrazeno názvem projektu."
+
+#: tools/list/compile_process.cpp:32
+msgid "Replaced by the output filename."
+msgstr "Nahrazeno názvem výstupního souboru."
+
+#: tools/list/compile_process.cpp:33
+msgid "Replaced by the project name."
+msgstr "Nahrazeno názvem projektu."
+
+#: tools/list/compile_process.cpp:40
+msgid "Replaced by the relative input filepath(s)."
+msgstr "Nahrazeno relativní cestou vstupu."
+
+#: tools/list/compile_process.cpp:26
+msgid "Replaced by the source directory."
+msgstr "Nahrazeno zdrojovým adresářem."
+
+#: tools/list/compile_process.cpp:36
+msgid "Replaced by the symbol filename."
+msgstr "Nahrazeno názvem souboru symbolu."
+
+#: libgui/toplevel.cpp:325
+msgid "Report Bug..."
+msgstr "Nahlásit chybu..."
+
+#: libgui/likeback.cpp:182
+msgid "Report a bug."
+msgstr "Nahlásit chybu."
+
+#: libgui/device_gui.cpp:99
+#, fuzzy
+msgid "Reset Filters"
+msgstr "Vybrat soubory"
+
+#: devices/pic/prog/pic_prog_specific.cpp:23
+msgid "Reset Held"
+msgstr "Reset podržen"
+
+#: devices/pic/prog/pic_prog_specific.cpp:23
+msgid "Reset Released"
+msgstr "Reset uvolněn"
+
+#: devices/pic/base/pic_config.cpp:194
+msgid "Reset into clip on emulation mode"
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:193
+msgid "Reset.<Translators: please translate the past form of the verb>"
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:196
+#, fuzzy
+msgid "Restarting..."
+msgstr "Restartovat..."
+
+#: progs/icd1/gui/icd1_group_ui.cpp:20
+msgid "Result:"
+msgstr "Výsledek:"
+
+#: piklab-hex/main.cpp:29
+#, fuzzy
+msgid "Return checksum."
+msgstr "Nastavit na nechráněný kontrolní součet."
+
+#: piklab-coff/main.cpp:25
+#, fuzzy
+msgid "Return general informations."
+msgstr "Zobrazit informaci o licenci"
+
+#: piklab-hex/main.cpp:26
+msgid "Return information about hex file."
+msgstr "Vypsat informace o hex souboru."
+
+#: piklab-coff/main.cpp:29
+#, fuzzy
+msgid "Return informations about code lines (for object)."
+msgstr "Vypsat informace o hex souboru."
+
+#: piklab-coff/main.cpp:30
+#, fuzzy
+msgid "Return informations about files."
+msgstr "Vypsat informace o hex souboru."
+
+#: piklab-coff/main.cpp:28
+#, fuzzy
+msgid "Return informations about sections (for object)."
+msgstr "Vypsat informace o hex souboru."
+
+#: piklab-coff/main.cpp:27
+#, fuzzy
+msgid "Return informations about symbols."
+msgstr "Vypsat informace o hex souboru."
+
+#: piklab-coff/main.cpp:26
+#, fuzzy
+msgid "Return informations about variables (for object)."
+msgstr "Vypsat informace o hex souboru."
+
+#: piklab-prog/cli_interactive.cpp:57
+msgid "Return the list of detected ports."
+msgstr "Vypsat seznam zjištěných portů."
+
+#: piklab-prog/cmdline.cpp:58
+msgid "Return the list of memory ranges."
+msgstr "Vypsat seznam paměťových rozsahů."
+
+#: common/cli/cli_main.cpp:52
+msgid "Return the list of recognized commands."
+msgstr "Vypsat seznam podporovaných příkazů."
+
+#: piklab-hex/main.cpp:38 piklab-prog/cli_interactive.cpp:55
+#: piklab-coff/main.cpp:38
+msgid "Return the list of supported devices."
+msgstr "Vypsat seznam podporovaných mikrokontrolérů."
+
+#: piklab-hex/main.cpp:39
+#, fuzzy
+msgid "Return the list of supported fill options."
+msgstr "Vypsat seznam podporovaných formátů hex souboru."
+
+#: piklab-prog/cli_interactive.cpp:56
+msgid "Return the list of supported hex file formats."
+msgstr "Vypsat seznam podporovaných formátů hex souboru."
+
+#: piklab-prog/cli_interactive.cpp:54
+#, fuzzy
+msgid "Return the list of supported programmer hardware configurations."
+msgstr "Vypsat seznam podporovaných programátorů."
+
+#: piklab-prog/cli_interactive.cpp:53
+msgid "Return the list of supported programmers."
+msgstr "Vypsat seznam podporovaných programátorů."
+
+#: coff/base/coff_object.cpp:331
+msgid "Rom Data"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:37
+msgid "Run device (release reset)."
+msgstr "Spustit mikrokontrolér (uvolnit reset)."
+
+#: progs/base/prog_config.cpp:77
+#, fuzzy
+msgid "Run device after successful programming."
+msgstr "Naprogramovat mikrokontrolér po úspěšné kompilaci."
+
+#: progs/base/generic_prog.cpp:224
+msgid "Run..."
+msgstr "Spustit..."
+
+#: devices/pic/prog/pic_prog_specific.cpp:19
+msgid "Running"
+msgstr "Běží"
+
+#: progs/manager/debug_manager.cpp:240 progs/base/generic_prog.cpp:221
+msgid "Running..."
+msgstr "Běží..."
+
+#: coff/base/cdb_parser.cpp:38
+msgid "SBIT"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:57
+msgid "SBIT Space"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:78
+msgid "SBODEN controls BOD function"
+msgstr "SBODEN ovládá funkci BOD"
+
+#: progs/sdcdb/base/sdcdb_debug.h:76
+msgid "SDCDB"
+msgstr ""
+
+#: devices/base/generic_device.cpp:47
+msgid "SDIP"
+msgstr "SDIP"
+
+#: coff/base/cdb_parser.cpp:56
+msgid "SFR Space"
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:41
+msgid "SFRs"
+msgstr "SFRs"
+
+#: devices/base/generic_device.cpp:53
+msgid "SOIC"
+msgstr "SOIC"
+
+#: devices/base/generic_device.cpp:49
+msgid "SOT-23"
+msgstr "SOT-23"
+
+#: devices/base/generic_device.cpp:48
+#, fuzzy
+msgid "SPDIP"
+msgstr "PDIP"
+
+#: devices/base/generic_device.cpp:51
+msgid "SSOP"
+msgstr "SSOP"
+
+#: devices/pic/base/pic.cpp:73
+#, fuzzy
+msgid "SSP"
+msgstr "SSOP"
+
+#: devices/pic/base/pic_config.cpp:122
+msgid "SSP I/O mux (SCK/SLC, SDA/SDI, SD0)"
+msgstr "SSP V/V multiplex (SCK/SLC, SDA/SDI, SD0)"
+
+#: piklab-prog/cli_interactive.cpp:62
+msgid "Same as \"device\"."
+msgstr "Stejné jako \"mikrokontrolér\"."
+
+#: libgui/toplevel.cpp:190
+msgid "Save All"
+msgstr "Uložit vše"
+
+#: libgui/editor.cpp:53
+msgid "Save File"
+msgstr "Uložit soubor"
+
+#: libgui/log_view.cpp:132
+msgid "Save log to file"
+msgstr "Uložit log do souboru"
+
+#: piklab-hex/main.cpp:94
+msgid "Second hex file: "
+msgstr "Druhý hex soubor:"
+
+#: devices/pic/base/pic_config.cpp:253
+#, fuzzy
+msgid "Secondary oscillator (LP)"
+msgstr "Vnitřní oscilátor (bez CLKOUT)"
+
+#: coff/base/coff_object.cpp:55 coff/base/coff_object.cpp:155
+#, fuzzy
+msgid "Section"
+msgstr "Umístění:"
+
+#: piklab-coff/main.cpp:164
+#, fuzzy
+msgid "Sections:"
+msgstr "Umístění:"
+
+#: devices/pic/base/pic_protection.cpp:357
+msgid "Secure Segment"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:240
+#, fuzzy
+msgid "Secure segment EEPROM size"
+msgstr "Velikost zaváděcího bloku"
+
+#: devices/pic/base/pic_config.cpp:241
+msgid "Secure segment RAM size"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:237
+msgid "Secure segment security"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:236
+msgid "Secure segment size"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:235
+#, fuzzy
+msgid "Secure segment write-protection"
+msgstr "Ochrana proti zápisu obecného kódu"
+
+#: libgui/project_manager.cpp:222
+msgid "Select Device..."
+msgstr "Vybrat mikrokontrolér..."
+
+#: common/gui/purl_gui.cpp:118
+msgid "Select Directory"
+msgstr "Vybrat adresář"
+
+#: common/gui/purl_gui.cpp:147
+msgid "Select File"
+msgstr "Vybrat soubor"
+
+#: libgui/project_wizard.cpp:89
+msgid "Select Files"
+msgstr "Vybrat soubory"
+
+#: libgui/project_manager.cpp:170
+msgid "Select Linker Script"
+msgstr "Vybrat skript pro linker"
+
+#: libgui/project_manager.cpp:298
+msgid "Select Object File"
+msgstr "Vybrat objektový soubor"
+
+#: libgui/project_manager.cpp:335
+msgid "Select Project file"
+msgstr "Vybrat soubor projektu"
+
+#: libgui/project_manager.cpp:289
+msgid "Select Source File"
+msgstr "Vybrat zdrojový soubor"
+
+#: libgui/device_gui.cpp:87
+msgid "Select a device"
+msgstr "Vybrat mikrokontrolér"
+
+#: devices/pic/base/pic.cpp:83
+#, fuzzy
+msgid "Self-Write"
+msgstr "Autotest"
+
+#: progs/gui/prog_group_ui.cpp:85
+msgid "Self-test"
+msgstr "Autotest"
+
+#: progs/icd2/base/icd2_prog.cpp:56
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:105
+msgid "Self-test failed (%1). Do you want to continue anyway?"
+msgstr "Autotest selhal (%1). Chcete přesto pokračovat?"
+
+#: progs/icd1/base/icd1.cpp:109
+msgid "Self-test failed (returned value is %1)"
+msgstr "Autotest selhal (vrácena hodnota %1)"
+
+#: progs/icd1/base/icd1_prog.cpp:29
+msgid "Self-test failed. Do you want to continue anyway?"
+msgstr "Autotest selhal. Chcete přesto pokračovat?"
+
+#: progs/icd2/base/icd2_prog.cpp:55
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:104
+msgid "Self-test failed: %1"
+msgstr "Autotest selhal: %1"
+
+#: libgui/likeback.cpp:582
+msgid "Send"
+msgstr "Poslat"
+
+#: progs/direct/gui/direct_config_widget.cpp:78
+#: progs/direct/gui/direct_config_widget.cpp:98
+msgid "Send 0xA55A"
+msgstr "Poslat 0xA55A"
+
+#: libgui/likeback.cpp:609
+msgid "Send a Comment"
+msgstr "Odeslat komentář"
+
+#: libgui/likeback.cpp:181
+msgid "Send a comment about what you don't like."
+msgstr "Odeslat komentář o tom co se vám nelíbí."
+
+#: libgui/likeback.cpp:180
+msgid "Send a comment about what you like."
+msgstr "Odeslat komentář o tom co se vám líbí."
+
+#: progs/gui/port_selector.cpp:21
+msgid "Serial"
+msgstr "Sériový"
+
+#: devices/mem24/mem24/mem24_group.h:25
+msgid "Serial Memory 24"
+msgstr "Sériová paměť 24"
+
+#: common/port/port.cpp:61
+msgid "Serial Port"
+msgstr "Sériový port"
+
+#: libgui/project_manager.cpp:166
+msgid "Set Custom..."
+msgstr "Nastavit vlastní..."
+
+#: libgui/project_manager.cpp:167
+msgid "Set Default"
+msgstr "Nastavit implicitní"
+
+#: libgui/likeback.cpp:393
+msgid "Set Email Address"
+msgstr "Nastavit email"
+
+#: libgui/global_config.cpp:22
+msgid "Set User Ids to unprotected checksum (if User Ids are empty)."
+msgstr "Nastavit uživatelská ID na nechráněný kontrolní součet (pokud jsou prázdná)."
+
+#: piklab-prog/cli_interactive.cpp:46
+msgid "Set a breakpoint \"break e 0x04\" or list all breakpoints \"break\"."
+msgstr "Nastavit bod přerušení \"break e 0x04\" nebo vypsat všechny body přerušení \"break\"."
+
+#: libgui/breakpoint_view.cpp:24
+msgid "Set breakpoint"
+msgstr "Nastavit bod přerušení"
+
+#: piklab-prog/cli_interactive.cpp:59
+#, fuzzy
+msgid "Set if target device is self-powered."
+msgstr "Znamená, že zařízení má vlastní napájení."
+
+#: piklab-prog/cli_interactive.cpp:39
+msgid "Set property value: \"set <property> <value>\" or \"<property> <value>\"."
+msgstr "Nastavit vlastnost: \"set <vlastnost> <hodnota>\" nebo \"<vlastnost> <hodnota>\"."
+
+#: devices/pic/gui/pic_memory_editor.cpp:319
+#: devices/pic/gui/pic_memory_editor.cpp:331
+msgid "Set to unprotected checksum"
+msgstr "Nastavit na nechráněný kontrolní součet."
+
+#: progs/base/generic_debug.cpp:43
+msgid "Setting up debugging session."
+msgstr "Sestavuji ladící relaci."
+
+#: libgui/toplevel.cpp:280 libgui/toplevel.cpp:304
+#, fuzzy
+msgid "Settings..."
+msgstr "Rozpoznávám..."
+
+#: coff/base/cdb_parser.cpp:34 coff/base/coff_object.cpp:161
+#, fuzzy
+msgid "Short"
+msgstr "USB Port"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:850
+msgid "Show %1 specific options"
+msgstr "Zobrazit přepínače pro %1"
+
+#: libgui/toplevel.cpp:300
+msgid "Show Program Counter"
+msgstr "Zobrazit programový čítač"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:857
+msgid "Show all options"
+msgstr "Zobrazit všechny přepínače"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:858
+msgid "Show author information"
+msgstr "Zobrazit informaci o autorech"
+
+#: libgui/global_config.cpp:23
+msgid "Show close buttons on tabs (need restart to take effect)."
+msgstr ""
+
+#: libgui/toplevel.cpp:214
+#, fuzzy
+msgid "Show disassembly location"
+msgstr "Výpis zpětného překladu"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:842
+msgid "Show help about options"
+msgstr "Zobrazit nápovědu k přepínačům"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:860
+msgid "Show license information"
+msgstr "Zobrazit informaci o licenci"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:859
+msgid "Show version information"
+msgstr "Zobrazit informaci o verzi"
+
+#: coff/base/cdb_parser.cpp:43
+#, fuzzy
+msgid "Signed"
+msgstr "Poslat"
+
+#: tools/sdcc/sdcc.h:35
+msgid "Small Device C Compiler"
+msgstr "Small Device C Compiler"
+
+#: devices/pic/base/pic_config.cpp:189
+msgid "Software"
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:28
+msgid ""
+"Some programming cards need low clock rate:\n"
+"adding delay to clock pulses might help."
+msgstr ""
+"Některé programovací karty potřebují pomalejší hodiny: \n"
+" možná pomůže přidání prodlevy k hodinovým pulsům."
+
+#: tools/base/generic_tool.cpp:34
+msgid "Source Directory"
+msgstr "Zdrojový adresář"
+
+#: piklab-coff/main.cpp:175
+#, fuzzy
+msgid "Source Lines:"
+msgstr "Zdrojové kódy"
+
+#: libgui/project_manager.cpp:217 libgui/project_manager_ui.cpp:34
+msgid "Sources"
+msgstr "Zdrojové kódy"
+
+#: piklab-prog/cli_interactive.cpp:248
+msgid "Special Function Registers:"
+msgstr "Speciální funkční registry:"
+
+#: progs/gui/prog_config_center.cpp:65
+msgid "Specific"
+msgstr "Specifické"
+
+#: devices/pic/base/pic_config.cpp:101
+msgid "Stack full/underflow reset"
+msgstr "Zásobník plný/reset podtečení"
+
+#: libgui/project_manager.cpp:185 libgui/config_center.h:53
+#: libgui/project_manager_ui.cpp:63
+msgid "Standalone File"
+msgstr "Samostatný soubor"
+
+#: libgui/config_center.h:54
+msgid "Standalone File Compilation"
+msgstr "Kompilace samostatného souboru"
+
+#: devices/pic/base/pic_config.cpp:232 devices/pic/base/pic_config.cpp:239
+#, fuzzy
+msgid "Standard Security"
+msgstr "Standardní operace"
+
+#: devices/pic/base/pic_config.cpp:115
+msgid "Standard operation"
+msgstr "Standardní operace"
+
+#: devices/pic/base/pic_config.cpp:246
+#, fuzzy
+msgid "Standard security"
+msgstr "Standardní operace"
+
+#: piklab-prog/cli_interactive.cpp:43
+msgid "Start or restart debugging session."
+msgstr "Spustit nebo restartovat ladění."
+
+#: piklab-hex/main.cpp:140
+msgid "Start:"
+msgstr "Start:"
+
+#: piklab-prog/cli_prog_manager.cpp:61
+msgid "Starting debug session without COFF file (no source file information)."
+msgstr "Spouštím ladění bez COFF souboru (žádné informace o zdrojové kódu)."
+
+#: piklab-prog/cli_prog_manager.cpp:62
+msgid "Starting debugging session with device memory in an unknown state. You may want to reprogram the device."
+msgstr "Spouštím ladění s neznámým stavem paměti mikrokontroléru. Možná budete chtít mikrokontrolér znovu naprogramovat."
+
+#: coff/base/coff_object.cpp:131
+msgid "Static Symbol"
+msgstr ""
+
+#: devices/base/device_group.cpp:228 libgui/breakpoint_view.cpp:47
+msgid "Status"
+msgstr "Stav"
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:21
+msgid "Status:"
+msgstr "Stav:"
+
+#: progs/manager/debug_manager.cpp:302
+#, fuzzy
+msgid "Step"
+msgstr "&Krokovat"
+
+#: piklab-prog/cli_interactive.cpp:44
+msgid "Step one instruction."
+msgstr "Krokovat na další instrukci."
+
+#: devices/pic/gui/pic_register_view.cpp:224
+msgid "Stop Watching"
+msgstr "Zastavit sledování"
+
+#: piklab-prog/cmdline.cpp:39
+msgid "Stop device (hold reset)."
+msgstr "Zastavit mikrokontrolér (podržet reset)."
+
+#: devices/pic/prog/pic_prog_specific.cpp:19
+msgid "Stopped"
+msgstr "Zastaveno"
+
+#: progs/manager/prog_manager.cpp:155 progs/manager/prog_manager.cpp:175
+#, fuzzy
+msgid "Stopped."
+msgstr "Zastaveno"
+
+#: common/common/number.cpp:23
+msgid "String"
+msgstr "Řetězec"
+
+#: coff/base/cdb_parser.cpp:19 coff/base/cdb_parser.cpp:37
+#: coff/base/coff_object.cpp:166
+msgid "Structure"
+msgstr ""
+
+#: coff/base/coff_object.cpp:138
+msgid "Structure Tag"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:85
+msgid "Subroutine to initialize W registers to 0x0000"
+msgstr "Podprogram pro inicializaci W registrů na 0x0000"
+
+#: common/global/about.cpp:88
+msgid "Support for direct programmers with bidirectionnal buffers."
+msgstr "Podpora pro přímé programátory s obousměrnými střadači."
+
+#: devices/base/device_group.cpp:36
+msgid "Supported"
+msgstr "Podporováno"
+
+#: common/cli/cli_main.cpp:93
+msgid "Supported commands:"
+msgstr "Podporované příkazy:"
+
+#: piklab-prog/cmdline.cpp:115
+msgid "Supported devices for \"%1\":"
+msgstr "Podporované mikrokontroléry pro \"%1\":"
+
+#: piklab-hex/main.cpp:264 piklab-prog/cmdline.cpp:112
+#: piklab-coff/main.cpp:265
+msgid "Supported devices:"
+msgstr "Podporované mikrokontroléry:"
+
+#: piklab-prog/cmdline.cpp:92
+#, fuzzy
+msgid "Supported hardware configuration for programmers:"
+msgstr "Podporované programátory:"
+
+#: piklab-prog/cmdline.cpp:75
+msgid "Supported hex file formats:"
+msgstr "Podporované formáty hex souborů:"
+
+#: piklab-prog/cmdline.cpp:83
+msgid "Supported programmers:"
+msgstr "Podporované programátory:"
+
+#: libgui/toplevel.cpp:208
+msgid "Switch Header/Implementation"
+msgstr "Přepnout hlavička/implementace"
+
+#: libgui/editor_manager.cpp:37
+msgid "Switch to editor"
+msgstr "Přepnout do editoru"
+
+#: libgui/toplevel.cpp:206
+msgid "Switch to..."
+msgstr "Přepnout do..."
+
+#: devices/pic/base/pic_config.cpp:137
+msgid "Switching off, monitor off"
+msgstr "Vypínám, sledování vypnuto"
+
+#: devices/pic/base/pic_config.cpp:138
+msgid "Switching on, monitor off"
+msgstr "Zapínám, sledování vypnuto"
+
+#: devices/pic/base/pic_config.cpp:139
+msgid "Switching on, monitor on"
+msgstr "Zapínám, sledování zapnuto"
+
+#: coff/base/coff_object.cpp:215
+msgid "Symbol without needed auxilliary symbol (type=%1)"
+msgstr "Symbol bez potřebného doplňkového symbolu (typ=%1)"
+
+#: coff/base/coff_archive.cpp:124 piklab-coff/main.cpp:154
+msgid "Symbols:"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:191
+#, fuzzy
+msgid "T0CKI interrupt service routine"
+msgstr "podprogram pro obsluhu přerušení"
+
+#: devices/pic/base/pic_config.cpp:117
+msgid "T1OSO/T1CKI on RA6"
+msgstr "T1OSO/T1CKI na RA6"
+
+#: devices/pic/base/pic_config.cpp:118
+msgid "T1OSO/T1CKI on RB2"
+msgstr "T1OSO/T1CKI na RB2"
+
+#: tools/gputils/gputils_generator.cpp:185
+#, fuzzy
+msgid "TIMER0 interrupt service routine"
+msgstr "podprogram pro obsluhu přerušení"
+
+#: devices/pic/base/pic_config.cpp:119
+msgid "TMR0/T5CKI external clock mux"
+msgstr "TMR0/T5CKI multiplex externích hodin"
+
+#: devices/base/generic_device.cpp:54
+msgid "TQFP"
+msgstr "TQFP"
+
+#: devices/base/generic_device.cpp:52
+msgid "TSSOP"
+msgstr "TSSOP"
+
+#: devices/pic/base/pic_config.cpp:30
+msgid "Table read-protection"
+msgstr "Ochrana tabulky proti čtení"
+
+#: progs/direct/base/direct_prog_config.cpp:28
+msgid "Tait 7405/7406"
+msgstr "Tait 7405/7406"
+
+#: progs/direct/base/direct_prog_config.cpp:26
+msgid "Tait classic"
+msgstr "Tait classic"
+
+#: devices/pic/prog/pic_prog_specific.cpp:15 progs/icd2/base/icd2.cpp:51
+msgid "Target Vdd"
+msgstr "Cílové Vdd"
+
+#: devices/pic/prog/pic_prog_specific.cpp:15
+msgid "Target Vpp"
+msgstr "Cílové Vpp"
+
+#: piklab-hex/main.cpp:38 piklab-prog/cli_interactive.cpp:55
+#: piklab-coff/main.cpp:38
+msgid "Target device."
+msgstr "Cílový mikrokontrolér."
+
+#: progs/base/prog_config.cpp:73
+msgid "Target is self-powered (when possible)."
+msgstr "Cíl má vlastní napájení (pokud je to možné)."
+
+#: devices/pic/base/pic_config.cpp:261
+#, fuzzy
+msgid "Temperature protection"
+msgstr "Rozsah teplot: "
+
+#: devices/base/device_group.cpp:291
+msgid "Temperature range: "
+msgstr "Rozsah teplot: "
+
+#: libgui/config_gen.cpp:179
+msgid "Template Generator"
+msgstr "Generátor šablon"
+
+#: coff/base/disassembler.cpp:278
+msgid "Template source file generated by piklab"
+msgstr "Šablona zdrojového kódu generovná programem Piklab"
+
+#: libgui/project_wizard.cpp:234
+msgid "Template source file generation not implemented yet for this toolchain..."
+msgstr "Generování šablony zdrojového kódu pro tuto sadu nástrojů zatím není k dispozici..."
+
+#: libgui/project_wizard.cpp:240
+#, fuzzy
+msgid "Template source file generation only partially implemented."
+msgstr "Generování šablony zdrojového kódu není úplně implementováno"
+
+#: common/global/about.cpp:91
+msgid "Test of PICkit2 and ICD2 programmer."
+msgstr "Test programátoru PICkit2 a ICD2."
+
+#: common/common/group.cpp:15
+#, fuzzy
+msgid "Tested"
+msgstr "Reset podržen"
+
+#: tools/pic30/pic30.cpp:63
+msgid "The <a href=\"%1\">PIC30 ToolChain</a> is a toolsuite for 16-bit PICs available from Microchip. Most of it is available under the GNU Public License."
+msgstr ""
+
+#: tools/sdcc/sdcc.cpp:28
+msgid "The <a href=\"%1\">Small Devices C Compiler</a> is an open-source C compiler for several families of microcontrollers."
+msgstr ""
+
+#: tools/boost/boost.cpp:68
+msgid "The Boost toolchain needs to be run by Wine with \"Windows NT 4.0\" compatibility. This can be configured with the Wine configuration utility."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:31
+msgid "The CLOCK pin is used to synchronize serial data of the DATA IN and DATA OUT pins."
+msgstr "Vývod CLOCK je použit pro synchronizaci sériových dat vývodů DATA IN a DATA OUT."
+
+#: progs/direct/base/direct.cpp:37
+msgid "The DATA IN pin is used to receive data from the programmed device."
+msgstr "Vývod DATA IN je použit k příjmu dat z programovaného mikrokontroléru."
+
+#: progs/direct/base/direct.cpp:34
+msgid "The DATA OUT pin is used to send data to the programmed device."
+msgstr "Vývod DATA OUT je použit k odesílání dat do programovaného mikrokontroléru."
+
+#: progs/direct/base/direct.cpp:40
+msgid ""
+"The DATA RW pin selects the direction of data buffer.\n"
+"Must be set to GND if your programmer does not use bi-directionnal buffer."
+msgstr ""
+"Vývod DATA RW nastavuje směr datového střadače.\n"
+"Pokud váš programátor nepoužívá obousměrný střadač, tento vývod musí být nastaven na GND."
+
+#: libgui/toplevel.cpp:731
+msgid "The Pikloops utility (%1) is not installed in your system."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:28
+msgid ""
+"The VDD pin is used to apply 5V to the programmed device.\n"
+"Must be set to GND if your programmer doesn't control the VDD line."
+msgstr ""
+"Vývod VDD slouží k přivedení 5V napětí k programovanému mikrokontroléru.\n"
+"Pokud váš programátor neumí ovládat přívod VDD, musí být tento vývod nastaven na GND."
+
+#: progs/direct/base/direct.cpp:25
+msgid "The VPP pin is used to select the high voltage programming mode."
+msgstr "Vývod VPP slouží k nastavení módu programování vyšším napětím."
+
+#: devices/pic/prog/pic_prog.cpp:675
+msgid "The calibration word %1 is not valid."
+msgstr "Kalibrační slovo %1 není platné."
+
+#: progs/manager/prog_manager.cpp:65
+msgid "The current programmer \"%1\" does not support device \"%2\"."
+msgstr "Zvolený programátor \"%1\" nepodporuje mikrokontrolér \"%2\"."
+
+#: devices/pic/prog/pic_prog.cpp:662
+msgid "The device cannot be erased first by the selected programmer so programming may fail..."
+msgstr "Mikrokontrolér nemůže být programátorem napřed smazán, takže programování může selhat..."
+
+#: libgui/gui_prog_manager.cpp:38
+msgid "The device memory is in an unknown state. You may want to reprogram the device. Continue anyway?"
+msgstr "Paměť mikrokontroléru je v neznámém stavu. Možná jej budete chtít znovu naprogramovat. Přesto pokračovat?"
+
+#: libgui/likeback.cpp:396
+msgid "The email address is optional. If you do not provide any, your comments will be sent anonymously. Just click OK in that case."
+msgstr "E-mailová adresa je volitelná. Pokud ji nezadáte, váš komentář bude odeslán anonymně. Prostě klikněte na OK."
+
+#: common/nokde/nokde_kcmdlineargs.cpp:1313
+msgid "The files/URLs opened by the application will be deleted after use"
+msgstr "Soubory/adresy otevřené aplikací budou po použití smazány"
+
+#: progs/base/generic_prog.cpp:142
+#, fuzzy
+msgid ""
+"The firmware version (%1) is higher than the version tested with piklab (%2%3).\n"
+"You may experience problems."
+msgstr ""
+"Verze firmware (%1) je vyšší než verze testovaná s Piklabem (%2).\n"
+"Mohou nastat problémy."
+
+#: progs/base/generic_prog.cpp:158
+#, fuzzy
+msgid ""
+"The firmware version (%1) is lower than the recommended version (%2%3).\n"
+"It is recommended to upgrade the firmware."
+msgstr ""
+"Verze firmware (%1) je nižší než doporučená verze (%2).\n"
+"Doporučuji aktualizovat firmware."
+
+#: progs/base/generic_prog.cpp:150
+#, fuzzy
+msgid ""
+"The firmware version (%1) is lower than the version tested with piklab (%2%3).\n"
+"You may experience problems."
+msgstr ""
+"Verze firmware (%1) je nižší než verze testovaná s Piklabem (%2).\n"
+"Mohou nastat problémy."
+
+#: piklab-prog/cli_interactive.cpp:167
+#, fuzzy
+msgid "The first argument should be \"e\"."
+msgstr "První parametr by měl být \"e\""
+
+#: piklab-hex/main.cpp:170
+msgid "The first hex file is a subset of the second one."
+msgstr "První hex soubor je součástí druhého."
+
+#: piklab-prog/cli_interactive.cpp:299
+#, fuzzy
+msgid "The given value is too large (max: %1)."
+msgstr "Tato hodnota je příliš velká (max: %1)"
+
+#: progs/gui/hardware_config_widget.cpp:71
+msgid "The hardware name is already used for a standard hardware."
+msgstr "Název hardware je již použit pro standardní hardware."
+
+#: progs/manager/debug_manager.cpp:113
+msgid "The number of active breakpoints is higher than the maximum for the current debugger (%1): disabling the last breakpoint."
+msgstr "Počet aktivních bodů přerušení je větší než maximum pro zvolený debugger (%1): zakazuji poslední bod přerušení."
+
+#: libgui/toplevel.cpp:904
+#, fuzzy
+msgid "The project hex file may not be up-to-date since some project files have been modified."
+msgstr "<qt>Hex soubor nemusí být aktuální, protože byly změněny některé projektové soubory. Přesto pokračovat?</qt>"
+
+#: devices/pic/prog/pic_prog.cpp:650
+msgid "The range cannot be erased first by the selected programmer so programming may fail..."
+msgstr "Rozsah nemůže být zvoleným programátorem napřed smazán, takže programování může selhat..."
+
+#: piklab-hex/main.cpp:171
+msgid "The second hex file is a subset of the first one."
+msgstr "Druhý hex soubor je součástí prvního."
+
+#: piklab-prog/cmdline.cpp:335
+#, fuzzy
+msgid "The selected device \"%1\" is not supported by the selected programmer."
+msgstr "Zvolený mikrokontrolér \"%1\" není podporován zvoleným programátorem."
+
+#: libgui/register_view.cpp:45
+msgid "The selected device has no register."
+msgstr "Zvolený mikrokontrolér nemá žádný registr."
+
+#: progs/gui/prog_group_ui.cpp:101
+msgid "The selected device is not supported by this programmer."
+msgstr "Zvolený mikrokontrolér není tímto programátorem podporován."
+
+#: libgui/gui_prog_manager.cpp:29
+#, fuzzy
+msgid "The selected operation will stop the debugging session. Continue anyway?"
+msgstr "Zvolená operace zastaví ladění. Pokračovat?"
+
+#: devices/pic/prog/pic_prog.cpp:500
+#, fuzzy
+msgid "The selected programmer cannot read %1: operation skipped."
+msgstr "Zvolený programátor neumí načíst paměťový rozsah: operace vynechána."
+
+#: progs/base/generic_prog.cpp:298
+msgid "The selected programmer cannot read device memory."
+msgstr "Zvolený programátor neumí načíst paměť mikrokontroléru."
+
+#: devices/pic/prog/pic_prog.cpp:486 devices/pic/prog/pic_prog.cpp:557
+msgid "The selected programmer cannot read the specified memory range."
+msgstr "Zvolený programátor neumí načíst zvolený paměťový rozsah."
+
+#: devices/pic/prog/pic_prog.cpp:442
+#, fuzzy
+msgid "The selected programmer does not support erasing neither the specified range nor the whole device."
+msgstr "Zvolený programátor nepodporuje smazání celého mikrokontroléru."
+
+#: devices/pic/prog/pic_prog.cpp:394
+msgid "The selected programmer does not support erasing the whole device."
+msgstr "Zvolený programátor nepodporuje smazání celého mikrokontroléru."
+
+#: piklab-prog/cmdline.cpp:341
+#, fuzzy
+msgid "The selected programmer does not supported the specified hardware configuration (\"%1\")."
+msgstr "Zvolený programátor neumí načíst zvolený paměťový rozsah."
+
+#: tools/list/compile_manager.cpp:135
+msgid "The selected toolchain (%1) cannot assemble file. It only supports files with extensions: %2"
+msgstr "Zvolená sada nástrojů (%1) neumí sestavit soubor. Podporuje pouze soubory s příponami: %2"
+
+#: tools/list/compile_manager.cpp:110
+msgid "The selected toolchain (%1) cannot compile file. It only supports files with extensions: %2"
+msgstr "Zvolená sada nástrojů (%1) neumí zkompilovat soubor. Podporuje pouze soubory s příponami: %2"
+
+#: tools/base/tool_group.cpp:130
+msgid "The selected toolchain (%1) does not support device %2. Continue anyway?"
+msgstr "Zvolená sada nástrojů (%1) nepodporuje mikrokontrolér %2. Přesto pokračovat?"
+
+#: libgui/project_wizard.cpp:206
+msgid "The selected toolchain can only compile a single source file and you have selected %1 source files. Continue anyway? "
+msgstr "Zvolená sada nástrojů umí kompilovat jen jeden zdrojový soubor a vy jste zvolil %1 zdrojových souborů-(%1). Přesto pokračovat?"
+
+#: tools/list/compile_manager.cpp:72
+msgid "The selected toolchain only supports single-file project."
+msgstr "Zvolená sada nástrojů podporuje jen jednosouborový projekt."
+
+#: libgui/device_editor.cpp:64
+msgid "The target device is not configured and cannot be guessed from source file. The source file either cannot be found or does not contain any processor directive."
+msgstr "Cílový mikrokontrolér není nastaven a nemůže být určen ze zdrojového ku. Zdrojový soubor buď nebyl nalezen nebo neobsahuje informaci o typu mikrokontroléru."
+
+#: libgui/gui_debug_manager.cpp:88
+msgid "The toolchain in use does not generate all necessary debugging information with the selected device. This may reduce debugging capabilities."
+msgstr ""
+
+#: piklab-hex/main.cpp:172
+msgid "The two hex files are different at address %1."
+msgstr "Tyto dva hex soubory se liší na adrese %1."
+
+#: piklab-hex/main.cpp:169
+msgid "The two hex files have the same content."
+msgstr "Tyto dva hex soubory jsou identické."
+
+#: tools/base/tool_group.cpp:128
+msgid "There were errors detecting supported devices for the selected toolchain (%1). Please check the toolchain configuration. Continue anyway?"
+msgstr "Při zjišťování mikrokontrolérů podporovaných touto sadou nástrojů (%1) nastala chyba. Zkontrolujte prosím nastavení této sady. Přesto pokračovat?"
+
+#: piklab-prog/cli_interactive.cpp:204
+#, fuzzy
+msgid "This command needs a commands filename."
+msgstr "Tento příkaz potřebuje název příkazového souboru"
+
+#: piklab-prog/cli_interactive.cpp:216
+#, fuzzy
+msgid "This command needs an hex filename."
+msgstr "Tento příkaz potřebuje název hex souboru"
+
+#: piklab-prog/cli_interactive.cpp:218
+#, fuzzy
+msgid "This command takes no argument."
+msgstr "Tento příkaz nemá žádné parametry"
+
+#: piklab-prog/cli_interactive.cpp:128
+msgid "This command takes no or one argument"
+msgstr "Tento příkaz nemá žádné parametry nebo má jen jeden"
+
+#: piklab-prog/cli_interactive.cpp:185
+#, fuzzy
+msgid "This command takes no or two argument."
+msgstr "Tento příkaz nemá žádné parametry nebo má dva"
+
+#: piklab-prog/cli_interactive.cpp:139 piklab-prog/cli_interactive.cpp:143
+#: piklab-prog/cli_interactive.cpp:189
+#, fuzzy
+msgid "This command takes one argument."
+msgstr "Tento příkaz má jeden parametr"
+
+#: piklab-prog/cli_interactive.cpp:150
+#, fuzzy
+msgid "This command takes one or two argument."
+msgstr "Tento příkaz má má jen jeden nebo dva parametry"
+
+#: piklab-prog/cli_interactive.cpp:135
+#, fuzzy
+msgid "This command takes two arguments."
+msgstr "Tento příkaz má dva argumenty"
+
+#: progs/gui/prog_group_ui.cpp:100
+msgid "This device has no calibration information."
+msgstr "Tento mikrokontrolér nemá žádné kalibrační hodnoty."
+
+#: libgui/likeback.cpp:174
+msgid "This is a quick feedback system for %1."
+msgstr "Toto je systém rychlé odezvy pro %1."
+
+#: devices/pic/prog/pic_prog.cpp:645
+msgid "This memory range is programming protected."
+msgstr "Tento paměťový rozsah je chráněn proti programování."
+
+#: progs/direct/base/direct.cpp:38
+msgid ""
+"This pin is driven by the programmed device.\n"
+"Without device, it must follow the \"Data out\" pin (when powered on)."
+msgstr ""
+"Tento vývod je ovládán programovaným mikrokontrolérem.\n"
+"Bez mikrokontroléru musí být stejný jako \"Data out\" vývod (při zapnutí)."
+
+#: common/nokde/nokde_kaboutdata.cpp:437
+msgid "This program is distributed under the terms of the %1."
+msgstr "Tento program je distribuován za podmínek %1."
+
+#: progs/direct/base/direct_prog_config.cpp:77
+msgid "This programmer pulses MCLR from 5V to 0V and then 12V to enter programming mode. It uses a multiplexer to switch between 5V and 12V (Vdd is here the multiplexer pin).<p>Webpage: <a href=\"http://www.epemag.wimborne.co.uk/1001.htm\">http://www.epemag.wimborne.co.uk/1001.htm</a>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:272
+msgid "This tool cannot be automatically detected."
+msgstr "Tento nástroj nemůže být automaticky zjištěn."
+
+#: libgui/config_gen.cpp:119
+msgid "This toolchain does not need explicit config bits."
+msgstr "Tato sada nástrojů nevyžaduje konfigurační bity."
+
+#: progs/pickit2/base/pickit_prog.cpp:49
+msgid "This will overwrite the device code memory. Continue anyway?"
+msgstr "Toto přepíše paměť programu. Přesto pokračovat?"
+
+#: tools/gui/toolchain_config_widget.cpp:161
+#: tools/gui/toolchain_config_widget.cpp:178
+msgid "Timeout"
+msgstr "Timeout"
+
+#: progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp:30
+msgid "Timeout (ms):"
+msgstr "Timeout (ms):"
+
+#: common/port/serial.cpp:280
+msgid "Timeout receiving data (%1/%2 bytes received)."
+msgstr "Timeout při příjmu dat (%1/%2 bytů přijato)."
+
+#: common/port/serial.cpp:306
+msgid "Timeout sending data (%1 bytes left)."
+msgstr "Timeout při odesílání dat (%1 bytů zbývá)."
+
+#: common/port/serial.cpp:235
+msgid "Timeout sending data (%1/%2 bytes sent)."
+msgstr "Timeout při odesílání dat (%1/%2 bytů odesláno)."
+
+#: progs/icd1/base/icd1_serial.cpp:51
+msgid "Timeout synchronizing."
+msgstr "Timeout při synchronizaci."
+
+#: progs/gpsim/base/gpsim.cpp:72
+#, fuzzy
+msgid "Timeout waiting for \"gpsim\"."
+msgstr "Timeout při čekání na \"gpsim\""
+
+#: common/port/serial.cpp:265
+msgid "Timeout waiting for data."
+msgstr "Timeout při čekání na data."
+
+#: progs/direct/base/direct_mem24.cpp:125
+msgid "Timeout writing at address %1"
+msgstr "Timeout při zápisu adresy %1"
+
+#: common/port/usb_port.cpp:394
+msgid "Timeout: only some data received (%1/%2 bytes)."
+msgstr "Timeout: přijata jen některá data (%1/%2 bytů)."
+
+#: common/port/usb_port.cpp:360
+msgid "Timeout: only some data sent (%1/%2 bytes)."
+msgstr "Timeout: odeslána jen některá data (%1/%2 bytů)."
+
+#: devices/pic/base/pic_config.cpp:144
+msgid "Timer1"
+msgstr "Timer1"
+
+#: tools/pic30/pic30_generator.cpp:95
+msgid "Timer1 interrupt service routine"
+msgstr "Obslužný podprogram přerušení od Timer1"
+
+#: devices/pic/base/pic_config.cpp:114
+msgid "Timer1 oscillator mode"
+msgstr "Mód oscilátoru Timer1"
+
+#: progs/tbl_bootloader/base/tbl_bootloader_prog.h:31
+msgid "Tiny Bootloader"
+msgstr "Tiny Bootloader"
+
+#: libgui/likeback.cpp:175
+msgid "To help us improve it, your comments are important."
+msgstr "Abychom to vylepšili, potřebujeme vaše připomínky."
+
+#: progs/manager/prog_manager.cpp:140
+msgid "Toggle Device Power..."
+msgstr "Přepnout napájení mikrokontroléru..."
+
+#: piklab-hex/main.cpp:72 piklab-coff/main.cpp:61
+msgid "Too few arguments."
+msgstr "Příliš málo parametrů."
+
+#: piklab-hex/main.cpp:73 piklab-prog/cli_interactive.cpp:214
+#: piklab-prog/cli_interactive.cpp:217 piklab-prog/cmdline.cpp:215
+#: piklab-coff/main.cpp:62
+msgid "Too many arguments."
+msgstr "Příliš mnoho parametrů."
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:145
+msgid "Too many failures: bailing out."
+msgstr "Příliš mnoho chyb. Vzdávám to."
+
+#: libgui/project_editor.cpp:56
+#, fuzzy
+msgid "Toochain"
+msgstr "Sada nástrojů:"
+
+#: libgui/config_gen.cpp:48
+msgid "Tool Type:"
+msgstr "Typ nástroje:"
+
+#: libgui/toplevel.cpp:216
+msgid "Tool Views"
+msgstr "Nástrojové pohledy"
+
+#: tools/list/tools_config_widget.cpp:45 libgui/config_gen.cpp:39
+#: libgui/project_wizard.cpp:134
+msgid "Toolchain:"
+msgstr "Sada nástrojů:"
+
+#: tools/list/device_info.cpp:51
+#, fuzzy
+msgid "Tools"
+msgstr "Nástrojové pohledy"
+
+#: libgui/likeback.cpp:657
+msgid "Transfer Error"
+msgstr "Chyba přenosu"
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:23
+#, fuzzy
+msgid "Trying to enter bootloader mode..."
+msgstr "Programátor je v módu zavaděče."
+
+#: coff/base/coff_object.cpp:141
+msgid "Type Definition"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:76
+msgid "USART"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:75 progs/gui/port_selector.cpp:21
+msgid "USB"
+msgstr "USB"
+
+#: common/port/port.cpp:63
+msgid "USB Port"
+msgstr "USB Port"
+
+#: progs/picdem_bootloader/gui/picdem_bootloader_ui.cpp:25
+#, fuzzy
+msgid "USB Product Id:"
+msgstr "USB Port"
+
+#: progs/picdem_bootloader/gui/picdem_bootloader_ui.cpp:19
+msgid "USB Vendor Id:"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:197
+msgid "USB clock (PLL divided by)"
+msgstr "USB hodiny (PLL děleno)"
+
+#: common/port/usb_port.cpp:266
+#, fuzzy
+msgid "USB support disabled"
+msgstr " port nenalezen"
+
+#: common/global/about.cpp:90
+msgid "USB support for ICD2 programmer."
+msgstr "USB podpora pro ICD2 programátor."
+
+#: devices/pic/base/pic_config.cpp:127
+msgid "USB voltage regulator"
+msgstr "USB napěťový regulátor"
+
+#: devices/pic/base/pic_config.cpp:85
+msgid "Undefined"
+msgstr "Nedefinováno"
+
+#: coff/base/coff_object.cpp:135
+#, fuzzy
+msgid "Undefined Label"
+msgstr "Nedefinováno"
+
+#: coff/base/coff_object.cpp:123
+#, fuzzy
+msgid "Undefined Section"
+msgstr "Nedefinováno"
+
+#: coff/base/coff_object.cpp:142
+#, fuzzy
+msgid "Undefined Static"
+msgstr "Nedefinováno"
+
+#: progs/icd2/base/icd2.cpp:173
+msgid "Unexpected answer ($7F00) from ICD2 (%1)."
+msgstr "Neočekávaná odpověď ($7F00) z ICD2 (%1)."
+
+#: progs/icd2/base/icd2.cpp:180
+msgid "Unexpected answer (08) from ICD2 (%1)."
+msgstr "Neočekávaná odpověď (08) z ICD2 (%1)."
+
+#: common/nokde/nokde_kcmdlineargs.cpp:674
+msgid "Unexpected argument '%1'."
+msgstr "Neočekávaný parametr '%1'."
+
+#: devices/base/hex_buffer.cpp:140
+msgid "Unexpected end-of-file."
+msgstr "Neočekávaný konec souboru."
+
+#: devices/base/hex_buffer.cpp:141
+msgid "Unexpected end-of-line (line %1)."
+msgstr "Neočekávaný konec řádku (řádek %1)."
+
+#: coff/base/coff_object.cpp:329
+#, fuzzy
+msgid "Uninitialized Data"
+msgstr "inicializuj PCLATH"
+
+#: coff/base/coff_object.cpp:167
+#, fuzzy
+msgid "Union"
+msgstr "Neznámý"
+
+#: coff/base/coff_object.cpp:140
+msgid "Union Tag"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:57
+msgid "Unitialized variables in X-space"
+msgstr "Nenastaveny počáteční hodnoty proměnných v X-prostoru"
+
+#: tools/pic30/pic30_generator.cpp:61
+msgid "Unitialized variables in Y-space"
+msgstr "Nenastaveny počáteční hodnoty proměnných v Y-prostoru"
+
+#: tools/pic30/pic30_generator.cpp:65
+msgid "Unitialized variables in near data memory"
+msgstr "Nenastaveny počáteční hodnoty proměnných v blízké paměti dat"
+
+#: tools/base/generic_tool.cpp:25
+msgid "Unix"
+msgstr "Unix"
+
+#: tools/gui/toolchain_config_widget.cpp:225
+#: devices/base/generic_device.cpp:21 coff/base/text_coff.cpp:256
+msgid "Unknown"
+msgstr "Neznámý"
+
+#: common/common/purl_base.cpp:57
+msgid "Unknown File"
+msgstr "Neznámý soubor"
+
+#: common/cli/cli_main.cpp:29
+msgid "Unknown command: %1"
+msgstr "Neznámý příkaz: %1"
+
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:47
+msgid "Unknown device"
+msgstr "Neznámý mikrokontrolér"
+
+#: piklab-hex/main.cpp:223 piklab-prog/cmdline.cpp:364
+#: piklab-coff/main.cpp:238
+msgid "Unknown device \"%1\"."
+msgstr "Neznámý mikrokontrolér \"%1\"."
+
+#: devices/pic/prog/pic_prog.cpp:278
+msgid "Unknown device."
+msgstr "Neznámý mikrokontrolér."
+
+#: coff/base/coff_archive.cpp:92
+#, fuzzy
+msgid "Unknown file member offset: %1"
+msgstr "Neznámý formát hex souboru \"%1\"."
+
+#: piklab-prog/cmdline.cpp:379
+msgid "Unknown hex file format \"%1\"."
+msgstr "Neznámý formát hex souboru \"%1\"."
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:84
+msgid "Unknown id returned by bootloader (%1 read and %2 expected)."
+msgstr "Neznámé ID vráceno zavaděčem (%1 přečteno a  %2 vráceno).."
+
+#: common/nokde/nokde_kcmdlineargs.cpp:521
+#: common/nokde/nokde_kcmdlineargs.cpp:537
+msgid "Unknown option '%1'."
+msgstr "Neznámý přepínač '%1'."
+
+#: piklab-prog/cmdline.cpp:353
+msgid "Unknown programmer \"%1\"."
+msgstr "Neznámý programátor \"%1\"."
+
+#: piklab-prog/cmdline.cpp:397 piklab-prog/cmdline.cpp:445
+msgid "Unknown property \"%1\""
+msgstr "Neznámá vlastnost \"%1\""
+
+#: piklab-hex/main.cpp:235 piklab-hex/main.cpp:248 piklab-coff/main.cpp:241
+#: piklab-coff/main.cpp:250
+#, fuzzy
+msgid "Unknown property \"%1\"."
+msgstr "Neznámá vlastnost \"%1\""
+
+#: piklab-prog/cli_interactive.cpp:307
+#, fuzzy
+msgid "Unknown register or variable name."
+msgstr "Neznámý registr nebo název proměnné"
+
+#: progs/gpsim/base/gpsim_debug.cpp:221 progs/sdcdb/base/sdcdb_debug.cpp:220
+msgid "Unknown state for IO bit: %1 (%2)"
+msgstr "Neznámý stav IO bitu: %1 (%2)"
+
+#: piklab-hex/main.cpp:183
+msgid "Unprotected checksum: %1"
+msgstr "Nechráněný kontrolní součet: %1"
+
+#: devices/base/hex_buffer.cpp:139
+msgid "Unrecognized format (line %1)."
+msgstr "Nerozpoznaný formát (řádek %1)."
+
+#: coff/base/cdb_parser.cpp:86
+#, fuzzy
+msgid "Unrecognized record"
+msgstr "Nerozpoznaný formát (řádek %1)."
+
+#: piklab-prog/cli_interactive.cpp:40
+msgid "Unset property value: \"unset <property>\"."
+msgstr "Uvolnit hodnotu vlastnosti: \"unset <vlastnost>\"."
+
+#: coff/base/cdb_parser.cpp:44
+#, fuzzy
+msgid "Unsigned"
+msgstr "Nedefinováno"
+
+#: coff/base/coff_object.cpp:170
+#, fuzzy
+msgid "Unsigned Char"
+msgstr "Nedefinováno"
+
+#: coff/base/coff_object.cpp:172
+#, fuzzy
+msgid "Unsigned Int"
+msgstr "Nedefinováno"
+
+#: coff/base/coff_object.cpp:173
+#, fuzzy
+msgid "Unsigned Long"
+msgstr "Nedefinováno"
+
+#: coff/base/coff_object.cpp:171
+#, fuzzy
+msgid "Unsigned Short"
+msgstr "Nedefinováno"
+
+#: devices/base/device_group.cpp:36
+msgid "Unsupported"
+msgstr "Nepodporováno"
+
+#: common/common/group.cpp:14
+#, fuzzy
+msgid "Untested"
+msgstr "netestováno"
+
+#: tools/gui/toolchain_config_center.cpp:27
+msgid "Update"
+msgstr "Aktualizovat"
+
+#: piklab-prog/cmdline.cpp:51
+msgid "Upload firmware to programmer: \"upload_firmware <hexfilename>\"."
+msgstr "Nahrát firmware do programátoru: \"upload_firmware <hex_soubor>\"."
+
+#: progs/pickit2/base/pickit2_prog.cpp:65
+#, fuzzy
+msgid "Uploading Firmware..."
+msgstr "Nahrávám firmware pro PICkit2..."
+
+#: piklab-prog/cmdline.cpp:321
+#, fuzzy
+msgid "Uploading firmware is not supported for the specified programmer."
+msgstr "Nahrávání firmware není pro zvolený programátor podporováno."
+
+#: progs/base/generic_prog.cpp:262
+#, fuzzy
+msgid "Uploading firmware..."
+msgstr "Nahrávám firmware pro PICkit2..."
+
+#: progs/gui/prog_group_ui.cpp:67
+#, fuzzy
+msgid "Uploading..."
+msgstr "Nahrát..."
+
+#: coff/base/cdb_parser.cpp:30
+msgid "Upper-128-byte Pointer"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:838
+msgid "Usage: %1 %2\n"
+msgstr "Použití: %1 %2\n"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:783
+msgid "Use --help to get a list of available command line options."
+msgstr "K získání seznamu dostupných voleb příkazové řádky použijte přepínač --help."
+
+#: devices/pic/gui/pic_config_word_editor.cpp:83
+msgid "Used Mask:"
+msgstr "Použitá maska:"
+
+#: devices/pic/base/pic.cpp:27 coff/base/coff_object.cpp:328
+msgid "User IDs"
+msgstr "Uživatelská ID"
+
+#: piklab-prog/cli_prog_manager.cpp:22
+msgid "Using port from configuration file."
+msgstr "Používám port z konfiguračního souboru."
+
+#: devices/pic/gui/pic_config_word_editor.cpp:73
+msgid "Value:"
+msgstr "Hodnota:"
+
+#: devices/pic/gui/pic_group_ui.cpp:68
+msgid "Variables"
+msgstr "Proměnné"
+
+#: tools/gputils/gputils_generator.cpp:58
+#: tools/gputils/gputils_generator.cpp:128
+#: tools/gputils/gputils_generator.cpp:208
+msgid "Variables declaration"
+msgstr "Deklarace proměnných"
+
+#: piklab-coff/main.cpp:146
+#, fuzzy
+msgid "Variables:"
+msgstr "Proměnné"
+
+#: devices/base/device_group.cpp:295
+msgid "Vdd (V)"
+msgstr "Vdd (V)"
+
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:102
+msgid "Vdd voltage level error; "
+msgstr "Chybná úroveň Vdd: "
+
+#: progs/direct/base/direct_prog_config.cpp:49
+msgid "Velleman K8048"
+msgstr "Velleman K8048"
+
+#: progs/base/prog_config.cpp:70
+#, fuzzy
+msgid "Verify device memory after programming."
+msgstr "Odpojit napájení cílového zařízení po skončení programování."
+
+#: piklab-prog/cmdline.cpp:43
+msgid "Verify device memory: \"verify <hexfilename>\"."
+msgstr "Ověřit paměť mikrokontroléru: \"verify <hex_soubor>\"."
+
+#: progs/base/generic_prog.cpp:379
+msgid "Verifying successful."
+msgstr "Úspěšně ověřeno."
+
+#: progs/base/generic_prog.cpp:34 progs/base/generic_prog.cpp:377
+msgid "Verifying..."
+msgstr "Ověřuji..."
+
+#: progs/icd2/gui/icd2_group_ui.cpp:31 progs/gui/prog_group_ui.cpp:68
+#: libgui/project_editor.cpp:41
+msgid "Version:"
+msgstr "Verze:"
+
+#: libgui/project_manager_ui.cpp:34
+msgid "Views"
+msgstr "Pohledy"
+
+#: coff/base/cdb_parser.cpp:35 coff/base/coff_object.cpp:159
+msgid "Void"
+msgstr ""
+
+#: libgui/device_gui.cpp:413
+msgid "Voltage-Frequency Graphs"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:79
+msgid "Voltages"
+msgstr "Napětí"
+
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:101
+msgid "Vpp voltage level error; "
+msgstr "Chybná úroveň Vpp: "
+
+#: devices/pic/base/pic_config.cpp:90
+msgid "WDT post-scaler"
+msgstr "WDT post-scaler"
+
+#: devices/pic/base/pic_config.cpp:81
+msgid "Wake-up reset"
+msgstr "Wake-up reset"
+
+#: tools/gputils/gputils_config.cpp:13 tools/c18/c18_config.cpp:12
+msgid "Warning and errors"
+msgstr "Upozornění a chyby"
+
+#: tools/gputils/gui/gputils_ui.cpp:24 tools/c18/gui/c18_ui.cpp:23
+msgid "Warning level:"
+msgstr "Úroveň upozornění:"
+
+#: devices/pic/gui/pic_register_view.cpp:85
+#: devices/pic/gui/pic_register_view.cpp:224
+msgid "Watch"
+msgstr "Sledovat"
+
+#: libgui/watch_view.cpp:110
+msgid "Watch Register"
+msgstr "Sledovat registr"
+
+#: libgui/toplevel.cpp:127
+msgid "Watch View"
+msgstr "Sledování"
+
+#: devices/pic/base/pic_config.cpp:188
+msgid "Watchdog"
+msgstr "Watchdog"
+
+#: devices/pic/base/pic_config.cpp:33
+msgid "Watchdog timer"
+msgstr "Watchdog časovač"
+
+#: devices/pic/base/pic_config.cpp:267
+#, fuzzy
+msgid "Watchdog timer postscaler"
+msgstr "Dělička Watchdog časovače B"
+
+#: devices/pic/base/pic_config.cpp:266
+#, fuzzy
+msgid "Watchdog timer prescaler"
+msgstr "Dělička Watchdog časovače A"
+
+#: devices/pic/base/pic_config.cpp:186
+msgid "Watchdog timer prescaler A"
+msgstr "Dělička Watchdog časovače A"
+
+#: devices/pic/base/pic_config.cpp:187
+msgid "Watchdog timer prescaler B"
+msgstr "Dělička Watchdog časovače B"
+
+#: devices/pic/base/pic_config.cpp:106 devices/pic/base/pic_config.cpp:265
+msgid "Watchdog timer window"
+msgstr "Okno Watchdog časovače"
+
+#: libgui/watch_view.cpp:87
+#, fuzzy
+msgid "Watched"
+msgstr "Sledovat"
+
+#: progs/direct/base/direct_prog_config.cpp:52
+msgid "Webpage: <a href=\"htpp://k9spud.com/hoodmicro\">htpp://k9spud.com/hoodmicro</a>"
+msgstr ""
+
+#: libgui/likeback.cpp:95
+msgid "What's &This?"
+msgstr "Co je &toto?"
+
+#: tools/base/generic_tool.cpp:26
+msgid "Windows"
+msgstr "Okna"
+
+#: devices/pic/gui/pic_config_word_editor.cpp:88
+msgid "Write Mask:"
+msgstr "Maska pro zápis:"
+
+#: piklab-prog/cli_interactive.cpp:48
+msgid "Write and read raw commands to port from given file."
+msgstr "Zápis a čtení surových příkazů na port ze souboru."
+
+#: progs/gpsim/base/gpsim_debug.cpp:181 progs/sdcdb/base/sdcdb_debug.cpp:180
+msgid "Writing PC is not supported by gpsim"
+msgstr "Zápis PC není programem gpsim podporováno"
+
+#: progs/gpsim/base/gpsim_debug.cpp:161 progs/sdcdb/base/sdcdb_debug.cpp:160
+msgid "Writing registers is not supported by this version of gpsim"
+msgstr "Zápis do registrů není touto verzí gpsim podporováno"
+
+#: coff/base/coff_archive.cpp:33
+msgid "Wrong format for file size \"%1\"."
+msgstr ""
+
+#: progs/psp/base/psp.cpp:174
+msgid "Wrong programmer connected"
+msgstr "Připojen jiný programátor"
+
+#: progs/icd2/base/icd2.cpp:224
+msgid "Wrong return value (\"%1\"; was expecting \"%2\")"
+msgstr "Špatná návratová hodnota (\"%1\"; očekáváno \"%2\")"
+
+#: devices/pic/base/pic_config.cpp:148 devices/pic/base/pic_config.cpp:163
+msgid "XT Crystal"
+msgstr "XT krystal"
+
+#: devices/pic/base/pic_config.cpp:151 devices/pic/base/pic_config.cpp:166
+msgid "XT Crystal with 16x PLL"
+msgstr "XT krystal s 16x PLL"
+
+#: devices/pic/base/pic_config.cpp:149 devices/pic/base/pic_config.cpp:164
+msgid "XT Crystal with 4x PLL"
+msgstr "XT krystal s 4x PLL"
+
+#: devices/pic/base/pic_config.cpp:150 devices/pic/base/pic_config.cpp:165
+msgid "XT Crystal with 8x PLL"
+msgstr "XT krystal s 8x PLL"
+
+#: devices/pic/base/pic_config.cpp:259
+#, fuzzy
+msgid "XT crystal oscillator"
+msgstr "Vnitřní oscilátor"
+
+#: libgui/likeback.cpp:397
+msgid "You can change or remove your email address whenever you want. For that, use the little arrow icon at the top-right corner of a window."
+msgstr "E-mail můžete kdykoli změnit nebo odstranit použitím malé šipečky vpravo nahoře."
+
+#: libgui/gui_debug_manager.cpp:104
+msgid "You cannot set breakpoints when a debugger is not selected."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:39
+msgid "You must disconnect 7407 pin 2"
+msgstr "Musíte odpojit vývod 2 obvodu 7407"
+
+#: progs/icd2/gui/icd2_group_ui.cpp:53
+msgid "You need to initiate debugging to read the debug executive version."
+msgstr "Pro čtení ladící verze musíte zahájit ladění."
+
+#: libgui/toplevel.cpp:534
+msgid "You need to specify a device to create a new hex file."
+msgstr "K vytvoření nového hex souboru musíte zvolit mikrokontrolér."
+
+#: progs/manager/prog_manager.cpp:59
+msgid "You need to specify the device for programming."
+msgstr "Pro programování musíte zvolit mikrokontrolér."
+
+#: piklab-prog/cli_interactive.cpp:209
+#, fuzzy
+msgid "You need to specify the range."
+msgstr "Musíte zvolit rozsah"
+
+#: piklab-prog/cli_interactive.cpp:292
+msgid "You need to start the debugging session first (with \"start\")."
+msgstr "Musíte napřed spustit ladění (pomocí \"start\")."
+
+#: progs/gui/port_selector.cpp:61
+#, fuzzy
+msgid "Your computer might not have any parallel port or the /dev/parportX device has not been created.<br>Use \"mknod /dev/parport0 c 99 0\" to create it<br>and \"chmod a+rw /dev/parport0\" to make it RW enabled."
+msgstr "<qt>Váš počítač nemá žádný paralelní port nebo nebylo vytvořeno zařízení /dev/parportX.<br>použijte  \"mknod /dev/parport0 c 99 0\" k jeho vytvoření<br>a \"chmod a+rw /dev/parport0\" nastavení práv. Většinou jen stačí přidat uživatele do skupiny \"lp\"</qt>"
+
+#: progs/gui/port_selector.cpp:58
+#, fuzzy
+msgid "Your computer might not have any serial port."
+msgstr "<qt>Váš počítač nejspíše nemá žádný sériový port.</qt>"
+
+#: libgui/likeback.cpp:398
+msgid "Your email address (keep empty to post comments anonymously):"
+msgstr "Váš e-mail (pro anonymní odeslání ponechte prázdné):"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:818
+msgid "[%1-options]"
+msgstr "[%1-přepínače]"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:811
+msgid "[options] "
+msgstr "[přepínače]"
+
+#: _translatorinfo.cpp:3
+msgid ""
+"_: EMAIL OF TRANSLATORS\n"
+"Your emails"
+msgstr "stranger@tiscali.cz"
+
+#: _translatorinfo.cpp:1
+msgid ""
+"_: NAME OF TRANSLATORS\n"
+"Your names"
+msgstr "Milan Horák"
+
+#: tools/pic30/pic30_generator.cpp:63
+msgid "allocating 2 bytes"
+msgstr "alokuji 2 byty"
+
+#: tools/pic30/pic30_generator.cpp:59 tools/pic30/pic30_generator.cpp:67
+msgid "allocating 4 bytes"
+msgstr "alokuji 4 byty"
+
+#: tools/gui/tool_config_widget.cpp:126 tools/gputils/gui/gputils_ui.cpp:30
+msgid "as in LIST directive"
+msgstr "jako v LIST instrukci"
+
+#: coff/base/cdb_parser.cpp:104
+#, fuzzy
+msgid "at line #%1, column #%2"
+msgstr "Řádek: %1  Sloupec: %2"
+
+#: tools/pic30/pic30_generator.cpp:77
+msgid "call _wreg_init subroutine"
+msgstr "call _wreg_init podprogram"
+
+#: tools/pic30/pic30_generator.cpp:99
+msgid "clear Timer1 interrupt flag status bit"
+msgstr "vynulovat stavový bit přerušení Timer1"
+
+#: tools/pic30/pic30_generator.cpp:48
+msgid "declare Timer1 ISR"
+msgstr "deklarace Timer1 ISR"
+
+#: devices/gui/register_view.cpp:71
+msgid "driven high"
+msgstr "řízen vysokou úrovní"
+
+#: devices/gui/register_view.cpp:71
+msgid "driven low"
+msgstr "řízen nízkou úrovní"
+
+#: devices/gui/register_view.cpp:67
+msgid "driving high"
+msgstr "nastavuji vysokou úrovní"
+
+#: devices/gui/register_view.cpp:67
+msgid "driving low"
+msgstr "nastavuji nízkou úroveň"
+
+#: coff/base/cdb_parser.cpp:138
+msgid "empty name"
+msgstr ""
+
+#: tools/list/compile_process.cpp:359
+msgid "error: "
+msgstr "chyba: "
+
+#: tools/pic30/pic30_generator.cpp:97
+msgid "example of context saving (push W4 and W5)"
+msgstr "příklad uložení kontextu (push W4 a W5)"
+
+#: tools/gputils/gputils_generator.cpp:76
+#: tools/gputils/gputils_generator.cpp:135
+#: tools/gputils/gputils_generator.cpp:214
+msgid "example variable"
+msgstr "ukázková proměnná"
+
+#: tools/gputils/gputils_generator.cpp:146
+#, fuzzy
+msgid "for restoringing context"
+msgstr "obnovit kontext"
+
+#: tools/gputils/gputils_generator.cpp:139
+#, fuzzy
+msgid "for saving context"
+msgstr "uložit kontext"
+
+#: tools/gputils/gputils_generator.cpp:225
+msgid "go to start of high priority interrupt code"
+msgstr "skok na začátek kódu pro obsluhu přerušení s vysokou prioritou"
+
+#: tools/gputils/gputils_generator.cpp:161
+#, fuzzy
+msgid "go to start of int pin interrupt code"
+msgstr "skok na začátek kódu pro obsluhu přerušení"
+
+#: tools/gputils/gputils_generator.cpp:95
+msgid "go to start of interrupt code"
+msgstr "skok na začátek kódu pro obsluhu přerušení"
+
+#: tools/gputils/gputils_generator.cpp:91
+#: tools/gputils/gputils_generator.cpp:157
+#: tools/gputils/gputils_generator.cpp:221
+msgid "go to start of main code"
+msgstr "skok na začátek hlavního kódu"
+
+#: tools/gputils/gputils_generator.cpp:173
+#, fuzzy
+msgid "go to start of peripheral interrupt code"
+msgstr "skok na začátek kódu pro obsluhu přerušení"
+
+#: tools/gputils/gputils_generator.cpp:169
+#, fuzzy
+msgid "go to start of t0cki interrupt code"
+msgstr "skok na začátek kódu pro obsluhu přerušení"
+
+#: tools/gputils/gputils_generator.cpp:165
+#, fuzzy
+msgid "go to start of timer0 interrupt code"
+msgstr "skok na začátek kódu pro obsluhu přerušení"
+
+#: tools/gputils/gputils_generator.cpp:238
+msgid "high priority interrupt service routine"
+msgstr "kód pro obsluhu přerušení s vysokou prioritou"
+
+#: tools/gputils/gputils_generator.cpp:223
+msgid "high priority interrupt vector"
+msgstr "vektor přerušení s vysokou prioritou"
+
+#: tools/gputils/gputils_generator.cpp:90
+msgid "initialize PCLATH"
+msgstr "inicializuj PCLATH"
+
+#: tools/pic30/pic30_generator.cpp:73
+msgid "initialize stack pointer"
+msgstr "inicializuj ukazatel zásobníku"
+
+#: tools/pic30/pic30_generator.cpp:74
+msgid "initialize stack pointer limit register"
+msgstr "inicializuj hraniční registr ukazatele zásobníku"
+
+#: tools/gputils/gputils_generator.cpp:181
+#, fuzzy
+msgid "insert INT pin interrupt code"
+msgstr "vložit kód pro obsluhu přerušení"
+
+#: tools/gputils/gputils_generator.cpp:193
+#, fuzzy
+msgid "insert T0CKI interrupt code"
+msgstr "vložit kód pro obsluhu přerušení"
+
+#: tools/gputils/gputils_generator.cpp:187
+#, fuzzy
+msgid "insert TIMER0 interrupt code"
+msgstr "vložit kód pro obsluhu přerušení"
+
+#: tools/boost/boost_generator.cpp:52 tools/boost/boost_generator.cpp:76
+#: tools/jal/jal_generator.cpp:31 tools/gputils/gputils_generator.cpp:52
+#: tools/sdcc/sdcc_generator.cpp:114 tools/pic30/pic30_generator.cpp:79
+msgid "insert code"
+msgstr "vložit kód"
+
+#: tools/gputils/gputils_generator.cpp:240
+msgid "insert high priority interrupt code"
+msgstr "vložit kód pro obsluhu přerušení s vysokou prioritou"
+
+#: tools/boost/boost_generator.cpp:47 tools/gputils/gputils_generator.cpp:109
+#: tools/sdcc/sdcc_generator.cpp:102 tools/pic30/pic30_generator.cpp:98
+msgid "insert interrupt code"
+msgstr "vložit kód pro obsluhu přerušení"
+
+#: tools/gputils/gputils_generator.cpp:232
+msgid "insert low priority interrupt code"
+msgstr "vložit kód pro obsluhu přerušení s nízkou prioritou"
+
+#: tools/gputils/gputils_generator.cpp:121
+#: tools/gputils/gputils_generator.cpp:176
+#: tools/gputils/gputils_generator.cpp:244
+msgid "insert main code"
+msgstr "vložit hlavní kód"
+
+#: tools/gputils/gputils_generator.cpp:199
+#, fuzzy
+msgid "insert peripheral interrupt code"
+msgstr "vložit kód pro obsluhu přerušení"
+
+#: tools/boost/boost_generator.cpp:45 tools/sdcc/sdcc_generator.cpp:101
+msgid "interrupt service routine"
+msgstr "podprogram pro obsluhu přerušení"
+
+#: tools/gputils/gputils_generator.cpp:93
+msgid "interrupt vector"
+msgstr "vektor přerušení"
+
+#: tools/jal/jal_generator.cpp:23
+msgid "jal standard library"
+msgstr "standardní knihovna jal"
+
+#: tools/pic30/pic30_generator.cpp:47
+msgid "label for code start"
+msgstr "návěští pro začátek kódu"
+
+#: tools/gputils/gputils_generator.cpp:89
+msgid "load upper byte of 'start' label"
+msgstr "načíst vyšší byte návěští 'start'"
+
+#: tools/boost/boost_generator.cpp:77 tools/jal/jal_generator.cpp:32
+#: tools/gputils/gputils_generator.cpp:53
+#: tools/gputils/gputils_generator.cpp:122
+#: tools/gputils/gputils_generator.cpp:177
+#: tools/gputils/gputils_generator.cpp:245 tools/pic30/pic30_generator.cpp:82
+msgid "loop forever"
+msgstr "opakuj navždy"
+
+#: tools/gputils/gputils_generator.cpp:227
+msgid "low priority interrupt vector"
+msgstr "vektor přerušení s nízkou prioritou"
+
+#: tools/jal/jal_generator.cpp:30
+msgid "main code"
+msgstr "hlavní kód"
+
+#: tools/boost/boost_generator.cpp:50 tools/boost/boost_generator.cpp:74
+msgid "main program"
+msgstr "hlavní program"
+
+#: tools/list/compile_process.cpp:360
+msgid "message: "
+msgstr "zpráva: "
+
+#: tools/gputils/gputils_generator.cpp:88
+#: tools/gputils/gputils_generator.cpp:155
+#: tools/gputils/gputils_generator.cpp:156
+#: tools/gputils/gputils_generator.cpp:219
+#: tools/gputils/gputils_generator.cpp:220
+msgid "needed for ICD2 debugging"
+msgstr "potřebné pro ladění s ICD2"
+
+#: coff/base/cdb_parser.cpp:307
+#, fuzzy
+msgid "no register defined"
+msgstr "Žádný registr"
+
+#: tools/pic30/pic30_generator.cpp:76
+msgid "nop after SPLIM initialization"
+msgstr "nop po inicializaci SPLIM"
+
+#: devices/pic/base/pic_config.cpp:198 devices/pic/base/pic_config.cpp:200
+#: devices/pic/base/pic_config.cpp:202
+msgid "not divided"
+msgstr "neděleno"
+
+#: devices/pic/gui/pic_memory_editor.cpp:114
+#: devices/pic/gui/pic_memory_editor.cpp:121
+#, fuzzy
+msgid "not present"
+msgstr "<nenastaveno>"
+
+#: progs/direct/gui/direct_config_widget.cpp:53
+msgid "on"
+msgstr "na"
+
+#: tools/gputils/gputils_generator.cpp:105
+msgid "only required if using more than first page"
+msgstr "vyžadováno jen pokud je používána i jiná než první stránka"
+
+#: tools/gputils/gputils_generator.cpp:197
+#, fuzzy
+msgid "peripheral interrupt service routine"
+msgstr "Obslužný podprogram přerušení od Timer1"
+
+#: tools/gputils/gputils_generator.cpp:49
+#: tools/gputils/gputils_generator.cpp:97
+msgid "relocatable code"
+msgstr "přemístitelný kód"
+
+#: common/nokde/nokde_kaboutdata.cpp:374
+msgid "replace this with information about your translation team"
+msgstr "nahradit za informace o vašem překladatelském týmu"
+
+#: tools/gputils/gputils_generator.cpp:86
+#: tools/gputils/gputils_generator.cpp:153
+#: tools/gputils/gputils_generator.cpp:217
+msgid "reset vector"
+msgstr "vektor resetu"
+
+#: tools/gputils/gputils_generator.cpp:111
+#: tools/gputils/gputils_generator.cpp:114
+#: tools/gputils/gputils_generator.cpp:233
+msgid "restore context"
+msgstr "obnovit kontext"
+
+#: tools/pic30/pic30_generator.cpp:100
+msgid "restore context from stack"
+msgstr "obnovit kontext ze zásobníku"
+
+#: tools/gputils/gputils_generator.cpp:100
+#: tools/gputils/gputils_generator.cpp:229
+msgid "save context"
+msgstr "uložit kontext"
+
+#: piklab-coff/main.cpp:183
+#, fuzzy
+msgid "section \"%1\":"
+msgstr "Rozpoznávám \"%1\"..."
+
+#: coff/base/coff_archive.cpp:118
+#, fuzzy
+msgid "size: %1 bytes"
+msgstr "%1 bytů"
+
+#: piklab-coff/main.cpp:189
+msgid "symbol \"%1\""
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:644
+msgid "the 2nd argument is a list of name+address, one on each line"
+msgstr "druhý parametr je seznam jméno+adresa, po jednom na každý řádek"
+
+#: piklab-coff/main.cpp:167
+msgid "type=\"%1\" address=%2 size=%3 flags=%4"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:115 coff/base/cdb_parser.cpp:161
+#, fuzzy
+msgid "unexpected end of line"
+msgstr "Neočekávaný konec souboru."
+
+#: coff/base/cdb_parser.cpp:294
+msgid "unknown AddressSpaceType"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:272
+#, fuzzy
+msgid "unknown DCLType"
+msgstr "neznámý stav"
+
+#: coff/base/cdb_parser.cpp:238
+#, fuzzy
+msgid "unknown ScopeType"
+msgstr "neznámý stav"
+
+#: coff/base/cdb_parser.cpp:282
+#, fuzzy
+msgid "unknown Sign"
+msgstr "Neznámý soubor"
+
+#: devices/gui/register_view.cpp:66 devices/gui/register_view.cpp:70
+msgid "unknown state"
+msgstr "neznámý stav"
+
+#: tools/gputils/gputils_generator.cpp:68
+#: tools/gputils/gputils_generator.cpp:69
+#: tools/gputils/gputils_generator.cpp:72
+#: tools/gputils/gputils_generator.cpp:81
+#, fuzzy
+msgid "variable used for context saving"
+msgstr "proměnné použité pro ukládání kontextu"
+
+#: tools/gputils/gputils_generator.cpp:130
+#: tools/gputils/gputils_generator.cpp:131
+#: tools/gputils/gputils_generator.cpp:132
+#: tools/gputils/gputils_generator.cpp:133
+#: tools/gputils/gputils_generator.cpp:210
+#: tools/gputils/gputils_generator.cpp:211
+#: tools/gputils/gputils_generator.cpp:212
+#, fuzzy
+msgid "variable used for context saving (for low-priority interrupts only)"
+msgstr "proměnné použité pro ukládání kontextu (jen pro přerušení s nízkou prioritou)"
+
+#: tools/gputils/gputils_generator.cpp:80
+msgid "variables used for context saving"
+msgstr "proměnné použité pro ukládání kontextu"
+
+#: tools/list/compile_process.cpp:358
+msgid "warning: "
+msgstr "upozornění: "
+
+#: coff/base/cdb_parser.cpp:128
+msgid "was expecting '%1'"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:200
+msgid "was expecting a bool ('%1')"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:177
+msgid "was expecting an uint"
+msgstr ""
+
+#~ msgid "Output Object Type:"
+#~ msgstr "Typ výstupního objektu:"
+
+#~ msgid "Number format not recognized"
+#~ msgstr "Formát čísla nerozeznán"
+
+#~ msgid "Too many arguments"
+#~ msgstr "Příliš mnoho parametrů"
+
+#~ msgid "Coff"
+#~ msgstr "Coff"
+
+#, fuzzy
+#~ msgid "Device Id"
+#~ msgstr "ID mikrokontroléru"
+
+#~ msgid "Elf"
+#~ msgstr "Elf"
+
+#, fuzzy
+#~ msgid "User Ids"
+#~ msgstr "Uživatelská ID"
+
+#~ msgid "Version"
+#~ msgstr "Verze"
+
+#~ msgid " <default>"
+#~ msgstr " <výchozí>"
+
+#, fuzzy
+#~ msgid "Return informations about files (for archive)."
+#~ msgstr "Vypsat informace o hex souboru."
+
+#~ msgid "Different processor name: %1"
+#~ msgstr "Jiné jméno procesoru: %1"
+
+#~ msgid "Optional header not parsed: magic number is %1"
+#~ msgstr "Volitelná hlavička nepochopena: magické číslo je %1"
+
+#~ msgid "Ram width is not %1: %2"
+#~ msgstr "Šířka paměti není %1: %2"
+
+#~ msgid "Rom width is not %1: %2"
+#~ msgstr "Šířka ROM není %1: %2"
+
+#~ msgid "Unknown processor type: %1"
+#~ msgstr "Neznámý typ procesoru: %1"
+
+#~ msgid " Already Loaded"
+#~ msgstr "Načteno"
+
+#~ msgid "Could not open COFF file."
+#~ msgstr "Nemohu otevřít COFF soubor."
+
+#~ msgid "Error reading COFF file."
+#~ msgstr "Chyba při čtení COFF souboru."
+
+#~ msgid "Incorrect magic number for archive COFF file."
+#~ msgstr "Nesprávné magické číslo pro archivní COFF soubor."
+
+#, fuzzy
+#~ msgid "Return information about COFF file."
+#~ msgstr "Vypsat informace o hex souboru."
+
+#, fuzzy
+#~ msgid "Stepping..."
+#~ msgstr "Rozpoznávám..."
+
+#~ msgid "Program all memory even if not needed (slower)."
+#~ msgstr "Programovat celou paměť, i když to není třeba (pomalejší)."
+
+#, fuzzy
+#~ msgid "24J Family"
+#~ msgstr "Rodina 18Xx"
+
+#~ msgid "Enhanced Flash"
+#~ msgstr "Rozšířená Flash"
+
+#~ msgid "Halting..."
+#~ msgstr "Zastavuji..."
+
+#~ msgid "Standard Flash"
+#~ msgstr "Standardní flash"
+
+#~ msgid "&Interrupt"
+#~ msgstr "&Přerušit"
+
+#~ msgid "Reset."
+#~ msgstr "Reset."
+
+#~ msgid "Stop."
+#~ msgstr "Zastavit."
+
+#~ msgid "htpp://k9spud.com/hoodmicro"
+#~ msgstr "htpp://k9spud.com/hoodmicro"
+
+#~ msgid "<qt><a href=\"http://www.microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=1406&dDocName=en010014&part=SW006011\">C18</a> is a C compiler distributed by Microchip.</qt>"
+#~ msgstr "<qt><a href=\"http://www.microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=1406&dDocName=en010014&part=SW006011\">C18</a> je kompilátor jazyka Basic distribuovaný společností Microchip.</qt>"
+
+#~ msgid "Details"
+#~ msgstr "Detaily"
+
+#~ msgid "GPUtils can be downloaded from <a href=\"http://gputils.sourceforge.net\">this page</a>.<br>A binary package for Mandriva is available <a href=\"href=http://sourceforge.net/project/showfiles.php?group_id=138852&package_id=181224\">here</a>."
+#~ msgstr "GPUtils si můžete stáhnout <a href=\"http://gputils.sourceforge.net\">zde</a>.<br>A binární balíček pro Mandrivu je dostupný <a href=\"href=http://sourceforge.net/project/showfiles.php?group_id=138852&package_id=181224\">zde</a>."
+
+#~ msgid "JAL V2 can be downloaded from <a href=\"http://www.casadeyork.com/jalv2\">this page</a>."
+#~ msgstr "JAL V2 si můžete stáhnout <a href=\"http://www.casadeyork.com/jalv2\">zde</a>."
+
+#~ msgid "JAL can be downloaded from <a href=\"http://jal.sourceforge.net\">this page</a>."
+#~ msgstr "JAL si můžete stáhnout <a href=\"http://jal.sourceforge.net\">zde</a>."
+
+#~ msgid "Program EEPROM (if supported)"
+#~ msgstr "Naprogramovat EEPROM (pokud je podporováno)"
+
+#~ msgid "The <a href=\"http://microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=1406&dDocName=en010065&part=SW006012\">PIC30 ToolChain</a> is distributed by Microchip under the GNU Public License.<br>Sources and packages can be downloaded from <a href=\"http://sourceforge.net/project/showfiles.php?group_id=138852&package_id=181225\">this page</a>."
+#~ msgstr "<a href=\"http://microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=1406&dDocName=en010065&part=SW006012\">Sada nástrojů PIC30</a> je šířena společností Microchip pod licencí GNU Public License.<br>Zdrojové kódy a balíčky jsou ke stažení <a href=\"http://sourceforge.net/project/showfiles.php?group_id=138852&package_id=181225\">zde</a>."
+
+#~ msgid ""
+#~ "The Pikloops utility (http://pikloops.tripod.com) is not installed in your system:\n"
+#~ " You can download pikloops from http://piklab.sourceforge.net"
+#~ msgstr ""
+#~ "Utilita Pikloops  (http://pikloops.tripod.com) není nainstalována:\n"
+#~ "Můžete si ji stáhnout z http://piklab.sourceforge.net"
+
+#~ msgid "The Small Devices C Compiler can be downloaded from <a href=\"http://sdcc.sourceforge.net\">this page</a>.<br>A binary package for Mandriva is available <a href=\"http://sourceforge.net/project/showfiles.php?group_id=138852&package_id=181223\">here</a>."
+#~ msgstr "Small Devices C Compiler si můžete stáhnout <a href=\"http://sdcc.sourceforge.net\">zde</a>.<br>Balíček pro Mandrivu je dostupný <a href=\"http://sourceforge.net/project/showfiles.php?group_id=138852&package_id=181223\">zde</a>."
+
+#~ msgid "Add File to Project"
+#~ msgstr "Přidat soubor do projektu"
+
+#~ msgid "Error while writing file \"%1\" (%2)."
+#~ msgstr "Chyba při zápisu souboru \"%1\" (%2)."
+
+#~ msgid "Preprocessor"
+#~ msgstr "Preprocessor"
+
+#~ msgid "Preprocessor:"
+#~ msgstr "Preprocessor:"
+
+#~ msgid "Return checksum: \"checksum <hexfilename>\"."
+#~ msgstr "Vypsat kontrolní součet: \"checksum <hex_soubor>\"."
+
+#~ msgid "Check hex file for correctness."
+#~ msgstr "Zkontrolujte správnost hex souboru."
+
+#~ msgid " not available"
+#~ msgstr " nedostupný"
+
+#, fuzzy
+#~ msgid "Watchdog tiler prescaler"
+#~ msgstr "Dělička Watchdog časovače A"
+
+#, fuzzy
+#~ msgid "Code-protected"
+#~ msgstr "Kód chráněný"
+
+#~ msgid "dsPICs Family"
+#~ msgstr "Rodina dsPIC"
+
+#~ msgid "(%1 pins)"
+#~ msgstr "(%1 vývodů)"
+
+#~ msgid "Reset"
+#~ msgstr "Reset"
+
+#~ msgid "Supported Programmers"
+#~ msgstr "Podporované programátory"
+
+#~ msgid "Supported Tools"
+#~ msgstr "Podporované nástroje"
+
+#~ msgid "Bootloader"
+#~ msgstr "Zavaděč"
+
+#~ msgid "Bootloader:"
+#~ msgstr "Zavaděč:"
+
+#~ msgid "Debugger/Emulator"
+#~ msgstr "Debugger/emulátor"
diff --git a/po/de.po b/po/de.po
new file mode 100644
index 0000000..1437d15
--- /dev/null
+++ b/po/de.po
@@ -0,0 +1,7290 @@
+# Translation of Piklab to german
+# since version 0.13.0
+# Stefan von Halenbach  2007
+#
+msgid ""
+msgstr ""
+"Project-Id-Version: Piklab V0.13.1\n"
+"Report-Msgid-Bugs-To: \n"
+"POT-Creation-Date: 2007-11-25 14:15+0100\n"
+"PO-Revision-Date: 2007-05-21 14:28+0100\n"
+"Last-Translator: Stefan von Halenbach <vonHalenbach at users dot sf .net>\n"
+"Language-Team: Stefan von Halenbach <vonHalenbach at users sf dot net>\n"
+"MIME-Version: 1.0\n"
+"Content-Type: text/plain; charset=UTF-8\n"
+"Content-Transfer-Encoding: 8bit\n"
+"X-Poedit-Language: German\n"
+"X-Poedit-Country: GERMANY\n"
+"X-Poedit-SourceCharset: utf-8\n"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:802
+msgid ""
+"\n"
+"%1:\n"
+msgstr ""
+"\n"
+"%1:\n"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:946
+msgid ""
+"\n"
+"Arguments:\n"
+msgstr ""
+"\n"
+"Argumente:\n"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:885
+msgid ""
+"\n"
+"Options:\n"
+msgstr ""
+"\n"
+"Optionen:\n"
+
+#: devices/pic/prog/pic_prog.cpp:109
+msgid "  %1 = %2 V: error in voltage level."
+msgstr "  %1 = %2 V: Fehler im Spanungspegel."
+
+#: progs/icd2/base/icd2_debug_specific.cpp:58
+msgid "  According to ICD2 manual, instruction at address 0x0 should be \"nop\"."
+msgstr "  Laut der ICD2 Anleitung, soll die Instruktion an Addresse 0x0 so sein: \"nop\"."
+
+#: devices/pic/prog/pic_prog.cpp:387
+msgid "  Band gap bits have been preserved."
+msgstr "  Band gap bits have been preserved."
+
+#: devices/pic/prog/pic_prog.cpp:630
+#, fuzzy
+msgid "  Blank check successful"
+msgstr "  Leertest erfolgreich"
+
+#: progs/icd2/base/icd2_debug.cpp:314
+msgid "  Debug executive version: %1"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:626
+#, fuzzy
+msgid "  EPROM device: blank checking first..."
+msgstr " EPROM Bauteil: Zuerst der Leertest..."
+
+#: devices/pic/prog/pic_prog.cpp:658 devices/pic/prog/pic_prog.cpp:714
+msgid "  Erasing device"
+msgstr " lösche Bauteil"
+
+#: progs/icd2/base/icd2_prog.cpp:111
+msgid "  Firmware succesfully uploaded."
+msgstr " Firmware wurde erfolgreich hochgeladen."
+
+#: progs/icd2/base/icd2_prog.cpp:82
+msgid "  Incorrect firmware loaded."
+msgstr " Falsche Firmware geladen."
+
+#: devices/pic/prog/pic_prog.cpp:360
+msgid "  Osccal backup has been preserved."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:355
+msgid "  Osccal backup is unchanged."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:346
+msgid "  Osccal has been preserved."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:341
+msgid "  Osccal is unchanged."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug_specific.cpp:76
+#: progs/icd2/base/icd2_debug_specific.cpp:83
+#: progs/icd2/base/icd2_debug_specific.cpp:166
+#: progs/icd2/base/icd2_debug_specific.cpp:244
+msgid "  PC is not at address %1 (%2)"
+msgstr " PC ist nicht bei Adresse %1 (%2)"
+
+#: devices/pic/prog/pic_prog.cpp:508
+msgid "  Part of device memory is protected (in %1) and cannot be verified."
+msgstr " Ein Teil des Speichers (in %1) ist gegen Auslesen geschützt und kann deshalb nicht verifiziert werden."
+
+#: devices/pic/prog/pic_prog.cpp:512
+msgid "  Read memory: %1"
+msgstr " Lese Speicher: %1"
+
+#: devices/pic/prog/pic_prog.cpp:334
+msgid "  Replace invalid osccal with backup value."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:101
+msgid "  Set target self powered: %1"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:277
+msgid "  Unknown or incorrect device (Read id is %1)."
+msgstr " Unbekanntes oder falsch angegebenes Bauteil (Gelesene ID ist %1)."
+
+#: progs/pickit2/base/pickit2_prog.cpp:63
+msgid "  Uploading PICkit2 firmware..."
+msgstr " Lade PICkit2 Firmware hoch..."
+
+#: progs/icd2/base/icd2_debug.cpp:247
+msgid "  Verify debug executive"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:505
+msgid "  Verify memory: %1"
+msgstr " Vergleiche Speicher: %1"
+
+#: progs/icd2/base/icd2_debug.cpp:244
+msgid "  Write debug executive"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:565 devices/pic/prog/pic_prog.cpp:683
+#: devices/pic/prog/pic_prog.cpp:694
+msgid "  Write memory: %1"
+msgstr " Beschreibe Speicher: %1"
+
+#: devices/pic/pic/pic_group.cpp:31 devices/pic/pic/pic_group.cpp:37
+msgid " (%2 bits)"
+msgstr " (%2 Bits)"
+
+#: libgui/project_manager_ui.cpp:106 libgui/project_manager_ui.cpp:175
+msgid " (default)"
+msgstr " (Standard)"
+
+#: devices/gui/register_view.cpp:72
+msgid " (input)"
+msgstr "(Eingang)"
+
+#: devices/pic/pic/pic_group.cpp:38
+msgid " (not programmable)"
+msgstr "(Nicht Programmierbar)"
+
+#: devices/gui/register_view.cpp:68
+msgid " (output)"
+msgstr "(Ausgang)"
+
+#: devices/pic/gui/pic_memory_editor.cpp:255
+msgid " - not programmed by default"
+msgstr "- Standardmäßig unprogrammiert"
+
+#: devices/pic/gui/pic_memory_editor.cpp:254
+#, fuzzy
+msgid " - recommended mask: %1"
+msgstr " - Lesemaske: %1"
+
+#: piklab-coff/main.cpp:176
+#, fuzzy
+msgid " Filename:Line"
+msgstr "Dateiname"
+
+#: piklab-prog/cmdline.cpp:137
+#, fuzzy
+msgid " no port detected."
+msgstr " Keinen Port erkannt"
+
+#: piklab-prog/cmdline.cpp:133
+#, fuzzy
+msgid " support disabled."
+msgstr " Keinen Port erkannt"
+
+#: tools/gui/toolchain_config_widget.cpp:167
+msgid "\"%1\" found"
+msgstr "\"%1\" gefunden"
+
+#: tools/gui/toolchain_config_widget.cpp:234
+msgid "\"%1\" not found"
+msgstr "\"%1\" nicht gefunden"
+
+#: tools/gui/toolchain_config_widget.cpp:168
+msgid "\"%1\" not recognized"
+msgstr "\"%1\" nicht erkannt"
+
+#: progs/gpsim/base/gpsim.cpp:68
+msgid "\"gpsim\" unexpectedly exited."
+msgstr ""
+
+#: coff/base/text_coff.cpp:252 coff/base/text_coff.cpp:257
+msgid "%1 (magic id: %2)"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:221
+msgid "%1 (proc. %2; rev. %3.%4)"
+msgstr "%1 (proc. %2; rev. %3.%4)"
+
+#: devices/pic/base/pic.cpp:215 devices/pic/base/pic.cpp:225
+msgid "%1 (rev. %2)"
+msgstr "%1 (rev. %2)"
+
+#: devices/pic/base/pic.cpp:218
+#, fuzzy
+msgid "%1 (rev. %2.%3)"
+msgstr "%1 (rev. %2)"
+
+#: progs/gui/hardware_config_widget.cpp:178
+msgid "%1 <custom>"
+msgstr "%1 <custom>"
+
+#: piklab-prog/cli_interactive.cpp:312
+msgid "%1 = %2"
+msgstr "%1 = %2"
+
+#: progs/gui/hardware_config_widget.cpp:50
+msgid "%1 at %2:"
+msgstr "%1 bei %2:"
+
+#: devices/mem24/mem24/mem24_group.cpp:21 devices/pic/pic/pic_group.cpp:36
+msgid "%1 bytes"
+msgstr "%1 bytes"
+
+#: devices/pic/base/pic_config.cpp:308
+msgid "%1 for block %2"
+msgstr "%1 für Block %2"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:883
+msgid "%1 options"
+msgstr "%1 Optionen"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:647
+msgid "%1 was written by somebody who wants to remain anonymous."
+msgstr "%1 wurde von jemandem geschrieben, der gerne Anonym bleiben wollte."
+
+#: devices/pic/pic/pic_group.cpp:30
+msgid "%1 words"
+msgstr "%1 Wörter"
+
+#: devices/pic/gui/pic_memory_editor.cpp:256
+msgid "%1-bit words - mask: %2"
+msgstr "%1-bit words - mask: %2"
+
+#: devices/pic/prog/pic_prog.cpp:467
+msgid "%1: Erasing this range only is not supported with this programmer. This will erase the whole chip and restore the other memory ranges."
+msgstr ""
+
+#: libgui/toplevel.cpp:278
+msgid "&Advanced..."
+msgstr "&Weitere Funktionen..."
+
+#: devices/gui/memory_editor.cpp:283 libgui/toplevel.cpp:270
+msgid "&Blank Check"
+msgstr "&Leertest"
+
+#: libgui/toplevel.cpp:294
+msgid "&Break<Translators: it is the verb>"
+msgstr ""
+
+#: libgui/toplevel.cpp:246
+msgid "&Build Project"
+msgstr "&baue Projekt"
+
+#: devices/gui/memory_editor.cpp:275
+msgid "&Clear"
+msgstr "&säubern"
+
+#: libgui/toplevel.cpp:248
+msgid "&Compile File"
+msgstr "&compiliere Datei"
+
+#: libgui/toplevel.cpp:314
+msgid "&Config Generator..."
+msgstr ""
+
+#: libgui/likeback.cpp:97
+msgid "&Configure Email Address..."
+msgstr "&e-mail eintragen..."
+
+#: libgui/toplevel.cpp:256
+msgid "&Connect"
+msgstr "&Verbinde"
+
+#. i18n: file ./data/app_data/piklabui.rc line 101
+#: rc.cpp:30
+#, no-c-format
+msgid "&Debugger"
+msgstr "&Debugger"
+
+#: libgui/toplevel.cpp:312
+msgid "&Device Information..."
+msgstr "&Bauteilinformation..."
+
+#: libgui/toplevel.cpp:260
+msgid "&Disconnect"
+msgstr "&trenne Verbindung"
+
+#: libgui/toplevel.cpp:296
+#, fuzzy
+msgid "&Disconnect/Stop"
+msgstr "&trenne Verbindung"
+
+#: devices/gui/memory_editor.cpp:282 libgui/toplevel.cpp:268
+msgid "&Erase"
+msgstr "&lösche"
+
+#: libgui/toplevel.cpp:310
+#, fuzzy
+msgid "&Find Files..."
+msgstr "Datei hinzufügen..."
+
+#: libgui/toplevel.cpp:183
+msgid "&New Source File..."
+msgstr "&Neue Sourcedatei..."
+
+#: libgui/toplevel.cpp:308
+msgid "&Pikloops..."
+msgstr "&Pikloops..."
+
+#: devices/gui/memory_editor.cpp:279 libgui/toplevel.cpp:262
+msgid "&Program"
+msgstr "&programmiere"
+
+#. i18n: file ./data/app_data/piklabui.rc line 63
+#: rc.cpp:21
+#, no-c-format
+msgid "&Project"
+msgstr "&Projekt"
+
+#: devices/gui/memory_editor.cpp:281 libgui/toplevel.cpp:266
+msgid "&Read"
+msgstr "&Lesen"
+
+#: libgui/toplevel.cpp:219
+msgid "&Reset Layout"
+msgstr ""
+
+#: libgui/toplevel.cpp:272 libgui/toplevel.cpp:286
+msgid "&Run"
+msgstr "&Start"
+
+#: libgui/device_gui.cpp:90
+msgid "&Select"
+msgstr "&wähle"
+
+#: libgui/toplevel.cpp:288
+msgid "&Step"
+msgstr "&Schrittmodus"
+
+#: libgui/toplevel.cpp:274
+msgid "&Stop"
+msgstr "&Stopp"
+
+#: libgui/toplevel.cpp:316
+msgid "&Template Generator..."
+msgstr ""
+
+#: devices/gui/memory_editor.cpp:280 libgui/toplevel.cpp:264
+msgid "&Verify"
+msgstr "&Vergleiche"
+
+#: devices/gui/memory_editor.cpp:276
+msgid "&Zero"
+msgstr "&Zero"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:545
+msgid "'%1' missing."
+msgstr "'%1' fehlt."
+
+#: devices/pic/gui/pic_memory_editor.cpp:366
+msgid "(backup)"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:83 tools/list/compile_manager.cpp:112
+#: tools/list/compile_manager.cpp:137
+msgid "*** Aborted ***"
+msgstr "*** Abgebrochen ***"
+
+#: tools/list/compile_process.cpp:143
+msgid "*** Error ***"
+msgstr "*** FEHLER ***"
+
+#: tools/list/compile_process.cpp:140
+msgid "*** Exited with status: %1 ***"
+msgstr "*** Beendet mit Status: %1 ***"
+
+#: tools/list/compile_manager.cpp:194 tools/list/compile_manager.cpp:268
+msgid "*** Success ***"
+msgstr "*** Erfolgreich ***"
+
+#: tools/list/compile_process.cpp:150
+msgid "*** Timeout ***"
+msgstr "*** Zeit überschritten ***"
+
+#: common/cli/cli_log.cpp:62
+msgid "*no*"
+msgstr "*Nein*"
+
+#: common/cli/cli_log.cpp:62
+msgid "*yes*"
+msgstr "*JA*"
+
+#: progs/base/generic_prog.cpp:28
+msgid "---"
+msgstr "---"
+
+#: devices/pic/base/pic_config.cpp:74
+msgid "00"
+msgstr "00"
+
+#: devices/pic/base/pic_config.cpp:74
+msgid "01"
+msgstr "01"
+
+#: devices/pic/base/pic_config.cpp:75
+msgid "10"
+msgstr "10"
+
+#: tools/jal/jal_generator.cpp:22
+msgid "10MHz crystal"
+msgstr "10MHz Quartz"
+
+#: devices/pic/base/pic_config.cpp:75
+msgid "11"
+msgstr "11"
+
+#: devices/pic/base/pic_config.cpp:216
+msgid "12-bit external bus"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:217
+msgid "16-bit external bus"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:53
+#, fuzzy
+msgid "17C Family"
+msgstr "17X Familie"
+
+#: devices/pic/base/pic.cpp:54
+msgid "18C Family"
+msgstr "18C Familie"
+
+#: devices/pic/base/pic.cpp:55
+msgid "18F Family"
+msgstr "18F Familie"
+
+#: devices/pic/base/pic.cpp:56
+msgid "18J Family"
+msgstr "18J Familie"
+
+#: devices/pic/base/pic_config.cpp:218
+msgid "20-bit external bus"
+msgstr ""
+
+#: devices/mem24/base/mem24.h:25
+#, fuzzy
+msgid "24 EEPROM"
+msgstr "Daten EEPROM"
+
+#: devices/pic/base/pic.cpp:57
+#, fuzzy
+msgid "24F Family"
+msgstr "24H Familie"
+
+#: devices/pic/base/pic.cpp:58
+msgid "24H Family"
+msgstr "24H Familie"
+
+#: devices/pic/base/pic.cpp:59
+#, fuzzy
+msgid "30F Family"
+msgstr "18F Familie"
+
+#: devices/pic/base/pic.cpp:60
+#, fuzzy
+msgid "33F Family"
+msgstr "18F Familie"
+
+#: devices/pic/base/pic_config.cpp:207
+msgid "4 MHz"
+msgstr "4 MHz"
+
+#: devices/pic/base/pic_config.cpp:222
+msgid "5-bit address mask mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:221
+msgid "7-bit address mask mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:206
+msgid "8 MHz"
+msgstr "8 MHz"
+
+#: libgui/device_gui.cpp:155
+#, fuzzy
+msgid "<Feature>"
+msgstr "<auto>"
+
+#: libgui/device_gui.cpp:142
+msgid "<Memory Type>"
+msgstr "<Speichertyp>"
+
+#: libgui/device_gui.cpp:118
+msgid "<Programmer>"
+msgstr "<Programmierer>"
+
+#: libgui/device_gui.cpp:150
+#, fuzzy
+msgid "<Status>"
+msgstr "Status"
+
+#: libgui/device_gui.cpp:130
+msgid "<Toolchain>"
+msgstr "<Toolchain>"
+
+#: tools/boost/boostbasic.cpp:22
+msgid "<a href=\"%1\">BoostBasic Compiler</a> is a Basic compiler distributed by SourceBoost Technologies."
+msgstr ""
+
+#: tools/boost/boostc.cpp:22
+msgid "<a href=\"%1\">BoostC Compiler</a> is a C compiler distributed by SourceBoost Technologies."
+msgstr ""
+
+#: tools/boost/boostcpp.cpp:23
+msgid "<a href=\"%1\">BoostC++ Compiler</a> is a C compiler distributed by SourceBoost Technologies."
+msgstr ""
+
+#: tools/cc5x/cc5x.cpp:55
+msgid "<a href=\"%1\">CC5X</a> is a C compiler distributed by B Knudsen Data."
+msgstr ""
+
+#: tools/ccsc/ccsc.cpp:90
+msgid "<a href=\"%1\">CCS Compiler</a> is a C compiler distributed by CCS."
+msgstr ""
+
+#: tools/gputils/gputils.cpp:40
+msgid "<a href=\"%1\">GPUtils</a> is an open-source assembler and linker suite.<br>"
+msgstr ""
+
+#: tools/jalv2/jalv2.cpp:31
+msgid "<a href=\"%1\">JAL V2</a> is a new compiler for the high-level language JAL."
+msgstr ""
+
+#: tools/jal/jal.cpp:31
+msgid "<a href=\"%1\">JAL</a> is a high-level language for PIC microcontrollers."
+msgstr ""
+
+#: tools/mpc/mpc.cpp:50
+msgid "<a href=\"%1\">MPC Compiler</a> is a C compiler distributed by Byte Craft."
+msgstr ""
+
+#: tools/picc/picc.cpp:119
+msgid "<a href=\"%1\">PICC 18</a> is a C compiler distributed by HTSoft."
+msgstr ""
+
+#: tools/picc/picc.cpp:93
+msgid "<a href=\"%1\">PICC-Lite</a> is a freeware C compiler distributed by HTSoft."
+msgstr ""
+
+#: tools/picc/picc.cpp:106
+msgid "<a href=\"%1\">PICC</a> is a C compiler distributed by HTSoft."
+msgstr ""
+
+#: progs/gui/port_selector.cpp:88
+msgid "<a href=\"%1\">See Piklab homepage for help</a>."
+msgstr ""
+
+#: devices/list/device_list.cpp:16
+msgid "<auto>"
+msgstr "<auto>"
+
+#: tools/gui/toolchain_config_widget.cpp:299
+msgid "<b>Device string #%1:</b><br>%2<br>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:298
+msgid "<b>Device string:</b><br>%1<br>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:271
+msgid "<b>Version string:</b><br>%1<br></qt>"
+msgstr ""
+
+#: libgui/hex_editor.cpp:101
+msgid "<b>Warning:</b> hex file seems to be incompatible with the selected device %1:<br>%2"
+msgstr "<b>Warnung:</b> Hex-Datei scheint mit dem ausgewählten Bauteil %1 inkompatibel zu sein. :<br>%2"
+
+#: libgui/project_manager_ui.cpp:165
+msgid "<default>"
+msgstr "<default>"
+
+#: piklab-prog/cmdline.cpp:411 piklab-prog/cmdline.cpp:426
+#: piklab-prog/cmdline.cpp:431 piklab-prog/cmdline.cpp:435
+msgid "<from config>"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:182
+msgid "<invalid>"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:62
+msgid "<no project>"
+msgstr "<no project>"
+
+#: devices/pic/pic/pic_group.cpp:54
+msgid "<none>"
+msgstr "<none>"
+
+#: piklab-hex/main.cpp:241 piklab-hex/main.cpp:245 piklab-prog/cmdline.cpp:403
+#: piklab-prog/cmdline.cpp:408 piklab-prog/cmdline.cpp:413
+#: piklab-prog/cmdline.cpp:416 piklab-prog/cmdline.cpp:422
+#: piklab-prog/cmdline.cpp:430 piklab-prog/cmdline.cpp:439
+#: piklab-prog/cmdline.cpp:443 piklab-coff/main.cpp:247
+msgid "<not set>"
+msgstr "<not set>"
+
+#: libgui/likeback.cpp:657
+msgid "<p>Error while trying to send the report.</p><p>Please retry later.</p>"
+msgstr ""
+
+#: libgui/likeback.cpp:659
+msgid "<p>Your comment has been sent successfully. It will help improve the application.</p><p>Thanks for your time.</p>"
+msgstr ""
+
+#: tools/c18/c18.cpp:85
+msgid "<qt><a href=\"%1\">C18</a> is a C compiler distributed by Microchip.</qt>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:296
+msgid "<qt><b>Command #%1 for devices detection:</b><br>%2<br>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:295
+msgid "<qt><b>Command for devices detection:</b><br>%1<br>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:270
+msgid "<qt><b>Command for executable detection:</b><br>%1<br>"
+msgstr ""
+
+#: tools/gui/tool_config_widget.cpp:113
+msgid "<qt>This values will be placed after the linked objects.</qt>"
+msgstr ""
+
+#: piklab-hex/main.cpp:278
+#, fuzzy
+msgid "<value>"
+msgstr "<auto>"
+
+#: devices/pic/base/pic.cpp:72
+msgid "ADC"
+msgstr ""
+
+#: coff/base/coff_object.cpp:124
+msgid "Absolute Value"
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:47
+msgid "Access Bank (high)"
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:47
+msgid "Access Bank (low)"
+msgstr ""
+
+#: progs/direct/base/direct_mem24.cpp:168
+msgid "Acknowledge bit incorrect"
+msgstr "Acknowledge Bit falsch"
+
+#: devices/pic/base/pic_config.cpp:108 devices/pic/base/pic_config.cpp:111
+msgid "Active high"
+msgstr "Aktiv high"
+
+#: devices/pic/base/pic_config.cpp:109 devices/pic/base/pic_config.cpp:112
+msgid "Active low"
+msgstr "Aktiv low"
+
+#: libgui/project_manager.cpp:200 libgui/toplevel.cpp:242
+msgid "Add Current File"
+msgstr "Datei hinzufügen"
+
+#: libgui/toplevel.cpp:240
+msgid "Add Object File..."
+msgstr "Füge Objektdatei hinzu..."
+
+#: libgui/project_manager.cpp:199 libgui/project_manager.cpp:214
+#, fuzzy
+msgid "Add Object Files..."
+msgstr "Füge Objektdatei hinzu..."
+
+#: libgui/toplevel.cpp:238
+msgid "Add Source File..."
+msgstr "Füge Sourcedatei hinzu..."
+
+#: libgui/project_wizard.cpp:149
+msgid "Add Source Files"
+msgstr "Füge Quelldateien hinzu"
+
+#: libgui/project_manager.cpp:198 libgui/project_manager.cpp:219
+#, fuzzy
+msgid "Add Source Files..."
+msgstr "Füge Sourcedatei hinzu..."
+
+#: libgui/project_wizard.cpp:151
+msgid "Add existing files."
+msgstr "Füge bereits bestehende Dateien hinzu."
+
+#: libgui/project_manager.cpp:314
+msgid "Add only"
+msgstr ""
+
+#: libgui/new_dialogs.cpp:66
+msgid "Add to project"
+msgstr "Hinzufügen zum Projekt"
+
+#: libgui/breakpoint_view.cpp:49 piklab-coff/main.cpp:176
+msgid "Address"
+msgstr "Adresse"
+
+#: devices/pic/base/pic_config.cpp:129
+msgid "Address bus width (in bits)"
+msgstr "Breite des Adressbusses (in Bits)"
+
+#: progs/gui/prog_group_ui.cpp:50
+msgid "Advanced Dialog"
+msgstr "Erweiterte Einstellungen"
+
+#: devices/pic/base/pic_config.cpp:393
+msgid "All"
+msgstr "Alles"
+
+#: libgui/toplevel.cpp:553
+msgid "All Files"
+msgstr "Alle Dateien"
+
+#: common/common/purl_base.cpp:117
+msgid "All Object Files"
+msgstr "Alle Objektdateien"
+
+#: common/common/purl_base.cpp:105
+msgid "All Source Files"
+msgstr "Alle Sourcedateien"
+
+#: piklab-prog/cli_interactive.cpp:192
+#, fuzzy
+msgid "All breakpoints removed."
+msgstr "Alle Unterbrechungspunkte entfernt"
+
+#: common/global/log.cpp:29
+msgid "All debug messages"
+msgstr "Alle Debug-Nachrichten"
+
+#: tools/gputils/gputils_config.cpp:13 tools/c18/c18_config.cpp:12
+msgid "All messages"
+msgstr "Alle Nachrichten"
+
+#: devices/pic/prog/pic_prog.cpp:191
+#, fuzzy
+msgid "All or part of code memory is protected so it cannot be preserved. Continue anyway?"
+msgstr "Der Gesamte oder ein Teil des Programmspeicherbereiches ist vor dem Auslesen geschützt. Trotzdem fortfahren?"
+
+#: devices/pic/prog/pic_prog.cpp:198
+#, fuzzy
+msgid "All or part of data EEPROM is protected so it cannot be preserved. Continue anyway?"
+msgstr "Der Gesamte oder ein Teil des Datenspeicherbereiches ist vor dem Auslesen geschützt. Trotzdem fortfahren?"
+
+#: devices/pic/base/pic_config.cpp:271
+msgid "Allow multiple reconfigurations"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:270
+msgid "Allow only one reconfiguration"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:275
+#, fuzzy
+msgid "Alternate"
+msgstr "Weitere Optionen"
+
+#: devices/pic/base/pic_config.cpp:272
+#, fuzzy
+msgid "Alternate I2C pins"
+msgstr "Weitere Optionen"
+
+#: devices/base/device_group.cpp:239
+msgid "Alternatives"
+msgstr "Weitere Optionen"
+
+#: devices/pic/base/pic_config.cpp:105
+msgid "Analog"
+msgstr "Analog"
+
+#: coff/base/coff.cpp:22
+msgid "Archive"
+msgstr ""
+
+#: libgui/likeback.cpp:135
+msgid "Are you sure you do not want to participate anymore in the application enhancing program?"
+msgstr "Sind Sie sicher, dass Sie in Zukunft nicht mehr an dem Verbesserungsprozess dieses Programms teilhaben wollen? "
+
+#: piklab-prog/cmdline.cpp:221
+msgid "Argument file type not recognized."
+msgstr "Dateityp der übergebenen Datei nicht erkannt."
+
+#: piklab-prog/cli_interactive.cpp:196
+msgid "Argument should be breakpoint index."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:186
+#, fuzzy
+msgid "Arguments not recognized."
+msgstr "Übergebene Argumente nicht erkannt"
+
+#: tools/gui/tool_config_widget.cpp:44
+msgid "Arguments:"
+msgstr "Argumente:"
+
+#: coff/base/cdb_parser.cpp:23 coff/base/coff_object.cpp:180
+msgid "Array"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:59
+msgid "Asix Piccolo"
+msgstr "Asix Piccolo"
+
+#: progs/direct/base/direct_prog_config.cpp:61
+msgid "Asix Piccolo Grande"
+msgstr "Asix Piccolo Grande"
+
+#: tools/base/generic_tool.cpp:18 common/common/purl_base.cpp:20
+#: common/common/purl_base.cpp:25
+msgid "Assembler"
+msgstr "Assembler"
+
+#: common/common/purl_base.cpp:33
+msgid "Assembler File"
+msgstr "Assembler Datei"
+
+#: common/common/purl_base.cpp:34
+msgid "Assembler File for PIC30"
+msgstr "Assembler-Datei für PIC30"
+
+#: common/common/purl_base.cpp:35
+msgid "Assembler File for PICC"
+msgstr "Assembler-Datei für PICC"
+
+#: tools/base/generic_tool.cpp:18
+msgid "Assembler:"
+msgstr "Assembler:"
+
+#: devices/base/generic_memory.cpp:34
+msgid "At least one value (at address %1) is defined outside memory ranges."
+msgstr "Mindestens ein Wert (an Adresse %1) befindet sich außerhalb des Speicherbereichs des Mikrokontrollers."
+
+#: devices/mem24/mem24/mem24_memory.cpp:86 devices/pic/pic/pic_memory.cpp:545
+msgid "At least one word (at offset %1) is larger (%2) than the corresponding mask (%3)."
+msgstr "Mindestens ein Datenwort (bei offset %1) ist größer (%2) als die Korrespondierende Maske (%3)."
+
+#: common/global/about.cpp:79
+msgid "Author and maintainer."
+msgstr "Autor und Hauptverantwortlicher."
+
+#: common/global/about.cpp:82
+msgid "Author of gputils"
+msgstr "Autor von gputils"
+
+#: common/global/about.cpp:83
+msgid "Author of likeback"
+msgstr "Autor von likeback"
+
+#: coff/base/coff_object.cpp:147
+#, fuzzy
+msgid "Auto Argument"
+msgstr "Argumente:"
+
+#: tools/gui/tool_config_widget.cpp:24
+msgid "Automatic"
+msgstr "Automatisch"
+
+#: coff/base/coff_object.cpp:129
+#, fuzzy
+msgid "Automatic Variable"
+msgstr "Automatisch"
+
+#: libgui/global_config.cpp:20
+msgid "Automatically rebuild project before programming if it is modified."
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:351
+msgid "Bad checksum for read block: %1 (%2 expected)."
+msgstr "Prüfsummenfehler im gelesenen Block: %1 (es wurde %2 erwartet)."
+
+#: progs/icd2/base/icd2.cpp:232
+msgid "Bad checksum for received string"
+msgstr "Prüfsummenfehler in empfangener Zeichenkette"
+
+#: devices/pic/base/pic_config.cpp:68
+msgid "Bandgap voltage calibration"
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:59
+#: devices/pic/gui/pic_register_view.cpp:61
+msgid "Bank %1"
+msgstr "Bank %1"
+
+#: devices/pic/gui/pic_register_view.cpp:54
+msgid "Bank %1 (high)"
+msgstr "Bank %1 (high)"
+
+#: devices/pic/gui/pic_register_view.cpp:54
+msgid "Bank %1 (low)"
+msgstr "Bank %1 (low)"
+
+#: devices/pic/base/pic.cpp:51
+msgid "Baseline Family"
+msgstr "Baseline Familie"
+
+#: common/common/purl_base.cpp:29
+msgid "Basic Compiler"
+msgstr "Basic Compiler"
+
+#: common/common/purl_base.cpp:41
+msgid "Basic Source File"
+msgstr "Sourcedatei in Basic"
+
+#: coff/base/coff_object.cpp:149
+msgid "Beginning or End of Block"
+msgstr ""
+
+#: coff/base/coff_object.cpp:150
+msgid "Beginning or End of Function"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:20
+msgid "Bin to Hex"
+msgstr "Bin nach Hex"
+
+#: tools/base/generic_tool.cpp:20
+msgid "Bin to Hex:"
+msgstr "Binär zu HEX:"
+
+#: common/common/number.cpp:21
+msgid "Binary"
+msgstr "Binärdatei"
+
+#: coff/base/cdb_parser.cpp:55
+#, fuzzy
+msgid "Bit Addressable"
+msgstr "Adresse"
+
+#: coff/base/cdb_parser.cpp:39 coff/base/coff_object.cpp:146
+msgid "Bit Field"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:36
+msgid "Blank Checking..."
+msgstr "Mache Leertest..."
+
+#: progs/base/prog_config.cpp:74
+msgid "Blank check after erase."
+msgstr "Nach Löschung Leertest ausführen."
+
+#: piklab-prog/cmdline.cpp:49
+msgid "Blank check device memory."
+msgstr "Teste Bauteilspeicher auf Unbeschriebenheit."
+
+#: progs/base/generic_prog.cpp:289
+msgid "Blank checking done."
+msgstr "Leertest beendet."
+
+#: progs/base/generic_prog.cpp:400
+msgid "Blank checking successful."
+msgstr "Leertest war erfolgreich."
+
+#: progs/base/generic_prog.cpp:287 progs/base/generic_prog.cpp:398
+msgid "Blank checking..."
+msgstr "Teste auf Unbeschriebenheit..."
+
+#: piklab-prog/cmdline.cpp:316
+msgid "Blank-checking device memory not supported for specified programmer."
+msgstr "Leertest dieses Bauteils wird mit dem angegebenen Programmiergerät nicht unterstützt."
+
+#: devices/mem24/mem24/mem24_group.cpp:38
+#: devices/pic/base/pic_protection.cpp:360
+#, fuzzy
+msgid "Block #%1"
+msgstr "Block %1"
+
+#: tools/boost/boostbasic.h:51
+msgid "BoostBasic Compiler for PIC16"
+msgstr "BoostBasic Compiler für PIC16"
+
+#: tools/boost/boostbasic.h:62
+msgid "BoostBasic Compiler for PIC18"
+msgstr "BoostBasic Compiler für PIC18"
+
+#: tools/boost/boostc.h:51
+msgid "BoostC Compiler for PIC16"
+msgstr "BoostC Compiler für PIC16"
+
+#: tools/boost/boostc.h:62
+msgid "BoostC Compiler for PIC18"
+msgstr "BoostC Compiler für PIC18"
+
+#: tools/boost/boostcpp.h:51
+msgid "BoostC++ Compiler for PIC16"
+msgstr "BoostC++ Compiler für PIC16"
+
+#: tools/boost/boostcpp.h:62
+msgid "BoostC++ Compiler for PIC18"
+msgstr "BoostC++ Compiler für PIC18"
+
+#: devices/pic/base/pic_protection.cpp:351
+msgid "Boot Block"
+msgstr "Boot Block"
+
+#: devices/pic/base/pic_protection.cpp:350
+#, fuzzy
+msgid "Boot Segment"
+msgstr "Zu wenige übergebene Argumente."
+
+#: devices/pic/base/pic_config.cpp:125
+msgid "Boot block size"
+msgstr "Boot Block Größe"
+
+#: devices/pic/base/pic_config.cpp:23
+msgid "Boot code-protection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:233
+#, fuzzy
+msgid "Boot segment EEPROM size"
+msgstr "Boot Block Größe"
+
+#: devices/pic/base/pic_config.cpp:234
+msgid "Boot segment RAM size"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:230
+msgid "Boot segment security"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:229
+#, fuzzy
+msgid "Boot segment size"
+msgstr "Boot Block Größe"
+
+#: devices/pic/base/pic_config.cpp:228
+#, fuzzy
+msgid "Boot segment write-protection"
+msgstr "Programmspeicherschutz"
+
+#: devices/pic/base/pic_config.cpp:31
+msgid "Boot table read-protection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:27
+msgid "Boot write-protection"
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:89
+msgid "Bootloader identified device as: %1"
+msgstr ""
+
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:84
+msgid "Bootloader version %1 detected"
+msgstr ""
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:36
+msgid "Bootloader version %1 detected."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:231
+#, fuzzy
+msgid "Breaking..."
+msgstr "Löschen..."
+
+#: piklab-prog/cli_interactive.cpp:161
+#, fuzzy
+msgid "Breakpoint already set at %1."
+msgstr "Unterbrechungspunkt wurde bereits bei %1 gesetzt"
+
+#: piklab-prog/cli_interactive.cpp:201
+#, fuzzy
+msgid "Breakpoint at %1 removed."
+msgstr "Unterbrechungspunkt von %1 entfernt"
+
+#: libgui/gui_debug_manager.cpp:125
+msgid "Breakpoint at non-code line cannot be activated."
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:142
+msgid "Breakpoint at non-code line."
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:147
+msgid "Breakpoint corresponds to several addresses. Using the first one."
+msgstr "Unterbrechungspunkt gilt für mehrere Speicheradressen. Ich nutze den ersten."
+
+#: piklab-prog/cli_interactive.cpp:197
+#, fuzzy
+msgid "Breakpoint index too large."
+msgstr "Unterbrechungspunkt an %1 gesetzt"
+
+#: piklab-prog/cli_interactive.cpp:165
+#, fuzzy
+msgid "Breakpoint set at %1."
+msgstr "Unterbrechungspunkt an %1 gesetzt"
+
+#: libgui/toplevel.cpp:150
+msgid "Breakpoints"
+msgstr "Unterbrechungspunkte"
+
+#: piklab-prog/cli_interactive.cpp:172
+msgid "Breakpoints:"
+msgstr "Unterbrechungspunkte:"
+
+#: devices/pic/base/pic_config.cpp:76
+msgid "Brown-out detect"
+msgstr "Brown-out erkennung"
+
+#: devices/pic/base/pic_config.cpp:89
+msgid "Brown-out reset software"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:84
+msgid "Brown-out reset voltage"
+msgstr ""
+
+#. i18n: file ./data/app_data/piklabui.rc line 76
+#: rc.cpp:24
+#, no-c-format
+msgid "Bu&ild"
+msgstr "Ba&uen"
+
+#: libgui/project_manager.cpp:194
+msgid "Build Project"
+msgstr "Erzeuge Projekt"
+
+#. i18n: file ./data/app_data/piklabui.rc line 155
+#: rc.cpp:45
+#, no-c-format
+msgid "Build Toolbar"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:53
+msgid "Building project..."
+msgstr "Erzeuge Projektdateien..."
+
+#: common/common/purl_base.cpp:26
+msgid "C Compiler"
+msgstr "C Compiler"
+
+#: common/common/purl_base.cpp:39
+msgid "C Header File"
+msgstr "C Headerdatei"
+
+#: common/common/purl_base.cpp:37
+msgid "C Source File"
+msgstr "C Sourcedatei"
+
+#: libgui/toplevel.cpp:193
+msgid "C&lose All"
+msgstr "Sch&ließe alles"
+
+#: common/common/purl_base.cpp:28
+msgid "C++ Compiler"
+msgstr "C++ Compiler"
+
+#: common/common/purl_base.cpp:38
+msgid "C++ Source File"
+msgstr "C++ Sourcedatei"
+
+#: tools/c18/c18.h:42
+msgid "C18 Compiler"
+msgstr "C18 Compiler"
+
+#: devices/pic/base/pic.cpp:77
+msgid "CAN"
+msgstr ""
+
+#: tools/cc5x/cc5x.h:33
+msgid "CC5X Compiler"
+msgstr "CC5X Compiler"
+
+#: devices/pic/base/pic.cpp:71
+msgid "CCP"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:88
+msgid "CCP1 multiplex"
+msgstr "CCP1 multiplex"
+
+#: devices/pic/base/pic_config.cpp:87
+msgid "CCP2 multiplex"
+msgstr "CCP2 multiplex"
+
+#: tools/ccsc/ccsc.h:36 coff/base/coff_object.cpp:38
+msgid "CCS Compiler"
+msgstr "CCS Compiler"
+
+#: common/common/purl_base.cpp:54
+msgid "COD File"
+msgstr "COD Datei"
+
+#: tools/base/generic_tool.cpp:38
+#, fuzzy
+msgid "COFF"
+msgstr "COFF Datei"
+
+#: common/common/purl_base.cpp:55
+msgid "COFF File"
+msgstr "COFF Datei"
+
+#: coff/base/coff.cpp:67 coff/base/coff.cpp:77
+msgid "COFF file is truncated (offset: %1  nbBytes: %2  size:%3)."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:61
+msgid "COFF file to be used for debugging."
+msgstr "COFF-Datei zum Debugging."
+
+#: piklab-coff/main.cpp:279
+#, fuzzy
+msgid "COFF filename."
+msgstr "Dateiname"
+
+#: coff/base/coff_object.cpp:454
+msgid "COFF format not supported: magic number is %1."
+msgstr ""
+
+#: piklab-coff/main.cpp:212
+#, fuzzy
+msgid "COFF type:"
+msgstr "COFF Datei"
+
+#: devices/pic/base/pic_config.cpp:199
+msgid "CPU system clock (divided by)"
+msgstr "CPU Systemtakt (Teilerfaktor)"
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:149
+msgid "CRC error from bootloader: retrying..."
+msgstr ""
+
+#: devices/base/hex_buffer.cpp:142
+msgid "CRC mismatch (line %1)."
+msgstr ""
+
+#: devices/pic/base/pic.cpp:26 progs/gui/prog_group_ui.cpp:92
+msgid "Calibration"
+msgstr "Kalibrierung"
+
+#: devices/pic/base/pic.cpp:33
+msgid "Calibration Backup"
+msgstr "Sicherung der Kalibrierung"
+
+#: devices/pic/base/pic_config.cpp:22
+msgid "Calibration code-protection"
+msgstr ""
+
+#: progs/pickit2/base/pickit_prog.cpp:46
+msgid "Calibration firmware file seems incompatible with selected device %1."
+msgstr ""
+
+#: devices/pic/base/pic.cpp:239
+msgid "Calibration word at address %1 is blank."
+msgstr ""
+
+#: devices/pic/base/pic.cpp:245
+msgid "Calibration word is not a compatible opcode (%2)."
+msgstr ""
+
+#: tools/list/compile_manager.cpp:65
+msgid "Cannot build empty project."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:406
+msgid "Cannot erase ROM or EPROM device."
+msgstr "Kann ROM oder EPROM Bauteile nicht löschen."
+
+#: devices/pic/prog/pic_prog.cpp:446
+msgid "Cannot erase protected code memory. Consider erasing the whole chip."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:450
+msgid "Cannot erase protected data EEPROM. Consider erasing the whole chip."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:464
+msgid "Cannot erase specified range because of programmer limitations."
+msgstr ""
+
+#: libgui/project_manager.cpp:420
+msgid "Cannot open without device specified."
+msgstr "Kann ohne angegebenes Bauteil nicht öffnen."
+
+#: devices/pic/prog/pic_prog.cpp:526
+msgid "Cannot read ROMless device."
+msgstr "Kann ROM-lose Bauteile nicht auslesen."
+
+#: progs/pickit2/base/pickit2.cpp:116
+msgid "Cannot read voltages with this firmware version."
+msgstr "Kann Spannungen in dieser Firmwareversion nicht messen."
+
+#: libgui/gui_debug_manager.cpp:242
+msgid "Cannot show disassembly location for non-code line."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:250
+msgid "Cannot specify range without specifying device."
+msgstr "Kann ohne angegebenes Bauteil den Bereich nicht feststellen."
+
+#: progs/manager/debug_manager.cpp:387
+msgid "Cannot start debugging session without input file (%1)."
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:372
+msgid "Cannot start debugging session without input file (not specified)."
+msgstr ""
+
+#: libgui/gui_prog_manager.cpp:34
+msgid "Cannot start debugging without a COFF file. Please compile the project."
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:138
+msgid "Cannot toggle target power since target is self-powered."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:606
+msgid "Cannot write ROM or ROMless device."
+msgstr "Kann ROM und ROM-lose Bauteile nicht beschreiben."
+
+#: coff/base/cdb_parser.cpp:33 coff/base/coff_object.cpp:160
+#, fuzzy
+msgid "Char"
+msgstr "&säubern"
+
+#: piklab-hex/main.cpp:25
+msgid "Check hex file for correctness (if a device is specified, check if hex file is compatible with it)."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:41
+msgid "Check this box to change DATA buffer direction."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:26 progs/direct/base/direct.cpp:29
+#: progs/direct/base/direct.cpp:32 progs/direct/base/direct.cpp:35
+msgid "Check this box to turn voltage on/off for this pin."
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:27
+msgid "Check this option if your hardware uses negative logic for this pin."
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:98
+msgid "Checksum Mask:"
+msgstr "Prüfsummenmaske:"
+
+#: piklab-hex/main.cpp:178
+msgid "Checksum computation is experimental and is not always correct!"
+msgstr ""
+
+#: piklab-hex/main.cpp:180 libgui/hex_editor.cpp:189
+msgid "Checksum: %1"
+msgstr "Prüfsumme: %1"
+
+#: libgui/toplevel.cpp:250
+msgid "Clean"
+msgstr "Leer"
+
+#: libgui/project_manager.cpp:195
+msgid "Clean Project"
+msgstr "Leere Projekt"
+
+#: piklab-hex/main.cpp:27
+msgid "Clean hex file and fix errors (wrong CRC, truncated line, truncated file)."
+msgstr ""
+
+#: libgui/toplevel.cpp:302
+msgid "Clear All Breakpoints"
+msgstr "Entferne alle Unterbrechungspunkte"
+
+#: piklab-prog/cli_interactive.cpp:47
+msgid "Clear a breakpoint \"clear 0\", \"clear e 0x04\", or clear all breakpoints \"clear all\"."
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:265
+msgid "Clear all watching"
+msgstr ""
+
+#: progs/direct/base/direct.cpp:30
+msgid "Clock"
+msgstr "Takt"
+
+#: progs/direct/gui/direct_config_widget.cpp:68
+msgid "Clock delay"
+msgstr "Taktverzögerung"
+
+#: devices/pic/base/pic_config.cpp:264
+#, fuzzy
+msgid "Clock output"
+msgstr "(Ausgang)"
+
+#: devices/pic/base/pic_config.cpp:136
+msgid "Clock switching mode"
+msgstr ""
+
+#: libgui/editor_manager.cpp:403 libgui/toplevel.cpp:195
+msgid "Close All Others"
+msgstr "Schließe alle anderen"
+
+#: libgui/toplevel.cpp:236
+msgid "Close Project"
+msgstr "Projekt beenden"
+
+#: progs/gui/hardware_config_widget.cpp:91
+msgid "Closing will discard changes you have made. Close anyway?"
+msgstr "Schließen macht alle Änderungen rückgängig. Trotzdem schließen?"
+
+#: coff/base/cdb_parser.cpp:50 coff/base/coff_object.cpp:332
+msgid "Code"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:51
+#, fuzzy
+msgid "Code / Static Segment"
+msgstr "Zu wenige übergebene Argumente."
+
+#: coff/base/cdb_parser.cpp:26
+#, fuzzy
+msgid "Code Pointer"
+msgstr "Programmspeicher"
+
+#: devices/pic/base/pic_config.cpp:20
+msgid "Code code-protection"
+msgstr ""
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:53
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:163
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:111
+msgid "Code is present in bootloader reserved area (at address %1). It will be ignored."
+msgstr ""
+
+#: devices/pic/base/pic.cpp:25
+msgid "Code memory"
+msgstr "Programmspeicher"
+
+#: devices/pic/base/pic_config.cpp:96
+msgid "Code protected microcontroller"
+msgstr "Passwortgeschützter Mikrokontroller"
+
+#: devices/pic/gui/pic_memory_editor.cpp:77
+#, fuzzy
+msgid "Code protection"
+msgstr "Programmspeicherschutz"
+
+#: devices/pic/base/pic_config.cpp:25
+msgid "Code write-protection"
+msgstr "Programmspeicherschutz"
+
+#: coff/base/coff_object.cpp:286 coff/base/coff_object.cpp:299
+msgid "Codeline has unknown symbol: %1"
+msgstr ""
+
+#: coff/base/coff_object.cpp:290 coff/base/coff_object.cpp:303
+msgid "Codeline is an auxiliary symbol: %1"
+msgstr ""
+
+#: piklab-coff/main.cpp:128
+#, fuzzy
+msgid "Command not available for COFF of type Archive."
+msgstr "Hex-Dateiname wurde nicht angegeben."
+
+#: piklab-coff/main.cpp:204
+msgid "Command not available for COFF of type Object."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:453
+msgid "Command-line programmer/debugger."
+msgstr "Programmiergerät/Debugger mit eigenem Befehlssatz."
+
+#: piklab-hex/main.cpp:287
+msgid "Command-line utility to manipulate hex files."
+msgstr ""
+
+#: piklab-coff/main.cpp:278
+msgid "Command-line utility to view COFF files."
+msgstr ""
+
+#: libgui/likeback.cpp:659
+msgid "Comment Sent"
+msgstr "Kommentar wurde gesendet"
+
+#: devices/base/generic_device.cpp:33
+msgid "Commercial"
+msgstr "Kommerzielle Qualität"
+
+#: piklab-hex/main.cpp:28
+msgid "Compare two hex files."
+msgstr "Vergleiche zwei Hex-Dateien."
+
+#: progs/direct/base/direct_prog_config.cpp:83
+msgid "Compatible with ET-CAB10PIN V2 programmer shipped by Futurlec, with their PIC16F877 controler board."
+msgstr ""
+
+#: libgui/toplevel.cpp:138
+msgid "Compile Log"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:17 common/common/purl_base.cpp:21
+msgid "Compiler"
+msgstr "Compiler"
+
+#: tools/base/generic_tool.cpp:17
+msgid "Compiler:"
+msgstr "Compiler:"
+
+#: tools/list/compile_manager.cpp:29
+msgid "Compiling file..."
+msgstr "Compiliere Datei..."
+
+#: coff/base/coff_object.cpp:326
+#, fuzzy
+msgid "Config"
+msgstr "Modellauswahl:"
+
+#: libgui/config_gen.cpp:145
+msgid "Config Generator"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:51
+msgid "Config Word Details"
+msgstr ""
+
+#: common/port/usb_port.cpp:242
+msgid "Configuration %1 not present: using %2"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:29
+msgid "Configuration Bits"
+msgstr ""
+
+#: coff/base/disassembler.cpp:282
+msgid "Configuration bits: adapt to your setup and needs"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:28
+msgid "Configuration write-protection"
+msgstr ""
+
+#: tools/gui/tool_config_widget.cpp:37
+msgid "Configuration:"
+msgstr "Einstellungen:"
+
+#: libgui/toplevel_ui.cpp:40
+msgid "Configure Compilation..."
+msgstr ""
+
+#: libgui/config_center.cpp:113
+msgid "Configure Piklab"
+msgstr "Konfiguriere Piklab"
+
+#: libgui/toplevel_ui.cpp:39
+msgid "Configure Toolchain..."
+msgstr "Konfiguriere Arbeitskette..."
+
+#: tools/gui/toolchain_config_center.cpp:24
+msgid "Configure Toolchains"
+msgstr "Konfiguriere Arbeitskette"
+
+#: libgui/toplevel.cpp:320
+msgid "Configure Toolchains..."
+msgstr "Konfiguriere Arbeitsketten..."
+
+#: libgui/toplevel.cpp:346
+msgid "Configure email..."
+msgstr "Einstellung der email..."
+
+#: libgui/project_manager.cpp:186 libgui/toplevel_ui.cpp:22
+#: libgui/likeback.cpp:89
+msgid "Configure..."
+msgstr "Einstellungen..."
+
+#: piklab-prog/cmdline.cpp:35
+msgid "Connect programmer."
+msgstr "Verbinde mit Programmiergerät."
+
+#: progs/gui/hardware_config_widget.cpp:61
+msgid "Connected"
+msgstr "Verbunden"
+
+#: devices/pic/base/pic_config.cpp:224
+#, fuzzy
+msgid "Connected to EMB"
+msgstr "Verbunden"
+
+#: progs/base/generic_prog.cpp:108
+msgid "Connected."
+msgstr "Verbunden."
+
+#: progs/base/generic_prog.cpp:81
+msgid "Connecting %1 on %2 with device %3..."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:75
+msgid "Connecting %1 with device %2..."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:89
+msgid "Connecting..."
+msgstr "Verbinde..."
+
+#: progs/gui/prog_config_center.cpp:92
+msgid "Connection: Error"
+msgstr "Verbindung: Fehler"
+
+#: progs/gui/prog_config_center.cpp:92
+msgid "Connection: Ok"
+msgstr "Verbindung: Erfolg"
+
+#: tools/pic30/pic30_generator.cpp:51
+msgid "Constants in program space"
+msgstr "Konstanten im Programmspeicher"
+
+#: libgui/toplevel.cpp:905
+msgid "Continue Anyway"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:284
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:86
+msgid "Continue with the specified device name: \"%1\"..."
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:81
+msgid "Continuously send 0xA55A on \"Data out\" pin."
+msgstr ""
+
+#: libgui/project_manager.cpp:314
+msgid "Copy and Add"
+msgstr ""
+
+#: libgui/config_gen.cpp:66
+msgid "Copy to clipboard"
+msgstr "Kopiere in die Zwischenablage"
+
+#: libgui/project_manager.cpp:325
+msgid "Copying file to project directory failed."
+msgstr "Kopieren der Datei in das Projektverzeichnis gescheitert."
+
+#: common/port/usb_port.cpp:259
+msgid "Could not claim USB interface %1"
+msgstr "Kann USB-Anschluß %1 nicht einbinden"
+
+#: common/port/parallel.cpp:173
+msgid "Could not claim device \"%1\": check it is read/write enabled"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:121
+msgid "Could not connect programmer."
+msgstr "Kann keine Verbindung zum Programmiergerät herstellen."
+
+#: progs/psp/base/psp_serial.cpp:40
+msgid "Could not contact Picstart+"
+msgstr "Kann Picstart+ nicht erreichen"
+
+#: common/gui/purl_ext.cpp:31
+msgid "Could not copy file"
+msgstr "Kann Datei nicht kopieren"
+
+#: common/gui/purl_ext.cpp:108
+msgid "Could not create directory"
+msgstr "Kann Verzeichnis nicht erstellen"
+
+#: common/gui/purl_ext.cpp:52
+msgid "Could not create file"
+msgstr "Kann Datei nicht erstellen"
+
+#: common/gui/pfile_ext.cpp:24 common/gui/pfile_ext.cpp:109
+msgid "Could not create temporary file."
+msgstr "Kann temporäre Datei nicht erstellen."
+
+#: common/gui/purl_ext.cpp:75
+msgid "Could not delete file."
+msgstr "Kann Datei nicht löschen."
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:35
+msgid "Could not detect \"gpsim\" version"
+msgstr ""
+
+#: progs/direct/base/direct_mem24.cpp:51
+msgid "Could not detect EEPROM"
+msgstr "Kann EEPROM nicht finden"
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:31
+#, fuzzy
+msgid "Could not detect device in bootloader mode."
+msgstr "Kann Datei nicht löschen."
+
+#: progs/manager/prog_manager.cpp:64 libgui/device_gui.cpp:263
+msgid "Could not detect supported devices for \"%1\". Please check installation."
+msgstr ""
+
+#: libgui/config_gen.cpp:131
+msgid "Could not detect supported devices for selected toolchain. Please check installation."
+msgstr ""
+
+#: libgui/device_gui.cpp:268
+msgid "Could not detect supported devices for toolchain \"%1\". Please check installation."
+msgstr ""
+
+#: coff/base/coff_object.cpp:567
+#, fuzzy
+msgid "Could not determine processor (%1)."
+msgstr "Kann Fehlerausgabedatei (%1) nicht finden."
+
+#: libgui/console.cpp:30
+msgid "Could not find \"konsolepart\"; please install kdebase."
+msgstr ""
+
+#: common/port/usb_port.cpp:210
+msgid "Could not find USB device (vendor=%1 product=%2)."
+msgstr "Kann USB Gerät nicht finden. (Hersteller=%1 Produkt=%2)."
+
+#: progs/icd2/base/icd2_debug.cpp:155
+msgid "Could not find debug executive file \"%1\"."
+msgstr ""
+
+#: piklab-prog/cli_prog_manager.cpp:28
+msgid "Could not find device \"%1\" as serial or parallel port. Will try to open as serial port."
+msgstr ""
+
+#: tools/mpc/mpc_compile.cpp:40 tools/ccsc/ccsc_compile.cpp:86
+msgid "Could not find error file (%1)."
+msgstr "Kann Fehlerausgabedatei (%1) nicht finden."
+
+#: libgui/project_manager.cpp:307
+msgid "Could not find file."
+msgstr "Kann Datei nicht finden."
+
+#: progs/icd2/base/icd2_prog.cpp:90
+msgid "Could not find firmware file \"%1\" in directory \"%2\"."
+msgstr ""
+
+#: common/port/serial.cpp:329
+msgid "Could not flush device"
+msgstr ""
+
+#: common/port/serial.cpp:165
+msgid "Could not get file descriptor parameters"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:173
+#, fuzzy
+msgid "Could not load hex file \"%1\"."
+msgstr "Kann HEX-Datei (%1) nicht finden."
+
+#: common/port/serial.cpp:198
+msgid "Could not modify file descriptor flags"
+msgstr ""
+
+#: common/port/parallel.cpp:169 common/port/parallel.cpp:179
+msgid "Could not open device \"%1\""
+msgstr ""
+
+#: common/port/serial.cpp:190
+msgid "Could not open device \"%1\" read-write"
+msgstr ""
+
+#: common/gui/pfile_ext.cpp:58 common/cli/cli_pfile.cpp:37
+msgid "Could not open file for reading."
+msgstr ""
+
+#: common/cli/cli_pfile.cpp:19
+msgid "Could not open file for writing."
+msgstr "Kann Datei nicht zum Schreiben öffnen."
+
+#: piklab-prog/cli_interactive.cpp:320
+#, fuzzy
+msgid "Could not open filename \"%1\"."
+msgstr "Kann HEX-Datei (%1) nicht finden."
+
+#: progs/icd2/base/icd2_prog.cpp:100 progs/icd2/base/icd2_debug.cpp:162
+#: progs/pickit2/base/pickit_prog.cpp:35 progs/base/generic_prog.cpp:250
+msgid "Could not open firmware file \"%1\"."
+msgstr ""
+
+#: libgui/project_manager.cpp:531
+msgid "Could not open project file."
+msgstr "Kann Projektdatei nicht öffnen."
+
+#: common/gui/pfile_ext.cpp:63
+msgid "Could not open temporary file."
+msgstr "Kann temporäre Datei nicht öffnen."
+
+#: progs/pickit2/base/pickit_prog.cpp:42
+msgid "Could not read calibration firmware file \"%1\" (%2)."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:168
+#, fuzzy
+msgid "Could not read debug executive file \"%1\": %2."
+msgstr "Kann Datei nicht löschen."
+
+#: progs/pickit2/base/pickit2_prog.cpp:56
+#, fuzzy
+msgid "Could not read firmware hex file \"%1\" (%2)."
+msgstr "Kann Datei nicht finden."
+
+#: progs/icd2/base/icd_prog.cpp:22
+#, fuzzy
+msgid "Could not read firmware hex file \"%1\": %2."
+msgstr "Kann Datei nicht finden."
+
+#: coff/base/coff.cpp:93
+#, fuzzy
+msgid "Could not recognize file (magic number is %1)."
+msgstr "Kann COFF-Datei nicht öffnen."
+
+#: progs/gpsim/base/gpsim.cpp:127
+#, fuzzy
+msgid "Could not recognize gpsim version."
+msgstr "Kann COFF-Datei nicht öffnen."
+
+#: devices/pic/prog/pic_prog.cpp:381
+msgid "Could not restore band gap bits because programmer does not support writing config bits."
+msgstr ""
+
+#: libgui/toplevel.cpp:715
+#, fuzzy
+msgid "Could not run \"kfind\""
+msgstr "Kann Datei nicht finden."
+
+#: libgui/toplevel.cpp:731
+msgid "Could not run \"pikloops\""
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:67
+msgid "Could not save configuration: hardware name is empty."
+msgstr ""
+
+#: common/gui/pfile_ext.cpp:45
+msgid "Could not save file."
+msgstr "Kann Datei nicht speichern."
+
+#: libgui/project_manager.cpp:245
+msgid "Could not save project file \"%1\"."
+msgstr ""
+
+#: common/port/serial.cpp:180
+msgid "Could not set file descriptor parameters"
+msgstr ""
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:34
+msgid "Could not start \"gpsim\""
+msgstr ""
+
+#: common/gui/pfile_ext.cpp:94
+msgid "Could not write to temporary file."
+msgstr ""
+
+#: libgui/new_dialogs.cpp:61
+msgid "Create New File"
+msgstr "Neue Datei erstellen"
+
+#: piklab-hex/main.cpp:30
+#, fuzzy
+msgid "Create an hex file for the specified device."
+msgstr "Disassemblierung für dieses Bauteil nicht unterstützt."
+
+#: libgui/project_wizard.cpp:150
+#, fuzzy
+msgid "Create template source file."
+msgstr "Kann temporäre Datei nicht erstellen."
+
+#: devices/pic/base/pic_config.cpp:46
+msgid "Crystal/resonator"
+msgstr "Quartz/Schwinger"
+
+#: devices/pic/base/pic_config.cpp:47
+msgid "Crystal/resonator, PLL enabled"
+msgstr "Quartz/Schwinger, PLL aktiviert"
+
+#: tools/gui/tool_config_widget.cpp:24 tools/custom/custom.h:21
+msgid "Custom"
+msgstr "Anpassen"
+
+#: tools/gui/tool_config_widget.cpp:109
+msgid "Custom libraries:"
+msgstr "Weitere Bibliotheken:"
+
+#: tools/gui/tool_config_widget.cpp:99
+msgid "Custom options:"
+msgstr "Weitere Optionen:"
+
+#: tools/list/tools_config_widget.cpp:81
+#, fuzzy
+msgid "Custom shell commands:"
+msgstr "Unterstützte Befehle:"
+
+#: devices/pic/prog/pic_prog.cpp:610
+msgid "DEBUG configuration bit is on. Are you sure you want to continue programming the chip?"
+msgstr ""
+
+#: devices/base/generic_device.cpp:61
+#, fuzzy
+msgid "DFN"
+msgstr "DFN-S"
+
+#: devices/base/generic_device.cpp:56
+msgid "DFN-S"
+msgstr "DFN-S"
+
+#: devices/pic/base/pic.cpp:30
+msgid "Data EEPROM"
+msgstr "Daten EEPROM"
+
+#: progs/direct/base/direct.cpp:36
+msgid "Data In"
+msgstr "Daten Ein"
+
+#: progs/direct/base/direct.cpp:33
+msgid "Data Out"
+msgstr "Daten Aus"
+
+#: progs/direct/base/direct.cpp:39
+msgid "Data R/W"
+msgstr "Daten L/S"
+
+#: devices/pic/base/pic_config.cpp:21
+msgid "Data code-protection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:26
+msgid "Data write-protection"
+msgstr ""
+
+#: tools/list/device_info.cpp:33
+msgid "Datasheet"
+msgstr ""
+
+#: progs/icd2/gui/icd2_group_ui.cpp:29
+msgid "Debug Executive"
+msgstr "Debuganweisung"
+
+#: coff/base/coff_object.cpp:125
+msgid "Debug Symbol"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:31
+msgid "Debug Vector"
+msgstr "Debug Vektor"
+
+#. i18n: file ./data/app_data/piklabui.rc line 177
+#: rc.cpp:51
+#, no-c-format
+msgid "Debugger Toolbar"
+msgstr "Debugger Werkzeug"
+
+#: progs/gui/debug_config_center.h:21 progs/gui/debug_config_center.h:22
+msgid "Debugging Options"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:282 piklab-prog/cmdline.cpp:287
+msgid "Debugging is not supported for specified programmer."
+msgstr "Das angegebene Programmiergerät unterstützt kein Debugging."
+
+#: progs/icd2/base/icd2_debug.cpp:275
+msgid "Debugging test successful"
+msgstr "Test für Debugging erfolgreich"
+
+#: common/common/number.cpp:19
+msgid "Decimal"
+msgstr "Dezimal"
+
+#: devices/pic/base/pic_config.cpp:126
+msgid "Dedicated in-circuit port"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:211
+msgid "Default system clock select"
+msgstr ""
+
+#: libgui/project_editor.cpp:36
+#, fuzzy
+msgid "Description:"
+msgstr "Beschreibung"
+
+#: piklab-hex/main.cpp:102 piklab-coff/main.cpp:73
+msgid "Destination file already exists."
+msgstr "Dateiname der angegebenen Datei gibt es bereits."
+
+#: devices/pic/gui/pic_config_word_editor.cpp:116
+msgid "Details..."
+msgstr "Details..."
+
+#: tools/gui/toolchain_config_widget.cpp:190
+msgid "Detected (%1)"
+msgstr "Erkannt (%1)"
+
+#: progs/icd2/base/icd2_debug_specific.cpp:241
+msgid "Detected custom ICD2"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:127
+msgid "Detected ports supported by \"%1\":"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:128
+msgid "Detected ports:"
+msgstr "Erkannte Ports:"
+
+#: tools/gui/toolchain_config_widget.cpp:235
+msgid "Detecting \"%1\"..."
+msgstr "Erkennung \"%1\"..."
+
+#: tools/gui/toolchain_config_widget.cpp:251
+msgid "Detecting ..."
+msgstr "Automatische Erkennung..."
+
+#: libgui/editor_manager.cpp:478 libgui/device_gui.cpp:175
+#: libgui/project_manager_ui.cpp:33
+msgid "Device"
+msgstr "Bauteil"
+
+#: devices/pic/base/pic.cpp:28 coff/base/coff_object.cpp:327
+msgid "Device ID"
+msgstr "Bauteilkennung ID"
+
+#: tools/list/device_info.cpp:21
+#, fuzzy
+msgid "Device Page"
+msgstr "Bauteil"
+
+#: libgui/toplevel.cpp:258
+msgid "Device Power"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:89
+msgid "Device detection:"
+msgstr "Bauteilerkennung:"
+
+#: libgui/device_editor.cpp:66
+msgid "Device guessed from file: %1"
+msgstr "Bauteil erraten an hand von Datei: %1"
+
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:159
+msgid "Device memory does not match hex file (at address 0x%2: reading 0x%3 and expecting 0x%4)."
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:104
+msgid "Device memory does not match hex file (in %1 at address %2: reading %3 and expecting %4)."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:253
+msgid "Device memory doesn't match debug executive (at address %1: reading %2 and expecting %3)."
+msgstr ""
+
+#: devices/mem24/prog/mem24_prog.cpp:42
+msgid "Device memory doesn't match hex file (at address %1: reading %2 and expecting %3)."
+msgstr ""
+
+#: devices/mem24/prog/mem24_prog.cpp:40
+msgid "Device memory is not blank (at address %1: reading %2 and expecting %3)."
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:101
+msgid "Device memory is not blank (in %1 at address %2: reading %3 and expecting %4)."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:253
+msgid "Device not autodetectable: continuing with the specified device name \"%1\"..."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:126
+msgid "Device not in programming"
+msgstr ""
+
+#: piklab-hex/main.cpp:104 piklab-prog/cmdline.cpp:157 piklab-coff/main.cpp:75
+msgid "Device not specified."
+msgstr "Bauteil nicht angegeben."
+
+#: libgui/config_gen.cpp:132
+msgid "Device not supported by the selected toolchain."
+msgstr "Bauteil wird von der Verarbeitungskette nicht unterstützt."
+
+#: libgui/config_gen.cpp:32 libgui/config_center.cpp:66
+#: libgui/project_editor.cpp:46 libgui/project_wizard.cpp:129
+#: coff/base/text_coff.cpp:254
+msgid "Device:"
+msgstr "Bauteil:"
+
+#: devices/pic/base/pic_config.cpp:104
+msgid "Digital"
+msgstr "Digital"
+
+#: devices/pic/base/pic_config.cpp:263
+#, fuzzy
+msgid "Digital I/O"
+msgstr "Digital"
+
+#: coff/base/coff_object.cpp:52
+#, fuzzy
+msgid "Direct"
+msgstr "Verzeichnis:"
+
+#: progs/direct/base/direct_prog.h:59
+msgid "Direct Programmer"
+msgstr ""
+
+#: common/global/about.cpp:87
+msgid "Direct programming for 16F676/630."
+msgstr ""
+
+#: common/global/about.cpp:89
+msgid "Direct programming for 16F73/74/76/77."
+msgstr ""
+
+#: common/global/about.cpp:93
+msgid "Direct programming for 24C EEPROM is inspired from his program \"prog84\"."
+msgstr ""
+
+#: common/global/about.cpp:86
+msgid "Direct programming for PIC18F devices."
+msgstr ""
+
+#: common/global/about.cpp:92
+msgid "Direct programming for dsPICs is inspired from his program \"dspicprg\"."
+msgstr ""
+
+#: libgui/project_wizard.cpp:181
+msgid "Directory does not exists. Create it?"
+msgstr "Verzeichnis existiert nicht. Soll es erstellt werden?"
+
+#: libgui/project_wizard.cpp:176
+msgid "Directory is empty."
+msgstr "Verzeichnis ist leer."
+
+#: libgui/project_wizard.cpp:125
+msgid "Directory:"
+msgstr "Verzeichnis:"
+
+#: libgui/breakpoint_view.cpp:27
+msgid "Disable breakpoint"
+msgstr "Unterbrechungspunkt ausschalten"
+
+#: devices/pic/base/pic_config.cpp:91 devices/pic/base/pic_config.cpp:191
+#: devices/pic/base/pic_config.cpp:215 devices/pic/base/pic_config.cpp:394
+#: devices/pic/base/pic_config.cpp:398
+msgid "Disabled"
+msgstr "Ausgeschalten"
+
+#: devices/pic/base/pic_config.cpp:36
+msgid "Disabled (connected to Vdd)"
+msgstr "Ausgeschalten (an Vdd angeschlossen)"
+
+#: progs/icd2/base/icd2_debug.cpp:215
+msgid "Disabling code program protection for debugging"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:223
+msgid "Disabling code read protection for debugging"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:219
+msgid "Disabling code write protection for debugging"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:211
+msgid "Disabling watchdog timer for debugging"
+msgstr ""
+
+#: libgui/object_view.cpp:139
+msgid "Disassembling content of hex file editor."
+msgstr ""
+
+#: libgui/object_view.cpp:126
+msgid "Disassembling hex file: %1"
+msgstr ""
+
+#: libgui/project_manager.cpp:380
+msgid "Disassembly"
+msgstr "Disassemblierung"
+
+#: libgui/project_manager_ui.cpp:98
+msgid "Disassembly Listing"
+msgstr "Liste der Disassemblierung"
+
+#: libgui/object_view.cpp:120
+msgid "Disassembly not supported for the selected device."
+msgstr "Disassemblierung für dieses Bauteil nicht unterstützt."
+
+#: libgui/object_view.cpp:115
+msgid "Disassembly not supported for the selected toolchain."
+msgstr "Disassemlierung für diese Verarbeitungskette nicht unterstützt."
+
+#: piklab-prog/cli_interactive.cpp:42
+msgid "Disconnect programmer."
+msgstr "Trenne Programmiergerät."
+
+#: progs/manager/prog_manager.cpp:150
+msgid "Disconnecting..."
+msgstr "trenne..."
+
+#: common/cli/cli_main.cpp:55
+msgid "Display all debug messages."
+msgstr "Zeige alle Debugmeldungen an."
+
+#: common/cli/cli_main.cpp:53
+msgid "Display debug messages."
+msgstr "Zeige Debughinweise."
+
+#: common/cli/cli_main.cpp:54
+msgid "Display extra debug messages."
+msgstr "Zeige alle Debughinweise."
+
+#: piklab-prog/cli_interactive.cpp:37
+msgid "Display help."
+msgstr "Hilfe anzeigen."
+
+#: common/cli/cli_main.cpp:56
+msgid "Display low level debug messages."
+msgstr "Zeige alle Debugmeldungen an."
+
+#: piklab-prog/cli_interactive.cpp:33
+msgid "Display the list of available properties."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:36
+msgid "Display the list of memory ranges."
+msgstr "Zeige die Liste der Speicherbereiche an."
+
+#: piklab-prog/cli_interactive.cpp:34
+msgid "Display the list of registers."
+msgstr "Zeige die Liste der Register an."
+
+#: piklab-prog/cli_interactive.cpp:35
+msgid "Display the list of variables."
+msgstr "Zeige die Liste der Variablen an."
+
+#: libgui/likeback.cpp:136
+msgid "Do not Help Anymore"
+msgstr ""
+
+#: libgui/project_wizard.cpp:152
+msgid "Do not add files now."
+msgstr "Noch keine Dateien hinzufügen."
+
+#: libgui/likeback.cpp:603
+msgid "Do not ask for features: your wishes will be ignored."
+msgstr ""
+
+#: common/cli/cli_main.cpp:57
+msgid "Do not display messages."
+msgstr "Keine Mitteilungen anzeigen."
+
+#: progs/gui/hardware_config_widget.cpp:200
+msgid "Do you want to delete custom hardware \"%1\"?"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:678
+msgid "Do you want to overwrite the device calibration with %1?"
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:76
+msgid "Do you want to overwrite this custom hardware \"%1\"?"
+msgstr ""
+
+#: tools/list/device_info.cpp:35
+#, fuzzy
+msgid "Documents"
+msgstr "Argumente:"
+
+#: coff/base/coff_object.cpp:165
+msgid "Double"
+msgstr ""
+
+#: coff/base/coff_object.cpp:148
+msgid "Dummy Entry (end of block)"
+msgstr ""
+
+#: coff/base/coff_object.cpp:154
+msgid "Duplicate Tag"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:78
+msgid "ECAN"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:130
+msgid "ECCP mux"
+msgstr "ECCP mux"
+
+#: devices/mem24/gui/mem24_memory_editor.cpp:41
+msgid "EEPROM Memory"
+msgstr "EEPROM- Speicher"
+
+#: progs/direct/base/direct_mem24.cpp:54
+msgid "EEPROM detected"
+msgstr "EEPROM-Speicher entdeckt"
+
+#: progs/direct/base/direct_prog_config.cpp:72
+msgid "EL Cheapo classic"
+msgstr "EL Cheapo classic"
+
+#: tools/base/generic_tool.cpp:39
+msgid "ELF"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:76
+msgid "EPE Toolkit mk3"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:38
+msgid "EPIC+"
+msgstr "EPIC+"
+
+#: devices/base/generic_device.cpp:27
+msgid "EPROM (OTP)"
+msgstr "EPROM (OTP)"
+
+#: progs/direct/base/direct_prog_config.cpp:80
+msgid "ETT High Vpp"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:82
+msgid "ETT Low Vpp"
+msgstr ""
+
+#: libgui/likeback.cpp:176
+msgid "Each time you have a great or frustrating experience, please click the appropriate hand below the window title-bar, briefly describe what you like or dislike and click Send."
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:36
+msgid "Edit and test hardware"
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:159
+msgid "Edit/Test..."
+msgstr ""
+
+#: common/common/purl_base.cpp:50
+msgid "Elf File"
+msgstr "Elf Datei"
+
+#: libgui/breakpoint_view.cpp:27
+msgid "Enable breakpoint"
+msgstr "Aktiviere Unterbrechungspunkt"
+
+#: devices/pic/base/pic_config.cpp:397
+msgid "Enabled"
+msgstr "Aktiviert"
+
+#: devices/pic/base/pic_config.cpp:77
+msgid "Enabled in run - Disabled in sleep"
+msgstr "Eingeschalten bei Aktivität - Ausgeschalten im Schlafmodus"
+
+#: devices/base/generic_device.cpp:20
+msgid "End Of Life"
+msgstr "Lebensdauer überschritten"
+
+#: coff/base/coff_object.cpp:151
+msgid "End of Structure"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:104
+msgid "End of all code sections"
+msgstr "Ende des Programmspeichers"
+
+#: piklab-prog/cli_interactive.cpp:346
+msgid "End of command file reached."
+msgstr "Ende der Befehlsdatei erreicht."
+
+#: common/nokde/nokde_kcmdlineargs.cpp:861
+msgid "End of options"
+msgstr "Keine weiteren Optionen"
+
+#: piklab-hex/main.cpp:141
+msgid "End:"
+msgstr "Ende:"
+
+#: coff/base/coff_object.cpp:168
+#, fuzzy
+msgid "Enumeration"
+msgstr "Einstellungen:"
+
+#: coff/base/coff_object.cpp:143
+msgid "Enumeration Tag"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:47
+msgid "Erase device memory."
+msgstr "Lösche Bauteilspeicher."
+
+#: progs/psp/base/psp.cpp:342
+msgid "Erase failed"
+msgstr "Löschen fehlgeschlagen"
+
+#: progs/icd1/base/icd1.cpp:155
+msgid "Erase failed (returned value is %1)"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:311
+msgid "Erasing device memory not supported for specified programmer."
+msgstr "Das Löschen des Speichers ist mit dem angegebenen Programmiergerät nicht möglich. "
+
+#: progs/base/generic_prog.cpp:284
+msgid "Erasing done"
+msgstr "Löschung beendet"
+
+#: progs/base/generic_prog.cpp:35 progs/base/generic_prog.cpp:282
+msgid "Erasing..."
+msgstr "Löschen..."
+
+#: common/port/serial.cpp:300
+msgid "Error checking for data in output buffer"
+msgstr ""
+
+#: common/port/serial.cpp:475
+msgid "Error clearing up break"
+msgstr ""
+
+#: libgui/project_wizard.cpp:183
+msgid "Error creating directory."
+msgstr "Fehler! Kann Verzeichnis nicht erstellen."
+
+#: libgui/project_wizard.cpp:246
+#, fuzzy
+msgid "Error creating template file."
+msgstr "Fehler! Kann HEX-Datei nicht lesen."
+
+#: common/port/usb_port.cpp:217 common/port/usb_port.cpp:231
+msgid "Error opening USB device."
+msgstr "Fehler beim Öffnen des USB-Gerätes."
+
+#: common/global/xml_data_file.cpp:29
+#, fuzzy
+msgid "Error opening file: %1"
+msgstr "Fehler beim Öffnen des USB-Gerätes."
+
+#: libgui/object_view.cpp:87
+#, fuzzy
+msgid "Error parsing library:\n"
+msgstr "Fehler! Kann Verzeichnis nicht erstellen."
+
+#: libgui/object_view.cpp:70
+#, fuzzy
+msgid "Error parsing object:\n"
+msgstr "Fehler! Kann COFF-Datei nicht lesen."
+
+#: progs/direct/base/direct_16.cpp:108
+msgid "Error programming %1 at %2."
+msgstr ""
+
+#: common/port/parallel.cpp:231
+msgid "Error reading bit on pin %1"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:238 progs/sdcdb/base/sdcdb_debug.cpp:237
+msgid "Error reading driven state of IO bit: %1"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:225 progs/gpsim/base/gpsim_debug.cpp:231
+#: progs/sdcdb/base/sdcdb_debug.cpp:224 progs/sdcdb/base/sdcdb_debug.cpp:230
+msgid "Error reading driving state of IO bit: %1"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:107 progs/gpsim/base/gpsim_debug.cpp:129
+#: progs/sdcdb/base/sdcdb_debug.cpp:128
+msgid "Error reading register \"%1\""
+msgstr ""
+
+#: progs/sdcdb/base/sdcdb_debug.cpp:106
+msgid "Error reading register \"W\""
+msgstr ""
+
+#: common/port/serial.cpp:409
+msgid "Error reading serial pin %1"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:207 progs/sdcdb/base/sdcdb_debug.cpp:206
+msgid "Error reading state of IO bit: %1"
+msgstr ""
+
+#: common/port/serial.cpp:261 common/port/serial.cpp:274
+msgid "Error receiving data"
+msgstr ""
+
+#: common/port/usb_port.cpp:393
+msgid "Error receiving data (ep=%1 res=%2)"
+msgstr ""
+
+#: common/port/usb_port.cpp:224
+msgid "Error resetting USB device."
+msgstr "Fehler beim Reset des USB-Gerätes."
+
+#: common/global/xml_data_file.cpp:51
+#, fuzzy
+msgid "Error saving file: %1"
+msgstr "Fehler! Kann COFF-Datei nicht lesen."
+
+#: progs/gpsim/base/gpsim.cpp:94
+msgid "Error send a signal to the subprocess."
+msgstr ""
+
+#: common/port/usb_port.cpp:294
+msgid "Error sending control message to USB port."
+msgstr ""
+
+#: common/port/serial.cpp:229
+msgid "Error sending data"
+msgstr ""
+
+#: common/port/usb_port.cpp:359
+msgid "Error sending data (ep=%1 res=%2)"
+msgstr ""
+
+#: common/port/usb_port.cpp:246
+msgid "Error setting USB configuration %1."
+msgstr ""
+
+#: common/port/serial.cpp:367
+msgid "Error setting bit %1 of serial port to %2"
+msgstr ""
+
+#: common/port/parallel.cpp:211
+msgid "Error setting pin %1 to %2"
+msgstr ""
+
+#: common/port/serial.cpp:466
+msgid "Error setting up break"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:148
+msgid "Error uploading firmware."
+msgstr ""
+
+#: common/port/serial.cpp:311
+msgid "Error while draining"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:306 libgui/hex_editor.cpp:150
+msgid "Error while writing file \"%1\"."
+msgstr ""
+
+#: libgui/hex_editor.cpp:133
+msgid "Error(s) reading hex file."
+msgstr "Fehler! Kann HEX-Datei nicht lesen."
+
+#: tools/gputils/gputils_config.cpp:13 tools/c18/c18_config.cpp:12
+msgid "Errors only"
+msgstr "Nur Fehler"
+
+#: devices/pic/base/pic.cpp:79
+#, fuzzy
+msgid "Ethernet"
+msgstr "Erweiterter Bereich"
+
+#: devices/pic/base/pic_config.cpp:210
+msgid "Ethernet LED enable"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:110
+msgid "Even PWM output polarity"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:43
+msgid "Executable"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:52
+msgid "Executable Type:"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:30
+msgid "Executable directory"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:290
+msgid "Executing custom commands..."
+msgstr ""
+
+#: devices/base/generic_device.cpp:35
+msgid "Extended"
+msgstr "Erweiterter Bereich"
+
+#: devices/pic/base/pic_config.cpp:124
+msgid "Extended instruction set"
+msgstr "Verbesserter Befehlsvorrat"
+
+#: devices/pic/base/pic_config.cpp:93
+msgid "Extended microcontroller"
+msgstr "Verbesserter Mikrokontroller"
+
+#: devices/pic/base/pic_config.cpp:35
+msgid "External"
+msgstr "Extern"
+
+#: coff/base/coff_object.cpp:133
+#, fuzzy
+msgid "External Definition"
+msgstr "Externer Widerstand"
+
+#: coff/base/cdb_parser.cpp:53
+#, fuzzy
+msgid "External RAM"
+msgstr "Extern"
+
+#: coff/base/cdb_parser.cpp:27
+#, fuzzy
+msgid "External RAM Pointer"
+msgstr "Externer RC-Schwinger"
+
+#: devices/pic/base/pic_config.cpp:40
+msgid "External RC oscillator"
+msgstr "Externer RC-Schwinger"
+
+#: devices/pic/base/pic_config.cpp:42 devices/pic/base/pic_config.cpp:159
+#: devices/pic/base/pic_config.cpp:185
+msgid "External RC oscillator (no CLKOUT)"
+msgstr "Externer RC-Schwinger (ohne CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:41 devices/pic/base/pic_config.cpp:158
+#: devices/pic/base/pic_config.cpp:184
+msgid "External RC oscillator with CLKOUT"
+msgstr "Externer RC-Schwinger (mit CLKOUT)"
+
+#: coff/base/cdb_parser.cpp:48
+#, fuzzy
+msgid "External Stack"
+msgstr "Externe Takterzeugung"
+
+#: coff/base/coff_object.cpp:130
+#, fuzzy
+msgid "External Symbol"
+msgstr "Extern"
+
+#: devices/pic/base/pic_config.cpp:219
+#, fuzzy
+msgid "External address bus shift"
+msgstr "Externer Widerstand"
+
+#: devices/pic/base/pic_config.cpp:128
+msgid "External bus data wait"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:102
+msgid "External bus data width (in bits)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:49 devices/pic/base/pic_config.cpp:260
+msgid "External clock"
+msgstr "Externe Takterzeugung"
+
+#: devices/pic/base/pic_config.cpp:51 devices/pic/base/pic_config.cpp:153
+#: devices/pic/base/pic_config.cpp:174
+msgid "External clock (no CLKOUT)"
+msgstr "Externer Taktgeber (ohne CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:53
+msgid "External clock (no CLKOUT), PLL enabled"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:156 devices/pic/base/pic_config.cpp:177
+msgid "External clock with 16x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:154 devices/pic/base/pic_config.cpp:175
+msgid "External clock with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:55
+msgid "External clock with 4x PLL (no CLKOUT)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:54
+msgid "External clock with 4x PLL and with CLKOUT"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:155 devices/pic/base/pic_config.cpp:176
+msgid "External clock with 8x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:50 devices/pic/base/pic_config.cpp:152
+#: devices/pic/base/pic_config.cpp:173
+msgid "External clock with CLKOUT"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:52
+msgid "External clock with CLKOUT, PLL enabled"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:56
+msgid "External clock with software controlled 4x PLL (no CLKOUT)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:214
+msgid "External memory bus"
+msgstr "Externer Speicherbus"
+
+#: devices/pic/base/pic_config.cpp:57
+msgid "External resistor"
+msgstr "Externer Widerstand"
+
+#: devices/pic/base/pic_config.cpp:59
+msgid "External resistor (no CLKOUT)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:58
+msgid "External resistor with CLKOUT"
+msgstr ""
+
+#: common/global/log.cpp:27
+msgid "Extra debug messages"
+msgstr "Weitere Debugmeldungen"
+
+#: devices/base/device_group.cpp:295
+msgid "F (MHz)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:120
+msgid "FLTA mux"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:212
+msgid "FOSC1:FOSC0"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:27
+msgid "Fail"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:79
+msgid "Fail-safe clock monitor"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:250
+msgid "Failed"
+msgstr ""
+
+#: libgui/project_manager.cpp:503
+msgid "Failed to create new project file"
+msgstr "Fehler! Kann Projektdatei nicht erstellen."
+
+#: tools/list/compile_manager.cpp:223
+msgid "Failed to execute command: check toolchain configuration."
+msgstr ""
+
+#: tools/list/compile_manager.cpp:277
+msgid "Failed to execute custom command #%1."
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:39 progs/sdcdb/base/sdcdb_debug.cpp:39
+msgid "Failed to halt target: kill process."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:75
+msgid "Failed to halt target: try a reset."
+msgstr ""
+
+#: progs/base/generic_debug.cpp:45
+msgid "Failed to initialize device for debugging."
+msgstr ""
+
+#: progs/icd1/base/icd1.cpp:34 progs/icd2/base/icd2_serial.cpp:43
+msgid "Failed to set port mode to '%1'."
+msgstr ""
+
+#: progs/psp/base/psp.cpp:227
+msgid "Failed to set range"
+msgstr ""
+
+#: progs/gpsim/base/gpsim.cpp:58
+#, fuzzy
+msgid "Failed to start \"gpsim\"."
+msgstr "Bereit für Debugging."
+
+#: progs/icd2/base/icd_prog.cpp:30 progs/pickit2/base/pickit2_prog.cpp:67
+msgid "Failed to upload firmware."
+msgstr "Firmware hochladen fehlgeschlagen."
+
+#: libgui/device_gui.cpp:82
+msgid "Family Tree"
+msgstr "Familienbaum"
+
+#: devices/pic/base/pic_config.cpp:248
+#, fuzzy
+msgid "Fast RC oscillator"
+msgstr "Externer RC-Schwinger"
+
+#: devices/pic/pic/pic_group.cpp:65
+msgid "Features"
+msgstr ""
+
+#: common/gui/purl_gui.cpp:43
+msgid "File \"%1\" already exists. Overwrite ?"
+msgstr ""
+
+#: libgui/editor_manager.cpp:109
+msgid "File \"%1\" already loaded. Reload?"
+msgstr ""
+
+#: libgui/project_manager.cpp:313
+msgid "File \"%1\" is not inside the project directory. Do you want to copy the file to your project directory?"
+msgstr ""
+
+#: libgui/device_editor.cpp:74 libgui/editor.cpp:80
+msgid "File %1 not saved."
+msgstr ""
+
+#: coff/base/coff_archive.cpp:115
+#, fuzzy
+msgid "File Members:"
+msgstr "Dateiname:"
+
+#: libgui/new_dialogs.cpp:63
+msgid "File Name:"
+msgstr "Dateiname:"
+
+#: libgui/hex_editor.cpp:142
+msgid "File URL: \"%1\"."
+msgstr "Datei URL:\"%1\"."
+
+#: coff/base/text_coff.cpp:128
+msgid "File could not be read"
+msgstr ""
+
+#: piklab-hex/main.cpp:202
+#, fuzzy
+msgid "File created."
+msgstr "Hex-Dateiformat:"
+
+#: libgui/project_manager.cpp:319
+msgid "File is already in the project."
+msgstr "Datei wird bereits im Projekt verwendet."
+
+#: common/global/xml_data_file.cpp:35
+msgid "File is not of correct type."
+msgstr "Dateityp stimmt nicht mit Datei überein."
+
+#: common/global/pfile.cpp:55
+msgid "File not open."
+msgstr "Datei wurde nicht geöffnet."
+
+#: coff/base/coff_archive.cpp:27
+msgid "File size not terminated by 'l' (\"%1\")."
+msgstr ""
+
+#: tools/list/compile_manager.cpp:111 tools/list/compile_manager.cpp:136
+#: common/gui/pfile_ext.cpp:25 common/gui/pfile_ext.cpp:64
+#: common/gui/pfile_ext.cpp:95 common/gui/pfile_ext.cpp:110
+#: common/cli/cli_pfile.cpp:20 common/cli/cli_pfile.cpp:38
+#: libgui/project_manager.cpp:307 libgui/project_manager.cpp:319
+msgid "File: %1"
+msgstr "Datei: %1"
+
+#: libgui/project_manager.cpp:325 libgui/project_wizard.cpp:246
+msgid "File: %1\n"
+msgstr "Datei: %1\n"
+
+#: libgui/project_wizard.cpp:82 coff/base/coff_object.cpp:152
+msgid "Filename"
+msgstr "Dateiname"
+
+#: piklab-coff/main.cpp:197
+#, fuzzy
+msgid "Files:"
+msgstr "Filter:"
+
+#: piklab-hex/main.cpp:50
+msgid "Fill for checksum verification (cf datasheets)."
+msgstr ""
+
+#: piklab-hex/main.cpp:39
+#, fuzzy
+msgid "Fill option."
+msgstr "Datei wurde nicht geöffnet."
+
+#: piklab-hex/main.cpp:275
+#, fuzzy
+msgid "Fill options:"
+msgstr "%1 Optionen"
+
+#: piklab-hex/main.cpp:48
+msgid "Fill with blank values (default)."
+msgstr ""
+
+#: piklab-hex/main.cpp:278
+msgid "Fill with the specified numeric value."
+msgstr ""
+
+#: piklab-hex/main.cpp:49
+msgid "Fill with zeroes."
+msgstr ""
+
+#: libgui/device_gui.cpp:110
+msgid "Filters:"
+msgstr "Filter:"
+
+#: libgui/project_manager.cpp:192
+#, fuzzy
+msgid "Find Files..."
+msgstr "Datei hinzufügen..."
+
+#: progs/gui/prog_group_ui.cpp:64
+msgid "Firmware"
+msgstr "Firmware"
+
+#: progs/base/generic_prog.cpp:126
+msgid "Firmware directory is not configured or does not exist."
+msgstr "Verzeichnis für die Firmware wurde nicht eingestellt oder existiert nicht."
+
+#: progs/icd2/base/icd2_debug.cpp:142
+msgid "Firmware directory not configured."
+msgstr "Verzeichnis für die Firmware wurde nicht eingestellt."
+
+#: piklab-prog/cli_interactive.cpp:58
+msgid "Firmware directory."
+msgstr "Firmwareverzeichnis."
+
+#: progs/gui/prog_config_widget.cpp:26
+msgid "Firmware directory:"
+msgstr "Firmwareverzeichnis:"
+
+#: progs/icd2/base/icd_prog.cpp:26
+msgid "Firmware hex file seems incompatible with device 16F876 inside ICD."
+msgstr "Firmware-HEX-Datei scheint mit dem Kontroller 16F876 im ICD nicht zu funktionieren."
+
+#: progs/pickit2/base/pickit2_prog.cpp:60
+msgid "Firmware hex file seems incompatible with device 18F2550 inside PICkit2."
+msgstr "Firmware-HEX-Datei scheint mit dem Kontroller 18F2550 im PICkit2 nicht zu funktionieren."
+
+#: progs/pickit2/base/pickit2.cpp:52
+msgid "Firmware memory does not match hex file (at address 0x%2: reading 0x%3 and expecting 0x%4)."
+msgstr ""
+
+#: progs/icd2/base/icd2_prog.cpp:108
+msgid "Firmware still incorrect after uploading."
+msgstr "Firmware nach neuem Upload immernoch nicht passend."
+
+#: progs/pickit2/base/pickit2_prog.cpp:70
+msgid "Firmware succesfully uploaded."
+msgstr "Firmware wurde erfolgreich hochgeladen."
+
+#: progs/gui/prog_group_ui.cpp:147
+msgid "Firmware uploaded successfully."
+msgstr "Firmware wurde erfolgreich hochgeladen."
+
+#: progs/base/generic_prog.cpp:136
+msgid "Firmware version is %1"
+msgstr "Version der Firmware ist %1"
+
+#: piklab-hex/main.cpp:82
+msgid "First hex file: "
+msgstr ""
+
+#: devices/base/generic_device.cpp:26
+#, fuzzy
+msgid "Flash"
+msgstr "Format"
+
+#: libgui/device_gui.cpp:83
+msgid "Flat List"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:36 coff/base/coff_object.cpp:164
+#, fuzzy
+msgid "Float"
+msgstr "Format"
+
+#: devices/gui/memory_editor.cpp:277
+msgid "For checksum check"
+msgstr ""
+
+#: libgui/watch_view.cpp:99 libgui/watch_view.cpp:101
+msgid "Format"
+msgstr "Format"
+
+#: piklab-hex/main.cpp:123 coff/base/text_coff.cpp:252
+msgid "Format:"
+msgstr "Format:"
+
+#: libgui/toplevel.cpp:204
+msgid "Forward"
+msgstr "Vorwärts"
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:36
+msgid "Found version \"%1\""
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:276
+msgid "Frequency range selection for FRC oscillator"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:24 coff/base/coff_object.cpp:179
+msgid "Function"
+msgstr ""
+
+#: coff/base/coff_object.cpp:137
+msgid "Function Argument"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:59
+msgid "Function or Undefined Space"
+msgstr ""
+
+#: devices/base/generic_device.cpp:18
+msgid "Future Product"
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:54
+msgid "GPRs"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.h:76
+msgid "GPSim"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:251 progs/sdcdb/base/sdcdb_debug.cpp:250
+msgid "GPSim (4MHz)"
+msgstr ""
+
+#: tools/gputils/gputils.h:33
+msgid "GPUtils"
+msgstr ""
+
+#: libgui/config_center.h:34 libgui/project_editor.cpp:30
+msgid "General"
+msgstr "Allgemeines"
+
+#: libgui/config_center.h:35
+msgid "General Configuration"
+msgstr "Hauptkonfiguration"
+
+#: piklab-prog/cli_interactive.cpp:251
+msgid "General Purpose Registers:"
+msgstr "General Purpose Register:"
+
+#: devices/pic/base/pic_protection.cpp:358
+#, fuzzy
+msgid "General Segment"
+msgstr "Allgemeines"
+
+#: devices/pic/base/pic_config.cpp:192
+msgid "General code segment read-protection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:193
+msgid "General code segment write-protection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:243
+msgid "General segment security"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:242
+#, fuzzy
+msgid "General segment write-protection"
+msgstr "Programmspeicherschutz"
+
+#: libgui/project_manager_ui.cpp:35
+msgid "Generated"
+msgstr "Erzeugt"
+
+#: libgui/config_gen.cpp:112
+#, fuzzy
+msgid "Generation is not supported yet for the selected toolchain or device."
+msgstr "Bauteil wird von der Verarbeitungskette nicht unterstützt."
+
+#: libgui/config_gen.cpp:126
+#, fuzzy
+msgid "Generation is only partially supported for this device."
+msgstr "Disassemblierung für dieses Bauteil nicht unterstützt."
+
+#: coff/base/cdb_parser.cpp:25
+msgid "Generic Pointer"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:841
+msgid "Generic options"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:41
+msgid "Get property value: \"get <property>\" or \"<property>\"."
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:16
+msgid "Global"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:45
+msgid "Global declarations"
+msgstr ""
+
+#: devices/pic/gui/pic_memory_editor.cpp:44
+msgid "Go to end"
+msgstr "Gehe zum Ende"
+
+#: devices/pic/gui/pic_memory_editor.cpp:41
+msgid "Go to start"
+msgstr "Gehe zum Start"
+
+#: piklab/main.cpp:21
+#, fuzzy
+msgid "Graphical development environment for applications based on PIC and dsPIC microcontrollers."
+msgstr "Piklab - Eine Entwicklungsumgebung für Anwendungen die auf PIC und dsPIC Mikrokontroller basieren."
+
+#: progs/direct/base/direct_prog_config.cpp:51
+msgid "HOODMICRO"
+msgstr "HOODMICRO"
+
+#: devices/pic/base/pic_config.cpp:258
+#, fuzzy
+msgid "HS crystal oscillator"
+msgstr "Externer RC-Schwinger"
+
+#: devices/pic/base/pic_config.cpp:169
+msgid "HS/2 Crystal with 16x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:167
+msgid "HS/2 Crystal with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:168
+msgid "HS/2 Crystal with 8x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:172
+msgid "HS/3 Crystal with 16x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:170
+msgid "HS/3 Crystal with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:171
+msgid "HS/3 Crystal with 8x PLL"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:240
+msgid "Hardcoded (%1)"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:32
+msgid "Hardware Stack"
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:45
+msgid "Hardware name:"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:31
+msgid "Header directory"
+msgstr "Headerverzeichnis"
+
+#: libgui/project_manager_ui.cpp:33
+msgid "Headers"
+msgstr "Header"
+
+#: tools/list/tools_config_widget.cpp:24
+msgid "Help Dialog"
+msgstr "Hilfedialog"
+
+#: libgui/likeback.cpp:184
+msgid "Help Improve the Application"
+msgstr ""
+
+#: libgui/toplevel.cpp:539
+msgid "Hex"
+msgstr "Hex"
+
+#: common/common/purl_base.cpp:49 libgui/project_manager_ui.cpp:97
+msgid "Hex File"
+msgstr "Hex-Datei"
+
+#: piklab-hex/main.cpp:148
+msgid "Hex file cannot be fixed because the format was not recognized or is inconsistent."
+msgstr ""
+
+#: piklab-hex/main.cpp:156
+#, fuzzy
+msgid "Hex file cleaned and fixed."
+msgstr "Hex-Dateiname wurde nicht angegeben."
+
+#: piklab-hex/main.cpp:155
+#, fuzzy
+msgid "Hex file cleaned."
+msgstr "Hex-Dateiformat:"
+
+#: tools/gui/tool_config_widget.cpp:120
+msgid "Hex file format:"
+msgstr "Hex-Dateiformat:"
+
+#: piklab-hex/main.cpp:118
+#, fuzzy
+msgid "Hex file is compatible with device \"%1\"."
+msgstr "Hex-Datei scheint mit dem Bauteil %1 nicht zu funktionieren."
+
+#: piklab-hex/main.cpp:115 piklab-hex/main.cpp:144
+msgid "Hex file is valid."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:175
+#, fuzzy
+msgid "Hex file seems incompatible with device \"%1\"."
+msgstr "Hex-Datei scheint mit dem Bauteil %1 nicht zu funktionieren."
+
+#: piklab-prog/cli_interactive.cpp:60
+#, fuzzy
+msgid "Hex file to be used for programming."
+msgstr "Hex-Datei für Programmierzwecke."
+
+#: piklab-prog/cmdline.cpp:454
+#, fuzzy
+msgid "Hex filename for programming."
+msgstr "Hex-Datei für Programmierzwecke."
+
+#: piklab-prog/cmdline.cpp:161
+#, fuzzy
+msgid "Hex filename not specified."
+msgstr "Hex-Dateiname wurde nicht angegeben."
+
+#: piklab-hex/main.cpp:288
+#, fuzzy
+msgid "Hex filename(s)."
+msgstr "Nicht erkannte Hex-Datei."
+
+#: piklab-prog/cli_interactive.cpp:56
+#, fuzzy
+msgid "Hex output file format."
+msgstr "Ausgabeformat für Hex-Datei."
+
+#: common/common/number.cpp:20
+msgid "Hexadecimal"
+msgstr "Hexadezimal"
+
+#: progs/base/generic_prog.cpp:26
+msgid "High"
+msgstr "Hoch"
+
+#: devices/pic/gui/pic_memory_editor.cpp:77
+#: devices/pic/base/pic_config.cpp:231 devices/pic/base/pic_config.cpp:238
+#, fuzzy
+msgid "High Security"
+msgstr "Höchst"
+
+#: devices/base/generic_device.cpp:42
+#, fuzzy
+msgid "High Voltage"
+msgstr "Spannungen"
+
+#: devices/pic/base/pic_config.cpp:277
+msgid "High range (nominal FRC frequency is 14.1 MHz)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:245
+#, fuzzy
+msgid "High security"
+msgstr "Höchst"
+
+#: devices/pic/base/pic_config.cpp:147 devices/pic/base/pic_config.cpp:162
+msgid "High speed crystal"
+msgstr "Hochfrequenzquartz"
+
+#: devices/pic/base/pic_config.cpp:60
+msgid "High speed crystal/resonator"
+msgstr "Hochfrequenzquartz/resonator"
+
+#: devices/pic/base/pic_config.cpp:62
+msgid "High speed crystal/resonator with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:63
+msgid "High speed crystal/resonator with software controlled 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:61
+#, fuzzy
+msgid "High speed crystal/resonator, PLL enabled"
+msgstr "Hochfrequenzquartz/resonator"
+
+#: devices/pic/base/pic_config.cpp:72
+msgid "Highest"
+msgstr "Höchst"
+
+#: libgui/likeback.cpp:74
+msgid "I Do not Like..."
+msgstr ""
+
+#: libgui/likeback.cpp:81
+msgid "I Found a Bug..."
+msgstr ""
+
+#: libgui/likeback.cpp:67
+msgid "I Like..."
+msgstr ""
+
+#: libgui/toplevel.cpp:338 libgui/likeback.cpp:537
+msgid "I do not like..."
+msgstr ""
+
+#: libgui/toplevel.cpp:342 libgui/likeback.cpp:544
+msgid "I found a bug..."
+msgstr ""
+
+#: libgui/toplevel.cpp:334 libgui/likeback.cpp:530
+msgid "I like..."
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:47
+msgid "I/Os"
+msgstr "E/As"
+
+#: devices/pic/base/pic_config.cpp:273
+#, fuzzy
+msgid "I2C pins selection"
+msgstr "Programmspeicherschutz"
+
+#: devices/pic/base/pic_config.cpp:195
+msgid "ICD communication channel"
+msgstr ""
+
+#: progs/icd1/base/icd1_prog.h:44
+msgid "ICD1 Programmer"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.h:76
+msgid "ICD2 Debugger"
+msgstr ""
+
+#: progs/icd2/base/icd2_prog.h:76
+msgid "ICD2 Programmer"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:179
+msgid "INT pin interrupt service routine"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:213
+msgid "INTRC"
+msgstr ""
+
+#: devices/pic/pic/pic_group.cpp:55
+msgid "IO Ports"
+msgstr "EA Ports"
+
+#: libgui/likeback.cpp:179
+msgid "Icons description:"
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:85
+msgid "Id returned by bootloader corresponds to other devices: %1 (%2 read and %3 expected)."
+msgstr ""
+
+#: progs/icd2/gui/icd2_group_ui.cpp:21
+msgid "Id:"
+msgstr ""
+
+#: devices/base/generic_device.cpp:17
+msgid "In Production"
+msgstr "In Produktion"
+
+#: devices/pic/prog/pic_prog_specific.cpp:19
+msgid "In Programming"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:82
+msgid "In-circuit debugger"
+msgstr ""
+
+#: common/common/purl_base.cpp:36
+msgid "Include File"
+msgstr ""
+
+#: tools/gui/tool_config_widget.h:57
+msgid "Include directories:"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:35
+msgid "Included"
+msgstr ""
+
+#: progs/psp/base/psp_serial.cpp:59
+msgid "Incorrect ack: expecting %1, received %2"
+msgstr ""
+
+#: progs/psp/base/psp_serial.cpp:67
+msgid "Incorrect received data end: expecting 00, received %1"
+msgstr ""
+
+#: coff/base/coff_object.cpp:54
+msgid "Indentifier"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:63
+msgid "Index:"
+msgstr ""
+
+#: devices/base/generic_device.cpp:34
+msgid "Industrial"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:107
+#, fuzzy
+msgid "Information:"
+msgstr "Einstellungen:"
+
+#: devices/pic/base/pic_config.cpp:247
+msgid "Initial oscillator source"
+msgstr ""
+
+#: coff/base/coff_object.cpp:330
+msgid "Initialized Data"
+msgstr ""
+
+#: coff/base/coff_object.cpp:122
+#, fuzzy
+msgid "Inside Section"
+msgstr "Programmspeicherschutz"
+
+#: coff/base/cdb_parser.cpp:32 coff/base/coff_object.cpp:162
+msgid "Int"
+msgstr ""
+
+#: common/cli/cli_main.cpp:69
+msgid "Interactive mode"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:228
+msgid "Interactive mode: type help for help"
+msgstr ""
+
+#: common/port/usb_port.cpp:255
+msgid "Interface %1 not present: using %2"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:54
+#, fuzzy
+msgid "Internal RAM"
+msgstr "Extern"
+
+#: coff/base/cdb_parser.cpp:28
+#, fuzzy
+msgid "Internal RAM Pointer"
+msgstr "Externer RC-Schwinger (mit CLKOUT)"
+
+#: coff/base/cdb_parser.cpp:49
+#, fuzzy
+msgid "Internal Stack"
+msgstr "Externe Takterzeugung"
+
+#: devices/pic/base/pic_config.cpp:73
+msgid "Internal Trim"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:141
+msgid "Internal fast RC"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:249
+#, fuzzy
+msgid "Internal fast RC oscillator"
+msgstr "Externer RC-Schwinger (mit CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:182
+msgid "Internal fast RC oscillator (no PLL)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:180
+msgid "Internal fast RC oscillator with 16x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:178
+msgid "Internal fast RC oscillator with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:157 devices/pic/base/pic_config.cpp:179
+msgid "Internal fast RC oscillator with 8x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:250
+#, fuzzy
+msgid "Internal fast RC oscillator with PLL"
+msgstr "Externer RC-Schwinger (mit CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:255
+#, fuzzy
+msgid "Internal fast RC oscillator with postscaler"
+msgstr "Externer RC-Schwinger (mit CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:142
+msgid "Internal low-power RC"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:183
+msgid "Internal low-power RC oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:43
+msgid "Internal oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:45
+msgid "Internal oscillator (no CLKOUT)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:205
+msgid "Internal oscillator speed"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:44
+msgid "Internal oscillator with CLKOUT"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:65
+msgid "Internal oscillator, HS used by USB"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:64
+msgid "Internal oscillator, XT used by USB"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:80
+msgid "Internal-external switchover"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:332
+msgid "Invalid begin or end character for read block."
+msgstr ""
+
+#: progs/psp/base/psp.cpp:185
+msgid "Invalid firmware version"
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:48
+msgid "Inverted"
+msgstr "Invertiert"
+
+#: libgui/toplevel.cpp:938
+msgid "It is not possible to start a debugging session with an hex file not generated with the current project."
+msgstr ""
+
+#: progs/icd2/base/icd2_prog.cpp:38
+msgid "It is not recommended to power dsPICs from ICD. Continue anyway?"
+msgstr "Es wird davon abgeraten dsPICs mit dem Strom vom ICD zu versorgen. Trotzdem Fortfahren?"
+
+#: libgui/likeback.cpp:395
+msgid "It will only be used to contact you back if more information is needed about your comments, how to reproduce the bugs you report, send bug corrections for you to test..."
+msgstr ""
+
+#: devices/pic/base/pic.cpp:44
+msgid "J"
+msgstr ""
+
+#: tools/jal/jal.h:32
+msgid "JAL"
+msgstr "JAL"
+
+#: common/common/purl_base.cpp:27
+msgid "JAL Compiler"
+msgstr "JAL Compiler"
+
+#: common/common/purl_base.cpp:40
+msgid "JAL File"
+msgstr "JAL Datei"
+
+#: tools/jalv2/jalv2.h:32
+msgid "JAL V2"
+msgstr "JAL V2"
+
+#: progs/direct/base/direct_prog_config.cpp:41
+msgid "JDM classic"
+msgstr "JDM classic"
+
+#: progs/direct/base/direct_prog_config.cpp:43
+msgid "JDM classic (delay 10)"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:45
+msgid "JDM classic (delay 20)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:268
+#, fuzzy
+msgid "JTAG port enabled"
+msgstr " Keinen Port erkannt"
+
+#: devices/pic/base/pic.cpp:45
+msgid "K"
+msgstr ""
+
+#: libgui/toplevel.cpp:156
+msgid "Konsole"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:80
+msgid "LCD"
+msgstr ""
+
+#: common/global/about.cpp:81
+msgid "LPLAB author (original microchip programmer support)."
+msgstr ""
+
+#: coff/base/coff_object.cpp:134
+#, fuzzy
+msgid "Label"
+msgstr "Oktal"
+
+#: tools/base/generic_tool.cpp:21
+#, fuzzy
+msgid "Librarian"
+msgstr "Kalibrierung"
+
+#: tools/base/generic_tool.cpp:21
+msgid "Librarian:"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:44
+#, fuzzy
+msgid "Library"
+msgstr "Binärdatei"
+
+#: tools/base/generic_tool.cpp:33
+msgid "Library Directory"
+msgstr ""
+
+#: common/common/purl_base.cpp:44
+msgid "Library File"
+msgstr ""
+
+#: coff/base/coff_object.cpp:153
+msgid "Line Number"
+msgstr ""
+
+#: libgui/text_editor.cpp:170
+msgid "Line: %1  Col: %2"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:19
+msgid "Linker"
+msgstr "Linker"
+
+#: common/common/purl_base.cpp:46 libgui/project_manager.cpp:165
+#: libgui/project_manager_ui.cpp:33
+msgid "Linker Script"
+msgstr "Linker Script"
+
+#: tools/base/generic_tool.cpp:32
+msgid "Linker Script Directory"
+msgstr "Linker Script Verzeichnis"
+
+#: common/common/purl_base.cpp:47
+#, fuzzy
+msgid "Linker Script for PIC30"
+msgstr "Linker Script"
+
+#: tools/base/generic_tool.cpp:19
+#, fuzzy
+msgid "Linker:"
+msgstr "Linker"
+
+#: libgui/project_manager_ui.cpp:99
+msgid "List"
+msgstr "Liste"
+
+#: common/common/purl_base.cpp:52
+msgid "List File"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:18
+#, fuzzy
+msgid "Local"
+msgstr "Oktal"
+
+#: libgui/breakpoint_view.cpp:48
+msgid "Location"
+msgstr ""
+
+#: libgui/new_dialogs.cpp:32
+msgid "Location:"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:31 coff/base/coff_object.cpp:163
+#, fuzzy
+msgid "Long"
+msgstr "auf"
+
+#: coff/base/coff_object.cpp:174
+msgid "Long Double"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:25
+msgid "Low"
+msgstr ""
+
+#: devices/base/generic_device.cpp:40
+msgid "Low Power"
+msgstr ""
+
+#: devices/base/generic_device.cpp:41
+msgid "Low Voltage"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:74
+msgid "Low Voltage Detect"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:254
+#, fuzzy
+msgid "Low power RC oscillator"
+msgstr "Externer RC-Schwinger"
+
+#: devices/pic/base/pic_config.cpp:48
+msgid "Low power crystal"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:116
+msgid "Low power in sleep mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:278
+msgid "Low range (nominal FRC frequency is 9.7 MHz)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:86
+msgid "Low voltage programming"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:181
+msgid "Low-power 32 kHz oscillator (TMR1 oscillator)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:123
+msgid "Low-power timer1 oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:146 devices/pic/base/pic_config.cpp:161
+msgid "Low-power/low-frequency crystal"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:52
+#, fuzzy
+msgid "Lower-128-byte Internal RAM"
+msgstr "Extern"
+
+#: devices/pic/base/pic_config.cpp:69
+msgid "Lowest"
+msgstr ""
+
+#: progs/direct/base/direct.cpp:24
+msgid "MCLR (Vpp)"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:52
+msgid "MCLR Vdd"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:52
+msgid "MCLR Vpp"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:51
+msgid "MCLR ground"
+msgstr ""
+
+#: devices/base/generic_device.cpp:60
+msgid "MLF"
+msgstr ""
+
+#: tools/mpc/mpc.h:32
+msgid "MPC Compiler"
+msgstr "MPC Compiler"
+
+#: progs/base/generic_prog.cpp:141 progs/base/generic_prog.cpp:149
+#: progs/base/generic_prog.cpp:157
+msgid "MPLAB %1"
+msgstr ""
+
+#: devices/base/generic_device.cpp:55
+msgid "MQFP"
+msgstr ""
+
+#: devices/base/generic_device.cpp:50
+msgid "MSOP"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:220
+msgid "MSSP address select bit"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:138
+msgid "Macros"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:38
+msgid "Magic number: %1"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:109
+msgid "Malformed record: "
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:220
+msgid "Malformed string received \"%1\""
+msgstr ""
+
+#: common/common/purl_base.cpp:53
+msgid "Map File"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:204
+msgid "Master clear pull-up resistor"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:34
+msgid "Master clear reset"
+msgstr ""
+
+#: devices/base/generic_device.cpp:22
+msgid "Mature"
+msgstr ""
+
+#: common/global/log.cpp:28
+msgid "Max debug messages"
+msgstr "Alle Debugmeldungen"
+
+#: coff/base/coff_object.cpp:169
+msgid "Member Of Enumeration"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:19
+msgid "Member name not terminated by '/' (\"%1\")."
+msgstr ""
+
+#: coff/base/coff_object.cpp:144
+#, fuzzy
+msgid "Member of Enumeration"
+msgstr "Hauptkonfiguration"
+
+#: coff/base/coff_object.cpp:136
+msgid "Member of Structure"
+msgstr ""
+
+#: coff/base/coff_object.cpp:139
+msgid "Member of Union"
+msgstr ""
+
+#: libgui/device_gui.cpp:408 libgui/project_manager_ui.cpp:100
+msgid "Memory Map"
+msgstr ""
+
+#: devices/mem24/mem24/mem24_group.cpp:22
+msgid "Memory Size"
+msgstr "Speichergröße"
+
+#: devices/pic/pic/pic_group.cpp:27
+msgid "Memory Type"
+msgstr "Speicherart"
+
+#: progs/icd2/base/icd2_debug.cpp:237
+msgid "Memory area for debug executive was not empty. Overwrite it and continue anyway..."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:83
+msgid "Memory parity error"
+msgstr "Speicherparitätsfehler"
+
+#: piklab-prog/cmdline.cpp:254
+msgid "Memory range not present on this device."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:258
+msgid "Memory range not recognized."
+msgstr "Speicherbereich wurde nicht erkannt."
+
+#: piklab-prog/cmdline.cpp:57
+msgid "Memory range to operate on."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:259
+#, fuzzy
+msgid "Memory ranges are not supported for the specified device."
+msgstr "Disassemblierung für dieses Bauteil nicht unterstützt."
+
+#: piklab-prog/cmdline.cpp:148
+msgid "Memory ranges for PIC/dsPIC devices:"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:94
+msgid "Microcontroller"
+msgstr "Mikrocontroller"
+
+#: devices/pic/base/pic_config.cpp:95
+msgid "Microprocessor"
+msgstr "Mikroprozessor"
+
+#: devices/pic/base/pic_config.cpp:97
+msgid "Microprocessor with boot block"
+msgstr "Mikroprozessor mit boot Block"
+
+#: devices/pic/base/pic_config.cpp:71
+msgid "Mid/High"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:70
+msgid "Mid/Low"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:52
+msgid "Midrange Family"
+msgstr ""
+
+#: devices/pic/base/pic_register.cpp:76
+msgid "Mirror of %1"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:260
+msgid "Missing or incorrect device (Read id is %1)."
+msgstr "Falsches oder fehlendes Bauteil (Gelesene ID ist %1)."
+
+#: progs/icd2/base/icd2.cpp:51
+msgid "Module Vpp"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:74
+msgid "Monty-Robot programmer"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:82
+msgid "Motion Feeback"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:81
+msgid "Motor Control"
+msgstr ""
+
+#: common/gui/editlistbox.cpp:147
+msgid "Move &Down"
+msgstr ""
+
+#: common/gui/editlistbox.cpp:142
+msgid "Move &Up"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:70
+msgid "Myke's EL Cheapo"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:58 libgui/project_editor.cpp:32
+#: libgui/project_wizard.cpp:120
+msgid "Name:"
+msgstr "Name:"
+
+#: libgui/project_manager.cpp:218
+msgid "New File..."
+msgstr "Datei Neu..."
+
+#: coff/base/coff.cpp:29 coff/base/coff_object.cpp:36
+msgid "New Microchip"
+msgstr ""
+
+#: libgui/project_manager.cpp:181 libgui/toplevel.cpp:226
+msgid "New Project..."
+msgstr "Neues Projekt..."
+
+#: libgui/project_wizard.cpp:158
+#, fuzzy
+msgid "New Project: Add Files"
+msgstr "Projektdateien"
+
+#: libgui/project_wizard.cpp:117
+#, fuzzy
+msgid "New Project: Basic Settings"
+msgstr "Projektdateien"
+
+#: libgui/project_wizard.cpp:147
+#, fuzzy
+msgid "New Project: Source Files"
+msgstr "Projektdateien"
+
+#: libgui/project_manager.cpp:197
+msgid "New Source File..."
+msgstr "Neue Sourcedatei..."
+
+#: libgui/toplevel.cpp:184
+#, fuzzy
+msgid "New hex File..."
+msgstr "Datei Neu..."
+
+#: progs/gui/hardware_config_widget.cpp:159
+#, fuzzy
+msgid "New/Test..."
+msgstr "Neues Projekt..."
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:180
+msgid "No \"goto\" instruction in the first four instructions."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:261
+#, fuzzy
+msgid "No COFF file specified."
+msgstr "Hex-Dateiname wurde nicht angegeben."
+
+#: piklab-prog/cli_interactive.cpp:171
+#, fuzzy
+msgid "No breakpoint set."
+msgstr "Kein Unterbrechungspunkt gesetzt"
+
+#: common/cli/cli_main.cpp:27
+msgid "No command specified"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:286
+msgid "No custom commands specified."
+msgstr ""
+
+#: common/global/log.cpp:25
+msgid "No debug message"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:98
+#, fuzzy
+msgid "No device selected."
+msgstr "Bauteil nicht angegeben."
+
+#: piklab-prog/cli_interactive.cpp:243 piklab-prog/cli_interactive.cpp:259
+#, fuzzy
+msgid "No device specified."
+msgstr "Bauteil nicht angegeben."
+
+#: common/nokde/nokde_kaboutdata.cpp:430
+msgid ""
+"No licensing terms for this program have been specified.\n"
+"Please check the documentation or the source for any\n"
+"licensing terms.\n"
+msgstr ""
+
+#: progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp:37
+msgid "No of Retries:"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:244 piklab-prog/cli_interactive.cpp:262
+#, fuzzy
+msgid "No register."
+msgstr "Kein Register"
+
+#: devices/pic/gui/pic_group_ui.cpp:72
+msgid "No variable"
+msgstr "Keine Variable"
+
+#: piklab-prog/cli_interactive.cpp:266
+#, fuzzy
+msgid "No variable."
+msgstr "Keine Variable"
+
+#: piklab-hex/main.cpp:137
+msgid "No. of Words:"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:108
+#, fuzzy
+msgid "No. of file members:"
+msgstr "Keine Variable"
+
+#: coff/base/text_coff.cpp:258
+#, fuzzy
+msgid "No. of sections:"
+msgstr "Keine weiteren Optionen"
+
+#: coff/base/text_coff.cpp:259 coff/base/coff_archive.cpp:109
+msgid "No. of symbols:"
+msgstr ""
+
+#: coff/base/text_coff.cpp:260
+#, fuzzy
+msgid "No. of variables:"
+msgstr "Keine Variable"
+
+#: libgui/breakpoint_view.cpp:64
+msgid "Non-code breakpoint"
+msgstr ""
+
+#: devices/base/generic_device.cpp:39 devices/pic/base/pic.cpp:43
+msgid "Normal"
+msgstr "Normal"
+
+#: common/global/log.cpp:26
+msgid "Normal debug messages"
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:61
+msgid "Not Connected"
+msgstr "Nicht verbunden"
+
+#: devices/base/generic_device.cpp:19
+msgid "Not Recommended for New Design"
+msgstr "Nicht empfohlen für neue Entwicklungen"
+
+#: common/common/group.cpp:13
+#, fuzzy
+msgid "Not Supported"
+msgstr "Unterstützt"
+
+#: devices/pic/base/pic_config.cpp:225
+#, fuzzy
+msgid "Not connected to EMB"
+msgstr "Nicht verbunden"
+
+#: progs/direct/base/direct_prog_config.cpp:72
+#, fuzzy
+msgid "Not tested."
+msgstr "Ungetestet"
+
+#: libgui/likeback.cpp:598
+msgid "Note that to improve this application, it's important to tell us the things you like as much as the things you dislike."
+msgstr ""
+
+#: common/port/usb_port.cpp:401
+msgid "Nothing received: retrying..."
+msgstr "Nichts empfangen: wiederhole..."
+
+#: common/port/usb_port.cpp:363
+msgid "Nothing sent: retrying..."
+msgstr "Nichts gesendet: wiederhole..."
+
+#: piklab-hex/main.cpp:232 piklab-prog/cli_interactive.cpp:158
+#: piklab-prog/cli_interactive.cpp:298
+#, fuzzy
+msgid "Number format not recognized."
+msgstr "Zahlensystem nicht erkannt"
+
+#: devices/pic/base/pic_config.cpp:262
+msgid "OSC2 pin function"
+msgstr ""
+
+#: coff/base/coff.cpp:23
+#, fuzzy
+msgid "Object"
+msgstr "Objekte"
+
+#: common/common/purl_base.cpp:43
+msgid "Object File"
+msgstr "Objektdatei"
+
+#: libgui/project_manager.cpp:213 libgui/project_manager_ui.cpp:34
+msgid "Objects"
+msgstr "Objekte"
+
+#: common/common/number.cpp:22
+msgid "Octal"
+msgstr "Oktal"
+
+#: devices/pic/base/pic_config.cpp:107
+msgid "Odd PWM output polarity"
+msgstr ""
+
+#: coff/base/coff.cpp:27 coff/base/coff_object.cpp:35
+msgid "Old Microchip"
+msgstr ""
+
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:86
+msgid "Only bootloader version 1.x is supported"
+msgstr ""
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:38
+msgid "Only bootloader version 2.x is supported."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:315
+msgid "Only code and EEPROM will be erased."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:316
+msgid "Only code will be erased."
+msgstr ""
+
+#: libgui/likeback.cpp:594
+msgid "Only english language is accepted."
+msgstr ""
+
+#: progs/base/prog_config.cpp:69
+msgid "Only program what is needed (faster)."
+msgstr ""
+
+#: progs/base/debug_config.cpp:13
+msgid "Only stop stepping on project source line."
+msgstr ""
+
+#: progs/base/debug_config.cpp:12
+msgid "Only stop stepping on source line."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:177
+msgid "Only the first word of the \"goto\" instruction is into the first four instructions."
+msgstr ""
+
+#: progs/base/prog_config.cpp:71
+msgid "Only verify programmed words in code memory (faster)."
+msgstr ""
+
+#: progs/pickit2/gui/pickit2_group_ui.cpp:33
+msgid "Open Calibration Firmware"
+msgstr ""
+
+#: libgui/toplevel.cpp:554
+msgid "Open File"
+msgstr "Datei öffnen"
+
+#: progs/gui/prog_group_ui.cpp:142
+msgid "Open Firmware"
+msgstr "Firmware öffnen"
+
+#: libgui/project_manager.cpp:182 libgui/toplevel.cpp:228
+msgid "Open Project..."
+msgstr "Projekt öffnen..."
+
+#: libgui/toplevel.cpp:230
+msgid "Open Recent Project"
+msgstr "Letzes Projekt öffnen"
+
+#: common/global/log.cpp:58
+msgid "Operation aborted by user."
+msgstr "Operation vom Benutzer abgebrochen."
+
+#: coff/base/text_coff.cpp:257
+msgid "Option header:"
+msgstr ""
+
+#: piklab/main.cpp:15
+msgid "Optional filenames to be opened upon startup."
+msgstr ""
+
+#: coff/base/coff_object.cpp:469
+msgid "Optional header format not supported: magic number is %1."
+msgstr ""
+
+#: coff/base/coff_object.cpp:538
+msgid "Optionnal header size is not %1: %2"
+msgstr ""
+
+#: libgui/project_manager.cpp:191
+msgid "Options..."
+msgstr "Optionen..."
+
+#: common/global/about.cpp:80
+msgid "Original author of PiKdev."
+msgstr "Erstautor von PIKdev."
+
+#: common/global/about.cpp:85
+msgid "Original code for direct programming."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:351
+msgid "Osccal backup cannot be read by selected programmer"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:314
+msgid "Osccal backup cannot be read by the selected programmer"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:303
+msgid "Osccal cannot be read by the selected programmer"
+msgstr ""
+
+#: progs/pickit2/gui/pickit2_group_ui.cpp:28
+msgid "Osccal regeneration not available for the selected device."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:39
+msgid "Oscillator"
+msgstr "Oszillatortyp"
+
+#: progs/gui/prog_group_ui.cpp:175
+msgid "Oscillator calibration regeneration is not available with the selected programmer."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:160
+msgid "Oscillator mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:140
+msgid "Oscillator source"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:100
+msgid "Oscillator system clock switch"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:64
+#, fuzzy
+msgid "Output Executable Type:"
+msgstr "Ausgabeformat von Objektdateien:"
+
+#: piklab-prog/cmdline.cpp:178
+#, fuzzy
+msgid "Output hex filename already exists."
+msgstr "Dateiname der angegebenen Hex-Datei gibt es bereits."
+
+#: libgui/log_view.cpp:89
+msgid "Output in console"
+msgstr "Ausgabe auf die Konsole"
+
+#: tools/list/tools_config_widget.cpp:53
+#, fuzzy
+msgid "Output type:"
+msgstr "Ausgabeformat von Objektdateien:"
+
+#: common/cli/cli_main.cpp:63
+msgid "Overwrite files and answer \"yes\" to questions."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:32
+msgid "P16PRO40 7407"
+msgstr "P16PRO40 7407"
+
+#: progs/direct/base/direct_prog_config.cpp:30
+msgid "P16PRO40 classic"
+msgstr "P16PRO40 classic"
+
+#: progs/direct/base/direct_prog_config.cpp:36
+msgid "P16PRO40-VPP40 7407"
+msgstr "P16PRO40-VPP40 7407"
+
+#: progs/direct/base/direct_prog_config.cpp:34
+msgid "P16PRO40-VPP40 classic"
+msgstr "P16PRO40-VPP40 classic"
+
+#: devices/base/generic_device.cpp:46
+msgid "PDIP"
+msgstr "PDIP"
+
+#: devices/pic/pic/pic_group.h:25
+msgid "PIC"
+msgstr "PIC"
+
+#: progs/direct/base/direct_prog_config.cpp:47
+msgid "PIC Elmer"
+msgstr "PIC Elmer"
+
+#: coff/base/coff.cpp:28
+#, fuzzy
+msgid "PIC30"
+msgstr "PIC"
+
+#: tools/pic30/pic30.h:33
+msgid "PIC30 Toolchain"
+msgstr ""
+
+#: tools/picc/picc.h:76 coff/base/coff_object.cpp:37
+msgid "PICC Compiler"
+msgstr "PICC Compiler"
+
+#: tools/picc/picc.h:64
+msgid "PICC Lite Compiler"
+msgstr "PICC Lite Compiler"
+
+#: tools/picc/picc.h:88
+msgid "PICC-18 Compiler"
+msgstr "PICC-18 Compiler"
+
+#: progs/pickit1/base/pickit1_prog.h:35
+msgid "PICkit1"
+msgstr "PICkit1"
+
+#: progs/pickit2/base/pickit2_prog.h:37
+#, fuzzy
+msgid "PICkit2 Firmware 1.x"
+msgstr " Lade PICkit2 Firmware hoch..."
+
+#: progs/pickit2v2/base/pickit2v2_prog.h:39
+#, fuzzy
+msgid "PICkit2 Firmware 2.x"
+msgstr " Lade PICkit2 Firmware hoch..."
+
+#: devices/base/generic_device.cpp:59
+msgid "PLCC"
+msgstr "PLCC"
+
+#: devices/pic/base/pic_config.cpp:201
+msgid "PLL clock (divided by)"
+msgstr "PLL-Takt (Teilerfaktor)"
+
+#: devices/pic/base/pic_config.cpp:223
+msgid "PMP pin select bit"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:103
+msgid "PORTB A/D"
+msgstr "PORTB A/D"
+
+#: devices/pic/base/pic_config.cpp:131
+msgid "PWM multiplexed onto RE6 and RE3"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:133
+msgid "PWM multiplexed onto RE6 and RE5"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:132
+msgid "PWM multiplexed onto RH7 and RH4"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:134
+msgid "PWM multiplexed onto RH7 and RH6"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:113
+msgid "PWM output pin reset state"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:121
+msgid "PWM4 mux"
+msgstr "PWM4 mux"
+
+#: devices/base/device_group.cpp:251
+msgid "Packaging"
+msgstr "Gehäuse"
+
+#: coff/base/cdb_parser.cpp:29
+msgid "Paged Pointer"
+msgstr ""
+
+#: progs/gui/port_selector.cpp:21
+msgid "Parallel"
+msgstr "Parallel"
+
+#: common/port/port.cpp:62
+msgid "Parallel Port"
+msgstr "Parallel Port"
+
+#: coff/base/text_coff.cpp:245
+#, fuzzy
+msgid "Parsing COFF file is not supported for this device or an error occured."
+msgstr "Das angegebene Programmiergerät unterstützt kein Debugging."
+
+#: progs/manager/debug_manager.cpp:84
+msgid "Parsing COFF file: %1"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:24
+msgid "Pass"
+msgstr "Erfolgreich"
+
+#: common/cli/cli_main.cpp:51
+msgid "Perform the requested command."
+msgstr "Führe das Kommando aus."
+
+#: devices/pic/base/pic_config.cpp:269
+#, fuzzy
+msgid "Peripheral pin select configuration"
+msgstr "Hauptkonfiguration"
+
+#: progs/picdem_bootloader/base/picdem_bootloader_prog.h:31
+msgid "Picdem Bootloader"
+msgstr "Picdem Bootloader"
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader_prog.h:32
+msgid "Pickit2 Bootloader"
+msgstr "Pickit2 Bootloader"
+
+#: progs/psp/base/psp_prog.h:37
+msgid "Picstart Plus"
+msgstr "Picstart Plus"
+
+#: common/common/purl_base.cpp:58
+msgid "Pikdev Project File"
+msgstr "Pikdev Projektdatei"
+
+#: piklab/main.cpp:21
+msgid "Piklab"
+msgstr "Piklab"
+
+#: piklab-coff/main.cpp:278
+#, fuzzy
+msgid "Piklab COFF Utility"
+msgstr "Piklab Hex Utility"
+
+#: piklab-hex/main.cpp:287
+msgid "Piklab Hex Utility"
+msgstr "Piklab Hex Utility"
+
+#: piklab-prog/cmdline.cpp:453
+msgid "Piklab Programmer Utility"
+msgstr "Piklab Programmer Utility"
+
+#: progs/gui/port_selector.cpp:68
+msgid "Piklab has been compiled without support for USB port."
+msgstr ""
+
+#: progs/gui/port_selector.cpp:65
+msgid "Piklab has been compiled without support for parallel port."
+msgstr ""
+
+#: libgui/device_gui.cpp:418
+msgid "Pin Diagrams"
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:34
+msgid "Pin assignment"
+msgstr "Pin Zuordnung"
+
+#: libgui/likeback.cpp:545
+msgid "Please briefly describe the bug you encountered."
+msgstr ""
+
+#: libgui/likeback.cpp:538
+msgid "Please briefly describe what you do not like."
+msgstr ""
+
+#: libgui/likeback.cpp:531
+msgid "Please briefly describe what you like."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:333
+msgid "Please check installation of selected software debugger."
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:79
+msgid "Please compile the current project"
+msgstr ""
+
+#: libgui/likeback.cpp:394
+msgid "Please provide your email address."
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:654
+msgid "Please use %1 to report bugs, do not mail the authors directly.\n"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:652
+msgid "Please use http://bugs.kde.org to report bugs, do not mail the authors directly.\n"
+msgstr ""
+
+#: coff/base/coff_object.cpp:178
+#, fuzzy
+msgid "Pointer"
+msgstr "Programmspeicher"
+
+#: progs/gui/prog_config_center.cpp:119
+msgid "Port Selection"
+msgstr "Port Auswahl"
+
+#: progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp:20
+msgid "Port Speed:"
+msgstr "Verbindungsgeschwindigkeit:"
+
+#: progs/direct/base/direct.cpp:27
+msgid "Power (Vdd)"
+msgstr "Spannung (Vdd)"
+
+#: progs/base/prog_config.cpp:72
+msgid "Power down target after programming."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:190
+msgid "Power-on reset timer value (ms)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:37
+msgid "Power-up timer"
+msgstr ""
+
+#. i18n: file ./data/app_data/piklabui.rc line 83
+#: rc.cpp:27
+#, no-c-format
+msgid "Pr&ogrammer"
+msgstr "Pr&ogrammierer"
+
+#: progs/base/prog_config.cpp:75
+msgid "Preserve data EEPROM when programming."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:143
+msgid "Primary"
+msgstr "Primär"
+
+#: devices/pic/base/pic_config.cpp:251
+#, fuzzy
+msgid "Primary oscillator"
+msgstr "Externer RC-Schwinger"
+
+#: devices/pic/base/pic_config.cpp:145 devices/pic/base/pic_config.cpp:256
+msgid "Primary oscillator mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:252
+#, fuzzy
+msgid "Primary oscillator with PLL"
+msgstr "Externer RC-Schwinger (mit CLKOUT)"
+
+#: progs/icd2/base/icd2_usb.cpp:77
+msgid "Problem connecting ICD2: please try again after unplug-replug."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:92
+msgid "Processor mode"
+msgstr "Prozessormodus"
+
+#: devices/pic/base/pic.cpp:34
+msgid "Program Executive"
+msgstr ""
+
+#: libgui/toplevel.cpp:144
+msgid "Program Log"
+msgstr ""
+
+#: progs/base/prog_config.cpp:76
+#, fuzzy
+msgid "Program data EEPROM."
+msgstr "Daten EEPROM"
+
+#: libgui/global_config.cpp:21
+msgid "Program device after successful build."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:41
+msgid "Program device memory: \"program <hexfilename>\"."
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:56
+msgid "Programmer"
+msgstr "Programmiergerät"
+
+#: progs/gui/prog_config_center.h:23 progs/gui/prog_config_center.h:24
+msgid "Programmer Options"
+msgstr "Programmiergerätoptionen"
+
+#: progs/gui/prog_config_center.h:35 progs/gui/prog_config_center.h:36
+msgid "Programmer Selection"
+msgstr "Programmiergerätauswahl"
+
+#. i18n: file ./data/app_data/piklabui.rc line 161
+#: rc.cpp:48
+#, no-c-format
+msgid "Programmer Toolbar"
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:15
+msgid "Programmer Vpp"
+msgstr "Vpp für Programmiergerät"
+
+#: piklab-prog/cli_interactive.cpp:54
+msgid "Programmer hardware configuration to use (for direct programmer)."
+msgstr ""
+
+#: progs/gui/prog_config_center.cpp:41
+msgid "Programmer in use:"
+msgstr "Benutztes Programmiergerät:"
+
+#: piklab-prog/cmdline.cpp:270
+msgid "Programmer is already disconnected."
+msgstr "Verbindung zu Programmiergerät wurde bereits unterbrochen."
+
+#: piklab-prog/cmdline.cpp:274
+msgid "Programmer is already running."
+msgstr "Programmiergerät läuft bereits."
+
+#: piklab-prog/cmdline.cpp:278
+msgid "Programmer is already stopped."
+msgstr "Programmiergerät wurde schon gestoppt."
+
+#: progs/base/generic_prog.cpp:134
+msgid "Programmer is in bootload mode."
+msgstr "Programmiergerät ist im Bootladermodus."
+
+#: piklab-prog/cmdline.cpp:158
+msgid "Programmer not specified."
+msgstr "Kein Programmiergerät angegeben."
+
+#: piklab-prog/cli_interactive.cpp:57
+msgid "Programmer port (\"usb\" or device such as \"/dev/ttyS0\")"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:53
+msgid "Programmer to use."
+msgstr ""
+
+#: tools/list/device_info.cpp:59
+#, fuzzy
+msgid "Programmers"
+msgstr "Programmiergerät"
+
+#: tools/list/device_info.cpp:34
+#, fuzzy
+msgid "Programming Specifications"
+msgstr "Programmiergerätauswahl"
+
+#: devices/pic/prog/pic_prog.cpp:710
+msgid "Programming calibration data needs a chip erase. Continue anyway?"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:738
+msgid "Programming calibration successful"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:735 devices/pic/prog/pic_prog.cpp:736
+msgid "Programming calibration..."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:272
+msgid "Programming device for debugging test..."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:277 progs/base/generic_prog.cpp:341
+msgid "Programming device memory..."
+msgstr ""
+
+#: libgui/toplevel.cpp:849
+msgid "Programming in progress. Cannot be aborted."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:279
+msgid "Programming successful"
+msgstr "Programmierung erfolgreich"
+
+#: progs/base/generic_prog.cpp:343
+msgid "Programming successful."
+msgstr "Programmierung erfolgreich."
+
+#: progs/base/generic_prog.cpp:33
+msgid "Programming..."
+msgstr "programmiere..."
+
+#: libgui/project_manager.cpp:190
+msgid "Project"
+msgstr "Projekt"
+
+#: libgui/project_wizard.cpp:187
+msgid "Project \"%1\"already exists. Overwrite it?"
+msgstr ""
+
+#: common/common/purl_base.cpp:51
+msgid "Project File"
+msgstr "Projektdatei"
+
+#: common/common/purl_base.cpp:127
+msgid "Project Files"
+msgstr "Projektdateien"
+
+#: libgui/toplevel.cpp:121
+msgid "Project Manager"
+msgstr "Projektverwaltung"
+
+#: libgui/project_editor.cpp:21
+msgid "Project Options"
+msgstr "Projektoptionen"
+
+#: libgui/toplevel.cpp:234
+msgid "Project Options..."
+msgstr "Projektoptionen..."
+
+#. i18n: file ./data/app_data/piklabui.rc line 145
+#: rc.cpp:42
+#, no-c-format
+msgid "Project Toolbar"
+msgstr "Projektwerkzeuge"
+
+#: libgui/project_manager.cpp:526
+msgid "Project already loaded. Reload?"
+msgstr "Projekt wurde bereits geladen. Nochmals laden?"
+
+#: libgui/project.cpp:24
+msgid "Project file %1 does not exist."
+msgstr "Projektdatei %1 nicht vorhanden."
+
+#: libgui/project_wizard.cpp:171
+msgid "Project name is empty."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:64
+msgid "Propic2 Vpp-1"
+msgstr "Propic2 Vpp-1"
+
+#: progs/direct/base/direct_prog_config.cpp:66
+msgid "Propic2 Vpp-2"
+msgstr "Propic2 Vpp-2"
+
+#: progs/direct/base/direct_prog_config.cpp:68
+msgid "Propic2 Vpp-3"
+msgstr "Propic2 Vpp-3"
+
+#: devices/pic/gui/pic_config_word_editor.cpp:93
+msgid "Protected Mask:"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:635
+msgid "Protecting code memory or data EEPROM on OTP devices is disabled as a security..."
+msgstr ""
+
+#: devices/base/generic_device.cpp:57
+msgid "QFN"
+msgstr "QFN"
+
+#: devices/base/generic_device.cpp:58
+#, fuzzy
+msgid "QFN-S"
+msgstr "DFN-S"
+
+#: piklab-prog/cli_interactive.cpp:38
+msgid "Quit."
+msgstr "Beenden."
+
+#: libgui/toplevel.cpp:298
+msgid "R&eset"
+msgstr "R&eset"
+
+#: libgui/toplevel.cpp:276
+msgid "R&estart"
+msgstr ""
+
+#: libgui/text_editor.cpp:171
+msgid "R/O"
+msgstr ""
+
+#: devices/base/generic_device.cpp:28
+msgid "ROM"
+msgstr "ROM"
+
+#: devices/base/generic_device.cpp:29
+msgid "ROM-less"
+msgstr "ROM-los"
+
+#: devices/pic/gui/pic_config_word_editor.cpp:78
+msgid "Raw Blank Value:"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:68
+msgid "Raw Value:"
+msgstr ""
+
+#: devices/gui/memory_editor.cpp:278
+msgid "Re&load"
+msgstr "&Lade neu"
+
+#: progs/manager/debug_manager.cpp:317
+msgid "Reached breakpoint."
+msgstr "Unterbrechungspunkt erreicht."
+
+#: devices/pic/gui/pic_register_view.cpp:83 progs/gui/prog_group_ui.cpp:34
+#: progs/gui/prog_group_ui.cpp:45 libgui/toplevel.cpp:953
+msgid "Read"
+msgstr "lies"
+
+#: devices/pic/gui/pic_register_view.cpp:262
+msgid "Read All"
+msgstr "lies alles"
+
+#: libgui/hex_editor.cpp:39
+#, fuzzy
+msgid "Read Only Mode"
+msgstr "Einlesen abgeschlossen"
+
+#: piklab-prog/cmdline.cpp:45
+msgid "Read device memory: \"read <hexfilename>\"."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:275
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:78
+msgid "Read id does not match the specified device name \"%1\"."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:273
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:76
+msgid "Read id: %1"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:45
+msgid "Read or set a register or variable: \"x PORTB\" or \"x W 0x1A\"."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:343
+msgid "Read string is different than expected: %1 (%2)."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:291 piklab-prog/cmdline.cpp:296
+#: piklab-prog/cmdline.cpp:301
+msgid "Reading device memory not supported for specified programmer."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:319
+msgid "Reading device memory..."
+msgstr "lese Bauteilspeicher aus..."
+
+#: progs/base/generic_prog.cpp:322
+msgid "Reading done."
+msgstr "Einlesen abgeschlossen."
+
+#: progs/base/generic_prog.cpp:32
+msgid "Reading..."
+msgstr "lese..."
+
+#: progs/base/generic_debug.cpp:48
+msgid "Ready to start debugging."
+msgstr "Bereit für Debugging."
+
+#: progs/icd2/base/icd2.cpp:212
+msgid "Received length too short."
+msgstr "Empfangszeit zu kurz."
+
+#: progs/icd2/base/icd2.cpp:216
+msgid "Received string too short."
+msgstr "Empfangene Zeichenfolge zu kurz."
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:107
+msgid "Received unexpected character ('%1' received; 'K' expected)."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:104
+msgid "Received unexpected character ('%1' received; 'K' or 'N' expected)."
+msgstr ""
+
+#: libgui/toplevel.cpp:905
+#, fuzzy
+msgid "Recompile First"
+msgstr "&compiliere Datei"
+
+#: progs/gui/prog_group_ui.cpp:36
+#, fuzzy
+msgid "Regenerating..."
+msgstr "Generiere neu..."
+
+#: coff/base/coff_object.cpp:145
+#, fuzzy
+msgid "Register Parameter"
+msgstr "Register"
+
+#: coff/base/cdb_parser.cpp:58
+#, fuzzy
+msgid "Register Space"
+msgstr "Register"
+
+#: coff/base/coff_object.cpp:132
+#, fuzzy
+msgid "Register Variable"
+msgstr "Register"
+
+#: libgui/editor_manager.cpp:489 libgui/watch_view.cpp:48
+#: libgui/project_manager_ui.cpp:127
+msgid "Registers"
+msgstr "Register"
+
+#: devices/pic/gui/pic_register_view.cpp:273
+msgid "Registers information not available."
+msgstr ""
+
+#: coff/base/coff_object.cpp:248
+msgid "Relocation address beyong section size: %1/%2"
+msgstr ""
+
+#: coff/base/coff_object.cpp:251
+msgid "Relocation has unknown symbol: %1"
+msgstr ""
+
+#: coff/base/coff_object.cpp:255
+msgid "Relocation is an auxiliary symbol: %1"
+msgstr ""
+
+#: common/gui/editlistbox.cpp:131
+msgid "Remove All"
+msgstr "Alles entfernen"
+
+#: libgui/project_manager.cpp:208
+msgid "Remove From Project"
+msgstr "Aus Projekt entfernen"
+
+#: libgui/breakpoint_view.cpp:24
+msgid "Remove breakpoint"
+msgstr "Unterbrechungspunkt entfernen"
+
+#: tools/list/compile_process.cpp:28
+msgid "Replaced by \"xxx\" when \"wine\" is used."
+msgstr ""
+
+#: tools/list/compile_process.cpp:29
+msgid "Replaced by \"xxx\" when the device name is specified."
+msgstr ""
+
+#: tools/list/compile_process.cpp:27
+msgid "Replaced by \"xxx\" when there is a custom linker script."
+msgstr ""
+
+#: tools/list/compile_process.cpp:45
+msgid "Replaced by a separation into two arguments."
+msgstr ""
+
+#: tools/list/compile_process.cpp:34
+msgid "Replaced by the COFF filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:39
+msgid "Replaced by the device family name (when needed)."
+msgstr ""
+
+#: tools/list/compile_process.cpp:38
+msgid "Replaced by the device name."
+msgstr ""
+
+#: tools/list/compile_process.cpp:43
+msgid "Replaced by the linker script basename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:44
+msgid "Replaced by the linker script filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:42
+msgid "Replaced by the linker script path."
+msgstr ""
+
+#: tools/list/compile_process.cpp:37
+msgid "Replaced by the list filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:31
+msgid "Replaced by the list of additionnal libraries."
+msgstr ""
+
+#: tools/list/compile_process.cpp:30
+msgid "Replaced by the list of additionnal objects."
+msgstr ""
+
+#: tools/list/compile_process.cpp:35
+msgid "Replaced by the map filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:41
+msgid "Replaced by the object file name."
+msgstr ""
+
+#: tools/list/compile_process.cpp:32
+msgid "Replaced by the output filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:33
+msgid "Replaced by the project name."
+msgstr ""
+
+#: tools/list/compile_process.cpp:40
+msgid "Replaced by the relative input filepath(s)."
+msgstr ""
+
+#: tools/list/compile_process.cpp:26
+msgid "Replaced by the source directory."
+msgstr ""
+
+#: tools/list/compile_process.cpp:36
+msgid "Replaced by the symbol filename."
+msgstr ""
+
+#: libgui/toplevel.cpp:325
+msgid "Report Bug..."
+msgstr ""
+
+#: libgui/likeback.cpp:182
+msgid "Report a bug."
+msgstr ""
+
+#: libgui/device_gui.cpp:99
+#, fuzzy
+msgid "Reset Filters"
+msgstr "Wähle Dateien"
+
+#: devices/pic/prog/pic_prog_specific.cpp:23
+msgid "Reset Held"
+msgstr "Reset gedrückt"
+
+#: devices/pic/prog/pic_prog_specific.cpp:23
+msgid "Reset Released"
+msgstr "Reset losgelassen"
+
+#: devices/pic/base/pic_config.cpp:194
+msgid "Reset into clip on emulation mode"
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:193
+msgid "Reset.<Translators: please translate the past form of the verb>"
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:196
+#, fuzzy
+msgid "Restarting..."
+msgstr "Neustart..."
+
+#: progs/icd1/gui/icd1_group_ui.cpp:20
+msgid "Result:"
+msgstr "Ergebnis:"
+
+#: piklab-hex/main.cpp:29
+msgid "Return checksum."
+msgstr ""
+
+#: piklab-coff/main.cpp:25
+#, fuzzy
+msgid "Return general informations."
+msgstr "Hauptkonfiguration"
+
+#: piklab-hex/main.cpp:26
+msgid "Return information about hex file."
+msgstr ""
+
+#: piklab-coff/main.cpp:29
+#, fuzzy
+msgid "Return informations about code lines (for object)."
+msgstr "Kann COFF-Datei nicht öffnen."
+
+#: piklab-coff/main.cpp:30
+#, fuzzy
+msgid "Return informations about files."
+msgstr "Kann COFF-Datei nicht öffnen."
+
+#: piklab-coff/main.cpp:28
+#, fuzzy
+msgid "Return informations about sections (for object)."
+msgstr "Kann COFF-Datei nicht öffnen."
+
+#: piklab-coff/main.cpp:27
+#, fuzzy
+msgid "Return informations about symbols."
+msgstr "Kann COFF-Datei nicht öffnen."
+
+#: piklab-coff/main.cpp:26
+#, fuzzy
+msgid "Return informations about variables (for object)."
+msgstr "Kann COFF-Datei nicht öffnen."
+
+#: piklab-prog/cli_interactive.cpp:57
+msgid "Return the list of detected ports."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:58
+msgid "Return the list of memory ranges."
+msgstr ""
+
+#: common/cli/cli_main.cpp:52
+msgid "Return the list of recognized commands."
+msgstr ""
+
+#: piklab-hex/main.cpp:38 piklab-prog/cli_interactive.cpp:55
+#: piklab-coff/main.cpp:38
+msgid "Return the list of supported devices."
+msgstr ""
+
+#: piklab-hex/main.cpp:39
+#, fuzzy
+msgid "Return the list of supported fill options."
+msgstr "Unterstütze Dateiformate der HEX-Dateien:"
+
+#: piklab-prog/cli_interactive.cpp:56
+#, fuzzy
+msgid "Return the list of supported hex file formats."
+msgstr "Unterstütze Dateiformate der HEX-Dateien:"
+
+#: piklab-prog/cli_interactive.cpp:54
+#, fuzzy
+msgid "Return the list of supported programmer hardware configurations."
+msgstr "Unterstütze Dateiformate der HEX-Dateien:"
+
+#: piklab-prog/cli_interactive.cpp:53
+msgid "Return the list of supported programmers."
+msgstr ""
+
+#: coff/base/coff_object.cpp:331
+msgid "Rom Data"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:37
+msgid "Run device (release reset)."
+msgstr "Starte Ablauf (Reset loslassen)."
+
+#: progs/base/prog_config.cpp:77
+#, fuzzy
+msgid "Run device after successful programming."
+msgstr "Hex-Datei für Programmierzwecke."
+
+#: progs/base/generic_prog.cpp:224
+msgid "Run..."
+msgstr "Start..."
+
+#: devices/pic/prog/pic_prog_specific.cpp:19
+msgid "Running"
+msgstr "Läuft"
+
+#: progs/manager/debug_manager.cpp:240 progs/base/generic_prog.cpp:221
+msgid "Running..."
+msgstr "Läuft..."
+
+#: coff/base/cdb_parser.cpp:38
+msgid "SBIT"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:57
+msgid "SBIT Space"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:78
+msgid "SBODEN controls BOD function"
+msgstr ""
+
+#: progs/sdcdb/base/sdcdb_debug.h:76
+msgid "SDCDB"
+msgstr ""
+
+#: devices/base/generic_device.cpp:47
+msgid "SDIP"
+msgstr "SDIP"
+
+#: coff/base/cdb_parser.cpp:56
+msgid "SFR Space"
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:41
+msgid "SFRs"
+msgstr "SFRs"
+
+#: devices/base/generic_device.cpp:53
+msgid "SOIC"
+msgstr "SOIC"
+
+#: devices/base/generic_device.cpp:49
+msgid "SOT-23"
+msgstr "SOT-23"
+
+#: devices/base/generic_device.cpp:48
+#, fuzzy
+msgid "SPDIP"
+msgstr "PDIP"
+
+#: devices/base/generic_device.cpp:51
+msgid "SSOP"
+msgstr "SSOP"
+
+#: devices/pic/base/pic.cpp:73
+#, fuzzy
+msgid "SSP"
+msgstr "SSOP"
+
+#: devices/pic/base/pic_config.cpp:122
+msgid "SSP I/O mux (SCK/SLC, SDA/SDI, SD0)"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:62
+msgid "Same as \"device\"."
+msgstr ""
+
+#: libgui/toplevel.cpp:190
+msgid "Save All"
+msgstr "Speicher alles"
+
+#: libgui/editor.cpp:53
+msgid "Save File"
+msgstr "Speicher Datei"
+
+#: libgui/log_view.cpp:132
+msgid "Save log to file"
+msgstr ""
+
+#: piklab-hex/main.cpp:94
+msgid "Second hex file: "
+msgstr "Zweite Hex-Datei:"
+
+#: devices/pic/base/pic_config.cpp:253
+#, fuzzy
+msgid "Secondary oscillator (LP)"
+msgstr "Externer RC-Schwinger (ohne CLKOUT)"
+
+#: coff/base/coff_object.cpp:55 coff/base/coff_object.cpp:155
+#, fuzzy
+msgid "Section"
+msgstr ""
+"\n"
+"Optionen:\n"
+
+#: piklab-coff/main.cpp:164
+#, fuzzy
+msgid "Sections:"
+msgstr ""
+"\n"
+"Optionen:\n"
+
+#: devices/pic/base/pic_protection.cpp:357
+msgid "Secure Segment"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:240
+#, fuzzy
+msgid "Secure segment EEPROM size"
+msgstr "Boot Block Größe"
+
+#: devices/pic/base/pic_config.cpp:241
+msgid "Secure segment RAM size"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:237
+msgid "Secure segment security"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:236
+msgid "Secure segment size"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:235
+#, fuzzy
+msgid "Secure segment write-protection"
+msgstr "Programmspeicherschutz"
+
+#: libgui/project_manager.cpp:222
+msgid "Select Device..."
+msgstr "Wähle Bauteil..."
+
+#: common/gui/purl_gui.cpp:118
+msgid "Select Directory"
+msgstr "Wähle Verzeichnis:"
+
+#: common/gui/purl_gui.cpp:147
+msgid "Select File"
+msgstr "Wähle Datei"
+
+#: libgui/project_wizard.cpp:89
+msgid "Select Files"
+msgstr "Wähle Dateien"
+
+#: libgui/project_manager.cpp:170
+msgid "Select Linker Script"
+msgstr "Wähle Linker Script"
+
+#: libgui/project_manager.cpp:298
+#, fuzzy
+msgid "Select Object File"
+msgstr "Wähle Projektdatei"
+
+#: libgui/project_manager.cpp:335
+msgid "Select Project file"
+msgstr "Wähle Projektdatei"
+
+#: libgui/project_manager.cpp:289
+msgid "Select Source File"
+msgstr "Wähle Sourcedatei"
+
+#: libgui/device_gui.cpp:87
+msgid "Select a device"
+msgstr "Wähle ein Bauteil"
+
+#: devices/pic/base/pic.cpp:83
+#, fuzzy
+msgid "Self-Write"
+msgstr "Selbsttest"
+
+#: progs/gui/prog_group_ui.cpp:85
+msgid "Self-test"
+msgstr "Selbsttest"
+
+#: progs/icd2/base/icd2_prog.cpp:56
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:105
+msgid "Self-test failed (%1). Do you want to continue anyway?"
+msgstr "Selbsttest schlug fehl (%1). Möchten Sie trotzdem fortfahren?"
+
+#: progs/icd1/base/icd1.cpp:109
+msgid "Self-test failed (returned value is %1)"
+msgstr "Selbsttest schlug fehl (Rückgabewert ist %1)"
+
+#: progs/icd1/base/icd1_prog.cpp:29
+msgid "Self-test failed. Do you want to continue anyway?"
+msgstr "Selbsttest schlug fehl. Möchten Sie trotzdem fortfahren?"
+
+#: progs/icd2/base/icd2_prog.cpp:55
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:104
+msgid "Self-test failed: %1"
+msgstr "Selbsttest schlug fehl: (%1)"
+
+#: libgui/likeback.cpp:582
+msgid "Send"
+msgstr "senden"
+
+#: progs/direct/gui/direct_config_widget.cpp:78
+#: progs/direct/gui/direct_config_widget.cpp:98
+msgid "Send 0xA55A"
+msgstr "Sende 0xA55A"
+
+#: libgui/likeback.cpp:609
+msgid "Send a Comment"
+msgstr ""
+
+#: libgui/likeback.cpp:181
+msgid "Send a comment about what you don't like."
+msgstr ""
+
+#: libgui/likeback.cpp:180
+msgid "Send a comment about what you like."
+msgstr ""
+
+#: progs/gui/port_selector.cpp:21
+msgid "Serial"
+msgstr "Seriell"
+
+#: devices/mem24/mem24/mem24_group.h:25
+msgid "Serial Memory 24"
+msgstr ""
+
+#: common/port/port.cpp:61
+msgid "Serial Port"
+msgstr "Serielle Schnittstelle"
+
+#: libgui/project_manager.cpp:166
+msgid "Set Custom..."
+msgstr "Weitere Einstellungen..."
+
+#: libgui/project_manager.cpp:167
+msgid "Set Default"
+msgstr "Standardeinstellung"
+
+#: libgui/likeback.cpp:393
+msgid "Set Email Address"
+msgstr ""
+
+#: libgui/global_config.cpp:22
+msgid "Set User Ids to unprotected checksum (if User Ids are empty)."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:46
+msgid "Set a breakpoint \"break e 0x04\" or list all breakpoints \"break\"."
+msgstr ""
+
+#: libgui/breakpoint_view.cpp:24
+msgid "Set breakpoint"
+msgstr "Unterbrechungspunkt setzen"
+
+#: piklab-prog/cli_interactive.cpp:59
+msgid "Set if target device is self-powered."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:39
+msgid "Set property value: \"set <property> <value>\" or \"<property> <value>\"."
+msgstr ""
+
+#: devices/pic/gui/pic_memory_editor.cpp:319
+#: devices/pic/gui/pic_memory_editor.cpp:331
+msgid "Set to unprotected checksum"
+msgstr ""
+
+#: progs/base/generic_debug.cpp:43
+msgid "Setting up debugging session."
+msgstr ""
+
+#: libgui/toplevel.cpp:280 libgui/toplevel.cpp:304
+#, fuzzy
+msgid "Settings..."
+msgstr "Automatische Erkennung..."
+
+#: coff/base/cdb_parser.cpp:34 coff/base/coff_object.cpp:161
+#, fuzzy
+msgid "Short"
+msgstr "USB Port"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:850
+msgid "Show %1 specific options"
+msgstr "Zeige spezielle Optionen von %1"
+
+#: libgui/toplevel.cpp:300
+msgid "Show Program Counter"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:857
+msgid "Show all options"
+msgstr "Zeige alle Optionen"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:858
+msgid "Show author information"
+msgstr "Zeige Informationen über die Autoren"
+
+#: libgui/global_config.cpp:23
+msgid "Show close buttons on tabs (need restart to take effect)."
+msgstr ""
+
+#: libgui/toplevel.cpp:214
+#, fuzzy
+msgid "Show disassembly location"
+msgstr "Liste der Disassemblierung"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:842
+msgid "Show help about options"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:860
+msgid "Show license information"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:859
+msgid "Show version information"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:43
+#, fuzzy
+msgid "Signed"
+msgstr "senden"
+
+#: tools/sdcc/sdcc.h:35
+msgid "Small Device C Compiler"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:189
+msgid "Software"
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:28
+msgid ""
+"Some programming cards need low clock rate:\n"
+"adding delay to clock pulses might help."
+msgstr ""
+
+#: tools/base/generic_tool.cpp:34
+msgid "Source Directory"
+msgstr ""
+
+#: piklab-coff/main.cpp:175
+#, fuzzy
+msgid "Source Lines:"
+msgstr "Sourcen"
+
+#: libgui/project_manager.cpp:217 libgui/project_manager_ui.cpp:34
+msgid "Sources"
+msgstr "Sourcen"
+
+#: piklab-prog/cli_interactive.cpp:248
+msgid "Special Function Registers:"
+msgstr "Special Function Register:"
+
+#: progs/gui/prog_config_center.cpp:65
+msgid "Specific"
+msgstr "Speziell"
+
+#: devices/pic/base/pic_config.cpp:101
+msgid "Stack full/underflow reset"
+msgstr ""
+
+#: libgui/project_manager.cpp:185 libgui/config_center.h:53
+#: libgui/project_manager_ui.cpp:63
+msgid "Standalone File"
+msgstr ""
+
+#: libgui/config_center.h:54
+#, fuzzy
+msgid "Standalone File Compilation"
+msgstr "Normalbetrieb"
+
+#: devices/pic/base/pic_config.cpp:232 devices/pic/base/pic_config.cpp:239
+#, fuzzy
+msgid "Standard Security"
+msgstr "Normalbetrieb"
+
+#: devices/pic/base/pic_config.cpp:115
+msgid "Standard operation"
+msgstr "Normalbetrieb"
+
+#: devices/pic/base/pic_config.cpp:246
+#, fuzzy
+msgid "Standard security"
+msgstr "Normalbetrieb"
+
+#: piklab-prog/cli_interactive.cpp:43
+msgid "Start or restart debugging session."
+msgstr ""
+
+#: piklab-hex/main.cpp:140
+#, fuzzy
+msgid "Start:"
+msgstr "Status:"
+
+#: piklab-prog/cli_prog_manager.cpp:61
+msgid "Starting debug session without COFF file (no source file information)."
+msgstr ""
+
+#: piklab-prog/cli_prog_manager.cpp:62
+msgid "Starting debugging session with device memory in an unknown state. You may want to reprogram the device."
+msgstr ""
+
+#: coff/base/coff_object.cpp:131
+msgid "Static Symbol"
+msgstr ""
+
+#: devices/base/device_group.cpp:228 libgui/breakpoint_view.cpp:47
+msgid "Status"
+msgstr "Status"
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:21
+msgid "Status:"
+msgstr "Status:"
+
+#: progs/manager/debug_manager.cpp:302
+#, fuzzy
+msgid "Step"
+msgstr "&Schrittmodus"
+
+#: piklab-prog/cli_interactive.cpp:44
+msgid "Step one instruction."
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:224
+msgid "Stop Watching"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:39
+msgid "Stop device (hold reset)."
+msgstr "Halte Kontroller an (im Reset gehalten)."
+
+#: devices/pic/prog/pic_prog_specific.cpp:19
+msgid "Stopped"
+msgstr "gestoppt"
+
+#: progs/manager/prog_manager.cpp:155 progs/manager/prog_manager.cpp:175
+#, fuzzy
+msgid "Stopped."
+msgstr "gestoppt"
+
+#: common/common/number.cpp:23
+msgid "String"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:19 coff/base/cdb_parser.cpp:37
+#: coff/base/coff_object.cpp:166
+msgid "Structure"
+msgstr ""
+
+#: coff/base/coff_object.cpp:138
+msgid "Structure Tag"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:85
+msgid "Subroutine to initialize W registers to 0x0000"
+msgstr ""
+
+#: common/global/about.cpp:88
+msgid "Support for direct programmers with bidirectionnal buffers."
+msgstr ""
+
+#: devices/base/device_group.cpp:36
+msgid "Supported"
+msgstr "Unterstützt"
+
+#: common/cli/cli_main.cpp:93
+msgid "Supported commands:"
+msgstr "Unterstützte Befehle:"
+
+#: piklab-prog/cmdline.cpp:115
+msgid "Supported devices for \"%1\":"
+msgstr ""
+
+#: piklab-hex/main.cpp:264 piklab-prog/cmdline.cpp:112
+#: piklab-coff/main.cpp:265
+msgid "Supported devices:"
+msgstr "Unterstützte Bauteile:"
+
+#: piklab-prog/cmdline.cpp:92
+#, fuzzy
+msgid "Supported hardware configuration for programmers:"
+msgstr "Unterstützte Programmiergeräte:"
+
+#: piklab-prog/cmdline.cpp:75
+msgid "Supported hex file formats:"
+msgstr "Unterstütze Dateiformate der HEX-Dateien:"
+
+#: piklab-prog/cmdline.cpp:83
+msgid "Supported programmers:"
+msgstr "Unterstützte Programmiergeräte:"
+
+#: libgui/toplevel.cpp:208
+msgid "Switch Header/Implementation"
+msgstr ""
+
+#: libgui/editor_manager.cpp:37
+msgid "Switch to editor"
+msgstr ""
+
+#: libgui/toplevel.cpp:206
+msgid "Switch to..."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:137
+msgid "Switching off, monitor off"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:138
+msgid "Switching on, monitor off"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:139
+msgid "Switching on, monitor on"
+msgstr ""
+
+#: coff/base/coff_object.cpp:215
+msgid "Symbol without needed auxilliary symbol (type=%1)"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:124 piklab-coff/main.cpp:154
+msgid "Symbols:"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:191
+msgid "T0CKI interrupt service routine"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:117
+msgid "T1OSO/T1CKI on RA6"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:118
+msgid "T1OSO/T1CKI on RB2"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:185
+msgid "TIMER0 interrupt service routine"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:119
+msgid "TMR0/T5CKI external clock mux"
+msgstr ""
+
+#: devices/base/generic_device.cpp:54
+msgid "TQFP"
+msgstr "TQFP"
+
+#: devices/base/generic_device.cpp:52
+msgid "TSSOP"
+msgstr "TSSOP"
+
+#: devices/pic/base/pic_config.cpp:30
+msgid "Table read-protection"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:28
+msgid "Tait 7405/7406"
+msgstr "Tait 7405/7406"
+
+#: progs/direct/base/direct_prog_config.cpp:26
+msgid "Tait classic"
+msgstr "Tait classic"
+
+#: devices/pic/prog/pic_prog_specific.cpp:15 progs/icd2/base/icd2.cpp:51
+msgid "Target Vdd"
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:15
+msgid "Target Vpp"
+msgstr ""
+
+#: piklab-hex/main.cpp:38 piklab-prog/cli_interactive.cpp:55
+#: piklab-coff/main.cpp:38
+msgid "Target device."
+msgstr ""
+
+#: progs/base/prog_config.cpp:73
+msgid "Target is self-powered (when possible)."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:261
+#, fuzzy
+msgid "Temperature protection"
+msgstr "Temperaturbereich: "
+
+#: devices/base/device_group.cpp:291
+msgid "Temperature range: "
+msgstr "Temperaturbereich: "
+
+#: libgui/config_gen.cpp:179
+msgid "Template Generator"
+msgstr ""
+
+#: coff/base/disassembler.cpp:278
+msgid "Template source file generated by piklab"
+msgstr ""
+
+#: libgui/project_wizard.cpp:234
+msgid "Template source file generation not implemented yet for this toolchain..."
+msgstr ""
+
+#: libgui/project_wizard.cpp:240
+msgid "Template source file generation only partially implemented."
+msgstr ""
+
+#: common/global/about.cpp:91
+msgid "Test of PICkit2 and ICD2 programmer."
+msgstr "Test des PICkit2 und des ICD2 Programmiergerätes."
+
+#: common/common/group.cpp:15
+#, fuzzy
+msgid "Tested"
+msgstr "Reset gedrückt"
+
+#: tools/pic30/pic30.cpp:63
+msgid "The <a href=\"%1\">PIC30 ToolChain</a> is a toolsuite for 16-bit PICs available from Microchip. Most of it is available under the GNU Public License."
+msgstr ""
+
+#: tools/sdcc/sdcc.cpp:28
+msgid "The <a href=\"%1\">Small Devices C Compiler</a> is an open-source C compiler for several families of microcontrollers."
+msgstr ""
+
+#: tools/boost/boost.cpp:68
+msgid "The Boost toolchain needs to be run by Wine with \"Windows NT 4.0\" compatibility. This can be configured with the Wine configuration utility."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:31
+msgid "The CLOCK pin is used to synchronize serial data of the DATA IN and DATA OUT pins."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:37
+msgid "The DATA IN pin is used to receive data from the programmed device."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:34
+msgid "The DATA OUT pin is used to send data to the programmed device."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:40
+msgid ""
+"The DATA RW pin selects the direction of data buffer.\n"
+"Must be set to GND if your programmer does not use bi-directionnal buffer."
+msgstr ""
+
+#: libgui/toplevel.cpp:731
+msgid "The Pikloops utility (%1) is not installed in your system."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:28
+msgid ""
+"The VDD pin is used to apply 5V to the programmed device.\n"
+"Must be set to GND if your programmer doesn't control the VDD line."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:25
+msgid "The VPP pin is used to select the high voltage programming mode."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:675
+msgid "The calibration word %1 is not valid."
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:65
+msgid "The current programmer \"%1\" does not support device \"%2\"."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:662
+msgid "The device cannot be erased first by the selected programmer so programming may fail..."
+msgstr ""
+
+#: libgui/gui_prog_manager.cpp:38
+msgid "The device memory is in an unknown state. You may want to reprogram the device. Continue anyway?"
+msgstr ""
+
+#: libgui/likeback.cpp:396
+msgid "The email address is optional. If you do not provide any, your comments will be sent anonymously. Just click OK in that case."
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:1313
+msgid "The files/URLs opened by the application will be deleted after use"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:142
+msgid ""
+"The firmware version (%1) is higher than the version tested with piklab (%2%3).\n"
+"You may experience problems."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:158
+msgid ""
+"The firmware version (%1) is lower than the recommended version (%2%3).\n"
+"It is recommended to upgrade the firmware."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:150
+msgid ""
+"The firmware version (%1) is lower than the version tested with piklab (%2%3).\n"
+"You may experience problems."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:167
+msgid "The first argument should be \"e\"."
+msgstr ""
+
+#: piklab-hex/main.cpp:170
+#, fuzzy
+msgid "The first hex file is a subset of the second one."
+msgstr "Hex-Dateiname wurde nicht angegeben."
+
+#: piklab-prog/cli_interactive.cpp:299
+msgid "The given value is too large (max: %1)."
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:71
+msgid "The hardware name is already used for a standard hardware."
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:113
+msgid "The number of active breakpoints is higher than the maximum for the current debugger (%1): disabling the last breakpoint."
+msgstr ""
+
+#: libgui/toplevel.cpp:904
+msgid "The project hex file may not be up-to-date since some project files have been modified."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:650
+msgid "The range cannot be erased first by the selected programmer so programming may fail..."
+msgstr ""
+
+#: piklab-hex/main.cpp:171
+#, fuzzy
+msgid "The second hex file is a subset of the first one."
+msgstr "Hex-Dateiname wurde nicht angegeben."
+
+#: piklab-prog/cmdline.cpp:335
+#, fuzzy
+msgid "The selected device \"%1\" is not supported by the selected programmer."
+msgstr "Bauteil wird von der Verarbeitungskette nicht unterstützt."
+
+#: libgui/register_view.cpp:45
+msgid "The selected device has no register."
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:101
+msgid "The selected device is not supported by this programmer."
+msgstr ""
+
+#: libgui/gui_prog_manager.cpp:29
+#, fuzzy
+msgid "The selected operation will stop the debugging session. Continue anyway?"
+msgstr "Bauteil wird von der Verarbeitungskette nicht unterstützt."
+
+#: devices/pic/prog/pic_prog.cpp:500
+msgid "The selected programmer cannot read %1: operation skipped."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:298
+msgid "The selected programmer cannot read device memory."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:486 devices/pic/prog/pic_prog.cpp:557
+msgid "The selected programmer cannot read the specified memory range."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:442
+msgid "The selected programmer does not support erasing neither the specified range nor the whole device."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:394
+msgid "The selected programmer does not support erasing the whole device."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:341
+msgid "The selected programmer does not supported the specified hardware configuration (\"%1\")."
+msgstr ""
+
+#: tools/list/compile_manager.cpp:135
+msgid "The selected toolchain (%1) cannot assemble file. It only supports files with extensions: %2"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:110
+msgid "The selected toolchain (%1) cannot compile file. It only supports files with extensions: %2"
+msgstr ""
+
+#: tools/base/tool_group.cpp:130
+#, fuzzy
+msgid "The selected toolchain (%1) does not support device %2. Continue anyway?"
+msgstr "Bauteil wird von der Verarbeitungskette nicht unterstützt."
+
+#: libgui/project_wizard.cpp:206
+msgid "The selected toolchain can only compile a single source file and you have selected %1 source files. Continue anyway? "
+msgstr ""
+
+#: tools/list/compile_manager.cpp:72
+msgid "The selected toolchain only supports single-file project."
+msgstr ""
+
+#: libgui/device_editor.cpp:64
+msgid "The target device is not configured and cannot be guessed from source file. The source file either cannot be found or does not contain any processor directive."
+msgstr ""
+
+#: libgui/gui_debug_manager.cpp:88
+msgid "The toolchain in use does not generate all necessary debugging information with the selected device. This may reduce debugging capabilities."
+msgstr ""
+
+#: piklab-hex/main.cpp:172
+msgid "The two hex files are different at address %1."
+msgstr ""
+
+#: piklab-hex/main.cpp:169
+#, fuzzy
+msgid "The two hex files have the same content."
+msgstr "Hex-Dateiname wurde nicht angegeben."
+
+#: tools/base/tool_group.cpp:128
+msgid "There were errors detecting supported devices for the selected toolchain (%1). Please check the toolchain configuration. Continue anyway?"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:204
+#, fuzzy
+msgid "This command needs a commands filename."
+msgstr "Dieser Befehl brauch als Argument einen Dateinamen von einer Hex-Datei"
+
+#: piklab-prog/cli_interactive.cpp:216
+#, fuzzy
+msgid "This command needs an hex filename."
+msgstr "Dieser Befehl brauch als Argument einen Dateinamen von einer Hex-Datei"
+
+#: piklab-prog/cli_interactive.cpp:218
+#, fuzzy
+msgid "This command takes no argument."
+msgstr "Dieser Befehl kann nicht mit Argumenten versehen werden"
+
+#: piklab-prog/cli_interactive.cpp:128
+msgid "This command takes no or one argument"
+msgstr "Dieser Befehl kann mit einem Argument benutzt werden"
+
+#: piklab-prog/cli_interactive.cpp:185
+#, fuzzy
+msgid "This command takes no or two argument."
+msgstr "Dieser Befehl nimmt keinen oder zwei Argumente an"
+
+#: piklab-prog/cli_interactive.cpp:139 piklab-prog/cli_interactive.cpp:143
+#: piklab-prog/cli_interactive.cpp:189
+#, fuzzy
+msgid "This command takes one argument."
+msgstr "Dieser Befehl braucht ein Argument"
+
+#: piklab-prog/cli_interactive.cpp:150
+#, fuzzy
+msgid "This command takes one or two argument."
+msgstr "Dieser Befehl nimmt einen oder zwei Argumente an"
+
+#: piklab-prog/cli_interactive.cpp:135
+#, fuzzy
+msgid "This command takes two arguments."
+msgstr "Dieser Befehl braucht zwei Argumente"
+
+#: progs/gui/prog_group_ui.cpp:100
+msgid "This device has no calibration information."
+msgstr ""
+
+#: libgui/likeback.cpp:174
+msgid "This is a quick feedback system for %1."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:645
+msgid "This memory range is programming protected."
+msgstr "Dieser Speicherbereich ist vor Überschreibung geschützt."
+
+#: progs/direct/base/direct.cpp:38
+msgid ""
+"This pin is driven by the programmed device.\n"
+"Without device, it must follow the \"Data out\" pin (when powered on)."
+msgstr ""
+
+#: common/nokde/nokde_kaboutdata.cpp:437
+msgid "This program is distributed under the terms of the %1."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:77
+msgid "This programmer pulses MCLR from 5V to 0V and then 12V to enter programming mode. It uses a multiplexer to switch between 5V and 12V (Vdd is here the multiplexer pin).<p>Webpage: <a href=\"http://www.epemag.wimborne.co.uk/1001.htm\">http://www.epemag.wimborne.co.uk/1001.htm</a>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:272
+msgid "This tool cannot be automatically detected."
+msgstr ""
+
+#: libgui/config_gen.cpp:119
+msgid "This toolchain does not need explicit config bits."
+msgstr ""
+
+#: progs/pickit2/base/pickit_prog.cpp:49
+msgid "This will overwrite the device code memory. Continue anyway?"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:161
+#: tools/gui/toolchain_config_widget.cpp:178
+msgid "Timeout"
+msgstr "Zeitüberschreitung"
+
+#: progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp:30
+msgid "Timeout (ms):"
+msgstr "Zeitüberschreitung (ms):"
+
+#: common/port/serial.cpp:280
+msgid "Timeout receiving data (%1/%2 bytes received)."
+msgstr ""
+
+#: common/port/serial.cpp:306
+msgid "Timeout sending data (%1 bytes left)."
+msgstr ""
+
+#: common/port/serial.cpp:235
+msgid "Timeout sending data (%1/%2 bytes sent)."
+msgstr ""
+
+#: progs/icd1/base/icd1_serial.cpp:51
+msgid "Timeout synchronizing."
+msgstr ""
+
+#: progs/gpsim/base/gpsim.cpp:72
+msgid "Timeout waiting for \"gpsim\"."
+msgstr ""
+
+#: common/port/serial.cpp:265
+msgid "Timeout waiting for data."
+msgstr ""
+
+#: progs/direct/base/direct_mem24.cpp:125
+msgid "Timeout writing at address %1"
+msgstr ""
+
+#: common/port/usb_port.cpp:394
+msgid "Timeout: only some data received (%1/%2 bytes)."
+msgstr ""
+
+#: common/port/usb_port.cpp:360
+msgid "Timeout: only some data sent (%1/%2 bytes)."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:144
+msgid "Timer1"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:95
+msgid "Timer1 interrupt service routine"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:114
+msgid "Timer1 oscillator mode"
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader_prog.h:31
+msgid "Tiny Bootloader"
+msgstr "Tiny Bootloader"
+
+#: libgui/likeback.cpp:175
+msgid "To help us improve it, your comments are important."
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:140
+msgid "Toggle Device Power..."
+msgstr ""
+
+#: piklab-hex/main.cpp:72 piklab-coff/main.cpp:61
+msgid "Too few arguments."
+msgstr "Zu wenige übergebene Argumente."
+
+#: piklab-hex/main.cpp:73 piklab-prog/cli_interactive.cpp:214
+#: piklab-prog/cli_interactive.cpp:217 piklab-prog/cmdline.cpp:215
+#: piklab-coff/main.cpp:62
+msgid "Too many arguments."
+msgstr "Zu viele übergebene Argumente."
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:145
+msgid "Too many failures: bailing out."
+msgstr "Zu viele Fehler: Versuche das Beste draus zu machen."
+
+#: libgui/project_editor.cpp:56
+#, fuzzy
+msgid "Toochain"
+msgstr "<Toolchain>"
+
+#: libgui/config_gen.cpp:48
+msgid "Tool Type:"
+msgstr ""
+
+#: libgui/toplevel.cpp:216
+msgid "Tool Views"
+msgstr ""
+
+#: tools/list/tools_config_widget.cpp:45 libgui/config_gen.cpp:39
+#: libgui/project_wizard.cpp:134
+msgid "Toolchain:"
+msgstr ""
+
+#: tools/list/device_info.cpp:51
+msgid "Tools"
+msgstr ""
+
+#: libgui/likeback.cpp:657
+msgid "Transfer Error"
+msgstr "Übertragungsfehler"
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:23
+#, fuzzy
+msgid "Trying to enter bootloader mode..."
+msgstr "Programmiergerät ist im Bootladermodus."
+
+#: coff/base/coff_object.cpp:141
+msgid "Type Definition"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:76
+msgid "USART"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:75 progs/gui/port_selector.cpp:21
+msgid "USB"
+msgstr "USB"
+
+#: common/port/port.cpp:63
+msgid "USB Port"
+msgstr "USB Port"
+
+#: progs/picdem_bootloader/gui/picdem_bootloader_ui.cpp:25
+#, fuzzy
+msgid "USB Product Id:"
+msgstr "USB Port"
+
+#: progs/picdem_bootloader/gui/picdem_bootloader_ui.cpp:19
+msgid "USB Vendor Id:"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:197
+msgid "USB clock (PLL divided by)"
+msgstr ""
+
+#: common/port/usb_port.cpp:266
+#, fuzzy
+msgid "USB support disabled"
+msgstr " Keinen Port erkannt"
+
+#: common/global/about.cpp:90
+msgid "USB support for ICD2 programmer."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:127
+msgid "USB voltage regulator"
+msgstr "USB Spannungsregler"
+
+#: devices/pic/base/pic_config.cpp:85
+msgid "Undefined"
+msgstr ""
+
+#: coff/base/coff_object.cpp:135
+msgid "Undefined Label"
+msgstr ""
+
+#: coff/base/coff_object.cpp:123
+msgid "Undefined Section"
+msgstr ""
+
+#: coff/base/coff_object.cpp:142
+msgid "Undefined Static"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:173
+msgid "Unexpected answer ($7F00) from ICD2 (%1)."
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:180
+msgid "Unexpected answer (08) from ICD2 (%1)."
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:674
+msgid "Unexpected argument '%1'."
+msgstr ""
+
+#: devices/base/hex_buffer.cpp:140
+msgid "Unexpected end-of-file."
+msgstr ""
+
+#: devices/base/hex_buffer.cpp:141
+msgid "Unexpected end-of-line (line %1)."
+msgstr ""
+
+#: coff/base/coff_object.cpp:329
+msgid "Uninitialized Data"
+msgstr ""
+
+#: coff/base/coff_object.cpp:167
+#, fuzzy
+msgid "Union"
+msgstr "Unbekannt"
+
+#: coff/base/coff_object.cpp:140
+msgid "Union Tag"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:57
+msgid "Unitialized variables in X-space"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:61
+msgid "Unitialized variables in Y-space"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:65
+msgid "Unitialized variables in near data memory"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:25
+msgid "Unix"
+msgstr "Unix"
+
+#: tools/gui/toolchain_config_widget.cpp:225
+#: devices/base/generic_device.cpp:21 coff/base/text_coff.cpp:256
+msgid "Unknown"
+msgstr "Unbekannt"
+
+#: common/common/purl_base.cpp:57
+msgid "Unknown File"
+msgstr "Unbekannte Datei"
+
+#: common/cli/cli_main.cpp:29
+msgid "Unknown command: %1"
+msgstr "Befehl %1 ist nicht bekannt."
+
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:47
+msgid "Unknown device"
+msgstr "Unbekannter Kontroller"
+
+#: piklab-hex/main.cpp:223 piklab-prog/cmdline.cpp:364
+#: piklab-coff/main.cpp:238
+msgid "Unknown device \"%1\"."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:278
+msgid "Unknown device."
+msgstr "Unbekanntes Bauteil."
+
+#: coff/base/coff_archive.cpp:92
+#, fuzzy
+msgid "Unknown file member offset: %1"
+msgstr "Hex-Dateiformat:"
+
+#: piklab-prog/cmdline.cpp:379
+#, fuzzy
+msgid "Unknown hex file format \"%1\"."
+msgstr "Hex-Dateiformat:"
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:84
+msgid "Unknown id returned by bootloader (%1 read and %2 expected)."
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:521
+#: common/nokde/nokde_kcmdlineargs.cpp:537
+msgid "Unknown option '%1'."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:353
+msgid "Unknown programmer \"%1\"."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:397 piklab-prog/cmdline.cpp:445
+msgid "Unknown property \"%1\""
+msgstr ""
+
+#: piklab-hex/main.cpp:235 piklab-hex/main.cpp:248 piklab-coff/main.cpp:241
+#: piklab-coff/main.cpp:250
+#, fuzzy
+msgid "Unknown property \"%1\"."
+msgstr "Hex-Dateiformat:"
+
+#: piklab-prog/cli_interactive.cpp:307
+msgid "Unknown register or variable name."
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:221 progs/sdcdb/base/sdcdb_debug.cpp:220
+msgid "Unknown state for IO bit: %1 (%2)"
+msgstr ""
+
+#: piklab-hex/main.cpp:183
+msgid "Unprotected checksum: %1"
+msgstr ""
+
+#: devices/base/hex_buffer.cpp:139
+#, fuzzy
+msgid "Unrecognized format (line %1)."
+msgstr "Nicht erkannte Hex-Datei."
+
+#: coff/base/cdb_parser.cpp:86
+#, fuzzy
+msgid "Unrecognized record"
+msgstr "Nicht erkannte Hex-Datei."
+
+#: piklab-prog/cli_interactive.cpp:40
+msgid "Unset property value: \"unset <property>\"."
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:44
+msgid "Unsigned"
+msgstr ""
+
+#: coff/base/coff_object.cpp:170
+msgid "Unsigned Char"
+msgstr ""
+
+#: coff/base/coff_object.cpp:172
+#, fuzzy
+msgid "Unsigned Int"
+msgstr "Pin Zuordnung"
+
+#: coff/base/coff_object.cpp:173
+msgid "Unsigned Long"
+msgstr ""
+
+#: coff/base/coff_object.cpp:171
+msgid "Unsigned Short"
+msgstr ""
+
+#: devices/base/device_group.cpp:36
+msgid "Unsupported"
+msgstr "Nicht unterstützt"
+
+#: common/common/group.cpp:14
+#, fuzzy
+msgid "Untested"
+msgstr "Ungetestet"
+
+#: tools/gui/toolchain_config_center.cpp:27
+msgid "Update"
+msgstr "Update"
+
+#: piklab-prog/cmdline.cpp:51
+msgid "Upload firmware to programmer: \"upload_firmware <hexfilename>\"."
+msgstr ""
+
+#: progs/pickit2/base/pickit2_prog.cpp:65
+#, fuzzy
+msgid "Uploading Firmware..."
+msgstr " Lade PICkit2 Firmware hoch..."
+
+#: piklab-prog/cmdline.cpp:321
+#, fuzzy
+msgid "Uploading firmware is not supported for the specified programmer."
+msgstr "Das angegebene Programmiergerät unterstützt kein Debugging."
+
+#: progs/base/generic_prog.cpp:262
+#, fuzzy
+msgid "Uploading firmware..."
+msgstr " Lade PICkit2 Firmware hoch..."
+
+#: progs/gui/prog_group_ui.cpp:67
+#, fuzzy
+msgid "Uploading..."
+msgstr "lese..."
+
+#: coff/base/cdb_parser.cpp:30
+msgid "Upper-128-byte Pointer"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:838
+msgid "Usage: %1 %2\n"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:783
+msgid "Use --help to get a list of available command line options."
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:83
+msgid "Used Mask:"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:27 coff/base/coff_object.cpp:328
+msgid "User IDs"
+msgstr ""
+
+#: piklab-prog/cli_prog_manager.cpp:22
+msgid "Using port from configuration file."
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:73
+msgid "Value:"
+msgstr "Wert:"
+
+#: devices/pic/gui/pic_group_ui.cpp:68
+msgid "Variables"
+msgstr "Variablen"
+
+#: tools/gputils/gputils_generator.cpp:58
+#: tools/gputils/gputils_generator.cpp:128
+#: tools/gputils/gputils_generator.cpp:208
+#, fuzzy
+msgid "Variables declaration"
+msgstr "Variablen"
+
+#: piklab-coff/main.cpp:146
+#, fuzzy
+msgid "Variables:"
+msgstr "Variablen"
+
+#: devices/base/device_group.cpp:295
+msgid "Vdd (V)"
+msgstr "Vdd (V)"
+
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:102
+msgid "Vdd voltage level error; "
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:49
+msgid "Velleman K8048"
+msgstr "Velleman K8048"
+
+#: progs/base/prog_config.cpp:70
+#, fuzzy
+msgid "Verify device memory after programming."
+msgstr "Hex-Datei für Programmierzwecke."
+
+#: piklab-prog/cmdline.cpp:43
+msgid "Verify device memory: \"verify <hexfilename>\"."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:379
+msgid "Verifying successful."
+msgstr "Vergleich erfolgreich."
+
+#: progs/base/generic_prog.cpp:34 progs/base/generic_prog.cpp:377
+msgid "Verifying..."
+msgstr "vergleiche..."
+
+#: progs/icd2/gui/icd2_group_ui.cpp:31 progs/gui/prog_group_ui.cpp:68
+#: libgui/project_editor.cpp:41
+msgid "Version:"
+msgstr "Version:"
+
+#: libgui/project_manager_ui.cpp:34
+msgid "Views"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:35 coff/base/coff_object.cpp:159
+msgid "Void"
+msgstr ""
+
+#: libgui/device_gui.cpp:413
+msgid "Voltage-Frequency Graphs"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:79
+msgid "Voltages"
+msgstr "Spannungen"
+
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:101
+msgid "Vpp voltage level error; "
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:90
+msgid "WDT post-scaler"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:81
+msgid "Wake-up reset"
+msgstr ""
+
+#: tools/gputils/gputils_config.cpp:13 tools/c18/c18_config.cpp:12
+msgid "Warning and errors"
+msgstr "Warnungen und Fehler"
+
+#: tools/gputils/gui/gputils_ui.cpp:24 tools/c18/gui/c18_ui.cpp:23
+msgid "Warning level:"
+msgstr "Warnungsgrad:"
+
+#: devices/pic/gui/pic_register_view.cpp:85
+#: devices/pic/gui/pic_register_view.cpp:224
+msgid "Watch"
+msgstr "Überwache"
+
+#: libgui/watch_view.cpp:110
+msgid "Watch Register"
+msgstr "Überwache Register"
+
+#: libgui/toplevel.cpp:127
+msgid "Watch View"
+msgstr "Watch View"
+
+#: devices/pic/base/pic_config.cpp:188
+msgid "Watchdog"
+msgstr "Watchdog"
+
+#: devices/pic/base/pic_config.cpp:33
+msgid "Watchdog timer"
+msgstr "Watchdog timer"
+
+#: devices/pic/base/pic_config.cpp:267
+#, fuzzy
+msgid "Watchdog timer postscaler"
+msgstr "Watchdog timer"
+
+#: devices/pic/base/pic_config.cpp:266
+#, fuzzy
+msgid "Watchdog timer prescaler"
+msgstr "Watchdog timer"
+
+#: devices/pic/base/pic_config.cpp:186
+msgid "Watchdog timer prescaler A"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:187
+msgid "Watchdog timer prescaler B"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:106 devices/pic/base/pic_config.cpp:265
+msgid "Watchdog timer window"
+msgstr ""
+
+#: libgui/watch_view.cpp:87
+#, fuzzy
+msgid "Watched"
+msgstr "Überwache"
+
+#: progs/direct/base/direct_prog_config.cpp:52
+msgid "Webpage: <a href=\"htpp://k9spud.com/hoodmicro\">htpp://k9spud.com/hoodmicro</a>"
+msgstr ""
+
+#: libgui/likeback.cpp:95
+msgid "What's &This?"
+msgstr "Was ist &Das?"
+
+#: tools/base/generic_tool.cpp:26
+msgid "Windows"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:88
+msgid "Write Mask:"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:48
+msgid "Write and read raw commands to port from given file."
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:181 progs/sdcdb/base/sdcdb_debug.cpp:180
+msgid "Writing PC is not supported by gpsim"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:161 progs/sdcdb/base/sdcdb_debug.cpp:160
+msgid "Writing registers is not supported by this version of gpsim"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:33
+msgid "Wrong format for file size \"%1\"."
+msgstr ""
+
+#: progs/psp/base/psp.cpp:174
+msgid "Wrong programmer connected"
+msgstr "Falsches Programmiergerät angeschlossen"
+
+#: progs/icd2/base/icd2.cpp:224
+msgid "Wrong return value (\"%1\"; was expecting \"%2\")"
+msgstr "Falscher Rückgabewert (\"%1\"; erwartet wurde \"%2\")"
+
+#: devices/pic/base/pic_config.cpp:148 devices/pic/base/pic_config.cpp:163
+msgid "XT Crystal"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:151 devices/pic/base/pic_config.cpp:166
+msgid "XT Crystal with 16x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:149 devices/pic/base/pic_config.cpp:164
+msgid "XT Crystal with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:150 devices/pic/base/pic_config.cpp:165
+msgid "XT Crystal with 8x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:259
+#, fuzzy
+msgid "XT crystal oscillator"
+msgstr "Externer RC-Schwinger"
+
+#: libgui/likeback.cpp:397
+msgid "You can change or remove your email address whenever you want. For that, use the little arrow icon at the top-right corner of a window."
+msgstr ""
+
+#: libgui/gui_debug_manager.cpp:104
+msgid "You cannot set breakpoints when a debugger is not selected."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:39
+msgid "You must disconnect 7407 pin 2"
+msgstr ""
+
+#: progs/icd2/gui/icd2_group_ui.cpp:53
+msgid "You need to initiate debugging to read the debug executive version."
+msgstr ""
+
+#: libgui/toplevel.cpp:534
+msgid "You need to specify a device to create a new hex file."
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:59
+msgid "You need to specify the device for programming."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:209
+msgid "You need to specify the range."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:292
+msgid "You need to start the debugging session first (with \"start\")."
+msgstr ""
+
+#: progs/gui/port_selector.cpp:61
+msgid "Your computer might not have any parallel port or the /dev/parportX device has not been created.<br>Use \"mknod /dev/parport0 c 99 0\" to create it<br>and \"chmod a+rw /dev/parport0\" to make it RW enabled."
+msgstr ""
+
+#: progs/gui/port_selector.cpp:58
+msgid "Your computer might not have any serial port."
+msgstr ""
+
+#: libgui/likeback.cpp:398
+msgid "Your email address (keep empty to post comments anonymously):"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:818
+msgid "[%1-options]"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:811
+msgid "[options] "
+msgstr ""
+
+#: _translatorinfo.cpp:3
+msgid ""
+"_: EMAIL OF TRANSLATORS\n"
+"Your emails"
+msgstr "vonHalenbach at users sf d0t net"
+
+#: _translatorinfo.cpp:1
+msgid ""
+"_: NAME OF TRANSLATORS\n"
+"Your names"
+msgstr "Stefan von Halenbach"
+
+#: tools/pic30/pic30_generator.cpp:63
+msgid "allocating 2 bytes"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:59 tools/pic30/pic30_generator.cpp:67
+msgid "allocating 4 bytes"
+msgstr ""
+
+#: tools/gui/tool_config_widget.cpp:126 tools/gputils/gui/gputils_ui.cpp:30
+msgid "as in LIST directive"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:104
+msgid "at line #%1, column #%2"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:77
+msgid "call _wreg_init subroutine"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:99
+msgid "clear Timer1 interrupt flag status bit"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:48
+msgid "declare Timer1 ISR"
+msgstr ""
+
+#: devices/gui/register_view.cpp:71
+msgid "driven high"
+msgstr ""
+
+#: devices/gui/register_view.cpp:71
+msgid "driven low"
+msgstr ""
+
+#: devices/gui/register_view.cpp:67
+msgid "driving high"
+msgstr ""
+
+#: devices/gui/register_view.cpp:67
+msgid "driving low"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:138
+msgid "empty name"
+msgstr ""
+
+#: tools/list/compile_process.cpp:359
+msgid "error: "
+msgstr "Fehler:"
+
+#: tools/pic30/pic30_generator.cpp:97
+msgid "example of context saving (push W4 and W5)"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:76
+#: tools/gputils/gputils_generator.cpp:135
+#: tools/gputils/gputils_generator.cpp:214
+msgid "example variable"
+msgstr "Beispiel-Variable"
+
+#: tools/gputils/gputils_generator.cpp:146
+msgid "for restoringing context"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:139
+#, fuzzy
+msgid "for saving context"
+msgstr "Löschung beendet"
+
+#: tools/gputils/gputils_generator.cpp:225
+msgid "go to start of high priority interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:161
+msgid "go to start of int pin interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:95
+msgid "go to start of interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:91
+#: tools/gputils/gputils_generator.cpp:157
+#: tools/gputils/gputils_generator.cpp:221
+msgid "go to start of main code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:173
+msgid "go to start of peripheral interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:169
+msgid "go to start of t0cki interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:165
+msgid "go to start of timer0 interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:238
+msgid "high priority interrupt service routine"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:223
+#, fuzzy
+msgid "high priority interrupt vector"
+msgstr "Linker Script Verzeichnis"
+
+#: tools/gputils/gputils_generator.cpp:90
+msgid "initialize PCLATH"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:73
+msgid "initialize stack pointer"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:74
+msgid "initialize stack pointer limit register"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:181
+msgid "insert INT pin interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:193
+msgid "insert T0CKI interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:187
+msgid "insert TIMER0 interrupt code"
+msgstr ""
+
+#: tools/boost/boost_generator.cpp:52 tools/boost/boost_generator.cpp:76
+#: tools/jal/jal_generator.cpp:31 tools/gputils/gputils_generator.cpp:52
+#: tools/sdcc/sdcc_generator.cpp:114 tools/pic30/pic30_generator.cpp:79
+msgid "insert code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:240
+msgid "insert high priority interrupt code"
+msgstr ""
+
+#: tools/boost/boost_generator.cpp:47 tools/gputils/gputils_generator.cpp:109
+#: tools/sdcc/sdcc_generator.cpp:102 tools/pic30/pic30_generator.cpp:98
+msgid "insert interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:232
+msgid "insert low priority interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:121
+#: tools/gputils/gputils_generator.cpp:176
+#: tools/gputils/gputils_generator.cpp:244
+msgid "insert main code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:199
+#, fuzzy
+msgid "insert peripheral interrupt code"
+msgstr "Linker Script Verzeichnis"
+
+#: tools/boost/boost_generator.cpp:45 tools/sdcc/sdcc_generator.cpp:101
+msgid "interrupt service routine"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:93
+#, fuzzy
+msgid "interrupt vector"
+msgstr "Linker Script Verzeichnis"
+
+#: tools/jal/jal_generator.cpp:23
+msgid "jal standard library"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:47
+msgid "label for code start"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:89
+msgid "load upper byte of 'start' label"
+msgstr ""
+
+#: tools/boost/boost_generator.cpp:77 tools/jal/jal_generator.cpp:32
+#: tools/gputils/gputils_generator.cpp:53
+#: tools/gputils/gputils_generator.cpp:122
+#: tools/gputils/gputils_generator.cpp:177
+#: tools/gputils/gputils_generator.cpp:245 tools/pic30/pic30_generator.cpp:82
+msgid "loop forever"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:227
+#, fuzzy
+msgid "low priority interrupt vector"
+msgstr "Linker Script Verzeichnis"
+
+#: tools/jal/jal_generator.cpp:30
+msgid "main code"
+msgstr "Hauptprogramm"
+
+#: tools/boost/boost_generator.cpp:50 tools/boost/boost_generator.cpp:74
+msgid "main program"
+msgstr "Hauptprogramm"
+
+#: tools/list/compile_process.cpp:360
+msgid "message: "
+msgstr "Nachricht:"
+
+#: tools/gputils/gputils_generator.cpp:88
+#: tools/gputils/gputils_generator.cpp:155
+#: tools/gputils/gputils_generator.cpp:156
+#: tools/gputils/gputils_generator.cpp:219
+#: tools/gputils/gputils_generator.cpp:220
+msgid "needed for ICD2 debugging"
+msgstr "Benötigt für ICD2-Debugging"
+
+#: coff/base/cdb_parser.cpp:307
+#, fuzzy
+msgid "no register defined"
+msgstr "Kein Register"
+
+#: tools/pic30/pic30_generator.cpp:76
+msgid "nop after SPLIM initialization"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:198 devices/pic/base/pic_config.cpp:200
+#: devices/pic/base/pic_config.cpp:202
+msgid "not divided"
+msgstr "Nicht getrennt"
+
+#: devices/pic/gui/pic_memory_editor.cpp:114
+#: devices/pic/gui/pic_memory_editor.cpp:121
+#, fuzzy
+msgid "not present"
+msgstr "<not set>"
+
+#: progs/direct/gui/direct_config_widget.cpp:53
+msgid "on"
+msgstr "auf"
+
+#: tools/gputils/gputils_generator.cpp:105
+msgid "only required if using more than first page"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:197
+#, fuzzy
+msgid "peripheral interrupt service routine"
+msgstr "Hauptkonfiguration"
+
+#: tools/gputils/gputils_generator.cpp:49
+#: tools/gputils/gputils_generator.cpp:97
+msgid "relocatable code"
+msgstr ""
+
+#: common/nokde/nokde_kaboutdata.cpp:374
+msgid "replace this with information about your translation team"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:86
+#: tools/gputils/gputils_generator.cpp:153
+#: tools/gputils/gputils_generator.cpp:217
+msgid "reset vector"
+msgstr "reset vector"
+
+#: tools/gputils/gputils_generator.cpp:111
+#: tools/gputils/gputils_generator.cpp:114
+#: tools/gputils/gputils_generator.cpp:233
+msgid "restore context"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:100
+msgid "restore context from stack"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:100
+#: tools/gputils/gputils_generator.cpp:229
+msgid "save context"
+msgstr ""
+
+#: piklab-coff/main.cpp:183
+#, fuzzy
+msgid "section \"%1\":"
+msgstr "Erkennung \"%1\"..."
+
+#: coff/base/coff_archive.cpp:118
+#, fuzzy
+msgid "size: %1 bytes"
+msgstr "%1 bytes"
+
+#: piklab-coff/main.cpp:189
+msgid "symbol \"%1\""
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:644
+msgid "the 2nd argument is a list of name+address, one on each line"
+msgstr ""
+
+#: piklab-coff/main.cpp:167
+msgid "type=\"%1\" address=%2 size=%3 flags=%4"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:115 coff/base/cdb_parser.cpp:161
+msgid "unexpected end of line"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:294
+msgid "unknown AddressSpaceType"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:272
+#, fuzzy
+msgid "unknown DCLType"
+msgstr "Undefiniert"
+
+#: coff/base/cdb_parser.cpp:238
+#, fuzzy
+msgid "unknown ScopeType"
+msgstr "Undefiniert"
+
+#: coff/base/cdb_parser.cpp:282
+#, fuzzy
+msgid "unknown Sign"
+msgstr "Unbekannte Datei"
+
+#: devices/gui/register_view.cpp:66 devices/gui/register_view.cpp:70
+msgid "unknown state"
+msgstr "Undefiniert"
+
+#: tools/gputils/gputils_generator.cpp:68
+#: tools/gputils/gputils_generator.cpp:69
+#: tools/gputils/gputils_generator.cpp:72
+#: tools/gputils/gputils_generator.cpp:81
+msgid "variable used for context saving"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:130
+#: tools/gputils/gputils_generator.cpp:131
+#: tools/gputils/gputils_generator.cpp:132
+#: tools/gputils/gputils_generator.cpp:133
+#: tools/gputils/gputils_generator.cpp:210
+#: tools/gputils/gputils_generator.cpp:211
+#: tools/gputils/gputils_generator.cpp:212
+msgid "variable used for context saving (for low-priority interrupts only)"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:80
+msgid "variables used for context saving"
+msgstr ""
+
+#: tools/list/compile_process.cpp:358
+msgid "warning: "
+msgstr "Warnung:"
+
+#: coff/base/cdb_parser.cpp:128
+msgid "was expecting '%1'"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:200
+msgid "was expecting a bool ('%1')"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:177
+msgid "was expecting an uint"
+msgstr ""
+
+#~ msgid "Number format not recognized"
+#~ msgstr "Zahlensystem nicht erkannt"
+
+#~ msgid "Too many arguments"
+#~ msgstr "Zu viele übergebene Argumente."
+
+#~ msgid "Coff"
+#~ msgstr "Coff"
+
+#, fuzzy
+#~ msgid "Device Id"
+#~ msgstr "Bauteilkennung ID"
+
+#~ msgid "Elf"
+#~ msgstr "Elf"
+
+#~ msgid "Version"
+#~ msgstr "Version"
+
+#~ msgid " <default>"
+#~ msgstr " <Standard>"
+
+#, fuzzy
+#~ msgid "Return informations about files (for archive)."
+#~ msgstr "Kann COFF-Datei nicht öffnen."
+
+#~ msgid " Already Loaded"
+#~ msgstr " Bereits geladen"
+
+#~ msgid "Error reading COFF file."
+#~ msgstr "Fehler! Kann COFF-Datei nicht lesen."
+
+#, fuzzy
+#~ msgid "Stepping..."
+#~ msgstr "Automatische Erkennung..."
+
+#~ msgid "Program all memory even if not needed (slower)."
+#~ msgstr "Programmiere den gesamten Speicher, auch wenn es nicht nötig ist (Langsamer)."
+
+#, fuzzy
+#~ msgid "24J Family"
+#~ msgstr "24F Familie"
+
+#~ msgid "Enhanced Flash"
+#~ msgstr "Verbesserter Flashspeicher"
+
+#~ msgid "Halting..."
+#~ msgstr "Halte an..."
+
+#~ msgid "Standard Flash"
+#~ msgstr "Normaler Flashspeicher"
+
+#~ msgid "&Interrupt"
+#~ msgstr "&Interrupt"
+
+#~ msgid "Reset."
+#~ msgstr "Reset."
+
+#~ msgid "Stop."
+#~ msgstr "Stopp"
+
+#~ msgid "Details"
+#~ msgstr "Details"
+
+#~ msgid "Program EEPROM (if supported)"
+#~ msgstr "Programmiere EEPROM (wenn unterstützt)"
+
+#~ msgid "Add File to Project"
+#~ msgstr "Füge Datei zum Projekt hinzu"
+
+#~ msgid "Preprocessor"
+#~ msgstr "Präprozessor"
+
+#~ msgid "Preprocessor:"
+#~ msgstr "Präprozessor:"
+
+#~ msgid "Check hex file for correctness."
+#~ msgstr "Überprüfe HEX-Datei auf Übereinstimmung."
+
+#~ msgid " not available"
+#~ msgstr " Nicht Verfügbar"
+
+#, fuzzy
+#~ msgid "Code-protected"
+#~ msgstr "Passwortgeschützt"
+
+#~ msgid "dsPICs Family"
+#~ msgstr "dsPICs Familie"
+
+#~ msgid "(%1 pins)"
+#~ msgstr "(%1 Beinchen)"
+
+#~ msgid "Reset"
+#~ msgstr "Reset"
+
+#~ msgid "Supported Programmers"
+#~ msgstr "Unterstützte Programmiergeräte"
+
+#~ msgid "Supported Tools"
+#~ msgstr "Unterstützte Werkzeuge"
+
+#~ msgid "%1 (rev. %3.%4)"
+#~ msgstr "%1 (rev. %3,%4)"
+
+#~ msgid "Debugger/Emulator"
+#~ msgstr "Debugger/Emulator"
+
+#, fuzzy
+#~ msgid "Ram Boot block size"
+#~ msgstr "Boot Block Größe"
+
+#, fuzzy
+#~ msgid "Bootloader"
+#~ msgstr "Boot Block"
+
+#, fuzzy
+#~ msgid "Bootloader:"
+#~ msgstr "Boot Block"
+
+#~ msgid "PICkit2"
+#~ msgstr "PICkit2"
+
+#~ msgid "Devices"
+#~ msgstr "Bauteile"
+
+#, fuzzy
+#~ msgid "Header"
+#~ msgstr "Header"
+
+#, fuzzy
+#~ msgid "Source"
+#~ msgstr "Sourcen"
+
+#~ msgid "ASM File"
+#~ msgstr "ASM-Datei"
+
+#, fuzzy
+#~ msgid "HEX File"
+#~ msgstr "Elf Datei"
+
+#, fuzzy
+#~ msgid "New HEX File..."
+#~ msgstr "Neue Hex-Datei..."
+
+#~ msgid "PIC30 Linker Script"
+#~ msgstr "PIC30 Linker Script"
+
+#, fuzzy
+#~ msgid "needed for icd2 debugging"
+#~ msgstr "Bereit für Debugging."
+
+#, fuzzy
+#~ msgid "nedded for icd2 debugging"
+#~ msgstr "Bereit für Debugging."
+
+#, fuzzy
+#~ msgid "&Show All"
+#~ msgstr "Zeige alles"
+
+#, fuzzy
+#~ msgid "One hex filename needs to be specified."
+#~ msgstr "Hex-Dateiname wurde nicht angegeben."
+
+#~ msgid "Create New Project"
+#~ msgstr "Neues Projekt erstellen"
+
+#~ msgid "&Close Current View"
+#~ msgstr "&Fenster schließen"
+
+#~ msgid "&Dynamic Word Wrap"
+#~ msgstr "&Dynamic Word Wrap"
+
+#~ msgid "&Split View"
+#~ msgstr "&Geteilte Ansicht"
+
+#~ msgid "Dos End Of Line"
+#~ msgstr "Dos Zeilenendemarkierung"
+
+#~ msgid "Uncomme&nt"
+#~ msgstr "Kommentar e&ntfernen"
+
+#~ msgid "Hide %1"
+#~ msgstr "Verstecke %1"
+
+#~ msgid "Show %1"
+#~ msgstr "Zeige %1"
diff --git a/po/es.po b/po/es.po
new file mode 100644
index 0000000..7e4fd69
--- /dev/null
+++ b/po/es.po
@@ -0,0 +1,6947 @@
+# piklab_es translation to spanish
+# This file is distributed under the same license as the piklab package.
+#
+# Changes:
+# - Initial translation
+#       Felipe Caminos Echeverría , 2007.
+#
+#
+#  Traductores, si no conoce el formato PO, merece la pena leer la
+#  documentación de gettext, especialmente las secciones dedicadas a este
+#  formato, por ejemplo ejecutando:
+#         info -n '(gettext)PO Files'
+#         info -n '(gettext)Header Entry'
+#
+# Si tiene dudas o consultas sobre esta traducción consulte con el último
+# traductor (campo Last-Translator) y ponga en copia a la lista de
+# traducción de Debian al español (<debian-l10n-spanish@lists.debian.org>)
+#
+msgid ""
+msgstr ""
+"Project-Id-Version: piklab_es\n"
+"Report-Msgid-Bugs-To: \n"
+"POT-Creation-Date: 2007-11-25 14:15+0100\n"
+"PO-Revision-Date: 2007-11-19 00:02-0300\n"
+"Last-Translator: Felipe Caminos <felipem@gigared.com>\n"
+"Language-Team: spanish <debian-l10n-spanish@lists.debian.org>\n"
+"MIME-Version: 1.0\n"
+"Content-Type: text/plain; charset=UTF-8\n"
+"Content-Transfer-Encoding: 8bit\n"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:802
+msgid ""
+"\n"
+"%1:\n"
+msgstr ""
+"\n"
+"%1:\n"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:946
+msgid ""
+"\n"
+"Arguments:\n"
+msgstr ""
+"\n"
+"Argumentos:\n"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:885
+msgid ""
+"\n"
+"Options:\n"
+msgstr ""
+"\n"
+"Opciones:\n"
+
+#: devices/pic/prog/pic_prog.cpp:109
+msgid "  %1 = %2 V: error in voltage level."
+msgstr "  %1 = %2 V: error en el nivel de voltaje."
+
+#: progs/icd2/base/icd2_debug_specific.cpp:58
+msgid "  According to ICD2 manual, instruction at address 0x0 should be \"nop\"."
+msgstr "  De acuerdo al manual ICD2, las instrucciones de la dirección 0x0 deberían ser «nop»."
+
+#: devices/pic/prog/pic_prog.cpp:387
+msgid "  Band gap bits have been preserved."
+msgstr "  Han sido preservados los bits de la banda gap."
+
+#: devices/pic/prog/pic_prog.cpp:630
+msgid "  Blank check successful"
+msgstr "  Verificación de borrado exitosa"
+
+#: progs/icd2/base/icd2_debug.cpp:314
+msgid "  Debug executive version: %1"
+msgstr "  Versión «debug executive»: %1"
+
+#: devices/pic/prog/pic_prog.cpp:626
+msgid "  EPROM device: blank checking first..."
+msgstr "  Dispositivo EEPROM: primero verificando que esté borrado..."
+
+#: devices/pic/prog/pic_prog.cpp:658 devices/pic/prog/pic_prog.cpp:714
+msgid "  Erasing device"
+msgstr "  Borrando dispositivo"
+
+#: progs/icd2/base/icd2_prog.cpp:111
+msgid "  Firmware succesfully uploaded."
+msgstr "  Firmware cargado exitosamente."
+
+#: progs/icd2/base/icd2_prog.cpp:82
+msgid "  Incorrect firmware loaded."
+msgstr "  Error al cargar el firmware."
+
+#: devices/pic/prog/pic_prog.cpp:360
+msgid "  Osccal backup has been preserved."
+msgstr "  Se mantuvo la copia de osccal."
+
+#: devices/pic/prog/pic_prog.cpp:355
+msgid "  Osccal backup is unchanged."
+msgstr "  La copia de osccal no se cambió."
+
+#: devices/pic/prog/pic_prog.cpp:346
+msgid "  Osccal has been preserved."
+msgstr "  Se mantuvo osccal."
+
+#: devices/pic/prog/pic_prog.cpp:341
+msgid "  Osccal is unchanged."
+msgstr "  Osccal no se cambió."
+
+#: progs/icd2/base/icd2_debug_specific.cpp:76
+#: progs/icd2/base/icd2_debug_specific.cpp:83
+#: progs/icd2/base/icd2_debug_specific.cpp:166
+#: progs/icd2/base/icd2_debug_specific.cpp:244
+msgid "  PC is not at address %1 (%2)"
+msgstr "  PC no está en la dirección %1 (%2)"
+
+#: devices/pic/prog/pic_prog.cpp:508
+msgid "  Part of device memory is protected (in %1) and cannot be verified."
+msgstr "  Parte de la memoria del dispositivo está protegida (en %1) y no pudo ser verificada."
+
+#: devices/pic/prog/pic_prog.cpp:512
+msgid "  Read memory: %1"
+msgstr "  Memoria de lectura: %1"
+
+#: devices/pic/prog/pic_prog.cpp:334
+msgid "  Replace invalid osccal with backup value."
+msgstr "  Reemplazar osccal inválido con la copia."
+
+#: progs/base/generic_prog.cpp:101
+msgid "  Set target self powered: %1"
+msgstr "  Establecer destino auto alimentado: %1"
+
+#: devices/pic/prog/pic_prog.cpp:277
+msgid "  Unknown or incorrect device (Read id is %1)."
+msgstr "  Dispositivo desconocido o incorrecto (la identificación leída es %1)."
+
+#: progs/pickit2/base/pickit2_prog.cpp:63
+msgid "  Uploading PICkit2 firmware..."
+msgstr "  Cargando el firmware PICkit2..."
+
+#: progs/icd2/base/icd2_debug.cpp:247
+msgid "  Verify debug executive"
+msgstr "  Verificar «debug executive»"
+
+#: devices/pic/prog/pic_prog.cpp:505
+msgid "  Verify memory: %1"
+msgstr "  Verificar memoria: %1"
+
+#: progs/icd2/base/icd2_debug.cpp:244
+msgid "  Write debug executive"
+msgstr "  Escribir «debug executive»"
+
+#: devices/pic/prog/pic_prog.cpp:565 devices/pic/prog/pic_prog.cpp:683
+#: devices/pic/prog/pic_prog.cpp:694
+msgid "  Write memory: %1"
+msgstr "  Escribir memoria: %1"
+
+#: devices/pic/pic/pic_group.cpp:31 devices/pic/pic/pic_group.cpp:37
+msgid " (%2 bits)"
+msgstr " (%2 bits)"
+
+#: libgui/project_manager_ui.cpp:106 libgui/project_manager_ui.cpp:175
+msgid " (default)"
+msgstr " (predeterminada)"
+
+#: devices/gui/register_view.cpp:72
+msgid " (input)"
+msgstr " (entrada)"
+
+#: devices/pic/pic/pic_group.cpp:38
+msgid " (not programmable)"
+msgstr " (no programable)"
+
+#: devices/gui/register_view.cpp:68
+msgid " (output)"
+msgstr " (salida)"
+
+#: devices/pic/gui/pic_memory_editor.cpp:255
+msgid " - not programmed by default"
+msgstr " - no programada por omisión"
+
+#: devices/pic/gui/pic_memory_editor.cpp:254
+#, fuzzy
+msgid " - recommended mask: %1"
+msgstr " - máscara de lectura %1"
+
+#: piklab-coff/main.cpp:176
+msgid " Filename:Line"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:137
+msgid " no port detected."
+msgstr " puerto no detectado."
+
+#: piklab-prog/cmdline.cpp:133
+msgid " support disabled."
+msgstr " ayuda deshabilitada."
+
+#: tools/gui/toolchain_config_widget.cpp:167
+msgid "\"%1\" found"
+msgstr "se encontró «%1»"
+
+#: tools/gui/toolchain_config_widget.cpp:234
+msgid "\"%1\" not found"
+msgstr "no se encontró «%1»"
+
+#: tools/gui/toolchain_config_widget.cpp:168
+msgid "\"%1\" not recognized"
+msgstr "no se reconoce «%1»"
+
+#: progs/gpsim/base/gpsim.cpp:68
+#, fuzzy
+msgid "\"gpsim\" unexpectedly exited."
+msgstr "salida inesperada de «gpsim»"
+
+#: coff/base/text_coff.cpp:252 coff/base/text_coff.cpp:257
+msgid "%1 (magic id: %2)"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:221
+msgid "%1 (proc. %2; rev. %3.%4)"
+msgstr "%1 (proc. %2; rev. %3.%4)"
+
+#: devices/pic/base/pic.cpp:215 devices/pic/base/pic.cpp:225
+msgid "%1 (rev. %2)"
+msgstr "%1 (rev. %2)"
+
+#: devices/pic/base/pic.cpp:218
+msgid "%1 (rev. %2.%3)"
+msgstr "%1 (rev. %2.%3)"
+
+#: progs/gui/hardware_config_widget.cpp:178
+msgid "%1 <custom>"
+msgstr "%1 <personalizado>"
+
+#: piklab-prog/cli_interactive.cpp:312
+msgid "%1 = %2"
+msgstr "%1 = %2"
+
+#: progs/gui/hardware_config_widget.cpp:50
+msgid "%1 at %2:"
+msgstr "%1 en %2:"
+
+#: devices/mem24/mem24/mem24_group.cpp:21 devices/pic/pic/pic_group.cpp:36
+msgid "%1 bytes"
+msgstr "%1 bytes"
+
+#: devices/pic/base/pic_config.cpp:308
+msgid "%1 for block %2"
+msgstr "%1 para el bloque %2"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:883
+msgid "%1 options"
+msgstr "%1 opciones"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:647
+msgid "%1 was written by somebody who wants to remain anonymous."
+msgstr "%1 escrito por alguien que prefiere el anonimato."
+
+#: devices/pic/pic/pic_group.cpp:30
+msgid "%1 words"
+msgstr "%1 palabras"
+
+#: devices/pic/gui/pic_memory_editor.cpp:256
+msgid "%1-bit words - mask: %2"
+msgstr "%1-palabras bit - mascara: %2"
+
+#: devices/pic/prog/pic_prog.cpp:467
+msgid "%1: Erasing this range only is not supported with this programmer. This will erase the whole chip and restore the other memory ranges."
+msgstr "%1: este programador no soporta el borrado rangos. Se borrará el chip entero y se restablecerán los otros rangos de memoria."
+
+#: libgui/toplevel.cpp:278
+msgid "&Advanced..."
+msgstr "&Avanzado..."
+
+#: devices/gui/memory_editor.cpp:283 libgui/toplevel.cpp:270
+msgid "&Blank Check"
+msgstr "&Verificar el borrado"
+
+#: libgui/toplevel.cpp:294
+msgid "&Break<Translators: it is the verb>"
+msgstr ""
+
+#: libgui/toplevel.cpp:246
+msgid "&Build Project"
+msgstr "&Construir proyecto"
+
+#: devices/gui/memory_editor.cpp:275
+msgid "&Clear"
+msgstr "&Limpiar"
+
+#: libgui/toplevel.cpp:248
+msgid "&Compile File"
+msgstr "&Compilar archivo"
+
+#: libgui/toplevel.cpp:314
+msgid "&Config Generator..."
+msgstr "&Generador de configuración..."
+
+#: libgui/likeback.cpp:97
+msgid "&Configure Email Address..."
+msgstr "&Configurar dirección de correo..."
+
+#: libgui/toplevel.cpp:256
+msgid "&Connect"
+msgstr "&Conectar"
+
+#. i18n: file ./data/app_data/piklabui.rc line 101
+#: rc.cpp:30
+#, no-c-format
+msgid "&Debugger"
+msgstr "&Depurador"
+
+#: libgui/toplevel.cpp:312
+msgid "&Device Information..."
+msgstr "&Información de dispositivo..."
+
+#: libgui/toplevel.cpp:260
+msgid "&Disconnect"
+msgstr "&Desconectar"
+
+#: libgui/toplevel.cpp:296
+msgid "&Disconnect/Stop"
+msgstr "&Desconectar/Parar"
+
+#: devices/gui/memory_editor.cpp:282 libgui/toplevel.cpp:268
+msgid "&Erase"
+msgstr "&Borrar"
+
+#: libgui/toplevel.cpp:310
+msgid "&Find Files..."
+msgstr "&Encontrar Archivos..."
+
+#: libgui/toplevel.cpp:183
+msgid "&New Source File..."
+msgstr "&Nuevo archivo fuente..."
+
+#: libgui/toplevel.cpp:308
+msgid "&Pikloops..."
+msgstr "&Pikloops..."
+
+#: devices/gui/memory_editor.cpp:279 libgui/toplevel.cpp:262
+msgid "&Program"
+msgstr "&Programar"
+
+#. i18n: file ./data/app_data/piklabui.rc line 63
+#: rc.cpp:21
+#, no-c-format
+msgid "&Project"
+msgstr "&Proyecto"
+
+#: devices/gui/memory_editor.cpp:281 libgui/toplevel.cpp:266
+msgid "&Read"
+msgstr "&Leer"
+
+#: libgui/toplevel.cpp:219
+msgid "&Reset Layout"
+msgstr "&Reiniciar esquema"
+
+#: libgui/toplevel.cpp:272 libgui/toplevel.cpp:286
+msgid "&Run"
+msgstr "&Ejecutar"
+
+#: libgui/device_gui.cpp:90
+msgid "&Select"
+msgstr "&Seleccionar"
+
+#: libgui/toplevel.cpp:288
+msgid "&Step"
+msgstr "&Paso"
+
+#: libgui/toplevel.cpp:274
+msgid "&Stop"
+msgstr "&Parar"
+
+#: libgui/toplevel.cpp:316
+msgid "&Template Generator..."
+msgstr "&Generador de plantilla..."
+
+#: devices/gui/memory_editor.cpp:280 libgui/toplevel.cpp:264
+msgid "&Verify"
+msgstr "&Verificar"
+
+#: devices/gui/memory_editor.cpp:276
+msgid "&Zero"
+msgstr "&Cero"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:545
+msgid "'%1' missing."
+msgstr "«%1» desaparecido."
+
+#: devices/pic/gui/pic_memory_editor.cpp:366
+msgid "(backup)"
+msgstr "(copia)"
+
+#: tools/list/compile_manager.cpp:83 tools/list/compile_manager.cpp:112
+#: tools/list/compile_manager.cpp:137
+msgid "*** Aborted ***"
+msgstr "*** Cancelado ***"
+
+#: tools/list/compile_process.cpp:143
+msgid "*** Error ***"
+msgstr "*** Error ***"
+
+#: tools/list/compile_process.cpp:140
+msgid "*** Exited with status: %1 ***"
+msgstr "*** Salida con estado: %1 ***"
+
+#: tools/list/compile_manager.cpp:194 tools/list/compile_manager.cpp:268
+msgid "*** Success ***"
+msgstr "*** Éxito ***"
+
+#: tools/list/compile_process.cpp:150
+msgid "*** Timeout ***"
+msgstr "*** Interrupción ***"
+
+#: common/cli/cli_log.cpp:62
+msgid "*no*"
+msgstr "*no*"
+
+#: common/cli/cli_log.cpp:62
+msgid "*yes*"
+msgstr "*si*"
+
+#: progs/base/generic_prog.cpp:28
+msgid "---"
+msgstr "---"
+
+#: devices/pic/base/pic_config.cpp:74
+msgid "00"
+msgstr "00"
+
+#: devices/pic/base/pic_config.cpp:74
+msgid "01"
+msgstr "01"
+
+#: devices/pic/base/pic_config.cpp:75
+msgid "10"
+msgstr "10"
+
+#: tools/jal/jal_generator.cpp:22
+msgid "10MHz crystal"
+msgstr "cristal de 10MHz"
+
+#: devices/pic/base/pic_config.cpp:75
+msgid "11"
+msgstr "11"
+
+#: devices/pic/base/pic_config.cpp:216
+msgid "12-bit external bus"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:217
+msgid "16-bit external bus"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:53
+msgid "17C Family"
+msgstr "Familia 17C"
+
+#: devices/pic/base/pic.cpp:54
+msgid "18C Family"
+msgstr "Familia 18C"
+
+#: devices/pic/base/pic.cpp:55
+msgid "18F Family"
+msgstr "Familia 18F"
+
+#: devices/pic/base/pic.cpp:56
+msgid "18J Family"
+msgstr "Familia 18J"
+
+#: devices/pic/base/pic_config.cpp:218
+msgid "20-bit external bus"
+msgstr ""
+
+#: devices/mem24/base/mem24.h:25
+msgid "24 EEPROM"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:57
+msgid "24F Family"
+msgstr "Familia 24F"
+
+#: devices/pic/base/pic.cpp:58
+msgid "24H Family"
+msgstr "Familia 24H"
+
+#: devices/pic/base/pic.cpp:59
+msgid "30F Family"
+msgstr "Familia 30F"
+
+#: devices/pic/base/pic.cpp:60
+msgid "33F Family"
+msgstr "Familia 33F"
+
+#: devices/pic/base/pic_config.cpp:207
+msgid "4 MHz"
+msgstr "4 MHz"
+
+#: devices/pic/base/pic_config.cpp:222
+msgid "5-bit address mask mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:221
+msgid "7-bit address mask mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:206
+msgid "8 MHz"
+msgstr "8 MHz"
+
+#: libgui/device_gui.cpp:155
+msgid "<Feature>"
+msgstr "<Característica>"
+
+#: libgui/device_gui.cpp:142
+msgid "<Memory Type>"
+msgstr "<Tipo de memoria>"
+
+#: libgui/device_gui.cpp:118
+msgid "<Programmer>"
+msgstr "<Programador>"
+
+#: libgui/device_gui.cpp:150
+msgid "<Status>"
+msgstr ""
+
+#: libgui/device_gui.cpp:130
+msgid "<Toolchain>"
+msgstr "<Cadena de herramientas>"
+
+#: tools/boost/boostbasic.cpp:22
+msgid "<a href=\"%1\">BoostBasic Compiler</a> is a Basic compiler distributed by SourceBoost Technologies."
+msgstr "<a href=\"%1\">Compilador BoostBasic</a> es·un·compilador·Basic·distribuido·por·SourceBoost·Technologies."
+
+#: tools/boost/boostc.cpp:22
+msgid "<a href=\"%1\">BoostC Compiler</a> is a C compiler distributed by SourceBoost Technologies."
+msgstr "<a href=\"%1\">Compilador BoostC</a> es un compilador C distribuido por SourceBoost Technologies."
+
+#: tools/boost/boostcpp.cpp:23
+msgid "<a href=\"%1\">BoostC++ Compiler</a> is a C compiler distributed by SourceBoost Technologies."
+msgstr "<a href=\"%1\">Compilador BoostC++ </a> es un compilador C distribuido por SourceBoost Technologies."
+
+#: tools/cc5x/cc5x.cpp:55
+msgid "<a href=\"%1\">CC5X</a> is a C compiler distributed by B Knudsen Data."
+msgstr "<a href=\"%1\">CC5X</a> es un compilador C distribuido por B Knudsen Data."
+
+#: tools/ccsc/ccsc.cpp:90
+msgid "<a href=\"%1\">CCS Compiler</a> is a C compiler distributed by CCS."
+msgstr "<a href=\"%1\">Compilador CCS</a> es un compilador C distribuido por CCS."
+
+#: tools/gputils/gputils.cpp:40
+msgid "<a href=\"%1\">GPUtils</a> is an open-source assembler and linker suite.<br>"
+msgstr ""
+
+#: tools/jalv2/jalv2.cpp:31
+msgid "<a href=\"%1\">JAL V2</a> is a new compiler for the high-level language JAL."
+msgstr ""
+
+#: tools/jal/jal.cpp:31
+msgid "<a href=\"%1\">JAL</a> is a high-level language for PIC microcontrollers."
+msgstr ""
+
+#: tools/mpc/mpc.cpp:50
+msgid "<a href=\"%1\">MPC Compiler</a> is a C compiler distributed by Byte Craft."
+msgstr "<a href=\"%1\">Compilador MPC</a> es un compilador C distribuido por Byte Craft."
+
+#: tools/picc/picc.cpp:119
+msgid "<a href=\"%1\">PICC 18</a> is a C compiler distributed by HTSoft."
+msgstr "<a href=\"%1\">PICC 18</a> es un compilador C distribuido por HTSoft."
+
+#: tools/picc/picc.cpp:93
+msgid "<a href=\"%1\">PICC-Lite</a> is a freeware C compiler distributed by HTSoft."
+msgstr "<a href=\"%1\">PICC-Lite</a> es un compilador C libre distribuido por HTSoft."
+
+#: tools/picc/picc.cpp:106
+msgid "<a href=\"%1\">PICC</a> is a C compiler distributed by HTSoft."
+msgstr "<a href=\"%1\">PICC</a> es un compilador C distribuido por HTSoft."
+
+#: progs/gui/port_selector.cpp:88
+msgid "<a href=\"%1\">See Piklab homepage for help</a>."
+msgstr ""
+
+#: devices/list/device_list.cpp:16
+msgid "<auto>"
+msgstr "<auto>"
+
+#: tools/gui/toolchain_config_widget.cpp:299
+msgid "<b>Device string #%1:</b><br>%2<br>"
+msgstr "<b>Cadena de dispositivo #%1:</b><br>%2<br>"
+
+#: tools/gui/toolchain_config_widget.cpp:298
+msgid "<b>Device string:</b><br>%1<br>"
+msgstr "<b>Cadena de dispositivo:</b><br>%1<br>"
+
+#: tools/gui/toolchain_config_widget.cpp:271
+msgid "<b>Version string:</b><br>%1<br></qt>"
+msgstr "<b>Cadena de versión:</b><br>%1<br></qt>"
+
+#: libgui/hex_editor.cpp:101
+msgid "<b>Warning:</b> hex file seems to be incompatible with the selected device %1:<br>%2"
+msgstr "<b>Atención:</b> el archivo HEX parece ser incompatible con el dispositivo seleccionado %1:<br>%2"
+
+#: libgui/project_manager_ui.cpp:165
+msgid "<default>"
+msgstr "<predeterminado>"
+
+#: piklab-prog/cmdline.cpp:411 piklab-prog/cmdline.cpp:426
+#: piklab-prog/cmdline.cpp:431 piklab-prog/cmdline.cpp:435
+msgid "<from config>"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:182
+msgid "<invalid>"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:62
+msgid "<no project>"
+msgstr "<sin proyecto>"
+
+#: devices/pic/pic/pic_group.cpp:54
+msgid "<none>"
+msgstr "<ninguno>"
+
+#: piklab-hex/main.cpp:241 piklab-hex/main.cpp:245 piklab-prog/cmdline.cpp:403
+#: piklab-prog/cmdline.cpp:408 piklab-prog/cmdline.cpp:413
+#: piklab-prog/cmdline.cpp:416 piklab-prog/cmdline.cpp:422
+#: piklab-prog/cmdline.cpp:430 piklab-prog/cmdline.cpp:439
+#: piklab-prog/cmdline.cpp:443 piklab-coff/main.cpp:247
+msgid "<not set>"
+msgstr "<no establecido>"
+
+#: libgui/likeback.cpp:657
+msgid "<p>Error while trying to send the report.</p><p>Please retry later.</p>"
+msgstr "<p>Error tratando de enviar el informe.</p><p>Pro favor, intente luego.</p>"
+
+#: libgui/likeback.cpp:659
+msgid "<p>Your comment has been sent successfully. It will help improve the application.</p><p>Thanks for your time.</p>"
+msgstr "<p>Su comentario se mandó satisfactoriamente. Será de ayuda para mejorar la aplicación.</p><p>Gracias por su tiempo.</p>"
+
+#: tools/c18/c18.cpp:85
+msgid "<qt><a href=\"%1\">C18</a> is a C compiler distributed by Microchip.</qt>"
+msgstr "<a href=\"%1\">PICC 18</a> es un compilador C distribuido por HTSoft."
+
+#: tools/gui/toolchain_config_widget.cpp:296
+msgid "<qt><b>Command #%1 for devices detection:</b><br>%2<br>"
+msgstr "<qt><b>Instrucción #%1 para la detección de dispositivos:</b><br>%2<br>"
+
+#: tools/gui/toolchain_config_widget.cpp:295
+msgid "<qt><b>Command for devices detection:</b><br>%1<br>"
+msgstr "<qt><b>Instrucción para la detección de dispositivos:</b><br>%1<br>"
+
+#: tools/gui/toolchain_config_widget.cpp:270
+msgid "<qt><b>Command for executable detection:</b><br>%1<br>"
+msgstr "<qt><b>Instrucción para detección de ejecutables:</b><br>%1<br>"
+
+#: tools/gui/tool_config_widget.cpp:113
+msgid "<qt>This values will be placed after the linked objects.</qt>"
+msgstr "<qt>Estos valores se ubicarán luego de los objetos enlazados.</qt>"
+
+#: piklab-hex/main.cpp:278
+msgid "<value>"
+msgstr "<valor>"
+
+#: devices/pic/base/pic.cpp:72
+msgid "ADC"
+msgstr ""
+
+#: coff/base/coff_object.cpp:124
+msgid "Absolute Value"
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:47
+msgid "Access Bank (high)"
+msgstr "Acceder banco (alto)"
+
+#: devices/pic/gui/pic_register_view.cpp:47
+msgid "Access Bank (low)"
+msgstr "Acceder banco (bajo)"
+
+#: progs/direct/base/direct_mem24.cpp:168
+msgid "Acknowledge bit incorrect"
+msgstr "Bit de reconocimiento incorrecto"
+
+#: devices/pic/base/pic_config.cpp:108 devices/pic/base/pic_config.cpp:111
+msgid "Active high"
+msgstr "Activo en alto"
+
+#: devices/pic/base/pic_config.cpp:109 devices/pic/base/pic_config.cpp:112
+msgid "Active low"
+msgstr "Activo en bajo"
+
+#: libgui/project_manager.cpp:200 libgui/toplevel.cpp:242
+msgid "Add Current File"
+msgstr "Agregar archivo actual "
+
+#: libgui/toplevel.cpp:240
+msgid "Add Object File..."
+msgstr "Agregar archivo objeto..."
+
+#: libgui/project_manager.cpp:199 libgui/project_manager.cpp:214
+msgid "Add Object Files..."
+msgstr "Agregar Archivos Objeto..."
+
+#: libgui/toplevel.cpp:238
+msgid "Add Source File..."
+msgstr "Agregar archivo fuente..."
+
+#: libgui/project_wizard.cpp:149
+msgid "Add Source Files"
+msgstr "Agregar archivos fuente"
+
+#: libgui/project_manager.cpp:198 libgui/project_manager.cpp:219
+msgid "Add Source Files..."
+msgstr "Agregar Archivos Fuente..."
+
+#: libgui/project_wizard.cpp:151
+msgid "Add existing files."
+msgstr "Agregar archivos existentes."
+
+#: libgui/project_manager.cpp:314
+msgid "Add only"
+msgstr ""
+
+#: libgui/new_dialogs.cpp:66
+msgid "Add to project"
+msgstr "Agregar al proyecto"
+
+#: libgui/breakpoint_view.cpp:49 piklab-coff/main.cpp:176
+msgid "Address"
+msgstr "Dirección"
+
+#: devices/pic/base/pic_config.cpp:129
+msgid "Address bus width (in bits)"
+msgstr "Ancho del bus de direcciones (en bits)"
+
+#: progs/gui/prog_group_ui.cpp:50
+msgid "Advanced Dialog"
+msgstr "Diálogo avanzado"
+
+#: devices/pic/base/pic_config.cpp:393
+msgid "All"
+msgstr "Todo"
+
+#: libgui/toplevel.cpp:553
+msgid "All Files"
+msgstr "Todos los archivos"
+
+#: common/common/purl_base.cpp:117
+msgid "All Object Files"
+msgstr "Todos los archivos objeto"
+
+#: common/common/purl_base.cpp:105
+msgid "All Source Files"
+msgstr "Todos los archivos fuente"
+
+#: piklab-prog/cli_interactive.cpp:192
+#, fuzzy
+msgid "All breakpoints removed."
+msgstr "Todos los puntos de parada removidos"
+
+#: common/global/log.cpp:29
+msgid "All debug messages"
+msgstr "Todos los mensajes de depuración"
+
+#: tools/gputils/gputils_config.cpp:13 tools/c18/c18_config.cpp:12
+msgid "All messages"
+msgstr "Todos los mensajes"
+
+#: devices/pic/prog/pic_prog.cpp:191
+msgid "All or part of code memory is protected so it cannot be preserved. Continue anyway?"
+msgstr "Todo o parte de la memoria de código está protegida y por lo tanto no se puede mantener. ¿Desea continuar de todos modos?"
+
+#: devices/pic/prog/pic_prog.cpp:198
+msgid "All or part of data EEPROM is protected so it cannot be preserved. Continue anyway?"
+msgstr "Todo o parte de los datos EEPROM están protegidos y por lo tanto no se pueden mantener. ¿Desea continuar de todos modos?"
+
+#: devices/pic/base/pic_config.cpp:271
+msgid "Allow multiple reconfigurations"
+msgstr "Permitir multiples reconfiguraciones"
+
+#: devices/pic/base/pic_config.cpp:270
+msgid "Allow only one reconfiguration"
+msgstr "Permitir solamente una reconfiguración"
+
+#: devices/pic/base/pic_config.cpp:275
+#, fuzzy
+msgid "Alternate"
+msgstr "Alternativas"
+
+#: devices/pic/base/pic_config.cpp:272
+msgid "Alternate I2C pins"
+msgstr "Alternar pines I2C"
+
+#: devices/base/device_group.cpp:239
+msgid "Alternatives"
+msgstr "Alternativas"
+
+#: devices/pic/base/pic_config.cpp:105
+msgid "Analog"
+msgstr "Analógico"
+
+#: coff/base/coff.cpp:22
+msgid "Archive"
+msgstr ""
+
+#: libgui/likeback.cpp:135
+msgid "Are you sure you do not want to participate anymore in the application enhancing program?"
+msgstr "¿Está seguro que ya no desea participar en el programa de mejora de la aplicación?"
+
+#: piklab-prog/cmdline.cpp:221
+msgid "Argument file type not recognized."
+msgstr "Tipo de archivo de argumento no reconocido."
+
+#: piklab-prog/cli_interactive.cpp:196
+#, fuzzy
+msgid "Argument should be breakpoint index."
+msgstr "El argumento debería ser un índice de puntos de parada"
+
+#: piklab-prog/cli_interactive.cpp:186
+#, fuzzy
+msgid "Arguments not recognized."
+msgstr "Argumentos no reconocidos"
+
+#: tools/gui/tool_config_widget.cpp:44
+msgid "Arguments:"
+msgstr "Argumentos:"
+
+#: coff/base/cdb_parser.cpp:23 coff/base/coff_object.cpp:180
+msgid "Array"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:59
+msgid "Asix Piccolo"
+msgstr "Asix Piccolo"
+
+#: progs/direct/base/direct_prog_config.cpp:61
+msgid "Asix Piccolo Grande"
+msgstr "Asix Piccolo Grande"
+
+#: tools/base/generic_tool.cpp:18 common/common/purl_base.cpp:20
+#: common/common/purl_base.cpp:25
+msgid "Assembler"
+msgstr "Assembler"
+
+#: common/common/purl_base.cpp:33
+msgid "Assembler File"
+msgstr "Archivo Assembler"
+
+#: common/common/purl_base.cpp:34
+msgid "Assembler File for PIC30"
+msgstr "Archivo Assembler para PIC30"
+
+#: common/common/purl_base.cpp:35
+msgid "Assembler File for PICC"
+msgstr "Archivo Assembler para PICC"
+
+#: tools/base/generic_tool.cpp:18
+msgid "Assembler:"
+msgstr "Assembler:"
+
+#: devices/base/generic_memory.cpp:34
+msgid "At least one value (at address %1) is defined outside memory ranges."
+msgstr "Al menos un valor(en la dirección %1) está definido fuera de los rangos de memoria."
+
+#: devices/mem24/mem24/mem24_memory.cpp:86 devices/pic/pic/pic_memory.cpp:545
+msgid "At least one word (at offset %1) is larger (%2) than the corresponding mask (%3)."
+msgstr "Al menos una palabra(en desplazamiento %1) es mayor (%2) que la máscara correspondiente (%3)."
+
+#: common/global/about.cpp:79
+msgid "Author and maintainer."
+msgstr "Autor y desarrollador."
+
+#: common/global/about.cpp:82
+msgid "Author of gputils"
+msgstr "Autor de gputils"
+
+#: common/global/about.cpp:83
+msgid "Author of likeback"
+msgstr "Autor de likeback"
+
+#: coff/base/coff_object.cpp:147
+msgid "Auto Argument"
+msgstr "Argumento Automático:"
+
+#: tools/gui/tool_config_widget.cpp:24
+msgid "Automatic"
+msgstr "Automático"
+
+#: coff/base/coff_object.cpp:129
+msgid "Automatic Variable"
+msgstr "Variable Automática"
+
+#: libgui/global_config.cpp:20
+msgid "Automatically rebuild project before programming if it is modified."
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:351
+msgid "Bad checksum for read block: %1 (%2 expected)."
+msgstr "Comprobación errónea para el bloque de lectura: %1 (se esperaba %2)."
+
+#: progs/icd2/base/icd2.cpp:232
+msgid "Bad checksum for received string"
+msgstr "Comprobación errónea para la cadena recibida"
+
+#: devices/pic/base/pic_config.cpp:68
+msgid "Bandgap voltage calibration"
+msgstr "Calibración del voltaje de banda gap"
+
+#: devices/pic/gui/pic_group_ui.cpp:59
+#: devices/pic/gui/pic_register_view.cpp:61
+msgid "Bank %1"
+msgstr "Baco %1"
+
+#: devices/pic/gui/pic_register_view.cpp:54
+msgid "Bank %1 (high)"
+msgstr "Banco %1 (alto)"
+
+#: devices/pic/gui/pic_register_view.cpp:54
+msgid "Bank %1 (low)"
+msgstr "Banco %1 (bajo)"
+
+#: devices/pic/base/pic.cpp:51
+msgid "Baseline Family"
+msgstr "Familia linea base"
+
+#: common/common/purl_base.cpp:29
+msgid "Basic Compiler"
+msgstr "Compilador Basic"
+
+#: common/common/purl_base.cpp:41
+msgid "Basic Source File"
+msgstr "Archivo fuente de Basic"
+
+#: coff/base/coff_object.cpp:149
+msgid "Beginning or End of Block"
+msgstr ""
+
+#: coff/base/coff_object.cpp:150
+msgid "Beginning or End of Function"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:20
+msgid "Bin to Hex"
+msgstr "Bin a hex"
+
+#: tools/base/generic_tool.cpp:20
+msgid "Bin to Hex:"
+msgstr "Bin a hex:"
+
+#: common/common/number.cpp:21
+msgid "Binary"
+msgstr "Binario"
+
+#: coff/base/cdb_parser.cpp:55
+msgid "Bit Addressable"
+msgstr "Bit Direccionable"
+
+#: coff/base/cdb_parser.cpp:39 coff/base/coff_object.cpp:146
+msgid "Bit Field"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:36
+msgid "Blank Checking..."
+msgstr "Verificación de borrado..."
+
+#: progs/base/prog_config.cpp:74
+msgid "Blank check after erase."
+msgstr "Verificar luego de borrado."
+
+#: piklab-prog/cmdline.cpp:49
+msgid "Blank check device memory."
+msgstr "Verificar borrado de memoria del dispositivo."
+
+#: progs/base/generic_prog.cpp:289
+msgid "Blank checking done."
+msgstr "Hecha la verificación de borrado."
+
+#: progs/base/generic_prog.cpp:400
+msgid "Blank checking successful."
+msgstr "Verificación de borrado exitosa."
+
+#: progs/base/generic_prog.cpp:287 progs/base/generic_prog.cpp:398
+msgid "Blank checking..."
+msgstr "Verificación de borrado..."
+
+#: piklab-prog/cmdline.cpp:316
+msgid "Blank-checking device memory not supported for specified programmer."
+msgstr "El programador no soporta la verificación de borrado de memoria del dispositivo."
+
+#: devices/mem24/mem24/mem24_group.cpp:38
+#: devices/pic/base/pic_protection.cpp:360
+msgid "Block #%1"
+msgstr "Bloque #%1"
+
+#: tools/boost/boostbasic.h:51
+msgid "BoostBasic Compiler for PIC16"
+msgstr "Compilador BoostBasic para PIC16"
+
+#: tools/boost/boostbasic.h:62
+msgid "BoostBasic Compiler for PIC18"
+msgstr "Compilador BoostBasic para PIC18"
+
+#: tools/boost/boostc.h:51
+msgid "BoostC Compiler for PIC16"
+msgstr "Compilador BoostC para PIC16"
+
+#: tools/boost/boostc.h:62
+msgid "BoostC Compiler for PIC18"
+msgstr "Compilador BoostC para PIC18"
+
+#: tools/boost/boostcpp.h:51
+msgid "BoostC++ Compiler for PIC16"
+msgstr "Compilador BoostC++ para PIC16"
+
+#: tools/boost/boostcpp.h:62
+msgid "BoostC++ Compiler for PIC18"
+msgstr "Compilador BoostC++ para PIC18"
+
+#: devices/pic/base/pic_protection.cpp:351
+msgid "Boot Block"
+msgstr "Bloque de arranque"
+
+#: devices/pic/base/pic_protection.cpp:350
+msgid "Boot Segment"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:125
+msgid "Boot block size"
+msgstr "Tamaño del bloque de arranque"
+
+#: devices/pic/base/pic_config.cpp:23
+msgid "Boot code-protection"
+msgstr "Protección de código de arranque"
+
+#: devices/pic/base/pic_config.cpp:233
+msgid "Boot segment EEPROM size"
+msgstr "Tamaño del segmento EEPROM de arranque"
+
+#: devices/pic/base/pic_config.cpp:234
+msgid "Boot segment RAM size"
+msgstr "Tamaño del segmento RAM de arranque"
+
+#: devices/pic/base/pic_config.cpp:230
+msgid "Boot segment security"
+msgstr "Seguridad del segmento de arranque"
+
+#: devices/pic/base/pic_config.cpp:229
+msgid "Boot segment size"
+msgstr "Tamaño del segmento de arranque"
+
+#: devices/pic/base/pic_config.cpp:228
+msgid "Boot segment write-protection"
+msgstr "Protección de escritura del segmento de arranque"
+
+#: devices/pic/base/pic_config.cpp:31
+msgid "Boot table read-protection"
+msgstr "Protección de lectura de tabla de arranque"
+
+#: devices/pic/base/pic_config.cpp:27
+msgid "Boot write-protection"
+msgstr "Protección de escritura de arranque"
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:89
+msgid "Bootloader identified device as: %1"
+msgstr "El cargador de arranque identifica al dispositivo como: %1"
+
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:84
+msgid "Bootloader version %1 detected"
+msgstr "Se detectó la versión %1 del cargador de arranque"
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:36
+msgid "Bootloader version %1 detected."
+msgstr "Se detectó la versión %1 del cargador de arranque."
+
+#: progs/base/generic_prog.cpp:231
+msgid "Breaking..."
+msgstr "Interrumpiendo..."
+
+#: piklab-prog/cli_interactive.cpp:161
+#, fuzzy
+msgid "Breakpoint already set at %1."
+msgstr "Punto de parada ya establecido en %1"
+
+#: piklab-prog/cli_interactive.cpp:201
+#, fuzzy
+msgid "Breakpoint at %1 removed."
+msgstr "Punto de parada removido de %1"
+
+#: libgui/gui_debug_manager.cpp:125
+msgid "Breakpoint at non-code line cannot be activated."
+msgstr "El punto de parada no puede ser activado fuera de línea de código."
+
+#: progs/manager/debug_manager.cpp:142
+msgid "Breakpoint at non-code line."
+msgstr "Punto de parada fuera de línea de código."
+
+#: progs/manager/debug_manager.cpp:147
+msgid "Breakpoint corresponds to several addresses. Using the first one."
+msgstr "El punto de parada corresponde a varias direcciones. Utilizando la primera."
+
+#: piklab-prog/cli_interactive.cpp:197
+#, fuzzy
+msgid "Breakpoint index too large."
+msgstr "Índice de punto de parada demasiado largo"
+
+#: piklab-prog/cli_interactive.cpp:165
+#, fuzzy
+msgid "Breakpoint set at %1."
+msgstr "Punto de parada establecido en %1"
+
+#: libgui/toplevel.cpp:150
+msgid "Breakpoints"
+msgstr "Puntos de parada"
+
+#: piklab-prog/cli_interactive.cpp:172
+msgid "Breakpoints:"
+msgstr "Puntos de parada:"
+
+#: devices/pic/base/pic_config.cpp:76
+msgid "Brown-out detect"
+msgstr "Detectado brown-out"
+
+#: devices/pic/base/pic_config.cpp:89
+msgid "Brown-out reset software"
+msgstr "Programa de reinicio brown-out"
+
+#: devices/pic/base/pic_config.cpp:84
+msgid "Brown-out reset voltage"
+msgstr "Voltaje de reinicio brown-out"
+
+#. i18n: file ./data/app_data/piklabui.rc line 76
+#: rc.cpp:24
+#, no-c-format
+msgid "Bu&ild"
+msgstr "Constru&ir"
+
+#: libgui/project_manager.cpp:194
+msgid "Build Project"
+msgstr "Construir proyecto"
+
+#. i18n: file ./data/app_data/piklabui.rc line 155
+#: rc.cpp:45
+#, no-c-format
+msgid "Build Toolbar"
+msgstr "Barra de herramientas construir"
+
+#: tools/list/compile_manager.cpp:53
+msgid "Building project..."
+msgstr "Construir proyecto..."
+
+#: common/common/purl_base.cpp:26
+msgid "C Compiler"
+msgstr "Compilador C"
+
+#: common/common/purl_base.cpp:39
+msgid "C Header File"
+msgstr "Archivo cabecera C"
+
+#: common/common/purl_base.cpp:37
+msgid "C Source File"
+msgstr "Archivo fuente C"
+
+#: libgui/toplevel.cpp:193
+msgid "C&lose All"
+msgstr "C&errar todo"
+
+#: common/common/purl_base.cpp:28
+msgid "C++ Compiler"
+msgstr "Compilador C++"
+
+#: common/common/purl_base.cpp:38
+msgid "C++ Source File"
+msgstr "Archivo fuente C++"
+
+#: tools/c18/c18.h:42
+msgid "C18 Compiler"
+msgstr "Compilador C18"
+
+#: devices/pic/base/pic.cpp:77
+msgid "CAN"
+msgstr ""
+
+#: tools/cc5x/cc5x.h:33
+msgid "CC5X Compiler"
+msgstr "Compilador CC5X"
+
+#: devices/pic/base/pic.cpp:71
+msgid "CCP"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:88
+msgid "CCP1 multiplex"
+msgstr "Multiplexor CCP1"
+
+#: devices/pic/base/pic_config.cpp:87
+msgid "CCP2 multiplex"
+msgstr "Multiplexor CCP2"
+
+#: tools/ccsc/ccsc.h:36 coff/base/coff_object.cpp:38
+msgid "CCS Compiler"
+msgstr "Compilador CCS"
+
+#: common/common/purl_base.cpp:54
+msgid "COD File"
+msgstr "Archivo cod"
+
+#: tools/base/generic_tool.cpp:38
+#, fuzzy
+msgid "COFF"
+msgstr "Archivo coff"
+
+#: common/common/purl_base.cpp:55
+msgid "COFF File"
+msgstr "Archivo coff"
+
+#: coff/base/coff.cpp:67 coff/base/coff.cpp:77
+msgid "COFF file is truncated (offset: %1  nbBytes: %2  size:%3)."
+msgstr "El archivo coff está incompleto (desplazamiento: %1  nbBytes: %2  tamaño: %3)."
+
+#: piklab-prog/cli_interactive.cpp:61
+msgid "COFF file to be used for debugging."
+msgstr "El archivo coff no se puede utilizar para depuración."
+
+#: piklab-coff/main.cpp:279
+msgid "COFF filename."
+msgstr "Archivo COFF"
+
+#: coff/base/coff_object.cpp:454
+msgid "COFF format not supported: magic number is %1."
+msgstr "Formato COFF no soportado: el número mágico es %1."
+
+#: piklab-coff/main.cpp:212
+msgid "COFF type:"
+msgstr "Tipo COFF:"
+
+#: devices/pic/base/pic_config.cpp:199
+msgid "CPU system clock (divided by)"
+msgstr "Reloj sistema de la CPU (dividido por)"
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:149
+msgid "CRC error from bootloader: retrying..."
+msgstr "Error de CRC desde el cargador de arranque: reintentando..."
+
+#: devices/base/hex_buffer.cpp:142
+msgid "CRC mismatch (line %1)."
+msgstr "CRC erróneo (linea %1)."
+
+#: devices/pic/base/pic.cpp:26 progs/gui/prog_group_ui.cpp:92
+msgid "Calibration"
+msgstr "Calibración"
+
+#: devices/pic/base/pic.cpp:33
+msgid "Calibration Backup"
+msgstr "Copia de calibración"
+
+#: devices/pic/base/pic_config.cpp:22
+msgid "Calibration code-protection"
+msgstr "Protección de código de calibración"
+
+#: progs/pickit2/base/pickit_prog.cpp:46
+msgid "Calibration firmware file seems incompatible with selected device %1."
+msgstr "Aparentemente el archivo de firmware de calibración es incompatible con el dispositivo elegido: %1."
+
+#: devices/pic/base/pic.cpp:239
+msgid "Calibration word at address %1 is blank."
+msgstr "Palabra de calibración vacía en la dirección %1."
+
+#: devices/pic/base/pic.cpp:245
+msgid "Calibration word is not a compatible opcode (%2)."
+msgstr "La palabra de calibración no es un código de operación compatible (%2)."
+
+#: tools/list/compile_manager.cpp:65
+msgid "Cannot build empty project."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:406
+msgid "Cannot erase ROM or EPROM device."
+msgstr "No se puede borrar el dispositivo ROM o EPROM."
+
+#: devices/pic/prog/pic_prog.cpp:446
+msgid "Cannot erase protected code memory. Consider erasing the whole chip."
+msgstr "No se puede borrar memoria de código protegido. Considere borrar el chip completo."
+
+#: devices/pic/prog/pic_prog.cpp:450
+msgid "Cannot erase protected data EEPROM. Consider erasing the whole chip."
+msgstr "No se puede borrar EEPROM de datos protegidos. Considere borrar el chip completo."
+
+#: devices/pic/prog/pic_prog.cpp:464
+msgid "Cannot erase specified range because of programmer limitations."
+msgstr ""
+
+#: libgui/project_manager.cpp:420
+msgid "Cannot open without device specified."
+msgstr "No se puede abrir sin especificar el dispositivo."
+
+#: devices/pic/prog/pic_prog.cpp:526
+msgid "Cannot read ROMless device."
+msgstr "No se pueden leer dispositivos sin ROM."
+
+#: progs/pickit2/base/pickit2.cpp:116
+msgid "Cannot read voltages with this firmware version."
+msgstr "No se puede leer voltaje con esta versión de firmware."
+
+#: libgui/gui_debug_manager.cpp:242
+msgid "Cannot show disassembly location for non-code line."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:250
+msgid "Cannot specify range without specifying device."
+msgstr "No puede especificar un rango sin especificar dispositivo."
+
+#: progs/manager/debug_manager.cpp:387
+msgid "Cannot start debugging session without input file (%1)."
+msgstr "No se puede iniciar una sesión de depuración si un archivo de entrada (%1)."
+
+#: progs/manager/debug_manager.cpp:372
+msgid "Cannot start debugging session without input file (not specified)."
+msgstr "No se puede iniciar una sesión de depuración si un archivo de entrada (no especificado)."
+
+#: libgui/gui_prog_manager.cpp:34
+msgid "Cannot start debugging without a COFF file. Please compile the project."
+msgstr "No se puede iniciar la depuración sin un archivo coff. Por favor, compile el proyecto."
+
+#: progs/manager/prog_manager.cpp:138
+msgid "Cannot toggle target power since target is self-powered."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:606
+msgid "Cannot write ROM or ROMless device."
+msgstr "No se puede escribir un dispositivo ROM o sin ROM."
+
+#: coff/base/cdb_parser.cpp:33 coff/base/coff_object.cpp:160
+msgid "Char"
+msgstr "Char"
+
+#: piklab-hex/main.cpp:25
+msgid "Check hex file for correctness (if a device is specified, check if hex file is compatible with it)."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:41
+msgid "Check this box to change DATA buffer direction."
+msgstr "Marcar para cambiar la dirección del buffer de datos."
+
+#: progs/direct/base/direct.cpp:26 progs/direct/base/direct.cpp:29
+#: progs/direct/base/direct.cpp:32 progs/direct/base/direct.cpp:35
+msgid "Check this box to turn voltage on/off for this pin."
+msgstr "Marcar para cambiar a prendido/apagrado el voltaje de esta pata."
+
+#: progs/direct/gui/direct_config_widget.cpp:27
+msgid "Check this option if your hardware uses negative logic for this pin."
+msgstr "Marcar esta opción si su hardware utiliza lógica negativa para este pin."
+
+#: devices/pic/gui/pic_config_word_editor.cpp:98
+msgid "Checksum Mask:"
+msgstr "Máscara de suma de comprobación:"
+
+#: piklab-hex/main.cpp:178
+msgid "Checksum computation is experimental and is not always correct!"
+msgstr ""
+
+#: piklab-hex/main.cpp:180 libgui/hex_editor.cpp:189
+msgid "Checksum: %1"
+msgstr "Suma de comprobación: %1"
+
+#: libgui/toplevel.cpp:250
+msgid "Clean"
+msgstr "Limpiar"
+
+#: libgui/project_manager.cpp:195
+msgid "Clean Project"
+msgstr "Limpiar proyecto"
+
+#: piklab-hex/main.cpp:27
+msgid "Clean hex file and fix errors (wrong CRC, truncated line, truncated file)."
+msgstr "Limpiar archivo hex y errores corregidos (CRC erróneo, linea truncada, archivo incompleto)."
+
+#: libgui/toplevel.cpp:302
+msgid "Clear All Breakpoints"
+msgstr "Limpiar todos los puntos de parada"
+
+#: piklab-prog/cli_interactive.cpp:47
+msgid "Clear a breakpoint \"clear 0\", \"clear e 0x04\", or clear all breakpoints \"clear all\"."
+msgstr "Limpiar un punto de parada «clear 0», «clear e 0x04», o limpiar todos los puntos de parada «clear all»."
+
+#: devices/pic/gui/pic_register_view.cpp:265
+msgid "Clear all watching"
+msgstr "Limpiar todos los vigías"
+
+#: progs/direct/base/direct.cpp:30
+msgid "Clock"
+msgstr "Reloj"
+
+#: progs/direct/gui/direct_config_widget.cpp:68
+msgid "Clock delay"
+msgstr "Demora de reloj"
+
+#: devices/pic/base/pic_config.cpp:264
+msgid "Clock output"
+msgstr "Salida del reloj"
+
+#: devices/pic/base/pic_config.cpp:136
+msgid "Clock switching mode"
+msgstr "Modo de cambio de reloj"
+
+#: libgui/editor_manager.cpp:403 libgui/toplevel.cpp:195
+msgid "Close All Others"
+msgstr "Cerrar todos los otros"
+
+#: libgui/toplevel.cpp:236
+msgid "Close Project"
+msgstr "Cerrar proyecto"
+
+#: progs/gui/hardware_config_widget.cpp:91
+msgid "Closing will discard changes you have made. Close anyway?"
+msgstr "Al cerrar descartará todos los cambios hechos. ¿Cerrar de todos modos?"
+
+#: coff/base/cdb_parser.cpp:50 coff/base/coff_object.cpp:332
+msgid "Code"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:51
+msgid "Code / Static Segment"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:26
+msgid "Code Pointer"
+msgstr "Puntero de código"
+
+#: devices/pic/base/pic_config.cpp:20
+msgid "Code code-protection"
+msgstr "Código de protección de código"
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:53
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:163
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:111
+msgid "Code is present in bootloader reserved area (at address %1). It will be ignored."
+msgstr "Código presente en el área reservada en el cargador de arranque (en la dirección %1). Será ignorado."
+
+#: devices/pic/base/pic.cpp:25
+msgid "Code memory"
+msgstr "Memoria de código"
+
+#: devices/pic/base/pic_config.cpp:96
+msgid "Code protected microcontroller"
+msgstr "Microcontrolador con código protegido"
+
+#: devices/pic/gui/pic_memory_editor.cpp:77
+msgid "Code protection"
+msgstr "Protección de código"
+
+#: devices/pic/base/pic_config.cpp:25
+msgid "Code write-protection"
+msgstr "Protección de escritura de código"
+
+#: coff/base/coff_object.cpp:286 coff/base/coff_object.cpp:299
+msgid "Codeline has unknown symbol: %1"
+msgstr ""
+
+#: coff/base/coff_object.cpp:290 coff/base/coff_object.cpp:303
+msgid "Codeline is an auxiliary symbol: %1"
+msgstr ""
+
+#: piklab-coff/main.cpp:128
+msgid "Command not available for COFF of type Archive."
+msgstr ""
+
+#: piklab-coff/main.cpp:204
+msgid "Command not available for COFF of type Object."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:453
+msgid "Command-line programmer/debugger."
+msgstr "Programador/depurador de línea de comando."
+
+#: piklab-hex/main.cpp:287
+msgid "Command-line utility to manipulate hex files."
+msgstr "Utilidad de línea de comando para manipular archivos hex."
+
+#: piklab-coff/main.cpp:278
+msgid "Command-line utility to view COFF files."
+msgstr "Utilidad de línea de comando para ver archivos COFF."
+
+#: libgui/likeback.cpp:659
+msgid "Comment Sent"
+msgstr "Comentario enviado"
+
+#: devices/base/generic_device.cpp:33
+msgid "Commercial"
+msgstr "Comercial"
+
+#: piklab-hex/main.cpp:28
+msgid "Compare two hex files."
+msgstr "Comparar dos archivos hex."
+
+#: progs/direct/base/direct_prog_config.cpp:83
+msgid "Compatible with ET-CAB10PIN V2 programmer shipped by Futurlec, with their PIC16F877 controler board."
+msgstr ""
+
+#: libgui/toplevel.cpp:138
+msgid "Compile Log"
+msgstr "Traza de compilación"
+
+#: tools/base/generic_tool.cpp:17 common/common/purl_base.cpp:21
+msgid "Compiler"
+msgstr "Compilador"
+
+#: tools/base/generic_tool.cpp:17
+msgid "Compiler:"
+msgstr "Compilador:"
+
+#: tools/list/compile_manager.cpp:29
+msgid "Compiling file..."
+msgstr "Compilando archivo..."
+
+#: coff/base/coff_object.cpp:326
+msgid "Config"
+msgstr "Configuración"
+
+#: libgui/config_gen.cpp:145
+msgid "Config Generator"
+msgstr "Generador de configuración"
+
+#: devices/pic/gui/pic_config_word_editor.cpp:51
+msgid "Config Word Details"
+msgstr "Detalles de palabras de configuración"
+
+#: common/port/usb_port.cpp:242
+msgid "Configuration %1 not present: using %2"
+msgstr "Configuración %1 no presente: usando %2"
+
+#: devices/pic/base/pic.cpp:29
+msgid "Configuration Bits"
+msgstr "Bits de configuración"
+
+#: coff/base/disassembler.cpp:282
+msgid "Configuration bits: adapt to your setup and needs"
+msgstr "Bits de configuración: adapte los parámetros a su necesidad"
+
+#: devices/pic/base/pic_config.cpp:28
+msgid "Configuration write-protection"
+msgstr "Configuración: protección de escritura"
+
+#: tools/gui/tool_config_widget.cpp:37
+msgid "Configuration:"
+msgstr "Configuración:"
+
+#: libgui/toplevel_ui.cpp:40
+msgid "Configure Compilation..."
+msgstr "Configurar compilación..."
+
+#: libgui/config_center.cpp:113
+msgid "Configure Piklab"
+msgstr "Configurar Piklab"
+
+#: libgui/toplevel_ui.cpp:39
+msgid "Configure Toolchain..."
+msgstr "Configurar herramienta..."
+
+#: tools/gui/toolchain_config_center.cpp:24
+msgid "Configure Toolchains"
+msgstr "Configurar herramientas"
+
+#: libgui/toplevel.cpp:320
+msgid "Configure Toolchains..."
+msgstr "Configurar herramientas..."
+
+#: libgui/toplevel.cpp:346
+msgid "Configure email..."
+msgstr "Configurar correo..."
+
+#: libgui/project_manager.cpp:186 libgui/toplevel_ui.cpp:22
+#: libgui/likeback.cpp:89
+msgid "Configure..."
+msgstr "Configurar"
+
+#: piklab-prog/cmdline.cpp:35
+msgid "Connect programmer."
+msgstr "Programador conectado."
+
+#: progs/gui/hardware_config_widget.cpp:61
+msgid "Connected"
+msgstr "Conectado"
+
+#: devices/pic/base/pic_config.cpp:224
+msgid "Connected to EMB"
+msgstr "Conectado a EMB"
+
+#: progs/base/generic_prog.cpp:108
+msgid "Connected."
+msgstr "Conectado."
+
+#: progs/base/generic_prog.cpp:81
+msgid "Connecting %1 on %2 with device %3..."
+msgstr "Conectando %1 en %2 con el dispositivo %3..."
+
+#: progs/base/generic_prog.cpp:75
+msgid "Connecting %1 with device %2..."
+msgstr "Conectando %1 con el dispositivo %2..."
+
+#: progs/base/generic_prog.cpp:89
+msgid "Connecting..."
+msgstr "Conectando..."
+
+#: progs/gui/prog_config_center.cpp:92
+msgid "Connection: Error"
+msgstr "Conexión: Error"
+
+#: progs/gui/prog_config_center.cpp:92
+msgid "Connection: Ok"
+msgstr "Conexión: Correcta"
+
+#: tools/pic30/pic30_generator.cpp:51
+msgid "Constants in program space"
+msgstr "Constantes en el espacio de programa"
+
+#: libgui/toplevel.cpp:905
+msgid "Continue Anyway"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:284
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:86
+msgid "Continue with the specified device name: \"%1\"..."
+msgstr "Continuar con el nombre de dispositivo especificado: «%1»..."
+
+#: progs/direct/gui/direct_config_widget.cpp:81
+msgid "Continuously send 0xA55A on \"Data out\" pin."
+msgstr ""
+
+#: libgui/project_manager.cpp:314
+msgid "Copy and Add"
+msgstr ""
+
+#: libgui/config_gen.cpp:66
+msgid "Copy to clipboard"
+msgstr ""
+
+#: libgui/project_manager.cpp:325
+msgid "Copying file to project directory failed."
+msgstr ""
+
+#: common/port/usb_port.cpp:259
+msgid "Could not claim USB interface %1"
+msgstr ""
+
+#: common/port/parallel.cpp:173
+msgid "Could not claim device \"%1\": check it is read/write enabled"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:121
+msgid "Could not connect programmer."
+msgstr ""
+
+#: progs/psp/base/psp_serial.cpp:40
+msgid "Could not contact Picstart+"
+msgstr ""
+
+#: common/gui/purl_ext.cpp:31
+msgid "Could not copy file"
+msgstr ""
+
+#: common/gui/purl_ext.cpp:108
+msgid "Could not create directory"
+msgstr ""
+
+#: common/gui/purl_ext.cpp:52
+msgid "Could not create file"
+msgstr ""
+
+#: common/gui/pfile_ext.cpp:24 common/gui/pfile_ext.cpp:109
+msgid "Could not create temporary file."
+msgstr ""
+
+#: common/gui/purl_ext.cpp:75
+msgid "Could not delete file."
+msgstr ""
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:35
+msgid "Could not detect \"gpsim\" version"
+msgstr ""
+
+#: progs/direct/base/direct_mem24.cpp:51
+msgid "Could not detect EEPROM"
+msgstr ""
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:31
+msgid "Could not detect device in bootloader mode."
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:64 libgui/device_gui.cpp:263
+msgid "Could not detect supported devices for \"%1\". Please check installation."
+msgstr ""
+
+#: libgui/config_gen.cpp:131
+msgid "Could not detect supported devices for selected toolchain. Please check installation."
+msgstr ""
+
+#: libgui/device_gui.cpp:268
+msgid "Could not detect supported devices for toolchain \"%1\". Please check installation."
+msgstr ""
+
+#: coff/base/coff_object.cpp:567
+msgid "Could not determine processor (%1)."
+msgstr ""
+
+#: libgui/console.cpp:30
+msgid "Could not find \"konsolepart\"; please install kdebase."
+msgstr ""
+
+#: common/port/usb_port.cpp:210
+msgid "Could not find USB device (vendor=%1 product=%2)."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:155
+msgid "Could not find debug executive file \"%1\"."
+msgstr ""
+
+#: piklab-prog/cli_prog_manager.cpp:28
+msgid "Could not find device \"%1\" as serial or parallel port. Will try to open as serial port."
+msgstr "No se puede encontrar el dispositivo «%1» como puerto paralelo o serie. Se intentará abirlo como puerto serie."
+
+#: tools/mpc/mpc_compile.cpp:40 tools/ccsc/ccsc_compile.cpp:86
+msgid "Could not find error file (%1)."
+msgstr ""
+
+#: libgui/project_manager.cpp:307
+msgid "Could not find file."
+msgstr ""
+
+#: progs/icd2/base/icd2_prog.cpp:90
+msgid "Could not find firmware file \"%1\" in directory \"%2\"."
+msgstr ""
+
+#: common/port/serial.cpp:329
+msgid "Could not flush device"
+msgstr ""
+
+#: common/port/serial.cpp:165
+msgid "Could not get file descriptor parameters"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:173
+msgid "Could not load hex file \"%1\"."
+msgstr ""
+
+#: common/port/serial.cpp:198
+msgid "Could not modify file descriptor flags"
+msgstr ""
+
+#: common/port/parallel.cpp:169 common/port/parallel.cpp:179
+msgid "Could not open device \"%1\""
+msgstr ""
+
+#: common/port/serial.cpp:190
+msgid "Could not open device \"%1\" read-write"
+msgstr ""
+
+#: common/gui/pfile_ext.cpp:58 common/cli/cli_pfile.cpp:37
+msgid "Could not open file for reading."
+msgstr ""
+
+#: common/cli/cli_pfile.cpp:19
+msgid "Could not open file for writing."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:320
+#, fuzzy
+msgid "Could not open filename \"%1\"."
+msgstr "Formato COFF no soportado: el número mágico es %1."
+
+#: progs/icd2/base/icd2_prog.cpp:100 progs/icd2/base/icd2_debug.cpp:162
+#: progs/pickit2/base/pickit_prog.cpp:35 progs/base/generic_prog.cpp:250
+msgid "Could not open firmware file \"%1\"."
+msgstr ""
+
+#: libgui/project_manager.cpp:531
+msgid "Could not open project file."
+msgstr ""
+
+#: common/gui/pfile_ext.cpp:63
+msgid "Could not open temporary file."
+msgstr ""
+
+#: progs/pickit2/base/pickit_prog.cpp:42
+msgid "Could not read calibration firmware file \"%1\" (%2)."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:168
+msgid "Could not read debug executive file \"%1\": %2."
+msgstr ""
+
+#: progs/pickit2/base/pickit2_prog.cpp:56
+msgid "Could not read firmware hex file \"%1\" (%2)."
+msgstr ""
+
+#: progs/icd2/base/icd_prog.cpp:22
+msgid "Could not read firmware hex file \"%1\": %2."
+msgstr ""
+
+#: coff/base/coff.cpp:93
+#, fuzzy
+msgid "Could not recognize file (magic number is %1)."
+msgstr "Formato COFF no soportado: el número mágico es %1."
+
+#: progs/gpsim/base/gpsim.cpp:127
+#, fuzzy
+msgid "Could not recognize gpsim version."
+msgstr "Formato COFF no soportado: el número mágico es %1."
+
+#: devices/pic/prog/pic_prog.cpp:381
+msgid "Could not restore band gap bits because programmer does not support writing config bits."
+msgstr ""
+
+#: libgui/toplevel.cpp:715
+msgid "Could not run \"kfind\""
+msgstr ""
+
+#: libgui/toplevel.cpp:731
+msgid "Could not run \"pikloops\""
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:67
+msgid "Could not save configuration: hardware name is empty."
+msgstr ""
+
+#: common/gui/pfile_ext.cpp:45
+msgid "Could not save file."
+msgstr ""
+
+#: libgui/project_manager.cpp:245
+msgid "Could not save project file \"%1\"."
+msgstr ""
+
+#: common/port/serial.cpp:180
+msgid "Could not set file descriptor parameters"
+msgstr ""
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:34
+msgid "Could not start \"gpsim\""
+msgstr ""
+
+#: common/gui/pfile_ext.cpp:94
+msgid "Could not write to temporary file."
+msgstr ""
+
+#: libgui/new_dialogs.cpp:61
+msgid "Create New File"
+msgstr ""
+
+#: piklab-hex/main.cpp:30
+msgid "Create an hex file for the specified device."
+msgstr "Crear un archivo hex para el dispositivo especificado."
+
+#: libgui/project_wizard.cpp:150
+msgid "Create template source file."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:46
+msgid "Crystal/resonator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:47
+msgid "Crystal/resonator, PLL enabled"
+msgstr ""
+
+#: tools/gui/tool_config_widget.cpp:24 tools/custom/custom.h:21
+msgid "Custom"
+msgstr ""
+
+#: tools/gui/tool_config_widget.cpp:109
+msgid "Custom libraries:"
+msgstr ""
+
+#: tools/gui/tool_config_widget.cpp:99
+msgid "Custom options:"
+msgstr ""
+
+#: tools/list/tools_config_widget.cpp:81
+msgid "Custom shell commands:"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:610
+msgid "DEBUG configuration bit is on. Are you sure you want to continue programming the chip?"
+msgstr ""
+
+#: devices/base/generic_device.cpp:61
+msgid "DFN"
+msgstr ""
+
+#: devices/base/generic_device.cpp:56
+msgid "DFN-S"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:30
+msgid "Data EEPROM"
+msgstr ""
+
+#: progs/direct/base/direct.cpp:36
+msgid "Data In"
+msgstr ""
+
+#: progs/direct/base/direct.cpp:33
+msgid "Data Out"
+msgstr ""
+
+#: progs/direct/base/direct.cpp:39
+msgid "Data R/W"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:21
+msgid "Data code-protection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:26
+msgid "Data write-protection"
+msgstr ""
+
+#: tools/list/device_info.cpp:33
+msgid "Datasheet"
+msgstr ""
+
+#: progs/icd2/gui/icd2_group_ui.cpp:29
+msgid "Debug Executive"
+msgstr ""
+
+#: coff/base/coff_object.cpp:125
+msgid "Debug Symbol"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:31
+msgid "Debug Vector"
+msgstr ""
+
+#. i18n: file ./data/app_data/piklabui.rc line 177
+#: rc.cpp:51
+#, no-c-format
+msgid "Debugger Toolbar"
+msgstr ""
+
+#: progs/gui/debug_config_center.h:21 progs/gui/debug_config_center.h:22
+msgid "Debugging Options"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:282 piklab-prog/cmdline.cpp:287
+msgid "Debugging is not supported for specified programmer."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:275
+msgid "Debugging test successful"
+msgstr ""
+
+#: common/common/number.cpp:19
+msgid "Decimal"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:126
+msgid "Dedicated in-circuit port"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:211
+msgid "Default system clock select"
+msgstr ""
+
+#: libgui/project_editor.cpp:36
+#, fuzzy
+msgid "Description:"
+msgstr "Secciones:"
+
+#: piklab-hex/main.cpp:102 piklab-coff/main.cpp:73
+msgid "Destination file already exists."
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:116
+msgid "Details..."
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:190
+msgid "Detected (%1)"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug_specific.cpp:241
+msgid "Detected custom ICD2"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:127
+msgid "Detected ports supported by \"%1\":"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:128
+msgid "Detected ports:"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:235
+msgid "Detecting \"%1\"..."
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:251
+msgid "Detecting ..."
+msgstr ""
+
+#: libgui/editor_manager.cpp:478 libgui/device_gui.cpp:175
+#: libgui/project_manager_ui.cpp:33
+msgid "Device"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:28 coff/base/coff_object.cpp:327
+msgid "Device ID"
+msgstr ""
+
+#: tools/list/device_info.cpp:21
+msgid "Device Page"
+msgstr ""
+
+#: libgui/toplevel.cpp:258
+msgid "Device Power"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:89
+msgid "Device detection:"
+msgstr ""
+
+#: libgui/device_editor.cpp:66
+msgid "Device guessed from file: %1"
+msgstr ""
+
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:159
+msgid "Device memory does not match hex file (at address 0x%2: reading 0x%3 and expecting 0x%4)."
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:104
+msgid "Device memory does not match hex file (in %1 at address %2: reading %3 and expecting %4)."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:253
+msgid "Device memory doesn't match debug executive (at address %1: reading %2 and expecting %3)."
+msgstr ""
+
+#: devices/mem24/prog/mem24_prog.cpp:42
+msgid "Device memory doesn't match hex file (at address %1: reading %2 and expecting %3)."
+msgstr ""
+
+#: devices/mem24/prog/mem24_prog.cpp:40
+msgid "Device memory is not blank (at address %1: reading %2 and expecting %3)."
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:101
+msgid "Device memory is not blank (in %1 at address %2: reading %3 and expecting %4)."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:253
+msgid "Device not autodetectable: continuing with the specified device name \"%1\"..."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:126
+msgid "Device not in programming"
+msgstr ""
+
+#: piklab-hex/main.cpp:104 piklab-prog/cmdline.cpp:157 piklab-coff/main.cpp:75
+msgid "Device not specified."
+msgstr ""
+
+#: libgui/config_gen.cpp:132
+msgid "Device not supported by the selected toolchain."
+msgstr ""
+
+#: libgui/config_gen.cpp:32 libgui/config_center.cpp:66
+#: libgui/project_editor.cpp:46 libgui/project_wizard.cpp:129
+#: coff/base/text_coff.cpp:254
+msgid "Device:"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:104
+msgid "Digital"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:263
+msgid "Digital I/O"
+msgstr ""
+
+#: coff/base/coff_object.cpp:52
+msgid "Direct"
+msgstr ""
+
+#: progs/direct/base/direct_prog.h:59
+msgid "Direct Programmer"
+msgstr ""
+
+#: common/global/about.cpp:87
+msgid "Direct programming for 16F676/630."
+msgstr ""
+
+#: common/global/about.cpp:89
+msgid "Direct programming for 16F73/74/76/77."
+msgstr ""
+
+#: common/global/about.cpp:93
+msgid "Direct programming for 24C EEPROM is inspired from his program \"prog84\"."
+msgstr ""
+
+#: common/global/about.cpp:86
+msgid "Direct programming for PIC18F devices."
+msgstr ""
+
+#: common/global/about.cpp:92
+msgid "Direct programming for dsPICs is inspired from his program \"dspicprg\"."
+msgstr ""
+
+#: libgui/project_wizard.cpp:181
+msgid "Directory does not exists. Create it?"
+msgstr ""
+
+#: libgui/project_wizard.cpp:176
+msgid "Directory is empty."
+msgstr ""
+
+#: libgui/project_wizard.cpp:125
+msgid "Directory:"
+msgstr ""
+
+#: libgui/breakpoint_view.cpp:27
+msgid "Disable breakpoint"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:91 devices/pic/base/pic_config.cpp:191
+#: devices/pic/base/pic_config.cpp:215 devices/pic/base/pic_config.cpp:394
+#: devices/pic/base/pic_config.cpp:398
+msgid "Disabled"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:36
+msgid "Disabled (connected to Vdd)"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:215
+msgid "Disabling code program protection for debugging"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:223
+msgid "Disabling code read protection for debugging"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:219
+msgid "Disabling code write protection for debugging"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:211
+msgid "Disabling watchdog timer for debugging"
+msgstr ""
+
+#: libgui/object_view.cpp:139
+msgid "Disassembling content of hex file editor."
+msgstr ""
+
+#: libgui/object_view.cpp:126
+msgid "Disassembling hex file: %1"
+msgstr ""
+
+#: libgui/project_manager.cpp:380
+msgid "Disassembly"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:98
+msgid "Disassembly Listing"
+msgstr ""
+
+#: libgui/object_view.cpp:120
+msgid "Disassembly not supported for the selected device."
+msgstr ""
+
+#: libgui/object_view.cpp:115
+msgid "Disassembly not supported for the selected toolchain."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:42
+msgid "Disconnect programmer."
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:150
+msgid "Disconnecting..."
+msgstr ""
+
+#: common/cli/cli_main.cpp:55
+msgid "Display all debug messages."
+msgstr ""
+
+#: common/cli/cli_main.cpp:53
+msgid "Display debug messages."
+msgstr ""
+
+#: common/cli/cli_main.cpp:54
+msgid "Display extra debug messages."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:37
+msgid "Display help."
+msgstr ""
+
+#: common/cli/cli_main.cpp:56
+msgid "Display low level debug messages."
+msgstr "Mostrar los mensajes de depuración de bajo nivel."
+
+#: piklab-prog/cli_interactive.cpp:33
+msgid "Display the list of available properties."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:36
+msgid "Display the list of memory ranges."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:34
+msgid "Display the list of registers."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:35
+msgid "Display the list of variables."
+msgstr ""
+
+#: libgui/likeback.cpp:136
+msgid "Do not Help Anymore"
+msgstr ""
+
+#: libgui/project_wizard.cpp:152
+msgid "Do not add files now."
+msgstr ""
+
+#: libgui/likeback.cpp:603
+msgid "Do not ask for features: your wishes will be ignored."
+msgstr ""
+
+#: common/cli/cli_main.cpp:57
+msgid "Do not display messages."
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:200
+msgid "Do you want to delete custom hardware \"%1\"?"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:678
+msgid "Do you want to overwrite the device calibration with %1?"
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:76
+msgid "Do you want to overwrite this custom hardware \"%1\"?"
+msgstr ""
+
+#: tools/list/device_info.cpp:35
+msgid "Documents"
+msgstr "Documentos"
+
+#: coff/base/coff_object.cpp:165
+msgid "Double"
+msgstr ""
+
+#: coff/base/coff_object.cpp:148
+msgid "Dummy Entry (end of block)"
+msgstr ""
+
+#: coff/base/coff_object.cpp:154
+msgid "Duplicate Tag"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:78
+msgid "ECAN"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:130
+msgid "ECCP mux"
+msgstr ""
+
+#: devices/mem24/gui/mem24_memory_editor.cpp:41
+msgid "EEPROM Memory"
+msgstr ""
+
+#: progs/direct/base/direct_mem24.cpp:54
+msgid "EEPROM detected"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:72
+msgid "EL Cheapo classic"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:39
+msgid "ELF"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:76
+msgid "EPE Toolkit mk3"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:38
+msgid "EPIC+"
+msgstr ""
+
+#: devices/base/generic_device.cpp:27
+msgid "EPROM (OTP)"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:80
+msgid "ETT High Vpp"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:82
+msgid "ETT Low Vpp"
+msgstr ""
+
+#: libgui/likeback.cpp:176
+msgid "Each time you have a great or frustrating experience, please click the appropriate hand below the window title-bar, briefly describe what you like or dislike and click Send."
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:36
+msgid "Edit and test hardware"
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:159
+msgid "Edit/Test..."
+msgstr ""
+
+#: common/common/purl_base.cpp:50
+msgid "Elf File"
+msgstr ""
+
+#: libgui/breakpoint_view.cpp:27
+msgid "Enable breakpoint"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:397
+msgid "Enabled"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:77
+msgid "Enabled in run - Disabled in sleep"
+msgstr ""
+
+#: devices/base/generic_device.cpp:20
+msgid "End Of Life"
+msgstr ""
+
+#: coff/base/coff_object.cpp:151
+msgid "End of Structure"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:104
+msgid "End of all code sections"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:346
+msgid "End of command file reached."
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:861
+msgid "End of options"
+msgstr ""
+
+#: piklab-hex/main.cpp:141
+msgid "End:"
+msgstr ""
+
+#: coff/base/coff_object.cpp:168
+msgid "Enumeration"
+msgstr "Enumeración"
+
+#: coff/base/coff_object.cpp:143
+msgid "Enumeration Tag"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:47
+msgid "Erase device memory."
+msgstr ""
+
+#: progs/psp/base/psp.cpp:342
+msgid "Erase failed"
+msgstr ""
+
+#: progs/icd1/base/icd1.cpp:155
+msgid "Erase failed (returned value is %1)"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:311
+msgid "Erasing device memory not supported for specified programmer."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:284
+msgid "Erasing done"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:35 progs/base/generic_prog.cpp:282
+msgid "Erasing..."
+msgstr ""
+
+#: common/port/serial.cpp:300
+msgid "Error checking for data in output buffer"
+msgstr ""
+
+#: common/port/serial.cpp:475
+msgid "Error clearing up break"
+msgstr ""
+
+#: libgui/project_wizard.cpp:183
+msgid "Error creating directory."
+msgstr ""
+
+#: libgui/project_wizard.cpp:246
+msgid "Error creating template file."
+msgstr ""
+
+#: common/port/usb_port.cpp:217 common/port/usb_port.cpp:231
+msgid "Error opening USB device."
+msgstr ""
+
+#: common/global/xml_data_file.cpp:29
+msgid "Error opening file: %1"
+msgstr ""
+
+#: libgui/object_view.cpp:87
+msgid "Error parsing library:\n"
+msgstr ""
+
+#: libgui/object_view.cpp:70
+msgid "Error parsing object:\n"
+msgstr ""
+
+#: progs/direct/base/direct_16.cpp:108
+msgid "Error programming %1 at %2."
+msgstr ""
+
+#: common/port/parallel.cpp:231
+msgid "Error reading bit on pin %1"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:238 progs/sdcdb/base/sdcdb_debug.cpp:237
+msgid "Error reading driven state of IO bit: %1"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:225 progs/gpsim/base/gpsim_debug.cpp:231
+#: progs/sdcdb/base/sdcdb_debug.cpp:224 progs/sdcdb/base/sdcdb_debug.cpp:230
+msgid "Error reading driving state of IO bit: %1"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:107 progs/gpsim/base/gpsim_debug.cpp:129
+#: progs/sdcdb/base/sdcdb_debug.cpp:128
+msgid "Error reading register \"%1\""
+msgstr ""
+
+#: progs/sdcdb/base/sdcdb_debug.cpp:106
+msgid "Error reading register \"W\""
+msgstr ""
+
+#: common/port/serial.cpp:409
+msgid "Error reading serial pin %1"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:207 progs/sdcdb/base/sdcdb_debug.cpp:206
+msgid "Error reading state of IO bit: %1"
+msgstr ""
+
+#: common/port/serial.cpp:261 common/port/serial.cpp:274
+msgid "Error receiving data"
+msgstr ""
+
+#: common/port/usb_port.cpp:393
+msgid "Error receiving data (ep=%1 res=%2)"
+msgstr ""
+
+#: common/port/usb_port.cpp:224
+msgid "Error resetting USB device."
+msgstr ""
+
+#: common/global/xml_data_file.cpp:51
+msgid "Error saving file: %1"
+msgstr ""
+
+#: progs/gpsim/base/gpsim.cpp:94
+msgid "Error send a signal to the subprocess."
+msgstr ""
+
+#: common/port/usb_port.cpp:294
+msgid "Error sending control message to USB port."
+msgstr ""
+
+#: common/port/serial.cpp:229
+msgid "Error sending data"
+msgstr ""
+
+#: common/port/usb_port.cpp:359
+msgid "Error sending data (ep=%1 res=%2)"
+msgstr ""
+
+#: common/port/usb_port.cpp:246
+msgid "Error setting USB configuration %1."
+msgstr ""
+
+#: common/port/serial.cpp:367
+msgid "Error setting bit %1 of serial port to %2"
+msgstr ""
+
+#: common/port/parallel.cpp:211
+msgid "Error setting pin %1 to %2"
+msgstr ""
+
+#: common/port/serial.cpp:466
+msgid "Error setting up break"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:148
+msgid "Error uploading firmware."
+msgstr ""
+
+#: common/port/serial.cpp:311
+msgid "Error while draining"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:306 libgui/hex_editor.cpp:150
+msgid "Error while writing file \"%1\"."
+msgstr ""
+
+#: libgui/hex_editor.cpp:133
+msgid "Error(s) reading hex file."
+msgstr ""
+
+#: tools/gputils/gputils_config.cpp:13 tools/c18/c18_config.cpp:12
+msgid "Errors only"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:79
+msgid "Ethernet"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:210
+msgid "Ethernet LED enable"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:110
+msgid "Even PWM output polarity"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:43
+msgid "Executable"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:52
+msgid "Executable Type:"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:30
+msgid "Executable directory"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:290
+msgid "Executing custom commands..."
+msgstr ""
+
+#: devices/base/generic_device.cpp:35
+msgid "Extended"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:124
+msgid "Extended instruction set"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:93
+msgid "Extended microcontroller"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:35
+msgid "External"
+msgstr ""
+
+#: coff/base/coff_object.cpp:133
+msgid "External Definition"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:53
+msgid "External RAM"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:27
+msgid "External RAM Pointer"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:40
+msgid "External RC oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:42 devices/pic/base/pic_config.cpp:159
+#: devices/pic/base/pic_config.cpp:185
+msgid "External RC oscillator (no CLKOUT)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:41 devices/pic/base/pic_config.cpp:158
+#: devices/pic/base/pic_config.cpp:184
+msgid "External RC oscillator with CLKOUT"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:48
+msgid "External Stack"
+msgstr ""
+
+#: coff/base/coff_object.cpp:130
+msgid "External Symbol"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:219
+msgid "External address bus shift"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:128
+msgid "External bus data wait"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:102
+msgid "External bus data width (in bits)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:49 devices/pic/base/pic_config.cpp:260
+msgid "External clock"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:51 devices/pic/base/pic_config.cpp:153
+#: devices/pic/base/pic_config.cpp:174
+msgid "External clock (no CLKOUT)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:53
+msgid "External clock (no CLKOUT), PLL enabled"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:156 devices/pic/base/pic_config.cpp:177
+msgid "External clock with 16x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:154 devices/pic/base/pic_config.cpp:175
+msgid "External clock with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:55
+msgid "External clock with 4x PLL (no CLKOUT)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:54
+msgid "External clock with 4x PLL and with CLKOUT"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:155 devices/pic/base/pic_config.cpp:176
+msgid "External clock with 8x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:50 devices/pic/base/pic_config.cpp:152
+#: devices/pic/base/pic_config.cpp:173
+msgid "External clock with CLKOUT"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:52
+msgid "External clock with CLKOUT, PLL enabled"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:56
+msgid "External clock with software controlled 4x PLL (no CLKOUT)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:214
+msgid "External memory bus"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:57
+msgid "External resistor"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:59
+msgid "External resistor (no CLKOUT)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:58
+msgid "External resistor with CLKOUT"
+msgstr ""
+
+#: common/global/log.cpp:27
+msgid "Extra debug messages"
+msgstr ""
+
+#: devices/base/device_group.cpp:295
+msgid "F (MHz)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:120
+msgid "FLTA mux"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:212
+msgid "FOSC1:FOSC0"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:27
+msgid "Fail"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:79
+msgid "Fail-safe clock monitor"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:250
+msgid "Failed"
+msgstr ""
+
+#: libgui/project_manager.cpp:503
+msgid "Failed to create new project file"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:223
+msgid "Failed to execute command: check toolchain configuration."
+msgstr ""
+
+#: tools/list/compile_manager.cpp:277
+msgid "Failed to execute custom command #%1."
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:39 progs/sdcdb/base/sdcdb_debug.cpp:39
+msgid "Failed to halt target: kill process."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:75
+msgid "Failed to halt target: try a reset."
+msgstr ""
+
+#: progs/base/generic_debug.cpp:45
+msgid "Failed to initialize device for debugging."
+msgstr ""
+
+#: progs/icd1/base/icd1.cpp:34 progs/icd2/base/icd2_serial.cpp:43
+msgid "Failed to set port mode to '%1'."
+msgstr ""
+
+#: progs/psp/base/psp.cpp:227
+msgid "Failed to set range"
+msgstr ""
+
+#: progs/gpsim/base/gpsim.cpp:58
+msgid "Failed to start \"gpsim\"."
+msgstr ""
+
+#: progs/icd2/base/icd_prog.cpp:30 progs/pickit2/base/pickit2_prog.cpp:67
+msgid "Failed to upload firmware."
+msgstr ""
+
+#: libgui/device_gui.cpp:82
+msgid "Family Tree"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:248
+msgid "Fast RC oscillator"
+msgstr ""
+
+#: devices/pic/pic/pic_group.cpp:65
+msgid "Features"
+msgstr ""
+
+#: common/gui/purl_gui.cpp:43
+msgid "File \"%1\" already exists. Overwrite ?"
+msgstr ""
+
+#: libgui/editor_manager.cpp:109
+msgid "File \"%1\" already loaded. Reload?"
+msgstr ""
+
+#: libgui/project_manager.cpp:313
+msgid "File \"%1\" is not inside the project directory. Do you want to copy the file to your project directory?"
+msgstr ""
+
+#: libgui/device_editor.cpp:74 libgui/editor.cpp:80
+msgid "File %1 not saved."
+msgstr ""
+
+#: coff/base/coff_archive.cpp:115
+msgid "File Members:"
+msgstr ""
+
+#: libgui/new_dialogs.cpp:63
+msgid "File Name:"
+msgstr ""
+
+#: libgui/hex_editor.cpp:142
+msgid "File URL: \"%1\"."
+msgstr ""
+
+#: coff/base/text_coff.cpp:128
+msgid "File could not be read"
+msgstr ""
+
+#: piklab-hex/main.cpp:202
+msgid "File created."
+msgstr ""
+
+#: libgui/project_manager.cpp:319
+msgid "File is already in the project."
+msgstr ""
+
+#: common/global/xml_data_file.cpp:35
+msgid "File is not of correct type."
+msgstr ""
+
+#: common/global/pfile.cpp:55
+msgid "File not open."
+msgstr ""
+
+#: coff/base/coff_archive.cpp:27
+msgid "File size not terminated by 'l' (\"%1\")."
+msgstr ""
+
+#: tools/list/compile_manager.cpp:111 tools/list/compile_manager.cpp:136
+#: common/gui/pfile_ext.cpp:25 common/gui/pfile_ext.cpp:64
+#: common/gui/pfile_ext.cpp:95 common/gui/pfile_ext.cpp:110
+#: common/cli/cli_pfile.cpp:20 common/cli/cli_pfile.cpp:38
+#: libgui/project_manager.cpp:307 libgui/project_manager.cpp:319
+msgid "File: %1"
+msgstr ""
+
+#: libgui/project_manager.cpp:325 libgui/project_wizard.cpp:246
+msgid "File: %1\n"
+msgstr ""
+
+#: libgui/project_wizard.cpp:82 coff/base/coff_object.cpp:152
+msgid "Filename"
+msgstr ""
+
+#: piklab-coff/main.cpp:197
+#, fuzzy
+msgid "Files:"
+msgstr "Todos los archivos"
+
+#: piklab-hex/main.cpp:50
+msgid "Fill for checksum verification (cf datasheets)."
+msgstr ""
+
+#: piklab-hex/main.cpp:39
+msgid "Fill option."
+msgstr "Opcion de completado"
+
+#: piklab-hex/main.cpp:275
+msgid "Fill options:"
+msgstr "Opciones de completado"
+
+#: piklab-hex/main.cpp:48
+msgid "Fill with blank values (default)."
+msgstr ""
+
+#: piklab-hex/main.cpp:278
+msgid "Fill with the specified numeric value."
+msgstr "Completar con el valor numerico especificado."
+
+#: piklab-hex/main.cpp:49
+msgid "Fill with zeroes."
+msgstr ""
+
+#: libgui/device_gui.cpp:110
+msgid "Filters:"
+msgstr ""
+
+#: libgui/project_manager.cpp:192
+msgid "Find Files..."
+msgstr "Encontrar archivos..."
+
+#: progs/gui/prog_group_ui.cpp:64
+msgid "Firmware"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:126
+msgid "Firmware directory is not configured or does not exist."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:142
+msgid "Firmware directory not configured."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:58
+msgid "Firmware directory."
+msgstr ""
+
+#: progs/gui/prog_config_widget.cpp:26
+msgid "Firmware directory:"
+msgstr ""
+
+#: progs/icd2/base/icd_prog.cpp:26
+msgid "Firmware hex file seems incompatible with device 16F876 inside ICD."
+msgstr ""
+
+#: progs/pickit2/base/pickit2_prog.cpp:60
+msgid "Firmware hex file seems incompatible with device 18F2550 inside PICkit2."
+msgstr ""
+
+#: progs/pickit2/base/pickit2.cpp:52
+msgid "Firmware memory does not match hex file (at address 0x%2: reading 0x%3 and expecting 0x%4)."
+msgstr ""
+
+#: progs/icd2/base/icd2_prog.cpp:108
+msgid "Firmware still incorrect after uploading."
+msgstr ""
+
+#: progs/pickit2/base/pickit2_prog.cpp:70
+msgid "Firmware succesfully uploaded."
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:147
+msgid "Firmware uploaded successfully."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:136
+msgid "Firmware version is %1"
+msgstr ""
+
+#: piklab-hex/main.cpp:82
+msgid "First hex file: "
+msgstr ""
+
+#: devices/base/generic_device.cpp:26
+msgid "Flash"
+msgstr ""
+
+#: libgui/device_gui.cpp:83
+msgid "Flat List"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:36 coff/base/coff_object.cpp:164
+msgid "Float"
+msgstr ""
+
+#: devices/gui/memory_editor.cpp:277
+msgid "For checksum check"
+msgstr ""
+
+#: libgui/watch_view.cpp:99 libgui/watch_view.cpp:101
+msgid "Format"
+msgstr ""
+
+#: piklab-hex/main.cpp:123 coff/base/text_coff.cpp:252
+msgid "Format:"
+msgstr ""
+
+#: libgui/toplevel.cpp:204
+msgid "Forward"
+msgstr ""
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:36
+msgid "Found version \"%1\""
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:276
+msgid "Frequency range selection for FRC oscillator"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:24 coff/base/coff_object.cpp:179
+msgid "Function"
+msgstr ""
+
+#: coff/base/coff_object.cpp:137
+msgid "Function Argument"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:59
+msgid "Function or Undefined Space"
+msgstr ""
+
+#: devices/base/generic_device.cpp:18
+msgid "Future Product"
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:54
+msgid "GPRs"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.h:76
+msgid "GPSim"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:251 progs/sdcdb/base/sdcdb_debug.cpp:250
+msgid "GPSim (4MHz)"
+msgstr ""
+
+#: tools/gputils/gputils.h:33
+msgid "GPUtils"
+msgstr ""
+
+#: libgui/config_center.h:34 libgui/project_editor.cpp:30
+msgid "General"
+msgstr ""
+
+#: libgui/config_center.h:35
+msgid "General Configuration"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:251
+msgid "General Purpose Registers:"
+msgstr ""
+
+#: devices/pic/base/pic_protection.cpp:358
+msgid "General Segment"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:192
+msgid "General code segment read-protection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:193
+msgid "General code segment write-protection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:243
+msgid "General segment security"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:242
+msgid "General segment write-protection"
+msgstr "Protección de escritura de segmento general"
+
+#: libgui/project_manager_ui.cpp:35
+msgid "Generated"
+msgstr ""
+
+#: libgui/config_gen.cpp:112
+msgid "Generation is not supported yet for the selected toolchain or device."
+msgstr ""
+
+#: libgui/config_gen.cpp:126
+msgid "Generation is only partially supported for this device."
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:25
+msgid "Generic Pointer"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:841
+msgid "Generic options"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:41
+msgid "Get property value: \"get <property>\" or \"<property>\"."
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:16
+msgid "Global"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:45
+msgid "Global declarations"
+msgstr ""
+
+#: devices/pic/gui/pic_memory_editor.cpp:44
+msgid "Go to end"
+msgstr ""
+
+#: devices/pic/gui/pic_memory_editor.cpp:41
+msgid "Go to start"
+msgstr ""
+
+#: piklab/main.cpp:21
+msgid "Graphical development environment for applications based on PIC and dsPIC microcontrollers."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:51
+msgid "HOODMICRO"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:258
+msgid "HS crystal oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:169
+msgid "HS/2 Crystal with 16x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:167
+msgid "HS/2 Crystal with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:168
+msgid "HS/2 Crystal with 8x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:172
+msgid "HS/3 Crystal with 16x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:170
+msgid "HS/3 Crystal with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:171
+msgid "HS/3 Crystal with 8x PLL"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:240
+msgid "Hardcoded (%1)"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:32
+msgid "Hardware Stack"
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:45
+msgid "Hardware name:"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:31
+msgid "Header directory"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:33
+msgid "Headers"
+msgstr ""
+
+#: tools/list/tools_config_widget.cpp:24
+msgid "Help Dialog"
+msgstr ""
+
+#: libgui/likeback.cpp:184
+msgid "Help Improve the Application"
+msgstr ""
+
+#: libgui/toplevel.cpp:539
+msgid "Hex"
+msgstr "Hex"
+
+#: common/common/purl_base.cpp:49 libgui/project_manager_ui.cpp:97
+msgid "Hex File"
+msgstr "Archivo hex"
+
+#: piklab-hex/main.cpp:148
+msgid "Hex file cannot be fixed because the format was not recognized or is inconsistent."
+msgstr ""
+
+#: piklab-hex/main.cpp:156
+msgid "Hex file cleaned and fixed."
+msgstr ""
+
+#: piklab-hex/main.cpp:155
+msgid "Hex file cleaned."
+msgstr ""
+
+#: tools/gui/tool_config_widget.cpp:120
+msgid "Hex file format:"
+msgstr ""
+
+#: piklab-hex/main.cpp:118
+msgid "Hex file is compatible with device \"%1\"."
+msgstr "El archivo hex parece compatible con el dispositivo «%1»"
+
+#: piklab-hex/main.cpp:115 piklab-hex/main.cpp:144
+msgid "Hex file is valid."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:175
+msgid "Hex file seems incompatible with device \"%1\"."
+msgstr "El archivo hex parece incompatible con el dispositivo «%1»"
+
+#: piklab-prog/cli_interactive.cpp:60
+msgid "Hex file to be used for programming."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:454
+msgid "Hex filename for programming."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:161
+msgid "Hex filename not specified."
+msgstr ""
+
+#: piklab-hex/main.cpp:288
+msgid "Hex filename(s)."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:56
+msgid "Hex output file format."
+msgstr ""
+
+#: common/common/number.cpp:20
+msgid "Hexadecimal"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:26
+msgid "High"
+msgstr ""
+
+#: devices/pic/gui/pic_memory_editor.cpp:77
+#: devices/pic/base/pic_config.cpp:231 devices/pic/base/pic_config.cpp:238
+msgid "High Security"
+msgstr ""
+
+#: devices/base/generic_device.cpp:42
+msgid "High Voltage"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:277
+msgid "High range (nominal FRC frequency is 14.1 MHz)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:245
+msgid "High security"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:147 devices/pic/base/pic_config.cpp:162
+msgid "High speed crystal"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:60
+msgid "High speed crystal/resonator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:62
+msgid "High speed crystal/resonator with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:63
+msgid "High speed crystal/resonator with software controlled 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:61
+msgid "High speed crystal/resonator, PLL enabled"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:72
+msgid "Highest"
+msgstr ""
+
+#: libgui/likeback.cpp:74
+msgid "I Do not Like..."
+msgstr ""
+
+#: libgui/likeback.cpp:81
+msgid "I Found a Bug..."
+msgstr ""
+
+#: libgui/likeback.cpp:67
+msgid "I Like..."
+msgstr ""
+
+#: libgui/toplevel.cpp:338 libgui/likeback.cpp:537
+msgid "I do not like..."
+msgstr ""
+
+#: libgui/toplevel.cpp:342 libgui/likeback.cpp:544
+msgid "I found a bug..."
+msgstr ""
+
+#: libgui/toplevel.cpp:334 libgui/likeback.cpp:530
+msgid "I like..."
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:47
+msgid "I/Os"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:273
+#, fuzzy
+msgid "I2C pins selection"
+msgstr "Sección Interna"
+
+#: devices/pic/base/pic_config.cpp:195
+msgid "ICD communication channel"
+msgstr ""
+
+#: progs/icd1/base/icd1_prog.h:44
+msgid "ICD1 Programmer"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.h:76
+msgid "ICD2 Debugger"
+msgstr ""
+
+#: progs/icd2/base/icd2_prog.h:76
+msgid "ICD2 Programmer"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:179
+msgid "INT pin interrupt service routine"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:213
+msgid "INTRC"
+msgstr ""
+
+#: devices/pic/pic/pic_group.cpp:55
+msgid "IO Ports"
+msgstr ""
+
+#: libgui/likeback.cpp:179
+msgid "Icons description:"
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:85
+msgid "Id returned by bootloader corresponds to other devices: %1 (%2 read and %3 expected)."
+msgstr ""
+
+#: progs/icd2/gui/icd2_group_ui.cpp:21
+msgid "Id:"
+msgstr ""
+
+#: devices/base/generic_device.cpp:17
+msgid "In Production"
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:19
+msgid "In Programming"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:82
+msgid "In-circuit debugger"
+msgstr ""
+
+#: common/common/purl_base.cpp:36
+msgid "Include File"
+msgstr ""
+
+#: tools/gui/tool_config_widget.h:57
+msgid "Include directories:"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:35
+msgid "Included"
+msgstr ""
+
+#: progs/psp/base/psp_serial.cpp:59
+msgid "Incorrect ack: expecting %1, received %2"
+msgstr ""
+
+#: progs/psp/base/psp_serial.cpp:67
+msgid "Incorrect received data end: expecting 00, received %1"
+msgstr ""
+
+#: coff/base/coff_object.cpp:54
+msgid "Indentifier"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:63
+msgid "Index:"
+msgstr ""
+
+#: devices/base/generic_device.cpp:34
+msgid "Industrial"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:107
+#, fuzzy
+msgid "Information:"
+msgstr "Configuración:"
+
+#: devices/pic/base/pic_config.cpp:247
+msgid "Initial oscillator source"
+msgstr ""
+
+#: coff/base/coff_object.cpp:330
+msgid "Initialized Data"
+msgstr ""
+
+#: coff/base/coff_object.cpp:122
+msgid "Inside Section"
+msgstr "Sección Interna"
+
+#: coff/base/cdb_parser.cpp:32 coff/base/coff_object.cpp:162
+msgid "Int"
+msgstr ""
+
+#: common/cli/cli_main.cpp:69
+msgid "Interactive mode"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:228
+msgid "Interactive mode: type help for help"
+msgstr ""
+
+#: common/port/usb_port.cpp:255
+msgid "Interface %1 not present: using %2"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:54
+msgid "Internal RAM"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:28
+msgid "Internal RAM Pointer"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:49
+msgid "Internal Stack"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:73
+msgid "Internal Trim"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:141
+msgid "Internal fast RC"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:249
+msgid "Internal fast RC oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:182
+msgid "Internal fast RC oscillator (no PLL)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:180
+msgid "Internal fast RC oscillator with 16x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:178
+msgid "Internal fast RC oscillator with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:157 devices/pic/base/pic_config.cpp:179
+msgid "Internal fast RC oscillator with 8x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:250
+msgid "Internal fast RC oscillator with PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:255
+msgid "Internal fast RC oscillator with postscaler"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:142
+msgid "Internal low-power RC"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:183
+msgid "Internal low-power RC oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:43
+msgid "Internal oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:45
+msgid "Internal oscillator (no CLKOUT)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:205
+msgid "Internal oscillator speed"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:44
+msgid "Internal oscillator with CLKOUT"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:65
+msgid "Internal oscillator, HS used by USB"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:64
+msgid "Internal oscillator, XT used by USB"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:80
+msgid "Internal-external switchover"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:332
+msgid "Invalid begin or end character for read block."
+msgstr ""
+
+#: progs/psp/base/psp.cpp:185
+msgid "Invalid firmware version"
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:48
+msgid "Inverted"
+msgstr ""
+
+#: libgui/toplevel.cpp:938
+#, fuzzy
+msgid "It is not possible to start a debugging session with an hex file not generated with the current project."
+msgstr "<qt>No es posible iniciar una sesión de depuración con un archivo hex no generado con el actual proyecto.</qt>"
+
+#: progs/icd2/base/icd2_prog.cpp:38
+msgid "It is not recommended to power dsPICs from ICD. Continue anyway?"
+msgstr ""
+
+#: libgui/likeback.cpp:395
+msgid "It will only be used to contact you back if more information is needed about your comments, how to reproduce the bugs you report, send bug corrections for you to test..."
+msgstr ""
+
+#: devices/pic/base/pic.cpp:44
+msgid "J"
+msgstr ""
+
+#: tools/jal/jal.h:32
+msgid "JAL"
+msgstr ""
+
+#: common/common/purl_base.cpp:27
+msgid "JAL Compiler"
+msgstr ""
+
+#: common/common/purl_base.cpp:40
+msgid "JAL File"
+msgstr ""
+
+#: tools/jalv2/jalv2.h:32
+msgid "JAL V2"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:41
+msgid "JDM classic"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:43
+msgid "JDM classic (delay 10)"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:45
+msgid "JDM classic (delay 20)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:268
+msgid "JTAG port enabled"
+msgstr "Puerto JTAG habilitado"
+
+#: devices/pic/base/pic.cpp:45
+msgid "K"
+msgstr ""
+
+#: libgui/toplevel.cpp:156
+msgid "Konsole"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:80
+msgid "LCD"
+msgstr ""
+
+#: common/global/about.cpp:81
+msgid "LPLAB author (original microchip programmer support)."
+msgstr ""
+
+#: coff/base/coff_object.cpp:134
+msgid "Label"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:21
+#, fuzzy
+msgid "Librarian"
+msgstr "Calibración"
+
+#: tools/base/generic_tool.cpp:21
+msgid "Librarian:"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:44
+#, fuzzy
+msgid "Library"
+msgstr "Binario"
+
+#: tools/base/generic_tool.cpp:33
+msgid "Library Directory"
+msgstr ""
+
+#: common/common/purl_base.cpp:44
+msgid "Library File"
+msgstr ""
+
+#: coff/base/coff_object.cpp:153
+msgid "Line Number"
+msgstr ""
+
+#: libgui/text_editor.cpp:170
+msgid "Line: %1  Col: %2"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:19
+msgid "Linker"
+msgstr ""
+
+#: common/common/purl_base.cpp:46 libgui/project_manager.cpp:165
+#: libgui/project_manager_ui.cpp:33
+msgid "Linker Script"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:32
+msgid "Linker Script Directory"
+msgstr ""
+
+#: common/common/purl_base.cpp:47
+msgid "Linker Script for PIC30"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:19
+msgid "Linker:"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:99
+msgid "List"
+msgstr ""
+
+#: common/common/purl_base.cpp:52
+msgid "List File"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:18
+msgid "Local"
+msgstr ""
+
+#: libgui/breakpoint_view.cpp:48
+msgid "Location"
+msgstr ""
+
+#: libgui/new_dialogs.cpp:32
+msgid "Location:"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:31 coff/base/coff_object.cpp:163
+msgid "Long"
+msgstr ""
+
+#: coff/base/coff_object.cpp:174
+msgid "Long Double"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:25
+msgid "Low"
+msgstr ""
+
+#: devices/base/generic_device.cpp:40
+msgid "Low Power"
+msgstr ""
+
+#: devices/base/generic_device.cpp:41
+msgid "Low Voltage"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:74
+msgid "Low Voltage Detect"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:254
+msgid "Low power RC oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:48
+msgid "Low power crystal"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:116
+msgid "Low power in sleep mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:278
+msgid "Low range (nominal FRC frequency is 9.7 MHz)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:86
+msgid "Low voltage programming"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:181
+msgid "Low-power 32 kHz oscillator (TMR1 oscillator)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:123
+msgid "Low-power timer1 oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:146 devices/pic/base/pic_config.cpp:161
+msgid "Low-power/low-frequency crystal"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:52
+msgid "Lower-128-byte Internal RAM"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:69
+msgid "Lowest"
+msgstr ""
+
+#: progs/direct/base/direct.cpp:24
+msgid "MCLR (Vpp)"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:52
+msgid "MCLR Vdd"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:52
+msgid "MCLR Vpp"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:51
+msgid "MCLR ground"
+msgstr ""
+
+#: devices/base/generic_device.cpp:60
+msgid "MLF"
+msgstr ""
+
+#: tools/mpc/mpc.h:32
+msgid "MPC Compiler"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:141 progs/base/generic_prog.cpp:149
+#: progs/base/generic_prog.cpp:157
+msgid "MPLAB %1"
+msgstr ""
+
+#: devices/base/generic_device.cpp:55
+msgid "MQFP"
+msgstr ""
+
+#: devices/base/generic_device.cpp:50
+msgid "MSOP"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:220
+msgid "MSSP address select bit"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:138
+msgid "Macros"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:38
+msgid "Magic number: %1"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:109
+msgid "Malformed record: "
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:220
+msgid "Malformed string received \"%1\""
+msgstr ""
+
+#: common/common/purl_base.cpp:53
+msgid "Map File"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:204
+msgid "Master clear pull-up resistor"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:34
+msgid "Master clear reset"
+msgstr ""
+
+#: devices/base/generic_device.cpp:22
+msgid "Mature"
+msgstr ""
+
+#: common/global/log.cpp:28
+msgid "Max debug messages"
+msgstr ""
+
+#: coff/base/coff_object.cpp:169
+msgid "Member Of Enumeration"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:19
+msgid "Member name not terminated by '/' (\"%1\")."
+msgstr ""
+
+#: coff/base/coff_object.cpp:144
+msgid "Member of Enumeration"
+msgstr ""
+
+#: coff/base/coff_object.cpp:136
+msgid "Member of Structure"
+msgstr ""
+
+#: coff/base/coff_object.cpp:139
+msgid "Member of Union"
+msgstr ""
+
+#: libgui/device_gui.cpp:408 libgui/project_manager_ui.cpp:100
+msgid "Memory Map"
+msgstr ""
+
+#: devices/mem24/mem24/mem24_group.cpp:22
+msgid "Memory Size"
+msgstr ""
+
+#: devices/pic/pic/pic_group.cpp:27
+msgid "Memory Type"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:237
+msgid "Memory area for debug executive was not empty. Overwrite it and continue anyway..."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:83
+msgid "Memory parity error"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:254
+msgid "Memory range not present on this device."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:258
+msgid "Memory range not recognized."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:57
+msgid "Memory range to operate on."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:259
+msgid "Memory ranges are not supported for the specified device."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:148
+msgid "Memory ranges for PIC/dsPIC devices:"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:94
+msgid "Microcontroller"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:95
+msgid "Microprocessor"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:97
+msgid "Microprocessor with boot block"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:71
+msgid "Mid/High"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:70
+msgid "Mid/Low"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:52
+msgid "Midrange Family"
+msgstr ""
+
+#: devices/pic/base/pic_register.cpp:76
+msgid "Mirror of %1"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:260
+msgid "Missing or incorrect device (Read id is %1)."
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:51
+msgid "Module Vpp"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:74
+msgid "Monty-Robot programmer"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:82
+msgid "Motion Feeback"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:81
+msgid "Motor Control"
+msgstr ""
+
+#: common/gui/editlistbox.cpp:147
+msgid "Move &Down"
+msgstr ""
+
+#: common/gui/editlistbox.cpp:142
+msgid "Move &Up"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:70
+msgid "Myke's EL Cheapo"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:58 libgui/project_editor.cpp:32
+#: libgui/project_wizard.cpp:120
+msgid "Name:"
+msgstr ""
+
+#: libgui/project_manager.cpp:218
+msgid "New File..."
+msgstr ""
+
+#: coff/base/coff.cpp:29 coff/base/coff_object.cpp:36
+msgid "New Microchip"
+msgstr ""
+
+#: libgui/project_manager.cpp:181 libgui/toplevel.cpp:226
+msgid "New Project..."
+msgstr ""
+
+#: libgui/project_wizard.cpp:158
+msgid "New Project: Add Files"
+msgstr ""
+
+#: libgui/project_wizard.cpp:117
+msgid "New Project: Basic Settings"
+msgstr ""
+
+#: libgui/project_wizard.cpp:147
+msgid "New Project: Source Files"
+msgstr ""
+
+#: libgui/project_manager.cpp:197
+msgid "New Source File..."
+msgstr ""
+
+#: libgui/toplevel.cpp:184
+msgid "New hex File..."
+msgstr "Nuevo archivo hex..."
+
+#: progs/gui/hardware_config_widget.cpp:159
+msgid "New/Test..."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:180
+msgid "No \"goto\" instruction in the first four instructions."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:261
+msgid "No COFF file specified."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:171
+#, fuzzy
+msgid "No breakpoint set."
+msgstr "Puntos de parada"
+
+#: common/cli/cli_main.cpp:27
+msgid "No command specified"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:286
+msgid "No custom commands specified."
+msgstr ""
+
+#: common/global/log.cpp:25
+msgid "No debug message"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:98
+#, fuzzy
+msgid "No device selected."
+msgstr "No probado."
+
+#: piklab-prog/cli_interactive.cpp:243 piklab-prog/cli_interactive.cpp:259
+#, fuzzy
+msgid "No device specified."
+msgstr "No probado."
+
+#: common/nokde/nokde_kaboutdata.cpp:430
+msgid ""
+"No licensing terms for this program have been specified.\n"
+"Please check the documentation or the source for any\n"
+"licensing terms.\n"
+msgstr ""
+
+#: progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp:37
+msgid "No of Retries:"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:244 piklab-prog/cli_interactive.cpp:262
+#, fuzzy
+msgid "No register."
+msgstr "No probado."
+
+#: devices/pic/gui/pic_group_ui.cpp:72
+msgid "No variable"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:266
+#, fuzzy
+msgid "No variable."
+msgstr "Número de variables:"
+
+#: piklab-hex/main.cpp:137
+msgid "No. of Words:"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:108
+msgid "No. of file members:"
+msgstr "Número de archivos miembro:"
+
+#: coff/base/text_coff.cpp:258
+msgid "No. of sections:"
+msgstr ""
+
+#: coff/base/text_coff.cpp:259 coff/base/coff_archive.cpp:109
+msgid "No. of symbols:"
+msgstr ""
+
+#: coff/base/text_coff.cpp:260
+msgid "No. of variables:"
+msgstr "Número de variables:"
+
+#: libgui/breakpoint_view.cpp:64
+msgid "Non-code breakpoint"
+msgstr ""
+
+#: devices/base/generic_device.cpp:39 devices/pic/base/pic.cpp:43
+msgid "Normal"
+msgstr ""
+
+#: common/global/log.cpp:26
+msgid "Normal debug messages"
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:61
+msgid "Not Connected"
+msgstr ""
+
+#: devices/base/generic_device.cpp:19
+msgid "Not Recommended for New Design"
+msgstr ""
+
+#: common/common/group.cpp:13
+msgid "Not Supported"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:225
+msgid "Not connected to EMB"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:72
+msgid "Not tested."
+msgstr "No probado."
+
+#: libgui/likeback.cpp:598
+msgid "Note that to improve this application, it's important to tell us the things you like as much as the things you dislike."
+msgstr ""
+
+#: common/port/usb_port.cpp:401
+msgid "Nothing received: retrying..."
+msgstr ""
+
+#: common/port/usb_port.cpp:363
+msgid "Nothing sent: retrying..."
+msgstr ""
+
+#: piklab-hex/main.cpp:232 piklab-prog/cli_interactive.cpp:158
+#: piklab-prog/cli_interactive.cpp:298
+msgid "Number format not recognized."
+msgstr "Formato de número no reconocido"
+
+#: devices/pic/base/pic_config.cpp:262
+msgid "OSC2 pin function"
+msgstr ""
+
+#: coff/base/coff.cpp:23
+msgid "Object"
+msgstr ""
+
+#: common/common/purl_base.cpp:43
+msgid "Object File"
+msgstr ""
+
+#: libgui/project_manager.cpp:213 libgui/project_manager_ui.cpp:34
+msgid "Objects"
+msgstr ""
+
+#: common/common/number.cpp:22
+msgid "Octal"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:107
+msgid "Odd PWM output polarity"
+msgstr ""
+
+#: coff/base/coff.cpp:27 coff/base/coff_object.cpp:35
+msgid "Old Microchip"
+msgstr ""
+
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:86
+msgid "Only bootloader version 1.x is supported"
+msgstr ""
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:38
+msgid "Only bootloader version 2.x is supported."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:315
+msgid "Only code and EEPROM will be erased."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:316
+msgid "Only code will be erased."
+msgstr ""
+
+#: libgui/likeback.cpp:594
+msgid "Only english language is accepted."
+msgstr ""
+
+#: progs/base/prog_config.cpp:69
+msgid "Only program what is needed (faster)."
+msgstr ""
+
+#: progs/base/debug_config.cpp:13
+msgid "Only stop stepping on project source line."
+msgstr ""
+
+#: progs/base/debug_config.cpp:12
+msgid "Only stop stepping on source line."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:177
+msgid "Only the first word of the \"goto\" instruction is into the first four instructions."
+msgstr ""
+
+#: progs/base/prog_config.cpp:71
+msgid "Only verify programmed words in code memory (faster)."
+msgstr ""
+
+#: progs/pickit2/gui/pickit2_group_ui.cpp:33
+msgid "Open Calibration Firmware"
+msgstr ""
+
+#: libgui/toplevel.cpp:554
+msgid "Open File"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:142
+msgid "Open Firmware"
+msgstr ""
+
+#: libgui/project_manager.cpp:182 libgui/toplevel.cpp:228
+msgid "Open Project..."
+msgstr ""
+
+#: libgui/toplevel.cpp:230
+msgid "Open Recent Project"
+msgstr ""
+
+#: common/global/log.cpp:58
+msgid "Operation aborted by user."
+msgstr ""
+
+#: coff/base/text_coff.cpp:257
+msgid "Option header:"
+msgstr ""
+
+#: piklab/main.cpp:15
+msgid "Optional filenames to be opened upon startup."
+msgstr ""
+
+#: coff/base/coff_object.cpp:469
+#, fuzzy
+msgid "Optional header format not supported: magic number is %1."
+msgstr "Formato COFF no soportado: el número mágico es %1."
+
+#: coff/base/coff_object.cpp:538
+msgid "Optionnal header size is not %1: %2"
+msgstr ""
+
+#: libgui/project_manager.cpp:191
+msgid "Options..."
+msgstr ""
+
+#: common/global/about.cpp:80
+msgid "Original author of PiKdev."
+msgstr ""
+
+#: common/global/about.cpp:85
+msgid "Original code for direct programming."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:351
+msgid "Osccal backup cannot be read by selected programmer"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:314
+msgid "Osccal backup cannot be read by the selected programmer"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:303
+msgid "Osccal cannot be read by the selected programmer"
+msgstr ""
+
+#: progs/pickit2/gui/pickit2_group_ui.cpp:28
+msgid "Osccal regeneration not available for the selected device."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:39
+msgid "Oscillator"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:175
+msgid "Oscillator calibration regeneration is not available with the selected programmer."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:160
+msgid "Oscillator mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:140
+msgid "Oscillator source"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:100
+msgid "Oscillator system clock switch"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:64
+#, fuzzy
+msgid "Output Executable Type:"
+msgstr "Tipo COFF:"
+
+#: piklab-prog/cmdline.cpp:178
+msgid "Output hex filename already exists."
+msgstr ""
+
+#: libgui/log_view.cpp:89
+msgid "Output in console"
+msgstr ""
+
+#: tools/list/tools_config_widget.cpp:53
+#, fuzzy
+msgid "Output type:"
+msgstr "Tipo COFF:"
+
+#: common/cli/cli_main.cpp:63
+msgid "Overwrite files and answer \"yes\" to questions."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:32
+msgid "P16PRO40 7407"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:30
+msgid "P16PRO40 classic"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:36
+msgid "P16PRO40-VPP40 7407"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:34
+msgid "P16PRO40-VPP40 classic"
+msgstr ""
+
+#: devices/base/generic_device.cpp:46
+msgid "PDIP"
+msgstr ""
+
+#: devices/pic/pic/pic_group.h:25
+msgid "PIC"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:47
+msgid "PIC Elmer"
+msgstr ""
+
+#: coff/base/coff.cpp:28
+msgid "PIC30"
+msgstr ""
+
+#: tools/pic30/pic30.h:33
+msgid "PIC30 Toolchain"
+msgstr ""
+
+#: tools/picc/picc.h:76 coff/base/coff_object.cpp:37
+msgid "PICC Compiler"
+msgstr ""
+
+#: tools/picc/picc.h:64
+msgid "PICC Lite Compiler"
+msgstr ""
+
+#: tools/picc/picc.h:88
+msgid "PICC-18 Compiler"
+msgstr ""
+
+#: progs/pickit1/base/pickit1_prog.h:35
+msgid "PICkit1"
+msgstr ""
+
+#: progs/pickit2/base/pickit2_prog.h:37
+msgid "PICkit2 Firmware 1.x"
+msgstr "Firmware PICkit2 1.x"
+
+#: progs/pickit2v2/base/pickit2v2_prog.h:39
+msgid "PICkit2 Firmware 2.x"
+msgstr "Firmware PICkit2 2.x"
+
+#: devices/base/generic_device.cpp:59
+msgid "PLCC"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:201
+msgid "PLL clock (divided by)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:223
+msgid "PMP pin select bit"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:103
+msgid "PORTB A/D"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:131
+msgid "PWM multiplexed onto RE6 and RE3"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:133
+msgid "PWM multiplexed onto RE6 and RE5"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:132
+msgid "PWM multiplexed onto RH7 and RH4"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:134
+msgid "PWM multiplexed onto RH7 and RH6"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:113
+msgid "PWM output pin reset state"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:121
+msgid "PWM4 mux"
+msgstr ""
+
+#: devices/base/device_group.cpp:251
+msgid "Packaging"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:29
+msgid "Paged Pointer"
+msgstr ""
+
+#: progs/gui/port_selector.cpp:21
+msgid "Parallel"
+msgstr ""
+
+#: common/port/port.cpp:62
+msgid "Parallel Port"
+msgstr ""
+
+#: coff/base/text_coff.cpp:245
+msgid "Parsing COFF file is not supported for this device or an error occured."
+msgstr "El dispositivo no soporta el análisis de archivos COFF o sucedió un error."
+
+#: progs/manager/debug_manager.cpp:84
+msgid "Parsing COFF file: %1"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:24
+msgid "Pass"
+msgstr ""
+
+#: common/cli/cli_main.cpp:51
+msgid "Perform the requested command."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:269
+msgid "Peripheral pin select configuration"
+msgstr ""
+
+#: progs/picdem_bootloader/base/picdem_bootloader_prog.h:31
+msgid "Picdem Bootloader"
+msgstr ""
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader_prog.h:32
+msgid "Pickit2 Bootloader"
+msgstr ""
+
+#: progs/psp/base/psp_prog.h:37
+msgid "Picstart Plus"
+msgstr ""
+
+#: common/common/purl_base.cpp:58
+msgid "Pikdev Project File"
+msgstr ""
+
+#: piklab/main.cpp:21
+msgid "Piklab"
+msgstr ""
+
+#: piklab-coff/main.cpp:278
+msgid "Piklab COFF Utility"
+msgstr ""
+
+#: piklab-hex/main.cpp:287
+msgid "Piklab Hex Utility"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:453
+msgid "Piklab Programmer Utility"
+msgstr ""
+
+#: progs/gui/port_selector.cpp:68
+msgid "Piklab has been compiled without support for USB port."
+msgstr "Piklab se compiló sin soporte para puerto USB."
+
+#: progs/gui/port_selector.cpp:65
+msgid "Piklab has been compiled without support for parallel port."
+msgstr "Piklab se compilló sin soporte para puerto paralelo."
+
+#: libgui/device_gui.cpp:418
+msgid "Pin Diagrams"
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:34
+msgid "Pin assignment"
+msgstr ""
+
+#: libgui/likeback.cpp:545
+msgid "Please briefly describe the bug you encountered."
+msgstr ""
+
+#: libgui/likeback.cpp:538
+msgid "Please briefly describe what you do not like."
+msgstr ""
+
+#: libgui/likeback.cpp:531
+msgid "Please briefly describe what you like."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:333
+msgid "Please check installation of selected software debugger."
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:79
+msgid "Please compile the current project"
+msgstr ""
+
+#: libgui/likeback.cpp:394
+msgid "Please provide your email address."
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:654
+msgid "Please use %1 to report bugs, do not mail the authors directly.\n"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:652
+msgid "Please use http://bugs.kde.org to report bugs, do not mail the authors directly.\n"
+msgstr ""
+
+#: coff/base/coff_object.cpp:178
+msgid "Pointer"
+msgstr "Puntero"
+
+#: progs/gui/prog_config_center.cpp:119
+msgid "Port Selection"
+msgstr ""
+
+#: progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp:20
+msgid "Port Speed:"
+msgstr ""
+
+#: progs/direct/base/direct.cpp:27
+msgid "Power (Vdd)"
+msgstr ""
+
+#: progs/base/prog_config.cpp:72
+msgid "Power down target after programming."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:190
+msgid "Power-on reset timer value (ms)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:37
+msgid "Power-up timer"
+msgstr ""
+
+#. i18n: file ./data/app_data/piklabui.rc line 83
+#: rc.cpp:27
+#, no-c-format
+msgid "Pr&ogrammer"
+msgstr ""
+
+#: progs/base/prog_config.cpp:75
+msgid "Preserve data EEPROM when programming."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:143
+msgid "Primary"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:251
+msgid "Primary oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:145 devices/pic/base/pic_config.cpp:256
+msgid "Primary oscillator mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:252
+msgid "Primary oscillator with PLL"
+msgstr ""
+
+#: progs/icd2/base/icd2_usb.cpp:77
+msgid "Problem connecting ICD2: please try again after unplug-replug."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:92
+msgid "Processor mode"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:34
+msgid "Program Executive"
+msgstr ""
+
+#: libgui/toplevel.cpp:144
+msgid "Program Log"
+msgstr ""
+
+#: progs/base/prog_config.cpp:76
+msgid "Program data EEPROM."
+msgstr ""
+
+#: libgui/global_config.cpp:21
+msgid "Program device after successful build."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:41
+msgid "Program device memory: \"program <hexfilename>\"."
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:56
+msgid "Programmer"
+msgstr ""
+
+#: progs/gui/prog_config_center.h:23 progs/gui/prog_config_center.h:24
+msgid "Programmer Options"
+msgstr ""
+
+#: progs/gui/prog_config_center.h:35 progs/gui/prog_config_center.h:36
+msgid "Programmer Selection"
+msgstr ""
+
+#. i18n: file ./data/app_data/piklabui.rc line 161
+#: rc.cpp:48
+#, no-c-format
+msgid "Programmer Toolbar"
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:15
+msgid "Programmer Vpp"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:54
+msgid "Programmer hardware configuration to use (for direct programmer)."
+msgstr ""
+
+#: progs/gui/prog_config_center.cpp:41
+msgid "Programmer in use:"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:270
+msgid "Programmer is already disconnected."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:274
+msgid "Programmer is already running."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:278
+msgid "Programmer is already stopped."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:134
+msgid "Programmer is in bootload mode."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:158
+msgid "Programmer not specified."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:57
+msgid "Programmer port (\"usb\" or device such as \"/dev/ttyS0\")"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:53
+msgid "Programmer to use."
+msgstr ""
+
+#: tools/list/device_info.cpp:59
+msgid "Programmers"
+msgstr "Programadores"
+
+#: tools/list/device_info.cpp:34
+msgid "Programming Specifications"
+msgstr "Especificaciones de Programación"
+
+#: devices/pic/prog/pic_prog.cpp:710
+msgid "Programming calibration data needs a chip erase. Continue anyway?"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:738
+msgid "Programming calibration successful"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:735 devices/pic/prog/pic_prog.cpp:736
+msgid "Programming calibration..."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:272
+msgid "Programming device for debugging test..."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:277 progs/base/generic_prog.cpp:341
+msgid "Programming device memory..."
+msgstr ""
+
+#: libgui/toplevel.cpp:849
+msgid "Programming in progress. Cannot be aborted."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:279
+msgid "Programming successful"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:343
+msgid "Programming successful."
+msgstr "Programación exitosa."
+
+#: progs/base/generic_prog.cpp:33
+msgid "Programming..."
+msgstr ""
+
+#: libgui/project_manager.cpp:190
+msgid "Project"
+msgstr ""
+
+#: libgui/project_wizard.cpp:187
+msgid "Project \"%1\"already exists. Overwrite it?"
+msgstr ""
+
+#: common/common/purl_base.cpp:51
+msgid "Project File"
+msgstr ""
+
+#: common/common/purl_base.cpp:127
+msgid "Project Files"
+msgstr ""
+
+#: libgui/toplevel.cpp:121
+msgid "Project Manager"
+msgstr ""
+
+#: libgui/project_editor.cpp:21
+msgid "Project Options"
+msgstr ""
+
+#: libgui/toplevel.cpp:234
+msgid "Project Options..."
+msgstr ""
+
+#. i18n: file ./data/app_data/piklabui.rc line 145
+#: rc.cpp:42
+#, no-c-format
+msgid "Project Toolbar"
+msgstr ""
+
+#: libgui/project_manager.cpp:526
+msgid "Project already loaded. Reload?"
+msgstr ""
+
+#: libgui/project.cpp:24
+msgid "Project file %1 does not exist."
+msgstr ""
+
+#: libgui/project_wizard.cpp:171
+msgid "Project name is empty."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:64
+msgid "Propic2 Vpp-1"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:66
+msgid "Propic2 Vpp-2"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:68
+msgid "Propic2 Vpp-3"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:93
+msgid "Protected Mask:"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:635
+msgid "Protecting code memory or data EEPROM on OTP devices is disabled as a security..."
+msgstr ""
+
+#: devices/base/generic_device.cpp:57
+msgid "QFN"
+msgstr ""
+
+#: devices/base/generic_device.cpp:58
+msgid "QFN-S"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:38
+msgid "Quit."
+msgstr ""
+
+#: libgui/toplevel.cpp:298
+msgid "R&eset"
+msgstr ""
+
+#: libgui/toplevel.cpp:276
+msgid "R&estart"
+msgstr ""
+
+#: libgui/text_editor.cpp:171
+msgid "R/O"
+msgstr ""
+
+#: devices/base/generic_device.cpp:28
+msgid "ROM"
+msgstr ""
+
+#: devices/base/generic_device.cpp:29
+msgid "ROM-less"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:78
+msgid "Raw Blank Value:"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:68
+msgid "Raw Value:"
+msgstr ""
+
+#: devices/gui/memory_editor.cpp:278
+msgid "Re&load"
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:317
+msgid "Reached breakpoint."
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:83 progs/gui/prog_group_ui.cpp:34
+#: progs/gui/prog_group_ui.cpp:45 libgui/toplevel.cpp:953
+msgid "Read"
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:262
+msgid "Read All"
+msgstr ""
+
+#: libgui/hex_editor.cpp:39
+msgid "Read Only Mode"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:45
+msgid "Read device memory: \"read <hexfilename>\"."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:275
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:78
+msgid "Read id does not match the specified device name \"%1\"."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:273
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:76
+msgid "Read id: %1"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:45
+msgid "Read or set a register or variable: \"x PORTB\" or \"x W 0x1A\"."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:343
+msgid "Read string is different than expected: %1 (%2)."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:291 piklab-prog/cmdline.cpp:296
+#: piklab-prog/cmdline.cpp:301
+msgid "Reading device memory not supported for specified programmer."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:319
+msgid "Reading device memory..."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:322
+msgid "Reading done."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:32
+msgid "Reading..."
+msgstr ""
+
+#: progs/base/generic_debug.cpp:48
+msgid "Ready to start debugging."
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:212
+msgid "Received length too short."
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:216
+msgid "Received string too short."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:107
+msgid "Received unexpected character ('%1' received; 'K' expected)."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:104
+msgid "Received unexpected character ('%1' received; 'K' or 'N' expected)."
+msgstr ""
+
+#: libgui/toplevel.cpp:905
+msgid "Recompile First"
+msgstr "Primero Recompilar"
+
+#: progs/gui/prog_group_ui.cpp:36
+#, fuzzy
+msgid "Regenerating..."
+msgstr "Reiniciando..."
+
+#: coff/base/coff_object.cpp:145
+msgid "Register Parameter"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:58
+msgid "Register Space"
+msgstr ""
+
+#: coff/base/coff_object.cpp:132
+msgid "Register Variable"
+msgstr ""
+
+#: libgui/editor_manager.cpp:489 libgui/watch_view.cpp:48
+#: libgui/project_manager_ui.cpp:127
+msgid "Registers"
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:273
+msgid "Registers information not available."
+msgstr ""
+
+#: coff/base/coff_object.cpp:248
+msgid "Relocation address beyong section size: %1/%2"
+msgstr ""
+
+#: coff/base/coff_object.cpp:251
+msgid "Relocation has unknown symbol: %1"
+msgstr ""
+
+#: coff/base/coff_object.cpp:255
+msgid "Relocation is an auxiliary symbol: %1"
+msgstr ""
+
+#: common/gui/editlistbox.cpp:131
+msgid "Remove All"
+msgstr ""
+
+#: libgui/project_manager.cpp:208
+msgid "Remove From Project"
+msgstr ""
+
+#: libgui/breakpoint_view.cpp:24
+msgid "Remove breakpoint"
+msgstr ""
+
+#: tools/list/compile_process.cpp:28
+msgid "Replaced by \"xxx\" when \"wine\" is used."
+msgstr ""
+
+#: tools/list/compile_process.cpp:29
+msgid "Replaced by \"xxx\" when the device name is specified."
+msgstr ""
+
+#: tools/list/compile_process.cpp:27
+msgid "Replaced by \"xxx\" when there is a custom linker script."
+msgstr ""
+
+#: tools/list/compile_process.cpp:45
+msgid "Replaced by a separation into two arguments."
+msgstr ""
+
+#: tools/list/compile_process.cpp:34
+msgid "Replaced by the COFF filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:39
+msgid "Replaced by the device family name (when needed)."
+msgstr ""
+
+#: tools/list/compile_process.cpp:38
+msgid "Replaced by the device name."
+msgstr ""
+
+#: tools/list/compile_process.cpp:43
+msgid "Replaced by the linker script basename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:44
+msgid "Replaced by the linker script filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:42
+msgid "Replaced by the linker script path."
+msgstr ""
+
+#: tools/list/compile_process.cpp:37
+msgid "Replaced by the list filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:31
+msgid "Replaced by the list of additionnal libraries."
+msgstr ""
+
+#: tools/list/compile_process.cpp:30
+msgid "Replaced by the list of additionnal objects."
+msgstr ""
+
+#: tools/list/compile_process.cpp:35
+msgid "Replaced by the map filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:41
+msgid "Replaced by the object file name."
+msgstr ""
+
+#: tools/list/compile_process.cpp:32
+msgid "Replaced by the output filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:33
+msgid "Replaced by the project name."
+msgstr ""
+
+#: tools/list/compile_process.cpp:40
+msgid "Replaced by the relative input filepath(s)."
+msgstr ""
+
+#: tools/list/compile_process.cpp:26
+msgid "Replaced by the source directory."
+msgstr ""
+
+#: tools/list/compile_process.cpp:36
+msgid "Replaced by the symbol filename."
+msgstr ""
+
+#: libgui/toplevel.cpp:325
+msgid "Report Bug..."
+msgstr ""
+
+#: libgui/likeback.cpp:182
+msgid "Report a bug."
+msgstr ""
+
+#: libgui/device_gui.cpp:99
+msgid "Reset Filters"
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:23
+msgid "Reset Held"
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:23
+msgid "Reset Released"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:194
+msgid "Reset into clip on emulation mode"
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:193
+msgid "Reset.<Translators: please translate the past form of the verb>"
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:196
+msgid "Restarting..."
+msgstr "Reiniciando..."
+
+#: progs/icd1/gui/icd1_group_ui.cpp:20
+msgid "Result:"
+msgstr ""
+
+#: piklab-hex/main.cpp:29
+msgid "Return checksum."
+msgstr ""
+
+#: piklab-coff/main.cpp:25
+msgid "Return general informations."
+msgstr ""
+
+#: piklab-hex/main.cpp:26
+msgid "Return information about hex file."
+msgstr ""
+
+#: piklab-coff/main.cpp:29
+msgid "Return informations about code lines (for object)."
+msgstr ""
+
+#: piklab-coff/main.cpp:30
+msgid "Return informations about files."
+msgstr ""
+
+#: piklab-coff/main.cpp:28
+msgid "Return informations about sections (for object)."
+msgstr ""
+
+#: piklab-coff/main.cpp:27
+msgid "Return informations about symbols."
+msgstr ""
+
+#: piklab-coff/main.cpp:26
+msgid "Return informations about variables (for object)."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:57
+msgid "Return the list of detected ports."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:58
+msgid "Return the list of memory ranges."
+msgstr ""
+
+#: common/cli/cli_main.cpp:52
+msgid "Return the list of recognized commands."
+msgstr ""
+
+#: piklab-hex/main.cpp:38 piklab-prog/cli_interactive.cpp:55
+#: piklab-coff/main.cpp:38
+msgid "Return the list of supported devices."
+msgstr ""
+
+#: piklab-hex/main.cpp:39
+msgid "Return the list of supported fill options."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:56
+msgid "Return the list of supported hex file formats."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:54
+msgid "Return the list of supported programmer hardware configurations."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:53
+msgid "Return the list of supported programmers."
+msgstr ""
+
+#: coff/base/coff_object.cpp:331
+msgid "Rom Data"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:37
+msgid "Run device (release reset)."
+msgstr ""
+
+#: progs/base/prog_config.cpp:77
+msgid "Run device after successful programming."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:224
+msgid "Run..."
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:19
+msgid "Running"
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:240 progs/base/generic_prog.cpp:221
+msgid "Running..."
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:38
+msgid "SBIT"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:57
+msgid "SBIT Space"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:78
+msgid "SBODEN controls BOD function"
+msgstr ""
+
+#: progs/sdcdb/base/sdcdb_debug.h:76
+msgid "SDCDB"
+msgstr ""
+
+#: devices/base/generic_device.cpp:47
+msgid "SDIP"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:56
+msgid "SFR Space"
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:41
+msgid "SFRs"
+msgstr ""
+
+#: devices/base/generic_device.cpp:53
+msgid "SOIC"
+msgstr ""
+
+#: devices/base/generic_device.cpp:49
+msgid "SOT-23"
+msgstr ""
+
+#: devices/base/generic_device.cpp:48
+msgid "SPDIP"
+msgstr ""
+
+#: devices/base/generic_device.cpp:51
+msgid "SSOP"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:73
+msgid "SSP"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:122
+msgid "SSP I/O mux (SCK/SLC, SDA/SDI, SD0)"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:62
+msgid "Same as \"device\"."
+msgstr ""
+
+#: libgui/toplevel.cpp:190
+msgid "Save All"
+msgstr ""
+
+#: libgui/editor.cpp:53
+msgid "Save File"
+msgstr ""
+
+#: libgui/log_view.cpp:132
+msgid "Save log to file"
+msgstr ""
+
+#: piklab-hex/main.cpp:94
+msgid "Second hex file: "
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:253
+msgid "Secondary oscillator (LP)"
+msgstr ""
+
+#: coff/base/coff_object.cpp:55 coff/base/coff_object.cpp:155
+msgid "Section"
+msgstr "Sección"
+
+#: piklab-coff/main.cpp:164
+msgid "Sections:"
+msgstr "Secciones:"
+
+#: devices/pic/base/pic_protection.cpp:357
+msgid "Secure Segment"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:240
+msgid "Secure segment EEPROM size"
+msgstr "Tamaño de segmento EEPROM seguro"
+
+#: devices/pic/base/pic_config.cpp:241
+msgid "Secure segment RAM size"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:237
+msgid "Secure segment security"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:236
+msgid "Secure segment size"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:235
+msgid "Secure segment write-protection"
+msgstr "Protección de escritura de segmento segura"
+
+#: libgui/project_manager.cpp:222
+msgid "Select Device..."
+msgstr ""
+
+#: common/gui/purl_gui.cpp:118
+msgid "Select Directory"
+msgstr ""
+
+#: common/gui/purl_gui.cpp:147
+msgid "Select File"
+msgstr ""
+
+#: libgui/project_wizard.cpp:89
+msgid "Select Files"
+msgstr ""
+
+#: libgui/project_manager.cpp:170
+msgid "Select Linker Script"
+msgstr ""
+
+#: libgui/project_manager.cpp:298
+msgid "Select Object File"
+msgstr ""
+
+#: libgui/project_manager.cpp:335
+msgid "Select Project file"
+msgstr ""
+
+#: libgui/project_manager.cpp:289
+msgid "Select Source File"
+msgstr ""
+
+#: libgui/device_gui.cpp:87
+msgid "Select a device"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:83
+msgid "Self-Write"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:85
+msgid "Self-test"
+msgstr ""
+
+#: progs/icd2/base/icd2_prog.cpp:56
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:105
+msgid "Self-test failed (%1). Do you want to continue anyway?"
+msgstr ""
+
+#: progs/icd1/base/icd1.cpp:109
+msgid "Self-test failed (returned value is %1)"
+msgstr ""
+
+#: progs/icd1/base/icd1_prog.cpp:29
+msgid "Self-test failed. Do you want to continue anyway?"
+msgstr ""
+
+#: progs/icd2/base/icd2_prog.cpp:55
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:104
+msgid "Self-test failed: %1"
+msgstr ""
+
+#: libgui/likeback.cpp:582
+msgid "Send"
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:78
+#: progs/direct/gui/direct_config_widget.cpp:98
+msgid "Send 0xA55A"
+msgstr ""
+
+#: libgui/likeback.cpp:609
+msgid "Send a Comment"
+msgstr ""
+
+#: libgui/likeback.cpp:181
+msgid "Send a comment about what you don't like."
+msgstr ""
+
+#: libgui/likeback.cpp:180
+msgid "Send a comment about what you like."
+msgstr ""
+
+#: progs/gui/port_selector.cpp:21
+msgid "Serial"
+msgstr ""
+
+#: devices/mem24/mem24/mem24_group.h:25
+msgid "Serial Memory 24"
+msgstr ""
+
+#: common/port/port.cpp:61
+msgid "Serial Port"
+msgstr ""
+
+#: libgui/project_manager.cpp:166
+msgid "Set Custom..."
+msgstr ""
+
+#: libgui/project_manager.cpp:167
+msgid "Set Default"
+msgstr ""
+
+#: libgui/likeback.cpp:393
+msgid "Set Email Address"
+msgstr ""
+
+#: libgui/global_config.cpp:22
+msgid "Set User Ids to unprotected checksum (if User Ids are empty)."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:46
+msgid "Set a breakpoint \"break e 0x04\" or list all breakpoints \"break\"."
+msgstr ""
+
+#: libgui/breakpoint_view.cpp:24
+msgid "Set breakpoint"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:59
+#, fuzzy
+msgid "Set if target device is self-powered."
+msgstr "  Establecer destino auto alimentado: %1"
+
+#: piklab-prog/cli_interactive.cpp:39
+msgid "Set property value: \"set <property> <value>\" or \"<property> <value>\"."
+msgstr ""
+
+#: devices/pic/gui/pic_memory_editor.cpp:319
+#: devices/pic/gui/pic_memory_editor.cpp:331
+msgid "Set to unprotected checksum"
+msgstr ""
+
+#: progs/base/generic_debug.cpp:43
+msgid "Setting up debugging session."
+msgstr ""
+
+#: libgui/toplevel.cpp:280 libgui/toplevel.cpp:304
+#, fuzzy
+msgid "Settings..."
+msgstr "Reiniciando..."
+
+#: coff/base/cdb_parser.cpp:34 coff/base/coff_object.cpp:161
+msgid "Short"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:850
+msgid "Show %1 specific options"
+msgstr ""
+
+#: libgui/toplevel.cpp:300
+msgid "Show Program Counter"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:857
+msgid "Show all options"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:858
+msgid "Show author information"
+msgstr ""
+
+#: libgui/global_config.cpp:23
+msgid "Show close buttons on tabs (need restart to take effect)."
+msgstr ""
+
+#: libgui/toplevel.cpp:214
+msgid "Show disassembly location"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:842
+msgid "Show help about options"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:860
+msgid "Show license information"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:859
+msgid "Show version information"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:43
+msgid "Signed"
+msgstr ""
+
+#: tools/sdcc/sdcc.h:35
+msgid "Small Device C Compiler"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:189
+msgid "Software"
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:28
+msgid ""
+"Some programming cards need low clock rate:\n"
+"adding delay to clock pulses might help."
+msgstr ""
+
+#: tools/base/generic_tool.cpp:34
+msgid "Source Directory"
+msgstr ""
+
+#: piklab-coff/main.cpp:175
+msgid "Source Lines:"
+msgstr "Líneas Fuente:"
+
+#: libgui/project_manager.cpp:217 libgui/project_manager_ui.cpp:34
+msgid "Sources"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:248
+msgid "Special Function Registers:"
+msgstr ""
+
+#: progs/gui/prog_config_center.cpp:65
+msgid "Specific"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:101
+msgid "Stack full/underflow reset"
+msgstr ""
+
+#: libgui/project_manager.cpp:185 libgui/config_center.h:53
+#: libgui/project_manager_ui.cpp:63
+msgid "Standalone File"
+msgstr ""
+
+#: libgui/config_center.h:54
+msgid "Standalone File Compilation"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:232 devices/pic/base/pic_config.cpp:239
+msgid "Standard Security"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:115
+msgid "Standard operation"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:246
+msgid "Standard security"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:43
+msgid "Start or restart debugging session."
+msgstr ""
+
+#: piklab-hex/main.cpp:140
+msgid "Start:"
+msgstr ""
+
+#: piklab-prog/cli_prog_manager.cpp:61
+msgid "Starting debug session without COFF file (no source file information)."
+msgstr ""
+
+#: piklab-prog/cli_prog_manager.cpp:62
+msgid "Starting debugging session with device memory in an unknown state. You may want to reprogram the device."
+msgstr ""
+
+#: coff/base/coff_object.cpp:131
+msgid "Static Symbol"
+msgstr ""
+
+#: devices/base/device_group.cpp:228 libgui/breakpoint_view.cpp:47
+msgid "Status"
+msgstr ""
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:21
+msgid "Status:"
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:302
+msgid "Step"
+msgstr "Paso"
+
+#: piklab-prog/cli_interactive.cpp:44
+msgid "Step one instruction."
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:224
+msgid "Stop Watching"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:39
+msgid "Stop device (hold reset)."
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:19
+msgid "Stopped"
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:155 progs/manager/prog_manager.cpp:175
+msgid "Stopped."
+msgstr "Parado."
+
+#: common/common/number.cpp:23
+msgid "String"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:19 coff/base/cdb_parser.cpp:37
+#: coff/base/coff_object.cpp:166
+msgid "Structure"
+msgstr ""
+
+#: coff/base/coff_object.cpp:138
+msgid "Structure Tag"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:85
+msgid "Subroutine to initialize W registers to 0x0000"
+msgstr ""
+
+#: common/global/about.cpp:88
+msgid "Support for direct programmers with bidirectionnal buffers."
+msgstr ""
+
+#: devices/base/device_group.cpp:36
+msgid "Supported"
+msgstr ""
+
+#: common/cli/cli_main.cpp:93
+msgid "Supported commands:"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:115
+msgid "Supported devices for \"%1\":"
+msgstr ""
+
+#: piklab-hex/main.cpp:264 piklab-prog/cmdline.cpp:112
+#: piklab-coff/main.cpp:265
+msgid "Supported devices:"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:92
+msgid "Supported hardware configuration for programmers:"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:75
+msgid "Supported hex file formats:"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:83
+msgid "Supported programmers:"
+msgstr ""
+
+#: libgui/toplevel.cpp:208
+msgid "Switch Header/Implementation"
+msgstr ""
+
+#: libgui/editor_manager.cpp:37
+msgid "Switch to editor"
+msgstr ""
+
+#: libgui/toplevel.cpp:206
+msgid "Switch to..."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:137
+msgid "Switching off, monitor off"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:138
+msgid "Switching on, monitor off"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:139
+msgid "Switching on, monitor on"
+msgstr ""
+
+#: coff/base/coff_object.cpp:215
+msgid "Symbol without needed auxilliary symbol (type=%1)"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:124 piklab-coff/main.cpp:154
+msgid "Symbols:"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:191
+msgid "T0CKI interrupt service routine"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:117
+msgid "T1OSO/T1CKI on RA6"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:118
+msgid "T1OSO/T1CKI on RB2"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:185
+msgid "TIMER0 interrupt service routine"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:119
+msgid "TMR0/T5CKI external clock mux"
+msgstr ""
+
+#: devices/base/generic_device.cpp:54
+msgid "TQFP"
+msgstr ""
+
+#: devices/base/generic_device.cpp:52
+msgid "TSSOP"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:30
+msgid "Table read-protection"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:28
+msgid "Tait 7405/7406"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:26
+msgid "Tait classic"
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:15 progs/icd2/base/icd2.cpp:51
+msgid "Target Vdd"
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:15
+msgid "Target Vpp"
+msgstr ""
+
+#: piklab-hex/main.cpp:38 piklab-prog/cli_interactive.cpp:55
+#: piklab-coff/main.cpp:38
+msgid "Target device."
+msgstr ""
+
+#: progs/base/prog_config.cpp:73
+msgid "Target is self-powered (when possible)."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:261
+msgid "Temperature protection"
+msgstr "Protección de temperatura"
+
+#: devices/base/device_group.cpp:291
+msgid "Temperature range: "
+msgstr ""
+
+#: libgui/config_gen.cpp:179
+msgid "Template Generator"
+msgstr ""
+
+#: coff/base/disassembler.cpp:278
+msgid "Template source file generated by piklab"
+msgstr ""
+
+#: libgui/project_wizard.cpp:234
+msgid "Template source file generation not implemented yet for this toolchain..."
+msgstr ""
+
+#: libgui/project_wizard.cpp:240
+msgid "Template source file generation only partially implemented."
+msgstr ""
+
+#: common/global/about.cpp:91
+msgid "Test of PICkit2 and ICD2 programmer."
+msgstr ""
+
+#: common/common/group.cpp:15
+msgid "Tested"
+msgstr ""
+
+#: tools/pic30/pic30.cpp:63
+msgid "The <a href=\"%1\">PIC30 ToolChain</a> is a toolsuite for 16-bit PICs available from Microchip. Most of it is available under the GNU Public License."
+msgstr ""
+
+#: tools/sdcc/sdcc.cpp:28
+msgid "The <a href=\"%1\">Small Devices C Compiler</a> is an open-source C compiler for several families of microcontrollers."
+msgstr ""
+
+#: tools/boost/boost.cpp:68
+msgid "The Boost toolchain needs to be run by Wine with \"Windows NT 4.0\" compatibility. This can be configured with the Wine configuration utility."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:31
+msgid "The CLOCK pin is used to synchronize serial data of the DATA IN and DATA OUT pins."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:37
+msgid "The DATA IN pin is used to receive data from the programmed device."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:34
+msgid "The DATA OUT pin is used to send data to the programmed device."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:40
+msgid ""
+"The DATA RW pin selects the direction of data buffer.\n"
+"Must be set to GND if your programmer does not use bi-directionnal buffer."
+msgstr ""
+
+#: libgui/toplevel.cpp:731
+msgid "The Pikloops utility (%1) is not installed in your system."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:28
+msgid ""
+"The VDD pin is used to apply 5V to the programmed device.\n"
+"Must be set to GND if your programmer doesn't control the VDD line."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:25
+msgid "The VPP pin is used to select the high voltage programming mode."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:675
+msgid "The calibration word %1 is not valid."
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:65
+msgid "The current programmer \"%1\" does not support device \"%2\"."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:662
+msgid "The device cannot be erased first by the selected programmer so programming may fail..."
+msgstr ""
+
+#: libgui/gui_prog_manager.cpp:38
+msgid "The device memory is in an unknown state. You may want to reprogram the device. Continue anyway?"
+msgstr ""
+
+#: libgui/likeback.cpp:396
+msgid "The email address is optional. If you do not provide any, your comments will be sent anonymously. Just click OK in that case."
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:1313
+msgid "The files/URLs opened by the application will be deleted after use"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:142
+msgid ""
+"The firmware version (%1) is higher than the version tested with piklab (%2%3).\n"
+"You may experience problems."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:158
+msgid ""
+"The firmware version (%1) is lower than the recommended version (%2%3).\n"
+"It is recommended to upgrade the firmware."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:150
+msgid ""
+"The firmware version (%1) is lower than the version tested with piklab (%2%3).\n"
+"You may experience problems."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:167
+msgid "The first argument should be \"e\"."
+msgstr ""
+
+#: piklab-hex/main.cpp:170
+msgid "The first hex file is a subset of the second one."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:299
+msgid "The given value is too large (max: %1)."
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:71
+msgid "The hardware name is already used for a standard hardware."
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:113
+msgid "The number of active breakpoints is higher than the maximum for the current debugger (%1): disabling the last breakpoint."
+msgstr ""
+
+#: libgui/toplevel.cpp:904
+msgid "The project hex file may not be up-to-date since some project files have been modified."
+msgstr "Puede que el archivo hex del proyecto no esté actualizado ya que se modificaron algunos archivos del proyecto."
+
+#: devices/pic/prog/pic_prog.cpp:650
+msgid "The range cannot be erased first by the selected programmer so programming may fail..."
+msgstr ""
+
+#: piklab-hex/main.cpp:171
+msgid "The second hex file is a subset of the first one."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:335
+msgid "The selected device \"%1\" is not supported by the selected programmer."
+msgstr "El dispositivo «%1»seleccionado no es soportado por el programador seleccionado."
+
+#: libgui/register_view.cpp:45
+msgid "The selected device has no register."
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:101
+msgid "The selected device is not supported by this programmer."
+msgstr ""
+
+#: libgui/gui_prog_manager.cpp:29
+msgid "The selected operation will stop the debugging session. Continue anyway?"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:500
+msgid "The selected programmer cannot read %1: operation skipped."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:298
+msgid "The selected programmer cannot read device memory."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:486 devices/pic/prog/pic_prog.cpp:557
+msgid "The selected programmer cannot read the specified memory range."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:442
+msgid "The selected programmer does not support erasing neither the specified range nor the whole device."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:394
+msgid "The selected programmer does not support erasing the whole device."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:341
+msgid "The selected programmer does not supported the specified hardware configuration (\"%1\")."
+msgstr ""
+
+#: tools/list/compile_manager.cpp:135
+msgid "The selected toolchain (%1) cannot assemble file. It only supports files with extensions: %2"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:110
+msgid "The selected toolchain (%1) cannot compile file. It only supports files with extensions: %2"
+msgstr ""
+
+#: tools/base/tool_group.cpp:130
+msgid "The selected toolchain (%1) does not support device %2. Continue anyway?"
+msgstr ""
+
+#: libgui/project_wizard.cpp:206
+msgid "The selected toolchain can only compile a single source file and you have selected %1 source files. Continue anyway? "
+msgstr ""
+
+#: tools/list/compile_manager.cpp:72
+msgid "The selected toolchain only supports single-file project."
+msgstr ""
+
+#: libgui/device_editor.cpp:64
+msgid "The target device is not configured and cannot be guessed from source file. The source file either cannot be found or does not contain any processor directive."
+msgstr ""
+
+#: libgui/gui_debug_manager.cpp:88
+msgid "The toolchain in use does not generate all necessary debugging information with the selected device. This may reduce debugging capabilities."
+msgstr ""
+
+#: piklab-hex/main.cpp:172
+msgid "The two hex files are different at address %1."
+msgstr ""
+
+#: piklab-hex/main.cpp:169
+msgid "The two hex files have the same content."
+msgstr ""
+
+#: tools/base/tool_group.cpp:128
+msgid "There were errors detecting supported devices for the selected toolchain (%1). Please check the toolchain configuration. Continue anyway?"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:204
+msgid "This command needs a commands filename."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:216
+msgid "This command needs an hex filename."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:218
+msgid "This command takes no argument."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:128
+msgid "This command takes no or one argument"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:185
+msgid "This command takes no or two argument."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:139 piklab-prog/cli_interactive.cpp:143
+#: piklab-prog/cli_interactive.cpp:189
+msgid "This command takes one argument."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:150
+msgid "This command takes one or two argument."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:135
+msgid "This command takes two arguments."
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:100
+msgid "This device has no calibration information."
+msgstr ""
+
+#: libgui/likeback.cpp:174
+msgid "This is a quick feedback system for %1."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:645
+msgid "This memory range is programming protected."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:38
+msgid ""
+"This pin is driven by the programmed device.\n"
+"Without device, it must follow the \"Data out\" pin (when powered on)."
+msgstr ""
+
+#: common/nokde/nokde_kaboutdata.cpp:437
+msgid "This program is distributed under the terms of the %1."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:77
+msgid "This programmer pulses MCLR from 5V to 0V and then 12V to enter programming mode. It uses a multiplexer to switch between 5V and 12V (Vdd is here the multiplexer pin).<p>Webpage: <a href=\"http://www.epemag.wimborne.co.uk/1001.htm\">http://www.epemag.wimborne.co.uk/1001.htm</a>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:272
+msgid "This tool cannot be automatically detected."
+msgstr ""
+
+#: libgui/config_gen.cpp:119
+msgid "This toolchain does not need explicit config bits."
+msgstr ""
+
+#: progs/pickit2/base/pickit_prog.cpp:49
+msgid "This will overwrite the device code memory. Continue anyway?"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:161
+#: tools/gui/toolchain_config_widget.cpp:178
+msgid "Timeout"
+msgstr ""
+
+#: progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp:30
+msgid "Timeout (ms):"
+msgstr ""
+
+#: common/port/serial.cpp:280
+msgid "Timeout receiving data (%1/%2 bytes received)."
+msgstr ""
+
+#: common/port/serial.cpp:306
+msgid "Timeout sending data (%1 bytes left)."
+msgstr ""
+
+#: common/port/serial.cpp:235
+msgid "Timeout sending data (%1/%2 bytes sent)."
+msgstr ""
+
+#: progs/icd1/base/icd1_serial.cpp:51
+msgid "Timeout synchronizing."
+msgstr ""
+
+#: progs/gpsim/base/gpsim.cpp:72
+msgid "Timeout waiting for \"gpsim\"."
+msgstr ""
+
+#: common/port/serial.cpp:265
+msgid "Timeout waiting for data."
+msgstr ""
+
+#: progs/direct/base/direct_mem24.cpp:125
+msgid "Timeout writing at address %1"
+msgstr ""
+
+#: common/port/usb_port.cpp:394
+msgid "Timeout: only some data received (%1/%2 bytes)."
+msgstr ""
+
+#: common/port/usb_port.cpp:360
+msgid "Timeout: only some data sent (%1/%2 bytes)."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:144
+msgid "Timer1"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:95
+msgid "Timer1 interrupt service routine"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:114
+msgid "Timer1 oscillator mode"
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader_prog.h:31
+msgid "Tiny Bootloader"
+msgstr ""
+
+#: libgui/likeback.cpp:175
+msgid "To help us improve it, your comments are important."
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:140
+msgid "Toggle Device Power..."
+msgstr ""
+
+#: piklab-hex/main.cpp:72 piklab-coff/main.cpp:61
+msgid "Too few arguments."
+msgstr ""
+
+#: piklab-hex/main.cpp:73 piklab-prog/cli_interactive.cpp:214
+#: piklab-prog/cli_interactive.cpp:217 piklab-prog/cmdline.cpp:215
+#: piklab-coff/main.cpp:62
+msgid "Too many arguments."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:145
+msgid "Too many failures: bailing out."
+msgstr ""
+
+#: libgui/project_editor.cpp:56
+#, fuzzy
+msgid "Toochain"
+msgstr "<Cadena de herramientas>"
+
+#: libgui/config_gen.cpp:48
+msgid "Tool Type:"
+msgstr ""
+
+#: libgui/toplevel.cpp:216
+msgid "Tool Views"
+msgstr ""
+
+#: tools/list/tools_config_widget.cpp:45 libgui/config_gen.cpp:39
+#: libgui/project_wizard.cpp:134
+msgid "Toolchain:"
+msgstr ""
+
+#: tools/list/device_info.cpp:51
+msgid "Tools"
+msgstr ""
+
+#: libgui/likeback.cpp:657
+msgid "Transfer Error"
+msgstr ""
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:23
+msgid "Trying to enter bootloader mode..."
+msgstr ""
+
+#: coff/base/coff_object.cpp:141
+msgid "Type Definition"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:76
+msgid "USART"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:75 progs/gui/port_selector.cpp:21
+msgid "USB"
+msgstr ""
+
+#: common/port/port.cpp:63
+msgid "USB Port"
+msgstr ""
+
+#: progs/picdem_bootloader/gui/picdem_bootloader_ui.cpp:25
+msgid "USB Product Id:"
+msgstr ""
+
+#: progs/picdem_bootloader/gui/picdem_bootloader_ui.cpp:19
+msgid "USB Vendor Id:"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:197
+msgid "USB clock (PLL divided by)"
+msgstr ""
+
+#: common/port/usb_port.cpp:266
+msgid "USB support disabled"
+msgstr "Soporte de USB deshabilitado"
+
+#: common/global/about.cpp:90
+msgid "USB support for ICD2 programmer."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:127
+msgid "USB voltage regulator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:85
+msgid "Undefined"
+msgstr ""
+
+#: coff/base/coff_object.cpp:135
+msgid "Undefined Label"
+msgstr ""
+
+#: coff/base/coff_object.cpp:123
+msgid "Undefined Section"
+msgstr ""
+
+#: coff/base/coff_object.cpp:142
+msgid "Undefined Static"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:173
+msgid "Unexpected answer ($7F00) from ICD2 (%1)."
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:180
+msgid "Unexpected answer (08) from ICD2 (%1)."
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:674
+msgid "Unexpected argument '%1'."
+msgstr ""
+
+#: devices/base/hex_buffer.cpp:140
+msgid "Unexpected end-of-file."
+msgstr ""
+
+#: devices/base/hex_buffer.cpp:141
+msgid "Unexpected end-of-line (line %1)."
+msgstr ""
+
+#: coff/base/coff_object.cpp:329
+msgid "Uninitialized Data"
+msgstr ""
+
+#: coff/base/coff_object.cpp:167
+msgid "Union"
+msgstr ""
+
+#: coff/base/coff_object.cpp:140
+msgid "Union Tag"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:57
+msgid "Unitialized variables in X-space"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:61
+msgid "Unitialized variables in Y-space"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:65
+msgid "Unitialized variables in near data memory"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:25
+msgid "Unix"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:225
+#: devices/base/generic_device.cpp:21 coff/base/text_coff.cpp:256
+msgid "Unknown"
+msgstr ""
+
+#: common/common/purl_base.cpp:57
+msgid "Unknown File"
+msgstr ""
+
+#: common/cli/cli_main.cpp:29
+msgid "Unknown command: %1"
+msgstr ""
+
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:47
+msgid "Unknown device"
+msgstr ""
+
+#: piklab-hex/main.cpp:223 piklab-prog/cmdline.cpp:364
+#: piklab-coff/main.cpp:238
+msgid "Unknown device \"%1\"."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:278
+msgid "Unknown device."
+msgstr ""
+
+#: coff/base/coff_archive.cpp:92
+#, fuzzy
+msgid "Unknown file member offset: %1"
+msgstr "Número de archivos miembro:"
+
+#: piklab-prog/cmdline.cpp:379
+msgid "Unknown hex file format \"%1\"."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:84
+msgid "Unknown id returned by bootloader (%1 read and %2 expected)."
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:521
+#: common/nokde/nokde_kcmdlineargs.cpp:537
+msgid "Unknown option '%1'."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:353
+msgid "Unknown programmer \"%1\"."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:397 piklab-prog/cmdline.cpp:445
+msgid "Unknown property \"%1\""
+msgstr ""
+
+#: piklab-hex/main.cpp:235 piklab-hex/main.cpp:248 piklab-coff/main.cpp:241
+#: piklab-coff/main.cpp:250
+msgid "Unknown property \"%1\"."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:307
+msgid "Unknown register or variable name."
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:221 progs/sdcdb/base/sdcdb_debug.cpp:220
+msgid "Unknown state for IO bit: %1 (%2)"
+msgstr ""
+
+#: piklab-hex/main.cpp:183
+msgid "Unprotected checksum: %1"
+msgstr ""
+
+#: devices/base/hex_buffer.cpp:139
+msgid "Unrecognized format (line %1)."
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:86
+msgid "Unrecognized record"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:40
+msgid "Unset property value: \"unset <property>\"."
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:44
+msgid "Unsigned"
+msgstr ""
+
+#: coff/base/coff_object.cpp:170
+msgid "Unsigned Char"
+msgstr ""
+
+#: coff/base/coff_object.cpp:172
+msgid "Unsigned Int"
+msgstr ""
+
+#: coff/base/coff_object.cpp:173
+msgid "Unsigned Long"
+msgstr ""
+
+#: coff/base/coff_object.cpp:171
+msgid "Unsigned Short"
+msgstr ""
+
+#: devices/base/device_group.cpp:36
+msgid "Unsupported"
+msgstr ""
+
+#: common/common/group.cpp:14
+msgid "Untested"
+msgstr "No probado"
+
+#: tools/gui/toolchain_config_center.cpp:27
+msgid "Update"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:51
+msgid "Upload firmware to programmer: \"upload_firmware <hexfilename>\"."
+msgstr ""
+
+#: progs/pickit2/base/pickit2_prog.cpp:65
+#, fuzzy
+msgid "Uploading Firmware..."
+msgstr "Cargando el firmware..."
+
+#: piklab-prog/cmdline.cpp:321
+msgid "Uploading firmware is not supported for the specified programmer."
+msgstr "El programador especificado no soporta la carga de firmware."
+
+#: progs/base/generic_prog.cpp:262
+msgid "Uploading firmware..."
+msgstr "Cargando el firmware..."
+
+#: progs/gui/prog_group_ui.cpp:67
+#, fuzzy
+msgid "Uploading..."
+msgstr "Cargando el firmware..."
+
+#: coff/base/cdb_parser.cpp:30
+msgid "Upper-128-byte Pointer"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:838
+msgid "Usage: %1 %2\n"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:783
+msgid "Use --help to get a list of available command line options."
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:83
+msgid "Used Mask:"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:27 coff/base/coff_object.cpp:328
+msgid "User IDs"
+msgstr ""
+
+#: piklab-prog/cli_prog_manager.cpp:22
+msgid "Using port from configuration file."
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:73
+msgid "Value:"
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:68
+msgid "Variables"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:58
+#: tools/gputils/gputils_generator.cpp:128
+#: tools/gputils/gputils_generator.cpp:208
+msgid "Variables declaration"
+msgstr ""
+
+#: piklab-coff/main.cpp:146
+msgid "Variables:"
+msgstr ""
+
+#: devices/base/device_group.cpp:295
+msgid "Vdd (V)"
+msgstr ""
+
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:102
+msgid "Vdd voltage level error; "
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:49
+msgid "Velleman K8048"
+msgstr ""
+
+#: progs/base/prog_config.cpp:70
+msgid "Verify device memory after programming."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:43
+msgid "Verify device memory: \"verify <hexfilename>\"."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:379
+msgid "Verifying successful."
+msgstr "Verificación exitosa."
+
+#: progs/base/generic_prog.cpp:34 progs/base/generic_prog.cpp:377
+msgid "Verifying..."
+msgstr ""
+
+#: progs/icd2/gui/icd2_group_ui.cpp:31 progs/gui/prog_group_ui.cpp:68
+#: libgui/project_editor.cpp:41
+msgid "Version:"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:34
+msgid "Views"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:35 coff/base/coff_object.cpp:159
+msgid "Void"
+msgstr ""
+
+#: libgui/device_gui.cpp:413
+msgid "Voltage-Frequency Graphs"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:79
+msgid "Voltages"
+msgstr ""
+
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:101
+msgid "Vpp voltage level error; "
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:90
+msgid "WDT post-scaler"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:81
+msgid "Wake-up reset"
+msgstr ""
+
+#: tools/gputils/gputils_config.cpp:13 tools/c18/c18_config.cpp:12
+msgid "Warning and errors"
+msgstr ""
+
+#: tools/gputils/gui/gputils_ui.cpp:24 tools/c18/gui/c18_ui.cpp:23
+msgid "Warning level:"
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:85
+#: devices/pic/gui/pic_register_view.cpp:224
+msgid "Watch"
+msgstr ""
+
+#: libgui/watch_view.cpp:110
+msgid "Watch Register"
+msgstr ""
+
+#: libgui/toplevel.cpp:127
+msgid "Watch View"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:188
+msgid "Watchdog"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:33
+msgid "Watchdog timer"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:267
+msgid "Watchdog timer postscaler"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:266
+msgid "Watchdog timer prescaler"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:186
+msgid "Watchdog timer prescaler A"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:187
+msgid "Watchdog timer prescaler B"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:106 devices/pic/base/pic_config.cpp:265
+msgid "Watchdog timer window"
+msgstr ""
+
+#: libgui/watch_view.cpp:87
+msgid "Watched"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:52
+msgid "Webpage: <a href=\"htpp://k9spud.com/hoodmicro\">htpp://k9spud.com/hoodmicro</a>"
+msgstr ""
+
+#: libgui/likeback.cpp:95
+msgid "What's &This?"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:26
+msgid "Windows"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:88
+msgid "Write Mask:"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:48
+msgid "Write and read raw commands to port from given file."
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:181 progs/sdcdb/base/sdcdb_debug.cpp:180
+msgid "Writing PC is not supported by gpsim"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:161 progs/sdcdb/base/sdcdb_debug.cpp:160
+msgid "Writing registers is not supported by this version of gpsim"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:33
+msgid "Wrong format for file size \"%1\"."
+msgstr ""
+
+#: progs/psp/base/psp.cpp:174
+msgid "Wrong programmer connected"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:224
+msgid "Wrong return value (\"%1\"; was expecting \"%2\")"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:148 devices/pic/base/pic_config.cpp:163
+msgid "XT Crystal"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:151 devices/pic/base/pic_config.cpp:166
+msgid "XT Crystal with 16x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:149 devices/pic/base/pic_config.cpp:164
+msgid "XT Crystal with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:150 devices/pic/base/pic_config.cpp:165
+msgid "XT Crystal with 8x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:259
+msgid "XT crystal oscillator"
+msgstr ""
+
+#: libgui/likeback.cpp:397
+msgid "You can change or remove your email address whenever you want. For that, use the little arrow icon at the top-right corner of a window."
+msgstr ""
+
+#: libgui/gui_debug_manager.cpp:104
+msgid "You cannot set breakpoints when a debugger is not selected."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:39
+msgid "You must disconnect 7407 pin 2"
+msgstr ""
+
+#: progs/icd2/gui/icd2_group_ui.cpp:53
+msgid "You need to initiate debugging to read the debug executive version."
+msgstr ""
+
+#: libgui/toplevel.cpp:534
+msgid "You need to specify a device to create a new hex file."
+msgstr "Es necesario especificar un dispositivo para crear un archivo «hex» nuevo"
+
+#: progs/manager/prog_manager.cpp:59
+msgid "You need to specify the device for programming."
+msgstr "Es necesario especificar el dispositivo a programar."
+
+#: piklab-prog/cli_interactive.cpp:209
+#, fuzzy
+msgid "You need to specify the range."
+msgstr "Es necesario especificar el rango"
+
+#: piklab-prog/cli_interactive.cpp:292
+msgid "You need to start the debugging session first (with \"start\")."
+msgstr "Primero es necesario iniciar la sesión de depuración (con «start»)"
+
+#: progs/gui/port_selector.cpp:61
+msgid "Your computer might not have any parallel port or the /dev/parportX device has not been created.<br>Use \"mknod /dev/parport0 c 99 0\" to create it<br>and \"chmod a+rw /dev/parport0\" to make it RW enabled."
+msgstr "Puede que su computadora no tenga ningún puerto paralelo o no se ha creado el dispositivo «/dev/parportX».<br>Utilice «mknod /dev/parport0 c 99 0» para crearlo <br>y «chmod a+rw /dev/parport0» para habilitar su lectura/escritura."
+
+#: progs/gui/port_selector.cpp:58
+msgid "Your computer might not have any serial port."
+msgstr "Puede que su computadora no tenga ningún puerto serie."
+
+#: libgui/likeback.cpp:398
+msgid "Your email address (keep empty to post comments anonymously):"
+msgstr "Su dirección de correo (deje en blanco para hacer comentarios anónimos):)"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:818
+msgid "[%1-options]"
+msgstr "[%1-opciones]"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:811
+msgid "[options] "
+msgstr "[opciones]"
+
+#: _translatorinfo.cpp:3
+msgid ""
+"_: EMAIL OF TRANSLATORS\n"
+"Your emails"
+msgstr ""
+"_: CORREO DE LOS TRADUCTORES\n"
+"<felipem@gigared.com>"
+
+#: _translatorinfo.cpp:1
+msgid ""
+"_: NAME OF TRANSLATORS\n"
+"Your names"
+msgstr ""
+"_: NOMBRE DE LOS TRADUCTORES\n"
+"Felipe Caminos"
+
+#: tools/pic30/pic30_generator.cpp:63
+msgid "allocating 2 bytes"
+msgstr "ubicando 2 bytes"
+
+#: tools/pic30/pic30_generator.cpp:59 tools/pic30/pic30_generator.cpp:67
+msgid "allocating 4 bytes"
+msgstr "ubicando 4 bytes"
+
+#: tools/gui/tool_config_widget.cpp:126 tools/gputils/gui/gputils_ui.cpp:30
+msgid "as in LIST directive"
+msgstr "como en la directiva «LIST»"
+
+#: coff/base/cdb_parser.cpp:104
+msgid "at line #%1, column #%2"
+msgstr "en línea #%1, columna #%2"
+
+#: tools/pic30/pic30_generator.cpp:77
+msgid "call _wreg_init subroutine"
+msgstr "llamar a la subrutina «_wreg_init»"
+
+#: tools/pic30/pic30_generator.cpp:99
+msgid "clear Timer1 interrupt flag status bit"
+msgstr "limpiar el bit de estado de interrupción del «Timer1»"
+
+#: tools/pic30/pic30_generator.cpp:48
+msgid "declare Timer1 ISR"
+msgstr "declarar «ISR» del «Timer1»"
+
+#: devices/gui/register_view.cpp:71
+msgid "driven high"
+msgstr ""
+
+#: devices/gui/register_view.cpp:71
+msgid "driven low"
+msgstr ""
+
+#: devices/gui/register_view.cpp:67
+msgid "driving high"
+msgstr ""
+
+#: devices/gui/register_view.cpp:67
+msgid "driving low"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:138
+msgid "empty name"
+msgstr "nombre vacío"
+
+#: tools/list/compile_process.cpp:359
+msgid "error: "
+msgstr "error: "
+
+#: tools/pic30/pic30_generator.cpp:97
+msgid "example of context saving (push W4 and W5)"
+msgstr "ejemplo de guardado de contexto («push» W4 y W5)"
+
+#: tools/gputils/gputils_generator.cpp:76
+#: tools/gputils/gputils_generator.cpp:135
+#: tools/gputils/gputils_generator.cpp:214
+msgid "example variable"
+msgstr "variable de ejemplo"
+
+#: tools/gputils/gputils_generator.cpp:146
+msgid "for restoringing context"
+msgstr "para recargar el contexto"
+
+#: tools/gputils/gputils_generator.cpp:139
+msgid "for saving context"
+msgstr "para guardar el contexto"
+
+#: tools/gputils/gputils_generator.cpp:225
+msgid "go to start of high priority interrupt code"
+msgstr "ir al inicio del código de interrupción de alta prioridad"
+
+#: tools/gputils/gputils_generator.cpp:161
+msgid "go to start of int pin interrupt code"
+msgstr "ir al inicio del código de interrupción del pin «int»"
+
+#: tools/gputils/gputils_generator.cpp:95
+msgid "go to start of interrupt code"
+msgstr "ir al inicio del código de interrupción"
+
+#: tools/gputils/gputils_generator.cpp:91
+#: tools/gputils/gputils_generator.cpp:157
+#: tools/gputils/gputils_generator.cpp:221
+msgid "go to start of main code"
+msgstr "ir al inicio del código principal"
+
+#: tools/gputils/gputils_generator.cpp:173
+msgid "go to start of peripheral interrupt code"
+msgstr "ir al inicio del código de interrupción de periféricos"
+
+#: tools/gputils/gputils_generator.cpp:169
+msgid "go to start of t0cki interrupt code"
+msgstr "ir al inicio del código de interrupción de «t0cki»"
+
+#: tools/gputils/gputils_generator.cpp:165
+msgid "go to start of timer0 interrupt code"
+msgstr "ir al comienzo del código de interrupción de «timer0»"
+
+#: tools/gputils/gputils_generator.cpp:238
+msgid "high priority interrupt service routine"
+msgstr "rutina de servicio de interrupción de alta prioridad"
+
+#: tools/gputils/gputils_generator.cpp:223
+msgid "high priority interrupt vector"
+msgstr "vector de interrupción de alta prioridad"
+
+#: tools/gputils/gputils_generator.cpp:90
+msgid "initialize PCLATH"
+msgstr "inicializar PCLATH"
+
+#: tools/pic30/pic30_generator.cpp:73
+msgid "initialize stack pointer"
+msgstr "inicializar el puntero de pila"
+
+#: tools/pic30/pic30_generator.cpp:74
+msgid "initialize stack pointer limit register"
+msgstr "inicializar el registro de límite del puntero de pila"
+
+#: tools/gputils/gputils_generator.cpp:181
+msgid "insert INT pin interrupt code"
+msgstr "agregue el código de interrrupción del pin «INT»"
+
+#: tools/gputils/gputils_generator.cpp:193
+msgid "insert T0CKI interrupt code"
+msgstr "agregue el código de interrrupción de «T0CKI»"
+
+#: tools/gputils/gputils_generator.cpp:187
+msgid "insert TIMER0 interrupt code"
+msgstr "agregue el código de interrrupción de «TIMER0»"
+
+#: tools/boost/boost_generator.cpp:52 tools/boost/boost_generator.cpp:76
+#: tools/jal/jal_generator.cpp:31 tools/gputils/gputils_generator.cpp:52
+#: tools/sdcc/sdcc_generator.cpp:114 tools/pic30/pic30_generator.cpp:79
+msgid "insert code"
+msgstr "agregue el código"
+
+#: tools/gputils/gputils_generator.cpp:240
+msgid "insert high priority interrupt code"
+msgstr "agregue el código de interrrupción de altta prioridad"
+
+#: tools/boost/boost_generator.cpp:47 tools/gputils/gputils_generator.cpp:109
+#: tools/sdcc/sdcc_generator.cpp:102 tools/pic30/pic30_generator.cpp:98
+msgid "insert interrupt code"
+msgstr "agregue el código de interrrupción"
+
+#: tools/gputils/gputils_generator.cpp:232
+msgid "insert low priority interrupt code"
+msgstr "agregue el código de interrrupción de baja prioridad"
+
+#: tools/gputils/gputils_generator.cpp:121
+#: tools/gputils/gputils_generator.cpp:176
+#: tools/gputils/gputils_generator.cpp:244
+msgid "insert main code"
+msgstr "agregue el código principal"
+
+#: tools/gputils/gputils_generator.cpp:199
+msgid "insert peripheral interrupt code"
+msgstr "agregue el código de interrrupción de periféricos"
+
+#: tools/boost/boost_generator.cpp:45 tools/sdcc/sdcc_generator.cpp:101
+msgid "interrupt service routine"
+msgstr "rutina de servicio de interrupciones"
+
+#: tools/gputils/gputils_generator.cpp:93
+msgid "interrupt vector"
+msgstr "vector de interrupciones"
+
+#: tools/jal/jal_generator.cpp:23
+msgid "jal standard library"
+msgstr "biblioteca estandar jal"
+
+#: tools/pic30/pic30_generator.cpp:47
+msgid "label for code start"
+msgstr "etiqueta para el codigo «start»"
+
+#: tools/gputils/gputils_generator.cpp:89
+msgid "load upper byte of 'start' label"
+msgstr "cargar el byte superior de la etiqueta «start»"
+
+#: tools/boost/boost_generator.cpp:77 tools/jal/jal_generator.cpp:32
+#: tools/gputils/gputils_generator.cpp:53
+#: tools/gputils/gputils_generator.cpp:122
+#: tools/gputils/gputils_generator.cpp:177
+#: tools/gputils/gputils_generator.cpp:245 tools/pic30/pic30_generator.cpp:82
+msgid "loop forever"
+msgstr "bucle infinito"
+
+#: tools/gputils/gputils_generator.cpp:227
+msgid "low priority interrupt vector"
+msgstr "vector de interrupciones de baja prioridad"
+
+#: tools/jal/jal_generator.cpp:30
+msgid "main code"
+msgstr "código principal"
+
+#: tools/boost/boost_generator.cpp:50 tools/boost/boost_generator.cpp:74
+msgid "main program"
+msgstr "programa principal"
+
+#: tools/list/compile_process.cpp:360
+msgid "message: "
+msgstr "mensaje: "
+
+#: tools/gputils/gputils_generator.cpp:88
+#: tools/gputils/gputils_generator.cpp:155
+#: tools/gputils/gputils_generator.cpp:156
+#: tools/gputils/gputils_generator.cpp:219
+#: tools/gputils/gputils_generator.cpp:220
+msgid "needed for ICD2 debugging"
+msgstr "requerido para el depurado ICD2"
+
+#: coff/base/cdb_parser.cpp:307
+msgid "no register defined"
+msgstr "hay hay registro definido"
+
+#: tools/pic30/pic30_generator.cpp:76
+msgid "nop after SPLIM initialization"
+msgstr "nop luego de la inicialización SPLIM"
+
+#: devices/pic/base/pic_config.cpp:198 devices/pic/base/pic_config.cpp:200
+#: devices/pic/base/pic_config.cpp:202
+msgid "not divided"
+msgstr "no dividido"
+
+#: devices/pic/gui/pic_memory_editor.cpp:114
+#: devices/pic/gui/pic_memory_editor.cpp:121
+msgid "not present"
+msgstr "no presente"
+
+#: progs/direct/gui/direct_config_widget.cpp:53
+msgid "on"
+msgstr "encendido"
+
+#: tools/gputils/gputils_generator.cpp:105
+msgid "only required if using more than first page"
+msgstr "solamente se requiere si se utiliza más de la primera página"
+
+#: tools/gputils/gputils_generator.cpp:197
+msgid "peripheral interrupt service routine"
+msgstr "rutina de servicio de interrupciones de periféricos"
+
+#: tools/gputils/gputils_generator.cpp:49
+#: tools/gputils/gputils_generator.cpp:97
+msgid "relocatable code"
+msgstr "código reubicable"
+
+#: common/nokde/nokde_kaboutdata.cpp:374
+msgid "replace this with information about your translation team"
+msgstr "reemplazar esta información acerca del grupo de traducción"
+
+#: tools/gputils/gputils_generator.cpp:86
+#: tools/gputils/gputils_generator.cpp:153
+#: tools/gputils/gputils_generator.cpp:217
+msgid "reset vector"
+msgstr "reiniciar vector"
+
+#: tools/gputils/gputils_generator.cpp:111
+#: tools/gputils/gputils_generator.cpp:114
+#: tools/gputils/gputils_generator.cpp:233
+msgid "restore context"
+msgstr "restaurar contexto"
+
+#: tools/pic30/pic30_generator.cpp:100
+msgid "restore context from stack"
+msgstr "restaurar contexto desde la pila"
+
+#: tools/gputils/gputils_generator.cpp:100
+#: tools/gputils/gputils_generator.cpp:229
+msgid "save context"
+msgstr "guardar contexto"
+
+#: piklab-coff/main.cpp:183
+msgid "section \"%1\":"
+msgstr "sección \"%1\":"
+
+#: coff/base/coff_archive.cpp:118
+#, fuzzy
+msgid "size: %1 bytes"
+msgstr "%1 bytes"
+
+#: piklab-coff/main.cpp:189
+msgid "symbol \"%1\""
+msgstr "símbolo \"%1\""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:644
+msgid "the 2nd argument is a list of name+address, one on each line"
+msgstr "el 2do argumento es una lista de nombre+dirección, una por cada linea"
+
+#: piklab-coff/main.cpp:167
+msgid "type=\"%1\" address=%2 size=%3 flags=%4"
+msgstr "tipo=\"%1\" dirección=%2 tamaño=%3 banderas=%4"
+
+#: coff/base/cdb_parser.cpp:115 coff/base/cdb_parser.cpp:161
+msgid "unexpected end of line"
+msgstr "fin de linea no esperado"
+
+#: coff/base/cdb_parser.cpp:294
+msgid "unknown AddressSpaceType"
+msgstr "«AddressSpaceType» desconocido"
+
+#: coff/base/cdb_parser.cpp:272
+msgid "unknown DCLType"
+msgstr "«DCLType» desconocido"
+
+#: coff/base/cdb_parser.cpp:238
+msgid "unknown ScopeType"
+msgstr "«ScopeType» desconocido"
+
+#: coff/base/cdb_parser.cpp:282
+msgid "unknown Sign"
+msgstr "«Sign» desconocido"
+
+#: devices/gui/register_view.cpp:66 devices/gui/register_view.cpp:70
+msgid "unknown state"
+msgstr "estado desconocido"
+
+#: tools/gputils/gputils_generator.cpp:68
+#: tools/gputils/gputils_generator.cpp:69
+#: tools/gputils/gputils_generator.cpp:72
+#: tools/gputils/gputils_generator.cpp:81
+msgid "variable used for context saving"
+msgstr "variable utilizada para guardar contexto"
+
+#: tools/gputils/gputils_generator.cpp:130
+#: tools/gputils/gputils_generator.cpp:131
+#: tools/gputils/gputils_generator.cpp:132
+#: tools/gputils/gputils_generator.cpp:133
+#: tools/gputils/gputils_generator.cpp:210
+#: tools/gputils/gputils_generator.cpp:211
+#: tools/gputils/gputils_generator.cpp:212
+msgid "variable used for context saving (for low-priority interrupts only)"
+msgstr "variable utilizada para guardar contexto (solamente para interupciones de baja prioridad)"
+
+#: tools/gputils/gputils_generator.cpp:80
+msgid "variables used for context saving"
+msgstr "variables utilizadas para guardar contexto"
+
+#: tools/list/compile_process.cpp:358
+msgid "warning: "
+msgstr "atención: "
+
+#: coff/base/cdb_parser.cpp:128
+msgid "was expecting '%1'"
+msgstr "se esperaba un '%1'"
+
+#: coff/base/cdb_parser.cpp:200
+msgid "was expecting a bool ('%1')"
+msgstr "se esperaba un bool ('%1')"
+
+#: coff/base/cdb_parser.cpp:177
+msgid "was expecting an uint"
+msgstr "se esperaba un uint"
+
+#~ msgid "size=%1"
+#~ msgstr "tamaño=%1"
+
+#~ msgid "Coff"
+#~ msgstr "Coff"
+
+#~ msgid " <default>"
+#~ msgstr " <predeterminado>"
+
+#~ msgid " Already Loaded"
+#~ msgstr " Realmente cargado"
+
+#, fuzzy
+#~ msgid "Stepping..."
+#~ msgstr "Conectando..."
+
+#, fuzzy
+#~ msgid "24J Family"
+#~ msgstr "Familia 18X"
+
+#~ msgid "&Interrupt"
+#~ msgstr "&Interrumpir"
+
+#~ msgid "<qt><a href=\"http://www.microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=1406&dDocName=en010014&part=SW006011\">C18</a> is a C compiler distributed by Microchip.</qt>"
+#~ msgstr "<qt><a href=\"http://www.microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=1406&dDocName=en010014&part=SW006011\">C18</a> es un compilador C distribuido por Microchip.</qt>"
+
+#, fuzzy
+#~ msgid "Program EEPROM (if supported)"
+#~ msgstr "Programar EEPROM"
+
+#~ msgid "Add File to Project"
+#~ msgstr "Agregar archivo al proyecto"
+
+#~ msgid "Check hex file for correctness."
+#~ msgstr "Verificar archivo hex para corrección."
+
+#, fuzzy
+#~ msgid "Code-protected"
+#~ msgstr "Código protegido"
+
+#~ msgid "(%1 pins)"
+#~ msgstr "(%1 patas)"
+
+#, fuzzy
+#~ msgid "%1 (rev. %3.%4)"
+#~ msgstr "%1 (rev. %2)"
+
+#, fuzzy
+#~ msgid "Ram Boot block size"
+#~ msgstr "Tamaño del bloque de arranque"
diff --git a/po/fr.po b/po/fr.po
new file mode 100644
index 0000000..325d3ea
--- /dev/null
+++ b/po/fr.po
@@ -0,0 +1,6898 @@
+# translation of fr.po to
+# This file is put in the public domain.
+#
+# Alain PORTAL <aportal@univ-montp2.fr>, 2006, 2007.
+# Nicolas Hadacek <hadacek@kde.org>, 2006, 2007.
+msgid ""
+msgstr ""
+"Project-Id-Version: fr\n"
+"Report-Msgid-Bugs-To: \n"
+"POT-Creation-Date: 2007-11-25 14:15+0100\n"
+"PO-Revision-Date: 2007-11-21 22:48+0100\n"
+"Last-Translator: Nicolas Hadacek <hadacek@kde.org>\n"
+"Language-Team: \n"
+"MIME-Version: 1.0\n"
+"Content-Type: text/plain; charset=UTF-8\n"
+"Content-Transfer-Encoding: 8bit\n"
+"X-Generator: KBabel 1.11.4\n"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:802
+msgid ""
+"\n"
+"%1:\n"
+msgstr ""
+"\n"
+"%1 :\n"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:946
+msgid ""
+"\n"
+"Arguments:\n"
+msgstr ""
+"\n"
+"Arguments :\n"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:885
+msgid ""
+"\n"
+"Options:\n"
+msgstr ""
+"\n"
+"Options :\n"
+
+#: devices/pic/prog/pic_prog.cpp:109
+msgid "  %1 = %2 V: error in voltage level."
+msgstr "  %1 = %2 V : erreur dans la valeur de la tension."
+
+#: progs/icd2/base/icd2_debug_specific.cpp:58
+msgid "  According to ICD2 manual, instruction at address 0x0 should be \"nop\"."
+msgstr "  Conformément au manuel ICD2, l'instruction à l'adresse 0x0 doit être « nop »."
+
+#: devices/pic/prog/pic_prog.cpp:387
+msgid "  Band gap bits have been preserved."
+msgstr "  Les bits de la tension de gap ont été préservés."
+
+#: devices/pic/prog/pic_prog.cpp:630
+msgid "  Blank check successful"
+msgstr "  Vérification de virginité réussie"
+
+#: progs/icd2/base/icd2_debug.cpp:314
+msgid "  Debug executive version: %1"
+msgstr "  Version de l'exécutif de débogage : %1"
+
+#: devices/pic/prog/pic_prog.cpp:626
+msgid "  EPROM device: blank checking first..."
+msgstr "  Circuit avec EPROM : test de virginité d'abord..."
+
+#: devices/pic/prog/pic_prog.cpp:658 devices/pic/prog/pic_prog.cpp:714
+msgid "  Erasing device"
+msgstr "  Effacement du circuit"
+
+#: progs/icd2/base/icd2_prog.cpp:111
+msgid "  Firmware succesfully uploaded."
+msgstr "  Le micrologiciel a été correctement chargé."
+
+#: progs/icd2/base/icd2_prog.cpp:82
+msgid "  Incorrect firmware loaded."
+msgstr "  Le micrologiciel chargé est incorrect."
+
+#: devices/pic/prog/pic_prog.cpp:360
+msgid "  Osccal backup has been preserved."
+msgstr "La sauvegarde de la calibration de l'oscillateur a été préservée."
+
+#: devices/pic/prog/pic_prog.cpp:355
+msgid "  Osccal backup is unchanged."
+msgstr "La sauvegarde de la calibration de l'oscillateur n'a pas été modifiée."
+
+#: devices/pic/prog/pic_prog.cpp:346
+msgid "  Osccal has been preserved."
+msgstr "La calibration de l'oscillateur a été préservée."
+
+#: devices/pic/prog/pic_prog.cpp:341
+msgid "  Osccal is unchanged."
+msgstr "La calibration de l'oscillateur n'a pas été modifiée."
+
+#: progs/icd2/base/icd2_debug_specific.cpp:76
+#: progs/icd2/base/icd2_debug_specific.cpp:83
+#: progs/icd2/base/icd2_debug_specific.cpp:166
+#: progs/icd2/base/icd2_debug_specific.cpp:244
+msgid "  PC is not at address %1 (%2)"
+msgstr "  Le PC n'est pas à l'adresse %1 (%2)"
+
+#: devices/pic/prog/pic_prog.cpp:508
+msgid "  Part of device memory is protected (in %1) and cannot be verified."
+msgstr "  Une partie de la mémoire du circuit est protégée (en %1) et ne peut être vérifiée."
+
+#: devices/pic/prog/pic_prog.cpp:512
+msgid "  Read memory: %1"
+msgstr "  Lecture de la mémoire : %1"
+
+#: devices/pic/prog/pic_prog.cpp:334
+msgid "  Replace invalid osccal with backup value."
+msgstr "  Remplacer la valeur invalide de la calibration de l'oscillateur par la valeur de sauvegarde."
+
+#: progs/base/generic_prog.cpp:101
+msgid "  Set target self powered: %1"
+msgstr "  Définir la cible auto-alimentée : %1"
+
+#: devices/pic/prog/pic_prog.cpp:277
+msgid "  Unknown or incorrect device (Read id is %1)."
+msgstr "  Circuit inconnu ou incorrect (identifiant lu : %1)."
+
+#: progs/pickit2/base/pickit2_prog.cpp:63
+msgid "  Uploading PICkit2 firmware..."
+msgstr "  Chargement du micrologiciel du PICkit2..."
+
+#: progs/icd2/base/icd2_debug.cpp:247
+msgid "  Verify debug executive"
+msgstr "  Vérification de l'exécutif de débogage"
+
+#: devices/pic/prog/pic_prog.cpp:505
+msgid "  Verify memory: %1"
+msgstr "  Vérification de la mémoire : %1"
+
+#: progs/icd2/base/icd2_debug.cpp:244
+msgid "  Write debug executive"
+msgstr "  Écriture de l'exécutif de débogage"
+
+#: devices/pic/prog/pic_prog.cpp:565 devices/pic/prog/pic_prog.cpp:683
+#: devices/pic/prog/pic_prog.cpp:694
+msgid "  Write memory: %1"
+msgstr "  Écriture de la mémoire : %1"
+
+#: devices/pic/pic/pic_group.cpp:31 devices/pic/pic/pic_group.cpp:37
+msgid " (%2 bits)"
+msgstr " (%2 bits)"
+
+#: libgui/project_manager_ui.cpp:106 libgui/project_manager_ui.cpp:175
+msgid " (default)"
+msgstr " (défaut)"
+
+#: devices/gui/register_view.cpp:72
+msgid " (input)"
+msgstr " (entrée)"
+
+#: devices/pic/pic/pic_group.cpp:38
+msgid " (not programmable)"
+msgstr " (non programmable)"
+
+#: devices/gui/register_view.cpp:68
+msgid " (output)"
+msgstr " (sortie)"
+
+#: devices/pic/gui/pic_memory_editor.cpp:255
+msgid " - not programmed by default"
+msgstr " - non programmé par défaut"
+
+#: devices/pic/gui/pic_memory_editor.cpp:254
+#, fuzzy
+msgid " - recommended mask: %1"
+msgstr " - lecture du masque : %1"
+
+#: piklab-coff/main.cpp:176
+msgid " Filename:Line"
+msgstr "Nom de fichier:Ligne"
+
+#: piklab-prog/cmdline.cpp:137
+msgid " no port detected."
+msgstr " pas de port détecté."
+
+#: piklab-prog/cmdline.cpp:133
+msgid " support disabled."
+msgstr " prise en charge désactivée."
+
+#: tools/gui/toolchain_config_widget.cpp:167
+msgid "\"%1\" found"
+msgstr "« %1 » trouvé"
+
+#: tools/gui/toolchain_config_widget.cpp:234
+msgid "\"%1\" not found"
+msgstr "« %1 » pas trouvé"
+
+#: tools/gui/toolchain_config_widget.cpp:168
+msgid "\"%1\" not recognized"
+msgstr "« %1 » n'est pas reconnu"
+
+#: progs/gpsim/base/gpsim.cpp:68
+msgid "\"gpsim\" unexpectedly exited."
+msgstr "Fin inattendue de « gpsim »."
+
+#: coff/base/text_coff.cpp:252 coff/base/text_coff.cpp:257
+msgid "%1 (magic id: %2)"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:221
+msgid "%1 (proc. %2; rev. %3.%4)"
+msgstr "%1 (proc. %2 ; rév. %3.%4)"
+
+#: devices/pic/base/pic.cpp:215 devices/pic/base/pic.cpp:225
+msgid "%1 (rev. %2)"
+msgstr "%1 (rév. %2)"
+
+#: devices/pic/base/pic.cpp:218
+msgid "%1 (rev. %2.%3)"
+msgstr "%1 (rév. %2.%3)"
+
+#: progs/gui/hardware_config_widget.cpp:178
+msgid "%1 <custom>"
+msgstr "%1 <personnalisé>"
+
+#: piklab-prog/cli_interactive.cpp:312
+msgid "%1 = %2"
+msgstr "%1 = %2"
+
+#: progs/gui/hardware_config_widget.cpp:50
+msgid "%1 at %2:"
+msgstr "%1 à %2 :"
+
+#: devices/mem24/mem24/mem24_group.cpp:21 devices/pic/pic/pic_group.cpp:36
+msgid "%1 bytes"
+msgstr "%1 octets"
+
+#: devices/pic/base/pic_config.cpp:308
+msgid "%1 for block %2"
+msgstr "%1 pour le bloc %2"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:883
+msgid "%1 options"
+msgstr "Options de %1"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:647
+msgid "%1 was written by somebody who wants to remain anonymous."
+msgstr "%1 a été écrit par quelqu'un qui souhaitait rester anonyme."
+
+#: devices/pic/pic/pic_group.cpp:30
+msgid "%1 words"
+msgstr "%1 mots"
+
+#: devices/pic/gui/pic_memory_editor.cpp:256
+msgid "%1-bit words - mask: %2"
+msgstr "mots de %1 bits - masque : %2"
+
+#: devices/pic/prog/pic_prog.cpp:467
+msgid "%1: Erasing this range only is not supported with this programmer. This will erase the whole chip and restore the other memory ranges."
+msgstr "%1 : Il n'est pas possible d'effacer cet espace avec ce programmateur. Cela effacera le circuit entier et restaurera les autres espaces mémoire."
+
+#: libgui/toplevel.cpp:278
+msgid "&Advanced..."
+msgstr "&Avancé..."
+
+#: devices/gui/memory_editor.cpp:283 libgui/toplevel.cpp:270
+msgid "&Blank Check"
+msgstr "&Vérifier la virginité"
+
+#: libgui/toplevel.cpp:294
+#, fuzzy
+msgid "&Break<Translators: it is the verb>"
+msgstr "&Arrêter"
+
+#: libgui/toplevel.cpp:246
+msgid "&Build Project"
+msgstr "&Construire le projet"
+
+#: devices/gui/memory_editor.cpp:275
+msgid "&Clear"
+msgstr "&Effacer"
+
+#: libgui/toplevel.cpp:248
+msgid "&Compile File"
+msgstr "&Compiler le fichier"
+
+#: libgui/toplevel.cpp:314
+msgid "&Config Generator..."
+msgstr "Générateur de &configuration..."
+
+#: libgui/likeback.cpp:97
+msgid "&Configure Email Address..."
+msgstr "&Configurer l'adresse courriel..."
+
+#: libgui/toplevel.cpp:256
+msgid "&Connect"
+msgstr "&Connecter"
+
+#. i18n: file ./data/app_data/piklabui.rc line 101
+#: rc.cpp:30
+#, no-c-format
+msgid "&Debugger"
+msgstr "&Débogueur"
+
+#: libgui/toplevel.cpp:312
+msgid "&Device Information..."
+msgstr "&Information sur le circuit..."
+
+#: libgui/toplevel.cpp:260
+msgid "&Disconnect"
+msgstr "&Déconnecter"
+
+#: libgui/toplevel.cpp:296
+msgid "&Disconnect/Stop"
+msgstr "&Déconnecter/Arrêter"
+
+#: devices/gui/memory_editor.cpp:282 libgui/toplevel.cpp:268
+msgid "&Erase"
+msgstr "&Effacer"
+
+#: libgui/toplevel.cpp:310
+msgid "&Find Files..."
+msgstr "Chercher des &fichiers..."
+
+#: libgui/toplevel.cpp:183
+msgid "&New Source File..."
+msgstr "&Nouveau fichier source..."
+
+#: libgui/toplevel.cpp:308
+msgid "&Pikloops..."
+msgstr "&Pikloops..."
+
+#: devices/gui/memory_editor.cpp:279 libgui/toplevel.cpp:262
+msgid "&Program"
+msgstr "&Programmer"
+
+#. i18n: file ./data/app_data/piklabui.rc line 63
+#: rc.cpp:21
+#, no-c-format
+msgid "&Project"
+msgstr "&Projet"
+
+#: devices/gui/memory_editor.cpp:281 libgui/toplevel.cpp:266
+msgid "&Read"
+msgstr "&Lire"
+
+#: libgui/toplevel.cpp:219
+msgid "&Reset Layout"
+msgstr "&Réinitialiser la disposition"
+
+#: libgui/toplevel.cpp:272 libgui/toplevel.cpp:286
+msgid "&Run"
+msgstr "&Démarrer"
+
+#: libgui/device_gui.cpp:90
+msgid "&Select"
+msgstr "&Sélectionner"
+
+#: libgui/toplevel.cpp:288
+msgid "&Step"
+msgstr "&Pas à pas"
+
+#: libgui/toplevel.cpp:274
+msgid "&Stop"
+msgstr "&Arrêter"
+
+#: libgui/toplevel.cpp:316
+msgid "&Template Generator..."
+msgstr "Générateur de &modèle..."
+
+#: devices/gui/memory_editor.cpp:280 libgui/toplevel.cpp:264
+msgid "&Verify"
+msgstr "&Vérifier"
+
+#: devices/gui/memory_editor.cpp:276
+msgid "&Zero"
+msgstr "&Zéro"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:545
+msgid "'%1' missing."
+msgstr "« %1 » est manquant."
+
+#: devices/pic/gui/pic_memory_editor.cpp:366
+msgid "(backup)"
+msgstr "(sauvegarde)"
+
+#: tools/list/compile_manager.cpp:83 tools/list/compile_manager.cpp:112
+#: tools/list/compile_manager.cpp:137
+msgid "*** Aborted ***"
+msgstr "*** Abandon ***"
+
+#: tools/list/compile_process.cpp:143
+msgid "*** Error ***"
+msgstr "*** Erreur ***"
+
+#: tools/list/compile_process.cpp:140
+msgid "*** Exited with status: %1 ***"
+msgstr "*** Sortie avec le code : %1 ***"
+
+#: tools/list/compile_manager.cpp:194 tools/list/compile_manager.cpp:268
+msgid "*** Success ***"
+msgstr "*** Réussite ***"
+
+#: tools/list/compile_process.cpp:150
+msgid "*** Timeout ***"
+msgstr "*** Délai d'attente expiré ***"
+
+#: common/cli/cli_log.cpp:62
+msgid "*no*"
+msgstr "*non*"
+
+#: common/cli/cli_log.cpp:62
+msgid "*yes*"
+msgstr "*oui*"
+
+#: progs/base/generic_prog.cpp:28
+msgid "---"
+msgstr "---"
+
+#: devices/pic/base/pic_config.cpp:74
+msgid "00"
+msgstr "00"
+
+#: devices/pic/base/pic_config.cpp:74
+msgid "01"
+msgstr "01"
+
+#: devices/pic/base/pic_config.cpp:75
+msgid "10"
+msgstr "10"
+
+#: tools/jal/jal_generator.cpp:22
+msgid "10MHz crystal"
+msgstr "Quartz 10MHz"
+
+#: devices/pic/base/pic_config.cpp:75
+msgid "11"
+msgstr "11"
+
+#: devices/pic/base/pic_config.cpp:216
+msgid "12-bit external bus"
+msgstr "Bus externe 12 bits"
+
+#: devices/pic/base/pic_config.cpp:217
+msgid "16-bit external bus"
+msgstr "Bus externe 16 bits"
+
+#: devices/pic/base/pic.cpp:53
+msgid "17C Family"
+msgstr "Famille 17C"
+
+#: devices/pic/base/pic.cpp:54
+msgid "18C Family"
+msgstr "Famille 18C"
+
+#: devices/pic/base/pic.cpp:55
+msgid "18F Family"
+msgstr "Famille 18F"
+
+#: devices/pic/base/pic.cpp:56
+msgid "18J Family"
+msgstr "Famille 18J"
+
+#: devices/pic/base/pic_config.cpp:218
+msgid "20-bit external bus"
+msgstr "Bus externe 20 bits"
+
+#: devices/mem24/base/mem24.h:25
+msgid "24 EEPROM"
+msgstr "EEPROM 24"
+
+#: devices/pic/base/pic.cpp:57
+msgid "24F Family"
+msgstr "Famille 24F"
+
+#: devices/pic/base/pic.cpp:58
+msgid "24H Family"
+msgstr "Famille 24H"
+
+#: devices/pic/base/pic.cpp:59
+msgid "30F Family"
+msgstr "Famille 30F"
+
+#: devices/pic/base/pic.cpp:60
+msgid "33F Family"
+msgstr "Famille 33F"
+
+#: devices/pic/base/pic_config.cpp:207
+msgid "4 MHz"
+msgstr "4 MHz"
+
+#: devices/pic/base/pic_config.cpp:222
+msgid "5-bit address mask mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:221
+msgid "7-bit address mask mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:206
+msgid "8 MHz"
+msgstr "8 MHz"
+
+#: libgui/device_gui.cpp:155
+msgid "<Feature>"
+msgstr "<Fonctionnalité>"
+
+#: libgui/device_gui.cpp:142
+msgid "<Memory Type>"
+msgstr "<Type de mémoire>"
+
+#: libgui/device_gui.cpp:118
+msgid "<Programmer>"
+msgstr "<Programmateur>"
+
+#: libgui/device_gui.cpp:150
+msgid "<Status>"
+msgstr "<État>"
+
+#: libgui/device_gui.cpp:130
+msgid "<Toolchain>"
+msgstr "<Chaîne d'outils>"
+
+#: tools/boost/boostbasic.cpp:22
+msgid "<a href=\"%1\">BoostBasic Compiler</a> is a Basic compiler distributed by SourceBoost Technologies."
+msgstr "<a href=\"%1\">Compilateur BoostBasic</a> est un compilateur Basic distribué par SourceBoost Technologies."
+
+#: tools/boost/boostc.cpp:22
+msgid "<a href=\"%1\">BoostC Compiler</a> is a C compiler distributed by SourceBoost Technologies."
+msgstr "<a href=\"%1\">Compilateur BoostC</a> est un compilateur C distribué par SourceBoost Technologies."
+
+#: tools/boost/boostcpp.cpp:23
+msgid "<a href=\"%1\">BoostC++ Compiler</a> is a C compiler distributed by SourceBoost Technologies."
+msgstr "<a href=\"%1\">Compilateur BoostC++</a> est un compilateur C distribué par SourceBoost Technologies."
+
+#: tools/cc5x/cc5x.cpp:55
+msgid "<a href=\"%1\">CC5X</a> is a C compiler distributed by B Knudsen Data."
+msgstr "<a href=\"%1\">CC5X</a> est un compilateur C distribué par B Knudsen Data."
+
+#: tools/ccsc/ccsc.cpp:90
+msgid "<a href=\"%1\">CCS Compiler</a> is a C compiler distributed by CCS."
+msgstr "<a href=\"%1\">Le compilateur CCS</a> est un compilateur C distribué par CCS."
+
+#: tools/gputils/gputils.cpp:40
+msgid "<a href=\"%1\">GPUtils</a> is an open-source assembler and linker suite.<br>"
+msgstr "<a href=\"%1\">GPUtils</a> est un ensemble d'outils d'assemblage et d'éditions de liens en open-source.<br>"
+
+#: tools/jalv2/jalv2.cpp:31
+msgid "<a href=\"%1\">JAL V2</a> is a new compiler for the high-level language JAL."
+msgstr "<a href=\"%1\">JAL V2</a>est un nouveau compilateur pour le langage de haut niveau JAL."
+
+#: tools/jal/jal.cpp:31
+msgid "<a href=\"%1\">JAL</a> is a high-level language for PIC microcontrollers."
+msgstr "<a href=\"%1\">JAL</a> est un langage de haut niveau pour les microcontrôleurs PIC."
+
+#: tools/mpc/mpc.cpp:50
+msgid "<a href=\"%1\">MPC Compiler</a> is a C compiler distributed by Byte Craft."
+msgstr "<a href=\"%1\">MPC Compiler</a> est un compilateur C distribué par Byte Craft."
+
+#: tools/picc/picc.cpp:119
+msgid "<a href=\"%1\">PICC 18</a> is a C compiler distributed by HTSoft."
+msgstr "<a href=\"%1\">PICC 18</a> est un compilateur C distributé par HTSoft."
+
+#: tools/picc/picc.cpp:93
+msgid "<a href=\"%1\">PICC-Lite</a> is a freeware C compiler distributed by HTSoft."
+msgstr "<a href=\"%1\">PICC-Lite</a> est un compilateur C gratuit distribué par HTSoft."
+
+#: tools/picc/picc.cpp:106
+msgid "<a href=\"%1\">PICC</a> is a C compiler distributed by HTSoft."
+msgstr "<a href=\"%1\">PICC</a> est un compilateur C distribué par HTSoft."
+
+#: progs/gui/port_selector.cpp:88
+msgid "<a href=\"%1\">See Piklab homepage for help</a>."
+msgstr "<a href=\"%1\">Voir la page d'accueil de Piklab pour de l'aide</a>."
+
+#: devices/list/device_list.cpp:16
+msgid "<auto>"
+msgstr "<auto>"
+
+#: tools/gui/toolchain_config_widget.cpp:299
+msgid "<b>Device string #%1:</b><br>%2<br>"
+msgstr "<b>Chaîne du circuit #%1 :</b><br>%2<br>"
+
+#: tools/gui/toolchain_config_widget.cpp:298
+msgid "<b>Device string:</b><br>%1<br>"
+msgstr "<b>Chaîne du circuit :<b><br>%1<br>"
+
+#: tools/gui/toolchain_config_widget.cpp:271
+msgid "<b>Version string:</b><br>%1<br></qt>"
+msgstr "<b>Chaîne de version :<b><br>%1<br></qt>"
+
+#: libgui/hex_editor.cpp:101
+msgid "<b>Warning:</b> hex file seems to be incompatible with the selected device %1:<br>%2"
+msgstr "<b>Avertissement :</b> le fichier hexadécimal ne semble pas être compatible avec le circuit sélectionné %1 :<br>%2"
+
+#: libgui/project_manager_ui.cpp:165
+msgid "<default>"
+msgstr "<défaut>"
+
+#: piklab-prog/cmdline.cpp:411 piklab-prog/cmdline.cpp:426
+#: piklab-prog/cmdline.cpp:431 piklab-prog/cmdline.cpp:435
+msgid "<from config>"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:182
+msgid "<invalid>"
+msgstr "<non valide>"
+
+#: libgui/project_manager_ui.cpp:62
+msgid "<no project>"
+msgstr "<aucun projet>"
+
+#: devices/pic/pic/pic_group.cpp:54
+msgid "<none>"
+msgstr "<aucun>"
+
+#: piklab-hex/main.cpp:241 piklab-hex/main.cpp:245 piklab-prog/cmdline.cpp:403
+#: piklab-prog/cmdline.cpp:408 piklab-prog/cmdline.cpp:413
+#: piklab-prog/cmdline.cpp:416 piklab-prog/cmdline.cpp:422
+#: piklab-prog/cmdline.cpp:430 piklab-prog/cmdline.cpp:439
+#: piklab-prog/cmdline.cpp:443 piklab-coff/main.cpp:247
+msgid "<not set>"
+msgstr "<non configuré>"
+
+#: libgui/likeback.cpp:657
+msgid "<p>Error while trying to send the report.</p><p>Please retry later.</p>"
+msgstr "<p>Erreur lors de la tentative d'envoi du rapport.</p><p>Veuillez recommencer plus tard.</p>"
+
+#: libgui/likeback.cpp:659
+msgid "<p>Your comment has been sent successfully. It will help improve the application.</p><p>Thanks for your time.</p>"
+msgstr "<p>Votre commentaire a bien été envoyé. Il nous aidera à améliorer l'application.</p><p>Merci d'y avoir consacrer un peu de votre temps.</p>"
+
+#: tools/c18/c18.cpp:85
+msgid "<qt><a href=\"%1\">C18</a> is a C compiler distributed by Microchip.</qt>"
+msgstr "<a href=\"%1\">C18</a> est un compilateur C distributé par Microchip."
+
+#: tools/gui/toolchain_config_widget.cpp:296
+msgid "<qt><b>Command #%1 for devices detection:</b><br>%2<br>"
+msgstr "<qt><b>Commande #%1 pour la détection des circuits :</b><br>%2<br>"
+
+#: tools/gui/toolchain_config_widget.cpp:295
+msgid "<qt><b>Command for devices detection:</b><br>%1<br>"
+msgstr "<qt><b>Commande pour la détection des circuits :</b><br>%1<br>"
+
+#: tools/gui/toolchain_config_widget.cpp:270
+msgid "<qt><b>Command for executable detection:</b><br>%1<br>"
+msgstr "<qt><b>Commande pour la détection de l'exécutable :</b><br>%1<br>"
+
+#: tools/gui/tool_config_widget.cpp:113
+msgid "<qt>This values will be placed after the linked objects.</qt>"
+msgstr "<qt>Cette valeur sera placée après les objets liés.</qt>"
+
+#: piklab-hex/main.cpp:278
+msgid "<value>"
+msgstr "<valeur>"
+
+#: devices/pic/base/pic.cpp:72
+msgid "ADC"
+msgstr "ADC"
+
+#: coff/base/coff_object.cpp:124
+msgid "Absolute Value"
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:47
+msgid "Access Bank (high)"
+msgstr "Banque d'accès (haute)"
+
+#: devices/pic/gui/pic_register_view.cpp:47
+msgid "Access Bank (low)"
+msgstr "Banque d'accès (basse)"
+
+#: progs/direct/base/direct_mem24.cpp:168
+msgid "Acknowledge bit incorrect"
+msgstr "Le bit d'accusé de réception est incorrect"
+
+#: devices/pic/base/pic_config.cpp:108 devices/pic/base/pic_config.cpp:111
+msgid "Active high"
+msgstr "Actif niveau haut"
+
+#: devices/pic/base/pic_config.cpp:109 devices/pic/base/pic_config.cpp:112
+msgid "Active low"
+msgstr "Actif niveau bas"
+
+#: libgui/project_manager.cpp:200 libgui/toplevel.cpp:242
+msgid "Add Current File"
+msgstr "Ajouter le fichier courant"
+
+#: libgui/toplevel.cpp:240
+msgid "Add Object File..."
+msgstr "Ajouter un fichier objet..."
+
+#: libgui/project_manager.cpp:199 libgui/project_manager.cpp:214
+msgid "Add Object Files..."
+msgstr "Ajouter des fichiers objet..."
+
+#: libgui/toplevel.cpp:238
+msgid "Add Source File..."
+msgstr "Ajouter un fichier source..."
+
+#: libgui/project_wizard.cpp:149
+msgid "Add Source Files"
+msgstr "Ajouter des fichiers source"
+
+#: libgui/project_manager.cpp:198 libgui/project_manager.cpp:219
+msgid "Add Source Files..."
+msgstr "Ajouter des fichiers source..."
+
+#: libgui/project_wizard.cpp:151
+msgid "Add existing files."
+msgstr "Ajouter des fichiers existants."
+
+#: libgui/project_manager.cpp:314
+msgid "Add only"
+msgstr "Ajouter seulement"
+
+#: libgui/new_dialogs.cpp:66
+msgid "Add to project"
+msgstr "Ajouter au projet"
+
+#: libgui/breakpoint_view.cpp:49 piklab-coff/main.cpp:176
+msgid "Address"
+msgstr "Adresse"
+
+#: devices/pic/base/pic_config.cpp:129
+msgid "Address bus width (in bits)"
+msgstr "Largeur du bus d'adresses (en bits)"
+
+#: progs/gui/prog_group_ui.cpp:50
+msgid "Advanced Dialog"
+msgstr "Fenêtre avancée"
+
+#: devices/pic/base/pic_config.cpp:393
+msgid "All"
+msgstr "Tous"
+
+#: libgui/toplevel.cpp:553
+msgid "All Files"
+msgstr "Tous les fichiers"
+
+#: common/common/purl_base.cpp:117
+msgid "All Object Files"
+msgstr "Tous les fichiers objet"
+
+#: common/common/purl_base.cpp:105
+msgid "All Source Files"
+msgstr "Tous les fichiers sources"
+
+#: piklab-prog/cli_interactive.cpp:192
+#, fuzzy
+msgid "All breakpoints removed."
+msgstr "Tous les points d'arrêt sont supprimés"
+
+#: common/global/log.cpp:29
+msgid "All debug messages"
+msgstr "Tous les messages de débogage"
+
+#: tools/gputils/gputils_config.cpp:13 tools/c18/c18_config.cpp:12
+msgid "All messages"
+msgstr "Tous les messages"
+
+#: devices/pic/prog/pic_prog.cpp:191
+msgid "All or part of code memory is protected so it cannot be preserved. Continue anyway?"
+msgstr "Tout ou partie de la mémoire code est protégée, aussi elle ne peut pas être préservée. Continuer malgré tout ?"
+
+#: devices/pic/prog/pic_prog.cpp:198
+msgid "All or part of data EEPROM is protected so it cannot be preserved. Continue anyway?"
+msgstr "Tout ou partie de la mémoire donnée EEPROM est protégée, aussi elle ne peut pas être préservée. Continuer malgré tout ?"
+
+#: devices/pic/base/pic_config.cpp:271
+msgid "Allow multiple reconfigurations"
+msgstr "Autorise les reconfigurations multiples"
+
+#: devices/pic/base/pic_config.cpp:270
+msgid "Allow only one reconfiguration"
+msgstr "Autorise une seule reconfiguration"
+
+#: devices/pic/base/pic_config.cpp:275
+msgid "Alternate"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:272
+msgid "Alternate I2C pins"
+msgstr "Broches I2C alternatives"
+
+#: devices/base/device_group.cpp:239
+msgid "Alternatives"
+msgstr "Alternatives"
+
+#: devices/pic/base/pic_config.cpp:105
+msgid "Analog"
+msgstr "Analogique"
+
+#: coff/base/coff.cpp:22
+msgid "Archive"
+msgstr "Archive"
+
+#: libgui/likeback.cpp:135
+msgid "Are you sure you do not want to participate anymore in the application enhancing program?"
+msgstr "Êtes-vous sûr que vous ne voulez plus participer au programme d'amélioration de l'application ?"
+
+#: piklab-prog/cmdline.cpp:221
+msgid "Argument file type not recognized."
+msgstr "L'argument type de fichier n'est pas reconnu."
+
+#: piklab-prog/cli_interactive.cpp:196
+#, fuzzy
+msgid "Argument should be breakpoint index."
+msgstr "L'argument doit être l'index d'un point d'arrêt"
+
+#: piklab-prog/cli_interactive.cpp:186
+#, fuzzy
+msgid "Arguments not recognized."
+msgstr "Les arguments ne sont pas reconnus"
+
+#: tools/gui/tool_config_widget.cpp:44
+msgid "Arguments:"
+msgstr "Arguments :"
+
+#: coff/base/cdb_parser.cpp:23 coff/base/coff_object.cpp:180
+msgid "Array"
+msgstr "Matrice"
+
+#: progs/direct/base/direct_prog_config.cpp:59
+msgid "Asix Piccolo"
+msgstr "Asix Piccolo"
+
+#: progs/direct/base/direct_prog_config.cpp:61
+msgid "Asix Piccolo Grande"
+msgstr "Asix Piccolo Grande"
+
+#: tools/base/generic_tool.cpp:18 common/common/purl_base.cpp:20
+#: common/common/purl_base.cpp:25
+msgid "Assembler"
+msgstr "Assembleur"
+
+#: common/common/purl_base.cpp:33
+msgid "Assembler File"
+msgstr "Fichier assembleur"
+
+#: common/common/purl_base.cpp:34
+msgid "Assembler File for PIC30"
+msgstr "Fichier assembleur pour PIC30"
+
+#: common/common/purl_base.cpp:35
+msgid "Assembler File for PICC"
+msgstr "Fichier assembleur  pour PICC"
+
+#: tools/base/generic_tool.cpp:18
+msgid "Assembler:"
+msgstr "Assembleur :"
+
+#: devices/base/generic_memory.cpp:34
+msgid "At least one value (at address %1) is defined outside memory ranges."
+msgstr "Au moins une valeur (à l'adresse %1) est définie en dehors de l'espace mémoire accessible."
+
+#: devices/mem24/mem24/mem24_memory.cpp:86 devices/pic/pic/pic_memory.cpp:545
+msgid "At least one word (at offset %1) is larger (%2) than the corresponding mask (%3)."
+msgstr "Au moins un mot (au décalage %1) est plus grand (%2) que le masque correspondant (%3)."
+
+#: common/global/about.cpp:79
+msgid "Author and maintainer."
+msgstr "Auteur et mainteneur."
+
+#: common/global/about.cpp:82
+msgid "Author of gputils"
+msgstr "Auteur de gputils"
+
+#: common/global/about.cpp:83
+msgid "Author of likeback"
+msgstr "Auteur de likeback"
+
+#: coff/base/coff_object.cpp:147
+msgid "Auto Argument"
+msgstr "Argument automatique"
+
+#: tools/gui/tool_config_widget.cpp:24
+msgid "Automatic"
+msgstr "Automatique"
+
+#: coff/base/coff_object.cpp:129
+msgid "Automatic Variable"
+msgstr "Variable automatique"
+
+#: libgui/global_config.cpp:20
+msgid "Automatically rebuild project before programming if it is modified."
+msgstr "S'il a été modifié, reconstruire automatiquement le projet avant la programmation."
+
+#: progs/icd2/base/icd2.cpp:351
+msgid "Bad checksum for read block: %1 (%2 expected)."
+msgstr "Erreur de somme de contrôle pour le bloc lu : %1 (%2 était attendu)."
+
+#: progs/icd2/base/icd2.cpp:232
+msgid "Bad checksum for received string"
+msgstr "Erreur de somme de contrôle sur la chaîne reçue"
+
+#: devices/pic/base/pic_config.cpp:68
+msgid "Bandgap voltage calibration"
+msgstr "Calibration de la tension de gap"
+
+#: devices/pic/gui/pic_group_ui.cpp:59
+#: devices/pic/gui/pic_register_view.cpp:61
+msgid "Bank %1"
+msgstr "Banque %1"
+
+#: devices/pic/gui/pic_register_view.cpp:54
+msgid "Bank %1 (high)"
+msgstr "Banque %1 (haute)"
+
+#: devices/pic/gui/pic_register_view.cpp:54
+msgid "Bank %1 (low)"
+msgstr "Banque %1 (basse)"
+
+#: devices/pic/base/pic.cpp:51
+msgid "Baseline Family"
+msgstr "Famille de base"
+
+#: common/common/purl_base.cpp:29
+msgid "Basic Compiler"
+msgstr "Compilateur Basic"
+
+#: common/common/purl_base.cpp:41
+msgid "Basic Source File"
+msgstr "Fichier source Basic"
+
+#: coff/base/coff_object.cpp:149
+msgid "Beginning or End of Block"
+msgstr ""
+
+#: coff/base/coff_object.cpp:150
+msgid "Beginning or End of Function"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:20
+msgid "Bin to Hex"
+msgstr "Binaire vers hexadécimal"
+
+#: tools/base/generic_tool.cpp:20
+msgid "Bin to Hex:"
+msgstr "Binaire vers hexadécimal :"
+
+#: common/common/number.cpp:21
+msgid "Binary"
+msgstr "Binaire"
+
+#: coff/base/cdb_parser.cpp:55
+msgid "Bit Addressable"
+msgstr "Adressable au niveau bit"
+
+#: coff/base/cdb_parser.cpp:39 coff/base/coff_object.cpp:146
+msgid "Bit Field"
+msgstr "Champ de bit"
+
+#: progs/base/generic_prog.cpp:36
+msgid "Blank Checking..."
+msgstr "Vérification de virginité..."
+
+#: progs/base/prog_config.cpp:74
+msgid "Blank check after erase."
+msgstr "Vérifier la virginité après l'effacement."
+
+#: piklab-prog/cmdline.cpp:49
+msgid "Blank check device memory."
+msgstr "Vérifier la virginité de la mémoire du circuit."
+
+#: progs/base/generic_prog.cpp:289
+msgid "Blank checking done."
+msgstr "Vérification de virginité effectuée."
+
+#: progs/base/generic_prog.cpp:400
+msgid "Blank checking successful."
+msgstr "Vérification de virginité réussie."
+
+#: progs/base/generic_prog.cpp:287 progs/base/generic_prog.cpp:398
+msgid "Blank checking..."
+msgstr "Vérification de virginité..."
+
+#: piklab-prog/cmdline.cpp:316
+msgid "Blank-checking device memory not supported for specified programmer."
+msgstr "Le test de virginité de la mémoire programme n'est pas pris en charge par le programmateur spécifié."
+
+#: devices/mem24/mem24/mem24_group.cpp:38
+#: devices/pic/base/pic_protection.cpp:360
+msgid "Block #%1"
+msgstr "Bloc #%1"
+
+#: tools/boost/boostbasic.h:51
+msgid "BoostBasic Compiler for PIC16"
+msgstr "Compilateur BoostBasic pour PIC16"
+
+#: tools/boost/boostbasic.h:62
+msgid "BoostBasic Compiler for PIC18"
+msgstr "Compilateur BoostBasic pour PIC18"
+
+#: tools/boost/boostc.h:51
+msgid "BoostC Compiler for PIC16"
+msgstr "Compilateur BoostC pour PIC16"
+
+#: tools/boost/boostc.h:62
+msgid "BoostC Compiler for PIC18"
+msgstr "Compilateur BoostC pour PIC18"
+
+#: tools/boost/boostcpp.h:51
+msgid "BoostC++ Compiler for PIC16"
+msgstr "Compilateur BoostC++ pour PIC16"
+
+#: tools/boost/boostcpp.h:62
+msgid "BoostC++ Compiler for PIC18"
+msgstr "Compilateur BoostC++ pour PIC18"
+
+#: devices/pic/base/pic_protection.cpp:351
+msgid "Boot Block"
+msgstr "Bloc de démarrage"
+
+#: devices/pic/base/pic_protection.cpp:350
+msgid "Boot Segment"
+msgstr "Segment de démarrage"
+
+#: devices/pic/base/pic_config.cpp:125
+msgid "Boot block size"
+msgstr "Taille du bloc de démarrage"
+
+#: devices/pic/base/pic_config.cpp:23
+msgid "Boot code-protection"
+msgstr "Protection du code de la section de démarrage"
+
+#: devices/pic/base/pic_config.cpp:233
+msgid "Boot segment EEPROM size"
+msgstr "Taille de l'EEPROM du segment de démarrage"
+
+#: devices/pic/base/pic_config.cpp:234
+msgid "Boot segment RAM size"
+msgstr "Taille de la RAM du segment de démarrage"
+
+#: devices/pic/base/pic_config.cpp:230
+msgid "Boot segment security"
+msgstr "Sécurité du segment de démarrage"
+
+#: devices/pic/base/pic_config.cpp:229
+msgid "Boot segment size"
+msgstr "Taille du segment de démarrage"
+
+#: devices/pic/base/pic_config.cpp:228
+msgid "Boot segment write-protection"
+msgstr "Protection en écriture du segment de démarrage"
+
+#: devices/pic/base/pic_config.cpp:31
+msgid "Boot table read-protection"
+msgstr "Protection en lecture de la section de démarrage"
+
+#: devices/pic/base/pic_config.cpp:27
+msgid "Boot write-protection"
+msgstr "Protection en écriture de la section de démarrage"
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:89
+msgid "Bootloader identified device as: %1"
+msgstr "Le chargeur de démarrage a identifié le circuit : %1"
+
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:84
+msgid "Bootloader version %1 detected"
+msgstr "La version %1 du chargeur de démarrage a été détectée"
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:36
+msgid "Bootloader version %1 detected."
+msgstr "La version %1 du chargeur de démarrage a été détectée."
+
+#: progs/base/generic_prog.cpp:231
+msgid "Breaking..."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:161
+#, fuzzy
+msgid "Breakpoint already set at %1."
+msgstr "Un point d'arrêt est déjà défini à %1"
+
+#: piklab-prog/cli_interactive.cpp:201
+#, fuzzy
+msgid "Breakpoint at %1 removed."
+msgstr "Le point d'arrêt situé à %1 a été supprimé"
+
+#: libgui/gui_debug_manager.cpp:125
+msgid "Breakpoint at non-code line cannot be activated."
+msgstr "Un point d'arrêt sur une ligne sans code ne peut pas être activé."
+
+#: progs/manager/debug_manager.cpp:142
+msgid "Breakpoint at non-code line."
+msgstr "Point d'arrêt sur une ligne sans code."
+
+#: progs/manager/debug_manager.cpp:147
+msgid "Breakpoint corresponds to several addresses. Using the first one."
+msgstr "Le point d'arrêt correspond à plusieurs adresses. Utilisation de la première."
+
+#: piklab-prog/cli_interactive.cpp:197
+#, fuzzy
+msgid "Breakpoint index too large."
+msgstr "L'index du point d'arrêt est trop grand"
+
+#: piklab-prog/cli_interactive.cpp:165
+#, fuzzy
+msgid "Breakpoint set at %1."
+msgstr "Un point d'arrêt est défini à %1"
+
+#: libgui/toplevel.cpp:150
+msgid "Breakpoints"
+msgstr "Points d'arrêt"
+
+#: piklab-prog/cli_interactive.cpp:172
+msgid "Breakpoints:"
+msgstr "Points d'arrêt :"
+
+#: devices/pic/base/pic_config.cpp:76
+msgid "Brown-out detect"
+msgstr "Détection de baisse de tension"
+
+#: devices/pic/base/pic_config.cpp:89
+msgid "Brown-out reset software"
+msgstr "Contrôle logiciel de réinitialisation à la baisse de tension"
+
+#: devices/pic/base/pic_config.cpp:84
+msgid "Brown-out reset voltage"
+msgstr "Tension de réinitialisation à la baisse de tension"
+
+#. i18n: file ./data/app_data/piklabui.rc line 76
+#: rc.cpp:24
+#, no-c-format
+msgid "Bu&ild"
+msgstr "Constru&ire"
+
+#: libgui/project_manager.cpp:194
+msgid "Build Project"
+msgstr "Construire le projet"
+
+#. i18n: file ./data/app_data/piklabui.rc line 155
+#: rc.cpp:45
+#, no-c-format
+msgid "Build Toolbar"
+msgstr "Barre d'outils de construction"
+
+#: tools/list/compile_manager.cpp:53
+msgid "Building project..."
+msgstr "Construction du projet..."
+
+#: common/common/purl_base.cpp:26
+msgid "C Compiler"
+msgstr "Compilateur C"
+
+#: common/common/purl_base.cpp:39
+msgid "C Header File"
+msgstr "Fichier d'entête C"
+
+#: common/common/purl_base.cpp:37
+msgid "C Source File"
+msgstr "Fichier source C"
+
+#: libgui/toplevel.cpp:193
+msgid "C&lose All"
+msgstr "Tout &fermer"
+
+#: common/common/purl_base.cpp:28
+msgid "C++ Compiler"
+msgstr "Compilateur C++"
+
+#: common/common/purl_base.cpp:38
+msgid "C++ Source File"
+msgstr "Fichier source C++"
+
+#: tools/c18/c18.h:42
+msgid "C18 Compiler"
+msgstr "Compilateur C18"
+
+#: devices/pic/base/pic.cpp:77
+msgid "CAN"
+msgstr "CAN"
+
+#: tools/cc5x/cc5x.h:33
+msgid "CC5X Compiler"
+msgstr "Compilateur CC5X"
+
+#: devices/pic/base/pic.cpp:71
+msgid "CCP"
+msgstr "CCP"
+
+#: devices/pic/base/pic_config.cpp:88
+msgid "CCP1 multiplex"
+msgstr "Multiplexage CCP1"
+
+#: devices/pic/base/pic_config.cpp:87
+msgid "CCP2 multiplex"
+msgstr "Multiplexage CCP2"
+
+#: tools/ccsc/ccsc.h:36 coff/base/coff_object.cpp:38
+msgid "CCS Compiler"
+msgstr "Compilateur CCS"
+
+#: common/common/purl_base.cpp:54
+msgid "COD File"
+msgstr "Fichier COD"
+
+#: tools/base/generic_tool.cpp:38
+msgid "COFF"
+msgstr "COFF"
+
+#: common/common/purl_base.cpp:55
+msgid "COFF File"
+msgstr "Fichier COFF"
+
+#: coff/base/coff.cpp:67 coff/base/coff.cpp:77
+msgid "COFF file is truncated (offset: %1  nbBytes: %2  size:%3)."
+msgstr "Le fichier COFF est tronqué (décalage : %1  nb d'octets : %2  taille : %3)."
+
+#: piklab-prog/cli_interactive.cpp:61
+msgid "COFF file to be used for debugging."
+msgstr "Fichier COFF à utiliser pour le débogage."
+
+#: piklab-coff/main.cpp:279
+msgid "COFF filename."
+msgstr "Nom de fichier COFF."
+
+#: coff/base/coff_object.cpp:454
+msgid "COFF format not supported: magic number is %1."
+msgstr "Format COFF non pris en charge : le nombre magique est %1."
+
+#: piklab-coff/main.cpp:212
+msgid "COFF type:"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:199
+msgid "CPU system clock (divided by)"
+msgstr "Horloge système CPU (divisée par)"
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:149
+msgid "CRC error from bootloader: retrying..."
+msgstr "Erreur CRC du chargeur de démarrage : nouvelle tentative..."
+
+#: devices/base/hex_buffer.cpp:142
+msgid "CRC mismatch (line %1)."
+msgstr "Le CRC est mauvais (ligne %1)."
+
+#: devices/pic/base/pic.cpp:26 progs/gui/prog_group_ui.cpp:92
+msgid "Calibration"
+msgstr "Calibration"
+
+#: devices/pic/base/pic.cpp:33
+msgid "Calibration Backup"
+msgstr "Sauvegarde de la calibration"
+
+#: devices/pic/base/pic_config.cpp:22
+msgid "Calibration code-protection"
+msgstr "Protection du code de la section calibration"
+
+#: progs/pickit2/base/pickit_prog.cpp:46
+msgid "Calibration firmware file seems incompatible with selected device %1."
+msgstr "Le fichier du micrologiciel de calibration semble incompatible avec le circuit %1 sélectionné."
+
+#: devices/pic/base/pic.cpp:239
+msgid "Calibration word at address %1 is blank."
+msgstr "Le mot de calibration à l'adresse %1 est vierge."
+
+#: devices/pic/base/pic.cpp:245
+msgid "Calibration word is not a compatible opcode (%2)."
+msgstr "Le mot de calibration n'est pas un code opératoire compatible (%2)."
+
+#: tools/list/compile_manager.cpp:65
+msgid "Cannot build empty project."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:406
+msgid "Cannot erase ROM or EPROM device."
+msgstr "Impossible d'effacer un circuit avec ROM ou EPROM."
+
+#: devices/pic/prog/pic_prog.cpp:446
+msgid "Cannot erase protected code memory. Consider erasing the whole chip."
+msgstr "Impossible d'effacer la mémoire code protégée. Vous devriez effacer le circuit entier."
+
+#: devices/pic/prog/pic_prog.cpp:450
+msgid "Cannot erase protected data EEPROM. Consider erasing the whole chip."
+msgstr "Impossible d'effacer la mémoire EEPROM de données protégée. Vous devriez effacer le circuit entier."
+
+#: devices/pic/prog/pic_prog.cpp:464
+msgid "Cannot erase specified range because of programmer limitations."
+msgstr "Impossible d'effacer l'intervalle spécifié à cause des limitations du programmateur."
+
+#: libgui/project_manager.cpp:420
+msgid "Cannot open without device specified."
+msgstr "Impossible d'ouvrir sans spécifier un circuit."
+
+#: devices/pic/prog/pic_prog.cpp:526
+msgid "Cannot read ROMless device."
+msgstr "Impossible de lire un circuit sans ROM."
+
+#: progs/pickit2/base/pickit2.cpp:116
+msgid "Cannot read voltages with this firmware version."
+msgstr "Impossible de lire les tensions avec cette version de micrologiciel."
+
+#: libgui/gui_debug_manager.cpp:242
+msgid "Cannot show disassembly location for non-code line."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:250
+msgid "Cannot specify range without specifying device."
+msgstr "Impossible de spécifier une gamme sans spécifier un circuit."
+
+#: progs/manager/debug_manager.cpp:387
+msgid "Cannot start debugging session without input file (%1)."
+msgstr "Impossible de démarrer une session de débogage sans fichier d'entrée (%1)."
+
+#: progs/manager/debug_manager.cpp:372
+msgid "Cannot start debugging session without input file (not specified)."
+msgstr "Impossible de démarrer une session de débogage sans fichier d'entrée (il n'a pas été spécifié)."
+
+#: libgui/gui_prog_manager.cpp:34
+msgid "Cannot start debugging without a COFF file. Please compile the project."
+msgstr "Impossible de lancer le débogage sans fichier COFF. Veuillez compiler le projet."
+
+#: progs/manager/prog_manager.cpp:138
+msgid "Cannot toggle target power since target is self-powered."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:606
+msgid "Cannot write ROM or ROMless device."
+msgstr "Impossible d'écrire un circuit avec ROM ou sans ROM."
+
+#: coff/base/cdb_parser.cpp:33 coff/base/coff_object.cpp:160
+msgid "Char"
+msgstr "Char"
+
+#: piklab-hex/main.cpp:25
+msgid "Check hex file for correctness (if a device is specified, check if hex file is compatible with it)."
+msgstr "Vérifie l'exactitude du fichier hexadécimal (si un circuit est spécifié, vérifie si le fichier hexadécimal est compatible avec celui-ci)."
+
+#: progs/direct/base/direct.cpp:41
+msgid "Check this box to change DATA buffer direction."
+msgstr "Cochez cette case pour modifier la direction du tampon DATA."
+
+#: progs/direct/base/direct.cpp:26 progs/direct/base/direct.cpp:29
+#: progs/direct/base/direct.cpp:32 progs/direct/base/direct.cpp:35
+msgid "Check this box to turn voltage on/off for this pin."
+msgstr "Cocher cette case pour mettre sous/hors tension cette broche."
+
+#: progs/direct/gui/direct_config_widget.cpp:27
+msgid "Check this option if your hardware uses negative logic for this pin."
+msgstr "Cochez cette option si votre matériel utilise la logique négative sur cette broche."
+
+#: devices/pic/gui/pic_config_word_editor.cpp:98
+msgid "Checksum Mask:"
+msgstr "Masque pour somme de contrôle :"
+
+#: piklab-hex/main.cpp:178
+msgid "Checksum computation is experimental and is not always correct!"
+msgstr "Le calcul de la valeur de contrôle est expérimental et n'est pas toujours correct !"
+
+#: piklab-hex/main.cpp:180 libgui/hex_editor.cpp:189
+msgid "Checksum: %1"
+msgstr "Checksum : %1"
+
+#: libgui/toplevel.cpp:250
+msgid "Clean"
+msgstr "Nettoyer"
+
+#: libgui/project_manager.cpp:195
+msgid "Clean Project"
+msgstr "Nettoyer le projet"
+
+#: piklab-hex/main.cpp:27
+msgid "Clean hex file and fix errors (wrong CRC, truncated line, truncated file)."
+msgstr "Nettoye le fichier hexadécimal et répare les erreurs (mauvais CRC, ligne tronquée, fichier tronqué)."
+
+#: libgui/toplevel.cpp:302
+msgid "Clear All Breakpoints"
+msgstr "Effacer tous les points d'arrêt"
+
+#: piklab-prog/cli_interactive.cpp:47
+msgid "Clear a breakpoint \"clear 0\", \"clear e 0x04\", or clear all breakpoints \"clear all\"."
+msgstr "Effacer un point d'arrêt « clear 0 », « clear e 0x04 », ou effacer tous les points d'arrêts « clear all »."
+
+#: devices/pic/gui/pic_register_view.cpp:265
+msgid "Clear all watching"
+msgstr "Effacer toutes les surveillances"
+
+#: progs/direct/base/direct.cpp:30
+msgid "Clock"
+msgstr "Horloge"
+
+#: progs/direct/gui/direct_config_widget.cpp:68
+msgid "Clock delay"
+msgstr "Retard d'horloge"
+
+#: devices/pic/base/pic_config.cpp:264
+msgid "Clock output"
+msgstr "Sortie horloge"
+
+#: devices/pic/base/pic_config.cpp:136
+msgid "Clock switching mode"
+msgstr "Mode de commutation d'horloge"
+
+#: libgui/editor_manager.cpp:403 libgui/toplevel.cpp:195
+msgid "Close All Others"
+msgstr "Fermer tous les autres"
+
+#: libgui/toplevel.cpp:236
+msgid "Close Project"
+msgstr "Fermer le projet"
+
+#: progs/gui/hardware_config_widget.cpp:91
+msgid "Closing will discard changes you have made. Close anyway?"
+msgstr "La fermeture entraînera l'annulation des modifications que vous avez effectué. Fermer malgré tout ?"
+
+#: coff/base/cdb_parser.cpp:50 coff/base/coff_object.cpp:332
+msgid "Code"
+msgstr "Code"
+
+#: coff/base/cdb_parser.cpp:51
+msgid "Code / Static Segment"
+msgstr "Code / segment statique"
+
+#: coff/base/cdb_parser.cpp:26
+msgid "Code Pointer"
+msgstr "Pointeur de code"
+
+#: devices/pic/base/pic_config.cpp:20
+msgid "Code code-protection"
+msgstr "Protection du code de la section exécutable"
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:53
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:163
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:111
+msgid "Code is present in bootloader reserved area (at address %1). It will be ignored."
+msgstr "Le code est dans la zone réservée du chargeur de démarrage (à l'adresse %1). Il sera ignoré."
+
+#: devices/pic/base/pic.cpp:25
+msgid "Code memory"
+msgstr "Mémoire code"
+
+#: devices/pic/base/pic_config.cpp:96
+msgid "Code protected microcontroller"
+msgstr "Microcontrôleur avec protection du code"
+
+#: devices/pic/gui/pic_memory_editor.cpp:77
+msgid "Code protection"
+msgstr "Protection du code"
+
+#: devices/pic/base/pic_config.cpp:25
+msgid "Code write-protection"
+msgstr "Protection en écriture de la section exécutable"
+
+#: coff/base/coff_object.cpp:286 coff/base/coff_object.cpp:299
+msgid "Codeline has unknown symbol: %1"
+msgstr "La ligne de code a un symbole inconnu : %1"
+
+#: coff/base/coff_object.cpp:290 coff/base/coff_object.cpp:303
+msgid "Codeline is an auxiliary symbol: %1"
+msgstr "La ligne de code est un symbole auxiliaire : %1"
+
+#: piklab-coff/main.cpp:128
+msgid "Command not available for COFF of type Archive."
+msgstr ""
+
+#: piklab-coff/main.cpp:204
+msgid "Command not available for COFF of type Object."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:453
+msgid "Command-line programmer/debugger."
+msgstr "Programmeur/débuggeur en ligne de commande."
+
+#: piklab-hex/main.cpp:287
+msgid "Command-line utility to manipulate hex files."
+msgstr "Utilitaire en ligne de commande de manipulation de fichiers hexadécimaux."
+
+#: piklab-coff/main.cpp:278
+msgid "Command-line utility to view COFF files."
+msgstr "Utilitaire en ligne de commande de visualisation de fichiers COFF."
+
+#: libgui/likeback.cpp:659
+msgid "Comment Sent"
+msgstr "Commentaire envoyé"
+
+#: devices/base/generic_device.cpp:33
+msgid "Commercial"
+msgstr "Commercial"
+
+#: piklab-hex/main.cpp:28
+msgid "Compare two hex files."
+msgstr "Compare deux fichiers hexadécimaux."
+
+#: progs/direct/base/direct_prog_config.cpp:83
+msgid "Compatible with ET-CAB10PIN V2 programmer shipped by Futurlec, with their PIC16F877 controler board."
+msgstr ""
+
+#: libgui/toplevel.cpp:138
+msgid "Compile Log"
+msgstr "Journal de compilation"
+
+#: tools/base/generic_tool.cpp:17 common/common/purl_base.cpp:21
+msgid "Compiler"
+msgstr "Compilateur"
+
+#: tools/base/generic_tool.cpp:17
+msgid "Compiler:"
+msgstr "Compilateur :"
+
+#: tools/list/compile_manager.cpp:29
+msgid "Compiling file..."
+msgstr "Compilation du fichier..."
+
+#: coff/base/coff_object.cpp:326
+msgid "Config"
+msgstr ""
+
+#: libgui/config_gen.cpp:145
+msgid "Config Generator"
+msgstr "Générateur de configuration"
+
+#: devices/pic/gui/pic_config_word_editor.cpp:51
+msgid "Config Word Details"
+msgstr "Détails du mot Config"
+
+#: common/port/usb_port.cpp:242
+msgid "Configuration %1 not present: using %2"
+msgstr "Configuration %1 absente : utilisation de %2"
+
+#: devices/pic/base/pic.cpp:29
+msgid "Configuration Bits"
+msgstr "Bits de configuration"
+
+#: coff/base/disassembler.cpp:282
+msgid "Configuration bits: adapt to your setup and needs"
+msgstr "Bits de configuration: adapté à votre dispositif et à vos besoins"
+
+#: devices/pic/base/pic_config.cpp:28
+msgid "Configuration write-protection"
+msgstr "Protection en écriture de la section de configuration"
+
+#: tools/gui/tool_config_widget.cpp:37
+msgid "Configuration:"
+msgstr "Configuration :"
+
+#: libgui/toplevel_ui.cpp:40
+msgid "Configure Compilation..."
+msgstr "Configurer la compilation..."
+
+#: libgui/config_center.cpp:113
+msgid "Configure Piklab"
+msgstr "Configuration de Piklab"
+
+#: libgui/toplevel_ui.cpp:39
+msgid "Configure Toolchain..."
+msgstr "Configurer la chaîne d'outils..."
+
+#: tools/gui/toolchain_config_center.cpp:24
+msgid "Configure Toolchains"
+msgstr "Configuration des chaînes d'outils"
+
+#: libgui/toplevel.cpp:320
+msgid "Configure Toolchains..."
+msgstr "Configurer les chaînes d'outils..."
+
+#: libgui/toplevel.cpp:346
+msgid "Configure email..."
+msgstr "Configurer l'adresse courriel..."
+
+#: libgui/project_manager.cpp:186 libgui/toplevel_ui.cpp:22
+#: libgui/likeback.cpp:89
+msgid "Configure..."
+msgstr "Configurer..."
+
+#: piklab-prog/cmdline.cpp:35
+msgid "Connect programmer."
+msgstr "Se connecter au programmateur."
+
+#: progs/gui/hardware_config_widget.cpp:61
+msgid "Connected"
+msgstr "Connecté"
+
+#: devices/pic/base/pic_config.cpp:224
+msgid "Connected to EMB"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:108
+msgid "Connected."
+msgstr "Connecté."
+
+#: progs/base/generic_prog.cpp:81
+msgid "Connecting %1 on %2 with device %3..."
+msgstr "Connexion de %1 sur %2 avec le circuit %3..."
+
+#: progs/base/generic_prog.cpp:75
+msgid "Connecting %1 with device %2..."
+msgstr "Connexion de %1 avec le circuit %2..."
+
+#: progs/base/generic_prog.cpp:89
+msgid "Connecting..."
+msgstr "Connexion..."
+
+#: progs/gui/prog_config_center.cpp:92
+msgid "Connection: Error"
+msgstr "Connexion : erreur"
+
+#: progs/gui/prog_config_center.cpp:92
+msgid "Connection: Ok"
+msgstr "Connexion : ok"
+
+#: tools/pic30/pic30_generator.cpp:51
+msgid "Constants in program space"
+msgstr "Constantes dans l'espace programme"
+
+#: libgui/toplevel.cpp:905
+msgid "Continue Anyway"
+msgstr "Continue malgré tout"
+
+#: devices/pic/prog/pic_prog.cpp:284
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:86
+msgid "Continue with the specified device name: \"%1\"..."
+msgstr "Poursuivre avec le nom de circuit spécifié : « %1 »..."
+
+#: progs/direct/gui/direct_config_widget.cpp:81
+msgid "Continuously send 0xA55A on \"Data out\" pin."
+msgstr "Envoyer continuellement 0xA55A sur la broche « Data out »."
+
+#: libgui/project_manager.cpp:314
+msgid "Copy and Add"
+msgstr "Copier et ajouter"
+
+#: libgui/config_gen.cpp:66
+msgid "Copy to clipboard"
+msgstr "Copier dans le presse-papiers"
+
+#: libgui/project_manager.cpp:325
+msgid "Copying file to project directory failed."
+msgstr "La copie du fichier dans le répertoire du projet a échoué."
+
+#: common/port/usb_port.cpp:259
+msgid "Could not claim USB interface %1"
+msgstr "Impossible d'obtenir les privilèges sur l'interface USB %1"
+
+#: common/port/parallel.cpp:173
+msgid "Could not claim device \"%1\": check it is read/write enabled"
+msgstr "Impossible d'obtenir les privilèges sur le périphérique « %1 » : vérifiez qu'il soit accessible en lecture-écriture"
+
+#: progs/gui/prog_group_ui.cpp:121
+msgid "Could not connect programmer."
+msgstr "Impossible de se connecter au programmateur."
+
+#: progs/psp/base/psp_serial.cpp:40
+msgid "Could not contact Picstart+"
+msgstr "Impossible de dialoguer avec le Picstart+"
+
+#: common/gui/purl_ext.cpp:31
+msgid "Could not copy file"
+msgstr "Impossible de copier le fichier"
+
+#: common/gui/purl_ext.cpp:108
+msgid "Could not create directory"
+msgstr "Impossible de créer le répertoire"
+
+#: common/gui/purl_ext.cpp:52
+msgid "Could not create file"
+msgstr "Impossible de créer le fichier"
+
+#: common/gui/pfile_ext.cpp:24 common/gui/pfile_ext.cpp:109
+msgid "Could not create temporary file."
+msgstr "Impossible de créer un fichier temporaire."
+
+#: common/gui/purl_ext.cpp:75
+msgid "Could not delete file."
+msgstr "Impossible d'effacer le fichier"
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:35
+msgid "Could not detect \"gpsim\" version"
+msgstr "Impossible de détecter la version de « gpsim »"
+
+#: progs/direct/base/direct_mem24.cpp:51
+msgid "Could not detect EEPROM"
+msgstr "Impossible de détecter la mémoire EEPROM"
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:31
+msgid "Could not detect device in bootloader mode."
+msgstr "Impossible de détecter le circuit en mode chargeur de démarrage."
+
+#: progs/manager/prog_manager.cpp:64 libgui/device_gui.cpp:263
+msgid "Could not detect supported devices for \"%1\". Please check installation."
+msgstr "Impossible de détecter les circuits pris en charge pour « %1 ». Veuillez vérifier l'installation."
+
+#: libgui/config_gen.cpp:131
+msgid "Could not detect supported devices for selected toolchain. Please check installation."
+msgstr "Impossible de détecter les circuits pris en charge par la chaîne d'outils sélectionnée. Veuillez vérifier l'installation."
+
+#: libgui/device_gui.cpp:268
+msgid "Could not detect supported devices for toolchain \"%1\". Please check installation."
+msgstr "Impossible de détecter les circuits pris en charge par la chaîne d'outils « %1 ». Veuillez vérifier l'installation."
+
+#: coff/base/coff_object.cpp:567
+msgid "Could not determine processor (%1)."
+msgstr "Impossible de déterminer le processeur (%1)."
+
+#: libgui/console.cpp:30
+msgid "Could not find \"konsolepart\"; please install kdebase."
+msgstr "« konsolepart » n'a pu être trouvé ; veuillez vérifier l'installation de kdebase."
+
+#: common/port/usb_port.cpp:210
+msgid "Could not find USB device (vendor=%1 product=%2)."
+msgstr "Impossible de trouver le périphérique USB (vendeur=%1 produit=%2)."
+
+#: progs/icd2/base/icd2_debug.cpp:155
+msgid "Could not find debug executive file \"%1\"."
+msgstr "Impossible de trouver le fichier de l'exécutif de débogage « %1 »."
+
+#: piklab-prog/cli_prog_manager.cpp:28
+msgid "Could not find device \"%1\" as serial or parallel port. Will try to open as serial port."
+msgstr "Impossible de trouver le périphérique « %1 » comme port série ou parallèle. Je vais essayer de l'ouvrir comme port série."
+
+#: tools/mpc/mpc_compile.cpp:40 tools/ccsc/ccsc_compile.cpp:86
+msgid "Could not find error file (%1)."
+msgstr "Impossible de trouver le fichier d'erreur (%1)."
+
+#: libgui/project_manager.cpp:307
+msgid "Could not find file."
+msgstr "Impossible de trouver le fichier."
+
+#: progs/icd2/base/icd2_prog.cpp:90
+msgid "Could not find firmware file \"%1\" in directory \"%2\"."
+msgstr "Impossible de trouver le fichier du micrologiciel « %1 » dans le répertoire « %2 »."
+
+#: common/port/serial.cpp:329
+msgid "Could not flush device"
+msgstr "Impossible de vider le périphérique"
+
+#: common/port/serial.cpp:165
+msgid "Could not get file descriptor parameters"
+msgstr "Impossible d'obtenir les paramètres du descripteur de fichier"
+
+#: piklab-prog/cmdline.cpp:173
+msgid "Could not load hex file \"%1\"."
+msgstr "Impossible de charger le fichier hexadécimal « %1 »."
+
+#: common/port/serial.cpp:198
+msgid "Could not modify file descriptor flags"
+msgstr "Impossible de modifier les attributs du descripteur de fichier"
+
+#: common/port/parallel.cpp:169 common/port/parallel.cpp:179
+msgid "Could not open device \"%1\""
+msgstr "Impossible d'ouvrir le périphérique « %1 »"
+
+#: common/port/serial.cpp:190
+msgid "Could not open device \"%1\" read-write"
+msgstr "Impossible d'ouvrir le périphérique « %1 » en lecture-écriture"
+
+#: common/gui/pfile_ext.cpp:58 common/cli/cli_pfile.cpp:37
+msgid "Could not open file for reading."
+msgstr "Impossible d'ouvrir le fichier en lecture."
+
+#: common/cli/cli_pfile.cpp:19
+msgid "Could not open file for writing."
+msgstr "Impossible d'ouvrir le fichier en écriture."
+
+#: piklab-prog/cli_interactive.cpp:320
+#, fuzzy
+msgid "Could not open filename \"%1\"."
+msgstr "Impossible d'ouvrir le fichier « %1 »"
+
+#: progs/icd2/base/icd2_prog.cpp:100 progs/icd2/base/icd2_debug.cpp:162
+#: progs/pickit2/base/pickit_prog.cpp:35 progs/base/generic_prog.cpp:250
+msgid "Could not open firmware file \"%1\"."
+msgstr "Impossible d'ouvrir le fichier du micrologiciel « %1 »."
+
+#: libgui/project_manager.cpp:531
+msgid "Could not open project file."
+msgstr "Impossible d'ouvrir le fichier de projet."
+
+#: common/gui/pfile_ext.cpp:63
+msgid "Could not open temporary file."
+msgstr "Impossible d'ouvrir le fichier temporaire."
+
+#: progs/pickit2/base/pickit_prog.cpp:42
+msgid "Could not read calibration firmware file \"%1\" (%2)."
+msgstr "Impossible de lire le fichier du micrologiciel de calibration « %1 » (%2)."
+
+#: progs/icd2/base/icd2_debug.cpp:168
+msgid "Could not read debug executive file \"%1\": %2."
+msgstr "Impossible de lire le fichier de l'exécutif de débogage « %1 » : %2"
+
+#: progs/pickit2/base/pickit2_prog.cpp:56
+msgid "Could not read firmware hex file \"%1\" (%2)."
+msgstr "Impossible de lire le fichier hexadécimal du micrologiciel « %1 » (%2)."
+
+#: progs/icd2/base/icd_prog.cpp:22
+msgid "Could not read firmware hex file \"%1\": %2."
+msgstr "Impossible de lire le fichier hexadécimal du micrologiciel « %1 » : %2"
+
+#: coff/base/coff.cpp:93
+msgid "Could not recognize file (magic number is %1)."
+msgstr ""
+
+#: progs/gpsim/base/gpsim.cpp:127
+msgid "Could not recognize gpsim version."
+msgstr "Impossible de détecter la version de gpsim."
+
+#: devices/pic/prog/pic_prog.cpp:381
+msgid "Could not restore band gap bits because programmer does not support writing config bits."
+msgstr "Impossible de restaurer les bits de la bande de gap car le programmateur ne peut pas écrire les bits de configuration."
+
+#: libgui/toplevel.cpp:715
+msgid "Could not run \"kfind\""
+msgstr "Impossible de lancer « kfind »"
+
+#: libgui/toplevel.cpp:731
+msgid "Could not run \"pikloops\""
+msgstr "Impossible de lancer « pikloops »"
+
+#: progs/gui/hardware_config_widget.cpp:67
+msgid "Could not save configuration: hardware name is empty."
+msgstr "Impossible d'enregistrer la configuration : le nom du matériel est vide."
+
+#: common/gui/pfile_ext.cpp:45
+msgid "Could not save file."
+msgstr "Impossible d'enregistrer le fichier."
+
+#: libgui/project_manager.cpp:245
+msgid "Could not save project file \"%1\"."
+msgstr "Impossible d'enregistrer le fichier de projet « %1 »."
+
+#: common/port/serial.cpp:180
+msgid "Could not set file descriptor parameters"
+msgstr "Impossible de définir les paramètres du descripteur de fichier"
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:34
+msgid "Could not start \"gpsim\""
+msgstr "Impossible de lancer « gpsim »"
+
+#: common/gui/pfile_ext.cpp:94
+msgid "Could not write to temporary file."
+msgstr "Impossible d'écrire le fichier temporaire."
+
+#: libgui/new_dialogs.cpp:61
+msgid "Create New File"
+msgstr "Créer un nouveau fichier"
+
+#: piklab-hex/main.cpp:30
+msgid "Create an hex file for the specified device."
+msgstr "Créer un fichier hexadécimal pour le circuit spécifié."
+
+#: libgui/project_wizard.cpp:150
+msgid "Create template source file."
+msgstr "Créer un fichier source modèle."
+
+#: devices/pic/base/pic_config.cpp:46
+msgid "Crystal/resonator"
+msgstr "Quartz/résonnateur"
+
+#: devices/pic/base/pic_config.cpp:47
+msgid "Crystal/resonator, PLL enabled"
+msgstr "Quartz/résonnateur, PLL activée"
+
+#: tools/gui/tool_config_widget.cpp:24 tools/custom/custom.h:21
+msgid "Custom"
+msgstr "Personnalisé"
+
+#: tools/gui/tool_config_widget.cpp:109
+msgid "Custom libraries:"
+msgstr "Bibliothèques personnelles :"
+
+#: tools/gui/tool_config_widget.cpp:99
+msgid "Custom options:"
+msgstr "Options personnalisées :"
+
+#: tools/list/tools_config_widget.cpp:81
+msgid "Custom shell commands:"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:610
+msgid "DEBUG configuration bit is on. Are you sure you want to continue programming the chip?"
+msgstr "Le bit de configuration DEBUG est activé. Êtes vous sûr de vouloir continuer la programmation du circuit ?"
+
+#: devices/base/generic_device.cpp:61
+msgid "DFN"
+msgstr "DFN"
+
+#: devices/base/generic_device.cpp:56
+msgid "DFN-S"
+msgstr "DFN-S"
+
+#: devices/pic/base/pic.cpp:30
+msgid "Data EEPROM"
+msgstr "EEPROM de données"
+
+#: progs/direct/base/direct.cpp:36
+msgid "Data In"
+msgstr "Data In"
+
+#: progs/direct/base/direct.cpp:33
+msgid "Data Out"
+msgstr "Data Out"
+
+#: progs/direct/base/direct.cpp:39
+msgid "Data R/W"
+msgstr "Data R/W"
+
+#: devices/pic/base/pic_config.cpp:21
+msgid "Data code-protection"
+msgstr "Protection du code de la section donnée"
+
+#: devices/pic/base/pic_config.cpp:26
+msgid "Data write-protection"
+msgstr "Protection en écriture de la section donnée"
+
+#: tools/list/device_info.cpp:33
+msgid "Datasheet"
+msgstr "Fiche technique"
+
+#: progs/icd2/gui/icd2_group_ui.cpp:29
+msgid "Debug Executive"
+msgstr "Exécutif de débogage"
+
+#: coff/base/coff_object.cpp:125
+msgid "Debug Symbol"
+msgstr "Symbole de débogage"
+
+#: devices/pic/base/pic.cpp:31
+msgid "Debug Vector"
+msgstr "Vecteur de débogage"
+
+#. i18n: file ./data/app_data/piklabui.rc line 177
+#: rc.cpp:51
+#, no-c-format
+msgid "Debugger Toolbar"
+msgstr "Barre d'outils du débogueur"
+
+#: progs/gui/debug_config_center.h:21 progs/gui/debug_config_center.h:22
+msgid "Debugging Options"
+msgstr "Options de débogage"
+
+#: piklab-prog/cmdline.cpp:282 piklab-prog/cmdline.cpp:287
+msgid "Debugging is not supported for specified programmer."
+msgstr "Le débogage n'est pas pris en charge par le programmateur spécifié."
+
+#: progs/icd2/base/icd2_debug.cpp:275
+msgid "Debugging test successful"
+msgstr "Test de débogage réussi"
+
+#: common/common/number.cpp:19
+msgid "Decimal"
+msgstr "Décimal"
+
+#: devices/pic/base/pic_config.cpp:126
+msgid "Dedicated in-circuit port"
+msgstr "Port dédié « in-circuit »"
+
+#: devices/pic/base/pic_config.cpp:211
+msgid "Default system clock select"
+msgstr "Sélection de l'horloge système par défaut"
+
+#: libgui/project_editor.cpp:36
+msgid "Description:"
+msgstr "Description :"
+
+#: piklab-hex/main.cpp:102 piklab-coff/main.cpp:73
+msgid "Destination file already exists."
+msgstr "Le fichier de sortie existe déjà."
+
+#: devices/pic/gui/pic_config_word_editor.cpp:116
+msgid "Details..."
+msgstr "Détails..."
+
+#: tools/gui/toolchain_config_widget.cpp:190
+msgid "Detected (%1)"
+msgstr "Détecté (%1)"
+
+#: progs/icd2/base/icd2_debug_specific.cpp:241
+msgid "Detected custom ICD2"
+msgstr "Un ICD2 maison a été détecté"
+
+#: piklab-prog/cmdline.cpp:127
+msgid "Detected ports supported by \"%1\":"
+msgstr "Ports détectés pris en charge par « %1 » :"
+
+#: piklab-prog/cmdline.cpp:128
+msgid "Detected ports:"
+msgstr "Ports détectés :"
+
+#: tools/gui/toolchain_config_widget.cpp:235
+msgid "Detecting \"%1\"..."
+msgstr "Détection de « %1 »..."
+
+#: tools/gui/toolchain_config_widget.cpp:251
+msgid "Detecting ..."
+msgstr "Détection..."
+
+#: libgui/editor_manager.cpp:478 libgui/device_gui.cpp:175
+#: libgui/project_manager_ui.cpp:33
+msgid "Device"
+msgstr "Circuit"
+
+#: devices/pic/base/pic.cpp:28 coff/base/coff_object.cpp:327
+msgid "Device ID"
+msgstr "Identifiant circuit"
+
+#: tools/list/device_info.cpp:21
+msgid "Device Page"
+msgstr "Page du circuit"
+
+#: libgui/toplevel.cpp:258
+msgid "Device Power"
+msgstr "Puissance du circuit"
+
+#: tools/gui/toolchain_config_widget.cpp:89
+msgid "Device detection:"
+msgstr "Détection du circuit :"
+
+#: libgui/device_editor.cpp:66
+msgid "Device guessed from file: %1"
+msgstr "Circuit déduit du fichier : %1"
+
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:159
+msgid "Device memory does not match hex file (at address 0x%2: reading 0x%3 and expecting 0x%4)."
+msgstr "La mémoire du circuit ne correspond pas au fichier hexadécimal (à l'adresse 0x%2 : 0x%3 lu et 0x%4 attendu)."
+
+#: devices/pic/prog/pic_prog_specific.cpp:104
+msgid "Device memory does not match hex file (in %1 at address %2: reading %3 and expecting %4)."
+msgstr "La mémoire du circuit ne correspond pas au fichier hexadécimal (dans %1 à l'adresse %2 : %3 lu et %4 attendu)."
+
+#: progs/icd2/base/icd2_debug.cpp:253
+msgid "Device memory doesn't match debug executive (at address %1: reading %2 and expecting %3)."
+msgstr "La mémoire du circuit ne correspond pas à l'exécutif de débogage (à l'adresse %1 : %2 lu et %3 attendu)."
+
+#: devices/mem24/prog/mem24_prog.cpp:42
+msgid "Device memory doesn't match hex file (at address %1: reading %2 and expecting %3)."
+msgstr "La mémoire du circuit ne correspond pas au fichier hexadécimal (à l'adresse %1 : %2 lu et %3 attendu)."
+
+#: devices/mem24/prog/mem24_prog.cpp:40
+msgid "Device memory is not blank (at address %1: reading %2 and expecting %3)."
+msgstr "La mémoire du circuit n'est pas vierge (à l'adresse %1 ; %2 lu et %3 attendu)."
+
+#: devices/pic/prog/pic_prog_specific.cpp:101
+msgid "Device memory is not blank (in %1 at address %2: reading %3 and expecting %4)."
+msgstr "La mémoire du circuit n'est pas vierge (dans %1 à l'adresse %2 : %3 lu et %4 attendu)."
+
+#: devices/pic/prog/pic_prog.cpp:253
+msgid "Device not autodetectable: continuing with the specified device name \"%1\"..."
+msgstr "Le circuit n'est pas auto-détectable : on continue avec le circuit « %1 »..."
+
+#: devices/pic/prog/pic_prog.cpp:126
+msgid "Device not in programming"
+msgstr "Le circuit n'est pas en programmation"
+
+#: piklab-hex/main.cpp:104 piklab-prog/cmdline.cpp:157 piklab-coff/main.cpp:75
+msgid "Device not specified."
+msgstr "Le circuit n'a pas été spécifié."
+
+#: libgui/config_gen.cpp:132
+msgid "Device not supported by the selected toolchain."
+msgstr "Le circuit n'est pas pris en charge par la chaîne d'outils sélectionnée."
+
+#: libgui/config_gen.cpp:32 libgui/config_center.cpp:66
+#: libgui/project_editor.cpp:46 libgui/project_wizard.cpp:129
+#: coff/base/text_coff.cpp:254
+msgid "Device:"
+msgstr "Circuit :"
+
+#: devices/pic/base/pic_config.cpp:104
+msgid "Digital"
+msgstr "Numérique"
+
+#: devices/pic/base/pic_config.cpp:263
+msgid "Digital I/O"
+msgstr "E/S numérique"
+
+#: coff/base/coff_object.cpp:52
+msgid "Direct"
+msgstr ""
+
+#: progs/direct/base/direct_prog.h:59
+msgid "Direct Programmer"
+msgstr "Programmateur direct"
+
+#: common/global/about.cpp:87
+msgid "Direct programming for 16F676/630."
+msgstr "Programmation directe pour les 16F676/630."
+
+#: common/global/about.cpp:89
+msgid "Direct programming for 16F73/74/76/77."
+msgstr "Programmation directe pour les 16F73/74/76/77."
+
+#: common/global/about.cpp:93
+msgid "Direct programming for 24C EEPROM is inspired from his program \"prog84\"."
+msgstr "La programmation directe pour les mémoires EEPROM 24C est inspirée de son programme « prog84 »."
+
+#: common/global/about.cpp:86
+msgid "Direct programming for PIC18F devices."
+msgstr "Programmation directe pour les circuits PIC18F."
+
+#: common/global/about.cpp:92
+msgid "Direct programming for dsPICs is inspired from his program \"dspicprg\"."
+msgstr "La programmation directe des dsPICs est inspirée de son programme « dspicprg »."
+
+#: libgui/project_wizard.cpp:181
+msgid "Directory does not exists. Create it?"
+msgstr "Le répertoire n'existe pas. Le créer ?"
+
+#: libgui/project_wizard.cpp:176
+msgid "Directory is empty."
+msgstr "Le répertoire est vide."
+
+#: libgui/project_wizard.cpp:125
+msgid "Directory:"
+msgstr "Répertoire :"
+
+#: libgui/breakpoint_view.cpp:27
+msgid "Disable breakpoint"
+msgstr "Désactiver un point d'arrêt"
+
+#: devices/pic/base/pic_config.cpp:91 devices/pic/base/pic_config.cpp:191
+#: devices/pic/base/pic_config.cpp:215 devices/pic/base/pic_config.cpp:394
+#: devices/pic/base/pic_config.cpp:398
+msgid "Disabled"
+msgstr "Désactivé"
+
+#: devices/pic/base/pic_config.cpp:36
+msgid "Disabled (connected to Vdd)"
+msgstr "Désactivé (connecté à Vdd)"
+
+#: progs/icd2/base/icd2_debug.cpp:215
+msgid "Disabling code program protection for debugging"
+msgstr "Désactivation de la protection du programme code pour le débogage"
+
+#: progs/icd2/base/icd2_debug.cpp:223
+msgid "Disabling code read protection for debugging"
+msgstr "Désactivation de la protection en lecture du code pour le débogage"
+
+#: progs/icd2/base/icd2_debug.cpp:219
+msgid "Disabling code write protection for debugging"
+msgstr "Désactivation de la protection en écriture du code pour le débogage"
+
+#: progs/icd2/base/icd2_debug.cpp:211
+msgid "Disabling watchdog timer for debugging"
+msgstr "Désactivation du temporisateur chien de garde pour le débogage"
+
+#: libgui/object_view.cpp:139
+msgid "Disassembling content of hex file editor."
+msgstr "Désassemblage du contenu de l'éditeur de fichiers hexadécimaux."
+
+#: libgui/object_view.cpp:126
+msgid "Disassembling hex file: %1"
+msgstr "Désassemblage du fichier hexadécimal : %1"
+
+#: libgui/project_manager.cpp:380
+msgid "Disassembly"
+msgstr "Désassemblage"
+
+#: libgui/project_manager_ui.cpp:98
+msgid "Disassembly Listing"
+msgstr "Listing de désassemblage"
+
+#: libgui/object_view.cpp:120
+msgid "Disassembly not supported for the selected device."
+msgstr "Le désassemblage n'est pas pris en charge pour le circuit sélectionné."
+
+#: libgui/object_view.cpp:115
+msgid "Disassembly not supported for the selected toolchain."
+msgstr "Le désassemblage n'est pas pris en charge pour la chaîne d'outils sélectionnée."
+
+#: piklab-prog/cli_interactive.cpp:42
+msgid "Disconnect programmer."
+msgstr "Déconnecter le programmateur."
+
+#: progs/manager/prog_manager.cpp:150
+msgid "Disconnecting..."
+msgstr "Déconnexion..."
+
+#: common/cli/cli_main.cpp:55
+msgid "Display all debug messages."
+msgstr "Afficher tous les messages de débogage."
+
+#: common/cli/cli_main.cpp:53
+msgid "Display debug messages."
+msgstr "Afficher les messages de débogage."
+
+#: common/cli/cli_main.cpp:54
+msgid "Display extra debug messages."
+msgstr "Afficher les messages de débogage supplémentaires."
+
+#: piklab-prog/cli_interactive.cpp:37
+msgid "Display help."
+msgstr "Afficher l'aide."
+
+#: common/cli/cli_main.cpp:56
+msgid "Display low level debug messages."
+msgstr "Afficher tous les messages de débogage."
+
+#: piklab-prog/cli_interactive.cpp:33
+msgid "Display the list of available properties."
+msgstr "Afficher la liste des propriétés disponibles."
+
+#: piklab-prog/cli_interactive.cpp:36
+msgid "Display the list of memory ranges."
+msgstr "Afficher la liste des gammes de mémoire."
+
+#: piklab-prog/cli_interactive.cpp:34
+msgid "Display the list of registers."
+msgstr "Afficher la liste des registres."
+
+#: piklab-prog/cli_interactive.cpp:35
+msgid "Display the list of variables."
+msgstr "Afficher la liste des variables."
+
+#: libgui/likeback.cpp:136
+msgid "Do not Help Anymore"
+msgstr "Ne plus aider"
+
+#: libgui/project_wizard.cpp:152
+msgid "Do not add files now."
+msgstr "Ne pas ajouter de fichier maintenant."
+
+#: libgui/likeback.cpp:603
+msgid "Do not ask for features: your wishes will be ignored."
+msgstr "Ne demandez pas de nouvelles fonctionnalités : vos souhaits seront ignorés."
+
+#: common/cli/cli_main.cpp:57
+msgid "Do not display messages."
+msgstr "Ne pas afficher les messages de débogage."
+
+#: progs/gui/hardware_config_widget.cpp:200
+msgid "Do you want to delete custom hardware \"%1\"?"
+msgstr "Voulez-vous effacer le matériel personnalisé « %1 » ?"
+
+#: devices/pic/prog/pic_prog.cpp:678
+msgid "Do you want to overwrite the device calibration with %1?"
+msgstr "Voulez-vous écraser la calibration du circuit avec %1 ?"
+
+#: progs/gui/hardware_config_widget.cpp:76
+msgid "Do you want to overwrite this custom hardware \"%1\"?"
+msgstr "Voulez-vous écraser ce matériel personnalisé « %1 » ?"
+
+#: tools/list/device_info.cpp:35
+msgid "Documents"
+msgstr "Documents"
+
+#: coff/base/coff_object.cpp:165
+msgid "Double"
+msgstr ""
+
+#: coff/base/coff_object.cpp:148
+msgid "Dummy Entry (end of block)"
+msgstr ""
+
+#: coff/base/coff_object.cpp:154
+msgid "Duplicate Tag"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:78
+msgid "ECAN"
+msgstr "ECAN"
+
+#: devices/pic/base/pic_config.cpp:130
+msgid "ECCP mux"
+msgstr "Multiplexeur ECCP"
+
+#: devices/mem24/gui/mem24_memory_editor.cpp:41
+msgid "EEPROM Memory"
+msgstr "Mémoire EEPROM"
+
+#: progs/direct/base/direct_mem24.cpp:54
+msgid "EEPROM detected"
+msgstr "Mémoire EEPROM détectée"
+
+#: progs/direct/base/direct_prog_config.cpp:72
+msgid "EL Cheapo classic"
+msgstr "EL Cheapo classique"
+
+#: tools/base/generic_tool.cpp:39
+msgid "ELF"
+msgstr "ELF"
+
+#: progs/direct/base/direct_prog_config.cpp:76
+msgid "EPE Toolkit mk3"
+msgstr "EPE Toolkit mk3"
+
+#: progs/direct/base/direct_prog_config.cpp:38
+msgid "EPIC+"
+msgstr "EPIC+"
+
+#: devices/base/generic_device.cpp:27
+msgid "EPROM (OTP)"
+msgstr "EPROM (OTP)"
+
+#: progs/direct/base/direct_prog_config.cpp:80
+msgid "ETT High Vpp"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:82
+msgid "ETT Low Vpp"
+msgstr ""
+
+#: libgui/likeback.cpp:176
+msgid "Each time you have a great or frustrating experience, please click the appropriate hand below the window title-bar, briefly describe what you like or dislike and click Send."
+msgstr "Chaque fois que vous avez une merveilleuse ou frustrante expérience, veuillez cliquer sur la main appropriée située sous la barre de titre de la fenêtre. Décrivez brièvement ce que vous avez aimé ou pas aimé et cliquez sur Envoi."
+
+#: progs/gui/hardware_config_widget.cpp:36
+msgid "Edit and test hardware"
+msgstr "Éditer et tester le matériel"
+
+#: progs/gui/hardware_config_widget.cpp:159
+msgid "Edit/Test..."
+msgstr "Éditer/Tester..."
+
+#: common/common/purl_base.cpp:50
+msgid "Elf File"
+msgstr "Fichier ELF"
+
+#: libgui/breakpoint_view.cpp:27
+msgid "Enable breakpoint"
+msgstr "Activer un point d'arrêt"
+
+#: devices/pic/base/pic_config.cpp:397
+msgid "Enabled"
+msgstr "Activé"
+
+#: devices/pic/base/pic_config.cpp:77
+msgid "Enabled in run - Disabled in sleep"
+msgstr "Activé pendant l'exécution - désactivé pendant le sommeil"
+
+#: devices/base/generic_device.cpp:20
+msgid "End Of Life"
+msgstr "En fin de vie"
+
+#: coff/base/coff_object.cpp:151
+msgid "End of Structure"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:104
+msgid "End of all code sections"
+msgstr "Fin de toutes les sections de code"
+
+#: piklab-prog/cli_interactive.cpp:346
+msgid "End of command file reached."
+msgstr "La fin du fichier de commandes a été atteinte."
+
+#: common/nokde/nokde_kcmdlineargs.cpp:861
+msgid "End of options"
+msgstr "Fin des options"
+
+#: piklab-hex/main.cpp:141
+msgid "End:"
+msgstr "Fin :"
+
+#: coff/base/coff_object.cpp:168
+msgid "Enumeration"
+msgstr ""
+
+#: coff/base/coff_object.cpp:143
+msgid "Enumeration Tag"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:47
+msgid "Erase device memory."
+msgstr "Effacer la mémoire du circuit."
+
+#: progs/psp/base/psp.cpp:342
+msgid "Erase failed"
+msgstr "L'effacement a échoué"
+
+#: progs/icd1/base/icd1.cpp:155
+msgid "Erase failed (returned value is %1)"
+msgstr "L'effacement a échoué (la valeur renvoyée est %1)"
+
+#: piklab-prog/cmdline.cpp:311
+msgid "Erasing device memory not supported for specified programmer."
+msgstr "L'effacement de la mémoire programme n'est pas pris en charge par le programmateur spécifié."
+
+#: progs/base/generic_prog.cpp:284
+msgid "Erasing done"
+msgstr "Effacement effectué"
+
+#: progs/base/generic_prog.cpp:35 progs/base/generic_prog.cpp:282
+msgid "Erasing..."
+msgstr "Effacement..."
+
+#: common/port/serial.cpp:300
+msgid "Error checking for data in output buffer"
+msgstr "Erreur lors de la vérification de données dans le tampon de sortie"
+
+#: common/port/serial.cpp:475
+msgid "Error clearing up break"
+msgstr "Erreur lors de l'enlèvement de l'interruption"
+
+#: libgui/project_wizard.cpp:183
+msgid "Error creating directory."
+msgstr "Erreur de création du répertoire."
+
+#: libgui/project_wizard.cpp:246
+msgid "Error creating template file."
+msgstr "Erreur lors de la création du fichier modèle."
+
+#: common/port/usb_port.cpp:217 common/port/usb_port.cpp:231
+msgid "Error opening USB device."
+msgstr "Erreur lors de l'ouverture du périphérique USB."
+
+#: common/global/xml_data_file.cpp:29
+msgid "Error opening file: %1"
+msgstr "Erreur lors de l'ouverture du fichier : %1"
+
+#: libgui/object_view.cpp:87
+msgid "Error parsing library:\n"
+msgstr ""
+
+#: libgui/object_view.cpp:70
+msgid "Error parsing object:\n"
+msgstr ""
+
+#: progs/direct/base/direct_16.cpp:108
+msgid "Error programming %1 at %2."
+msgstr "Erreur de programmation de %1 à %2."
+
+#: common/port/parallel.cpp:231
+msgid "Error reading bit on pin %1"
+msgstr "Erreur de lecture du bit sur la broche %1"
+
+#: progs/gpsim/base/gpsim_debug.cpp:238 progs/sdcdb/base/sdcdb_debug.cpp:237
+msgid "Error reading driven state of IO bit: %1"
+msgstr "Erreur lors de la lecture de l'état de pilotage du bit d'E/S : %1"
+
+#: progs/gpsim/base/gpsim_debug.cpp:225 progs/gpsim/base/gpsim_debug.cpp:231
+#: progs/sdcdb/base/sdcdb_debug.cpp:224 progs/sdcdb/base/sdcdb_debug.cpp:230
+msgid "Error reading driving state of IO bit: %1"
+msgstr "Erreur lors de la lecture de l'état maintenu par le bit d'E/S : %1"
+
+#: progs/gpsim/base/gpsim_debug.cpp:107 progs/gpsim/base/gpsim_debug.cpp:129
+#: progs/sdcdb/base/sdcdb_debug.cpp:128
+msgid "Error reading register \"%1\""
+msgstr "Erreur de lecture du registre « %1 »"
+
+#: progs/sdcdb/base/sdcdb_debug.cpp:106
+msgid "Error reading register \"W\""
+msgstr "Erreur de lecture du registre « W »"
+
+#: common/port/serial.cpp:409
+msgid "Error reading serial pin %1"
+msgstr "Erreur de lecture sur la broche série %1"
+
+#: progs/gpsim/base/gpsim_debug.cpp:207 progs/sdcdb/base/sdcdb_debug.cpp:206
+msgid "Error reading state of IO bit: %1"
+msgstr "Erreur de lecture du bit d'E/S : %1"
+
+#: common/port/serial.cpp:261 common/port/serial.cpp:274
+msgid "Error receiving data"
+msgstr "Erreur lors de la réception de données"
+
+#: common/port/usb_port.cpp:393
+msgid "Error receiving data (ep=%1 res=%2)"
+msgstr "Erreur lors de la réception de données (ep=%1 res=%2)"
+
+#: common/port/usb_port.cpp:224
+msgid "Error resetting USB device."
+msgstr "Erreur lors de la réinitialisation du périphérique USB."
+
+#: common/global/xml_data_file.cpp:51
+msgid "Error saving file: %1"
+msgstr "Erreur lors de l'enregistrement du fichier : %1"
+
+#: progs/gpsim/base/gpsim.cpp:94
+msgid "Error send a signal to the subprocess."
+msgstr "Erreur lors de l'envoi d'un signal au sous-processus."
+
+#: common/port/usb_port.cpp:294
+msgid "Error sending control message to USB port."
+msgstr "Erreur lors de l'envoi du message de contrôle sur le port USB."
+
+#: common/port/serial.cpp:229
+msgid "Error sending data"
+msgstr "Erreur lors de l'envoi de données"
+
+#: common/port/usb_port.cpp:359
+msgid "Error sending data (ep=%1 res=%2)"
+msgstr "Erreur lors de l'envoi de données (ep=%1 res=%2)"
+
+#: common/port/usb_port.cpp:246
+msgid "Error setting USB configuration %1."
+msgstr "Erreur lors de la configuration USB de %1."
+
+#: common/port/serial.cpp:367
+msgid "Error setting bit %1 of serial port to %2"
+msgstr "Erreur lors du positionnement à %2 du bit %1 du port série"
+
+#: common/port/parallel.cpp:211
+msgid "Error setting pin %1 to %2"
+msgstr "Erreur lors de la mise à %2 de la broche %1"
+
+#: common/port/serial.cpp:466
+msgid "Error setting up break"
+msgstr "Erreur lors de la mise en place de l'interruption"
+
+#: progs/gui/prog_group_ui.cpp:148
+msgid "Error uploading firmware."
+msgstr "Erreur lors du chargement du micrologiciel."
+
+#: common/port/serial.cpp:311
+msgid "Error while draining"
+msgstr "Erreur lors du transvidage"
+
+#: piklab-prog/cmdline.cpp:306 libgui/hex_editor.cpp:150
+msgid "Error while writing file \"%1\"."
+msgstr "Erreure lors de l'écriture du fichier « %1 »."
+
+#: libgui/hex_editor.cpp:133
+msgid "Error(s) reading hex file."
+msgstr "Erreur(s) lors de la lecture du fichier hexadécimal."
+
+#: tools/gputils/gputils_config.cpp:13 tools/c18/c18_config.cpp:12
+msgid "Errors only"
+msgstr "Erreurs seulement"
+
+#: devices/pic/base/pic.cpp:79
+msgid "Ethernet"
+msgstr "Ethernet"
+
+#: devices/pic/base/pic_config.cpp:210
+msgid "Ethernet LED enable"
+msgstr "Activer la DEL Ethernet"
+
+#: devices/pic/base/pic_config.cpp:110
+msgid "Even PWM output polarity"
+msgstr "Polarité de sortie du PWM pair"
+
+#: tools/base/generic_tool.cpp:43
+msgid "Executable"
+msgstr "Exécutable"
+
+#: tools/gui/toolchain_config_widget.cpp:52
+msgid "Executable Type:"
+msgstr "Type d'exécutable :"
+
+#: tools/base/generic_tool.cpp:30
+msgid "Executable directory"
+msgstr "Répertoire des exécutables"
+
+#: tools/list/compile_manager.cpp:290
+msgid "Executing custom commands..."
+msgstr ""
+
+#: devices/base/generic_device.cpp:35
+msgid "Extended"
+msgstr "Étendu"
+
+#: devices/pic/base/pic_config.cpp:124
+msgid "Extended instruction set"
+msgstr "Jeu d'instruction étendu"
+
+#: devices/pic/base/pic_config.cpp:93
+msgid "Extended microcontroller"
+msgstr "Microcontrôleur étendu"
+
+#: devices/pic/base/pic_config.cpp:35
+msgid "External"
+msgstr "Externe"
+
+#: coff/base/coff_object.cpp:133
+msgid "External Definition"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:53
+msgid "External RAM"
+msgstr "RAM externe"
+
+#: coff/base/cdb_parser.cpp:27
+msgid "External RAM Pointer"
+msgstr "Pointeur de RAM externe"
+
+#: devices/pic/base/pic_config.cpp:40
+msgid "External RC oscillator"
+msgstr "Oscillateur externe RC"
+
+#: devices/pic/base/pic_config.cpp:42 devices/pic/base/pic_config.cpp:159
+#: devices/pic/base/pic_config.cpp:185
+msgid "External RC oscillator (no CLKOUT)"
+msgstr "Oscillateur externe RC (sans CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:41 devices/pic/base/pic_config.cpp:158
+#: devices/pic/base/pic_config.cpp:184
+msgid "External RC oscillator with CLKOUT"
+msgstr "Oscillateur externe RC avec CLKOUT"
+
+#: coff/base/cdb_parser.cpp:48
+msgid "External Stack"
+msgstr "Pile externe"
+
+#: coff/base/coff_object.cpp:130
+msgid "External Symbol"
+msgstr "Symbole externe"
+
+#: devices/pic/base/pic_config.cpp:219
+msgid "External address bus shift"
+msgstr "Décalage d'adresse pour le bus externe"
+
+#: devices/pic/base/pic_config.cpp:128
+msgid "External bus data wait"
+msgstr "Durée d'attente pour le bus de données externe"
+
+#: devices/pic/base/pic_config.cpp:102
+msgid "External bus data width (in bits)"
+msgstr "Largeur du bus de données externe (en bits)"
+
+#: devices/pic/base/pic_config.cpp:49 devices/pic/base/pic_config.cpp:260
+msgid "External clock"
+msgstr "Horloge externe"
+
+#: devices/pic/base/pic_config.cpp:51 devices/pic/base/pic_config.cpp:153
+#: devices/pic/base/pic_config.cpp:174
+msgid "External clock (no CLKOUT)"
+msgstr "Horloge externe (sans CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:53
+msgid "External clock (no CLKOUT), PLL enabled"
+msgstr "Horloge externe (sans CLKOUT), PLL activée"
+
+#: devices/pic/base/pic_config.cpp:156 devices/pic/base/pic_config.cpp:177
+msgid "External clock with 16x PLL"
+msgstr "Horloge externe avec PLL x16"
+
+#: devices/pic/base/pic_config.cpp:154 devices/pic/base/pic_config.cpp:175
+msgid "External clock with 4x PLL"
+msgstr "Horloge externe avec PLL x4"
+
+#: devices/pic/base/pic_config.cpp:55
+msgid "External clock with 4x PLL (no CLKOUT)"
+msgstr "Horloge externe avec PLL x4 (sans CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:54
+msgid "External clock with 4x PLL and with CLKOUT"
+msgstr "Horloge externe avec PLL x4 et avec CLKOUT"
+
+#: devices/pic/base/pic_config.cpp:155 devices/pic/base/pic_config.cpp:176
+msgid "External clock with 8x PLL"
+msgstr "Horloge externe avec PLL x8"
+
+#: devices/pic/base/pic_config.cpp:50 devices/pic/base/pic_config.cpp:152
+#: devices/pic/base/pic_config.cpp:173
+msgid "External clock with CLKOUT"
+msgstr "Horloge externe avec CLKOUT"
+
+#: devices/pic/base/pic_config.cpp:52
+msgid "External clock with CLKOUT, PLL enabled"
+msgstr "Horloge externe avec CLKOUT, PLL activée"
+
+#: devices/pic/base/pic_config.cpp:56
+msgid "External clock with software controlled 4x PLL (no CLKOUT)"
+msgstr "Horloge externe avec PLL x4 contrôlée logiciellement (sans CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:214
+msgid "External memory bus"
+msgstr "Bus mémoire externe"
+
+#: devices/pic/base/pic_config.cpp:57
+msgid "External resistor"
+msgstr "Résistance externe"
+
+#: devices/pic/base/pic_config.cpp:59
+msgid "External resistor (no CLKOUT)"
+msgstr "Résistance externe (sans CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:58
+msgid "External resistor with CLKOUT"
+msgstr "Résistance externe avec CLKOUT"
+
+#: common/global/log.cpp:27
+msgid "Extra debug messages"
+msgstr "Messages de débogage supplémentaires"
+
+#: devices/base/device_group.cpp:295
+msgid "F (MHz)"
+msgstr "F (MHz)"
+
+#: devices/pic/base/pic_config.cpp:120
+msgid "FLTA mux"
+msgstr "Multiplexeur FLTA"
+
+#: devices/pic/base/pic_config.cpp:212
+msgid "FOSC1:FOSC0"
+msgstr "FOSC1:FOSC0"
+
+#: progs/base/generic_prog.cpp:27
+msgid "Fail"
+msgstr "Échec"
+
+#: devices/pic/base/pic_config.cpp:79
+msgid "Fail-safe clock monitor"
+msgstr "Surveillant de l'horloge de sécurité positive"
+
+#: tools/gui/toolchain_config_widget.cpp:250
+msgid "Failed"
+msgstr "Échoué"
+
+#: libgui/project_manager.cpp:503
+msgid "Failed to create new project file"
+msgstr "Impossible de créer le fichier du nouveau projet."
+
+#: tools/list/compile_manager.cpp:223
+msgid "Failed to execute command: check toolchain configuration."
+msgstr "Échec de l'exécution de la commande : veuillez vérifier la configuration de la chaîne d'outils."
+
+#: tools/list/compile_manager.cpp:277
+msgid "Failed to execute custom command #%1."
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:39 progs/sdcdb/base/sdcdb_debug.cpp:39
+msgid "Failed to halt target: kill process."
+msgstr "Échec à arrêter la cible : on tue le processus."
+
+#: progs/icd2/base/icd2_debug.cpp:75
+msgid "Failed to halt target: try a reset."
+msgstr "Échec à arrêter la cible : essayez une réinitialisation matérielle."
+
+#: progs/base/generic_debug.cpp:45
+msgid "Failed to initialize device for debugging."
+msgstr "Échec de l'initialisation du circuit pour le débogage."
+
+#: progs/icd1/base/icd1.cpp:34 progs/icd2/base/icd2_serial.cpp:43
+msgid "Failed to set port mode to '%1'."
+msgstr "Échec à configurer le mode du port à « %1 »."
+
+#: progs/psp/base/psp.cpp:227
+msgid "Failed to set range"
+msgstr "Échec à définir l'intervalle"
+
+#: progs/gpsim/base/gpsim.cpp:58
+msgid "Failed to start \"gpsim\"."
+msgstr "Impossible de lancer « gpsim »."
+
+#: progs/icd2/base/icd_prog.cpp:30 progs/pickit2/base/pickit2_prog.cpp:67
+msgid "Failed to upload firmware."
+msgstr "Échec du chargement du micrologiciel."
+
+#: libgui/device_gui.cpp:82
+msgid "Family Tree"
+msgstr "Arborescence de la famille"
+
+#: devices/pic/base/pic_config.cpp:248
+msgid "Fast RC oscillator"
+msgstr "Oscillateur RC rapide"
+
+#: devices/pic/pic/pic_group.cpp:65
+msgid "Features"
+msgstr "Fonctionnalités"
+
+#: common/gui/purl_gui.cpp:43
+msgid "File \"%1\" already exists. Overwrite ?"
+msgstr "Le fichier « %1 » existe déjà. Voulez-vous l'écraser ?"
+
+#: libgui/editor_manager.cpp:109
+msgid "File \"%1\" already loaded. Reload?"
+msgstr "Le fichier « %1 » est déjà chargé. Le recharger ?"
+
+#: libgui/project_manager.cpp:313
+msgid "File \"%1\" is not inside the project directory. Do you want to copy the file to your project directory?"
+msgstr "Le fichier « %1 » n'est pas dans le répertoire du projet. Voulez-vous copier le fichier dans votre répertoire projet ?"
+
+#: libgui/device_editor.cpp:74 libgui/editor.cpp:80
+msgid "File %1 not saved."
+msgstr "Le fichier « %1 » n'est pas enregistré."
+
+#: coff/base/coff_archive.cpp:115
+msgid "File Members:"
+msgstr ""
+
+#: libgui/new_dialogs.cpp:63
+msgid "File Name:"
+msgstr "Nom de fichier :"
+
+#: libgui/hex_editor.cpp:142
+msgid "File URL: \"%1\"."
+msgstr "URL du fichier : « %1 »."
+
+#: coff/base/text_coff.cpp:128
+msgid "File could not be read"
+msgstr "Le fichier n'a pas pu être lu"
+
+#: piklab-hex/main.cpp:202
+msgid "File created."
+msgstr "Fichier créé."
+
+#: libgui/project_manager.cpp:319
+msgid "File is already in the project."
+msgstr "Le fichier est déjà dans le projet."
+
+#: common/global/xml_data_file.cpp:35
+msgid "File is not of correct type."
+msgstr "Le fichier n'est pas d'un type correct."
+
+#: common/global/pfile.cpp:55
+msgid "File not open."
+msgstr "Le fichier n'est pas ouvert."
+
+#: coff/base/coff_archive.cpp:27
+msgid "File size not terminated by 'l' (\"%1\")."
+msgstr ""
+
+#: tools/list/compile_manager.cpp:111 tools/list/compile_manager.cpp:136
+#: common/gui/pfile_ext.cpp:25 common/gui/pfile_ext.cpp:64
+#: common/gui/pfile_ext.cpp:95 common/gui/pfile_ext.cpp:110
+#: common/cli/cli_pfile.cpp:20 common/cli/cli_pfile.cpp:38
+#: libgui/project_manager.cpp:307 libgui/project_manager.cpp:319
+msgid "File: %1"
+msgstr "Fichier : %1"
+
+#: libgui/project_manager.cpp:325 libgui/project_wizard.cpp:246
+msgid "File: %1\n"
+msgstr "Fichier : %1\n"
+
+#: libgui/project_wizard.cpp:82 coff/base/coff_object.cpp:152
+msgid "Filename"
+msgstr "Nom de fichier"
+
+#: piklab-coff/main.cpp:197
+msgid "Files:"
+msgstr "Fichiers :"
+
+#: piklab-hex/main.cpp:50
+msgid "Fill for checksum verification (cf datasheets)."
+msgstr "Remplissage pour la vérification de la somme de contrôle (cf fiche technique)."
+
+#: piklab-hex/main.cpp:39
+msgid "Fill option."
+msgstr "Option de remplissage."
+
+#: piklab-hex/main.cpp:275
+msgid "Fill options:"
+msgstr "Options de remplissage :"
+
+#: piklab-hex/main.cpp:48
+msgid "Fill with blank values (default)."
+msgstr "Remplissage avec des valeurs vierges (comportement par défaut)."
+
+#: piklab-hex/main.cpp:278
+msgid "Fill with the specified numeric value."
+msgstr "Remplissage avec la valeur numérique spécifiée."
+
+#: piklab-hex/main.cpp:49
+msgid "Fill with zeroes."
+msgstr "Remplissage avec des zéros."
+
+#: libgui/device_gui.cpp:110
+msgid "Filters:"
+msgstr "Filtres :"
+
+#: libgui/project_manager.cpp:192
+msgid "Find Files..."
+msgstr "Chercher des fichiers..."
+
+#: progs/gui/prog_group_ui.cpp:64
+msgid "Firmware"
+msgstr "Micrologiciel"
+
+#: progs/base/generic_prog.cpp:126
+msgid "Firmware directory is not configured or does not exist."
+msgstr "Le répertoire du micrologiciel n'est pas configuré ou n'existe pas."
+
+#: progs/icd2/base/icd2_debug.cpp:142
+msgid "Firmware directory not configured."
+msgstr "Le répertoire du micrologiciel n'est pas configuré."
+
+#: piklab-prog/cli_interactive.cpp:58
+msgid "Firmware directory."
+msgstr "Répertoire du micrologiciel."
+
+#: progs/gui/prog_config_widget.cpp:26
+msgid "Firmware directory:"
+msgstr "Répertoire du micrologiciel :"
+
+#: progs/icd2/base/icd_prog.cpp:26
+msgid "Firmware hex file seems incompatible with device 16F876 inside ICD."
+msgstr "Le fichier hexadécimal du micrologiciel semble incompatible avec le circuit 16F876 situé dans l'ICD."
+
+#: progs/pickit2/base/pickit2_prog.cpp:60
+msgid "Firmware hex file seems incompatible with device 18F2550 inside PICkit2."
+msgstr "Le fichier hexadécimal du micrologiciel semble incompatible avec le circuit 18F2550 situé dans le PICkit2."
+
+#: progs/pickit2/base/pickit2.cpp:52
+msgid "Firmware memory does not match hex file (at address 0x%2: reading 0x%3 and expecting 0x%4)."
+msgstr "La mémoire du micrologiciel ne correspond pas au fichier hexadécimal (à l'adresse 0x%2 : 0x%3 lu et 0x%4 attendu)."
+
+#: progs/icd2/base/icd2_prog.cpp:108
+msgid "Firmware still incorrect after uploading."
+msgstr "Le micrologiciel est toujours incorrect après le chargement."
+
+#: progs/pickit2/base/pickit2_prog.cpp:70
+msgid "Firmware succesfully uploaded."
+msgstr "Le micrologiciel a été correctement chargé."
+
+#: progs/gui/prog_group_ui.cpp:147
+msgid "Firmware uploaded successfully."
+msgstr "Le micrologiciel a été correctement chargé."
+
+#: progs/base/generic_prog.cpp:136
+msgid "Firmware version is %1"
+msgstr "La version du micrologiciel est %1"
+
+#: piklab-hex/main.cpp:82
+msgid "First hex file: "
+msgstr "Premier fichier hexadécimal :"
+
+#: devices/base/generic_device.cpp:26
+msgid "Flash"
+msgstr "Flash"
+
+#: libgui/device_gui.cpp:83
+msgid "Flat List"
+msgstr "Liste à plat"
+
+#: coff/base/cdb_parser.cpp:36 coff/base/coff_object.cpp:164
+msgid "Float"
+msgstr "Float"
+
+#: devices/gui/memory_editor.cpp:277
+msgid "For checksum check"
+msgstr "Pour vérifier la somme de contrôle"
+
+#: libgui/watch_view.cpp:99 libgui/watch_view.cpp:101
+msgid "Format"
+msgstr "Format"
+
+#: piklab-hex/main.cpp:123 coff/base/text_coff.cpp:252
+msgid "Format:"
+msgstr "Format :"
+
+#: libgui/toplevel.cpp:204
+msgid "Forward"
+msgstr "Suivant"
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:36
+msgid "Found version \"%1\""
+msgstr "Version « %1 » trouvée"
+
+#: devices/pic/base/pic_config.cpp:276
+msgid "Frequency range selection for FRC oscillator"
+msgstr "Sélection de l'intervalle de fréquence pour oscillateur FRC"
+
+#: coff/base/cdb_parser.cpp:24 coff/base/coff_object.cpp:179
+msgid "Function"
+msgstr "Fonction"
+
+#: coff/base/coff_object.cpp:137
+msgid "Function Argument"
+msgstr "Argument de fonction"
+
+#: coff/base/cdb_parser.cpp:59
+msgid "Function or Undefined Space"
+msgstr "Fonction ou espace non défini"
+
+#: devices/base/generic_device.cpp:18
+msgid "Future Product"
+msgstr "Produit futur"
+
+#: devices/pic/gui/pic_group_ui.cpp:54
+msgid "GPRs"
+msgstr "GPRs"
+
+#: progs/gpsim/base/gpsim_debug.h:76
+msgid "GPSim"
+msgstr "GPSim"
+
+#: progs/gpsim/base/gpsim_debug.cpp:251 progs/sdcdb/base/sdcdb_debug.cpp:250
+msgid "GPSim (4MHz)"
+msgstr "GPSim (4MHz)"
+
+#: tools/gputils/gputils.h:33
+msgid "GPUtils"
+msgstr "GPUtils"
+
+#: libgui/config_center.h:34 libgui/project_editor.cpp:30
+msgid "General"
+msgstr "Général"
+
+#: libgui/config_center.h:35
+msgid "General Configuration"
+msgstr "Configuration générale"
+
+#: piklab-prog/cli_interactive.cpp:251
+msgid "General Purpose Registers:"
+msgstr "Registres à usage général (GPR) :"
+
+#: devices/pic/base/pic_protection.cpp:358
+msgid "General Segment"
+msgstr "Segment général"
+
+#: devices/pic/base/pic_config.cpp:192
+msgid "General code segment read-protection"
+msgstr "Protection en lecture du segment exécutable général"
+
+#: devices/pic/base/pic_config.cpp:193
+msgid "General code segment write-protection"
+msgstr "Protection en écriture du segment exécutable général"
+
+#: devices/pic/base/pic_config.cpp:243
+msgid "General segment security"
+msgstr "Sécurité du segment général"
+
+#: devices/pic/base/pic_config.cpp:242
+msgid "General segment write-protection"
+msgstr "Protection en écriture du segment général"
+
+#: libgui/project_manager_ui.cpp:35
+msgid "Generated"
+msgstr "Généré"
+
+#: libgui/config_gen.cpp:112
+msgid "Generation is not supported yet for the selected toolchain or device."
+msgstr "La génération n'est pas gérée pour la chaîne d'outils ou le circuit sélectionné."
+
+#: libgui/config_gen.cpp:126
+msgid "Generation is only partially supported for this device."
+msgstr "La génération n'est que partiellement gérée pour ce circuit."
+
+#: coff/base/cdb_parser.cpp:25
+msgid "Generic Pointer"
+msgstr "Pointeur génériques"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:841
+msgid "Generic options"
+msgstr "Options génériques"
+
+#: piklab-prog/cli_interactive.cpp:41
+msgid "Get property value: \"get <property>\" or \"<property>\"."
+msgstr "Obtenir la valeur d'une propriété : « get <propriété> » ou « <propriété> »."
+
+#: coff/base/cdb_parser.cpp:16
+msgid "Global"
+msgstr "Global"
+
+#: tools/pic30/pic30_generator.cpp:45
+msgid "Global declarations"
+msgstr "Déclarations globales"
+
+#: devices/pic/gui/pic_memory_editor.cpp:44
+msgid "Go to end"
+msgstr "Aller à la fin"
+
+#: devices/pic/gui/pic_memory_editor.cpp:41
+msgid "Go to start"
+msgstr "Aller au début"
+
+#: piklab/main.cpp:21
+msgid "Graphical development environment for applications based on PIC and dsPIC microcontrollers."
+msgstr "Environnement de développement pour les applications à base de microcontrôleurs PIC et dsPIC."
+
+#: progs/direct/base/direct_prog_config.cpp:51
+msgid "HOODMICRO"
+msgstr "HOODMICRO"
+
+#: devices/pic/base/pic_config.cpp:258
+msgid "HS crystal oscillator"
+msgstr "Oscillateur à quartz HS"
+
+#: devices/pic/base/pic_config.cpp:169
+msgid "HS/2 Crystal with 16x PLL"
+msgstr "Quartz HS/2 avec PLL x16"
+
+#: devices/pic/base/pic_config.cpp:167
+msgid "HS/2 Crystal with 4x PLL"
+msgstr "Quartz HS/2 avec PLL x4"
+
+#: devices/pic/base/pic_config.cpp:168
+msgid "HS/2 Crystal with 8x PLL"
+msgstr "Quartz HS/2 avec PLL x8"
+
+#: devices/pic/base/pic_config.cpp:172
+msgid "HS/3 Crystal with 16x PLL"
+msgstr "Quartz HS/3 avec PLL x16"
+
+#: devices/pic/base/pic_config.cpp:170
+msgid "HS/3 Crystal with 4x PLL"
+msgstr "Quartz HS/3 avec PLL x4"
+
+#: devices/pic/base/pic_config.cpp:171
+msgid "HS/3 Crystal with 8x PLL"
+msgstr "Quartz HS/3 avec PLL x8"
+
+#: tools/gui/toolchain_config_widget.cpp:240
+msgid "Hardcoded (%1)"
+msgstr "Figé dans le code (%1)"
+
+#: devices/pic/base/pic.cpp:32
+msgid "Hardware Stack"
+msgstr "Pile matérielle"
+
+#: progs/gui/hardware_config_widget.cpp:45
+msgid "Hardware name:"
+msgstr "Nom du matériel :"
+
+#: tools/base/generic_tool.cpp:31
+msgid "Header directory"
+msgstr "Répertoire des entêtes"
+
+#: libgui/project_manager_ui.cpp:33
+msgid "Headers"
+msgstr "Entêtes"
+
+#: tools/list/tools_config_widget.cpp:24
+msgid "Help Dialog"
+msgstr "Fenêtre d'aide"
+
+#: libgui/likeback.cpp:184
+msgid "Help Improve the Application"
+msgstr "Aider à améliorer l'application"
+
+#: libgui/toplevel.cpp:539
+msgid "Hex"
+msgstr "Hex"
+
+#: common/common/purl_base.cpp:49 libgui/project_manager_ui.cpp:97
+msgid "Hex File"
+msgstr "Fichier hexadécimal"
+
+#: piklab-hex/main.cpp:148
+msgid "Hex file cannot be fixed because the format was not recognized or is inconsistent."
+msgstr "Le fichier hexadécimal ne peut pas être réparé car le format n'est pas reconnu ou comporte des contradictions."
+
+#: piklab-hex/main.cpp:156
+msgid "Hex file cleaned and fixed."
+msgstr "Fichier hexadécimal nettoyé et réparé."
+
+#: piklab-hex/main.cpp:155
+msgid "Hex file cleaned."
+msgstr "Fichier hexadécimal nettoyé."
+
+#: tools/gui/tool_config_widget.cpp:120
+msgid "Hex file format:"
+msgstr "Format du fichier hexadécimal :"
+
+#: piklab-hex/main.cpp:118
+msgid "Hex file is compatible with device \"%1\"."
+msgstr "Le fichier hexadécimal est compatible avec le circuit \"%1\"."
+
+#: piklab-hex/main.cpp:115 piklab-hex/main.cpp:144
+msgid "Hex file is valid."
+msgstr "Le fichier hexadécimal est valide."
+
+#: piklab-prog/cmdline.cpp:175
+msgid "Hex file seems incompatible with device \"%1\"."
+msgstr "Le fichier hexadécimal semble incompatible avec le circuit « %1 »."
+
+#: piklab-prog/cli_interactive.cpp:60
+msgid "Hex file to be used for programming."
+msgstr "Fichier hexadécimal à utiliser pour la programmation."
+
+#: piklab-prog/cmdline.cpp:454
+msgid "Hex filename for programming."
+msgstr "Fichier hexadécimal pour la programmation."
+
+#: piklab-prog/cmdline.cpp:161
+msgid "Hex filename not specified."
+msgstr "Le nom du fichier hexadécimal n'a pas été spécifié."
+
+#: piklab-hex/main.cpp:288
+msgid "Hex filename(s)."
+msgstr "Nom(s) des fichiers hexadécimaux."
+
+#: piklab-prog/cli_interactive.cpp:56
+msgid "Hex output file format."
+msgstr "Format du fichier hexadécimal de sortie."
+
+#: common/common/number.cpp:20
+msgid "Hexadecimal"
+msgstr "Hexadécimal"
+
+#: progs/base/generic_prog.cpp:26
+msgid "High"
+msgstr "Haut"
+
+#: devices/pic/gui/pic_memory_editor.cpp:77
+#: devices/pic/base/pic_config.cpp:231 devices/pic/base/pic_config.cpp:238
+msgid "High Security"
+msgstr "Sécurité haute"
+
+#: devices/base/generic_device.cpp:42
+msgid "High Voltage"
+msgstr "Haute tension"
+
+#: devices/pic/base/pic_config.cpp:277
+msgid "High range (nominal FRC frequency is 14.1 MHz)"
+msgstr "Gamme haute (la fréquence FRC nominale est 14,1 MHz)"
+
+#: devices/pic/base/pic_config.cpp:245
+msgid "High security"
+msgstr "Sécurité haute"
+
+#: devices/pic/base/pic_config.cpp:147 devices/pic/base/pic_config.cpp:162
+msgid "High speed crystal"
+msgstr "Quartz haute fréquence"
+
+#: devices/pic/base/pic_config.cpp:60
+msgid "High speed crystal/resonator"
+msgstr "Quartz/résonateur haute vitesse"
+
+#: devices/pic/base/pic_config.cpp:62
+msgid "High speed crystal/resonator with 4x PLL"
+msgstr "Quartz/résonateur haute vitesse avec PLL x4"
+
+#: devices/pic/base/pic_config.cpp:63
+msgid "High speed crystal/resonator with software controlled 4x PLL"
+msgstr "Quartz/résonateur haute vitesse avec PLL x4 contrôlée logiciellement"
+
+#: devices/pic/base/pic_config.cpp:61
+msgid "High speed crystal/resonator, PLL enabled"
+msgstr "Quartz/résonateur haute vitesse (PLL activée)"
+
+#: devices/pic/base/pic_config.cpp:72
+msgid "Highest"
+msgstr "Le plus haut"
+
+#: libgui/likeback.cpp:74
+msgid "I Do not Like..."
+msgstr "Je n'aime pas..."
+
+#: libgui/likeback.cpp:81
+msgid "I Found a Bug..."
+msgstr "J'ai découvert un bogue..."
+
+#: libgui/likeback.cpp:67
+msgid "I Like..."
+msgstr "J'aime..."
+
+#: libgui/toplevel.cpp:338 libgui/likeback.cpp:537
+msgid "I do not like..."
+msgstr "Je n'aime pas..."
+
+#: libgui/toplevel.cpp:342 libgui/likeback.cpp:544
+msgid "I found a bug..."
+msgstr "J'ai découvert un bogue..."
+
+#: libgui/toplevel.cpp:334 libgui/likeback.cpp:530
+msgid "I like..."
+msgstr "J'aime..."
+
+#: devices/pic/gui/pic_group_ui.cpp:47
+msgid "I/Os"
+msgstr "E/S"
+
+#: devices/pic/base/pic_config.cpp:273
+msgid "I2C pins selection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:195
+msgid "ICD communication channel"
+msgstr "Canal de communication ICD"
+
+#: progs/icd1/base/icd1_prog.h:44
+msgid "ICD1 Programmer"
+msgstr "Programmateur ICD1"
+
+#: progs/icd2/base/icd2_debug.h:76
+msgid "ICD2 Debugger"
+msgstr "Débogueur ICD2"
+
+#: progs/icd2/base/icd2_prog.h:76
+msgid "ICD2 Programmer"
+msgstr "Programmateur ICD2"
+
+#: tools/gputils/gputils_generator.cpp:179
+msgid "INT pin interrupt service routine"
+msgstr "routine de service d'interruption de la broche d'interruption INT"
+
+#: devices/pic/base/pic_config.cpp:213
+msgid "INTRC"
+msgstr "INTRC"
+
+#: devices/pic/pic/pic_group.cpp:55
+msgid "IO Ports"
+msgstr "Ports d'E/S"
+
+#: libgui/likeback.cpp:179
+msgid "Icons description:"
+msgstr "Description des icônes :"
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:85
+msgid "Id returned by bootloader corresponds to other devices: %1 (%2 read and %3 expected)."
+msgstr "L'identifiant renvoyé par le chargeur de démarrage correspond à un autre circuit : %1 (%2 lu et %3 attendu)."
+
+#: progs/icd2/gui/icd2_group_ui.cpp:21
+msgid "Id:"
+msgstr "Identification :"
+
+#: devices/base/generic_device.cpp:17
+msgid "In Production"
+msgstr "En production"
+
+#: devices/pic/prog/pic_prog_specific.cpp:19
+msgid "In Programming"
+msgstr "En programmation"
+
+#: devices/pic/base/pic_config.cpp:82
+msgid "In-circuit debugger"
+msgstr "Débogueur en circuit"
+
+#: common/common/purl_base.cpp:36
+msgid "Include File"
+msgstr "Fichier d'inclusion"
+
+#: tools/gui/tool_config_widget.h:57
+msgid "Include directories:"
+msgstr "Répertoires des entêtes :"
+
+#: libgui/project_manager_ui.cpp:35
+msgid "Included"
+msgstr "Inclus"
+
+#: progs/psp/base/psp_serial.cpp:59
+msgid "Incorrect ack: expecting %1, received %2"
+msgstr "Accusé de réception incorrect : attendu %1, reçu %2"
+
+#: progs/psp/base/psp_serial.cpp:67
+msgid "Incorrect received data end: expecting 00, received %1"
+msgstr "Fin de données reçue incorrecte : attendu 00, reçu %1"
+
+#: coff/base/coff_object.cpp:54
+msgid "Indentifier"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:63
+msgid "Index:"
+msgstr "Index :"
+
+#: devices/base/generic_device.cpp:34
+msgid "Industrial"
+msgstr "Industriel"
+
+#: coff/base/coff_archive.cpp:107
+msgid "Information:"
+msgstr "Information :"
+
+#: devices/pic/base/pic_config.cpp:247
+msgid "Initial oscillator source"
+msgstr "Source initiale de l'oscillateur"
+
+#: coff/base/coff_object.cpp:330
+msgid "Initialized Data"
+msgstr ""
+
+#: coff/base/coff_object.cpp:122
+msgid "Inside Section"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:32 coff/base/coff_object.cpp:162
+msgid "Int"
+msgstr "Entier"
+
+#: common/cli/cli_main.cpp:69
+msgid "Interactive mode"
+msgstr "Mode interactif"
+
+#: piklab-prog/cmdline.cpp:228
+msgid "Interactive mode: type help for help"
+msgstr "Mode interactif : tapez help pour avoir de l'aide"
+
+#: common/port/usb_port.cpp:255
+msgid "Interface %1 not present: using %2"
+msgstr "L'interface %1 est absente : utilisation de %2"
+
+#: coff/base/cdb_parser.cpp:54
+msgid "Internal RAM"
+msgstr "RAM interne"
+
+#: coff/base/cdb_parser.cpp:28
+msgid "Internal RAM Pointer"
+msgstr "Pointeur de RAM interne"
+
+#: coff/base/cdb_parser.cpp:49
+msgid "Internal Stack"
+msgstr "Pile interne"
+
+#: devices/pic/base/pic_config.cpp:73
+msgid "Internal Trim"
+msgstr "Trim interne"
+
+#: devices/pic/base/pic_config.cpp:141
+msgid "Internal fast RC"
+msgstr "RC rapide interne"
+
+#: devices/pic/base/pic_config.cpp:249
+msgid "Internal fast RC oscillator"
+msgstr "Oscillateur RC interne rapide"
+
+#: devices/pic/base/pic_config.cpp:182
+msgid "Internal fast RC oscillator (no PLL)"
+msgstr "Oscillateur RC interne rapide (sans PLL)"
+
+#: devices/pic/base/pic_config.cpp:180
+msgid "Internal fast RC oscillator with 16x PLL"
+msgstr "Oscillateur RC interne rapide avec PLL x16"
+
+#: devices/pic/base/pic_config.cpp:178
+msgid "Internal fast RC oscillator with 4x PLL"
+msgstr "Oscillateur RC interne rapide avec PLL x4"
+
+#: devices/pic/base/pic_config.cpp:157 devices/pic/base/pic_config.cpp:179
+msgid "Internal fast RC oscillator with 8x PLL"
+msgstr "Oscillateur RC interne rapide avec PLL x8"
+
+#: devices/pic/base/pic_config.cpp:250
+msgid "Internal fast RC oscillator with PLL"
+msgstr "Oscillateur RC interne rapide avec PLL"
+
+#: devices/pic/base/pic_config.cpp:255
+msgid "Internal fast RC oscillator with postscaler"
+msgstr "Oscillateur RC interne rapide avec post-diviseur"
+
+#: devices/pic/base/pic_config.cpp:142
+msgid "Internal low-power RC"
+msgstr "RC faible puissance interne"
+
+#: devices/pic/base/pic_config.cpp:183
+msgid "Internal low-power RC oscillator"
+msgstr "Oscillateur RC interne faible puissance"
+
+#: devices/pic/base/pic_config.cpp:43
+msgid "Internal oscillator"
+msgstr "Oscillateur interne"
+
+#: devices/pic/base/pic_config.cpp:45
+msgid "Internal oscillator (no CLKOUT)"
+msgstr "Oscillateur interne (sans CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:205
+msgid "Internal oscillator speed"
+msgstr "Vitesse de l'oscillateur interne"
+
+#: devices/pic/base/pic_config.cpp:44
+msgid "Internal oscillator with CLKOUT"
+msgstr "Oscillateur interne avec CLKOUT"
+
+#: devices/pic/base/pic_config.cpp:65
+msgid "Internal oscillator, HS used by USB"
+msgstr "Oscillateur interne, HS utilisé par l'USB"
+
+#: devices/pic/base/pic_config.cpp:64
+msgid "Internal oscillator, XT used by USB"
+msgstr "Oscillateur interne, XT utilisé par l'USB"
+
+#: devices/pic/base/pic_config.cpp:80
+msgid "Internal-external switchover"
+msgstr "Aiguillage interne-externe"
+
+#: progs/icd2/base/icd2.cpp:332
+msgid "Invalid begin or end character for read block."
+msgstr "Caractère de début ou de fin invalide lors de la lecture du bloc."
+
+#: progs/psp/base/psp.cpp:185
+msgid "Invalid firmware version"
+msgstr "La version du micrologiciel n'est pas valide"
+
+#: progs/direct/gui/direct_config_widget.cpp:48
+msgid "Inverted"
+msgstr "Inversé"
+
+#: libgui/toplevel.cpp:938
+msgid "It is not possible to start a debugging session with an hex file not generated with the current project."
+msgstr "Il n'est pas possible de démarrer une session de débogage avec un fichier hexadécimal qui n'a pas été généré avec le projet courant."
+
+#: progs/icd2/base/icd2_prog.cpp:38
+msgid "It is not recommended to power dsPICs from ICD. Continue anyway?"
+msgstr "Il n'est pas conseillé d'alimenter les dsPIC à partir de l'ICD. Continuer malgré tout ?"
+
+#: libgui/likeback.cpp:395
+msgid "It will only be used to contact you back if more information is needed about your comments, how to reproduce the bugs you report, send bug corrections for you to test..."
+msgstr "Elle ne sera utilisée pour vous contacter que si nous avons besoin de plus d'informations sur vos commentaires, sur la manière de reproduire le bogue que vous avez signalé, pour vous envoyer des corrections de bogues afin que vous les testiez."
+
+#: devices/pic/base/pic.cpp:44
+msgid "J"
+msgstr "J"
+
+#: tools/jal/jal.h:32
+msgid "JAL"
+msgstr "JAL"
+
+#: common/common/purl_base.cpp:27
+msgid "JAL Compiler"
+msgstr "Compilateur JAL"
+
+#: common/common/purl_base.cpp:40
+msgid "JAL File"
+msgstr "Fichier JAL"
+
+#: tools/jalv2/jalv2.h:32
+msgid "JAL V2"
+msgstr "JAL V2"
+
+#: progs/direct/base/direct_prog_config.cpp:41
+msgid "JDM classic"
+msgstr "JDM classique"
+
+#: progs/direct/base/direct_prog_config.cpp:43
+msgid "JDM classic (delay 10)"
+msgstr "JDM classique (délai 10)"
+
+#: progs/direct/base/direct_prog_config.cpp:45
+msgid "JDM classic (delay 20)"
+msgstr "JDM classique (délai 20)"
+
+#: devices/pic/base/pic_config.cpp:268
+msgid "JTAG port enabled"
+msgstr "Port JTAG activé"
+
+#: devices/pic/base/pic.cpp:45
+msgid "K"
+msgstr "K"
+
+#: libgui/toplevel.cpp:156
+msgid "Konsole"
+msgstr "Konsole"
+
+#: devices/pic/base/pic.cpp:80
+msgid "LCD"
+msgstr "LCD"
+
+#: common/global/about.cpp:81
+msgid "LPLAB author (original microchip programmer support)."
+msgstr "Auteur de LPLAB (prise en charge originale du programmateur Microchip)."
+
+#: coff/base/coff_object.cpp:134
+msgid "Label"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:21
+msgid "Librarian"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:21
+msgid "Librarian:"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:44
+msgid "Library"
+msgstr "Bibliothèque"
+
+#: tools/base/generic_tool.cpp:33
+msgid "Library Directory"
+msgstr "Répertoire des bibliothèques"
+
+#: common/common/purl_base.cpp:44
+msgid "Library File"
+msgstr "Fichier bibliothèque"
+
+#: coff/base/coff_object.cpp:153
+msgid "Line Number"
+msgstr ""
+
+#: libgui/text_editor.cpp:170
+msgid "Line: %1  Col: %2"
+msgstr "Ligne : %1  Colonne : %2"
+
+#: tools/base/generic_tool.cpp:19
+msgid "Linker"
+msgstr "Éditeur de liens"
+
+#: common/common/purl_base.cpp:46 libgui/project_manager.cpp:165
+#: libgui/project_manager_ui.cpp:33
+msgid "Linker Script"
+msgstr "Script éditeur de liens"
+
+#: tools/base/generic_tool.cpp:32
+msgid "Linker Script Directory"
+msgstr "Répertoire des scripts éditeur de liens"
+
+#: common/common/purl_base.cpp:47
+msgid "Linker Script for PIC30"
+msgstr "Script éditeur de liens pour PIC30"
+
+#: tools/base/generic_tool.cpp:19
+msgid "Linker:"
+msgstr "Éditeur de liens :"
+
+#: libgui/project_manager_ui.cpp:99
+msgid "List"
+msgstr "Liste"
+
+#: common/common/purl_base.cpp:52
+msgid "List File"
+msgstr "Fichier listing"
+
+#: coff/base/cdb_parser.cpp:18
+msgid "Local"
+msgstr "Local"
+
+#: libgui/breakpoint_view.cpp:48
+msgid "Location"
+msgstr "Emplacement"
+
+#: libgui/new_dialogs.cpp:32
+msgid "Location:"
+msgstr "Emplacement :"
+
+#: coff/base/cdb_parser.cpp:31 coff/base/coff_object.cpp:163
+msgid "Long"
+msgstr "Long"
+
+#: coff/base/coff_object.cpp:174
+msgid "Long Double"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:25
+msgid "Low"
+msgstr "Bas"
+
+#: devices/base/generic_device.cpp:40
+msgid "Low Power"
+msgstr "Faible puissance"
+
+#: devices/base/generic_device.cpp:41
+msgid "Low Voltage"
+msgstr "Faible tension"
+
+#: devices/pic/base/pic.cpp:74
+msgid "Low Voltage Detect"
+msgstr "Détection de faible tension"
+
+#: devices/pic/base/pic_config.cpp:254
+msgid "Low power RC oscillator"
+msgstr "Oscillateur RC basse puissance"
+
+#: devices/pic/base/pic_config.cpp:48
+msgid "Low power crystal"
+msgstr "Quartz faible puissance"
+
+#: devices/pic/base/pic_config.cpp:116
+msgid "Low power in sleep mode"
+msgstr "Faible consommation en mode de veille"
+
+#: devices/pic/base/pic_config.cpp:278
+msgid "Low range (nominal FRC frequency is 9.7 MHz)"
+msgstr "Gamma basse (la fréquence FRC nominale est 9,7 MHz)"
+
+#: devices/pic/base/pic_config.cpp:86
+msgid "Low voltage programming"
+msgstr "Programmation faible tension"
+
+#: devices/pic/base/pic_config.cpp:181
+msgid "Low-power 32 kHz oscillator (TMR1 oscillator)"
+msgstr "Oscillateur 32kHz basse puissance (oscillateur deTimer1)"
+
+#: devices/pic/base/pic_config.cpp:123
+msgid "Low-power timer1 oscillator"
+msgstr "Oscillateur basse puissance de Timer1"
+
+#: devices/pic/base/pic_config.cpp:146 devices/pic/base/pic_config.cpp:161
+msgid "Low-power/low-frequency crystal"
+msgstr "Quartz faible puissance/basse fréquence"
+
+#: coff/base/cdb_parser.cpp:52
+msgid "Lower-128-byte Internal RAM"
+msgstr "RAM interne 128 octets, partie basse"
+
+#: devices/pic/base/pic_config.cpp:69
+msgid "Lowest"
+msgstr "Le plus petit"
+
+#: progs/direct/base/direct.cpp:24
+msgid "MCLR (Vpp)"
+msgstr "MCLR (Vpp)"
+
+#: progs/icd2/base/icd2.cpp:52
+msgid "MCLR Vdd"
+msgstr "Vdd MCLR"
+
+#: progs/icd2/base/icd2.cpp:52
+msgid "MCLR Vpp"
+msgstr "Vpp MCLR"
+
+#: progs/icd2/base/icd2.cpp:51
+msgid "MCLR ground"
+msgstr "Masse MCLR"
+
+#: devices/base/generic_device.cpp:60
+msgid "MLF"
+msgstr "MLF"
+
+#: tools/mpc/mpc.h:32
+msgid "MPC Compiler"
+msgstr "Compilateur MPC"
+
+#: progs/base/generic_prog.cpp:141 progs/base/generic_prog.cpp:149
+#: progs/base/generic_prog.cpp:157
+msgid "MPLAB %1"
+msgstr "MPLAB %1"
+
+#: devices/base/generic_device.cpp:55
+msgid "MQFP"
+msgstr "MQFP"
+
+#: devices/base/generic_device.cpp:50
+msgid "MSOP"
+msgstr "MSOP"
+
+#: devices/pic/base/pic_config.cpp:220
+msgid "MSSP address select bit"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:138
+msgid "Macros"
+msgstr "Macros"
+
+#: coff/base/coff_archive.cpp:38
+msgid "Magic number: %1"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:109
+msgid "Malformed record: "
+msgstr "Enregistrement mal formé :"
+
+#: progs/icd2/base/icd2.cpp:220
+msgid "Malformed string received \"%1\""
+msgstr "La chaîne reçue est mal formée « %1 »"
+
+#: common/common/purl_base.cpp:53
+msgid "Map File"
+msgstr "Fichier de projection"
+
+#: devices/pic/base/pic_config.cpp:204
+msgid "Master clear pull-up resistor"
+msgstr "Résistance de rappel niveau haut pour la broche de réinitialisation générale"
+
+#: devices/pic/base/pic_config.cpp:34
+msgid "Master clear reset"
+msgstr "Réinitialisation générale"
+
+#: devices/base/generic_device.cpp:22
+msgid "Mature"
+msgstr "Mûr"
+
+#: common/global/log.cpp:28
+msgid "Max debug messages"
+msgstr "Nombre maximum de messages de débogage"
+
+#: coff/base/coff_object.cpp:169
+msgid "Member Of Enumeration"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:19
+msgid "Member name not terminated by '/' (\"%1\")."
+msgstr ""
+
+#: coff/base/coff_object.cpp:144
+msgid "Member of Enumeration"
+msgstr ""
+
+#: coff/base/coff_object.cpp:136
+msgid "Member of Structure"
+msgstr ""
+
+#: coff/base/coff_object.cpp:139
+msgid "Member of Union"
+msgstr ""
+
+#: libgui/device_gui.cpp:408 libgui/project_manager_ui.cpp:100
+msgid "Memory Map"
+msgstr "Projection mémoire"
+
+#: devices/mem24/mem24/mem24_group.cpp:22
+msgid "Memory Size"
+msgstr "Taille mémoire"
+
+#: devices/pic/pic/pic_group.cpp:27
+msgid "Memory Type"
+msgstr "Type de mémoire"
+
+#: progs/icd2/base/icd2_debug.cpp:237
+msgid "Memory area for debug executive was not empty. Overwrite it and continue anyway..."
+msgstr "La zone mémoire pour l'exécutif de débogage n'était pas vide. On l'écrase et on continue malgré tout..."
+
+#: devices/pic/base/pic_config.cpp:83
+msgid "Memory parity error"
+msgstr "Erreur de parité mémoire"
+
+#: piklab-prog/cmdline.cpp:254
+msgid "Memory range not present on this device."
+msgstr "Gamme de mémoire non-présente pour ce circuit."
+
+#: piklab-prog/cmdline.cpp:258
+msgid "Memory range not recognized."
+msgstr "Gamme de mémoire non reconnue."
+
+#: piklab-prog/cmdline.cpp:57
+msgid "Memory range to operate on."
+msgstr "Gamme de mémoire sur laquelle opérer."
+
+#: piklab-prog/cmdline.cpp:259
+msgid "Memory ranges are not supported for the specified device."
+msgstr "Les gammes de mémoire ne sont pas gérées pour le circuit sélectionné."
+
+#: piklab-prog/cmdline.cpp:148
+msgid "Memory ranges for PIC/dsPIC devices:"
+msgstr "Gammes de mémoire pour les circuits PIC/dsPIC :"
+
+#: devices/pic/base/pic_config.cpp:94
+msgid "Microcontroller"
+msgstr "Microcontrôleur"
+
+#: devices/pic/base/pic_config.cpp:95
+msgid "Microprocessor"
+msgstr "Microprocesseur"
+
+#: devices/pic/base/pic_config.cpp:97
+msgid "Microprocessor with boot block"
+msgstr "Microprocesseur avec bloc de démarrage"
+
+#: devices/pic/base/pic_config.cpp:71
+msgid "Mid/High"
+msgstr "Moyen/haut"
+
+#: devices/pic/base/pic_config.cpp:70
+msgid "Mid/Low"
+msgstr "Moyen/bas"
+
+#: devices/pic/base/pic.cpp:52
+msgid "Midrange Family"
+msgstr "Famille de milieu de gamme"
+
+#: devices/pic/base/pic_register.cpp:76
+msgid "Mirror of %1"
+msgstr "Miroir de %1"
+
+#: devices/pic/prog/pic_prog.cpp:260
+msgid "Missing or incorrect device (Read id is %1)."
+msgstr "Circuit absent ou incorrect (identifiant lu : %1)."
+
+#: progs/icd2/base/icd2.cpp:51
+msgid "Module Vpp"
+msgstr "Vpp module"
+
+#: progs/direct/base/direct_prog_config.cpp:74
+msgid "Monty-Robot programmer"
+msgstr "Programmateur Monty-Robot"
+
+#: devices/pic/base/pic.cpp:82
+msgid "Motion Feeback"
+msgstr "Asservissement"
+
+#: devices/pic/base/pic.cpp:81
+msgid "Motor Control"
+msgstr "Contrôle moteur"
+
+#: common/gui/editlistbox.cpp:147
+msgid "Move &Down"
+msgstr "Déplacer vers le &bas"
+
+#: common/gui/editlistbox.cpp:142
+msgid "Move &Up"
+msgstr "Déplacer vers le &haut"
+
+#: progs/direct/base/direct_prog_config.cpp:70
+msgid "Myke's EL Cheapo"
+msgstr "EL Cheapo de Myke"
+
+#: devices/pic/gui/pic_config_word_editor.cpp:58 libgui/project_editor.cpp:32
+#: libgui/project_wizard.cpp:120
+msgid "Name:"
+msgstr "Nom :"
+
+#: libgui/project_manager.cpp:218
+msgid "New File..."
+msgstr "Nouveau fichier..."
+
+#: coff/base/coff.cpp:29 coff/base/coff_object.cpp:36
+msgid "New Microchip"
+msgstr ""
+
+#: libgui/project_manager.cpp:181 libgui/toplevel.cpp:226
+msgid "New Project..."
+msgstr "Nouveau projet..."
+
+#: libgui/project_wizard.cpp:158
+msgid "New Project: Add Files"
+msgstr "Nouveau projet : ajouter des fichiers"
+
+#: libgui/project_wizard.cpp:117
+msgid "New Project: Basic Settings"
+msgstr "Nouveau projet : paramètres de base"
+
+#: libgui/project_wizard.cpp:147
+msgid "New Project: Source Files"
+msgstr "Nouveau projet : fichiers source"
+
+#: libgui/project_manager.cpp:197
+msgid "New Source File..."
+msgstr "Nouveau fichier source..."
+
+#: libgui/toplevel.cpp:184
+msgid "New hex File..."
+msgstr "Nouveau fichier hexadécimal..."
+
+#: progs/gui/hardware_config_widget.cpp:159
+msgid "New/Test..."
+msgstr "Nouveau/Tester..."
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:180
+msgid "No \"goto\" instruction in the first four instructions."
+msgstr "Pas d'instruction « goto » parmi les quatre premières instructions."
+
+#: piklab-prog/cli_interactive.cpp:261
+#, fuzzy
+msgid "No COFF file specified."
+msgstr "Aucun fichier COFF spécifié"
+
+#: piklab-prog/cli_interactive.cpp:171
+#, fuzzy
+msgid "No breakpoint set."
+msgstr "Pas de point d'arrêt défini"
+
+#: common/cli/cli_main.cpp:27
+msgid "No command specified"
+msgstr "Aucune commande spécifiée"
+
+#: tools/list/compile_manager.cpp:286
+msgid "No custom commands specified."
+msgstr ""
+
+#: common/global/log.cpp:25
+msgid "No debug message"
+msgstr "Pas de message de débogage"
+
+#: progs/gui/prog_group_ui.cpp:98
+msgid "No device selected."
+msgstr "Aucun circuit sélectionné."
+
+#: piklab-prog/cli_interactive.cpp:243 piklab-prog/cli_interactive.cpp:259
+#, fuzzy
+msgid "No device specified."
+msgstr "Aucun circuit spécifié"
+
+#: common/nokde/nokde_kaboutdata.cpp:430
+msgid ""
+"No licensing terms for this program have been specified.\n"
+"Please check the documentation or the source for any\n"
+"licensing terms.\n"
+msgstr ""
+"Aucun terme de licence n'a été spécifié pour ce programme.\n"
+"Veuillez vérifier la documentation ou les sources\n"
+"pour les termes de licence.\n"
+
+#: progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp:37
+msgid "No of Retries:"
+msgstr "Nombre de tentatives :"
+
+#: piklab-prog/cli_interactive.cpp:244 piklab-prog/cli_interactive.cpp:262
+#, fuzzy
+msgid "No register."
+msgstr "Pas de registre"
+
+#: devices/pic/gui/pic_group_ui.cpp:72
+msgid "No variable"
+msgstr "Pas de variable"
+
+#: piklab-prog/cli_interactive.cpp:266
+#, fuzzy
+msgid "No variable."
+msgstr "Pas de variable"
+
+#: piklab-hex/main.cpp:137
+msgid "No. of Words:"
+msgstr "Nombre de mots :"
+
+#: coff/base/coff_archive.cpp:108
+msgid "No. of file members:"
+msgstr ""
+
+#: coff/base/text_coff.cpp:258
+msgid "No. of sections:"
+msgstr "Nombre de sections :"
+
+#: coff/base/text_coff.cpp:259 coff/base/coff_archive.cpp:109
+msgid "No. of symbols:"
+msgstr "Nombre de symboles :"
+
+#: coff/base/text_coff.cpp:260
+msgid "No. of variables:"
+msgstr "Nombre de variables :"
+
+#: libgui/breakpoint_view.cpp:64
+msgid "Non-code breakpoint"
+msgstr "Point d'arrêt sans code"
+
+#: devices/base/generic_device.cpp:39 devices/pic/base/pic.cpp:43
+msgid "Normal"
+msgstr "Normal"
+
+#: common/global/log.cpp:26
+msgid "Normal debug messages"
+msgstr "Messages de débogage normaux"
+
+#: progs/gui/hardware_config_widget.cpp:61
+msgid "Not Connected"
+msgstr "Non connecté"
+
+#: devices/base/generic_device.cpp:19
+msgid "Not Recommended for New Design"
+msgstr "Déconseillé pour de nouvelles conceptions"
+
+#: common/common/group.cpp:13
+msgid "Not Supported"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:225
+msgid "Not connected to EMB"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:72
+msgid "Not tested."
+msgstr "Non testé."
+
+#: libgui/likeback.cpp:598
+msgid "Note that to improve this application, it's important to tell us the things you like as much as the things you dislike."
+msgstr "Veuillez noter que pour améliorer cette application, il est important de nous dire ce que vous avez aimé de même que ce que vous n'avez pas aimé."
+
+#: common/port/usb_port.cpp:401
+msgid "Nothing received: retrying..."
+msgstr "Rien n'a été reçu : on réessaye..."
+
+#: common/port/usb_port.cpp:363
+msgid "Nothing sent: retrying..."
+msgstr "Rien n'a été envoyé : on réessaye..."
+
+#: piklab-hex/main.cpp:232 piklab-prog/cli_interactive.cpp:158
+#: piklab-prog/cli_interactive.cpp:298
+msgid "Number format not recognized."
+msgstr "Format de nombre non reconnu."
+
+#: devices/pic/base/pic_config.cpp:262
+msgid "OSC2 pin function"
+msgstr "Fonction de la broche OSC2"
+
+#: coff/base/coff.cpp:23
+msgid "Object"
+msgstr "Objet"
+
+#: common/common/purl_base.cpp:43
+msgid "Object File"
+msgstr "Fichier objet"
+
+#: libgui/project_manager.cpp:213 libgui/project_manager_ui.cpp:34
+msgid "Objects"
+msgstr "Objets"
+
+#: common/common/number.cpp:22
+msgid "Octal"
+msgstr "Octal"
+
+#: devices/pic/base/pic_config.cpp:107
+msgid "Odd PWM output polarity"
+msgstr "Polarité de la sortie du PWM impair"
+
+#: coff/base/coff.cpp:27 coff/base/coff_object.cpp:35
+msgid "Old Microchip"
+msgstr ""
+
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:86
+msgid "Only bootloader version 1.x is supported"
+msgstr "Seule la version 1.x du chargeur de démarrage est prise en charge"
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:38
+msgid "Only bootloader version 2.x is supported."
+msgstr "Seule la version 2.x du chargeur de démarrage est prise en charge."
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:315
+msgid "Only code and EEPROM will be erased."
+msgstr "Seuls le code et l'EEPROM seront effacés."
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:316
+msgid "Only code will be erased."
+msgstr "Seul le code sera effacé."
+
+#: libgui/likeback.cpp:594
+msgid "Only english language is accepted."
+msgstr "Seul l'anglais est accepté."
+
+#: progs/base/prog_config.cpp:69
+msgid "Only program what is needed (faster)."
+msgstr ""
+
+#: progs/base/debug_config.cpp:13
+msgid "Only stop stepping on project source line."
+msgstr ""
+
+#: progs/base/debug_config.cpp:12
+msgid "Only stop stepping on source line."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:177
+msgid "Only the first word of the \"goto\" instruction is into the first four instructions."
+msgstr "Seul le premier mot de l'instruction « goto » se trouve parmi les quatre premières instructions."
+
+#: progs/base/prog_config.cpp:71
+msgid "Only verify programmed words in code memory (faster)."
+msgstr "Vérifier seulement les mots programmés dans la mémoire code (plus rapide)."
+
+#: progs/pickit2/gui/pickit2_group_ui.cpp:33
+msgid "Open Calibration Firmware"
+msgstr "Ouvrir le micrologiciel de calibration"
+
+#: libgui/toplevel.cpp:554
+msgid "Open File"
+msgstr "Ouvrir un fichier"
+
+#: progs/gui/prog_group_ui.cpp:142
+msgid "Open Firmware"
+msgstr "Ouvrir le micrologiciel"
+
+#: libgui/project_manager.cpp:182 libgui/toplevel.cpp:228
+msgid "Open Project..."
+msgstr "Ouvrir un projet..."
+
+#: libgui/toplevel.cpp:230
+msgid "Open Recent Project"
+msgstr "Ouvrir un projet récent"
+
+#: common/global/log.cpp:58
+msgid "Operation aborted by user."
+msgstr "Opération annulée par l'utilisateur."
+
+#: coff/base/text_coff.cpp:257
+msgid "Option header:"
+msgstr ""
+
+#: piklab/main.cpp:15
+msgid "Optional filenames to be opened upon startup."
+msgstr "Noms de fichiers optionnels à ouvrir au démarrage."
+
+#: coff/base/coff_object.cpp:469
+msgid "Optional header format not supported: magic number is %1."
+msgstr "Format d'en-tête optionnel non pris en charge : le nombre magique est %1."
+
+#: coff/base/coff_object.cpp:538
+msgid "Optionnal header size is not %1: %2"
+msgstr "La taille de l'entête optionnel n'est pas %1 : %2"
+
+#: libgui/project_manager.cpp:191
+msgid "Options..."
+msgstr "Options..."
+
+#: common/global/about.cpp:80
+msgid "Original author of PiKdev."
+msgstr "Auteur original de Pikdev."
+
+#: common/global/about.cpp:85
+msgid "Original code for direct programming."
+msgstr "Code original pour la programmation directe."
+
+#: devices/pic/prog/pic_prog.cpp:351
+msgid "Osccal backup cannot be read by selected programmer"
+msgstr "La sauvegarde de la calibration de l'oscillateur ne peut être lue avec le programmateur sélectionné."
+
+#: devices/pic/prog/pic_prog.cpp:314
+msgid "Osccal backup cannot be read by the selected programmer"
+msgstr "La sauvegarde de la calibration de l'oscillateur ne peut être lue avec le programmateur sélectionné."
+
+#: devices/pic/prog/pic_prog.cpp:303
+msgid "Osccal cannot be read by the selected programmer"
+msgstr "La calibration de l'oscillateur ne peut être lue avec le programmateur sélectionné."
+
+#: progs/pickit2/gui/pickit2_group_ui.cpp:28
+msgid "Osccal regeneration not available for the selected device."
+msgstr "La régénération de la calibration de l'oscillateur n'est pas disponible pour le circuit sélectionné."
+
+#: devices/pic/base/pic_config.cpp:39
+msgid "Oscillator"
+msgstr "Oscillateur"
+
+#: progs/gui/prog_group_ui.cpp:175
+#, fuzzy
+msgid "Oscillator calibration regeneration is not available with the selected programmer."
+msgstr "La régénération de la calibration de l'oscillateur n'est pas disponible avec le programmateur sélectionné."
+
+#: devices/pic/base/pic_config.cpp:160
+msgid "Oscillator mode"
+msgstr "Mode de l'oscillateur"
+
+#: devices/pic/base/pic_config.cpp:140
+msgid "Oscillator source"
+msgstr "Source de l'oscillateur"
+
+#: devices/pic/base/pic_config.cpp:100
+msgid "Oscillator system clock switch"
+msgstr "Bascule de l'oscillateur d'horloge système"
+
+#: tools/gui/toolchain_config_widget.cpp:64
+#, fuzzy
+msgid "Output Executable Type:"
+msgstr "Type d'exécutable :"
+
+#: piklab-prog/cmdline.cpp:178
+msgid "Output hex filename already exists."
+msgstr "Le fichier hexadécimal de sortie existe déjà."
+
+#: libgui/log_view.cpp:89
+msgid "Output in console"
+msgstr "Sortie sur la console"
+
+#: tools/list/tools_config_widget.cpp:53
+msgid "Output type:"
+msgstr ""
+
+#: common/cli/cli_main.cpp:63
+msgid "Overwrite files and answer \"yes\" to questions."
+msgstr "Ecrase les fichiers et répond « oui » aux questions."
+
+#: progs/direct/base/direct_prog_config.cpp:32
+msgid "P16PRO40 7407"
+msgstr "P16PRO40 7407"
+
+#: progs/direct/base/direct_prog_config.cpp:30
+msgid "P16PRO40 classic"
+msgstr "P16PRO40 classique"
+
+#: progs/direct/base/direct_prog_config.cpp:36
+msgid "P16PRO40-VPP40 7407"
+msgstr "P16PRO40-VPP40 7407"
+
+#: progs/direct/base/direct_prog_config.cpp:34
+msgid "P16PRO40-VPP40 classic"
+msgstr "P16PRO40-VPP40 classique"
+
+#: devices/base/generic_device.cpp:46
+msgid "PDIP"
+msgstr "PDIP"
+
+#: devices/pic/pic/pic_group.h:25
+msgid "PIC"
+msgstr "PIC"
+
+#: progs/direct/base/direct_prog_config.cpp:47
+msgid "PIC Elmer"
+msgstr "PIC Elmer"
+
+#: coff/base/coff.cpp:28
+msgid "PIC30"
+msgstr "PIC30"
+
+#: tools/pic30/pic30.h:33
+msgid "PIC30 Toolchain"
+msgstr "Chaîne d'outils PIC30"
+
+#: tools/picc/picc.h:76 coff/base/coff_object.cpp:37
+msgid "PICC Compiler"
+msgstr "Compilateur PICC"
+
+#: tools/picc/picc.h:64
+msgid "PICC Lite Compiler"
+msgstr "Compilateur PICC Lite"
+
+#: tools/picc/picc.h:88
+msgid "PICC-18 Compiler"
+msgstr "Compilateur PICC-18"
+
+#: progs/pickit1/base/pickit1_prog.h:35
+msgid "PICkit1"
+msgstr "PICkit1"
+
+#: progs/pickit2/base/pickit2_prog.h:37
+msgid "PICkit2 Firmware 1.x"
+msgstr "Micrologiciel 1.x PICkit2"
+
+#: progs/pickit2v2/base/pickit2v2_prog.h:39
+msgid "PICkit2 Firmware 2.x"
+msgstr "Micrologiciel 2.x PICkit2"
+
+#: devices/base/generic_device.cpp:59
+msgid "PLCC"
+msgstr "PLCC"
+
+#: devices/pic/base/pic_config.cpp:201
+msgid "PLL clock (divided by)"
+msgstr "Horloge PLL (divisée par)"
+
+#: devices/pic/base/pic_config.cpp:223
+msgid "PMP pin select bit"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:103
+msgid "PORTB A/D"
+msgstr "PORTB A/D"
+
+#: devices/pic/base/pic_config.cpp:131
+msgid "PWM multiplexed onto RE6 and RE3"
+msgstr "PWM multiplexé sur RE6 et RE3"
+
+#: devices/pic/base/pic_config.cpp:133
+msgid "PWM multiplexed onto RE6 and RE5"
+msgstr "PWM multiplexé sur RE6 et RE5"
+
+#: devices/pic/base/pic_config.cpp:132
+msgid "PWM multiplexed onto RH7 and RH4"
+msgstr "PWM multiplexé sur RH7 et RH4"
+
+#: devices/pic/base/pic_config.cpp:134
+msgid "PWM multiplexed onto RH7 and RH6"
+msgstr "PWM multiplexé sur RH7 et RH6"
+
+#: devices/pic/base/pic_config.cpp:113
+msgid "PWM output pin reset state"
+msgstr "État à la réinitialisation de la broche de sortie PWM"
+
+#: devices/pic/base/pic_config.cpp:121
+msgid "PWM4 mux"
+msgstr "Multiplexeur PWM4"
+
+#: devices/base/device_group.cpp:251
+msgid "Packaging"
+msgstr "Boîtier"
+
+#: coff/base/cdb_parser.cpp:29
+msgid "Paged Pointer"
+msgstr "Pointeur paginé"
+
+#: progs/gui/port_selector.cpp:21
+msgid "Parallel"
+msgstr "Parallèle"
+
+#: common/port/port.cpp:62
+msgid "Parallel Port"
+msgstr "Port parallèle"
+
+#: coff/base/text_coff.cpp:245
+msgid "Parsing COFF file is not supported for this device or an error occured."
+msgstr "L'analyse du fichier COFF n'est pas prise en charge pour ce circuit ou bien une erreur est survenue."
+
+#: progs/manager/debug_manager.cpp:84
+msgid "Parsing COFF file: %1"
+msgstr "Analyse du fichier COFF : %1"
+
+#: progs/base/generic_prog.cpp:24
+msgid "Pass"
+msgstr "Passé"
+
+#: common/cli/cli_main.cpp:51
+msgid "Perform the requested command."
+msgstr "Effectuer la commande demandée."
+
+#: devices/pic/base/pic_config.cpp:269
+msgid "Peripheral pin select configuration"
+msgstr ""
+
+#: progs/picdem_bootloader/base/picdem_bootloader_prog.h:31
+msgid "Picdem Bootloader"
+msgstr "Chargeur de démarrage Picdem"
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader_prog.h:32
+msgid "Pickit2 Bootloader"
+msgstr "Chargeur de démarrage Pickit2"
+
+#: progs/psp/base/psp_prog.h:37
+msgid "Picstart Plus"
+msgstr "Picstart Plus"
+
+#: common/common/purl_base.cpp:58
+msgid "Pikdev Project File"
+msgstr "Fichier de projet Pikdev"
+
+#: piklab/main.cpp:21
+msgid "Piklab"
+msgstr "Piklab"
+
+#: piklab-coff/main.cpp:278
+msgid "Piklab COFF Utility"
+msgstr "Utilitaire Piklab pour les fichiers COFF"
+
+#: piklab-hex/main.cpp:287
+msgid "Piklab Hex Utility"
+msgstr "Utilitaire Piklab pour les fichiers hexadécimaux"
+
+#: piklab-prog/cmdline.cpp:453
+msgid "Piklab Programmer Utility"
+msgstr "Utilitaire programmeur de Piklab"
+
+#: progs/gui/port_selector.cpp:68
+msgid "Piklab has been compiled without support for USB port."
+msgstr "Piklab a été compilé sans la prise en charge du port USB."
+
+#: progs/gui/port_selector.cpp:65
+msgid "Piklab has been compiled without support for parallel port."
+msgstr "Piklab a été compilé sans la prise en charge du port parallèle."
+
+#: libgui/device_gui.cpp:418
+msgid "Pin Diagrams"
+msgstr "Schémas de brochage"
+
+#: progs/direct/gui/direct_config_widget.cpp:34
+msgid "Pin assignment"
+msgstr "Affectation des broches"
+
+#: libgui/likeback.cpp:545
+msgid "Please briefly describe the bug you encountered."
+msgstr "Décrivez brièvement le bogue que vous avez découvert."
+
+#: libgui/likeback.cpp:538
+msgid "Please briefly describe what you do not like."
+msgstr "Décrivez brièvement ce que vous n'aimez pas."
+
+#: libgui/likeback.cpp:531
+msgid "Please briefly describe what you like."
+msgstr "Décrivez brièvement ce que vous aimez."
+
+#: piklab-prog/cmdline.cpp:333
+msgid "Please check installation of selected software debugger."
+msgstr "Veuillez vérifier l'installation du logiciel de débogage sélectionné."
+
+#: devices/pic/gui/pic_group_ui.cpp:79
+msgid "Please compile the current project"
+msgstr "Veuillez compiler le projet courant"
+
+#: libgui/likeback.cpp:394
+msgid "Please provide your email address."
+msgstr "Veuillez fournir votre adresse courriel."
+
+#: common/nokde/nokde_kcmdlineargs.cpp:654
+msgid "Please use %1 to report bugs, do not mail the authors directly.\n"
+msgstr "Veuillez signaler les bogues (en anglais) sur %1 et ne pas écrire directement aux auteurs.\n"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:652
+msgid "Please use http://bugs.kde.org to report bugs, do not mail the authors directly.\n"
+msgstr "Veuillez signaler les bogues (en anglais) sur http://bugs.kde.org et ne pas écrire directement aux auteurs.\n"
+
+#: coff/base/coff_object.cpp:178
+msgid "Pointer"
+msgstr "Pointeur"
+
+#: progs/gui/prog_config_center.cpp:119
+msgid "Port Selection"
+msgstr "Sélection du port"
+
+#: progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp:20
+msgid "Port Speed:"
+msgstr "Vitesse du port :"
+
+#: progs/direct/base/direct.cpp:27
+msgid "Power (Vdd)"
+msgstr "Alimentation (Vdd)"
+
+#: progs/base/prog_config.cpp:72
+msgid "Power down target after programming."
+msgstr "Désalimenter la cible après la programmation."
+
+#: devices/pic/base/pic_config.cpp:190
+msgid "Power-on reset timer value (ms)"
+msgstr "Valeur du temporisateur d'allumage à la réinitialisation (ms)"
+
+#: devices/pic/base/pic_config.cpp:37
+msgid "Power-up timer"
+msgstr "Temporisateur de démarrage"
+
+#. i18n: file ./data/app_data/piklabui.rc line 83
+#: rc.cpp:27
+#, no-c-format
+msgid "Pr&ogrammer"
+msgstr "Pr&ogrammateur"
+
+#: progs/base/prog_config.cpp:75
+msgid "Preserve data EEPROM when programming."
+msgstr "Préserver la mémoire de données EEPROM pendant la programmation."
+
+#: devices/pic/base/pic_config.cpp:143
+msgid "Primary"
+msgstr "Primaire"
+
+#: devices/pic/base/pic_config.cpp:251
+msgid "Primary oscillator"
+msgstr "Oscillateur primaire"
+
+#: devices/pic/base/pic_config.cpp:145 devices/pic/base/pic_config.cpp:256
+msgid "Primary oscillator mode"
+msgstr "Mode de l'oscillateur primaire"
+
+#: devices/pic/base/pic_config.cpp:252
+msgid "Primary oscillator with PLL"
+msgstr "Oscillateur primaire avec PLL"
+
+#: progs/icd2/base/icd2_usb.cpp:77
+msgid "Problem connecting ICD2: please try again after unplug-replug."
+msgstr "Problème lors de la connexion à l'ICD2 : veuillez réessayer après l'avoir débranché et rebranché."
+
+#: devices/pic/base/pic_config.cpp:92
+msgid "Processor mode"
+msgstr "Mode processeur"
+
+#: devices/pic/base/pic.cpp:34
+msgid "Program Executive"
+msgstr "Exécutif de programmation"
+
+#: libgui/toplevel.cpp:144
+msgid "Program Log"
+msgstr "Journal de programmation"
+
+#: progs/base/prog_config.cpp:76
+msgid "Program data EEPROM."
+msgstr "Programmer l'EEPROM de données."
+
+#: libgui/global_config.cpp:21
+msgid "Program device after successful build."
+msgstr "Programmer le circuit après une construction réussie."
+
+#: piklab-prog/cmdline.cpp:41
+msgid "Program device memory: \"program <hexfilename>\"."
+msgstr "Programmer la mémoire du circuit : « program <nom_fichier_hex> »."
+
+#: progs/gui/prog_group_ui.cpp:56
+msgid "Programmer"
+msgstr "Programmateur"
+
+#: progs/gui/prog_config_center.h:23 progs/gui/prog_config_center.h:24
+msgid "Programmer Options"
+msgstr "Options du programmateur"
+
+#: progs/gui/prog_config_center.h:35 progs/gui/prog_config_center.h:36
+msgid "Programmer Selection"
+msgstr "Sélection du programmateur"
+
+#. i18n: file ./data/app_data/piklabui.rc line 161
+#: rc.cpp:48
+#, no-c-format
+msgid "Programmer Toolbar"
+msgstr "Barre d'outils du programmateur"
+
+#: devices/pic/prog/pic_prog_specific.cpp:15
+msgid "Programmer Vpp"
+msgstr "Vpp du programmateur"
+
+#: piklab-prog/cli_interactive.cpp:54
+msgid "Programmer hardware configuration to use (for direct programmer)."
+msgstr "Configuration matérielle du programmateur à utiliser (pour les programmateurs parallèles)."
+
+#: progs/gui/prog_config_center.cpp:41
+msgid "Programmer in use:"
+msgstr "Programmateur en cours d'utilisation :"
+
+#: piklab-prog/cmdline.cpp:270
+msgid "Programmer is already disconnected."
+msgstr "Le programmateur est déjà déconnecté."
+
+#: piklab-prog/cmdline.cpp:274
+msgid "Programmer is already running."
+msgstr "Le programmateur est déjà en fonctionnement."
+
+#: piklab-prog/cmdline.cpp:278
+msgid "Programmer is already stopped."
+msgstr "Le programmateur est déjà arrêté."
+
+#: progs/base/generic_prog.cpp:134
+msgid "Programmer is in bootload mode."
+msgstr "Le programmateur est en mode de chargement du code de démarrage."
+
+#: piklab-prog/cmdline.cpp:158
+msgid "Programmer not specified."
+msgstr "Le programmateur n'a pas été spécifié."
+
+#: piklab-prog/cli_interactive.cpp:57
+msgid "Programmer port (\"usb\" or device such as \"/dev/ttyS0\")"
+msgstr "Port du programmateur (« usb » ou périphérique comme « /dev/ttyS0 »)"
+
+#: piklab-prog/cli_interactive.cpp:53
+msgid "Programmer to use."
+msgstr "Programmateur à utiliser."
+
+#: tools/list/device_info.cpp:59
+msgid "Programmers"
+msgstr "Programmateurs"
+
+#: tools/list/device_info.cpp:34
+msgid "Programming Specifications"
+msgstr "Spécifications de programmation"
+
+#: devices/pic/prog/pic_prog.cpp:710
+msgid "Programming calibration data needs a chip erase. Continue anyway?"
+msgstr "La programmation de la donnée de calibration nécessite un effacement du circuit. Continuer malgré tout ?"
+
+#: devices/pic/prog/pic_prog.cpp:738
+msgid "Programming calibration successful"
+msgstr "La programmation de la calibration a réussi"
+
+#: devices/pic/prog/pic_prog.cpp:735 devices/pic/prog/pic_prog.cpp:736
+msgid "Programming calibration..."
+msgstr "Programmation de la calibration..."
+
+#: progs/icd2/base/icd2_debug.cpp:272
+msgid "Programming device for debugging test..."
+msgstr "Programmation du circuit pour le test de débogage..."
+
+#: progs/icd2/base/icd2_debug.cpp:277 progs/base/generic_prog.cpp:341
+msgid "Programming device memory..."
+msgstr "Programmation de la mémoire du circuit..."
+
+#: libgui/toplevel.cpp:849
+msgid "Programming in progress. Cannot be aborted."
+msgstr "Programmation en cours. Impossible d'annuler."
+
+#: progs/icd2/base/icd2_debug.cpp:279
+msgid "Programming successful"
+msgstr "Programmation réussie"
+
+#: progs/base/generic_prog.cpp:343
+msgid "Programming successful."
+msgstr "Programmation réussie."
+
+#: progs/base/generic_prog.cpp:33
+msgid "Programming..."
+msgstr "Programmation..."
+
+#: libgui/project_manager.cpp:190
+msgid "Project"
+msgstr "Projet"
+
+#: libgui/project_wizard.cpp:187
+msgid "Project \"%1\"already exists. Overwrite it?"
+msgstr "Le fichier « %1 » existe déjà. Voulez-vous l'écraser ?"
+
+#: common/common/purl_base.cpp:51
+msgid "Project File"
+msgstr "Fichier de projet"
+
+#: common/common/purl_base.cpp:127
+msgid "Project Files"
+msgstr "Fichiers de projet"
+
+#: libgui/toplevel.cpp:121
+msgid "Project Manager"
+msgstr "Gestionnaire de projet"
+
+#: libgui/project_editor.cpp:21
+msgid "Project Options"
+msgstr "Options du projet"
+
+#: libgui/toplevel.cpp:234
+msgid "Project Options..."
+msgstr "Options du projet..."
+
+#. i18n: file ./data/app_data/piklabui.rc line 145
+#: rc.cpp:42
+#, no-c-format
+msgid "Project Toolbar"
+msgstr "Barre d'outils du projet"
+
+#: libgui/project_manager.cpp:526
+msgid "Project already loaded. Reload?"
+msgstr "Le projet est déjà chargé. Le recharger ?"
+
+#: libgui/project.cpp:24
+msgid "Project file %1 does not exist."
+msgstr "Le fichier de projet « %1 » n'existe pas."
+
+#: libgui/project_wizard.cpp:171
+msgid "Project name is empty."
+msgstr "Le nom du projet est vide."
+
+#: progs/direct/base/direct_prog_config.cpp:64
+msgid "Propic2 Vpp-1"
+msgstr "Propic2 Vpp-1"
+
+#: progs/direct/base/direct_prog_config.cpp:66
+msgid "Propic2 Vpp-2"
+msgstr "Propic2 Vpp-2"
+
+#: progs/direct/base/direct_prog_config.cpp:68
+msgid "Propic2 Vpp-3"
+msgstr "Propic2 Vpp-3"
+
+#: devices/pic/gui/pic_config_word_editor.cpp:93
+msgid "Protected Mask:"
+msgstr "Masque protégé :"
+
+#: devices/pic/prog/pic_prog.cpp:635
+msgid "Protecting code memory or data EEPROM on OTP devices is disabled as a security..."
+msgstr "La protection de la mémoire code ou donnée EEPROM sur les circuits OTP est désactivée par sécurité..."
+
+#: devices/base/generic_device.cpp:57
+msgid "QFN"
+msgstr "QFN"
+
+#: devices/base/generic_device.cpp:58
+msgid "QFN-S"
+msgstr "QFN-S"
+
+#: piklab-prog/cli_interactive.cpp:38
+msgid "Quit."
+msgstr "Quitter."
+
+#: libgui/toplevel.cpp:298
+msgid "R&eset"
+msgstr "Ré&initialiser"
+
+#: libgui/toplevel.cpp:276
+msgid "R&estart"
+msgstr "R&edémarrer"
+
+#: libgui/text_editor.cpp:171
+msgid "R/O"
+msgstr "lecture seule"
+
+#: devices/base/generic_device.cpp:28
+msgid "ROM"
+msgstr "ROM"
+
+#: devices/base/generic_device.cpp:29
+msgid "ROM-less"
+msgstr "Sans ROM"
+
+#: devices/pic/gui/pic_config_word_editor.cpp:78
+msgid "Raw Blank Value:"
+msgstr "Valeur vierge brute :"
+
+#: devices/pic/gui/pic_config_word_editor.cpp:68
+msgid "Raw Value:"
+msgstr "Valeur brute :"
+
+#: devices/gui/memory_editor.cpp:278
+msgid "Re&load"
+msgstr "Re&charger"
+
+#: progs/manager/debug_manager.cpp:317
+msgid "Reached breakpoint."
+msgstr "Point d'arrêt atteint."
+
+#: devices/pic/gui/pic_register_view.cpp:83 progs/gui/prog_group_ui.cpp:34
+#: progs/gui/prog_group_ui.cpp:45 libgui/toplevel.cpp:953
+msgid "Read"
+msgstr "Lire"
+
+#: devices/pic/gui/pic_register_view.cpp:262
+msgid "Read All"
+msgstr "Tout lire"
+
+#: libgui/hex_editor.cpp:39
+msgid "Read Only Mode"
+msgstr "Mode lecture seule"
+
+#: piklab-prog/cmdline.cpp:45
+msgid "Read device memory: \"read <hexfilename>\"."
+msgstr "Lire la mémoire du circuit : « read <nom_fichier_hex> »."
+
+#: devices/pic/prog/pic_prog.cpp:275
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:78
+msgid "Read id does not match the specified device name \"%1\"."
+msgstr "L'identifiant lu ne correspond pas au nom de circuit spécifié « %1 »."
+
+#: devices/pic/prog/pic_prog.cpp:273
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:76
+msgid "Read id: %1"
+msgstr "Identifiant lu : %1"
+
+#: piklab-prog/cli_interactive.cpp:45
+msgid "Read or set a register or variable: \"x PORTB\" or \"x W 0x1A\"."
+msgstr "Lire ou définir un registre ou une variable : « x PORTB » ou « x W 0x1A »."
+
+#: piklab-prog/cli_interactive.cpp:343
+#, fuzzy
+msgid "Read string is different than expected: %1 (%2)."
+msgstr "La chaîne lue est différente de celle qui était attendue : %1 (%2)"
+
+#: piklab-prog/cmdline.cpp:291 piklab-prog/cmdline.cpp:296
+#: piklab-prog/cmdline.cpp:301
+msgid "Reading device memory not supported for specified programmer."
+msgstr "La lecture de la mémoire programme n'est pas prise en charge par le programmateur spécifié."
+
+#: progs/base/generic_prog.cpp:319
+msgid "Reading device memory..."
+msgstr "Lecture de la mémoire du circuit..."
+
+#: progs/base/generic_prog.cpp:322
+msgid "Reading done."
+msgstr "Lecture effectuée."
+
+#: progs/base/generic_prog.cpp:32
+msgid "Reading..."
+msgstr "Lecture..."
+
+#: progs/base/generic_debug.cpp:48
+msgid "Ready to start debugging."
+msgstr "Prêt à démarrer le débogage."
+
+#: progs/icd2/base/icd2.cpp:212
+msgid "Received length too short."
+msgstr "La longueur reçue est trop courte."
+
+#: progs/icd2/base/icd2.cpp:216
+msgid "Received string too short."
+msgstr "La chaîne reçue est trop courte."
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:107
+msgid "Received unexpected character ('%1' received; 'K' expected)."
+msgstr "Un caractère inattendu a été reçu (« %1 » reçu, « K » attendu)."
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:104
+msgid "Received unexpected character ('%1' received; 'K' or 'N' expected)."
+msgstr "Un caractère inattendu a été reçu (« %1 » reçu, « K » ou « N » attendu)."
+
+#: libgui/toplevel.cpp:905
+msgid "Recompile First"
+msgstr "Recompiler d'abord"
+
+#: progs/gui/prog_group_ui.cpp:36
+msgid "Regenerating..."
+msgstr "Regénération en cours..."
+
+#: coff/base/coff_object.cpp:145
+msgid "Register Parameter"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:58
+msgid "Register Space"
+msgstr "Espace registres"
+
+#: coff/base/coff_object.cpp:132
+msgid "Register Variable"
+msgstr ""
+
+#: libgui/editor_manager.cpp:489 libgui/watch_view.cpp:48
+#: libgui/project_manager_ui.cpp:127
+msgid "Registers"
+msgstr "Registres"
+
+#: devices/pic/gui/pic_register_view.cpp:273
+msgid "Registers information not available."
+msgstr "L'information sur les registres n'est pas disponible."
+
+#: coff/base/coff_object.cpp:248
+msgid "Relocation address beyong section size: %1/%2"
+msgstr "Translation d'adresse au-delà de la taille de la section : %1/%2"
+
+#: coff/base/coff_object.cpp:251
+msgid "Relocation has unknown symbol: %1"
+msgstr "La translation a un symbole inconnu : %1"
+
+#: coff/base/coff_object.cpp:255
+msgid "Relocation is an auxiliary symbol: %1"
+msgstr ""
+
+#: common/gui/editlistbox.cpp:131
+msgid "Remove All"
+msgstr "Supprimer tout"
+
+#: libgui/project_manager.cpp:208
+msgid "Remove From Project"
+msgstr "Supprimer du projet"
+
+#: libgui/breakpoint_view.cpp:24
+msgid "Remove breakpoint"
+msgstr "Supprimer un point d'arrêt"
+
+#: tools/list/compile_process.cpp:28
+msgid "Replaced by \"xxx\" when \"wine\" is used."
+msgstr "Remplacé par « xxx » quand « wine » est utilisé."
+
+#: tools/list/compile_process.cpp:29
+msgid "Replaced by \"xxx\" when the device name is specified."
+msgstr "Remplacé par « xxx » quand le nom du périphérique est spécifié."
+
+#: tools/list/compile_process.cpp:27
+msgid "Replaced by \"xxx\" when there is a custom linker script."
+msgstr "Remplacé par « xxx » quand il y a un script éditeur de liens personnalisé."
+
+#: tools/list/compile_process.cpp:45
+msgid "Replaced by a separation into two arguments."
+msgstr "Remplacé par une séparation en deux arguments"
+
+#: tools/list/compile_process.cpp:34
+msgid "Replaced by the COFF filename."
+msgstr "Remplacé par le nom du fichier COFF."
+
+#: tools/list/compile_process.cpp:39
+msgid "Replaced by the device family name (when needed)."
+msgstr "Remplacé par le nom de la famille du circuit (quand cela est nécessaire)."
+
+#: tools/list/compile_process.cpp:38
+msgid "Replaced by the device name."
+msgstr "Remplacé par le nom du circuit."
+
+#: tools/list/compile_process.cpp:43
+msgid "Replaced by the linker script basename."
+msgstr "Remplacé par le nom de base du fichier de script éditeur de liens."
+
+#: tools/list/compile_process.cpp:44
+msgid "Replaced by the linker script filename."
+msgstr "Remplacé par le nom du fichier de script éditeur de liens."
+
+#: tools/list/compile_process.cpp:42
+msgid "Replaced by the linker script path."
+msgstr "Remplacé par le chemin du fichier de script éditeur de liens."
+
+#: tools/list/compile_process.cpp:37
+msgid "Replaced by the list filename."
+msgstr "Remplacé par le nom du fichier de listage."
+
+#: tools/list/compile_process.cpp:31
+msgid "Replaced by the list of additionnal libraries."
+msgstr "Remplacé par la liste de bibliothèques supplémentaires."
+
+#: tools/list/compile_process.cpp:30
+msgid "Replaced by the list of additionnal objects."
+msgstr "Remplacé par la liste des objets supplémentaires."
+
+#: tools/list/compile_process.cpp:35
+msgid "Replaced by the map filename."
+msgstr "Remplacé par le nom du fichier carte."
+
+#: tools/list/compile_process.cpp:41
+msgid "Replaced by the object file name."
+msgstr "Remplacé par le nom du fichier objet."
+
+#: tools/list/compile_process.cpp:32
+msgid "Replaced by the output filename."
+msgstr "Remplacé par le nom du fichier de sortie."
+
+#: tools/list/compile_process.cpp:33
+msgid "Replaced by the project name."
+msgstr "Remplacé par le nom du projet."
+
+#: tools/list/compile_process.cpp:40
+msgid "Replaced by the relative input filepath(s)."
+msgstr "Remplacé par le nom relatif du ou des fichiers d'entrée."
+
+#: tools/list/compile_process.cpp:26
+msgid "Replaced by the source directory."
+msgstr "Remplacé par le répertoire source."
+
+#: tools/list/compile_process.cpp:36
+msgid "Replaced by the symbol filename."
+msgstr "Remplacé par le nom du fichier des symboles."
+
+#: libgui/toplevel.cpp:325
+msgid "Report Bug..."
+msgstr "Signaler un bogue..."
+
+#: libgui/likeback.cpp:182
+msgid "Report a bug."
+msgstr "Signaler un bogue."
+
+#: libgui/device_gui.cpp:99
+msgid "Reset Filters"
+msgstr "Réinitialiser les filtres"
+
+#: devices/pic/prog/pic_prog_specific.cpp:23
+msgid "Reset Held"
+msgstr "Réinitialisation maintenue"
+
+#: devices/pic/prog/pic_prog_specific.cpp:23
+msgid "Reset Released"
+msgstr "Réinitialisation relâchée"
+
+#: devices/pic/base/pic_config.cpp:194
+msgid "Reset into clip on emulation mode"
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:193
+msgid "Reset.<Translators: please translate the past form of the verb>"
+msgstr "Remis à zéro."
+
+#: progs/manager/prog_manager.cpp:196
+msgid "Restarting..."
+msgstr "Redémarrage..."
+
+#: progs/icd1/gui/icd1_group_ui.cpp:20
+msgid "Result:"
+msgstr "Résultat :"
+
+#: piklab-hex/main.cpp:29
+msgid "Return checksum."
+msgstr "Donne la somme de contrôle."
+
+#: piklab-coff/main.cpp:25
+msgid "Return general informations."
+msgstr "Afficher les informations générales."
+
+#: piklab-hex/main.cpp:26
+msgid "Return information about hex file."
+msgstr "Donne des informations sur le fichier hexadécimal."
+
+#: piklab-coff/main.cpp:29
+msgid "Return informations about code lines (for object)."
+msgstr ""
+
+#: piklab-coff/main.cpp:30
+msgid "Return informations about files."
+msgstr ""
+
+#: piklab-coff/main.cpp:28
+msgid "Return informations about sections (for object)."
+msgstr ""
+
+#: piklab-coff/main.cpp:27
+msgid "Return informations about symbols."
+msgstr ""
+
+#: piklab-coff/main.cpp:26
+msgid "Return informations about variables (for object)."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:57
+msgid "Return the list of detected ports."
+msgstr "Renvoyer la liste des ports détectés."
+
+#: piklab-prog/cmdline.cpp:58
+msgid "Return the list of memory ranges."
+msgstr "Renvoyer la liste des gammes de mémoire."
+
+#: common/cli/cli_main.cpp:52
+msgid "Return the list of recognized commands."
+msgstr "Renvoyer la liste des commandes reconnues."
+
+#: piklab-hex/main.cpp:38 piklab-prog/cli_interactive.cpp:55
+#: piklab-coff/main.cpp:38
+msgid "Return the list of supported devices."
+msgstr "Renvoyer la liste des circuits pris en charge."
+
+#: piklab-hex/main.cpp:39
+msgid "Return the list of supported fill options."
+msgstr "Renvoyer la liste des options de remplissage."
+
+#: piklab-prog/cli_interactive.cpp:56
+msgid "Return the list of supported hex file formats."
+msgstr "Renvoyer la liste des formats de fichiers hexadécimaux pris en charge."
+
+#: piklab-prog/cli_interactive.cpp:54
+msgid "Return the list of supported programmer hardware configurations."
+msgstr "Renvoyer la liste des configurations matérielles des programmateurs pris en charge."
+
+#: piklab-prog/cli_interactive.cpp:53
+msgid "Return the list of supported programmers."
+msgstr "Renvoyer la liste des programmateurs pris en charge."
+
+#: coff/base/coff_object.cpp:331
+msgid "Rom Data"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:37
+msgid "Run device (release reset)."
+msgstr "Lancer le circuit (relâcher la réinitialisation)."
+
+#: progs/base/prog_config.cpp:77
+msgid "Run device after successful programming."
+msgstr "Démarrer le circuit après une programmation réussie."
+
+#: progs/base/generic_prog.cpp:224
+msgid "Run..."
+msgstr "Exécute..."
+
+#: devices/pic/prog/pic_prog_specific.cpp:19
+msgid "Running"
+msgstr "En exécution"
+
+#: progs/manager/debug_manager.cpp:240 progs/base/generic_prog.cpp:221
+msgid "Running..."
+msgstr "Exécution..."
+
+#: coff/base/cdb_parser.cpp:38
+msgid "SBIT"
+msgstr "SBIT"
+
+#: coff/base/cdb_parser.cpp:57
+msgid "SBIT Space"
+msgstr "Espace SBIT"
+
+#: devices/pic/base/pic_config.cpp:78
+msgid "SBODEN controls BOD function"
+msgstr "SBODEN contrôle la fonction BOD"
+
+#: progs/sdcdb/base/sdcdb_debug.h:76
+msgid "SDCDB"
+msgstr "SDCDB"
+
+#: devices/base/generic_device.cpp:47
+msgid "SDIP"
+msgstr "SDIP"
+
+#: coff/base/cdb_parser.cpp:56
+msgid "SFR Space"
+msgstr "Espace SFR"
+
+#: devices/pic/gui/pic_group_ui.cpp:41
+msgid "SFRs"
+msgstr "SFRs"
+
+#: devices/base/generic_device.cpp:53
+msgid "SOIC"
+msgstr "SOIC"
+
+#: devices/base/generic_device.cpp:49
+msgid "SOT-23"
+msgstr "SOT-23"
+
+#: devices/base/generic_device.cpp:48
+msgid "SPDIP"
+msgstr "SPDIP"
+
+#: devices/base/generic_device.cpp:51
+msgid "SSOP"
+msgstr "SSOP"
+
+#: devices/pic/base/pic.cpp:73
+msgid "SSP"
+msgstr "SSP"
+
+#: devices/pic/base/pic_config.cpp:122
+msgid "SSP I/O mux (SCK/SLC, SDA/SDI, SD0)"
+msgstr "Multiplexeur d'E/S SSP (SCK/SLC, SDA/SDI, SD0)"
+
+#: piklab-prog/cli_interactive.cpp:62
+msgid "Same as \"device\"."
+msgstr "Équivalent à « device »."
+
+#: libgui/toplevel.cpp:190
+msgid "Save All"
+msgstr "Tout enregistrer"
+
+#: libgui/editor.cpp:53
+msgid "Save File"
+msgstr "Enregistrer le fichier"
+
+#: libgui/log_view.cpp:132
+msgid "Save log to file"
+msgstr "Enregistrer le journal dans un fichier"
+
+#: piklab-hex/main.cpp:94
+msgid "Second hex file: "
+msgstr "Deuxième fichier hexadécimal :"
+
+#: devices/pic/base/pic_config.cpp:253
+msgid "Secondary oscillator (LP)"
+msgstr "Oscillateur secondaire (LP)"
+
+#: coff/base/coff_object.cpp:55 coff/base/coff_object.cpp:155
+msgid "Section"
+msgstr "Section"
+
+#: piklab-coff/main.cpp:164
+msgid "Sections:"
+msgstr "Sections :"
+
+#: devices/pic/base/pic_protection.cpp:357
+msgid "Secure Segment"
+msgstr "Segment de sécurité"
+
+#: devices/pic/base/pic_config.cpp:240
+msgid "Secure segment EEPROM size"
+msgstr "Taille de l'EEPROM du segment sécurisé"
+
+#: devices/pic/base/pic_config.cpp:241
+msgid "Secure segment RAM size"
+msgstr "Taille de la RAM du segment de sécurité"
+
+#: devices/pic/base/pic_config.cpp:237
+msgid "Secure segment security"
+msgstr "Sécurité du segment sécurisé"
+
+#: devices/pic/base/pic_config.cpp:236
+msgid "Secure segment size"
+msgstr "Taille du segment sécurisé"
+
+#: devices/pic/base/pic_config.cpp:235
+msgid "Secure segment write-protection"
+msgstr "Protection en écriture du segment sécurisé"
+
+#: libgui/project_manager.cpp:222
+msgid "Select Device..."
+msgstr "Sélectionner un circuit..."
+
+#: common/gui/purl_gui.cpp:118
+msgid "Select Directory"
+msgstr "Sélectionner un répertoire"
+
+#: common/gui/purl_gui.cpp:147
+msgid "Select File"
+msgstr "Sélectionner un fichier"
+
+#: libgui/project_wizard.cpp:89
+msgid "Select Files"
+msgstr "Sélectionner des fichiers"
+
+#: libgui/project_manager.cpp:170
+msgid "Select Linker Script"
+msgstr "Sélectionner le script éditeur de liens"
+
+#: libgui/project_manager.cpp:298
+msgid "Select Object File"
+msgstr "Sélectionner un fichier objet"
+
+#: libgui/project_manager.cpp:335
+msgid "Select Project file"
+msgstr "Sélectionner un fichier de projet"
+
+#: libgui/project_manager.cpp:289
+msgid "Select Source File"
+msgstr "Sélectionner un fichier source"
+
+#: libgui/device_gui.cpp:87
+msgid "Select a device"
+msgstr "Choisir un circuit"
+
+#: devices/pic/base/pic.cpp:83
+msgid "Self-Write"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:85
+msgid "Self-test"
+msgstr "Auto-test"
+
+#: progs/icd2/base/icd2_prog.cpp:56
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:105
+msgid "Self-test failed (%1). Do you want to continue anyway?"
+msgstr "L'auto-test a échoué (%1). Continuer malgré tout ?"
+
+#: progs/icd1/base/icd1.cpp:109
+msgid "Self-test failed (returned value is %1)"
+msgstr "L'auto-test a échoué (la valeur renvoyée est %1)"
+
+#: progs/icd1/base/icd1_prog.cpp:29
+msgid "Self-test failed. Do you want to continue anyway?"
+msgstr "L'auto-test a échoué. Continuer malgré tout ?"
+
+#: progs/icd2/base/icd2_prog.cpp:55
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:104
+msgid "Self-test failed: %1"
+msgstr "L'auto-test a échoué : %1"
+
+#: libgui/likeback.cpp:582
+msgid "Send"
+msgstr "Envoi"
+
+#: progs/direct/gui/direct_config_widget.cpp:78
+#: progs/direct/gui/direct_config_widget.cpp:98
+msgid "Send 0xA55A"
+msgstr "Envoyer 0xA55A"
+
+#: libgui/likeback.cpp:609
+msgid "Send a Comment"
+msgstr "Envoyer un commentaire"
+
+#: libgui/likeback.cpp:181
+msgid "Send a comment about what you don't like."
+msgstr "Envoyer un commentaire sur ce que vous n'avez pas aimé."
+
+#: libgui/likeback.cpp:180
+msgid "Send a comment about what you like."
+msgstr "Envoyer un commentaire sur ce que vous avez aimé."
+
+#: progs/gui/port_selector.cpp:21
+msgid "Serial"
+msgstr "Série"
+
+#: devices/mem24/mem24/mem24_group.h:25
+msgid "Serial Memory 24"
+msgstr "Mémoire série 24"
+
+#: common/port/port.cpp:61
+msgid "Serial Port"
+msgstr "Port série"
+
+#: libgui/project_manager.cpp:166
+msgid "Set Custom..."
+msgstr "Définir la personnalisation..."
+
+#: libgui/project_manager.cpp:167
+msgid "Set Default"
+msgstr "Définir la valeur par défaut"
+
+#: libgui/likeback.cpp:393
+msgid "Set Email Address"
+msgstr "Configurer l'adresse courriel"
+
+#: libgui/global_config.cpp:22
+msgid "Set User Ids to unprotected checksum (if User Ids are empty)."
+msgstr "Écrire l'identifiant utilisateur avec la somme de contrôle (si l'identifiant est vide)."
+
+#: piklab-prog/cli_interactive.cpp:46
+msgid "Set a breakpoint \"break e 0x04\" or list all breakpoints \"break\"."
+msgstr "Positionner un point d'arrêt « break e 0x04 » ou afficher tous les points d'arrêts « break »."
+
+#: libgui/breakpoint_view.cpp:24
+msgid "Set breakpoint"
+msgstr "Définir un point d'arrêt"
+
+#: piklab-prog/cli_interactive.cpp:59
+msgid "Set if target device is self-powered."
+msgstr "Définie si le circuit cible est auto-alimenté."
+
+#: piklab-prog/cli_interactive.cpp:39
+msgid "Set property value: \"set <property> <value>\" or \"<property> <value>\"."
+msgstr "Définir la valeur d'une propriété : « set <propriété> <valeur> » ou « <propriété> <valeur> »."
+
+#: devices/pic/gui/pic_memory_editor.cpp:319
+#: devices/pic/gui/pic_memory_editor.cpp:331
+msgid "Set to unprotected checksum"
+msgstr "Écrit avec la somme de contrôle non-protégée"
+
+#: progs/base/generic_debug.cpp:43
+msgid "Setting up debugging session."
+msgstr "Configuration de la session de débogage."
+
+#: libgui/toplevel.cpp:280 libgui/toplevel.cpp:304
+#, fuzzy
+msgid "Settings..."
+msgstr "Détection..."
+
+#: coff/base/cdb_parser.cpp:34 coff/base/coff_object.cpp:161
+msgid "Short"
+msgstr "Short"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:850
+msgid "Show %1 specific options"
+msgstr "Afficher les options spécifiques à %1"
+
+#: libgui/toplevel.cpp:300
+msgid "Show Program Counter"
+msgstr "Afficher le compteur programme"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:857
+msgid "Show all options"
+msgstr "Afficher toutes les options"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:858
+msgid "Show author information"
+msgstr "Afficher les informations sur l'auteur"
+
+#: libgui/global_config.cpp:23
+msgid "Show close buttons on tabs (need restart to take effect)."
+msgstr "Afficher le bouton de fermeture sur les onglets (nécessite un redémarrage pour être effectif)."
+
+#: libgui/toplevel.cpp:214
+msgid "Show disassembly location"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:842
+msgid "Show help about options"
+msgstr "Afficher l'aide sur les options"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:860
+msgid "Show license information"
+msgstr "Afficher les informations de licence"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:859
+msgid "Show version information"
+msgstr "Afficher les informations de version"
+
+#: coff/base/cdb_parser.cpp:43
+msgid "Signed"
+msgstr "Signé"
+
+#: tools/sdcc/sdcc.h:35
+msgid "Small Device C Compiler"
+msgstr "Compilateur SDCC"
+
+#: devices/pic/base/pic_config.cpp:189
+msgid "Software"
+msgstr "Logiciel"
+
+#: progs/direct/gui/direct_config_widget.cpp:28
+msgid ""
+"Some programming cards need low clock rate:\n"
+"adding delay to clock pulses might help."
+msgstr "Certaines cartes de programmation ont besoin d'une faible fréquence d'horloge : ajouter un retard aux impulsions d'horloge peut aider."
+
+#: tools/base/generic_tool.cpp:34
+msgid "Source Directory"
+msgstr "Répertoire des sources"
+
+#: piklab-coff/main.cpp:175
+msgid "Source Lines:"
+msgstr ""
+
+#: libgui/project_manager.cpp:217 libgui/project_manager_ui.cpp:34
+msgid "Sources"
+msgstr "Sources"
+
+#: piklab-prog/cli_interactive.cpp:248
+msgid "Special Function Registers:"
+msgstr "Registres à fonctions spéciales (SFR) :"
+
+#: progs/gui/prog_config_center.cpp:65
+msgid "Specific"
+msgstr "Spécifique"
+
+#: devices/pic/base/pic_config.cpp:101
+msgid "Stack full/underflow reset"
+msgstr "Réinitialisation pour débordement ou de vidage de la pile"
+
+#: libgui/project_manager.cpp:185 libgui/config_center.h:53
+#: libgui/project_manager_ui.cpp:63
+msgid "Standalone File"
+msgstr "Fichier autonome"
+
+#: libgui/config_center.h:54
+msgid "Standalone File Compilation"
+msgstr "Compilation de fichier seul"
+
+#: devices/pic/base/pic_config.cpp:232 devices/pic/base/pic_config.cpp:239
+msgid "Standard Security"
+msgstr "Sécurité standard"
+
+#: devices/pic/base/pic_config.cpp:115
+msgid "Standard operation"
+msgstr "Opération standard"
+
+#: devices/pic/base/pic_config.cpp:246
+msgid "Standard security"
+msgstr "Sécurité standard"
+
+#: piklab-prog/cli_interactive.cpp:43
+msgid "Start or restart debugging session."
+msgstr "Démarrer ou redémarrer la session de débogage."
+
+#: piklab-hex/main.cpp:140
+msgid "Start:"
+msgstr "Début :"
+
+#: piklab-prog/cli_prog_manager.cpp:61
+msgid "Starting debug session without COFF file (no source file information)."
+msgstr "Démarrage de la session de débogage sans fichier COFF (pas d'information du fichier source)."
+
+#: piklab-prog/cli_prog_manager.cpp:62
+msgid "Starting debugging session with device memory in an unknown state. You may want to reprogram the device."
+msgstr "Démarrage de la session de débogage avec la mémoire du circuit dans un état inconnu. Vous devriez reprogrammer le circuit."
+
+#: coff/base/coff_object.cpp:131
+msgid "Static Symbol"
+msgstr ""
+
+#: devices/base/device_group.cpp:228 libgui/breakpoint_view.cpp:47
+msgid "Status"
+msgstr "État"
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:21
+msgid "Status:"
+msgstr "État :"
+
+#: progs/manager/debug_manager.cpp:302
+msgid "Step"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:44
+msgid "Step one instruction."
+msgstr "Avancer d'une instruction."
+
+#: devices/pic/gui/pic_register_view.cpp:224
+msgid "Stop Watching"
+msgstr "Arrêter la surveillance"
+
+#: piklab-prog/cmdline.cpp:39
+msgid "Stop device (hold reset)."
+msgstr "Arrêter le circuit (maintenir la réinitialisation)."
+
+#: devices/pic/prog/pic_prog_specific.cpp:19
+msgid "Stopped"
+msgstr "Arrêté"
+
+#: progs/manager/prog_manager.cpp:155 progs/manager/prog_manager.cpp:175
+msgid "Stopped."
+msgstr "Arrêté."
+
+#: common/common/number.cpp:23
+msgid "String"
+msgstr "Chaîne"
+
+#: coff/base/cdb_parser.cpp:19 coff/base/cdb_parser.cpp:37
+#: coff/base/coff_object.cpp:166
+msgid "Structure"
+msgstr "Structure"
+
+#: coff/base/coff_object.cpp:138
+msgid "Structure Tag"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:85
+msgid "Subroutine to initialize W registers to 0x0000"
+msgstr "Sous-routine d'initialisation des registres W à 0x0000"
+
+#: common/global/about.cpp:88
+msgid "Support for direct programmers with bidirectionnal buffers."
+msgstr "Prise en charge pour les programmateurs direct à tampons bidirectionnels."
+
+#: devices/base/device_group.cpp:36
+msgid "Supported"
+msgstr "Pris en charge"
+
+#: common/cli/cli_main.cpp:93
+msgid "Supported commands:"
+msgstr "Commandes prises en charge :"
+
+#: piklab-prog/cmdline.cpp:115
+msgid "Supported devices for \"%1\":"
+msgstr "Circuits pris en charge par « %1 » :"
+
+#: piklab-hex/main.cpp:264 piklab-prog/cmdline.cpp:112
+#: piklab-coff/main.cpp:265
+msgid "Supported devices:"
+msgstr "Circuits pris en charge :"
+
+#: piklab-prog/cmdline.cpp:92
+msgid "Supported hardware configuration for programmers:"
+msgstr "Configurations matérielles des programmateurs prises en charge :"
+
+#: piklab-prog/cmdline.cpp:75
+msgid "Supported hex file formats:"
+msgstr "Formats de fichiers hexadécimaux pris en charge :"
+
+#: piklab-prog/cmdline.cpp:83
+msgid "Supported programmers:"
+msgstr "Programmateurs pris en charge :"
+
+#: libgui/toplevel.cpp:208
+msgid "Switch Header/Implementation"
+msgstr "Commuter entête/implémentation"
+
+#: libgui/editor_manager.cpp:37
+msgid "Switch to editor"
+msgstr "Basculer vers l'éditeur"
+
+#: libgui/toplevel.cpp:206
+msgid "Switch to..."
+msgstr "Basculer vers..."
+
+#: devices/pic/base/pic_config.cpp:137
+msgid "Switching off, monitor off"
+msgstr "Basculement désactivé, surveillance désactivée"
+
+#: devices/pic/base/pic_config.cpp:138
+msgid "Switching on, monitor off"
+msgstr "Basculement activé, surveillance désactivée"
+
+#: devices/pic/base/pic_config.cpp:139
+msgid "Switching on, monitor on"
+msgstr "Basculement activé, surveillance activée"
+
+#: coff/base/coff_object.cpp:215
+msgid "Symbol without needed auxilliary symbol (type=%1)"
+msgstr "Symbole sans symbole auxiliaire nécessaire (type=%1)"
+
+#: coff/base/coff_archive.cpp:124 piklab-coff/main.cpp:154
+msgid "Symbols:"
+msgstr "Symboles :"
+
+#: tools/gputils/gputils_generator.cpp:191
+msgid "T0CKI interrupt service routine"
+msgstr "routine de service des interruptions T0CKI"
+
+#: devices/pic/base/pic_config.cpp:117
+msgid "T1OSO/T1CKI on RA6"
+msgstr "T1OSO/T1CKI sur RA6"
+
+#: devices/pic/base/pic_config.cpp:118
+msgid "T1OSO/T1CKI on RB2"
+msgstr "T1OSO/T1CKI sur RB2"
+
+#: tools/gputils/gputils_generator.cpp:185
+msgid "TIMER0 interrupt service routine"
+msgstr "routine de service des interruptions TIMER0"
+
+#: devices/pic/base/pic_config.cpp:119
+msgid "TMR0/T5CKI external clock mux"
+msgstr "Multiplexeur de l'horloge externe TMR0/TRCKI"
+
+#: devices/base/generic_device.cpp:54
+msgid "TQFP"
+msgstr "TQFP"
+
+#: devices/base/generic_device.cpp:52
+msgid "TSSOP"
+msgstr "TSSOP"
+
+#: devices/pic/base/pic_config.cpp:30
+msgid "Table read-protection"
+msgstr "Protection en lecture des tables"
+
+#: progs/direct/base/direct_prog_config.cpp:28
+msgid "Tait 7405/7406"
+msgstr "Tait 7405/7406"
+
+#: progs/direct/base/direct_prog_config.cpp:26
+msgid "Tait classic"
+msgstr "Tait classique"
+
+#: devices/pic/prog/pic_prog_specific.cpp:15 progs/icd2/base/icd2.cpp:51
+msgid "Target Vdd"
+msgstr "Vdd de la cible"
+
+#: devices/pic/prog/pic_prog_specific.cpp:15
+msgid "Target Vpp"
+msgstr "Vpp de la cible"
+
+#: piklab-hex/main.cpp:38 piklab-prog/cli_interactive.cpp:55
+#: piklab-coff/main.cpp:38
+msgid "Target device."
+msgstr "Circuit cible."
+
+#: progs/base/prog_config.cpp:73
+msgid "Target is self-powered (when possible)."
+msgstr "La cible est auto-alimentée (lorsque c'est possible)."
+
+#: devices/pic/base/pic_config.cpp:261
+msgid "Temperature protection"
+msgstr "Protection en température"
+
+#: devices/base/device_group.cpp:291
+msgid "Temperature range: "
+msgstr "Intervalle de température : "
+
+#: libgui/config_gen.cpp:179
+msgid "Template Generator"
+msgstr "Générateur de modèle"
+
+#: coff/base/disassembler.cpp:278
+msgid "Template source file generated by piklab"
+msgstr "Fichier source modèle généré par Piklab"
+
+#: libgui/project_wizard.cpp:234
+msgid "Template source file generation not implemented yet for this toolchain..."
+msgstr "La génération de fichier source modèle n'est pas encore gérée pour cette chaîne d'outils..."
+
+#: libgui/project_wizard.cpp:240
+msgid "Template source file generation only partially implemented."
+msgstr "La génération de fichier source modèle est seulement partiellement gérée."
+
+#: common/global/about.cpp:91
+msgid "Test of PICkit2 and ICD2 programmer."
+msgstr "Test des programmateurs PICkit2 et ICD2."
+
+#: common/common/group.cpp:15
+msgid "Tested"
+msgstr ""
+
+#: tools/pic30/pic30.cpp:63
+msgid "The <a href=\"%1\">PIC30 ToolChain</a> is a toolsuite for 16-bit PICs available from Microchip. Most of it is available under the GNU Public License."
+msgstr "<a href=\"%1\">PIC30 ToolChain</a> est un ensemble d'outils pour les PIC 16 bits disponible auprès de Microchip. La plupart est distribuée sous licence GPL (GNU Public License)."
+
+#: tools/sdcc/sdcc.cpp:28
+msgid "The <a href=\"%1\">Small Devices C Compiler</a> is an open-source C compiler for several families of microcontrollers."
+msgstr "<a href=\"%1\">Small Devices C Compiler</a> est un compilateur open source qui prend en charge plusieurs familles de microcontrôleurs."
+
+#: tools/boost/boost.cpp:68
+msgid "The Boost toolchain needs to be run by Wine with \"Windows NT 4.0\" compatibility. This can be configured with the Wine configuration utility."
+msgstr "La chaîne d'outils Boost doit être lancée par Wine avec la compatibilté « Windows NT 4.0 ». Cela peut être configuré avec l'utilitaire de configuration Wine."
+
+#: progs/direct/base/direct.cpp:31
+msgid "The CLOCK pin is used to synchronize serial data of the DATA IN and DATA OUT pins."
+msgstr "La broche CLOCK est utilisée pour synchroniser les données série des broches DATA IN et DATA OUT."
+
+#: progs/direct/base/direct.cpp:37
+msgid "The DATA IN pin is used to receive data from the programmed device."
+msgstr "La broche DATA IN est utilisée pour recevoir des données du circuit programmé."
+
+#: progs/direct/base/direct.cpp:34
+msgid "The DATA OUT pin is used to send data to the programmed device."
+msgstr "La broche DATA OUT est utilisée pour envoyer des données sur le circuit programmé."
+
+#: progs/direct/base/direct.cpp:40
+msgid ""
+"The DATA RW pin selects the direction of data buffer.\n"
+"Must be set to GND if your programmer does not use bi-directionnal buffer."
+msgstr ""
+"La broche DATA RW sélectionne la direction du tampon de données.\n"
+"Elle doit être raccordée à GND si votre programmateur n'utilise pas de tampon bidirectionnel."
+
+#: libgui/toplevel.cpp:731
+msgid "The Pikloops utility (%1) is not installed in your system."
+msgstr "L'utilitaire PikLoops (%1) n'est pas installé sur votre système."
+
+#: progs/direct/base/direct.cpp:28
+msgid ""
+"The VDD pin is used to apply 5V to the programmed device.\n"
+"Must be set to GND if your programmer doesn't control the VDD line."
+msgstr ""
+"La broche VDD est utilisée pour appliquer du 5V sur le circuit programmé.\n"
+"Elle doit être raccordée à GND si votre programmateur ne contrôle pas la ligne VDD."
+
+#: progs/direct/base/direct.cpp:25
+msgid "The VPP pin is used to select the high voltage programming mode."
+msgstr "La broche VPP est utilisée pour sélectionner le mode de programmation haute tension."
+
+#: devices/pic/prog/pic_prog.cpp:675
+msgid "The calibration word %1 is not valid."
+msgstr "Le mot de calibration %1 n'est pas valide."
+
+#: progs/manager/prog_manager.cpp:65
+msgid "The current programmer \"%1\" does not support device \"%2\"."
+msgstr "Le programmateur actuel « %1 » ne prend pas en charge le circuit « %2 »."
+
+#: devices/pic/prog/pic_prog.cpp:662
+msgid "The device cannot be erased first by the selected programmer so programming may fail..."
+msgstr "Le cricuit n'a pas été d'abord effacé par le programmateur sélectionné, aussi, sa programmation peut échouer..."
+
+#: libgui/gui_prog_manager.cpp:38
+msgid "The device memory is in an unknown state. You may want to reprogram the device. Continue anyway?"
+msgstr "La mémoire du circuit est dans un état inconnu. Vous devriez reprogrammer le circuit. Continuer malgré tout ?"
+
+#: libgui/likeback.cpp:396
+msgid "The email address is optional. If you do not provide any, your comments will be sent anonymously. Just click OK in that case."
+msgstr "L'adresse courriel est optionnelle. Si vous ne la fournissez pas, vos commentaires seront envoyés de manière anonyme. Dans ce cas, cliquez sur OK."
+
+#: common/nokde/nokde_kcmdlineargs.cpp:1313
+msgid "The files/URLs opened by the application will be deleted after use"
+msgstr "Les fichiers/URL ouverts par l'application seront effacés après utilisation"
+
+#: progs/base/generic_prog.cpp:142
+msgid ""
+"The firmware version (%1) is higher than the version tested with piklab (%2%3).\n"
+"You may experience problems."
+msgstr ""
+"La version du micrologiciel (%1) est plus récente que la version testée avec Piklab (%2%3).\n"
+"Il se peut que vous rencontriez des problèmes."
+
+#: progs/base/generic_prog.cpp:158
+msgid ""
+"The firmware version (%1) is lower than the recommended version (%2%3).\n"
+"It is recommended to upgrade the firmware."
+msgstr ""
+"La version du micrologiciel (%1) est plus ancienne que la version recommandée (%2%3).\n"
+"Il vous est conseillé de mettre à jour le micrologiciel."
+
+#: progs/base/generic_prog.cpp:150
+msgid ""
+"The firmware version (%1) is lower than the version tested with piklab (%2%3).\n"
+"You may experience problems."
+msgstr ""
+"La version du micrologiciel (%1) est plus ancienne que la version testée avec Piklab (%2%3).\n"
+"Il se peut que vous rencontriez des problèmes."
+
+#: piklab-prog/cli_interactive.cpp:167
+#, fuzzy
+msgid "The first argument should be \"e\"."
+msgstr "Le premier argument doit être « e »"
+
+#: piklab-hex/main.cpp:170
+msgid "The first hex file is a subset of the second one."
+msgstr "Le premier fichier hexadécimal est contenu dans le second fichier."
+
+#: piklab-prog/cli_interactive.cpp:299
+#, fuzzy
+msgid "The given value is too large (max: %1)."
+msgstr "La valeur fournie est trop grande (max : %1)"
+
+#: progs/gui/hardware_config_widget.cpp:71
+msgid "The hardware name is already used for a standard hardware."
+msgstr "Le nom du matériel est déjà utilisé pour un matériel standard."
+
+#: progs/manager/debug_manager.cpp:113
+msgid "The number of active breakpoints is higher than the maximum for the current debugger (%1): disabling the last breakpoint."
+msgstr "Le nombre de points d'arrêt est supérieur au maximum permis par l'actuel débogueur (%1): on désactive le dernier."
+
+#: libgui/toplevel.cpp:904
+msgid "The project hex file may not be up-to-date since some project files have been modified."
+msgstr "Le fichier hexadécimal du projet peut ne pas être à jour car certains fichiers du projet ont été modifiés."
+
+#: devices/pic/prog/pic_prog.cpp:650
+msgid "The range cannot be erased first by the selected programmer so programming may fail..."
+msgstr "L'espace mémoire n'a pas été d'abord effacé par le programmateur sélectionné, aussi, sa programmation peut échouer..."
+
+#: piklab-hex/main.cpp:171
+msgid "The second hex file is a subset of the first one."
+msgstr "Le second fichier hexadécimal est contenu dans le premier fichier."
+
+#: piklab-prog/cmdline.cpp:335
+msgid "The selected device \"%1\" is not supported by the selected programmer."
+msgstr "Le circuit « %1 » sélectionné n'est pas pris en charge par le programmateur sélectionné."
+
+#: libgui/register_view.cpp:45
+msgid "The selected device has no register."
+msgstr "Le circuit sélectionné n'a pas de registre."
+
+#: progs/gui/prog_group_ui.cpp:101
+msgid "The selected device is not supported by this programmer."
+msgstr "Le circuit sélectionné n'est pas pris en charge par ce programmateur."
+
+#: libgui/gui_prog_manager.cpp:29
+msgid "The selected operation will stop the debugging session. Continue anyway?"
+msgstr "L'opération sélectionnée arrêtera la session de débogage. Continuer malgré tout ?"
+
+#: devices/pic/prog/pic_prog.cpp:500
+msgid "The selected programmer cannot read %1: operation skipped."
+msgstr "Le programmateur sélectionné ne peut pas lire %1 : on passe l'opération."
+
+#: progs/base/generic_prog.cpp:298
+msgid "The selected programmer cannot read device memory."
+msgstr "Le programmateur sélectionné ne peut pas lire la mémoire du circuit."
+
+#: devices/pic/prog/pic_prog.cpp:486 devices/pic/prog/pic_prog.cpp:557
+msgid "The selected programmer cannot read the specified memory range."
+msgstr "Le programmateur sélectionné ne peut pas lire l'intervalle mémoire spécifié."
+
+#: devices/pic/prog/pic_prog.cpp:442
+msgid "The selected programmer does not support erasing neither the specified range nor the whole device."
+msgstr "Le programmateur sélectionné ne prend en charge ni l'effacement de la plage sélectionnée, ni l'effacement complet du circuit."
+
+#: devices/pic/prog/pic_prog.cpp:394
+msgid "The selected programmer does not support erasing the whole device."
+msgstr "Le programmateur sélectionné ne prend pas en charge l'effacement complet du circuit."
+
+#: piklab-prog/cmdline.cpp:341
+msgid "The selected programmer does not supported the specified hardware configuration (\"%1\")."
+msgstr "Le programmateur sélectionné ne prend pas en charge la configuration matérielle spécifiée (« %1 »)."
+
+#: tools/list/compile_manager.cpp:135
+msgid "The selected toolchain (%1) cannot assemble file. It only supports files with extensions: %2"
+msgstr "La chaîne d'outils sélectionnée (%1) ne peut assembler le fichier. Elle ne prend en charge que les fichiers dont l'extension est %2."
+
+#: tools/list/compile_manager.cpp:110
+msgid "The selected toolchain (%1) cannot compile file. It only supports files with extensions: %2"
+msgstr "La chaîne d'outils sélectionnée (%1) ne peut compiler le fichier. Elle ne prend en charge que les fichiers dont l'extension est %2."
+
+#: tools/base/tool_group.cpp:130
+msgid "The selected toolchain (%1) does not support device %2. Continue anyway?"
+msgstr "La chaîne d'outil sélectionnée (%1) ne prend pas en charge le circuit %2. Continuer malgré tout ?"
+
+#: libgui/project_wizard.cpp:206
+msgid "The selected toolchain can only compile a single source file and you have selected %1 source files. Continue anyway? "
+msgstr "La chaîne d'outil sélectionnée ne prend en charge que les projets avec un seul fichier source et vous avez sélectionné %1 fichiers source. Continuer malgré tout ?"
+
+#: tools/list/compile_manager.cpp:72
+msgid "The selected toolchain only supports single-file project."
+msgstr "La chaîne d'outil sélectionnée ne prend en charge que les projets avec un seul fichier source."
+
+#: libgui/device_editor.cpp:64
+msgid "The target device is not configured and cannot be guessed from source file. The source file either cannot be found or does not contain any processor directive."
+msgstr "Le circuit cible n'est pas configuré et ne peut être déduit du fichier source. Soit le fichier source n'a pu être trouvé, soit il ne contient aucune directive « processor »."
+
+#: libgui/gui_debug_manager.cpp:88
+msgid "The toolchain in use does not generate all necessary debugging information with the selected device. This may reduce debugging capabilities."
+msgstr ""
+
+#: piklab-hex/main.cpp:172
+msgid "The two hex files are different at address %1."
+msgstr "Les deux fichiers hexadécimaux sont différents à l'adresse %1."
+
+#: piklab-hex/main.cpp:169
+msgid "The two hex files have the same content."
+msgstr "Les deux fichiers hexadécimaux ont le même contenu."
+
+#: tools/base/tool_group.cpp:128
+msgid "There were errors detecting supported devices for the selected toolchain (%1). Please check the toolchain configuration. Continue anyway?"
+msgstr "Il y a eu des erreurs lors de la détection des circuits pris en charge par la chaîne d'outils sélectionnée (%1). Veuillez vérifier la configuration de la chaîne d'outils. Continuer malgré tout ?"
+
+#: piklab-prog/cli_interactive.cpp:204
+#, fuzzy
+msgid "This command needs a commands filename."
+msgstr "Cette commande a besoin d'un nom de fichier de commandes"
+
+#: piklab-prog/cli_interactive.cpp:216
+#, fuzzy
+msgid "This command needs an hex filename."
+msgstr "Cette commande a besoin d'un nom de fichier hexadécimal"
+
+#: piklab-prog/cli_interactive.cpp:218
+#, fuzzy
+msgid "This command takes no argument."
+msgstr "Cette commande ne prend aucun argument"
+
+#: piklab-prog/cli_interactive.cpp:128
+msgid "This command takes no or one argument"
+msgstr "Cette commande prend zéro ou un argument"
+
+#: piklab-prog/cli_interactive.cpp:185
+#, fuzzy
+msgid "This command takes no or two argument."
+msgstr "Cette commande prend zéro ou deux arguments"
+
+#: piklab-prog/cli_interactive.cpp:139 piklab-prog/cli_interactive.cpp:143
+#: piklab-prog/cli_interactive.cpp:189
+#, fuzzy
+msgid "This command takes one argument."
+msgstr "Cette commande prend un argument"
+
+#: piklab-prog/cli_interactive.cpp:150
+#, fuzzy
+msgid "This command takes one or two argument."
+msgstr "Cette commande prend un ou deux arguments"
+
+#: piklab-prog/cli_interactive.cpp:135
+#, fuzzy
+msgid "This command takes two arguments."
+msgstr "Cette commande prend deux arguments"
+
+#: progs/gui/prog_group_ui.cpp:100
+msgid "This device has no calibration information."
+msgstr "Ce circuit n'a pas d'information de calibration."
+
+#: libgui/likeback.cpp:174
+msgid "This is a quick feedback system for %1."
+msgstr "Ceci est un système de retour rapide d'information pour %1."
+
+#: devices/pic/prog/pic_prog.cpp:645
+msgid "This memory range is programming protected."
+msgstr "Cet intervalle mémoire est protégé contre la programmation."
+
+#: progs/direct/base/direct.cpp:38
+msgid ""
+"This pin is driven by the programmed device.\n"
+"Without device, it must follow the \"Data out\" pin (when powered on)."
+msgstr ""
+"Cette broche est pilotée par le circuit programmé.\n"
+"Sans circuit, elle doit suivre la broche « Data out » (lorsqu'elle est alimentée)."
+
+#: common/nokde/nokde_kaboutdata.cpp:437
+msgid "This program is distributed under the terms of the %1."
+msgstr "Ce programme est distribué sous les termes de la %1."
+
+#: progs/direct/base/direct_prog_config.cpp:77
+msgid "This programmer pulses MCLR from 5V to 0V and then 12V to enter programming mode. It uses a multiplexer to switch between 5V and 12V (Vdd is here the multiplexer pin).<p>Webpage: <a href=\"http://www.epemag.wimborne.co.uk/1001.htm\">http://www.epemag.wimborne.co.uk/1001.htm</a>"
+msgstr "Ce programmateur envoie une impulsion sur MCLR de 5V à 0V puis à 12V pour entrer en mode de programmation. Il utilise un multiplexeur pour commuter entre 5V et 12V (Vdd est ici la broche de multiplexage).<p>Page web : <a href=\"http://www.epemag.wimborne.co.uk/1001.htm\">http://www.epemag.wimborne.co.uk/1001.htm</a>"
+
+#: tools/gui/toolchain_config_widget.cpp:272
+msgid "This tool cannot be automatically detected."
+msgstr "Cet outil ne peut pas être détecté automatiquement."
+
+#: libgui/config_gen.cpp:119
+msgid "This toolchain does not need explicit config bits."
+msgstr "Cette chaîne d'outils n'a pas besoin d'avoir les bits de configuration explicités."
+
+#: progs/pickit2/base/pickit_prog.cpp:49
+msgid "This will overwrite the device code memory. Continue anyway?"
+msgstr "Cela écrasera la mémoire code du circuit. Continuer malgré tout ?"
+
+#: tools/gui/toolchain_config_widget.cpp:161
+#: tools/gui/toolchain_config_widget.cpp:178
+msgid "Timeout"
+msgstr "Délai d'attente atteint"
+
+#: progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp:30
+msgid "Timeout (ms):"
+msgstr "Délai d'attente (ms) :"
+
+#: common/port/serial.cpp:280
+msgid "Timeout receiving data (%1/%2 bytes received)."
+msgstr "Délai d'attente atteint lors de la réception de données (%1/%2 octets reçus)."
+
+#: common/port/serial.cpp:306
+msgid "Timeout sending data (%1 bytes left)."
+msgstr "Délai d'attente atteint lors de l'envoi de données (il reste %1 octets)."
+
+#: common/port/serial.cpp:235
+msgid "Timeout sending data (%1/%2 bytes sent)."
+msgstr "Délai d'attente atteint lors de l'envoi de données (%1/%2 octets envoyés)."
+
+#: progs/icd1/base/icd1_serial.cpp:51
+msgid "Timeout synchronizing."
+msgstr "Délai d'attente atteint lors de la synchronisation."
+
+#: progs/gpsim/base/gpsim.cpp:72
+msgid "Timeout waiting for \"gpsim\"."
+msgstr "Délai d'attente atteint lors de l'attente de « gpsim »."
+
+#: common/port/serial.cpp:265
+msgid "Timeout waiting for data."
+msgstr "Délai d'attente de données atteint."
+
+#: progs/direct/base/direct_mem24.cpp:125
+msgid "Timeout writing at address %1"
+msgstr "Délai d'attente atteint lors de l'écriture à l'adresse %1"
+
+#: common/port/usb_port.cpp:394
+msgid "Timeout: only some data received (%1/%2 bytes)."
+msgstr "Délai d'attente atteint : seules certaines données ont été reçues (%1/%2 octets)."
+
+#: common/port/usb_port.cpp:360
+msgid "Timeout: only some data sent (%1/%2 bytes)."
+msgstr "Délai d'attente atteint : seules certaines données ont été envoyées (%1/%2 octets)."
+
+#: devices/pic/base/pic_config.cpp:144
+msgid "Timer1"
+msgstr "Timer1"
+
+#: tools/pic30/pic30_generator.cpp:95
+msgid "Timer1 interrupt service routine"
+msgstr "service de l'interruption Timer1"
+
+#: devices/pic/base/pic_config.cpp:114
+msgid "Timer1 oscillator mode"
+msgstr "Mode d'oscillation de Timer1"
+
+#: progs/tbl_bootloader/base/tbl_bootloader_prog.h:31
+msgid "Tiny Bootloader"
+msgstr "Chargeur de démarrage simplifié"
+
+#: libgui/likeback.cpp:175
+msgid "To help us improve it, your comments are important."
+msgstr "Pour nous aider à l'améliorer, vous commentaires sont importants."
+
+#: progs/manager/prog_manager.cpp:140
+msgid "Toggle Device Power..."
+msgstr "Alterner l'alimentation du circuit..."
+
+#: piklab-hex/main.cpp:72 piklab-coff/main.cpp:61
+msgid "Too few arguments."
+msgstr "Trop peu d'argument."
+
+#: piklab-hex/main.cpp:73 piklab-prog/cli_interactive.cpp:214
+#: piklab-prog/cli_interactive.cpp:217 piklab-prog/cmdline.cpp:215
+#: piklab-coff/main.cpp:62
+msgid "Too many arguments."
+msgstr "Trop d'arguments."
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:145
+msgid "Too many failures: bailing out."
+msgstr "Trop d'échecs : abandon."
+
+#: libgui/project_editor.cpp:56
+msgid "Toochain"
+msgstr "Chaîne d'outils"
+
+#: libgui/config_gen.cpp:48
+msgid "Tool Type:"
+msgstr "Type d'outil :"
+
+#: libgui/toplevel.cpp:216
+msgid "Tool Views"
+msgstr "Vues des outils"
+
+#: tools/list/tools_config_widget.cpp:45 libgui/config_gen.cpp:39
+#: libgui/project_wizard.cpp:134
+msgid "Toolchain:"
+msgstr "Chaîne d'outils :"
+
+#: tools/list/device_info.cpp:51
+msgid "Tools"
+msgstr "Outils"
+
+#: libgui/likeback.cpp:657
+msgid "Transfer Error"
+msgstr "Erreur de transfert"
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:23
+msgid "Trying to enter bootloader mode..."
+msgstr "Tentative d'entrer en mode de chargement du code de démarrage."
+
+#: coff/base/coff_object.cpp:141
+msgid "Type Definition"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:76
+msgid "USART"
+msgstr "USART"
+
+#: devices/pic/base/pic.cpp:75 progs/gui/port_selector.cpp:21
+msgid "USB"
+msgstr "USB"
+
+#: common/port/port.cpp:63
+msgid "USB Port"
+msgstr "Port USB"
+
+#: progs/picdem_bootloader/gui/picdem_bootloader_ui.cpp:25
+msgid "USB Product Id:"
+msgstr "Identifiant produit USB :"
+
+#: progs/picdem_bootloader/gui/picdem_bootloader_ui.cpp:19
+msgid "USB Vendor Id:"
+msgstr "Identifiant vendeur USB :"
+
+#: devices/pic/base/pic_config.cpp:197
+msgid "USB clock (PLL divided by)"
+msgstr "Horloge USB (PLL divisée par)"
+
+#: common/port/usb_port.cpp:266
+msgid "USB support disabled"
+msgstr "Prise en charge de l'USB désactivée"
+
+#: common/global/about.cpp:90
+msgid "USB support for ICD2 programmer."
+msgstr "Prise en charge USB pour le programmateur ICD2."
+
+#: devices/pic/base/pic_config.cpp:127
+msgid "USB voltage regulator"
+msgstr "Régulateur de tension USB"
+
+#: devices/pic/base/pic_config.cpp:85
+msgid "Undefined"
+msgstr "Indéfini"
+
+#: coff/base/coff_object.cpp:135
+msgid "Undefined Label"
+msgstr ""
+
+#: coff/base/coff_object.cpp:123
+msgid "Undefined Section"
+msgstr ""
+
+#: coff/base/coff_object.cpp:142
+msgid "Undefined Static"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:173
+msgid "Unexpected answer ($7F00) from ICD2 (%1)."
+msgstr "Réponse inattendue ($7F00) de l'ICD2 (%1)."
+
+#: progs/icd2/base/icd2.cpp:180
+msgid "Unexpected answer (08) from ICD2 (%1)."
+msgstr "Réponse inattendue (08) de l'ICD2 (%1)."
+
+#: common/nokde/nokde_kcmdlineargs.cpp:674
+msgid "Unexpected argument '%1'."
+msgstr "Argument inattendu « %1 »."
+
+#: devices/base/hex_buffer.cpp:140
+msgid "Unexpected end-of-file."
+msgstr "Fin de fichier inattendue."
+
+#: devices/base/hex_buffer.cpp:141
+msgid "Unexpected end-of-line (line %1)."
+msgstr "Fin de ligne inattendue (ligne %1)."
+
+#: coff/base/coff_object.cpp:329
+msgid "Uninitialized Data"
+msgstr ""
+
+#: coff/base/coff_object.cpp:167
+msgid "Union"
+msgstr ""
+
+#: coff/base/coff_object.cpp:140
+msgid "Union Tag"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:57
+msgid "Unitialized variables in X-space"
+msgstr "Variables non initialisées dans l'espace X"
+
+#: tools/pic30/pic30_generator.cpp:61
+msgid "Unitialized variables in Y-space"
+msgstr "Variables non initialisées dans l'espace Y"
+
+#: tools/pic30/pic30_generator.cpp:65
+msgid "Unitialized variables in near data memory"
+msgstr "Variables non initialisées dans la mémoire de données proche"
+
+#: tools/base/generic_tool.cpp:25
+msgid "Unix"
+msgstr "Unix"
+
+#: tools/gui/toolchain_config_widget.cpp:225
+#: devices/base/generic_device.cpp:21 coff/base/text_coff.cpp:256
+msgid "Unknown"
+msgstr "Inconnu"
+
+#: common/common/purl_base.cpp:57
+msgid "Unknown File"
+msgstr "Fichier inconnu"
+
+#: common/cli/cli_main.cpp:29
+msgid "Unknown command: %1"
+msgstr "Commande inconnue : %1"
+
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:47
+msgid "Unknown device"
+msgstr "Circuit inconnu"
+
+#: piklab-hex/main.cpp:223 piklab-prog/cmdline.cpp:364
+#: piklab-coff/main.cpp:238
+msgid "Unknown device \"%1\"."
+msgstr "Circuit inconnu « %1 »."
+
+#: devices/pic/prog/pic_prog.cpp:278
+msgid "Unknown device."
+msgstr "Circuit inconnu."
+
+#: coff/base/coff_archive.cpp:92
+msgid "Unknown file member offset: %1"
+msgstr "Format de fichier hexadécimal inconnu : %1"
+
+#: piklab-prog/cmdline.cpp:379
+msgid "Unknown hex file format \"%1\"."
+msgstr "Format de fichier hexadécimal inconnu « %1 »."
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:84
+msgid "Unknown id returned by bootloader (%1 read and %2 expected)."
+msgstr "Identifiant inconnu renvoyé par le chargeur de démarrage (%1 lu et %2 attendu)."
+
+#: common/nokde/nokde_kcmdlineargs.cpp:521
+#: common/nokde/nokde_kcmdlineargs.cpp:537
+msgid "Unknown option '%1'."
+msgstr "Option inconnue « %1 »."
+
+#: piklab-prog/cmdline.cpp:353
+msgid "Unknown programmer \"%1\"."
+msgstr "Programmateur inconnu « %1 »."
+
+#: piklab-prog/cmdline.cpp:397 piklab-prog/cmdline.cpp:445
+msgid "Unknown property \"%1\""
+msgstr "Propriété inconnue « %1 »"
+
+#: piklab-hex/main.cpp:235 piklab-hex/main.cpp:248 piklab-coff/main.cpp:241
+#: piklab-coff/main.cpp:250
+msgid "Unknown property \"%1\"."
+msgstr "Propriété inconnue « %1 »."
+
+#: piklab-prog/cli_interactive.cpp:307
+#, fuzzy
+msgid "Unknown register or variable name."
+msgstr "Nom de registre ou de variable inconnu"
+
+#: progs/gpsim/base/gpsim_debug.cpp:221 progs/sdcdb/base/sdcdb_debug.cpp:220
+msgid "Unknown state for IO bit: %1 (%2)"
+msgstr "État inconnu du bit d'E/S : %1 (%2)"
+
+#: piklab-hex/main.cpp:183
+msgid "Unprotected checksum: %1"
+msgstr "Somme de contrôle non protégée : %1"
+
+#: devices/base/hex_buffer.cpp:139
+msgid "Unrecognized format (line %1)."
+msgstr "Format non reconnu (ligne %1)."
+
+#: coff/base/cdb_parser.cpp:86
+msgid "Unrecognized record"
+msgstr "Enregistrement non reconnu"
+
+#: piklab-prog/cli_interactive.cpp:40
+msgid "Unset property value: \"unset <property>\"."
+msgstr "Désactiver une valeur de propriété : « unset <propriété> »."
+
+#: coff/base/cdb_parser.cpp:44
+msgid "Unsigned"
+msgstr "Non signé"
+
+#: coff/base/coff_object.cpp:170
+msgid "Unsigned Char"
+msgstr ""
+
+#: coff/base/coff_object.cpp:172
+msgid "Unsigned Int"
+msgstr ""
+
+#: coff/base/coff_object.cpp:173
+msgid "Unsigned Long"
+msgstr ""
+
+#: coff/base/coff_object.cpp:171
+msgid "Unsigned Short"
+msgstr ""
+
+#: devices/base/device_group.cpp:36
+msgid "Unsupported"
+msgstr "Non pris en charge"
+
+#: common/common/group.cpp:14
+msgid "Untested"
+msgstr "Non testé"
+
+#: tools/gui/toolchain_config_center.cpp:27
+msgid "Update"
+msgstr "Mettre à jour"
+
+#: piklab-prog/cmdline.cpp:51
+msgid "Upload firmware to programmer: \"upload_firmware <hexfilename>\"."
+msgstr "Charger le micrologiciel dans le programmateur : « upload_firmware <nom_fichier_hex> »."
+
+#: progs/pickit2/base/pickit2_prog.cpp:65
+msgid "Uploading Firmware..."
+msgstr "Chargement du micrologiciel..."
+
+#: piklab-prog/cmdline.cpp:321
+msgid "Uploading firmware is not supported for the specified programmer."
+msgstr "Le chargement du micrologiciel n'est pas pris en charge par le programmateur spécifié."
+
+#: progs/base/generic_prog.cpp:262
+msgid "Uploading firmware..."
+msgstr "Chargement du micrologiciel..."
+
+#: progs/gui/prog_group_ui.cpp:67
+#, fuzzy
+msgid "Uploading..."
+msgstr "Chargement..."
+
+#: coff/base/cdb_parser.cpp:30
+msgid "Upper-128-byte Pointer"
+msgstr "Pointeur sur les 128 octets les plus hauts"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:838
+msgid "Usage: %1 %2\n"
+msgstr "Usage : %1 %2\n"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:783
+msgid "Use --help to get a list of available command line options."
+msgstr "Utilisez --help pour obtenir la liste des options de la ligne de commande."
+
+#: devices/pic/gui/pic_config_word_editor.cpp:83
+msgid "Used Mask:"
+msgstr "Masque utilisé :"
+
+#: devices/pic/base/pic.cpp:27 coff/base/coff_object.cpp:328
+msgid "User IDs"
+msgstr "Identifiant utilisateur"
+
+#: piklab-prog/cli_prog_manager.cpp:22
+msgid "Using port from configuration file."
+msgstr "Utilisation du port à partir du fichier de configuration."
+
+#: devices/pic/gui/pic_config_word_editor.cpp:73
+msgid "Value:"
+msgstr "Valeur :"
+
+#: devices/pic/gui/pic_group_ui.cpp:68
+msgid "Variables"
+msgstr "Variables"
+
+#: tools/gputils/gputils_generator.cpp:58
+#: tools/gputils/gputils_generator.cpp:128
+#: tools/gputils/gputils_generator.cpp:208
+msgid "Variables declaration"
+msgstr "Déclaration des variables"
+
+#: piklab-coff/main.cpp:146
+msgid "Variables:"
+msgstr "Variables :"
+
+#: devices/base/device_group.cpp:295
+msgid "Vdd (V)"
+msgstr "Vdd (V)"
+
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:102
+msgid "Vdd voltage level error; "
+msgstr "Erreur de valeur de tension pour Vdd ; "
+
+#: progs/direct/base/direct_prog_config.cpp:49
+msgid "Velleman K8048"
+msgstr "Velleman K8048"
+
+#: progs/base/prog_config.cpp:70
+msgid "Verify device memory after programming."
+msgstr "Vérifier la mémoire du circuit après la programmation."
+
+#: piklab-prog/cmdline.cpp:43
+msgid "Verify device memory: \"verify <hexfilename>\"."
+msgstr "Vérifier la mémoire du circuit : « verify <nom_fichier_hex> »."
+
+#: progs/base/generic_prog.cpp:379
+msgid "Verifying successful."
+msgstr "Vérification réussie."
+
+#: progs/base/generic_prog.cpp:34 progs/base/generic_prog.cpp:377
+msgid "Verifying..."
+msgstr "Vérification..."
+
+#: progs/icd2/gui/icd2_group_ui.cpp:31 progs/gui/prog_group_ui.cpp:68
+#: libgui/project_editor.cpp:41
+msgid "Version:"
+msgstr "Version :"
+
+#: libgui/project_manager_ui.cpp:34
+msgid "Views"
+msgstr "Vues"
+
+#: coff/base/cdb_parser.cpp:35 coff/base/coff_object.cpp:159
+msgid "Void"
+msgstr "Void"
+
+#: libgui/device_gui.cpp:413
+msgid "Voltage-Frequency Graphs"
+msgstr "Graphiques tension-fréquence"
+
+#: progs/gui/prog_group_ui.cpp:79
+msgid "Voltages"
+msgstr "Tensions"
+
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:101
+msgid "Vpp voltage level error; "
+msgstr "Erreur de valeur de tension pour Vpp ; "
+
+#: devices/pic/base/pic_config.cpp:90
+msgid "WDT post-scaler"
+msgstr "Postdiviseur WDT"
+
+#: devices/pic/base/pic_config.cpp:81
+msgid "Wake-up reset"
+msgstr "Réinitialisation du réveil"
+
+#: tools/gputils/gputils_config.cpp:13 tools/c18/c18_config.cpp:12
+msgid "Warning and errors"
+msgstr "Avertissements et erreurs"
+
+#: tools/gputils/gui/gputils_ui.cpp:24 tools/c18/gui/c18_ui.cpp:23
+msgid "Warning level:"
+msgstr "Niveau d'avertissement :"
+
+#: devices/pic/gui/pic_register_view.cpp:85
+#: devices/pic/gui/pic_register_view.cpp:224
+msgid "Watch"
+msgstr "Surveiller"
+
+#: libgui/watch_view.cpp:110
+msgid "Watch Register"
+msgstr "Surveiller un registre"
+
+#: libgui/toplevel.cpp:127
+msgid "Watch View"
+msgstr "Vue surveillance"
+
+#: devices/pic/base/pic_config.cpp:188
+msgid "Watchdog"
+msgstr "Chien de garde"
+
+#: devices/pic/base/pic_config.cpp:33
+msgid "Watchdog timer"
+msgstr "Temporisateur chien de garde"
+
+#: devices/pic/base/pic_config.cpp:267
+msgid "Watchdog timer postscaler"
+msgstr "Postdiviseur du temporisateur chien de garde"
+
+#: devices/pic/base/pic_config.cpp:266
+msgid "Watchdog timer prescaler"
+msgstr "Prédiviseur du temporisateur chien de garde"
+
+#: devices/pic/base/pic_config.cpp:186
+msgid "Watchdog timer prescaler A"
+msgstr "Prédiviseur A du temporisateur chien de garde"
+
+#: devices/pic/base/pic_config.cpp:187
+msgid "Watchdog timer prescaler B"
+msgstr "Prédiviseur B du temporisateur chien de garde"
+
+#: devices/pic/base/pic_config.cpp:106 devices/pic/base/pic_config.cpp:265
+msgid "Watchdog timer window"
+msgstr "Fenêtre du temporisateur chien de garde"
+
+#: libgui/watch_view.cpp:87
+msgid "Watched"
+msgstr "Surveillé"
+
+#: progs/direct/base/direct_prog_config.cpp:52
+msgid "Webpage: <a href=\"htpp://k9spud.com/hoodmicro\">htpp://k9spud.com/hoodmicro</a>"
+msgstr "Page web : <a href=\"htpp://k9spud.com/hoodmicro\">htpp://k9spud.com/hoodmicro</a>"
+
+#: libgui/likeback.cpp:95
+msgid "What's &This?"
+msgstr "Qu'es&t-ce que c'est ?"
+
+#: tools/base/generic_tool.cpp:26
+msgid "Windows"
+msgstr "Windows"
+
+#: devices/pic/gui/pic_config_word_editor.cpp:88
+msgid "Write Mask:"
+msgstr "Masque d'écriture :"
+
+#: piklab-prog/cli_interactive.cpp:48
+msgid "Write and read raw commands to port from given file."
+msgstr "Lire et écrire des commandes brutes sur le port à partir du fichier fourni."
+
+#: progs/gpsim/base/gpsim_debug.cpp:181 progs/sdcdb/base/sdcdb_debug.cpp:180
+msgid "Writing PC is not supported by gpsim"
+msgstr "L'écriture du compteur programme n'est pas gérée par gpsim"
+
+#: progs/gpsim/base/gpsim_debug.cpp:161 progs/sdcdb/base/sdcdb_debug.cpp:160
+msgid "Writing registers is not supported by this version of gpsim"
+msgstr "L'écriture des registres n'est pas gérée par cette version de gpsim"
+
+#: coff/base/coff_archive.cpp:33
+msgid "Wrong format for file size \"%1\"."
+msgstr ""
+
+#: progs/psp/base/psp.cpp:174
+msgid "Wrong programmer connected"
+msgstr "Un mauvais programmateur est connecté"
+
+#: progs/icd2/base/icd2.cpp:224
+msgid "Wrong return value (\"%1\"; was expecting \"%2\")"
+msgstr "Valeur renvoyée erronée (« %1 » lue et « %2 » attendue)"
+
+#: devices/pic/base/pic_config.cpp:148 devices/pic/base/pic_config.cpp:163
+msgid "XT Crystal"
+msgstr "Quartz XT"
+
+#: devices/pic/base/pic_config.cpp:151 devices/pic/base/pic_config.cpp:166
+msgid "XT Crystal with 16x PLL"
+msgstr "Quartz XT avec PLL x16"
+
+#: devices/pic/base/pic_config.cpp:149 devices/pic/base/pic_config.cpp:164
+msgid "XT Crystal with 4x PLL"
+msgstr "Quartz XT avec PLL x4"
+
+#: devices/pic/base/pic_config.cpp:150 devices/pic/base/pic_config.cpp:165
+msgid "XT Crystal with 8x PLL"
+msgstr "Quartz XT avec PLL x8"
+
+#: devices/pic/base/pic_config.cpp:259
+msgid "XT crystal oscillator"
+msgstr "Oscillateur à quartz XT"
+
+#: libgui/likeback.cpp:397
+msgid "You can change or remove your email address whenever you want. For that, use the little arrow icon at the top-right corner of a window."
+msgstr "Vous pouvez modifier ou supprimer votre adresse courriel quand vous le souhaitez. Pour ce faire, utilisez l'icône petite flèche dans le coin supérieur droit d'une fenêtre."
+
+#: libgui/gui_debug_manager.cpp:104
+msgid "You cannot set breakpoints when a debugger is not selected."
+msgstr "Vous ne pouvez définir de points d'arrêt si un débogueur n'est pas sélectionné."
+
+#: progs/direct/base/direct_prog_config.cpp:39
+msgid "You must disconnect 7407 pin 2"
+msgstr "Vous devez déconnecter la broche 2 du 7407"
+
+#: progs/icd2/gui/icd2_group_ui.cpp:53
+msgid "You need to initiate debugging to read the debug executive version."
+msgstr "Vous devez initialiser le débogage pour lire la version de l'exécutif de débogage."
+
+#: libgui/toplevel.cpp:534
+msgid "You need to specify a device to create a new hex file."
+msgstr "Vous devez spécifier un circuit pour créer un nouveau fichier hexadécimal."
+
+#: progs/manager/prog_manager.cpp:59
+msgid "You need to specify the device for programming."
+msgstr "Vous devez spécifier un circuit pour la programmation."
+
+#: piklab-prog/cli_interactive.cpp:209
+#, fuzzy
+msgid "You need to specify the range."
+msgstr "Vous devez spécifier la gamme"
+
+#: piklab-prog/cli_interactive.cpp:292
+msgid "You need to start the debugging session first (with \"start\")."
+msgstr "Vous devez d'abord lancer la session de débogage (avec « start »)."
+
+#: progs/gui/port_selector.cpp:61
+msgid "Your computer might not have any parallel port or the /dev/parportX device has not been created.<br>Use \"mknod /dev/parport0 c 99 0\" to create it<br>and \"chmod a+rw /dev/parport0\" to make it RW enabled."
+msgstr "Votre ordinateur ne semble pas avoir de port parallèle ou bien le périphérique /dev/parportX n'a pas été créé. <br>Utilisez la commande « mknod /dev/parport0 c 99 0 » pour le créer et la commande « chmod a+rw /dev/parport0 » pour autoriser l'accès en lecture-écriture."
+
+#: progs/gui/port_selector.cpp:58
+msgid "Your computer might not have any serial port."
+msgstr "Votre ordinateur ne semble pas avoir de port série."
+
+#: libgui/likeback.cpp:398
+msgid "Your email address (keep empty to post comments anonymously):"
+msgstr "Votre adresse courriel (laissez vide pour envoyer les commentaires anonymement) :"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:818
+msgid "[%1-options]"
+msgstr "[%1-options]"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:811
+msgid "[options] "
+msgstr "[options] "
+
+#: _translatorinfo.cpp:3
+msgid ""
+"_: EMAIL OF TRANSLATORS\n"
+"Your emails"
+msgstr "aportal@univ-montp2.fr"
+
+#: _translatorinfo.cpp:1
+msgid ""
+"_: NAME OF TRANSLATORS\n"
+"Your names"
+msgstr "Alain Portal"
+
+#: tools/pic30/pic30_generator.cpp:63
+msgid "allocating 2 bytes"
+msgstr "alloue 2 octets"
+
+#: tools/pic30/pic30_generator.cpp:59 tools/pic30/pic30_generator.cpp:67
+msgid "allocating 4 bytes"
+msgstr "alloue 4 octets"
+
+#: tools/gui/tool_config_widget.cpp:126 tools/gputils/gui/gputils_ui.cpp:30
+msgid "as in LIST directive"
+msgstr "comme dans la directive LIST"
+
+#: coff/base/cdb_parser.cpp:104
+msgid "at line #%1, column #%2"
+msgstr "à la ligne N°%1; colonne N°%2"
+
+#: tools/pic30/pic30_generator.cpp:77
+msgid "call _wreg_init subroutine"
+msgstr "appelle la sous-routine _wreg_init"
+
+#: tools/pic30/pic30_generator.cpp:99
+msgid "clear Timer1 interrupt flag status bit"
+msgstr "met à zéro le bit d'état du drapeau de l'interruption Timer1"
+
+#: tools/pic30/pic30_generator.cpp:48
+msgid "declare Timer1 ISR"
+msgstr "déclare la routine de service d'interruption Timer1"
+
+#: devices/gui/register_view.cpp:71
+msgid "driven high"
+msgstr "maintenu au niveau haut"
+
+#: devices/gui/register_view.cpp:71
+msgid "driven low"
+msgstr "maintenu au niveau bas"
+
+#: devices/gui/register_view.cpp:67
+msgid "driving high"
+msgstr "maintenant au niveau haut"
+
+#: devices/gui/register_view.cpp:67
+msgid "driving low"
+msgstr "maintenant au niveau bas"
+
+#: coff/base/cdb_parser.cpp:138
+msgid "empty name"
+msgstr "nom vide"
+
+#: tools/list/compile_process.cpp:359
+msgid "error: "
+msgstr "erreur : "
+
+#: tools/pic30/pic30_generator.cpp:97
+msgid "example of context saving (push W4 and W5)"
+msgstr "exemple de sauvegarde du contexte (place W4 et W5 sur la pile)"
+
+#: tools/gputils/gputils_generator.cpp:76
+#: tools/gputils/gputils_generator.cpp:135
+#: tools/gputils/gputils_generator.cpp:214
+msgid "example variable"
+msgstr "Exemple de variable"
+
+#: tools/gputils/gputils_generator.cpp:146
+msgid "for restoringing context"
+msgstr "pour la restauration du contexte"
+
+#: tools/gputils/gputils_generator.cpp:139
+msgid "for saving context"
+msgstr "pour la sauvegarde du contexte"
+
+#: tools/gputils/gputils_generator.cpp:225
+msgid "go to start of high priority interrupt code"
+msgstr "va au début du code d'interruption haute priorité"
+
+#: tools/gputils/gputils_generator.cpp:161
+msgid "go to start of int pin interrupt code"
+msgstr "va au début du code d'interruption de la broche d'interruption"
+
+#: tools/gputils/gputils_generator.cpp:95
+msgid "go to start of interrupt code"
+msgstr "va au début du code d'interruption"
+
+#: tools/gputils/gputils_generator.cpp:91
+#: tools/gputils/gputils_generator.cpp:157
+#: tools/gputils/gputils_generator.cpp:221
+msgid "go to start of main code"
+msgstr "va au début du code principal"
+
+#: tools/gputils/gputils_generator.cpp:173
+msgid "go to start of peripheral interrupt code"
+msgstr "va au début du code d'interruption du périphérique"
+
+#: tools/gputils/gputils_generator.cpp:169
+msgid "go to start of t0cki interrupt code"
+msgstr "va au début du code d'interruption t0cki"
+
+#: tools/gputils/gputils_generator.cpp:165
+msgid "go to start of timer0 interrupt code"
+msgstr "va au début du code d'interruption timer0"
+
+#: tools/gputils/gputils_generator.cpp:238
+msgid "high priority interrupt service routine"
+msgstr "service de l'interruption haute priorité"
+
+#: tools/gputils/gputils_generator.cpp:223
+msgid "high priority interrupt vector"
+msgstr "vecteur d'interruption haute priorité"
+
+#: tools/gputils/gputils_generator.cpp:90
+msgid "initialize PCLATH"
+msgstr "initialise PCLATH"
+
+#: tools/pic30/pic30_generator.cpp:73
+msgid "initialize stack pointer"
+msgstr "initialise le pointeur de pile"
+
+#: tools/pic30/pic30_generator.cpp:74
+msgid "initialize stack pointer limit register"
+msgstr "initialise le registre de limite de pointeur de pile"
+
+#: tools/gputils/gputils_generator.cpp:181
+msgid "insert INT pin interrupt code"
+msgstr "insérer le code d'interruption de la broche d'interruption INT"
+
+#: tools/gputils/gputils_generator.cpp:193
+msgid "insert T0CKI interrupt code"
+msgstr "insérer le code d'interruption T0CKI"
+
+#: tools/gputils/gputils_generator.cpp:187
+msgid "insert TIMER0 interrupt code"
+msgstr "insérer le code d'interruption TIMER0"
+
+#: tools/boost/boost_generator.cpp:52 tools/boost/boost_generator.cpp:76
+#: tools/jal/jal_generator.cpp:31 tools/gputils/gputils_generator.cpp:52
+#: tools/sdcc/sdcc_generator.cpp:114 tools/pic30/pic30_generator.cpp:79
+msgid "insert code"
+msgstr "insérer le code"
+
+#: tools/gputils/gputils_generator.cpp:240
+msgid "insert high priority interrupt code"
+msgstr "insérer le code d'interruption haute priorité"
+
+#: tools/boost/boost_generator.cpp:47 tools/gputils/gputils_generator.cpp:109
+#: tools/sdcc/sdcc_generator.cpp:102 tools/pic30/pic30_generator.cpp:98
+msgid "insert interrupt code"
+msgstr "insérer le code d'interruption"
+
+#: tools/gputils/gputils_generator.cpp:232
+msgid "insert low priority interrupt code"
+msgstr "insérer le code d'interruption basse priorité"
+
+#: tools/gputils/gputils_generator.cpp:121
+#: tools/gputils/gputils_generator.cpp:176
+#: tools/gputils/gputils_generator.cpp:244
+msgid "insert main code"
+msgstr "insérer le code principal"
+
+#: tools/gputils/gputils_generator.cpp:199
+msgid "insert peripheral interrupt code"
+msgstr "insérer le code d'interruption du périphérique"
+
+#: tools/boost/boost_generator.cpp:45 tools/sdcc/sdcc_generator.cpp:101
+msgid "interrupt service routine"
+msgstr "routine de service des interruptions"
+
+#: tools/gputils/gputils_generator.cpp:93
+msgid "interrupt vector"
+msgstr "vecteur d'interruption"
+
+#: tools/jal/jal_generator.cpp:23
+msgid "jal standard library"
+msgstr "bibliothèque standard de jal"
+
+#: tools/pic30/pic30_generator.cpp:47
+msgid "label for code start"
+msgstr "étiquette pour le démarrage du code"
+
+#: tools/gputils/gputils_generator.cpp:89
+msgid "load upper byte of 'start' label"
+msgstr "charge l'octet supérieur de l'étiquette « start »"
+
+#: tools/boost/boost_generator.cpp:77 tools/jal/jal_generator.cpp:32
+#: tools/gputils/gputils_generator.cpp:53
+#: tools/gputils/gputils_generator.cpp:122
+#: tools/gputils/gputils_generator.cpp:177
+#: tools/gputils/gputils_generator.cpp:245 tools/pic30/pic30_generator.cpp:82
+msgid "loop forever"
+msgstr "boucle indéfiniment"
+
+#: tools/gputils/gputils_generator.cpp:227
+msgid "low priority interrupt vector"
+msgstr "vecteur d'interruption basse priorité"
+
+#: tools/jal/jal_generator.cpp:30
+msgid "main code"
+msgstr "code principal"
+
+#: tools/boost/boost_generator.cpp:50 tools/boost/boost_generator.cpp:74
+msgid "main program"
+msgstr "programme principal"
+
+#: tools/list/compile_process.cpp:360
+msgid "message: "
+msgstr "message : "
+
+#: tools/gputils/gputils_generator.cpp:88
+#: tools/gputils/gputils_generator.cpp:155
+#: tools/gputils/gputils_generator.cpp:156
+#: tools/gputils/gputils_generator.cpp:219
+#: tools/gputils/gputils_generator.cpp:220
+msgid "needed for ICD2 debugging"
+msgstr "nécessaire pour le débogage avec l'ICD2"
+
+#: coff/base/cdb_parser.cpp:307
+msgid "no register defined"
+msgstr "pas de registre défini"
+
+#: tools/pic30/pic30_generator.cpp:76
+msgid "nop after SPLIM initialization"
+msgstr "nop après initialisaton SPLIM"
+
+#: devices/pic/base/pic_config.cpp:198 devices/pic/base/pic_config.cpp:200
+#: devices/pic/base/pic_config.cpp:202
+msgid "not divided"
+msgstr "non divisé"
+
+#: devices/pic/gui/pic_memory_editor.cpp:114
+#: devices/pic/gui/pic_memory_editor.cpp:121
+msgid "not present"
+msgstr "pas présent"
+
+#: progs/direct/gui/direct_config_widget.cpp:53
+msgid "on"
+msgstr "sous tension"
+
+#: tools/gputils/gputils_generator.cpp:105
+msgid "only required if using more than first page"
+msgstr "nécessaire seulement si on utilise plus que la première page"
+
+#: tools/gputils/gputils_generator.cpp:197
+msgid "peripheral interrupt service routine"
+msgstr "service de l'interruption du périphérique"
+
+#: tools/gputils/gputils_generator.cpp:49
+#: tools/gputils/gputils_generator.cpp:97
+msgid "relocatable code"
+msgstr "code relogeable"
+
+#: common/nokde/nokde_kaboutdata.cpp:374
+msgid "replace this with information about your translation team"
+msgstr "Alain Portal <aportal AT univ-montp2 DOT fr>"
+
+#: tools/gputils/gputils_generator.cpp:86
+#: tools/gputils/gputils_generator.cpp:153
+#: tools/gputils/gputils_generator.cpp:217
+msgid "reset vector"
+msgstr "vecteur de redémarrage"
+
+#: tools/gputils/gputils_generator.cpp:111
+#: tools/gputils/gputils_generator.cpp:114
+#: tools/gputils/gputils_generator.cpp:233
+msgid "restore context"
+msgstr "restauration du contexte"
+
+#: tools/pic30/pic30_generator.cpp:100
+msgid "restore context from stack"
+msgstr "restauration du contexte depuis la pile"
+
+#: tools/gputils/gputils_generator.cpp:100
+#: tools/gputils/gputils_generator.cpp:229
+msgid "save context"
+msgstr "sauvegarde du contexte"
+
+#: piklab-coff/main.cpp:183
+msgid "section \"%1\":"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:118
+#, fuzzy
+msgid "size: %1 bytes"
+msgstr "%1 octets"
+
+#: piklab-coff/main.cpp:189
+msgid "symbol \"%1\""
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:644
+msgid "the 2nd argument is a list of name+address, one on each line"
+msgstr "le second argument est une liste de nom+adresse, un par ligne"
+
+#: piklab-coff/main.cpp:167
+msgid "type=\"%1\" address=%2 size=%3 flags=%4"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:115 coff/base/cdb_parser.cpp:161
+msgid "unexpected end of line"
+msgstr "fin de ligne inattendue"
+
+#: coff/base/cdb_parser.cpp:294
+msgid "unknown AddressSpaceType"
+msgstr "AddressSpaceType inconnu"
+
+#: coff/base/cdb_parser.cpp:272
+msgid "unknown DCLType"
+msgstr "DCLType inconnu"
+
+#: coff/base/cdb_parser.cpp:238
+msgid "unknown ScopeType"
+msgstr "ScopeType inconnu"
+
+#: coff/base/cdb_parser.cpp:282
+msgid "unknown Sign"
+msgstr "Sign inconnu"
+
+#: devices/gui/register_view.cpp:66 devices/gui/register_view.cpp:70
+msgid "unknown state"
+msgstr "état inconnu"
+
+#: tools/gputils/gputils_generator.cpp:68
+#: tools/gputils/gputils_generator.cpp:69
+#: tools/gputils/gputils_generator.cpp:72
+#: tools/gputils/gputils_generator.cpp:81
+msgid "variable used for context saving"
+msgstr "variable utilisée pour la sauvegarde de contexte"
+
+#: tools/gputils/gputils_generator.cpp:130
+#: tools/gputils/gputils_generator.cpp:131
+#: tools/gputils/gputils_generator.cpp:132
+#: tools/gputils/gputils_generator.cpp:133
+#: tools/gputils/gputils_generator.cpp:210
+#: tools/gputils/gputils_generator.cpp:211
+#: tools/gputils/gputils_generator.cpp:212
+msgid "variable used for context saving (for low-priority interrupts only)"
+msgstr "variable utilisée pour la sauvegarde de contexte (seulement pour les interruptions basse priorité)"
+
+#: tools/gputils/gputils_generator.cpp:80
+msgid "variables used for context saving"
+msgstr "variables utilisées pour la sauvegarde de contexte"
+
+#: tools/list/compile_process.cpp:358
+msgid "warning: "
+msgstr "avertissement : "
+
+#: coff/base/cdb_parser.cpp:128
+msgid "was expecting '%1'"
+msgstr "attendait « %1 »"
+
+#: coff/base/cdb_parser.cpp:200
+msgid "was expecting a bool ('%1')"
+msgstr "attendait un booléen (« %1 »)"
+
+#: coff/base/cdb_parser.cpp:177
+msgid "was expecting an uint"
+msgstr "attendait un entier non signé (uint)"
+
+#~ msgid "Output Object Type:"
+#~ msgstr "Type de l'objet de sortie :"
+
+#~ msgid "Number format not recognized"
+#~ msgstr "Format de nombre non reconnu"
+
+#~ msgid "Too many arguments"
+#~ msgstr "Trop d'arguments."
diff --git a/po/hu.po b/po/hu.po
new file mode 100644
index 0000000..d17d0f5
--- /dev/null
+++ b/po/hu.po
@@ -0,0 +1,7293 @@
+# translation of hu.po to hungarian
+# translation of hu.po to
+# Translation of Piklab to german
+# since version 0.13.0
+# Stefan von Halenbach  2007
+#
+# biglacko <biglacko@startolj.hu>, 2007.
+msgid ""
+msgstr ""
+"Project-Id-Version: hu\n"
+"Report-Msgid-Bugs-To: \n"
+"POT-Creation-Date: 2007-11-25 14:15+0100\n"
+"PO-Revision-Date: 2007-03-08 19:27+0100\n"
+"Last-Translator: biglacko <biglacko@startolj.hu>\n"
+"Language-Team: hungarian <hu@li.org>\n"
+"MIME-Version: 1.0\n"
+"Content-Type: text/plain; charset=UTF-8\n"
+"Content-Transfer-Encoding: 8bit\n"
+"X-Poedit-Language: German\n"
+"X-Poedit-Country: GERMANY\n"
+"X-Poedit-SourceCharset: utf-8\n"
+"X-Generator: KBabel 1.11.4\n"
+"Plural-Forms:  nplurals=1; plural=0;\n"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:802
+msgid ""
+"\n"
+"%1:\n"
+msgstr ""
+"\n"
+"%1:\n"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:946
+msgid ""
+"\n"
+"Arguments:\n"
+msgstr ""
+"\n"
+"Paraméterek:\n"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:885
+msgid ""
+"\n"
+"Options:\n"
+msgstr ""
+"\n"
+"Beállítások:\n"
+
+#: devices/pic/prog/pic_prog.cpp:109
+msgid "  %1 = %2 V: error in voltage level."
+msgstr "  %1 = %2 V: Feszültségszint hiba."
+
+#: progs/icd2/base/icd2_debug_specific.cpp:58
+msgid "  According to ICD2 manual, instruction at address 0x0 should be \"nop\"."
+msgstr " Az ICD2 kézikönyv szerint, ezen a címen 0x0 ennek az utasításnak kell lennie: \"nop\"."
+
+#: devices/pic/prog/pic_prog.cpp:387
+msgid "  Band gap bits have been preserved."
+msgstr "  A Band gap bitek foglaltak."
+
+#: devices/pic/prog/pic_prog.cpp:630
+#, fuzzy
+msgid "  Blank check successful"
+msgstr "  Üresség-teszt kész"
+
+#: progs/icd2/base/icd2_debug.cpp:314
+msgid "  Debug executive version: %1"
+msgstr "  Hibakereső verzió"
+
+#: devices/pic/prog/pic_prog.cpp:626
+#, fuzzy
+msgid "  EPROM device: blank checking first..."
+msgstr " EPROM : üresség ellenőrzés először..."
+
+#: devices/pic/prog/pic_prog.cpp:658 devices/pic/prog/pic_prog.cpp:714
+msgid "  Erasing device"
+msgstr " Eszköz törlés"
+
+#: progs/icd2/base/icd2_prog.cpp:111
+msgid "  Firmware succesfully uploaded."
+msgstr " Firmware feltöltés kész."
+
+#: progs/icd2/base/icd2_prog.cpp:82
+msgid "  Incorrect firmware loaded."
+msgstr " Helytelen Firmware betöltve."
+
+#: devices/pic/prog/pic_prog.cpp:360
+msgid "  Osccal backup has been preserved."
+msgstr "  Osccal visszatöltés lefoglalva"
+
+#: devices/pic/prog/pic_prog.cpp:355
+msgid "  Osccal backup is unchanged."
+msgstr "  Osccal nem változott"
+
+#: devices/pic/prog/pic_prog.cpp:346
+msgid "  Osccal has been preserved."
+msgstr "  Osccal lefoglalva"
+
+#: devices/pic/prog/pic_prog.cpp:341
+msgid "  Osccal is unchanged."
+msgstr "  Osccal nem változott"
+
+#: progs/icd2/base/icd2_debug_specific.cpp:76
+#: progs/icd2/base/icd2_debug_specific.cpp:83
+#: progs/icd2/base/icd2_debug_specific.cpp:166
+#: progs/icd2/base/icd2_debug_specific.cpp:244
+msgid "  PC is not at address %1 (%2)"
+msgstr " PC nem ezen a címen %1 (%2)"
+
+#: devices/pic/prog/pic_prog.cpp:508
+msgid "  Part of device memory is protected (in %1) and cannot be verified."
+msgstr " A memória lezárva (in %1) Nem tudom ellenőrizni."
+
+#: devices/pic/prog/pic_prog.cpp:512
+msgid "  Read memory: %1"
+msgstr " Memória olvasás: %1"
+
+#: devices/pic/prog/pic_prog.cpp:334
+msgid "  Replace invalid osccal with backup value."
+msgstr "  Rossz az osccal visszatöltött értéke"
+
+#: progs/base/generic_prog.cpp:101
+msgid "  Set target self powered: %1"
+msgstr "  Az eszköz saját maga adja a tápot: %1"
+
+#: devices/pic/prog/pic_prog.cpp:277
+msgid "  Unknown or incorrect device (Read id is %1)."
+msgstr " Ismeretlen vagy nem megfelelő eszköz (kiolvasott ID %1)."
+
+#: progs/pickit2/base/pickit2_prog.cpp:63
+msgid "  Uploading PICkit2 firmware..."
+msgstr " PICkit2 Firmware feltöltés..."
+
+#: progs/icd2/base/icd2_debug.cpp:247
+msgid "  Verify debug executive"
+msgstr "  A debug fájl ellenőrzése"
+
+#: devices/pic/prog/pic_prog.cpp:505
+msgid "  Verify memory: %1"
+msgstr " Memória ellenőrzés: %1"
+
+#: progs/icd2/base/icd2_debug.cpp:244
+msgid "  Write debug executive"
+msgstr "  Debug program letöltése"
+
+#: devices/pic/prog/pic_prog.cpp:565 devices/pic/prog/pic_prog.cpp:683
+#: devices/pic/prog/pic_prog.cpp:694
+msgid "  Write memory: %1"
+msgstr " Memória írás: %1"
+
+#: devices/pic/pic/pic_group.cpp:31 devices/pic/pic/pic_group.cpp:37
+msgid " (%2 bits)"
+msgstr " (%2 Bitek)"
+
+#: libgui/project_manager_ui.cpp:106 libgui/project_manager_ui.cpp:175
+msgid " (default)"
+msgstr " (Alapérték)"
+
+#: devices/gui/register_view.cpp:72
+msgid " (input)"
+msgstr "(Bemenet)"
+
+#: devices/pic/pic/pic_group.cpp:38
+msgid " (not programmable)"
+msgstr "(Nem programozható)"
+
+#: devices/gui/register_view.cpp:68
+msgid " (output)"
+msgstr "(Kimenet)"
+
+#: devices/pic/gui/pic_memory_editor.cpp:255
+msgid " - not programmed by default"
+msgstr "- nem programozható standard"
+
+#: devices/pic/gui/pic_memory_editor.cpp:254
+#, fuzzy
+msgid " - recommended mask: %1"
+msgstr " - Maszk olvasás: %1"
+
+#: piklab-coff/main.cpp:176
+#, fuzzy
+msgid " Filename:Line"
+msgstr "Filename"
+
+#: piklab-prog/cmdline.cpp:137
+#, fuzzy
+msgid " no port detected."
+msgstr " Nem tudom azonosítani a portot"
+
+#: piklab-prog/cmdline.cpp:133
+#, fuzzy
+msgid " support disabled."
+msgstr " Nem tudom azonosítani a portot"
+
+#: tools/gui/toolchain_config_widget.cpp:167
+msgid "\"%1\" found"
+msgstr "\"%1\" létező"
+
+#: tools/gui/toolchain_config_widget.cpp:234
+msgid "\"%1\" not found"
+msgstr "\"%1\" nem létező"
+
+#: tools/gui/toolchain_config_widget.cpp:168
+msgid "\"%1\" not recognized"
+msgstr "\"%1\" nem elfogadott"
+
+#: progs/gpsim/base/gpsim.cpp:68
+#, fuzzy
+msgid "\"gpsim\" unexpectedly exited."
+msgstr "\"gpsim\" váratlanul kilépett"
+
+#: coff/base/text_coff.cpp:252 coff/base/text_coff.cpp:257
+msgid "%1 (magic id: %2)"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:221
+msgid "%1 (proc. %2; rev. %3.%4)"
+msgstr "%1 (proc. %2; rev. %3.%4)"
+
+#: devices/pic/base/pic.cpp:215 devices/pic/base/pic.cpp:225
+msgid "%1 (rev. %2)"
+msgstr "%1 (rev. %2)"
+
+#: devices/pic/base/pic.cpp:218
+#, fuzzy
+msgid "%1 (rev. %2.%3)"
+msgstr "%1 (rev. %2)"
+
+#: progs/gui/hardware_config_widget.cpp:178
+msgid "%1 <custom>"
+msgstr "%1 <custom>"
+
+#: piklab-prog/cli_interactive.cpp:312
+msgid "%1 = %2"
+msgstr "%1 = %2"
+
+#: progs/gui/hardware_config_widget.cpp:50
+msgid "%1 at %2:"
+msgstr "%1 től %2:"
+
+#: devices/mem24/mem24/mem24_group.cpp:21 devices/pic/pic/pic_group.cpp:36
+msgid "%1 bytes"
+msgstr "%1 bájtok"
+
+#: devices/pic/base/pic_config.cpp:308
+msgid "%1 for block %2"
+msgstr "%1 blokkoknak %2"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:883
+msgid "%1 options"
+msgstr "%1 opciók"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:647
+msgid "%1 was written by somebody who wants to remain anonymous."
+msgstr "%1 ."
+
+#: devices/pic/pic/pic_group.cpp:30
+msgid "%1 words"
+msgstr "%1 words"
+
+#: devices/pic/gui/pic_memory_editor.cpp:256
+msgid "%1-bit words - mask: %2"
+msgstr "%1-bit words - mask: %2"
+
+#: devices/pic/prog/pic_prog.cpp:467
+msgid "%1: Erasing this range only is not supported with this programmer. This will erase the whole chip and restore the other memory ranges."
+msgstr " %1: A szakasz törlése nem támogatott ennél a programozónál. Töröld az egész chipet és tedd máshova"
+
+#: libgui/toplevel.cpp:278
+msgid "&Advanced..."
+msgstr "&További..."
+
+#: devices/gui/memory_editor.cpp:283 libgui/toplevel.cpp:270
+msgid "&Blank Check"
+msgstr "&Üresség-teszt"
+
+#: libgui/toplevel.cpp:294
+msgid "&Break<Translators: it is the verb>"
+msgstr ""
+
+#: libgui/toplevel.cpp:246
+msgid "&Build Project"
+msgstr "&Build Projekt"
+
+#: devices/gui/memory_editor.cpp:275
+msgid "&Clear"
+msgstr "&Törlés"
+
+#: libgui/toplevel.cpp:248
+msgid "&Compile File"
+msgstr "&A fájl lefordítása"
+
+#: libgui/toplevel.cpp:314
+msgid "&Config Generator..."
+msgstr "&Konfiguráció generátor"
+
+#: libgui/likeback.cpp:97
+msgid "&Configure Email Address..."
+msgstr "&e-mail beállítás..."
+
+#: libgui/toplevel.cpp:256
+msgid "&Connect"
+msgstr "&Kapcsolódás"
+
+#. i18n: file ./data/app_data/piklabui.rc line 101
+#: rc.cpp:30
+#, no-c-format
+msgid "&Debugger"
+msgstr "&Hibakereső"
+
+#: libgui/toplevel.cpp:312
+msgid "&Device Information..."
+msgstr "&Eszköz információk..."
+
+#: libgui/toplevel.cpp:260
+msgid "&Disconnect"
+msgstr "&Szétkapcsolás"
+
+#: libgui/toplevel.cpp:296
+#, fuzzy
+msgid "&Disconnect/Stop"
+msgstr "&Szétkapcsolás"
+
+#: devices/gui/memory_editor.cpp:282 libgui/toplevel.cpp:268
+msgid "&Erase"
+msgstr "&Törlés"
+
+#: libgui/toplevel.cpp:310
+#, fuzzy
+msgid "&Find Files..."
+msgstr "Fájl hozzáadás..."
+
+#: libgui/toplevel.cpp:183
+msgid "&New Source File..."
+msgstr "&Új forrásfájl..."
+
+#: libgui/toplevel.cpp:308
+msgid "&Pikloops..."
+msgstr "&Pikloops..."
+
+#: devices/gui/memory_editor.cpp:279 libgui/toplevel.cpp:262
+msgid "&Program"
+msgstr "&Programozás"
+
+#. i18n: file ./data/app_data/piklabui.rc line 63
+#: rc.cpp:21
+#, no-c-format
+msgid "&Project"
+msgstr "&Projekt"
+
+#: devices/gui/memory_editor.cpp:281 libgui/toplevel.cpp:266
+msgid "&Read"
+msgstr "&Olvasás"
+
+#: libgui/toplevel.cpp:219
+msgid "&Reset Layout"
+msgstr ""
+
+#: libgui/toplevel.cpp:272 libgui/toplevel.cpp:286
+msgid "&Run"
+msgstr "&Start"
+
+#: libgui/device_gui.cpp:90
+msgid "&Select"
+msgstr "&Választás"
+
+#: libgui/toplevel.cpp:288
+msgid "&Step"
+msgstr "&Lépés"
+
+#: libgui/toplevel.cpp:274
+msgid "&Stop"
+msgstr "&Állj"
+
+#: libgui/toplevel.cpp:316
+msgid "&Template Generator..."
+msgstr "Alapfájl generátor"
+
+#: devices/gui/memory_editor.cpp:280 libgui/toplevel.cpp:264
+msgid "&Verify"
+msgstr "&Összehasonlítás"
+
+#: devices/gui/memory_editor.cpp:276
+msgid "&Zero"
+msgstr "&Nulla"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:545
+msgid "'%1' missing."
+msgstr "'%1' hiányzik."
+
+#: devices/pic/gui/pic_memory_editor.cpp:366
+msgid "(backup)"
+msgstr "(visszaállítás)"
+
+#: tools/list/compile_manager.cpp:83 tools/list/compile_manager.cpp:112
+#: tools/list/compile_manager.cpp:137
+msgid "*** Aborted ***"
+msgstr "*** Kilépett ***"
+
+#: tools/list/compile_process.cpp:143
+#, fuzzy
+msgid "*** Error ***"
+msgstr "*** Hiba ***"
+
+#: tools/list/compile_process.cpp:140
+msgid "*** Exited with status: %1 ***"
+msgstr "*** Kilépési hely: %1 ***"
+
+#: tools/list/compile_manager.cpp:194 tools/list/compile_manager.cpp:268
+msgid "*** Success ***"
+msgstr "*** Kész ***"
+
+#: tools/list/compile_process.cpp:150
+msgid "*** Timeout ***"
+msgstr "*** Idő lejárt ***"
+
+#: common/cli/cli_log.cpp:62
+#, fuzzy
+msgid "*no*"
+msgstr "Nem"
+
+#: common/cli/cli_log.cpp:62
+msgid "*yes*"
+msgstr "*igen*"
+
+#: progs/base/generic_prog.cpp:28
+msgid "---"
+msgstr "---"
+
+#: devices/pic/base/pic_config.cpp:74
+msgid "00"
+msgstr "00"
+
+#: devices/pic/base/pic_config.cpp:74
+msgid "01"
+msgstr "01"
+
+#: devices/pic/base/pic_config.cpp:75
+msgid "10"
+msgstr "10"
+
+#: tools/jal/jal_generator.cpp:22
+msgid "10MHz crystal"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:75
+msgid "11"
+msgstr "11"
+
+#: devices/pic/base/pic_config.cpp:216
+msgid "12-bit external bus"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:217
+msgid "16-bit external bus"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:53
+#, fuzzy
+msgid "17C Family"
+msgstr "17X család"
+
+#: devices/pic/base/pic.cpp:54
+#, fuzzy
+msgid "18C Family"
+msgstr "18X család"
+
+#: devices/pic/base/pic.cpp:55
+#, fuzzy
+msgid "18F Family"
+msgstr "18X család"
+
+#: devices/pic/base/pic.cpp:56
+#, fuzzy
+msgid "18J Family"
+msgstr "18X család"
+
+#: devices/pic/base/pic_config.cpp:218
+msgid "20-bit external bus"
+msgstr ""
+
+#: devices/mem24/base/mem24.h:25
+#, fuzzy
+msgid "24 EEPROM"
+msgstr "Data EEPROM"
+
+#: devices/pic/base/pic.cpp:57
+#, fuzzy
+msgid "24F Family"
+msgstr "18X család"
+
+#: devices/pic/base/pic.cpp:58
+#, fuzzy
+msgid "24H Family"
+msgstr "18X család"
+
+#: devices/pic/base/pic.cpp:59
+#, fuzzy
+msgid "30F Family"
+msgstr "18X család"
+
+#: devices/pic/base/pic.cpp:60
+#, fuzzy
+msgid "33F Family"
+msgstr "18X család"
+
+#: devices/pic/base/pic_config.cpp:207
+msgid "4 MHz"
+msgstr "4 MHz"
+
+#: devices/pic/base/pic_config.cpp:222
+msgid "5-bit address mask mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:221
+msgid "7-bit address mask mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:206
+msgid "8 MHz"
+msgstr "8 MHz"
+
+#: libgui/device_gui.cpp:155
+#, fuzzy
+msgid "<Feature>"
+msgstr "<auto>"
+
+#: libgui/device_gui.cpp:142
+msgid "<Memory Type>"
+msgstr "<Memória típus>"
+
+#: libgui/device_gui.cpp:118
+msgid "<Programmer>"
+msgstr "<Programozó>"
+
+#: libgui/device_gui.cpp:150
+#, fuzzy
+msgid "<Status>"
+msgstr "Státusz"
+
+#: libgui/device_gui.cpp:130
+msgid "<Toolchain>"
+msgstr "<Fordítóprogram>"
+
+#: tools/boost/boostbasic.cpp:22
+msgid "<a href=\"%1\">BoostBasic Compiler</a> is a Basic compiler distributed by SourceBoost Technologies."
+msgstr ""
+
+#: tools/boost/boostc.cpp:22
+msgid "<a href=\"%1\">BoostC Compiler</a> is a C compiler distributed by SourceBoost Technologies."
+msgstr ""
+
+#: tools/boost/boostcpp.cpp:23
+msgid "<a href=\"%1\">BoostC++ Compiler</a> is a C compiler distributed by SourceBoost Technologies."
+msgstr ""
+
+#: tools/cc5x/cc5x.cpp:55
+msgid "<a href=\"%1\">CC5X</a> is a C compiler distributed by B Knudsen Data."
+msgstr ""
+
+#: tools/ccsc/ccsc.cpp:90
+msgid "<a href=\"%1\">CCS Compiler</a> is a C compiler distributed by CCS."
+msgstr ""
+
+#: tools/gputils/gputils.cpp:40
+msgid "<a href=\"%1\">GPUtils</a> is an open-source assembler and linker suite.<br>"
+msgstr ""
+
+#: tools/jalv2/jalv2.cpp:31
+msgid "<a href=\"%1\">JAL V2</a> is a new compiler for the high-level language JAL."
+msgstr ""
+
+#: tools/jal/jal.cpp:31
+msgid "<a href=\"%1\">JAL</a> is a high-level language for PIC microcontrollers."
+msgstr ""
+
+#: tools/mpc/mpc.cpp:50
+msgid "<a href=\"%1\">MPC Compiler</a> is a C compiler distributed by Byte Craft."
+msgstr ""
+
+#: tools/picc/picc.cpp:119
+msgid "<a href=\"%1\">PICC 18</a> is a C compiler distributed by HTSoft."
+msgstr ""
+
+#: tools/picc/picc.cpp:93
+msgid "<a href=\"%1\">PICC-Lite</a> is a freeware C compiler distributed by HTSoft."
+msgstr ""
+
+#: tools/picc/picc.cpp:106
+msgid "<a href=\"%1\">PICC</a> is a C compiler distributed by HTSoft."
+msgstr ""
+
+#: progs/gui/port_selector.cpp:88
+msgid "<a href=\"%1\">See Piklab homepage for help</a>."
+msgstr ""
+
+#: devices/list/device_list.cpp:16
+msgid "<auto>"
+msgstr "<auto>"
+
+#: tools/gui/toolchain_config_widget.cpp:299
+msgid "<b>Device string #%1:</b><br>%2<br>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:298
+msgid "<b>Device string:</b><br>%1<br>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:271
+msgid "<b>Version string:</b><br>%1<br></qt>"
+msgstr ""
+
+#: libgui/hex_editor.cpp:101
+#, fuzzy
+msgid "<b>Warning:</b> hex file seems to be incompatible with the selected device %1:<br>%2"
+msgstr "<b>Figyelem:</b> a Hex fájl nem kompatibilis a választott eszközzel %1:<br>%2"
+
+#: libgui/project_manager_ui.cpp:165
+msgid "<default>"
+msgstr "<alapértelmezett>"
+
+#: piklab-prog/cmdline.cpp:411 piklab-prog/cmdline.cpp:426
+#: piklab-prog/cmdline.cpp:431 piklab-prog/cmdline.cpp:435
+msgid "<from config>"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:182
+msgid "<invalid>"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:62
+msgid "<no project>"
+msgstr "<nincs project>"
+
+#: devices/pic/pic/pic_group.cpp:54
+msgid "<none>"
+msgstr "<nincs>"
+
+#: piklab-hex/main.cpp:241 piklab-hex/main.cpp:245 piklab-prog/cmdline.cpp:403
+#: piklab-prog/cmdline.cpp:408 piklab-prog/cmdline.cpp:413
+#: piklab-prog/cmdline.cpp:416 piklab-prog/cmdline.cpp:422
+#: piklab-prog/cmdline.cpp:430 piklab-prog/cmdline.cpp:439
+#: piklab-prog/cmdline.cpp:443 piklab-coff/main.cpp:247
+msgid "<not set>"
+msgstr "<nem beállított>"
+
+#: libgui/likeback.cpp:657
+msgid "<p>Error while trying to send the report.</p><p>Please retry later.</p>"
+msgstr "<p>Hiba a report küldésénél.</p><p>Próbáld később.</p>"
+
+#: libgui/likeback.cpp:659
+msgid "<p>Your comment has been sent successfully. It will help improve the application.</p><p>Thanks for your time.</p>"
+msgstr "<p>A megjegyzésed elküldve, köszönöm"
+
+#: tools/c18/c18.cpp:85
+msgid "<qt><a href=\"%1\">C18</a> is a C compiler distributed by Microchip.</qt>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:296
+msgid "<qt><b>Command #%1 for devices detection:</b><br>%2<br>"
+msgstr "<qt><b>Parancs #%1 eszköz azonosítás:</b><br>%2<br>"
+
+#: tools/gui/toolchain_config_widget.cpp:295
+msgid "<qt><b>Command for devices detection:</b><br>%1<br>"
+msgstr "<qt><b>Eszköz azonosítás:</b><br>%2<br>"
+
+#: tools/gui/toolchain_config_widget.cpp:270
+msgid "<qt><b>Command for executable detection:</b><br>%1<br>"
+msgstr "<qt><b>Command for executable detection:</b><br>%1<br>"
+
+#: tools/gui/tool_config_widget.cpp:113
+msgid "<qt>This values will be placed after the linked objects.</qt>"
+msgstr ""
+
+#: piklab-hex/main.cpp:278
+#, fuzzy
+msgid "<value>"
+msgstr "<auto>"
+
+#: devices/pic/base/pic.cpp:72
+msgid "ADC"
+msgstr ""
+
+#: coff/base/coff_object.cpp:124
+msgid "Absolute Value"
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:47
+msgid "Access Bank (high)"
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:47
+msgid "Access Bank (low)"
+msgstr ""
+
+#: progs/direct/base/direct_mem24.cpp:168
+msgid "Acknowledge bit incorrect"
+msgstr "Acknowledge Bit hibás"
+
+#: devices/pic/base/pic_config.cpp:108 devices/pic/base/pic_config.cpp:111
+msgid "Active high"
+msgstr "Aktív magas szint"
+
+#: devices/pic/base/pic_config.cpp:109 devices/pic/base/pic_config.cpp:112
+msgid "Active low"
+msgstr "Aktiv alacsony szint"
+
+#: libgui/project_manager.cpp:200 libgui/toplevel.cpp:242
+msgid "Add Current File"
+msgstr "Ezen fájl hozzáadása"
+
+#: libgui/toplevel.cpp:240
+msgid "Add Object File..."
+msgstr "Object Fájl hozzáadás..."
+
+#: libgui/project_manager.cpp:199 libgui/project_manager.cpp:214
+#, fuzzy
+msgid "Add Object Files..."
+msgstr "Object Fájl hozzáadás..."
+
+#: libgui/toplevel.cpp:238
+msgid "Add Source File..."
+msgstr "Forrásfájl hozzáadás..."
+
+#: libgui/project_wizard.cpp:149
+msgid "Add Source Files"
+msgstr "Forrásfájlok hozzáadás..."
+
+#: libgui/project_manager.cpp:198 libgui/project_manager.cpp:219
+#, fuzzy
+msgid "Add Source Files..."
+msgstr "Forrásfájl hozzáadás..."
+
+#: libgui/project_wizard.cpp:151
+msgid "Add existing files."
+msgstr "Létező fájl hozzáadás"
+
+#: libgui/project_manager.cpp:314
+msgid "Add only"
+msgstr ""
+
+#: libgui/new_dialogs.cpp:66
+msgid "Add to project"
+msgstr "Hozzáadás a Projekthez"
+
+#: libgui/breakpoint_view.cpp:49 piklab-coff/main.cpp:176
+msgid "Address"
+msgstr "Cím"
+
+#: devices/pic/base/pic_config.cpp:129
+msgid "Address bus width (in bits)"
+msgstr "Cím busz (in bits)"
+
+#: progs/gui/prog_group_ui.cpp:50
+msgid "Advanced Dialog"
+msgstr "Kiterjesztett dialógus"
+
+#: devices/pic/base/pic_config.cpp:393
+msgid "All"
+msgstr "Mind"
+
+#: libgui/toplevel.cpp:553
+msgid "All Files"
+msgstr "Összes fájl"
+
+#: common/common/purl_base.cpp:117
+msgid "All Object Files"
+msgstr "Minden Obj fájl"
+
+#: common/common/purl_base.cpp:105
+msgid "All Source Files"
+msgstr "Minden forrásfájl"
+
+#: piklab-prog/cli_interactive.cpp:192
+#, fuzzy
+msgid "All breakpoints removed."
+msgstr "Összes töréspont eltávolítása"
+
+#: common/global/log.cpp:29
+msgid "All debug messages"
+msgstr "Minden hibakereső üzenet"
+
+#: tools/gputils/gputils_config.cpp:13 tools/c18/c18_config.cpp:12
+msgid "All messages"
+msgstr "Minden üzenet"
+
+#: devices/pic/prog/pic_prog.cpp:191
+#, fuzzy
+msgid "All or part of code memory is protected so it cannot be preserved. Continue anyway?"
+msgstr "Minden memória írásvédett. Folytassam?"
+
+#: devices/pic/prog/pic_prog.cpp:198
+#, fuzzy
+msgid "All or part of data EEPROM is protected so it cannot be preserved. Continue anyway?"
+msgstr "Az eeprom írásvédett. Folytassam?"
+
+#: devices/pic/base/pic_config.cpp:271
+msgid "Allow multiple reconfigurations"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:270
+msgid "Allow only one reconfiguration"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:275
+#, fuzzy
+msgid "Alternate"
+msgstr "Alternatívák"
+
+#: devices/pic/base/pic_config.cpp:272
+#, fuzzy
+msgid "Alternate I2C pins"
+msgstr "Alternatívák"
+
+#: devices/base/device_group.cpp:239
+msgid "Alternatives"
+msgstr "Alternatívák"
+
+#: devices/pic/base/pic_config.cpp:105
+msgid "Analog"
+msgstr ""
+
+#: coff/base/coff.cpp:22
+msgid "Archive"
+msgstr ""
+
+#: libgui/likeback.cpp:135
+msgid "Are you sure you do not want to participate anymore in the application enhancing program?"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:221
+msgid "Argument file type not recognized."
+msgstr "Az argument fájl típusa nem elfogadható"
+
+#: piklab-prog/cli_interactive.cpp:196
+#, fuzzy
+msgid "Argument should be breakpoint index."
+msgstr "Argument should be breakpoint index"
+
+#: piklab-prog/cli_interactive.cpp:186
+#, fuzzy
+msgid "Arguments not recognized."
+msgstr "A paraméter nem elfogadott"
+
+#: tools/gui/tool_config_widget.cpp:44
+msgid "Arguments:"
+msgstr "Paraméterek:"
+
+#: coff/base/cdb_parser.cpp:23 coff/base/coff_object.cpp:180
+msgid "Array"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:59
+msgid "Asix Piccolo"
+msgstr "Asix Piccolo"
+
+#: progs/direct/base/direct_prog_config.cpp:61
+msgid "Asix Piccolo Grande"
+msgstr "Asix Piccolo Grande"
+
+#: tools/base/generic_tool.cpp:18 common/common/purl_base.cpp:20
+#: common/common/purl_base.cpp:25
+msgid "Assembler"
+msgstr "Assembler"
+
+#: common/common/purl_base.cpp:33
+#, fuzzy
+msgid "Assembler File"
+msgstr "Assembler"
+
+#: common/common/purl_base.cpp:34
+#, fuzzy
+msgid "Assembler File for PIC30"
+msgstr "ASM-Fájl PIC30"
+
+#: common/common/purl_base.cpp:35
+#, fuzzy
+msgid "Assembler File for PICC"
+msgstr "ASM-Fájl PICC"
+
+#: tools/base/generic_tool.cpp:18
+#, fuzzy
+msgid "Assembler:"
+msgstr "Assembler"
+
+#: devices/base/generic_memory.cpp:34
+msgid "At least one value (at address %1) is defined outside memory ranges."
+msgstr "Egy érték (a %1 címen) kívül esik a memórián."
+
+#: devices/mem24/mem24/mem24_memory.cpp:86 devices/pic/pic/pic_memory.cpp:545
+msgid "At least one word (at offset %1) is larger (%2) than the corresponding mask (%3)."
+msgstr "Legalább egy szó ( %1)nagyobb (%2) mint a maszk (%3)."
+
+#: common/global/about.cpp:79
+msgid "Author and maintainer."
+msgstr "Alkotó és karbantartó."
+
+#: common/global/about.cpp:82
+msgid "Author of gputils"
+msgstr "A gputils alkotója"
+
+#: common/global/about.cpp:83
+msgid "Author of likeback"
+msgstr "A likeback alkotója"
+
+#: coff/base/coff_object.cpp:147
+#, fuzzy
+msgid "Auto Argument"
+msgstr "Paraméterek:"
+
+#: tools/gui/tool_config_widget.cpp:24
+msgid "Automatic"
+msgstr "Automatikus"
+
+#: coff/base/coff_object.cpp:129
+#, fuzzy
+msgid "Automatic Variable"
+msgstr "Automatikus"
+
+#: libgui/global_config.cpp:20
+msgid "Automatically rebuild project before programming if it is modified."
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:351
+msgid "Bad checksum for read block: %1 (%2 expected)."
+msgstr "Rossz checksum az olvasott blokban: %1 (%2 )."
+
+#: progs/icd2/base/icd2.cpp:232
+msgid "Bad checksum for received string"
+msgstr "Rossz checksum a vett szövegben"
+
+#: devices/pic/base/pic_config.cpp:68
+msgid "Bandgap voltage calibration"
+msgstr "Bandgap feszültség kalibrálás"
+
+#: devices/pic/gui/pic_group_ui.cpp:59
+#: devices/pic/gui/pic_register_view.cpp:61
+msgid "Bank %1"
+msgstr "Bank %1"
+
+#: devices/pic/gui/pic_register_view.cpp:54
+msgid "Bank %1 (high)"
+msgstr "Bank %1 (high)"
+
+#: devices/pic/gui/pic_register_view.cpp:54
+msgid "Bank %1 (low)"
+msgstr "Bank %1 (low)"
+
+#: devices/pic/base/pic.cpp:51
+msgid "Baseline Family"
+msgstr "Alapkonfigurációs család"
+
+#: common/common/purl_base.cpp:29
+msgid "Basic Compiler"
+msgstr "Basic Fordító"
+
+#: common/common/purl_base.cpp:41
+msgid "Basic Source File"
+msgstr "Basic forrásfájl"
+
+#: coff/base/coff_object.cpp:149
+msgid "Beginning or End of Block"
+msgstr ""
+
+#: coff/base/coff_object.cpp:150
+msgid "Beginning or End of Function"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:20
+#, fuzzy
+msgid "Bin to Hex"
+msgstr "Bin-ből Hex-be"
+
+#: tools/base/generic_tool.cpp:20
+msgid "Bin to Hex:"
+msgstr "Bin-ből Hex-be:"
+
+#: common/common/number.cpp:21
+msgid "Binary"
+msgstr "Bináris"
+
+#: coff/base/cdb_parser.cpp:55
+#, fuzzy
+msgid "Bit Addressable"
+msgstr "Cím"
+
+#: coff/base/cdb_parser.cpp:39 coff/base/coff_object.cpp:146
+msgid "Bit Field"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:36
+msgid "Blank Checking..."
+msgstr "Ürességteszt..."
+
+#: progs/base/prog_config.cpp:74
+msgid "Blank check after erase."
+msgstr "Ürességteszt a törlés után."
+
+#: piklab-prog/cmdline.cpp:49
+msgid "Blank check device memory."
+msgstr "Ürességteszt a memóriában."
+
+#: progs/base/generic_prog.cpp:289
+#, fuzzy
+msgid "Blank checking done."
+msgstr "Ürességteszt kész"
+
+#: progs/base/generic_prog.cpp:400
+#, fuzzy
+msgid "Blank checking successful."
+msgstr "Ürességteszt kész"
+
+#: progs/base/generic_prog.cpp:287 progs/base/generic_prog.cpp:398
+msgid "Blank checking..."
+msgstr "Ürességteszt..."
+
+#: piklab-prog/cmdline.cpp:316
+msgid "Blank-checking device memory not supported for specified programmer."
+msgstr "Ürességteszt nem lehetséges ezzel a programozóval."
+
+#: devices/mem24/mem24/mem24_group.cpp:38
+#: devices/pic/base/pic_protection.cpp:360
+#, fuzzy
+msgid "Block #%1"
+msgstr "Blokk %1"
+
+#: tools/boost/boostbasic.h:51
+msgid "BoostBasic Compiler for PIC16"
+msgstr "BoostBasic Compiler PIC16-hoz"
+
+#: tools/boost/boostbasic.h:62
+msgid "BoostBasic Compiler for PIC18"
+msgstr "BoostBasic Compiler PIC18-hoz"
+
+#: tools/boost/boostc.h:51
+msgid "BoostC Compiler for PIC16"
+msgstr "BoostC Compiler PIC16-hoz"
+
+#: tools/boost/boostc.h:62
+msgid "BoostC Compiler for PIC18"
+msgstr "BoostC Compiler PIC18-hoz"
+
+#: tools/boost/boostcpp.h:51
+msgid "BoostC++ Compiler for PIC16"
+msgstr "BoostC++ Compiler PIC16-hoz"
+
+#: tools/boost/boostcpp.h:62
+msgid "BoostC++ Compiler for PIC18"
+msgstr "BoostC++ Compiler PIC18-hoz"
+
+#: devices/pic/base/pic_protection.cpp:351
+msgid "Boot Block"
+msgstr "Boot Block"
+
+#: devices/pic/base/pic_protection.cpp:350
+#, fuzzy
+msgid "Boot Segment"
+msgstr "Túl kevés paraméter."
+
+#: devices/pic/base/pic_config.cpp:125
+msgid "Boot block size"
+msgstr "Boot Block Méret"
+
+#: devices/pic/base/pic_config.cpp:23
+msgid "Boot code-protection"
+msgstr "Boot kód lezárva"
+
+#: devices/pic/base/pic_config.cpp:233
+#, fuzzy
+msgid "Boot segment EEPROM size"
+msgstr "Boot Block Méret"
+
+#: devices/pic/base/pic_config.cpp:234
+msgid "Boot segment RAM size"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:230
+msgid "Boot segment security"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:229
+#, fuzzy
+msgid "Boot segment size"
+msgstr "Boot Block Méret"
+
+#: devices/pic/base/pic_config.cpp:228
+#, fuzzy
+msgid "Boot segment write-protection"
+msgstr "Boot írásvédett"
+
+#: devices/pic/base/pic_config.cpp:31
+msgid "Boot table read-protection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:27
+msgid "Boot write-protection"
+msgstr "Boot írásvédett"
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:89
+msgid "Bootloader identified device as: %1"
+msgstr ""
+
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:84
+msgid "Bootloader version %1 detected"
+msgstr ""
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:36
+msgid "Bootloader version %1 detected."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:231
+#, fuzzy
+msgid "Breaking..."
+msgstr "Erasing..."
+
+#: piklab-prog/cli_interactive.cpp:161
+#, fuzzy
+msgid "Breakpoint already set at %1."
+msgstr "Töréspont már beállítva itt %1"
+
+#: piklab-prog/cli_interactive.cpp:201
+#, fuzzy
+msgid "Breakpoint at %1 removed."
+msgstr "Töréspont törölve %1 "
+
+#: libgui/gui_debug_manager.cpp:125
+msgid "Breakpoint at non-code line cannot be activated."
+msgstr "A töréspont nincs a forráskód sorában, nem tudom aktiválni"
+
+#: progs/manager/debug_manager.cpp:142
+msgid "Breakpoint at non-code line."
+msgstr "Töréspont nincs a kódsorban"
+
+#: progs/manager/debug_manager.cpp:147
+msgid "Breakpoint corresponds to several addresses. Using the first one."
+msgstr "Breakpoint corresponds to several addresses. Using the first one."
+
+#: piklab-prog/cli_interactive.cpp:197
+#, fuzzy
+msgid "Breakpoint index too large."
+msgstr "Töréspont indexe túl nagy"
+
+#: piklab-prog/cli_interactive.cpp:165
+#, fuzzy
+msgid "Breakpoint set at %1."
+msgstr "Töréspont beállítva ide %1"
+
+#: libgui/toplevel.cpp:150
+msgid "Breakpoints"
+msgstr "Töréspontok"
+
+#: piklab-prog/cli_interactive.cpp:172
+msgid "Breakpoints:"
+msgstr "Töréspontok:"
+
+#: devices/pic/base/pic_config.cpp:76
+msgid "Brown-out detect"
+msgstr "Brown-out detect"
+
+#: devices/pic/base/pic_config.cpp:89
+msgid "Brown-out reset software"
+msgstr "Szoftveres Brown-out reset"
+
+#: devices/pic/base/pic_config.cpp:84
+msgid "Brown-out reset voltage"
+msgstr "Brown-out reset feszültség"
+
+#. i18n: file ./data/app_data/piklabui.rc line 76
+#: rc.cpp:24
+#, no-c-format
+msgid "Bu&ild"
+msgstr "Bu&ild"
+
+#: libgui/project_manager.cpp:194
+msgid "Build Project"
+msgstr "Projekt lefordítása"
+
+#. i18n: file ./data/app_data/piklabui.rc line 155
+#: rc.cpp:45
+#, no-c-format
+msgid "Build Toolbar"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:53
+msgid "Building project..."
+msgstr "Fordítom a projektet"
+
+#: common/common/purl_base.cpp:26
+msgid "C Compiler"
+msgstr "C Compiler"
+
+#: common/common/purl_base.cpp:39
+msgid "C Header File"
+msgstr "C Header File"
+
+#: common/common/purl_base.cpp:37
+msgid "C Source File"
+msgstr "C Source File"
+
+#: libgui/toplevel.cpp:193
+msgid "C&lose All"
+msgstr "Ö&sszeset bezár"
+
+#: common/common/purl_base.cpp:28
+msgid "C++ Compiler"
+msgstr "C++ Compiler"
+
+#: common/common/purl_base.cpp:38
+msgid "C++ Source File"
+msgstr "C++ Source File"
+
+#: tools/c18/c18.h:42
+msgid "C18 Compiler"
+msgstr "C18 Compiler"
+
+#: devices/pic/base/pic.cpp:77
+msgid "CAN"
+msgstr ""
+
+#: tools/cc5x/cc5x.h:33
+#, fuzzy
+msgid "CC5X Compiler"
+msgstr "CCS Compiler"
+
+#: devices/pic/base/pic.cpp:71
+msgid "CCP"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:88
+msgid "CCP1 multiplex"
+msgstr "CCP1 multiplex"
+
+#: devices/pic/base/pic_config.cpp:87
+msgid "CCP2 multiplex"
+msgstr "CCP2 multiplex"
+
+#: tools/ccsc/ccsc.h:36 coff/base/coff_object.cpp:38
+msgid "CCS Compiler"
+msgstr "CCS Compiler"
+
+#: common/common/purl_base.cpp:54
+msgid "COD File"
+msgstr "COD File"
+
+#: tools/base/generic_tool.cpp:38
+#, fuzzy
+msgid "COFF"
+msgstr "COFF File"
+
+#: common/common/purl_base.cpp:55
+msgid "COFF File"
+msgstr "COFF File"
+
+#: coff/base/coff.cpp:67 coff/base/coff.cpp:77
+msgid "COFF file is truncated (offset: %1  nbBytes: %2  size:%3)."
+msgstr "COFF fájl megcsonkítva (offset: %1  nbBytes: %2  size:%3)."
+
+#: piklab-prog/cli_interactive.cpp:61
+msgid "COFF file to be used for debugging."
+msgstr "Hex fájl a programozáshoz."
+
+#: piklab-coff/main.cpp:279
+#, fuzzy
+msgid "COFF filename."
+msgstr "Filename"
+
+#: coff/base/coff_object.cpp:454
+msgid "COFF format not supported: magic number is %1."
+msgstr "COFF formátum nem alkalmazható:varázsszám %1"
+
+#: piklab-coff/main.cpp:212
+#, fuzzy
+msgid "COFF type:"
+msgstr "COFF File"
+
+#: devices/pic/base/pic_config.cpp:199
+msgid "CPU system clock (divided by)"
+msgstr "Processzor frekvencia (osztva)"
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:149
+msgid "CRC error from bootloader: retrying..."
+msgstr ""
+
+#: devices/base/hex_buffer.cpp:142
+msgid "CRC mismatch (line %1)."
+msgstr "Rossz CRC (%1 sorban)."
+
+#: devices/pic/base/pic.cpp:26 progs/gui/prog_group_ui.cpp:92
+msgid "Calibration"
+msgstr "Kalibrálás"
+
+#: devices/pic/base/pic.cpp:33
+msgid "Calibration Backup"
+msgstr "Kalibrálás visszatöltése"
+
+#: devices/pic/base/pic_config.cpp:22
+msgid "Calibration code-protection"
+msgstr "Kalibrálás kódvédett"
+
+#: progs/pickit2/base/pickit_prog.cpp:46
+msgid "Calibration firmware file seems incompatible with selected device %1."
+msgstr "Kalibrálás firmware fájl úgytűnik nem kompatibilis a választott eszközzel %1"
+
+#: devices/pic/base/pic.cpp:239
+msgid "Calibration word at address %1 is blank."
+msgstr "Kalibrációs word %1 címen"
+
+#: devices/pic/base/pic.cpp:245
+msgid "Calibration word is not a compatible opcode (%2)."
+msgstr "Kalibrációs word nem kompatibilis műveleti kód"
+
+#: tools/list/compile_manager.cpp:65
+msgid "Cannot build empty project."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:406
+msgid "Cannot erase ROM or EPROM device."
+msgstr "Nem tudom törölni a ROM-ot vagy az EPROMOT"
+
+#: devices/pic/prog/pic_prog.cpp:446
+msgid "Cannot erase protected code memory. Consider erasing the whole chip."
+msgstr "Nem tudom törölni a lezárt kódmemóriát. Figyelem törölni kell az egész chip-et"
+
+#: devices/pic/prog/pic_prog.cpp:450
+#, fuzzy
+msgid "Cannot erase protected data EEPROM. Consider erasing the whole chip."
+msgstr "Nem tudom törölni a lezárt eepromot. Figyelem törölni kell az egész chip-et"
+
+#: devices/pic/prog/pic_prog.cpp:464
+msgid "Cannot erase specified range because of programmer limitations."
+msgstr ""
+
+#: libgui/project_manager.cpp:420
+msgid "Cannot open without device specified."
+msgstr "Nem tudom megnyitni eszközbeállítás  nélkül"
+
+#: devices/pic/prog/pic_prog.cpp:526
+msgid "Cannot read ROMless device."
+msgstr "Nem tudok olvasni ROM nélküli eszközből"
+
+#: progs/pickit2/base/pickit2.cpp:116
+msgid "Cannot read voltages with this firmware version."
+msgstr "Nem tudok feszültséget olvasni ezzel a firmware verzióval."
+
+#: libgui/gui_debug_manager.cpp:242
+msgid "Cannot show disassembly location for non-code line."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:250
+msgid "Cannot specify range without specifying device."
+msgstr "Nem tudom beállítani a méretet eszközbeállítás nélkül."
+
+#: progs/manager/debug_manager.cpp:387
+msgid "Cannot start debugging session without input file (%1)."
+msgstr "Nem tudom indítani a hibakeresőt bemeneti fájl nélkül(%1)."
+
+#: progs/manager/debug_manager.cpp:372
+msgid "Cannot start debugging session without input file (not specified)."
+msgstr "Nem tudom indítani a hibakeresőt bemeneti fájl nélkül(nem beállított)."
+
+#: libgui/gui_prog_manager.cpp:34
+#, fuzzy
+msgid "Cannot start debugging without a COFF file. Please compile the project."
+msgstr "Nem tudom indítani a hibakeresőt coff fájl nélkül. Fordítsd le a projektet."
+
+#: progs/manager/prog_manager.cpp:138
+msgid "Cannot toggle target power since target is self-powered."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:606
+msgid "Cannot write ROM or ROMless device."
+msgstr "Nem tudom írni a ROM-ot vagy a ROM nélküli eszközt."
+
+#: coff/base/cdb_parser.cpp:33 coff/base/coff_object.cpp:160
+#, fuzzy
+msgid "Char"
+msgstr "&Törlés"
+
+#: piklab-hex/main.cpp:25
+msgid "Check hex file for correctness (if a device is specified, check if hex file is compatible with it)."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:41
+msgid "Check this box to change DATA buffer direction."
+msgstr "Ellenőrizd a DATA buffer címét"
+
+#: progs/direct/base/direct.cpp:26 progs/direct/base/direct.cpp:29
+#: progs/direct/base/direct.cpp:32 progs/direct/base/direct.cpp:35
+msgid "Check this box to turn voltage on/off for this pin."
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:27
+msgid "Check this option if your hardware uses negative logic for this pin."
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:98
+msgid "Checksum Mask:"
+msgstr "Checksum Mask:"
+
+#: piklab-hex/main.cpp:178
+msgid "Checksum computation is experimental and is not always correct!"
+msgstr ""
+
+#: piklab-hex/main.cpp:180 libgui/hex_editor.cpp:189
+msgid "Checksum: %1"
+msgstr "Checksum: %1"
+
+#: libgui/toplevel.cpp:250
+msgid "Clean"
+msgstr "Tisztítás"
+
+#: libgui/project_manager.cpp:195
+msgid "Clean Project"
+msgstr "Projekt Tisztítás"
+
+#: piklab-hex/main.cpp:27
+msgid "Clean hex file and fix errors (wrong CRC, truncated line, truncated file)."
+msgstr ""
+
+#: libgui/toplevel.cpp:302
+msgid "Clear All Breakpoints"
+msgstr "Összes töréspont eltávolítása"
+
+#: piklab-prog/cli_interactive.cpp:47
+msgid "Clear a breakpoint \"clear 0\", \"clear e 0x04\", or clear all breakpoints \"clear all\"."
+msgstr "Töréspont eltávolítása \"clear 0\", \"clear e 0x04\",vagy az összes töréspont eltávolítása \"clear all\"."
+
+#: devices/pic/gui/pic_register_view.cpp:265
+msgid "Clear all watching"
+msgstr "Minden figyelés eltávolítása"
+
+#: progs/direct/base/direct.cpp:30
+msgid "Clock"
+msgstr "Clock"
+
+#: progs/direct/gui/direct_config_widget.cpp:68
+msgid "Clock delay"
+msgstr "Clock delay"
+
+#: devices/pic/base/pic_config.cpp:264
+#, fuzzy
+msgid "Clock output"
+msgstr "(Kimenet)"
+
+#: devices/pic/base/pic_config.cpp:136
+msgid "Clock switching mode"
+msgstr ""
+
+#: libgui/editor_manager.cpp:403 libgui/toplevel.cpp:195
+msgid "Close All Others"
+msgstr "Összes egyéb bezárása"
+
+#: libgui/toplevel.cpp:236
+msgid "Close Project"
+msgstr "Projekt bezárása"
+
+#: progs/gui/hardware_config_widget.cpp:91
+msgid "Closing will discard changes you have made. Close anyway?"
+msgstr "Closing will discard changes you have made. Close anyway?"
+
+#: coff/base/cdb_parser.cpp:50 coff/base/coff_object.cpp:332
+msgid "Code"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:51
+#, fuzzy
+msgid "Code / Static Segment"
+msgstr "Túl kevés paraméter."
+
+#: coff/base/cdb_parser.cpp:26
+#, fuzzy
+msgid "Code Pointer"
+msgstr "Kód memoria"
+
+#: devices/pic/base/pic_config.cpp:20
+msgid "Code code-protection"
+msgstr ""
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:53
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:163
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:111
+msgid "Code is present in bootloader reserved area (at address %1). It will be ignored."
+msgstr ""
+
+#: devices/pic/base/pic.cpp:25
+msgid "Code memory"
+msgstr "Kód memoria"
+
+#: devices/pic/base/pic_config.cpp:96
+msgid "Code protected microcontroller"
+msgstr "Kódvédett microkontroller"
+
+#: devices/pic/gui/pic_memory_editor.cpp:77
+#, fuzzy
+msgid "Code protection"
+msgstr "Code write-protection"
+
+#: devices/pic/base/pic_config.cpp:25
+msgid "Code write-protection"
+msgstr "Code write-protection"
+
+#: coff/base/coff_object.cpp:286 coff/base/coff_object.cpp:299
+msgid "Codeline has unknown symbol: %1"
+msgstr ""
+
+#: coff/base/coff_object.cpp:290 coff/base/coff_object.cpp:303
+msgid "Codeline is an auxiliary symbol: %1"
+msgstr ""
+
+#: piklab-coff/main.cpp:128
+#, fuzzy
+msgid "Command not available for COFF of type Archive."
+msgstr "Hex filename not specified."
+
+#: piklab-coff/main.cpp:204
+msgid "Command not available for COFF of type Object."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:453
+msgid "Command-line programmer/debugger."
+msgstr "Parancssori programozó/hibakereső."
+
+#: piklab-hex/main.cpp:287
+#, fuzzy
+msgid "Command-line utility to manipulate hex files."
+msgstr "Parancssori HEX fájl szerkesztő."
+
+#: piklab-coff/main.cpp:278
+#, fuzzy
+msgid "Command-line utility to view COFF files."
+msgstr "Parancssori HEX fájl szerkesztő."
+
+#: libgui/likeback.cpp:659
+msgid "Comment Sent"
+msgstr "Megjegyzés elküldve"
+
+#: devices/base/generic_device.cpp:33
+msgid "Commercial"
+msgstr "Kereskedelmi"
+
+#: piklab-hex/main.cpp:28
+#, fuzzy
+msgid "Compare two hex files."
+msgstr "2 hex fájl összehasonlítása."
+
+#: progs/direct/base/direct_prog_config.cpp:83
+msgid "Compatible with ET-CAB10PIN V2 programmer shipped by Futurlec, with their PIC16F877 controler board."
+msgstr ""
+
+#: libgui/toplevel.cpp:138
+msgid "Compile Log"
+msgstr "Fordító kimenete"
+
+#: tools/base/generic_tool.cpp:17 common/common/purl_base.cpp:21
+msgid "Compiler"
+msgstr "Fordító"
+
+#: tools/base/generic_tool.cpp:17
+#, fuzzy
+msgid "Compiler:"
+msgstr "Fordító"
+
+#: tools/list/compile_manager.cpp:29
+msgid "Compiling file..."
+msgstr "Fordítom a fájlt..."
+
+#: coff/base/coff_object.cpp:326
+#, fuzzy
+msgid "Config"
+msgstr "Configure..."
+
+#: libgui/config_gen.cpp:145
+msgid "Config Generator"
+msgstr "Konfiguráció Generátor"
+
+#: devices/pic/gui/pic_config_word_editor.cpp:51
+msgid "Config Word Details"
+msgstr ""
+
+#: common/port/usb_port.cpp:242
+msgid "Configuration %1 not present: using %2"
+msgstr "Konfiguráció %1 nem létezik: ezt használom %2"
+
+#: devices/pic/base/pic.cpp:29
+msgid "Configuration Bits"
+msgstr "Konfigurációs Bitek"
+
+#: coff/base/disassembler.cpp:282
+msgid "Configuration bits: adapt to your setup and needs"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:28
+msgid "Configuration write-protection"
+msgstr ""
+
+#: tools/gui/tool_config_widget.cpp:37
+msgid "Configuration:"
+msgstr "Konfiguráció:"
+
+#: libgui/toplevel_ui.cpp:40
+msgid "Configure Compilation..."
+msgstr "Összeállítás szerkesztése"
+
+#: libgui/config_center.cpp:113
+msgid "Configure Piklab"
+msgstr "Piklab beállítása"
+
+#: libgui/toplevel_ui.cpp:39
+msgid "Configure Toolchain..."
+msgstr "Fordítóprogramok beállítása..."
+
+#: tools/gui/toolchain_config_center.cpp:24
+msgid "Configure Toolchains"
+msgstr "Fordítóprogramok beállítása"
+
+#: libgui/toplevel.cpp:320
+msgid "Configure Toolchains..."
+msgstr "Fordítóprogramok beállítása..."
+
+#: libgui/toplevel.cpp:346
+msgid "Configure email..."
+msgstr "Email beállítása..."
+
+#: libgui/project_manager.cpp:186 libgui/toplevel_ui.cpp:22
+#: libgui/likeback.cpp:89
+msgid "Configure..."
+msgstr "Configure..."
+
+#: piklab-prog/cmdline.cpp:35
+msgid "Connect programmer."
+msgstr "Csatlakozás a programozóhoz."
+
+#: progs/gui/hardware_config_widget.cpp:61
+msgid "Connected"
+msgstr "Csatlakozva"
+
+#: devices/pic/base/pic_config.cpp:224
+#, fuzzy
+msgid "Connected to EMB"
+msgstr "Csatlakozva"
+
+#: progs/base/generic_prog.cpp:108
+#, fuzzy
+msgid "Connected."
+msgstr "Csatlakozva"
+
+#: progs/base/generic_prog.cpp:81
+msgid "Connecting %1 on %2 with device %3..."
+msgstr "Csatlakozás %1 a %2  %3 eszközzel"
+
+#: progs/base/generic_prog.cpp:75
+msgid "Connecting %1 with device %2..."
+msgstr "Csatlakozás %1   %3 eszközzel"
+
+#: progs/base/generic_prog.cpp:89
+msgid "Connecting..."
+msgstr "Csatlakozás..."
+
+#: progs/gui/prog_config_center.cpp:92
+msgid "Connection: Error"
+msgstr "Csatlakozási hiba"
+
+#: progs/gui/prog_config_center.cpp:92
+msgid "Connection: Ok"
+msgstr "Csatlakozás: Ok"
+
+#: tools/pic30/pic30_generator.cpp:51
+msgid "Constants in program space"
+msgstr "Constants in program space"
+
+#: libgui/toplevel.cpp:905
+msgid "Continue Anyway"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:284
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:86
+msgid "Continue with the specified device name: \"%1\"..."
+msgstr "Folytatom a megadott eszközzel: \"%1\"..."
+
+#: progs/direct/gui/direct_config_widget.cpp:81
+msgid "Continuously send 0xA55A on \"Data out\" pin."
+msgstr "Folyamatos 0xA55A küldés  \"Data out\" lábra"
+
+#: libgui/project_manager.cpp:314
+msgid "Copy and Add"
+msgstr ""
+
+#: libgui/config_gen.cpp:66
+msgid "Copy to clipboard"
+msgstr "Másolás vágólapra"
+
+#: libgui/project_manager.cpp:325
+msgid "Copying file to project directory failed."
+msgstr "Fájl másolása a projekt könyvtárba sikertelen."
+
+#: common/port/usb_port.cpp:259
+msgid "Could not claim USB interface %1"
+msgstr "Nem elérhető az USB illesztő %1"
+
+#: common/port/parallel.cpp:173
+msgid "Could not claim device \"%1\": check it is read/write enabled"
+msgstr "Nem elérhető az eszköz  \"%1\": nézd meg az olvasás/írás engedélyezve van-e."
+
+#: progs/gui/prog_group_ui.cpp:121
+msgid "Could not connect programmer."
+msgstr "Nem tudok csatlakozni a programozóhoz."
+
+#: progs/psp/base/psp_serial.cpp:40
+msgid "Could not contact Picstart+"
+msgstr "Nem tudok csatlakozni a Picstart+ -hoz"
+
+#: common/gui/purl_ext.cpp:31
+msgid "Could not copy file"
+msgstr "Nem tudok másolni a fájlt"
+
+#: common/gui/purl_ext.cpp:108
+msgid "Could not create directory"
+msgstr "Nem tudok könyvtárat létrehozni"
+
+#: common/gui/purl_ext.cpp:52
+msgid "Could not create file"
+msgstr "Nem tudom létrehozni a fájlt"
+
+#: common/gui/pfile_ext.cpp:24 common/gui/pfile_ext.cpp:109
+msgid "Could not create temporary file."
+msgstr "Nem tudom létrehozni a temp fájlt."
+
+#: common/gui/purl_ext.cpp:75
+msgid "Could not delete file."
+msgstr "Nem tudom törölni a fájlt."
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:35
+msgid "Could not detect \"gpsim\" version"
+msgstr "Nem tudom azonosítani a  \"gpsim\" verzióját"
+
+#: progs/direct/base/direct_mem24.cpp:51
+msgid "Could not detect EEPROM"
+msgstr "Nem tudom azonosítani az eeprom-ot"
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:31
+#, fuzzy
+msgid "Could not detect device in bootloader mode."
+msgstr "Nem tudom megnyitni az eszközt \"%1\" írásra olvasásra"
+
+#: progs/manager/prog_manager.cpp:64 libgui/device_gui.cpp:263
+msgid "Could not detect supported devices for \"%1\". Please check installation."
+msgstr "Nem tudom azonosítani az eszközt  \"%1\". Fel van telepítve?"
+
+#: libgui/config_gen.cpp:131
+msgid "Could not detect supported devices for selected toolchain. Please check installation."
+msgstr "Nem tudom azonosítani a fordító által támogatott eszközöket. Ellenőrizd a telepítést."
+
+#: libgui/device_gui.cpp:268
+msgid "Could not detect supported devices for toolchain \"%1\". Please check installation."
+msgstr "Nem tudom azonosítani a fordító által támogatott eszközöket \"%1\". Ellenőrizd a telepítést."
+
+#: coff/base/coff_object.cpp:567
+#, fuzzy
+msgid "Could not determine processor (%1)."
+msgstr "Nem találom a hibalista fájlt (%1)."
+
+#: libgui/console.cpp:30
+msgid "Could not find \"konsolepart\"; please install kdebase."
+msgstr "Nem találom a  \"konsolepart\"; telepítsd a kdebase csomagot"
+
+#: common/port/usb_port.cpp:210
+msgid "Could not find USB device (vendor=%1 product=%2)."
+msgstr "Nem találom az USB eszközt (vendor=%1 product=%2)."
+
+#: progs/icd2/base/icd2_debug.cpp:155
+msgid "Could not find debug executive file \"%1\"."
+msgstr "Nem találom a hibakereső futtató fájlt  \"%1\"."
+
+#: piklab-prog/cli_prog_manager.cpp:28
+#, fuzzy
+msgid "Could not find device \"%1\" as serial or parallel port. Will try to open as serial port."
+msgstr "Nem tudom megnyitni az eszközt \"%1\" a soros vagy párhuzamos porton. Nézd meg, hogy létezik vegy állítsd be a jogosultságokat."
+
+#: tools/mpc/mpc_compile.cpp:40 tools/ccsc/ccsc_compile.cpp:86
+msgid "Could not find error file (%1)."
+msgstr "Nem találom a hibalista fájlt (%1)."
+
+#: libgui/project_manager.cpp:307
+msgid "Could not find file."
+msgstr "A fájl nem található."
+
+#: progs/icd2/base/icd2_prog.cpp:90
+msgid "Could not find firmware file \"%1\" in directory \"%2\"."
+msgstr "nem találom a firmware fájlt \"%1\" ebben a könyvtárban \"%2\"."
+
+#: common/port/serial.cpp:329
+msgid "Could not flush device"
+msgstr ""
+
+#: common/port/serial.cpp:165
+msgid "Could not get file descriptor parameters"
+msgstr "Nem tudom beolvasni a fájl paramétereit"
+
+#: piklab-prog/cmdline.cpp:173
+#, fuzzy
+msgid "Could not load hex file \"%1\"."
+msgstr "Nem tudom beolvasni a HEX fájlt (%1)."
+
+#: common/port/serial.cpp:198
+msgid "Could not modify file descriptor flags"
+msgstr ""
+
+#: common/port/parallel.cpp:169 common/port/parallel.cpp:179
+msgid "Could not open device \"%1\""
+msgstr "Nem tudom megnyitni az eszközt \"%1\""
+
+#: common/port/serial.cpp:190
+msgid "Could not open device \"%1\" read-write"
+msgstr "Nem tudom megnyitni az eszközt \"%1\" írásra olvasásra"
+
+#: common/gui/pfile_ext.cpp:58 common/cli/cli_pfile.cpp:37
+msgid "Could not open file for reading."
+msgstr "Nem tudom olvasni a fájlt."
+
+#: common/cli/cli_pfile.cpp:19
+msgid "Could not open file for writing."
+msgstr "Nem tudom írni a fájlt.."
+
+#: piklab-prog/cli_interactive.cpp:320
+#, fuzzy
+msgid "Could not open filename \"%1\"."
+msgstr "Nem tudom megnyitni a fájlt \"%1\""
+
+#: progs/icd2/base/icd2_prog.cpp:100 progs/icd2/base/icd2_debug.cpp:162
+#: progs/pickit2/base/pickit_prog.cpp:35 progs/base/generic_prog.cpp:250
+msgid "Could not open firmware file \"%1\"."
+msgstr "Nem tudom megnyitni a  firmware fájlt \"%1\"."
+
+#: libgui/project_manager.cpp:531
+msgid "Could not open project file."
+msgstr "Nem tudom megnyitni a projekt fájlt."
+
+#: common/gui/pfile_ext.cpp:63
+msgid "Could not open temporary file."
+msgstr "Nem tudom megnyitni a tempfájlt."
+
+#: progs/pickit2/base/pickit_prog.cpp:42
+msgid "Could not read calibration firmware file \"%1\" (%2)."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:168
+msgid "Could not read debug executive file \"%1\": %2."
+msgstr "Nem tudom megnyitni a debug executive fájlt \"%1\": %2."
+
+#: progs/pickit2/base/pickit2_prog.cpp:56
+msgid "Could not read firmware hex file \"%1\" (%2)."
+msgstr "Nem tudom olvasni a  firmware fájlt\"%1\": %2."
+
+#: progs/icd2/base/icd_prog.cpp:22
+msgid "Could not read firmware hex file \"%1\": %2."
+msgstr "Nem tudom olvasni a  firmware fájlt \"%1\": %2."
+
+#: coff/base/coff.cpp:93
+#, fuzzy
+msgid "Could not recognize file (magic number is %1)."
+msgstr "Nem tudom azonosítani a gpsim verziót"
+
+#: progs/gpsim/base/gpsim.cpp:127
+#, fuzzy
+msgid "Could not recognize gpsim version."
+msgstr "Nem tudom azonosítani a gpsim verziót"
+
+#: devices/pic/prog/pic_prog.cpp:381
+msgid "Could not restore band gap bits because programmer does not support writing config bits."
+msgstr ""
+
+#: libgui/toplevel.cpp:715
+#, fuzzy
+msgid "Could not run \"kfind\""
+msgstr "Nem tudom futtatni a \"pikloops\" programot"
+
+#: libgui/toplevel.cpp:731
+msgid "Could not run \"pikloops\""
+msgstr "Nem tudom futtatni a \"pikloops\" programot"
+
+#: progs/gui/hardware_config_widget.cpp:67
+msgid "Could not save configuration: hardware name is empty."
+msgstr "Nem tudom menteni a konfigurációt: az eszköz neve üres."
+
+#: common/gui/pfile_ext.cpp:45
+msgid "Could not save file."
+msgstr "Nem tudom menteni a fájlt."
+
+#: libgui/project_manager.cpp:245
+msgid "Could not save project file \"%1\"."
+msgstr "Nem tudom menteni a projekt fájlt."
+
+#: common/port/serial.cpp:180
+msgid "Could not set file descriptor parameters"
+msgstr ""
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:34
+msgid "Could not start \"gpsim\""
+msgstr "Nem tudom indítani \"gpsim\""
+
+#: common/gui/pfile_ext.cpp:94
+msgid "Could not write to temporary file."
+msgstr "Nem tudom írni a temp fájlt."
+
+#: libgui/new_dialogs.cpp:61
+msgid "Create New File"
+msgstr "Új fájl létrehozása"
+
+#: piklab-hex/main.cpp:30
+#, fuzzy
+msgid "Create an hex file for the specified device."
+msgstr "Memory ranges are not supported for the specified device."
+
+#: libgui/project_wizard.cpp:150
+msgid "Create template source file."
+msgstr "Sablon forrásfájl létrehozása."
+
+#: devices/pic/base/pic_config.cpp:46
+msgid "Crystal/resonator"
+msgstr "Crystal/resonator"
+
+#: devices/pic/base/pic_config.cpp:47
+#, fuzzy
+msgid "Crystal/resonator, PLL enabled"
+msgstr "Crystal/resonator"
+
+#: tools/gui/tool_config_widget.cpp:24 tools/custom/custom.h:21
+msgid "Custom"
+msgstr "Custom"
+
+#: tools/gui/tool_config_widget.cpp:109
+msgid "Custom libraries:"
+msgstr "Custom libraries:"
+
+#: tools/gui/tool_config_widget.cpp:99
+msgid "Custom options:"
+msgstr "Custom options:"
+
+#: tools/list/tools_config_widget.cpp:81
+#, fuzzy
+msgid "Custom shell commands:"
+msgstr "Támogatott parancsok:"
+
+#: devices/pic/prog/pic_prog.cpp:610
+msgid "DEBUG configuration bit is on. Are you sure you want to continue programming the chip?"
+msgstr "A DEBUG konfigurációs bit bekapcsolva. Biztosan folytatni akarod a chip programozását?"
+
+#: devices/base/generic_device.cpp:61
+#, fuzzy
+msgid "DFN"
+msgstr "DFN-S"
+
+#: devices/base/generic_device.cpp:56
+msgid "DFN-S"
+msgstr "DFN-S"
+
+#: devices/pic/base/pic.cpp:30
+msgid "Data EEPROM"
+msgstr "Data EEPROM"
+
+#: progs/direct/base/direct.cpp:36
+msgid "Data In"
+msgstr "Data In"
+
+#: progs/direct/base/direct.cpp:33
+msgid "Data Out"
+msgstr "Data Out"
+
+#: progs/direct/base/direct.cpp:39
+msgid "Data R/W"
+msgstr "Data R/W"
+
+#: devices/pic/base/pic_config.cpp:21
+msgid "Data code-protection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:26
+msgid "Data write-protection"
+msgstr ""
+
+#: tools/list/device_info.cpp:33
+msgid "Datasheet"
+msgstr ""
+
+#: progs/icd2/gui/icd2_group_ui.cpp:29
+msgid "Debug Executive"
+msgstr "Debug Executive"
+
+#: coff/base/coff_object.cpp:125
+msgid "Debug Symbol"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:31
+msgid "Debug Vector"
+msgstr "Debug Vector"
+
+#. i18n: file ./data/app_data/piklabui.rc line 177
+#: rc.cpp:51
+#, no-c-format
+msgid "Debugger Toolbar"
+msgstr "Hibakereső Toolbar"
+
+#: progs/gui/debug_config_center.h:21 progs/gui/debug_config_center.h:22
+msgid "Debugging Options"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:282 piklab-prog/cmdline.cpp:287
+msgid "Debugging is not supported for specified programmer."
+msgstr "A hibakeresést nem támogatja ez a programozó."
+
+#: progs/icd2/base/icd2_debug.cpp:275
+msgid "Debugging test successful"
+msgstr "Hibakereső teszt sikeres"
+
+#: common/common/number.cpp:19
+msgid "Decimal"
+msgstr "Decimális"
+
+#: devices/pic/base/pic_config.cpp:126
+msgid "Dedicated in-circuit port"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:211
+msgid "Default system clock select"
+msgstr ""
+
+#: libgui/project_editor.cpp:36
+#, fuzzy
+msgid "Description:"
+msgstr "Leírás"
+
+#: piklab-hex/main.cpp:102 piklab-coff/main.cpp:73
+msgid "Destination file already exists."
+msgstr "A célfájl már létezik."
+
+#: devices/pic/gui/pic_config_word_editor.cpp:116
+msgid "Details..."
+msgstr "Details..."
+
+#: tools/gui/toolchain_config_widget.cpp:190
+msgid "Detected (%1)"
+msgstr "Talált (%1)"
+
+#: progs/icd2/base/icd2_debug_specific.cpp:241
+msgid "Detected custom ICD2"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:127
+msgid "Detected ports supported by \"%1\":"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:128
+msgid "Detected ports:"
+msgstr "Talált portok"
+
+#: tools/gui/toolchain_config_widget.cpp:235
+msgid "Detecting \"%1\"..."
+msgstr "Keresem \"%1\"..."
+
+#: tools/gui/toolchain_config_widget.cpp:251
+msgid "Detecting ..."
+msgstr "Keresem ..."
+
+#: libgui/editor_manager.cpp:478 libgui/device_gui.cpp:175
+#: libgui/project_manager_ui.cpp:33
+msgid "Device"
+msgstr "Eszköz"
+
+#: devices/pic/base/pic.cpp:28 coff/base/coff_object.cpp:327
+msgid "Device ID"
+msgstr "Eszköz ID"
+
+#: tools/list/device_info.cpp:21
+#, fuzzy
+msgid "Device Page"
+msgstr "Eszköz táplálás"
+
+#: libgui/toplevel.cpp:258
+msgid "Device Power"
+msgstr "Eszköz táplálás"
+
+#: tools/gui/toolchain_config_widget.cpp:89
+msgid "Device detection:"
+msgstr "Eszköz keresés:"
+
+#: libgui/device_editor.cpp:66
+msgid "Device guessed from file: %1"
+msgstr "Eszköz feltételezve a fájlban: %1"
+
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:159
+msgid "Device memory does not match hex file (at address 0x%2: reading 0x%3 and expecting 0x%4)."
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:104
+msgid "Device memory does not match hex file (in %1 at address %2: reading %3 and expecting %4)."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:253
+msgid "Device memory doesn't match debug executive (at address %1: reading %2 and expecting %3)."
+msgstr ""
+
+#: devices/mem24/prog/mem24_prog.cpp:42
+msgid "Device memory doesn't match hex file (at address %1: reading %2 and expecting %3)."
+msgstr ""
+
+#: devices/mem24/prog/mem24_prog.cpp:40
+msgid "Device memory is not blank (at address %1: reading %2 and expecting %3)."
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:101
+msgid "Device memory is not blank (in %1 at address %2: reading %3 and expecting %4)."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:253
+msgid "Device not autodetectable: continuing with the specified device name \"%1\"..."
+msgstr "Az eszköz nem azonosítható autómatikusan, folytatom a kiválasztott névvel"
+
+#: devices/pic/prog/pic_prog.cpp:126
+msgid "Device not in programming"
+msgstr ""
+
+#: piklab-hex/main.cpp:104 piklab-prog/cmdline.cpp:157 piklab-coff/main.cpp:75
+msgid "Device not specified."
+msgstr "Az eszköz nem meghatározott."
+
+#: libgui/config_gen.cpp:132
+msgid "Device not supported by the selected toolchain."
+msgstr "Az eszköz nem támogatott a kiválasztott fordítóban."
+
+#: libgui/config_gen.cpp:32 libgui/config_center.cpp:66
+#: libgui/project_editor.cpp:46 libgui/project_wizard.cpp:129
+#: coff/base/text_coff.cpp:254
+msgid "Device:"
+msgstr "Eszköz:"
+
+#: devices/pic/base/pic_config.cpp:104
+msgid "Digital"
+msgstr "Digitális"
+
+#: devices/pic/base/pic_config.cpp:263
+#, fuzzy
+msgid "Digital I/O"
+msgstr "Digitális"
+
+#: coff/base/coff_object.cpp:52
+#, fuzzy
+msgid "Direct"
+msgstr "Könyvtár:"
+
+#: progs/direct/base/direct_prog.h:59
+msgid "Direct Programmer"
+msgstr "Közvetlen programozó"
+
+#: common/global/about.cpp:87
+msgid "Direct programming for 16F676/630."
+msgstr "Közvetlen programozás 16F676/630."
+
+#: common/global/about.cpp:89
+msgid "Direct programming for 16F73/74/76/77."
+msgstr "Közvetlen programozás 16F73/74/76/77."
+
+#: common/global/about.cpp:93
+msgid "Direct programming for 24C EEPROM is inspired from his program \"prog84\"."
+msgstr "Közvetlen programozás 24C EEPROM a \"prog84\" program alapján."
+
+#: common/global/about.cpp:86
+msgid "Direct programming for PIC18F devices."
+msgstr "PIC18F Közvetlen programozása "
+
+#: common/global/about.cpp:92
+msgid "Direct programming for dsPICs is inspired from his program \"dspicprg\"."
+msgstr "dsPIC Közvetlen programozása a \"dspicprg\" program alapján."
+
+#: libgui/project_wizard.cpp:181
+msgid "Directory does not exists. Create it?"
+msgstr "A könyvtár nem létezik. Csináljak újat?"
+
+#: libgui/project_wizard.cpp:176
+msgid "Directory is empty."
+msgstr "A könyvtár üres."
+
+#: libgui/project_wizard.cpp:125
+msgid "Directory:"
+msgstr "Könyvtár:"
+
+#: libgui/breakpoint_view.cpp:27
+msgid "Disable breakpoint"
+msgstr "Töréspont tiltása"
+
+#: devices/pic/base/pic_config.cpp:91 devices/pic/base/pic_config.cpp:191
+#: devices/pic/base/pic_config.cpp:215 devices/pic/base/pic_config.cpp:394
+#: devices/pic/base/pic_config.cpp:398
+msgid "Disabled"
+msgstr "Tiltva"
+
+#: devices/pic/base/pic_config.cpp:36
+msgid "Disabled (connected to Vdd)"
+msgstr "Disabled (connected to Vdd)"
+
+#: progs/icd2/base/icd2_debug.cpp:215
+msgid "Disabling code program protection for debugging"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:223
+msgid "Disabling code read protection for debugging"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:219
+msgid "Disabling code write protection for debugging"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:211
+msgid "Disabling watchdog timer for debugging"
+msgstr ""
+
+#: libgui/object_view.cpp:139
+msgid "Disassembling content of hex file editor."
+msgstr ""
+
+#: libgui/object_view.cpp:126
+msgid "Disassembling hex file: %1"
+msgstr ""
+
+#: libgui/project_manager.cpp:380
+msgid "Disassembly"
+msgstr "Disassembly"
+
+#: libgui/project_manager_ui.cpp:98
+msgid "Disassembly Listing"
+msgstr "Disassembly Listing"
+
+#: libgui/object_view.cpp:120
+msgid "Disassembly not supported for the selected device."
+msgstr "Disassembly not supported for the selected device."
+
+#: libgui/object_view.cpp:115
+msgid "Disassembly not supported for the selected toolchain."
+msgstr "Disassembly not supported for the selected toolchain."
+
+#: piklab-prog/cli_interactive.cpp:42
+msgid "Disconnect programmer."
+msgstr "Disconnect programmer."
+
+#: progs/manager/prog_manager.cpp:150
+msgid "Disconnecting..."
+msgstr "Disconnecting..."
+
+#: common/cli/cli_main.cpp:55
+msgid "Display all debug messages."
+msgstr "Display all debug messages."
+
+#: common/cli/cli_main.cpp:53
+msgid "Display debug messages."
+msgstr "Display debug messages."
+
+#: common/cli/cli_main.cpp:54
+msgid "Display extra debug messages."
+msgstr "Display extra debug messages."
+
+#: piklab-prog/cli_interactive.cpp:37
+msgid "Display help."
+msgstr "Display help."
+
+#: common/cli/cli_main.cpp:56
+#, fuzzy
+msgid "Display low level debug messages."
+msgstr "Display all debug messages."
+
+#: piklab-prog/cli_interactive.cpp:33
+msgid "Display the list of available properties."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:36
+msgid "Display the list of memory ranges."
+msgstr "Display the list of memory ranges."
+
+#: piklab-prog/cli_interactive.cpp:34
+msgid "Display the list of registers."
+msgstr "Display the list of registers."
+
+#: piklab-prog/cli_interactive.cpp:35
+msgid "Display the list of variables."
+msgstr "Display the list of variables."
+
+#: libgui/likeback.cpp:136
+msgid "Do not Help Anymore"
+msgstr ""
+
+#: libgui/project_wizard.cpp:152
+msgid "Do not add files now."
+msgstr "Do not add files now."
+
+#: libgui/likeback.cpp:603
+msgid "Do not ask for features: your wishes will be ignored."
+msgstr ""
+
+#: common/cli/cli_main.cpp:57
+msgid "Do not display messages."
+msgstr "Do not display messages."
+
+#: progs/gui/hardware_config_widget.cpp:200
+msgid "Do you want to delete custom hardware \"%1\"?"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:678
+msgid "Do you want to overwrite the device calibration with %1?"
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:76
+msgid "Do you want to overwrite this custom hardware \"%1\"?"
+msgstr ""
+
+#: tools/list/device_info.cpp:35
+#, fuzzy
+msgid "Documents"
+msgstr "Paraméterek:"
+
+#: coff/base/coff_object.cpp:165
+msgid "Double"
+msgstr ""
+
+#: coff/base/coff_object.cpp:148
+msgid "Dummy Entry (end of block)"
+msgstr ""
+
+#: coff/base/coff_object.cpp:154
+msgid "Duplicate Tag"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:78
+msgid "ECAN"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:130
+msgid "ECCP mux"
+msgstr "ECCP mux"
+
+#: devices/mem24/gui/mem24_memory_editor.cpp:41
+#, fuzzy
+msgid "EEPROM Memory"
+msgstr "Eeprom Memory"
+
+#: progs/direct/base/direct_mem24.cpp:54
+#, fuzzy
+msgid "EEPROM detected"
+msgstr "Eeprom detected"
+
+#: progs/direct/base/direct_prog_config.cpp:72
+msgid "EL Cheapo classic"
+msgstr "EL Cheapo classic"
+
+#: tools/base/generic_tool.cpp:39
+msgid "ELF"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:76
+msgid "EPE Toolkit mk3"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:38
+msgid "EPIC+"
+msgstr "EPIC+"
+
+#: devices/base/generic_device.cpp:27
+msgid "EPROM (OTP)"
+msgstr "EPROM (OTP)"
+
+#: progs/direct/base/direct_prog_config.cpp:80
+msgid "ETT High Vpp"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:82
+msgid "ETT Low Vpp"
+msgstr ""
+
+#: libgui/likeback.cpp:176
+msgid "Each time you have a great or frustrating experience, please click the appropriate hand below the window title-bar, briefly describe what you like or dislike and click Send."
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:36
+msgid "Edit and test hardware"
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:159
+msgid "Edit/Test..."
+msgstr ""
+
+#: common/common/purl_base.cpp:50
+msgid "Elf File"
+msgstr "Elf File"
+
+#: libgui/breakpoint_view.cpp:27
+msgid "Enable breakpoint"
+msgstr "Enable breakpoint"
+
+#: devices/pic/base/pic_config.cpp:397
+msgid "Enabled"
+msgstr "Enabled"
+
+#: devices/pic/base/pic_config.cpp:77
+msgid "Enabled in run - Disabled in sleep"
+msgstr "Enabled in run - Disabled in sleep"
+
+#: devices/base/generic_device.cpp:20
+msgid "End Of Life"
+msgstr "End Of Life"
+
+#: coff/base/coff_object.cpp:151
+msgid "End of Structure"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:104
+msgid "End of all code sections"
+msgstr "End of all code sections"
+
+#: piklab-prog/cli_interactive.cpp:346
+msgid "End of command file reached."
+msgstr "End of command file reached."
+
+#: common/nokde/nokde_kcmdlineargs.cpp:861
+msgid "End of options"
+msgstr "End of options"
+
+#: piklab-hex/main.cpp:141
+msgid "End:"
+msgstr ""
+
+#: coff/base/coff_object.cpp:168
+#, fuzzy
+msgid "Enumeration"
+msgstr "Konfiguráció:"
+
+#: coff/base/coff_object.cpp:143
+msgid "Enumeration Tag"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:47
+msgid "Erase device memory."
+msgstr "Erase device memory."
+
+#: progs/psp/base/psp.cpp:342
+msgid "Erase failed"
+msgstr "Erase failed"
+
+#: progs/icd1/base/icd1.cpp:155
+msgid "Erase failed (returned value is %1)"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:311
+msgid "Erasing device memory not supported for specified programmer."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:284
+msgid "Erasing done"
+msgstr "Erasing done"
+
+#: progs/base/generic_prog.cpp:35 progs/base/generic_prog.cpp:282
+msgid "Erasing..."
+msgstr "Erasing..."
+
+#: common/port/serial.cpp:300
+msgid "Error checking for data in output buffer"
+msgstr ""
+
+#: common/port/serial.cpp:475
+msgid "Error clearing up break"
+msgstr ""
+
+#: libgui/project_wizard.cpp:183
+msgid "Error creating directory."
+msgstr "Error creating directory."
+
+#: libgui/project_wizard.cpp:246
+#, fuzzy
+msgid "Error creating template file."
+msgstr "Error(s) reading hex file."
+
+#: common/port/usb_port.cpp:217 common/port/usb_port.cpp:231
+msgid "Error opening USB device."
+msgstr "Error opening USB device."
+
+#: common/global/xml_data_file.cpp:29
+#, fuzzy
+msgid "Error opening file: %1"
+msgstr "Error opening USB device."
+
+#: libgui/object_view.cpp:87
+#, fuzzy
+msgid "Error parsing library:\n"
+msgstr "Error creating directory."
+
+#: libgui/object_view.cpp:70
+#, fuzzy
+msgid "Error parsing object:\n"
+msgstr "Error(s) reading hex file."
+
+#: progs/direct/base/direct_16.cpp:108
+msgid "Error programming %1 at %2."
+msgstr ""
+
+#: common/port/parallel.cpp:231
+msgid "Error reading bit on pin %1"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:238 progs/sdcdb/base/sdcdb_debug.cpp:237
+msgid "Error reading driven state of IO bit: %1"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:225 progs/gpsim/base/gpsim_debug.cpp:231
+#: progs/sdcdb/base/sdcdb_debug.cpp:224 progs/sdcdb/base/sdcdb_debug.cpp:230
+msgid "Error reading driving state of IO bit: %1"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:107 progs/gpsim/base/gpsim_debug.cpp:129
+#: progs/sdcdb/base/sdcdb_debug.cpp:128
+msgid "Error reading register \"%1\""
+msgstr ""
+
+#: progs/sdcdb/base/sdcdb_debug.cpp:106
+msgid "Error reading register \"W\""
+msgstr ""
+
+#: common/port/serial.cpp:409
+msgid "Error reading serial pin %1"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:207 progs/sdcdb/base/sdcdb_debug.cpp:206
+msgid "Error reading state of IO bit: %1"
+msgstr ""
+
+#: common/port/serial.cpp:261 common/port/serial.cpp:274
+msgid "Error receiving data"
+msgstr ""
+
+#: common/port/usb_port.cpp:393
+msgid "Error receiving data (ep=%1 res=%2)"
+msgstr ""
+
+#: common/port/usb_port.cpp:224
+msgid "Error resetting USB device."
+msgstr "Error resetting USB device."
+
+#: common/global/xml_data_file.cpp:51
+#, fuzzy
+msgid "Error saving file: %1"
+msgstr "Error(s) reading hex file."
+
+#: progs/gpsim/base/gpsim.cpp:94
+msgid "Error send a signal to the subprocess."
+msgstr ""
+
+#: common/port/usb_port.cpp:294
+msgid "Error sending control message to USB port."
+msgstr ""
+
+#: common/port/serial.cpp:229
+msgid "Error sending data"
+msgstr ""
+
+#: common/port/usb_port.cpp:359
+msgid "Error sending data (ep=%1 res=%2)"
+msgstr ""
+
+#: common/port/usb_port.cpp:246
+msgid "Error setting USB configuration %1."
+msgstr ""
+
+#: common/port/serial.cpp:367
+msgid "Error setting bit %1 of serial port to %2"
+msgstr ""
+
+#: common/port/parallel.cpp:211
+msgid "Error setting pin %1 to %2"
+msgstr ""
+
+#: common/port/serial.cpp:466
+msgid "Error setting up break"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:148
+msgid "Error uploading firmware."
+msgstr ""
+
+#: common/port/serial.cpp:311
+msgid "Error while draining"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:306 libgui/hex_editor.cpp:150
+msgid "Error while writing file \"%1\"."
+msgstr ""
+
+#: libgui/hex_editor.cpp:133
+#, fuzzy
+msgid "Error(s) reading hex file."
+msgstr "Error(s) reading hex file."
+
+#: tools/gputils/gputils_config.cpp:13 tools/c18/c18_config.cpp:12
+msgid "Errors only"
+msgstr "Errors only"
+
+#: devices/pic/base/pic.cpp:79
+msgid "Ethernet"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:210
+msgid "Ethernet LED enable"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:110
+msgid "Even PWM output polarity"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:43
+msgid "Executable"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:52
+msgid "Executable Type:"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:30
+msgid "Executable directory"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:290
+msgid "Executing custom commands..."
+msgstr ""
+
+#: devices/base/generic_device.cpp:35
+msgid "Extended"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:124
+msgid "Extended instruction set"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:93
+msgid "Extended microcontroller"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:35
+msgid "External"
+msgstr ""
+
+#: coff/base/coff_object.cpp:133
+#, fuzzy
+msgid "External Definition"
+msgstr "External resistor"
+
+#: coff/base/cdb_parser.cpp:53
+#, fuzzy
+msgid "External RAM"
+msgstr "External clock"
+
+#: coff/base/cdb_parser.cpp:27
+#, fuzzy
+msgid "External RAM Pointer"
+msgstr "External resistor"
+
+#: devices/pic/base/pic_config.cpp:40
+msgid "External RC oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:42 devices/pic/base/pic_config.cpp:159
+#: devices/pic/base/pic_config.cpp:185
+msgid "External RC oscillator (no CLKOUT)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:41 devices/pic/base/pic_config.cpp:158
+#: devices/pic/base/pic_config.cpp:184
+msgid "External RC oscillator with CLKOUT"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:48
+#, fuzzy
+msgid "External Stack"
+msgstr "External clock"
+
+#: coff/base/coff_object.cpp:130
+#, fuzzy
+msgid "External Symbol"
+msgstr "External clock"
+
+#: devices/pic/base/pic_config.cpp:219
+#, fuzzy
+msgid "External address bus shift"
+msgstr "External resistor"
+
+#: devices/pic/base/pic_config.cpp:128
+msgid "External bus data wait"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:102
+msgid "External bus data width (in bits)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:49 devices/pic/base/pic_config.cpp:260
+msgid "External clock"
+msgstr "External clock"
+
+#: devices/pic/base/pic_config.cpp:51 devices/pic/base/pic_config.cpp:153
+#: devices/pic/base/pic_config.cpp:174
+msgid "External clock (no CLKOUT)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:53
+msgid "External clock (no CLKOUT), PLL enabled"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:156 devices/pic/base/pic_config.cpp:177
+msgid "External clock with 16x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:154 devices/pic/base/pic_config.cpp:175
+msgid "External clock with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:55
+msgid "External clock with 4x PLL (no CLKOUT)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:54
+msgid "External clock with 4x PLL and with CLKOUT"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:155 devices/pic/base/pic_config.cpp:176
+msgid "External clock with 8x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:50 devices/pic/base/pic_config.cpp:152
+#: devices/pic/base/pic_config.cpp:173
+msgid "External clock with CLKOUT"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:52
+msgid "External clock with CLKOUT, PLL enabled"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:56
+msgid "External clock with software controlled 4x PLL (no CLKOUT)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:214
+#, fuzzy
+msgid "External memory bus"
+msgstr "External resistor"
+
+#: devices/pic/base/pic_config.cpp:57
+msgid "External resistor"
+msgstr "External resistor"
+
+#: devices/pic/base/pic_config.cpp:59
+msgid "External resistor (no CLKOUT)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:58
+msgid "External resistor with CLKOUT"
+msgstr ""
+
+#: common/global/log.cpp:27
+msgid "Extra debug messages"
+msgstr "Extra debug messages"
+
+#: devices/base/device_group.cpp:295
+msgid "F (MHz)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:120
+msgid "FLTA mux"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:212
+msgid "FOSC1:FOSC0"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:27
+msgid "Fail"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:79
+msgid "Fail-safe clock monitor"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:250
+msgid "Failed"
+msgstr ""
+
+#: libgui/project_manager.cpp:503
+msgid "Failed to create new project file"
+msgstr "Failed to create new project file"
+
+#: tools/list/compile_manager.cpp:223
+msgid "Failed to execute command: check toolchain configuration."
+msgstr ""
+
+#: tools/list/compile_manager.cpp:277
+msgid "Failed to execute custom command #%1."
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:39 progs/sdcdb/base/sdcdb_debug.cpp:39
+msgid "Failed to halt target: kill process."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:75
+msgid "Failed to halt target: try a reset."
+msgstr ""
+
+#: progs/base/generic_debug.cpp:45
+msgid "Failed to initialize device for debugging."
+msgstr ""
+
+#: progs/icd1/base/icd1.cpp:34 progs/icd2/base/icd2_serial.cpp:43
+msgid "Failed to set port mode to '%1'."
+msgstr ""
+
+#: progs/psp/base/psp.cpp:227
+msgid "Failed to set range"
+msgstr ""
+
+#: progs/gpsim/base/gpsim.cpp:58
+#, fuzzy
+msgid "Failed to start \"gpsim\"."
+msgstr "Nem tudom indítani \"gpsim\""
+
+#: progs/icd2/base/icd_prog.cpp:30 progs/pickit2/base/pickit2_prog.cpp:67
+msgid "Failed to upload firmware."
+msgstr "Failed to upload firmware."
+
+#: libgui/device_gui.cpp:82
+msgid "Family Tree"
+msgstr "Family Tree"
+
+#: devices/pic/base/pic_config.cpp:248
+#, fuzzy
+msgid "Fast RC oscillator"
+msgstr "Oscillator"
+
+#: devices/pic/pic/pic_group.cpp:65
+msgid "Features"
+msgstr ""
+
+#: common/gui/purl_gui.cpp:43
+msgid "File \"%1\" already exists. Overwrite ?"
+msgstr ""
+
+#: libgui/editor_manager.cpp:109
+msgid "File \"%1\" already loaded. Reload?"
+msgstr ""
+
+#: libgui/project_manager.cpp:313
+msgid "File \"%1\" is not inside the project directory. Do you want to copy the file to your project directory?"
+msgstr ""
+
+#: libgui/device_editor.cpp:74 libgui/editor.cpp:80
+msgid "File %1 not saved."
+msgstr ""
+
+#: coff/base/coff_archive.cpp:115
+#, fuzzy
+msgid "File Members:"
+msgstr "File Name:"
+
+#: libgui/new_dialogs.cpp:63
+msgid "File Name:"
+msgstr "File Name:"
+
+#: libgui/hex_editor.cpp:142
+msgid "File URL: \"%1\"."
+msgstr "File URL: \"%1\"."
+
+#: coff/base/text_coff.cpp:128
+msgid "File could not be read"
+msgstr ""
+
+#: piklab-hex/main.cpp:202
+#, fuzzy
+msgid "File created."
+msgstr "Hex file cleaned."
+
+#: libgui/project_manager.cpp:319
+msgid "File is already in the project."
+msgstr "File is already in the project."
+
+#: common/global/xml_data_file.cpp:35
+msgid "File is not of correct type."
+msgstr "File is not of correct type."
+
+#: common/global/pfile.cpp:55
+msgid "File not open."
+msgstr "File not open."
+
+#: coff/base/coff_archive.cpp:27
+msgid "File size not terminated by 'l' (\"%1\")."
+msgstr ""
+
+#: tools/list/compile_manager.cpp:111 tools/list/compile_manager.cpp:136
+#: common/gui/pfile_ext.cpp:25 common/gui/pfile_ext.cpp:64
+#: common/gui/pfile_ext.cpp:95 common/gui/pfile_ext.cpp:110
+#: common/cli/cli_pfile.cpp:20 common/cli/cli_pfile.cpp:38
+#: libgui/project_manager.cpp:307 libgui/project_manager.cpp:319
+msgid "File: %1"
+msgstr "File: %1"
+
+#: libgui/project_manager.cpp:325 libgui/project_wizard.cpp:246
+msgid "File: %1\n"
+msgstr "File: %1\n"
+
+#: libgui/project_wizard.cpp:82 coff/base/coff_object.cpp:152
+msgid "Filename"
+msgstr "Filename"
+
+#: piklab-coff/main.cpp:197
+#, fuzzy
+msgid "Files:"
+msgstr "Filters:"
+
+#: piklab-hex/main.cpp:50
+msgid "Fill for checksum verification (cf datasheets)."
+msgstr ""
+
+#: piklab-hex/main.cpp:39
+#, fuzzy
+msgid "Fill option."
+msgstr "File not open."
+
+#: piklab-hex/main.cpp:275
+#, fuzzy
+msgid "Fill options:"
+msgstr "%1 opciók"
+
+#: piklab-hex/main.cpp:48
+msgid "Fill with blank values (default)."
+msgstr ""
+
+#: piklab-hex/main.cpp:278
+#, fuzzy
+msgid "Fill with the specified numeric value."
+msgstr "Folytatom a megadott eszközzel: \"%1\"..."
+
+#: piklab-hex/main.cpp:49
+msgid "Fill with zeroes."
+msgstr ""
+
+#: libgui/device_gui.cpp:110
+msgid "Filters:"
+msgstr "Filters:"
+
+#: libgui/project_manager.cpp:192
+#, fuzzy
+msgid "Find Files..."
+msgstr "Fájl hozzáadás..."
+
+#: progs/gui/prog_group_ui.cpp:64
+msgid "Firmware"
+msgstr "Firmware"
+
+#: progs/base/generic_prog.cpp:126
+msgid "Firmware directory is not configured or does not exist."
+msgstr "Firmware directory is not configured or does not exist."
+
+#: progs/icd2/base/icd2_debug.cpp:142
+msgid "Firmware directory not configured."
+msgstr "Firmware könyvtár nincs beállítva."
+
+#: piklab-prog/cli_interactive.cpp:58
+msgid "Firmware directory."
+msgstr "Firmware könyvtár."
+
+#: progs/gui/prog_config_widget.cpp:26
+msgid "Firmware directory:"
+msgstr "Firmware könyvtár:"
+
+#: progs/icd2/base/icd_prog.cpp:26
+#, fuzzy
+msgid "Firmware hex file seems incompatible with device 16F876 inside ICD."
+msgstr "Hex file seems incompatible with device: %1"
+
+#: progs/pickit2/base/pickit2_prog.cpp:60
+#, fuzzy
+msgid "Firmware hex file seems incompatible with device 18F2550 inside PICkit2."
+msgstr "Hex file seems incompatible with device: %1"
+
+#: progs/pickit2/base/pickit2.cpp:52
+msgid "Firmware memory does not match hex file (at address 0x%2: reading 0x%3 and expecting 0x%4)."
+msgstr ""
+
+#: progs/icd2/base/icd2_prog.cpp:108
+msgid "Firmware still incorrect after uploading."
+msgstr "Firmware still incorrect after uploading."
+
+#: progs/pickit2/base/pickit2_prog.cpp:70
+msgid "Firmware succesfully uploaded."
+msgstr "Firmware succesfully uploaded."
+
+#: progs/gui/prog_group_ui.cpp:147
+msgid "Firmware uploaded successfully."
+msgstr "Firmware uploaded successfully."
+
+#: progs/base/generic_prog.cpp:136
+msgid "Firmware version is %1"
+msgstr "Firmware verzió %1"
+
+#: piklab-hex/main.cpp:82
+msgid "First hex file: "
+msgstr ""
+
+#: devices/base/generic_device.cpp:26
+#, fuzzy
+msgid "Flash"
+msgstr "Format"
+
+#: libgui/device_gui.cpp:83
+msgid "Flat List"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:36 coff/base/coff_object.cpp:164
+#, fuzzy
+msgid "Float"
+msgstr "Format"
+
+#: devices/gui/memory_editor.cpp:277
+msgid "For checksum check"
+msgstr ""
+
+#: libgui/watch_view.cpp:99 libgui/watch_view.cpp:101
+msgid "Format"
+msgstr "Format"
+
+#: piklab-hex/main.cpp:123 coff/base/text_coff.cpp:252
+msgid "Format:"
+msgstr "Format:"
+
+#: libgui/toplevel.cpp:204
+msgid "Forward"
+msgstr "Forward"
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:36
+msgid "Found version \"%1\""
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:276
+msgid "Frequency range selection for FRC oscillator"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:24 coff/base/coff_object.cpp:179
+msgid "Function"
+msgstr ""
+
+#: coff/base/coff_object.cpp:137
+msgid "Function Argument"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:59
+msgid "Function or Undefined Space"
+msgstr ""
+
+#: devices/base/generic_device.cpp:18
+msgid "Future Product"
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:54
+msgid "GPRs"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.h:76
+msgid "GPSim"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:251 progs/sdcdb/base/sdcdb_debug.cpp:250
+msgid "GPSim (4MHz)"
+msgstr ""
+
+#: tools/gputils/gputils.h:33
+msgid "GPUtils"
+msgstr ""
+
+#: libgui/config_center.h:34 libgui/project_editor.cpp:30
+msgid "General"
+msgstr "General"
+
+#: libgui/config_center.h:35
+msgid "General Configuration"
+msgstr "General Configuration"
+
+#: piklab-prog/cli_interactive.cpp:251
+msgid "General Purpose Registers:"
+msgstr "General Purpose Registers:"
+
+#: devices/pic/base/pic_protection.cpp:358
+#, fuzzy
+msgid "General Segment"
+msgstr "General"
+
+#: devices/pic/base/pic_config.cpp:192
+msgid "General code segment read-protection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:193
+msgid "General code segment write-protection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:243
+msgid "General segment security"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:242
+#, fuzzy
+msgid "General segment write-protection"
+msgstr "Code write-protection"
+
+#: libgui/project_manager_ui.cpp:35
+msgid "Generated"
+msgstr "Generated"
+
+#: libgui/config_gen.cpp:112
+msgid "Generation is not supported yet for the selected toolchain or device."
+msgstr "Generation is not supported yet for the selected toolchain or device."
+
+#: libgui/config_gen.cpp:126
+msgid "Generation is only partially supported for this device."
+msgstr "Generation is only partially supported for this device."
+
+#: coff/base/cdb_parser.cpp:25
+msgid "Generic Pointer"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:841
+msgid "Generic options"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:41
+msgid "Get property value: \"get <property>\" or \"<property>\"."
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:16
+msgid "Global"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:45
+msgid "Global declarations"
+msgstr ""
+
+#: devices/pic/gui/pic_memory_editor.cpp:44
+msgid "Go to end"
+msgstr "Go to end"
+
+#: devices/pic/gui/pic_memory_editor.cpp:41
+msgid "Go to start"
+msgstr "Go to start"
+
+#: piklab/main.cpp:21
+msgid "Graphical development environment for applications based on PIC and dsPIC microcontrollers."
+msgstr "Grafikus környezet PIC és dsPIC mikrokontrolleres áramkörök fejlesztéséhez."
+
+#: progs/direct/base/direct_prog_config.cpp:51
+msgid "HOODMICRO"
+msgstr "HOODMICRO"
+
+#: devices/pic/base/pic_config.cpp:258
+msgid "HS crystal oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:169
+msgid "HS/2 Crystal with 16x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:167
+msgid "HS/2 Crystal with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:168
+msgid "HS/2 Crystal with 8x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:172
+msgid "HS/3 Crystal with 16x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:170
+msgid "HS/3 Crystal with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:171
+msgid "HS/3 Crystal with 8x PLL"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:240
+msgid "Hardcoded (%1)"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:32
+msgid "Hardware Stack"
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:45
+msgid "Hardware name:"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:31
+msgid "Header directory"
+msgstr "Header directory"
+
+#: libgui/project_manager_ui.cpp:33
+msgid "Headers"
+msgstr "Headers"
+
+#: tools/list/tools_config_widget.cpp:24
+msgid "Help Dialog"
+msgstr "Help Dialog"
+
+#: libgui/likeback.cpp:184
+msgid "Help Improve the Application"
+msgstr ""
+
+#: libgui/toplevel.cpp:539
+msgid "Hex"
+msgstr "Hex"
+
+#: common/common/purl_base.cpp:49 libgui/project_manager_ui.cpp:97
+#, fuzzy
+msgid "Hex File"
+msgstr "Elf File"
+
+#: piklab-hex/main.cpp:148
+msgid "Hex file cannot be fixed because the format was not recognized or is inconsistent."
+msgstr ""
+
+#: piklab-hex/main.cpp:156
+#, fuzzy
+msgid "Hex file cleaned and fixed."
+msgstr "Hex file cleaned and fixed."
+
+#: piklab-hex/main.cpp:155
+#, fuzzy
+msgid "Hex file cleaned."
+msgstr "Hex file cleaned."
+
+#: tools/gui/tool_config_widget.cpp:120
+msgid "Hex file format:"
+msgstr "Hex file format:"
+
+#: piklab-hex/main.cpp:118
+#, fuzzy
+msgid "Hex file is compatible with device \"%1\"."
+msgstr "Hex file seems incompatible with device: %1"
+
+#: piklab-hex/main.cpp:115 piklab-hex/main.cpp:144
+msgid "Hex file is valid."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:175
+#, fuzzy
+msgid "Hex file seems incompatible with device \"%1\"."
+msgstr "Hex file seems incompatible with device: %1"
+
+#: piklab-prog/cli_interactive.cpp:60
+#, fuzzy
+msgid "Hex file to be used for programming."
+msgstr "Hex file to be used for programming."
+
+#: piklab-prog/cmdline.cpp:454
+#, fuzzy
+msgid "Hex filename for programming."
+msgstr "Hex filename for programming."
+
+#: piklab-prog/cmdline.cpp:161
+#, fuzzy
+msgid "Hex filename not specified."
+msgstr "Hex filename not specified."
+
+#: piklab-hex/main.cpp:288
+#, fuzzy
+msgid "Hex filename(s)."
+msgstr "Hex filename(s)."
+
+#: piklab-prog/cli_interactive.cpp:56
+#, fuzzy
+msgid "Hex output file format."
+msgstr "Hex output file format."
+
+#: common/common/number.cpp:20
+msgid "Hexadecimal"
+msgstr "Hexadecimal"
+
+#: progs/base/generic_prog.cpp:26
+msgid "High"
+msgstr "High"
+
+#: devices/pic/gui/pic_memory_editor.cpp:77
+#: devices/pic/base/pic_config.cpp:231 devices/pic/base/pic_config.cpp:238
+#, fuzzy
+msgid "High Security"
+msgstr "Highest"
+
+#: devices/base/generic_device.cpp:42
+#, fuzzy
+msgid "High Voltage"
+msgstr "Feszültségek"
+
+#: devices/pic/base/pic_config.cpp:277
+msgid "High range (nominal FRC frequency is 14.1 MHz)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:245
+#, fuzzy
+msgid "High security"
+msgstr "Highest"
+
+#: devices/pic/base/pic_config.cpp:147 devices/pic/base/pic_config.cpp:162
+msgid "High speed crystal"
+msgstr "High speed crystal"
+
+#: devices/pic/base/pic_config.cpp:60
+msgid "High speed crystal/resonator"
+msgstr "High speed crystal/resonator"
+
+#: devices/pic/base/pic_config.cpp:62
+msgid "High speed crystal/resonator with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:63
+msgid "High speed crystal/resonator with software controlled 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:61
+#, fuzzy
+msgid "High speed crystal/resonator, PLL enabled"
+msgstr "High speed crystal/resonator"
+
+#: devices/pic/base/pic_config.cpp:72
+msgid "Highest"
+msgstr "Highest"
+
+#: libgui/likeback.cpp:74
+msgid "I Do not Like..."
+msgstr ""
+
+#: libgui/likeback.cpp:81
+msgid "I Found a Bug..."
+msgstr ""
+
+#: libgui/likeback.cpp:67
+msgid "I Like..."
+msgstr ""
+
+#: libgui/toplevel.cpp:338 libgui/likeback.cpp:537
+msgid "I do not like..."
+msgstr ""
+
+#: libgui/toplevel.cpp:342 libgui/likeback.cpp:544
+msgid "I found a bug..."
+msgstr ""
+
+#: libgui/toplevel.cpp:334 libgui/likeback.cpp:530
+msgid "I like..."
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:47
+msgid "I/Os"
+msgstr "I/Os"
+
+#: devices/pic/base/pic_config.cpp:273
+#, fuzzy
+msgid "I2C pins selection"
+msgstr "Code write-protection"
+
+#: devices/pic/base/pic_config.cpp:195
+msgid "ICD communication channel"
+msgstr ""
+
+#: progs/icd1/base/icd1_prog.h:44
+msgid "ICD1 Programmer"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.h:76
+msgid "ICD2 Debugger"
+msgstr ""
+
+#: progs/icd2/base/icd2_prog.h:76
+msgid "ICD2 Programmer"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:179
+#, fuzzy
+msgid "INT pin interrupt service routine"
+msgstr "megszakítás beállító rutin"
+
+#: devices/pic/base/pic_config.cpp:213
+msgid "INTRC"
+msgstr ""
+
+#: devices/pic/pic/pic_group.cpp:55
+msgid "IO Ports"
+msgstr "IO Ports"
+
+#: libgui/likeback.cpp:179
+msgid "Icons description:"
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:85
+msgid "Id returned by bootloader corresponds to other devices: %1 (%2 read and %3 expected)."
+msgstr ""
+
+#: progs/icd2/gui/icd2_group_ui.cpp:21
+msgid "Id:"
+msgstr ""
+
+#: devices/base/generic_device.cpp:17
+msgid "In Production"
+msgstr "In Production"
+
+#: devices/pic/prog/pic_prog_specific.cpp:19
+msgid "In Programming"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:82
+msgid "In-circuit debugger"
+msgstr ""
+
+#: common/common/purl_base.cpp:36
+msgid "Include File"
+msgstr ""
+
+#: tools/gui/tool_config_widget.h:57
+msgid "Include directories:"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:35
+msgid "Included"
+msgstr ""
+
+#: progs/psp/base/psp_serial.cpp:59
+msgid "Incorrect ack: expecting %1, received %2"
+msgstr ""
+
+#: progs/psp/base/psp_serial.cpp:67
+msgid "Incorrect received data end: expecting 00, received %1"
+msgstr ""
+
+#: coff/base/coff_object.cpp:54
+msgid "Indentifier"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:63
+msgid "Index:"
+msgstr ""
+
+#: devices/base/generic_device.cpp:34
+msgid "Industrial"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:107
+#, fuzzy
+msgid "Information:"
+msgstr "Konfiguráció:"
+
+#: devices/pic/base/pic_config.cpp:247
+msgid "Initial oscillator source"
+msgstr ""
+
+#: coff/base/coff_object.cpp:330
+#, fuzzy
+msgid "Initialized Data"
+msgstr "PCLATH induló érték"
+
+#: coff/base/coff_object.cpp:122
+#, fuzzy
+msgid "Inside Section"
+msgstr "Code write-protection"
+
+#: coff/base/cdb_parser.cpp:32 coff/base/coff_object.cpp:162
+msgid "Int"
+msgstr ""
+
+#: common/cli/cli_main.cpp:69
+msgid "Interactive mode"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:228
+msgid "Interactive mode: type help for help"
+msgstr ""
+
+#: common/port/usb_port.cpp:255
+msgid "Interface %1 not present: using %2"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:54
+#, fuzzy
+msgid "Internal RAM"
+msgstr "External clock"
+
+#: coff/base/cdb_parser.cpp:28
+#, fuzzy
+msgid "Internal RAM Pointer"
+msgstr "Oscillator"
+
+#: coff/base/cdb_parser.cpp:49
+#, fuzzy
+msgid "Internal Stack"
+msgstr "External clock"
+
+#: devices/pic/base/pic_config.cpp:73
+msgid "Internal Trim"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:141
+msgid "Internal fast RC"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:249
+#, fuzzy
+msgid "Internal fast RC oscillator"
+msgstr "Oscillator"
+
+#: devices/pic/base/pic_config.cpp:182
+msgid "Internal fast RC oscillator (no PLL)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:180
+msgid "Internal fast RC oscillator with 16x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:178
+msgid "Internal fast RC oscillator with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:157 devices/pic/base/pic_config.cpp:179
+msgid "Internal fast RC oscillator with 8x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:250
+msgid "Internal fast RC oscillator with PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:255
+msgid "Internal fast RC oscillator with postscaler"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:142
+msgid "Internal low-power RC"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:183
+msgid "Internal low-power RC oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:43
+msgid "Internal oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:45
+msgid "Internal oscillator (no CLKOUT)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:205
+msgid "Internal oscillator speed"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:44
+msgid "Internal oscillator with CLKOUT"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:65
+msgid "Internal oscillator, HS used by USB"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:64
+msgid "Internal oscillator, XT used by USB"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:80
+msgid "Internal-external switchover"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:332
+msgid "Invalid begin or end character for read block."
+msgstr ""
+
+#: progs/psp/base/psp.cpp:185
+msgid "Invalid firmware version"
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:48
+msgid "Inverted"
+msgstr "Inverted"
+
+#: libgui/toplevel.cpp:938
+#, fuzzy
+msgid "It is not possible to start a debugging session with an hex file not generated with the current project."
+msgstr "<qt>Nem lehetséges a hibakeresés elíndítása, mer a hex fájl nem ebben a projektben lett generálva. Csukd be ezt a projektet először.</qt>"
+
+#: progs/icd2/base/icd2_prog.cpp:38
+msgid "It is not recommended to power dsPICs from ICD. Continue anyway?"
+msgstr "It is not recommended to power dsPICs from ICD. Continue anyway?"
+
+#: libgui/likeback.cpp:395
+msgid "It will only be used to contact you back if more information is needed about your comments, how to reproduce the bugs you report, send bug corrections for you to test..."
+msgstr ""
+
+#: devices/pic/base/pic.cpp:44
+msgid "J"
+msgstr ""
+
+#: tools/jal/jal.h:32
+msgid "JAL"
+msgstr "JAL"
+
+#: common/common/purl_base.cpp:27
+msgid "JAL Compiler"
+msgstr "JAL Compiler"
+
+#: common/common/purl_base.cpp:40
+msgid "JAL File"
+msgstr "JAL Datei"
+
+#: tools/jalv2/jalv2.h:32
+msgid "JAL V2"
+msgstr "JAL V2"
+
+#: progs/direct/base/direct_prog_config.cpp:41
+msgid "JDM classic"
+msgstr "JDM classic"
+
+#: progs/direct/base/direct_prog_config.cpp:43
+msgid "JDM classic (delay 10)"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:45
+msgid "JDM classic (delay 20)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:268
+#, fuzzy
+msgid "JTAG port enabled"
+msgstr " Nem tudom azonosítani a portot"
+
+#: devices/pic/base/pic.cpp:45
+msgid "K"
+msgstr ""
+
+#: libgui/toplevel.cpp:156
+msgid "Konsole"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:80
+msgid "LCD"
+msgstr ""
+
+#: common/global/about.cpp:81
+msgid "LPLAB author (original microchip programmer support)."
+msgstr ""
+
+#: coff/base/coff_object.cpp:134
+#, fuzzy
+msgid "Label"
+msgstr "Octal"
+
+#: tools/base/generic_tool.cpp:21
+#, fuzzy
+msgid "Librarian"
+msgstr "Kalibrálás"
+
+#: tools/base/generic_tool.cpp:21
+msgid "Librarian:"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:44
+#, fuzzy
+msgid "Library"
+msgstr "Bináris"
+
+#: tools/base/generic_tool.cpp:33
+msgid "Library Directory"
+msgstr ""
+
+#: common/common/purl_base.cpp:44
+msgid "Library File"
+msgstr ""
+
+#: coff/base/coff_object.cpp:153
+msgid "Line Number"
+msgstr ""
+
+#: libgui/text_editor.cpp:170
+msgid "Line: %1  Col: %2"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:19
+msgid "Linker"
+msgstr "Linker"
+
+#: common/common/purl_base.cpp:46 libgui/project_manager.cpp:165
+#: libgui/project_manager_ui.cpp:33
+msgid "Linker Script"
+msgstr "Linker Script"
+
+#: tools/base/generic_tool.cpp:32
+msgid "Linker Script Directory"
+msgstr "Linker Script Könyvtár"
+
+#: common/common/purl_base.cpp:47
+#, fuzzy
+msgid "Linker Script for PIC30"
+msgstr "Linker Script"
+
+#: tools/base/generic_tool.cpp:19
+#, fuzzy
+msgid "Linker:"
+msgstr "Linker"
+
+#: libgui/project_manager_ui.cpp:99
+msgid "List"
+msgstr "Lista"
+
+#: common/common/purl_base.cpp:52
+msgid "List File"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:18
+#, fuzzy
+msgid "Local"
+msgstr "Octal"
+
+#: libgui/breakpoint_view.cpp:48
+msgid "Location"
+msgstr ""
+
+#: libgui/new_dialogs.cpp:32
+msgid "Location:"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:31 coff/base/coff_object.cpp:163
+#, fuzzy
+msgid "Long"
+msgstr "be"
+
+#: coff/base/coff_object.cpp:174
+msgid "Long Double"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:25
+msgid "Low"
+msgstr ""
+
+#: devices/base/generic_device.cpp:40
+msgid "Low Power"
+msgstr ""
+
+#: devices/base/generic_device.cpp:41
+msgid "Low Voltage"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:74
+msgid "Low Voltage Detect"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:254
+msgid "Low power RC oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:48
+msgid "Low power crystal"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:116
+msgid "Low power in sleep mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:278
+msgid "Low range (nominal FRC frequency is 9.7 MHz)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:86
+msgid "Low voltage programming"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:181
+msgid "Low-power 32 kHz oscillator (TMR1 oscillator)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:123
+msgid "Low-power timer1 oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:146 devices/pic/base/pic_config.cpp:161
+msgid "Low-power/low-frequency crystal"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:52
+msgid "Lower-128-byte Internal RAM"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:69
+msgid "Lowest"
+msgstr ""
+
+#: progs/direct/base/direct.cpp:24
+msgid "MCLR (Vpp)"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:52
+msgid "MCLR Vdd"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:52
+msgid "MCLR Vpp"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:51
+msgid "MCLR ground"
+msgstr ""
+
+#: devices/base/generic_device.cpp:60
+msgid "MLF"
+msgstr ""
+
+#: tools/mpc/mpc.h:32
+msgid "MPC Compiler"
+msgstr "MPC Compiler"
+
+#: progs/base/generic_prog.cpp:141 progs/base/generic_prog.cpp:149
+#: progs/base/generic_prog.cpp:157
+msgid "MPLAB %1"
+msgstr ""
+
+#: devices/base/generic_device.cpp:55
+msgid "MQFP"
+msgstr ""
+
+#: devices/base/generic_device.cpp:50
+msgid "MSOP"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:220
+msgid "MSSP address select bit"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:138
+msgid "Macros"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:38
+msgid "Magic number: %1"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:109
+msgid "Malformed record: "
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:220
+msgid "Malformed string received \"%1\""
+msgstr ""
+
+#: common/common/purl_base.cpp:53
+msgid "Map File"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:204
+msgid "Master clear pull-up resistor"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:34
+msgid "Master clear reset"
+msgstr ""
+
+#: devices/base/generic_device.cpp:22
+msgid "Mature"
+msgstr ""
+
+#: common/global/log.cpp:28
+msgid "Max debug messages"
+msgstr "Max debug messages"
+
+#: coff/base/coff_object.cpp:169
+msgid "Member Of Enumeration"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:19
+msgid "Member name not terminated by '/' (\"%1\")."
+msgstr ""
+
+#: coff/base/coff_object.cpp:144
+#, fuzzy
+msgid "Member of Enumeration"
+msgstr "General Configuration"
+
+#: coff/base/coff_object.cpp:136
+msgid "Member of Structure"
+msgstr ""
+
+#: coff/base/coff_object.cpp:139
+msgid "Member of Union"
+msgstr ""
+
+#: libgui/device_gui.cpp:408 libgui/project_manager_ui.cpp:100
+msgid "Memory Map"
+msgstr ""
+
+#: devices/mem24/mem24/mem24_group.cpp:22
+msgid "Memory Size"
+msgstr "Memory Size"
+
+#: devices/pic/pic/pic_group.cpp:27
+msgid "Memory Type"
+msgstr "Memory Type"
+
+#: progs/icd2/base/icd2_debug.cpp:237
+msgid "Memory area for debug executive was not empty. Overwrite it and continue anyway..."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:83
+msgid "Memory parity error"
+msgstr "Memory parity error"
+
+#: piklab-prog/cmdline.cpp:254
+msgid "Memory range not present on this device."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:258
+msgid "Memory range not recognized."
+msgstr "Memory range not recognized."
+
+#: piklab-prog/cmdline.cpp:57
+msgid "Memory range to operate on."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:259
+msgid "Memory ranges are not supported for the specified device."
+msgstr "Memory ranges are not supported for the specified device."
+
+#: piklab-prog/cmdline.cpp:148
+msgid "Memory ranges for PIC/dsPIC devices:"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:94
+msgid "Microcontroller"
+msgstr "Microcontroller"
+
+#: devices/pic/base/pic_config.cpp:95
+msgid "Microprocessor"
+msgstr "Microprocessor"
+
+#: devices/pic/base/pic_config.cpp:97
+msgid "Microprocessor with boot block"
+msgstr "Microprocessor with boot block"
+
+#: devices/pic/base/pic_config.cpp:71
+msgid "Mid/High"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:70
+msgid "Mid/Low"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:52
+msgid "Midrange Family"
+msgstr ""
+
+#: devices/pic/base/pic_register.cpp:76
+msgid "Mirror of %1"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:260
+msgid "Missing or incorrect device (Read id is %1)."
+msgstr "Nemlétező vagy nem megfelelő eszköz ( id  %1)."
+
+#: progs/icd2/base/icd2.cpp:51
+msgid "Module Vpp"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:74
+msgid "Monty-Robot programmer"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:82
+msgid "Motion Feeback"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:81
+msgid "Motor Control"
+msgstr ""
+
+#: common/gui/editlistbox.cpp:147
+msgid "Move &Down"
+msgstr ""
+
+#: common/gui/editlistbox.cpp:142
+msgid "Move &Up"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:70
+msgid "Myke's EL Cheapo"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:58 libgui/project_editor.cpp:32
+#: libgui/project_wizard.cpp:120
+msgid "Name:"
+msgstr "Név:"
+
+#: libgui/project_manager.cpp:218
+msgid "New File..."
+msgstr "New File..."
+
+#: coff/base/coff.cpp:29 coff/base/coff_object.cpp:36
+msgid "New Microchip"
+msgstr ""
+
+#: libgui/project_manager.cpp:181 libgui/toplevel.cpp:226
+msgid "New Project..."
+msgstr "New Project..."
+
+#: libgui/project_wizard.cpp:158
+msgid "New Project: Add Files"
+msgstr "New Project: Add Files"
+
+#: libgui/project_wizard.cpp:117
+msgid "New Project: Basic Settings"
+msgstr "New Project: Basic Settings"
+
+#: libgui/project_wizard.cpp:147
+msgid "New Project: Source Files"
+msgstr "Új projektfájl"
+
+#: libgui/project_manager.cpp:197
+msgid "New Source File..."
+msgstr "Új forrásfájl..."
+
+#: libgui/toplevel.cpp:184
+#, fuzzy
+msgid "New hex File..."
+msgstr "New File..."
+
+#: progs/gui/hardware_config_widget.cpp:159
+#, fuzzy
+msgid "New/Test..."
+msgstr "New Project..."
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:180
+msgid "No \"goto\" instruction in the first four instructions."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:261
+#, fuzzy
+msgid "No COFF file specified."
+msgstr "Hex filename not specified."
+
+#: piklab-prog/cli_interactive.cpp:171
+#, fuzzy
+msgid "No breakpoint set."
+msgstr "No breakpoint set"
+
+#: common/cli/cli_main.cpp:27
+msgid "No command specified"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:286
+msgid "No custom commands specified."
+msgstr ""
+
+#: common/global/log.cpp:25
+msgid "No debug message"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:98
+#, fuzzy
+msgid "No device selected."
+msgstr "Az eszköz nem meghatározott."
+
+#: piklab-prog/cli_interactive.cpp:243 piklab-prog/cli_interactive.cpp:259
+#, fuzzy
+msgid "No device specified."
+msgstr "Az eszköz nem meghatározott."
+
+#: common/nokde/nokde_kaboutdata.cpp:430
+msgid ""
+"No licensing terms for this program have been specified.\n"
+"Please check the documentation or the source for any\n"
+"licensing terms.\n"
+msgstr ""
+
+#: progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp:37
+msgid "No of Retries:"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:244 piklab-prog/cli_interactive.cpp:262
+#, fuzzy
+msgid "No register."
+msgstr "No register"
+
+#: devices/pic/gui/pic_group_ui.cpp:72
+msgid "No variable"
+msgstr "No variable"
+
+#: piklab-prog/cli_interactive.cpp:266
+#, fuzzy
+msgid "No variable."
+msgstr "No variable"
+
+#: piklab-hex/main.cpp:137
+msgid "No. of Words:"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:108
+#, fuzzy
+msgid "No. of file members:"
+msgstr "No variable"
+
+#: coff/base/text_coff.cpp:258
+#, fuzzy
+msgid "No. of sections:"
+msgstr "End of options"
+
+#: coff/base/text_coff.cpp:259 coff/base/coff_archive.cpp:109
+msgid "No. of symbols:"
+msgstr ""
+
+#: coff/base/text_coff.cpp:260
+#, fuzzy
+msgid "No. of variables:"
+msgstr "No variable"
+
+#: libgui/breakpoint_view.cpp:64
+msgid "Non-code breakpoint"
+msgstr ""
+
+#: devices/base/generic_device.cpp:39 devices/pic/base/pic.cpp:43
+msgid "Normal"
+msgstr "Normal"
+
+#: common/global/log.cpp:26
+msgid "Normal debug messages"
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:61
+msgid "Not Connected"
+msgstr "Not Connected"
+
+#: devices/base/generic_device.cpp:19
+msgid "Not Recommended for New Design"
+msgstr "Not Recommended for New Design"
+
+#: common/common/group.cpp:13
+#, fuzzy
+msgid "Not Supported"
+msgstr "Támogatott"
+
+#: devices/pic/base/pic_config.cpp:225
+#, fuzzy
+msgid "Not connected to EMB"
+msgstr "Not Connected"
+
+#: progs/direct/base/direct_prog_config.cpp:72
+#, fuzzy
+msgid "Not tested."
+msgstr "Nem tesztelt"
+
+#: libgui/likeback.cpp:598
+msgid "Note that to improve this application, it's important to tell us the things you like as much as the things you dislike."
+msgstr ""
+
+#: common/port/usb_port.cpp:401
+msgid "Nothing received: retrying..."
+msgstr "Nothing received: retrying..."
+
+#: common/port/usb_port.cpp:363
+msgid "Nothing sent: retrying..."
+msgstr "Nothing sent: retrying..."
+
+#: piklab-hex/main.cpp:232 piklab-prog/cli_interactive.cpp:158
+#: piklab-prog/cli_interactive.cpp:298
+#, fuzzy
+msgid "Number format not recognized."
+msgstr "Number format not recognized"
+
+#: devices/pic/base/pic_config.cpp:262
+msgid "OSC2 pin function"
+msgstr ""
+
+#: coff/base/coff.cpp:23
+msgid "Object"
+msgstr "Object"
+
+#: common/common/purl_base.cpp:43
+msgid "Object File"
+msgstr "Object File"
+
+#: libgui/project_manager.cpp:213 libgui/project_manager_ui.cpp:34
+msgid "Objects"
+msgstr "Objects"
+
+#: common/common/number.cpp:22
+msgid "Octal"
+msgstr "Octal"
+
+#: devices/pic/base/pic_config.cpp:107
+msgid "Odd PWM output polarity"
+msgstr ""
+
+#: coff/base/coff.cpp:27 coff/base/coff_object.cpp:35
+msgid "Old Microchip"
+msgstr ""
+
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:86
+msgid "Only bootloader version 1.x is supported"
+msgstr ""
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:38
+msgid "Only bootloader version 2.x is supported."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:315
+msgid "Only code and EEPROM will be erased."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:316
+msgid "Only code will be erased."
+msgstr ""
+
+#: libgui/likeback.cpp:594
+msgid "Only english language is accepted."
+msgstr ""
+
+#: progs/base/prog_config.cpp:69
+msgid "Only program what is needed (faster)."
+msgstr ""
+
+#: progs/base/debug_config.cpp:13
+msgid "Only stop stepping on project source line."
+msgstr ""
+
+#: progs/base/debug_config.cpp:12
+msgid "Only stop stepping on source line."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:177
+msgid "Only the first word of the \"goto\" instruction is into the first four instructions."
+msgstr ""
+
+#: progs/base/prog_config.cpp:71
+msgid "Only verify programmed words in code memory (faster)."
+msgstr ""
+
+#: progs/pickit2/gui/pickit2_group_ui.cpp:33
+msgid "Open Calibration Firmware"
+msgstr "Open Calibration Firmware"
+
+#: libgui/toplevel.cpp:554
+msgid "Open File"
+msgstr "Open File"
+
+#: progs/gui/prog_group_ui.cpp:142
+msgid "Open Firmware"
+msgstr "Open Firmware"
+
+#: libgui/project_manager.cpp:182 libgui/toplevel.cpp:228
+msgid "Open Project..."
+msgstr "Open Project..."
+
+#: libgui/toplevel.cpp:230
+msgid "Open Recent Project"
+msgstr "Open Recent Project"
+
+#: common/global/log.cpp:58
+msgid "Operation aborted by user."
+msgstr "Operation aborted by user."
+
+#: coff/base/text_coff.cpp:257
+msgid "Option header:"
+msgstr ""
+
+#: piklab/main.cpp:15
+msgid "Optional filenames to be opened upon startup."
+msgstr ""
+
+#: coff/base/coff_object.cpp:469
+#, fuzzy
+msgid "Optional header format not supported: magic number is %1."
+msgstr "COFF formátum nem alkalmazható:varázsszám %1"
+
+#: coff/base/coff_object.cpp:538
+msgid "Optionnal header size is not %1: %2"
+msgstr ""
+
+#: libgui/project_manager.cpp:191
+msgid "Options..."
+msgstr "Beállítások..."
+
+#: common/global/about.cpp:80
+msgid "Original author of PiKdev."
+msgstr "Original author of PiKdev."
+
+#: common/global/about.cpp:85
+msgid "Original code for direct programming."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:351
+msgid "Osccal backup cannot be read by selected programmer"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:314
+msgid "Osccal backup cannot be read by the selected programmer"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:303
+msgid "Osccal cannot be read by the selected programmer"
+msgstr ""
+
+#: progs/pickit2/gui/pickit2_group_ui.cpp:28
+msgid "Osccal regeneration not available for the selected device."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:39
+msgid "Oscillator"
+msgstr "Oscillator"
+
+#: progs/gui/prog_group_ui.cpp:175
+msgid "Oscillator calibration regeneration is not available with the selected programmer."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:160
+msgid "Oscillator mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:140
+msgid "Oscillator source"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:100
+msgid "Oscillator system clock switch"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:64
+#, fuzzy
+msgid "Output Executable Type:"
+msgstr "Output Object Type:"
+
+#: piklab-prog/cmdline.cpp:178
+#, fuzzy
+msgid "Output hex filename already exists."
+msgstr "Output hex filename already exists."
+
+#: libgui/log_view.cpp:89
+msgid "Output in console"
+msgstr "Output in console"
+
+#: tools/list/tools_config_widget.cpp:53
+#, fuzzy
+msgid "Output type:"
+msgstr "Output Object Type:"
+
+#: common/cli/cli_main.cpp:63
+msgid "Overwrite files and answer \"yes\" to questions."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:32
+msgid "P16PRO40 7407"
+msgstr "P16PRO40 7407"
+
+#: progs/direct/base/direct_prog_config.cpp:30
+msgid "P16PRO40 classic"
+msgstr "P16PRO40 classic"
+
+#: progs/direct/base/direct_prog_config.cpp:36
+msgid "P16PRO40-VPP40 7407"
+msgstr "P16PRO40-VPP40 7407"
+
+#: progs/direct/base/direct_prog_config.cpp:34
+msgid "P16PRO40-VPP40 classic"
+msgstr "P16PRO40-VPP40 classic"
+
+#: devices/base/generic_device.cpp:46
+msgid "PDIP"
+msgstr "PDIP"
+
+#: devices/pic/pic/pic_group.h:25
+msgid "PIC"
+msgstr "PIC"
+
+#: progs/direct/base/direct_prog_config.cpp:47
+msgid "PIC Elmer"
+msgstr "PIC Elmer"
+
+#: coff/base/coff.cpp:28
+#, fuzzy
+msgid "PIC30"
+msgstr "PIC"
+
+#: tools/pic30/pic30.h:33
+msgid "PIC30 Toolchain"
+msgstr ""
+
+#: tools/picc/picc.h:76 coff/base/coff_object.cpp:37
+msgid "PICC Compiler"
+msgstr "PICC Compiler"
+
+#: tools/picc/picc.h:64
+msgid "PICC Lite Compiler"
+msgstr "PICC Lite Compiler"
+
+#: tools/picc/picc.h:88
+msgid "PICC-18 Compiler"
+msgstr "PICC-18 Compiler"
+
+#: progs/pickit1/base/pickit1_prog.h:35
+msgid "PICkit1"
+msgstr "PICkit1"
+
+#: progs/pickit2/base/pickit2_prog.h:37
+#, fuzzy
+msgid "PICkit2 Firmware 1.x"
+msgstr " PICkit2 Firmware feltöltés..."
+
+#: progs/pickit2v2/base/pickit2v2_prog.h:39
+#, fuzzy
+msgid "PICkit2 Firmware 2.x"
+msgstr " PICkit2 Firmware feltöltés..."
+
+#: devices/base/generic_device.cpp:59
+msgid "PLCC"
+msgstr "PLCC"
+
+#: devices/pic/base/pic_config.cpp:201
+msgid "PLL clock (divided by)"
+msgstr "PLL clock (divided by)"
+
+#: devices/pic/base/pic_config.cpp:223
+msgid "PMP pin select bit"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:103
+msgid "PORTB A/D"
+msgstr "PORTB A/D"
+
+#: devices/pic/base/pic_config.cpp:131
+msgid "PWM multiplexed onto RE6 and RE3"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:133
+msgid "PWM multiplexed onto RE6 and RE5"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:132
+msgid "PWM multiplexed onto RH7 and RH4"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:134
+msgid "PWM multiplexed onto RH7 and RH6"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:113
+msgid "PWM output pin reset state"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:121
+msgid "PWM4 mux"
+msgstr "PWM4 mux"
+
+#: devices/base/device_group.cpp:251
+msgid "Packaging"
+msgstr "Packaging"
+
+#: coff/base/cdb_parser.cpp:29
+msgid "Paged Pointer"
+msgstr ""
+
+#: progs/gui/port_selector.cpp:21
+msgid "Parallel"
+msgstr "Parallel"
+
+#: common/port/port.cpp:62
+msgid "Parallel Port"
+msgstr "Parallel Port"
+
+#: coff/base/text_coff.cpp:245
+#, fuzzy
+msgid "Parsing COFF file is not supported for this device or an error occured."
+msgstr "A hibakeresést nem támogatja ez a programozó."
+
+#: progs/manager/debug_manager.cpp:84
+msgid "Parsing COFF file: %1"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:24
+msgid "Pass"
+msgstr "Pass"
+
+#: common/cli/cli_main.cpp:51
+msgid "Perform the requested command."
+msgstr "Perform the requested command."
+
+#: devices/pic/base/pic_config.cpp:269
+#, fuzzy
+msgid "Peripheral pin select configuration"
+msgstr "General Configuration"
+
+#: progs/picdem_bootloader/base/picdem_bootloader_prog.h:31
+#, fuzzy
+msgid "Picdem Bootloader"
+msgstr "Bootloader"
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader_prog.h:32
+#, fuzzy
+msgid "Pickit2 Bootloader"
+msgstr "Bootloader"
+
+#: progs/psp/base/psp_prog.h:37
+msgid "Picstart Plus"
+msgstr "Picstart Plus"
+
+#: common/common/purl_base.cpp:58
+msgid "Pikdev Project File"
+msgstr "Pikdev Project File"
+
+#: piklab/main.cpp:21
+msgid "Piklab"
+msgstr "Piklab"
+
+#: piklab-coff/main.cpp:278
+#, fuzzy
+msgid "Piklab COFF Utility"
+msgstr "Piklab Programmer Utility"
+
+#: piklab-hex/main.cpp:287
+#, fuzzy
+msgid "Piklab Hex Utility"
+msgstr "Piklab Programmer Utility"
+
+#: piklab-prog/cmdline.cpp:453
+msgid "Piklab Programmer Utility"
+msgstr "Piklab Programmer Utility"
+
+#: progs/gui/port_selector.cpp:68
+#, fuzzy
+msgid "Piklab has been compiled without support for USB port."
+msgstr "<qt>Piklab lefordítva USB port támogatás nélkül.</qt>"
+
+#: progs/gui/port_selector.cpp:65
+#, fuzzy
+msgid "Piklab has been compiled without support for parallel port."
+msgstr "<qt>Piklab lefordítva LPT port támogatás nélkül.</qt>"
+
+#: libgui/device_gui.cpp:418
+msgid "Pin Diagrams"
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:34
+msgid "Pin assignment"
+msgstr "Pin assignment"
+
+#: libgui/likeback.cpp:545
+msgid "Please briefly describe the bug you encountered."
+msgstr ""
+
+#: libgui/likeback.cpp:538
+msgid "Please briefly describe what you do not like."
+msgstr ""
+
+#: libgui/likeback.cpp:531
+msgid "Please briefly describe what you like."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:333
+msgid "Please check installation of selected software debugger."
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:79
+msgid "Please compile the current project"
+msgstr ""
+
+#: libgui/likeback.cpp:394
+msgid "Please provide your email address."
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:654
+msgid "Please use %1 to report bugs, do not mail the authors directly.\n"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:652
+msgid "Please use http://bugs.kde.org to report bugs, do not mail the authors directly.\n"
+msgstr ""
+
+#: coff/base/coff_object.cpp:178
+#, fuzzy
+msgid "Pointer"
+msgstr "Kód memoria"
+
+#: progs/gui/prog_config_center.cpp:119
+msgid "Port Selection"
+msgstr "Port Selection"
+
+#: progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp:20
+#, fuzzy
+msgid "Port Speed:"
+msgstr "Port Selection"
+
+#: progs/direct/base/direct.cpp:27
+msgid "Power (Vdd)"
+msgstr "Power (Vdd)"
+
+#: progs/base/prog_config.cpp:72
+msgid "Power down target after programming."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:190
+msgid "Power-on reset timer value (ms)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:37
+msgid "Power-up timer"
+msgstr ""
+
+#. i18n: file ./data/app_data/piklabui.rc line 83
+#: rc.cpp:27
+#, no-c-format
+msgid "Pr&ogrammer"
+msgstr "Pr&ogrammer"
+
+#: progs/base/prog_config.cpp:75
+msgid "Preserve data EEPROM when programming."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:143
+msgid "Primary"
+msgstr "Elsődleges"
+
+#: devices/pic/base/pic_config.cpp:251
+#, fuzzy
+msgid "Primary oscillator"
+msgstr "Oscillator"
+
+#: devices/pic/base/pic_config.cpp:145 devices/pic/base/pic_config.cpp:256
+msgid "Primary oscillator mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:252
+msgid "Primary oscillator with PLL"
+msgstr ""
+
+#: progs/icd2/base/icd2_usb.cpp:77
+msgid "Problem connecting ICD2: please try again after unplug-replug."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:92
+msgid "Processor mode"
+msgstr "Processor mode"
+
+#: devices/pic/base/pic.cpp:34
+msgid "Program Executive"
+msgstr ""
+
+#: libgui/toplevel.cpp:144
+msgid "Program Log"
+msgstr ""
+
+#: progs/base/prog_config.cpp:76
+#, fuzzy
+msgid "Program data EEPROM."
+msgstr "Data EEPROM"
+
+#: libgui/global_config.cpp:21
+msgid "Program device after successful build."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:41
+msgid "Program device memory: \"program <hexfilename>\"."
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:56
+msgid "Programmer"
+msgstr "Programmer"
+
+#: progs/gui/prog_config_center.h:23 progs/gui/prog_config_center.h:24
+msgid "Programmer Options"
+msgstr "Programmer Options"
+
+#: progs/gui/prog_config_center.h:35 progs/gui/prog_config_center.h:36
+msgid "Programmer Selection"
+msgstr "Programmer Selection"
+
+#. i18n: file ./data/app_data/piklabui.rc line 161
+#: rc.cpp:48
+#, no-c-format
+msgid "Programmer Toolbar"
+msgstr "Programmer Toolbar"
+
+#: devices/pic/prog/pic_prog_specific.cpp:15
+msgid "Programmer Vpp"
+msgstr "Programmer Vpp"
+
+#: piklab-prog/cli_interactive.cpp:54
+msgid "Programmer hardware configuration to use (for direct programmer)."
+msgstr ""
+
+#: progs/gui/prog_config_center.cpp:41
+msgid "Programmer in use:"
+msgstr "Programmer in use:"
+
+#: piklab-prog/cmdline.cpp:270
+msgid "Programmer is already disconnected."
+msgstr "Programmer is already disconnected."
+
+#: piklab-prog/cmdline.cpp:274
+msgid "Programmer is already running."
+msgstr "Programmer is already running."
+
+#: piklab-prog/cmdline.cpp:278
+msgid "Programmer is already stopped."
+msgstr "Programmer is already stopped."
+
+#: progs/base/generic_prog.cpp:134
+msgid "Programmer is in bootload mode."
+msgstr "Programmer is in bootload mode."
+
+#: piklab-prog/cmdline.cpp:158
+msgid "Programmer not specified."
+msgstr "Programmer not specified."
+
+#: piklab-prog/cli_interactive.cpp:57
+msgid "Programmer port (\"usb\" or device such as \"/dev/ttyS0\")"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:53
+msgid "Programmer to use."
+msgstr ""
+
+#: tools/list/device_info.cpp:59
+#, fuzzy
+msgid "Programmers"
+msgstr "Programmer"
+
+#: tools/list/device_info.cpp:34
+#, fuzzy
+msgid "Programming Specifications"
+msgstr "Programmer Selection"
+
+#: devices/pic/prog/pic_prog.cpp:710
+msgid "Programming calibration data needs a chip erase. Continue anyway?"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:738
+msgid "Programming calibration successful"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:735 devices/pic/prog/pic_prog.cpp:736
+msgid "Programming calibration..."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:272
+msgid "Programming device for debugging test..."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:277 progs/base/generic_prog.cpp:341
+msgid "Programming device memory..."
+msgstr ""
+
+#: libgui/toplevel.cpp:849
+msgid "Programming in progress. Cannot be aborted."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:279
+msgid "Programming successful"
+msgstr "Programozás kész"
+
+#: progs/base/generic_prog.cpp:343
+#, fuzzy
+msgid "Programming successful."
+msgstr "Programozás kész"
+
+#: progs/base/generic_prog.cpp:33
+msgid "Programming..."
+msgstr "Programming..."
+
+#: libgui/project_manager.cpp:190
+msgid "Project"
+msgstr "Project"
+
+#: libgui/project_wizard.cpp:187
+msgid "Project \"%1\"already exists. Overwrite it?"
+msgstr ""
+
+#: common/common/purl_base.cpp:51
+msgid "Project File"
+msgstr "Project File"
+
+#: common/common/purl_base.cpp:127
+msgid "Project Files"
+msgstr "Project Files"
+
+#: libgui/toplevel.cpp:121
+msgid "Project Manager"
+msgstr "Project Manager"
+
+#: libgui/project_editor.cpp:21
+msgid "Project Options"
+msgstr "Project Options"
+
+#: libgui/toplevel.cpp:234
+msgid "Project Options..."
+msgstr "Project Options..."
+
+#. i18n: file ./data/app_data/piklabui.rc line 145
+#: rc.cpp:42
+#, no-c-format
+msgid "Project Toolbar"
+msgstr "Project Toolbar"
+
+#: libgui/project_manager.cpp:526
+msgid "Project already loaded. Reload?"
+msgstr "Projekt már betöltve. Újra?"
+
+#: libgui/project.cpp:24
+msgid "Project file %1 does not exist."
+msgstr "Projektfájl %1nem létezik."
+
+#: libgui/project_wizard.cpp:171
+msgid "Project name is empty."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:64
+msgid "Propic2 Vpp-1"
+msgstr "Propic2 Vpp-1"
+
+#: progs/direct/base/direct_prog_config.cpp:66
+msgid "Propic2 Vpp-2"
+msgstr "Propic2 Vpp-2"
+
+#: progs/direct/base/direct_prog_config.cpp:68
+msgid "Propic2 Vpp-3"
+msgstr "Propic2 Vpp-3"
+
+#: devices/pic/gui/pic_config_word_editor.cpp:93
+msgid "Protected Mask:"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:635
+msgid "Protecting code memory or data EEPROM on OTP devices is disabled as a security..."
+msgstr ""
+
+#: devices/base/generic_device.cpp:57
+msgid "QFN"
+msgstr "QFN"
+
+#: devices/base/generic_device.cpp:58
+#, fuzzy
+msgid "QFN-S"
+msgstr "DFN-S"
+
+#: piklab-prog/cli_interactive.cpp:38
+msgid "Quit."
+msgstr "Kilépés."
+
+#: libgui/toplevel.cpp:298
+msgid "R&eset"
+msgstr "R&eset"
+
+#: libgui/toplevel.cpp:276
+msgid "R&estart"
+msgstr ""
+
+#: libgui/text_editor.cpp:171
+msgid "R/O"
+msgstr ""
+
+#: devices/base/generic_device.cpp:28
+msgid "ROM"
+msgstr "ROM"
+
+#: devices/base/generic_device.cpp:29
+msgid "ROM-less"
+msgstr "ROM-less"
+
+#: devices/pic/gui/pic_config_word_editor.cpp:78
+msgid "Raw Blank Value:"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:68
+msgid "Raw Value:"
+msgstr ""
+
+#: devices/gui/memory_editor.cpp:278
+msgid "Re&load"
+msgstr "Ú&jraolvasás"
+
+#: progs/manager/debug_manager.cpp:317
+msgid "Reached breakpoint."
+msgstr "Reached breakpoint."
+
+#: devices/pic/gui/pic_register_view.cpp:83 progs/gui/prog_group_ui.cpp:34
+#: progs/gui/prog_group_ui.cpp:45 libgui/toplevel.cpp:953
+msgid "Read"
+msgstr "Read"
+
+#: devices/pic/gui/pic_register_view.cpp:262
+msgid "Read All"
+msgstr "Mindet olvasd"
+
+#: libgui/hex_editor.cpp:39
+msgid "Read Only Mode"
+msgstr "Csak olvasható"
+
+#: piklab-prog/cmdline.cpp:45
+msgid "Read device memory: \"read <hexfilename>\"."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:275
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:78
+msgid "Read id does not match the specified device name \"%1\"."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:273
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:76
+msgid "Read id: %1"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:45
+msgid "Read or set a register or variable: \"x PORTB\" or \"x W 0x1A\"."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:343
+msgid "Read string is different than expected: %1 (%2)."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:291 piklab-prog/cmdline.cpp:296
+#: piklab-prog/cmdline.cpp:301
+msgid "Reading device memory not supported for specified programmer."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:319
+msgid "Reading device memory..."
+msgstr "Olvasom az eszköz memóriáját..."
+
+#: progs/base/generic_prog.cpp:322
+#, fuzzy
+msgid "Reading done."
+msgstr "Olvasás kész"
+
+#: progs/base/generic_prog.cpp:32
+msgid "Reading..."
+msgstr "Olvasom..."
+
+#: progs/base/generic_debug.cpp:48
+msgid "Ready to start debugging."
+msgstr "Kész vagyok a hibakeresésre."
+
+#: progs/icd2/base/icd2.cpp:212
+msgid "Received length too short."
+msgstr "A visszaadott hossz túl kevés."
+
+#: progs/icd2/base/icd2.cpp:216
+msgid "Received string too short."
+msgstr "A visszaadott szöveg túl rövid."
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:107
+msgid "Received unexpected character ('%1' received; 'K' expected)."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:104
+msgid "Received unexpected character ('%1' received; 'K' or 'N' expected)."
+msgstr ""
+
+#: libgui/toplevel.cpp:905
+#, fuzzy
+msgid "Recompile First"
+msgstr "&A fájl lefordítása"
+
+#: progs/gui/prog_group_ui.cpp:36
+#, fuzzy
+msgid "Regenerating..."
+msgstr "Újragenerálás..."
+
+#: coff/base/coff_object.cpp:145
+#, fuzzy
+msgid "Register Parameter"
+msgstr "regiszterek"
+
+#: coff/base/cdb_parser.cpp:58
+#, fuzzy
+msgid "Register Space"
+msgstr "regiszterek"
+
+#: coff/base/coff_object.cpp:132
+#, fuzzy
+msgid "Register Variable"
+msgstr "regiszterek"
+
+#: libgui/editor_manager.cpp:489 libgui/watch_view.cpp:48
+#: libgui/project_manager_ui.cpp:127
+msgid "Registers"
+msgstr "regiszterek"
+
+#: devices/pic/gui/pic_register_view.cpp:273
+msgid "Registers information not available."
+msgstr ""
+
+#: coff/base/coff_object.cpp:248
+msgid "Relocation address beyong section size: %1/%2"
+msgstr ""
+
+#: coff/base/coff_object.cpp:251
+msgid "Relocation has unknown symbol: %1"
+msgstr ""
+
+#: coff/base/coff_object.cpp:255
+msgid "Relocation is an auxiliary symbol: %1"
+msgstr ""
+
+#: common/gui/editlistbox.cpp:131
+msgid "Remove All"
+msgstr "Minden elmozgatás"
+
+#: libgui/project_manager.cpp:208
+msgid "Remove From Project"
+msgstr "Törlés a projektből"
+
+#: libgui/breakpoint_view.cpp:24
+msgid "Remove breakpoint"
+msgstr "Töréspont eltávolítás"
+
+#: tools/list/compile_process.cpp:28
+msgid "Replaced by \"xxx\" when \"wine\" is used."
+msgstr ""
+
+#: tools/list/compile_process.cpp:29
+msgid "Replaced by \"xxx\" when the device name is specified."
+msgstr ""
+
+#: tools/list/compile_process.cpp:27
+msgid "Replaced by \"xxx\" when there is a custom linker script."
+msgstr ""
+
+#: tools/list/compile_process.cpp:45
+msgid "Replaced by a separation into two arguments."
+msgstr ""
+
+#: tools/list/compile_process.cpp:34
+msgid "Replaced by the COFF filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:39
+msgid "Replaced by the device family name (when needed)."
+msgstr ""
+
+#: tools/list/compile_process.cpp:38
+msgid "Replaced by the device name."
+msgstr ""
+
+#: tools/list/compile_process.cpp:43
+msgid "Replaced by the linker script basename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:44
+msgid "Replaced by the linker script filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:42
+msgid "Replaced by the linker script path."
+msgstr ""
+
+#: tools/list/compile_process.cpp:37
+msgid "Replaced by the list filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:31
+msgid "Replaced by the list of additionnal libraries."
+msgstr ""
+
+#: tools/list/compile_process.cpp:30
+msgid "Replaced by the list of additionnal objects."
+msgstr ""
+
+#: tools/list/compile_process.cpp:35
+msgid "Replaced by the map filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:41
+msgid "Replaced by the object file name."
+msgstr ""
+
+#: tools/list/compile_process.cpp:32
+msgid "Replaced by the output filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:33
+msgid "Replaced by the project name."
+msgstr ""
+
+#: tools/list/compile_process.cpp:40
+msgid "Replaced by the relative input filepath(s)."
+msgstr ""
+
+#: tools/list/compile_process.cpp:26
+msgid "Replaced by the source directory."
+msgstr ""
+
+#: tools/list/compile_process.cpp:36
+msgid "Replaced by the symbol filename."
+msgstr ""
+
+#: libgui/toplevel.cpp:325
+msgid "Report Bug..."
+msgstr ""
+
+#: libgui/likeback.cpp:182
+msgid "Report a bug."
+msgstr ""
+
+#: libgui/device_gui.cpp:99
+#, fuzzy
+msgid "Reset Filters"
+msgstr "Válassz fájlt"
+
+#: devices/pic/prog/pic_prog_specific.cpp:23
+msgid "Reset Held"
+msgstr "Reset Held"
+
+#: devices/pic/prog/pic_prog_specific.cpp:23
+msgid "Reset Released"
+msgstr "Reset Released"
+
+#: devices/pic/base/pic_config.cpp:194
+msgid "Reset into clip on emulation mode"
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:193
+msgid "Reset.<Translators: please translate the past form of the verb>"
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:196
+#, fuzzy
+msgid "Restarting..."
+msgstr "Restart..."
+
+#: progs/icd1/gui/icd1_group_ui.cpp:20
+msgid "Result:"
+msgstr "Eredmény:"
+
+#: piklab-hex/main.cpp:29
+msgid "Return checksum."
+msgstr ""
+
+#: piklab-coff/main.cpp:25
+#, fuzzy
+msgid "Return general informations."
+msgstr "General Configuration"
+
+#: piklab-hex/main.cpp:26
+msgid "Return information about hex file."
+msgstr ""
+
+#: piklab-coff/main.cpp:29
+#, fuzzy
+msgid "Return informations about code lines (for object)."
+msgstr "nem tudom megnyitni a coff fájlt."
+
+#: piklab-coff/main.cpp:30
+#, fuzzy
+msgid "Return informations about files."
+msgstr "nem tudom megnyitni a coff fájlt."
+
+#: piklab-coff/main.cpp:28
+#, fuzzy
+msgid "Return informations about sections (for object)."
+msgstr "nem tudom megnyitni a coff fájlt."
+
+#: piklab-coff/main.cpp:27
+#, fuzzy
+msgid "Return informations about symbols."
+msgstr "nem tudom megnyitni a coff fájlt."
+
+#: piklab-coff/main.cpp:26
+#, fuzzy
+msgid "Return informations about variables (for object)."
+msgstr "nem tudom megnyitni a coff fájlt."
+
+#: piklab-prog/cli_interactive.cpp:57
+msgid "Return the list of detected ports."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:58
+msgid "Return the list of memory ranges."
+msgstr ""
+
+#: common/cli/cli_main.cpp:52
+msgid "Return the list of recognized commands."
+msgstr ""
+
+#: piklab-hex/main.cpp:38 piklab-prog/cli_interactive.cpp:55
+#: piklab-coff/main.cpp:38
+msgid "Return the list of supported devices."
+msgstr ""
+
+#: piklab-hex/main.cpp:39
+#, fuzzy
+msgid "Return the list of supported fill options."
+msgstr "Támogatott HEX-formátum:"
+
+#: piklab-prog/cli_interactive.cpp:56
+#, fuzzy
+msgid "Return the list of supported hex file formats."
+msgstr "Támogatott HEX-formátum:"
+
+#: piklab-prog/cli_interactive.cpp:54
+#, fuzzy
+msgid "Return the list of supported programmer hardware configurations."
+msgstr "Támogatott HEX-formátum:"
+
+#: piklab-prog/cli_interactive.cpp:53
+msgid "Return the list of supported programmers."
+msgstr ""
+
+#: coff/base/coff_object.cpp:331
+msgid "Rom Data"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:37
+msgid "Run device (release reset)."
+msgstr "Reseteld az eszközt."
+
+#: progs/base/prog_config.cpp:77
+#, fuzzy
+msgid "Run device after successful programming."
+msgstr "Hex file to be used for programming."
+
+#: progs/base/generic_prog.cpp:224
+msgid "Run..."
+msgstr "Start..."
+
+#: devices/pic/prog/pic_prog_specific.cpp:19
+msgid "Running"
+msgstr "Fut"
+
+#: progs/manager/debug_manager.cpp:240 progs/base/generic_prog.cpp:221
+msgid "Running..."
+msgstr "Fut..."
+
+#: coff/base/cdb_parser.cpp:38
+msgid "SBIT"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:57
+msgid "SBIT Space"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:78
+msgid "SBODEN controls BOD function"
+msgstr ""
+
+#: progs/sdcdb/base/sdcdb_debug.h:76
+msgid "SDCDB"
+msgstr ""
+
+#: devices/base/generic_device.cpp:47
+msgid "SDIP"
+msgstr "SDIP"
+
+#: coff/base/cdb_parser.cpp:56
+msgid "SFR Space"
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:41
+msgid "SFRs"
+msgstr "SFRs"
+
+#: devices/base/generic_device.cpp:53
+msgid "SOIC"
+msgstr "SOIC"
+
+#: devices/base/generic_device.cpp:49
+msgid "SOT-23"
+msgstr "SOT-23"
+
+#: devices/base/generic_device.cpp:48
+#, fuzzy
+msgid "SPDIP"
+msgstr "PDIP"
+
+#: devices/base/generic_device.cpp:51
+msgid "SSOP"
+msgstr "SSOP"
+
+#: devices/pic/base/pic.cpp:73
+#, fuzzy
+msgid "SSP"
+msgstr "SSOP"
+
+#: devices/pic/base/pic_config.cpp:122
+msgid "SSP I/O mux (SCK/SLC, SDA/SDI, SD0)"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:62
+msgid "Same as \"device\"."
+msgstr ""
+
+#: libgui/toplevel.cpp:190
+msgid "Save All"
+msgstr "Összes mentése"
+
+#: libgui/editor.cpp:53
+msgid "Save File"
+msgstr "Fájl mentés"
+
+#: libgui/log_view.cpp:132
+msgid "Save log to file"
+msgstr ""
+
+#: piklab-hex/main.cpp:94
+#, fuzzy
+msgid "Second hex file: "
+msgstr "második hex fájl"
+
+#: devices/pic/base/pic_config.cpp:253
+msgid "Secondary oscillator (LP)"
+msgstr ""
+
+#: coff/base/coff_object.cpp:55 coff/base/coff_object.cpp:155
+#, fuzzy
+msgid "Section"
+msgstr ""
+"\n"
+"Beállítások:\n"
+
+#: piklab-coff/main.cpp:164
+#, fuzzy
+msgid "Sections:"
+msgstr ""
+"\n"
+"Beállítások:\n"
+
+#: devices/pic/base/pic_protection.cpp:357
+msgid "Secure Segment"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:240
+#, fuzzy
+msgid "Secure segment EEPROM size"
+msgstr "Boot Block Méret"
+
+#: devices/pic/base/pic_config.cpp:241
+msgid "Secure segment RAM size"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:237
+msgid "Secure segment security"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:236
+msgid "Secure segment size"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:235
+#, fuzzy
+msgid "Secure segment write-protection"
+msgstr "Code write-protection"
+
+#: libgui/project_manager.cpp:222
+msgid "Select Device..."
+msgstr "Válassz eszközt..."
+
+#: common/gui/purl_gui.cpp:118
+msgid "Select Directory"
+msgstr "Válassz könyvtárat"
+
+#: common/gui/purl_gui.cpp:147
+msgid "Select File"
+msgstr "Válassz fájlt"
+
+#: libgui/project_wizard.cpp:89
+msgid "Select Files"
+msgstr "Válassz fájlt"
+
+#: libgui/project_manager.cpp:170
+msgid "Select Linker Script"
+msgstr "Válassz Linker Scriptet"
+
+#: libgui/project_manager.cpp:298
+msgid "Select Object File"
+msgstr "Válassz object fájlt"
+
+#: libgui/project_manager.cpp:335
+msgid "Select Project file"
+msgstr "Válassz projektfájlt"
+
+#: libgui/project_manager.cpp:289
+msgid "Select Source File"
+msgstr "Válassz forrásfájlt"
+
+#: libgui/device_gui.cpp:87
+msgid "Select a device"
+msgstr "Válassz eszközt"
+
+#: devices/pic/base/pic.cpp:83
+#, fuzzy
+msgid "Self-Write"
+msgstr "Önteszt"
+
+#: progs/gui/prog_group_ui.cpp:85
+msgid "Self-test"
+msgstr "Önteszt"
+
+#: progs/icd2/base/icd2_prog.cpp:56
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:105
+msgid "Self-test failed (%1). Do you want to continue anyway?"
+msgstr "Önteszt hibás (%1).Folytassam?"
+
+#: progs/icd1/base/icd1.cpp:109
+msgid "Self-test failed (returned value is %1)"
+msgstr "Önteszt hibás (visszatérési érték: %1)"
+
+#: progs/icd1/base/icd1_prog.cpp:29
+msgid "Self-test failed. Do you want to continue anyway?"
+msgstr "Önteszt hibás. Folytassam?"
+
+#: progs/icd2/base/icd2_prog.cpp:55
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:104
+msgid "Self-test failed: %1"
+msgstr "Önteszt hibás: (%1)"
+
+#: libgui/likeback.cpp:582
+msgid "Send"
+msgstr "Send"
+
+#: progs/direct/gui/direct_config_widget.cpp:78
+#: progs/direct/gui/direct_config_widget.cpp:98
+msgid "Send 0xA55A"
+msgstr "Send 0xA55A"
+
+#: libgui/likeback.cpp:609
+msgid "Send a Comment"
+msgstr ""
+
+#: libgui/likeback.cpp:181
+msgid "Send a comment about what you don't like."
+msgstr ""
+
+#: libgui/likeback.cpp:180
+msgid "Send a comment about what you like."
+msgstr ""
+
+#: progs/gui/port_selector.cpp:21
+msgid "Serial"
+msgstr "Soros"
+
+#: devices/mem24/mem24/mem24_group.h:25
+msgid "Serial Memory 24"
+msgstr ""
+
+#: common/port/port.cpp:61
+msgid "Serial Port"
+msgstr "Soros port"
+
+#: libgui/project_manager.cpp:166
+msgid "Set Custom..."
+msgstr "Set Custom..."
+
+#: libgui/project_manager.cpp:167
+msgid "Set Default"
+msgstr "Set Default"
+
+#: libgui/likeback.cpp:393
+msgid "Set Email Address"
+msgstr ""
+
+#: libgui/global_config.cpp:22
+msgid "Set User Ids to unprotected checksum (if User Ids are empty)."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:46
+msgid "Set a breakpoint \"break e 0x04\" or list all breakpoints \"break\"."
+msgstr ""
+
+#: libgui/breakpoint_view.cpp:24
+msgid "Set breakpoint"
+msgstr "Töréspont beállítás"
+
+#: piklab-prog/cli_interactive.cpp:59
+#, fuzzy
+msgid "Set if target device is self-powered."
+msgstr "  Az eszköz saját maga adja a tápot: %1"
+
+#: piklab-prog/cli_interactive.cpp:39
+msgid "Set property value: \"set <property> <value>\" or \"<property> <value>\"."
+msgstr ""
+
+#: devices/pic/gui/pic_memory_editor.cpp:319
+#: devices/pic/gui/pic_memory_editor.cpp:331
+msgid "Set to unprotected checksum"
+msgstr ""
+
+#: progs/base/generic_debug.cpp:43
+msgid "Setting up debugging session."
+msgstr ""
+
+#: libgui/toplevel.cpp:280 libgui/toplevel.cpp:304
+#, fuzzy
+msgid "Settings..."
+msgstr "Keresem ..."
+
+#: coff/base/cdb_parser.cpp:34 coff/base/coff_object.cpp:161
+#, fuzzy
+msgid "Short"
+msgstr "USB Port"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:850
+msgid "Show %1 specific options"
+msgstr "Show %1 specific options"
+
+#: libgui/toplevel.cpp:300
+msgid "Show Program Counter"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:857
+msgid "Show all options"
+msgstr "Minden beállítást mutass"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:858
+msgid "Show author information"
+msgstr "Mutass a készítőről infót "
+
+#: libgui/global_config.cpp:23
+msgid "Show close buttons on tabs (need restart to take effect)."
+msgstr ""
+
+#: libgui/toplevel.cpp:214
+#, fuzzy
+msgid "Show disassembly location"
+msgstr "Disassembly Listing"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:842
+msgid "Show help about options"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:860
+msgid "Show license information"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:859
+msgid "Show version information"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:43
+#, fuzzy
+msgid "Signed"
+msgstr "Send"
+
+#: tools/sdcc/sdcc.h:35
+msgid "Small Device C Compiler"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:189
+msgid "Software"
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:28
+msgid ""
+"Some programming cards need low clock rate:\n"
+"adding delay to clock pulses might help."
+msgstr ""
+
+#: tools/base/generic_tool.cpp:34
+msgid "Source Directory"
+msgstr ""
+
+#: piklab-coff/main.cpp:175
+#, fuzzy
+msgid "Source Lines:"
+msgstr "Forrás"
+
+#: libgui/project_manager.cpp:217 libgui/project_manager_ui.cpp:34
+msgid "Sources"
+msgstr "Forrás"
+
+#: piklab-prog/cli_interactive.cpp:248
+msgid "Special Function Registers:"
+msgstr "Special Function Registers:"
+
+#: progs/gui/prog_config_center.cpp:65
+msgid "Specific"
+msgstr "Speciális"
+
+#: devices/pic/base/pic_config.cpp:101
+msgid "Stack full/underflow reset"
+msgstr ""
+
+#: libgui/project_manager.cpp:185 libgui/config_center.h:53
+#: libgui/project_manager_ui.cpp:63
+msgid "Standalone File"
+msgstr ""
+
+#: libgui/config_center.h:54
+msgid "Standalone File Compilation"
+msgstr "Standalone File Compilation"
+
+#: devices/pic/base/pic_config.cpp:232 devices/pic/base/pic_config.cpp:239
+#, fuzzy
+msgid "Standard Security"
+msgstr "Alapművelet"
+
+#: devices/pic/base/pic_config.cpp:115
+msgid "Standard operation"
+msgstr "Alapművelet"
+
+#: devices/pic/base/pic_config.cpp:246
+#, fuzzy
+msgid "Standard security"
+msgstr "Alapművelet"
+
+#: piklab-prog/cli_interactive.cpp:43
+msgid "Start or restart debugging session."
+msgstr ""
+
+#: piklab-hex/main.cpp:140
+msgid "Start:"
+msgstr "Start:"
+
+#: piklab-prog/cli_prog_manager.cpp:61
+#, fuzzy
+msgid "Starting debug session without COFF file (no source file information)."
+msgstr "Nem tudom indítani a hibakeresőt bemeneti fájl nélkül(nem beállított)."
+
+#: piklab-prog/cli_prog_manager.cpp:62
+msgid "Starting debugging session with device memory in an unknown state. You may want to reprogram the device."
+msgstr ""
+
+#: coff/base/coff_object.cpp:131
+msgid "Static Symbol"
+msgstr ""
+
+#: devices/base/device_group.cpp:228 libgui/breakpoint_view.cpp:47
+msgid "Status"
+msgstr "Státusz"
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:21
+msgid "Status:"
+msgstr "Státusz:"
+
+#: progs/manager/debug_manager.cpp:302
+#, fuzzy
+msgid "Step"
+msgstr "&Lépés"
+
+#: piklab-prog/cli_interactive.cpp:44
+msgid "Step one instruction."
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:224
+msgid "Stop Watching"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:39
+msgid "Stop device (hold reset)."
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:19
+msgid "Stopped"
+msgstr "megállt"
+
+#: progs/manager/prog_manager.cpp:155 progs/manager/prog_manager.cpp:175
+#, fuzzy
+msgid "Stopped."
+msgstr "megállt"
+
+#: common/common/number.cpp:23
+msgid "String"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:19 coff/base/cdb_parser.cpp:37
+#: coff/base/coff_object.cpp:166
+msgid "Structure"
+msgstr ""
+
+#: coff/base/coff_object.cpp:138
+msgid "Structure Tag"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:85
+msgid "Subroutine to initialize W registers to 0x0000"
+msgstr ""
+
+#: common/global/about.cpp:88
+msgid "Support for direct programmers with bidirectionnal buffers."
+msgstr ""
+
+#: devices/base/device_group.cpp:36
+msgid "Supported"
+msgstr "Támogatott"
+
+#: common/cli/cli_main.cpp:93
+msgid "Supported commands:"
+msgstr "Támogatott parancsok:"
+
+#: piklab-prog/cmdline.cpp:115
+msgid "Supported devices for \"%1\":"
+msgstr "Támogatott eszközök: \"%1\":"
+
+#: piklab-hex/main.cpp:264 piklab-prog/cmdline.cpp:112
+#: piklab-coff/main.cpp:265
+msgid "Supported devices:"
+msgstr "Támogatott eszközök:"
+
+#: piklab-prog/cmdline.cpp:92
+#, fuzzy
+msgid "Supported hardware configuration for programmers:"
+msgstr "Támogatott programozók:"
+
+#: piklab-prog/cmdline.cpp:75
+msgid "Supported hex file formats:"
+msgstr "Támogatott HEX-formátum:"
+
+#: piklab-prog/cmdline.cpp:83
+msgid "Supported programmers:"
+msgstr "Támogatott programozók:"
+
+#: libgui/toplevel.cpp:208
+msgid "Switch Header/Implementation"
+msgstr ""
+
+#: libgui/editor_manager.cpp:37
+msgid "Switch to editor"
+msgstr ""
+
+#: libgui/toplevel.cpp:206
+msgid "Switch to..."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:137
+msgid "Switching off, monitor off"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:138
+msgid "Switching on, monitor off"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:139
+msgid "Switching on, monitor on"
+msgstr ""
+
+#: coff/base/coff_object.cpp:215
+msgid "Symbol without needed auxilliary symbol (type=%1)"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:124 piklab-coff/main.cpp:154
+msgid "Symbols:"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:191
+#, fuzzy
+msgid "T0CKI interrupt service routine"
+msgstr "megszakítás beállító rutin"
+
+#: devices/pic/base/pic_config.cpp:117
+msgid "T1OSO/T1CKI on RA6"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:118
+msgid "T1OSO/T1CKI on RB2"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:185
+#, fuzzy
+msgid "TIMER0 interrupt service routine"
+msgstr "megszakítás beállító rutin"
+
+#: devices/pic/base/pic_config.cpp:119
+msgid "TMR0/T5CKI external clock mux"
+msgstr ""
+
+#: devices/base/generic_device.cpp:54
+msgid "TQFP"
+msgstr "TQFP"
+
+#: devices/base/generic_device.cpp:52
+msgid "TSSOP"
+msgstr "TSSOP"
+
+#: devices/pic/base/pic_config.cpp:30
+msgid "Table read-protection"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:28
+msgid "Tait 7405/7406"
+msgstr "Tait 7405/7406"
+
+#: progs/direct/base/direct_prog_config.cpp:26
+msgid "Tait classic"
+msgstr "Tait classic"
+
+#: devices/pic/prog/pic_prog_specific.cpp:15 progs/icd2/base/icd2.cpp:51
+msgid "Target Vdd"
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:15
+msgid "Target Vpp"
+msgstr ""
+
+#: piklab-hex/main.cpp:38 piklab-prog/cli_interactive.cpp:55
+#: piklab-coff/main.cpp:38
+msgid "Target device."
+msgstr ""
+
+#: progs/base/prog_config.cpp:73
+msgid "Target is self-powered (when possible)."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:261
+#, fuzzy
+msgid "Temperature protection"
+msgstr "Hőmérséklet határ: "
+
+#: devices/base/device_group.cpp:291
+msgid "Temperature range: "
+msgstr "Hőmérséklet határ: "
+
+#: libgui/config_gen.cpp:179
+msgid "Template Generator"
+msgstr ""
+
+#: coff/base/disassembler.cpp:278
+msgid "Template source file generated by piklab"
+msgstr ""
+
+#: libgui/project_wizard.cpp:234
+msgid "Template source file generation not implemented yet for this toolchain..."
+msgstr ""
+
+#: libgui/project_wizard.cpp:240
+msgid "Template source file generation only partially implemented."
+msgstr ""
+
+#: common/global/about.cpp:91
+msgid "Test of PICkit2 and ICD2 programmer."
+msgstr "PICkit2 és ICD2 Programozó teszt."
+
+#: common/common/group.cpp:15
+#, fuzzy
+msgid "Tested"
+msgstr "Reset Held"
+
+#: tools/pic30/pic30.cpp:63
+msgid "The <a href=\"%1\">PIC30 ToolChain</a> is a toolsuite for 16-bit PICs available from Microchip. Most of it is available under the GNU Public License."
+msgstr ""
+
+#: tools/sdcc/sdcc.cpp:28
+msgid "The <a href=\"%1\">Small Devices C Compiler</a> is an open-source C compiler for several families of microcontrollers."
+msgstr ""
+
+#: tools/boost/boost.cpp:68
+msgid "The Boost toolchain needs to be run by Wine with \"Windows NT 4.0\" compatibility. This can be configured with the Wine configuration utility."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:31
+msgid "The CLOCK pin is used to synchronize serial data of the DATA IN and DATA OUT pins."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:37
+msgid "The DATA IN pin is used to receive data from the programmed device."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:34
+msgid "The DATA OUT pin is used to send data to the programmed device."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:40
+msgid ""
+"The DATA RW pin selects the direction of data buffer.\n"
+"Must be set to GND if your programmer does not use bi-directionnal buffer."
+msgstr ""
+
+#: libgui/toplevel.cpp:731
+msgid "The Pikloops utility (%1) is not installed in your system."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:28
+msgid ""
+"The VDD pin is used to apply 5V to the programmed device.\n"
+"Must be set to GND if your programmer doesn't control the VDD line."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:25
+msgid "The VPP pin is used to select the high voltage programming mode."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:675
+msgid "The calibration word %1 is not valid."
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:65
+msgid "The current programmer \"%1\" does not support device \"%2\"."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:662
+msgid "The device cannot be erased first by the selected programmer so programming may fail..."
+msgstr ""
+
+#: libgui/gui_prog_manager.cpp:38
+msgid "The device memory is in an unknown state. You may want to reprogram the device. Continue anyway?"
+msgstr ""
+
+#: libgui/likeback.cpp:396
+msgid "The email address is optional. If you do not provide any, your comments will be sent anonymously. Just click OK in that case."
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:1313
+msgid "The files/URLs opened by the application will be deleted after use"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:142
+msgid ""
+"The firmware version (%1) is higher than the version tested with piklab (%2%3).\n"
+"You may experience problems."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:158
+msgid ""
+"The firmware version (%1) is lower than the recommended version (%2%3).\n"
+"It is recommended to upgrade the firmware."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:150
+msgid ""
+"The firmware version (%1) is lower than the version tested with piklab (%2%3).\n"
+"You may experience problems."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:167
+msgid "The first argument should be \"e\"."
+msgstr ""
+
+#: piklab-hex/main.cpp:170
+msgid "The first hex file is a subset of the second one."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:299
+msgid "The given value is too large (max: %1)."
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:71
+msgid "The hardware name is already used for a standard hardware."
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:113
+msgid "The number of active breakpoints is higher than the maximum for the current debugger (%1): disabling the last breakpoint."
+msgstr ""
+
+#: libgui/toplevel.cpp:904
+#, fuzzy
+msgid "The project hex file may not be up-to-date since some project files have been modified."
+msgstr "<qt>A project hex fájl régebbi mint a programfájl. Folytassam ?</qt>"
+
+#: devices/pic/prog/pic_prog.cpp:650
+msgid "The range cannot be erased first by the selected programmer so programming may fail..."
+msgstr ""
+
+#: piklab-hex/main.cpp:171
+msgid "The second hex file is a subset of the first one."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:335
+#, fuzzy
+msgid "The selected device \"%1\" is not supported by the selected programmer."
+msgstr "Az eszköz nem támogatott a kiválasztott fordítóban."
+
+#: libgui/register_view.cpp:45
+msgid "The selected device has no register."
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:101
+msgid "The selected device is not supported by this programmer."
+msgstr ""
+
+#: libgui/gui_prog_manager.cpp:29
+#, fuzzy
+msgid "The selected operation will stop the debugging session. Continue anyway?"
+msgstr "A választott fordítóprogram (%1) nem támogatja az eszközt %2. Folytassam?"
+
+#: devices/pic/prog/pic_prog.cpp:500
+msgid "The selected programmer cannot read %1: operation skipped."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:298
+msgid "The selected programmer cannot read device memory."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:486 devices/pic/prog/pic_prog.cpp:557
+msgid "The selected programmer cannot read the specified memory range."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:442
+msgid "The selected programmer does not support erasing neither the specified range nor the whole device."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:394
+msgid "The selected programmer does not support erasing the whole device."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:341
+msgid "The selected programmer does not supported the specified hardware configuration (\"%1\")."
+msgstr ""
+
+#: tools/list/compile_manager.cpp:135
+msgid "The selected toolchain (%1) cannot assemble file. It only supports files with extensions: %2"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:110
+msgid "The selected toolchain (%1) cannot compile file. It only supports files with extensions: %2"
+msgstr ""
+
+#: tools/base/tool_group.cpp:130
+msgid "The selected toolchain (%1) does not support device %2. Continue anyway?"
+msgstr "A választott fordítóprogram (%1) nem támogatja az eszközt %2. Folytassam?"
+
+#: libgui/project_wizard.cpp:206
+msgid "The selected toolchain can only compile a single source file and you have selected %1 source files. Continue anyway? "
+msgstr ""
+
+#: tools/list/compile_manager.cpp:72
+msgid "The selected toolchain only supports single-file project."
+msgstr ""
+
+#: libgui/device_editor.cpp:64
+msgid "The target device is not configured and cannot be guessed from source file. The source file either cannot be found or does not contain any processor directive."
+msgstr ""
+
+#: libgui/gui_debug_manager.cpp:88
+msgid "The toolchain in use does not generate all necessary debugging information with the selected device. This may reduce debugging capabilities."
+msgstr ""
+
+#: piklab-hex/main.cpp:172
+msgid "The two hex files are different at address %1."
+msgstr ""
+
+#: piklab-hex/main.cpp:169
+msgid "The two hex files have the same content."
+msgstr ""
+
+#: tools/base/tool_group.cpp:128
+msgid "There were errors detecting supported devices for the selected toolchain (%1). Please check the toolchain configuration. Continue anyway?"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:204
+#, fuzzy
+msgid "This command needs a commands filename."
+msgstr "Ez a parancs hex fájlnevet kér"
+
+#: piklab-prog/cli_interactive.cpp:216
+#, fuzzy
+msgid "This command needs an hex filename."
+msgstr "Ez a parancs hex fájlnevet kér"
+
+#: piklab-prog/cli_interactive.cpp:218
+#, fuzzy
+msgid "This command takes no argument."
+msgstr "Ez a parancs nem kér paramétert"
+
+#: piklab-prog/cli_interactive.cpp:128
+msgid "This command takes no or one argument"
+msgstr "Ez a parancs nem vagy egy paramétert kér"
+
+#: piklab-prog/cli_interactive.cpp:185
+#, fuzzy
+msgid "This command takes no or two argument."
+msgstr "Ez a parancs nem vagy két paramétert kér"
+
+#: piklab-prog/cli_interactive.cpp:139 piklab-prog/cli_interactive.cpp:143
+#: piklab-prog/cli_interactive.cpp:189
+#, fuzzy
+msgid "This command takes one argument."
+msgstr "Ez a parancs egy paramétert kér"
+
+#: piklab-prog/cli_interactive.cpp:150
+#, fuzzy
+msgid "This command takes one or two argument."
+msgstr "Ez a parancs egy vagy két paramétert kér"
+
+#: piklab-prog/cli_interactive.cpp:135
+#, fuzzy
+msgid "This command takes two arguments."
+msgstr "Ez a parancs két paramétert kér"
+
+#: progs/gui/prog_group_ui.cpp:100
+msgid "This device has no calibration information."
+msgstr ""
+
+#: libgui/likeback.cpp:174
+msgid "This is a quick feedback system for %1."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:645
+msgid "This memory range is programming protected."
+msgstr "Ez a memóriarész írásvédett."
+
+#: progs/direct/base/direct.cpp:38
+msgid ""
+"This pin is driven by the programmed device.\n"
+"Without device, it must follow the \"Data out\" pin (when powered on)."
+msgstr ""
+
+#: common/nokde/nokde_kaboutdata.cpp:437
+msgid "This program is distributed under the terms of the %1."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:77
+msgid "This programmer pulses MCLR from 5V to 0V and then 12V to enter programming mode. It uses a multiplexer to switch between 5V and 12V (Vdd is here the multiplexer pin).<p>Webpage: <a href=\"http://www.epemag.wimborne.co.uk/1001.htm\">http://www.epemag.wimborne.co.uk/1001.htm</a>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:272
+msgid "This tool cannot be automatically detected."
+msgstr ""
+
+#: libgui/config_gen.cpp:119
+msgid "This toolchain does not need explicit config bits."
+msgstr ""
+
+#: progs/pickit2/base/pickit_prog.cpp:49
+msgid "This will overwrite the device code memory. Continue anyway?"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:161
+#: tools/gui/toolchain_config_widget.cpp:178
+msgid "Timeout"
+msgstr "Időtullépés."
+
+#: progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp:30
+#, fuzzy
+msgid "Timeout (ms):"
+msgstr "Időtullépés."
+
+#: common/port/serial.cpp:280
+msgid "Timeout receiving data (%1/%2 bytes received)."
+msgstr ""
+
+#: common/port/serial.cpp:306
+msgid "Timeout sending data (%1 bytes left)."
+msgstr ""
+
+#: common/port/serial.cpp:235
+msgid "Timeout sending data (%1/%2 bytes sent)."
+msgstr ""
+
+#: progs/icd1/base/icd1_serial.cpp:51
+msgid "Timeout synchronizing."
+msgstr ""
+
+#: progs/gpsim/base/gpsim.cpp:72
+msgid "Timeout waiting for \"gpsim\"."
+msgstr ""
+
+#: common/port/serial.cpp:265
+msgid "Timeout waiting for data."
+msgstr ""
+
+#: progs/direct/base/direct_mem24.cpp:125
+msgid "Timeout writing at address %1"
+msgstr ""
+
+#: common/port/usb_port.cpp:394
+msgid "Timeout: only some data received (%1/%2 bytes)."
+msgstr ""
+
+#: common/port/usb_port.cpp:360
+msgid "Timeout: only some data sent (%1/%2 bytes)."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:144
+msgid "Timer1"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:95
+msgid "Timer1 interrupt service routine"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:114
+msgid "Timer1 oscillator mode"
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader_prog.h:31
+#, fuzzy
+msgid "Tiny Bootloader"
+msgstr "Bootloader"
+
+#: libgui/likeback.cpp:175
+msgid "To help us improve it, your comments are important."
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:140
+msgid "Toggle Device Power..."
+msgstr ""
+
+#: piklab-hex/main.cpp:72 piklab-coff/main.cpp:61
+msgid "Too few arguments."
+msgstr "Túl kevés paraméter."
+
+#: piklab-hex/main.cpp:73 piklab-prog/cli_interactive.cpp:214
+#: piklab-prog/cli_interactive.cpp:217 piklab-prog/cmdline.cpp:215
+#: piklab-coff/main.cpp:62
+msgid "Too many arguments."
+msgstr "Túl sok paraméter."
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:145
+#, fuzzy
+msgid "Too many failures: bailing out."
+msgstr "Túl sok paraméter."
+
+#: libgui/project_editor.cpp:56
+#, fuzzy
+msgid "Toochain"
+msgstr "<Fordítóprogram>"
+
+#: libgui/config_gen.cpp:48
+msgid "Tool Type:"
+msgstr ""
+
+#: libgui/toplevel.cpp:216
+msgid "Tool Views"
+msgstr ""
+
+#: tools/list/tools_config_widget.cpp:45 libgui/config_gen.cpp:39
+#: libgui/project_wizard.cpp:134
+msgid "Toolchain:"
+msgstr ""
+
+#: tools/list/device_info.cpp:51
+msgid "Tools"
+msgstr ""
+
+#: libgui/likeback.cpp:657
+msgid "Transfer Error"
+msgstr "Átviteli hiba"
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:23
+#, fuzzy
+msgid "Trying to enter bootloader mode..."
+msgstr "Programmer is in bootload mode."
+
+#: coff/base/coff_object.cpp:141
+msgid "Type Definition"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:76
+msgid "USART"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:75 progs/gui/port_selector.cpp:21
+msgid "USB"
+msgstr "USB"
+
+#: common/port/port.cpp:63
+msgid "USB Port"
+msgstr "USB Port"
+
+#: progs/picdem_bootloader/gui/picdem_bootloader_ui.cpp:25
+#, fuzzy
+msgid "USB Product Id:"
+msgstr "USB Port"
+
+#: progs/picdem_bootloader/gui/picdem_bootloader_ui.cpp:19
+msgid "USB Vendor Id:"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:197
+msgid "USB clock (PLL divided by)"
+msgstr ""
+
+#: common/port/usb_port.cpp:266
+#, fuzzy
+msgid "USB support disabled"
+msgstr " Nem tudom azonosítani a portot"
+
+#: common/global/about.cpp:90
+msgid "USB support for ICD2 programmer."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:127
+msgid "USB voltage regulator"
+msgstr "USB feszültség-stabilizátor"
+
+#: devices/pic/base/pic_config.cpp:85
+msgid "Undefined"
+msgstr ""
+
+#: coff/base/coff_object.cpp:135
+msgid "Undefined Label"
+msgstr ""
+
+#: coff/base/coff_object.cpp:123
+msgid "Undefined Section"
+msgstr ""
+
+#: coff/base/coff_object.cpp:142
+msgid "Undefined Static"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:173
+msgid "Unexpected answer ($7F00) from ICD2 (%1)."
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:180
+msgid "Unexpected answer (08) from ICD2 (%1)."
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:674
+msgid "Unexpected argument '%1'."
+msgstr ""
+
+#: devices/base/hex_buffer.cpp:140
+msgid "Unexpected end-of-file."
+msgstr ""
+
+#: devices/base/hex_buffer.cpp:141
+msgid "Unexpected end-of-line (line %1)."
+msgstr ""
+
+#: coff/base/coff_object.cpp:329
+#, fuzzy
+msgid "Uninitialized Data"
+msgstr "PCLATH induló érték"
+
+#: coff/base/coff_object.cpp:167
+#, fuzzy
+msgid "Union"
+msgstr "Ismeretlen"
+
+#: coff/base/coff_object.cpp:140
+msgid "Union Tag"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:57
+msgid "Unitialized variables in X-space"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:61
+msgid "Unitialized variables in Y-space"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:65
+msgid "Unitialized variables in near data memory"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:25
+msgid "Unix"
+msgstr "Unix"
+
+#: tools/gui/toolchain_config_widget.cpp:225
+#: devices/base/generic_device.cpp:21 coff/base/text_coff.cpp:256
+msgid "Unknown"
+msgstr "Ismeretlen"
+
+#: common/common/purl_base.cpp:57
+msgid "Unknown File"
+msgstr "Ismeretlen fájl"
+
+#: common/cli/cli_main.cpp:29
+msgid "Unknown command: %1"
+msgstr "Ismeretlen utasítás %1 ."
+
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:47
+#, fuzzy
+msgid "Unknown device"
+msgstr "Ismeretlen eszköz."
+
+#: piklab-hex/main.cpp:223 piklab-prog/cmdline.cpp:364
+#: piklab-coff/main.cpp:238
+msgid "Unknown device \"%1\"."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:278
+msgid "Unknown device."
+msgstr "Ismeretlen eszköz."
+
+#: coff/base/coff_archive.cpp:92
+#, fuzzy
+msgid "Unknown file member offset: %1"
+msgstr "Hex file format:"
+
+#: piklab-prog/cmdline.cpp:379
+#, fuzzy
+msgid "Unknown hex file format \"%1\"."
+msgstr "Hex file format:"
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:84
+msgid "Unknown id returned by bootloader (%1 read and %2 expected)."
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:521
+#: common/nokde/nokde_kcmdlineargs.cpp:537
+msgid "Unknown option '%1'."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:353
+msgid "Unknown programmer \"%1\"."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:397 piklab-prog/cmdline.cpp:445
+msgid "Unknown property \"%1\""
+msgstr ""
+
+#: piklab-hex/main.cpp:235 piklab-hex/main.cpp:248 piklab-coff/main.cpp:241
+#: piklab-coff/main.cpp:250
+#, fuzzy
+msgid "Unknown property \"%1\"."
+msgstr "Hex file format:"
+
+#: piklab-prog/cli_interactive.cpp:307
+msgid "Unknown register or variable name."
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:221 progs/sdcdb/base/sdcdb_debug.cpp:220
+msgid "Unknown state for IO bit: %1 (%2)"
+msgstr ""
+
+#: piklab-hex/main.cpp:183
+msgid "Unprotected checksum: %1"
+msgstr ""
+
+#: devices/base/hex_buffer.cpp:139
+msgid "Unrecognized format (line %1)."
+msgstr "nem értelmezhető formátum  (%1 sorban)."
+
+#: coff/base/cdb_parser.cpp:86
+#, fuzzy
+msgid "Unrecognized record"
+msgstr "nem értelmezhető formátum  (%1 sorban)."
+
+#: piklab-prog/cli_interactive.cpp:40
+msgid "Unset property value: \"unset <property>\"."
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:44
+msgid "Unsigned"
+msgstr ""
+
+#: coff/base/coff_object.cpp:170
+msgid "Unsigned Char"
+msgstr ""
+
+#: coff/base/coff_object.cpp:172
+#, fuzzy
+msgid "Unsigned Int"
+msgstr "Pin assignment"
+
+#: coff/base/coff_object.cpp:173
+msgid "Unsigned Long"
+msgstr ""
+
+#: coff/base/coff_object.cpp:171
+msgid "Unsigned Short"
+msgstr ""
+
+#: devices/base/device_group.cpp:36
+msgid "Unsupported"
+msgstr "Ismeretlen"
+
+#: common/common/group.cpp:14
+#, fuzzy
+msgid "Untested"
+msgstr "Nem tesztelt"
+
+#: tools/gui/toolchain_config_center.cpp:27
+msgid "Update"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:51
+msgid "Upload firmware to programmer: \"upload_firmware <hexfilename>\"."
+msgstr ""
+
+#: progs/pickit2/base/pickit2_prog.cpp:65
+#, fuzzy
+msgid "Uploading Firmware..."
+msgstr " PICkit2 Firmware feltöltés..."
+
+#: piklab-prog/cmdline.cpp:321
+#, fuzzy
+msgid "Uploading firmware is not supported for the specified programmer."
+msgstr "A hibakeresést nem támogatja ez a programozó."
+
+#: progs/base/generic_prog.cpp:262
+#, fuzzy
+msgid "Uploading firmware..."
+msgstr " PICkit2 Firmware feltöltés..."
+
+#: progs/gui/prog_group_ui.cpp:67
+#, fuzzy
+msgid "Uploading..."
+msgstr "Olvasom..."
+
+#: coff/base/cdb_parser.cpp:30
+msgid "Upper-128-byte Pointer"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:838
+msgid "Usage: %1 %2\n"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:783
+msgid "Use --help to get a list of available command line options."
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:83
+msgid "Used Mask:"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:27 coff/base/coff_object.cpp:328
+msgid "User IDs"
+msgstr ""
+
+#: piklab-prog/cli_prog_manager.cpp:22
+msgid "Using port from configuration file."
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:73
+msgid "Value:"
+msgstr "Érték:"
+
+#: devices/pic/gui/pic_group_ui.cpp:68
+msgid "Variables"
+msgstr "Változók"
+
+#: tools/gputils/gputils_generator.cpp:58
+#: tools/gputils/gputils_generator.cpp:128
+#: tools/gputils/gputils_generator.cpp:208
+msgid "Variables declaration"
+msgstr "Változó értékadás"
+
+#: piklab-coff/main.cpp:146
+#, fuzzy
+msgid "Variables:"
+msgstr "Változók"
+
+#: devices/base/device_group.cpp:295
+msgid "Vdd (V)"
+msgstr "Vdd (V)"
+
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:102
+msgid "Vdd voltage level error; "
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:49
+msgid "Velleman K8048"
+msgstr "Velleman K8048"
+
+#: progs/base/prog_config.cpp:70
+#, fuzzy
+msgid "Verify device memory after programming."
+msgstr "Hex filename for programming."
+
+#: piklab-prog/cmdline.cpp:43
+msgid "Verify device memory: \"verify <hexfilename>\"."
+msgstr "Összehasonlítás: \"verify <hexfilename>\"."
+
+#: progs/base/generic_prog.cpp:379
+#, fuzzy
+msgid "Verifying successful."
+msgstr "Összehasonlítás kész"
+
+#: progs/base/generic_prog.cpp:34 progs/base/generic_prog.cpp:377
+msgid "Verifying..."
+msgstr "Összehasonlítás..."
+
+#: progs/icd2/gui/icd2_group_ui.cpp:31 progs/gui/prog_group_ui.cpp:68
+#: libgui/project_editor.cpp:41
+msgid "Version:"
+msgstr "Verzió:"
+
+#: libgui/project_manager_ui.cpp:34
+msgid "Views"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:35 coff/base/coff_object.cpp:159
+msgid "Void"
+msgstr ""
+
+#: libgui/device_gui.cpp:413
+msgid "Voltage-Frequency Graphs"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:79
+msgid "Voltages"
+msgstr "Feszültségek"
+
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:101
+msgid "Vpp voltage level error; "
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:90
+msgid "WDT post-scaler"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:81
+msgid "Wake-up reset"
+msgstr ""
+
+#: tools/gputils/gputils_config.cpp:13 tools/c18/c18_config.cpp:12
+msgid "Warning and errors"
+msgstr "Figyelmeztetés és hibák"
+
+#: tools/gputils/gui/gputils_ui.cpp:24 tools/c18/gui/c18_ui.cpp:23
+msgid "Warning level:"
+msgstr "Figyelmeztetési szint:"
+
+#: devices/pic/gui/pic_register_view.cpp:85
+#: devices/pic/gui/pic_register_view.cpp:224
+msgid "Watch"
+msgstr "Figyelt"
+
+#: libgui/watch_view.cpp:110
+msgid "Watch Register"
+msgstr " Figyelt Regiszter"
+
+#: libgui/toplevel.cpp:127
+#, fuzzy
+msgid "Watch View"
+msgstr "Watchdog timer"
+
+#: devices/pic/base/pic_config.cpp:188
+msgid "Watchdog"
+msgstr "Watchdog"
+
+#: devices/pic/base/pic_config.cpp:33
+msgid "Watchdog timer"
+msgstr "Watchdog timer"
+
+#: devices/pic/base/pic_config.cpp:267
+#, fuzzy
+msgid "Watchdog timer postscaler"
+msgstr "Watchdog timer"
+
+#: devices/pic/base/pic_config.cpp:266
+#, fuzzy
+msgid "Watchdog timer prescaler"
+msgstr "Watchdog timer"
+
+#: devices/pic/base/pic_config.cpp:186
+msgid "Watchdog timer prescaler A"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:187
+msgid "Watchdog timer prescaler B"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:106 devices/pic/base/pic_config.cpp:265
+msgid "Watchdog timer window"
+msgstr ""
+
+#: libgui/watch_view.cpp:87
+#, fuzzy
+msgid "Watched"
+msgstr "Figyelt"
+
+#: progs/direct/base/direct_prog_config.cpp:52
+msgid "Webpage: <a href=\"htpp://k9spud.com/hoodmicro\">htpp://k9spud.com/hoodmicro</a>"
+msgstr ""
+
+#: libgui/likeback.cpp:95
+msgid "What's &This?"
+msgstr "Mi ez &itt?"
+
+#: tools/base/generic_tool.cpp:26
+msgid "Windows"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:88
+msgid "Write Mask:"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:48
+msgid "Write and read raw commands to port from given file."
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:181 progs/sdcdb/base/sdcdb_debug.cpp:180
+msgid "Writing PC is not supported by gpsim"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:161 progs/sdcdb/base/sdcdb_debug.cpp:160
+msgid "Writing registers is not supported by this version of gpsim"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:33
+msgid "Wrong format for file size \"%1\"."
+msgstr ""
+
+#: progs/psp/base/psp.cpp:174
+msgid "Wrong programmer connected"
+msgstr "Rossz programozó lett csatlakoztatva"
+
+#: progs/icd2/base/icd2.cpp:224
+msgid "Wrong return value (\"%1\"; was expecting \"%2\")"
+msgstr "Rossz visszatérési érték (\"%1\"; ezt vártam \"%2\")"
+
+#: devices/pic/base/pic_config.cpp:148 devices/pic/base/pic_config.cpp:163
+msgid "XT Crystal"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:151 devices/pic/base/pic_config.cpp:166
+msgid "XT Crystal with 16x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:149 devices/pic/base/pic_config.cpp:164
+msgid "XT Crystal with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:150 devices/pic/base/pic_config.cpp:165
+msgid "XT Crystal with 8x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:259
+msgid "XT crystal oscillator"
+msgstr ""
+
+#: libgui/likeback.cpp:397
+msgid "You can change or remove your email address whenever you want. For that, use the little arrow icon at the top-right corner of a window."
+msgstr ""
+
+#: libgui/gui_debug_manager.cpp:104
+msgid "You cannot set breakpoints when a debugger is not selected."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:39
+msgid "You must disconnect 7407 pin 2"
+msgstr ""
+
+#: progs/icd2/gui/icd2_group_ui.cpp:53
+msgid "You need to initiate debugging to read the debug executive version."
+msgstr ""
+
+#: libgui/toplevel.cpp:534
+msgid "You need to specify a device to create a new hex file."
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:59
+msgid "You need to specify the device for programming."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:209
+msgid "You need to specify the range."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:292
+msgid "You need to start the debugging session first (with \"start\")."
+msgstr ""
+
+#: progs/gui/port_selector.cpp:61
+msgid "Your computer might not have any parallel port or the /dev/parportX device has not been created.<br>Use \"mknod /dev/parport0 c 99 0\" to create it<br>and \"chmod a+rw /dev/parport0\" to make it RW enabled."
+msgstr ""
+
+#: progs/gui/port_selector.cpp:58
+msgid "Your computer might not have any serial port."
+msgstr ""
+
+#: libgui/likeback.cpp:398
+msgid "Your email address (keep empty to post comments anonymously):"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:818
+msgid "[%1-options]"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:811
+msgid "[options] "
+msgstr "[beállítás]"
+
+#: _translatorinfo.cpp:3
+msgid ""
+"_: EMAIL OF TRANSLATORS\n"
+"Your emails"
+msgstr "biglacko at startolj d0t hu"
+
+#: _translatorinfo.cpp:1
+msgid ""
+"_: NAME OF TRANSLATORS\n"
+"Your names"
+msgstr "Nagy László(biglackó)"
+
+#: tools/pic30/pic30_generator.cpp:63
+msgid "allocating 2 bytes"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:59 tools/pic30/pic30_generator.cpp:67
+msgid "allocating 4 bytes"
+msgstr ""
+
+#: tools/gui/tool_config_widget.cpp:126 tools/gputils/gui/gputils_ui.cpp:30
+msgid "as in LIST directive"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:104
+msgid "at line #%1, column #%2"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:77
+msgid "call _wreg_init subroutine"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:99
+msgid "clear Timer1 interrupt flag status bit"
+msgstr "clear Timer1 interrupt flag status bit"
+
+#: tools/pic30/pic30_generator.cpp:48
+msgid "declare Timer1 ISR"
+msgstr "Timer1 ISR az megszakítás lesz"
+
+#: devices/gui/register_view.cpp:71
+msgid "driven high"
+msgstr ""
+
+#: devices/gui/register_view.cpp:71
+msgid "driven low"
+msgstr ""
+
+#: devices/gui/register_view.cpp:67
+msgid "driving high"
+msgstr ""
+
+#: devices/gui/register_view.cpp:67
+msgid "driving low"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:138
+msgid "empty name"
+msgstr ""
+
+#: tools/list/compile_process.cpp:359
+msgid "error: "
+msgstr "Hiba"
+
+#: tools/pic30/pic30_generator.cpp:97
+msgid "example of context saving (push W4 and W5)"
+msgstr "szeretem a szőke nőket"
+
+#: tools/gputils/gputils_generator.cpp:76
+#: tools/gputils/gputils_generator.cpp:135
+#: tools/gputils/gputils_generator.cpp:214
+msgid "example variable"
+msgstr "példa változó"
+
+#: tools/gputils/gputils_generator.cpp:146
+#, fuzzy
+msgid "for restoringing context"
+msgstr "környezet visszatöltése"
+
+#: tools/gputils/gputils_generator.cpp:139
+#, fuzzy
+msgid "for saving context"
+msgstr "környezet mentés"
+
+#: tools/gputils/gputils_generator.cpp:225
+msgid "go to start of high priority interrupt code"
+msgstr "menj a magas megszakítás start kódra"
+
+#: tools/gputils/gputils_generator.cpp:161
+#, fuzzy
+msgid "go to start of int pin interrupt code"
+msgstr "menj a megszakítás start kódra"
+
+#: tools/gputils/gputils_generator.cpp:95
+msgid "go to start of interrupt code"
+msgstr "menj a megszakítás start kódra"
+
+#: tools/gputils/gputils_generator.cpp:91
+#: tools/gputils/gputils_generator.cpp:157
+#: tools/gputils/gputils_generator.cpp:221
+msgid "go to start of main code"
+msgstr "menj a start kódra"
+
+#: tools/gputils/gputils_generator.cpp:173
+#, fuzzy
+msgid "go to start of peripheral interrupt code"
+msgstr "menj a megszakítás start kódra"
+
+#: tools/gputils/gputils_generator.cpp:169
+#, fuzzy
+msgid "go to start of t0cki interrupt code"
+msgstr "menj a megszakítás start kódra"
+
+#: tools/gputils/gputils_generator.cpp:165
+#, fuzzy
+msgid "go to start of timer0 interrupt code"
+msgstr "menj a megszakítás start kódra"
+
+#: tools/gputils/gputils_generator.cpp:238
+msgid "high priority interrupt service routine"
+msgstr "magas prioritásu megszakítási rutin"
+
+#: tools/gputils/gputils_generator.cpp:223
+#, fuzzy
+msgid "high priority interrupt vector"
+msgstr "Linker Script Verzeichnis"
+
+#: tools/gputils/gputils_generator.cpp:90
+msgid "initialize PCLATH"
+msgstr "PCLATH induló érték"
+
+#: tools/pic30/pic30_generator.cpp:73
+msgid "initialize stack pointer"
+msgstr "stack mutató beállítása"
+
+#: tools/pic30/pic30_generator.cpp:74
+msgid "initialize stack pointer limit register"
+msgstr "stack mutató méretkorlát regiszter beállítása"
+
+#: tools/gputils/gputils_generator.cpp:181
+#, fuzzy
+msgid "insert INT pin interrupt code"
+msgstr "megszakítási kód helye"
+
+#: tools/gputils/gputils_generator.cpp:193
+#, fuzzy
+msgid "insert T0CKI interrupt code"
+msgstr "megszakítási kód helye"
+
+#: tools/gputils/gputils_generator.cpp:187
+#, fuzzy
+msgid "insert TIMER0 interrupt code"
+msgstr "megszakítási kód helye"
+
+#: tools/boost/boost_generator.cpp:52 tools/boost/boost_generator.cpp:76
+#: tools/jal/jal_generator.cpp:31 tools/gputils/gputils_generator.cpp:52
+#: tools/sdcc/sdcc_generator.cpp:114 tools/pic30/pic30_generator.cpp:79
+msgid "insert code"
+msgstr "ide a kódot"
+
+#: tools/gputils/gputils_generator.cpp:240
+msgid "insert high priority interrupt code"
+msgstr "magas prioritásu megszakítási kód helye"
+
+#: tools/boost/boost_generator.cpp:47 tools/gputils/gputils_generator.cpp:109
+#: tools/sdcc/sdcc_generator.cpp:102 tools/pic30/pic30_generator.cpp:98
+msgid "insert interrupt code"
+msgstr "megszakítási kód helye"
+
+#: tools/gputils/gputils_generator.cpp:232
+msgid "insert low priority interrupt code"
+msgstr "alacsony prioritásu megszakítási kód helye"
+
+#: tools/gputils/gputils_generator.cpp:121
+#: tools/gputils/gputils_generator.cpp:176
+#: tools/gputils/gputils_generator.cpp:244
+msgid "insert main code"
+msgstr "Fő kód helye"
+
+#: tools/gputils/gputils_generator.cpp:199
+#, fuzzy
+msgid "insert peripheral interrupt code"
+msgstr "megszakítási kód helye"
+
+#: tools/boost/boost_generator.cpp:45 tools/sdcc/sdcc_generator.cpp:101
+msgid "interrupt service routine"
+msgstr "megszakítás beállító rutin"
+
+#: tools/gputils/gputils_generator.cpp:93
+msgid "interrupt vector"
+msgstr "megszakítás vektor"
+
+#: tools/jal/jal_generator.cpp:23
+msgid "jal standard library"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:47
+msgid "label for code start"
+msgstr "start cimkéje"
+
+#: tools/gputils/gputils_generator.cpp:89
+msgid "load upper byte of 'start' label"
+msgstr "felső bájt betöltés a start cimkénél"
+
+#: tools/boost/boost_generator.cpp:77 tools/jal/jal_generator.cpp:32
+#: tools/gputils/gputils_generator.cpp:53
+#: tools/gputils/gputils_generator.cpp:122
+#: tools/gputils/gputils_generator.cpp:177
+#: tools/gputils/gputils_generator.cpp:245 tools/pic30/pic30_generator.cpp:82
+msgid "loop forever"
+msgstr "örökké körbe"
+
+#: tools/gputils/gputils_generator.cpp:227
+msgid "low priority interrupt vector"
+msgstr "alacsony prioritásu megszakítás vektor"
+
+#: tools/jal/jal_generator.cpp:30
+#, fuzzy
+msgid "main code"
+msgstr "Fő kód helye"
+
+#: tools/boost/boost_generator.cpp:50 tools/boost/boost_generator.cpp:74
+#, fuzzy
+msgid "main program"
+msgstr "&Programozás"
+
+#: tools/list/compile_process.cpp:360
+msgid "message: "
+msgstr "üzenet"
+
+#: tools/gputils/gputils_generator.cpp:88
+#: tools/gputils/gputils_generator.cpp:155
+#: tools/gputils/gputils_generator.cpp:156
+#: tools/gputils/gputils_generator.cpp:219
+#: tools/gputils/gputils_generator.cpp:220
+#, fuzzy
+msgid "needed for ICD2 debugging"
+msgstr "szükséges az ICD2 hibakereséshez."
+
+#: coff/base/cdb_parser.cpp:307
+#, fuzzy
+msgid "no register defined"
+msgstr "No register"
+
+#: tools/pic30/pic30_generator.cpp:76
+msgid "nop after SPLIM initialization"
+msgstr "nop a SPLIM inicializáció után"
+
+#: devices/pic/base/pic_config.cpp:198 devices/pic/base/pic_config.cpp:200
+#: devices/pic/base/pic_config.cpp:202
+msgid "not divided"
+msgstr "nem osztott"
+
+#: devices/pic/gui/pic_memory_editor.cpp:114
+#: devices/pic/gui/pic_memory_editor.cpp:121
+#, fuzzy
+msgid "not present"
+msgstr "<nem beállított>"
+
+#: progs/direct/gui/direct_config_widget.cpp:53
+msgid "on"
+msgstr "be"
+
+#: tools/gputils/gputils_generator.cpp:105
+msgid "only required if using more than first page"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:197
+#, fuzzy
+msgid "peripheral interrupt service routine"
+msgstr "megszakítás beállító rutin"
+
+#: tools/gputils/gputils_generator.cpp:49
+#: tools/gputils/gputils_generator.cpp:97
+msgid "relocatable code"
+msgstr ""
+
+#: common/nokde/nokde_kaboutdata.cpp:374
+msgid "replace this with information about your translation team"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:86
+#: tools/gputils/gputils_generator.cpp:153
+#: tools/gputils/gputils_generator.cpp:217
+msgid "reset vector"
+msgstr "reset vector"
+
+#: tools/gputils/gputils_generator.cpp:111
+#: tools/gputils/gputils_generator.cpp:114
+#: tools/gputils/gputils_generator.cpp:233
+msgid "restore context"
+msgstr "környezet visszatöltése"
+
+#: tools/pic30/pic30_generator.cpp:100
+msgid "restore context from stack"
+msgstr "környezet visszatöltése a stack-be"
+
+#: tools/gputils/gputils_generator.cpp:100
+#: tools/gputils/gputils_generator.cpp:229
+msgid "save context"
+msgstr "környezet mentés"
+
+#: piklab-coff/main.cpp:183
+#, fuzzy
+msgid "section \"%1\":"
+msgstr "Keresem \"%1\"..."
+
+#: coff/base/coff_archive.cpp:118
+#, fuzzy
+msgid "size: %1 bytes"
+msgstr "%1 bájtok"
+
+#: piklab-coff/main.cpp:189
+msgid "symbol \"%1\""
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:644
+msgid "the 2nd argument is a list of name+address, one on each line"
+msgstr "a 2. argumentum név+cím lista, minden sorban egy"
+
+#: piklab-coff/main.cpp:167
+msgid "type=\"%1\" address=%2 size=%3 flags=%4"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:115 coff/base/cdb_parser.cpp:161
+msgid "unexpected end of line"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:294
+msgid "unknown AddressSpaceType"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:272
+#, fuzzy
+msgid "unknown DCLType"
+msgstr "Ismeretlen helyzet"
+
+#: coff/base/cdb_parser.cpp:238
+#, fuzzy
+msgid "unknown ScopeType"
+msgstr "Ismeretlen helyzet"
+
+#: coff/base/cdb_parser.cpp:282
+#, fuzzy
+msgid "unknown Sign"
+msgstr "Ismeretlen fájl"
+
+#: devices/gui/register_view.cpp:66 devices/gui/register_view.cpp:70
+msgid "unknown state"
+msgstr "Ismeretlen helyzet"
+
+#: tools/gputils/gputils_generator.cpp:68
+#: tools/gputils/gputils_generator.cpp:69
+#: tools/gputils/gputils_generator.cpp:72
+#: tools/gputils/gputils_generator.cpp:81
+#, fuzzy
+msgid "variable used for context saving"
+msgstr "környezeti változó mentése"
+
+#: tools/gputils/gputils_generator.cpp:130
+#: tools/gputils/gputils_generator.cpp:131
+#: tools/gputils/gputils_generator.cpp:132
+#: tools/gputils/gputils_generator.cpp:133
+#: tools/gputils/gputils_generator.cpp:210
+#: tools/gputils/gputils_generator.cpp:211
+#: tools/gputils/gputils_generator.cpp:212
+#, fuzzy
+msgid "variable used for context saving (for low-priority interrupts only)"
+msgstr "környezeti változó mentése (csak alacsony prioritásu megszakításhoz)"
+
+#: tools/gputils/gputils_generator.cpp:80
+msgid "variables used for context saving"
+msgstr "környezeti változó mentése"
+
+#: tools/list/compile_process.cpp:358
+msgid "warning: "
+msgstr "Figyelem"
+
+#: coff/base/cdb_parser.cpp:128
+msgid "was expecting '%1'"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:200
+msgid "was expecting a bool ('%1')"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:177
+msgid "was expecting an uint"
+msgstr ""
+
+#~ msgid "Number format not recognized"
+#~ msgstr "Number format not recognized"
+
+#~ msgid "Too many arguments"
+#~ msgstr "Túl sok paraméter."
+
+#~ msgid "Coff"
+#~ msgstr "Coff"
+
+#, fuzzy
+#~ msgid "Device Id"
+#~ msgstr "Eszköz ID"
+
+#~ msgid "Elf"
+#~ msgstr "Elf"
+
+#~ msgid "Version"
+#~ msgstr "Verzió"
+
+#~ msgid " <default>"
+#~ msgstr " <Standard>"
+
+#, fuzzy
+#~ msgid "Return informations about files (for archive)."
+#~ msgstr "nem tudom megnyitni a coff fájlt."
+
+#~ msgid "Different processor name: %1"
+#~ msgstr "Eltérő processzor név: %1"
+
+#~ msgid " Already Loaded"
+#~ msgstr " Már beolvasva"
+
+#~ msgid "Could not open COFF file."
+#~ msgstr "nem tudom megnyitni a coff fájlt."
+
+#, fuzzy
+#~ msgid "Error reading COFF file."
+#~ msgstr "Error(s) reading hex file."
+
+#, fuzzy
+#~ msgid "Stepping..."
+#~ msgstr "Keresem ..."
+
+#~ msgid "Program all memory even if not needed (slower)."
+#~ msgstr "Program all memory even if not needed (slower)."
+
+#, fuzzy
+#~ msgid "24J Family"
+#~ msgstr "18X család"
+
+#~ msgid "Enhanced Flash"
+#~ msgstr "Enhanced Flash"
+
+#~ msgid "Halting..."
+#~ msgstr "Halting..."
+
+#~ msgid "Standard Flash"
+#~ msgstr "Standard Flash"
+
+#~ msgid "&Interrupt"
+#~ msgstr "&Megszakítás"
+
+#~ msgid "Reset."
+#~ msgstr "Reset."
+
+#~ msgid "Stop."
+#~ msgstr "Állj"
+
+#~ msgid "htpp://k9spud.com/hoodmicro"
+#~ msgstr "htpp://k9spud.com/hoodmicro"
+
+#~ msgid "Details"
+#~ msgstr "Details"
+
+#, fuzzy
+#~ msgid "Program EEPROM (if supported)"
+#~ msgstr "Data EEPROM"
+
+#~ msgid "Add File to Project"
+#~ msgstr "Add a fájlt a projekthez"
+
+#~ msgid "Preprocessor"
+#~ msgstr "Preprocessor"
+
+#, fuzzy
+#~ msgid "Preprocessor:"
+#~ msgstr "Preprocessor"
+
+#, fuzzy
+#~ msgid "Check hex file for correctness."
+#~ msgstr "Nézd meg a HEX fájl helyességét."
+
+#~ msgid " not available"
+#~ msgstr " Nem elérhető"
+
+#, fuzzy
+#~ msgid "Code-protected"
+#~ msgstr "Code Protected"
+
+#~ msgid "dsPICs Family"
+#~ msgstr "dsPICs család"
+
+#~ msgid "(%1 pins)"
+#~ msgstr "(%1 lábak)"
+
+#~ msgid "Reset"
+#~ msgstr "Reset"
+
+#~ msgid "Supported Programmers"
+#~ msgstr "Támogatott programozók"
+
+#~ msgid "Supported Tools"
+#~ msgstr "Támogatott szerszámok"
+
+#, fuzzy
+#~ msgid "%1 (rev. %3.%4)"
+#~ msgstr "%1 (rev. %2)"
+
+#~ msgid "Debugger/Emulator"
+#~ msgstr "Debugger/Emulator"
+
+#, fuzzy
+#~ msgid "Ram Boot block size"
+#~ msgstr "Boot Block Méret"
+
+#, fuzzy
+#~ msgid "Bootloader"
+#~ msgstr "Bootloader"
+
+#, fuzzy
+#~ msgid "Bootloader:"
+#~ msgstr "Bootloader"
+
+#~ msgid "PICkit2"
+#~ msgstr "PICkit2"
+
+#~ msgid "Devices"
+#~ msgstr "Eszközök"
+
+#~ msgid "Header"
+#~ msgstr "Header"
+
+#~ msgid "Source"
+#~ msgstr "Forrás"
diff --git a/po/it.po b/po/it.po
new file mode 100644
index 0000000..511d627
--- /dev/null
+++ b/po/it.po
@@ -0,0 +1,7331 @@
+# translation of it.po to
+# translation of piklab.po to
+# This file is put in the public domain.
+#
+# Michele Petrecca <michelinux@alice.it>, 2006.
+msgid ""
+msgstr ""
+"Project-Id-Version: it\n"
+"Report-Msgid-Bugs-To: \n"
+"POT-Creation-Date: 2007-11-25 14:15+0100\n"
+"PO-Revision-Date: 2006-12-20 00:01+0100\n"
+"Last-Translator: Michele Petrecca <michelinux@alice.it>\n"
+"Language-Team:  \n"
+"MIME-Version: 1.0\n"
+"Content-Type: text/plain; charset=UTF-8\n"
+"Content-Transfer-Encoding: 8bit\n"
+"X-Generator: KBabel 1.11.4\n"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:802
+msgid ""
+"\n"
+"%1:\n"
+msgstr ""
+"\n"
+"%1:\n"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:946
+msgid ""
+"\n"
+"Arguments:\n"
+msgstr ""
+"\n"
+"Argomenti:\n"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:885
+msgid ""
+"\n"
+"Options:\n"
+msgstr ""
+"\n"
+"Opzioni:\n"
+
+#: devices/pic/prog/pic_prog.cpp:109
+msgid "  %1 = %2 V: error in voltage level."
+msgstr "  %1 = %2 V: errore nel livello di tensione."
+
+#: progs/icd2/base/icd2_debug_specific.cpp:58
+msgid "  According to ICD2 manual, instruction at address 0x0 should be \"nop\"."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:387
+msgid "  Band gap bits have been preserved."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:630
+#, fuzzy
+msgid "  Blank check successful"
+msgstr "Verifica avvenuta con successo"
+
+#: progs/icd2/base/icd2_debug.cpp:314
+msgid "  Debug executive version: %1"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:626
+msgid "  EPROM device: blank checking first..."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:658 devices/pic/prog/pic_prog.cpp:714
+msgid "  Erasing device"
+msgstr "  Cancellazione dispositivo"
+
+#: progs/icd2/base/icd2_prog.cpp:111
+msgid "  Firmware succesfully uploaded."
+msgstr "  Firmware aggiornato correttamente."
+
+#: progs/icd2/base/icd2_prog.cpp:82
+msgid "  Incorrect firmware loaded."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:360
+msgid "  Osccal backup has been preserved."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:355
+msgid "  Osccal backup is unchanged."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:346
+msgid "  Osccal has been preserved."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:341
+msgid "  Osccal is unchanged."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug_specific.cpp:76
+#: progs/icd2/base/icd2_debug_specific.cpp:83
+#: progs/icd2/base/icd2_debug_specific.cpp:166
+#: progs/icd2/base/icd2_debug_specific.cpp:244
+msgid "  PC is not at address %1 (%2)"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:508
+msgid "  Part of device memory is protected (in %1) and cannot be verified."
+msgstr "  Parte della memoria del dispositivo è protetta (in %1), non è quindi possibile farne la verifica."
+
+#: devices/pic/prog/pic_prog.cpp:512
+msgid "  Read memory: %1"
+msgstr "  Lettura memoria: %1"
+
+#: devices/pic/prog/pic_prog.cpp:334
+msgid "  Replace invalid osccal with backup value."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:101
+msgid "  Set target self powered: %1"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:277
+msgid "  Unknown or incorrect device (Read id is %1)."
+msgstr ""
+
+#: progs/pickit2/base/pickit2_prog.cpp:63
+msgid "  Uploading PICkit2 firmware..."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:247
+msgid "  Verify debug executive"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:505
+msgid "  Verify memory: %1"
+msgstr "  Verifica memoria: %1"
+
+#: progs/icd2/base/icd2_debug.cpp:244
+msgid "  Write debug executive"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:565 devices/pic/prog/pic_prog.cpp:683
+#: devices/pic/prog/pic_prog.cpp:694
+msgid "  Write memory: %1"
+msgstr "  Scrittura memoria: %1"
+
+#: devices/pic/pic/pic_group.cpp:31 devices/pic/pic/pic_group.cpp:37
+msgid " (%2 bits)"
+msgstr " (%2 bit)"
+
+#: libgui/project_manager_ui.cpp:106 libgui/project_manager_ui.cpp:175
+msgid " (default)"
+msgstr " (default)"
+
+#: devices/gui/register_view.cpp:72
+msgid " (input)"
+msgstr " (ingresso)"
+
+#: devices/pic/pic/pic_group.cpp:38
+msgid " (not programmable)"
+msgstr " (non programmabile)"
+
+#: devices/gui/register_view.cpp:68
+msgid " (output)"
+msgstr " (uscita)"
+
+#: devices/pic/gui/pic_memory_editor.cpp:255
+msgid " - not programmed by default"
+msgstr " - predefinito è non programmato"
+
+#: devices/pic/gui/pic_memory_editor.cpp:254
+msgid " - recommended mask: %1"
+msgstr ""
+
+#: piklab-coff/main.cpp:176
+#, fuzzy
+msgid " Filename:Line"
+msgstr "Nome del file:"
+
+#: piklab-prog/cmdline.cpp:137
+#, fuzzy
+msgid " no port detected."
+msgstr " nessuna porta rilevata"
+
+#: piklab-prog/cmdline.cpp:133
+#, fuzzy
+msgid " support disabled."
+msgstr " nessuna porta rilevata"
+
+#: tools/gui/toolchain_config_widget.cpp:167
+msgid "\"%1\" found"
+msgstr "\"%1\" trovato"
+
+#: tools/gui/toolchain_config_widget.cpp:234
+msgid "\"%1\" not found"
+msgstr "\"%1\" non trovato"
+
+#: tools/gui/toolchain_config_widget.cpp:168
+msgid "\"%1\" not recognized"
+msgstr ""
+
+#: progs/gpsim/base/gpsim.cpp:68
+msgid "\"gpsim\" unexpectedly exited."
+msgstr ""
+
+#: coff/base/text_coff.cpp:252 coff/base/text_coff.cpp:257
+msgid "%1 (magic id: %2)"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:221
+msgid "%1 (proc. %2; rev. %3.%4)"
+msgstr "%1 (proc. %2; rev. %3.%4)"
+
+#: devices/pic/base/pic.cpp:215 devices/pic/base/pic.cpp:225
+msgid "%1 (rev. %2)"
+msgstr "%1 (rev. %2)"
+
+#: devices/pic/base/pic.cpp:218
+#, fuzzy
+msgid "%1 (rev. %2.%3)"
+msgstr "%1 (rev. %2)"
+
+#: progs/gui/hardware_config_widget.cpp:178
+msgid "%1 <custom>"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:312
+msgid "%1 = %2"
+msgstr "%1 = %2"
+
+#: progs/gui/hardware_config_widget.cpp:50
+msgid "%1 at %2:"
+msgstr "%1 in %2:"
+
+#: devices/mem24/mem24/mem24_group.cpp:21 devices/pic/pic/pic_group.cpp:36
+msgid "%1 bytes"
+msgstr "%1 byte"
+
+#: devices/pic/base/pic_config.cpp:308
+msgid "%1 for block %2"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:883
+msgid "%1 options"
+msgstr "%1 opzioni"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:647
+msgid "%1 was written by somebody who wants to remain anonymous."
+msgstr ""
+
+#: devices/pic/pic/pic_group.cpp:30
+msgid "%1 words"
+msgstr "%1 parole"
+
+#: devices/pic/gui/pic_memory_editor.cpp:256
+msgid "%1-bit words - mask: %2"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:467
+msgid "%1: Erasing this range only is not supported with this programmer. This will erase the whole chip and restore the other memory ranges."
+msgstr ""
+
+#: libgui/toplevel.cpp:278
+msgid "&Advanced..."
+msgstr "&Avanzato..."
+
+#: devices/gui/memory_editor.cpp:283 libgui/toplevel.cpp:270
+msgid "&Blank Check"
+msgstr ""
+
+#: libgui/toplevel.cpp:294
+msgid "&Break<Translators: it is the verb>"
+msgstr ""
+
+#: libgui/toplevel.cpp:246
+msgid "&Build Project"
+msgstr ""
+
+#: devices/gui/memory_editor.cpp:275
+msgid "&Clear"
+msgstr "Pulisci"
+
+#: libgui/toplevel.cpp:248
+msgid "&Compile File"
+msgstr "&Compila il file"
+
+#: libgui/toplevel.cpp:314
+msgid "&Config Generator..."
+msgstr ""
+
+#: libgui/likeback.cpp:97
+msgid "&Configure Email Address..."
+msgstr ""
+
+#: libgui/toplevel.cpp:256
+msgid "&Connect"
+msgstr "&Connetti"
+
+#. i18n: file ./data/app_data/piklabui.rc line 101
+#: rc.cpp:30
+#, no-c-format
+msgid "&Debugger"
+msgstr "&Debugger"
+
+#: libgui/toplevel.cpp:312
+msgid "&Device Information..."
+msgstr "Informazione &dispositivo..."
+
+#: libgui/toplevel.cpp:260
+msgid "&Disconnect"
+msgstr "&Disconnetti"
+
+#: libgui/toplevel.cpp:296
+#, fuzzy
+msgid "&Disconnect/Stop"
+msgstr "&Disconnetti"
+
+#: devices/gui/memory_editor.cpp:282 libgui/toplevel.cpp:268
+msgid "&Erase"
+msgstr "Canc&ella"
+
+#: libgui/toplevel.cpp:310
+#, fuzzy
+msgid "&Find Files..."
+msgstr "Aggiungi file..."
+
+#: libgui/toplevel.cpp:183
+msgid "&New Source File..."
+msgstr "&Nuovo file sorgente..."
+
+#: libgui/toplevel.cpp:308
+msgid "&Pikloops..."
+msgstr "&Pikloops..."
+
+#: devices/gui/memory_editor.cpp:279 libgui/toplevel.cpp:262
+msgid "&Program"
+msgstr "&Programma"
+
+#. i18n: file ./data/app_data/piklabui.rc line 63
+#: rc.cpp:21
+#, no-c-format
+msgid "&Project"
+msgstr "&Progetto"
+
+#: devices/gui/memory_editor.cpp:281 libgui/toplevel.cpp:266
+msgid "&Read"
+msgstr "Leggi"
+
+#: libgui/toplevel.cpp:219
+msgid "&Reset Layout"
+msgstr ""
+
+#: libgui/toplevel.cpp:272 libgui/toplevel.cpp:286
+msgid "&Run"
+msgstr "Lancia"
+
+#: libgui/device_gui.cpp:90
+msgid "&Select"
+msgstr "&Seleziona"
+
+#: libgui/toplevel.cpp:288
+msgid "&Step"
+msgstr ""
+
+#: libgui/toplevel.cpp:274
+msgid "&Stop"
+msgstr "Ferma"
+
+#: libgui/toplevel.cpp:316
+msgid "&Template Generator..."
+msgstr ""
+
+#: devices/gui/memory_editor.cpp:280 libgui/toplevel.cpp:264
+msgid "&Verify"
+msgstr "&Verifica"
+
+#: devices/gui/memory_editor.cpp:276
+msgid "&Zero"
+msgstr "&Zero"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:545
+msgid "'%1' missing."
+msgstr ""
+
+#: devices/pic/gui/pic_memory_editor.cpp:366
+msgid "(backup)"
+msgstr "(backup)"
+
+#: tools/list/compile_manager.cpp:83 tools/list/compile_manager.cpp:112
+#: tools/list/compile_manager.cpp:137
+msgid "*** Aborted ***"
+msgstr ""
+
+#: tools/list/compile_process.cpp:143
+#, fuzzy
+msgid "*** Error ***"
+msgstr "*** Timeout ***"
+
+#: tools/list/compile_process.cpp:140
+msgid "*** Exited with status: %1 ***"
+msgstr "*** Uscito con stato: %1 ***"
+
+#: tools/list/compile_manager.cpp:194 tools/list/compile_manager.cpp:268
+msgid "*** Success ***"
+msgstr ""
+
+#: tools/list/compile_process.cpp:150
+msgid "*** Timeout ***"
+msgstr "*** Timeout ***"
+
+#: common/cli/cli_log.cpp:62
+#, fuzzy
+msgid "*no*"
+msgstr "no"
+
+#: common/cli/cli_log.cpp:62
+msgid "*yes*"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:28
+msgid "---"
+msgstr "---"
+
+#: devices/pic/base/pic_config.cpp:74
+msgid "00"
+msgstr "00"
+
+#: devices/pic/base/pic_config.cpp:74
+msgid "01"
+msgstr "01"
+
+#: devices/pic/base/pic_config.cpp:75
+msgid "10"
+msgstr "10"
+
+#: tools/jal/jal_generator.cpp:22
+#, fuzzy
+msgid "10MHz crystal"
+msgstr "Cristallo XT"
+
+#: devices/pic/base/pic_config.cpp:75
+msgid "11"
+msgstr "11"
+
+#: devices/pic/base/pic_config.cpp:216
+msgid "12-bit external bus"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:217
+msgid "16-bit external bus"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:53
+#, fuzzy
+msgid "17C Family"
+msgstr "Famiglia 17X"
+
+#: devices/pic/base/pic.cpp:54
+#, fuzzy
+msgid "18C Family"
+msgstr "Famiglia 18X"
+
+#: devices/pic/base/pic.cpp:55
+#, fuzzy
+msgid "18F Family"
+msgstr "Famiglia 18X"
+
+#: devices/pic/base/pic.cpp:56
+#, fuzzy
+msgid "18J Family"
+msgstr "Famiglia 18X"
+
+#: devices/pic/base/pic_config.cpp:218
+msgid "20-bit external bus"
+msgstr ""
+
+#: devices/mem24/base/mem24.h:25
+#, fuzzy
+msgid "24 EEPROM"
+msgstr "Dati EEPROM"
+
+#: devices/pic/base/pic.cpp:57
+#, fuzzy
+msgid "24F Family"
+msgstr "Famiglia 18X"
+
+#: devices/pic/base/pic.cpp:58
+#, fuzzy
+msgid "24H Family"
+msgstr "Famiglia 18X"
+
+#: devices/pic/base/pic.cpp:59
+#, fuzzy
+msgid "30F Family"
+msgstr "Famiglia 18X"
+
+#: devices/pic/base/pic.cpp:60
+#, fuzzy
+msgid "33F Family"
+msgstr "Famiglia 18X"
+
+#: devices/pic/base/pic_config.cpp:207
+msgid "4 MHz"
+msgstr "4 MHz"
+
+#: devices/pic/base/pic_config.cpp:222
+msgid "5-bit address mask mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:221
+msgid "7-bit address mask mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:206
+msgid "8 MHz"
+msgstr "8 MHz"
+
+#: libgui/device_gui.cpp:155
+#, fuzzy
+msgid "<Feature>"
+msgstr "<auto>"
+
+#: libgui/device_gui.cpp:142
+msgid "<Memory Type>"
+msgstr "<Tipo di Memoria>"
+
+#: libgui/device_gui.cpp:118
+msgid "<Programmer>"
+msgstr "<Programmatore>"
+
+#: libgui/device_gui.cpp:150
+#, fuzzy
+msgid "<Status>"
+msgstr "Stato"
+
+#: libgui/device_gui.cpp:130
+msgid "<Toolchain>"
+msgstr ""
+
+#: tools/boost/boostbasic.cpp:22
+msgid "<a href=\"%1\">BoostBasic Compiler</a> is a Basic compiler distributed by SourceBoost Technologies."
+msgstr ""
+
+#: tools/boost/boostc.cpp:22
+msgid "<a href=\"%1\">BoostC Compiler</a> is a C compiler distributed by SourceBoost Technologies."
+msgstr ""
+
+#: tools/boost/boostcpp.cpp:23
+msgid "<a href=\"%1\">BoostC++ Compiler</a> is a C compiler distributed by SourceBoost Technologies."
+msgstr ""
+
+#: tools/cc5x/cc5x.cpp:55
+msgid "<a href=\"%1\">CC5X</a> is a C compiler distributed by B Knudsen Data."
+msgstr ""
+
+#: tools/ccsc/ccsc.cpp:90
+msgid "<a href=\"%1\">CCS Compiler</a> is a C compiler distributed by CCS."
+msgstr ""
+
+#: tools/gputils/gputils.cpp:40
+msgid "<a href=\"%1\">GPUtils</a> is an open-source assembler and linker suite.<br>"
+msgstr ""
+
+#: tools/jalv2/jalv2.cpp:31
+msgid "<a href=\"%1\">JAL V2</a> is a new compiler for the high-level language JAL."
+msgstr ""
+
+#: tools/jal/jal.cpp:31
+msgid "<a href=\"%1\">JAL</a> is a high-level language for PIC microcontrollers."
+msgstr ""
+
+#: tools/mpc/mpc.cpp:50
+msgid "<a href=\"%1\">MPC Compiler</a> is a C compiler distributed by Byte Craft."
+msgstr ""
+
+#: tools/picc/picc.cpp:119
+msgid "<a href=\"%1\">PICC 18</a> is a C compiler distributed by HTSoft."
+msgstr ""
+
+#: tools/picc/picc.cpp:93
+msgid "<a href=\"%1\">PICC-Lite</a> is a freeware C compiler distributed by HTSoft."
+msgstr ""
+
+#: tools/picc/picc.cpp:106
+msgid "<a href=\"%1\">PICC</a> is a C compiler distributed by HTSoft."
+msgstr ""
+
+#: progs/gui/port_selector.cpp:88
+msgid "<a href=\"%1\">See Piklab homepage for help</a>."
+msgstr ""
+
+#: devices/list/device_list.cpp:16
+msgid "<auto>"
+msgstr "<auto>"
+
+#: tools/gui/toolchain_config_widget.cpp:299
+msgid "<b>Device string #%1:</b><br>%2<br>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:298
+msgid "<b>Device string:</b><br>%1<br>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:271
+msgid "<b>Version string:</b><br>%1<br></qt>"
+msgstr ""
+
+#: libgui/hex_editor.cpp:101
+msgid "<b>Warning:</b> hex file seems to be incompatible with the selected device %1:<br>%2"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:165
+msgid "<default>"
+msgstr "<default>"
+
+#: piklab-prog/cmdline.cpp:411 piklab-prog/cmdline.cpp:426
+#: piklab-prog/cmdline.cpp:431 piklab-prog/cmdline.cpp:435
+msgid "<from config>"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:182
+msgid "<invalid>"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:62
+msgid "<no project>"
+msgstr "<nessun progetto>"
+
+#: devices/pic/pic/pic_group.cpp:54
+msgid "<none>"
+msgstr ""
+
+#: piklab-hex/main.cpp:241 piklab-hex/main.cpp:245 piklab-prog/cmdline.cpp:403
+#: piklab-prog/cmdline.cpp:408 piklab-prog/cmdline.cpp:413
+#: piklab-prog/cmdline.cpp:416 piklab-prog/cmdline.cpp:422
+#: piklab-prog/cmdline.cpp:430 piklab-prog/cmdline.cpp:439
+#: piklab-prog/cmdline.cpp:443 piklab-coff/main.cpp:247
+msgid "<not set>"
+msgstr ""
+
+#: libgui/likeback.cpp:657
+msgid "<p>Error while trying to send the report.</p><p>Please retry later.</p>"
+msgstr ""
+
+#: libgui/likeback.cpp:659
+msgid "<p>Your comment has been sent successfully. It will help improve the application.</p><p>Thanks for your time.</p>"
+msgstr ""
+
+#: tools/c18/c18.cpp:85
+msgid "<qt><a href=\"%1\">C18</a> is a C compiler distributed by Microchip.</qt>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:296
+msgid "<qt><b>Command #%1 for devices detection:</b><br>%2<br>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:295
+msgid "<qt><b>Command for devices detection:</b><br>%1<br>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:270
+msgid "<qt><b>Command for executable detection:</b><br>%1<br>"
+msgstr ""
+
+#: tools/gui/tool_config_widget.cpp:113
+msgid "<qt>This values will be placed after the linked objects.</qt>"
+msgstr ""
+
+#: piklab-hex/main.cpp:278
+#, fuzzy
+msgid "<value>"
+msgstr "<auto>"
+
+#: devices/pic/base/pic.cpp:72
+msgid "ADC"
+msgstr ""
+
+#: coff/base/coff_object.cpp:124
+msgid "Absolute Value"
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:47
+msgid "Access Bank (high)"
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:47
+msgid "Access Bank (low)"
+msgstr ""
+
+#: progs/direct/base/direct_mem24.cpp:168
+msgid "Acknowledge bit incorrect"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:108 devices/pic/base/pic_config.cpp:111
+msgid "Active high"
+msgstr "Alto è attivo"
+
+#: devices/pic/base/pic_config.cpp:109 devices/pic/base/pic_config.cpp:112
+msgid "Active low"
+msgstr "Basso è attivo"
+
+#: libgui/project_manager.cpp:200 libgui/toplevel.cpp:242
+msgid "Add Current File"
+msgstr "Aggiunto file corrente"
+
+#: libgui/toplevel.cpp:240
+msgid "Add Object File..."
+msgstr "Aggiungi file oggetto..."
+
+#: libgui/project_manager.cpp:199 libgui/project_manager.cpp:214
+#, fuzzy
+msgid "Add Object Files..."
+msgstr "Aggiungi file oggetto..."
+
+#: libgui/toplevel.cpp:238
+msgid "Add Source File..."
+msgstr "Aggiungi file sorgente..."
+
+#: libgui/project_wizard.cpp:149
+#, fuzzy
+msgid "Add Source Files"
+msgstr "Aggiungi file sorgente..."
+
+#: libgui/project_manager.cpp:198 libgui/project_manager.cpp:219
+#, fuzzy
+msgid "Add Source Files..."
+msgstr "Aggiungi file sorgente..."
+
+#: libgui/project_wizard.cpp:151
+msgid "Add existing files."
+msgstr ""
+
+#: libgui/project_manager.cpp:314
+msgid "Add only"
+msgstr ""
+
+#: libgui/new_dialogs.cpp:66
+msgid "Add to project"
+msgstr "Aggiungi al progetto"
+
+#: libgui/breakpoint_view.cpp:49 piklab-coff/main.cpp:176
+msgid "Address"
+msgstr "Indirizzp"
+
+#: devices/pic/base/pic_config.cpp:129
+msgid "Address bus width (in bits)"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:50
+msgid "Advanced Dialog"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:393
+msgid "All"
+msgstr "Tutto"
+
+#: libgui/toplevel.cpp:553
+#, fuzzy
+msgid "All Files"
+msgstr "Tutti i file sorgente"
+
+#: common/common/purl_base.cpp:117
+msgid "All Object Files"
+msgstr "Tutti i file oggetto"
+
+#: common/common/purl_base.cpp:105
+msgid "All Source Files"
+msgstr "Tutti i file sorgente"
+
+#: piklab-prog/cli_interactive.cpp:192
+#, fuzzy
+msgid "All breakpoints removed."
+msgstr "Tutti i breakpoint sono stati rimossi"
+
+#: common/global/log.cpp:29
+msgid "All debug messages"
+msgstr ""
+
+#: tools/gputils/gputils_config.cpp:13 tools/c18/c18_config.cpp:12
+msgid "All messages"
+msgstr "Tutti i messaggi"
+
+#: devices/pic/prog/pic_prog.cpp:191
+#, fuzzy
+msgid "All or part of code memory is protected so it cannot be preserved. Continue anyway?"
+msgstr "  Parte della memoria del dispositivo è protetta (in %1), non è quindi possibile farne la verifica."
+
+#: devices/pic/prog/pic_prog.cpp:198
+msgid "All or part of data EEPROM is protected so it cannot be preserved. Continue anyway?"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:271
+msgid "Allow multiple reconfigurations"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:270
+msgid "Allow only one reconfiguration"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:275
+#, fuzzy
+msgid "Alternate"
+msgstr "Alternative"
+
+#: devices/pic/base/pic_config.cpp:272
+#, fuzzy
+msgid "Alternate I2C pins"
+msgstr "Alternative"
+
+#: devices/base/device_group.cpp:239
+msgid "Alternatives"
+msgstr "Alternative"
+
+#: devices/pic/base/pic_config.cpp:105
+msgid "Analog"
+msgstr ""
+
+#: coff/base/coff.cpp:22
+msgid "Archive"
+msgstr ""
+
+#: libgui/likeback.cpp:135
+msgid "Are you sure you do not want to participate anymore in the application enhancing program?"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:221
+msgid "Argument file type not recognized."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:196
+msgid "Argument should be breakpoint index."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:186
+#, fuzzy
+msgid "Arguments not recognized."
+msgstr "Programmatore non specificato."
+
+#: tools/gui/tool_config_widget.cpp:44
+msgid "Arguments:"
+msgstr "Argumenti:"
+
+#: coff/base/cdb_parser.cpp:23 coff/base/coff_object.cpp:180
+msgid "Array"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:59
+msgid "Asix Piccolo"
+msgstr "Asix Piccolo"
+
+#: progs/direct/base/direct_prog_config.cpp:61
+msgid "Asix Piccolo Grande"
+msgstr "Asix Piccolo Grande"
+
+#: tools/base/generic_tool.cpp:18 common/common/purl_base.cpp:20
+#: common/common/purl_base.cpp:25
+msgid "Assembler"
+msgstr "Assembler"
+
+#: common/common/purl_base.cpp:33
+#, fuzzy
+msgid "Assembler File"
+msgstr "Assembler"
+
+#: common/common/purl_base.cpp:34
+#, fuzzy
+msgid "Assembler File for PIC30"
+msgstr "File ASM per PIC30"
+
+#: common/common/purl_base.cpp:35
+#, fuzzy
+msgid "Assembler File for PICC"
+msgstr "File ASM per PICC"
+
+#: tools/base/generic_tool.cpp:18
+#, fuzzy
+msgid "Assembler:"
+msgstr "Assembler"
+
+#: devices/base/generic_memory.cpp:34
+msgid "At least one value (at address %1) is defined outside memory ranges."
+msgstr ""
+
+#: devices/mem24/mem24/mem24_memory.cpp:86 devices/pic/pic/pic_memory.cpp:545
+msgid "At least one word (at offset %1) is larger (%2) than the corresponding mask (%3)."
+msgstr ""
+
+#: common/global/about.cpp:79
+msgid "Author and maintainer."
+msgstr ""
+
+#: common/global/about.cpp:82
+msgid "Author of gputils"
+msgstr "Autore di gputils"
+
+#: common/global/about.cpp:83
+msgid "Author of likeback"
+msgstr "Autore di likeback"
+
+#: coff/base/coff_object.cpp:147
+#, fuzzy
+msgid "Auto Argument"
+msgstr "Argumenti:"
+
+#: tools/gui/tool_config_widget.cpp:24
+msgid "Automatic"
+msgstr "Automatico"
+
+#: coff/base/coff_object.cpp:129
+#, fuzzy
+msgid "Automatic Variable"
+msgstr "Automatico"
+
+#: libgui/global_config.cpp:20
+msgid "Automatically rebuild project before programming if it is modified."
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:351
+msgid "Bad checksum for read block: %1 (%2 expected)."
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:232
+msgid "Bad checksum for received string"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:68
+msgid "Bandgap voltage calibration"
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:59
+#: devices/pic/gui/pic_register_view.cpp:61
+msgid "Bank %1"
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:54
+msgid "Bank %1 (high)"
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:54
+msgid "Bank %1 (low)"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:51
+msgid "Baseline Family"
+msgstr ""
+
+#: common/common/purl_base.cpp:29
+msgid "Basic Compiler"
+msgstr "Compilatore Basic"
+
+#: common/common/purl_base.cpp:41
+msgid "Basic Source File"
+msgstr "File sorgente in Basic"
+
+#: coff/base/coff_object.cpp:149
+msgid "Beginning or End of Block"
+msgstr ""
+
+#: coff/base/coff_object.cpp:150
+msgid "Beginning or End of Function"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:20
+msgid "Bin to Hex"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:20
+msgid "Bin to Hex:"
+msgstr ""
+
+#: common/common/number.cpp:21
+msgid "Binary"
+msgstr "Binario"
+
+#: coff/base/cdb_parser.cpp:55
+#, fuzzy
+msgid "Bit Addressable"
+msgstr "Indirizzp"
+
+#: coff/base/cdb_parser.cpp:39 coff/base/coff_object.cpp:146
+#, fuzzy
+msgid "Bit Field"
+msgstr "Lista file"
+
+#: progs/base/generic_prog.cpp:36
+msgid "Blank Checking..."
+msgstr ""
+
+#: progs/base/prog_config.cpp:74
+msgid "Blank check after erase."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:49
+msgid "Blank check device memory."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:289
+msgid "Blank checking done."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:400
+#, fuzzy
+msgid "Blank checking successful."
+msgstr "Verifica avvenuta con successo"
+
+#: progs/base/generic_prog.cpp:287 progs/base/generic_prog.cpp:398
+msgid "Blank checking..."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:316
+msgid "Blank-checking device memory not supported for specified programmer."
+msgstr ""
+
+#: devices/mem24/mem24/mem24_group.cpp:38
+#: devices/pic/base/pic_protection.cpp:360
+#, fuzzy
+msgid "Block #%1"
+msgstr "Blocco %1"
+
+#: tools/boost/boostbasic.h:51
+msgid "BoostBasic Compiler for PIC16"
+msgstr "BoostBasic compilatore per PIC16"
+
+#: tools/boost/boostbasic.h:62
+msgid "BoostBasic Compiler for PIC18"
+msgstr "BoostBasic  compilatore per PIC18"
+
+#: tools/boost/boostc.h:51
+msgid "BoostC Compiler for PIC16"
+msgstr "BoostC  compilatore per PIC16"
+
+#: tools/boost/boostc.h:62
+msgid "BoostC Compiler for PIC18"
+msgstr "BoostC  compilatore per PIC18"
+
+#: tools/boost/boostcpp.h:51
+msgid "BoostC++ Compiler for PIC16"
+msgstr "BoostC++  compilatore per PIC16"
+
+#: tools/boost/boostcpp.h:62
+msgid "BoostC++ Compiler for PIC18"
+msgstr "BoostC++  compilatore per PIC18"
+
+#: devices/pic/base/pic_protection.cpp:351
+msgid "Boot Block"
+msgstr "Blocco di Avvio"
+
+#: devices/pic/base/pic_protection.cpp:350
+#, fuzzy
+msgid "Boot Segment"
+msgstr "Troppi argomenti."
+
+#: devices/pic/base/pic_config.cpp:125
+msgid "Boot block size"
+msgstr "Ampiezza blocco d'avvio"
+
+#: devices/pic/base/pic_config.cpp:23
+msgid "Boot code-protection"
+msgstr "Protezione codice avvio"
+
+#: devices/pic/base/pic_config.cpp:233
+#, fuzzy
+msgid "Boot segment EEPROM size"
+msgstr "Ampiezza blocco d'avvio"
+
+#: devices/pic/base/pic_config.cpp:234
+msgid "Boot segment RAM size"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:230
+msgid "Boot segment security"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:229
+#, fuzzy
+msgid "Boot segment size"
+msgstr "Ampiezza blocco d'avvio"
+
+#: devices/pic/base/pic_config.cpp:228
+#, fuzzy
+msgid "Boot segment write-protection"
+msgstr "Protezione scrittura settore d'avvio"
+
+#: devices/pic/base/pic_config.cpp:31
+msgid "Boot table read-protection"
+msgstr "Protezione lettura settore di avvio"
+
+#: devices/pic/base/pic_config.cpp:27
+msgid "Boot write-protection"
+msgstr "Protezione scrittura settore d'avvio"
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:89
+msgid "Bootloader identified device as: %1"
+msgstr ""
+
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:84
+msgid "Bootloader version %1 detected"
+msgstr ""
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:36
+msgid "Bootloader version %1 detected."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:231
+#, fuzzy
+msgid "Breaking..."
+msgstr "Cancellazione in corso..."
+
+#: piklab-prog/cli_interactive.cpp:161
+#, fuzzy
+msgid "Breakpoint already set at %1."
+msgstr "Breakpoint già impostato in %1"
+
+#: piklab-prog/cli_interactive.cpp:201
+#, fuzzy
+msgid "Breakpoint at %1 removed."
+msgstr "Il breakpoint in %1 è stato rimosso"
+
+#: libgui/gui_debug_manager.cpp:125
+msgid "Breakpoint at non-code line cannot be activated."
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:142
+msgid "Breakpoint at non-code line."
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:147
+msgid "Breakpoint corresponds to several addresses. Using the first one."
+msgstr "Il breakpoint indicato corrisponde a diversi indirizzi; usa il primo."
+
+#: piklab-prog/cli_interactive.cpp:197
+msgid "Breakpoint index too large."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:165
+#, fuzzy
+msgid "Breakpoint set at %1."
+msgstr "Breakpoint già impostato in %1"
+
+#: libgui/toplevel.cpp:150
+msgid "Breakpoints"
+msgstr "Breakpoint"
+
+#: piklab-prog/cli_interactive.cpp:172
+msgid "Breakpoints:"
+msgstr "Breakpoint:"
+
+#: devices/pic/base/pic_config.cpp:76
+msgid "Brown-out detect"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:89
+msgid "Brown-out reset software"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:84
+msgid "Brown-out reset voltage"
+msgstr ""
+
+#. i18n: file ./data/app_data/piklabui.rc line 76
+#: rc.cpp:24
+#, no-c-format
+msgid "Bu&ild"
+msgstr ""
+
+#: libgui/project_manager.cpp:194
+msgid "Build Project"
+msgstr ""
+
+#. i18n: file ./data/app_data/piklabui.rc line 155
+#: rc.cpp:45
+#, no-c-format
+msgid "Build Toolbar"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:53
+msgid "Building project..."
+msgstr ""
+
+#: common/common/purl_base.cpp:26
+msgid "C Compiler"
+msgstr "Compilatore C"
+
+#: common/common/purl_base.cpp:39
+msgid "C Header File"
+msgstr "File header C"
+
+#: common/common/purl_base.cpp:37
+msgid "C Source File"
+msgstr "File sorgente C"
+
+#: libgui/toplevel.cpp:193
+msgid "C&lose All"
+msgstr "Chiudi tutto"
+
+#: common/common/purl_base.cpp:28
+msgid "C++ Compiler"
+msgstr "Compilatore C++"
+
+#: common/common/purl_base.cpp:38
+msgid "C++ Source File"
+msgstr "File sorgente in C++"
+
+#: tools/c18/c18.h:42
+msgid "C18 Compiler"
+msgstr "Compilatore C18"
+
+#: devices/pic/base/pic.cpp:77
+msgid "CAN"
+msgstr ""
+
+#: tools/cc5x/cc5x.h:33
+#, fuzzy
+msgid "CC5X Compiler"
+msgstr "Compilatore CCS"
+
+#: devices/pic/base/pic.cpp:71
+msgid "CCP"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:88
+msgid "CCP1 multiplex"
+msgstr "Multiplex CCP1"
+
+#: devices/pic/base/pic_config.cpp:87
+msgid "CCP2 multiplex"
+msgstr "Multiplex CCP2"
+
+#: tools/ccsc/ccsc.h:36 coff/base/coff_object.cpp:38
+msgid "CCS Compiler"
+msgstr "Compilatore CCS"
+
+#: common/common/purl_base.cpp:54
+msgid "COD File"
+msgstr "File COD"
+
+#: tools/base/generic_tool.cpp:38
+#, fuzzy
+msgid "COFF"
+msgstr "File COFF"
+
+#: common/common/purl_base.cpp:55
+msgid "COFF File"
+msgstr "File COFF"
+
+#: coff/base/coff.cpp:67 coff/base/coff.cpp:77
+msgid "COFF file is truncated (offset: %1  nbBytes: %2  size:%3)."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:61
+msgid "COFF file to be used for debugging."
+msgstr ""
+
+#: piklab-coff/main.cpp:279
+#, fuzzy
+msgid "COFF filename."
+msgstr "Nome del file:"
+
+#: coff/base/coff_object.cpp:454
+msgid "COFF format not supported: magic number is %1."
+msgstr ""
+
+#: piklab-coff/main.cpp:212
+#, fuzzy
+msgid "COFF type:"
+msgstr "File COFF"
+
+#: devices/pic/base/pic_config.cpp:199
+msgid "CPU system clock (divided by)"
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:149
+msgid "CRC error from bootloader: retrying..."
+msgstr ""
+
+#: devices/base/hex_buffer.cpp:142
+msgid "CRC mismatch (line %1)."
+msgstr ""
+
+#: devices/pic/base/pic.cpp:26 progs/gui/prog_group_ui.cpp:92
+msgid "Calibration"
+msgstr "Calibrazione"
+
+#: devices/pic/base/pic.cpp:33
+msgid "Calibration Backup"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:22
+msgid "Calibration code-protection"
+msgstr ""
+
+#: progs/pickit2/base/pickit_prog.cpp:46
+msgid "Calibration firmware file seems incompatible with selected device %1."
+msgstr ""
+
+#: devices/pic/base/pic.cpp:239
+msgid "Calibration word at address %1 is blank."
+msgstr ""
+
+#: devices/pic/base/pic.cpp:245
+msgid "Calibration word is not a compatible opcode (%2)."
+msgstr ""
+
+#: tools/list/compile_manager.cpp:65
+msgid "Cannot build empty project."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:406
+msgid "Cannot erase ROM or EPROM device."
+msgstr "Non è possibile cancellare il dispositivo ROM o EPROM."
+
+#: devices/pic/prog/pic_prog.cpp:446
+msgid "Cannot erase protected code memory. Consider erasing the whole chip."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:450
+msgid "Cannot erase protected data EEPROM. Consider erasing the whole chip."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:464
+msgid "Cannot erase specified range because of programmer limitations."
+msgstr ""
+
+#: libgui/project_manager.cpp:420
+msgid "Cannot open without device specified."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:526
+msgid "Cannot read ROMless device."
+msgstr ""
+
+#: progs/pickit2/base/pickit2.cpp:116
+msgid "Cannot read voltages with this firmware version."
+msgstr ""
+
+#: libgui/gui_debug_manager.cpp:242
+msgid "Cannot show disassembly location for non-code line."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:250
+msgid "Cannot specify range without specifying device."
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:387
+msgid "Cannot start debugging session without input file (%1)."
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:372
+msgid "Cannot start debugging session without input file (not specified)."
+msgstr ""
+
+#: libgui/gui_prog_manager.cpp:34
+msgid "Cannot start debugging without a COFF file. Please compile the project."
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:138
+msgid "Cannot toggle target power since target is self-powered."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:606
+msgid "Cannot write ROM or ROMless device."
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:33 coff/base/coff_object.cpp:160
+#, fuzzy
+msgid "Char"
+msgstr "Pulisci"
+
+#: piklab-hex/main.cpp:25
+msgid "Check hex file for correctness (if a device is specified, check if hex file is compatible with it)."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:41
+msgid "Check this box to change DATA buffer direction."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:26 progs/direct/base/direct.cpp:29
+#: progs/direct/base/direct.cpp:32 progs/direct/base/direct.cpp:35
+msgid "Check this box to turn voltage on/off for this pin."
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:27
+msgid "Check this option if your hardware uses negative logic for this pin."
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:98
+msgid "Checksum Mask:"
+msgstr ""
+
+#: piklab-hex/main.cpp:178
+msgid "Checksum computation is experimental and is not always correct!"
+msgstr ""
+
+#: piklab-hex/main.cpp:180 libgui/hex_editor.cpp:189
+msgid "Checksum: %1"
+msgstr ""
+
+#: libgui/toplevel.cpp:250
+msgid "Clean"
+msgstr "Pulisci"
+
+#: libgui/project_manager.cpp:195
+msgid "Clean Project"
+msgstr "Pulisci progetto"
+
+#: piklab-hex/main.cpp:27
+msgid "Clean hex file and fix errors (wrong CRC, truncated line, truncated file)."
+msgstr ""
+
+#: libgui/toplevel.cpp:302
+msgid "Clear All Breakpoints"
+msgstr "Cancella tutti i breakpoint"
+
+#: piklab-prog/cli_interactive.cpp:47
+msgid "Clear a breakpoint \"clear 0\", \"clear e 0x04\", or clear all breakpoints \"clear all\"."
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:265
+msgid "Clear all watching"
+msgstr ""
+
+#: progs/direct/base/direct.cpp:30
+msgid "Clock"
+msgstr "Clock"
+
+#: progs/direct/gui/direct_config_widget.cpp:68
+msgid "Clock delay"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:264
+#, fuzzy
+msgid "Clock output"
+msgstr " (uscita)"
+
+#: devices/pic/base/pic_config.cpp:136
+msgid "Clock switching mode"
+msgstr ""
+
+#: libgui/editor_manager.cpp:403 libgui/toplevel.cpp:195
+msgid "Close All Others"
+msgstr "Chiudi tutti gli altri"
+
+#: libgui/toplevel.cpp:236
+msgid "Close Project"
+msgstr "Chiudi progetto"
+
+#: progs/gui/hardware_config_widget.cpp:91
+msgid "Closing will discard changes you have made. Close anyway?"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:50 coff/base/coff_object.cpp:332
+msgid "Code"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:51
+#, fuzzy
+msgid "Code / Static Segment"
+msgstr "Troppi argomenti."
+
+#: coff/base/cdb_parser.cpp:26
+#, fuzzy
+msgid "Code Pointer"
+msgstr "Codice memoria"
+
+#: devices/pic/base/pic_config.cpp:20
+msgid "Code code-protection"
+msgstr ""
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:53
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:163
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:111
+msgid "Code is present in bootloader reserved area (at address %1). It will be ignored."
+msgstr ""
+
+#: devices/pic/base/pic.cpp:25
+msgid "Code memory"
+msgstr "Codice memoria"
+
+#: devices/pic/base/pic_config.cpp:96
+msgid "Code protected microcontroller"
+msgstr "Codice Microcontrollore protetto"
+
+#: devices/pic/gui/pic_memory_editor.cpp:77
+#, fuzzy
+msgid "Code protection"
+msgstr "Codice protetto"
+
+#: devices/pic/base/pic_config.cpp:25
+msgid "Code write-protection"
+msgstr ""
+
+#: coff/base/coff_object.cpp:286 coff/base/coff_object.cpp:299
+msgid "Codeline has unknown symbol: %1"
+msgstr ""
+
+#: coff/base/coff_object.cpp:290 coff/base/coff_object.cpp:303
+msgid "Codeline is an auxiliary symbol: %1"
+msgstr ""
+
+#: piklab-coff/main.cpp:128
+#, fuzzy
+msgid "Command not available for COFF of type Archive."
+msgstr "Nessun dispositivo specificato"
+
+#: piklab-coff/main.cpp:204
+msgid "Command not available for COFF of type Object."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:453
+#, fuzzy
+msgid "Command-line programmer/debugger."
+msgstr "Connetti programmatore."
+
+#: piklab-hex/main.cpp:287
+msgid "Command-line utility to manipulate hex files."
+msgstr ""
+
+#: piklab-coff/main.cpp:278
+msgid "Command-line utility to view COFF files."
+msgstr ""
+
+#: libgui/likeback.cpp:659
+msgid "Comment Sent"
+msgstr "Commento inviato"
+
+#: devices/base/generic_device.cpp:33
+msgid "Commercial"
+msgstr "Commerciale"
+
+#: piklab-hex/main.cpp:28
+#, fuzzy
+msgid "Compare two hex files."
+msgstr "File sorgente C"
+
+#: progs/direct/base/direct_prog_config.cpp:83
+msgid "Compatible with ET-CAB10PIN V2 programmer shipped by Futurlec, with their PIC16F877 controler board."
+msgstr ""
+
+#: libgui/toplevel.cpp:138
+msgid "Compile Log"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:17 common/common/purl_base.cpp:21
+msgid "Compiler"
+msgstr "Compilatore"
+
+#: tools/base/generic_tool.cpp:17
+#, fuzzy
+msgid "Compiler:"
+msgstr "Compilatore"
+
+#: tools/list/compile_manager.cpp:29
+msgid "Compiling file..."
+msgstr "Compilazione file in corso..."
+
+#: coff/base/coff_object.cpp:326
+#, fuzzy
+msgid "Config"
+msgstr "Configura..."
+
+#: libgui/config_gen.cpp:145
+msgid "Config Generator"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:51
+msgid "Config Word Details"
+msgstr ""
+
+#: common/port/usb_port.cpp:242
+msgid "Configuration %1 not present: using %2"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:29
+msgid "Configuration Bits"
+msgstr ""
+
+#: coff/base/disassembler.cpp:282
+msgid "Configuration bits: adapt to your setup and needs"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:28
+msgid "Configuration write-protection"
+msgstr "Configurazione protezione scrittura"
+
+#: tools/gui/tool_config_widget.cpp:37
+msgid "Configuration:"
+msgstr "Configurazione:"
+
+#: libgui/toplevel_ui.cpp:40
+msgid "Configure Compilation..."
+msgstr ""
+
+#: libgui/config_center.cpp:113
+msgid "Configure Piklab"
+msgstr "Configura Piklab"
+
+#: libgui/toplevel_ui.cpp:39
+msgid "Configure Toolchain..."
+msgstr ""
+
+#: tools/gui/toolchain_config_center.cpp:24
+msgid "Configure Toolchains"
+msgstr ""
+
+#: libgui/toplevel.cpp:320
+msgid "Configure Toolchains..."
+msgstr ""
+
+#: libgui/toplevel.cpp:346
+#, fuzzy
+msgid "Configure email..."
+msgstr "Configura..."
+
+#: libgui/project_manager.cpp:186 libgui/toplevel_ui.cpp:22
+#: libgui/likeback.cpp:89
+msgid "Configure..."
+msgstr "Configura..."
+
+#: piklab-prog/cmdline.cpp:35
+msgid "Connect programmer."
+msgstr "Connetti programmatore."
+
+#: progs/gui/hardware_config_widget.cpp:61
+msgid "Connected"
+msgstr "Connesso"
+
+#: devices/pic/base/pic_config.cpp:224
+#, fuzzy
+msgid "Connected to EMB"
+msgstr "Connesso"
+
+#: progs/base/generic_prog.cpp:108
+#, fuzzy
+msgid "Connected."
+msgstr "Connesso"
+
+#: progs/base/generic_prog.cpp:81
+msgid "Connecting %1 on %2 with device %3..."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:75
+msgid "Connecting %1 with device %2..."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:89
+msgid "Connecting..."
+msgstr "Connessione in corso..."
+
+#: progs/gui/prog_config_center.cpp:92
+msgid "Connection: Error"
+msgstr "Connessione: Errore"
+
+#: progs/gui/prog_config_center.cpp:92
+msgid "Connection: Ok"
+msgstr "Connessione: Ok"
+
+#: tools/pic30/pic30_generator.cpp:51
+#, fuzzy
+msgid "Constants in program space"
+msgstr "Connetti programmatore."
+
+#: libgui/toplevel.cpp:905
+msgid "Continue Anyway"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:284
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:86
+msgid "Continue with the specified device name: \"%1\"..."
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:81
+msgid "Continuously send 0xA55A on \"Data out\" pin."
+msgstr ""
+
+#: libgui/project_manager.cpp:314
+msgid "Copy and Add"
+msgstr ""
+
+#: libgui/config_gen.cpp:66
+msgid "Copy to clipboard"
+msgstr "Copia negli appunti"
+
+#: libgui/project_manager.cpp:325
+msgid "Copying file to project directory failed."
+msgstr ""
+
+#: common/port/usb_port.cpp:259
+msgid "Could not claim USB interface %1"
+msgstr ""
+
+#: common/port/parallel.cpp:173
+msgid "Could not claim device \"%1\": check it is read/write enabled"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:121
+msgid "Could not connect programmer."
+msgstr ""
+
+#: progs/psp/base/psp_serial.cpp:40
+msgid "Could not contact Picstart+"
+msgstr ""
+
+#: common/gui/purl_ext.cpp:31
+msgid "Could not copy file"
+msgstr ""
+
+#: common/gui/purl_ext.cpp:108
+msgid "Could not create directory"
+msgstr ""
+
+#: common/gui/purl_ext.cpp:52
+msgid "Could not create file"
+msgstr ""
+
+#: common/gui/pfile_ext.cpp:24 common/gui/pfile_ext.cpp:109
+msgid "Could not create temporary file."
+msgstr ""
+
+#: common/gui/purl_ext.cpp:75
+msgid "Could not delete file."
+msgstr ""
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:35
+msgid "Could not detect \"gpsim\" version"
+msgstr ""
+
+#: progs/direct/base/direct_mem24.cpp:51
+msgid "Could not detect EEPROM"
+msgstr ""
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:31
+msgid "Could not detect device in bootloader mode."
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:64 libgui/device_gui.cpp:263
+msgid "Could not detect supported devices for \"%1\". Please check installation."
+msgstr ""
+
+#: libgui/config_gen.cpp:131
+msgid "Could not detect supported devices for selected toolchain. Please check installation."
+msgstr ""
+
+#: libgui/device_gui.cpp:268
+msgid "Could not detect supported devices for toolchain \"%1\". Please check installation."
+msgstr ""
+
+#: coff/base/coff_object.cpp:567
+msgid "Could not determine processor (%1)."
+msgstr ""
+
+#: libgui/console.cpp:30
+msgid "Could not find \"konsolepart\"; please install kdebase."
+msgstr ""
+
+#: common/port/usb_port.cpp:210
+msgid "Could not find USB device (vendor=%1 product=%2)."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:155
+msgid "Could not find debug executive file \"%1\"."
+msgstr ""
+
+#: piklab-prog/cli_prog_manager.cpp:28
+msgid "Could not find device \"%1\" as serial or parallel port. Will try to open as serial port."
+msgstr ""
+
+#: tools/mpc/mpc_compile.cpp:40 tools/ccsc/ccsc_compile.cpp:86
+msgid "Could not find error file (%1)."
+msgstr ""
+
+#: libgui/project_manager.cpp:307
+msgid "Could not find file."
+msgstr ""
+
+#: progs/icd2/base/icd2_prog.cpp:90
+msgid "Could not find firmware file \"%1\" in directory \"%2\"."
+msgstr ""
+
+#: common/port/serial.cpp:329
+msgid "Could not flush device"
+msgstr ""
+
+#: common/port/serial.cpp:165
+msgid "Could not get file descriptor parameters"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:173
+msgid "Could not load hex file \"%1\"."
+msgstr ""
+
+#: common/port/serial.cpp:198
+msgid "Could not modify file descriptor flags"
+msgstr ""
+
+#: common/port/parallel.cpp:169 common/port/parallel.cpp:179
+msgid "Could not open device \"%1\""
+msgstr ""
+
+#: common/port/serial.cpp:190
+msgid "Could not open device \"%1\" read-write"
+msgstr ""
+
+#: common/gui/pfile_ext.cpp:58 common/cli/cli_pfile.cpp:37
+msgid "Could not open file for reading."
+msgstr ""
+
+#: common/cli/cli_pfile.cpp:19
+msgid "Could not open file for writing."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:320
+msgid "Could not open filename \"%1\"."
+msgstr ""
+
+#: progs/icd2/base/icd2_prog.cpp:100 progs/icd2/base/icd2_debug.cpp:162
+#: progs/pickit2/base/pickit_prog.cpp:35 progs/base/generic_prog.cpp:250
+msgid "Could not open firmware file \"%1\"."
+msgstr ""
+
+#: libgui/project_manager.cpp:531
+msgid "Could not open project file."
+msgstr ""
+
+#: common/gui/pfile_ext.cpp:63
+msgid "Could not open temporary file."
+msgstr ""
+
+#: progs/pickit2/base/pickit_prog.cpp:42
+msgid "Could not read calibration firmware file \"%1\" (%2)."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:168
+msgid "Could not read debug executive file \"%1\": %2."
+msgstr ""
+
+#: progs/pickit2/base/pickit2_prog.cpp:56
+msgid "Could not read firmware hex file \"%1\" (%2)."
+msgstr ""
+
+#: progs/icd2/base/icd_prog.cpp:22
+msgid "Could not read firmware hex file \"%1\": %2."
+msgstr ""
+
+#: coff/base/coff.cpp:93
+msgid "Could not recognize file (magic number is %1)."
+msgstr ""
+
+#: progs/gpsim/base/gpsim.cpp:127
+msgid "Could not recognize gpsim version."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:381
+msgid "Could not restore band gap bits because programmer does not support writing config bits."
+msgstr ""
+
+#: libgui/toplevel.cpp:715
+msgid "Could not run \"kfind\""
+msgstr ""
+
+#: libgui/toplevel.cpp:731
+msgid "Could not run \"pikloops\""
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:67
+msgid "Could not save configuration: hardware name is empty."
+msgstr ""
+
+#: common/gui/pfile_ext.cpp:45
+msgid "Could not save file."
+msgstr ""
+
+#: libgui/project_manager.cpp:245
+msgid "Could not save project file \"%1\"."
+msgstr ""
+
+#: common/port/serial.cpp:180
+msgid "Could not set file descriptor parameters"
+msgstr ""
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:34
+msgid "Could not start \"gpsim\""
+msgstr ""
+
+#: common/gui/pfile_ext.cpp:94
+msgid "Could not write to temporary file."
+msgstr ""
+
+#: libgui/new_dialogs.cpp:61
+msgid "Create New File"
+msgstr "Crea un nuovo file"
+
+#: piklab-hex/main.cpp:30
+#, fuzzy
+msgid "Create an hex file for the specified device."
+msgstr "Aggiornamento del firmware non è supportato dal programmatore specificato."
+
+#: libgui/project_wizard.cpp:150
+msgid "Create template source file."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:46
+msgid "Crystal/resonator"
+msgstr "Cristallo/risuonatore"
+
+#: devices/pic/base/pic_config.cpp:47
+#, fuzzy
+msgid "Crystal/resonator, PLL enabled"
+msgstr "Cristallo/risuonatore"
+
+#: tools/gui/tool_config_widget.cpp:24 tools/custom/custom.h:21
+msgid "Custom"
+msgstr ""
+
+#: tools/gui/tool_config_widget.cpp:109
+msgid "Custom libraries:"
+msgstr "Librerie personalizzate:"
+
+#: tools/gui/tool_config_widget.cpp:99
+msgid "Custom options:"
+msgstr "Opzioni personalizzate:"
+
+#: tools/list/tools_config_widget.cpp:81
+#, fuzzy
+msgid "Custom shell commands:"
+msgstr "Comandi supportati:"
+
+#: devices/pic/prog/pic_prog.cpp:610
+msgid "DEBUG configuration bit is on. Are you sure you want to continue programming the chip?"
+msgstr ""
+
+#: devices/base/generic_device.cpp:61
+#, fuzzy
+msgid "DFN"
+msgstr "DFN-S"
+
+#: devices/base/generic_device.cpp:56
+msgid "DFN-S"
+msgstr "DFN-S"
+
+#: devices/pic/base/pic.cpp:30
+msgid "Data EEPROM"
+msgstr "Dati EEPROM"
+
+#: progs/direct/base/direct.cpp:36
+msgid "Data In"
+msgstr "Ingresso dati"
+
+#: progs/direct/base/direct.cpp:33
+msgid "Data Out"
+msgstr "Uscita dati"
+
+#: progs/direct/base/direct.cpp:39
+msgid "Data R/W"
+msgstr "Lettura/Scrittura dati"
+
+#: devices/pic/base/pic_config.cpp:21
+msgid "Data code-protection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:26
+msgid "Data write-protection"
+msgstr "Protezione scrittura dati"
+
+#: tools/list/device_info.cpp:33
+msgid "Datasheet"
+msgstr ""
+
+#: progs/icd2/gui/icd2_group_ui.cpp:29
+msgid "Debug Executive"
+msgstr ""
+
+#: coff/base/coff_object.cpp:125
+msgid "Debug Symbol"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:31
+msgid "Debug Vector"
+msgstr ""
+
+#. i18n: file ./data/app_data/piklabui.rc line 177
+#: rc.cpp:51
+#, no-c-format
+msgid "Debugger Toolbar"
+msgstr ""
+
+#: progs/gui/debug_config_center.h:21 progs/gui/debug_config_center.h:22
+msgid "Debugging Options"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:282 piklab-prog/cmdline.cpp:287
+msgid "Debugging is not supported for specified programmer."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:275
+#, fuzzy
+msgid "Debugging test successful"
+msgstr "Verifica avvenuta con successo"
+
+#: common/common/number.cpp:19
+msgid "Decimal"
+msgstr "Decimale"
+
+#: devices/pic/base/pic_config.cpp:126
+msgid "Dedicated in-circuit port"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:211
+msgid "Default system clock select"
+msgstr ""
+
+#: libgui/project_editor.cpp:36
+#, fuzzy
+msgid "Description:"
+msgstr "Descrizione"
+
+#: piklab-hex/main.cpp:102 piklab-coff/main.cpp:73
+#, fuzzy
+msgid "Destination file already exists."
+msgstr "Informazioni sui registri non disponibile."
+
+#: devices/pic/gui/pic_config_word_editor.cpp:116
+msgid "Details..."
+msgstr "Dettagli..."
+
+#: tools/gui/toolchain_config_widget.cpp:190
+msgid "Detected (%1)"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug_specific.cpp:241
+msgid "Detected custom ICD2"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:127
+msgid "Detected ports supported by \"%1\":"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:128
+msgid "Detected ports:"
+msgstr "Porte rilevate:"
+
+#: tools/gui/toolchain_config_widget.cpp:235
+msgid "Detecting \"%1\"..."
+msgstr "Rilevazione \"%1\"..."
+
+#: tools/gui/toolchain_config_widget.cpp:251
+msgid "Detecting ..."
+msgstr "Rilevazione in corso ..."
+
+#: libgui/editor_manager.cpp:478 libgui/device_gui.cpp:175
+#: libgui/project_manager_ui.cpp:33
+msgid "Device"
+msgstr "Dispositivo"
+
+#: devices/pic/base/pic.cpp:28 coff/base/coff_object.cpp:327
+msgid "Device ID"
+msgstr "ID dispositivo"
+
+#: tools/list/device_info.cpp:21
+#, fuzzy
+msgid "Device Page"
+msgstr "Dispositivo"
+
+#: libgui/toplevel.cpp:258
+msgid "Device Power"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:89
+msgid "Device detection:"
+msgstr "Rilevazione dispositivo:"
+
+#: libgui/device_editor.cpp:66
+msgid "Device guessed from file: %1"
+msgstr ""
+
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:159
+msgid "Device memory does not match hex file (at address 0x%2: reading 0x%3 and expecting 0x%4)."
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:104
+msgid "Device memory does not match hex file (in %1 at address %2: reading %3 and expecting %4)."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:253
+msgid "Device memory doesn't match debug executive (at address %1: reading %2 and expecting %3)."
+msgstr ""
+
+#: devices/mem24/prog/mem24_prog.cpp:42
+msgid "Device memory doesn't match hex file (at address %1: reading %2 and expecting %3)."
+msgstr ""
+
+#: devices/mem24/prog/mem24_prog.cpp:40
+msgid "Device memory is not blank (at address %1: reading %2 and expecting %3)."
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:101
+msgid "Device memory is not blank (in %1 at address %2: reading %3 and expecting %4)."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:253
+msgid "Device not autodetectable: continuing with the specified device name \"%1\"..."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:126
+msgid "Device not in programming"
+msgstr ""
+
+#: piklab-hex/main.cpp:104 piklab-prog/cmdline.cpp:157 piklab-coff/main.cpp:75
+msgid "Device not specified."
+msgstr "Dispositivo non specificato."
+
+#: libgui/config_gen.cpp:132
+msgid "Device not supported by the selected toolchain."
+msgstr ""
+
+#: libgui/config_gen.cpp:32 libgui/config_center.cpp:66
+#: libgui/project_editor.cpp:46 libgui/project_wizard.cpp:129
+#: coff/base/text_coff.cpp:254
+msgid "Device:"
+msgstr "Dispositivo:"
+
+#: devices/pic/base/pic_config.cpp:104
+msgid "Digital"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:263
+msgid "Digital I/O"
+msgstr ""
+
+#: coff/base/coff_object.cpp:52
+#, fuzzy
+msgid "Direct"
+msgstr "Cartella dei sorgenti"
+
+#: progs/direct/base/direct_prog.h:59
+msgid "Direct Programmer"
+msgstr ""
+
+#: common/global/about.cpp:87
+msgid "Direct programming for 16F676/630."
+msgstr ""
+
+#: common/global/about.cpp:89
+msgid "Direct programming for 16F73/74/76/77."
+msgstr ""
+
+#: common/global/about.cpp:93
+msgid "Direct programming for 24C EEPROM is inspired from his program \"prog84\"."
+msgstr ""
+
+#: common/global/about.cpp:86
+msgid "Direct programming for PIC18F devices."
+msgstr ""
+
+#: common/global/about.cpp:92
+msgid "Direct programming for dsPICs is inspired from his program \"dspicprg\"."
+msgstr ""
+
+#: libgui/project_wizard.cpp:181
+msgid "Directory does not exists. Create it?"
+msgstr ""
+
+#: libgui/project_wizard.cpp:176
+msgid "Directory is empty."
+msgstr ""
+
+#: libgui/project_wizard.cpp:125
+#, fuzzy
+msgid "Directory:"
+msgstr "Cartella dei sorgenti"
+
+#: libgui/breakpoint_view.cpp:27
+msgid "Disable breakpoint"
+msgstr "Disabilita breakpoint"
+
+#: devices/pic/base/pic_config.cpp:91 devices/pic/base/pic_config.cpp:191
+#: devices/pic/base/pic_config.cpp:215 devices/pic/base/pic_config.cpp:394
+#: devices/pic/base/pic_config.cpp:398
+msgid "Disabled"
+msgstr "Disabilitato"
+
+#: devices/pic/base/pic_config.cpp:36
+msgid "Disabled (connected to Vdd)"
+msgstr "Disabilitato (connesso a Vdd)"
+
+#: progs/icd2/base/icd2_debug.cpp:215
+msgid "Disabling code program protection for debugging"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:223
+msgid "Disabling code read protection for debugging"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:219
+msgid "Disabling code write protection for debugging"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:211
+msgid "Disabling watchdog timer for debugging"
+msgstr ""
+
+#: libgui/object_view.cpp:139
+msgid "Disassembling content of hex file editor."
+msgstr ""
+
+#: libgui/object_view.cpp:126
+msgid "Disassembling hex file: %1"
+msgstr ""
+
+#: libgui/project_manager.cpp:380
+msgid "Disassembly"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:98
+msgid "Disassembly Listing"
+msgstr ""
+
+#: libgui/object_view.cpp:120
+msgid "Disassembly not supported for the selected device."
+msgstr ""
+
+#: libgui/object_view.cpp:115
+msgid "Disassembly not supported for the selected toolchain."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:42
+msgid "Disconnect programmer."
+msgstr "Disconnetti programmatore."
+
+#: progs/manager/prog_manager.cpp:150
+msgid "Disconnecting..."
+msgstr "Disconnessione..."
+
+#: common/cli/cli_main.cpp:55
+msgid "Display all debug messages."
+msgstr ""
+
+#: common/cli/cli_main.cpp:53
+msgid "Display debug messages."
+msgstr ""
+
+#: common/cli/cli_main.cpp:54
+msgid "Display extra debug messages."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:37
+msgid "Display help."
+msgstr ""
+
+#: common/cli/cli_main.cpp:56
+#, fuzzy
+msgid "Display low level debug messages."
+msgstr "Tutti i messaggi"
+
+#: piklab-prog/cli_interactive.cpp:33
+msgid "Display the list of available properties."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:36
+msgid "Display the list of memory ranges."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:34
+msgid "Display the list of registers."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:35
+msgid "Display the list of variables."
+msgstr ""
+
+#: libgui/likeback.cpp:136
+msgid "Do not Help Anymore"
+msgstr ""
+
+#: libgui/project_wizard.cpp:152
+msgid "Do not add files now."
+msgstr ""
+
+#: libgui/likeback.cpp:603
+msgid "Do not ask for features: your wishes will be ignored."
+msgstr ""
+
+#: common/cli/cli_main.cpp:57
+msgid "Do not display messages."
+msgstr "Non visualizzare i messaggi."
+
+#: progs/gui/hardware_config_widget.cpp:200
+msgid "Do you want to delete custom hardware \"%1\"?"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:678
+msgid "Do you want to overwrite the device calibration with %1?"
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:76
+msgid "Do you want to overwrite this custom hardware \"%1\"?"
+msgstr ""
+
+#: tools/list/device_info.cpp:35
+#, fuzzy
+msgid "Documents"
+msgstr "Argumenti:"
+
+#: coff/base/coff_object.cpp:165
+msgid "Double"
+msgstr ""
+
+#: coff/base/coff_object.cpp:148
+msgid "Dummy Entry (end of block)"
+msgstr ""
+
+#: coff/base/coff_object.cpp:154
+msgid "Duplicate Tag"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:78
+msgid "ECAN"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:130
+msgid "ECCP mux"
+msgstr "ECCP mux"
+
+#: devices/mem24/gui/mem24_memory_editor.cpp:41
+#, fuzzy
+msgid "EEPROM Memory"
+msgstr "Memoria Eeprom"
+
+#: progs/direct/base/direct_mem24.cpp:54
+#, fuzzy
+msgid "EEPROM detected"
+msgstr "Eeprom rilevata"
+
+#: progs/direct/base/direct_prog_config.cpp:72
+msgid "EL Cheapo classic"
+msgstr "EL Cheapo classic"
+
+#: tools/base/generic_tool.cpp:39
+#, fuzzy
+msgid "ELF"
+msgstr "MLF"
+
+#: progs/direct/base/direct_prog_config.cpp:76
+msgid "EPE Toolkit mk3"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:38
+msgid "EPIC+"
+msgstr "EPIC+"
+
+#: devices/base/generic_device.cpp:27
+msgid "EPROM (OTP)"
+msgstr "EPROM (OTP)"
+
+#: progs/direct/base/direct_prog_config.cpp:80
+msgid "ETT High Vpp"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:82
+msgid "ETT Low Vpp"
+msgstr ""
+
+#: libgui/likeback.cpp:176
+msgid "Each time you have a great or frustrating experience, please click the appropriate hand below the window title-bar, briefly describe what you like or dislike and click Send."
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:36
+msgid "Edit and test hardware"
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:159
+msgid "Edit/Test..."
+msgstr "Modifica/Verifica..."
+
+#: common/common/purl_base.cpp:50
+msgid "Elf File"
+msgstr "File Elf"
+
+#: libgui/breakpoint_view.cpp:27
+msgid "Enable breakpoint"
+msgstr "Abilita breakpoint"
+
+#: devices/pic/base/pic_config.cpp:397
+msgid "Enabled"
+msgstr "Abilitato"
+
+#: devices/pic/base/pic_config.cpp:77
+msgid "Enabled in run - Disabled in sleep"
+msgstr ""
+
+#: devices/base/generic_device.cpp:20
+msgid "End Of Life"
+msgstr ""
+
+#: coff/base/coff_object.cpp:151
+msgid "End of Structure"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:104
+#, fuzzy
+msgid "End of all code sections"
+msgstr "Mostra tutte le opzioni"
+
+#: piklab-prog/cli_interactive.cpp:346
+msgid "End of command file reached."
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:861
+msgid "End of options"
+msgstr ""
+
+#: piklab-hex/main.cpp:141
+#, fuzzy
+msgid "End:"
+msgstr "Indice:"
+
+#: coff/base/coff_object.cpp:168
+#, fuzzy
+msgid "Enumeration"
+msgstr "Configurazione:"
+
+#: coff/base/coff_object.cpp:143
+msgid "Enumeration Tag"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:47
+msgid "Erase device memory."
+msgstr "Cancellazione memoria dispositivo."
+
+#: progs/psp/base/psp.cpp:342
+msgid "Erase failed"
+msgstr ""
+
+#: progs/icd1/base/icd1.cpp:155
+msgid "Erase failed (returned value is %1)"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:311
+msgid "Erasing device memory not supported for specified programmer."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:284
+msgid "Erasing done"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:35 progs/base/generic_prog.cpp:282
+msgid "Erasing..."
+msgstr "Cancellazione in corso..."
+
+#: common/port/serial.cpp:300
+msgid "Error checking for data in output buffer"
+msgstr ""
+
+#: common/port/serial.cpp:475
+msgid "Error clearing up break"
+msgstr ""
+
+#: libgui/project_wizard.cpp:183
+#, fuzzy
+msgid "Error creating directory."
+msgstr "Cartella firmware"
+
+#: libgui/project_wizard.cpp:246
+#, fuzzy
+msgid "Error creating template file."
+msgstr "Errore nel caricamento del firmware."
+
+#: common/port/usb_port.cpp:217 common/port/usb_port.cpp:231
+msgid "Error opening USB device."
+msgstr ""
+
+#: common/global/xml_data_file.cpp:29
+#, fuzzy
+msgid "Error opening file: %1"
+msgstr "Errore nel caricamento del firmware."
+
+#: libgui/object_view.cpp:87
+#, fuzzy
+msgid "Error parsing library:\n"
+msgstr "Errore nel caricamento del firmware."
+
+#: libgui/object_view.cpp:70
+#, fuzzy
+msgid "Error parsing object:\n"
+msgstr "Errore nel caricamento del firmware."
+
+#: progs/direct/base/direct_16.cpp:108
+msgid "Error programming %1 at %2."
+msgstr ""
+
+#: common/port/parallel.cpp:231
+msgid "Error reading bit on pin %1"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:238 progs/sdcdb/base/sdcdb_debug.cpp:237
+msgid "Error reading driven state of IO bit: %1"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:225 progs/gpsim/base/gpsim_debug.cpp:231
+#: progs/sdcdb/base/sdcdb_debug.cpp:224 progs/sdcdb/base/sdcdb_debug.cpp:230
+msgid "Error reading driving state of IO bit: %1"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:107 progs/gpsim/base/gpsim_debug.cpp:129
+#: progs/sdcdb/base/sdcdb_debug.cpp:128
+msgid "Error reading register \"%1\""
+msgstr ""
+
+#: progs/sdcdb/base/sdcdb_debug.cpp:106
+msgid "Error reading register \"W\""
+msgstr ""
+
+#: common/port/serial.cpp:409
+msgid "Error reading serial pin %1"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:207 progs/sdcdb/base/sdcdb_debug.cpp:206
+msgid "Error reading state of IO bit: %1"
+msgstr ""
+
+#: common/port/serial.cpp:261 common/port/serial.cpp:274
+msgid "Error receiving data"
+msgstr ""
+
+#: common/port/usb_port.cpp:393
+msgid "Error receiving data (ep=%1 res=%2)"
+msgstr ""
+
+#: common/port/usb_port.cpp:224
+msgid "Error resetting USB device."
+msgstr ""
+
+#: common/global/xml_data_file.cpp:51
+#, fuzzy
+msgid "Error saving file: %1"
+msgstr "Errore nel caricamento del firmware."
+
+#: progs/gpsim/base/gpsim.cpp:94
+msgid "Error send a signal to the subprocess."
+msgstr ""
+
+#: common/port/usb_port.cpp:294
+msgid "Error sending control message to USB port."
+msgstr ""
+
+#: common/port/serial.cpp:229
+msgid "Error sending data"
+msgstr ""
+
+#: common/port/usb_port.cpp:359
+msgid "Error sending data (ep=%1 res=%2)"
+msgstr ""
+
+#: common/port/usb_port.cpp:246
+msgid "Error setting USB configuration %1."
+msgstr ""
+
+#: common/port/serial.cpp:367
+msgid "Error setting bit %1 of serial port to %2"
+msgstr ""
+
+#: common/port/parallel.cpp:211
+msgid "Error setting pin %1 to %2"
+msgstr ""
+
+#: common/port/serial.cpp:466
+msgid "Error setting up break"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:148
+msgid "Error uploading firmware."
+msgstr "Errore nel caricamento del firmware."
+
+#: common/port/serial.cpp:311
+msgid "Error while draining"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:306 libgui/hex_editor.cpp:150
+msgid "Error while writing file \"%1\"."
+msgstr ""
+
+#: libgui/hex_editor.cpp:133
+#, fuzzy
+msgid "Error(s) reading hex file."
+msgstr "Errore nel caricamento del firmware."
+
+#: tools/gputils/gputils_config.cpp:13 tools/c18/c18_config.cpp:12
+msgid "Errors only"
+msgstr "Solo errori"
+
+#: devices/pic/base/pic.cpp:79
+#, fuzzy
+msgid "Ethernet"
+msgstr "Esteso"
+
+#: devices/pic/base/pic_config.cpp:210
+msgid "Ethernet LED enable"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:110
+msgid "Even PWM output polarity"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:43
+#, fuzzy
+msgid "Executable"
+msgstr "Tipo di eseguibile:"
+
+#: tools/gui/toolchain_config_widget.cpp:52
+msgid "Executable Type:"
+msgstr "Tipo di eseguibile:"
+
+#: tools/base/generic_tool.cpp:30
+msgid "Executable directory"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:290
+msgid "Executing custom commands..."
+msgstr ""
+
+#: devices/base/generic_device.cpp:35
+msgid "Extended"
+msgstr "Esteso"
+
+#: devices/pic/base/pic_config.cpp:124
+msgid "Extended instruction set"
+msgstr "Impostazione istruzioni estese"
+
+#: devices/pic/base/pic_config.cpp:93
+msgid "Extended microcontroller"
+msgstr "Microcontrollore esteso"
+
+#: devices/pic/base/pic_config.cpp:35
+msgid "External"
+msgstr "Esterno"
+
+#: coff/base/coff_object.cpp:133
+#, fuzzy
+msgid "External Definition"
+msgstr "Resistore esterno"
+
+#: coff/base/cdb_parser.cpp:53
+#, fuzzy
+msgid "External RAM"
+msgstr "Esterno"
+
+#: coff/base/cdb_parser.cpp:27
+#, fuzzy
+msgid "External RAM Pointer"
+msgstr "Oscillatore RC esterno"
+
+#: devices/pic/base/pic_config.cpp:40
+msgid "External RC oscillator"
+msgstr "Oscillatore RC esterno"
+
+#: devices/pic/base/pic_config.cpp:42 devices/pic/base/pic_config.cpp:159
+#: devices/pic/base/pic_config.cpp:185
+msgid "External RC oscillator (no CLKOUT)"
+msgstr "Oscillatore RC esterno (senza CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:41 devices/pic/base/pic_config.cpp:158
+#: devices/pic/base/pic_config.cpp:184
+msgid "External RC oscillator with CLKOUT"
+msgstr "Oscillatore RC esterno con CLKOUT"
+
+#: coff/base/cdb_parser.cpp:48
+#, fuzzy
+msgid "External Stack"
+msgstr "Clock esterno"
+
+#: coff/base/coff_object.cpp:130
+#, fuzzy
+msgid "External Symbol"
+msgstr "Esterno"
+
+#: devices/pic/base/pic_config.cpp:219
+#, fuzzy
+msgid "External address bus shift"
+msgstr "Resistore esterno"
+
+#: devices/pic/base/pic_config.cpp:128
+msgid "External bus data wait"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:102
+msgid "External bus data width (in bits)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:49 devices/pic/base/pic_config.cpp:260
+msgid "External clock"
+msgstr "Clock esterno"
+
+#: devices/pic/base/pic_config.cpp:51 devices/pic/base/pic_config.cpp:153
+#: devices/pic/base/pic_config.cpp:174
+msgid "External clock (no CLKOUT)"
+msgstr "Clock esterno (senza CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:53
+#, fuzzy
+msgid "External clock (no CLKOUT), PLL enabled"
+msgstr "Clock esterno (senza CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:156 devices/pic/base/pic_config.cpp:177
+msgid "External clock with 16x PLL"
+msgstr "Clock esterno con PLL 16x"
+
+#: devices/pic/base/pic_config.cpp:154 devices/pic/base/pic_config.cpp:175
+msgid "External clock with 4x PLL"
+msgstr "Clock esterno con PLL 4x"
+
+#: devices/pic/base/pic_config.cpp:55
+msgid "External clock with 4x PLL (no CLKOUT)"
+msgstr "Clock esterno con PLL 4x (senza CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:54
+msgid "External clock with 4x PLL and with CLKOUT"
+msgstr "Clock esterno con PLL 4x e con CLKOUT"
+
+#: devices/pic/base/pic_config.cpp:155 devices/pic/base/pic_config.cpp:176
+msgid "External clock with 8x PLL"
+msgstr "Clock esterno con PLL 8x"
+
+#: devices/pic/base/pic_config.cpp:50 devices/pic/base/pic_config.cpp:152
+#: devices/pic/base/pic_config.cpp:173
+msgid "External clock with CLKOUT"
+msgstr "Clock esterno con CLKOUT"
+
+#: devices/pic/base/pic_config.cpp:52
+#, fuzzy
+msgid "External clock with CLKOUT, PLL enabled"
+msgstr "Clock esterno con CLKOUT"
+
+#: devices/pic/base/pic_config.cpp:56
+msgid "External clock with software controlled 4x PLL (no CLKOUT)"
+msgstr "Clock esterno con PLL 4x controllato via software (senza CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:214
+#, fuzzy
+msgid "External memory bus"
+msgstr "Resistore esterno"
+
+#: devices/pic/base/pic_config.cpp:57
+msgid "External resistor"
+msgstr "Resistore esterno"
+
+#: devices/pic/base/pic_config.cpp:59
+msgid "External resistor (no CLKOUT)"
+msgstr "Clock esterno (senza CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:58
+msgid "External resistor with CLKOUT"
+msgstr "Resistore esterno con CLKOUT"
+
+#: common/global/log.cpp:27
+msgid "Extra debug messages"
+msgstr ""
+
+#: devices/base/device_group.cpp:295
+msgid "F (MHz)"
+msgstr "F (MHz)"
+
+#: devices/pic/base/pic_config.cpp:120
+msgid "FLTA mux"
+msgstr "FLTA mux"
+
+#: devices/pic/base/pic_config.cpp:212
+msgid "FOSC1:FOSC0"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:27
+msgid "Fail"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:79
+msgid "Fail-safe clock monitor"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:250
+msgid "Failed"
+msgstr ""
+
+#: libgui/project_manager.cpp:503
+#, fuzzy
+msgid "Failed to create new project file"
+msgstr "Seleziona file del progetto"
+
+#: tools/list/compile_manager.cpp:223
+msgid "Failed to execute command: check toolchain configuration."
+msgstr ""
+
+#: tools/list/compile_manager.cpp:277
+msgid "Failed to execute custom command #%1."
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:39 progs/sdcdb/base/sdcdb_debug.cpp:39
+msgid "Failed to halt target: kill process."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:75
+msgid "Failed to halt target: try a reset."
+msgstr ""
+
+#: progs/base/generic_debug.cpp:45
+msgid "Failed to initialize device for debugging."
+msgstr ""
+
+#: progs/icd1/base/icd1.cpp:34 progs/icd2/base/icd2_serial.cpp:43
+msgid "Failed to set port mode to '%1'."
+msgstr ""
+
+#: progs/psp/base/psp.cpp:227
+msgid "Failed to set range"
+msgstr ""
+
+#: progs/gpsim/base/gpsim.cpp:58
+msgid "Failed to start \"gpsim\"."
+msgstr ""
+
+#: progs/icd2/base/icd_prog.cpp:30 progs/pickit2/base/pickit2_prog.cpp:67
+msgid "Failed to upload firmware."
+msgstr ""
+
+#: libgui/device_gui.cpp:82
+msgid "Family Tree"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:248
+#, fuzzy
+msgid "Fast RC oscillator"
+msgstr "Oscillatore RC esterno"
+
+#: devices/pic/pic/pic_group.cpp:65
+msgid "Features"
+msgstr ""
+
+#: common/gui/purl_gui.cpp:43
+msgid "File \"%1\" already exists. Overwrite ?"
+msgstr ""
+
+#: libgui/editor_manager.cpp:109
+msgid "File \"%1\" already loaded. Reload?"
+msgstr "Il file \"%1\" è già caricato. Caricarlo di nuovo?"
+
+#: libgui/project_manager.cpp:313
+msgid "File \"%1\" is not inside the project directory. Do you want to copy the file to your project directory?"
+msgstr ""
+
+#: libgui/device_editor.cpp:74 libgui/editor.cpp:80
+msgid "File %1 not saved."
+msgstr ""
+
+#: coff/base/coff_archive.cpp:115
+#, fuzzy
+msgid "File Members:"
+msgstr "Nome del file:"
+
+#: libgui/new_dialogs.cpp:63
+msgid "File Name:"
+msgstr "Nome del file:"
+
+#: libgui/hex_editor.cpp:142
+msgid "File URL: \"%1\"."
+msgstr ""
+
+#: coff/base/text_coff.cpp:128
+msgid "File could not be read"
+msgstr ""
+
+#: piklab-hex/main.cpp:202
+#, fuzzy
+msgid "File created."
+msgstr "Formato file Hex:"
+
+#: libgui/project_manager.cpp:319
+msgid "File is already in the project."
+msgstr "Il file è già incluso nel progetto."
+
+#: common/global/xml_data_file.cpp:35
+msgid "File is not of correct type."
+msgstr "Il tipo di file non è corretto."
+
+#: common/global/pfile.cpp:55
+msgid "File not open."
+msgstr ""
+
+#: coff/base/coff_archive.cpp:27
+msgid "File size not terminated by 'l' (\"%1\")."
+msgstr ""
+
+#: tools/list/compile_manager.cpp:111 tools/list/compile_manager.cpp:136
+#: common/gui/pfile_ext.cpp:25 common/gui/pfile_ext.cpp:64
+#: common/gui/pfile_ext.cpp:95 common/gui/pfile_ext.cpp:110
+#: common/cli/cli_pfile.cpp:20 common/cli/cli_pfile.cpp:38
+#: libgui/project_manager.cpp:307 libgui/project_manager.cpp:319
+msgid "File: %1"
+msgstr "File: %1"
+
+#: libgui/project_manager.cpp:325 libgui/project_wizard.cpp:246
+msgid "File: %1\n"
+msgstr "File: %1\n"
+
+#: libgui/project_wizard.cpp:82 coff/base/coff_object.cpp:152
+#, fuzzy
+msgid "Filename"
+msgstr "Nome del file:"
+
+#: piklab-coff/main.cpp:197
+#, fuzzy
+msgid "Files:"
+msgstr "Filtri:"
+
+#: piklab-hex/main.cpp:50
+msgid "Fill for checksum verification (cf datasheets)."
+msgstr ""
+
+#: piklab-hex/main.cpp:39
+#, fuzzy
+msgid "Fill option."
+msgstr "Mostra tutte le opzioni"
+
+#: piklab-hex/main.cpp:275
+#, fuzzy
+msgid "Fill options:"
+msgstr "%1 opzioni"
+
+#: piklab-hex/main.cpp:48
+msgid "Fill with blank values (default)."
+msgstr ""
+
+#: piklab-hex/main.cpp:278
+msgid "Fill with the specified numeric value."
+msgstr ""
+
+#: piklab-hex/main.cpp:49
+msgid "Fill with zeroes."
+msgstr ""
+
+#: libgui/device_gui.cpp:110
+msgid "Filters:"
+msgstr "Filtri:"
+
+#: libgui/project_manager.cpp:192
+#, fuzzy
+msgid "Find Files..."
+msgstr "Aggiungi file..."
+
+#: progs/gui/prog_group_ui.cpp:64
+msgid "Firmware"
+msgstr "Firmware"
+
+#: progs/base/generic_prog.cpp:126
+msgid "Firmware directory is not configured or does not exist."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:142
+msgid "Firmware directory not configured."
+msgstr "Cartella del firmware non configurata."
+
+#: piklab-prog/cli_interactive.cpp:58
+msgid "Firmware directory."
+msgstr "Cartella firmware"
+
+#: progs/gui/prog_config_widget.cpp:26
+msgid "Firmware directory:"
+msgstr "Cartella firmware:"
+
+#: progs/icd2/base/icd_prog.cpp:26
+msgid "Firmware hex file seems incompatible with device 16F876 inside ICD."
+msgstr ""
+
+#: progs/pickit2/base/pickit2_prog.cpp:60
+msgid "Firmware hex file seems incompatible with device 18F2550 inside PICkit2."
+msgstr ""
+
+#: progs/pickit2/base/pickit2.cpp:52
+msgid "Firmware memory does not match hex file (at address 0x%2: reading 0x%3 and expecting 0x%4)."
+msgstr ""
+
+#: progs/icd2/base/icd2_prog.cpp:108
+msgid "Firmware still incorrect after uploading."
+msgstr ""
+
+#: progs/pickit2/base/pickit2_prog.cpp:70
+msgid "Firmware succesfully uploaded."
+msgstr "Il firmware è stato caricato con successo."
+
+#: progs/gui/prog_group_ui.cpp:147
+msgid "Firmware uploaded successfully."
+msgstr "Il firmware è stato caricato con successo."
+
+#: progs/base/generic_prog.cpp:136
+msgid "Firmware version is %1"
+msgstr "La versione del firmware è la %1"
+
+#: piklab-hex/main.cpp:82
+msgid "First hex file: "
+msgstr ""
+
+#: devices/base/generic_device.cpp:26
+#, fuzzy
+msgid "Flash"
+msgstr "Formato"
+
+#: libgui/device_gui.cpp:83
+msgid "Flat List"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:36 coff/base/coff_object.cpp:164
+#, fuzzy
+msgid "Float"
+msgstr "Formato"
+
+#: devices/gui/memory_editor.cpp:277
+msgid "For checksum check"
+msgstr ""
+
+#: libgui/watch_view.cpp:99 libgui/watch_view.cpp:101
+msgid "Format"
+msgstr "Formato"
+
+#: piklab-hex/main.cpp:123 coff/base/text_coff.cpp:252
+#, fuzzy
+msgid "Format:"
+msgstr "Formato"
+
+#: libgui/toplevel.cpp:204
+msgid "Forward"
+msgstr ""
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:36
+msgid "Found version \"%1\""
+msgstr "Trovata versione \"%1\""
+
+#: devices/pic/base/pic_config.cpp:276
+msgid "Frequency range selection for FRC oscillator"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:24 coff/base/coff_object.cpp:179
+#, fuzzy
+msgid "Function"
+msgstr "Locazione"
+
+#: coff/base/coff_object.cpp:137
+#, fuzzy
+msgid "Function Argument"
+msgstr "Locazione"
+
+#: coff/base/cdb_parser.cpp:59
+msgid "Function or Undefined Space"
+msgstr ""
+
+#: devices/base/generic_device.cpp:18
+msgid "Future Product"
+msgstr "Prodotto Futuro"
+
+#: devices/pic/gui/pic_group_ui.cpp:54
+msgid "GPRs"
+msgstr "GPR"
+
+#: progs/gpsim/base/gpsim_debug.h:76
+msgid "GPSim"
+msgstr "GPSim"
+
+#: progs/gpsim/base/gpsim_debug.cpp:251 progs/sdcdb/base/sdcdb_debug.cpp:250
+msgid "GPSim (4MHz)"
+msgstr "GPSim (4MHz)"
+
+#: tools/gputils/gputils.h:33
+msgid "GPUtils"
+msgstr "GPUtils"
+
+#: libgui/config_center.h:34 libgui/project_editor.cpp:30
+msgid "General"
+msgstr "Generale"
+
+#: libgui/config_center.h:35
+msgid "General Configuration"
+msgstr "Configurazione generale"
+
+#: piklab-prog/cli_interactive.cpp:251
+msgid "General Purpose Registers:"
+msgstr "Registri General Purpose:"
+
+#: devices/pic/base/pic_protection.cpp:358
+#, fuzzy
+msgid "General Segment"
+msgstr "Generale"
+
+#: devices/pic/base/pic_config.cpp:192
+msgid "General code segment read-protection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:193
+msgid "General code segment write-protection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:243
+msgid "General segment security"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:242
+#, fuzzy
+msgid "General segment write-protection"
+msgstr "Protezione scrittura dati"
+
+#: libgui/project_manager_ui.cpp:35
+msgid "Generated"
+msgstr ""
+
+#: libgui/config_gen.cpp:112
+#, fuzzy
+msgid "Generation is not supported yet for the selected toolchain or device."
+msgstr "Aggiornamento del firmware non è supportato dal programmatore specificato."
+
+#: libgui/config_gen.cpp:126
+#, fuzzy
+msgid "Generation is only partially supported for this device."
+msgstr "Aggiornamento del firmware non è supportato dal programmatore specificato."
+
+#: coff/base/cdb_parser.cpp:25
+#, fuzzy
+msgid "Generic Pointer"
+msgstr "Opzioni generiche"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:841
+msgid "Generic options"
+msgstr "Opzioni generiche"
+
+#: piklab-prog/cli_interactive.cpp:41
+msgid "Get property value: \"get <property>\" or \"<property>\"."
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:16
+msgid "Global"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:45
+msgid "Global declarations"
+msgstr ""
+
+#: devices/pic/gui/pic_memory_editor.cpp:44
+msgid "Go to end"
+msgstr "Vai alla fine"
+
+#: devices/pic/gui/pic_memory_editor.cpp:41
+msgid "Go to start"
+msgstr "Vai all'inizio"
+
+#: piklab/main.cpp:21
+msgid "Graphical development environment for applications based on PIC and dsPIC microcontrollers."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:51
+msgid "HOODMICRO"
+msgstr "HOODMICRO"
+
+#: devices/pic/base/pic_config.cpp:258
+#, fuzzy
+msgid "HS crystal oscillator"
+msgstr "Oscillatore interno"
+
+#: devices/pic/base/pic_config.cpp:169
+msgid "HS/2 Crystal with 16x PLL"
+msgstr "Cristallo HS/2 con PLL 16x"
+
+#: devices/pic/base/pic_config.cpp:167
+msgid "HS/2 Crystal with 4x PLL"
+msgstr "Cristallo HS/2 con PLL 4x"
+
+#: devices/pic/base/pic_config.cpp:168
+msgid "HS/2 Crystal with 8x PLL"
+msgstr "Cristallo HS/2 con PLL 8x"
+
+#: devices/pic/base/pic_config.cpp:172
+msgid "HS/3 Crystal with 16x PLL"
+msgstr "Cristallo HS/3 con PLL 16x"
+
+#: devices/pic/base/pic_config.cpp:170
+msgid "HS/3 Crystal with 4x PLL"
+msgstr "Cristallo HS/3 con PLL 4x"
+
+#: devices/pic/base/pic_config.cpp:171
+msgid "HS/3 Crystal with 8x PLL"
+msgstr "Cristallo HS/3 con PLL 8x"
+
+#: tools/gui/toolchain_config_widget.cpp:240
+msgid "Hardcoded (%1)"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:32
+msgid "Hardware Stack"
+msgstr "Stack hardware"
+
+#: progs/gui/hardware_config_widget.cpp:45
+msgid "Hardware name:"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:31
+msgid "Header directory"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:33
+msgid "Headers"
+msgstr ""
+
+#: tools/list/tools_config_widget.cpp:24
+msgid "Help Dialog"
+msgstr ""
+
+#: libgui/likeback.cpp:184
+msgid "Help Improve the Application"
+msgstr ""
+
+#: libgui/toplevel.cpp:539
+msgid "Hex"
+msgstr "Hex"
+
+#: common/common/purl_base.cpp:49 libgui/project_manager_ui.cpp:97
+msgid "Hex File"
+msgstr "File Hex"
+
+#: piklab-hex/main.cpp:148
+msgid "Hex file cannot be fixed because the format was not recognized or is inconsistent."
+msgstr ""
+
+#: piklab-hex/main.cpp:156
+#, fuzzy
+msgid "Hex file cleaned and fixed."
+msgstr "File Hex non specificato."
+
+#: piklab-hex/main.cpp:155
+#, fuzzy
+msgid "Hex file cleaned."
+msgstr "Formato file Hex:"
+
+#: tools/gui/tool_config_widget.cpp:120
+msgid "Hex file format:"
+msgstr "Formato file Hex:"
+
+#: piklab-hex/main.cpp:118
+msgid "Hex file is compatible with device \"%1\"."
+msgstr ""
+
+#: piklab-hex/main.cpp:115 piklab-hex/main.cpp:144
+msgid "Hex file is valid."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:175
+msgid "Hex file seems incompatible with device \"%1\"."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:60
+#, fuzzy
+msgid "Hex file to be used for programming."
+msgstr "Programmazione a basso voltaggio"
+
+#: piklab-prog/cmdline.cpp:454
+#, fuzzy
+msgid "Hex filename for programming."
+msgstr "Programmazione a basso voltaggio"
+
+#: piklab-prog/cmdline.cpp:161
+#, fuzzy
+msgid "Hex filename not specified."
+msgstr "File Hex non specificato."
+
+#: piklab-hex/main.cpp:288
+#, fuzzy
+msgid "Hex filename(s)."
+msgstr "File sorgente C"
+
+#: piklab-prog/cli_interactive.cpp:56
+#, fuzzy
+msgid "Hex output file format."
+msgstr "Formato file Hex:"
+
+#: common/common/number.cpp:20
+msgid "Hexadecimal"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:26
+msgid "High"
+msgstr "Alto"
+
+#: devices/pic/gui/pic_memory_editor.cpp:77
+#: devices/pic/base/pic_config.cpp:231 devices/pic/base/pic_config.cpp:238
+#, fuzzy
+msgid "High Security"
+msgstr "Il più alto"
+
+#: devices/base/generic_device.cpp:42
+#, fuzzy
+msgid "High Voltage"
+msgstr "Tensioni"
+
+#: devices/pic/base/pic_config.cpp:277
+msgid "High range (nominal FRC frequency is 14.1 MHz)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:245
+#, fuzzy
+msgid "High security"
+msgstr "Il più alto"
+
+#: devices/pic/base/pic_config.cpp:147 devices/pic/base/pic_config.cpp:162
+msgid "High speed crystal"
+msgstr "Cristallo ad alta velocità"
+
+#: devices/pic/base/pic_config.cpp:60
+msgid "High speed crystal/resonator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:62
+msgid "High speed crystal/resonator with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:63
+msgid "High speed crystal/resonator with software controlled 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:61
+#, fuzzy
+msgid "High speed crystal/resonator, PLL enabled"
+msgstr "Cristallo ad alta velocità"
+
+#: devices/pic/base/pic_config.cpp:72
+msgid "Highest"
+msgstr "Il più alto"
+
+#: libgui/likeback.cpp:74
+msgid "I Do not Like..."
+msgstr ""
+
+#: libgui/likeback.cpp:81
+msgid "I Found a Bug..."
+msgstr "Ho trovato un bug..."
+
+#: libgui/likeback.cpp:67
+msgid "I Like..."
+msgstr ""
+
+#: libgui/toplevel.cpp:338 libgui/likeback.cpp:537
+msgid "I do not like..."
+msgstr ""
+
+#: libgui/toplevel.cpp:342 libgui/likeback.cpp:544
+msgid "I found a bug..."
+msgstr "Ho trovato un bug..."
+
+#: libgui/toplevel.cpp:334 libgui/likeback.cpp:530
+msgid "I like..."
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:47
+msgid "I/Os"
+msgstr "I/O"
+
+#: devices/pic/base/pic_config.cpp:273
+#, fuzzy
+msgid "I2C pins selection"
+msgstr "Descrizione icone:"
+
+#: devices/pic/base/pic_config.cpp:195
+msgid "ICD communication channel"
+msgstr "Canale di comunicazione ICD"
+
+#: progs/icd1/base/icd1_prog.h:44
+msgid "ICD1 Programmer"
+msgstr "Programmatore ICD1"
+
+#: progs/icd2/base/icd2_debug.h:76
+msgid "ICD2 Debugger"
+msgstr "Debugger ICD2"
+
+#: progs/icd2/base/icd2_prog.h:76
+msgid "ICD2 Programmer"
+msgstr "Programmatore ICD2"
+
+#: tools/gputils/gputils_generator.cpp:179
+msgid "INT pin interrupt service routine"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:213
+msgid "INTRC"
+msgstr ""
+
+#: devices/pic/pic/pic_group.cpp:55
+msgid "IO Ports"
+msgstr "Porte IO"
+
+#: libgui/likeback.cpp:179
+msgid "Icons description:"
+msgstr "Descrizione icone:"
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:85
+msgid "Id returned by bootloader corresponds to other devices: %1 (%2 read and %3 expected)."
+msgstr ""
+
+#: progs/icd2/gui/icd2_group_ui.cpp:21
+msgid "Id:"
+msgstr "ID:"
+
+#: devices/base/generic_device.cpp:17
+msgid "In Production"
+msgstr "In produzione"
+
+#: devices/pic/prog/pic_prog_specific.cpp:19
+msgid "In Programming"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:82
+msgid "In-circuit debugger"
+msgstr ""
+
+#: common/common/purl_base.cpp:36
+msgid "Include File"
+msgstr ""
+
+#: tools/gui/tool_config_widget.h:57
+msgid "Include directories:"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:35
+msgid "Included"
+msgstr ""
+
+#: progs/psp/base/psp_serial.cpp:59
+msgid "Incorrect ack: expecting %1, received %2"
+msgstr ""
+
+#: progs/psp/base/psp_serial.cpp:67
+msgid "Incorrect received data end: expecting 00, received %1"
+msgstr ""
+
+#: coff/base/coff_object.cpp:54
+#, fuzzy
+msgid "Indentifier"
+msgstr "Non definito"
+
+#: devices/pic/gui/pic_config_word_editor.cpp:63
+msgid "Index:"
+msgstr "Indice:"
+
+#: devices/base/generic_device.cpp:34
+msgid "Industrial"
+msgstr "Industriale"
+
+#: coff/base/coff_archive.cpp:107
+#, fuzzy
+msgid "Information:"
+msgstr "Configurazione:"
+
+#: devices/pic/base/pic_config.cpp:247
+#, fuzzy
+msgid "Initial oscillator source"
+msgstr "Sorgente oscillatore"
+
+#: coff/base/coff_object.cpp:330
+msgid "Initialized Data"
+msgstr ""
+
+#: coff/base/coff_object.cpp:122
+#, fuzzy
+msgid "Inside Section"
+msgstr "Descrizione icone:"
+
+#: coff/base/cdb_parser.cpp:32 coff/base/coff_object.cpp:162
+msgid "Int"
+msgstr ""
+
+#: common/cli/cli_main.cpp:69
+msgid "Interactive mode"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:228
+msgid "Interactive mode: type help for help"
+msgstr ""
+
+#: common/port/usb_port.cpp:255
+msgid "Interface %1 not present: using %2"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:54
+#, fuzzy
+msgid "Internal RAM"
+msgstr "Circuito RC interno veloce"
+
+#: coff/base/cdb_parser.cpp:28
+#, fuzzy
+msgid "Internal RAM Pointer"
+msgstr "Oscillatore interno"
+
+#: coff/base/cdb_parser.cpp:49
+#, fuzzy
+msgid "Internal Stack"
+msgstr "Circuito RC interno veloce"
+
+#: devices/pic/base/pic_config.cpp:73
+msgid "Internal Trim"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:141
+msgid "Internal fast RC"
+msgstr "Circuito RC interno veloce"
+
+#: devices/pic/base/pic_config.cpp:249
+#, fuzzy
+msgid "Internal fast RC oscillator"
+msgstr "Oscillatore RC interno veloce con PLL 8x"
+
+#: devices/pic/base/pic_config.cpp:182
+#, fuzzy
+msgid "Internal fast RC oscillator (no PLL)"
+msgstr "Oscillatore RC interno veloce con PLL 4x"
+
+#: devices/pic/base/pic_config.cpp:180
+msgid "Internal fast RC oscillator with 16x PLL"
+msgstr "Oscillatore RC interno veloce con PLL 16x"
+
+#: devices/pic/base/pic_config.cpp:178
+msgid "Internal fast RC oscillator with 4x PLL"
+msgstr "Oscillatore RC interno veloce con PLL 4x"
+
+#: devices/pic/base/pic_config.cpp:157 devices/pic/base/pic_config.cpp:179
+msgid "Internal fast RC oscillator with 8x PLL"
+msgstr "Oscillatore RC interno veloce con PLL 8x"
+
+#: devices/pic/base/pic_config.cpp:250
+#, fuzzy
+msgid "Internal fast RC oscillator with PLL"
+msgstr "Oscillatore RC interno veloce con PLL 8x"
+
+#: devices/pic/base/pic_config.cpp:255
+#, fuzzy
+msgid "Internal fast RC oscillator with postscaler"
+msgstr "Oscillatore RC interno veloce con PLL 4x"
+
+#: devices/pic/base/pic_config.cpp:142
+msgid "Internal low-power RC"
+msgstr "Circuito RC interno a bassa dissipazione"
+
+#: devices/pic/base/pic_config.cpp:183
+#, fuzzy
+msgid "Internal low-power RC oscillator"
+msgstr "Circuito RC interno a bassa dissipazione"
+
+#: devices/pic/base/pic_config.cpp:43
+msgid "Internal oscillator"
+msgstr "Oscillatore interno"
+
+#: devices/pic/base/pic_config.cpp:45
+msgid "Internal oscillator (no CLKOUT)"
+msgstr "Oscillatore interno (senza CLKOUT)"
+
+#: devices/pic/base/pic_config.cpp:205
+msgid "Internal oscillator speed"
+msgstr "Velocità oscillatore interno"
+
+#: devices/pic/base/pic_config.cpp:44
+msgid "Internal oscillator with CLKOUT"
+msgstr "Oscillatore interno con CLKOUT"
+
+#: devices/pic/base/pic_config.cpp:65
+#, fuzzy
+msgid "Internal oscillator, HS used by USB"
+msgstr "Velocità oscillatore interno"
+
+#: devices/pic/base/pic_config.cpp:64
+#, fuzzy
+msgid "Internal oscillator, XT used by USB"
+msgstr "Velocità oscillatore interno"
+
+#: devices/pic/base/pic_config.cpp:80
+msgid "Internal-external switchover"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:332
+msgid "Invalid begin or end character for read block."
+msgstr ""
+
+#: progs/psp/base/psp.cpp:185
+msgid "Invalid firmware version"
+msgstr "Versione del firmware non valida"
+
+#: progs/direct/gui/direct_config_widget.cpp:48
+msgid "Inverted"
+msgstr "Invertito"
+
+#: libgui/toplevel.cpp:938
+msgid "It is not possible to start a debugging session with an hex file not generated with the current project."
+msgstr ""
+
+#: progs/icd2/base/icd2_prog.cpp:38
+msgid "It is not recommended to power dsPICs from ICD. Continue anyway?"
+msgstr ""
+
+#: libgui/likeback.cpp:395
+msgid "It will only be used to contact you back if more information is needed about your comments, how to reproduce the bugs you report, send bug corrections for you to test..."
+msgstr ""
+
+#: devices/pic/base/pic.cpp:44
+msgid "J"
+msgstr ""
+
+#: tools/jal/jal.h:32
+msgid "JAL"
+msgstr "JAL"
+
+#: common/common/purl_base.cpp:27
+msgid "JAL Compiler"
+msgstr "Compilatore JAL"
+
+#: common/common/purl_base.cpp:40
+msgid "JAL File"
+msgstr "File JAL"
+
+#: tools/jalv2/jalv2.h:32
+msgid "JAL V2"
+msgstr "JAL V2"
+
+#: progs/direct/base/direct_prog_config.cpp:41
+msgid "JDM classic"
+msgstr "JDM classic"
+
+#: progs/direct/base/direct_prog_config.cpp:43
+msgid "JDM classic (delay 10)"
+msgstr "JDM classic (delay 10)"
+
+#: progs/direct/base/direct_prog_config.cpp:45
+msgid "JDM classic (delay 20)"
+msgstr "JDM classic (delay 20)"
+
+#: devices/pic/base/pic_config.cpp:268
+#, fuzzy
+msgid "JTAG port enabled"
+msgstr " nessuna porta rilevata"
+
+#: devices/pic/base/pic.cpp:45
+msgid "K"
+msgstr ""
+
+#: libgui/toplevel.cpp:156
+msgid "Konsole"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:80
+msgid "LCD"
+msgstr ""
+
+#: common/global/about.cpp:81
+msgid "LPLAB author (original microchip programmer support)."
+msgstr ""
+
+#: coff/base/coff_object.cpp:134
+#, fuzzy
+msgid "Label"
+msgstr "Locazione"
+
+#: tools/base/generic_tool.cpp:21
+#, fuzzy
+msgid "Librarian"
+msgstr "File di libreria"
+
+#: tools/base/generic_tool.cpp:21
+#, fuzzy
+msgid "Librarian:"
+msgstr "File di libreria"
+
+#: tools/base/generic_tool.cpp:44
+#, fuzzy
+msgid "Library"
+msgstr "File di libreria"
+
+#: tools/base/generic_tool.cpp:33
+msgid "Library Directory"
+msgstr "Cartelle di librerie"
+
+#: common/common/purl_base.cpp:44
+msgid "Library File"
+msgstr "File di libreria"
+
+#: coff/base/coff_object.cpp:153
+msgid "Line Number"
+msgstr ""
+
+#: libgui/text_editor.cpp:170
+msgid "Line: %1  Col: %2"
+msgstr "Riga: %1  Colonna: %2"
+
+#: tools/base/generic_tool.cpp:19
+msgid "Linker"
+msgstr "Linker"
+
+#: common/common/purl_base.cpp:46 libgui/project_manager.cpp:165
+#: libgui/project_manager_ui.cpp:33
+msgid "Linker Script"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:32
+msgid "Linker Script Directory"
+msgstr ""
+
+#: common/common/purl_base.cpp:47
+msgid "Linker Script for PIC30"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:19
+#, fuzzy
+msgid "Linker:"
+msgstr "Linker"
+
+#: libgui/project_manager_ui.cpp:99
+msgid "List"
+msgstr "Lista"
+
+#: common/common/purl_base.cpp:52
+msgid "List File"
+msgstr "Lista file"
+
+#: coff/base/cdb_parser.cpp:18
+#, fuzzy
+msgid "Local"
+msgstr "Locazione"
+
+#: libgui/breakpoint_view.cpp:48
+msgid "Location"
+msgstr "Locazione"
+
+#: libgui/new_dialogs.cpp:32
+msgid "Location:"
+msgstr "Locazione:"
+
+#: coff/base/cdb_parser.cpp:31 coff/base/coff_object.cpp:163
+#, fuzzy
+msgid "Long"
+msgstr "on"
+
+#: coff/base/coff_object.cpp:174
+msgid "Long Double"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:25
+msgid "Low"
+msgstr "Basso"
+
+#: devices/base/generic_device.cpp:40
+msgid "Low Power"
+msgstr "Bassa dissipazione"
+
+#: devices/base/generic_device.cpp:41
+msgid "Low Voltage"
+msgstr "Basso voltaggio"
+
+#: devices/pic/base/pic.cpp:74
+#, fuzzy
+msgid "Low Voltage Detect"
+msgstr "Basso voltaggio"
+
+#: devices/pic/base/pic_config.cpp:254
+#, fuzzy
+msgid "Low power RC oscillator"
+msgstr "Circuito RC interno a bassa dissipazione"
+
+#: devices/pic/base/pic_config.cpp:48
+msgid "Low power crystal"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:116
+msgid "Low power in sleep mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:278
+msgid "Low range (nominal FRC frequency is 9.7 MHz)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:86
+msgid "Low voltage programming"
+msgstr "Programmazione a basso voltaggio"
+
+#: devices/pic/base/pic_config.cpp:181
+msgid "Low-power 32 kHz oscillator (TMR1 oscillator)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:123
+msgid "Low-power timer1 oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:146 devices/pic/base/pic_config.cpp:161
+msgid "Low-power/low-frequency crystal"
+msgstr "Cristallo bassa potenza/bassa frequenza"
+
+#: coff/base/cdb_parser.cpp:52
+#, fuzzy
+msgid "Lower-128-byte Internal RAM"
+msgstr "Circuito RC interno veloce"
+
+#: devices/pic/base/pic_config.cpp:69
+msgid "Lowest"
+msgstr "Il più basso"
+
+#: progs/direct/base/direct.cpp:24
+msgid "MCLR (Vpp)"
+msgstr "MCLR (Vpp)"
+
+#: progs/icd2/base/icd2.cpp:52
+msgid "MCLR Vdd"
+msgstr "Vdd MCLR"
+
+#: progs/icd2/base/icd2.cpp:52
+msgid "MCLR Vpp"
+msgstr "Vpp MCLR"
+
+#: progs/icd2/base/icd2.cpp:51
+msgid "MCLR ground"
+msgstr ""
+
+#: devices/base/generic_device.cpp:60
+msgid "MLF"
+msgstr "MLF"
+
+#: tools/mpc/mpc.h:32
+#, fuzzy
+msgid "MPC Compiler"
+msgstr "Compilatore C"
+
+#: progs/base/generic_prog.cpp:141 progs/base/generic_prog.cpp:149
+#: progs/base/generic_prog.cpp:157
+msgid "MPLAB %1"
+msgstr ""
+
+#: devices/base/generic_device.cpp:55
+msgid "MQFP"
+msgstr "MQFP"
+
+#: devices/base/generic_device.cpp:50
+msgid "MSOP"
+msgstr "MSOP"
+
+#: devices/pic/base/pic_config.cpp:220
+msgid "MSSP address select bit"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:138
+msgid "Macros"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:38
+msgid "Magic number: %1"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:109
+msgid "Malformed record: "
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:220
+msgid "Malformed string received \"%1\""
+msgstr ""
+
+#: common/common/purl_base.cpp:53
+msgid "Map File"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:204
+msgid "Master clear pull-up resistor"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:34
+msgid "Master clear reset"
+msgstr ""
+
+#: devices/base/generic_device.cpp:22
+msgid "Mature"
+msgstr ""
+
+#: common/global/log.cpp:28
+#, fuzzy
+msgid "Max debug messages"
+msgstr "Tutti i messaggi"
+
+#: coff/base/coff_object.cpp:169
+msgid "Member Of Enumeration"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:19
+msgid "Member name not terminated by '/' (\"%1\")."
+msgstr ""
+
+#: coff/base/coff_object.cpp:144
+#, fuzzy
+msgid "Member of Enumeration"
+msgstr "Configurazione generale"
+
+#: coff/base/coff_object.cpp:136
+msgid "Member of Structure"
+msgstr ""
+
+#: coff/base/coff_object.cpp:139
+msgid "Member of Union"
+msgstr ""
+
+#: libgui/device_gui.cpp:408 libgui/project_manager_ui.cpp:100
+msgid "Memory Map"
+msgstr ""
+
+#: devices/mem24/mem24/mem24_group.cpp:22
+msgid "Memory Size"
+msgstr "Dimensione della Memoria"
+
+#: devices/pic/pic/pic_group.cpp:27
+msgid "Memory Type"
+msgstr "Tipo di Memoria"
+
+#: progs/icd2/base/icd2_debug.cpp:237
+msgid "Memory area for debug executive was not empty. Overwrite it and continue anyway..."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:83
+msgid "Memory parity error"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:254
+msgid "Memory range not present on this device."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:258
+msgid "Memory range not recognized."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:57
+msgid "Memory range to operate on."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:259
+#, fuzzy
+msgid "Memory ranges are not supported for the specified device."
+msgstr "Aggiornamento del firmware non è supportato dal programmatore specificato."
+
+#: piklab-prog/cmdline.cpp:148
+msgid "Memory ranges for PIC/dsPIC devices:"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:94
+msgid "Microcontroller"
+msgstr "Microcontrollere"
+
+#: devices/pic/base/pic_config.cpp:95
+msgid "Microprocessor"
+msgstr "Microprocessore"
+
+#: devices/pic/base/pic_config.cpp:97
+msgid "Microprocessor with boot block"
+msgstr "Microprocessore con blocco di avvio (boot)"
+
+#: devices/pic/base/pic_config.cpp:71
+msgid "Mid/High"
+msgstr "Medio/Alto"
+
+#: devices/pic/base/pic_config.cpp:70
+msgid "Mid/Low"
+msgstr "Medio/Basso"
+
+#: devices/pic/base/pic.cpp:52
+msgid "Midrange Family"
+msgstr ""
+
+#: devices/pic/base/pic_register.cpp:76
+msgid "Mirror of %1"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:260
+msgid "Missing or incorrect device (Read id is %1)."
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:51
+msgid "Module Vpp"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:74
+msgid "Monty-Robot programmer"
+msgstr "Programmatore Monty-Robot"
+
+#: devices/pic/base/pic.cpp:82
+msgid "Motion Feeback"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:81
+msgid "Motor Control"
+msgstr ""
+
+#: common/gui/editlistbox.cpp:147
+msgid "Move &Down"
+msgstr ""
+
+#: common/gui/editlistbox.cpp:142
+msgid "Move &Up"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:70
+msgid "Myke's EL Cheapo"
+msgstr "Myke's EL Cheapo"
+
+#: devices/pic/gui/pic_config_word_editor.cpp:58 libgui/project_editor.cpp:32
+#: libgui/project_wizard.cpp:120
+msgid "Name:"
+msgstr "Nome:"
+
+#: libgui/project_manager.cpp:218
+msgid "New File..."
+msgstr "Nuovo file..."
+
+#: coff/base/coff.cpp:29 coff/base/coff_object.cpp:36
+msgid "New Microchip"
+msgstr ""
+
+#: libgui/project_manager.cpp:181 libgui/toplevel.cpp:226
+msgid "New Project..."
+msgstr "Nuovo progetto..."
+
+#: libgui/project_wizard.cpp:158
+#, fuzzy
+msgid "New Project: Add Files"
+msgstr "File progetto"
+
+#: libgui/project_wizard.cpp:117
+#, fuzzy
+msgid "New Project: Basic Settings"
+msgstr "File progetto"
+
+#: libgui/project_wizard.cpp:147
+#, fuzzy
+msgid "New Project: Source Files"
+msgstr "File progetto"
+
+#: libgui/project_manager.cpp:197
+msgid "New Source File..."
+msgstr "Nuovo file sorgente..."
+
+#: libgui/toplevel.cpp:184
+#, fuzzy
+msgid "New hex File..."
+msgstr "Nuovo file..."
+
+#: progs/gui/hardware_config_widget.cpp:159
+#, fuzzy
+msgid "New/Test..."
+msgstr "Modifica/Verifica..."
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:180
+msgid "No \"goto\" instruction in the first four instructions."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:261
+#, fuzzy
+msgid "No COFF file specified."
+msgstr "Nessun dispositivo specificato"
+
+#: piklab-prog/cli_interactive.cpp:171
+#, fuzzy
+msgid "No breakpoint set."
+msgstr "Nessun breakpoint impostato"
+
+#: common/cli/cli_main.cpp:27
+msgid "No command specified"
+msgstr "Nessun comando specificato"
+
+#: tools/list/compile_manager.cpp:286
+#, fuzzy
+msgid "No custom commands specified."
+msgstr "Nessun comando specificato"
+
+#: common/global/log.cpp:25
+msgid "No debug message"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:98
+#, fuzzy
+msgid "No device selected."
+msgstr "Nessun dispositivo selezionato"
+
+#: piklab-prog/cli_interactive.cpp:243 piklab-prog/cli_interactive.cpp:259
+#, fuzzy
+msgid "No device specified."
+msgstr "Nessun dispositivo specificato"
+
+#: common/nokde/nokde_kaboutdata.cpp:430
+msgid ""
+"No licensing terms for this program have been specified.\n"
+"Please check the documentation or the source for any\n"
+"licensing terms.\n"
+msgstr ""
+
+#: progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp:37
+msgid "No of Retries:"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:244 piklab-prog/cli_interactive.cpp:262
+#, fuzzy
+msgid "No register."
+msgstr "Nessun registro"
+
+#: devices/pic/gui/pic_group_ui.cpp:72
+msgid "No variable"
+msgstr "Nessuna variabile"
+
+#: piklab-prog/cli_interactive.cpp:266
+#, fuzzy
+msgid "No variable."
+msgstr "Nessuna variabile"
+
+#: piklab-hex/main.cpp:137
+msgid "No. of Words:"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:108
+#, fuzzy
+msgid "No. of file members:"
+msgstr "Nessuna variabile"
+
+#: coff/base/text_coff.cpp:258
+#, fuzzy
+msgid "No. of sections:"
+msgstr "Mostra tutte le opzioni"
+
+#: coff/base/text_coff.cpp:259 coff/base/coff_archive.cpp:109
+msgid "No. of symbols:"
+msgstr ""
+
+#: coff/base/text_coff.cpp:260
+#, fuzzy
+msgid "No. of variables:"
+msgstr "Nessuna variabile"
+
+#: libgui/breakpoint_view.cpp:64
+msgid "Non-code breakpoint"
+msgstr ""
+
+#: devices/base/generic_device.cpp:39 devices/pic/base/pic.cpp:43
+msgid "Normal"
+msgstr "Normale"
+
+#: common/global/log.cpp:26
+msgid "Normal debug messages"
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:61
+msgid "Not Connected"
+msgstr "Non connesso"
+
+#: devices/base/generic_device.cpp:19
+msgid "Not Recommended for New Design"
+msgstr "Non raccomandato per un nuovo progetto"
+
+#: common/common/group.cpp:13
+#, fuzzy
+msgid "Not Supported"
+msgstr "Supportato"
+
+#: devices/pic/base/pic_config.cpp:225
+#, fuzzy
+msgid "Not connected to EMB"
+msgstr "Non connesso"
+
+#: progs/direct/base/direct_prog_config.cpp:72
+#, fuzzy
+msgid "Not tested."
+msgstr "non testato"
+
+#: libgui/likeback.cpp:598
+msgid "Note that to improve this application, it's important to tell us the things you like as much as the things you dislike."
+msgstr ""
+
+#: common/port/usb_port.cpp:401
+msgid "Nothing received: retrying..."
+msgstr ""
+
+#: common/port/usb_port.cpp:363
+msgid "Nothing sent: retrying..."
+msgstr ""
+
+#: piklab-hex/main.cpp:232 piklab-prog/cli_interactive.cpp:158
+#: piklab-prog/cli_interactive.cpp:298
+msgid "Number format not recognized."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:262
+msgid "OSC2 pin function"
+msgstr ""
+
+#: coff/base/coff.cpp:23
+#, fuzzy
+msgid "Object"
+msgstr "Aggetti"
+
+#: common/common/purl_base.cpp:43
+msgid "Object File"
+msgstr "File oggetto"
+
+#: libgui/project_manager.cpp:213 libgui/project_manager_ui.cpp:34
+msgid "Objects"
+msgstr "Aggetti"
+
+#: common/common/number.cpp:22
+msgid "Octal"
+msgstr "Attale"
+
+#: devices/pic/base/pic_config.cpp:107
+msgid "Odd PWM output polarity"
+msgstr ""
+
+#: coff/base/coff.cpp:27 coff/base/coff_object.cpp:35
+msgid "Old Microchip"
+msgstr ""
+
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:86
+msgid "Only bootloader version 1.x is supported"
+msgstr ""
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:38
+msgid "Only bootloader version 2.x is supported."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:315
+msgid "Only code and EEPROM will be erased."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:316
+msgid "Only code will be erased."
+msgstr ""
+
+#: libgui/likeback.cpp:594
+msgid "Only english language is accepted."
+msgstr ""
+
+#: progs/base/prog_config.cpp:69
+msgid "Only program what is needed (faster)."
+msgstr ""
+
+#: progs/base/debug_config.cpp:13
+msgid "Only stop stepping on project source line."
+msgstr ""
+
+#: progs/base/debug_config.cpp:12
+msgid "Only stop stepping on source line."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:177
+msgid "Only the first word of the \"goto\" instruction is into the first four instructions."
+msgstr ""
+
+#: progs/base/prog_config.cpp:71
+msgid "Only verify programmed words in code memory (faster)."
+msgstr ""
+
+#: progs/pickit2/gui/pickit2_group_ui.cpp:33
+msgid "Open Calibration Firmware"
+msgstr ""
+
+#: libgui/toplevel.cpp:554
+msgid "Open File"
+msgstr "Apri file"
+
+#: progs/gui/prog_group_ui.cpp:142
+msgid "Open Firmware"
+msgstr "Apri firmware"
+
+#: libgui/project_manager.cpp:182 libgui/toplevel.cpp:228
+msgid "Open Project..."
+msgstr "Apri progetto..."
+
+#: libgui/toplevel.cpp:230
+msgid "Open Recent Project"
+msgstr "Apri progetto recente"
+
+#: common/global/log.cpp:58
+msgid "Operation aborted by user."
+msgstr ""
+
+#: coff/base/text_coff.cpp:257
+msgid "Option header:"
+msgstr ""
+
+#: piklab/main.cpp:15
+msgid "Optional filenames to be opened upon startup."
+msgstr ""
+
+#: coff/base/coff_object.cpp:469
+msgid "Optional header format not supported: magic number is %1."
+msgstr ""
+
+#: coff/base/coff_object.cpp:538
+msgid "Optionnal header size is not %1: %2"
+msgstr ""
+
+#: libgui/project_manager.cpp:191
+msgid "Options..."
+msgstr "Opzioni..."
+
+#: common/global/about.cpp:80
+msgid "Original author of PiKdev."
+msgstr "Autore originale di PiKdev."
+
+#: common/global/about.cpp:85
+msgid "Original code for direct programming."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:351
+msgid "Osccal backup cannot be read by selected programmer"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:314
+msgid "Osccal backup cannot be read by the selected programmer"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:303
+msgid "Osccal cannot be read by the selected programmer"
+msgstr ""
+
+#: progs/pickit2/gui/pickit2_group_ui.cpp:28
+msgid "Osccal regeneration not available for the selected device."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:39
+msgid "Oscillator"
+msgstr "Oscillatore"
+
+#: progs/gui/prog_group_ui.cpp:175
+msgid "Oscillator calibration regeneration is not available with the selected programmer."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:160
+msgid "Oscillator mode"
+msgstr "Modalità Oscillatore"
+
+#: devices/pic/base/pic_config.cpp:140
+msgid "Oscillator source"
+msgstr "Sorgente oscillatore"
+
+#: devices/pic/base/pic_config.cpp:100
+msgid "Oscillator system clock switch"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:64
+#, fuzzy
+msgid "Output Executable Type:"
+msgstr "Tipo di eseguibile:"
+
+#: piklab-prog/cmdline.cpp:178
+#, fuzzy
+msgid "Output hex filename already exists."
+msgstr "Informazioni sui registri non disponibile."
+
+#: libgui/log_view.cpp:89
+msgid "Output in console"
+msgstr ""
+
+#: tools/list/tools_config_widget.cpp:53
+#, fuzzy
+msgid "Output type:"
+msgstr "File COFF"
+
+#: common/cli/cli_main.cpp:63
+msgid "Overwrite files and answer \"yes\" to questions."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:32
+msgid "P16PRO40 7407"
+msgstr "P16PRO40 7407"
+
+#: progs/direct/base/direct_prog_config.cpp:30
+msgid "P16PRO40 classic"
+msgstr "P16PRO40 classic"
+
+#: progs/direct/base/direct_prog_config.cpp:36
+msgid "P16PRO40-VPP40 7407"
+msgstr "P16PRO40-VPP40 7407"
+
+#: progs/direct/base/direct_prog_config.cpp:34
+msgid "P16PRO40-VPP40 classic"
+msgstr "P16PRO40-VPP40 classic"
+
+#: devices/base/generic_device.cpp:46
+msgid "PDIP"
+msgstr "PDIP"
+
+#: devices/pic/pic/pic_group.h:25
+msgid "PIC"
+msgstr "PIC"
+
+#: progs/direct/base/direct_prog_config.cpp:47
+msgid "PIC Elmer"
+msgstr "PIC Elmer"
+
+#: coff/base/coff.cpp:28
+#, fuzzy
+msgid "PIC30"
+msgstr "PIC"
+
+#: tools/pic30/pic30.h:33
+msgid "PIC30 Toolchain"
+msgstr ""
+
+#: tools/picc/picc.h:76 coff/base/coff_object.cpp:37
+msgid "PICC Compiler"
+msgstr "Compilatore PICC"
+
+#: tools/picc/picc.h:64
+msgid "PICC Lite Compiler"
+msgstr "Compilatore PICC Lite"
+
+#: tools/picc/picc.h:88
+msgid "PICC-18 Compiler"
+msgstr "Compilatore PICC-18"
+
+#: progs/pickit1/base/pickit1_prog.h:35
+msgid "PICkit1"
+msgstr "PICkit1"
+
+#: progs/pickit2/base/pickit2_prog.h:37
+msgid "PICkit2 Firmware 1.x"
+msgstr ""
+
+#: progs/pickit2v2/base/pickit2v2_prog.h:39
+msgid "PICkit2 Firmware 2.x"
+msgstr ""
+
+#: devices/base/generic_device.cpp:59
+msgid "PLCC"
+msgstr "PLCC"
+
+#: devices/pic/base/pic_config.cpp:201
+msgid "PLL clock (divided by)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:223
+msgid "PMP pin select bit"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:103
+msgid "PORTB A/D"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:131
+#, fuzzy
+msgid "PWM multiplexed onto RE6 and RE3"
+msgstr "PWM multiplexato su RE6 attraverso RE3"
+
+#: devices/pic/base/pic_config.cpp:133
+#, fuzzy
+msgid "PWM multiplexed onto RE6 and RE5"
+msgstr "PWM multiplexato su RE6 attraverso RE5"
+
+#: devices/pic/base/pic_config.cpp:132
+#, fuzzy
+msgid "PWM multiplexed onto RH7 and RH4"
+msgstr "PWM multiplexato su RH7 attraverso RH4"
+
+#: devices/pic/base/pic_config.cpp:134
+#, fuzzy
+msgid "PWM multiplexed onto RH7 and RH6"
+msgstr "PWM multiplexato su RH7 attraverso RH6"
+
+#: devices/pic/base/pic_config.cpp:113
+msgid "PWM output pin reset state"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:121
+msgid "PWM4 mux"
+msgstr "PWM4 mux"
+
+#: devices/base/device_group.cpp:251
+msgid "Packaging"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:29
+msgid "Paged Pointer"
+msgstr ""
+
+#: progs/gui/port_selector.cpp:21
+msgid "Parallel"
+msgstr "Parallela"
+
+#: common/port/port.cpp:62
+msgid "Parallel Port"
+msgstr "Porta parallela"
+
+#: coff/base/text_coff.cpp:245
+#, fuzzy
+msgid "Parsing COFF file is not supported for this device or an error occured."
+msgstr "Aggiornamento del firmware non è supportato dal programmatore specificato."
+
+#: progs/manager/debug_manager.cpp:84
+msgid "Parsing COFF file: %1"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:24
+msgid "Pass"
+msgstr ""
+
+#: common/cli/cli_main.cpp:51
+msgid "Perform the requested command."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:269
+#, fuzzy
+msgid "Peripheral pin select configuration"
+msgstr "Configurazione generale"
+
+#: progs/picdem_bootloader/base/picdem_bootloader_prog.h:31
+#, fuzzy
+msgid "Picdem Bootloader"
+msgstr "Blocco di Avvio"
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader_prog.h:32
+#, fuzzy
+msgid "Pickit2 Bootloader"
+msgstr "Blocco di Avvio"
+
+#: progs/psp/base/psp_prog.h:37
+msgid "Picstart Plus"
+msgstr "Picstart Plus"
+
+#: common/common/purl_base.cpp:58
+msgid "Pikdev Project File"
+msgstr ""
+
+#: piklab/main.cpp:21
+msgid "Piklab"
+msgstr "Piklab"
+
+#: piklab-coff/main.cpp:278
+#, fuzzy
+msgid "Piklab COFF Utility"
+msgstr "Opzioni programmatore"
+
+#: piklab-hex/main.cpp:287
+#, fuzzy
+msgid "Piklab Hex Utility"
+msgstr "Opzioni programmatore"
+
+#: piklab-prog/cmdline.cpp:453
+#, fuzzy
+msgid "Piklab Programmer Utility"
+msgstr "Opzioni programmatore"
+
+#: progs/gui/port_selector.cpp:68
+#, fuzzy
+msgid "Piklab has been compiled without support for USB port."
+msgstr "<qt>Piklab è stato compilato senza il supporto per le porte USB.</qt>"
+
+#: progs/gui/port_selector.cpp:65
+#, fuzzy
+msgid "Piklab has been compiled without support for parallel port."
+msgstr "<qt>Piklab è stato compilato senza il supporto alla porta parallela.</qt"
+
+#: libgui/device_gui.cpp:418
+msgid "Pin Diagrams"
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:34
+msgid "Pin assignment"
+msgstr "Assegnazione pin"
+
+#: libgui/likeback.cpp:545
+msgid "Please briefly describe the bug you encountered."
+msgstr ""
+
+#: libgui/likeback.cpp:538
+msgid "Please briefly describe what you do not like."
+msgstr ""
+
+#: libgui/likeback.cpp:531
+msgid "Please briefly describe what you like."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:333
+msgid "Please check installation of selected software debugger."
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:79
+msgid "Please compile the current project"
+msgstr ""
+
+#: libgui/likeback.cpp:394
+msgid "Please provide your email address."
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:654
+msgid "Please use %1 to report bugs, do not mail the authors directly.\n"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:652
+msgid "Please use http://bugs.kde.org to report bugs, do not mail the authors directly.\n"
+msgstr ""
+
+#: coff/base/coff_object.cpp:178
+#, fuzzy
+msgid "Pointer"
+msgstr "Codice memoria"
+
+#: progs/gui/prog_config_center.cpp:119
+msgid "Port Selection"
+msgstr "Selezione porta"
+
+#: progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp:20
+#, fuzzy
+msgid "Port Speed:"
+msgstr "Selezione porta"
+
+#: progs/direct/base/direct.cpp:27
+msgid "Power (Vdd)"
+msgstr "Power (Vdd)"
+
+#: progs/base/prog_config.cpp:72
+msgid "Power down target after programming."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:190
+msgid "Power-on reset timer value (ms)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:37
+msgid "Power-up timer"
+msgstr ""
+
+#. i18n: file ./data/app_data/piklabui.rc line 83
+#: rc.cpp:27
+#, no-c-format
+msgid "Pr&ogrammer"
+msgstr "Pr&ogrammatore"
+
+#: progs/base/prog_config.cpp:75
+msgid "Preserve data EEPROM when programming."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:143
+msgid "Primary"
+msgstr "Primario"
+
+#: devices/pic/base/pic_config.cpp:251
+#, fuzzy
+msgid "Primary oscillator"
+msgstr "Oscillatore interno"
+
+#: devices/pic/base/pic_config.cpp:145 devices/pic/base/pic_config.cpp:256
+msgid "Primary oscillator mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:252
+#, fuzzy
+msgid "Primary oscillator with PLL"
+msgstr "Oscillatore interno con CLKOUT"
+
+#: progs/icd2/base/icd2_usb.cpp:77
+msgid "Problem connecting ICD2: please try again after unplug-replug."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:92
+msgid "Processor mode"
+msgstr "Modalità Processore"
+
+#: devices/pic/base/pic.cpp:34
+msgid "Program Executive"
+msgstr "Programma Eseguibile"
+
+#: libgui/toplevel.cpp:144
+msgid "Program Log"
+msgstr ""
+
+#: progs/base/prog_config.cpp:76
+#, fuzzy
+msgid "Program data EEPROM."
+msgstr "Dati EEPROM"
+
+#: libgui/global_config.cpp:21
+msgid "Program device after successful build."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:41
+msgid "Program device memory: \"program <hexfilename>\"."
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:56
+msgid "Programmer"
+msgstr "Programmatore"
+
+#: progs/gui/prog_config_center.h:23 progs/gui/prog_config_center.h:24
+msgid "Programmer Options"
+msgstr "Opzioni programmatore"
+
+#: progs/gui/prog_config_center.h:35 progs/gui/prog_config_center.h:36
+msgid "Programmer Selection"
+msgstr "Selezione programmatore"
+
+#. i18n: file ./data/app_data/piklabui.rc line 161
+#: rc.cpp:48
+#, no-c-format
+msgid "Programmer Toolbar"
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:15
+msgid "Programmer Vpp"
+msgstr "Vpp delprogrammatore"
+
+#: piklab-prog/cli_interactive.cpp:54
+msgid "Programmer hardware configuration to use (for direct programmer)."
+msgstr ""
+
+#: progs/gui/prog_config_center.cpp:41
+msgid "Programmer in use:"
+msgstr "Programmatore in uso:"
+
+#: piklab-prog/cmdline.cpp:270
+msgid "Programmer is already disconnected."
+msgstr "Il programmatore è stato già disconnesso."
+
+#: piklab-prog/cmdline.cpp:274
+msgid "Programmer is already running."
+msgstr "Il programmatore è già stato avviato."
+
+#: piklab-prog/cmdline.cpp:278
+msgid "Programmer is already stopped."
+msgstr "Il programmatore è già stato fermato."
+
+#: progs/base/generic_prog.cpp:134
+msgid "Programmer is in bootload mode."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:158
+msgid "Programmer not specified."
+msgstr "Programmatore non specificato."
+
+#: piklab-prog/cli_interactive.cpp:57
+msgid "Programmer port (\"usb\" or device such as \"/dev/ttyS0\")"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:53
+msgid "Programmer to use."
+msgstr "Programmatore da usare."
+
+#: tools/list/device_info.cpp:59
+#, fuzzy
+msgid "Programmers"
+msgstr "Programmatore"
+
+#: tools/list/device_info.cpp:34
+#, fuzzy
+msgid "Programming Specifications"
+msgstr "Selezione programmatore"
+
+#: devices/pic/prog/pic_prog.cpp:710
+msgid "Programming calibration data needs a chip erase. Continue anyway?"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:738
+msgid "Programming calibration successful"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:735 devices/pic/prog/pic_prog.cpp:736
+msgid "Programming calibration..."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:272
+msgid "Programming device for debugging test..."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:277 progs/base/generic_prog.cpp:341
+msgid "Programming device memory..."
+msgstr ""
+
+#: libgui/toplevel.cpp:849
+msgid "Programming in progress. Cannot be aborted."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:279
+msgid "Programming successful"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:343
+#, fuzzy
+msgid "Programming successful."
+msgstr "Verifica avvenuta con successo"
+
+#: progs/base/generic_prog.cpp:33
+msgid "Programming..."
+msgstr "Programmazione in corso..."
+
+#: libgui/project_manager.cpp:190
+msgid "Project"
+msgstr "Progetto"
+
+#: libgui/project_wizard.cpp:187
+msgid "Project \"%1\"already exists. Overwrite it?"
+msgstr ""
+
+#: common/common/purl_base.cpp:51
+msgid "Project File"
+msgstr "File progetto"
+
+#: common/common/purl_base.cpp:127
+msgid "Project Files"
+msgstr "File progetto"
+
+#: libgui/toplevel.cpp:121
+#, fuzzy
+msgid "Project Manager"
+msgstr "File progetto"
+
+#: libgui/project_editor.cpp:21
+msgid "Project Options"
+msgstr "Opzioni progetto"
+
+#: libgui/toplevel.cpp:234
+msgid "Project Options..."
+msgstr "Opzioni progetto..."
+
+#. i18n: file ./data/app_data/piklabui.rc line 145
+#: rc.cpp:42
+#, no-c-format
+msgid "Project Toolbar"
+msgstr ""
+
+#: libgui/project_manager.cpp:526
+msgid "Project already loaded. Reload?"
+msgstr "Il progetto è già stato caricato. Lo carico nuovamente?"
+
+#: libgui/project.cpp:24
+msgid "Project file %1 does not exist."
+msgstr "Il file del progetto %1 non esiste."
+
+#: libgui/project_wizard.cpp:171
+msgid "Project name is empty."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:64
+msgid "Propic2 Vpp-1"
+msgstr "Propic2 Vpp-1"
+
+#: progs/direct/base/direct_prog_config.cpp:66
+msgid "Propic2 Vpp-2"
+msgstr "Propic2 Vpp-2"
+
+#: progs/direct/base/direct_prog_config.cpp:68
+msgid "Propic2 Vpp-3"
+msgstr "Propic2 Vpp-3"
+
+#: devices/pic/gui/pic_config_word_editor.cpp:93
+msgid "Protected Mask:"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:635
+msgid "Protecting code memory or data EEPROM on OTP devices is disabled as a security..."
+msgstr ""
+
+#: devices/base/generic_device.cpp:57
+msgid "QFN"
+msgstr "QFN"
+
+#: devices/base/generic_device.cpp:58
+#, fuzzy
+msgid "QFN-S"
+msgstr "DFN-S"
+
+#: piklab-prog/cli_interactive.cpp:38
+msgid "Quit."
+msgstr "Esci."
+
+#: libgui/toplevel.cpp:298
+msgid "R&eset"
+msgstr "Azz&era"
+
+#: libgui/toplevel.cpp:276
+msgid "R&estart"
+msgstr "Avvia di nuovo"
+
+#: libgui/text_editor.cpp:171
+msgid "R/O"
+msgstr "R/O"
+
+#: devices/base/generic_device.cpp:28
+msgid "ROM"
+msgstr "ROM"
+
+#: devices/base/generic_device.cpp:29
+msgid "ROM-less"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:78
+msgid "Raw Blank Value:"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:68
+msgid "Raw Value:"
+msgstr "Valore Grezzo:"
+
+#: devices/gui/memory_editor.cpp:278
+msgid "Re&load"
+msgstr "Ricarica"
+
+#: progs/manager/debug_manager.cpp:317
+msgid "Reached breakpoint."
+msgstr "Breakpoint raggiunto."
+
+#: devices/pic/gui/pic_register_view.cpp:83 progs/gui/prog_group_ui.cpp:34
+#: progs/gui/prog_group_ui.cpp:45 libgui/toplevel.cpp:953
+msgid "Read"
+msgstr "Leggi"
+
+#: devices/pic/gui/pic_register_view.cpp:262
+msgid "Read All"
+msgstr "Leggi tutto"
+
+#: libgui/hex_editor.cpp:39
+msgid "Read Only Mode"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:45
+msgid "Read device memory: \"read <hexfilename>\"."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:275
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:78
+msgid "Read id does not match the specified device name \"%1\"."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:273
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:76
+msgid "Read id: %1"
+msgstr "Lettura ID: %1"
+
+#: piklab-prog/cli_interactive.cpp:45
+msgid "Read or set a register or variable: \"x PORTB\" or \"x W 0x1A\"."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:343
+msgid "Read string is different than expected: %1 (%2)."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:291 piklab-prog/cmdline.cpp:296
+#: piklab-prog/cmdline.cpp:301
+msgid "Reading device memory not supported for specified programmer."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:319
+msgid "Reading device memory..."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:322
+#, fuzzy
+msgid "Reading done."
+msgstr "Lettura in corso..."
+
+#: progs/base/generic_prog.cpp:32
+msgid "Reading..."
+msgstr "Lettura in corso..."
+
+#: progs/base/generic_debug.cpp:48
+msgid "Ready to start debugging."
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:212
+msgid "Received length too short."
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:216
+msgid "Received string too short."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:107
+msgid "Received unexpected character ('%1' received; 'K' expected)."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:104
+msgid "Received unexpected character ('%1' received; 'K' or 'N' expected)."
+msgstr ""
+
+#: libgui/toplevel.cpp:905
+#, fuzzy
+msgid "Recompile First"
+msgstr "&Compila il file"
+
+#: progs/gui/prog_group_ui.cpp:36
+#, fuzzy
+msgid "Regenerating..."
+msgstr "Rigenera..."
+
+#: coff/base/coff_object.cpp:145
+#, fuzzy
+msgid "Register Parameter"
+msgstr "Registri"
+
+#: coff/base/cdb_parser.cpp:58
+#, fuzzy
+msgid "Register Space"
+msgstr "Registri"
+
+#: coff/base/coff_object.cpp:132
+#, fuzzy
+msgid "Register Variable"
+msgstr "Registri"
+
+#: libgui/editor_manager.cpp:489 libgui/watch_view.cpp:48
+#: libgui/project_manager_ui.cpp:127
+msgid "Registers"
+msgstr "Registri"
+
+#: devices/pic/gui/pic_register_view.cpp:273
+msgid "Registers information not available."
+msgstr "Informazioni sui registri non disponibile."
+
+#: coff/base/coff_object.cpp:248
+msgid "Relocation address beyong section size: %1/%2"
+msgstr ""
+
+#: coff/base/coff_object.cpp:251
+msgid "Relocation has unknown symbol: %1"
+msgstr ""
+
+#: coff/base/coff_object.cpp:255
+msgid "Relocation is an auxiliary symbol: %1"
+msgstr ""
+
+#: common/gui/editlistbox.cpp:131
+msgid "Remove All"
+msgstr "Rimuovi tutto"
+
+#: libgui/project_manager.cpp:208
+msgid "Remove From Project"
+msgstr "Rimuovi dal progetto"
+
+#: libgui/breakpoint_view.cpp:24
+msgid "Remove breakpoint"
+msgstr "Rimuovi breakpoint"
+
+#: tools/list/compile_process.cpp:28
+msgid "Replaced by \"xxx\" when \"wine\" is used."
+msgstr ""
+
+#: tools/list/compile_process.cpp:29
+msgid "Replaced by \"xxx\" when the device name is specified."
+msgstr ""
+
+#: tools/list/compile_process.cpp:27
+msgid "Replaced by \"xxx\" when there is a custom linker script."
+msgstr ""
+
+#: tools/list/compile_process.cpp:45
+msgid "Replaced by a separation into two arguments."
+msgstr ""
+
+#: tools/list/compile_process.cpp:34
+msgid "Replaced by the COFF filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:39
+msgid "Replaced by the device family name (when needed)."
+msgstr ""
+
+#: tools/list/compile_process.cpp:38
+msgid "Replaced by the device name."
+msgstr ""
+
+#: tools/list/compile_process.cpp:43
+msgid "Replaced by the linker script basename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:44
+msgid "Replaced by the linker script filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:42
+msgid "Replaced by the linker script path."
+msgstr ""
+
+#: tools/list/compile_process.cpp:37
+msgid "Replaced by the list filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:31
+msgid "Replaced by the list of additionnal libraries."
+msgstr ""
+
+#: tools/list/compile_process.cpp:30
+msgid "Replaced by the list of additionnal objects."
+msgstr ""
+
+#: tools/list/compile_process.cpp:35
+msgid "Replaced by the map filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:41
+msgid "Replaced by the object file name."
+msgstr ""
+
+#: tools/list/compile_process.cpp:32
+msgid "Replaced by the output filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:33
+msgid "Replaced by the project name."
+msgstr ""
+
+#: tools/list/compile_process.cpp:40
+msgid "Replaced by the relative input filepath(s)."
+msgstr ""
+
+#: tools/list/compile_process.cpp:26
+msgid "Replaced by the source directory."
+msgstr ""
+
+#: tools/list/compile_process.cpp:36
+msgid "Replaced by the symbol filename."
+msgstr ""
+
+#: libgui/toplevel.cpp:325
+msgid "Report Bug..."
+msgstr "Report Bug..."
+
+#: libgui/likeback.cpp:182
+msgid "Report a bug."
+msgstr "Segnala un bug."
+
+#: libgui/device_gui.cpp:99
+#, fuzzy
+msgid "Reset Filters"
+msgstr "Seleziona file"
+
+#: devices/pic/prog/pic_prog_specific.cpp:23
+msgid "Reset Held"
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:23
+msgid "Reset Released"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:194
+msgid "Reset into clip on emulation mode"
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:193
+msgid "Reset.<Translators: please translate the past form of the verb>"
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:196
+#, fuzzy
+msgid "Restarting..."
+msgstr "Avvia di nuovo..."
+
+#: progs/icd1/gui/icd1_group_ui.cpp:20
+msgid "Result:"
+msgstr ""
+
+#: piklab-hex/main.cpp:29
+msgid "Return checksum."
+msgstr ""
+
+#: piklab-coff/main.cpp:25
+#, fuzzy
+msgid "Return general informations."
+msgstr "Mostra informazione sulla licenza"
+
+#: piklab-hex/main.cpp:26
+#, fuzzy
+msgid "Return information about hex file."
+msgstr "Informazioni sui registri non disponibile."
+
+#: piklab-coff/main.cpp:29
+#, fuzzy
+msgid "Return informations about code lines (for object)."
+msgstr "Informazioni sui registri non disponibile."
+
+#: piklab-coff/main.cpp:30
+#, fuzzy
+msgid "Return informations about files."
+msgstr "Informazioni sui registri non disponibile."
+
+#: piklab-coff/main.cpp:28
+#, fuzzy
+msgid "Return informations about sections (for object)."
+msgstr "Informazioni sui registri non disponibile."
+
+#: piklab-coff/main.cpp:27
+#, fuzzy
+msgid "Return informations about symbols."
+msgstr "Informazioni sui registri non disponibile."
+
+#: piklab-coff/main.cpp:26
+#, fuzzy
+msgid "Return informations about variables (for object)."
+msgstr "Informazioni sui registri non disponibile."
+
+#: piklab-prog/cli_interactive.cpp:57
+msgid "Return the list of detected ports."
+msgstr "Ritorna la lista delle porte rilevate."
+
+#: piklab-prog/cmdline.cpp:58
+#, fuzzy
+msgid "Return the list of memory ranges."
+msgstr "Ritorna la lista dei programmatori supportati."
+
+#: common/cli/cli_main.cpp:52
+msgid "Return the list of recognized commands."
+msgstr ""
+
+#: piklab-hex/main.cpp:38 piklab-prog/cli_interactive.cpp:55
+#: piklab-coff/main.cpp:38
+msgid "Return the list of supported devices."
+msgstr "Ritorna la lista dei dispositivi supportati."
+
+#: piklab-hex/main.cpp:39
+#, fuzzy
+msgid "Return the list of supported fill options."
+msgstr "Ritorna la lista dei dispositivi supportati."
+
+#: piklab-prog/cli_interactive.cpp:56
+#, fuzzy
+msgid "Return the list of supported hex file formats."
+msgstr "Ritorna la lista dei dispositivi supportati."
+
+#: piklab-prog/cli_interactive.cpp:54
+#, fuzzy
+msgid "Return the list of supported programmer hardware configurations."
+msgstr "Ritorna la lista dei programmatori supportati."
+
+#: piklab-prog/cli_interactive.cpp:53
+msgid "Return the list of supported programmers."
+msgstr "Ritorna la lista dei programmatori supportati."
+
+#: coff/base/coff_object.cpp:331
+msgid "Rom Data"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:37
+msgid "Run device (release reset)."
+msgstr ""
+
+#: progs/base/prog_config.cpp:77
+#, fuzzy
+msgid "Run device after successful programming."
+msgstr "Programmazione a basso voltaggio"
+
+#: progs/base/generic_prog.cpp:224
+msgid "Run..."
+msgstr "Avvia..."
+
+#: devices/pic/prog/pic_prog_specific.cpp:19
+msgid "Running"
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:240 progs/base/generic_prog.cpp:221
+msgid "Running..."
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:38
+msgid "SBIT"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:57
+msgid "SBIT Space"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:78
+msgid "SBODEN controls BOD function"
+msgstr ""
+
+#: progs/sdcdb/base/sdcdb_debug.h:76
+msgid "SDCDB"
+msgstr ""
+
+#: devices/base/generic_device.cpp:47
+msgid "SDIP"
+msgstr "SDIP"
+
+#: coff/base/cdb_parser.cpp:56
+msgid "SFR Space"
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:41
+msgid "SFRs"
+msgstr "SFR"
+
+#: devices/base/generic_device.cpp:53
+msgid "SOIC"
+msgstr "SOIC"
+
+#: devices/base/generic_device.cpp:49
+msgid "SOT-23"
+msgstr "SOT-23"
+
+#: devices/base/generic_device.cpp:48
+#, fuzzy
+msgid "SPDIP"
+msgstr "PDIP"
+
+#: devices/base/generic_device.cpp:51
+msgid "SSOP"
+msgstr "SSOP"
+
+#: devices/pic/base/pic.cpp:73
+#, fuzzy
+msgid "SSP"
+msgstr "SSOP"
+
+#: devices/pic/base/pic_config.cpp:122
+msgid "SSP I/O mux (SCK/SLC, SDA/SDI, SD0)"
+msgstr "SSP I/O mux (SCK/SLC, SDA/SDI, SD0)"
+
+#: piklab-prog/cli_interactive.cpp:62
+msgid "Same as \"device\"."
+msgstr ""
+
+#: libgui/toplevel.cpp:190
+msgid "Save All"
+msgstr "Salva tutto"
+
+#: libgui/editor.cpp:53
+msgid "Save File"
+msgstr "Salva il file"
+
+#: libgui/log_view.cpp:132
+msgid "Save log to file"
+msgstr ""
+
+#: piklab-hex/main.cpp:94
+#, fuzzy
+msgid "Second hex file: "
+msgstr "Seleziona file Hex"
+
+#: devices/pic/base/pic_config.cpp:253
+#, fuzzy
+msgid "Secondary oscillator (LP)"
+msgstr "Oscillatore interno (senza CLKOUT)"
+
+#: coff/base/coff_object.cpp:55 coff/base/coff_object.cpp:155
+#, fuzzy
+msgid "Section"
+msgstr "Locazione:"
+
+#: piklab-coff/main.cpp:164
+#, fuzzy
+msgid "Sections:"
+msgstr "Locazione:"
+
+#: devices/pic/base/pic_protection.cpp:357
+msgid "Secure Segment"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:240
+#, fuzzy
+msgid "Secure segment EEPROM size"
+msgstr "Ampiezza blocco d'avvio"
+
+#: devices/pic/base/pic_config.cpp:241
+msgid "Secure segment RAM size"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:237
+msgid "Secure segment security"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:236
+msgid "Secure segment size"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:235
+#, fuzzy
+msgid "Secure segment write-protection"
+msgstr "Protezione scrittura dati"
+
+#: libgui/project_manager.cpp:222
+msgid "Select Device..."
+msgstr "Seleziona dispositivo..."
+
+#: common/gui/purl_gui.cpp:118
+#, fuzzy
+msgid "Select Directory"
+msgstr "Seleziona cartella"
+
+#: common/gui/purl_gui.cpp:147
+#, fuzzy
+msgid "Select File"
+msgstr "Seleziona file"
+
+#: libgui/project_wizard.cpp:89
+#, fuzzy
+msgid "Select Files"
+msgstr "Seleziona file"
+
+#: libgui/project_manager.cpp:170
+msgid "Select Linker Script"
+msgstr ""
+
+#: libgui/project_manager.cpp:298
+#, fuzzy
+msgid "Select Object File"
+msgstr "Seleziona file del progetto"
+
+#: libgui/project_manager.cpp:335
+msgid "Select Project file"
+msgstr "Seleziona file del progetto"
+
+#: libgui/project_manager.cpp:289
+msgid "Select Source File"
+msgstr "Seleziona file sorgente"
+
+#: libgui/device_gui.cpp:87
+msgid "Select a device"
+msgstr "Seleziona un dispositivo"
+
+#: devices/pic/base/pic.cpp:83
+#, fuzzy
+msgid "Self-Write"
+msgstr "Self-test"
+
+#: progs/gui/prog_group_ui.cpp:85
+msgid "Self-test"
+msgstr "Self-test"
+
+#: progs/icd2/base/icd2_prog.cpp:56
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:105
+msgid "Self-test failed (%1). Do you want to continue anyway?"
+msgstr ""
+
+#: progs/icd1/base/icd1.cpp:109
+msgid "Self-test failed (returned value is %1)"
+msgstr ""
+
+#: progs/icd1/base/icd1_prog.cpp:29
+msgid "Self-test failed. Do you want to continue anyway?"
+msgstr "Self-test fallito. Vuoi comunque continuare?"
+
+#: progs/icd2/base/icd2_prog.cpp:55
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:104
+msgid "Self-test failed: %1"
+msgstr ""
+
+#: libgui/likeback.cpp:582
+msgid "Send"
+msgstr "Invia"
+
+#: progs/direct/gui/direct_config_widget.cpp:78
+#: progs/direct/gui/direct_config_widget.cpp:98
+msgid "Send 0xA55A"
+msgstr "Trasmetti 0xA55A"
+
+#: libgui/likeback.cpp:609
+msgid "Send a Comment"
+msgstr "Invia un commento"
+
+#: libgui/likeback.cpp:181
+msgid "Send a comment about what you don't like."
+msgstr ""
+
+#: libgui/likeback.cpp:180
+msgid "Send a comment about what you like."
+msgstr ""
+
+#: progs/gui/port_selector.cpp:21
+msgid "Serial"
+msgstr "Seriale"
+
+#: devices/mem24/mem24/mem24_group.h:25
+msgid "Serial Memory 24"
+msgstr ""
+
+#: common/port/port.cpp:61
+msgid "Serial Port"
+msgstr "Porta seriale"
+
+#: libgui/project_manager.cpp:166
+msgid "Set Custom..."
+msgstr ""
+
+#: libgui/project_manager.cpp:167
+msgid "Set Default"
+msgstr ""
+
+#: libgui/likeback.cpp:393
+msgid "Set Email Address"
+msgstr "Imposta indirizzo e-mail"
+
+#: libgui/global_config.cpp:22
+msgid "Set User Ids to unprotected checksum (if User Ids are empty)."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:46
+msgid "Set a breakpoint \"break e 0x04\" or list all breakpoints \"break\"."
+msgstr ""
+
+#: libgui/breakpoint_view.cpp:24
+msgid "Set breakpoint"
+msgstr "Imposta breakpoint"
+
+#: piklab-prog/cli_interactive.cpp:59
+msgid "Set if target device is self-powered."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:39
+msgid "Set property value: \"set <property> <value>\" or \"<property> <value>\"."
+msgstr ""
+
+#: devices/pic/gui/pic_memory_editor.cpp:319
+#: devices/pic/gui/pic_memory_editor.cpp:331
+msgid "Set to unprotected checksum"
+msgstr ""
+
+#: progs/base/generic_debug.cpp:43
+msgid "Setting up debugging session."
+msgstr ""
+
+#: libgui/toplevel.cpp:280 libgui/toplevel.cpp:304
+#, fuzzy
+msgid "Settings..."
+msgstr "Rilevazione in corso ..."
+
+#: coff/base/cdb_parser.cpp:34 coff/base/coff_object.cpp:161
+#, fuzzy
+msgid "Short"
+msgstr "Porta USB"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:850
+msgid "Show %1 specific options"
+msgstr ""
+
+#: libgui/toplevel.cpp:300
+msgid "Show Program Counter"
+msgstr "Mostra Program Counter"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:857
+msgid "Show all options"
+msgstr "Mostra tutte le opzioni"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:858
+msgid "Show author information"
+msgstr ""
+
+#: libgui/global_config.cpp:23
+msgid "Show close buttons on tabs (need restart to take effect)."
+msgstr ""
+
+#: libgui/toplevel.cpp:214
+#, fuzzy
+msgid "Show disassembly location"
+msgstr "Mostra tutte le opzioni"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:842
+msgid "Show help about options"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:860
+msgid "Show license information"
+msgstr "Mostra informazione sulla licenza"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:859
+msgid "Show version information"
+msgstr "Mostra informazione sulla versione"
+
+#: coff/base/cdb_parser.cpp:43
+#, fuzzy
+msgid "Signed"
+msgstr "Invia"
+
+#: tools/sdcc/sdcc.h:35
+msgid "Small Device C Compiler"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:189
+msgid "Software"
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:28
+msgid ""
+"Some programming cards need low clock rate:\n"
+"adding delay to clock pulses might help."
+msgstr ""
+
+#: tools/base/generic_tool.cpp:34
+msgid "Source Directory"
+msgstr "Cartella dei sorgenti"
+
+#: piklab-coff/main.cpp:175
+#, fuzzy
+msgid "Source Lines:"
+msgstr "Sorgenti"
+
+#: libgui/project_manager.cpp:217 libgui/project_manager_ui.cpp:34
+msgid "Sources"
+msgstr "Sorgenti"
+
+#: piklab-prog/cli_interactive.cpp:248
+msgid "Special Function Registers:"
+msgstr ""
+
+#: progs/gui/prog_config_center.cpp:65
+msgid "Specific"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:101
+msgid "Stack full/underflow reset"
+msgstr ""
+
+#: libgui/project_manager.cpp:185 libgui/config_center.h:53
+#: libgui/project_manager_ui.cpp:63
+msgid "Standalone File"
+msgstr ""
+
+#: libgui/config_center.h:54
+#, fuzzy
+msgid "Standalone File Compilation"
+msgstr "Operazione standard"
+
+#: devices/pic/base/pic_config.cpp:232 devices/pic/base/pic_config.cpp:239
+#, fuzzy
+msgid "Standard Security"
+msgstr "Operazione standard"
+
+#: devices/pic/base/pic_config.cpp:115
+msgid "Standard operation"
+msgstr "Operazione standard"
+
+#: devices/pic/base/pic_config.cpp:246
+#, fuzzy
+msgid "Standard security"
+msgstr "Operazione standard"
+
+#: piklab-prog/cli_interactive.cpp:43
+msgid "Start or restart debugging session."
+msgstr ""
+
+#: piklab-hex/main.cpp:140
+#, fuzzy
+msgid "Start:"
+msgstr "Stato:"
+
+#: piklab-prog/cli_prog_manager.cpp:61
+msgid "Starting debug session without COFF file (no source file information)."
+msgstr ""
+
+#: piklab-prog/cli_prog_manager.cpp:62
+msgid "Starting debugging session with device memory in an unknown state. You may want to reprogram the device."
+msgstr ""
+
+#: coff/base/coff_object.cpp:131
+msgid "Static Symbol"
+msgstr ""
+
+#: devices/base/device_group.cpp:228 libgui/breakpoint_view.cpp:47
+msgid "Status"
+msgstr "Stato"
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:21
+msgid "Status:"
+msgstr "Stato:"
+
+#: progs/manager/debug_manager.cpp:302
+#, fuzzy
+msgid "Step"
+msgstr "Ferma."
+
+#: piklab-prog/cli_interactive.cpp:44
+msgid "Step one instruction."
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:224
+msgid "Stop Watching"
+msgstr "Stop Watching"
+
+#: piklab-prog/cmdline.cpp:39
+msgid "Stop device (hold reset)."
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:19
+msgid "Stopped"
+msgstr "Fermato"
+
+#: progs/manager/prog_manager.cpp:155 progs/manager/prog_manager.cpp:175
+#, fuzzy
+msgid "Stopped."
+msgstr "Fermato"
+
+#: common/common/number.cpp:23
+msgid "String"
+msgstr "Stringa"
+
+#: coff/base/cdb_parser.cpp:19 coff/base/cdb_parser.cpp:37
+#: coff/base/coff_object.cpp:166
+msgid "Structure"
+msgstr ""
+
+#: coff/base/coff_object.cpp:138
+msgid "Structure Tag"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:85
+msgid "Subroutine to initialize W registers to 0x0000"
+msgstr ""
+
+#: common/global/about.cpp:88
+msgid "Support for direct programmers with bidirectionnal buffers."
+msgstr ""
+
+#: devices/base/device_group.cpp:36
+msgid "Supported"
+msgstr "Supportato"
+
+#: common/cli/cli_main.cpp:93
+msgid "Supported commands:"
+msgstr "Comandi supportati:"
+
+#: piklab-prog/cmdline.cpp:115
+msgid "Supported devices for \"%1\":"
+msgstr ""
+
+#: piklab-hex/main.cpp:264 piklab-prog/cmdline.cpp:112
+#: piklab-coff/main.cpp:265
+msgid "Supported devices:"
+msgstr "Dispositivi supportati:"
+
+#: piklab-prog/cmdline.cpp:92
+#, fuzzy
+msgid "Supported hardware configuration for programmers:"
+msgstr "Programmatori supportati:"
+
+#: piklab-prog/cmdline.cpp:75
+msgid "Supported hex file formats:"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:83
+msgid "Supported programmers:"
+msgstr "Programmatori supportati:"
+
+#: libgui/toplevel.cpp:208
+msgid "Switch Header/Implementation"
+msgstr ""
+
+#: libgui/editor_manager.cpp:37
+msgid "Switch to editor"
+msgstr ""
+
+#: libgui/toplevel.cpp:206
+msgid "Switch to..."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:137
+msgid "Switching off, monitor off"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:138
+msgid "Switching on, monitor off"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:139
+msgid "Switching on, monitor on"
+msgstr ""
+
+#: coff/base/coff_object.cpp:215
+msgid "Symbol without needed auxilliary symbol (type=%1)"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:124 piklab-coff/main.cpp:154
+msgid "Symbols:"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:191
+msgid "T0CKI interrupt service routine"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:117
+msgid "T1OSO/T1CKI on RA6"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:118
+msgid "T1OSO/T1CKI on RB2"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:185
+msgid "TIMER0 interrupt service routine"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:119
+msgid "TMR0/T5CKI external clock mux"
+msgstr ""
+
+#: devices/base/generic_device.cpp:54
+msgid "TQFP"
+msgstr "TQFP"
+
+#: devices/base/generic_device.cpp:52
+msgid "TSSOP"
+msgstr "TSSOP"
+
+#: devices/pic/base/pic_config.cpp:30
+msgid "Table read-protection"
+msgstr "Protezione lettura tabella"
+
+#: progs/direct/base/direct_prog_config.cpp:28
+msgid "Tait 7405/7406"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:26
+msgid "Tait classic"
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:15 progs/icd2/base/icd2.cpp:51
+msgid "Target Vdd"
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:15
+msgid "Target Vpp"
+msgstr ""
+
+#: piklab-hex/main.cpp:38 piklab-prog/cli_interactive.cpp:55
+#: piklab-coff/main.cpp:38
+msgid "Target device."
+msgstr ""
+
+#: progs/base/prog_config.cpp:73
+msgid "Target is self-powered (when possible)."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:261
+#, fuzzy
+msgid "Temperature protection"
+msgstr "Range di temperatura: "
+
+#: devices/base/device_group.cpp:291
+msgid "Temperature range: "
+msgstr "Range di temperatura: "
+
+#: libgui/config_gen.cpp:179
+msgid "Template Generator"
+msgstr ""
+
+#: coff/base/disassembler.cpp:278
+msgid "Template source file generated by piklab"
+msgstr ""
+
+#: libgui/project_wizard.cpp:234
+msgid "Template source file generation not implemented yet for this toolchain..."
+msgstr ""
+
+#: libgui/project_wizard.cpp:240
+msgid "Template source file generation only partially implemented."
+msgstr ""
+
+#: common/global/about.cpp:91
+msgid "Test of PICkit2 and ICD2 programmer."
+msgstr ""
+
+#: common/common/group.cpp:15
+msgid "Tested"
+msgstr ""
+
+#: tools/pic30/pic30.cpp:63
+msgid "The <a href=\"%1\">PIC30 ToolChain</a> is a toolsuite for 16-bit PICs available from Microchip. Most of it is available under the GNU Public License."
+msgstr ""
+
+#: tools/sdcc/sdcc.cpp:28
+msgid "The <a href=\"%1\">Small Devices C Compiler</a> is an open-source C compiler for several families of microcontrollers."
+msgstr ""
+
+#: tools/boost/boost.cpp:68
+msgid "The Boost toolchain needs to be run by Wine with \"Windows NT 4.0\" compatibility. This can be configured with the Wine configuration utility."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:31
+msgid "The CLOCK pin is used to synchronize serial data of the DATA IN and DATA OUT pins."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:37
+msgid "The DATA IN pin is used to receive data from the programmed device."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:34
+msgid "The DATA OUT pin is used to send data to the programmed device."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:40
+msgid ""
+"The DATA RW pin selects the direction of data buffer.\n"
+"Must be set to GND if your programmer does not use bi-directionnal buffer."
+msgstr ""
+
+#: libgui/toplevel.cpp:731
+msgid "The Pikloops utility (%1) is not installed in your system."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:28
+msgid ""
+"The VDD pin is used to apply 5V to the programmed device.\n"
+"Must be set to GND if your programmer doesn't control the VDD line."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:25
+msgid "The VPP pin is used to select the high voltage programming mode."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:675
+msgid "The calibration word %1 is not valid."
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:65
+msgid "The current programmer \"%1\" does not support device \"%2\"."
+msgstr "L'attuale programmatore \"%1\" non supporta il dispositivo \"%2\"."
+
+#: devices/pic/prog/pic_prog.cpp:662
+msgid "The device cannot be erased first by the selected programmer so programming may fail..."
+msgstr ""
+
+#: libgui/gui_prog_manager.cpp:38
+msgid "The device memory is in an unknown state. You may want to reprogram the device. Continue anyway?"
+msgstr ""
+
+#: libgui/likeback.cpp:396
+msgid "The email address is optional. If you do not provide any, your comments will be sent anonymously. Just click OK in that case."
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:1313
+msgid "The files/URLs opened by the application will be deleted after use"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:142
+msgid ""
+"The firmware version (%1) is higher than the version tested with piklab (%2%3).\n"
+"You may experience problems."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:158
+msgid ""
+"The firmware version (%1) is lower than the recommended version (%2%3).\n"
+"It is recommended to upgrade the firmware."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:150
+msgid ""
+"The firmware version (%1) is lower than the version tested with piklab (%2%3).\n"
+"You may experience problems."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:167
+msgid "The first argument should be \"e\"."
+msgstr ""
+
+#: piklab-hex/main.cpp:170
+#, fuzzy
+msgid "The first hex file is a subset of the second one."
+msgstr "File Hex non specificato."
+
+#: piklab-prog/cli_interactive.cpp:299
+msgid "The given value is too large (max: %1)."
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:71
+msgid "The hardware name is already used for a standard hardware."
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:113
+msgid "The number of active breakpoints is higher than the maximum for the current debugger (%1): disabling the last breakpoint."
+msgstr ""
+
+#: libgui/toplevel.cpp:904
+msgid "The project hex file may not be up-to-date since some project files have been modified."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:650
+msgid "The range cannot be erased first by the selected programmer so programming may fail..."
+msgstr ""
+
+#: piklab-hex/main.cpp:171
+#, fuzzy
+msgid "The second hex file is a subset of the first one."
+msgstr "File Hex non specificato."
+
+#: piklab-prog/cmdline.cpp:335
+#, fuzzy
+msgid "The selected device \"%1\" is not supported by the selected programmer."
+msgstr "Il dispositivo selezionato \"%1\" non è supportato dallo specificato programmatore."
+
+#: libgui/register_view.cpp:45
+msgid "The selected device has no register."
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:101
+msgid "The selected device is not supported by this programmer."
+msgstr ""
+
+#: libgui/gui_prog_manager.cpp:29
+#, fuzzy
+msgid "The selected operation will stop the debugging session. Continue anyway?"
+msgstr "L'attuale programmatore \"%1\" non supporta il dispositivo \"%2\"."
+
+#: devices/pic/prog/pic_prog.cpp:500
+#, fuzzy
+msgid "The selected programmer cannot read %1: operation skipped."
+msgstr "Il dispositivo selezionato \"%1\" non è supportato dallo specificato programmatore."
+
+#: progs/base/generic_prog.cpp:298
+msgid "The selected programmer cannot read device memory."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:486 devices/pic/prog/pic_prog.cpp:557
+#, fuzzy
+msgid "The selected programmer cannot read the specified memory range."
+msgstr "Il dispositivo selezionato \"%1\" non è supportato dallo specificato programmatore."
+
+#: devices/pic/prog/pic_prog.cpp:442
+#, fuzzy
+msgid "The selected programmer does not support erasing neither the specified range nor the whole device."
+msgstr "L'attuale programmatore \"%1\" non supporta il dispositivo \"%2\"."
+
+#: devices/pic/prog/pic_prog.cpp:394
+#, fuzzy
+msgid "The selected programmer does not support erasing the whole device."
+msgstr "L'attuale programmatore \"%1\" non supporta il dispositivo \"%2\"."
+
+#: piklab-prog/cmdline.cpp:341
+#, fuzzy
+msgid "The selected programmer does not supported the specified hardware configuration (\"%1\")."
+msgstr "Il dispositivo selezionato \"%1\" non è supportato dallo specificato programmatore."
+
+#: tools/list/compile_manager.cpp:135
+msgid "The selected toolchain (%1) cannot assemble file. It only supports files with extensions: %2"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:110
+msgid "The selected toolchain (%1) cannot compile file. It only supports files with extensions: %2"
+msgstr ""
+
+#: tools/base/tool_group.cpp:130
+#, fuzzy
+msgid "The selected toolchain (%1) does not support device %2. Continue anyway?"
+msgstr "L'attuale programmatore \"%1\" non supporta il dispositivo \"%2\"."
+
+#: libgui/project_wizard.cpp:206
+msgid "The selected toolchain can only compile a single source file and you have selected %1 source files. Continue anyway? "
+msgstr ""
+
+#: tools/list/compile_manager.cpp:72
+msgid "The selected toolchain only supports single-file project."
+msgstr ""
+
+#: libgui/device_editor.cpp:64
+msgid "The target device is not configured and cannot be guessed from source file. The source file either cannot be found or does not contain any processor directive."
+msgstr ""
+
+#: libgui/gui_debug_manager.cpp:88
+msgid "The toolchain in use does not generate all necessary debugging information with the selected device. This may reduce debugging capabilities."
+msgstr ""
+
+#: piklab-hex/main.cpp:172
+msgid "The two hex files are different at address %1."
+msgstr ""
+
+#: piklab-hex/main.cpp:169
+#, fuzzy
+msgid "The two hex files have the same content."
+msgstr "File Hex non specificato."
+
+#: tools/base/tool_group.cpp:128
+msgid "There were errors detecting supported devices for the selected toolchain (%1). Please check the toolchain configuration. Continue anyway?"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:204
+msgid "This command needs a commands filename."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:216
+msgid "This command needs an hex filename."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:218
+#, fuzzy
+msgid "This command takes no argument."
+msgstr "Troppi argomenti."
+
+#: piklab-prog/cli_interactive.cpp:128
+msgid "This command takes no or one argument"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:185
+msgid "This command takes no or two argument."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:139 piklab-prog/cli_interactive.cpp:143
+#: piklab-prog/cli_interactive.cpp:189
+msgid "This command takes one argument."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:150
+msgid "This command takes one or two argument."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:135
+#, fuzzy
+msgid "This command takes two arguments."
+msgstr "Troppi argomenti."
+
+#: progs/gui/prog_group_ui.cpp:100
+msgid "This device has no calibration information."
+msgstr ""
+
+#: libgui/likeback.cpp:174
+msgid "This is a quick feedback system for %1."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:645
+msgid "This memory range is programming protected."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:38
+msgid ""
+"This pin is driven by the programmed device.\n"
+"Without device, it must follow the \"Data out\" pin (when powered on)."
+msgstr ""
+
+#: common/nokde/nokde_kaboutdata.cpp:437
+msgid "This program is distributed under the terms of the %1."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:77
+msgid "This programmer pulses MCLR from 5V to 0V and then 12V to enter programming mode. It uses a multiplexer to switch between 5V and 12V (Vdd is here the multiplexer pin).<p>Webpage: <a href=\"http://www.epemag.wimborne.co.uk/1001.htm\">http://www.epemag.wimborne.co.uk/1001.htm</a>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:272
+msgid "This tool cannot be automatically detected."
+msgstr ""
+
+#: libgui/config_gen.cpp:119
+msgid "This toolchain does not need explicit config bits."
+msgstr ""
+
+#: progs/pickit2/base/pickit_prog.cpp:49
+msgid "This will overwrite the device code memory. Continue anyway?"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:161
+#: tools/gui/toolchain_config_widget.cpp:178
+msgid "Timeout"
+msgstr "Timeout"
+
+#: progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp:30
+#, fuzzy
+msgid "Timeout (ms):"
+msgstr "Timeout"
+
+#: common/port/serial.cpp:280
+msgid "Timeout receiving data (%1/%2 bytes received)."
+msgstr ""
+
+#: common/port/serial.cpp:306
+msgid "Timeout sending data (%1 bytes left)."
+msgstr ""
+
+#: common/port/serial.cpp:235
+msgid "Timeout sending data (%1/%2 bytes sent)."
+msgstr ""
+
+#: progs/icd1/base/icd1_serial.cpp:51
+msgid "Timeout synchronizing."
+msgstr ""
+
+#: progs/gpsim/base/gpsim.cpp:72
+msgid "Timeout waiting for \"gpsim\"."
+msgstr ""
+
+#: common/port/serial.cpp:265
+msgid "Timeout waiting for data."
+msgstr ""
+
+#: progs/direct/base/direct_mem24.cpp:125
+msgid "Timeout writing at address %1"
+msgstr ""
+
+#: common/port/usb_port.cpp:394
+msgid "Timeout: only some data received (%1/%2 bytes)."
+msgstr ""
+
+#: common/port/usb_port.cpp:360
+msgid "Timeout: only some data sent (%1/%2 bytes)."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:144
+msgid "Timer1"
+msgstr "Timer1"
+
+#: tools/pic30/pic30_generator.cpp:95
+msgid "Timer1 interrupt service routine"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:114
+msgid "Timer1 oscillator mode"
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader_prog.h:31
+#, fuzzy
+msgid "Tiny Bootloader"
+msgstr "Blocco di Avvio"
+
+#: libgui/likeback.cpp:175
+msgid "To help us improve it, your comments are important."
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:140
+msgid "Toggle Device Power..."
+msgstr ""
+
+#: piklab-hex/main.cpp:72 piklab-coff/main.cpp:61
+#, fuzzy
+msgid "Too few arguments."
+msgstr "Troppi argomenti."
+
+#: piklab-hex/main.cpp:73 piklab-prog/cli_interactive.cpp:214
+#: piklab-prog/cli_interactive.cpp:217 piklab-prog/cmdline.cpp:215
+#: piklab-coff/main.cpp:62
+msgid "Too many arguments."
+msgstr "Troppi argomenti."
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:145
+#, fuzzy
+msgid "Too many failures: bailing out."
+msgstr "Troppi argomenti."
+
+#: libgui/project_editor.cpp:56
+#, fuzzy
+msgid "Toochain"
+msgstr "Locazione"
+
+#: libgui/config_gen.cpp:48
+msgid "Tool Type:"
+msgstr ""
+
+#: libgui/toplevel.cpp:216
+msgid "Tool Views"
+msgstr ""
+
+#: tools/list/tools_config_widget.cpp:45 libgui/config_gen.cpp:39
+#: libgui/project_wizard.cpp:134
+msgid "Toolchain:"
+msgstr ""
+
+#: tools/list/device_info.cpp:51
+msgid "Tools"
+msgstr ""
+
+#: libgui/likeback.cpp:657
+msgid "Transfer Error"
+msgstr ""
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:23
+msgid "Trying to enter bootloader mode..."
+msgstr ""
+
+#: coff/base/coff_object.cpp:141
+msgid "Type Definition"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:76
+msgid "USART"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:75 progs/gui/port_selector.cpp:21
+msgid "USB"
+msgstr "USB"
+
+#: common/port/port.cpp:63
+msgid "USB Port"
+msgstr "Porta USB"
+
+#: progs/picdem_bootloader/gui/picdem_bootloader_ui.cpp:25
+#, fuzzy
+msgid "USB Product Id:"
+msgstr "Porta USB"
+
+#: progs/picdem_bootloader/gui/picdem_bootloader_ui.cpp:19
+msgid "USB Vendor Id:"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:197
+msgid "USB clock (PLL divided by)"
+msgstr ""
+
+#: common/port/usb_port.cpp:266
+#, fuzzy
+msgid "USB support disabled"
+msgstr " nessuna porta rilevata"
+
+#: common/global/about.cpp:90
+msgid "USB support for ICD2 programmer."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:127
+msgid "USB voltage regulator"
+msgstr "Regolatore di tensione USB"
+
+#: devices/pic/base/pic_config.cpp:85
+msgid "Undefined"
+msgstr "Non definito"
+
+#: coff/base/coff_object.cpp:135
+#, fuzzy
+msgid "Undefined Label"
+msgstr "Non definito"
+
+#: coff/base/coff_object.cpp:123
+#, fuzzy
+msgid "Undefined Section"
+msgstr "Non definito"
+
+#: coff/base/coff_object.cpp:142
+#, fuzzy
+msgid "Undefined Static"
+msgstr "Non definito"
+
+#: progs/icd2/base/icd2.cpp:173
+msgid "Unexpected answer ($7F00) from ICD2 (%1)."
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:180
+msgid "Unexpected answer (08) from ICD2 (%1)."
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:674
+msgid "Unexpected argument '%1'."
+msgstr ""
+
+#: devices/base/hex_buffer.cpp:140
+msgid "Unexpected end-of-file."
+msgstr ""
+
+#: devices/base/hex_buffer.cpp:141
+msgid "Unexpected end-of-line (line %1)."
+msgstr ""
+
+#: coff/base/coff_object.cpp:329
+msgid "Uninitialized Data"
+msgstr ""
+
+#: coff/base/coff_object.cpp:167
+#, fuzzy
+msgid "Union"
+msgstr "Sconosciuto"
+
+#: coff/base/coff_object.cpp:140
+msgid "Union Tag"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:57
+msgid "Unitialized variables in X-space"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:61
+msgid "Unitialized variables in Y-space"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:65
+msgid "Unitialized variables in near data memory"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:25
+msgid "Unix"
+msgstr "Unix"
+
+#: tools/gui/toolchain_config_widget.cpp:225
+#: devices/base/generic_device.cpp:21 coff/base/text_coff.cpp:256
+msgid "Unknown"
+msgstr "Sconosciuto"
+
+#: common/common/purl_base.cpp:57
+msgid "Unknown File"
+msgstr "File sconosciuto"
+
+#: common/cli/cli_main.cpp:29
+msgid "Unknown command: %1"
+msgstr "Comando sconosciuto: %1"
+
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:47
+#, fuzzy
+msgid "Unknown device"
+msgstr "Dispositivo sconosciuto."
+
+#: piklab-hex/main.cpp:223 piklab-prog/cmdline.cpp:364
+#: piklab-coff/main.cpp:238
+msgid "Unknown device \"%1\"."
+msgstr "Dispositivo sconosciuto \"%1\"."
+
+#: devices/pic/prog/pic_prog.cpp:278
+msgid "Unknown device."
+msgstr "Dispositivo sconosciuto."
+
+#: coff/base/coff_archive.cpp:92
+#, fuzzy
+msgid "Unknown file member offset: %1"
+msgstr "Formato esadecimale del file sconosciuto \"%1\"."
+
+#: piklab-prog/cmdline.cpp:379
+#, fuzzy
+msgid "Unknown hex file format \"%1\"."
+msgstr "Formato esadecimale del file sconosciuto \"%1\"."
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:84
+msgid "Unknown id returned by bootloader (%1 read and %2 expected)."
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:521
+#: common/nokde/nokde_kcmdlineargs.cpp:537
+msgid "Unknown option '%1'."
+msgstr "Opzione sconosciuta '%1'."
+
+#: piklab-prog/cmdline.cpp:353
+msgid "Unknown programmer \"%1\"."
+msgstr "Programmatore sconosciuto \"%1\"."
+
+#: piklab-prog/cmdline.cpp:397 piklab-prog/cmdline.cpp:445
+msgid "Unknown property \"%1\""
+msgstr "Proprietà sconosciuta \"%1\"."
+
+#: piklab-hex/main.cpp:235 piklab-hex/main.cpp:248 piklab-coff/main.cpp:241
+#: piklab-coff/main.cpp:250
+#, fuzzy
+msgid "Unknown property \"%1\"."
+msgstr "Proprietà sconosciuta \"%1\"."
+
+#: piklab-prog/cli_interactive.cpp:307
+msgid "Unknown register or variable name."
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:221 progs/sdcdb/base/sdcdb_debug.cpp:220
+msgid "Unknown state for IO bit: %1 (%2)"
+msgstr ""
+
+#: piklab-hex/main.cpp:183
+msgid "Unprotected checksum: %1"
+msgstr ""
+
+#: devices/base/hex_buffer.cpp:139
+msgid "Unrecognized format (line %1)."
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:86
+msgid "Unrecognized record"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:40
+msgid "Unset property value: \"unset <property>\"."
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:44
+#, fuzzy
+msgid "Unsigned"
+msgstr "Non definito"
+
+#: coff/base/coff_object.cpp:170
+#, fuzzy
+msgid "Unsigned Char"
+msgstr "Non definito"
+
+#: coff/base/coff_object.cpp:172
+#, fuzzy
+msgid "Unsigned Int"
+msgstr "Non definito"
+
+#: coff/base/coff_object.cpp:173
+#, fuzzy
+msgid "Unsigned Long"
+msgstr "Non definito"
+
+#: coff/base/coff_object.cpp:171
+#, fuzzy
+msgid "Unsigned Short"
+msgstr "Non definito"
+
+#: devices/base/device_group.cpp:36
+msgid "Unsupported"
+msgstr "Non supportato"
+
+#: common/common/group.cpp:14
+#, fuzzy
+msgid "Untested"
+msgstr "non testato"
+
+#: tools/gui/toolchain_config_center.cpp:27
+msgid "Update"
+msgstr "Aggiorna"
+
+#: piklab-prog/cmdline.cpp:51
+msgid "Upload firmware to programmer: \"upload_firmware <hexfilename>\"."
+msgstr ""
+
+#: progs/pickit2/base/pickit2_prog.cpp:65
+#, fuzzy
+msgid "Uploading Firmware..."
+msgstr "Errore nel caricamento del firmware."
+
+#: piklab-prog/cmdline.cpp:321
+#, fuzzy
+msgid "Uploading firmware is not supported for the specified programmer."
+msgstr "Aggiornamento del firmware non è supportato dal programmatore specificato."
+
+#: progs/base/generic_prog.cpp:262
+#, fuzzy
+msgid "Uploading firmware..."
+msgstr "Errore nel caricamento del firmware."
+
+#: progs/gui/prog_group_ui.cpp:67
+#, fuzzy
+msgid "Uploading..."
+msgstr "Carica..."
+
+#: coff/base/cdb_parser.cpp:30
+msgid "Upper-128-byte Pointer"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:838
+msgid "Usage: %1 %2\n"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:783
+msgid "Use --help to get a list of available command line options."
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:83
+msgid "Used Mask:"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:27 coff/base/coff_object.cpp:328
+msgid "User IDs"
+msgstr "ID utente"
+
+#: piklab-prog/cli_prog_manager.cpp:22
+msgid "Using port from configuration file."
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:73
+msgid "Value:"
+msgstr "Valore:"
+
+#: devices/pic/gui/pic_group_ui.cpp:68
+msgid "Variables"
+msgstr "Variabili"
+
+#: tools/gputils/gputils_generator.cpp:58
+#: tools/gputils/gputils_generator.cpp:128
+#: tools/gputils/gputils_generator.cpp:208
+#, fuzzy
+msgid "Variables declaration"
+msgstr "Variabili"
+
+#: piklab-coff/main.cpp:146
+#, fuzzy
+msgid "Variables:"
+msgstr "Variabili"
+
+#: devices/base/device_group.cpp:295
+msgid "Vdd (V)"
+msgstr "Vdd (V)"
+
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:102
+msgid "Vdd voltage level error; "
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:49
+msgid "Velleman K8048"
+msgstr "Velleman K8048"
+
+#: progs/base/prog_config.cpp:70
+#, fuzzy
+msgid "Verify device memory after programming."
+msgstr "Programmazione a basso voltaggio"
+
+#: piklab-prog/cmdline.cpp:43
+msgid "Verify device memory: \"verify <hexfilename>\"."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:379
+#, fuzzy
+msgid "Verifying successful."
+msgstr "Verifica avvenuta con successo"
+
+#: progs/base/generic_prog.cpp:34 progs/base/generic_prog.cpp:377
+msgid "Verifying..."
+msgstr "Verifica in corso..."
+
+#: progs/icd2/gui/icd2_group_ui.cpp:31 progs/gui/prog_group_ui.cpp:68
+#: libgui/project_editor.cpp:41
+msgid "Version:"
+msgstr "Versione:"
+
+#: libgui/project_manager_ui.cpp:34
+msgid "Views"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:35 coff/base/coff_object.cpp:159
+msgid "Void"
+msgstr ""
+
+#: libgui/device_gui.cpp:413
+msgid "Voltage-Frequency Graphs"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:79
+msgid "Voltages"
+msgstr "Tensioni"
+
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:101
+msgid "Vpp voltage level error; "
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:90
+msgid "WDT post-scaler"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:81
+msgid "Wake-up reset"
+msgstr "Azzera Wake-up"
+
+#: tools/gputils/gputils_config.cpp:13 tools/c18/c18_config.cpp:12
+msgid "Warning and errors"
+msgstr "Warning e errori"
+
+#: tools/gputils/gui/gputils_ui.cpp:24 tools/c18/gui/c18_ui.cpp:23
+msgid "Warning level:"
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:85
+#: devices/pic/gui/pic_register_view.cpp:224
+msgid "Watch"
+msgstr ""
+
+#: libgui/watch_view.cpp:110
+msgid "Watch Register"
+msgstr "Registro Watch"
+
+#: libgui/toplevel.cpp:127
+#, fuzzy
+msgid "Watch View"
+msgstr "Watchdog timer"
+
+#: devices/pic/base/pic_config.cpp:188
+msgid "Watchdog"
+msgstr "Watchdog"
+
+#: devices/pic/base/pic_config.cpp:33
+msgid "Watchdog timer"
+msgstr "Watchdog timer"
+
+#: devices/pic/base/pic_config.cpp:267
+#, fuzzy
+msgid "Watchdog timer postscaler"
+msgstr "Watchdog timer"
+
+#: devices/pic/base/pic_config.cpp:266
+#, fuzzy
+msgid "Watchdog timer prescaler"
+msgstr "Watchdog timer"
+
+#: devices/pic/base/pic_config.cpp:186
+msgid "Watchdog timer prescaler A"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:187
+msgid "Watchdog timer prescaler B"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:106 devices/pic/base/pic_config.cpp:265
+msgid "Watchdog timer window"
+msgstr "Finestra Watchdog timer"
+
+#: libgui/watch_view.cpp:87
+#, fuzzy
+msgid "Watched"
+msgstr "Watchdog"
+
+#: progs/direct/base/direct_prog_config.cpp:52
+msgid "Webpage: <a href=\"htpp://k9spud.com/hoodmicro\">htpp://k9spud.com/hoodmicro</a>"
+msgstr ""
+
+#: libgui/likeback.cpp:95
+msgid "What's &This?"
+msgstr "Che cos'è?"
+
+#: tools/base/generic_tool.cpp:26
+msgid "Windows"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:88
+msgid "Write Mask:"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:48
+msgid "Write and read raw commands to port from given file."
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:181 progs/sdcdb/base/sdcdb_debug.cpp:180
+msgid "Writing PC is not supported by gpsim"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:161 progs/sdcdb/base/sdcdb_debug.cpp:160
+msgid "Writing registers is not supported by this version of gpsim"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:33
+msgid "Wrong format for file size \"%1\"."
+msgstr ""
+
+#: progs/psp/base/psp.cpp:174
+msgid "Wrong programmer connected"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:224
+msgid "Wrong return value (\"%1\"; was expecting \"%2\")"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:148 devices/pic/base/pic_config.cpp:163
+msgid "XT Crystal"
+msgstr "Cristallo XT"
+
+#: devices/pic/base/pic_config.cpp:151 devices/pic/base/pic_config.cpp:166
+msgid "XT Crystal with 16x PLL"
+msgstr "Cristallo XT con PLL 16x"
+
+#: devices/pic/base/pic_config.cpp:149 devices/pic/base/pic_config.cpp:164
+msgid "XT Crystal with 4x PLL"
+msgstr "Cristallo XT con PLL 4x"
+
+#: devices/pic/base/pic_config.cpp:150 devices/pic/base/pic_config.cpp:165
+msgid "XT Crystal with 8x PLL"
+msgstr "Cristallo XT con PLL 8x"
+
+#: devices/pic/base/pic_config.cpp:259
+#, fuzzy
+msgid "XT crystal oscillator"
+msgstr "Oscillatore interno"
+
+#: libgui/likeback.cpp:397
+msgid "You can change or remove your email address whenever you want. For that, use the little arrow icon at the top-right corner of a window."
+msgstr ""
+
+#: libgui/gui_debug_manager.cpp:104
+msgid "You cannot set breakpoints when a debugger is not selected."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:39
+msgid "You must disconnect 7407 pin 2"
+msgstr ""
+
+#: progs/icd2/gui/icd2_group_ui.cpp:53
+msgid "You need to initiate debugging to read the debug executive version."
+msgstr ""
+
+#: libgui/toplevel.cpp:534
+#, fuzzy
+msgid "You need to specify a device to create a new hex file."
+msgstr "Devi specificare un dispositivo alfine di poter creare un nuovo file esadecimale."
+
+#: progs/manager/prog_manager.cpp:59
+msgid "You need to specify the device for programming."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:209
+#, fuzzy
+msgid "You need to specify the range."
+msgstr "Devi specificare un dispositivo alfine di poter creare un nuovo file esadecimale."
+
+#: piklab-prog/cli_interactive.cpp:292
+msgid "You need to start the debugging session first (with \"start\")."
+msgstr ""
+
+#: progs/gui/port_selector.cpp:61
+msgid "Your computer might not have any parallel port or the /dev/parportX device has not been created.<br>Use \"mknod /dev/parport0 c 99 0\" to create it<br>and \"chmod a+rw /dev/parport0\" to make it RW enabled."
+msgstr ""
+
+#: progs/gui/port_selector.cpp:58
+msgid "Your computer might not have any serial port."
+msgstr ""
+
+#: libgui/likeback.cpp:398
+msgid "Your email address (keep empty to post comments anonymously):"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:818
+msgid "[%1-options]"
+msgstr "[%1-opzioni]"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:811
+msgid "[options] "
+msgstr "[opzioni] "
+
+#: _translatorinfo.cpp:3
+msgid ""
+"_: EMAIL OF TRANSLATORS\n"
+"Your emails"
+msgstr "michelinux@alice.it"
+
+#: _translatorinfo.cpp:1
+msgid ""
+"_: NAME OF TRANSLATORS\n"
+"Your names"
+msgstr "Michele Petrecca"
+
+#: tools/pic30/pic30_generator.cpp:63
+msgid "allocating 2 bytes"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:59 tools/pic30/pic30_generator.cpp:67
+msgid "allocating 4 bytes"
+msgstr ""
+
+#: tools/gui/tool_config_widget.cpp:126 tools/gputils/gui/gputils_ui.cpp:30
+msgid "as in LIST directive"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:104
+#, fuzzy
+msgid "at line #%1, column #%2"
+msgstr "Riga: %1  Colonna: %2"
+
+#: tools/pic30/pic30_generator.cpp:77
+msgid "call _wreg_init subroutine"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:99
+msgid "clear Timer1 interrupt flag status bit"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:48
+msgid "declare Timer1 ISR"
+msgstr ""
+
+#: devices/gui/register_view.cpp:71
+msgid "driven high"
+msgstr ""
+
+#: devices/gui/register_view.cpp:71
+msgid "driven low"
+msgstr ""
+
+#: devices/gui/register_view.cpp:67
+msgid "driving high"
+msgstr ""
+
+#: devices/gui/register_view.cpp:67
+msgid "driving low"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:138
+msgid "empty name"
+msgstr ""
+
+#: tools/list/compile_process.cpp:359
+#, fuzzy
+msgid "error: "
+msgstr "errore"
+
+#: tools/pic30/pic30_generator.cpp:97
+msgid "example of context saving (push W4 and W5)"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:76
+#: tools/gputils/gputils_generator.cpp:135
+#: tools/gputils/gputils_generator.cpp:214
+#, fuzzy
+msgid "example variable"
+msgstr "Nessuna variabile"
+
+#: tools/gputils/gputils_generator.cpp:146
+msgid "for restoringing context"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:139
+msgid "for saving context"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:225
+msgid "go to start of high priority interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:161
+msgid "go to start of int pin interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:95
+msgid "go to start of interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:91
+#: tools/gputils/gputils_generator.cpp:157
+#: tools/gputils/gputils_generator.cpp:221
+msgid "go to start of main code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:173
+msgid "go to start of peripheral interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:169
+msgid "go to start of t0cki interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:165
+msgid "go to start of timer0 interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:238
+msgid "high priority interrupt service routine"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:223
+#, fuzzy
+msgid "high priority interrupt vector"
+msgstr "&Interrupt"
+
+#: tools/gputils/gputils_generator.cpp:90
+msgid "initialize PCLATH"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:73
+msgid "initialize stack pointer"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:74
+msgid "initialize stack pointer limit register"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:181
+msgid "insert INT pin interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:193
+msgid "insert T0CKI interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:187
+msgid "insert TIMER0 interrupt code"
+msgstr ""
+
+#: tools/boost/boost_generator.cpp:52 tools/boost/boost_generator.cpp:76
+#: tools/jal/jal_generator.cpp:31 tools/gputils/gputils_generator.cpp:52
+#: tools/sdcc/sdcc_generator.cpp:114 tools/pic30/pic30_generator.cpp:79
+msgid "insert code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:240
+msgid "insert high priority interrupt code"
+msgstr ""
+
+#: tools/boost/boost_generator.cpp:47 tools/gputils/gputils_generator.cpp:109
+#: tools/sdcc/sdcc_generator.cpp:102 tools/pic30/pic30_generator.cpp:98
+msgid "insert interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:232
+msgid "insert low priority interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:121
+#: tools/gputils/gputils_generator.cpp:176
+#: tools/gputils/gputils_generator.cpp:244
+msgid "insert main code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:199
+#, fuzzy
+msgid "insert peripheral interrupt code"
+msgstr "&Interrupt"
+
+#: tools/boost/boost_generator.cpp:45 tools/sdcc/sdcc_generator.cpp:101
+msgid "interrupt service routine"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:93
+#, fuzzy
+msgid "interrupt vector"
+msgstr "&Interrupt"
+
+#: tools/jal/jal_generator.cpp:23
+msgid "jal standard library"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:47
+msgid "label for code start"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:89
+msgid "load upper byte of 'start' label"
+msgstr ""
+
+#: tools/boost/boost_generator.cpp:77 tools/jal/jal_generator.cpp:32
+#: tools/gputils/gputils_generator.cpp:53
+#: tools/gputils/gputils_generator.cpp:122
+#: tools/gputils/gputils_generator.cpp:177
+#: tools/gputils/gputils_generator.cpp:245 tools/pic30/pic30_generator.cpp:82
+msgid "loop forever"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:227
+#, fuzzy
+msgid "low priority interrupt vector"
+msgstr "&Interrupt"
+
+#: tools/jal/jal_generator.cpp:30
+msgid "main code"
+msgstr ""
+
+#: tools/boost/boost_generator.cpp:50 tools/boost/boost_generator.cpp:74
+#, fuzzy
+msgid "main program"
+msgstr "&Programma"
+
+#: tools/list/compile_process.cpp:360
+#, fuzzy
+msgid "message: "
+msgstr "messaggio"
+
+#: tools/gputils/gputils_generator.cpp:88
+#: tools/gputils/gputils_generator.cpp:155
+#: tools/gputils/gputils_generator.cpp:156
+#: tools/gputils/gputils_generator.cpp:219
+#: tools/gputils/gputils_generator.cpp:220
+msgid "needed for ICD2 debugging"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:307
+#, fuzzy
+msgid "no register defined"
+msgstr "Nessun registro"
+
+#: tools/pic30/pic30_generator.cpp:76
+msgid "nop after SPLIM initialization"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:198 devices/pic/base/pic_config.cpp:200
+#: devices/pic/base/pic_config.cpp:202
+msgid "not divided"
+msgstr ""
+
+#: devices/pic/gui/pic_memory_editor.cpp:114
+#: devices/pic/gui/pic_memory_editor.cpp:121
+#, fuzzy
+msgid "not present"
+msgstr "non testato"
+
+#: progs/direct/gui/direct_config_widget.cpp:53
+msgid "on"
+msgstr "on"
+
+#: tools/gputils/gputils_generator.cpp:105
+msgid "only required if using more than first page"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:197
+#, fuzzy
+msgid "peripheral interrupt service routine"
+msgstr "Configurazione generale"
+
+#: tools/gputils/gputils_generator.cpp:49
+#: tools/gputils/gputils_generator.cpp:97
+msgid "relocatable code"
+msgstr ""
+
+#: common/nokde/nokde_kaboutdata.cpp:374
+msgid "replace this with information about your translation team"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:86
+#: tools/gputils/gputils_generator.cpp:153
+#: tools/gputils/gputils_generator.cpp:217
+#, fuzzy
+msgid "reset vector"
+msgstr "Seleziona cartella"
+
+#: tools/gputils/gputils_generator.cpp:111
+#: tools/gputils/gputils_generator.cpp:114
+#: tools/gputils/gputils_generator.cpp:233
+msgid "restore context"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:100
+msgid "restore context from stack"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:100
+#: tools/gputils/gputils_generator.cpp:229
+msgid "save context"
+msgstr ""
+
+#: piklab-coff/main.cpp:183
+#, fuzzy
+msgid "section \"%1\":"
+msgstr "Rilevazione \"%1\"..."
+
+#: coff/base/coff_archive.cpp:118
+#, fuzzy
+msgid "size: %1 bytes"
+msgstr "%1 byte"
+
+#: piklab-coff/main.cpp:189
+msgid "symbol \"%1\""
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:644
+msgid "the 2nd argument is a list of name+address, one on each line"
+msgstr ""
+
+#: piklab-coff/main.cpp:167
+msgid "type=\"%1\" address=%2 size=%3 flags=%4"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:115 coff/base/cdb_parser.cpp:161
+msgid "unexpected end of line"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:294
+msgid "unknown AddressSpaceType"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:272
+#, fuzzy
+msgid "unknown DCLType"
+msgstr "Stato sconosciuto"
+
+#: coff/base/cdb_parser.cpp:238
+#, fuzzy
+msgid "unknown ScopeType"
+msgstr "Stato sconosciuto"
+
+#: coff/base/cdb_parser.cpp:282
+#, fuzzy
+msgid "unknown Sign"
+msgstr "File sconosciuto"
+
+#: devices/gui/register_view.cpp:66 devices/gui/register_view.cpp:70
+msgid "unknown state"
+msgstr "Stato sconosciuto"
+
+#: tools/gputils/gputils_generator.cpp:68
+#: tools/gputils/gputils_generator.cpp:69
+#: tools/gputils/gputils_generator.cpp:72
+#: tools/gputils/gputils_generator.cpp:81
+msgid "variable used for context saving"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:130
+#: tools/gputils/gputils_generator.cpp:131
+#: tools/gputils/gputils_generator.cpp:132
+#: tools/gputils/gputils_generator.cpp:133
+#: tools/gputils/gputils_generator.cpp:210
+#: tools/gputils/gputils_generator.cpp:211
+#: tools/gputils/gputils_generator.cpp:212
+msgid "variable used for context saving (for low-priority interrupts only)"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:80
+msgid "variables used for context saving"
+msgstr ""
+
+#: tools/list/compile_process.cpp:358
+#, fuzzy
+msgid "warning: "
+msgstr "attenzione"
+
+#: coff/base/cdb_parser.cpp:128
+msgid "was expecting '%1'"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:200
+msgid "was expecting a bool ('%1')"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:177
+msgid "was expecting an uint"
+msgstr ""
+
+#, fuzzy
+#~ msgid "Too many arguments"
+#~ msgstr "Troppi argomenti."
+
+#, fuzzy
+#~ msgid "Device Id"
+#~ msgstr "ID dispositivo"
+
+#~ msgid "Elf"
+#~ msgstr "Elf"
+
+#, fuzzy
+#~ msgid "User Ids"
+#~ msgstr "ID utente"
+
+#~ msgid "Version"
+#~ msgstr "Versione"
+
+#~ msgid " <default>"
+#~ msgstr " <default>"
+
+#, fuzzy
+#~ msgid "Return informations about files (for archive)."
+#~ msgstr "Informazioni sui registri non disponibile."
+
+#~ msgid "Unknown processor type: %1"
+#~ msgstr "Tipo di processore non noto: %1"
+
+#~ msgid " Already Loaded"
+#~ msgstr " Già caricato"
+
+#, fuzzy
+#~ msgid "Error reading COFF file."
+#~ msgstr "Errore nel caricamento del firmware."
+
+#, fuzzy
+#~ msgid "Return information about COFF file."
+#~ msgstr "Informazioni sui registri non disponibile."
+
+#, fuzzy
+#~ msgid "Stepping..."
+#~ msgstr "Rilevazione in corso ..."
+
+#, fuzzy
+#~ msgid "24J Family"
+#~ msgstr "Famiglia 18X"
+
+#~ msgid "&Interrupt"
+#~ msgstr "&Interrupt"
+
+#~ msgid "Reset."
+#~ msgstr "Reset."
+
+#~ msgid "htpp://k9spud.com/hoodmicro"
+#~ msgstr "htpp://k9spud.com/hoodmicro"
+
+#~ msgid "Details"
+#~ msgstr "Dettagli"
+
+#, fuzzy
+#~ msgid "JAL V2 can be downloaded from <a href=\"http://www.casadeyork.com/jalv2\">this page</a>."
+#~ msgstr "JAL V2 può essere scaricato da questa pagina <a href=\"http://www.casadeyork.com/pjal\"></a>."
+
+#~ msgid "JAL can be downloaded from <a href=\"http://jal.sourceforge.net\">this page</a>."
+#~ msgstr "JAL può essere scaricato da questa pagina <a href=\"http://jal.sourceforge.net\"></a>."
+
+#, fuzzy
+#~ msgid "Program EEPROM (if supported)"
+#~ msgstr "Dati EEPROM"
+
+#~ msgid "Add File to Project"
+#~ msgstr "Aggiunto file al progetto"
+
+#~ msgid "Preprocessor"
+#~ msgstr "Preprocessore"
+
+#, fuzzy
+#~ msgid "Preprocessor:"
+#~ msgstr "Preprocessore"
+
+#~ msgid " not available"
+#~ msgstr " non disponibile"
+
+#~ msgid "(%1 pins)"
+#~ msgstr "(%1 pin)"
+
+#~ msgid "Reset"
+#~ msgstr "Reset"
+
+#~ msgid "Supported Programmers"
+#~ msgstr "Programmatori supportati"
+
+#, fuzzy
+#~ msgid "%1 (rev. %3.%4)"
+#~ msgstr "%1 (rev. %2)"
+
+#~ msgid "Debugger/Emulator"
+#~ msgstr "Debugger/Emulatore"
+
+#, fuzzy
+#~ msgid "Ram Boot block size"
+#~ msgstr "Ampiezza blocco d'avvio"
+
+#, fuzzy
+#~ msgid "Bootloader"
+#~ msgstr "Blocco di Avvio"
+
+#, fuzzy
+#~ msgid "Bootloader:"
+#~ msgstr "Blocco di Avvio"
+
+#~ msgid "PICkit2"
+#~ msgstr "PICkit2"
+
+#~ msgid "Devices"
+#~ msgstr "Dispositivi"
+
+#, fuzzy
+#~ msgid "Header"
+#~ msgstr "File header C"
+
+#, fuzzy
+#~ msgid "Source"
+#~ msgstr "Sorgenti"
+
+#~ msgid "ASM File"
+#~ msgstr "File ASM"
+
+#, fuzzy
+#~ msgid "HEX File"
+#~ msgstr "File Elf"
+
+#, fuzzy
+#~ msgid "New HEX File..."
+#~ msgstr "Nuovo file esadecimale..."
+
+#, fuzzy
+#~ msgid "&Show All"
+#~ msgstr "Mostra tutto"
+
+#, fuzzy
+#~ msgid "One hex filename needs to be specified."
+#~ msgstr "File Hex non specificato."
+
+#~ msgid "Create New Project"
+#~ msgstr "Crea un nuovo progetto"
+
+#~ msgid "&Close Current View"
+#~ msgstr "&Chiudi la vista corrente"
+
+#~ msgid "&Split View"
+#~ msgstr "Dividi vista"
+
+#~ msgid "Com&ment"
+#~ msgstr "Com&menta"
+
+#~ msgid "Configure Editor..."
+#~ msgstr "Configura editor..."
+
+#~ msgid "Uncomme&nt"
+#~ msgstr "Decomme&nta"
+
+#~ msgid "Show %1"
+#~ msgstr "Mostra %1"
diff --git a/po/merge.sh b/po/merge.sh
new file mode 100644
index 0000000..efa7048
--- /dev/null
+++ b/po/merge.sh
@@ -0,0 +1,15 @@
+template=`find . -name "*.pot" | sed -e 's#^./\(.*\)$#\1#'`
+files=`find . -name "*.po" | sed -e 's#^./\(.*\)$#\1#'`
+test -n "$VERBOSE" && echo $files
+
+for file in $files; do
+  echo merging $file
+  files=
+  if test ! -s $file; then
+    echo "ERROR: $file is empty!"
+  elif msgmerge --no-wrap -q -o $file $file $template; then
+    files="$files $file"
+  else
+    echo "ERROR: msgmerge failed for $file"
+  fi
+done
diff --git a/po/piklab.pot b/po/piklab.pot
new file mode 100644
index 0000000..51eb14e
--- /dev/null
+++ b/po/piklab.pot
@@ -0,0 +1,6985 @@
+# SOME DESCRIPTIVE TITLE.
+# This file is put in the public domain.
+# FIRST AUTHOR <EMAIL@ADDRESS>, YEAR.
+#
+#, fuzzy
+msgid ""
+msgstr ""
+"Project-Id-Version: PACKAGE VERSION\n"
+"Report-Msgid-Bugs-To: \n"
+"POT-Creation-Date: 2007-11-25 14:15+0100\n"
+"PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
+"Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
+"Language-Team: LANGUAGE <LL@li.org>\n"
+"MIME-Version: 1.0\n"
+"Content-Type: text/plain; charset=UTF-8\n"
+"Content-Transfer-Encoding: 8bit\n"
+
+#: common/nokde/nokde_kcmdlineargs.cpp:802
+msgid ""
+"\n"
+"%1:\n"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:946
+msgid ""
+"\n"
+"Arguments:\n"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:885
+msgid ""
+"\n"
+"Options:\n"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:109
+msgid "  %1 = %2 V: error in voltage level."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug_specific.cpp:58
+msgid ""
+"  According to ICD2 manual, instruction at address 0x0 should be \"nop\"."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:387
+msgid "  Band gap bits have been preserved."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:630
+msgid "  Blank check successful"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:314
+msgid "  Debug executive version: %1"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:626
+msgid "  EPROM device: blank checking first..."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:658 devices/pic/prog/pic_prog.cpp:714
+msgid "  Erasing device"
+msgstr ""
+
+#: progs/icd2/base/icd2_prog.cpp:111
+msgid "  Firmware succesfully uploaded."
+msgstr ""
+
+#: progs/icd2/base/icd2_prog.cpp:82
+msgid "  Incorrect firmware loaded."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:360
+msgid "  Osccal backup has been preserved."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:355
+msgid "  Osccal backup is unchanged."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:346
+msgid "  Osccal has been preserved."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:341
+msgid "  Osccal is unchanged."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug_specific.cpp:76
+#: progs/icd2/base/icd2_debug_specific.cpp:83
+#: progs/icd2/base/icd2_debug_specific.cpp:166
+#: progs/icd2/base/icd2_debug_specific.cpp:244
+msgid "  PC is not at address %1 (%2)"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:508
+msgid "  Part of device memory is protected (in %1) and cannot be verified."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:512
+msgid "  Read memory: %1"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:334
+msgid "  Replace invalid osccal with backup value."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:101
+msgid "  Set target self powered: %1"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:277
+msgid "  Unknown or incorrect device (Read id is %1)."
+msgstr ""
+
+#: progs/pickit2/base/pickit2_prog.cpp:63
+msgid "  Uploading PICkit2 firmware..."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:247
+msgid "  Verify debug executive"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:505
+msgid "  Verify memory: %1"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:244
+msgid "  Write debug executive"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:565 devices/pic/prog/pic_prog.cpp:683
+#: devices/pic/prog/pic_prog.cpp:694
+msgid "  Write memory: %1"
+msgstr ""
+
+#: devices/pic/pic/pic_group.cpp:31 devices/pic/pic/pic_group.cpp:37
+msgid " (%2 bits)"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:106 libgui/project_manager_ui.cpp:175
+msgid " (default)"
+msgstr ""
+
+#: devices/gui/register_view.cpp:72
+msgid " (input)"
+msgstr ""
+
+#: devices/pic/pic/pic_group.cpp:38
+msgid " (not programmable)"
+msgstr ""
+
+#: devices/gui/register_view.cpp:68
+msgid " (output)"
+msgstr ""
+
+#: devices/pic/gui/pic_memory_editor.cpp:255
+msgid " - not programmed by default"
+msgstr ""
+
+#: devices/pic/gui/pic_memory_editor.cpp:254
+msgid " - recommended mask: %1"
+msgstr ""
+
+#: piklab-coff/main.cpp:176
+msgid " Filename:Line"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:137
+msgid " no port detected."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:133
+msgid " support disabled."
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:167
+msgid "\"%1\" found"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:234
+msgid "\"%1\" not found"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:168
+msgid "\"%1\" not recognized"
+msgstr ""
+
+#: progs/gpsim/base/gpsim.cpp:68
+msgid "\"gpsim\" unexpectedly exited."
+msgstr ""
+
+#: coff/base/text_coff.cpp:252 coff/base/text_coff.cpp:257
+msgid "%1 (magic id: %2)"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:221
+msgid "%1 (proc. %2; rev. %3.%4)"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:215 devices/pic/base/pic.cpp:225
+msgid "%1 (rev. %2)"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:218
+msgid "%1 (rev. %2.%3)"
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:178
+msgid "%1 <custom>"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:312
+msgid "%1 = %2"
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:50
+msgid "%1 at %2:"
+msgstr ""
+
+#: devices/mem24/mem24/mem24_group.cpp:21 devices/pic/pic/pic_group.cpp:36
+msgid "%1 bytes"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:308
+msgid "%1 for block %2"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:883
+msgid "%1 options"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:647
+msgid "%1 was written by somebody who wants to remain anonymous."
+msgstr ""
+
+#: devices/pic/pic/pic_group.cpp:30
+msgid "%1 words"
+msgstr ""
+
+#: devices/pic/gui/pic_memory_editor.cpp:256
+msgid "%1-bit words - mask: %2"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:467
+msgid ""
+"%1: Erasing this range only is not supported with this programmer. This will "
+"erase the whole chip and restore the other memory ranges."
+msgstr ""
+
+#: libgui/toplevel.cpp:278
+msgid "&Advanced..."
+msgstr ""
+
+#: devices/gui/memory_editor.cpp:283 libgui/toplevel.cpp:270
+msgid "&Blank Check"
+msgstr ""
+
+#: libgui/toplevel.cpp:294
+msgid "&Break<Translators: it is the verb>"
+msgstr ""
+
+#: libgui/toplevel.cpp:246
+msgid "&Build Project"
+msgstr ""
+
+#: devices/gui/memory_editor.cpp:275
+msgid "&Clear"
+msgstr ""
+
+#: libgui/toplevel.cpp:248
+msgid "&Compile File"
+msgstr ""
+
+#: libgui/toplevel.cpp:314
+msgid "&Config Generator..."
+msgstr ""
+
+#: libgui/likeback.cpp:97
+msgid "&Configure Email Address..."
+msgstr ""
+
+#: libgui/toplevel.cpp:256
+msgid "&Connect"
+msgstr ""
+
+#. i18n: file ./data/app_data/piklabui.rc line 101
+#: rc.cpp:30
+#, no-c-format
+msgid "&Debugger"
+msgstr ""
+
+#: libgui/toplevel.cpp:312
+msgid "&Device Information..."
+msgstr ""
+
+#: libgui/toplevel.cpp:260
+msgid "&Disconnect"
+msgstr ""
+
+#: libgui/toplevel.cpp:296
+msgid "&Disconnect/Stop"
+msgstr ""
+
+#: devices/gui/memory_editor.cpp:282 libgui/toplevel.cpp:268
+msgid "&Erase"
+msgstr ""
+
+#: libgui/toplevel.cpp:310
+msgid "&Find Files..."
+msgstr ""
+
+#: libgui/toplevel.cpp:183
+msgid "&New Source File..."
+msgstr ""
+
+#: libgui/toplevel.cpp:308
+msgid "&Pikloops..."
+msgstr ""
+
+#: devices/gui/memory_editor.cpp:279 libgui/toplevel.cpp:262
+msgid "&Program"
+msgstr ""
+
+#. i18n: file ./data/app_data/piklabui.rc line 63
+#: rc.cpp:21
+#, no-c-format
+msgid "&Project"
+msgstr ""
+
+#: devices/gui/memory_editor.cpp:281 libgui/toplevel.cpp:266
+msgid "&Read"
+msgstr ""
+
+#: libgui/toplevel.cpp:219
+msgid "&Reset Layout"
+msgstr ""
+
+#: libgui/toplevel.cpp:272 libgui/toplevel.cpp:286
+msgid "&Run"
+msgstr ""
+
+#: libgui/device_gui.cpp:90
+msgid "&Select"
+msgstr ""
+
+#: libgui/toplevel.cpp:288
+msgid "&Step"
+msgstr ""
+
+#: libgui/toplevel.cpp:274
+msgid "&Stop"
+msgstr ""
+
+#: libgui/toplevel.cpp:316
+msgid "&Template Generator..."
+msgstr ""
+
+#: devices/gui/memory_editor.cpp:280 libgui/toplevel.cpp:264
+msgid "&Verify"
+msgstr ""
+
+#: devices/gui/memory_editor.cpp:276
+msgid "&Zero"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:545
+msgid "'%1' missing."
+msgstr ""
+
+#: devices/pic/gui/pic_memory_editor.cpp:366
+msgid "(backup)"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:83 tools/list/compile_manager.cpp:112
+#: tools/list/compile_manager.cpp:137
+msgid "*** Aborted ***"
+msgstr ""
+
+#: tools/list/compile_process.cpp:143
+msgid "*** Error ***"
+msgstr ""
+
+#: tools/list/compile_process.cpp:140
+msgid "*** Exited with status: %1 ***"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:194 tools/list/compile_manager.cpp:268
+msgid "*** Success ***"
+msgstr ""
+
+#: tools/list/compile_process.cpp:150
+msgid "*** Timeout ***"
+msgstr ""
+
+#: common/cli/cli_log.cpp:62
+msgid "*no*"
+msgstr ""
+
+#: common/cli/cli_log.cpp:62
+msgid "*yes*"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:28
+msgid "---"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:74
+msgid "00"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:74
+msgid "01"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:75
+msgid "10"
+msgstr ""
+
+#: tools/jal/jal_generator.cpp:22
+msgid "10MHz crystal"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:75
+msgid "11"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:216
+msgid "12-bit external bus"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:217
+msgid "16-bit external bus"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:53
+msgid "17C Family"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:54
+msgid "18C Family"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:55
+msgid "18F Family"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:56
+msgid "18J Family"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:218
+msgid "20-bit external bus"
+msgstr ""
+
+#: devices/mem24/base/mem24.h:25
+msgid "24 EEPROM"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:57
+msgid "24F Family"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:58
+msgid "24H Family"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:59
+msgid "30F Family"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:60
+msgid "33F Family"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:207
+msgid "4 MHz"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:222
+msgid "5-bit address mask mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:221
+msgid "7-bit address mask mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:206
+msgid "8 MHz"
+msgstr ""
+
+#: libgui/device_gui.cpp:155
+msgid "<Feature>"
+msgstr ""
+
+#: libgui/device_gui.cpp:142
+msgid "<Memory Type>"
+msgstr ""
+
+#: libgui/device_gui.cpp:118
+msgid "<Programmer>"
+msgstr ""
+
+#: libgui/device_gui.cpp:150
+msgid "<Status>"
+msgstr ""
+
+#: libgui/device_gui.cpp:130
+msgid "<Toolchain>"
+msgstr ""
+
+#: tools/boost/boostbasic.cpp:22
+msgid ""
+"<a href=\"%1\">BoostBasic Compiler</a> is a Basic compiler distributed by "
+"SourceBoost Technologies."
+msgstr ""
+
+#: tools/boost/boostc.cpp:22
+msgid ""
+"<a href=\"%1\">BoostC Compiler</a> is a C compiler distributed by "
+"SourceBoost Technologies."
+msgstr ""
+
+#: tools/boost/boostcpp.cpp:23
+msgid ""
+"<a href=\"%1\">BoostC++ Compiler</a> is a C compiler distributed by "
+"SourceBoost Technologies."
+msgstr ""
+
+#: tools/cc5x/cc5x.cpp:55
+msgid "<a href=\"%1\">CC5X</a> is a C compiler distributed by B Knudsen Data."
+msgstr ""
+
+#: tools/ccsc/ccsc.cpp:90
+msgid "<a href=\"%1\">CCS Compiler</a> is a C compiler distributed by CCS."
+msgstr ""
+
+#: tools/gputils/gputils.cpp:40
+msgid ""
+"<a href=\"%1\">GPUtils</a> is an open-source assembler and linker suite.<br>"
+msgstr ""
+
+#: tools/jalv2/jalv2.cpp:31
+msgid ""
+"<a href=\"%1\">JAL V2</a> is a new compiler for the high-level language JAL."
+msgstr ""
+
+#: tools/jal/jal.cpp:31
+msgid ""
+"<a href=\"%1\">JAL</a> is a high-level language for PIC microcontrollers."
+msgstr ""
+
+#: tools/mpc/mpc.cpp:50
+msgid ""
+"<a href=\"%1\">MPC Compiler</a> is a C compiler distributed by Byte Craft."
+msgstr ""
+
+#: tools/picc/picc.cpp:119
+msgid "<a href=\"%1\">PICC 18</a> is a C compiler distributed by HTSoft."
+msgstr ""
+
+#: tools/picc/picc.cpp:93
+msgid ""
+"<a href=\"%1\">PICC-Lite</a> is a freeware C compiler distributed by HTSoft."
+msgstr ""
+
+#: tools/picc/picc.cpp:106
+msgid "<a href=\"%1\">PICC</a> is a C compiler distributed by HTSoft."
+msgstr ""
+
+#: progs/gui/port_selector.cpp:88
+msgid "<a href=\"%1\">See Piklab homepage for help</a>."
+msgstr ""
+
+#: devices/list/device_list.cpp:16
+msgid "<auto>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:299
+msgid "<b>Device string #%1:</b><br>%2<br>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:298
+msgid "<b>Device string:</b><br>%1<br>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:271
+msgid "<b>Version string:</b><br>%1<br></qt>"
+msgstr ""
+
+#: libgui/hex_editor.cpp:101
+msgid ""
+"<b>Warning:</b> hex file seems to be incompatible with the selected device %"
+"1:<br>%2"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:165
+msgid "<default>"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:411 piklab-prog/cmdline.cpp:426
+#: piklab-prog/cmdline.cpp:431 piklab-prog/cmdline.cpp:435
+msgid "<from config>"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:182
+msgid "<invalid>"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:62
+msgid "<no project>"
+msgstr ""
+
+#: devices/pic/pic/pic_group.cpp:54
+msgid "<none>"
+msgstr ""
+
+#: piklab-hex/main.cpp:241 piklab-hex/main.cpp:245 piklab-prog/cmdline.cpp:403
+#: piklab-prog/cmdline.cpp:408 piklab-prog/cmdline.cpp:413
+#: piklab-prog/cmdline.cpp:416 piklab-prog/cmdline.cpp:422
+#: piklab-prog/cmdline.cpp:430 piklab-prog/cmdline.cpp:439
+#: piklab-prog/cmdline.cpp:443 piklab-coff/main.cpp:247
+msgid "<not set>"
+msgstr ""
+
+#: libgui/likeback.cpp:657
+msgid "<p>Error while trying to send the report.</p><p>Please retry later.</p>"
+msgstr ""
+
+#: libgui/likeback.cpp:659
+msgid ""
+"<p>Your comment has been sent successfully. It will help improve the "
+"application.</p><p>Thanks for your time.</p>"
+msgstr ""
+
+#: tools/c18/c18.cpp:85
+msgid ""
+"<qt><a href=\"%1\">C18</a> is a C compiler distributed by Microchip.</qt>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:296
+msgid "<qt><b>Command #%1 for devices detection:</b><br>%2<br>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:295
+msgid "<qt><b>Command for devices detection:</b><br>%1<br>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:270
+msgid "<qt><b>Command for executable detection:</b><br>%1<br>"
+msgstr ""
+
+#: tools/gui/tool_config_widget.cpp:113
+msgid "<qt>This values will be placed after the linked objects.</qt>"
+msgstr ""
+
+#: piklab-hex/main.cpp:278
+msgid "<value>"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:72
+msgid "ADC"
+msgstr ""
+
+#: coff/base/coff_object.cpp:124
+msgid "Absolute Value"
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:47
+msgid "Access Bank (high)"
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:47
+msgid "Access Bank (low)"
+msgstr ""
+
+#: progs/direct/base/direct_mem24.cpp:168
+msgid "Acknowledge bit incorrect"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:108 devices/pic/base/pic_config.cpp:111
+msgid "Active high"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:109 devices/pic/base/pic_config.cpp:112
+msgid "Active low"
+msgstr ""
+
+#: libgui/project_manager.cpp:200 libgui/toplevel.cpp:242
+msgid "Add Current File"
+msgstr ""
+
+#: libgui/toplevel.cpp:240
+msgid "Add Object File..."
+msgstr ""
+
+#: libgui/project_manager.cpp:199 libgui/project_manager.cpp:214
+msgid "Add Object Files..."
+msgstr ""
+
+#: libgui/toplevel.cpp:238
+msgid "Add Source File..."
+msgstr ""
+
+#: libgui/project_wizard.cpp:149
+msgid "Add Source Files"
+msgstr ""
+
+#: libgui/project_manager.cpp:198 libgui/project_manager.cpp:219
+msgid "Add Source Files..."
+msgstr ""
+
+#: libgui/project_wizard.cpp:151
+msgid "Add existing files."
+msgstr ""
+
+#: libgui/project_manager.cpp:314
+msgid "Add only"
+msgstr ""
+
+#: libgui/new_dialogs.cpp:66
+msgid "Add to project"
+msgstr ""
+
+#: libgui/breakpoint_view.cpp:49 piklab-coff/main.cpp:176
+msgid "Address"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:129
+msgid "Address bus width (in bits)"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:50
+msgid "Advanced Dialog"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:393
+msgid "All"
+msgstr ""
+
+#: libgui/toplevel.cpp:553
+msgid "All Files"
+msgstr ""
+
+#: common/common/purl_base.cpp:117
+msgid "All Object Files"
+msgstr ""
+
+#: common/common/purl_base.cpp:105
+msgid "All Source Files"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:192
+msgid "All breakpoints removed."
+msgstr ""
+
+#: common/global/log.cpp:29
+msgid "All debug messages"
+msgstr ""
+
+#: tools/gputils/gputils_config.cpp:13 tools/c18/c18_config.cpp:12
+msgid "All messages"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:191
+msgid ""
+"All or part of code memory is protected so it cannot be preserved. Continue "
+"anyway?"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:198
+msgid ""
+"All or part of data EEPROM is protected so it cannot be preserved. Continue "
+"anyway?"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:271
+msgid "Allow multiple reconfigurations"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:270
+msgid "Allow only one reconfiguration"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:275
+msgid "Alternate"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:272
+msgid "Alternate I2C pins"
+msgstr ""
+
+#: devices/base/device_group.cpp:239
+msgid "Alternatives"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:105
+msgid "Analog"
+msgstr ""
+
+#: coff/base/coff.cpp:22
+msgid "Archive"
+msgstr ""
+
+#: libgui/likeback.cpp:135
+msgid ""
+"Are you sure you do not want to participate anymore in the application "
+"enhancing program?"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:221
+msgid "Argument file type not recognized."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:196
+msgid "Argument should be breakpoint index."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:186
+msgid "Arguments not recognized."
+msgstr ""
+
+#: tools/gui/tool_config_widget.cpp:44
+msgid "Arguments:"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:23 coff/base/coff_object.cpp:180
+msgid "Array"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:59
+msgid "Asix Piccolo"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:61
+msgid "Asix Piccolo Grande"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:18 common/common/purl_base.cpp:20
+#: common/common/purl_base.cpp:25
+msgid "Assembler"
+msgstr ""
+
+#: common/common/purl_base.cpp:33
+msgid "Assembler File"
+msgstr ""
+
+#: common/common/purl_base.cpp:34
+msgid "Assembler File for PIC30"
+msgstr ""
+
+#: common/common/purl_base.cpp:35
+msgid "Assembler File for PICC"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:18
+msgid "Assembler:"
+msgstr ""
+
+#: devices/base/generic_memory.cpp:34
+msgid "At least one value (at address %1) is defined outside memory ranges."
+msgstr ""
+
+#: devices/mem24/mem24/mem24_memory.cpp:86 devices/pic/pic/pic_memory.cpp:545
+msgid ""
+"At least one word (at offset %1) is larger (%2) than the corresponding mask "
+"(%3)."
+msgstr ""
+
+#: common/global/about.cpp:79
+msgid "Author and maintainer."
+msgstr ""
+
+#: common/global/about.cpp:82
+msgid "Author of gputils"
+msgstr ""
+
+#: common/global/about.cpp:83
+msgid "Author of likeback"
+msgstr ""
+
+#: coff/base/coff_object.cpp:147
+msgid "Auto Argument"
+msgstr ""
+
+#: tools/gui/tool_config_widget.cpp:24
+msgid "Automatic"
+msgstr ""
+
+#: coff/base/coff_object.cpp:129
+msgid "Automatic Variable"
+msgstr ""
+
+#: libgui/global_config.cpp:20
+msgid "Automatically rebuild project before programming if it is modified."
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:351
+msgid "Bad checksum for read block: %1 (%2 expected)."
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:232
+msgid "Bad checksum for received string"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:68
+msgid "Bandgap voltage calibration"
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:59
+#: devices/pic/gui/pic_register_view.cpp:61
+msgid "Bank %1"
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:54
+msgid "Bank %1 (high)"
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:54
+msgid "Bank %1 (low)"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:51
+msgid "Baseline Family"
+msgstr ""
+
+#: common/common/purl_base.cpp:29
+msgid "Basic Compiler"
+msgstr ""
+
+#: common/common/purl_base.cpp:41
+msgid "Basic Source File"
+msgstr ""
+
+#: coff/base/coff_object.cpp:149
+msgid "Beginning or End of Block"
+msgstr ""
+
+#: coff/base/coff_object.cpp:150
+msgid "Beginning or End of Function"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:20
+msgid "Bin to Hex"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:20
+msgid "Bin to Hex:"
+msgstr ""
+
+#: common/common/number.cpp:21
+msgid "Binary"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:55
+msgid "Bit Addressable"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:39 coff/base/coff_object.cpp:146
+msgid "Bit Field"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:36
+msgid "Blank Checking..."
+msgstr ""
+
+#: progs/base/prog_config.cpp:74
+msgid "Blank check after erase."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:49
+msgid "Blank check device memory."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:289
+msgid "Blank checking done."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:400
+msgid "Blank checking successful."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:287 progs/base/generic_prog.cpp:398
+msgid "Blank checking..."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:316
+msgid "Blank-checking device memory not supported for specified programmer."
+msgstr ""
+
+#: devices/mem24/mem24/mem24_group.cpp:38
+#: devices/pic/base/pic_protection.cpp:360
+msgid "Block #%1"
+msgstr ""
+
+#: tools/boost/boostbasic.h:51
+msgid "BoostBasic Compiler for PIC16"
+msgstr ""
+
+#: tools/boost/boostbasic.h:62
+msgid "BoostBasic Compiler for PIC18"
+msgstr ""
+
+#: tools/boost/boostc.h:51
+msgid "BoostC Compiler for PIC16"
+msgstr ""
+
+#: tools/boost/boostc.h:62
+msgid "BoostC Compiler for PIC18"
+msgstr ""
+
+#: tools/boost/boostcpp.h:51
+msgid "BoostC++ Compiler for PIC16"
+msgstr ""
+
+#: tools/boost/boostcpp.h:62
+msgid "BoostC++ Compiler for PIC18"
+msgstr ""
+
+#: devices/pic/base/pic_protection.cpp:351
+msgid "Boot Block"
+msgstr ""
+
+#: devices/pic/base/pic_protection.cpp:350
+msgid "Boot Segment"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:125
+msgid "Boot block size"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:23
+msgid "Boot code-protection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:233
+msgid "Boot segment EEPROM size"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:234
+msgid "Boot segment RAM size"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:230
+msgid "Boot segment security"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:229
+msgid "Boot segment size"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:228
+msgid "Boot segment write-protection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:31
+msgid "Boot table read-protection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:27
+msgid "Boot write-protection"
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:89
+msgid "Bootloader identified device as: %1"
+msgstr ""
+
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:84
+msgid "Bootloader version %1 detected"
+msgstr ""
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:36
+msgid "Bootloader version %1 detected."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:231
+msgid "Breaking..."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:161
+msgid "Breakpoint already set at %1."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:201
+msgid "Breakpoint at %1 removed."
+msgstr ""
+
+#: libgui/gui_debug_manager.cpp:125
+msgid "Breakpoint at non-code line cannot be activated."
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:142
+msgid "Breakpoint at non-code line."
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:147
+msgid "Breakpoint corresponds to several addresses. Using the first one."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:197
+msgid "Breakpoint index too large."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:165
+msgid "Breakpoint set at %1."
+msgstr ""
+
+#: libgui/toplevel.cpp:150
+msgid "Breakpoints"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:172
+msgid "Breakpoints:"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:76
+msgid "Brown-out detect"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:89
+msgid "Brown-out reset software"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:84
+msgid "Brown-out reset voltage"
+msgstr ""
+
+#. i18n: file ./data/app_data/piklabui.rc line 76
+#: rc.cpp:24
+#, no-c-format
+msgid "Bu&ild"
+msgstr ""
+
+#: libgui/project_manager.cpp:194
+msgid "Build Project"
+msgstr ""
+
+#. i18n: file ./data/app_data/piklabui.rc line 155
+#: rc.cpp:45
+#, no-c-format
+msgid "Build Toolbar"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:53
+msgid "Building project..."
+msgstr ""
+
+#: common/common/purl_base.cpp:26
+msgid "C Compiler"
+msgstr ""
+
+#: common/common/purl_base.cpp:39
+msgid "C Header File"
+msgstr ""
+
+#: common/common/purl_base.cpp:37
+msgid "C Source File"
+msgstr ""
+
+#: libgui/toplevel.cpp:193
+msgid "C&lose All"
+msgstr ""
+
+#: common/common/purl_base.cpp:28
+msgid "C++ Compiler"
+msgstr ""
+
+#: common/common/purl_base.cpp:38
+msgid "C++ Source File"
+msgstr ""
+
+#: tools/c18/c18.h:42
+msgid "C18 Compiler"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:77
+msgid "CAN"
+msgstr ""
+
+#: tools/cc5x/cc5x.h:33
+msgid "CC5X Compiler"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:71
+msgid "CCP"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:88
+msgid "CCP1 multiplex"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:87
+msgid "CCP2 multiplex"
+msgstr ""
+
+#: tools/ccsc/ccsc.h:36 coff/base/coff_object.cpp:38
+msgid "CCS Compiler"
+msgstr ""
+
+#: common/common/purl_base.cpp:54
+msgid "COD File"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:38
+msgid "COFF"
+msgstr ""
+
+#: common/common/purl_base.cpp:55
+msgid "COFF File"
+msgstr ""
+
+#: coff/base/coff.cpp:67 coff/base/coff.cpp:77
+msgid "COFF file is truncated (offset: %1  nbBytes: %2  size:%3)."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:61
+msgid "COFF file to be used for debugging."
+msgstr ""
+
+#: piklab-coff/main.cpp:279
+msgid "COFF filename."
+msgstr ""
+
+#: coff/base/coff_object.cpp:454
+msgid "COFF format not supported: magic number is %1."
+msgstr ""
+
+#: piklab-coff/main.cpp:212
+msgid "COFF type:"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:199
+msgid "CPU system clock (divided by)"
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:149
+msgid "CRC error from bootloader: retrying..."
+msgstr ""
+
+#: devices/base/hex_buffer.cpp:142
+msgid "CRC mismatch (line %1)."
+msgstr ""
+
+#: devices/pic/base/pic.cpp:26 progs/gui/prog_group_ui.cpp:92
+msgid "Calibration"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:33
+msgid "Calibration Backup"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:22
+msgid "Calibration code-protection"
+msgstr ""
+
+#: progs/pickit2/base/pickit_prog.cpp:46
+msgid "Calibration firmware file seems incompatible with selected device %1."
+msgstr ""
+
+#: devices/pic/base/pic.cpp:239
+msgid "Calibration word at address %1 is blank."
+msgstr ""
+
+#: devices/pic/base/pic.cpp:245
+msgid "Calibration word is not a compatible opcode (%2)."
+msgstr ""
+
+#: tools/list/compile_manager.cpp:65
+msgid "Cannot build empty project."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:406
+msgid "Cannot erase ROM or EPROM device."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:446
+msgid "Cannot erase protected code memory. Consider erasing the whole chip."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:450
+msgid "Cannot erase protected data EEPROM. Consider erasing the whole chip."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:464
+msgid "Cannot erase specified range because of programmer limitations."
+msgstr ""
+
+#: libgui/project_manager.cpp:420
+msgid "Cannot open without device specified."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:526
+msgid "Cannot read ROMless device."
+msgstr ""
+
+#: progs/pickit2/base/pickit2.cpp:116
+msgid "Cannot read voltages with this firmware version."
+msgstr ""
+
+#: libgui/gui_debug_manager.cpp:242
+msgid "Cannot show disassembly location for non-code line."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:250
+msgid "Cannot specify range without specifying device."
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:387
+msgid "Cannot start debugging session without input file (%1)."
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:372
+msgid "Cannot start debugging session without input file (not specified)."
+msgstr ""
+
+#: libgui/gui_prog_manager.cpp:34
+msgid "Cannot start debugging without a COFF file. Please compile the project."
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:138
+msgid "Cannot toggle target power since target is self-powered."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:606
+msgid "Cannot write ROM or ROMless device."
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:33 coff/base/coff_object.cpp:160
+msgid "Char"
+msgstr ""
+
+#: piklab-hex/main.cpp:25
+msgid ""
+"Check hex file for correctness (if a device is specified, check if hex file "
+"is compatible with it)."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:41
+msgid "Check this box to change DATA buffer direction."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:26 progs/direct/base/direct.cpp:29
+#: progs/direct/base/direct.cpp:32 progs/direct/base/direct.cpp:35
+msgid "Check this box to turn voltage on/off for this pin."
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:27
+msgid "Check this option if your hardware uses negative logic for this pin."
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:98
+msgid "Checksum Mask:"
+msgstr ""
+
+#: piklab-hex/main.cpp:178
+msgid "Checksum computation is experimental and is not always correct!"
+msgstr ""
+
+#: piklab-hex/main.cpp:180 libgui/hex_editor.cpp:189
+msgid "Checksum: %1"
+msgstr ""
+
+#: libgui/toplevel.cpp:250
+msgid "Clean"
+msgstr ""
+
+#: libgui/project_manager.cpp:195
+msgid "Clean Project"
+msgstr ""
+
+#: piklab-hex/main.cpp:27
+msgid ""
+"Clean hex file and fix errors (wrong CRC, truncated line, truncated file)."
+msgstr ""
+
+#: libgui/toplevel.cpp:302
+msgid "Clear All Breakpoints"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:47
+msgid ""
+"Clear a breakpoint \"clear 0\", \"clear e 0x04\", or clear all breakpoints "
+"\"clear all\"."
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:265
+msgid "Clear all watching"
+msgstr ""
+
+#: progs/direct/base/direct.cpp:30
+msgid "Clock"
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:68
+msgid "Clock delay"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:264
+msgid "Clock output"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:136
+msgid "Clock switching mode"
+msgstr ""
+
+#: libgui/editor_manager.cpp:403 libgui/toplevel.cpp:195
+msgid "Close All Others"
+msgstr ""
+
+#: libgui/toplevel.cpp:236
+msgid "Close Project"
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:91
+msgid "Closing will discard changes you have made. Close anyway?"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:50 coff/base/coff_object.cpp:332
+msgid "Code"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:51
+msgid "Code / Static Segment"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:26
+msgid "Code Pointer"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:20
+msgid "Code code-protection"
+msgstr ""
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:53
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:163
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:111
+msgid ""
+"Code is present in bootloader reserved area (at address %1). It will be "
+"ignored."
+msgstr ""
+
+#: devices/pic/base/pic.cpp:25
+msgid "Code memory"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:96
+msgid "Code protected microcontroller"
+msgstr ""
+
+#: devices/pic/gui/pic_memory_editor.cpp:77
+msgid "Code protection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:25
+msgid "Code write-protection"
+msgstr ""
+
+#: coff/base/coff_object.cpp:286 coff/base/coff_object.cpp:299
+msgid "Codeline has unknown symbol: %1"
+msgstr ""
+
+#: coff/base/coff_object.cpp:290 coff/base/coff_object.cpp:303
+msgid "Codeline is an auxiliary symbol: %1"
+msgstr ""
+
+#: piklab-coff/main.cpp:128
+msgid "Command not available for COFF of type Archive."
+msgstr ""
+
+#: piklab-coff/main.cpp:204
+msgid "Command not available for COFF of type Object."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:453
+msgid "Command-line programmer/debugger."
+msgstr ""
+
+#: piklab-hex/main.cpp:287
+msgid "Command-line utility to manipulate hex files."
+msgstr ""
+
+#: piklab-coff/main.cpp:278
+msgid "Command-line utility to view COFF files."
+msgstr ""
+
+#: libgui/likeback.cpp:659
+msgid "Comment Sent"
+msgstr ""
+
+#: devices/base/generic_device.cpp:33
+msgid "Commercial"
+msgstr ""
+
+#: piklab-hex/main.cpp:28
+msgid "Compare two hex files."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:83
+msgid ""
+"Compatible with ET-CAB10PIN V2 programmer shipped by Futurlec, with their "
+"PIC16F877 controler board."
+msgstr ""
+
+#: libgui/toplevel.cpp:138
+msgid "Compile Log"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:17 common/common/purl_base.cpp:21
+msgid "Compiler"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:17
+msgid "Compiler:"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:29
+msgid "Compiling file..."
+msgstr ""
+
+#: coff/base/coff_object.cpp:326
+msgid "Config"
+msgstr ""
+
+#: libgui/config_gen.cpp:145
+msgid "Config Generator"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:51
+msgid "Config Word Details"
+msgstr ""
+
+#: common/port/usb_port.cpp:242
+msgid "Configuration %1 not present: using %2"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:29
+msgid "Configuration Bits"
+msgstr ""
+
+#: coff/base/disassembler.cpp:282
+msgid "Configuration bits: adapt to your setup and needs"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:28
+msgid "Configuration write-protection"
+msgstr ""
+
+#: tools/gui/tool_config_widget.cpp:37
+msgid "Configuration:"
+msgstr ""
+
+#: libgui/toplevel_ui.cpp:40
+msgid "Configure Compilation..."
+msgstr ""
+
+#: libgui/config_center.cpp:113
+msgid "Configure Piklab"
+msgstr ""
+
+#: libgui/toplevel_ui.cpp:39
+msgid "Configure Toolchain..."
+msgstr ""
+
+#: tools/gui/toolchain_config_center.cpp:24
+msgid "Configure Toolchains"
+msgstr ""
+
+#: libgui/toplevel.cpp:320
+msgid "Configure Toolchains..."
+msgstr ""
+
+#: libgui/toplevel.cpp:346
+msgid "Configure email..."
+msgstr ""
+
+#: libgui/project_manager.cpp:186 libgui/toplevel_ui.cpp:22
+#: libgui/likeback.cpp:89
+msgid "Configure..."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:35
+msgid "Connect programmer."
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:61
+msgid "Connected"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:224
+msgid "Connected to EMB"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:108
+msgid "Connected."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:81
+msgid "Connecting %1 on %2 with device %3..."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:75
+msgid "Connecting %1 with device %2..."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:89
+msgid "Connecting..."
+msgstr ""
+
+#: progs/gui/prog_config_center.cpp:92
+msgid "Connection: Error"
+msgstr ""
+
+#: progs/gui/prog_config_center.cpp:92
+msgid "Connection: Ok"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:51
+msgid "Constants in program space"
+msgstr ""
+
+#: libgui/toplevel.cpp:905
+msgid "Continue Anyway"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:284
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:86
+msgid "Continue with the specified device name: \"%1\"..."
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:81
+msgid "Continuously send 0xA55A on \"Data out\" pin."
+msgstr ""
+
+#: libgui/project_manager.cpp:314
+msgid "Copy and Add"
+msgstr ""
+
+#: libgui/config_gen.cpp:66
+msgid "Copy to clipboard"
+msgstr ""
+
+#: libgui/project_manager.cpp:325
+msgid "Copying file to project directory failed."
+msgstr ""
+
+#: common/port/usb_port.cpp:259
+msgid "Could not claim USB interface %1"
+msgstr ""
+
+#: common/port/parallel.cpp:173
+msgid "Could not claim device \"%1\": check it is read/write enabled"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:121
+msgid "Could not connect programmer."
+msgstr ""
+
+#: progs/psp/base/psp_serial.cpp:40
+msgid "Could not contact Picstart+"
+msgstr ""
+
+#: common/gui/purl_ext.cpp:31
+msgid "Could not copy file"
+msgstr ""
+
+#: common/gui/purl_ext.cpp:108
+msgid "Could not create directory"
+msgstr ""
+
+#: common/gui/purl_ext.cpp:52
+msgid "Could not create file"
+msgstr ""
+
+#: common/gui/pfile_ext.cpp:24 common/gui/pfile_ext.cpp:109
+msgid "Could not create temporary file."
+msgstr ""
+
+#: common/gui/purl_ext.cpp:75
+msgid "Could not delete file."
+msgstr ""
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:35
+msgid "Could not detect \"gpsim\" version"
+msgstr ""
+
+#: progs/direct/base/direct_mem24.cpp:51
+msgid "Could not detect EEPROM"
+msgstr ""
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:31
+msgid "Could not detect device in bootloader mode."
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:64 libgui/device_gui.cpp:263
+msgid ""
+"Could not detect supported devices for \"%1\". Please check installation."
+msgstr ""
+
+#: libgui/config_gen.cpp:131
+msgid ""
+"Could not detect supported devices for selected toolchain. Please check "
+"installation."
+msgstr ""
+
+#: libgui/device_gui.cpp:268
+msgid ""
+"Could not detect supported devices for toolchain \"%1\". Please check "
+"installation."
+msgstr ""
+
+#: coff/base/coff_object.cpp:567
+msgid "Could not determine processor (%1)."
+msgstr ""
+
+#: libgui/console.cpp:30
+msgid "Could not find \"konsolepart\"; please install kdebase."
+msgstr ""
+
+#: common/port/usb_port.cpp:210
+msgid "Could not find USB device (vendor=%1 product=%2)."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:155
+msgid "Could not find debug executive file \"%1\"."
+msgstr ""
+
+#: piklab-prog/cli_prog_manager.cpp:28
+msgid ""
+"Could not find device \"%1\" as serial or parallel port. Will try to open as "
+"serial port."
+msgstr ""
+
+#: tools/mpc/mpc_compile.cpp:40 tools/ccsc/ccsc_compile.cpp:86
+msgid "Could not find error file (%1)."
+msgstr ""
+
+#: libgui/project_manager.cpp:307
+msgid "Could not find file."
+msgstr ""
+
+#: progs/icd2/base/icd2_prog.cpp:90
+msgid "Could not find firmware file \"%1\" in directory \"%2\"."
+msgstr ""
+
+#: common/port/serial.cpp:329
+msgid "Could not flush device"
+msgstr ""
+
+#: common/port/serial.cpp:165
+msgid "Could not get file descriptor parameters"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:173
+msgid "Could not load hex file \"%1\"."
+msgstr ""
+
+#: common/port/serial.cpp:198
+msgid "Could not modify file descriptor flags"
+msgstr ""
+
+#: common/port/parallel.cpp:169 common/port/parallel.cpp:179
+msgid "Could not open device \"%1\""
+msgstr ""
+
+#: common/port/serial.cpp:190
+msgid "Could not open device \"%1\" read-write"
+msgstr ""
+
+#: common/gui/pfile_ext.cpp:58 common/cli/cli_pfile.cpp:37
+msgid "Could not open file for reading."
+msgstr ""
+
+#: common/cli/cli_pfile.cpp:19
+msgid "Could not open file for writing."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:320
+msgid "Could not open filename \"%1\"."
+msgstr ""
+
+#: progs/icd2/base/icd2_prog.cpp:100 progs/icd2/base/icd2_debug.cpp:162
+#: progs/pickit2/base/pickit_prog.cpp:35 progs/base/generic_prog.cpp:250
+msgid "Could not open firmware file \"%1\"."
+msgstr ""
+
+#: libgui/project_manager.cpp:531
+msgid "Could not open project file."
+msgstr ""
+
+#: common/gui/pfile_ext.cpp:63
+msgid "Could not open temporary file."
+msgstr ""
+
+#: progs/pickit2/base/pickit_prog.cpp:42
+msgid "Could not read calibration firmware file \"%1\" (%2)."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:168
+msgid "Could not read debug executive file \"%1\": %2."
+msgstr ""
+
+#: progs/pickit2/base/pickit2_prog.cpp:56
+msgid "Could not read firmware hex file \"%1\" (%2)."
+msgstr ""
+
+#: progs/icd2/base/icd_prog.cpp:22
+msgid "Could not read firmware hex file \"%1\": %2."
+msgstr ""
+
+#: coff/base/coff.cpp:93
+msgid "Could not recognize file (magic number is %1)."
+msgstr ""
+
+#: progs/gpsim/base/gpsim.cpp:127
+msgid "Could not recognize gpsim version."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:381
+msgid ""
+"Could not restore band gap bits because programmer does not support writing "
+"config bits."
+msgstr ""
+
+#: libgui/toplevel.cpp:715
+msgid "Could not run \"kfind\""
+msgstr ""
+
+#: libgui/toplevel.cpp:731
+msgid "Could not run \"pikloops\""
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:67
+msgid "Could not save configuration: hardware name is empty."
+msgstr ""
+
+#: common/gui/pfile_ext.cpp:45
+msgid "Could not save file."
+msgstr ""
+
+#: libgui/project_manager.cpp:245
+msgid "Could not save project file \"%1\"."
+msgstr ""
+
+#: common/port/serial.cpp:180
+msgid "Could not set file descriptor parameters"
+msgstr ""
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:34
+msgid "Could not start \"gpsim\""
+msgstr ""
+
+#: common/gui/pfile_ext.cpp:94
+msgid "Could not write to temporary file."
+msgstr ""
+
+#: libgui/new_dialogs.cpp:61
+msgid "Create New File"
+msgstr ""
+
+#: piklab-hex/main.cpp:30
+msgid "Create an hex file for the specified device."
+msgstr ""
+
+#: libgui/project_wizard.cpp:150
+msgid "Create template source file."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:46
+msgid "Crystal/resonator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:47
+msgid "Crystal/resonator, PLL enabled"
+msgstr ""
+
+#: tools/gui/tool_config_widget.cpp:24 tools/custom/custom.h:21
+msgid "Custom"
+msgstr ""
+
+#: tools/gui/tool_config_widget.cpp:109
+msgid "Custom libraries:"
+msgstr ""
+
+#: tools/gui/tool_config_widget.cpp:99
+msgid "Custom options:"
+msgstr ""
+
+#: tools/list/tools_config_widget.cpp:81
+msgid "Custom shell commands:"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:610
+msgid ""
+"DEBUG configuration bit is on. Are you sure you want to continue programming "
+"the chip?"
+msgstr ""
+
+#: devices/base/generic_device.cpp:61
+msgid "DFN"
+msgstr ""
+
+#: devices/base/generic_device.cpp:56
+msgid "DFN-S"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:30
+msgid "Data EEPROM"
+msgstr ""
+
+#: progs/direct/base/direct.cpp:36
+msgid "Data In"
+msgstr ""
+
+#: progs/direct/base/direct.cpp:33
+msgid "Data Out"
+msgstr ""
+
+#: progs/direct/base/direct.cpp:39
+msgid "Data R/W"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:21
+msgid "Data code-protection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:26
+msgid "Data write-protection"
+msgstr ""
+
+#: tools/list/device_info.cpp:33
+msgid "Datasheet"
+msgstr ""
+
+#: progs/icd2/gui/icd2_group_ui.cpp:29
+msgid "Debug Executive"
+msgstr ""
+
+#: coff/base/coff_object.cpp:125
+msgid "Debug Symbol"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:31
+msgid "Debug Vector"
+msgstr ""
+
+#. i18n: file ./data/app_data/piklabui.rc line 177
+#: rc.cpp:51
+#, no-c-format
+msgid "Debugger Toolbar"
+msgstr ""
+
+#: progs/gui/debug_config_center.h:21 progs/gui/debug_config_center.h:22
+msgid "Debugging Options"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:282 piklab-prog/cmdline.cpp:287
+msgid "Debugging is not supported for specified programmer."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:275
+msgid "Debugging test successful"
+msgstr ""
+
+#: common/common/number.cpp:19
+msgid "Decimal"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:126
+msgid "Dedicated in-circuit port"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:211
+msgid "Default system clock select"
+msgstr ""
+
+#: libgui/project_editor.cpp:36
+msgid "Description:"
+msgstr ""
+
+#: piklab-hex/main.cpp:102 piklab-coff/main.cpp:73
+msgid "Destination file already exists."
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:116
+msgid "Details..."
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:190
+msgid "Detected (%1)"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug_specific.cpp:241
+msgid "Detected custom ICD2"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:127
+msgid "Detected ports supported by \"%1\":"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:128
+msgid "Detected ports:"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:235
+msgid "Detecting \"%1\"..."
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:251
+msgid "Detecting ..."
+msgstr ""
+
+#: libgui/editor_manager.cpp:478 libgui/device_gui.cpp:175
+#: libgui/project_manager_ui.cpp:33
+msgid "Device"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:28 coff/base/coff_object.cpp:327
+msgid "Device ID"
+msgstr ""
+
+#: tools/list/device_info.cpp:21
+msgid "Device Page"
+msgstr ""
+
+#: libgui/toplevel.cpp:258
+msgid "Device Power"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:89
+msgid "Device detection:"
+msgstr ""
+
+#: libgui/device_editor.cpp:66
+msgid "Device guessed from file: %1"
+msgstr ""
+
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:159
+msgid ""
+"Device memory does not match hex file (at address 0x%2: reading 0x%3 and "
+"expecting 0x%4)."
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:104
+msgid ""
+"Device memory does not match hex file (in %1 at address %2: reading %3 and "
+"expecting %4)."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:253
+msgid ""
+"Device memory doesn't match debug executive (at address %1: reading %2 and "
+"expecting %3)."
+msgstr ""
+
+#: devices/mem24/prog/mem24_prog.cpp:42
+msgid ""
+"Device memory doesn't match hex file (at address %1: reading %2 and "
+"expecting %3)."
+msgstr ""
+
+#: devices/mem24/prog/mem24_prog.cpp:40
+msgid ""
+"Device memory is not blank (at address %1: reading %2 and expecting %3)."
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:101
+msgid ""
+"Device memory is not blank (in %1 at address %2: reading %3 and expecting %"
+"4)."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:253
+msgid ""
+"Device not autodetectable: continuing with the specified device name \"%1"
+"\"..."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:126
+msgid "Device not in programming"
+msgstr ""
+
+#: piklab-hex/main.cpp:104 piklab-prog/cmdline.cpp:157 piklab-coff/main.cpp:75
+msgid "Device not specified."
+msgstr ""
+
+#: libgui/config_gen.cpp:132
+msgid "Device not supported by the selected toolchain."
+msgstr ""
+
+#: libgui/config_gen.cpp:32 libgui/config_center.cpp:66
+#: libgui/project_editor.cpp:46 libgui/project_wizard.cpp:129
+#: coff/base/text_coff.cpp:254
+msgid "Device:"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:104
+msgid "Digital"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:263
+msgid "Digital I/O"
+msgstr ""
+
+#: coff/base/coff_object.cpp:52
+msgid "Direct"
+msgstr ""
+
+#: progs/direct/base/direct_prog.h:59
+msgid "Direct Programmer"
+msgstr ""
+
+#: common/global/about.cpp:87
+msgid "Direct programming for 16F676/630."
+msgstr ""
+
+#: common/global/about.cpp:89
+msgid "Direct programming for 16F73/74/76/77."
+msgstr ""
+
+#: common/global/about.cpp:93
+msgid ""
+"Direct programming for 24C EEPROM is inspired from his program \"prog84\"."
+msgstr ""
+
+#: common/global/about.cpp:86
+msgid "Direct programming for PIC18F devices."
+msgstr ""
+
+#: common/global/about.cpp:92
+msgid ""
+"Direct programming for dsPICs is inspired from his program \"dspicprg\"."
+msgstr ""
+
+#: libgui/project_wizard.cpp:181
+msgid "Directory does not exists. Create it?"
+msgstr ""
+
+#: libgui/project_wizard.cpp:176
+msgid "Directory is empty."
+msgstr ""
+
+#: libgui/project_wizard.cpp:125
+msgid "Directory:"
+msgstr ""
+
+#: libgui/breakpoint_view.cpp:27
+msgid "Disable breakpoint"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:91 devices/pic/base/pic_config.cpp:191
+#: devices/pic/base/pic_config.cpp:215 devices/pic/base/pic_config.cpp:394
+#: devices/pic/base/pic_config.cpp:398
+msgid "Disabled"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:36
+msgid "Disabled (connected to Vdd)"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:215
+msgid "Disabling code program protection for debugging"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:223
+msgid "Disabling code read protection for debugging"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:219
+msgid "Disabling code write protection for debugging"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:211
+msgid "Disabling watchdog timer for debugging"
+msgstr ""
+
+#: libgui/object_view.cpp:139
+msgid "Disassembling content of hex file editor."
+msgstr ""
+
+#: libgui/object_view.cpp:126
+msgid "Disassembling hex file: %1"
+msgstr ""
+
+#: libgui/project_manager.cpp:380
+msgid "Disassembly"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:98
+msgid "Disassembly Listing"
+msgstr ""
+
+#: libgui/object_view.cpp:120
+msgid "Disassembly not supported for the selected device."
+msgstr ""
+
+#: libgui/object_view.cpp:115
+msgid "Disassembly not supported for the selected toolchain."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:42
+msgid "Disconnect programmer."
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:150
+msgid "Disconnecting..."
+msgstr ""
+
+#: common/cli/cli_main.cpp:55
+msgid "Display all debug messages."
+msgstr ""
+
+#: common/cli/cli_main.cpp:53
+msgid "Display debug messages."
+msgstr ""
+
+#: common/cli/cli_main.cpp:54
+msgid "Display extra debug messages."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:37
+msgid "Display help."
+msgstr ""
+
+#: common/cli/cli_main.cpp:56
+msgid "Display low level debug messages."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:33
+msgid "Display the list of available properties."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:36
+msgid "Display the list of memory ranges."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:34
+msgid "Display the list of registers."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:35
+msgid "Display the list of variables."
+msgstr ""
+
+#: libgui/likeback.cpp:136
+msgid "Do not Help Anymore"
+msgstr ""
+
+#: libgui/project_wizard.cpp:152
+msgid "Do not add files now."
+msgstr ""
+
+#: libgui/likeback.cpp:603
+msgid "Do not ask for features: your wishes will be ignored."
+msgstr ""
+
+#: common/cli/cli_main.cpp:57
+msgid "Do not display messages."
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:200
+msgid "Do you want to delete custom hardware \"%1\"?"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:678
+msgid "Do you want to overwrite the device calibration with %1?"
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:76
+msgid "Do you want to overwrite this custom hardware \"%1\"?"
+msgstr ""
+
+#: tools/list/device_info.cpp:35
+msgid "Documents"
+msgstr ""
+
+#: coff/base/coff_object.cpp:165
+msgid "Double"
+msgstr ""
+
+#: coff/base/coff_object.cpp:148
+msgid "Dummy Entry (end of block)"
+msgstr ""
+
+#: coff/base/coff_object.cpp:154
+msgid "Duplicate Tag"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:78
+msgid "ECAN"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:130
+msgid "ECCP mux"
+msgstr ""
+
+#: devices/mem24/gui/mem24_memory_editor.cpp:41
+msgid "EEPROM Memory"
+msgstr ""
+
+#: progs/direct/base/direct_mem24.cpp:54
+msgid "EEPROM detected"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:72
+msgid "EL Cheapo classic"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:39
+msgid "ELF"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:76
+msgid "EPE Toolkit mk3"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:38
+msgid "EPIC+"
+msgstr ""
+
+#: devices/base/generic_device.cpp:27
+msgid "EPROM (OTP)"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:80
+msgid "ETT High Vpp"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:82
+msgid "ETT Low Vpp"
+msgstr ""
+
+#: libgui/likeback.cpp:176
+msgid ""
+"Each time you have a great or frustrating experience, please click the "
+"appropriate hand below the window title-bar, briefly describe what you like "
+"or dislike and click Send."
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:36
+msgid "Edit and test hardware"
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:159
+msgid "Edit/Test..."
+msgstr ""
+
+#: common/common/purl_base.cpp:50
+msgid "Elf File"
+msgstr ""
+
+#: libgui/breakpoint_view.cpp:27
+msgid "Enable breakpoint"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:397
+msgid "Enabled"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:77
+msgid "Enabled in run - Disabled in sleep"
+msgstr ""
+
+#: devices/base/generic_device.cpp:20
+msgid "End Of Life"
+msgstr ""
+
+#: coff/base/coff_object.cpp:151
+msgid "End of Structure"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:104
+msgid "End of all code sections"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:346
+msgid "End of command file reached."
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:861
+msgid "End of options"
+msgstr ""
+
+#: piklab-hex/main.cpp:141
+msgid "End:"
+msgstr ""
+
+#: coff/base/coff_object.cpp:168
+msgid "Enumeration"
+msgstr ""
+
+#: coff/base/coff_object.cpp:143
+msgid "Enumeration Tag"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:47
+msgid "Erase device memory."
+msgstr ""
+
+#: progs/psp/base/psp.cpp:342
+msgid "Erase failed"
+msgstr ""
+
+#: progs/icd1/base/icd1.cpp:155
+msgid "Erase failed (returned value is %1)"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:311
+msgid "Erasing device memory not supported for specified programmer."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:284
+msgid "Erasing done"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:35 progs/base/generic_prog.cpp:282
+msgid "Erasing..."
+msgstr ""
+
+#: common/port/serial.cpp:300
+msgid "Error checking for data in output buffer"
+msgstr ""
+
+#: common/port/serial.cpp:475
+msgid "Error clearing up break"
+msgstr ""
+
+#: libgui/project_wizard.cpp:183
+msgid "Error creating directory."
+msgstr ""
+
+#: libgui/project_wizard.cpp:246
+msgid "Error creating template file."
+msgstr ""
+
+#: common/port/usb_port.cpp:217 common/port/usb_port.cpp:231
+msgid "Error opening USB device."
+msgstr ""
+
+#: common/global/xml_data_file.cpp:29
+msgid "Error opening file: %1"
+msgstr ""
+
+#: libgui/object_view.cpp:87
+msgid "Error parsing library:\n"
+msgstr ""
+
+#: libgui/object_view.cpp:70
+msgid "Error parsing object:\n"
+msgstr ""
+
+#: progs/direct/base/direct_16.cpp:108
+msgid "Error programming %1 at %2."
+msgstr ""
+
+#: common/port/parallel.cpp:231
+msgid "Error reading bit on pin %1"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:238 progs/sdcdb/base/sdcdb_debug.cpp:237
+msgid "Error reading driven state of IO bit: %1"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:225 progs/gpsim/base/gpsim_debug.cpp:231
+#: progs/sdcdb/base/sdcdb_debug.cpp:224 progs/sdcdb/base/sdcdb_debug.cpp:230
+msgid "Error reading driving state of IO bit: %1"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:107 progs/gpsim/base/gpsim_debug.cpp:129
+#: progs/sdcdb/base/sdcdb_debug.cpp:128
+msgid "Error reading register \"%1\""
+msgstr ""
+
+#: progs/sdcdb/base/sdcdb_debug.cpp:106
+msgid "Error reading register \"W\""
+msgstr ""
+
+#: common/port/serial.cpp:409
+msgid "Error reading serial pin %1"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:207 progs/sdcdb/base/sdcdb_debug.cpp:206
+msgid "Error reading state of IO bit: %1"
+msgstr ""
+
+#: common/port/serial.cpp:261 common/port/serial.cpp:274
+msgid "Error receiving data"
+msgstr ""
+
+#: common/port/usb_port.cpp:393
+msgid "Error receiving data (ep=%1 res=%2)"
+msgstr ""
+
+#: common/port/usb_port.cpp:224
+msgid "Error resetting USB device."
+msgstr ""
+
+#: common/global/xml_data_file.cpp:51
+msgid "Error saving file: %1"
+msgstr ""
+
+#: progs/gpsim/base/gpsim.cpp:94
+msgid "Error send a signal to the subprocess."
+msgstr ""
+
+#: common/port/usb_port.cpp:294
+msgid "Error sending control message to USB port."
+msgstr ""
+
+#: common/port/serial.cpp:229
+msgid "Error sending data"
+msgstr ""
+
+#: common/port/usb_port.cpp:359
+msgid "Error sending data (ep=%1 res=%2)"
+msgstr ""
+
+#: common/port/usb_port.cpp:246
+msgid "Error setting USB configuration %1."
+msgstr ""
+
+#: common/port/serial.cpp:367
+msgid "Error setting bit %1 of serial port to %2"
+msgstr ""
+
+#: common/port/parallel.cpp:211
+msgid "Error setting pin %1 to %2"
+msgstr ""
+
+#: common/port/serial.cpp:466
+msgid "Error setting up break"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:148
+msgid "Error uploading firmware."
+msgstr ""
+
+#: common/port/serial.cpp:311
+msgid "Error while draining"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:306 libgui/hex_editor.cpp:150
+msgid "Error while writing file \"%1\"."
+msgstr ""
+
+#: libgui/hex_editor.cpp:133
+msgid "Error(s) reading hex file."
+msgstr ""
+
+#: tools/gputils/gputils_config.cpp:13 tools/c18/c18_config.cpp:12
+msgid "Errors only"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:79
+msgid "Ethernet"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:210
+msgid "Ethernet LED enable"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:110
+msgid "Even PWM output polarity"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:43
+msgid "Executable"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:52
+msgid "Executable Type:"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:30
+msgid "Executable directory"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:290
+msgid "Executing custom commands..."
+msgstr ""
+
+#: devices/base/generic_device.cpp:35
+msgid "Extended"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:124
+msgid "Extended instruction set"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:93
+msgid "Extended microcontroller"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:35
+msgid "External"
+msgstr ""
+
+#: coff/base/coff_object.cpp:133
+msgid "External Definition"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:53
+msgid "External RAM"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:27
+msgid "External RAM Pointer"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:40
+msgid "External RC oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:42 devices/pic/base/pic_config.cpp:159
+#: devices/pic/base/pic_config.cpp:185
+msgid "External RC oscillator (no CLKOUT)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:41 devices/pic/base/pic_config.cpp:158
+#: devices/pic/base/pic_config.cpp:184
+msgid "External RC oscillator with CLKOUT"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:48
+msgid "External Stack"
+msgstr ""
+
+#: coff/base/coff_object.cpp:130
+msgid "External Symbol"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:219
+msgid "External address bus shift"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:128
+msgid "External bus data wait"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:102
+msgid "External bus data width (in bits)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:49 devices/pic/base/pic_config.cpp:260
+msgid "External clock"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:51 devices/pic/base/pic_config.cpp:153
+#: devices/pic/base/pic_config.cpp:174
+msgid "External clock (no CLKOUT)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:53
+msgid "External clock (no CLKOUT), PLL enabled"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:156 devices/pic/base/pic_config.cpp:177
+msgid "External clock with 16x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:154 devices/pic/base/pic_config.cpp:175
+msgid "External clock with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:55
+msgid "External clock with 4x PLL (no CLKOUT)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:54
+msgid "External clock with 4x PLL and with CLKOUT"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:155 devices/pic/base/pic_config.cpp:176
+msgid "External clock with 8x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:50 devices/pic/base/pic_config.cpp:152
+#: devices/pic/base/pic_config.cpp:173
+msgid "External clock with CLKOUT"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:52
+msgid "External clock with CLKOUT, PLL enabled"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:56
+msgid "External clock with software controlled 4x PLL (no CLKOUT)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:214
+msgid "External memory bus"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:57
+msgid "External resistor"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:59
+msgid "External resistor (no CLKOUT)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:58
+msgid "External resistor with CLKOUT"
+msgstr ""
+
+#: common/global/log.cpp:27
+msgid "Extra debug messages"
+msgstr ""
+
+#: devices/base/device_group.cpp:295
+msgid "F (MHz)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:120
+msgid "FLTA mux"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:212
+msgid "FOSC1:FOSC0"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:27
+msgid "Fail"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:79
+msgid "Fail-safe clock monitor"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:250
+msgid "Failed"
+msgstr ""
+
+#: libgui/project_manager.cpp:503
+msgid "Failed to create new project file"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:223
+msgid "Failed to execute command: check toolchain configuration."
+msgstr ""
+
+#: tools/list/compile_manager.cpp:277
+msgid "Failed to execute custom command #%1."
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:39 progs/sdcdb/base/sdcdb_debug.cpp:39
+msgid "Failed to halt target: kill process."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:75
+msgid "Failed to halt target: try a reset."
+msgstr ""
+
+#: progs/base/generic_debug.cpp:45
+msgid "Failed to initialize device for debugging."
+msgstr ""
+
+#: progs/icd1/base/icd1.cpp:34 progs/icd2/base/icd2_serial.cpp:43
+msgid "Failed to set port mode to '%1'."
+msgstr ""
+
+#: progs/psp/base/psp.cpp:227
+msgid "Failed to set range"
+msgstr ""
+
+#: progs/gpsim/base/gpsim.cpp:58
+msgid "Failed to start \"gpsim\"."
+msgstr ""
+
+#: progs/icd2/base/icd_prog.cpp:30 progs/pickit2/base/pickit2_prog.cpp:67
+msgid "Failed to upload firmware."
+msgstr ""
+
+#: libgui/device_gui.cpp:82
+msgid "Family Tree"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:248
+msgid "Fast RC oscillator"
+msgstr ""
+
+#: devices/pic/pic/pic_group.cpp:65
+msgid "Features"
+msgstr ""
+
+#: common/gui/purl_gui.cpp:43
+msgid "File \"%1\" already exists. Overwrite ?"
+msgstr ""
+
+#: libgui/editor_manager.cpp:109
+msgid "File \"%1\" already loaded. Reload?"
+msgstr ""
+
+#: libgui/project_manager.cpp:313
+msgid ""
+"File \"%1\" is not inside the project directory. Do you want to copy the "
+"file to your project directory?"
+msgstr ""
+
+#: libgui/device_editor.cpp:74 libgui/editor.cpp:80
+msgid "File %1 not saved."
+msgstr ""
+
+#: coff/base/coff_archive.cpp:115
+msgid "File Members:"
+msgstr ""
+
+#: libgui/new_dialogs.cpp:63
+msgid "File Name:"
+msgstr ""
+
+#: libgui/hex_editor.cpp:142
+msgid "File URL: \"%1\"."
+msgstr ""
+
+#: coff/base/text_coff.cpp:128
+msgid "File could not be read"
+msgstr ""
+
+#: piklab-hex/main.cpp:202
+msgid "File created."
+msgstr ""
+
+#: libgui/project_manager.cpp:319
+msgid "File is already in the project."
+msgstr ""
+
+#: common/global/xml_data_file.cpp:35
+msgid "File is not of correct type."
+msgstr ""
+
+#: common/global/pfile.cpp:55
+msgid "File not open."
+msgstr ""
+
+#: coff/base/coff_archive.cpp:27
+msgid "File size not terminated by 'l' (\"%1\")."
+msgstr ""
+
+#: tools/list/compile_manager.cpp:111 tools/list/compile_manager.cpp:136
+#: common/gui/pfile_ext.cpp:25 common/gui/pfile_ext.cpp:64
+#: common/gui/pfile_ext.cpp:95 common/gui/pfile_ext.cpp:110
+#: common/cli/cli_pfile.cpp:20 common/cli/cli_pfile.cpp:38
+#: libgui/project_manager.cpp:307 libgui/project_manager.cpp:319
+msgid "File: %1"
+msgstr ""
+
+#: libgui/project_manager.cpp:325 libgui/project_wizard.cpp:246
+msgid "File: %1\n"
+msgstr ""
+
+#: libgui/project_wizard.cpp:82 coff/base/coff_object.cpp:152
+msgid "Filename"
+msgstr ""
+
+#: piklab-coff/main.cpp:197
+msgid "Files:"
+msgstr ""
+
+#: piklab-hex/main.cpp:50
+msgid "Fill for checksum verification (cf datasheets)."
+msgstr ""
+
+#: piklab-hex/main.cpp:39
+msgid "Fill option."
+msgstr ""
+
+#: piklab-hex/main.cpp:275
+msgid "Fill options:"
+msgstr ""
+
+#: piklab-hex/main.cpp:48
+msgid "Fill with blank values (default)."
+msgstr ""
+
+#: piklab-hex/main.cpp:278
+msgid "Fill with the specified numeric value."
+msgstr ""
+
+#: piklab-hex/main.cpp:49
+msgid "Fill with zeroes."
+msgstr ""
+
+#: libgui/device_gui.cpp:110
+msgid "Filters:"
+msgstr ""
+
+#: libgui/project_manager.cpp:192
+msgid "Find Files..."
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:64
+msgid "Firmware"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:126
+msgid "Firmware directory is not configured or does not exist."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:142
+msgid "Firmware directory not configured."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:58
+msgid "Firmware directory."
+msgstr ""
+
+#: progs/gui/prog_config_widget.cpp:26
+msgid "Firmware directory:"
+msgstr ""
+
+#: progs/icd2/base/icd_prog.cpp:26
+msgid "Firmware hex file seems incompatible with device 16F876 inside ICD."
+msgstr ""
+
+#: progs/pickit2/base/pickit2_prog.cpp:60
+msgid ""
+"Firmware hex file seems incompatible with device 18F2550 inside PICkit2."
+msgstr ""
+
+#: progs/pickit2/base/pickit2.cpp:52
+msgid ""
+"Firmware memory does not match hex file (at address 0x%2: reading 0x%3 and "
+"expecting 0x%4)."
+msgstr ""
+
+#: progs/icd2/base/icd2_prog.cpp:108
+msgid "Firmware still incorrect after uploading."
+msgstr ""
+
+#: progs/pickit2/base/pickit2_prog.cpp:70
+msgid "Firmware succesfully uploaded."
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:147
+msgid "Firmware uploaded successfully."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:136
+msgid "Firmware version is %1"
+msgstr ""
+
+#: piklab-hex/main.cpp:82
+msgid "First hex file: "
+msgstr ""
+
+#: devices/base/generic_device.cpp:26
+msgid "Flash"
+msgstr ""
+
+#: libgui/device_gui.cpp:83
+msgid "Flat List"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:36 coff/base/coff_object.cpp:164
+msgid "Float"
+msgstr ""
+
+#: devices/gui/memory_editor.cpp:277
+msgid "For checksum check"
+msgstr ""
+
+#: libgui/watch_view.cpp:99 libgui/watch_view.cpp:101
+msgid "Format"
+msgstr ""
+
+#: piklab-hex/main.cpp:123 coff/base/text_coff.cpp:252
+msgid "Format:"
+msgstr ""
+
+#: libgui/toplevel.cpp:204
+msgid "Forward"
+msgstr ""
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:36
+msgid "Found version \"%1\""
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:276
+msgid "Frequency range selection for FRC oscillator"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:24 coff/base/coff_object.cpp:179
+msgid "Function"
+msgstr ""
+
+#: coff/base/coff_object.cpp:137
+msgid "Function Argument"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:59
+msgid "Function or Undefined Space"
+msgstr ""
+
+#: devices/base/generic_device.cpp:18
+msgid "Future Product"
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:54
+msgid "GPRs"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.h:76
+msgid "GPSim"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:251 progs/sdcdb/base/sdcdb_debug.cpp:250
+msgid "GPSim (4MHz)"
+msgstr ""
+
+#: tools/gputils/gputils.h:33
+msgid "GPUtils"
+msgstr ""
+
+#: libgui/config_center.h:34 libgui/project_editor.cpp:30
+msgid "General"
+msgstr ""
+
+#: libgui/config_center.h:35
+msgid "General Configuration"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:251
+msgid "General Purpose Registers:"
+msgstr ""
+
+#: devices/pic/base/pic_protection.cpp:358
+msgid "General Segment"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:192
+msgid "General code segment read-protection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:193
+msgid "General code segment write-protection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:243
+msgid "General segment security"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:242
+msgid "General segment write-protection"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:35
+msgid "Generated"
+msgstr ""
+
+#: libgui/config_gen.cpp:112
+msgid "Generation is not supported yet for the selected toolchain or device."
+msgstr ""
+
+#: libgui/config_gen.cpp:126
+msgid "Generation is only partially supported for this device."
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:25
+msgid "Generic Pointer"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:841
+msgid "Generic options"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:41
+msgid "Get property value: \"get <property>\" or \"<property>\"."
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:16
+msgid "Global"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:45
+msgid "Global declarations"
+msgstr ""
+
+#: devices/pic/gui/pic_memory_editor.cpp:44
+msgid "Go to end"
+msgstr ""
+
+#: devices/pic/gui/pic_memory_editor.cpp:41
+msgid "Go to start"
+msgstr ""
+
+#: piklab/main.cpp:21
+msgid ""
+"Graphical development environment for applications based on PIC and dsPIC "
+"microcontrollers."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:51
+msgid "HOODMICRO"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:258
+msgid "HS crystal oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:169
+msgid "HS/2 Crystal with 16x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:167
+msgid "HS/2 Crystal with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:168
+msgid "HS/2 Crystal with 8x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:172
+msgid "HS/3 Crystal with 16x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:170
+msgid "HS/3 Crystal with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:171
+msgid "HS/3 Crystal with 8x PLL"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:240
+msgid "Hardcoded (%1)"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:32
+msgid "Hardware Stack"
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:45
+msgid "Hardware name:"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:31
+msgid "Header directory"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:33
+msgid "Headers"
+msgstr ""
+
+#: tools/list/tools_config_widget.cpp:24
+msgid "Help Dialog"
+msgstr ""
+
+#: libgui/likeback.cpp:184
+msgid "Help Improve the Application"
+msgstr ""
+
+#: libgui/toplevel.cpp:539
+msgid "Hex"
+msgstr ""
+
+#: common/common/purl_base.cpp:49 libgui/project_manager_ui.cpp:97
+msgid "Hex File"
+msgstr ""
+
+#: piklab-hex/main.cpp:148
+msgid ""
+"Hex file cannot be fixed because the format was not recognized or is "
+"inconsistent."
+msgstr ""
+
+#: piklab-hex/main.cpp:156
+msgid "Hex file cleaned and fixed."
+msgstr ""
+
+#: piklab-hex/main.cpp:155
+msgid "Hex file cleaned."
+msgstr ""
+
+#: tools/gui/tool_config_widget.cpp:120
+msgid "Hex file format:"
+msgstr ""
+
+#: piklab-hex/main.cpp:118
+msgid "Hex file is compatible with device \"%1\"."
+msgstr ""
+
+#: piklab-hex/main.cpp:115 piklab-hex/main.cpp:144
+msgid "Hex file is valid."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:175
+msgid "Hex file seems incompatible with device \"%1\"."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:60
+msgid "Hex file to be used for programming."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:454
+msgid "Hex filename for programming."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:161
+msgid "Hex filename not specified."
+msgstr ""
+
+#: piklab-hex/main.cpp:288
+msgid "Hex filename(s)."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:56
+msgid "Hex output file format."
+msgstr ""
+
+#: common/common/number.cpp:20
+msgid "Hexadecimal"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:26
+msgid "High"
+msgstr ""
+
+#: devices/pic/gui/pic_memory_editor.cpp:77
+#: devices/pic/base/pic_config.cpp:231 devices/pic/base/pic_config.cpp:238
+msgid "High Security"
+msgstr ""
+
+#: devices/base/generic_device.cpp:42
+msgid "High Voltage"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:277
+msgid "High range (nominal FRC frequency is 14.1 MHz)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:245
+msgid "High security"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:147 devices/pic/base/pic_config.cpp:162
+msgid "High speed crystal"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:60
+msgid "High speed crystal/resonator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:62
+msgid "High speed crystal/resonator with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:63
+msgid "High speed crystal/resonator with software controlled 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:61
+msgid "High speed crystal/resonator, PLL enabled"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:72
+msgid "Highest"
+msgstr ""
+
+#: libgui/likeback.cpp:74
+msgid "I Do not Like..."
+msgstr ""
+
+#: libgui/likeback.cpp:81
+msgid "I Found a Bug..."
+msgstr ""
+
+#: libgui/likeback.cpp:67
+msgid "I Like..."
+msgstr ""
+
+#: libgui/toplevel.cpp:338 libgui/likeback.cpp:537
+msgid "I do not like..."
+msgstr ""
+
+#: libgui/toplevel.cpp:342 libgui/likeback.cpp:544
+msgid "I found a bug..."
+msgstr ""
+
+#: libgui/toplevel.cpp:334 libgui/likeback.cpp:530
+msgid "I like..."
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:47
+msgid "I/Os"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:273
+msgid "I2C pins selection"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:195
+msgid "ICD communication channel"
+msgstr ""
+
+#: progs/icd1/base/icd1_prog.h:44
+msgid "ICD1 Programmer"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.h:76
+msgid "ICD2 Debugger"
+msgstr ""
+
+#: progs/icd2/base/icd2_prog.h:76
+msgid "ICD2 Programmer"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:179
+msgid "INT pin interrupt service routine"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:213
+msgid "INTRC"
+msgstr ""
+
+#: devices/pic/pic/pic_group.cpp:55
+msgid "IO Ports"
+msgstr ""
+
+#: libgui/likeback.cpp:179
+msgid "Icons description:"
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:85
+msgid ""
+"Id returned by bootloader corresponds to other devices: %1 (%2 read and %3 "
+"expected)."
+msgstr ""
+
+#: progs/icd2/gui/icd2_group_ui.cpp:21
+msgid "Id:"
+msgstr ""
+
+#: devices/base/generic_device.cpp:17
+msgid "In Production"
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:19
+msgid "In Programming"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:82
+msgid "In-circuit debugger"
+msgstr ""
+
+#: common/common/purl_base.cpp:36
+msgid "Include File"
+msgstr ""
+
+#: tools/gui/tool_config_widget.h:57
+msgid "Include directories:"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:35
+msgid "Included"
+msgstr ""
+
+#: progs/psp/base/psp_serial.cpp:59
+msgid "Incorrect ack: expecting %1, received %2"
+msgstr ""
+
+#: progs/psp/base/psp_serial.cpp:67
+msgid "Incorrect received data end: expecting 00, received %1"
+msgstr ""
+
+#: coff/base/coff_object.cpp:54
+msgid "Indentifier"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:63
+msgid "Index:"
+msgstr ""
+
+#: devices/base/generic_device.cpp:34
+msgid "Industrial"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:107
+msgid "Information:"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:247
+msgid "Initial oscillator source"
+msgstr ""
+
+#: coff/base/coff_object.cpp:330
+msgid "Initialized Data"
+msgstr ""
+
+#: coff/base/coff_object.cpp:122
+msgid "Inside Section"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:32 coff/base/coff_object.cpp:162
+msgid "Int"
+msgstr ""
+
+#: common/cli/cli_main.cpp:69
+msgid "Interactive mode"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:228
+msgid "Interactive mode: type help for help"
+msgstr ""
+
+#: common/port/usb_port.cpp:255
+msgid "Interface %1 not present: using %2"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:54
+msgid "Internal RAM"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:28
+msgid "Internal RAM Pointer"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:49
+msgid "Internal Stack"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:73
+msgid "Internal Trim"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:141
+msgid "Internal fast RC"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:249
+msgid "Internal fast RC oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:182
+msgid "Internal fast RC oscillator (no PLL)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:180
+msgid "Internal fast RC oscillator with 16x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:178
+msgid "Internal fast RC oscillator with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:157 devices/pic/base/pic_config.cpp:179
+msgid "Internal fast RC oscillator with 8x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:250
+msgid "Internal fast RC oscillator with PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:255
+msgid "Internal fast RC oscillator with postscaler"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:142
+msgid "Internal low-power RC"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:183
+msgid "Internal low-power RC oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:43
+msgid "Internal oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:45
+msgid "Internal oscillator (no CLKOUT)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:205
+msgid "Internal oscillator speed"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:44
+msgid "Internal oscillator with CLKOUT"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:65
+msgid "Internal oscillator, HS used by USB"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:64
+msgid "Internal oscillator, XT used by USB"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:80
+msgid "Internal-external switchover"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:332
+msgid "Invalid begin or end character for read block."
+msgstr ""
+
+#: progs/psp/base/psp.cpp:185
+msgid "Invalid firmware version"
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:48
+msgid "Inverted"
+msgstr ""
+
+#: libgui/toplevel.cpp:938
+msgid ""
+"It is not possible to start a debugging session with an hex file not "
+"generated with the current project."
+msgstr ""
+
+#: progs/icd2/base/icd2_prog.cpp:38
+msgid "It is not recommended to power dsPICs from ICD. Continue anyway?"
+msgstr ""
+
+#: libgui/likeback.cpp:395
+msgid ""
+"It will only be used to contact you back if more information is needed about "
+"your comments, how to reproduce the bugs you report, send bug corrections "
+"for you to test..."
+msgstr ""
+
+#: devices/pic/base/pic.cpp:44
+msgid "J"
+msgstr ""
+
+#: tools/jal/jal.h:32
+msgid "JAL"
+msgstr ""
+
+#: common/common/purl_base.cpp:27
+msgid "JAL Compiler"
+msgstr ""
+
+#: common/common/purl_base.cpp:40
+msgid "JAL File"
+msgstr ""
+
+#: tools/jalv2/jalv2.h:32
+msgid "JAL V2"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:41
+msgid "JDM classic"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:43
+msgid "JDM classic (delay 10)"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:45
+msgid "JDM classic (delay 20)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:268
+msgid "JTAG port enabled"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:45
+msgid "K"
+msgstr ""
+
+#: libgui/toplevel.cpp:156
+msgid "Konsole"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:80
+msgid "LCD"
+msgstr ""
+
+#: common/global/about.cpp:81
+msgid "LPLAB author (original microchip programmer support)."
+msgstr ""
+
+#: coff/base/coff_object.cpp:134
+msgid "Label"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:21
+msgid "Librarian"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:21
+msgid "Librarian:"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:44
+msgid "Library"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:33
+msgid "Library Directory"
+msgstr ""
+
+#: common/common/purl_base.cpp:44
+msgid "Library File"
+msgstr ""
+
+#: coff/base/coff_object.cpp:153
+msgid "Line Number"
+msgstr ""
+
+#: libgui/text_editor.cpp:170
+msgid "Line: %1  Col: %2"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:19
+msgid "Linker"
+msgstr ""
+
+#: common/common/purl_base.cpp:46 libgui/project_manager.cpp:165
+#: libgui/project_manager_ui.cpp:33
+msgid "Linker Script"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:32
+msgid "Linker Script Directory"
+msgstr ""
+
+#: common/common/purl_base.cpp:47
+msgid "Linker Script for PIC30"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:19
+msgid "Linker:"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:99
+msgid "List"
+msgstr ""
+
+#: common/common/purl_base.cpp:52
+msgid "List File"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:18
+msgid "Local"
+msgstr ""
+
+#: libgui/breakpoint_view.cpp:48
+msgid "Location"
+msgstr ""
+
+#: libgui/new_dialogs.cpp:32
+msgid "Location:"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:31 coff/base/coff_object.cpp:163
+msgid "Long"
+msgstr ""
+
+#: coff/base/coff_object.cpp:174
+msgid "Long Double"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:25
+msgid "Low"
+msgstr ""
+
+#: devices/base/generic_device.cpp:40
+msgid "Low Power"
+msgstr ""
+
+#: devices/base/generic_device.cpp:41
+msgid "Low Voltage"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:74
+msgid "Low Voltage Detect"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:254
+msgid "Low power RC oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:48
+msgid "Low power crystal"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:116
+msgid "Low power in sleep mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:278
+msgid "Low range (nominal FRC frequency is 9.7 MHz)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:86
+msgid "Low voltage programming"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:181
+msgid "Low-power 32 kHz oscillator (TMR1 oscillator)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:123
+msgid "Low-power timer1 oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:146 devices/pic/base/pic_config.cpp:161
+msgid "Low-power/low-frequency crystal"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:52
+msgid "Lower-128-byte Internal RAM"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:69
+msgid "Lowest"
+msgstr ""
+
+#: progs/direct/base/direct.cpp:24
+msgid "MCLR (Vpp)"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:52
+msgid "MCLR Vdd"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:52
+msgid "MCLR Vpp"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:51
+msgid "MCLR ground"
+msgstr ""
+
+#: devices/base/generic_device.cpp:60
+msgid "MLF"
+msgstr ""
+
+#: tools/mpc/mpc.h:32
+msgid "MPC Compiler"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:141 progs/base/generic_prog.cpp:149
+#: progs/base/generic_prog.cpp:157
+msgid "MPLAB %1"
+msgstr ""
+
+#: devices/base/generic_device.cpp:55
+msgid "MQFP"
+msgstr ""
+
+#: devices/base/generic_device.cpp:50
+msgid "MSOP"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:220
+msgid "MSSP address select bit"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:138
+msgid "Macros"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:38
+msgid "Magic number: %1"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:109
+msgid "Malformed record: "
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:220
+msgid "Malformed string received \"%1\""
+msgstr ""
+
+#: common/common/purl_base.cpp:53
+msgid "Map File"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:204
+msgid "Master clear pull-up resistor"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:34
+msgid "Master clear reset"
+msgstr ""
+
+#: devices/base/generic_device.cpp:22
+msgid "Mature"
+msgstr ""
+
+#: common/global/log.cpp:28
+msgid "Max debug messages"
+msgstr ""
+
+#: coff/base/coff_object.cpp:169
+msgid "Member Of Enumeration"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:19
+msgid "Member name not terminated by '/' (\"%1\")."
+msgstr ""
+
+#: coff/base/coff_object.cpp:144
+msgid "Member of Enumeration"
+msgstr ""
+
+#: coff/base/coff_object.cpp:136
+msgid "Member of Structure"
+msgstr ""
+
+#: coff/base/coff_object.cpp:139
+msgid "Member of Union"
+msgstr ""
+
+#: libgui/device_gui.cpp:408 libgui/project_manager_ui.cpp:100
+msgid "Memory Map"
+msgstr ""
+
+#: devices/mem24/mem24/mem24_group.cpp:22
+msgid "Memory Size"
+msgstr ""
+
+#: devices/pic/pic/pic_group.cpp:27
+msgid "Memory Type"
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:237
+msgid ""
+"Memory area for debug executive was not empty. Overwrite it and continue "
+"anyway..."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:83
+msgid "Memory parity error"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:254
+msgid "Memory range not present on this device."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:258
+msgid "Memory range not recognized."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:57
+msgid "Memory range to operate on."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:259
+msgid "Memory ranges are not supported for the specified device."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:148
+msgid "Memory ranges for PIC/dsPIC devices:"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:94
+msgid "Microcontroller"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:95
+msgid "Microprocessor"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:97
+msgid "Microprocessor with boot block"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:71
+msgid "Mid/High"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:70
+msgid "Mid/Low"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:52
+msgid "Midrange Family"
+msgstr ""
+
+#: devices/pic/base/pic_register.cpp:76
+msgid "Mirror of %1"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:260
+msgid "Missing or incorrect device (Read id is %1)."
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:51
+msgid "Module Vpp"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:74
+msgid "Monty-Robot programmer"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:82
+msgid "Motion Feeback"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:81
+msgid "Motor Control"
+msgstr ""
+
+#: common/gui/editlistbox.cpp:147
+msgid "Move &Down"
+msgstr ""
+
+#: common/gui/editlistbox.cpp:142
+msgid "Move &Up"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:70
+msgid "Myke's EL Cheapo"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:58 libgui/project_editor.cpp:32
+#: libgui/project_wizard.cpp:120
+msgid "Name:"
+msgstr ""
+
+#: libgui/project_manager.cpp:218
+msgid "New File..."
+msgstr ""
+
+#: coff/base/coff.cpp:29 coff/base/coff_object.cpp:36
+msgid "New Microchip"
+msgstr ""
+
+#: libgui/project_manager.cpp:181 libgui/toplevel.cpp:226
+msgid "New Project..."
+msgstr ""
+
+#: libgui/project_wizard.cpp:158
+msgid "New Project: Add Files"
+msgstr ""
+
+#: libgui/project_wizard.cpp:117
+msgid "New Project: Basic Settings"
+msgstr ""
+
+#: libgui/project_wizard.cpp:147
+msgid "New Project: Source Files"
+msgstr ""
+
+#: libgui/project_manager.cpp:197
+msgid "New Source File..."
+msgstr ""
+
+#: libgui/toplevel.cpp:184
+msgid "New hex File..."
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:159
+msgid "New/Test..."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:180
+msgid "No \"goto\" instruction in the first four instructions."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:261
+msgid "No COFF file specified."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:171
+msgid "No breakpoint set."
+msgstr ""
+
+#: common/cli/cli_main.cpp:27
+msgid "No command specified"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:286
+msgid "No custom commands specified."
+msgstr ""
+
+#: common/global/log.cpp:25
+msgid "No debug message"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:98
+msgid "No device selected."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:243 piklab-prog/cli_interactive.cpp:259
+msgid "No device specified."
+msgstr ""
+
+#: common/nokde/nokde_kaboutdata.cpp:430
+msgid ""
+"No licensing terms for this program have been specified.\n"
+"Please check the documentation or the source for any\n"
+"licensing terms.\n"
+msgstr ""
+
+#: progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp:37
+msgid "No of Retries:"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:244 piklab-prog/cli_interactive.cpp:262
+msgid "No register."
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:72
+msgid "No variable"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:266
+msgid "No variable."
+msgstr ""
+
+#: piklab-hex/main.cpp:137
+msgid "No. of Words:"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:108
+msgid "No. of file members:"
+msgstr ""
+
+#: coff/base/text_coff.cpp:258
+msgid "No. of sections:"
+msgstr ""
+
+#: coff/base/text_coff.cpp:259 coff/base/coff_archive.cpp:109
+msgid "No. of symbols:"
+msgstr ""
+
+#: coff/base/text_coff.cpp:260
+msgid "No. of variables:"
+msgstr ""
+
+#: libgui/breakpoint_view.cpp:64
+msgid "Non-code breakpoint"
+msgstr ""
+
+#: devices/base/generic_device.cpp:39 devices/pic/base/pic.cpp:43
+msgid "Normal"
+msgstr ""
+
+#: common/global/log.cpp:26
+msgid "Normal debug messages"
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:61
+msgid "Not Connected"
+msgstr ""
+
+#: devices/base/generic_device.cpp:19
+msgid "Not Recommended for New Design"
+msgstr ""
+
+#: common/common/group.cpp:13
+msgid "Not Supported"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:225
+msgid "Not connected to EMB"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:72
+msgid "Not tested."
+msgstr ""
+
+#: libgui/likeback.cpp:598
+msgid ""
+"Note that to improve this application, it's important to tell us the things "
+"you like as much as the things you dislike."
+msgstr ""
+
+#: common/port/usb_port.cpp:401
+msgid "Nothing received: retrying..."
+msgstr ""
+
+#: common/port/usb_port.cpp:363
+msgid "Nothing sent: retrying..."
+msgstr ""
+
+#: piklab-hex/main.cpp:232 piklab-prog/cli_interactive.cpp:158
+#: piklab-prog/cli_interactive.cpp:298
+msgid "Number format not recognized."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:262
+msgid "OSC2 pin function"
+msgstr ""
+
+#: coff/base/coff.cpp:23
+msgid "Object"
+msgstr ""
+
+#: common/common/purl_base.cpp:43
+msgid "Object File"
+msgstr ""
+
+#: libgui/project_manager.cpp:213 libgui/project_manager_ui.cpp:34
+msgid "Objects"
+msgstr ""
+
+#: common/common/number.cpp:22
+msgid "Octal"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:107
+msgid "Odd PWM output polarity"
+msgstr ""
+
+#: coff/base/coff.cpp:27 coff/base/coff_object.cpp:35
+msgid "Old Microchip"
+msgstr ""
+
+#: progs/picdem_bootloader/base/picdem_bootloader.cpp:86
+msgid "Only bootloader version 1.x is supported"
+msgstr ""
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:38
+msgid "Only bootloader version 2.x is supported."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:315
+msgid "Only code and EEPROM will be erased."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:316
+msgid "Only code will be erased."
+msgstr ""
+
+#: libgui/likeback.cpp:594
+msgid "Only english language is accepted."
+msgstr ""
+
+#: progs/base/prog_config.cpp:69
+msgid "Only program what is needed (faster)."
+msgstr ""
+
+#: progs/base/debug_config.cpp:13
+msgid "Only stop stepping on project source line."
+msgstr ""
+
+#: progs/base/debug_config.cpp:12
+msgid "Only stop stepping on source line."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:177
+msgid ""
+"Only the first word of the \"goto\" instruction is into the first four "
+"instructions."
+msgstr ""
+
+#: progs/base/prog_config.cpp:71
+msgid "Only verify programmed words in code memory (faster)."
+msgstr ""
+
+#: progs/pickit2/gui/pickit2_group_ui.cpp:33
+msgid "Open Calibration Firmware"
+msgstr ""
+
+#: libgui/toplevel.cpp:554
+msgid "Open File"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:142
+msgid "Open Firmware"
+msgstr ""
+
+#: libgui/project_manager.cpp:182 libgui/toplevel.cpp:228
+msgid "Open Project..."
+msgstr ""
+
+#: libgui/toplevel.cpp:230
+msgid "Open Recent Project"
+msgstr ""
+
+#: common/global/log.cpp:58
+msgid "Operation aborted by user."
+msgstr ""
+
+#: coff/base/text_coff.cpp:257
+msgid "Option header:"
+msgstr ""
+
+#: piklab/main.cpp:15
+msgid "Optional filenames to be opened upon startup."
+msgstr ""
+
+#: coff/base/coff_object.cpp:469
+msgid "Optional header format not supported: magic number is %1."
+msgstr ""
+
+#: coff/base/coff_object.cpp:538
+msgid "Optionnal header size is not %1: %2"
+msgstr ""
+
+#: libgui/project_manager.cpp:191
+msgid "Options..."
+msgstr ""
+
+#: common/global/about.cpp:80
+msgid "Original author of PiKdev."
+msgstr ""
+
+#: common/global/about.cpp:85
+msgid "Original code for direct programming."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:351
+msgid "Osccal backup cannot be read by selected programmer"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:314
+msgid "Osccal backup cannot be read by the selected programmer"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:303
+msgid "Osccal cannot be read by the selected programmer"
+msgstr ""
+
+#: progs/pickit2/gui/pickit2_group_ui.cpp:28
+msgid "Osccal regeneration not available for the selected device."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:39
+msgid "Oscillator"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:175
+msgid ""
+"Oscillator calibration regeneration is not available with the selected "
+"programmer."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:160
+msgid "Oscillator mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:140
+msgid "Oscillator source"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:100
+msgid "Oscillator system clock switch"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:64
+msgid "Output Executable Type:"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:178
+msgid "Output hex filename already exists."
+msgstr ""
+
+#: libgui/log_view.cpp:89
+msgid "Output in console"
+msgstr ""
+
+#: tools/list/tools_config_widget.cpp:53
+msgid "Output type:"
+msgstr ""
+
+#: common/cli/cli_main.cpp:63
+msgid "Overwrite files and answer \"yes\" to questions."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:32
+msgid "P16PRO40 7407"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:30
+msgid "P16PRO40 classic"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:36
+msgid "P16PRO40-VPP40 7407"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:34
+msgid "P16PRO40-VPP40 classic"
+msgstr ""
+
+#: devices/base/generic_device.cpp:46
+msgid "PDIP"
+msgstr ""
+
+#: devices/pic/pic/pic_group.h:25
+msgid "PIC"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:47
+msgid "PIC Elmer"
+msgstr ""
+
+#: coff/base/coff.cpp:28
+msgid "PIC30"
+msgstr ""
+
+#: tools/pic30/pic30.h:33
+msgid "PIC30 Toolchain"
+msgstr ""
+
+#: tools/picc/picc.h:76 coff/base/coff_object.cpp:37
+msgid "PICC Compiler"
+msgstr ""
+
+#: tools/picc/picc.h:64
+msgid "PICC Lite Compiler"
+msgstr ""
+
+#: tools/picc/picc.h:88
+msgid "PICC-18 Compiler"
+msgstr ""
+
+#: progs/pickit1/base/pickit1_prog.h:35
+msgid "PICkit1"
+msgstr ""
+
+#: progs/pickit2/base/pickit2_prog.h:37
+msgid "PICkit2 Firmware 1.x"
+msgstr ""
+
+#: progs/pickit2v2/base/pickit2v2_prog.h:39
+msgid "PICkit2 Firmware 2.x"
+msgstr ""
+
+#: devices/base/generic_device.cpp:59
+msgid "PLCC"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:201
+msgid "PLL clock (divided by)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:223
+msgid "PMP pin select bit"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:103
+msgid "PORTB A/D"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:131
+msgid "PWM multiplexed onto RE6 and RE3"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:133
+msgid "PWM multiplexed onto RE6 and RE5"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:132
+msgid "PWM multiplexed onto RH7 and RH4"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:134
+msgid "PWM multiplexed onto RH7 and RH6"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:113
+msgid "PWM output pin reset state"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:121
+msgid "PWM4 mux"
+msgstr ""
+
+#: devices/base/device_group.cpp:251
+msgid "Packaging"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:29
+msgid "Paged Pointer"
+msgstr ""
+
+#: progs/gui/port_selector.cpp:21
+msgid "Parallel"
+msgstr ""
+
+#: common/port/port.cpp:62
+msgid "Parallel Port"
+msgstr ""
+
+#: coff/base/text_coff.cpp:245
+msgid "Parsing COFF file is not supported for this device or an error occured."
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:84
+msgid "Parsing COFF file: %1"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:24
+msgid "Pass"
+msgstr ""
+
+#: common/cli/cli_main.cpp:51
+msgid "Perform the requested command."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:269
+msgid "Peripheral pin select configuration"
+msgstr ""
+
+#: progs/picdem_bootloader/base/picdem_bootloader_prog.h:31
+msgid "Picdem Bootloader"
+msgstr ""
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader_prog.h:32
+msgid "Pickit2 Bootloader"
+msgstr ""
+
+#: progs/psp/base/psp_prog.h:37
+msgid "Picstart Plus"
+msgstr ""
+
+#: common/common/purl_base.cpp:58
+msgid "Pikdev Project File"
+msgstr ""
+
+#: piklab/main.cpp:21
+msgid "Piklab"
+msgstr ""
+
+#: piklab-coff/main.cpp:278
+msgid "Piklab COFF Utility"
+msgstr ""
+
+#: piklab-hex/main.cpp:287
+msgid "Piklab Hex Utility"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:453
+msgid "Piklab Programmer Utility"
+msgstr ""
+
+#: progs/gui/port_selector.cpp:68
+msgid "Piklab has been compiled without support for USB port."
+msgstr ""
+
+#: progs/gui/port_selector.cpp:65
+msgid "Piklab has been compiled without support for parallel port."
+msgstr ""
+
+#: libgui/device_gui.cpp:418
+msgid "Pin Diagrams"
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:34
+msgid "Pin assignment"
+msgstr ""
+
+#: libgui/likeback.cpp:545
+msgid "Please briefly describe the bug you encountered."
+msgstr ""
+
+#: libgui/likeback.cpp:538
+msgid "Please briefly describe what you do not like."
+msgstr ""
+
+#: libgui/likeback.cpp:531
+msgid "Please briefly describe what you like."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:333
+msgid "Please check installation of selected software debugger."
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:79
+msgid "Please compile the current project"
+msgstr ""
+
+#: libgui/likeback.cpp:394
+msgid "Please provide your email address."
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:654
+msgid "Please use %1 to report bugs, do not mail the authors directly.\n"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:652
+msgid ""
+"Please use http://bugs.kde.org to report bugs, do not mail the authors "
+"directly.\n"
+msgstr ""
+
+#: coff/base/coff_object.cpp:178
+msgid "Pointer"
+msgstr ""
+
+#: progs/gui/prog_config_center.cpp:119
+msgid "Port Selection"
+msgstr ""
+
+#: progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp:20
+msgid "Port Speed:"
+msgstr ""
+
+#: progs/direct/base/direct.cpp:27
+msgid "Power (Vdd)"
+msgstr ""
+
+#: progs/base/prog_config.cpp:72
+msgid "Power down target after programming."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:190
+msgid "Power-on reset timer value (ms)"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:37
+msgid "Power-up timer"
+msgstr ""
+
+#. i18n: file ./data/app_data/piklabui.rc line 83
+#: rc.cpp:27
+#, no-c-format
+msgid "Pr&ogrammer"
+msgstr ""
+
+#: progs/base/prog_config.cpp:75
+msgid "Preserve data EEPROM when programming."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:143
+msgid "Primary"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:251
+msgid "Primary oscillator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:145 devices/pic/base/pic_config.cpp:256
+msgid "Primary oscillator mode"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:252
+msgid "Primary oscillator with PLL"
+msgstr ""
+
+#: progs/icd2/base/icd2_usb.cpp:77
+msgid "Problem connecting ICD2: please try again after unplug-replug."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:92
+msgid "Processor mode"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:34
+msgid "Program Executive"
+msgstr ""
+
+#: libgui/toplevel.cpp:144
+msgid "Program Log"
+msgstr ""
+
+#: progs/base/prog_config.cpp:76
+msgid "Program data EEPROM."
+msgstr ""
+
+#: libgui/global_config.cpp:21
+msgid "Program device after successful build."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:41
+msgid "Program device memory: \"program <hexfilename>\"."
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:56
+msgid "Programmer"
+msgstr ""
+
+#: progs/gui/prog_config_center.h:23 progs/gui/prog_config_center.h:24
+msgid "Programmer Options"
+msgstr ""
+
+#: progs/gui/prog_config_center.h:35 progs/gui/prog_config_center.h:36
+msgid "Programmer Selection"
+msgstr ""
+
+#. i18n: file ./data/app_data/piklabui.rc line 161
+#: rc.cpp:48
+#, no-c-format
+msgid "Programmer Toolbar"
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:15
+msgid "Programmer Vpp"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:54
+msgid "Programmer hardware configuration to use (for direct programmer)."
+msgstr ""
+
+#: progs/gui/prog_config_center.cpp:41
+msgid "Programmer in use:"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:270
+msgid "Programmer is already disconnected."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:274
+msgid "Programmer is already running."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:278
+msgid "Programmer is already stopped."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:134
+msgid "Programmer is in bootload mode."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:158
+msgid "Programmer not specified."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:57
+msgid "Programmer port (\"usb\" or device such as \"/dev/ttyS0\")"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:53
+msgid "Programmer to use."
+msgstr ""
+
+#: tools/list/device_info.cpp:59
+msgid "Programmers"
+msgstr ""
+
+#: tools/list/device_info.cpp:34
+msgid "Programming Specifications"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:710
+msgid "Programming calibration data needs a chip erase. Continue anyway?"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:738
+msgid "Programming calibration successful"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:735 devices/pic/prog/pic_prog.cpp:736
+msgid "Programming calibration..."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:272
+msgid "Programming device for debugging test..."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:277 progs/base/generic_prog.cpp:341
+msgid "Programming device memory..."
+msgstr ""
+
+#: libgui/toplevel.cpp:849
+msgid "Programming in progress. Cannot be aborted."
+msgstr ""
+
+#: progs/icd2/base/icd2_debug.cpp:279
+msgid "Programming successful"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:343
+msgid "Programming successful."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:33
+msgid "Programming..."
+msgstr ""
+
+#: libgui/project_manager.cpp:190
+msgid "Project"
+msgstr ""
+
+#: libgui/project_wizard.cpp:187
+msgid "Project \"%1\"already exists. Overwrite it?"
+msgstr ""
+
+#: common/common/purl_base.cpp:51
+msgid "Project File"
+msgstr ""
+
+#: common/common/purl_base.cpp:127
+msgid "Project Files"
+msgstr ""
+
+#: libgui/toplevel.cpp:121
+msgid "Project Manager"
+msgstr ""
+
+#: libgui/project_editor.cpp:21
+msgid "Project Options"
+msgstr ""
+
+#: libgui/toplevel.cpp:234
+msgid "Project Options..."
+msgstr ""
+
+#. i18n: file ./data/app_data/piklabui.rc line 145
+#: rc.cpp:42
+#, no-c-format
+msgid "Project Toolbar"
+msgstr ""
+
+#: libgui/project_manager.cpp:526
+msgid "Project already loaded. Reload?"
+msgstr ""
+
+#: libgui/project.cpp:24
+msgid "Project file %1 does not exist."
+msgstr ""
+
+#: libgui/project_wizard.cpp:171
+msgid "Project name is empty."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:64
+msgid "Propic2 Vpp-1"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:66
+msgid "Propic2 Vpp-2"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:68
+msgid "Propic2 Vpp-3"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:93
+msgid "Protected Mask:"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:635
+msgid ""
+"Protecting code memory or data EEPROM on OTP devices is disabled as a "
+"security..."
+msgstr ""
+
+#: devices/base/generic_device.cpp:57
+msgid "QFN"
+msgstr ""
+
+#: devices/base/generic_device.cpp:58
+msgid "QFN-S"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:38
+msgid "Quit."
+msgstr ""
+
+#: libgui/toplevel.cpp:298
+msgid "R&eset"
+msgstr ""
+
+#: libgui/toplevel.cpp:276
+msgid "R&estart"
+msgstr ""
+
+#: libgui/text_editor.cpp:171
+msgid "R/O"
+msgstr ""
+
+#: devices/base/generic_device.cpp:28
+msgid "ROM"
+msgstr ""
+
+#: devices/base/generic_device.cpp:29
+msgid "ROM-less"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:78
+msgid "Raw Blank Value:"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:68
+msgid "Raw Value:"
+msgstr ""
+
+#: devices/gui/memory_editor.cpp:278
+msgid "Re&load"
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:317
+msgid "Reached breakpoint."
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:83 progs/gui/prog_group_ui.cpp:34
+#: progs/gui/prog_group_ui.cpp:45 libgui/toplevel.cpp:953
+msgid "Read"
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:262
+msgid "Read All"
+msgstr ""
+
+#: libgui/hex_editor.cpp:39
+msgid "Read Only Mode"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:45
+msgid "Read device memory: \"read <hexfilename>\"."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:275
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:78
+msgid "Read id does not match the specified device name \"%1\"."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:273
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:76
+msgid "Read id: %1"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:45
+msgid "Read or set a register or variable: \"x PORTB\" or \"x W 0x1A\"."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:343
+msgid "Read string is different than expected: %1 (%2)."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:291 piklab-prog/cmdline.cpp:296
+#: piklab-prog/cmdline.cpp:301
+msgid "Reading device memory not supported for specified programmer."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:319
+msgid "Reading device memory..."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:322
+msgid "Reading done."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:32
+msgid "Reading..."
+msgstr ""
+
+#: progs/base/generic_debug.cpp:48
+msgid "Ready to start debugging."
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:212
+msgid "Received length too short."
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:216
+msgid "Received string too short."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:107
+msgid "Received unexpected character ('%1' received; 'K' expected)."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:104
+msgid "Received unexpected character ('%1' received; 'K' or 'N' expected)."
+msgstr ""
+
+#: libgui/toplevel.cpp:905
+msgid "Recompile First"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:36
+msgid "Regenerating..."
+msgstr ""
+
+#: coff/base/coff_object.cpp:145
+msgid "Register Parameter"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:58
+msgid "Register Space"
+msgstr ""
+
+#: coff/base/coff_object.cpp:132
+msgid "Register Variable"
+msgstr ""
+
+#: libgui/editor_manager.cpp:489 libgui/watch_view.cpp:48
+#: libgui/project_manager_ui.cpp:127
+msgid "Registers"
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:273
+msgid "Registers information not available."
+msgstr ""
+
+#: coff/base/coff_object.cpp:248
+msgid "Relocation address beyong section size: %1/%2"
+msgstr ""
+
+#: coff/base/coff_object.cpp:251
+msgid "Relocation has unknown symbol: %1"
+msgstr ""
+
+#: coff/base/coff_object.cpp:255
+msgid "Relocation is an auxiliary symbol: %1"
+msgstr ""
+
+#: common/gui/editlistbox.cpp:131
+msgid "Remove All"
+msgstr ""
+
+#: libgui/project_manager.cpp:208
+msgid "Remove From Project"
+msgstr ""
+
+#: libgui/breakpoint_view.cpp:24
+msgid "Remove breakpoint"
+msgstr ""
+
+#: tools/list/compile_process.cpp:28
+msgid "Replaced by \"xxx\" when \"wine\" is used."
+msgstr ""
+
+#: tools/list/compile_process.cpp:29
+msgid "Replaced by \"xxx\" when the device name is specified."
+msgstr ""
+
+#: tools/list/compile_process.cpp:27
+msgid "Replaced by \"xxx\" when there is a custom linker script."
+msgstr ""
+
+#: tools/list/compile_process.cpp:45
+msgid "Replaced by a separation into two arguments."
+msgstr ""
+
+#: tools/list/compile_process.cpp:34
+msgid "Replaced by the COFF filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:39
+msgid "Replaced by the device family name (when needed)."
+msgstr ""
+
+#: tools/list/compile_process.cpp:38
+msgid "Replaced by the device name."
+msgstr ""
+
+#: tools/list/compile_process.cpp:43
+msgid "Replaced by the linker script basename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:44
+msgid "Replaced by the linker script filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:42
+msgid "Replaced by the linker script path."
+msgstr ""
+
+#: tools/list/compile_process.cpp:37
+msgid "Replaced by the list filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:31
+msgid "Replaced by the list of additionnal libraries."
+msgstr ""
+
+#: tools/list/compile_process.cpp:30
+msgid "Replaced by the list of additionnal objects."
+msgstr ""
+
+#: tools/list/compile_process.cpp:35
+msgid "Replaced by the map filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:41
+msgid "Replaced by the object file name."
+msgstr ""
+
+#: tools/list/compile_process.cpp:32
+msgid "Replaced by the output filename."
+msgstr ""
+
+#: tools/list/compile_process.cpp:33
+msgid "Replaced by the project name."
+msgstr ""
+
+#: tools/list/compile_process.cpp:40
+msgid "Replaced by the relative input filepath(s)."
+msgstr ""
+
+#: tools/list/compile_process.cpp:26
+msgid "Replaced by the source directory."
+msgstr ""
+
+#: tools/list/compile_process.cpp:36
+msgid "Replaced by the symbol filename."
+msgstr ""
+
+#: libgui/toplevel.cpp:325
+msgid "Report Bug..."
+msgstr ""
+
+#: libgui/likeback.cpp:182
+msgid "Report a bug."
+msgstr ""
+
+#: libgui/device_gui.cpp:99
+msgid "Reset Filters"
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:23
+msgid "Reset Held"
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:23
+msgid "Reset Released"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:194
+msgid "Reset into clip on emulation mode"
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:193
+msgid "Reset.<Translators: please translate the past form of the verb>"
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:196
+msgid "Restarting..."
+msgstr ""
+
+#: progs/icd1/gui/icd1_group_ui.cpp:20
+msgid "Result:"
+msgstr ""
+
+#: piklab-hex/main.cpp:29
+msgid "Return checksum."
+msgstr ""
+
+#: piklab-coff/main.cpp:25
+msgid "Return general informations."
+msgstr ""
+
+#: piklab-hex/main.cpp:26
+msgid "Return information about hex file."
+msgstr ""
+
+#: piklab-coff/main.cpp:29
+msgid "Return informations about code lines (for object)."
+msgstr ""
+
+#: piklab-coff/main.cpp:30
+msgid "Return informations about files."
+msgstr ""
+
+#: piklab-coff/main.cpp:28
+msgid "Return informations about sections (for object)."
+msgstr ""
+
+#: piklab-coff/main.cpp:27
+msgid "Return informations about symbols."
+msgstr ""
+
+#: piklab-coff/main.cpp:26
+msgid "Return informations about variables (for object)."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:57
+msgid "Return the list of detected ports."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:58
+msgid "Return the list of memory ranges."
+msgstr ""
+
+#: common/cli/cli_main.cpp:52
+msgid "Return the list of recognized commands."
+msgstr ""
+
+#: piklab-hex/main.cpp:38 piklab-prog/cli_interactive.cpp:55
+#: piklab-coff/main.cpp:38
+msgid "Return the list of supported devices."
+msgstr ""
+
+#: piklab-hex/main.cpp:39
+msgid "Return the list of supported fill options."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:56
+msgid "Return the list of supported hex file formats."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:54
+msgid "Return the list of supported programmer hardware configurations."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:53
+msgid "Return the list of supported programmers."
+msgstr ""
+
+#: coff/base/coff_object.cpp:331
+msgid "Rom Data"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:37
+msgid "Run device (release reset)."
+msgstr ""
+
+#: progs/base/prog_config.cpp:77
+msgid "Run device after successful programming."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:224
+msgid "Run..."
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:19
+msgid "Running"
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:240 progs/base/generic_prog.cpp:221
+msgid "Running..."
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:38
+msgid "SBIT"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:57
+msgid "SBIT Space"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:78
+msgid "SBODEN controls BOD function"
+msgstr ""
+
+#: progs/sdcdb/base/sdcdb_debug.h:76
+msgid "SDCDB"
+msgstr ""
+
+#: devices/base/generic_device.cpp:47
+msgid "SDIP"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:56
+msgid "SFR Space"
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:41
+msgid "SFRs"
+msgstr ""
+
+#: devices/base/generic_device.cpp:53
+msgid "SOIC"
+msgstr ""
+
+#: devices/base/generic_device.cpp:49
+msgid "SOT-23"
+msgstr ""
+
+#: devices/base/generic_device.cpp:48
+msgid "SPDIP"
+msgstr ""
+
+#: devices/base/generic_device.cpp:51
+msgid "SSOP"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:73
+msgid "SSP"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:122
+msgid "SSP I/O mux (SCK/SLC, SDA/SDI, SD0)"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:62
+msgid "Same as \"device\"."
+msgstr ""
+
+#: libgui/toplevel.cpp:190
+msgid "Save All"
+msgstr ""
+
+#: libgui/editor.cpp:53
+msgid "Save File"
+msgstr ""
+
+#: libgui/log_view.cpp:132
+msgid "Save log to file"
+msgstr ""
+
+#: piklab-hex/main.cpp:94
+msgid "Second hex file: "
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:253
+msgid "Secondary oscillator (LP)"
+msgstr ""
+
+#: coff/base/coff_object.cpp:55 coff/base/coff_object.cpp:155
+msgid "Section"
+msgstr ""
+
+#: piklab-coff/main.cpp:164
+msgid "Sections:"
+msgstr ""
+
+#: devices/pic/base/pic_protection.cpp:357
+msgid "Secure Segment"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:240
+msgid "Secure segment EEPROM size"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:241
+msgid "Secure segment RAM size"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:237
+msgid "Secure segment security"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:236
+msgid "Secure segment size"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:235
+msgid "Secure segment write-protection"
+msgstr ""
+
+#: libgui/project_manager.cpp:222
+msgid "Select Device..."
+msgstr ""
+
+#: common/gui/purl_gui.cpp:118
+msgid "Select Directory"
+msgstr ""
+
+#: common/gui/purl_gui.cpp:147
+msgid "Select File"
+msgstr ""
+
+#: libgui/project_wizard.cpp:89
+msgid "Select Files"
+msgstr ""
+
+#: libgui/project_manager.cpp:170
+msgid "Select Linker Script"
+msgstr ""
+
+#: libgui/project_manager.cpp:298
+msgid "Select Object File"
+msgstr ""
+
+#: libgui/project_manager.cpp:335
+msgid "Select Project file"
+msgstr ""
+
+#: libgui/project_manager.cpp:289
+msgid "Select Source File"
+msgstr ""
+
+#: libgui/device_gui.cpp:87
+msgid "Select a device"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:83
+msgid "Self-Write"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:85
+msgid "Self-test"
+msgstr ""
+
+#: progs/icd2/base/icd2_prog.cpp:56
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:105
+msgid "Self-test failed (%1). Do you want to continue anyway?"
+msgstr ""
+
+#: progs/icd1/base/icd1.cpp:109
+msgid "Self-test failed (returned value is %1)"
+msgstr ""
+
+#: progs/icd1/base/icd1_prog.cpp:29
+msgid "Self-test failed. Do you want to continue anyway?"
+msgstr ""
+
+#: progs/icd2/base/icd2_prog.cpp:55
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:104
+msgid "Self-test failed: %1"
+msgstr ""
+
+#: libgui/likeback.cpp:582
+msgid "Send"
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:78
+#: progs/direct/gui/direct_config_widget.cpp:98
+msgid "Send 0xA55A"
+msgstr ""
+
+#: libgui/likeback.cpp:609
+msgid "Send a Comment"
+msgstr ""
+
+#: libgui/likeback.cpp:181
+msgid "Send a comment about what you don't like."
+msgstr ""
+
+#: libgui/likeback.cpp:180
+msgid "Send a comment about what you like."
+msgstr ""
+
+#: progs/gui/port_selector.cpp:21
+msgid "Serial"
+msgstr ""
+
+#: devices/mem24/mem24/mem24_group.h:25
+msgid "Serial Memory 24"
+msgstr ""
+
+#: common/port/port.cpp:61
+msgid "Serial Port"
+msgstr ""
+
+#: libgui/project_manager.cpp:166
+msgid "Set Custom..."
+msgstr ""
+
+#: libgui/project_manager.cpp:167
+msgid "Set Default"
+msgstr ""
+
+#: libgui/likeback.cpp:393
+msgid "Set Email Address"
+msgstr ""
+
+#: libgui/global_config.cpp:22
+msgid "Set User Ids to unprotected checksum (if User Ids are empty)."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:46
+msgid "Set a breakpoint \"break e 0x04\" or list all breakpoints \"break\"."
+msgstr ""
+
+#: libgui/breakpoint_view.cpp:24
+msgid "Set breakpoint"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:59
+msgid "Set if target device is self-powered."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:39
+msgid ""
+"Set property value: \"set <property> <value>\" or \"<property> <value>\"."
+msgstr ""
+
+#: devices/pic/gui/pic_memory_editor.cpp:319
+#: devices/pic/gui/pic_memory_editor.cpp:331
+msgid "Set to unprotected checksum"
+msgstr ""
+
+#: progs/base/generic_debug.cpp:43
+msgid "Setting up debugging session."
+msgstr ""
+
+#: libgui/toplevel.cpp:280 libgui/toplevel.cpp:304
+msgid "Settings..."
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:34 coff/base/coff_object.cpp:161
+msgid "Short"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:850
+msgid "Show %1 specific options"
+msgstr ""
+
+#: libgui/toplevel.cpp:300
+msgid "Show Program Counter"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:857
+msgid "Show all options"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:858
+msgid "Show author information"
+msgstr ""
+
+#: libgui/global_config.cpp:23
+msgid "Show close buttons on tabs (need restart to take effect)."
+msgstr ""
+
+#: libgui/toplevel.cpp:214
+msgid "Show disassembly location"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:842
+msgid "Show help about options"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:860
+msgid "Show license information"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:859
+msgid "Show version information"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:43
+msgid "Signed"
+msgstr ""
+
+#: tools/sdcc/sdcc.h:35
+msgid "Small Device C Compiler"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:189
+msgid "Software"
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:28
+msgid ""
+"Some programming cards need low clock rate:\n"
+"adding delay to clock pulses might help."
+msgstr ""
+
+#: tools/base/generic_tool.cpp:34
+msgid "Source Directory"
+msgstr ""
+
+#: piklab-coff/main.cpp:175
+msgid "Source Lines:"
+msgstr ""
+
+#: libgui/project_manager.cpp:217 libgui/project_manager_ui.cpp:34
+msgid "Sources"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:248
+msgid "Special Function Registers:"
+msgstr ""
+
+#: progs/gui/prog_config_center.cpp:65
+msgid "Specific"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:101
+msgid "Stack full/underflow reset"
+msgstr ""
+
+#: libgui/project_manager.cpp:185 libgui/config_center.h:53
+#: libgui/project_manager_ui.cpp:63
+msgid "Standalone File"
+msgstr ""
+
+#: libgui/config_center.h:54
+msgid "Standalone File Compilation"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:232 devices/pic/base/pic_config.cpp:239
+msgid "Standard Security"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:115
+msgid "Standard operation"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:246
+msgid "Standard security"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:43
+msgid "Start or restart debugging session."
+msgstr ""
+
+#: piklab-hex/main.cpp:140
+msgid "Start:"
+msgstr ""
+
+#: piklab-prog/cli_prog_manager.cpp:61
+msgid "Starting debug session without COFF file (no source file information)."
+msgstr ""
+
+#: piklab-prog/cli_prog_manager.cpp:62
+msgid ""
+"Starting debugging session with device memory in an unknown state. You may "
+"want to reprogram the device."
+msgstr ""
+
+#: coff/base/coff_object.cpp:131
+msgid "Static Symbol"
+msgstr ""
+
+#: devices/base/device_group.cpp:228 libgui/breakpoint_view.cpp:47
+msgid "Status"
+msgstr ""
+
+#: progs/gpsim/gui/gpsim_group_ui.cpp:21
+msgid "Status:"
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:302
+msgid "Step"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:44
+msgid "Step one instruction."
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:224
+msgid "Stop Watching"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:39
+msgid "Stop device (hold reset)."
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:19
+msgid "Stopped"
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:155 progs/manager/prog_manager.cpp:175
+msgid "Stopped."
+msgstr ""
+
+#: common/common/number.cpp:23
+msgid "String"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:19 coff/base/cdb_parser.cpp:37
+#: coff/base/coff_object.cpp:166
+msgid "Structure"
+msgstr ""
+
+#: coff/base/coff_object.cpp:138
+msgid "Structure Tag"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:85
+msgid "Subroutine to initialize W registers to 0x0000"
+msgstr ""
+
+#: common/global/about.cpp:88
+msgid "Support for direct programmers with bidirectionnal buffers."
+msgstr ""
+
+#: devices/base/device_group.cpp:36
+msgid "Supported"
+msgstr ""
+
+#: common/cli/cli_main.cpp:93
+msgid "Supported commands:"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:115
+msgid "Supported devices for \"%1\":"
+msgstr ""
+
+#: piklab-hex/main.cpp:264 piklab-prog/cmdline.cpp:112
+#: piklab-coff/main.cpp:265
+msgid "Supported devices:"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:92
+msgid "Supported hardware configuration for programmers:"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:75
+msgid "Supported hex file formats:"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:83
+msgid "Supported programmers:"
+msgstr ""
+
+#: libgui/toplevel.cpp:208
+msgid "Switch Header/Implementation"
+msgstr ""
+
+#: libgui/editor_manager.cpp:37
+msgid "Switch to editor"
+msgstr ""
+
+#: libgui/toplevel.cpp:206
+msgid "Switch to..."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:137
+msgid "Switching off, monitor off"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:138
+msgid "Switching on, monitor off"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:139
+msgid "Switching on, monitor on"
+msgstr ""
+
+#: coff/base/coff_object.cpp:215
+msgid "Symbol without needed auxilliary symbol (type=%1)"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:124 piklab-coff/main.cpp:154
+msgid "Symbols:"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:191
+msgid "T0CKI interrupt service routine"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:117
+msgid "T1OSO/T1CKI on RA6"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:118
+msgid "T1OSO/T1CKI on RB2"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:185
+msgid "TIMER0 interrupt service routine"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:119
+msgid "TMR0/T5CKI external clock mux"
+msgstr ""
+
+#: devices/base/generic_device.cpp:54
+msgid "TQFP"
+msgstr ""
+
+#: devices/base/generic_device.cpp:52
+msgid "TSSOP"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:30
+msgid "Table read-protection"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:28
+msgid "Tait 7405/7406"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:26
+msgid "Tait classic"
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:15 progs/icd2/base/icd2.cpp:51
+msgid "Target Vdd"
+msgstr ""
+
+#: devices/pic/prog/pic_prog_specific.cpp:15
+msgid "Target Vpp"
+msgstr ""
+
+#: piklab-hex/main.cpp:38 piklab-prog/cli_interactive.cpp:55
+#: piklab-coff/main.cpp:38
+msgid "Target device."
+msgstr ""
+
+#: progs/base/prog_config.cpp:73
+msgid "Target is self-powered (when possible)."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:261
+msgid "Temperature protection"
+msgstr ""
+
+#: devices/base/device_group.cpp:291
+msgid "Temperature range: "
+msgstr ""
+
+#: libgui/config_gen.cpp:179
+msgid "Template Generator"
+msgstr ""
+
+#: coff/base/disassembler.cpp:278
+msgid "Template source file generated by piklab"
+msgstr ""
+
+#: libgui/project_wizard.cpp:234
+msgid ""
+"Template source file generation not implemented yet for this toolchain..."
+msgstr ""
+
+#: libgui/project_wizard.cpp:240
+msgid "Template source file generation only partially implemented."
+msgstr ""
+
+#: common/global/about.cpp:91
+msgid "Test of PICkit2 and ICD2 programmer."
+msgstr ""
+
+#: common/common/group.cpp:15
+msgid "Tested"
+msgstr ""
+
+#: tools/pic30/pic30.cpp:63
+msgid ""
+"The <a href=\"%1\">PIC30 ToolChain</a> is a toolsuite for 16-bit PICs "
+"available from Microchip. Most of it is available under the GNU Public "
+"License."
+msgstr ""
+
+#: tools/sdcc/sdcc.cpp:28
+msgid ""
+"The <a href=\"%1\">Small Devices C Compiler</a> is an open-source C compiler "
+"for several families of microcontrollers."
+msgstr ""
+
+#: tools/boost/boost.cpp:68
+msgid ""
+"The Boost toolchain needs to be run by Wine with \"Windows NT 4.0\" "
+"compatibility. This can be configured with the Wine configuration utility."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:31
+msgid ""
+"The CLOCK pin is used to synchronize serial data of the DATA IN and DATA OUT "
+"pins."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:37
+msgid "The DATA IN pin is used to receive data from the programmed device."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:34
+msgid "The DATA OUT pin is used to send data to the programmed device."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:40
+msgid ""
+"The DATA RW pin selects the direction of data buffer.\n"
+"Must be set to GND if your programmer does not use bi-directionnal buffer."
+msgstr ""
+
+#: libgui/toplevel.cpp:731
+msgid "The Pikloops utility (%1) is not installed in your system."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:28
+msgid ""
+"The VDD pin is used to apply 5V to the programmed device.\n"
+"Must be set to GND if your programmer doesn't control the VDD line."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:25
+msgid "The VPP pin is used to select the high voltage programming mode."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:675
+msgid "The calibration word %1 is not valid."
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:65
+msgid "The current programmer \"%1\" does not support device \"%2\"."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:662
+msgid ""
+"The device cannot be erased first by the selected programmer so programming "
+"may fail..."
+msgstr ""
+
+#: libgui/gui_prog_manager.cpp:38
+msgid ""
+"The device memory is in an unknown state. You may want to reprogram the "
+"device. Continue anyway?"
+msgstr ""
+
+#: libgui/likeback.cpp:396
+msgid ""
+"The email address is optional. If you do not provide any, your comments will "
+"be sent anonymously. Just click OK in that case."
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:1313
+msgid "The files/URLs opened by the application will be deleted after use"
+msgstr ""
+
+#: progs/base/generic_prog.cpp:142
+msgid ""
+"The firmware version (%1) is higher than the version tested with piklab (%2%"
+"3).\n"
+"You may experience problems."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:158
+msgid ""
+"The firmware version (%1) is lower than the recommended version (%2%3).\n"
+"It is recommended to upgrade the firmware."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:150
+msgid ""
+"The firmware version (%1) is lower than the version tested with piklab (%2%"
+"3).\n"
+"You may experience problems."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:167
+msgid "The first argument should be \"e\"."
+msgstr ""
+
+#: piklab-hex/main.cpp:170
+msgid "The first hex file is a subset of the second one."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:299
+msgid "The given value is too large (max: %1)."
+msgstr ""
+
+#: progs/gui/hardware_config_widget.cpp:71
+msgid "The hardware name is already used for a standard hardware."
+msgstr ""
+
+#: progs/manager/debug_manager.cpp:113
+msgid ""
+"The number of active breakpoints is higher than the maximum for the current "
+"debugger (%1): disabling the last breakpoint."
+msgstr ""
+
+#: libgui/toplevel.cpp:904
+msgid ""
+"The project hex file may not be up-to-date since some project files have "
+"been modified."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:650
+msgid ""
+"The range cannot be erased first by the selected programmer so programming "
+"may fail..."
+msgstr ""
+
+#: piklab-hex/main.cpp:171
+msgid "The second hex file is a subset of the first one."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:335
+msgid "The selected device \"%1\" is not supported by the selected programmer."
+msgstr ""
+
+#: libgui/register_view.cpp:45
+msgid "The selected device has no register."
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:101
+msgid "The selected device is not supported by this programmer."
+msgstr ""
+
+#: libgui/gui_prog_manager.cpp:29
+msgid ""
+"The selected operation will stop the debugging session. Continue anyway?"
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:500
+msgid "The selected programmer cannot read %1: operation skipped."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:298
+msgid "The selected programmer cannot read device memory."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:486 devices/pic/prog/pic_prog.cpp:557
+msgid "The selected programmer cannot read the specified memory range."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:442
+msgid ""
+"The selected programmer does not support erasing neither the specified range "
+"nor the whole device."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:394
+msgid "The selected programmer does not support erasing the whole device."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:341
+msgid ""
+"The selected programmer does not supported the specified hardware "
+"configuration (\"%1\")."
+msgstr ""
+
+#: tools/list/compile_manager.cpp:135
+msgid ""
+"The selected toolchain (%1) cannot assemble file. It only supports files "
+"with extensions: %2"
+msgstr ""
+
+#: tools/list/compile_manager.cpp:110
+msgid ""
+"The selected toolchain (%1) cannot compile file. It only supports files with "
+"extensions: %2"
+msgstr ""
+
+#: tools/base/tool_group.cpp:130
+msgid ""
+"The selected toolchain (%1) does not support device %2. Continue anyway?"
+msgstr ""
+
+#: libgui/project_wizard.cpp:206
+msgid ""
+"The selected toolchain can only compile a single source file and you have "
+"selected %1 source files. Continue anyway? "
+msgstr ""
+
+#: tools/list/compile_manager.cpp:72
+msgid "The selected toolchain only supports single-file project."
+msgstr ""
+
+#: libgui/device_editor.cpp:64
+msgid ""
+"The target device is not configured and cannot be guessed from source file. "
+"The source file either cannot be found or does not contain any processor "
+"directive."
+msgstr ""
+
+#: libgui/gui_debug_manager.cpp:88
+msgid ""
+"The toolchain in use does not generate all necessary debugging information "
+"with the selected device. This may reduce debugging capabilities."
+msgstr ""
+
+#: piklab-hex/main.cpp:172
+msgid "The two hex files are different at address %1."
+msgstr ""
+
+#: piklab-hex/main.cpp:169
+msgid "The two hex files have the same content."
+msgstr ""
+
+#: tools/base/tool_group.cpp:128
+msgid ""
+"There were errors detecting supported devices for the selected toolchain (%"
+"1). Please check the toolchain configuration. Continue anyway?"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:204
+msgid "This command needs a commands filename."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:216
+msgid "This command needs an hex filename."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:218
+msgid "This command takes no argument."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:128
+msgid "This command takes no or one argument"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:185
+msgid "This command takes no or two argument."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:139 piklab-prog/cli_interactive.cpp:143
+#: piklab-prog/cli_interactive.cpp:189
+msgid "This command takes one argument."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:150
+msgid "This command takes one or two argument."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:135
+msgid "This command takes two arguments."
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:100
+msgid "This device has no calibration information."
+msgstr ""
+
+#: libgui/likeback.cpp:174
+msgid "This is a quick feedback system for %1."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:645
+msgid "This memory range is programming protected."
+msgstr ""
+
+#: progs/direct/base/direct.cpp:38
+msgid ""
+"This pin is driven by the programmed device.\n"
+"Without device, it must follow the \"Data out\" pin (when powered on)."
+msgstr ""
+
+#: common/nokde/nokde_kaboutdata.cpp:437
+msgid "This program is distributed under the terms of the %1."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:77
+msgid ""
+"This programmer pulses MCLR from 5V to 0V and then 12V to enter programming "
+"mode. It uses a multiplexer to switch between 5V and 12V (Vdd is here the "
+"multiplexer pin).<p>Webpage: <a href=\"http://www.epemag.wimborne.co.uk/1001."
+"htm\">http://www.epemag.wimborne.co.uk/1001.htm</a>"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:272
+msgid "This tool cannot be automatically detected."
+msgstr ""
+
+#: libgui/config_gen.cpp:119
+msgid "This toolchain does not need explicit config bits."
+msgstr ""
+
+#: progs/pickit2/base/pickit_prog.cpp:49
+msgid "This will overwrite the device code memory. Continue anyway?"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:161
+#: tools/gui/toolchain_config_widget.cpp:178
+msgid "Timeout"
+msgstr ""
+
+#: progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp:30
+msgid "Timeout (ms):"
+msgstr ""
+
+#: common/port/serial.cpp:280
+msgid "Timeout receiving data (%1/%2 bytes received)."
+msgstr ""
+
+#: common/port/serial.cpp:306
+msgid "Timeout sending data (%1 bytes left)."
+msgstr ""
+
+#: common/port/serial.cpp:235
+msgid "Timeout sending data (%1/%2 bytes sent)."
+msgstr ""
+
+#: progs/icd1/base/icd1_serial.cpp:51
+msgid "Timeout synchronizing."
+msgstr ""
+
+#: progs/gpsim/base/gpsim.cpp:72
+msgid "Timeout waiting for \"gpsim\"."
+msgstr ""
+
+#: common/port/serial.cpp:265
+msgid "Timeout waiting for data."
+msgstr ""
+
+#: progs/direct/base/direct_mem24.cpp:125
+msgid "Timeout writing at address %1"
+msgstr ""
+
+#: common/port/usb_port.cpp:394
+msgid "Timeout: only some data received (%1/%2 bytes)."
+msgstr ""
+
+#: common/port/usb_port.cpp:360
+msgid "Timeout: only some data sent (%1/%2 bytes)."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:144
+msgid "Timer1"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:95
+msgid "Timer1 interrupt service routine"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:114
+msgid "Timer1 oscillator mode"
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader_prog.h:31
+msgid "Tiny Bootloader"
+msgstr ""
+
+#: libgui/likeback.cpp:175
+msgid "To help us improve it, your comments are important."
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:140
+msgid "Toggle Device Power..."
+msgstr ""
+
+#: piklab-hex/main.cpp:72 piklab-coff/main.cpp:61
+msgid "Too few arguments."
+msgstr ""
+
+#: piklab-hex/main.cpp:73 piklab-prog/cli_interactive.cpp:214
+#: piklab-prog/cli_interactive.cpp:217 piklab-prog/cmdline.cpp:215
+#: piklab-coff/main.cpp:62
+msgid "Too many arguments."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:145
+msgid "Too many failures: bailing out."
+msgstr ""
+
+#: libgui/project_editor.cpp:56
+msgid "Toochain"
+msgstr ""
+
+#: libgui/config_gen.cpp:48
+msgid "Tool Type:"
+msgstr ""
+
+#: libgui/toplevel.cpp:216
+msgid "Tool Views"
+msgstr ""
+
+#: tools/list/tools_config_widget.cpp:45 libgui/config_gen.cpp:39
+#: libgui/project_wizard.cpp:134
+msgid "Toolchain:"
+msgstr ""
+
+#: tools/list/device_info.cpp:51
+msgid "Tools"
+msgstr ""
+
+#: libgui/likeback.cpp:657
+msgid "Transfer Error"
+msgstr ""
+
+#: progs/pickit2_bootloader/base/pickit2_bootloader.cpp:23
+msgid "Trying to enter bootloader mode..."
+msgstr ""
+
+#: coff/base/coff_object.cpp:141
+msgid "Type Definition"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:76
+msgid "USART"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:75 progs/gui/port_selector.cpp:21
+msgid "USB"
+msgstr ""
+
+#: common/port/port.cpp:63
+msgid "USB Port"
+msgstr ""
+
+#: progs/picdem_bootloader/gui/picdem_bootloader_ui.cpp:25
+msgid "USB Product Id:"
+msgstr ""
+
+#: progs/picdem_bootloader/gui/picdem_bootloader_ui.cpp:19
+msgid "USB Vendor Id:"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:197
+msgid "USB clock (PLL divided by)"
+msgstr ""
+
+#: common/port/usb_port.cpp:266
+msgid "USB support disabled"
+msgstr ""
+
+#: common/global/about.cpp:90
+msgid "USB support for ICD2 programmer."
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:127
+msgid "USB voltage regulator"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:85
+msgid "Undefined"
+msgstr ""
+
+#: coff/base/coff_object.cpp:135
+msgid "Undefined Label"
+msgstr ""
+
+#: coff/base/coff_object.cpp:123
+msgid "Undefined Section"
+msgstr ""
+
+#: coff/base/coff_object.cpp:142
+msgid "Undefined Static"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:173
+msgid "Unexpected answer ($7F00) from ICD2 (%1)."
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:180
+msgid "Unexpected answer (08) from ICD2 (%1)."
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:674
+msgid "Unexpected argument '%1'."
+msgstr ""
+
+#: devices/base/hex_buffer.cpp:140
+msgid "Unexpected end-of-file."
+msgstr ""
+
+#: devices/base/hex_buffer.cpp:141
+msgid "Unexpected end-of-line (line %1)."
+msgstr ""
+
+#: coff/base/coff_object.cpp:329
+msgid "Uninitialized Data"
+msgstr ""
+
+#: coff/base/coff_object.cpp:167
+msgid "Union"
+msgstr ""
+
+#: coff/base/coff_object.cpp:140
+msgid "Union Tag"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:57
+msgid "Unitialized variables in X-space"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:61
+msgid "Unitialized variables in Y-space"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:65
+msgid "Unitialized variables in near data memory"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:25
+msgid "Unix"
+msgstr ""
+
+#: tools/gui/toolchain_config_widget.cpp:225
+#: devices/base/generic_device.cpp:21 coff/base/text_coff.cpp:256
+msgid "Unknown"
+msgstr ""
+
+#: common/common/purl_base.cpp:57
+msgid "Unknown File"
+msgstr ""
+
+#: common/cli/cli_main.cpp:29
+msgid "Unknown command: %1"
+msgstr ""
+
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:47
+msgid "Unknown device"
+msgstr ""
+
+#: piklab-hex/main.cpp:223 piklab-prog/cmdline.cpp:364
+#: piklab-coff/main.cpp:238
+msgid "Unknown device \"%1\"."
+msgstr ""
+
+#: devices/pic/prog/pic_prog.cpp:278
+msgid "Unknown device."
+msgstr ""
+
+#: coff/base/coff_archive.cpp:92
+msgid "Unknown file member offset: %1"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:379
+msgid "Unknown hex file format \"%1\"."
+msgstr ""
+
+#: progs/tbl_bootloader/base/tbl_bootloader.cpp:84
+msgid "Unknown id returned by bootloader (%1 read and %2 expected)."
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:521
+#: common/nokde/nokde_kcmdlineargs.cpp:537
+msgid "Unknown option '%1'."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:353
+msgid "Unknown programmer \"%1\"."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:397 piklab-prog/cmdline.cpp:445
+msgid "Unknown property \"%1\""
+msgstr ""
+
+#: piklab-hex/main.cpp:235 piklab-hex/main.cpp:248 piklab-coff/main.cpp:241
+#: piklab-coff/main.cpp:250
+msgid "Unknown property \"%1\"."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:307
+msgid "Unknown register or variable name."
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:221 progs/sdcdb/base/sdcdb_debug.cpp:220
+msgid "Unknown state for IO bit: %1 (%2)"
+msgstr ""
+
+#: piklab-hex/main.cpp:183
+msgid "Unprotected checksum: %1"
+msgstr ""
+
+#: devices/base/hex_buffer.cpp:139
+msgid "Unrecognized format (line %1)."
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:86
+msgid "Unrecognized record"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:40
+msgid "Unset property value: \"unset <property>\"."
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:44
+msgid "Unsigned"
+msgstr ""
+
+#: coff/base/coff_object.cpp:170
+msgid "Unsigned Char"
+msgstr ""
+
+#: coff/base/coff_object.cpp:172
+msgid "Unsigned Int"
+msgstr ""
+
+#: coff/base/coff_object.cpp:173
+msgid "Unsigned Long"
+msgstr ""
+
+#: coff/base/coff_object.cpp:171
+msgid "Unsigned Short"
+msgstr ""
+
+#: devices/base/device_group.cpp:36
+msgid "Unsupported"
+msgstr ""
+
+#: common/common/group.cpp:14
+msgid "Untested"
+msgstr ""
+
+#: tools/gui/toolchain_config_center.cpp:27
+msgid "Update"
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:51
+msgid "Upload firmware to programmer: \"upload_firmware <hexfilename>\"."
+msgstr ""
+
+#: progs/pickit2/base/pickit2_prog.cpp:65
+msgid "Uploading Firmware..."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:321
+msgid "Uploading firmware is not supported for the specified programmer."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:262
+msgid "Uploading firmware..."
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:67
+msgid "Uploading..."
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:30
+msgid "Upper-128-byte Pointer"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:838
+msgid "Usage: %1 %2\n"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:783
+msgid "Use --help to get a list of available command line options."
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:83
+msgid "Used Mask:"
+msgstr ""
+
+#: devices/pic/base/pic.cpp:27 coff/base/coff_object.cpp:328
+msgid "User IDs"
+msgstr ""
+
+#: piklab-prog/cli_prog_manager.cpp:22
+msgid "Using port from configuration file."
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:73
+msgid "Value:"
+msgstr ""
+
+#: devices/pic/gui/pic_group_ui.cpp:68
+msgid "Variables"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:58
+#: tools/gputils/gputils_generator.cpp:128
+#: tools/gputils/gputils_generator.cpp:208
+msgid "Variables declaration"
+msgstr ""
+
+#: piklab-coff/main.cpp:146
+msgid "Variables:"
+msgstr ""
+
+#: devices/base/device_group.cpp:295
+msgid "Vdd (V)"
+msgstr ""
+
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:102
+msgid "Vdd voltage level error; "
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:49
+msgid "Velleman K8048"
+msgstr ""
+
+#: progs/base/prog_config.cpp:70
+msgid "Verify device memory after programming."
+msgstr ""
+
+#: piklab-prog/cmdline.cpp:43
+msgid "Verify device memory: \"verify <hexfilename>\"."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:379
+msgid "Verifying successful."
+msgstr ""
+
+#: progs/base/generic_prog.cpp:34 progs/base/generic_prog.cpp:377
+msgid "Verifying..."
+msgstr ""
+
+#: progs/icd2/gui/icd2_group_ui.cpp:31 progs/gui/prog_group_ui.cpp:68
+#: libgui/project_editor.cpp:41
+msgid "Version:"
+msgstr ""
+
+#: libgui/project_manager_ui.cpp:34
+msgid "Views"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:35 coff/base/coff_object.cpp:159
+msgid "Void"
+msgstr ""
+
+#: libgui/device_gui.cpp:413
+msgid "Voltage-Frequency Graphs"
+msgstr ""
+
+#: progs/gui/prog_group_ui.cpp:79
+msgid "Voltages"
+msgstr ""
+
+#: progs/pickit2v2/base/pickit2v2_prog.cpp:101
+msgid "Vpp voltage level error; "
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:90
+msgid "WDT post-scaler"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:81
+msgid "Wake-up reset"
+msgstr ""
+
+#: tools/gputils/gputils_config.cpp:13 tools/c18/c18_config.cpp:12
+msgid "Warning and errors"
+msgstr ""
+
+#: tools/gputils/gui/gputils_ui.cpp:24 tools/c18/gui/c18_ui.cpp:23
+msgid "Warning level:"
+msgstr ""
+
+#: devices/pic/gui/pic_register_view.cpp:85
+#: devices/pic/gui/pic_register_view.cpp:224
+msgid "Watch"
+msgstr ""
+
+#: libgui/watch_view.cpp:110
+msgid "Watch Register"
+msgstr ""
+
+#: libgui/toplevel.cpp:127
+msgid "Watch View"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:188
+msgid "Watchdog"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:33
+msgid "Watchdog timer"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:267
+msgid "Watchdog timer postscaler"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:266
+msgid "Watchdog timer prescaler"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:186
+msgid "Watchdog timer prescaler A"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:187
+msgid "Watchdog timer prescaler B"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:106 devices/pic/base/pic_config.cpp:265
+msgid "Watchdog timer window"
+msgstr ""
+
+#: libgui/watch_view.cpp:87
+msgid "Watched"
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:52
+msgid ""
+"Webpage: <a href=\"htpp://k9spud.com/hoodmicro\">htpp://k9spud.com/"
+"hoodmicro</a>"
+msgstr ""
+
+#: libgui/likeback.cpp:95
+msgid "What's &This?"
+msgstr ""
+
+#: tools/base/generic_tool.cpp:26
+msgid "Windows"
+msgstr ""
+
+#: devices/pic/gui/pic_config_word_editor.cpp:88
+msgid "Write Mask:"
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:48
+msgid "Write and read raw commands to port from given file."
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:181 progs/sdcdb/base/sdcdb_debug.cpp:180
+msgid "Writing PC is not supported by gpsim"
+msgstr ""
+
+#: progs/gpsim/base/gpsim_debug.cpp:161 progs/sdcdb/base/sdcdb_debug.cpp:160
+msgid "Writing registers is not supported by this version of gpsim"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:33
+msgid "Wrong format for file size \"%1\"."
+msgstr ""
+
+#: progs/psp/base/psp.cpp:174
+msgid "Wrong programmer connected"
+msgstr ""
+
+#: progs/icd2/base/icd2.cpp:224
+msgid "Wrong return value (\"%1\"; was expecting \"%2\")"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:148 devices/pic/base/pic_config.cpp:163
+msgid "XT Crystal"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:151 devices/pic/base/pic_config.cpp:166
+msgid "XT Crystal with 16x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:149 devices/pic/base/pic_config.cpp:164
+msgid "XT Crystal with 4x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:150 devices/pic/base/pic_config.cpp:165
+msgid "XT Crystal with 8x PLL"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:259
+msgid "XT crystal oscillator"
+msgstr ""
+
+#: libgui/likeback.cpp:397
+msgid ""
+"You can change or remove your email address whenever you want. For that, use "
+"the little arrow icon at the top-right corner of a window."
+msgstr ""
+
+#: libgui/gui_debug_manager.cpp:104
+msgid "You cannot set breakpoints when a debugger is not selected."
+msgstr ""
+
+#: progs/direct/base/direct_prog_config.cpp:39
+msgid "You must disconnect 7407 pin 2"
+msgstr ""
+
+#: progs/icd2/gui/icd2_group_ui.cpp:53
+msgid "You need to initiate debugging to read the debug executive version."
+msgstr ""
+
+#: libgui/toplevel.cpp:534
+msgid "You need to specify a device to create a new hex file."
+msgstr ""
+
+#: progs/manager/prog_manager.cpp:59
+msgid "You need to specify the device for programming."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:209
+msgid "You need to specify the range."
+msgstr ""
+
+#: piklab-prog/cli_interactive.cpp:292
+msgid "You need to start the debugging session first (with \"start\")."
+msgstr ""
+
+#: progs/gui/port_selector.cpp:61
+msgid ""
+"Your computer might not have any parallel port or the /dev/parportX device "
+"has not been created.<br>Use \"mknod /dev/parport0 c 99 0\" to create "
+"it<br>and \"chmod a+rw /dev/parport0\" to make it RW enabled."
+msgstr ""
+
+#: progs/gui/port_selector.cpp:58
+msgid "Your computer might not have any serial port."
+msgstr ""
+
+#: libgui/likeback.cpp:398
+msgid "Your email address (keep empty to post comments anonymously):"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:818
+msgid "[%1-options]"
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:811
+msgid "[options] "
+msgstr ""
+
+#: _translatorinfo.cpp:3 _translatorinfo.cpp:3
+msgid ""
+"_: EMAIL OF TRANSLATORS\n"
+"Your emails"
+msgstr ""
+
+#: _translatorinfo.cpp:1 _translatorinfo.cpp:1
+msgid ""
+"_: NAME OF TRANSLATORS\n"
+"Your names"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:63
+msgid "allocating 2 bytes"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:59 tools/pic30/pic30_generator.cpp:67
+msgid "allocating 4 bytes"
+msgstr ""
+
+#: tools/gui/tool_config_widget.cpp:126 tools/gputils/gui/gputils_ui.cpp:30
+msgid "as in LIST directive"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:104
+msgid "at line #%1, column #%2"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:77
+msgid "call _wreg_init subroutine"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:99
+msgid "clear Timer1 interrupt flag status bit"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:48
+msgid "declare Timer1 ISR"
+msgstr ""
+
+#: devices/gui/register_view.cpp:71
+msgid "driven high"
+msgstr ""
+
+#: devices/gui/register_view.cpp:71
+msgid "driven low"
+msgstr ""
+
+#: devices/gui/register_view.cpp:67
+msgid "driving high"
+msgstr ""
+
+#: devices/gui/register_view.cpp:67
+msgid "driving low"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:138
+msgid "empty name"
+msgstr ""
+
+#: tools/list/compile_process.cpp:359
+msgid "error: "
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:97
+msgid "example of context saving (push W4 and W5)"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:76
+#: tools/gputils/gputils_generator.cpp:135
+#: tools/gputils/gputils_generator.cpp:214
+msgid "example variable"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:146
+msgid "for restoringing context"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:139
+msgid "for saving context"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:225
+msgid "go to start of high priority interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:161
+msgid "go to start of int pin interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:95
+msgid "go to start of interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:91
+#: tools/gputils/gputils_generator.cpp:157
+#: tools/gputils/gputils_generator.cpp:221
+msgid "go to start of main code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:173
+msgid "go to start of peripheral interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:169
+msgid "go to start of t0cki interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:165
+msgid "go to start of timer0 interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:238
+msgid "high priority interrupt service routine"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:223
+msgid "high priority interrupt vector"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:90
+msgid "initialize PCLATH"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:73
+msgid "initialize stack pointer"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:74
+msgid "initialize stack pointer limit register"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:181
+msgid "insert INT pin interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:193
+msgid "insert T0CKI interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:187
+msgid "insert TIMER0 interrupt code"
+msgstr ""
+
+#: tools/boost/boost_generator.cpp:52 tools/boost/boost_generator.cpp:76
+#: tools/jal/jal_generator.cpp:31 tools/gputils/gputils_generator.cpp:52
+#: tools/sdcc/sdcc_generator.cpp:114 tools/pic30/pic30_generator.cpp:79
+msgid "insert code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:240
+msgid "insert high priority interrupt code"
+msgstr ""
+
+#: tools/boost/boost_generator.cpp:47 tools/gputils/gputils_generator.cpp:109
+#: tools/sdcc/sdcc_generator.cpp:102 tools/pic30/pic30_generator.cpp:98
+msgid "insert interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:232
+msgid "insert low priority interrupt code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:121
+#: tools/gputils/gputils_generator.cpp:176
+#: tools/gputils/gputils_generator.cpp:244
+msgid "insert main code"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:199
+msgid "insert peripheral interrupt code"
+msgstr ""
+
+#: tools/boost/boost_generator.cpp:45 tools/sdcc/sdcc_generator.cpp:101
+msgid "interrupt service routine"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:93
+msgid "interrupt vector"
+msgstr ""
+
+#: tools/jal/jal_generator.cpp:23
+msgid "jal standard library"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:47
+msgid "label for code start"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:89
+msgid "load upper byte of 'start' label"
+msgstr ""
+
+#: tools/boost/boost_generator.cpp:77 tools/jal/jal_generator.cpp:32
+#: tools/gputils/gputils_generator.cpp:53
+#: tools/gputils/gputils_generator.cpp:122
+#: tools/gputils/gputils_generator.cpp:177
+#: tools/gputils/gputils_generator.cpp:245 tools/pic30/pic30_generator.cpp:82
+msgid "loop forever"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:227
+msgid "low priority interrupt vector"
+msgstr ""
+
+#: tools/jal/jal_generator.cpp:30
+msgid "main code"
+msgstr ""
+
+#: tools/boost/boost_generator.cpp:50 tools/boost/boost_generator.cpp:74
+msgid "main program"
+msgstr ""
+
+#: tools/list/compile_process.cpp:360
+msgid "message: "
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:88
+#: tools/gputils/gputils_generator.cpp:155
+#: tools/gputils/gputils_generator.cpp:156
+#: tools/gputils/gputils_generator.cpp:219
+#: tools/gputils/gputils_generator.cpp:220
+msgid "needed for ICD2 debugging"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:307
+msgid "no register defined"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:76
+msgid "nop after SPLIM initialization"
+msgstr ""
+
+#: devices/pic/base/pic_config.cpp:198 devices/pic/base/pic_config.cpp:200
+#: devices/pic/base/pic_config.cpp:202
+msgid "not divided"
+msgstr ""
+
+#: devices/pic/gui/pic_memory_editor.cpp:114
+#: devices/pic/gui/pic_memory_editor.cpp:121
+msgid "not present"
+msgstr ""
+
+#: progs/direct/gui/direct_config_widget.cpp:53
+msgid "on"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:105
+msgid "only required if using more than first page"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:197
+msgid "peripheral interrupt service routine"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:49
+#: tools/gputils/gputils_generator.cpp:97
+msgid "relocatable code"
+msgstr ""
+
+#: common/nokde/nokde_kaboutdata.cpp:374
+msgid "replace this with information about your translation team"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:86
+#: tools/gputils/gputils_generator.cpp:153
+#: tools/gputils/gputils_generator.cpp:217
+msgid "reset vector"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:111
+#: tools/gputils/gputils_generator.cpp:114
+#: tools/gputils/gputils_generator.cpp:233
+msgid "restore context"
+msgstr ""
+
+#: tools/pic30/pic30_generator.cpp:100
+msgid "restore context from stack"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:100
+#: tools/gputils/gputils_generator.cpp:229
+msgid "save context"
+msgstr ""
+
+#: piklab-coff/main.cpp:183
+msgid "section \"%1\":"
+msgstr ""
+
+#: coff/base/coff_archive.cpp:118
+msgid "size: %1 bytes"
+msgstr ""
+
+#: piklab-coff/main.cpp:189
+msgid "symbol \"%1\""
+msgstr ""
+
+#: common/nokde/nokde_kcmdlineargs.cpp:644
+msgid "the 2nd argument is a list of name+address, one on each line"
+msgstr ""
+
+#: piklab-coff/main.cpp:167
+msgid "type=\"%1\" address=%2 size=%3 flags=%4"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:115 coff/base/cdb_parser.cpp:161
+msgid "unexpected end of line"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:294
+msgid "unknown AddressSpaceType"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:272
+msgid "unknown DCLType"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:238
+msgid "unknown ScopeType"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:282
+msgid "unknown Sign"
+msgstr ""
+
+#: devices/gui/register_view.cpp:66 devices/gui/register_view.cpp:70
+msgid "unknown state"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:68
+#: tools/gputils/gputils_generator.cpp:69
+#: tools/gputils/gputils_generator.cpp:72
+#: tools/gputils/gputils_generator.cpp:81
+msgid "variable used for context saving"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:130
+#: tools/gputils/gputils_generator.cpp:131
+#: tools/gputils/gputils_generator.cpp:132
+#: tools/gputils/gputils_generator.cpp:133
+#: tools/gputils/gputils_generator.cpp:210
+#: tools/gputils/gputils_generator.cpp:211
+#: tools/gputils/gputils_generator.cpp:212
+msgid "variable used for context saving (for low-priority interrupts only)"
+msgstr ""
+
+#: tools/gputils/gputils_generator.cpp:80
+msgid "variables used for context saving"
+msgstr ""
+
+#: tools/list/compile_process.cpp:358
+msgid "warning: "
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:128
+msgid "was expecting '%1'"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:200
+msgid "was expecting a bool ('%1')"
+msgstr ""
+
+#: coff/base/cdb_parser.cpp:177
+msgid "was expecting an uint"
+msgstr ""
diff --git a/qt_config.h b/qt_config.h
new file mode 100644
index 0000000..502750f
--- /dev/null
+++ b/qt_config.h
@@ -0,0 +1,8 @@
+#define VERSION "0.15.2"
+
+// adjust or comment the following lines to reflect your configuration
+#if defined(Q_OS_WIN)
+#  define LIBUSB_VERSION "0.1.12.1"
+#else
+#  define LIBUSB_VERSION "0.1.8"
+#endif
diff --git a/src/Makefile.am b/src/Makefile.am
new file mode 100644
index 0000000..a0c7233
--- /dev/null
+++ b/src/Makefile.am
@@ -0,0 +1,10 @@
+INCLUDES = $(all_includes)
+METASOURCES = AUTO
+SUBDIRS = common xml_to_data devices piklab-hex coff piklab-coff progs piklab-prog tools data libgui piklab piklab-test
+
+messages:
+	$(EXTRACTRC) `find . -name \*.ui -o -name \*.rc` > rc.cpp
+	LIST=`find . -name \*.h -o -name \*.cpp -o -name \*.c`; \
+	if test -n "$$LIST"; then \
+	  $(XGETTEXT) $$LIST --from-code=UTF-8 -o $(podir)/piklab.pot; \
+	fi
diff --git a/src/coff/Makefile.am b/src/coff/Makefile.am
new file mode 100644
index 0000000..4e5921f
--- /dev/null
+++ b/src/coff/Makefile.am
@@ -0,0 +1 @@
+SUBDIRS = xml base
diff --git a/src/coff/base/Makefile.am b/src/coff/base/Makefile.am
new file mode 100644
index 0000000..c6ffbab
--- /dev/null
+++ b/src/coff/base/Makefile.am
@@ -0,0 +1,13 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libcoff.la
+libcoff_la_LDFLAGS = $(all_libraries)
+libcoff_la_SOURCES = coff.cpp gpdis.cpp gpopcode.cpp disassembler.cpp \
+		coff_data.cpp text_coff.cpp cdb_parser.cpp coff_archive.cpp coff_object.cpp
+libcoff_la_DEPENDENCIES = coff_data.cpp
+
+noinst_DATA = coff.xml
+coff_data.cpp: ../xml/xml_coff_parser coff.xml
+	../xml/xml_coff_parser
+CLEANFILES = coff_data.cpp
diff --git a/src/coff/base/base.pro b/src/coff/base/base.pro
new file mode 100644
index 0000000..4b4986c
--- /dev/null
+++ b/src/coff/base/base.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = coff
+HEADERS += gpopcode.h disassembler.h coff.h coff_object.h coff_archive.h text_coff.h coff_data.h cdb_parser.h
+SOURCES += gpopcode.cpp gpdis.cpp disassembler.cpp coff.cpp coff_object.cpp coff_archive.cpp text_coff.cpp coff_data.cpp cdb_parser.cpp
diff --git a/src/coff/base/cdb_parser.cpp b/src/coff/base/cdb_parser.cpp
new file mode 100644
index 0000000..2e38b84
--- /dev/null
+++ b/src/coff/base/cdb_parser.cpp
@@ -0,0 +1,417 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "cdb_parser.h"
+
+#include <ctype.h>
+#include "common/global/pfile.h"
+
+//----------------------------------------------------------------------------
+const CDB::ScopeType::Data CDB::ScopeType::DATA[Nb_Types] = {
+  { "G", I18N_NOOP("Global")    },
+  { "F", I18N_NOOP("File")      },
+  { "L", I18N_NOOP("Local")     },
+  { "S", I18N_NOOP("Structure") } // ??
+};
+
+const CDB::VarType::Data CDB::VarType::DATA[Nb_Types] = {
+  { "DA", I18N_NOOP("Array") },
+  { "DF", I18N_NOOP("Function") },
+  { "DG", I18N_NOOP("Generic Pointer") },
+  { "DC", I18N_NOOP("Code Pointer") },
+  { "DX", I18N_NOOP("External RAM Pointer") },
+  { "DD", I18N_NOOP("Internal RAM Pointer") },
+  { "DP", I18N_NOOP("Paged Pointer") },
+  { "DI", I18N_NOOP("Upper-128-byte Pointer") },
+  { "SL", I18N_NOOP("Long") },
+  { "SI", I18N_NOOP("Int") },
+  { "SC", I18N_NOOP("Char") },
+  { "SS", I18N_NOOP("Short") },
+  { "SV", I18N_NOOP("Void") },
+  { "SF", I18N_NOOP("Float") },
+  { "ST", I18N_NOOP("Structure") },
+  { "SX", I18N_NOOP("SBIT") },
+  { "SB", I18N_NOOP("Bit Field") }
+};
+
+const CDB::Sign::Data CDB::Sign::DATA[Nb_Types] = {
+  { "S", I18N_NOOP("Signed")   },
+  { "U", I18N_NOOP("Unsigned") }
+};
+
+const CDB::AddressSpaceType::Data CDB::AddressSpaceType::DATA[Nb_Types] = {
+  { "A", I18N_NOOP("External Stack") },
+  { "B", I18N_NOOP("Internal Stack") },
+  { "C", I18N_NOOP("Code") },
+  { "D", I18N_NOOP("Code / Static Segment") },
+  { "E", I18N_NOOP("Lower-128-byte Internal RAM") },
+  { "F", I18N_NOOP("External RAM") },
+  { "G", I18N_NOOP("Internal RAM") },
+  { "H", I18N_NOOP("Bit Addressable") },
+  { "I", I18N_NOOP("SFR Space") },
+  { "J", I18N_NOOP("SBIT Space") },
+  { "R", I18N_NOOP("Register Space") },
+  { "Z", I18N_NOOP("Function or Undefined Space") },
+};
+
+//----------------------------------------------------------------------------
+CDB::Object::Object(const PURL::Url &url, Log::Base &log)
+  : _log(log)
+{
+  PURL::File file(url, log);
+  if ( !file.openForRead() ) return;
+  QStringList lines = file.readLines();
+
+  for (_line=0; _line<uint(lines.count()); _line++) {
+    _col = 0;
+    _current = lines[_line];
+    if ( _current.isEmpty() ) continue;
+    char c;
+    if ( !readChar(c) ) return;
+    if ( !readAndCheckChar(':') ) return;
+    Record *record = 0;
+    bool ok;
+    switch (c) {
+      case 'M': ok = parseModuleRecord(record); break;
+      case 'F': ok = parseFunctionRecord(record); break;
+      case 'S': ok = parseSymbolRecord(record); break;
+      case 'T': ok = parseTypeRecord(record); break;
+      case 'L': ok = parseLinkerRecord(record); break;
+      default:
+        log.log(Log::LineType::Error, i18n("Unrecognized record"));
+        return;
+    }
+    if (!ok) {
+      delete record;
+      return;
+    }
+    _records.append(record);
+  }
+}
+
+CDB::Object::~Object()
+{
+  for (uint i=0; i<uint(_records.count()); i++) delete _records[i];
+}
+
+void CDB::Object::log(Log::LineType type, const QString &message)
+{
+  _log.log(type, message + " " + i18n("at line #%1, column #%2").arg(_line+1).arg(_col+1));
+}
+
+void CDB::Object::logMalformed(const QString &detail)
+{
+  log(Log::LineType::Error, i18n("Malformed record: ") + detail);
+}
+
+bool CDB::Object::readChar(char &c)
+{
+  if ( _col==uint(_current.length()) ) {
+    logMalformed(i18n("unexpected end of line"));
+    return false;
+  }
+  c = _current[_col].latin1();
+  _col++;
+  return true;
+}
+
+bool CDB::Object::readAndCheckChar(char c)
+{
+  char r;
+  if ( !readChar(r) ) return false;
+  if ( r!=c ) {
+    logMalformed(i18n("was expecting '%1'").arg(c));
+    return false;
+  }
+  return true;
+}
+
+bool CDB::Object::getString(const QString &s, QString &r)
+{
+  r = s;
+  if ( r.isEmpty() ) {
+    logMalformed(i18n("empty name"));
+    return false;
+  }
+  return true;
+}
+
+bool CDB::Object::readFixedLengthString(QString &s, uint size)
+{
+  s = QString::null;
+  for (uint i=0; i<size; i++) {
+    char c;
+    if ( !readChar(c) ) return false;
+    s += c;
+  }
+  return true;
+}
+
+bool CDB::Object::readStoppedString(QString &name, char stop)
+{
+  QString s;
+  for (;;) {
+    if ( _col==uint(_current.length()) ) {
+      if ( stop!=0 ) {
+        logMalformed(i18n("unexpected end of line"));
+        return false;
+      }
+      break;
+    }
+    if ( _current[_col]==stop ) break;
+    s += _current[_col];
+    _col++;
+  }
+  return getString(s, name);
+}
+
+bool CDB::Object::getUInt(const QString &s, uint &v)
+{
+  bool ok;
+  v = s.toUInt(&ok);
+  if ( !ok ) logMalformed(i18n("was expecting an uint"));
+  return ok;
+}
+
+bool CDB::Object::readUInt(uint &v)
+{
+  QString s;
+  for (;;) {
+    if ( _col==uint(_current.length()) ) break;
+    if ( !isdigit(_current[_col].latin1()) ) break;
+    s += _current[_col];
+    _col++;
+  }
+  return getUInt(s, v);
+}
+
+bool CDB::Object::readBool(bool &b)
+{
+  char c;
+  if ( !readChar(c) ) return false;
+  if ( c=='0' ) b = false;
+  else if ( c=='1' ) b = true;
+  else {
+    logMalformed(i18n("was expecting a bool ('%1')").arg(c));
+    return false;
+  }
+  return true;
+}
+
+bool CDB::Object::readHex(uint &v)
+{
+  QString s;
+  for (;;) {
+    if ( _col==uint(_current.length()) ) break;
+    if ( !isxdigit(_current[_col].latin1()) ) break;
+    s += _current[_col];
+    _col++;
+  }
+  return getUInt(s, v);
+}
+
+bool CDB::Object::parseModuleRecord(Record * &record)
+{
+  ModuleRecord *mr = new ModuleRecord;
+  record = mr;
+  return readStoppedString(mr->filename, 0);
+}
+
+bool CDB::Object::parse(Scope &scope, QString &name)
+{
+  QString s;
+  if ( !readFixedLengthString(s, 1) ) return false;
+  scope.type = ScopeType::fromKey(s);
+  switch (scope.type.type()) {
+    case ScopeType::Structure:
+    case ScopeType::Global: break;
+    case ScopeType::File:
+    case ScopeType::Local:
+      if ( !readStoppedString(scope.name, '$') ) return false;
+      break;
+    case ScopeType::Nb_Types:
+      logMalformed(i18n("unknown ScopeType"));
+      return false;
+  }
+  if ( !readAndCheckChar('$') ) return false;
+  if ( !readStoppedString(name, '$') ) return false;
+  if ( !readAndCheckChar('$') ) return false;
+  if ( !readUInt(scope.level) ) return false;
+  if ( !readAndCheckChar('$') ) return false;
+  if ( !readUInt(scope.block) ) return false;
+  return true;
+}
+
+bool CDB::Object::parse(TypeChain &typeChain)
+{
+  uint nb;
+  if ( !readAndCheckChar('{') ) return false;
+  if ( !readUInt(nb) ) return false;
+  if ( !readAndCheckChar('}') ) return false;
+  QString s;
+  if ( !readStoppedString(s, ':') ) return false;
+  QStringList list = QStringList::split(',', s, true);
+  for (uint i=0; i<uint(list.count()); i++) {
+    DCLType type;
+    QString key = list[i].mid(0, 2);
+    type.type = VarType::fromKey(key);
+    switch (type.type.type()) {
+      case VarType::Array:
+      case VarType::BitField:
+        if ( !getUInt(list[i].mid(2), type.nb) ) return false;
+        break;
+      case VarType::Structure:
+        if ( !getString(list[i].mid(2), type.name) ) return false;
+        break;
+      case VarType::Nb_Types:
+        logMalformed(i18n("unknown DCLType"));
+        return false;
+      default: break;
+    }
+    typeChain.types.append(type);
+  }
+  if ( !readAndCheckChar(':') ) return false;
+  if ( !readFixedLengthString(s, 1) ) return false;
+  typeChain.sign = Sign::fromKey(s);
+  if ( typeChain.sign==Sign::Nb_Types ) {
+    logMalformed(i18n("unknown Sign"));
+    return false;
+  }
+  return true;
+}
+
+bool CDB::Object::parse(AddressSpace &as)
+{
+  QString s;
+  if ( !readFixedLengthString(s, 1) ) return false;
+  as.type = AddressSpaceType::fromKey(s);
+  if ( as.type==AddressSpaceType::Nb_Types ) {
+    logMalformed(i18n("unknown AddressSpaceType"));
+    return false;
+  }
+  if ( !readAndCheckChar(',') ) return false;
+  if ( !readBool(as.onStack) ) return false;
+  if ( !readAndCheckChar(',') ) return false;
+  if ( !readUInt(as.stackOffset) ) return false;
+  if ( as.type==AddressSpaceType::Register ) {
+    if ( !readAndCheckChar(',') ) return false;
+    if ( !readAndCheckChar('[') ) return false;
+    if ( !readStoppedString(s, ']') ) return false;
+    as.registers = QStringList::split(',', s, true);
+    if ( as.registers.count()==0 ) {
+      logMalformed(i18n("no register defined"));
+      return false;
+    }
+    if ( !readAndCheckChar(']') ) return false;
+  }
+  return true;
+}
+
+bool CDB::Object::parse(SymbolRecord &sr)
+{
+  if ( !parse(sr.scope, sr.name) ) return false;
+  if ( !readAndCheckChar('(') ) return false;
+  if ( !parse(sr.typeChain) ) return false;
+  if ( !readAndCheckChar(')') ) return false;
+  if ( !readAndCheckChar(',') ) return false;
+  if ( !parse(sr.addressSpace) ) return false;
+  return true;
+}
+
+bool CDB::Object::parse(TypeMember &tm)
+{
+  if ( !readAndCheckChar('(') ) return false;
+  if ( !readAndCheckChar('{') ) return false;
+  if ( !readUInt(tm.offset) ) return false;
+  if ( !readAndCheckChar('}') ) return false;
+  if ( !readAndCheckChar('S') ) return false;
+  if ( !readAndCheckChar(':') ) return false;
+  if ( !parse(tm.symbol) ) return false;
+  if ( !readAndCheckChar(')') ) return false;
+  return true;
+}
+
+bool CDB::Object::parseSymbolRecord(Record * &record)
+{
+  SymbolRecord *sr = new SymbolRecord;
+  record = sr;
+  if ( !parse(*sr) ) return false;
+  return true;
+}
+
+bool CDB::Object::parseFunctionRecord(Record * &record)
+{
+  FunctionRecord *fr = new FunctionRecord;
+  record = fr;
+  if ( !parse(*fr) ) return false;
+  if ( !readAndCheckChar(',') ) return false;
+  if ( !readBool(fr->isInterruptHandler) ) return false;
+  if ( !readAndCheckChar(',') ) return false;
+  if ( !readUInt(fr->interruptHandler) ) return false;
+  if ( !readAndCheckChar(',') ) return false;
+  if ( !readUInt(fr->registerBank) ) return false;
+  return true;
+}
+
+bool CDB::Object::parseTypeRecord(Record * &record)
+{
+  TypeRecord *tr = new TypeRecord;
+  record = tr;
+  if ( !readAndCheckChar('F') ) return false;
+  if ( !readStoppedString(tr->filename, '$') ) return false;
+  if ( !readAndCheckChar('$') ) return false;
+  if ( !readStoppedString(tr->name, '[') ) return false;
+  if ( !readAndCheckChar('[') ) return false;
+  for (;;) {
+    TypeMember tm;
+    if ( !parse(tm) ) return false;
+    tr->members.append(tm);
+    if ( _current[_col]==']' ) break;
+  }
+  if ( !readAndCheckChar(']') ) return false;
+  return true;
+}
+
+bool CDB::Object::parseLinkerRecord(Record * &record)
+{
+  LinkerRecord *lr = new LinkerRecord;
+  record = lr;
+  char c;
+  if ( !readChar(c) ) return false;
+  switch (c) {
+    case 'A':
+      lr->type = LinkerRecord::AsmLine;
+      if ( !readAndCheckChar('$') ) return false;
+      if ( !readStoppedString(lr->filename, '$') ) return false;
+      if ( !readAndCheckChar('$') ) return false;
+      if ( !readUInt(lr->line) ) return false;
+      break;
+    case 'C':
+      lr->type = LinkerRecord::CLine;
+      if ( !readAndCheckChar('$') ) return false;
+      if ( !readStoppedString(lr->filename, '$') ) return false;
+      if ( !readAndCheckChar('$') ) return false;
+      if ( !readUInt(lr->line) ) return false;
+      if ( !readAndCheckChar('$') ) return false;
+      if ( !readUInt(lr->level) ) return false;
+      if ( !readAndCheckChar('$') ) return false;
+      if ( !readUInt(lr->block) ) return false;
+      break;
+    case 'X':
+      lr->type = LinkerRecord::EndAddress;
+      if ( !parse(lr->scope, lr->name) ) return false;
+      break;
+    default:
+      lr->type = LinkerRecord::Address;
+      if ( !parse(lr->scope, lr->name) ) return false;
+      break;
+  }
+  if ( !readAndCheckChar(':') ) return false;
+  if ( !readHex(lr->address) ) return false;
+  return true;
+}
diff --git a/src/coff/base/cdb_parser.h b/src/coff/base/cdb_parser.h
new file mode 100644
index 0000000..42572ab
--- /dev/null
+++ b/src/coff/base/cdb_parser.h
@@ -0,0 +1,166 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef SDCC_CDB_PARSER_H
+#define SDCC_CDB_PARSER_H
+
+#include "common/common/key_enum.h"
+#include "common/global/log.h"
+#include "common/global/purl.h"
+
+namespace CDB
+{
+
+//----------------------------------------------------------------------------
+class Record
+{
+public:
+};
+
+class ModuleRecord : public Record
+{
+public:
+  QString filename;
+};
+
+BEGIN_DECLARE_ENUM(ScopeType)
+  Global = 0, File, Local, Structure
+END_DECLARE_ENUM_STD(ScopeType)
+
+class Scope
+{
+public:
+  ScopeType type;
+  QString name; // file or function name
+  uint level, block;
+};
+
+BEGIN_DECLARE_ENUM(VarType)
+  Array = 0, Function, GenericPointer, CodePointer, ExternalRamPointer,
+  InternalRamPointer, PagedPointer, Upper128bytesPointer, Long, Int, Char,
+  Short, Void, Float, Structure, Sbit, BitField
+END_DECLARE_ENUM_STD(VarType)
+
+class DCLType
+{
+public:
+  VarType type;
+  uint nb; // for Array and BitField
+  QString name; // for Structure
+};
+
+BEGIN_DECLARE_ENUM(Sign)
+  Signed = 0, Unsigned
+END_DECLARE_ENUM_STD(Sign)
+
+class TypeChain
+{
+public:
+  QValueVector<DCLType> types;
+  Sign sign;
+};
+
+BEGIN_DECLARE_ENUM(AddressSpaceType)
+  ExternalStack = 0, InternalStack, Code, CodeStaticSegment,
+  Lower128bytesInternalRam, ExternalRam, InternalRam, BitAddressable,
+  SFR, SBIT, Register, FunctionOrUndefined
+END_DECLARE_ENUM_STD(AddressSpaceType)
+
+class AddressSpace {
+public:
+  AddressSpaceType type;
+  bool onStack;
+  uint stackOffset; // valid if onStack is true
+  QStringList registers; // for Register type
+};
+
+class SymbolRecord : public Record
+{
+public:
+  QString name;
+  Scope scope;
+  TypeChain typeChain;
+  AddressSpace addressSpace;
+};
+
+class FunctionRecord : public SymbolRecord
+{
+public:
+  bool isInterruptHandler;
+  uint interruptHandler, registerBank; // if isInterruptHandler is true
+};
+
+class TypeMember
+{
+public:
+  uint offset;
+  SymbolRecord symbol;
+};
+
+class TypeRecord : public Record
+{
+public:
+  QString filename, name;
+  QValueVector<TypeMember> members;
+};
+
+class LinkerRecord : public Record
+{
+public:
+  enum Type { Address = 0, EndAddress, AsmLine, CLine, Nb_Types };
+  Type type;
+  Scope scope; // for Address and EndAddress
+  QString name; // for Address and EndAddress
+  uint address;
+  uint line; // for AsmLine and CLine
+  QString filename; // for AsmLine and CLine
+  uint block, level; // for CLine
+};
+
+//----------------------------------------------------------------------------
+class Object
+{
+public:
+  Object(const PURL::Url &url, Log::Base &log);
+  virtual ~Object();
+
+private:
+  Log::Base &_log;
+  QString _current;
+  uint _line, _col;
+  QValueVector<Record *> _records;
+
+  void log(Log::LineType type, const QString &message);
+  void logMalformed(const QString &detail);
+  bool readBool(bool &b);
+  bool getUInt(const QString &s, uint &r);
+  bool readUInt(uint &v);
+  bool readChar(char &c);
+  bool readAndCheckChar(char c);
+  bool getString(const QString &s, QString &r);
+  bool readStoppedString(QString &s, char stop);
+  bool readFixedLengthString(QString &s, uint size);
+  bool readHex(uint &v);
+
+  bool parse(Scope &scope, QString &name);
+  bool parse(TypeChain &typeChain);
+  bool parse(TypeRecord &typeRecord);
+  bool parse(SymbolRecord &sr);
+  bool parse(AddressSpace &addressSpace);
+  bool parse(TypeMember &typeMember);
+
+  bool parseModuleRecord(Record * &record);
+  bool parseFunctionRecord(Record * &record);
+  bool parseSymbolRecord(Record * &record);
+  bool parseTypeRecord(Record * &record);
+  bool parseLinkerRecord(Record * &record);
+};
+
+} // namespace
+
+#endif
diff --git a/src/coff/base/coff.cpp b/src/coff/base/coff.cpp
new file mode 100644
index 0000000..5eaad84
--- /dev/null
+++ b/src/coff/base/coff.cpp
@@ -0,0 +1,97 @@
+/***************************************************************************
+ *   Copyright (C) 2006-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "coff.h"
+
+#include <time.h>
+
+#include "common/common/misc.h"
+#include "devices/list/device_list.h"
+#include "devices/base/device_group.h"
+#include "devices/pic/base/pic_register.h"
+#include "coff_data.h"
+#include "common/global/pfile.h"
+
+//----------------------------------------------------------------------------
+const CoffType::Data CoffType::DATA[Nb_Types] = {
+  { "archive", I18N_NOOP("Archive") },
+  { "object",  I18N_NOOP("Object")  }
+};
+
+const Coff::Format::Data Coff::Format::DATA[Nb_Types] = {
+  { 0, I18N_NOOP("Old Microchip"), 0x1234, { 20, 16, 40, 18, 16, 12 } },
+  { 0, I18N_NOOP("PIC30"),         0x1236, { 20, 28, 40, 18,  8, 10 } }, // from PIC30 binutils "coff.h" file
+  { 0, I18N_NOOP("New Microchip"), 0x1240, { 20, 18, 40, 20, 16, 12 } }  // (C18 >= 3.0)
+};
+
+CoffType Coff::identify(const PURL::Url &url, Log::Base &log)
+{
+  PURL::File file(url, log);
+  if ( !file.openForRead() ) return CoffType::Nb_Types;
+  QByteArray data = file.readAll();
+  if ( log.hasError() ) return CoffType::Nb_Types;
+  uint offset = 0;
+  Format format;
+  Q_UINT32 magic;
+  return identify(data, offset, log, format, magic);
+}
+
+CoffType Coff::identify(const QByteArray &data, uint &offset, Log::Base &log, Format &format, Q_UINT32 &magic)
+{
+  QString id = "!<arch>\012";
+  if ( data.count()>=id.length() ) {
+    QString s = QString::fromAscii(data.data(), id.length());
+    if ( s==id ) {
+      offset += id.length();
+      return CoffType::Archive;
+    }
+  }
+  if ( !getULong(data, offset, 2, log, magic) ) return CoffType::Nb_Types;
+  log.log(Log::DebugLevel::Extra, QString("COFF format: %1").arg(toHexLabel(magic, 4)));
+  format = Format::Nb_Types;
+  FOR_EACH(Format, f) if ( magic==f.data().magic ) format = f;
+  return CoffType::Object;
+}
+
+//----------------------------------------------------------------------------
+bool Coff::getULong(const QByteArray &data, uint &offset, uint nbBytes, Log::Base &log, Q_UINT32 &v)
+{
+  bool ok;
+  v = ::getULong(data, offset, nbBytes, &ok);
+  if ( !ok ) {
+    log.log(Log::LineType::Error, i18n("COFF file is truncated (offset: %1  nbBytes: %2  size:%3).").arg(offset).arg(nbBytes).arg(data.count()));
+    return false;
+  }
+  offset += nbBytes;
+  return true;
+}
+
+bool Coff::getString(const QByteArray &data, uint &offset, uint nbChars, Log::Base &log, QString &name)
+{
+  if ( !checkAvailable(data, offset, nbChars) ) {
+    log.log(Log::LineType::Error, i18n("COFF file is truncated (offset: %1  nbBytes: %2  size:%3).").arg(offset).arg(nbChars).arg(data.count()));
+    return false;
+  }
+  name = QString::fromAscii(data.data()+offset, nbChars);
+  offset += nbChars;
+  return true;
+}
+
+//----------------------------------------------------------------------------
+bool Coff::Base::initParse(CoffType type, QByteArray &data, uint &offset, Log::Base &log)
+{
+  PURL::File file(_url, log);
+  if ( !file.openForRead() ) return false;
+  data = file.readAll();
+  if ( log.hasError() ) return false;
+  if ( identify(data, offset, log, _format, _magic)!=type ) {
+    log.log(Log::LineType::Error, i18n("Could not recognize file (magic number is %1).").arg(toHexLabel(_magic, 4)));
+    return false;
+  }
+  return true;
+}
diff --git a/src/coff/base/coff.h b/src/coff/base/coff.h
new file mode 100644
index 0000000..edd0ae5
--- /dev/null
+++ b/src/coff/base/coff.h
@@ -0,0 +1,64 @@
+/***************************************************************************
+ *   Copyright (C) 2006-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef COFF_H
+#define COFF_H
+
+#include "common/global/global.h"
+#include "devices/pic/base/pic.h"
+#include "common/global/purl.h"
+#include "common/global/log.h"
+
+BEGIN_DECLARE_ENUM(CoffType)
+  Archive = 0, Object
+END_DECLARE_ENUM_STD(CoffType)
+
+//----------------------------------------------------------------------------
+namespace Coff
+{
+extern bool getString(const QByteArray &data, uint &offset, uint nbChars, Log::Base &log, QString &name);
+extern bool getULong(const QByteArray &data, uint &offset, uint nbBytes, Log::Base &log, Q_UINT32 &v);
+
+//----------------------------------------------------------------------------
+enum SizeType { HeaderSize = 0, OptHeaderSize, SectionHeaderSize, SymbolSize,
+                LineNumberSize, RelocationSize, Nb_SizeTypes };
+struct FormatData {
+  const char *key, *label;
+  uint magic;
+  uint sizes[Nb_SizeTypes];
+};
+BEGIN_DECLARE_ENUM(Format)
+  OldMicrochip = 0, PIC30, NewMicrochip
+END_DECLARE_ENUM(Format, FormatData)
+
+extern CoffType identify(const PURL::Url &url, Log::Base &log);
+extern CoffType identify(const QByteArray &data, uint &offset, Log::Base &log, Format &format, Q_UINT32 &magic);
+
+//----------------------------------------------------------------------------
+class Base
+{
+public:
+  Base(const PURL::Url &url) : _url(url) {}
+  virtual ~Base() {}
+  virtual bool parse(Log::Base &log) = 0;
+  PURL::Url url() const { return _url; }
+  uint magic() const { return _magic; }
+
+  virtual Log::KeyList information() const = 0;
+
+protected:
+  PURL::Url  _url;
+  Format     _format;
+  Q_UINT32   _magic;
+
+  bool initParse(CoffType type, QByteArray &data, uint &offset, Log::Base &log);
+};
+
+} // namespace
+
+#endif
diff --git a/src/coff/base/coff.xml b/src/coff/base/coff.xml
new file mode 100644
index 0000000..229d11a
--- /dev/null
+++ b/src/coff/base/coff.xml
@@ -0,0 +1,342 @@
+<!-- ************************************************************************* -->
+<!-- * Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  * -->
+<!-- *                                                                       * -->
+<!-- * This program is free software; you can redistribute it and/or modify  * -->
+<!-- * it under the terms of the GNU General Public License as published by  * -->
+<!-- * the Free Software Foundation; either version 2 of the License, or     * -->
+<!-- * (at your option) any later version.                                   * -->
+<!-- *************************************************************************/-->
+<!DOCTYPE piklab>
+
+<type name="coff">
+  <device name="10f200" id="0xf200" />
+  <device name="10f202" id="0xf202" />
+  <device name="10f204" id="0xf204" />
+  <device name="10f206" id="0xf206" />
+  <device name="10f220" id="0xf220" />
+  <device name="10f222" id="0xf222" />
+  <device name="12c508" id="0x2508" />
+  <device name="12c508a" id="0x508a" />
+  <device name="12c509" id="0x2509" />
+  <device name="12c509a" id="0x509a" />
+  <device name="12c671" id="0x2671" />
+  <device name="12c672" id="0x2672" />
+  <device name="12ce518" id="0x2518" />
+  <device name="12ce519" id="0x2519" />
+  <device name="12ce673" id="0x2673" />
+  <device name="12ce674" id="0x2674" />
+  <device name="12cr509a" id="0xd09a" />
+  <device name="12f508" id="0x2508" />
+  <device name="12f509" id="0x2509" />
+  <device name="12f510" id="0x2510" />
+  <device name="12f629" id="0x2629" />
+  <device name="12f635" id="0x2635" />
+  <device name="12f675" id="0x2675" />
+  <device name="12f683" id="0x2683" />
+  <device name="14000" id="0x4000" />
+<!--  <device name="16c5x" id="0x658a" /> -->
+<!--  <device name="16cxx" id="0x6c77" /> -->
+  <device name="16c432" id="0x6432" />
+  <device name="16c433" id="0x6433" />
+  <device name="16c505" id="0x2505" />
+  <device name="16c52" id="0x6c52" />
+  <device name="16c54" id="0x6c54" />
+  <device name="16c54a" id="0x654a" />
+  <device name="16c54b" id="0x654b" />
+  <device name="16c54c" id="0x654c" />
+  <device name="16c55" id="0x6c55" />
+  <device name="16c55a" id="0x655a" />
+  <device name="16c554" id="0x6554" />
+  <device name="16c557" id="0x6557" />
+  <device name="16c558" id="0x6558" />
+  <device name="16c56" id="0x6c56" />
+  <device name="16c56a" id="0x656a" />
+  <device name="16c57" id="0x6c57" />
+  <device name="16c57c" id="0x657c" />
+  <device name="16c58a" id="0x658a" />
+  <device name="16c58b" id="0x658b" />
+  <device name="16c61" id="0x6c61" />
+  <device name="16c62" id="0x6c62" />
+  <device name="16c62a" id="0x662a" />
+  <device name="16c62b" id="0x662b" />
+  <device name="16c620" id="0x6620" />
+  <device name="16c620a" id="0x620a" />
+  <device name="16c621" id="0x6621" />
+  <device name="16c621a" id="0x621a" />
+  <device name="16c622" id="0x6622" />
+  <device name="16c622a" id="0x622a" />
+  <device name="16c63" id="0x6c63" />
+  <device name="16c63a" id="0x663a" />
+  <device name="16c64" id="0x6c64" />
+  <device name="16c64a" id="0x664a" />
+  <device name="16c642" id="0x6642" />
+  <device name="16c65" id="0x6c65" />
+  <device name="16c65a" id="0x665a" />
+  <device name="16c65b" id="0x665b" />
+  <device name="16c66" id="0x6c66" />
+  <device name="16c662" id="0x6662" />
+  <device name="16c67" id="0x6c67" />
+  <device name="16c71" id="0x6c71" />
+  <device name="16c710" id="0x6710" />
+  <device name="16c711" id="0x6711" />
+  <device name="16c712" id="0x6712" />
+  <device name="16c715" id="0x6715" />
+  <device name="16c716" id="0x6716" />
+  <device name="16c717" id="0x6717" />
+  <device name="16c72" id="0x6c72" />
+  <device name="16c72a" id="0x672a" />
+  <device name="16c73" id="0x673a" />
+  <device name="16c73a" id="0x673a" />
+  <device name="16c73b" id="0x673b" />
+  <device name="16c74" id="0x6c74" />
+  <device name="16c745" id="0x6745" />
+<!--  <device name="16c747" id="0x6747" /> -->
+  <device name="16c74a" id="0x674a" />
+  <device name="16c74b" id="0x674b" />
+  <device name="16c76" id="0x6c76" />
+  <device name="16c765" id="0x6765" />
+  <device name="16c77" id="0x6c77" />
+  <device name="16c770" id="0x6770" />
+  <device name="16c771" id="0x6771" />
+  <device name="16c773" id="0x6773" />
+  <device name="16c774" id="0x6774" />
+  <device name="16c781" id="0x6781" />
+  <device name="16c782" id="0x6782" />
+  <device name="16c84" id="0x6c84" />
+  <device name="16c923" id="0x6923" />
+  <device name="16c924" id="0x6924" />
+  <device name="16c925" id="0x6925" />
+  <device name="16c926" id="0x6926" />
+  <device name="16ce623" id="0x6623" />
+  <device name="16ce624" id="0x6624" />
+  <device name="16ce625" id="0x6625" />
+<!--  <device name="16cr54" id="0xdc54" /> -->
+  <device name="16cr54a" id="0xd54a" />
+  <device name="16cr54b" id="0xd54b" />
+  <device name="16cr54c" id="0xdc54" />
+  <device name="16cr56a" id="0xd56a" />
+<!--  <device name="16cr57a" id="0xd57a" /> -->
+  <device name="16cr57b" id="0xd57b" />
+  <device name="16cr57c" id="0xd57c" />
+  <device name="16cr58a" id="0xd58a" />
+  <device name="16cr58b" id="0xd58b" />
+  <device name="16cr62" id="0xdc62" />
+  <device name="16cr620a" id="0xd20a" />
+  <device name="16cr63" id="0x6d63" />
+  <device name="16cr64" id="0xdc64" />
+  <device name="16cr65" id="0x6d65" />
+  <device name="16cr72" id="0x6d72" />
+  <device name="16cr83" id="0xdc83" />
+  <device name="16cr84" id="0xdc84" />
+  <device name="16f505" id="0x654f" />
+  <device name="16f54" id="0x654f" />
+  <device name="16f57" id="0x657f" />
+  <device name="16f59" id="0x659f" />
+  <device name="16f610" id="0x6610" />
+  <device name="16f627" id="0x6627" />
+  <device name="16f627a" id="0x627a" />
+  <device name="16f628" id="0x6628" />
+  <device name="16f628a" id="0x628a" />
+  <device name="16f630" id="0x6630" />
+  <device name="16f636" id="0x6636" />
+  <device name="16f639" id="0x6639" />
+  <device name="16f648a" id="0x648a" />
+  <device name="16f676" id="0x6676" />
+  <device name="16f684" id="0x6684" />
+  <device name="16f685" id="0x6685" />
+  <device name="16f687" id="0x6687" />
+  <device name="16f688" id="0x6688" />
+  <device name="16f689" id="0x6689" />
+  <device name="16f690" id="0x6690" />
+  <device name="16f716" id="0x716f" />
+  <device name="16f72" id="0x672f" />
+  <device name="16f73" id="0x673f" />
+  <device name="16f737" id="0x737f" />
+  <device name="16f74" id="0x674f" />
+  <device name="16f747" id="0x6747" />
+  <device name="16f76" id="0x676f" />
+  <device name="16f767" id="0x767f" />
+  <device name="16f77" id="0x677f" />
+  <device name="16f777" id="0x777f" />
+  <device name="16f785" id="0x785f" />
+  <device name="16f818" id="0x818f" />
+  <device name="16f819" id="0x819f" />
+  <device name="16f83" id="0x6c83" />
+  <device name="16f84" id="0x6f84" />
+  <device name="16f84a" id="0x684a" />
+  <device name="16f87" id="0x687f" />
+  <device name="16f870" id="0x870f" />
+  <device name="16f871" id="0x871f" />
+  <device name="16f872" id="0x872f" />
+  <device name="16f873" id="0x873f" />
+  <device name="16f873a" id="0x873a" />
+  <device name="16f874" id="0x874f" />
+  <device name="16f874a" id="0x874a" />
+  <device name="16f876" id="0x876f" />
+  <device name="16f876a" id="0x876a" />
+  <device name="16f877" id="0x877f" />
+  <device name="16f877a" id="0x877a" />
+  <device name="16f88" id="0x688f" />
+  <device name="16f882" id="0x882f" />
+  <device name="16f883" id="0x883f" />
+  <device name="16f884" id="0x884f" />
+  <device name="16f886" id="0x886f" />
+  <device name="16f887" id="0x887f" />
+  <device name="16f913" id="0x913f" />
+  <device name="16f914" id="0x914f" />
+  <device name="16f916" id="0x916f" />
+  <device name="16f917" id="0x917f" />
+  <device name="16hv540" id="0x6540" />
+<!--  <device name="17cxx" id="0x7756" /> -->
+  <device name="17c42" id="0x7c42" />
+  <device name="17c42a" id="0x742a" />
+  <device name="17c43" id="0x7c43" />
+  <device name="17c44" id="0x7c44" />
+  <device name="17c752" id="0x7752" />
+  <device name="17c756" id="0x7756" />
+  <device name="17c756a" id="0x756a" />
+  <device name="17c762" id="0x7762" />
+  <device name="17c766" id="0x7766" />
+  <device name="17cr42" id="0xe42a" />
+  <device name="17cr43" id="0xec43" />
+
+  <device name="18c242" id="0x8242" />
+  <device name="18c252" id="0x8252" />
+  <device name="18c442" id="0x8442" />
+  <device name="18c452" id="0x8452" />
+  <device name="18c601" id="0x8601" />
+  <device name="18c658" id="0x8658" />
+  <device name="18c801" id="0x8801" />
+  <device name="18c858" id="0x8858" />
+  <device name="18f1220" id="0xa122" />
+  <device name="18f1230" id="0xa123 0x1230" />
+<!--  <device name="18f1231" id="0x1231" /> -->
+  <device name="18f1320" id="0xa132" />
+  <device name="18f1330" id="0xa133 0x1330" />
+<!--  <device name="18f1331" id="0x1331" /> -->
+  <device name="18f2220" id="0xa222" />
+  <device name="18f2221" id="0x2221" />
+  <device name="18f2320" id="0xa232" />
+  <device name="18f2321" id="0x2321" />
+  <device name="18f2331" id="0x2331" />
+  <device name="18f2410" id="0x2410" />
+  <device name="18f242"  id="0x242f" />
+  <device name="18f2420" id="0x2420" />
+  <device name="18f2431" id="0x2431" />
+  <device name="18f2439" id="0x2439" />
+  <device name="18f2450" id="0x2450" />
+  <device name="18f2455" id="0x2455" />
+  <device name="18f248"  id="0x8248" />
+  <device name="18f2480" id="0x2480" />
+  <device name="18f24J10" id="0xD410" />
+  <device name="18f2510" id="0x2510" />
+  <device name="18f2515" id="0x2515" />
+  <device name="18f252"  id="0x252f" />
+  <device name="18f2520" id="0x2520" />
+  <device name="18f2525" id="0x2525" />
+  <device name="18f2539" id="0x2539" />
+  <device name="18f2550" id="0x2550" />
+  <device name="18f258"  id="0x8258" />
+  <device name="18f2580" id="0x2580" />
+  <device name="18f2585" id="0x2585" />
+  <device name="18f25J10" id="0xD510" />
+  <device name="18f2610" id="0x2610 0xa261" />
+  <device name="18f2620" id="0x2620 0xa262" />
+  <device name="18f2680" id="0x2680" />
+<!--  <device name="18f2681" id="0x2681" /> -->
+  <device name="18f2682" id="0x2682" />
+  <device name="18f2685" id="0x2685" />
+  <device name="18f4220" id="0xa422" />
+  <device name="18f4221" id="0x4221" />
+  <device name="18f4320" id="0xa432" />
+  <device name="18f4321" id="0x4321" />
+  <device name="18f4331" id="0x4331" />
+  <device name="18f4410" id="0x4410" />
+  <device name="18f442"  id="0x442f" />
+  <device name="18f4420" id="0x4420" />
+  <device name="18f4431" id="0x4431" />
+  <device name="18f4439" id="0x4439" />
+  <device name="18f4450" id="0x4450" />
+  <device name="18f4455" id="0x4455" />
+  <device name="18f448"  id="0x8448" />
+  <device name="18f4480" id="0x4480" />
+  <device name="18f44J10" id="0xE410" />
+  <device name="18f4510" id="0x4510" />
+  <device name="18f4515" id="0x4515" />
+  <device name="18f452"  id="0x452f" />
+  <device name="18f4520" id="0x4520" />
+  <device name="18f4525" id="0x4525" />
+  <device name="18f4539" id="0x4539" />
+  <device name="18f4550" id="0x4550" />
+  <device name="18f458"  id="0x8458" />
+  <device name="18f4580" id="0x4580" />
+  <device name="18f4585" id="0x4585" />
+  <device name="18f45J10" id="0xE510" />
+  <device name="18f4610" id="0xa461 0x4610" />
+  <device name="18f4620" id="0xa462 0x4620" />
+  <device name="18f4680" id="0x4680" />
+<!--  <device name="18f4681" id="0x4681" /> -->
+  <device name="18f4682" id="0x4682" />
+  <device name="18f4685" id="0x4685" />
+  <device name="18f6310" id="0xa631 0x6310" />
+  <device name="18f6390" id="0xa639 0x6390" />
+  <device name="18f6410" id="0xa641 0x6410" />
+  <device name="18f6490" id="0xa649 0x6490" />
+<!--  <device name="18f64j15" id="0xb415" /> -->
+  <device name="18f6520" id="0xa652" />
+  <device name="18f6525" id="0x6525" />
+  <device name="18f6527" id="0x6527" />
+  <device name="18f6585" id="0x6585" />
+  <device name="18f65j10" id="0xb510" />
+  <device name="18f65j15" id="0xb515" />
+  <device name="18f6620" id="0xa662" />
+  <device name="18f6621" id="0xa621" />
+  <device name="18f6622" id="0xf622" />
+  <device name="18f6627" id="0xa627 0x6627" />
+  <device name="18f6680" id="0x6680" />
+  <device name="18f66j10" id="0xb610" />
+  <device name="18f66j15" id="0xb615" />
+  <device name="18f66j60" id="0xb660" />
+  <device name="18f66j65" id="0xb665" />
+  <device name="18f6720" id="0xa672" />
+  <device name="18f6722" id="0x6722" />
+  <device name="18f67j10" id="0xb710" />
+  <device name="18f67j60" id="0xb760" />
+  <device name="18f8310" id="0x8310" />
+  <device name="18f8390" id="0x8390" />
+  <device name="18f8410" id="0x8410" />
+  <device name="18f8490" id="0x8490" />
+<!--  <device name="18f84j15" id="0xc415" /> -->
+  <device name="18f8520" id="0xa852" />
+  <device name="18f8525" id="0x8525" />
+  <device name="18f8527" id="0x8527" />
+  <device name="18f8585" id="0x8585" />
+  <device name="18f85j10" id="0xc510" />
+  <device name="18f85j15" id="0xc515" />
+  <device name="18f8620" id="0xa862" />
+  <device name="18f8621" id="0x8621" />
+  <device name="18f8622" id="0x8622" />
+  <device name="18f8627" id="0x8627" />
+  <device name="18f8680" id="0x8680" />
+  <device name="18f86j10" id="0xc610" />
+  <device name="18f86j15" id="0xc615" />
+  <device name="18f86j60" id="0xc660" />
+  <device name="18f86j65" id="0xc665" />
+  <device name="18f8720" id="0xa872" />
+  <device name="18f8722" id="0x8721" />
+  <device name="18f87j10" id="0xc710" />
+  <device name="18f87j60" id="0xc760" />
+  <device name="18f96j60" id="0xd660" />
+  <device name="18f96j65" id="0xd665" />
+  <device name="18f97j60" id="0xd760" />
+<!--
+  <device name="rf509af" id="0x6509" />
+  <device name="rf509ag" id="0x7509" />
+  <device name="rf675f" id="0x3675" />
+  <device name="rf675h" id="0x4675" />
+  <device name="rf675k" id="0x5675" />
+  <device name="sx18" id="0x0018" />
+  <device name="sx20" id="0x0020" />
+  <device name="sx28" id="0x0028" />
+-->
+</type>
diff --git a/src/coff/base/coff_archive.cpp b/src/coff/base/coff_archive.cpp
new file mode 100644
index 0000000..72a8883
--- /dev/null
+++ b/src/coff/base/coff_archive.cpp
@@ -0,0 +1,129 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "coff_archive.h"
+
+//----------------------------------------------------------------------------
+Coff::Member::Member(const QByteArray &data, uint &offset, Log::Base &log)
+{
+  // parse header
+  QString s;
+  if ( !getString(data, offset, 256, log, s) ) return;
+  int i = s.find('/');
+  if ( i==-1 ) {
+    log.log(Log::LineType::Error, i18n("Member name not terminated by '/' (\"%1\").").arg(s));
+    return;
+  }
+  _name = s.mid(0, i);
+  if ( !getString(data, offset, 12, log, s) ) return; // mtime
+  if ( !getString(data, offset, 10, log, s) ) return;
+  i = s.find('l');
+  if ( i==-1 ) {
+    log.log(Log::LineType::Error, i18n("File size not terminated by 'l' (\"%1\").").arg(s));
+    return;
+  }
+  bool ok;
+  _nbBytes = s.mid(0, i).toUInt(&ok);
+  if ( !ok ) {
+    log.log(Log::LineType::Error, i18n("Wrong format for file size \"%1\".").arg(s));
+    return;
+  }
+  Q_UINT32 v;
+  if ( !getULong(data, offset, 2, log, v) ) return;
+  log.log(Log::DebugLevel::Extra, i18n("Magic number: %1").arg(toHexLabel(v, 4)));
+//  if ( v!=0x600A ) {
+//    log.log(Log::LineType::Error, i18n("Wrong magic for Microchip archive (\"%1\").").arg(toHexLabel(v, 4)));
+//    return;
+//  }
+  offset += _nbBytes;
+}
+
+//----------------------------------------------------------------------------
+Coff::Archive::Archive(const PURL::Url &url)
+  : Base(url)
+{}
+
+bool Coff::Archive::parse(Log::Base &log)
+{
+  QByteArray data;
+  uint offset = 0, symbolEnd = 0;
+  Member *symbol = 0;
+  if ( !initParse(CoffType::Archive, data, offset, log) ) return false;
+  for (;;) {
+    if ( offset==uint(data.count()) ) break; // end of archive
+    uint start = offset;
+    Member *member = new Member(data, offset, log);
+    if ( log.hasError() ) return false;
+    if ( member->name().isEmpty() ) {
+      symbolEnd = offset;
+      symbol = member;
+    } else {
+      _members[member->name()] = member;
+      _offsets[start] = member;
+    }
+  }
+  if (symbol) {
+    if ( !readSymbols(data, symbolEnd - symbol->nbBytes(), log) ) return false;
+    delete symbol;
+  }
+  return true;
+}
+
+Coff::Archive::~Archive()
+{
+  QMap<QString, Member *>::const_iterator it;
+  for (it=_members.begin(); it!=_members.end(); ++it) delete it.data();
+}
+
+bool Coff::Archive::readSymbols(const QByteArray &data, uint offset, Log::Base &log)
+{
+  Q_UINT32 nb;
+  if ( !getULong(data, offset, 4, log, nb) ) return false;
+  QValueVector<Member *> members(nb);
+  for (uint i=0; i<nb; i++) {
+    Q_UINT32 start;
+    if ( !getULong(data, offset, 4, log, start) ) return false;
+    if ( !_offsets.contains(start) ) {
+      log.log(Log::LineType::Error, i18n("Unknown file member offset: %1").arg(toHexLabel(start, 8)));
+      return false;
+    }
+    members[i] = _offsets[start];
+  }
+  for (uint i=0; i<nb; i++) {
+    QString name(data.data() + offset);
+    offset += name.length() + 1;
+    _symbols[name] = members[i];
+  }
+  return true;
+}
+
+Log::KeyList Coff::Archive::information() const
+{
+  Log::KeyList keys(i18n("Information:"));
+  keys.append(i18n("No. of file members:"), QString::number(members().count()));
+  keys.append(i18n("No. of symbols:"), QString::number(symbols().count()));
+  return keys;
+}
+
+Log::KeyList Coff::Archive::membersInformation() const
+{
+  Log::KeyList keys(i18n("File Members:"));
+  QMap<QString, Member *>::const_iterator it;
+  for (it=members().begin(); it!=members().end(); ++it)
+    keys.append(it.key(), i18n("size: %1 bytes").arg(it.data()->nbBytes()));
+  return keys;
+}
+
+Log::KeyList Coff::Archive::symbolsInformation() const
+{
+  Log::KeyList keys(i18n("Symbols:"));
+  QMap<QString, Member *>::const_iterator it;
+  for (it=symbols().begin(); it!=symbols().end(); ++it)
+    keys.append(it.key(), it.data()->name());
+  return keys;
+}
diff --git a/src/coff/base/coff_archive.h b/src/coff/base/coff_archive.h
new file mode 100644
index 0000000..ba43a38
--- /dev/null
+++ b/src/coff/base/coff_archive.h
@@ -0,0 +1,53 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef COFF_ARCHIVE_H
+#define COFF_ARCHIVE_H
+
+#include "coff.h"
+
+namespace Coff
+{
+//----------------------------------------------------------------------------
+class Member
+{
+public:
+  Member(const QByteArray &data, uint &offset, Log::Base &log);
+  QString name() const { return _name; }
+  uint nbBytes() const { return _nbBytes; }
+
+private:
+  QString _name;
+  uint    _nbBytes;
+};
+
+//----------------------------------------------------------------------------
+class Archive : public Base
+{
+public:
+  Archive(const PURL::Url &url);
+  virtual ~Archive();
+  virtual bool parse(Log::Base &log);
+  const QMap<QString, Member *>members() const { return _members; }
+  const QMap<QString, Member *>symbols() const { return _symbols; }
+
+  virtual Log::KeyList information() const;
+  Log::KeyList membersInformation() const;
+  Log::KeyList symbolsInformation() const;
+
+private:
+  QMap<QString, Member *> _members; // name -> Member *
+  QMap<uint, Member *>    _offsets; // offset -> Member *
+  QMap<QString, Member *> _symbols; // name -> Member *
+
+  bool readSymbols(const QByteArray &data, uint offset, Log::Base &log);
+};
+
+} // namespace
+
+#endif
diff --git a/src/coff/base/coff_data.h b/src/coff/base/coff_data.h
new file mode 100644
index 0000000..9676e42
--- /dev/null
+++ b/src/coff/base/coff_data.h
@@ -0,0 +1,22 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef COFF_DATA_H
+#define COFF_DATA_H
+
+namespace Coff
+{
+  enum { MAX_NB_IDS = 2 };
+  struct Data {
+    uint ids[MAX_NB_IDS];
+  };
+  extern QString findId(uint id);
+
+} // namespace
+
+#endif
diff --git a/src/coff/base/coff_object.cpp b/src/coff/base/coff_object.cpp
new file mode 100644
index 0000000..f4109f9
--- /dev/null
+++ b/src/coff/base/coff_object.cpp
@@ -0,0 +1,658 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "coff_object.h"
+
+#include "common/common/misc.h"
+#include "devices/list/device_list.h"
+#include "devices/base/device_group.h"
+#include "devices/pic/base/pic_register.h"
+#include "coff_data.h"
+#include "common/global/pfile.h"
+
+//----------------------------------------------------------------------------
+bool Coff::getName(const QByteArray &data, uint &offset, uint nbChars, uint stringTableOffset,
+                   Log::Base &log, QString &name)
+{
+  Q_UINT32 v;
+  if ( !getULong(data, offset, 4, log, v) ) return false;
+  if ( v!=0 ) { // name is not in string table
+    offset -= 4;
+    return getString(data, offset, nbChars, log, name);
+  }
+  if ( !getULong(data, offset, 4, log, v) ) return false;
+  // ### do a sanity check here
+  name = QString(data.data()+stringTableOffset+v);
+  return true;
+}
+
+const Coff::OptHeaderFormat::Data Coff::OptHeaderFormat::DATA[Nb_Types] = {
+  { 0, I18N_NOOP("Old Microchip") },
+  { 0, I18N_NOOP("New Microchip") },
+  { 0, I18N_NOOP("PICC Compiler") },
+  { 0, I18N_NOOP("CCS Compiler")  }
+};
+
+const Coff::OptHeaderData Coff::OPT_HEADER_DATA[] = {
+  { 0x5678, OptHeaderFormat::OldMicrochip, true  },
+  { 0x0000, OptHeaderFormat::NewMicrochip, true  },
+  { 0x0001, OptHeaderFormat::NewMicrochip, true  }, // PIC30 with debug
+  { 0x1388, OptHeaderFormat::Picc,         false }, // PICC
+  { 0x1B78, OptHeaderFormat::Ccsc,         false }, // CCSC
+  { 0x0000, OptHeaderFormat::Nb_Types,     false }
+};
+
+//----------------------------------------------------------------------------
+const Coff::AuxSymbolType::Data Coff::AuxSymbolType::DATA[Nb_Types] = {
+  { 0, I18N_NOOP("Direct") },
+  { 0, I18N_NOOP("File") },
+  { 0, I18N_NOOP("Indentifier") },
+  { 0, I18N_NOOP("Section") }
+};
+
+Coff::AuxSymbol *Coff::AuxSymbol::factory(const Object &object, AuxSymbolType type, const QByteArray &data, uint offset, uint stringTableOffset, Log::Base &log)
+{
+  switch (type.type()) {
+    case AuxSymbolType::Direct:     return new AuxSymbolDirect(object, data, offset, stringTableOffset, log);
+    case AuxSymbolType::File:       return new AuxSymbolFile(object, data, offset, stringTableOffset, log);
+    case AuxSymbolType::Identifier: return new AuxSymbolIdentifier(object, data, offset, stringTableOffset, log);
+    case AuxSymbolType::Section:    return new AuxSymbolSection(object, data, offset, stringTableOffset, log);
+    case AuxSymbolType::Nb_Types:   return new AuxSymbolUnknown(object);
+  }
+  Q_ASSERT(false);
+  return 0;
+}
+
+Coff::AuxSymbolDirect::AuxSymbolDirect(const Object &object, const QByteArray &data, uint start, uint stringTableOffset, Log::Base &log)
+  : AuxSymbol(object)
+{
+  uint offset = start;
+  Q_UINT32 v;
+  if ( !getULong(data, offset, 1, log, v) ) return;
+  _command = v;
+  if ( !getULong(data, offset, 4, log, v) ) return;
+  _string = QString(data.data()+stringTableOffset+v);
+}
+
+Coff::AuxSymbolFile::AuxSymbolFile(const Object &object, const QByteArray &data, uint start, uint stringTableOffset, Log::Base &log)
+  : AuxSymbol(object)
+{
+  uint offset = start;
+  Q_UINT32 v;
+  if ( object.format()==Format::PIC30 ) {
+    if ( !getName(data, offset, 14, stringTableOffset, log, _filename) ) return;
+    _line = 0;
+  } else {
+    if ( !getULong(data, offset, 4, log, v) ) return;
+    _filename = QString(data.data()+stringTableOffset+v);
+    if ( !getULong(data, offset, 4, log, v) ) return;
+    _line = v;
+  }
+}
+
+Coff::AuxSymbolIdentifier::AuxSymbolIdentifier(const Object &object, const QByteArray &data, uint start, uint stringTableOffset, Log::Base &log)
+  : AuxSymbol(object)
+{
+  uint offset = start;
+  Q_UINT32 v;
+  if ( !getULong(data, offset, 4, log, v) ) return;
+  _string = QString(data.data()+stringTableOffset+v);
+}
+
+Coff::AuxSymbolSection::AuxSymbolSection(const Object &object, const QByteArray &data, uint start, uint, Log::Base &log)
+  : AuxSymbol(object)
+{
+  uint offset = start;
+  Q_UINT32 v;
+  if ( !getULong(data, offset, 4, log, v) ) return;
+  _length = v;
+  if ( !getULong(data, offset, 2, log, v) ) return;
+  _nbRelocations = v;
+  if ( !getULong(data, offset, 2, log, v) ) return;
+  _nbLineNumbers = v;
+}
+
+//----------------------------------------------------------------------------
+const Coff::SymbolSectionType::Data Coff::SymbolSectionType::DATA[Nb_Types] = {
+  { 0, I18N_NOOP("Inside Section") },
+  { 0, I18N_NOOP("Undefined Section") },
+  { 0, I18N_NOOP("Absolute Value") },
+  { 0, I18N_NOOP("Debug Symbol") }
+};
+
+const Coff::SymbolClass::Data Coff::SymbolClass::DATA[Nb_Types] = {
+  { 0, I18N_NOOP("Automatic Variable"), 1 },
+  { 0, I18N_NOOP("External Symbol"), 2 },
+  { 0, I18N_NOOP("Static Symbol"), 3 },
+  { 0, I18N_NOOP("Register Variable"), 4 },
+  { 0, I18N_NOOP("External Definition"), 5 },
+  { 0, I18N_NOOP("Label"), 6 },
+  { 0, I18N_NOOP("Undefined Label"), 7 },
+  { 0, I18N_NOOP("Member of Structure"), 8 },
+  { 0, I18N_NOOP("Function Argument"), 9 },
+  { 0, I18N_NOOP("Structure Tag"), 10 },
+  { 0, I18N_NOOP("Member of Union"), 11 },
+  { 0, I18N_NOOP("Union Tag"), 12 },
+  { 0, I18N_NOOP("Type Definition"), 13 },
+  { 0, I18N_NOOP("Undefined Static"), 14 },
+  { 0, I18N_NOOP("Enumeration Tag"), 15 },
+  { 0, I18N_NOOP("Member of Enumeration"), 16 },
+  { 0, I18N_NOOP("Register Parameter"), 17 },
+  { 0, I18N_NOOP("Bit Field"), 18 },
+  { 0, I18N_NOOP("Auto Argument"), 19 },
+  { 0, I18N_NOOP("Dummy Entry (end of block)"), 20 },
+  { 0, I18N_NOOP("Beginning or End of Block"), 100 },
+  { 0, I18N_NOOP("Beginning or End of Function"), 101 },
+  { 0, I18N_NOOP("End of Structure"), 102 },
+  { 0, I18N_NOOP("Filename"), 103 },
+  { 0, I18N_NOOP("Line Number"), 104 },
+  { 0, I18N_NOOP("Duplicate Tag"), 105 },
+  { 0, I18N_NOOP("Section"), 109 }
+};
+
+const Coff::SymbolType::Data Coff::SymbolType::DATA[Nb_Types] = {
+  { 0, I18N_NOOP("Void"), 0x0001 },
+  { 0, I18N_NOOP("Char"), 0x0010 },
+  { 0, I18N_NOOP("Short"), 0x0011 },
+  { 0, I18N_NOOP("Int"), 0x0100 },
+  { 0, I18N_NOOP("Long"), 0x0101 },
+  { 0, I18N_NOOP("Float"), 0x0110 },
+  { 0, I18N_NOOP("Double"), 0x0111 },
+  { 0, I18N_NOOP("Structure"), 0x1000 },
+  { 0, I18N_NOOP("Union"), 0x1001 },
+  { 0, I18N_NOOP("Enumeration"), 0x1010 },
+  { 0, I18N_NOOP("Member Of Enumeration"), 0x1011 },
+  { 0, I18N_NOOP("Unsigned Char"), 0x1100 },
+  { 0, I18N_NOOP("Unsigned Short"), 0x1101 },
+  { 0, I18N_NOOP("Unsigned Int"), 0x1110 },
+  { 0, I18N_NOOP("Unsigned Long"), 0x1111 },
+  { 0, I18N_NOOP("Long Double"), 0x10000 }
+};
+
+const Coff::SymbolDerivedType::Data Coff::SymbolDerivedType::DATA[Nb_Types] = {
+  { 0, I18N_NOOP("Pointer"),     0x010000 },
+  { 0, I18N_NOOP("Function"),    0x100000 },
+  { 0, I18N_NOOP("Array"),       0x110000 }
+};
+
+Coff::Symbol::Symbol(const Object &object, const QByteArray &data, uint start,
+                     uint stringTableOffset, const QString &lastFilename, Log::Base &log)
+  : BaseSymbol(object)
+{
+  uint offset = start;
+  Q_UINT32 v;
+  if ( !getName(data, offset, 8, stringTableOffset, log, _name) ) return;
+  if ( !getULong(data, offset, 4, log, v) ) return;
+  _value = v;
+  if ( !getULong(data, offset, 2, log, v) ) return;
+  _section = v;
+  uint nb = (object.format()==Format::NewMicrochip ? 4 : 2);
+  if ( !getULong(data, offset, nb, log, v) ) return;
+  _type = SymbolType::Nb_Types;
+  FOR_EACH(SymbolType, type)
+    if ( (v & 0x001111)==type.data().id ) { _type = type; break; }
+  _dtype = SymbolDerivedType::Nb_Types;
+  FOR_EACH(SymbolDerivedType, dtype)
+    if ( (v & 0x110000)==dtype.data().id ) { _dtype = dtype; break; }
+  if ( !getULong(data, offset, 1, log, v) ) return;
+  _sclass = SymbolClass::Nb_Types;
+  FOR_EACH(SymbolClass, sclass)
+    if ( v==sclass.data().id ) { _sclass = sclass; break; }
+  if ( !getULong(data, offset, 1, log, v) ) return;
+  uint nbAux = v;
+  //qDebug("symbol: %s value=%s type=%i dtype=%i class=%i nbAux=%i section=%i", _name.latin1(), toHexLabel(_value, 4).latin1(), _type, _dtype, _class, nbAux, _section);
+
+  AuxSymbolType auxType = AuxSymbolType::Nb_Types;
+  if ( _name==".direct" ) auxType = AuxSymbolType::Direct;
+  else if ( _name==".ident" ) auxType = AuxSymbolType::Identifier;
+  else if ( _sclass==SymbolClass::Filename ) auxType = AuxSymbolType::File;
+  else if ( _sclass==SymbolClass::Section ) auxType = AuxSymbolType::Section;
+  if ( auxType!=AuxSymbolType::Nb_Types && nbAux==0 ) log.log(Log::LineType::Warning, i18n("Symbol without needed auxilliary symbol (type=%1)").arg(auxType.type()));
+  Q_ASSERT( (offset-start)==object.size(SymbolSize) );
+  _aux.resize(nbAux);
+  for (uint i=0; i<nbAux; i++) {
+    _aux[i] = AuxSymbol::factory(object, auxType, data, offset, stringTableOffset, log);
+    offset += object.size(SymbolSize);
+    if ( log.hasError() ) return;
+  }
+
+  _filename = lastFilename;
+  for (uint i=0; i<uint(_aux.count()); i++)
+    if ( _aux[i]->type()==AuxSymbolType::File ) _filename = static_cast<AuxSymbolFile *>(_aux[i])->filename();
+}
+
+Coff::SymbolSectionType Coff::Symbol::sectionType() const
+{
+  switch (_section) {
+    case 0x0000: return SymbolSectionType::UndefinedSection;
+    case 0xFFFF: return SymbolSectionType::AbsoluteValue;
+    case 0xFFFE: return SymbolSectionType::DebugSymbol;
+  }
+  return SymbolSectionType::InsideSection;
+}
+
+//----------------------------------------------------------------------------
+Coff::Relocation::Relocation(const Object &object, const Section &section,
+                             const QByteArray &data, uint start, Log::Base &log)
+  : Element(object), _symbol(0)
+{
+  uint offset = start;
+  Q_UINT32 v;
+  if ( !getULong(data, offset, 4, log, v) ) return;
+  _address = v;
+  if ( _address>section.size() ) log.log(Log::LineType::Warning, i18n("Relocation address beyong section size: %1/%2").arg(v).arg(section.size()));
+  if ( !getULong(data, offset, 4, log, v) ) return;
+  if ( v>=object.nbSymbols() ) {
+    log.log(Log::LineType::Error, i18n("Relocation has unknown symbol: %1").arg(v));
+    return;
+  }
+  if ( object.symbol(v)->isAuxSymbol() ) {
+    log.log(Log::LineType::Error, i18n("Relocation is an auxiliary symbol: %1").arg(v));
+    return;
+  }
+  _symbol = static_cast<const Symbol *>(object.symbol(v));
+  if ( object.format()!=Format::PIC30 ) {
+    if ( !getULong(data, offset, 2, log, v) ) return;
+    _offset = short(v);
+  }
+  if ( !getULong(data, offset, 2, log, v) ) return;
+  _type = v;
+  //qDebug("reloc %s: address=%s offset=%i type=%i", _symbol->_name.latin1(), toHexLabel(_address, 4).latin1(), _offset, _type);
+}
+
+//----------------------------------------------------------------------------
+Coff::CodeLine::CodeLine(const Object &object, const Section &section,
+                         const QByteArray &data, uint start, const QString &lastFilename, Log::Base &log)
+  : Element(object), _section(section), _symbol(0)
+{
+  uint offset = start;
+  Q_UINT32 v;
+  if ( !getULong(data, offset, 4, log, v) ) return;
+  uint tmp = v;
+  if ( object.format()==Format::PIC30 ) {
+    if ( !getULong(data, offset, 4, log, v) ) return;
+    _line = v;
+    if ( _line!=0 ) {
+      _address = tmp;
+      _filename = lastFilename;
+      //qDebug("code line %i: %s", _line, toHexLabel(_address, nbChars(_address)).latin1());
+    } else {
+      if ( tmp>=object.nbSymbols() ) {
+        log.log(Log::LineType::Error, i18n("Codeline has unknown symbol: %1").arg(tmp));
+        return;
+      }
+      if ( object.symbol(tmp)->isAuxSymbol() ) {
+        log.log(Log::LineType::Error, i18n("Codeline is an auxiliary symbol: %1").arg(tmp));
+        return;
+      }
+      _symbol = static_cast<const Symbol *>(object.symbol(tmp));
+      _filename = _symbol->filename();
+      //qDebug("code line %i: %s", _line, _symbol->_name.latin1());
+    }
+  } else {
+    if ( tmp>=object.nbSymbols() ) {
+      log.log(Log::LineType::Error, i18n("Codeline has unknown symbol: %1").arg(tmp));
+      return;
+    }
+    if ( object.symbol(tmp)->isAuxSymbol() ) {
+      log.log(Log::LineType::Error, i18n("Codeline is an auxiliary symbol: %1").arg(tmp));
+      return;
+    }
+    _symbol = static_cast<const Symbol *>(object.symbol(tmp));
+    _filename = _symbol->filename();
+    if ( !getULong(data, offset, 2, log, v) ) return;
+    _line = v;
+    if ( object.optHeaderFormat()==OptHeaderFormat::Picc && _line>=2 ) _line -= 2; // #### ??
+    if ( !getULong(data, offset, 4, log, v) ) return;
+    _address = v;
+    if ( !getULong(data, offset, 2, log, v) ) return;
+    // flags
+    if ( !getULong(data, offset, 4, log, v) ) return;
+    // function index
+    //qDebug("code line %i: %s", _line, toHexLabel(_address, nbChars(_address)).latin1());
+  }
+//  if ( _symbol && _symbol->_class!=Symbol::CFile )
+//    log.log(Log::LineType::Warning, i18n("Line without file symbol associated (%1:%2 %3).")
+//                         .arg(_section._name).arg(toHexLabel(_address, nbChars(_address))).arg(_symbol->_class));
+}
+
+//----------------------------------------------------------------------------
+const Coff::SectionType::Data Coff::SectionType::DATA[Nb_Types] = {
+  { 0, I18N_NOOP("Config") },
+  { 0, I18N_NOOP("Device ID") },
+  { 0, I18N_NOOP("User IDs") },
+  { 0, I18N_NOOP("Uninitialized Data") },
+  { 0, I18N_NOOP("Initialized Data") },
+  { 0, I18N_NOOP("Rom Data") },
+  { 0, I18N_NOOP("Code") }
+};
+
+Coff::Section::Section(const Device::Data &device, const Object &object,
+                       const QByteArray &data, uint start, uint stringTableOffset, Log::Base &log)
+  : Element(object)
+{
+  uint offset = start;
+  Q_UINT32 v;
+  if ( !getName(data, offset, 8, stringTableOffset, log, _name) ) return;
+  if ( !getULong(data, offset, 4, log, v) ) return;
+  _address = v;
+  if ( !getULong(data, offset, 4, log, v) ) return;
+  //if ( _address!=v ) log.log(Log::LineType::Warning, i18n("Virtual address (%1) does not match physical address (%2) in %3.")
+  //                                         .arg(toHexLabel(v, 4)).arg(toHexLabel(_address, 4)).arg(_name));
+  if ( !getULong(data, offset, 4, log, v) ) return;
+  _size = v;
+  if ( !getULong(data, offset, 4, log, v) ) return;
+  uint dataOffset = v;
+  if ( !getULong(data, offset, 4, log, v) ) return;
+  uint relocationOffset = v;
+  if ( !getULong(data, offset, 4, log, v) ) return;
+  uint lineNumberOffset = v;
+  if ( !getULong(data, offset, 2, log, v) ) return;
+  uint nbRelocations = v;
+  if ( !getULong(data, offset, 2, log, v) ) return;
+  uint nbLineNumbers = v;
+  if ( !getULong(data, offset, 4, log, v) ) return;
+  _flags = v;
+
+  // read data
+  Q_ASSERT ( device.group().name()=="pic" );
+  const Pic::Data &pdata = static_cast<const Pic::Data &>(device);
+  //qDebug("section %s: address=%s size=%i flags=%i", _name.data(), toHexLabel(_address, 4).latin1(), _size, int(_flags));
+  if ( _size!=0 && dataOffset!=0 ) {
+    uint inc = 1;
+    uint nbWords = _size;
+    uint nbBytesWord = 1;
+    bool b = ( (_flags & FText) || (_flags & FDataRom) );
+    if (b) {
+      nbBytesWord = pdata.nbBytesWord(Pic::MemoryRangeType::Code);
+      nbWords /= nbBytesWord;
+      inc = pdata.addressIncrement(Pic::MemoryRangeType::Code);
+    }
+    for (uint i=0; i<nbWords; i++) {
+      Address address = _address + inc*i;
+      if ( !getULong(data, dataOffset, nbBytesWord, log, v) ) return;
+      _instructions[address].value = v;
+    }
+    for (uint i=0; i<nbWords; i++) {
+      Address address = _address + inc*i;
+      BitValue op = _instructions[address].value;
+      if ( _flags & FText ) {
+        char buffer[512];
+        buffer[0] = 0;
+        BitValue op2 = ((i+1)<nbWords ? _instructions[address+inc].value : 0);
+        uint nbop = disassemble(op.toUInt(), op2.toUInt(), address.toUInt()/inc, pdata.architecture(), buffer, 512);
+        _instructions[address].disasm = QString(buffer);
+        _instructions[address].opcode = toHex(op, pdata.nbCharsWord(Pic::MemoryRangeType::Code));
+        if ( nbop==2 ) {
+          _instructions[address+inc].opcode = toHex(op2, pdata.nbCharsWord(Pic::MemoryRangeType::Code));
+          i++;
+        }
+        //qDebug("  %s: %s (%s %s)", toHex(address, 4).data(), _data[address].disasm.data(), _data[address].opcode.data(), (nbop==2 ? _data[address+inc].opcode.data() : ""));
+      } else if ( _flags & FDataRom ) _instructions[address].opcode = toHex(op, 4);
+      else if ( _flags & FData ) _instructions[address].opcode = toHex(op.maskWith(0xFF), 2);
+    }
+  }
+
+  // read relocations
+  if ( relocationOffset!=0 ) {
+    _relocations.resize(nbRelocations);
+    for (uint i=0; i<nbRelocations; i++) {
+      _relocations[i] = new Relocation(object, *this, data, relocationOffset, log);
+      relocationOffset += object.size(RelocationSize);
+      if ( log.hasError() ) return;
+    }
+  }
+
+  // read line numbers
+  if ( lineNumberOffset!=0 ) {
+    QString lastFilename;
+    _lines.resize(nbLineNumbers);
+    for (uint i=0; i<nbLineNumbers; i++) {
+      _lines[i] = new CodeLine(object, *this, data, lineNumberOffset, lastFilename, log);
+      lastFilename = _lines[i]->filename();
+      lineNumberOffset += object.size(LineNumberSize);
+      if ( log.hasError() ) return;
+    }
+  }
+}
+
+Coff::Section::~Section()
+{
+  for (uint i=0; i<uint(_relocations.count()); i++) delete _relocations[i];
+  for (uint i=0; i<uint(_lines.count()); i++) delete _lines[i];
+}
+
+Coff::SectionType Coff::Section::type() const
+{
+  if ( _name==".config" ) return SectionType::Config;
+  if ( _name==".devid" ) return SectionType::DeviceId;
+  if ( _name==".idlocs" ) return SectionType::UserIds;
+  if ( _flags & FText ) return SectionType::Code;
+  if ( _flags & FData ) return SectionType::InitializedData;
+  if ( _flags & FBSS ) return SectionType::UninitializedData;
+  if ( _flags & FDataRom ) return SectionType::DataRom;
+  return SectionType::Nb_Types;
+}
+
+//----------------------------------------------------------------------------
+Coff::Object::Object(const Device::Data *device, const PURL::Url &url)
+  : Base(url), _device(device)
+{}
+
+bool Coff::Object::parse(Log::Base &log)
+{
+  // header
+  QByteArray data;
+  uint offset = 0;
+  if ( !initParse(CoffType::Object, data, offset, log) ) return false;
+  if ( _format==Format::Nb_Types ) {
+    log.log(Log::LineType::Error, i18n("COFF format not supported: magic number is %1.").arg(toHexLabel(_magic, 4)));
+    return false;
+  }
+  log.log(Log::DebugLevel::Extra, QString("COFF format: %1").arg(toHexLabel(_magic, 4)));
+  if ( !parseHeader(data, offset, log) ) return false;
+
+  // optionnal header
+  Q_ASSERT( offset==size(HeaderSize) );
+  if ( !getULong(data, offset, 2, log, _optHeaderMagic) ) return false;
+  log.log(Log::DebugLevel::Extra, QString("COFF optionnal header format: %1").arg(toHexLabel(_optHeaderMagic, 4)));
+  _optHeaderFormat = OptHeaderFormat::Nb_Types;
+  uint i = 0;
+  for (; OPT_HEADER_DATA[i].optHeaderFormat!=OptHeaderFormat::Nb_Types; i++) if ( _optHeaderMagic==OPT_HEADER_DATA[i].magic ) break;
+  _optHeaderFormat = OPT_HEADER_DATA[i].optHeaderFormat;
+  if ( _optHeaderFormat==OptHeaderFormat::Nb_Types ) {
+    log.log(Log::LineType::Warning, i18n("Optional header format not supported: magic number is %1.").arg(toHexLabel(_optHeaderMagic, 4)));
+    offset += size(OptHeaderSize)-2;
+  } else if ( !OPT_HEADER_DATA[i].parsed ) {
+    log.log(Log::DebugLevel::Normal, QString("Optional header not parsed: magic number is %1.").arg(toHexLabel(_optHeaderMagic, 4)));
+    offset += size(OptHeaderSize)-2;
+  } else if ( !parseOptionnalHeader(data, offset, log) ) return false;
+
+  // parse symbol table
+  uint stringTableOffset = _symbolOffset + _nbSymbols*size(SymbolSize);
+  QString lastFilename;
+  _symbols.resize(_nbSymbols);
+  for (uint i=0; i<_nbSymbols; i++) {
+    Symbol *s = new Symbol(*this, data, _symbolOffset, stringTableOffset, lastFilename, log);
+    if ( log.hasError() ) return false;
+    if ( !s->filename().isEmpty() ) lastFilename = s->filename();
+    _symbols[i] = s;
+    _msymbols[s->name()] = s;
+    _symbolOffset += size(SymbolSize);
+    for (uint k=0; k<uint(s->auxSymbols().count()); k++) {
+      i++;
+      _symbols[i] = s->auxSymbols()[k];
+      _symbolOffset += size(SymbolSize);
+    }
+  }
+
+  // parse sections
+  Q_ASSERT( offset==(size(HeaderSize) + size(OptHeaderSize)) );
+  _sections.resize(_nbSections);
+  for (uint i=0; i<_nbSections; i++) {
+    _sections[i] = new Section(*_device, *this, data, offset, stringTableOffset, log);
+    offset += size(SectionHeaderSize);
+    if ( log.hasError() ) return false;
+  }
+
+  // extract filenames
+  for (uint i=0; i<_nbSymbols; i++) {
+    if ( _symbols[i]==0 || _symbols[i]->isAuxSymbol() ) continue;
+    QString s = static_cast<const Symbol *>(_symbols[i])->filename();
+    if ( s.isEmpty() || s=="fake" || _filenames.contains(s) ) continue;
+    _filenames.append(s);
+  }
+
+  // extract variables
+  for (uint i=0; i<nbSymbols(); i++) {
+    if ( _symbols[i]==0 || _symbols[i]->isAuxSymbol() ) continue;
+    const Symbol *sym = static_cast<const Symbol *>(_symbols[i]);
+    if ( sym->symbolClass()!=SymbolClass::Static ) continue;
+    if ( sym->sectionType()!=SymbolSectionType::InsideSection ) continue;
+    QString name = sym->name();
+    if ( name.startsWith("_$_") || name.startsWith("__") || name.startsWith(".") ) continue; // special variables (?)
+    _variables[name] = sym->value() & 0xFFF; // #### ??
+  }
+
+  return true;
+}
+
+bool Coff::Object::parseHeader(const QByteArray &data, uint &offset, Log::Base &log)
+{
+  Q_UINT32 v;
+  if ( !getULong(data, offset, 2, log, v) ) return false;
+  _nbSections = v;
+  if ( !getULong(data, offset, 4, log, v) ) return false;
+//  time_t time = v;
+  if ( !getULong(data, offset, 4, log, v) ) return false;
+  _symbolOffset = v;
+  if ( !getULong(data, offset, 4, log, v) ) return false;
+  _nbSymbols = v;
+  if ( !getULong(data, offset, 2, log, v) ) return false;
+  if ( v!=size(OptHeaderSize) ) {
+    log.log(Log::LineType::Error, i18n("Optionnal header size is not %1: %2").arg(size(OptHeaderSize)).arg(v));
+    return false;
+  }
+  if ( !getULong(data, offset, 2, log, v) ) return false;
+  _flags = Flags(v);
+  return true;
+}
+
+bool Coff::Object::parseOptionnalHeader(const QByteArray &data, uint &offset, Log::Base &log)
+{
+  Q_UINT32 v;
+  int nb = (_format==Format::NewMicrochip ? 4 : 2);
+  if ( !getULong(data, offset, nb, log, v) ) return false; // version stamp
+  if ( _format==Format::PIC30 ) {
+    if ( !getULong(data, offset, 4, log, v) ) return false; // text               size in bytes, padded to firmware boundary
+    if ( !getULong(data, offset, 4, log, v) ) return false; // initialized data   "
+    if ( !getULong(data, offset, 4, log, v) ) return false; // uninitialized data "
+    if ( !getULong(data, offset, 4, log, v) ) return false; // entry point
+    if ( !getULong(data, offset, 4, log, v) ) return false; // offset of text
+    if ( !getULong(data, offset, 4, log, v) ) return false; // offset of data
+    if ( _device==0 ) _device = Device::lister().data("30F2010"); // for e.g.
+  } else {
+    if ( !getULong(data, offset, 4, log, v) ) return false;
+    // #### at least for C18 compiler, it can be compiled for generic processor: in such case
+    // the pic type will be 18C452 in non-extended mode and 18F4620 for extended mode...
+    QString name = Coff::findId(v);
+    log.log(Log::DebugLevel::Normal, QString("Device name: \"%1\"").arg(name));
+    if ( name.isEmpty() ) {
+      log.log(Log::DebugLevel::Normal, QString("Unknown processor type: %1").arg(toHexLabel(v, 4)));
+      log.log(Log::LineType::Error, i18n("Could not determine processor (%1).").arg(toHexLabel(v, 4)));
+      return false;
+    } else if ( _device==0 ) _device = Device::lister().data(name);
+    else if ( name!=_device->name() ) log.log(Log::DebugLevel::Normal, QString("Different processor name: %1").arg(name));
+    if ( !getULong(data, offset, 4, log, v) ) return false;
+    const Pic::Data *pdata = static_cast<const Pic::Data *>(_device);
+    if (pdata) {
+      uint nbBits = pdata->nbBitsWord(Pic::MemoryRangeType::Code) / pdata->addressIncrement(Pic::MemoryRangeType::Code);
+      if ( v!=nbBits ) log.log(Log::DebugLevel::Normal, QString("Rom width is not %1: %2").arg(nbBits).arg(v));
+    }
+    if ( !getULong(data, offset, 4, log, v) ) return false;
+    if (pdata) {
+      uint nbBits = pdata->registersData().nbBits();
+      if ( v!=nbBits ) log.log(Log::DebugLevel::Normal, QString("Ram width is not %1: %2").arg(nbBits).arg(v));
+    }
+  }
+  return true;
+}
+
+Coff::Object::~Object()
+{
+  for (uint i=0; i<nbSymbols(); i++) delete _symbols[i];
+  for (uint i=0; i<nbSections(); i++) delete _sections[i];
+}
+
+QString Coff::Object::variableName(Address address) const
+{
+  QMap<QString, Address>::const_iterator it;
+  for (it=_variables.begin(); it!=_variables.end(); ++it)
+    if ( it.data()==address ) return it.key();
+  return QString::null;
+}
+
+//----------------------------------------------------------------------------
+QValueVector<Pic::RegisterNameData> Pic::sfrList(const Pic::Data &data)
+{
+  QValueVector<Pic::RegisterNameData> list;
+  const Pic::RegistersData &rdata = data.registersData();
+  for (uint i=0; i<rdata.nbRegisters(); i++) {
+    uint address = rdata.nbBytes() * i;
+    Pic::RegisterType type = rdata.type(address);
+    Device::RegisterProperties rp = rdata.properties(address);
+    if ( !(rp & Device::Readable) ) continue;
+    Register::TypeData rtd(address, rdata.nbChars());
+    if ( type==Pic::Sfr ) list.append(Pic::RegisterNameData(rdata.label(address), rtd));
+  }
+  QMap<QString, Pic::CombinedData>::const_iterator it;
+  for (it=rdata.combined.begin(); it!=rdata.combined.end(); ++it) {
+    Register::TypeData td(it.key(), it.data().address, it.data().nbChars);
+    list.append(Pic::RegisterNameData(it.key(), td));
+  }
+  if ( data.architecture()==Pic::Architecture::P16X )
+    list.append(Pic::RegisterNameData("WREG", Register::TypeData("WREG", rdata.nbChars())));
+  qHeapSort(list);
+  return list;
+}
+
+QValueVector<Pic::RegisterNameData> Pic::gprList(const Pic::Data &data, const Coff::Object *coff)
+{
+  QValueVector<Pic::RegisterNameData> list;
+  const Pic::RegistersData &rdata = data.registersData();
+  for (uint i=0; i<rdata.nbRegisters(); i++) {
+    uint address = rdata.nbBytes() * i;
+    Pic::RegisterType type = rdata.type(address);
+    Device::RegisterProperties rp = rdata.properties(address);
+    if ( !(rp & Device::Readable) ) continue;
+    if (type==Pic::Gpr ) {
+      QString s = toHexLabel(address, rdata.nbCharsAddress());
+      if (coff) {
+        QString name = coff->variableName(address);
+        if ( !name.isEmpty() ) s += " (" + name + ")";
+      }
+      Register::TypeData rtd(address, rdata.nbChars());
+      list.append(Pic::RegisterNameData(s, rtd));
+    }
+  }
+  return list;
+}
+
+QValueVector<Pic::RegisterNameData> Pic::variableList(const Pic::Data &data, const Coff::Object &coff)
+{
+  QValueVector<Pic::RegisterNameData> list;
+  const Pic::RegistersData &rdata = data.registersData();
+  QMap<QString, Address> variables = coff.variables();
+  QMap<QString, Address>::const_iterator vit;
+  for (vit=variables.begin(); vit!=variables.end(); ++vit) {
+    Register::TypeData rtd(vit.data(), rdata.nbChars());
+    list.append(Pic::RegisterNameData(vit.key() + " (" + toHexLabel(vit.data(), rdata.nbCharsAddress()) + ")", rtd));
+  }
+  qHeapSort(list);
+  return list;
+}
diff --git a/src/coff/base/coff_object.h b/src/coff/base/coff_object.h
new file mode 100644
index 0000000..8b98129
--- /dev/null
+++ b/src/coff/base/coff_object.h
@@ -0,0 +1,322 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef COFF_OBJECT_H
+#define COFF_OBJECT_H
+
+#include "coff.h"
+#include "devices/base/register.h"
+
+namespace Coff
+{
+//----------------------------------------------------------------------------
+extern bool getName(const QByteArray &data, uint &offset, uint nbChars, uint stringTableOffset, Log::Base &log, QString &name);
+extern int disassemble(long int opcode, long int opcode2, int org, Pic::Architecture architecture, char *buffer, size_t sizeof_buffer);
+
+BEGIN_DECLARE_ENUM(OptHeaderFormat)
+  OldMicrochip = 0, NewMicrochip, Picc, Ccsc
+END_DECLARE_ENUM_STD(OptHeaderFormat)
+
+struct OptHeaderData {
+  uint magic;
+  OptHeaderFormat optHeaderFormat;
+  bool parsed;
+};
+extern const OptHeaderData OPT_HEADER_DATA[];
+
+class Object;
+class Section;
+
+//----------------------------------------------------------------------------
+class Element
+{
+public:
+  Element(const Object &object) : _object(object) {}
+  virtual ~Element() {}
+
+protected:
+  const Object &_object;
+};
+
+//----------------------------------------------------------------------------
+class BaseSymbol : public Element
+{
+public:
+  BaseSymbol(const Object &object) : Element(object) {}
+  virtual bool isAuxSymbol() const = 0;
+};
+
+BEGIN_DECLARE_ENUM(AuxSymbolType)
+  Direct = 0, File, Identifier, Section
+END_DECLARE_ENUM_STD(AuxSymbolType)
+
+class AuxSymbol : public BaseSymbol
+{
+public:
+  virtual bool isAuxSymbol() const { return true; }
+  static AuxSymbol *factory(const Object &object, AuxSymbolType type, const QByteArray &data,
+                            uint offset, uint stringTableOffset, Log::Base &log);
+
+public:
+  AuxSymbol(const Object &object) : BaseSymbol(object) {}
+  virtual AuxSymbolType type() const = 0;
+};
+
+class AuxSymbolDirect : public AuxSymbol
+{
+public:
+  AuxSymbolDirect(const Object &object, const QByteArray &data, uint offset, uint stringTableOffset, Log::Base &log);
+  virtual AuxSymbolType type() const { return AuxSymbolType::Direct; }
+
+private:
+  uchar   _command;
+  QString _string;
+};
+
+class AuxSymbolFile : public AuxSymbol
+{
+public:
+  AuxSymbolFile(const Object &object, const QByteArray &data, uint offset, uint stringTableOffset, Log::Base &log);
+  virtual AuxSymbolType type() const { return AuxSymbolType::File; }
+  QString filename() const { return _filename; }
+  uint line() const { return _line; }
+
+private:
+  uint    _line;
+  QString _filename;
+};
+
+class AuxSymbolIdentifier : public AuxSymbol
+{
+public:
+  AuxSymbolIdentifier(const Object &object, const QByteArray &data, uint offset, uint stringTableOffset, Log::Base &log);
+  virtual AuxSymbolType type() const { return AuxSymbolType::Identifier; }
+  QString string() const { return _string; }
+
+private:
+  QString _string;
+};
+
+class AuxSymbolSection : public AuxSymbol
+{
+public:
+  AuxSymbolSection(const Object &object, const QByteArray &data, uint offset, uint stringTableOffset, Log::Base &log);
+  virtual AuxSymbolType type() const { return AuxSymbolType::Section; }
+
+private:
+  uint _length, _nbRelocations, _nbLineNumbers;
+};
+
+class AuxSymbolUnknown : public AuxSymbol
+{
+public:
+  AuxSymbolUnknown(const Object &object) : AuxSymbol(object) {}
+  virtual AuxSymbolType type() const { return AuxSymbolType::Nb_Types; }
+};
+
+//----------------------------------------------------------------------------
+BEGIN_DECLARE_ENUM(SymbolSectionType)
+  InsideSection = 0, UndefinedSection, AbsoluteValue, DebugSymbol
+END_DECLARE_ENUM_STD(SymbolSectionType)
+
+struct SymbolClassData {
+  const char *key, *label;
+  uint id;
+};
+BEGIN_DECLARE_ENUM(SymbolClass)
+  Automatic = 0, External, Static, Register, ExternalDefinition,
+  Label, UndefinedLabel, MemberOfStructure, FunctionArgument, StructureTag,
+  MemberOfUnion, UnionTag, TypeDefinition, UndefinedStatic, EnumerationTag,
+  MemberOfEnumeration, RegisterParameter, BitField, AutoArgument, EndOfBlock,
+  BeginEndOfBlock, BeginEndOfFunction, EndOfStructure, Filename, LineNumber,
+  DuplicateTag, Section
+END_DECLARE_ENUM(SymbolClass, SymbolClassData)
+
+struct SymbolTypeData {
+  const char *key, *label;
+  uint id;
+};
+BEGIN_DECLARE_ENUM(SymbolType)
+  Void = 0, Char, Short, Int, Long, Float, Double, Struct, Union,
+  Enum, MemberOfEnum, UChar, UShort, UInt, ULong, LongDouble
+END_DECLARE_ENUM(SymbolType, SymbolTypeData)
+
+struct SymbolDerivedTypeData {
+  const char *key, *label;
+  uint id;
+};
+BEGIN_DECLARE_ENUM(SymbolDerivedType)
+  Pointer = 0, Function, Array
+END_DECLARE_ENUM(SymbolDerivedType, SymbolDerivedTypeData)
+
+class Symbol : public BaseSymbol
+{
+public:
+  Symbol(const Object &object, const QByteArray &data, uint offset, uint stringTableOffset,
+         const QString &lastFilename, Log::Base &log);
+  virtual bool isAuxSymbol() const { return false; }
+  QString name() const { return _name; }
+  QString filename() const { return _filename; }
+  const QValueVector<AuxSymbol *> &auxSymbols() const { return _aux; }
+  SymbolClass symbolClass() const { return _sclass; }
+  SymbolSectionType sectionType() const;
+  SymbolType type() const { return _type; }
+  SymbolDerivedType derivedType() const { return _dtype; }
+  uint value() const { return _value; }
+  uint section() const { Q_ASSERT( sectionType()==SymbolSectionType::InsideSection ); return _section; }
+
+private:
+  QString _name, _filename;
+  uint _value, _section;
+  SymbolClass _sclass;
+  SymbolType  _type;
+  SymbolDerivedType _dtype;
+  QValueVector<AuxSymbol *> _aux;
+};
+
+//----------------------------------------------------------------------------
+class Relocation : public Element
+{
+public:
+  Relocation(const Object &object, const Section &section, const QByteArray &data,
+             uint offset, Log::Base &log);
+
+private:
+  ulong  _address, _type;
+  short  _offset;
+  const Symbol *_symbol;
+};
+
+//----------------------------------------------------------------------------
+class CodeLine : public Element
+{
+public:
+  CodeLine(const Object &object, const Section &section, const QByteArray &data,
+           uint offset, const QString &lastFilename, Log::Base &log);
+  const Section &section() const { return _section; }
+  QString filename() const { return _filename; }
+  uint line() const { return _line; }
+  Address address() const { return _address; }
+  const Symbol *symbol() const { return _symbol; }
+
+private:
+  const Section &_section;
+  uint           _line;
+  Address        _address;
+  QString        _filename;
+  const Symbol  *_symbol;
+};
+
+//----------------------------------------------------------------------------
+BEGIN_DECLARE_ENUM(SectionType)
+  Config = 0, DeviceId, UserIds, UninitializedData, InitializedData, DataRom, Code
+END_DECLARE_ENUM_STD(SectionType)
+
+class Section : public Element
+{
+public:
+  class InstructionData {
+  public:
+    BitValue value;
+    QString opcode, disasm;
+  };
+
+public:
+  Section(const Device::Data &device, const Object &object, const QByteArray &data, uint offset,
+          uint stringTableOffset, Log::Base &log);
+  ~Section();
+  SectionType type() const;
+  QString name() const { return _name; }
+  Address address() const { return _address; }
+  uint size() const { return _size; }
+  uint flags() const { return _flags; }
+  const QMap<Address, InstructionData> &instructions() const { return _instructions; }
+  const QValueVector<Relocation *> &relocations() const { return _relocations; }
+  const QValueVector<CodeLine *> &lines() const { return _lines; }
+
+private:
+  QString _name;
+  Address _address;
+  uint _size, _flags;
+  QMap<Address, InstructionData> _instructions;
+  QValueVector<Relocation *> _relocations;
+  QValueVector<CodeLine *> _lines;
+
+  enum Flag { FText = 0x00020, FData = 0x00040, FBSS = 0x00080, FDataRom = 0x00100,
+              FAbs = 0x01000, FShared = 0x02000, FOverlay = 0x04000, FAccess = 0x08000,
+              FActivationRecord = 0x10000 };
+};
+
+//----------------------------------------------------------------------------
+class Object : public Base
+{
+public:
+  Object(const Device::Data *device, const PURL::Url &url);
+  virtual ~Object();
+  virtual bool parse(Log::Base &log);
+  Format format() const { return _format; }
+  const Device::Data *device() const { return _device; }
+  uint size(SizeType stype) const { return _format.data().sizes[stype]; }
+  OptHeaderFormat optHeaderFormat() const { return _optHeaderFormat; }
+  uint optHeaderMagic() const { return _optHeaderMagic; }
+  uint nbSymbols() const { return _symbols.count(); }
+  const BaseSymbol *symbol(uint i) const { return _symbols[i]; }
+  const Symbol *symbol(const QString &name) const { return (_msymbols.contains(name) ? _msymbols[name] : 0); }
+  uint nbSections() const { return _sections.count(); }
+  const Section *section(uint i) const { return _sections[i]; }
+  const QStringList &filenames() const { return _filenames; }
+  const QMap<QString, Address> &variables() const { return _variables; }
+  QString variableName(Address address) const;
+
+  enum Flag { RelocationStripped = 0x0001, Executable = 0x0002, LineNumberStripped = 0x0004,
+              SymbolStripped = 0x0080, Extended18 = 0x4000, Generic = 0x8000 };
+  Q_DECLARE_FLAGS(Flags, Flag)
+
+protected:
+  Q_UINT32                _optHeaderMagic;
+  OptHeaderFormat         _optHeaderFormat;
+  const Device::Data     *_device;
+  uint                    _nbSections, _nbSymbols, _symbolOffset;
+  Flags                   _flags;
+  QValueVector<BaseSymbol *> _symbols;
+  QMap<QString, Symbol *>  _msymbols; // name -> Symbol *
+  QValueVector<Section *> _sections;
+  QStringList             _filenames;
+  QMap<QString, Address>  _variables; // name -> address
+
+  virtual bool parseHeader(const QByteArray &data, uint &offset, Log::Base &log);
+  virtual bool parseOptionnalHeader(const QByteArray &data, uint &offset, Log::Base &log);
+};
+Q_DECLARE_OPERATORS_FOR_FLAGS(Object::Flags)
+
+} // namespace
+
+//----------------------------------------------------------------------------
+namespace Pic
+{
+
+class RegisterNameData
+{
+public:
+  RegisterNameData() {}
+  RegisterNameData(const QString &label, const Register::TypeData &data) : _label(label), _data(data) {}
+  QString label() const { return _label; }
+  const Register::TypeData &data() const { return _data; }
+  bool operator <(const RegisterNameData &rnd) const { return _label<rnd._label; };
+
+private:
+  QString _label;
+  Register::TypeData _data;
+};
+extern QValueVector<RegisterNameData> sfrList(const Pic::Data &data);
+extern QValueVector<RegisterNameData> gprList(const Pic::Data &data, const Coff::Object *coff);
+extern QValueVector<RegisterNameData> variableList(const Pic::Data &data, const Coff::Object &coff);
+
+} // namespace
+
+#endif
diff --git a/src/coff/base/disassembler.cpp b/src/coff/base/disassembler.cpp
new file mode 100644
index 0000000..663c163
--- /dev/null
+++ b/src/coff/base/disassembler.cpp
@@ -0,0 +1,289 @@
+/***************************************************************************
+ *   Copyright (C) 2006-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "disassembler.h"
+
+#include <qregexp.h>
+
+#include "devices/base/device_group.h"
+#include "devices/pic/pic/pic_memory.h"
+#include "coff_object.h"
+
+//-----------------------------------------------------------------------------
+QString SourceLine::comment(PURL::SourceFamily family, const QString &text)
+{
+  switch (family.type()) {
+  case PURL::SourceFamily::Asm:   return "; " + text;
+  case PURL::SourceFamily::C:     return "/* " + text + " */";
+  case PURL::SourceFamily::JAL:   return "-- " + text;
+  case PURL::SourceFamily::Cpp:   return "// " + text;
+  case PURL::SourceFamily::Basic: return "' " + text;
+  case PURL::SourceFamily::Nb_Types: break;
+  }
+  Q_ASSERT(false);
+  return QString::null;
+}
+
+namespace SourceLine
+{
+class LineData {
+public:
+  LineData() : group(-1) {}
+  QString text, comment;
+  int group;
+};
+} // namespace
+
+QStringList SourceLine::lines(PURL::SourceFamily family, const List &list, uint nbSpaces)
+{
+  QValueList<LineData> lines;
+  QValueList<uint> groupCommentColumn;
+  groupCommentColumn.append(0);
+  List::const_iterator it;
+  for (it=list.begin(); it!=list.end(); ++it) {
+    LineData data;
+    switch((*it).type) {
+    case Indented:
+      data.text = repeat(" ", nbSpaces);
+    case NotIndented:
+      if ( (*it).code.isEmpty() && !(*it).comment.isEmpty() ) data.text += comment(family, (*it).comment);
+      else {
+        data.text += (*it).code;
+        data.comment = (*it).comment;
+        data.group = groupCommentColumn.count() - 1;
+        groupCommentColumn[data.group] = qMax(groupCommentColumn[data.group], uint(data.text.length()));
+      }
+      break;
+    case Separator:
+      data.text = comment(family, "-----------------------------------------------------------------------");
+      groupCommentColumn.append(0);
+      break;
+    case Empty:
+      break;
+    case Title:
+      data.text = comment(family, (*it).comment);
+      break;
+    }
+    lines += data;
+  }
+  QStringList slines;
+  QValueList<LineData>::const_iterator lit;
+  for (lit=lines.begin(); lit!=lines.end(); ++lit) {
+    if ( (*lit).group==-1 || (*lit).comment.isEmpty() ) slines += (*lit).text;
+    else {
+      uint col = groupCommentColumn[(*lit).group] + 1;
+      slines += (*lit).text.leftJustify(col, ' ') + comment(family, (*lit).comment);
+    }
+  }
+  return slines;
+}
+
+QString SourceLine::text(PURL::SourceFamily family, const List &list, uint nbSpaces)
+{
+  return lines(family, list, nbSpaces).join("\n") + "\n";
+}
+
+QString SourceLine::transformConfigName(const Pic::Data &data, uint wordIndex, const QString &name)
+{
+  if ( !data.is18Family() ) return name;
+  bool ok;
+  (void)fromHexLabel(name, &ok);
+  if (ok) return name;
+  QString s = name + '_';
+  if ( data.name()=="18C601" || data.name()=="18C801" || data.name().startsWith("18F" ) )
+    s += QString::number(wordIndex/2+1) + (wordIndex%2==0 ? 'L' : 'H');
+  else s += QString::number(wordIndex);
+  return s;
+}
+
+QStringList SourceLine::ignoredConfigNames(const Pic::Data &data, uint wordIndex)
+{
+  QStringList cnames;
+  const QStringList &names = data.config()._words[wordIndex].ignoredCNames;
+  for (uint i=0; i<uint(names.count()); i++) cnames += transformConfigName(data, wordIndex, names[i]);
+  return cnames;
+}
+
+QStringList SourceLine::extraConfigNames(const Pic::Data &data, uint wordIndex, const Pic::Config::Value &value)
+{
+  QStringList cnames;
+  const QStringList &names = value.configNames[Pic::ConfigNameType::Extra];
+  for (uint i=0; i<uint(names.count()); i++) cnames += transformConfigName(data, wordIndex, names[i]);
+  return cnames;
+}
+
+QStringList SourceLine::configNames(Pic::ConfigNameType type, const Pic::Memory &memory, uint word, bool &ok)
+{
+  ok = true;
+  const Pic::Data &data = memory.device();
+  const Pic::Config &config = data.config();
+  BitValue v = memory.normalizedWord(Pic::MemoryRangeType::Config, word);
+  const Pic::Config::Word &cword = config._words[word];
+  QStringList cnames;
+  for (uint k=0; k<uint(cword.masks.count()); k++) {
+    const Pic::Config::Mask &cmask = cword.masks[k];
+    if ( cmask.value.isInside(cword.pmask) ) continue; // protected bits
+    for (int l=cmask.values.count()-1; l>=0; l--) {
+      const Pic::Config::Value &cvalue = cmask.values[l];
+      if ( !cvalue.value.isInside(v) ) continue;
+      QStringList vcnames = cvalue.configNames[type];
+      if ( vcnames.isEmpty() && type!=Pic::ConfigNameType::Default ) vcnames = cvalue.configNames[Pic::ConfigNameType::Default];
+      for (uint i=0; i<uint(vcnames.count()); i++) {
+        if ( vcnames[i].isEmpty() ) ok = false;
+        else cnames += transformConfigName(data, word, vcnames[i]);
+      }
+      break;
+    }
+  }
+  return cnames;
+}
+
+//-----------------------------------------------------------------------------
+QString GPUtils::toDeviceName(const QString &device)
+{
+  if ( device.startsWith("PS") ) return device.lower();
+  return "p" + device.lower();
+}
+
+SourceLine::List GPUtils::includeLines(const Device::Data &data)
+{
+  SourceLine::List lines;
+  QString include = toDeviceName(data.name());
+  if ( data.name()=="12CR509A" ) include = "p12c509a";
+  else if ( QRegExp("16CR?5.?[A-C]?").exactMatch(data.name()) ) include = "p16c5x";
+  else if ( QRegExp("16F5.?").exactMatch(data.name()) ) include = "p16f5x";
+  else if ( data.name()=="16CR620A" ) include = "p16c620a";
+  lines.appendIndentedCode("#include <" + include + ".inc>");
+  return lines;
+}
+
+SourceLine::List GPUtils::generateConfigLines(const Pic::Memory &memory, bool &ok)
+{
+  SourceLine::List lines;
+  const Pic::Data &data = memory.device();
+  const Pic::Config &config = data.config();
+  for (uint i=0; i<data.nbWords(Pic::MemoryRangeType::Config); i++) {
+    const Pic::Config::Word &cword = config._words[i];
+    QStringList cnames = SourceLine::configNames(Pic::ConfigNameType::Default, memory, i, ok);
+    if ( cnames.isEmpty() ) continue;
+    QString code = "__CONFIG ";
+    if ( !cword.name.isEmpty() ) code += "_" + cword.name + ", ";
+    code += cnames.join(" & ");
+    lines.appendIndentedCode(code);
+  }
+  return lines;
+}
+
+SourceLine::List GPUtils::disassemble(const Pic::Memory &memory)
+{
+  SourceLine::List lines;
+  const Pic::Data &data = memory.device();
+
+  // includes
+  lines += includeLines(data);
+  lines.appendNotIndentedCode("processor " + toDeviceName(data.name()));
+
+  // memory config
+  bool isDefault = true;
+  for (uint k=0; k<data.nbWords(Pic::MemoryRangeType::Config); k++) {
+    BitValue op = memory.normalizedWord(Pic::MemoryRangeType::Config, k);
+    BitValue mask = data.config()._words[k].usedMask();
+    if ( !mask.isInside(op) ) isDefault = false; // this is not completely correct but otherwise empty config is written...
+  }
+  if ( !isDefault ) {
+    lines.appendEmpty();
+    lines.appendSeparator();
+    bool ok;
+    lines += generateConfigLines(memory, ok);
+  }
+
+  // user ids
+  QString tmp;
+  for (uint k=0; k<data.nbWords(Pic::MemoryRangeType::UserId); k++) {
+    BitValue op = memory.normalizedWord(Pic::MemoryRangeType::UserId, k);
+    BitValue mask = data.userIdRecommendedMask();
+    if ( mask.isInside(op) ) continue;
+    if ( data.is18Family() ) {
+      Address ad = data.range(Pic::MemoryRangeType::UserId).start + data.range(Pic::MemoryRangeType::UserId).hexFileOffset + k*data.addressIncrement(Pic::MemoryRangeType::UserId);
+      lines.appendIndentedCode("__IDLOCS " + toHexLabel(ad, data.nbCharsAddress()) + ", " + toHexLabel(op, data.nbCharsWord(Pic::MemoryRangeType::UserId)));
+    } else tmp += toHex(op.nybble(0), 1);
+  }
+  if ( !tmp.isEmpty() ) {
+    lines.appendEmpty();
+    lines.appendSeparator();
+    lines.appendIndentedCode("__IDLOCS 0x" + tmp);
+  }
+
+  // memory code
+  lines.appendEmpty();
+  lines.appendSeparator();
+  lines.appendTitle("code memory");
+  bool first = true, newOrg = true;
+  uint nb = data.nbWords(Pic::MemoryRangeType::Code);
+  for (uint k=0; k<nb; k++) {
+    BitValue op = memory.normalizedWord(Pic::MemoryRangeType::Code, k);
+    BitValue mask = data.mask(Pic::MemoryRangeType::Code);
+    if ( mask.isInside(op) ) newOrg = true;
+    else {
+      if (newOrg) {
+        if ( !first ) tmp += '\n';
+        first = false;
+        Address org = data.range(Pic::MemoryRangeType::Code).start + data.range(Pic::MemoryRangeType::Code).hexFileOffset + k*data.addressIncrement(Pic::MemoryRangeType::Code);
+        lines.appendNotIndentedCode("org " + toHexLabel(org, data.nbCharsAddress()));
+        newOrg = false;
+      }
+      char buffer[512];
+      buffer[0] = 0;
+      BitValue op2 = ((k+1)<nb ? memory.word(Pic::MemoryRangeType::Code, k+1) : 0);
+      uint n = Coff::disassemble(op.toUInt(), op2.toUInt(), k, data.architecture(), buffer, 512);
+      lines.appendIndentedCode(QString(buffer));
+      if ( n==2 ) k++;
+    }
+  }
+
+  // eeprom data
+  lines.appendEmpty();
+  lines.appendSeparator();
+  lines.appendTitle("eeprom memory");
+  newOrg = true;
+  nb = data.nbWords(Pic::MemoryRangeType::Eeprom);
+  for (uint k=0; k<nb; k++) {
+    BitValue op = memory.normalizedWord(Pic::MemoryRangeType::Eeprom, k);
+    BitValue mask = data.mask(Pic::MemoryRangeType::Eeprom);
+    if ( mask.isInside(op) ) newOrg = true;
+    else {
+      if (newOrg) {
+        Address org = data.range(Pic::MemoryRangeType::Eeprom).start + data.range(Pic::MemoryRangeType::Eeprom).hexFileOffset + k*data.addressIncrement(Pic::MemoryRangeType::Eeprom);
+        lines.appendNotIndentedCode("org " + toHexLabel(org, data.nbCharsAddress()));
+        newOrg = false;
+      }
+      lines.appendIndentedCode("de " + toHexLabel(op, data.nbCharsWord(Pic::MemoryRangeType::Eeprom)));
+    }
+  }
+
+  lines.appendNotIndentedCode("end");
+  return lines;
+}
+
+//-----------------------------------------------------------------------------
+SourceLine::List Tool::SourceGenerator::templateSourceFile(PURL::ToolType type, const Device::Data &data, bool &ok) const
+{
+  SourceLine::List lines;
+  lines.appendSeparator();
+  lines.appendTitle(i18n("Template source file generated by piklab"));
+  lines += includeLines(type, data);
+  lines.appendEmpty();
+  lines.appendSeparator();
+  lines.appendTitle(i18n("Configuration bits: adapt to your setup and needs"));
+  Device::Memory *memory = data.group().createMemory(data);
+  lines += configLines(type, *memory, ok);
+  delete memory;
+  lines.appendEmpty();
+  lines += sourceFileContent(type, data, ok);
+  return lines;
+}
diff --git a/src/coff/base/disassembler.h b/src/coff/base/disassembler.h
new file mode 100644
index 0000000..e713610
--- /dev/null
+++ b/src/coff/base/disassembler.h
@@ -0,0 +1,80 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DISASSEMBLER_H
+#define DISASSEMBLER_H
+
+#include "common/common/purl_base.h"
+#include "devices/pic/base/pic_config.h"
+namespace Device { class Data; class Memory; }
+namespace Pic { class Data; class Memory; }
+
+//-----------------------------------------------------------------------------
+namespace SourceLine
+{
+
+enum Type { Indented, NotIndented, Title, Separator, Empty };
+
+class Data {
+public:
+  Data(Type _type = Empty, const QString &_code = QString::null, const QString &_comment = QString::null)
+    : type(_type), code(_code), comment(_comment) {}
+  Type type;
+  QString code, comment;
+};
+
+class List : public QValueList<Data>
+{
+public:
+  List() {}
+  void appendSeparator() { append(Separator); }
+  void appendEmpty() { append(Empty); }
+  void appendTitle(const QString &text) { append(Data(Title, QString::null, text)); }
+  void appendIndentedCode(const QString &code, const QString &comment = QString::null) { append(Data(Indented, code, comment)); }
+  void appendNotIndentedCode(const QString &code, const QString &comment = QString::null) { append(Data(NotIndented, code, comment)); }
+};
+
+extern QString comment(PURL::SourceFamily family, const QString &text);
+extern QStringList lines(PURL::SourceFamily family, const List &list, uint nbSpaces);
+extern QString text(PURL::SourceFamily family, const List &list, uint nbSpaces);
+extern QString transformConfigName(const Pic::Data &data, uint wordIndex, const QString &name);
+extern QStringList ignoredConfigNames(const Pic::Data &data, uint wordIndex);
+extern QStringList extraConfigNames(const Pic::Data &data, uint wordIndex, const Pic::Config::Value &value);
+extern QStringList configNames(Pic::ConfigNameType type, const Pic::Memory &memory, uint word, bool &ok);
+
+} // namespace
+
+//-----------------------------------------------------------------------------
+namespace GPUtils
+{
+
+extern QString toDeviceName(const QString &device);
+extern SourceLine::List includeLines(const Device::Data &data);
+extern SourceLine::List generateConfigLines(const Pic::Memory &memory, bool &ok);
+extern SourceLine::List disassemble(const Pic::Memory &memory);
+
+} // namespace
+
+//-----------------------------------------------------------------------------
+namespace Tool
+{
+
+class SourceGenerator
+{
+public:
+  SourceGenerator() {}
+  virtual ~SourceGenerator() {}
+  virtual SourceLine::List configLines(PURL::ToolType type, const Device::Memory &memory, bool &ok) const = 0;
+  SourceLine::List templateSourceFile(PURL::ToolType type, const Device::Data &data, bool &ok) const;
+  virtual SourceLine::List sourceFileContent(PURL::ToolType type, const Device::Data &data, bool &ok) const = 0;
+  virtual SourceLine::List includeLines(PURL::ToolType type, const Device::Data &data) const = 0;
+};
+
+} // namespace
+
+#endif
diff --git a/src/coff/base/gpdis.cpp b/src/coff/base/gpdis.cpp
new file mode 100644
index 0000000..2df4f24
--- /dev/null
+++ b/src/coff/base/gpdis.cpp
@@ -0,0 +1,349 @@
+/* Disassemble memory
+   Copyright (C) 2001, 2002, 2003, 2004, 2005
+   Craig Franklin
+
+This file is part of gputils.
+
+gputils is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+gputils is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with gputils; see the file COPYING.  If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA.  */
+
+#include <assert.h>
+#include "devices/pic/base/pic.h"
+#include "coff_object.h"
+#include "gpopcode.h"
+
+#define DECODE_ARG0 snprintf(buffer, sizeof_buffer, "%s", instruction->name)
+
+#define DECODE_ARG1(ARG1) snprintf(buffer, sizeof_buffer, "%s\t%#lx", \
+                                  instruction->name,\
+                                  ARG1)
+
+#define DECODE_ARG1WF(ARG1, ARG2) snprintf(buffer, sizeof_buffer, "%s\t%#lx, %s", \
+                                          instruction->name,\
+                                          ARG1, \
+                                          (ARG2 ? "f" : "w"))
+
+#define DECODE_ARG2(ARG1, ARG2) snprintf(buffer, sizeof_buffer, "%s\t%#lx, %#lx", \
+                                        instruction->name,\
+                                        ARG1, \
+                                        ARG2)
+
+#define DECODE_ARG3(ARG1, ARG2, ARG3) snprintf(buffer, sizeof_buffer, "%s\t%#lx, %#lx, %#lx", \
+                                             instruction->name,\
+                                             ARG1, \
+                                             ARG2, \
+                                             ARG3)
+
+bool gp_decode_mnemonics = false;
+bool gp_decode_extended = false;
+
+int Coff::disassemble(long int opcode, long int opcode2,
+               int org,
+               Pic::Architecture architecture,
+               char *buffer,
+               size_t sizeof_buffer)
+{
+  int i;
+  int value;
+  struct insn *instruction = NULL;
+  int num_words = 1;
+
+  switch (architecture.type()) {
+  case Pic::Architecture::P24F:
+  case Pic::Architecture::P24H:
+  case Pic::Architecture::P30F:
+  case Pic::Architecture::P33F:
+    snprintf(buffer, sizeof_buffer, "--");
+    return 0;
+  case Pic::Architecture::P10X:
+    for(i = 0; i < num_op_12c5xx; i++) {
+      if((op_12c5xx[i].mask & opcode) == op_12c5xx[i].opcode) {
+        instruction = &op_12c5xx[i];
+        break;
+      }
+    }
+    break;
+/*  case PROC_CLASS_SX:
+    for(i = 0; i < num_op_sx; i++) {
+      if((op_sx[i].mask & opcode) == op_sx[i].opcode) {
+        instruction = &op_sx[i];
+        break;
+      }
+    }
+    break;
+*/
+  case Pic::Architecture::P16X:
+    for(i = 0; i < num_op_16cxx; i++) {
+      if((op_16cxx[i].mask & opcode) == op_16cxx[i].opcode) {
+        instruction = &op_16cxx[i];
+        break;
+      }
+    }
+    break;
+  case Pic::Architecture::P17C:
+    for(i = 0; i < num_op_17cxx; i++) {
+      if((op_17cxx[i].mask & opcode) == op_17cxx[i].opcode) {
+        instruction = &op_17cxx[i];
+        break;
+      }
+    }
+    break;
+  case Pic::Architecture::P18C:
+  case Pic::Architecture::P18F:
+  case Pic::Architecture::P18J:
+    if (gp_decode_mnemonics) {
+      for(i = 0; i < num_op_18cxx_sp; i++) {
+        if((op_18cxx_sp[i].mask & opcode) == op_18cxx_sp[i].opcode) {
+          instruction = &op_18cxx_sp[i];
+          break;
+        }
+      }
+    }
+    if (instruction == NULL) {
+      for(i = 0; i < num_op_18cxx; i++) {
+        if((op_18cxx[i].mask & opcode) == op_18cxx[i].opcode) {
+          instruction = &op_18cxx[i];
+          break;
+        }
+      }
+    }
+    if ((instruction == NULL) && (gp_decode_extended)) {
+      /* might be from the extended instruction set */
+      for(i = 0; i < num_op_18cxx_ext; i++) {
+        if((op_18cxx_ext[i].mask & opcode) == op_18cxx_ext[i].opcode) {
+          instruction = &op_18cxx_ext[i];
+          break;
+        }
+      }
+    }
+    break;
+  default:
+    assert(0);
+  }
+
+  if (instruction == NULL)  {
+    snprintf(buffer, sizeof_buffer, "dw\t%#lx  ;unknown opcode", opcode);
+    return num_words;
+  }
+
+  switch (instruction->classType)
+    {
+    case INSN_CLASS_LIT3_BANK:
+      DECODE_ARG1((opcode & 0x7) << 5);
+      break;
+    case INSN_CLASS_LIT3_PAGE:
+      DECODE_ARG1((opcode & 0x7) << 9);
+      break;
+    case INSN_CLASS_LIT1:
+      DECODE_ARG1(opcode & 1);
+      break;
+    case INSN_CLASS_LIT4:
+      DECODE_ARG1(opcode & 0xf);
+      break;
+    case INSN_CLASS_LIT4S:
+      DECODE_ARG1((opcode & 0xf0) >> 4);
+      break;
+    case INSN_CLASS_LIT6:
+      DECODE_ARG1(opcode & 0x3f);
+      break;
+    case INSN_CLASS_LIT8:
+    case INSN_CLASS_LIT8C12:
+    case INSN_CLASS_LIT8C16:
+      DECODE_ARG1(opcode & 0xff);
+      break;
+    case INSN_CLASS_LIT9:
+      DECODE_ARG1(opcode & 0x1ff);
+      break;
+    case INSN_CLASS_LIT11:
+      DECODE_ARG1(opcode & 0x7ff);
+      break;
+    case INSN_CLASS_LIT13:
+      DECODE_ARG1(opcode & 0x1fff);
+      break;
+    case INSN_CLASS_LITFSR:
+      DECODE_ARG2(((opcode >> 6) & 0x3), (opcode & 0x3f));
+      break;
+    case INSN_CLASS_RBRA8:
+      value = opcode & 0xff;
+      /* twos complement number */
+      if (value & 0x80) {
+        value = -((value ^ 0xff) + 1);
+      }
+      DECODE_ARG1((unsigned long)(org + value + 1) * 2);
+      break;
+    case INSN_CLASS_RBRA11:
+      value = opcode  & 0x7ff;
+      /* twos complement number */
+      if (value & 0x400) {
+        value = -((value ^ 0x7ff) + 1);
+      }
+      DECODE_ARG1((unsigned long)(org + value + 1) * 2);
+      break;
+    case INSN_CLASS_LIT20:
+      {
+        long int dest;
+
+        num_words = 2;
+        dest = (opcode2 & 0xfff) << 8;
+        dest |= opcode & 0xff;
+        DECODE_ARG1(dest * 2);
+      }
+      break;
+    case INSN_CLASS_CALL20:
+      {
+        long int dest;
+
+        num_words = 2;
+        dest = (opcode2 & 0xfff) << 8;
+        dest |= opcode & 0xff;
+        snprintf(buffer, sizeof_buffer, "%s\t%#lx, %#lx",
+                instruction->name,
+                dest * 2,
+                (opcode >> 8) & 1);
+      }
+      break;
+    case INSN_CLASS_FLIT12:
+      {
+        long int k;
+        long int file;
+
+        num_words = 2;
+        k = opcode2 & 0xff;
+        k |= ((opcode & 0xf) << 8);
+        file = (opcode >> 4) & 0x3;
+        DECODE_ARG2(file, k);
+      }
+      break;
+    case INSN_CLASS_FF:
+      {
+        long int file1;
+        long int file2;
+
+        num_words = 2;
+        file1 = opcode & 0xfff;
+        file2 = opcode2 & 0xfff;
+        DECODE_ARG2(file1, file2);
+      }
+      break;
+    case INSN_CLASS_FP:
+      DECODE_ARG2((opcode & 0xff), ((opcode >> 8) & 0x1f));
+      break;
+    case INSN_CLASS_PF:
+      DECODE_ARG2(((opcode >> 8) & 0x1f), (opcode & 0xff));
+      break;
+    case INSN_CLASS_SF:
+      {
+        long int offset;
+        long int file;
+
+        num_words = 2;
+        offset = opcode & 0x7f;
+        file = opcode2 & 0xfff;
+        DECODE_ARG2(offset, file);
+      }
+      break;
+    case INSN_CLASS_SS:
+      {
+        long int offset1;
+        long int offset2;
+
+        num_words = 2;
+        offset1 = opcode & 0x7f;
+        offset2 = opcode2 & 0x7f;
+        DECODE_ARG2(offset1, offset2);
+      }
+      break;
+    case INSN_CLASS_OPF5:
+      DECODE_ARG1(opcode & 0x1f);
+      break;
+    case INSN_CLASS_OPWF5:
+      DECODE_ARG1WF((opcode & 0x1f), ((opcode >> 5) & 1));
+      break;
+    case INSN_CLASS_B5:
+      DECODE_ARG2((opcode & 0x1f), ((opcode >> 5) & 7));
+      break;
+    case INSN_CLASS_B8:
+      DECODE_ARG2((opcode & 0xff), ((opcode >> 8) & 7));
+      break;
+    case INSN_CLASS_OPF7:
+      DECODE_ARG1(opcode & 0x7f);
+      break;
+    case INSN_CLASS_OPF8:
+      DECODE_ARG1(opcode & 0xff);
+      break;
+    case INSN_CLASS_OPWF7:
+      DECODE_ARG1WF((opcode & 0x7f), ((opcode >> 7) & 1));
+      break;
+    case INSN_CLASS_OPWF8:
+      DECODE_ARG1WF((opcode & 0xff), ((opcode >> 8) & 1));
+      break;
+    case INSN_CLASS_B7:
+      DECODE_ARG2((opcode & 0x7f), ((opcode >> 7) & 7));
+      break;
+    case INSN_CLASS_OPFA8:
+      DECODE_ARG2((opcode & 0xff), ((opcode >> 8) & 1));
+      break;
+    case INSN_CLASS_BA8:
+      DECODE_ARG3((opcode & 0xff), ((opcode >> 9) & 7), ((opcode >> 8) & 1));
+      break;
+    case INSN_CLASS_OPWFA8:
+      DECODE_ARG3((opcode & 0xff), ((opcode >> 9) & 1), ((opcode >> 8) & 1));
+      break;
+    case INSN_CLASS_IMPLICIT:
+      DECODE_ARG0;
+      break;
+    case INSN_CLASS_TBL:
+      {
+        char op[5];
+
+        switch(opcode & 0x3)
+          {
+          case 0:
+            strncpy(op, "*", sizeof(op));
+            break;
+          case 1:
+            strncpy(op, "*+", sizeof(op));
+            break;
+          case 2:
+            strncpy(op, "*-", sizeof(op));
+            break;
+          case 3:
+            strncpy(op, "+*", sizeof(op));
+            break;
+          default:
+            assert(0);
+          }
+
+        snprintf(buffer,
+                 sizeof_buffer,
+                 "%s\t%s",
+                 instruction->name,
+                 op);
+      }
+      break;
+    case INSN_CLASS_TBL2:
+      DECODE_ARG2(((opcode >> 9) & 1), (opcode & 0xff));
+      break;
+    case INSN_CLASS_TBL3:
+      DECODE_ARG3(((opcode >> 9) & 1),
+                  ((opcode >> 8) & 1),
+                   (opcode & 0xff));
+      break;
+    default:
+      assert(0);
+    }
+
+  return num_words;
+}
diff --git a/src/coff/base/gpopcode.cpp b/src/coff/base/gpopcode.cpp
new file mode 100644
index 0000000..87cb3b4
--- /dev/null
+++ b/src/coff/base/gpopcode.cpp
@@ -0,0 +1,348 @@
+/* GNU PIC opcode definitions
+   Copyright (C) 2001, 2002, 2003, 2004, 2005
+   Craig Franklin
+
+This file is part of gputils.
+
+gputils is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+gputils is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with gputils; see the file COPYING.  If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA.  */
+
+#include "gpopcode.h"
+
+/* FIXME: use const struct */
+
+/* PIC 12-bit instruction set */
+struct insn  op_12c5xx[] = {
+  { "addwf",  0xfc0, 0x1c0,     INSN_CLASS_OPWF5        },
+  { "andlw",  0xf00, 0xe00,     INSN_CLASS_LIT8         },
+  { "andwf",  0xfc0, 0x140,     INSN_CLASS_OPWF5        },
+  { "bcf",    0xf00, 0x400,     INSN_CLASS_B5           },
+  { "bsf",    0xf00, 0x500,     INSN_CLASS_B5           },
+  { "btfsc",  0xf00, 0x600,     INSN_CLASS_B5           },
+  { "btfss",  0xf00, 0x700,     INSN_CLASS_B5           },
+  { "call",   0xf00, 0x900,     INSN_CLASS_LIT8C12      },
+  { "clrf",   0xfe0, 0x060,     INSN_CLASS_OPF5         },
+  { "clrw",   0xfff, 0x040,     INSN_CLASS_IMPLICIT     },
+  { "clrwdt", 0xfff, 0x004,     INSN_CLASS_IMPLICIT     },
+  { "comf",   0xfc0, 0x240,     INSN_CLASS_OPWF5        },
+  { "decf",   0xfc0, 0x0c0,     INSN_CLASS_OPWF5        },
+  { "decfsz", 0xfc0, 0x2c0,     INSN_CLASS_OPWF5        },
+  { "goto",   0xe00, 0xa00,     INSN_CLASS_LIT9         },
+  { "incf",   0xfc0, 0x280,     INSN_CLASS_OPWF5        },
+  { "incfsz", 0xfc0, 0x3c0,     INSN_CLASS_OPWF5        },
+  { "iorlw",  0xf00, 0xd00,     INSN_CLASS_LIT8         },
+  { "iorwf",  0xfc0, 0x100,     INSN_CLASS_OPWF5        },
+  { "movf",   0xfc0, 0x200,     INSN_CLASS_OPWF5        },
+  { "movlw",  0xf00, 0xc00,     INSN_CLASS_LIT8         },
+  { "movwf",  0xfe0, 0x020,     INSN_CLASS_OPF5         },
+  { "nop",    0xfff, 0x000,     INSN_CLASS_IMPLICIT     },
+  { "option", 0xfff, 0x002,     INSN_CLASS_IMPLICIT     },
+  { "retlw",  0xf00, 0x800,     INSN_CLASS_LIT8         },
+  { "return", 0xfff, 0x800,     INSN_CLASS_IMPLICIT     }, /* FIXME: special mnemonic */
+  { "rlf",    0xfc0, 0x340,     INSN_CLASS_OPWF5        },
+  { "rrf",    0xfc0, 0x300,     INSN_CLASS_OPWF5        },
+  { "sleep",  0xfff, 0x003,     INSN_CLASS_IMPLICIT     },
+  { "subwf",  0xfc0, 0x080,     INSN_CLASS_OPWF5        },
+  { "swapf",  0xfc0, 0x380,     INSN_CLASS_OPWF5        },
+  { "tris",   0xff8, 0x000,     INSN_CLASS_OPF5         },
+  { "xorlw",  0xf00, 0xf00,     INSN_CLASS_LIT8         },
+  { "xorwf",  0xfc0, 0x180,     INSN_CLASS_OPWF5        }
+};
+
+const int num_op_12c5xx = TABLE_SIZE(op_12c5xx);
+
+/* Scenix SX has a superset of the PIC 12-bit instruction set */
+/*
+ * It would be nice if there was a more elegant way to do this,
+ * either by adding a flags field to struct insn, or by allowing a
+ * processor to have more than one associated table.
+ */
+struct insn  op_sx[] = {
+  { "addwf",  0xfc0, 0x1c0,     INSN_CLASS_OPWF5        },
+  { "andlw",  0xf00, 0xe00,     INSN_CLASS_LIT8         },
+  { "andwf",  0xfc0, 0x140,     INSN_CLASS_OPWF5        },
+  { "bank",   0xff8, 0x018,     INSN_CLASS_LIT3_BANK    }, /* SX only */
+  { "bcf",    0xf00, 0x400,     INSN_CLASS_B5           },
+  { "bsf",    0xf00, 0x500,     INSN_CLASS_B5           },
+  { "btfsc",  0xf00, 0x600,     INSN_CLASS_B5           },
+  { "btfss",  0xf00, 0x700,     INSN_CLASS_B5           },
+  { "call",   0xf00, 0x900,     INSN_CLASS_LIT8C12      },
+  { "clrf",   0xfe0, 0x060,     INSN_CLASS_OPF5         },
+  { "clrw",   0xfff, 0x040,     INSN_CLASS_IMPLICIT     },
+  { "clrwdt", 0xfff, 0x004,     INSN_CLASS_IMPLICIT     },
+  { "comf",   0xfc0, 0x240,     INSN_CLASS_OPWF5        },
+  { "decf",   0xfc0, 0x0c0,     INSN_CLASS_OPWF5        },
+  { "decfsz", 0xfc0, 0x2c0,     INSN_CLASS_OPWF5        },
+  { "goto",   0xe00, 0xa00,     INSN_CLASS_LIT9         },
+  { "incf",   0xfc0, 0x280,     INSN_CLASS_OPWF5        },
+  { "incfsz", 0xfc0, 0x3c0,     INSN_CLASS_OPWF5        },
+  { "iorlw",  0xf00, 0xd00,     INSN_CLASS_LIT8         },
+  { "iorwf",  0xfc0, 0x100,     INSN_CLASS_OPWF5        },
+  { "iread",  0xfff, 0x041,     INSN_CLASS_IMPLICIT     }, /* SX only */
+  { "mode",   0xff0, 0x050,     INSN_CLASS_LIT4         }, /* SX only */
+  { "movf",   0xfc0, 0x200,     INSN_CLASS_OPWF5        },
+  { "movlw",  0xf00, 0xc00,     INSN_CLASS_LIT8         },
+  { "movmw",  0xfff, 0x042,     INSN_CLASS_IMPLICIT     }, /* SX only */
+  { "movwf",  0xfe0, 0x020,     INSN_CLASS_OPF5         },
+  { "movwm",  0xfff, 0x043,     INSN_CLASS_IMPLICIT     }, /* SX only */
+  { "nop",    0xfff, 0x000,     INSN_CLASS_IMPLICIT     },
+  { "option", 0xfff, 0x002,     INSN_CLASS_IMPLICIT     },
+  { "page",   0xff8, 0x010,     INSN_CLASS_LIT3_PAGE    }, /* SX only */
+  { "reti",   0xfff, 0x00e,     INSN_CLASS_IMPLICIT     }, /* SX only */
+  { "retiw",  0xfff, 0x00f,     INSN_CLASS_IMPLICIT     }, /* SX only */
+  { "retlw",  0xf00, 0x800,     INSN_CLASS_LIT8         },
+  { "retp",   0xfff, 0x00d,     INSN_CLASS_IMPLICIT     }, /* SX only */
+  { "return", 0xfff, 0x00c,     INSN_CLASS_IMPLICIT     }, /* SX only */
+  { "rlf",    0xfc0, 0x340,     INSN_CLASS_OPWF5        },
+  { "rrf",    0xfc0, 0x300,     INSN_CLASS_OPWF5        },
+  { "sleep",  0xfff, 0x003,     INSN_CLASS_IMPLICIT     },
+  { "subwf",  0xfc0, 0x080,     INSN_CLASS_OPWF5        },
+  { "swapf",  0xfc0, 0x380,     INSN_CLASS_OPWF5        },
+  { "tris",   0xff8, 0x000,     INSN_CLASS_OPF5         },
+  { "xorlw",  0xf00, 0xf00,     INSN_CLASS_LIT8         },
+  { "xorwf",  0xfc0, 0x180,     INSN_CLASS_OPWF5        }
+};
+
+const int num_op_sx = TABLE_SIZE(op_sx);
+
+/* PIC 14-bit instruction set */
+struct insn  op_16cxx[] = {
+  { "addlw",  0x3e00, 0x3e00,   INSN_CLASS_LIT8         },
+  { "addwf",  0x3f00, 0x0700,   INSN_CLASS_OPWF7        },
+  { "andlw",  0x3f00, 0x3900,   INSN_CLASS_LIT8         },
+  { "andwf",  0x3f00, 0x0500,   INSN_CLASS_OPWF7        },
+  { "bcf",    0x3c00, 0x1000,   INSN_CLASS_B7           },
+  { "bsf",    0x3c00, 0x1400,   INSN_CLASS_B7           },
+  { "btfsc",  0x3c00, 0x1800,   INSN_CLASS_B7           },
+  { "btfss",  0x3c00, 0x1c00,   INSN_CLASS_B7           },
+  { "call",   0x3800, 0x2000,   INSN_CLASS_LIT11        },
+  { "clrf",   0x3f80, 0x0180,   INSN_CLASS_OPF7         },
+  { "clrw",   0x3fff, 0x0103,   INSN_CLASS_IMPLICIT     },
+  { "clrwdt", 0x3fff, 0x0064,   INSN_CLASS_IMPLICIT     },
+  { "comf",   0x3f00, 0x0900,   INSN_CLASS_OPWF7        },
+  { "decf",   0x3f00, 0x0300,   INSN_CLASS_OPWF7        },
+  { "decfsz", 0x3f00, 0x0b00,   INSN_CLASS_OPWF7        },
+  { "goto",   0x3800, 0x2800,   INSN_CLASS_LIT11        },
+  { "incf",   0x3f00, 0x0a00,   INSN_CLASS_OPWF7        },
+  { "incfsz", 0x3f00, 0x0f00,   INSN_CLASS_OPWF7        },
+  { "iorlw",  0x3f00, 0x3800,   INSN_CLASS_LIT8         },
+  { "iorwf",  0x3f00, 0x0400,   INSN_CLASS_OPWF7        },
+  { "movf",   0x3f00, 0x0800,   INSN_CLASS_OPWF7        },
+  { "movlw",  0x3c00, 0x3000,   INSN_CLASS_LIT8         },
+  { "movwf",  0x3f80, 0x0080,   INSN_CLASS_OPF7         },
+  { "nop",    0x3f9f, 0x0000,   INSN_CLASS_IMPLICIT     },
+  { "option", 0x3fff, 0x0062,   INSN_CLASS_IMPLICIT     },
+  { "retfie", 0x3fff, 0x0009,   INSN_CLASS_IMPLICIT     },
+  { "retlw",  0x3c00, 0x3400,   INSN_CLASS_LIT8         },
+  { "return", 0x3fff, 0x0008,   INSN_CLASS_IMPLICIT     },
+  { "rlf",    0x3f00, 0x0d00,   INSN_CLASS_OPWF7        },
+  { "rrf",    0x3f00, 0x0c00,   INSN_CLASS_OPWF7        },
+  { "sleep",  0x3fff, 0x0063,   INSN_CLASS_IMPLICIT     },
+  { "sublw",  0x3e00, 0x3c00,   INSN_CLASS_LIT8         },
+  { "subwf",  0x3f00, 0x0200,   INSN_CLASS_OPWF7        },
+  { "swapf",  0x3f00, 0x0e00,   INSN_CLASS_OPWF7        },
+  { "tris",   0x3ff8, 0x0060,   INSN_CLASS_OPF7         },
+  { "xorlw",  0x3f00, 0x3a00,   INSN_CLASS_LIT8         },
+  { "xorwf",  0x3f00, 0x0600,   INSN_CLASS_OPWF7        }
+};
+
+const int num_op_16cxx = TABLE_SIZE(op_16cxx);
+
+/* PIC 16-bit instruction set */
+struct insn  op_17cxx[] = {
+  { "addlw",  0xff00, 0xb100,   INSN_CLASS_LIT8         },
+  { "addwf",  0xfe00, 0x0e00,   INSN_CLASS_OPWF8        },
+  { "addwfc", 0xfe00, 0x1000,   INSN_CLASS_OPWF8        },
+  { "andlw",  0xff00, 0xb500,   INSN_CLASS_LIT8         },
+  { "andwf",  0xfe00, 0x0a00,   INSN_CLASS_OPWF8        },
+  { "bcf",    0xf800, 0x8800,   INSN_CLASS_B8           },
+  { "bsf",    0xf800, 0x8000,   INSN_CLASS_B8           },
+  { "btfsc",  0xf800, 0x9800,   INSN_CLASS_B8           },
+  { "btfss",  0xf800, 0x9000,   INSN_CLASS_B8           },
+  { "btg",    0xf800, 0x3800,   INSN_CLASS_B8           },
+  { "call",   0xe000, 0xe000,   INSN_CLASS_LIT13        },
+  { "clrf",   0xfe00, 0x2800,   INSN_CLASS_OPWF8        },
+  { "clrwdt", 0xffff, 0x0004,   INSN_CLASS_IMPLICIT     },
+  { "comf",   0xfe00, 0x1200,   INSN_CLASS_OPWF8        },
+  { "cpfseq", 0xff00, 0x3100,   INSN_CLASS_OPF8         },
+  { "cpfsgt", 0xff00, 0x3200,   INSN_CLASS_OPF8         },
+  { "cpfslt", 0xff00, 0x3000,   INSN_CLASS_OPF8         },
+  { "daw",    0xfe00, 0x2e00,   INSN_CLASS_OPWF8        },
+  { "decf",   0xfe00, 0x0600,   INSN_CLASS_OPWF8        },
+  { "decfsz", 0xfe00, 0x1600,   INSN_CLASS_OPWF8        },
+  { "dcfsnz", 0xfe00, 0x2600,   INSN_CLASS_OPWF8        },
+  { "goto",   0xe000, 0xc000,   INSN_CLASS_LIT13        },
+  { "incf",   0xfe00, 0x1400,   INSN_CLASS_OPWF8        },
+  { "incfsz", 0xfe00, 0x1e00,   INSN_CLASS_OPWF8        },
+  { "infsnz", 0xfe00, 0x2400,   INSN_CLASS_OPWF8        },
+  { "iorlw",  0xff00, 0xb300,   INSN_CLASS_LIT8         },
+  { "iorwf",  0xfe00, 0x0800,   INSN_CLASS_OPWF8        },
+  { "lcall",  0xff00, 0xb700,   INSN_CLASS_LIT8C16      },
+  { "movfp",  0xe000, 0x6000,   INSN_CLASS_FP           },
+  { "movpf",  0xe000, 0x4000,   INSN_CLASS_PF           },
+  { "movlb",  0xff00, 0xb800,   INSN_CLASS_LIT8         },
+  { "movlr",  0xfe00, 0xba00,   INSN_CLASS_LIT4S        },
+  { "movlw",  0xff00, 0xb000,   INSN_CLASS_LIT8         },
+  { "movwf",  0xff00, 0x0100,   INSN_CLASS_OPF8         },
+  { "mullw",  0xff00, 0xbc00,   INSN_CLASS_LIT8         },
+  { "mulwf",  0xff00, 0x3400,   INSN_CLASS_OPF8         },
+  { "negw",   0xfe00, 0x2c00,   INSN_CLASS_OPWF8        },
+  { "nop",    0xffff, 0x0000,   INSN_CLASS_IMPLICIT     },
+  { "retfie", 0xffff, 0x0005,   INSN_CLASS_IMPLICIT     },
+  { "retlw",  0xff00, 0xb600,   INSN_CLASS_LIT8         },
+  { "return", 0xffff, 0x0002,   INSN_CLASS_IMPLICIT     },
+  { "rlcf",   0xfe00, 0x1a00,   INSN_CLASS_OPWF8        },
+  { "rlncf",  0xfe00, 0x2200,   INSN_CLASS_OPWF8        },
+  { "rrcf",   0xfe00, 0x1800,   INSN_CLASS_OPWF8        },
+  { "rrncf",  0xfe00, 0x2000,   INSN_CLASS_OPWF8        },
+  { "setf",   0xfe00, 0x2a00,   INSN_CLASS_OPWF8        },
+  { "sleep",  0xffff, 0x0003,   INSN_CLASS_IMPLICIT     },
+  { "sublw",  0xff00, 0xb200,   INSN_CLASS_LIT8         },
+  { "subwf",  0xfe00, 0x0400,   INSN_CLASS_OPWF8        },
+  { "subwfb", 0xfe00, 0x0200,   INSN_CLASS_OPWF8        },
+  { "swapf",  0xfe00, 0x1c00,   INSN_CLASS_OPWF8        },
+  { "tablrd", 0xfc00, 0xa800,   INSN_CLASS_TBL3         },
+  { "tablwt", 0xfc00, 0xac00,   INSN_CLASS_TBL3         },
+  { "tlrd",   0xfc00, 0xa000,   INSN_CLASS_TBL2         },
+  { "tlwt",   0xfc00, 0xa400,   INSN_CLASS_TBL2         },
+  { "tstfsz", 0xff00, 0x3300,   INSN_CLASS_OPF8         },
+  { "xorlw",  0xff00, 0xb400,   INSN_CLASS_LIT8         },
+  { "xorwf",  0xfe00, 0x0c00,   INSN_CLASS_OPWF8        }
+};
+
+const int num_op_17cxx = TABLE_SIZE(op_17cxx);
+
+struct insn  op_18cxx[] = {
+  { "addlw",  0xff00, 0x0f00,   INSN_CLASS_LIT8         },
+  { "addwf",  0xfc00, 0x2400,   INSN_CLASS_OPWFA8       },
+  { "addwfc", 0xfc00, 0x2000,   INSN_CLASS_OPWFA8       },
+  { "andlw",  0xff00, 0x0b00,   INSN_CLASS_LIT8         },
+  { "andwf",  0xfc00, 0x1400,   INSN_CLASS_OPWFA8       },
+  { "bc",     0xff00, 0xe200,   INSN_CLASS_RBRA8        },
+  { "bcf",    0xf000, 0x9000,   INSN_CLASS_BA8          },
+  { "bn",     0xff00, 0xe600,   INSN_CLASS_RBRA8        },
+  { "bnc",    0xff00, 0xe300,   INSN_CLASS_RBRA8        },
+  { "bnn",    0xff00, 0xe700,   INSN_CLASS_RBRA8        },
+  { "bnov",   0xff00, 0xe500,   INSN_CLASS_RBRA8        },
+  { "bnz",    0xff00, 0xe100,   INSN_CLASS_RBRA8        },
+  { "bov",    0xff00, 0xe400,   INSN_CLASS_RBRA8        },
+  { "bra",    0xf800, 0xd000,   INSN_CLASS_RBRA11       },
+  { "bsf",    0xf000, 0x8000,   INSN_CLASS_BA8          },
+  { "btfsc",  0xf000, 0xb000,   INSN_CLASS_BA8          },
+  { "btfss",  0xf000, 0xa000,   INSN_CLASS_BA8          },
+  { "btg",    0xf000, 0x7000,   INSN_CLASS_BA8          },
+  { "bz",     0xff00, 0xe000,   INSN_CLASS_RBRA8        },
+  { "call",   0xfe00, 0xec00,   INSN_CLASS_CALL20       },
+  { "clrf",   0xfe00, 0x6a00,   INSN_CLASS_OPFA8        },
+  { "clrwdt", 0xffff, 0x0004,   INSN_CLASS_IMPLICIT     },
+  { "comf",   0xfc00, 0x1c00,   INSN_CLASS_OPWFA8       },
+  { "cpfseq", 0xfe00, 0x6200,   INSN_CLASS_OPFA8        },
+  { "cpfsgt", 0xfe00, 0x6400,   INSN_CLASS_OPFA8        },
+  { "cpfslt", 0xfe00, 0x6000,   INSN_CLASS_OPFA8        },
+  { "daw",    0xffff, 0x0007,   INSN_CLASS_IMPLICIT     },
+  { "decf",   0xfc00, 0x0400,   INSN_CLASS_OPWFA8       },
+  { "decfsz", 0xfc00, 0x2c00,   INSN_CLASS_OPWFA8       },
+  { "dcfsnz", 0xfc00, 0x4c00,   INSN_CLASS_OPWFA8       },
+  { "goto",   0xff00, 0xef00,   INSN_CLASS_LIT20        },
+  { "incf",   0xfc00, 0x2800,   INSN_CLASS_OPWFA8       },
+  { "incfsz", 0xfc00, 0x3c00,   INSN_CLASS_OPWFA8       },
+  { "infsnz", 0xfc00, 0x4800,   INSN_CLASS_OPWFA8       },
+  { "iorlw",  0xff00, 0x0900,   INSN_CLASS_LIT8         },
+  { "iorwf",  0xfc00, 0x1000,   INSN_CLASS_OPWFA8       },
+  { "lfsr",   0xffc0, 0xee00,   INSN_CLASS_FLIT12       },
+  { "movf",   0xfc00, 0x5000,   INSN_CLASS_OPWFA8       },
+  { "movff",  0xf000, 0xc000,   INSN_CLASS_FF           },
+  { "movlb",  0xff00, 0x0100,   INSN_CLASS_LIT8         },
+  { "movlw",  0xff00, 0x0e00,   INSN_CLASS_LIT8         },
+  { "movwf",  0xfe00, 0x6e00,   INSN_CLASS_OPFA8        },
+  { "mullw",  0xff00, 0x0d00,   INSN_CLASS_LIT8         },
+  { "mulwf",  0xfe00, 0x0200,   INSN_CLASS_OPFA8        },
+  { "negf",   0xfe00, 0x6c00,   INSN_CLASS_OPFA8        },
+  { "nop",    0xffff, 0x0000,   INSN_CLASS_IMPLICIT     },
+  { "pop",    0xffff, 0x0006,   INSN_CLASS_IMPLICIT     },
+  { "push",   0xffff, 0x0005,   INSN_CLASS_IMPLICIT     },
+  { "rcall",  0xf800, 0xd800,   INSN_CLASS_RBRA11       },
+  { "reset",  0xffff, 0x00ff,   INSN_CLASS_IMPLICIT     },
+  { "retfie", 0xfffe, 0x0010,   INSN_CLASS_LIT1         },
+  { "retlw",  0xff00, 0x0c00,   INSN_CLASS_LIT8         },
+  { "return", 0xfffe, 0x0012,   INSN_CLASS_LIT1         },
+  { "rlcf",   0xfc00, 0x3400,   INSN_CLASS_OPWFA8       },
+  { "rlncf",  0xfc00, 0x4400,   INSN_CLASS_OPWFA8       },
+  { "rrcf",   0xfc00, 0x3000,   INSN_CLASS_OPWFA8       },
+  { "rrncf",  0xfc00, 0x4000,   INSN_CLASS_OPWFA8       },
+  { "setf",   0xfe00, 0x6800,   INSN_CLASS_OPFA8        },
+  { "sleep",  0xffff, 0x0003,   INSN_CLASS_IMPLICIT     },
+  { "subfwb", 0xfc00, 0x5400,   INSN_CLASS_OPWFA8       },
+  { "sublw",  0xff00, 0x0800,   INSN_CLASS_LIT8         },
+  { "subwf",  0xfc00, 0x5c00,   INSN_CLASS_OPWFA8       },
+  { "subwfb", 0xfc00, 0x5800,   INSN_CLASS_OPWFA8       },
+  { "swapf",  0xfc00, 0x3800,   INSN_CLASS_OPWFA8       },
+  { "tblrd",  0xfffc, 0x0008,   INSN_CLASS_TBL          },
+  { "tblwt",  0xfffc, 0x000c,   INSN_CLASS_TBL          },
+  { "tstfsz", 0xfe00, 0x6600,   INSN_CLASS_OPFA8        },
+  { "xorlw",  0xff00, 0x0a00,   INSN_CLASS_LIT8         },
+  { "xorwf",  0xfc00, 0x1800,   INSN_CLASS_OPWFA8       }
+};
+
+const int num_op_18cxx = TABLE_SIZE(op_18cxx);
+
+/* PIC 16-bit "Special" instruction set */
+struct insn  op_18cxx_sp[] = {
+  { "clrc",   0xffff, 0x90d8,   INSN_CLASS_IMPLICIT     },
+  { "clrdc",  0xffff, 0x92d8,   INSN_CLASS_IMPLICIT     },
+  { "clrn",   0xffff, 0x98d8,   INSN_CLASS_IMPLICIT     },
+  { "clrov",  0xffff, 0x96d8,   INSN_CLASS_IMPLICIT     },
+  { "clrw",   0xffff, 0x6ae8,   INSN_CLASS_IMPLICIT     },
+  { "clrz",   0xffff, 0x94d8,   INSN_CLASS_IMPLICIT     },
+  { "setc",   0xffff, 0x80d8,   INSN_CLASS_IMPLICIT     },
+  { "setdc",  0xffff, 0x82d8,   INSN_CLASS_IMPLICIT     },
+  { "setn",   0xffff, 0x88d8,   INSN_CLASS_IMPLICIT     },
+  { "setov",  0xffff, 0x86d8,   INSN_CLASS_IMPLICIT     },
+  { "setz",   0xffff, 0x84d8,   INSN_CLASS_IMPLICIT     },
+  { "skpc",   0xffff, 0xa0d8,   INSN_CLASS_IMPLICIT     },
+  { "skpdc",  0xffff, 0xa2d8,   INSN_CLASS_IMPLICIT     },
+  { "skpn",   0xffff, 0xa8d8,   INSN_CLASS_IMPLICIT     },
+  { "skpov",  0xffff, 0xa6d8,   INSN_CLASS_IMPLICIT     },
+  { "skpz",   0xffff, 0xa4d8,   INSN_CLASS_IMPLICIT     },
+  { "skpnc",  0xffff, 0xb0d8,   INSN_CLASS_IMPLICIT     },
+  { "skpndc", 0xffff, 0xb2d8,   INSN_CLASS_IMPLICIT     },
+  { "skpnn",  0xffff, 0xb8d8,   INSN_CLASS_IMPLICIT     },
+  { "skpnov", 0xffff, 0xb6d8,   INSN_CLASS_IMPLICIT     },
+  { "skpnz",  0xffff, 0xb4d8,   INSN_CLASS_IMPLICIT     },
+  { "tgc",    0xffff, 0x70d8,   INSN_CLASS_IMPLICIT     },
+  { "tgdc",   0xffff, 0x72d8,   INSN_CLASS_IMPLICIT     },
+  { "tgn",    0xffff, 0x78d8,   INSN_CLASS_IMPLICIT     },
+  { "tgov",   0xffff, 0x76d8,   INSN_CLASS_IMPLICIT     },
+  { "tgz",    0xffff, 0x74d8,   INSN_CLASS_IMPLICIT     }
+
+};
+
+const int num_op_18cxx_sp = TABLE_SIZE(op_18cxx_sp);
+
+/* PIC 16-bit Extended instruction set */
+struct insn  op_18cxx_ext[] = {
+  { "addfsr",  0xff00, 0xe800,  INSN_CLASS_LITFSR       },
+  { "addulnk", 0xffc0, 0xe8c0,  INSN_CLASS_LIT6         },
+  { "callw",   0xffff, 0x0014,  INSN_CLASS_IMPLICIT     },
+  { "movsf",   0xff80, 0xeb00,  INSN_CLASS_SF           },
+  { "movss",   0xff80, 0xeb80,  INSN_CLASS_SS           },
+  { "pushl",   0xff00, 0xea00,  INSN_CLASS_LIT8         },
+  { "subfsr",  0xff00, 0xe900,  INSN_CLASS_LITFSR       },
+  { "subulnk", 0xffc0, 0xe9c0,  INSN_CLASS_LIT6         }
+
+};
+
+const int num_op_18cxx_ext = TABLE_SIZE(op_18cxx_ext);
+
diff --git a/src/coff/base/gpopcode.h b/src/coff/base/gpopcode.h
new file mode 100644
index 0000000..aed25f9
--- /dev/null
+++ b/src/coff/base/gpopcode.h
@@ -0,0 +1,107 @@
+/* GNU PIC opcode definitions
+   Copyright (C) 2001, 2002, 2003, 2004, 2005
+   Craig Franklin
+
+This file is part of gputils.
+
+gputils is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+gputils is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with gputils; see the file COPYING.  If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA.  */
+
+#ifndef __GPOPCODE_H__
+#define __GPOPCODE_H__
+
+enum insn_class {
+  INSN_CLASS_LIT1,      /* bit 0 contains a 1 bit literal               */
+  INSN_CLASS_LIT4S,     /* Bits 7:4 contain a 4 bit literal, bits 3:0 are unused   */
+  INSN_CLASS_LIT6,      /* bits 5:0 contain an 6 bit literal            */
+  INSN_CLASS_LIT8,      /* bits 7:0 contain an 8 bit literal            */
+  INSN_CLASS_LIT8C12,   /* bits 7:0 contain an 8 bit literal, 12 bit CALL */
+  INSN_CLASS_LIT8C16,   /* bits 7:0 contain an 8 bit literal, 16 bit CALL */
+  INSN_CLASS_LIT9,      /* bits 8:0 contain a 9 bit literal             */
+  INSN_CLASS_LIT11,     /* bits 10:0 contain an 11 bit literal          */
+  INSN_CLASS_LIT13,     /* bits 12:0 contain an 11 bit literal          */
+  INSN_CLASS_LITFSR,    /* bits 5:0 contain an 6 bit literal for fsr 7:6 */
+  INSN_CLASS_IMPLICIT,  /* instruction has no variable bits at all      */
+  INSN_CLASS_OPF5,      /* bits 4:0 contain a register address          */
+  INSN_CLASS_OPWF5,     /* as above, but bit 5 has a destination flag   */
+  INSN_CLASS_B5,        /* as for OPF5, but bits 7:5 have bit number    */
+  INSN_CLASS_OPF7,      /* bits 6:0 contain a register address          */
+  INSN_CLASS_OPWF7,     /* as above, but bit 7 has destination flag     */
+  INSN_CLASS_B7,        /* as for OPF7, but bits 9:7 have bit number    */
+
+  INSN_CLASS_OPF8,      /* bits 7:0 contain a register address  */
+  INSN_CLASS_OPFA8,     /* bits 7:0 contain a register address & bit has access flag  */
+  INSN_CLASS_OPWF8,     /* as above, but bit 8 has dest flag    */
+  INSN_CLASS_OPWFA8,    /* as above, but bit 9 has dest flag & bit 8 has access flag            */
+  INSN_CLASS_B8,        /* like OPF7, but bits 9:11 have bit number     */
+  INSN_CLASS_BA8,       /* like OPF7, but bits 9:11 have bit number & bit 8 has access flag     */
+  INSN_CLASS_LIT20,     /* 20bit lit, bits 7:0 in first word bits 19:8 in second                */
+  INSN_CLASS_CALL20,    /* Like LIT20, but bit 8 has fast push flag                             */
+  INSN_CLASS_RBRA8,     /* Bits 7:0 contain a relative branch address                           */
+  INSN_CLASS_RBRA11,    /* Bits 10:0 contain a relative branch address                          */
+  INSN_CLASS_FLIT12,    /* LFSR, 12bit lit loaded into 1 of 4 FSRs                              */
+  INSN_CLASS_FF,        /* two 12bit file addresses                                             */
+  INSN_CLASS_FP,        /* Bits 7:0 contain a register address, bits 12:8 contains a peripheral address    */
+  INSN_CLASS_PF,        /* Bits 7:0 contain a register address, bits 12:8 contains a peripheral address    */
+
+  INSN_CLASS_SF,        /* 7 bit offset added to FSR2, fetched memory placed at 12 bit address */
+  INSN_CLASS_SS,        /* two 7 bit offsets, memory moved using FSR2 */
+
+  INSN_CLASS_TBL,       /* a table read or write instruction            */
+  INSN_CLASS_TBL2,      /* a table read or write instruction.
+                           Bits 7:0 contains a register address; Bit 8 is unused;
+                           Bit 9, table byte select. (0:lower ; 1:upper) */
+  INSN_CLASS_TBL3,      /* a table read or write instruction.
+                           Bits 7:0 contains a register address;
+                           Bit 8, 1 if increment pointer, 0 otherwise;
+                           Bit 9, table byte select. (0:lower ; 1:upper) */
+  INSN_CLASS_FUNC,      /* instruction is an assembler function         */
+  INSN_CLASS_LIT3_BANK, /* SX: bits 3:0 contain a 3 bit literal, shifted 5 bits */
+  INSN_CLASS_LIT3_PAGE, /* SX: bits 3:0 contain a 3 bit literal, shifted 9 bits */
+  INSN_CLASS_LIT4       /* SX: bits 3:0 contain a 4 bit literal         */
+};
+
+struct insn {
+  const char *name;
+  long int mask;
+  long int opcode;
+  enum insn_class classType;
+  //int attribs;
+};
+
+#define TABLE_SIZE(X)       (sizeof(X) / sizeof(X[0]))
+
+extern struct insn op_12c5xx[];
+extern const int num_op_12c5xx;
+
+extern struct insn op_sx[];
+extern const int num_op_sx;
+
+extern struct insn op_16cxx[];
+extern const int num_op_16cxx;
+
+extern struct insn op_17cxx[];
+extern const int num_op_17cxx;
+
+extern struct insn op_18cxx[];
+extern const int num_op_18cxx;
+
+extern struct insn op_18cxx_sp[];
+extern const int num_op_18cxx_sp;
+
+extern struct insn op_18cxx_ext[];
+extern const int num_op_18cxx_ext;
+
+#endif
diff --git a/src/coff/base/text_coff.cpp b/src/coff/base/text_coff.cpp
new file mode 100644
index 0000000..0d0862e
--- /dev/null
+++ b/src/coff/base/text_coff.cpp
@@ -0,0 +1,262 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "text_coff.h"
+
+#include "common/global/pfile.h"
+
+namespace Coff
+{
+class CodeData {
+public:
+  QString address, opcode, disasm1, disasm2;
+};
+class LineData {
+public:
+  QValueVector<CodeData> codes;
+  QString lineNumber, lineText;
+};
+class FileData {
+public:
+  PURL::Url url;
+  bool read;
+  QValueVector<LineData> lines;
+};
+}
+
+Coff::TextObject::TextObject(const Device::Data *device, const PURL::Url &url)
+  : Object(device, url), _initialized(true)
+{}
+
+bool Coff::TextObject::parse(Log::Base &log)
+{
+  bool ok = Object::parse(log);
+  _initialized = !ok;
+  return ok;
+}
+
+PURL::Url Coff::TextObject::urlForFilename(const QString &filename) const
+{
+  PURL::Url rurl = PURL::Url::fromPathOrUrl(filename);
+  return rurl.toAbsolute(url().directory());
+}
+
+const Coff::Section *Coff::TextObject::section(const CodeLine &cline) const
+{
+  if ( cline.section().instructions().contains(cline.address()) ) return &cline.section();
+  // possible for coff generated by picc...
+  for (uint i=0; i<uint(_sections.count()); i++) {
+    if ( _sections[i]->type()!=SectionType::Code ) continue;
+    if ( _sections[i]->instructions().contains(cline.address()) ) return _sections[i];
+  }
+  return 0;
+}
+
+void Coff::TextObject::init() const
+{
+  if (_initialized) return;
+  _initialized = true;
+
+  // open and read files
+  QMap<QString, FileData> fd;
+  for (uint i=0; i<uint(_sections.count()); i++) {
+    if ( _sections[i]->type()!=SectionType::Code ) continue;
+    for (uint k=0; k<uint(_sections[i]->lines().count()); k++) {
+      QString filename = _sections[i]->lines()[k]->filename();
+      if ( filename.isEmpty() || fd.contains(filename) ) continue;
+      _filenames.append(filename);
+      FileData fdata;
+      fdata.url = urlForFilename(filename);
+      Log::StringView sview;
+      PURL::File file(fdata.url, sview);
+      fdata.read = file.openForRead();
+      if (fdata.read) {
+        QStringList lines = file.readLines();
+        fdata.lines.resize(lines.count());
+        for (uint i=0; i<uint(lines.count()); i++)
+          fdata.lines[i].lineText = lines[i];
+      } else fdata.lines.resize(nbLines(filename));
+      fd[filename] = fdata;
+    }
+  }
+
+  // create strings (for later justification)
+  const uint addressWidth = _device->nbCharsAddress();
+  uint opcodeWidth = 0, disasm1Width = 0, disasm2Width = 0, lineNumberWidth = 0, lineTextWidth = 0;
+  QMap<QString, FileData>::iterator it;
+  for (it=fd.begin(); it!=fd.end(); ++it) {
+    for (uint i=0; i<uint(it.data().lines.count()); i++) {
+      LineData &ldata = it.data().lines[i];
+      QValueVector<const CodeLine *> lines = findCodeLines(it.key(), i);
+      ldata.codes.resize(lines.count());
+      for (uint k=0; k<uint(lines.count()); k++) {
+        Address address = lines[k]->address();
+        ldata.codes[k].address = toHex(address, addressWidth).upper();
+        const Section *sec = section(*lines[k]);
+        if (sec) {
+          ldata.codes[k].opcode = "0x" + sec->instructions()[address].opcode.upper();
+          //qDebug("%s: %s", ldata.codes[k].address.latin1(), ldata.codes[k].opcode.latin1());
+          opcodeWidth = qMax(opcodeWidth, uint(ldata.codes[k].opcode.length()));
+          QString s = sec->instructions()[address].disasm;
+          int j = s.find('\t');
+          if ( j!=-1 ) {
+            ldata.codes[k].disasm2 = s.mid(j+1);
+            disasm2Width = qMax(disasm2Width, uint(ldata.codes[k].disasm2.length()));
+          }
+          ldata.codes[k].disasm1 = (j==-1 ? s : s.mid(0, j));
+          disasm1Width = qMax(disasm1Width, uint(ldata.codes[k].disasm1.length()));
+        }
+      }
+      ldata.lineNumber = QString::number(i+1);
+      lineNumberWidth = qMax(lineNumberWidth, uint(ldata.lineNumber.length()));
+      lineTextWidth = qMax(lineTextWidth, uint(ldata.lineText.length()));
+    }
+  }
+  uint asmWidth = addressWidth + 4 + opcodeWidth + 4 + disasm1Width + 2 + disasm2Width;
+  uint totalWidth = asmWidth + 4 + lineNumberWidth + 2 + lineTextWidth;
+
+  // create text
+  for (it = fd.begin(); it!=fd.end(); ++it) {
+    QString s = QString("--- ") + it.data().url.pretty() + " ";
+    _list +=  s.leftJustify(totalWidth, '-');
+    if ( !it.data().read ) {
+      s = QString("--- ") + i18n("File could not be read") + " ";
+      _list +=  s.leftJustify(totalWidth, '-');
+    }
+    for (uint i=0; i<uint(it.data().lines.count()); i++) {
+      const LineData &ldata = it.data().lines[i];
+      QString cline = repeat(" ", 4) + ldata.lineNumber.leftJustify(lineNumberWidth) + ": " + ldata.lineText;
+      if ( ldata.codes.count()==0 ) _list += stripEndingWhiteSpaces(repeat(" ", asmWidth) + cline);
+      else for (uint k=0; k<uint(ldata.codes.count()); k++) {
+        if ( ldata.codes[k].opcode.isEmpty() ) continue;
+        QString line;
+        line += ldata.codes[k].address + repeat(" ", 4);
+        line += ldata.codes[k].opcode.leftJustify(opcodeWidth) + repeat(" ", 4);
+        line += ldata.codes[k].disasm1.leftJustify(disasm1Width) + repeat(" ", 2);
+        line += ldata.codes[k].disasm2.leftJustify(disasm2Width);
+        _lines[fromHex(ldata.codes[k].address, 0)] = _list.count()+1;
+        if ( k==0 ) line += cline;
+        _list += stripEndingWhiteSpaces(line);
+      }
+    }
+  }
+}
+
+uint Coff::TextObject::nbLines(const QString &filename) const
+{
+  init();
+  uint nb = 0;
+  for (uint i=0; i<uint(_sections.count()); i++) {
+    if ( _sections[i]->type()!=SectionType::Code ) continue;
+    for (uint k=0; k<uint(_sections[i]->lines().count()); k++) {
+      const CodeLine *cl = _sections[i]->lines()[k];
+      if ( cl->filename()==filename ) nb = qMax(nb, cl->line());
+    }
+  }
+  return nb;
+}
+
+QValueVector<const Coff::CodeLine *> Coff::TextObject::findCodeLines(const QString &filename, uint line) const
+{
+  init();
+  QValueVector<const CodeLine *> list;
+  for (uint i=0; i<uint(_sections.count()); i++) {
+    if ( _sections[i]->type()!=SectionType::Code ) continue;
+    for (uint k=0; k<uint(_sections[i]->lines().count()); k++) {
+      const CodeLine *cl = _sections[i]->lines()[k];
+      if ( (cl->line()-1)==line && cl->filename()==filename ) list.append(cl);
+    }
+  }
+  return list;
+}
+
+int Coff::TextObject::lineForAddress(const PURL::Url &url, Address address) const
+{
+  init();
+  if ( url==_url && _lines.contains(address) ) return _lines[address]-1;
+  for (uint i=0; i<uint(_sections.count()); i++) {
+    if ( _sections[i]->type()!=SectionType::Code ) continue;
+    for (uint k=0; k<uint(_sections[i]->lines().count()); k++) {
+      const CodeLine *cl = _sections[i]->lines()[k];
+      if ( cl->address()!=address ) continue;
+      QString filename = cl->filename();
+      if ( filename.isEmpty() || urlForFilename(filename)!=url ) continue;
+      return cl->line()-1;
+    }
+  }
+  return -1;
+}
+
+QMap<PURL::Url, uint> Coff::TextObject::sourceLinesForAddress(Address address) const
+{
+  QMap<PURL::Url, uint> slines;
+  init();
+  for (uint i=0; i<uint(_sections.count()); i++) {
+    if ( _sections[i]->type()!=SectionType::Code ) continue;
+    for (uint k=0; k<uint(_sections[i]->lines().count()); k++) {
+      const CodeLine *cl = _sections[i]->lines()[k];
+      if ( cl->address()!=address ) continue;
+      QString filename = cl->filename();
+      if ( filename.isEmpty() ) continue;
+      slines[urlForFilename(filename)] = cl->line()-1;
+    }
+  }
+  if ( _lines.contains(address) ) slines[_url] = _lines[address] - 1;
+  return slines;
+}
+
+QValueVector<Address> Coff::TextObject::addresses(const PURL::Url &url, uint line) const
+{
+  init();
+  QValueVector<Address> ad;
+  if ( url==_url ) {
+    QMap<Address, uint>::const_iterator it;
+    for (it=_lines.begin(); it!=_lines.end(); ++it)
+      if ( line==(it.data()-1) ) ad.append(it.key());
+    return ad;
+  }
+  for (uint i=0; i<uint(_sections.count()); i++) {
+    if ( _sections[i]->type()!=SectionType::Code ) continue;
+    for (uint k=0; k<uint(_sections[i]->lines().count()); k++) {
+      const CodeLine *cl = _sections[i]->lines()[k];
+      if ( line!=(cl->line()-1) ) continue;
+      QString filename = cl->filename();
+      if ( filename.isEmpty() || urlForFilename(filename)!=url ) continue;
+      ad.append(cl->address());
+    }
+  }
+  return ad;
+}
+
+const QStringList &Coff::TextObject::filenames() const
+{
+  init();
+  return _filenames;
+}
+
+QString Coff::TextObject::disassembly() const
+{
+  init();
+  if ( _list.isEmpty() ) return i18n("Parsing COFF file is not supported for this device or an error occured.");
+  return _list.join("\n");
+}
+
+Log::KeyList Coff::TextObject::information() const
+{
+  Log::KeyList keys;
+  keys.append(i18n("Format:"), i18n("%1 (magic id: %2)").arg(format().label()).arg(toHexLabel(format().data().magic, 4)));
+  QString name = (format()==Format::PIC30 || device()==0 ? "?" : device()->name());
+  keys.append(i18n("Device:"), name);
+  OptHeaderFormat ohf = optHeaderFormat();
+  QString label = (ohf==OptHeaderFormat::Nb_Types ? i18n("Unknown") : ohf.label());
+  keys.append(i18n("Option header:"), i18n("%1 (magic id: %2)").arg(label).arg(toHexLabel(optHeaderMagic(), 4)));
+  keys.append(i18n("No. of sections:"), QString::number(nbSections()));
+  keys.append(i18n("No. of symbols:"), QString::number(nbSymbols()));
+  keys.append(i18n("No. of variables:"), QString::number(variables().count()));
+  return keys;
+}
diff --git a/src/coff/base/text_coff.h b/src/coff/base/text_coff.h
new file mode 100644
index 0000000..7b6e673
--- /dev/null
+++ b/src/coff/base/text_coff.h
@@ -0,0 +1,45 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef TEXT_COFF_H
+#define TEXT_COFF_H
+
+#include "coff_object.h"
+
+namespace Coff
+{
+
+class TextObject : public Object
+{
+public:
+  TextObject(const Device::Data *device, const PURL::Url &url);
+  virtual bool parse(Log::Base &log);
+  int lineForAddress(const PURL::Url &url, Address address) const;
+  QMap<PURL::Url, uint> sourceLinesForAddress(Address address) const; // url -> line
+  QValueVector<Address> addresses(const PURL::Url &url, uint line) const;
+  const QStringList &filenames() const;
+
+  QString disassembly() const;
+  virtual Log::KeyList information() const;
+
+private:
+  mutable bool _initialized;
+  mutable QMap<Address, uint> _lines; // address -> line in disassembly listing
+  mutable QStringList _list;
+  mutable QStringList _filenames;
+
+  uint nbLines(const QString &filename) const;
+  QValueVector<const CodeLine *> findCodeLines(const QString &filename, uint line) const;
+  PURL::Url urlForFilename(const QString &filename) const;
+  void init() const;
+  const Section *section(const CodeLine &cline) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/coff/coff.pro b/src/coff/coff.pro
new file mode 100644
index 0000000..262f5c8
--- /dev/null
+++ b/src/coff/coff.pro
@@ -0,0 +1,2 @@
+TEMPLATE = subdirs
+SUBDIRS = xml base
\ No newline at end of file
diff --git a/src/coff/xml/Makefile.am b/src/coff/xml/Makefile.am
new file mode 100644
index 0000000..368e2e7
--- /dev/null
+++ b/src/coff/xml/Makefile.am
@@ -0,0 +1,14 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_PROGRAMS = xml_coff_parser
+xml_coff_parser_SOURCES = xml_coff_parser.cpp gpprocessor.cpp
+OBJECTS = $(top_builddir)/src/devices/list/libdevicelistnoui.la \
+	$(top_builddir)/src/devices/pic/pic/libpic.la $(top_builddir)/src/devices/pic/base/libpicbase.la \
+	$(top_builddir)/src/devices/pic/xml_data/libpicxml.la \
+	$(top_builddir)/src/devices/mem24/mem24/libmem24.la $(top_builddir)/src/devices/mem24/base/libmem24base.la \
+	$(top_builddir)/src/devices/mem24/xml_data/libmem24xml.la \
+	$(top_builddir)/src/xml_to_data/libxmltodata.la $(top_builddir)/src/devices/base/libdevicebase.la \
+	$(top_builddir)/src/common/common/libcommon.la
+xml_coff_parser_LDADD = $(OBJECTS) $(LIB_KDECORE)
+xml_coff_parser_DEPENDENCIES = $(OBJECTS)
diff --git a/src/coff/xml/gpprocessor.cpp b/src/coff/xml/gpprocessor.cpp
new file mode 100644
index 0000000..85477e9
--- /dev/null
+++ b/src/coff/xml/gpprocessor.cpp
@@ -0,0 +1,340 @@
+/* GNU PIC processor definitions
+   Copyright (C) 2001, 2002, 2003, 2004, 2005
+   Craig Franklin
+
+This file is part of gputils.
+
+gputils is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+gputils is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with gputils; see the file COPYING.  If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA.  */
+
+#include "gpprocessor.h"
+
+/* XXXPRO: Need to add a line here for any extra processors.  Please
+   keep this list sorted! */
+
+const struct px pics[] = {
+  { eeprom8,     PROC_CLASS_EEPROM8, "__EEPROM8",  { "eeprom8",     "eeprom8",   "eeprom8"  }, 0x0,    0, 0, -1,       NULL },
+  { generic,     PROC_CLASS_GENERIC, "__GEN",      { "generic",     "gen",       "unknown"  }, 0x0,    0, 0, -1,       NULL },
+  { pic10f200,   PROC_CLASS_PIC12,   "__10F200",   { "pic10f200",   "p10f200",   "10f200"   }, 0xf200, 1, 1, 0xff,     "10f200.lkr"   },
+  { pic10f202,   PROC_CLASS_PIC12,   "__10F202",   { "pic10f202",   "p10f202",   "10f202"   }, 0xf202, 1, 1, 0x1ff,    "10f202.lkr"   },
+  { pic10f204,   PROC_CLASS_PIC12,   "__10F204",   { "pic10f204",   "p10f204",   "10f204"   }, 0xf204, 1, 1, 0xff,     "10f204.lkr"   },
+  { pic10f206,   PROC_CLASS_PIC12,   "__10F206",   { "pic10f206",   "p10f206",   "10f206"   }, 0xf206, 1, 1, 0x1ff,    "10f206.lkr"   },
+  { pic10f220,   PROC_CLASS_PIC12,   "__10F220",   { "pic10f220",   "p10f220",   "10f220"   }, 0xf220, 1, 1, 0xff,     "10f220.lkr"   },
+  { pic10f222,   PROC_CLASS_PIC12,   "__10F222",   { "pic10f222",   "p10f222",   "10f222"   }, 0xf222, 1, 1, 0x1ff,    "10f222.lkr"   },
+  { pic12c508,   PROC_CLASS_PIC12,   "__12C508",   { "pic12c508",   "p12c508",   "12c508"   }, 0x2508, 1, 1, 0x1ff,    "12c508.lkr"   },
+  { pic12c508a,  PROC_CLASS_PIC12,   "__12C508A",  { "pic12c508a",  "p12c508a",  "12c508a"  }, 0x508a, 1, 1, 0x1ff,    "12c508a.lkr"  },
+  { pic12c509,   PROC_CLASS_PIC12,   "__12C509",   { "pic12c509",   "p12c509",   "12c509"   }, 0x2509, 1, 2, 0x3ff,    "12c509.lkr"   },
+  { pic12c509a,  PROC_CLASS_PIC12,   "__12C509A",  { "pic12c509a",  "p12c509a",  "12c509a"  }, 0x509a, 1, 2, 0x3ff,    "12c509a.lkr"  },
+  { pic12c671,   PROC_CLASS_PIC14,   "__12C671",   { "pic12c671",   "p12c671",   "12c671"   }, 0x2671, 1, 2, 0x3ff,    "12c671.lkr"   },
+  { pic12c672,   PROC_CLASS_PIC14,   "__12C672",   { "pic12c672",   "p12c672",   "12c672"   }, 0x2672, 1, 2, 0x7ff,    "12c672.lkr"   },
+  { pic12ce518,  PROC_CLASS_PIC12,   "__12CE518",  { "pic12ce518",  "p12ce518",  "12ce518"  }, 0x2518, 1, 1, 0x1ff,    "12ce518.lkr"  },
+  { pic12ce519,  PROC_CLASS_PIC12,   "__12CE519",  { "pic12ce519",  "p12ce519",  "12ce519"  }, 0x2519, 1, 2, 0x3ff,    "12ce519.lkr"  },
+  { pic12ce673,  PROC_CLASS_PIC14,   "__12CE673",  { "pic12ce673",  "p12ce673",  "12ce673"  }, 0x2673, 1, 2, 0x3ff,    "12ce673.lkr"  },
+  { pic12ce674,  PROC_CLASS_PIC14,   "__12CE674",  { "pic12ce674",  "p12ce674",  "12ce674"  }, 0x2674, 1, 2, 0x7ff,    "12ce674.lkr"  },
+  { pic12cr509a, PROC_CLASS_PIC12,   "__12CR509A", { "pic12cr509a", "p12cr509a", "12cr509a" }, 0xd09a, 1, 2, 0x3ff,    "12cr509a.lkr" },
+  { pic12f508,   PROC_CLASS_PIC12,   "__12F508",   { "pic12f508",   "p12f508",   "12f508"   }, 0x2508, 1, 1, 0x1ff,    "12f508.lkr"   },
+  { pic12f509,   PROC_CLASS_PIC12,   "__12F509",   { "pic12f509",   "p12f509",   "12f509"   }, 0x2509, 2, 2, 0x3ff,    "12f509.lkr"   },
+  { pic12f510,   PROC_CLASS_PIC12,   "__12F510",   { "pic12f510",   "p12f510",   "12f510"   }, 0x2510, 1, 2, 0x3ff,    "12f510.lkr"   },
+  { pic12f629,   PROC_CLASS_PIC14,   "__12F629",   { "pic12f629",   "p12f629",   "12f629"   }, 0x2629, 1, 2, 0x3fe,    "12f629.lkr"   },
+  { pic12f635,   PROC_CLASS_PIC14,   "__12F635",   { "pic12f635",   "p12f635",   "12f635"   }, 0x2635, 1, 4, 0x3ff,    "12f635.lkr"   },
+  { pic12f675,   PROC_CLASS_PIC14,   "__12F675",   { "pic12f675",   "p12f675",   "12f675"   }, 0x2675, 1, 2, 0x3fe,    "12f675.lkr"   },
+  { pic12f683,   PROC_CLASS_PIC14,   "__12F683",   { "pic12f683",   "p12f683",   "12f683"   }, 0x2683, 1, 2, 0x7ff,    "12f683.lkr"   },
+  { pic14000,    PROC_CLASS_PIC14,   "__14000",    { "pic14000",    "p14000",    "14000"    }, 0x4000, 2, 2, 0xfbf,    "14000.lkr"    },
+  { pic16c5x,    PROC_CLASS_PIC12,   "__16C5X",    { "pic16c5x",    "p16c5x",    "16c5x"    }, 0x658a, 4, 4, -1,       NULL           },
+  { pic16cxx,    PROC_CLASS_PIC14,   "__16CXX",    { "pic16cxx",    "p16cxx",    "16cxx"    }, 0x6c77, 4, 4, -1,       NULL           },
+  { pic16c432,   PROC_CLASS_PIC14,   "__16C432",   { "pic16c432",   "p16c432",   "16c432"   }, 0x6432, 1, 2, 0x7ff,    "16c432.lkr"   },
+  { pic16c433,   PROC_CLASS_PIC14,   "__16C433",   { "pic16c433",   "p16c433",   "16c433"   }, 0x6433, 1, 2, 0x7ff,    "16c433.lkr"   },
+  { pic16c505,   PROC_CLASS_PIC12,   "__16C505",   { "pic16c505",   "p16c505",   "16c505"   }, 0x2505, 1, 4, 0x3ff,    "16c505.lkr"   },
+  { pic16c52,    PROC_CLASS_PIC12,   "__16C52",    { "pic16c52",    "p16c52",    "16c52"    }, 0x6c52, 1, 1, 0x17f,    "16c52.lkr"    },
+  { pic16c54,    PROC_CLASS_PIC12,   "__16C54",    { "pic16c54",    "p16c54",    "16c54"    }, 0x6c54, 1, 1, 0x1ff,    "16c54.lkr"    },
+  { pic16c54a,   PROC_CLASS_PIC12,   "__16C54A",   { "pic16c54a",   "p16c54a",   "16c54a"   }, 0x654a, 1, 1, 0x1ff,    "16c54a.lkr"   },
+  { pic16c54b,   PROC_CLASS_PIC12,   "__16C54B",   { "pic16c54b",   "p16c54b",   "16c54b"   }, 0x654b, 1, 1, 0x1ff,    "16c54b.lkr"   },
+  { pic16c54c,   PROC_CLASS_PIC12,   "__16C54C",   { "pic16c54c",   "p16c54c",   "16c54c"   }, 0x654c, 1, 1, 0x1ff,    "16c54c.lkr"   },
+  { pic16c55,    PROC_CLASS_PIC12,   "__16C55",    { "pic16c55",    "p16c55",    "16c55"    }, 0x6c55, 1, 1, 0x1ff,    "16c55.lkr"    },
+  { pic16c55a,   PROC_CLASS_PIC12,   "__16C55A",   { "pic16c55a",   "p16c55a",   "16c55a"   }, 0x655a, 1, 1, 0x1ff,    "16c55a.lkr"   },
+  { pic16c554,   PROC_CLASS_PIC14,   "__16C554",   { "pic16c554",   "p16c554",   "16c554"   }, 0x6554, 1, 2, 0x1ff,    "16c554.lkr"   },
+  { pic16c557,   PROC_CLASS_PIC14,   "__16C557",   { "pic16c557",   "p16c557",   "16c557"   }, 0x6557, 1, 2, 0x7ff,    "16c557.lkr"   },
+  { pic16c558,   PROC_CLASS_PIC14,   "__16C558",   { "pic16c558",   "p16c558",   "16c558"   }, 0x6558, 1, 2, 0x7ff,    "16c558.lkr"   },
+  { pic16c56,    PROC_CLASS_PIC12,   "__16C56",    { "pic16c56",    "p16c56",    "16c56"    }, 0x6c56, 2, 1, 0x3ff,    "16c56.lkr"    },
+  { pic16c56a,   PROC_CLASS_PIC12,   "__16C56A",   { "pic16c56a",   "p16c56a",   "16c56a"   }, 0x656a, 2, 1, 0x3ff,    "16c56a.lkr"   },
+  { pic16c57,    PROC_CLASS_PIC12,   "__16C57",    { "pic16c57",    "p16c57",    "16c57"    }, 0x6c57, 4, 4, 0x7ff,    "16c57.lkr"    },
+  { pic16c57c,   PROC_CLASS_PIC12,   "__16C57C",   { "pic16c57c",   "p16c57c",   "16c57c"   }, 0x657c, 4, 4, 0x7ff,    "16c57c.lkr"   },
+  { pic16c58a,   PROC_CLASS_PIC12,   "__16C58A",   { "pic16c58a",   "p16c58a",   "16c58a"   }, 0x658a, 4, 4, 0x7ff,    "16c58a.lkr"   },
+  { pic16c58b,   PROC_CLASS_PIC12,   "__16C58B",   { "pic16c58b",   "p16c58b",   "16c58b"   }, 0x658b, 4, 4, 0x7ff,    "16c58b.lkr"   },
+  { pic16c61,    PROC_CLASS_PIC14,   "__16C61",    { "pic16c61",    "p16c61",    "16c61"    }, 0x6c61, 1, 2, 0x3ff,    "16c61.lkr"    },
+  { pic16c62,    PROC_CLASS_PIC14,   "__16C62",    { "pic16c62",    "p16c62",    "16c62"    }, 0x6c62, 1, 2, 0x7ff,    "16c62.lkr"    },
+  { pic16c62a,   PROC_CLASS_PIC14,   "__16C62A",   { "pic16c62a",   "p16c62a",   "16c62a"   }, 0x662a, 1, 2, 0x7ff,    "16c62a.lkr"   },
+  { pic16c62b,   PROC_CLASS_PIC14,   "__16C62B",   { "pic16c62b",   "p16c62b",   "16c62b"   }, 0x662b, 1, 2, 0x7ff,    "16c62b.lkr"   },
+  { pic16c620,   PROC_CLASS_PIC14,   "__16C620",   { "pic16c620",   "p16c620",   "16c620"   }, 0x6620, 1, 2, 0x1ff,    "16c620.lkr"   },
+  { pic16c620a,  PROC_CLASS_PIC14,   "__16C620A",  { "pic16c620a",  "p16c620a",  "16c620a"  }, 0x620a, 1, 2, 0x1ff,    "16c620a.lkr"  },
+  { pic16c621,   PROC_CLASS_PIC14,   "__16C621",   { "pic16c621",   "p16c621",   "16c621"   }, 0x6621, 1, 2, 0x3ff,    "16c621.lkr"   },
+  { pic16c621a,  PROC_CLASS_PIC14,   "__16C621A",  { "pic16c621a",  "p16c621a",  "16c621a"  }, 0x621a, 1, 2, 0x3ff,    "16c621a.lkr"  },
+  { pic16c622,   PROC_CLASS_PIC14,   "__16C622",   { "pic16c622",   "p16c622",   "16c622"   }, 0x6622, 1, 2, 0x7ff,    "16c622.lkr"   },
+  { pic16c622a,  PROC_CLASS_PIC14,   "__16C622A",  { "pic16c622a",  "p16c622a",  "16c622a"  }, 0x622a, 1, 2, 0x7ff,    "16c622a.lkr"  },
+  { pic16c63,    PROC_CLASS_PIC14,   "__16C63",    { "pic16c63",    "p16c63",    "16c63"    }, 0x6c63, 2, 2, 0xfff,    "16c63.lkr"    },
+  { pic16c63a,   PROC_CLASS_PIC14,   "__16C63A",   { "pic16c63a",   "p16c63a",   "16c63a"   }, 0x663a, 2, 2, 0xfff,    "16c63a.lkr"   },
+  { pic16c64,    PROC_CLASS_PIC14,   "__16C64",    { "pic16c64",    "p16c64",    "16c64"    }, 0x6c64, 1, 2, 0x7ff,    "16c64.lkr"    },
+  { pic16c64a,   PROC_CLASS_PIC14,   "__16C64A",   { "pic16c64a",   "p16c64a",   "16c64a"   }, 0x664a, 1, 2, 0x7ff,    "16c64a.lkr"   },
+  { pic16c642,   PROC_CLASS_PIC14,   "__16C642",   { "pic16c642",   "p16c642",   "16c642"   }, 0x6642, 2, 2, 0xfff,    "16c642.lkr"   },
+  { pic16c65,    PROC_CLASS_PIC14,   "__16C65",    { "pic16c65",    "p16c65",    "16c65"    }, 0x6c65, 2, 2, 0xfff,    "16c65.lkr"    },
+  { pic16c65a,   PROC_CLASS_PIC14,   "__16C65A",   { "pic16c65a",   "p16c65a",   "16c65a"   }, 0x665a, 2, 2, 0xfff,    "16c65a.lkr"   },
+  { pic16c65b,   PROC_CLASS_PIC14,   "__16C65B",   { "pic16c65b",   "p16c65b",   "16c65b"   }, 0x665b, 2, 2, 0xfff,    "16c65b.lkr"   },
+  { pic16c66,    PROC_CLASS_PIC14,   "__16C66",    { "pic16c66",    "p16c66",    "16c66"    }, 0x6c66, 4, 4, 0x1fff,   "16c66.lkr"    },
+  { pic16c662,   PROC_CLASS_PIC14,   "__16C662",   { "pic16c662",   "p16c662",   "16c662"   }, 0x6662, 2, 2, 0xfff,    "16c662.lkr"   },
+  { pic16c67,    PROC_CLASS_PIC14,   "__16C67",    { "pic16c67",    "p16c67",    "16c67"    }, 0x6c67, 4, 4, 0x1fff,   "16c67.lkr"    },
+  { pic16c71,    PROC_CLASS_PIC14,   "__16C71",    { "pic16c71",    "p16c71",    "16c71"    }, 0x6c71, 1, 2, 0x3ff,    "16c71.lkr"    },
+  { pic16c710,   PROC_CLASS_PIC14,   "__16C710",   { "pic16c710",   "p16c710",   "16c710"   }, 0x6710, 1, 2, 0x1ff,    "16c710.lkr"   },
+  { pic16c711,   PROC_CLASS_PIC14,   "__16C711",   { "pic16c711",   "p16c711",   "16c711"   }, 0x6711, 1, 2, 0x3ff,    "16c711.lkr"   },
+  { pic16c712,   PROC_CLASS_PIC14,   "__16C712",   { "pic16c712",   "p16c712",   "16c712"   }, 0x6712, 1, 2, 0x3ff,    "16c712.lkr"   },
+  { pic16c715,   PROC_CLASS_PIC14,   "__16C715",   { "pic16c715",   "p16c715",   "16c715"   }, 0x6715, 1, 2, 0x7ff,    "16c715.lkr"   },
+  { pic16c716,   PROC_CLASS_PIC14,   "__16C716",   { "pic16c716",   "p16c716",   "16c716"   }, 0x6716, 1, 2, 0x7ff,    "16c716.lkr"   },
+  { pic16c717,   PROC_CLASS_PIC14,   "__16C717",   { "pic16c717",   "p16c717",   "16c717"   }, 0x6717, 1, 4, 0x7ff,    "16c717.lkr"   },
+  { pic16c72,    PROC_CLASS_PIC14,   "__16C72",    { "pic16c72",    "p16c72",    "16c72"    }, 0x6c72, 1, 2, 0x7ff,    "16c72.lkr"    },
+  { pic16c72a,   PROC_CLASS_PIC14,   "__16C72A",   { "pic16c72a",   "p16c72a",   "16c72a"   }, 0x672a, 1, 2, 0x7ff,    "16c72a.lkr"   },
+  { pic16c73,    PROC_CLASS_PIC14,   "__16C73",    { "pic16c73",    "p16c73",    "16c73"    }, 0x673a, 2, 2, 0xfff,    "16c73.lkr"    },
+  { pic16c73a,   PROC_CLASS_PIC14,   "__16C73A",   { "pic16c73a",   "p16c73a",   "16c73a"   }, 0x673a, 2, 2, 0xfff,    "16c73a.lkr"   },
+  { pic16c73b,   PROC_CLASS_PIC14,   "__16C73B",   { "pic16c73b",   "p16c73b",   "16c73b"   }, 0x673b, 2, 2, 0xfff,    "16c73b.lkr"   },
+  { pic16c74,    PROC_CLASS_PIC14,   "__16C74",    { "pic16c74",    "p16c74",    "16c74"    }, 0x6c74, 2, 2, 0xfff,    "16c74.lkr"    },
+  { pic16c745,   PROC_CLASS_PIC14,   "__16C745",   { "pic16c745",   "p16c745",   "16c745"   }, 0x6745, 4, 4, 0x1fff,   "16c745.lkr"   },
+  { pic16c74a,   PROC_CLASS_PIC14,   "__16C74A",   { "pic16c74a",   "p16c74a",   "16c74a"   }, 0x674a, 2, 2, 0xfff,    "16c74a.lkr"   },
+  { pic16c74b,   PROC_CLASS_PIC14,   "__16C74B",   { "pic16c74b",   "p16c74b",   "16c74b"   }, 0x674b, 2, 2, 0xfff,    "16c74b.lkr"   },
+  { pic16c76,    PROC_CLASS_PIC14,   "__16C76",    { "pic16c76",    "p16c76",    "16c76"    }, 0x6c76, 4, 4, 0x1fff,   "16c76.lkr"    },
+  { pic16c765,   PROC_CLASS_PIC14,   "__16C765",   { "pic16c765",   "p16c765",   "16c765"   }, 0x6765, 4, 4, 0x1fff,   "16c765.lkr"   },
+  { pic16c77,    PROC_CLASS_PIC14,   "__16C77",    { "pic16c77",    "p16c77",    "16c77"    }, 0x6c77, 4, 4, 0x1fff,   "16c77.lkr"    },
+  { pic16c770,   PROC_CLASS_PIC14,   "__16C770",   { "pic16c770",   "p16c770",   "16c770"   }, 0x6770, 1, 4, 0x7ff,    "16c770.lkr"   },
+  { pic16c771,   PROC_CLASS_PIC14,   "__16C771",   { "pic16c771",   "p16c771",   "16c771"   }, 0x6771, 2, 4, 0xfff,    "16c771.lkr"   },
+  { pic16c773,   PROC_CLASS_PIC14,   "__16C773",   { "pic16c773",   "p16c773",   "16c773"   }, 0x6773, 2, 4, 0xfff,    "16c773.lkr"   },
+  { pic16c774,   PROC_CLASS_PIC14,   "__16C774",   { "pic16c774",   "p16c774",   "16c774"   }, 0x6774, 2, 4, 0xfff,    "16c774.lkr"   },
+  { pic16c781,   PROC_CLASS_PIC14,   "__16C781",   { "pic16c781",   "p16c781",   "16c781"   }, 0x6781, 1, 4, 0x3ff,    "16c781.lkr"   },
+  { pic16c782,   PROC_CLASS_PIC14,   "__16C782",   { "pic16c782",   "p16c782",   "16c782"   }, 0x6782, 1, 4, 0x7ff,    "16c782.lkr"   },
+  { pic16c84,    PROC_CLASS_PIC14,   "__16C84",    { "pic16c84",    "p16c84",    "16c84"    }, 0x6c84, 1, 2, 0x3ff,    "16c84.lkr"    },
+  { pic16c923,   PROC_CLASS_PIC14,   "__16C923",   { "pic16c923",   "p16c923",   "16c923"   }, 0x6923, 2, 4, 0xfff,    "16c923.lkr"   },
+  { pic16c924,   PROC_CLASS_PIC14,   "__16C924",   { "pic16c924",   "p16c924",   "16c924"   }, 0x6924, 2, 4, 0xfff,    "16c924.lkr"   },
+  { pic16c925,   PROC_CLASS_PIC14,   "__16C925",   { "pic16c925",   "p16c925",   "16c925"   }, 0x6925, 2, 4, 0xfff,    "16c925.lkr"   },
+  { pic16c926,   PROC_CLASS_PIC14,   "__16C926",   { "pic16c926",   "p16c926",   "16c926"   }, 0x6926, 4, 4, 0x1fff,   "16c926.lkr"   },
+  { pic16ce623,  PROC_CLASS_PIC14,   "__16CE623",  { "pic16ce623",  "p16ce623",  "16ce623"  }, 0x6623, 1, 2, 0x1ff,    "16ce623.lkr"  },
+  { pic16ce624,  PROC_CLASS_PIC14,   "__16CE624",  { "pic16ce624",  "p16ce624",  "16ce624"  }, 0x6624, 1, 2, 0x3ff,    "16ce624.lkr"  },
+  { pic16ce625,  PROC_CLASS_PIC14,   "__16CE625",  { "pic16ce625",  "p16ce625",  "16ce625"  }, 0x6625, 1, 2, 0x7ff,    "16ce625.lkr"  },
+  { pic16cr54,   PROC_CLASS_PIC12,   "__16CR54",   { "pic16cr54",   "p16cr54",   "16cr54"   }, 0xdc54, 1, 1, 0x1ff,    "16cr54.lkr"   },
+  { pic16cr54a,  PROC_CLASS_PIC12,   "__16CR54A",  { "pic16cr54a",  "p16cr54a",  "16cr54a"  }, 0xd54a, 1, 1, 0x1ff,    "16cr54a.lkr"  },
+  { pic16cr54b,  PROC_CLASS_PIC12,   "__16CR54B",  { "pic16cr54b",  "p16cr54b",  "16cr54b"  }, 0xd54b, 1, 1, 0x1ff,    "16cr54b.lkr"  },
+  { pic16cr54c,  PROC_CLASS_PIC12,   "__16CR54C",  { "pic16cr54c",  "p16cr54c",  "16cr54c"  }, 0xdc54, 1, 1, 0x1ff,    "16cr54c.lkr"  },
+  { pic16cr56a,  PROC_CLASS_PIC12,   "__16CR56A",  { "pic16cr56a",  "p16cr56a",  "16cr56a"  }, 0xd56a, 2, 1, 0x3ff,    "16cr56a.lkr"  },
+  { pic16cr57a,  PROC_CLASS_PIC12,   "__16CR57A",  { "pic16cr57a",  "p16cr57a",  "16cr57a"  }, 0xd57a, 4, 4, 0x7ff,    "16cr57a.lkr"  },
+  { pic16cr57b,  PROC_CLASS_PIC12,   "__16CR57B",  { "pic16cr57b",  "p16cr57b",  "16cr57b"  }, 0xd57b, 4, 4, 0x7ff,    "16cr57b.lkr"  },
+  { pic16cr57c,  PROC_CLASS_PIC12,   "__16CR57C",  { "pic16cr57c",  "p16cr57c",  "16cr57c"  }, 0xd57c, 4, 4, 0x7ff,    "16cr57c.lkr"  },
+  { pic16cr58a,  PROC_CLASS_PIC12,   "__16CR58A",  { "pic16cr58a",  "p16cr58a",  "16cr58a"  }, 0xd58a, 4, 4, 0x7ff,    "16cr58a.lkr"  },
+  { pic16cr58b,  PROC_CLASS_PIC12,   "__16CR58B",  { "pic16cr58b",  "p16cr58b",  "16cr58b"  }, 0xd58b, 4, 4, 0x7ff,    "16cr58b.lkr"  },
+  { pic16cr62,   PROC_CLASS_PIC14,   "__16CR62",   { "pic16cr62",   "p16cr62",   "16cr62"   }, 0xdc62, 1, 2, 0x7ff,    "16cr62.lkr"   },
+  { pic16cr620a, PROC_CLASS_PIC14,   "__16CR620A", { "pic16cr620a", "p16cr620a", "16cr620a" }, 0xd20a, 1, 2, 0x1ff,    "16cr620a.lkr" },
+  { pic16cr63,   PROC_CLASS_PIC14,   "__16CR63",   { "pic16cr63",   "p16cr63",   "16cr63"   }, 0x6d63, 2, 2, 0xfff,    "16cr63.lkr"   },
+  { pic16cr64,   PROC_CLASS_PIC14,   "__16CR64",   { "pic16cr64",   "p16cr64",   "16cr64"   }, 0xdc64, 1, 2, 0x7ff,    "16cr64.lkr"   },
+  { pic16cr65,   PROC_CLASS_PIC14,   "__16CR65",   { "pic16cr65",   "p16cr65",   "16cr65"   }, 0x6d65, 2, 2, 0xfff,    "16cr65.lkr"   },
+  { pic16cr72,   PROC_CLASS_PIC14,   "__16CR72",   { "pic16cr72",   "p16cr72",   "16cr72"   }, 0x6d72, 1, 2, 0x7ff,    "16cr72.lkr"   },
+  { pic16cr83,   PROC_CLASS_PIC14,   "__16CR83",   { "pic16cr83",   "p16cr83",   "16cr83"   }, 0xdc83, 1, 2, 0x1ff,    "16cr83.lkr"   },
+  { pic16cr84,   PROC_CLASS_PIC14,   "__16CR84",   { "pic16cr84",   "p16cr84",   "16cr84"   }, 0xdc84, 1, 2, 0x3ff,    "16cr84.lkr"   },
+  { pic16f505,   PROC_CLASS_PIC12,   "__16F505",   { "pic16f505",   "p16f505",   "16f505"   }, 0x654f, 2, 4, 0x3ff,    "16f505.lkr"   },
+  { pic16f54,    PROC_CLASS_PIC12,   "__16F54",    { "pic16f54",    "p16f54",    "16f54"    }, 0x654f, 1, 1, 0x1ff,    "16f54.lkr"    },
+  { pic16f57,    PROC_CLASS_PIC12,   "__16F57",    { "pic16f57",    "p16f57",    "16f57"    }, 0x657f, 4, 4, 0x7ff,    "16f57.lkr"    },
+  { pic16f59,    PROC_CLASS_PIC12,   "__16F59",    { "pic16f59",    "p16f59",    "16f59"    }, 0x659f, 4, 4, 0x7ff,    "16f59.lkr"    },
+  { pic16f610,   PROC_CLASS_PIC14,   "__16F610",   { "pic16f610",   "p16f610",   "16f610"   }, 0x6610, 1, 4, 0x3ff,    "16f610.lkr"   },
+  { pic16f627,   PROC_CLASS_PIC14,   "__16F627",   { "pic16f627",   "p16f627",   "16f627"   }, 0x6627, 1, 4, 0x3ff,    "16f627.lkr"   },
+  { pic16f627a,  PROC_CLASS_PIC14,   "__16F627A",  { "pic16f627a",  "p16f627a",  "16f627a"  }, 0x627a, 1, 4, 0x3ff,    "16f627a.lkr"  },
+  { pic16f628,   PROC_CLASS_PIC14,   "__16F628",   { "pic16f628",   "p16f628",   "16f628"   }, 0x6628, 1, 4, 0x7ff,    "16f628.lkr"   },
+  { pic16f628a,  PROC_CLASS_PIC14,   "__16F628A",  { "pic16f628a",  "p16f628a",  "16f628a"  }, 0x628a, 1, 4, 0x7ff,    "16f628a.lkr"  },
+  { pic16f630,   PROC_CLASS_PIC14,   "__16F630",   { "pic16f630",   "p16f630",   "16f630"   }, 0x6630, 1, 2, 0x3fe,    "16f630.lkr"   },
+  { pic16f636,   PROC_CLASS_PIC14,   "__16F636",   { "pic16f636",   "p16f636",   "16f636"   }, 0x6636, 1, 4, 0x7ff,    "16f636.lkr"   },
+  { pic16f639,   PROC_CLASS_PIC14,   "__16F639",   { "pic16f639",   "p16f639",   "16f639"   }, 0x6639, 1, 4, 0x7ff,    "16f639.lkr"   },
+  { pic16f648a,  PROC_CLASS_PIC14,   "__16F648A",  { "pic16f648a",  "p16f648a",  "16f648a"  }, 0x648a, 2, 4, 0xfff,    "16f648a.lkr"  },
+  { pic16f676,   PROC_CLASS_PIC14,   "__16F676",   { "pic16f676",   "p16f676",   "16f676"   }, 0x6676, 1, 2, 0x3fe,    "16f676.lkr"   },
+  { pic16f684,   PROC_CLASS_PIC14,   "__16F684",   { "pic16f684",   "p16f684",   "16f684"   }, 0x6684, 1, 2, 0x7ff,    "16f684.lkr"   },
+  { pic16f685,   PROC_CLASS_PIC14,   "__16F685",   { "pic16f685",   "p16f685",   "16f685"   }, 0x6685, 2, 4, 0xfff,    "16f685.lkr"   },
+  { pic16f687,   PROC_CLASS_PIC14,   "__16F687",   { "pic16f687",   "p16f687",   "16f687"   }, 0x6687, 1, 4, 0x7ff,    "16f687.lkr"   },
+  { pic16f688,   PROC_CLASS_PIC14,   "__16F688",   { "pic16f688",   "p16f688",   "16f688"   }, 0x6688, 2, 4, 0xfff,    "16f688.lkr"   },
+  { pic16f689,   PROC_CLASS_PIC14,   "__16F689",   { "pic16f689",   "p16f689",   "16f689"   }, 0x6689, 2, 4, 0xfff,    "16f689.lkr"   },
+  { pic16f690,   PROC_CLASS_PIC14,   "__16F690",   { "pic16f690",   "p16f690",   "16f690"   }, 0x6690, 2, 4, 0xfff,    "16f690.lkr"   },
+  { pic16f716,   PROC_CLASS_PIC14,   "__16F716",   { "pic16f716",   "p16f716",   "16f716"   }, 0x716f, 1, 2, 0x7ff,    "16f716.lkr"   },
+  { pic16f72,    PROC_CLASS_PIC14,   "__16F72",    { "pic16f72",    "p16f72",    "16f72"    }, 0x672f, 1, 4, 0x7ff,    "16f72.lkr"    },
+  { pic16f73,    PROC_CLASS_PIC14,   "__16F73",    { "pic16f73",    "p16f73",    "16f73"    }, 0x673f, 2, 4, 0xfff,    "16f73.lkr"    },
+  { pic16f737,   PROC_CLASS_PIC14,   "__16F737",   { "pic16f737",   "p16f737",   "16f737"   }, 0x737f, 2, 4, 0xfff,    "16f737.lkr"   },
+  { pic16f74,    PROC_CLASS_PIC14,   "__16F74",    { "pic16f74",    "p16f74",    "16f74"    }, 0x674f, 2, 4, 0xfff,    "16f74.lkr"    },
+  { pic16f747,   PROC_CLASS_PIC14,   "__16F747",   { "pic16f747",   "p16f747",   "16f747"   }, 0x6747, 2, 4, 0xfff,    "16f747.lkr"   },
+  { pic16f76,    PROC_CLASS_PIC14,   "__16F76",    { "pic16f76",    "p16f76",    "16f76"    }, 0x676f, 4, 4, 0x1fff,   "16f76.lkr"    },
+  { pic16f767,   PROC_CLASS_PIC14,   "__16F767",   { "pic16f767",   "p16f767",   "16f767"   }, 0x767f, 4, 4, 0x1fff,   "16f767.lkr"   },
+  { pic16f77,    PROC_CLASS_PIC14,   "__16F77",    { "pic16f77",    "p16f77",    "16f77"    }, 0x677f, 4, 4, 0x1fff,   "16f77.lkr"    },
+  { pic16f777,   PROC_CLASS_PIC14,   "__16F777",   { "pic16f777",   "p16f777",   "16f777"   }, 0x777f, 4, 4, 0x1fff,   "16f777.lkr"   },
+  { pic16f785,   PROC_CLASS_PIC14,   "__16F785",   { "pic16f785",   "p16f785",   "16f785"   }, 0x785f, 1, 4, 0x7ff,    "16f785.lkr"   },
+  { pic16f818,   PROC_CLASS_PIC14,   "__16F818",   { "pic16f818",   "p16f818",   "16f818"   }, 0x818f, 1, 4, 0x3ff,    "16f818.lkr"   },
+  { pic16f819,   PROC_CLASS_PIC14,   "__16F819",   { "pic16f819",   "p16f819",   "16f819"   }, 0x819f, 1, 4, 0x7ff,    "16f819.lkr"   },
+  { pic16f83,    PROC_CLASS_PIC14,   "__16F83",    { "pic16f83",    "p16f83",    "16f83"    }, 0x6c83, 1, 2, 0x1ff,    "16f83.lkr"    },
+  { pic16f84,    PROC_CLASS_PIC14,   "__16F84",    { "pic16f84",    "p16f84",    "16f84"    }, 0x6f84, 1, 2, 0x3ff,    "16f84.lkr"    },
+  { pic16f84a,   PROC_CLASS_PIC14,   "__16F84A",   { "pic16f84a",   "p16f84a",   "16f84a"   }, 0x684a, 1, 2, 0x3ff,    "16f84a.lkr"   },
+  { pic16f87,    PROC_CLASS_PIC14,   "__16F87",    { "pic16f87",    "p16f87",    "16f87"    }, 0x687f, 2, 4, 0xfff,    "16f87.lkr"    },
+  { pic16f870,   PROC_CLASS_PIC14,   "__16F870",   { "pic16f870",   "p16f870",   "16f870"   }, 0x870f, 1, 4, 0x7ff,    "16f870.lkr"   },
+  { pic16f871,   PROC_CLASS_PIC14,   "__16F871",   { "pic16f871",   "p16f871",   "16f871"   }, 0x871f, 1, 4, 0x7ff,    "16f871.lkr"   },
+  { pic16f872,   PROC_CLASS_PIC14,   "__16F872",   { "pic16f872",   "p16f872",   "16f872"   }, 0x872f, 1, 4, 0x7ff,    "16f872.lkr"   },
+  { pic16f873,   PROC_CLASS_PIC14,   "__16F873",   { "pic16f873",   "p16f873",   "16f873"   }, 0x873f, 2, 4, 0xfff,    "16f873.lkr"   },
+  { pic16f873a,  PROC_CLASS_PIC14,   "__16F873A",  { "pic16f873a",  "p16f873a",  "16f873a"  }, 0x873a, 2, 4, 0xfff,    "16f873a.lkr"  },
+  { pic16f874,   PROC_CLASS_PIC14,   "__16F874",   { "pic16f874",   "p16f874",   "16f874"   }, 0x874f, 2, 4, 0xfff,    "16f874.lkr"   },
+  { pic16f874a,  PROC_CLASS_PIC14,   "__16F874A",  { "pic16f874a",  "p16f874a",  "16f874a"  }, 0x874a, 2, 4, 0xfff,    "16f874a.lkr"  },
+  { pic16f876,   PROC_CLASS_PIC14,   "__16F876",   { "pic16f876",   "p16f876",   "16f876"   }, 0x876f, 4, 4, 0x1fff,   "16f876.lkr"   },
+  { pic16f876a,  PROC_CLASS_PIC14,   "__16F876A",  { "pic16f876a",  "p16f876a",  "16f876a"  }, 0x876a, 4, 4, 0x1fff,   "16f876a.lkr"  },
+  { pic16f877,   PROC_CLASS_PIC14,   "__16F877",   { "pic16f877",   "p16f877",   "16f877"   }, 0x877f, 4, 4, 0x1fff,   "16f877.lkr"   },
+  { pic16f877a,  PROC_CLASS_PIC14,   "__16F877A",  { "pic16f877a",  "p16f877a",  "16f877a"  }, 0x877a, 4, 4, 0x1fff,   "16f877a.lkr"  },
+  { pic16f88,    PROC_CLASS_PIC14,   "__16F88",    { "pic16f88",    "p16f88",    "16f88"    }, 0x688f, 4, 4, 0xfff,    "16f88.lkr"    },
+  { pic16f882,   PROC_CLASS_PIC14,   "__16F882",   { "pic16f882",   "p16f882",   "16f882"   }, 0x882f, 4, 4, 0x7ff,    "16f882.lkr"   },
+  { pic16f883,   PROC_CLASS_PIC14,   "__16F883",   { "pic16f883",   "p16f883",   "16f883"   }, 0x883f, 4, 4, 0xfff,    "16f883.lkr"   },
+  { pic16f884,   PROC_CLASS_PIC14,   "__16F884",   { "pic16f884",   "p16f884",   "16f884"   }, 0x884f, 4, 4, 0xfff,    "16f884.lkr"   },
+  { pic16f886,   PROC_CLASS_PIC14,   "__16F886",   { "pic16f886",   "p16f886",   "16f886"   }, 0x886f, 4, 4, 0x1fff,   "16f886.lkr"   },
+  { pic16f887,   PROC_CLASS_PIC14,   "__16F887",   { "pic16f887",   "p16f887",   "16f887"   }, 0x887f, 4, 4, 0x1fff,   "16f887.lkr"   },
+  { pic16f913,   PROC_CLASS_PIC14,   "__16F913",   { "pic16f913",   "p16f913",   "16f913"   }, 0x913f, 2, 4, 0xfff,    "16f913.lkr"   },
+  { pic16f914,   PROC_CLASS_PIC14,   "__16F914",   { "pic16f914",   "p16f914",   "16f914"   }, 0x914f, 4, 4, 0xfff,    "16f914.lkr"   },
+  { pic16f916,   PROC_CLASS_PIC14,   "__16F916",   { "pic16f916",   "p16f916",   "16f916"   }, 0x916f, 2, 4, 0x1fff,   "16f916.lkr"   },
+  { pic16f917,   PROC_CLASS_PIC14,   "__16F917",   { "pic16f917",   "p16f917",   "16f917"   }, 0x917f, 4, 4, 0x1fff,   "16f917.lkr"   },
+  { pic16hv540,  PROC_CLASS_PIC12,   "__16HV540",  { "pic16hv540",  "p16hv540",  "16hv540"  }, 0x6540, 1, 1, 0x1ff,    "16hv540.lkr"  },
+  { pic17cxx,    PROC_CLASS_PIC16,   "__17CXX",    { "pic17cxx",    "p17cxx",    "17cxx"    }, 0x7756, 0, 0, -1,       NULL           },
+  { pic17c42,    PROC_CLASS_PIC16,   "__17C42",    { "pic17c42",    "p17c42",    "17c42"    }, 0x7c42, 0, 0, 0x7ff,    "17c42.lkr"    },
+  { pic17c42a,   PROC_CLASS_PIC16,   "__17C42A",   { "pic17c42a",   "p17c42a",   "17c42a"   }, 0x742a, 0, 0, 0x7ff,    "17c42a.lkr"   },
+  { pic17c43,    PROC_CLASS_PIC16,   "__17C43",    { "pic17c43",    "p17c43",    "17c43"    }, 0x7c43, 0, 0, 0xfff,    "17c43.lkr"    },
+  { pic17c44,    PROC_CLASS_PIC16,   "__17C44",    { "pic17c44",    "p17c44",    "17c44"    }, 0x7c44, 0, 0, 0x1fff,   "17c44.lkr"    },
+  { pic17c752,   PROC_CLASS_PIC16,   "__17C752",   { "pic17c752",   "p17c752",   "17c752"   }, 0x7752, 0, 0, 0x1fff,   "17c752.lkr"   },
+  { pic17c756,   PROC_CLASS_PIC16,   "__17C756",   { "pic17c756",   "p17c756",   "17c756"   }, 0x7756, 0, 0, 0x3fff,   "17c756.lkr"   },
+  { pic17c756a,  PROC_CLASS_PIC16,   "__17C756A",  { "pic17c756a",  "p17c756a",  "17c756a"  }, 0x756a, 0, 0, 0x3fff,   "17c756a.lkr"  },
+  { pic17c762,   PROC_CLASS_PIC16,   "__17C762",   { "pic17c762",   "p17c762",   "17c762"   }, 0x7762, 0, 0, 0x1fff,   "17c762.lkr"   },
+  { pic17c766,   PROC_CLASS_PIC16,   "__17C766",   { "pic17c766",   "p17c766",   "17c766"   }, 0x7766, 0, 0, 0x3fff,   "17c766.lkr"   },
+  { pic17cr42,   PROC_CLASS_PIC16,   "__17CR42",   { "pic17cr42",   "p17cr42",   "17cr42"   }, 0xe42a, 0, 0, 0x7ff,    "17cr42.lkr"   },
+  { pic17cr43,   PROC_CLASS_PIC16,   "__17CR43",   { "pic17cr43",   "p17cr43",   "17cr43"   }, 0xec43, 0, 0, 0xfff,    "17cr43.lkr"   },
+  { pic18cxx,    PROC_CLASS_PIC16E,  "__18CXX",    { "pic18cxx",    "p18cxx",    "18cxx"    }, 0x8452, 0, 0, -1,       NULL           },
+  { pic18c242,   PROC_CLASS_PIC16E,  "__18C242",   { "pic18c242",   "p18c242",   "18c242"   }, 0x8242, 0, 0, 0x3fff,   "18c242.lkr"   },
+  { pic18c252,   PROC_CLASS_PIC16E,  "__18C252",   { "pic18c252",   "p18c252",   "18c252"   }, 0x8252, 0, 0, 0x7fff,   "18c252.lkr"   },
+  { pic18c442,   PROC_CLASS_PIC16E,  "__18C442",   { "pic18c442",   "p18c442",   "18c442"   }, 0x8442, 0, 0, 0x3fff,   "18c442.lkr"   },
+  { pic18c452,   PROC_CLASS_PIC16E,  "__18C452",   { "pic18c452",   "p18c452",   "18c452"   }, 0x8452, 0, 0, 0x7fff,   "18c452.lkr"   },
+  { pic18c601,   PROC_CLASS_PIC16E,  "__18C601",   { "pic18c601",   "p18c601",   "18c601"   }, 0x8601, 0, 0, 0x3ffff,  "18c601.lkr"   },
+  { pic18c658,   PROC_CLASS_PIC16E,  "__18C658",   { "pic18c658",   "p18c658",   "18c658"   }, 0x8658, 0, 0, 0x7fff,   "18c658.lkr"   },
+  { pic18c801,   PROC_CLASS_PIC16E,  "__18C801",   { "pic18c801",   "p18c801",   "18c801"   }, 0x8801, 0, 0, 0x1fffff, "18c801.lkr"   },
+  { pic18c858,   PROC_CLASS_PIC16E,  "__18C858",   { "pic18c858",   "p18c858",   "18c858"   }, 0x8858, 0, 0, 0x7fff,   "18c858.lkr"   },
+  { pic18f1220,  PROC_CLASS_PIC16E,  "__18F1220",  { "pic18f1220",  "p18f1220",  "18f1220"  }, 0xa122, 0, 0, 0xfff,    "18f1220.lkr"  },
+  { pic18f1230,  PROC_CLASS_PIC16E,  "__18F1230",  { "pic18f1230",  "p18f1230",  "18f1230"  }, 0xa123, 0, 0, 0xfff,    "18f1230.lkr"  },
+  { pic18f1320,  PROC_CLASS_PIC16E,  "__18F1320",  { "pic18f1320",  "p18f1320",  "18f1320"  }, 0xa132, 0, 0, 0x1fff,   "18f1320.lkr"  },
+  { pic18f1330,  PROC_CLASS_PIC16E,  "__18F1330",  { "pic18f1330",  "p18f1330",  "18f1330"  }, 0xa133, 0, 0, 0x1fff,   "18f1330.lkr"  },
+  { pic18f2220,  PROC_CLASS_PIC16E,  "__18F2220",  { "pic18f2220",  "p18f2220",  "18f2220"  }, 0xa222, 0, 0, 0xfff,    "18f2220.lkr"  },
+  { pic18f2320,  PROC_CLASS_PIC16E,  "__18F2320",  { "pic18f2320",  "p18f2320",  "18f2320"  }, 0xa232, 0, 0, 0x1fff,   "18f2320.lkr"  },
+  { pic18f2331,  PROC_CLASS_PIC16E,  "__18F2331",  { "pic18f2331",  "p18f2331",  "18f2331"  }, 0x2331, 0, 0, 0x1fff,   "18f2331.lkr"  },
+  { pic18f2410,  PROC_CLASS_PIC16E,  "__18F2410",  { "pic18f2410",  "p18f2410",  "18f2410"  }, 0x2410, 0, 0, 0x3fff,   "18f2410.lkr"  },
+  { pic18f242,   PROC_CLASS_PIC16E,  "__18F242",   { "pic18f242",   "p18f242",   "18f242"   }, 0x242f, 0, 0, 0x3fff,   "18f242.lkr"   },
+  { pic18f2420,  PROC_CLASS_PIC16E,  "__18F2420",  { "pic18f2420",  "p18f2420",  "18f2420"  }, 0x2420, 0, 0, 0x3fff,   "18f2420.lkr"  },
+  { pic18f2431,  PROC_CLASS_PIC16E,  "__18F2431",  { "pic18f2431",  "p18f2431",  "18f2431"  }, 0x2431, 0, 0, 0x3fff,   "18f2431.lkr"  },
+  { pic18f2439,  PROC_CLASS_PIC16E,  "__18F2439",  { "pic18f2439",  "p18f2439",  "18f2439"  }, 0x2439, 0, 0, 0x2fff,   "18f2439.lkr"  },
+  { pic18f2455,  PROC_CLASS_PIC16E,  "__18F2455",  { "pic18f2455",  "p18f2455",  "18f2455"  }, 0x2455, 0, 0, 0x5fff,   "18f2455.lkr"  },
+  { pic18f248,   PROC_CLASS_PIC16E,  "__18F248",   { "pic18f248",   "p18f248",   "18f248"   }, 0x8248, 0, 0, 0x3fff,   "18f248.lkr"   },
+  { pic18f2480,  PROC_CLASS_PIC16E,  "__18F2480",  { "pic18f2480",  "p18f2480",  "18f2480"  }, 0x2480, 0, 0, 0x3fff,   "18f2480.lkr"  },
+  { pic18f24j10, PROC_CLASS_PIC16E,  "__18F24J10", { "pic18f24j10", "p18f24j10", "18f24j10" }, 0xd410, 0, 0, 0x3ff7,   "18f24j10.lkr" },
+  { pic18f2510,  PROC_CLASS_PIC16E,  "__18F2510",  { "pic18f2510",  "p18f2510",  "18f2510"  }, 0x2510, 0, 0, 0x7fff,   "18f2510.lkr"  },
+  { pic18f2515,  PROC_CLASS_PIC16E,  "__18F2515",  { "pic18f2515",  "p18f2515",  "18f2515"  }, 0x2515, 0, 0, 0xbfff,   "18f2515.lkr"  },
+  { pic18f252,   PROC_CLASS_PIC16E,  "__18F252",   { "pic18f252",   "p18f252",   "18f252"   }, 0x252f, 0, 0, 0x7fff,   "18f252.lkr"   },
+  { pic18f2520,  PROC_CLASS_PIC16E,  "__18F2520",  { "pic18f2520",  "p18f2520",  "18f2520"  }, 0x2520, 0, 0, 0x7fff,   "18f2520.lkr"  },
+  { pic18f2525,  PROC_CLASS_PIC16E,  "__18F2525",  { "pic18f2525",  "p18f2525",  "18f2525"  }, 0x2525, 0, 0, 0xbfff,   "18f2525.lkr"  },
+  { pic18f2539,  PROC_CLASS_PIC16E,  "__18F2539",  { "pic18f2539",  "p18f2539",  "18f2539"  }, 0x2539, 0, 0, 0x5fff,   "18f2539.lkr"  },
+  { pic18f2550,  PROC_CLASS_PIC16E,  "__18F2550",  { "pic18f2550",  "p18f2550",  "18f2550"  }, 0x2550, 0, 0, 0x7fff,   "18f2550.lkr"  },
+  { pic18f258,   PROC_CLASS_PIC16E,  "__18F258",   { "pic18f258",   "p18f258",   "18f258"   }, 0x8258, 0, 0, 0x7fff,   "18f258.lkr"   },
+  { pic18f2580,  PROC_CLASS_PIC16E,  "__18F2580",  { "pic18f2580",  "p18f2580",  "18f2580"  }, 0x2580, 0, 0, 0x7fff,   "18f2580.lkr"  },
+  { pic18f2585,  PROC_CLASS_PIC16E,  "__18F2585",  { "pic18f2585",  "p18f2585",  "18f2585"  }, 0x2585, 0, 0, 0xbfff,   "18f2585.lkr"  },
+  { pic18f25j10, PROC_CLASS_PIC16E,  "__18F25J10", { "pic18f25j10", "p18f25j10", "18f25j10" }, 0xd510, 0, 0, 0x7ff7,   "18f25j10.lkr" },
+  { pic18f2610,  PROC_CLASS_PIC16E,  "__18F2610",  { "pic18f2610",  "p18f2610",  "18f2610"  }, 0xa261, 0, 0, 0xffff,   "18f2610.lkr"  },
+  { pic18f2620,  PROC_CLASS_PIC16E,  "__18F2620",  { "pic18f2620",  "p18f2620",  "18f2620"  }, 0xa262, 0, 0, 0xffff,   "18f2620.lkr"  },
+  { pic18f2680,  PROC_CLASS_PIC16E,  "__18F2680",  { "pic18f2680",  "p18f2680",  "18f2680"  }, 0x2680, 0, 0, 0xffff,   "18f2680.lkr"  },
+  { pic18f2681,  PROC_CLASS_PIC16E,  "__18F2681",  { "pic18f2681",  "p18f2681",  "18f2681"  }, 0x2681, 0, 0, -1,       "18f2681.lkr"  },
+  { pic18f2682,  PROC_CLASS_PIC16E,  "__18F2682",  { "pic18f2682",  "p18f2682",  "18f2682"  }, 0x2682, 0, 0, 0x13fff,  "18f2682.lkr"  },
+  { pic18f2685,  PROC_CLASS_PIC16E,  "__18F2685",  { "pic18f2685",  "p18f2685",  "18f2685"  }, 0x2685, 0, 0, 0x17fff,  "18f2685.lkr"  },
+  { pic18f4220,  PROC_CLASS_PIC16E,  "__18F4220",  { "pic18f4220",  "p18f4220",  "18f4220"  }, 0xa422, 0, 0, 0xfff,    "18f4220.lkr"  },
+  { pic18f4320,  PROC_CLASS_PIC16E,  "__18F4320",  { "pic18f4320",  "p18f4320",  "18f4320"  }, 0xa432, 0, 0, 0x1fff,   "18f4320.lkr"  },
+  { pic18f4331,  PROC_CLASS_PIC16E,  "__18F4331",  { "pic18f4331",  "p18f4331",  "18f4331"  }, 0x4331, 0, 0, 0x1fff,   "18f4331.lkr"  },
+  { pic18f4410,  PROC_CLASS_PIC16E,  "__18F4410",  { "pic18f4410",  "p18f4410",  "18f4410"  }, 0x4410, 0, 0, 0x3fff,   "18f4410.lkr"  },
+  { pic18f442,   PROC_CLASS_PIC16E,  "__18F442",   { "pic18f442",   "p18f442",   "18f442"   }, 0x442f, 0, 0, 0x3fff,   "18f442.lkr"   },
+  { pic18f4420,  PROC_CLASS_PIC16E,  "__18F4420",  { "pic18f4420",  "p18f4420",  "18f4420"  }, 0x4420, 0, 0, 0x3fff,   "18f4420.lkr"  },
+  { pic18f4431,  PROC_CLASS_PIC16E,  "__18F4431",  { "pic18f4431",  "p18f4431",  "18f4431"  }, 0x4431, 0, 0, 0x1fff,   "18f4431.lkr"  },
+  { pic18f4439,  PROC_CLASS_PIC16E,  "__18F4439",  { "pic18f4439",  "p18f4439",  "18f4439"  }, 0x4439, 0, 0, 0x2fff,   "18f4439.lkr"  },
+  { pic18f4455,  PROC_CLASS_PIC16E,  "__18F4455",  { "pic18f4455",  "p18f4455",  "18f4455"  }, 0x4455, 0, 0, 0x5fff,   "18f4455.lkr"  },
+  { pic18f448,   PROC_CLASS_PIC16E,  "__18F448",   { "pic18f448",   "p18f448",   "18f448"   }, 0x8448, 0, 0, 0x3fff,   "18f448.lkr"   },
+  { pic18f4480,  PROC_CLASS_PIC16E,  "__18F4480",  { "pic18f4480",  "p18f4480",  "18f4480"  }, 0x4480, 0, 0, 0x3fff,   "18f4480.lkr"  },
+  { pic18f44j10, PROC_CLASS_PIC16E,  "__18F44J10", { "pic18f44j10", "p18f44j10", "18f44j10" }, 0xe410, 0, 0, 0x3ff7,   "18f44j10.lkr" },
+  { pic18f4510,  PROC_CLASS_PIC16E,  "__18F4510",  { "pic18f4510",  "p18f4510",  "18f4510"  }, 0x4510, 0, 0, 0x7fff,   "18f4510.lkr"  },
+  { pic18f4515,  PROC_CLASS_PIC16E,  "__18F4515",  { "pic18f4515",  "p18f4515",  "18f4515"  }, 0x4515, 0, 0, 0xbfff,   "18f4515.lkr"  },
+  { pic18f452,   PROC_CLASS_PIC16E,  "__18F452",   { "pic18f452",   "p18f452",   "18f452"   }, 0x452f, 0, 0, 0x7fff,   "18f452.lkr"   },
+  { pic18f4520,  PROC_CLASS_PIC16E,  "__18F4520",  { "pic18f4520",  "p18f4520",  "18f4520"  }, 0x4520, 0, 0, 0x7fff,   "18f4520.lkr"  },
+  { pic18f4525,  PROC_CLASS_PIC16E,  "__18F4525",  { "pic18f4525",  "p18f4525",  "18f4525"  }, 0x4525, 0, 0, 0xbfff,   "18f4525.lkr"  },
+  { pic18f4539,  PROC_CLASS_PIC16E,  "__18F4539",  { "pic18f4539",  "p18f4539",  "18f4539"  }, 0x4539, 0, 0, 0x5fff,   "18f4539.lkr"  },
+  { pic18f4550,  PROC_CLASS_PIC16E,  "__18F4550",  { "pic18f4550",  "p18f4550",  "18f4550"  }, 0x4550, 0, 0, 0x7fff,   "18f4550.lkr"  },
+  { pic18f458,   PROC_CLASS_PIC16E,  "__18F458",   { "pic18f458",   "p18f458",   "18f458"   }, 0x8458, 0, 0, 0x7fff,   "18f458.lkr"   },
+  { pic18f4580,  PROC_CLASS_PIC16E,  "__18F4580",  { "pic18f4580",  "p18f4580",  "18f4580"  }, 0x4580, 0, 0, 0x7fff,   "18f4580.lkr"  },
+  { pic18f4585,  PROC_CLASS_PIC16E,  "__18F4585",  { "pic18f4585",  "p18f4585",  "18f4585"  }, 0x4585, 0, 0, 0xbfff,   "18f4585.lkr"  },
+  { pic18f45j10, PROC_CLASS_PIC16E,  "__18F45J10", { "pic18f45j10", "p18f45j10", "18f45j10" }, 0xe510, 0, 0, 0x7ff7,   "18f45j10.lkr" },
+  { pic18f4610,  PROC_CLASS_PIC16E,  "__18F4610",  { "pic18f4610",  "p18f4610",  "18f4610"  }, 0xa461, 0, 0, 0xffff,   "18f4610.lkr"  },
+  { pic18f4620,  PROC_CLASS_PIC16E,  "__18F4620",  { "pic18f4620",  "p18f4620",  "18f4620"  }, 0xa462, 0, 0, 0xffff,   "18f4620.lkr"  },
+  { pic18f4680,  PROC_CLASS_PIC16E,  "__18F4680",  { "pic18f4680",  "p18f4680",  "18f4680"  }, 0x4680, 0, 0, 0xffff,   "18f4680.lkr"  },
+  { pic18f4681,  PROC_CLASS_PIC16E,  "__18F4681",  { "pic18f4681",  "p18f4681",  "18f4681"  }, 0x4681, 0, 0, -1,       "18f4681.lkr"  },
+  { pic18f4682,  PROC_CLASS_PIC16E,  "__18F4682",  { "pic18f4682",  "p18f4682",  "18f4682"  }, 0x4682, 0, 0, 0x13fff,  "18f4682.lkr"  },
+  { pic18f4685,  PROC_CLASS_PIC16E,  "__18F4685",  { "pic18f4685",  "p18f4685",  "18f4685"  }, 0x4685, 0, 0, 0x17fff,  "18f4685.lkr"  },
+  { pic18f6310,  PROC_CLASS_PIC16E,  "__18F6310",  { "pic18f6310",  "p18f6310",  "18f6310"  }, 0xa631, 0, 0, 0x1fff,   "18f6310.lkr"  },
+  { pic18f6390,  PROC_CLASS_PIC16E,  "__18F6390",  { "pic18f6390",  "p18f6390",  "18f6390"  }, 0xa639, 0, 0, 0x1fff,   "18f6390.lkr"  },
+  { pic18f6410,  PROC_CLASS_PIC16E,  "__18F6410",  { "pic18f6410",  "p18f6410",  "18f6410"  }, 0xa641, 0, 0, 0x3fff,   "18f6410.lkr"  },
+  { pic18f6490,  PROC_CLASS_PIC16E,  "__18F6490",  { "pic18f6490",  "p18f6490",  "18f6490"  }, 0xa649, 0, 0, 0x3fff,   "18f6490.lkr"  },
+  { pic18f64j15, PROC_CLASS_PIC16E,  "__18F64J15", { "pic18f64j15", "p18f64j15", "18f64j15" }, 0xb415, 0, 0, -1,       "18f64j15.lkr" },
+  { pic18f6520,  PROC_CLASS_PIC16E,  "__18F6520",  { "pic18f6520",  "p18f6520",  "18f6520"  }, 0xa652, 0, 0, 0x7fff,   "18f6520.lkr"  },
+  { pic18f6525,  PROC_CLASS_PIC16E,  "__18F6525",  { "pic18f6525",  "p18f6525",  "18f6525"  }, 0x6525, 0, 0, 0xbfff,   "18f6525.lkr"  },
+  { pic18f6585,  PROC_CLASS_PIC16E,  "__18F6585",  { "pic18f6585",  "p18f6585",  "18f6585"  }, 0x6585, 0, 0, 0xbfff,   "18f6585.lkr"  },
+  { pic18f65j10, PROC_CLASS_PIC16E,  "__18F65J10", { "pic18f65j10", "p18f65j10", "18f65j10" }, 0xb510, 0, 0, 0xbfff,   "18f65j10.lkr" },
+  { pic18f65j15, PROC_CLASS_PIC16E,  "__18F65J15", { "pic18f65j15", "p18f65j15", "18f65j15" }, 0xb515, 0, 0, 0xbff7,   "18f65j15.lkr" },
+  { pic18f6620,  PROC_CLASS_PIC16E,  "__18F6620",  { "pic18f6620",  "p18f6620",  "18f6620"  }, 0xa662, 0, 0, 0xffff,   "18f6620.lkr"  },
+  { pic18f6621,  PROC_CLASS_PIC16E,  "__18F6621",  { "pic18f6621",  "p18f6621",  "18f6621"  }, 0xa621, 0, 0, 0xffff,   "18f6621.lkr"  },
+  { pic18f6627,  PROC_CLASS_PIC16E,  "__18F6627",  { "pic18f6627",  "p18f6627",  "18f6627"  }, 0xa627, 0, 0, 0x17fff,  "18f6627.lkr"  },
+  { pic18f6680,  PROC_CLASS_PIC16E,  "__18F6680",  { "pic18f6680",  "p18f6680",  "18f6680"  }, 0x6680, 0, 0, 0xffff,   "18f6680.lkr"  },
+  { pic18f66j10, PROC_CLASS_PIC16E,  "__18F66J10", { "pic18f66j10", "p18f66j10", "18f66j10" }, 0xb610, 0, 0, 0xfff7,   "18f66j10.lkr" },
+  { pic18f66j15, PROC_CLASS_PIC16E,  "__18F66J15", { "pic18f66j15", "p18f66j15", "18f66j15" }, 0xb615, 0, 0, 0x17ff7,  "18f66j15.lkr" },
+  { pic18f6720,  PROC_CLASS_PIC16E,  "__18F6720",  { "pic18f6720",  "p18f6720",  "18f6720"  }, 0xa672, 0, 0, 0x1ffff,  "18f6720.lkr"  },
+  { pic18f6722,  PROC_CLASS_PIC16E,  "__18F6722",  { "pic18f6722",  "p18f6722",  "18f6722"  }, 0x6722, 0, 0, 0x1ffff,  "18f6722.lkr"  },
+  { pic18f67j10, PROC_CLASS_PIC16E,  "__18F67J10", { "pic18f67j10", "p18f67j10", "18f67j10" }, 0xb710, 0, 0, 0x1fff7,  "18f67j10.lkr" },
+  { pic18f8310,  PROC_CLASS_PIC16E,  "__18F8310",  { "pic18f8310",  "p18f8310",  "18f8310"  }, 0x8310, 0, 0, 0x1fff,   "18f8310.lkr"  },
+  { pic18f8390,  PROC_CLASS_PIC16E,  "__18F8390",  { "pic18f8390",  "p18f8390",  "18f8390"  }, 0x8390, 0, 0, 0x1fff,   "18f8390.lkr"  },
+  { pic18f8410,  PROC_CLASS_PIC16E,  "__18F8410",  { "pic18f8410",  "p18f8410",  "18f8410"  }, 0x8410, 0, 0, 0x3fff,   "18f8410.lkr"  },
+  { pic18f8490,  PROC_CLASS_PIC16E,  "__18F8490",  { "pic18f8490",  "p18f8490",  "18f8490"  }, 0x8490, 0, 0, 0x3fff,   "18f8490.lkr"  },
+  { pic18f84j15, PROC_CLASS_PIC16E,  "__18F84J15", { "pic18f84j15", "p18f84j15", "18f84j15" }, 0xc415, 0, 0, -1,       "18f84j15.lkr" },
+  { pic18f8520,  PROC_CLASS_PIC16E,  "__18F8520",  { "pic18f8520",  "p18f8520",  "18f8520"  }, 0xa852, 0, 0, 0x7fff,   "18f8520.lkr"  },
+  { pic18f8525,  PROC_CLASS_PIC16E,  "__18F8525",  { "pic18f8525",  "p18f8525",  "18f8525"  }, 0x8525, 0, 0, 0xbfff,   "18f8525.lkr"  },
+  { pic18f8585,  PROC_CLASS_PIC16E,  "__18F8585",  { "pic18f8585",  "p18f8585",  "18f8585"  }, 0x8585, 0, 0, 0xbfff,   "18f8585.lkr"  },
+  { pic18f85j10, PROC_CLASS_PIC16E,  "__18F85J10", { "pic18f85j10", "p18f85j10", "18f85j10" }, 0xc510, 0, 0, 0x7ff7,   "18f85j10.lkr" },
+  { pic18f85j15, PROC_CLASS_PIC16E,  "__18F85J15", { "pic18f85j15", "p18f85j15", "18f85j15" }, 0xc515, 0, 0, 0xbff7,   "18f85j15.lkr" },
+  { pic18f8620,  PROC_CLASS_PIC16E,  "__18F8620",  { "pic18f8620",  "p18f8620",  "18f8620"  }, 0xa862, 0, 0, 0xffff,   "18f8620.lkr"  },
+  { pic18f8621,  PROC_CLASS_PIC16E,  "__18F8621",  { "pic18f8621",  "p18f8621",  "18f8621"  }, 0x8621, 0, 0, 0xffff,   "18f8621.lkr"  },
+  { pic18f8627,  PROC_CLASS_PIC16E,  "__18F8627",  { "pic18f8627",  "p18f8627",  "18f8627"  }, 0x8627, 0, 0, 0x17fff,  "18f8627.lkr"  },
+  { pic18f8680,  PROC_CLASS_PIC16E,  "__18F8680",  { "pic18f8680",  "p18f8680",  "18f8680"  }, 0x8680, 0, 0, 0xffff,   "18f8680.lkr"  },
+  { pic18f86j10, PROC_CLASS_PIC16E,  "__18F86J10", { "pic18f86j10", "p18f86j10", "18f86j10" }, 0xc610, 0, 0, 0xfff7,   "18f86j10.lkr" },
+  { pic18f86j15, PROC_CLASS_PIC16E,  "__18F86J15", { "pic18f86j15", "p18f86j15", "18f86j15" }, 0xc615, 0, 0, 0x17ff7,  "18f86j15.lkr" },
+  { pic18f8720,  PROC_CLASS_PIC16E,  "__18F8720",  { "pic18f8720",  "p18f8720",  "18f8720"  }, 0xa872, 0, 0, 0x1ffff,  "18f8720.lkr"  },
+  { pic18f8722,  PROC_CLASS_PIC16E,  "__18F8722",  { "pic18f8722",  "p18f8722",  "18f8722"  }, 0x8721, 0, 0, 0x1ffff,  "18f8722.lkr"  },
+  { pic18f87j10, PROC_CLASS_PIC16E,  "__18F87J10", { "pic18f87j10", "p18f87j10", "18f87j10" }, 0xc710, 0, 0, 0x1fff7,  "18f87j10.lkr" },
+  { rf509af,     PROC_CLASS_PIC12,   "__RF509AF",  { "rf509af",     "rf509af",   "rf509af"  }, 0x6509, 0, 0, 0x3ff,    "rf509af.lkr"  },
+  { rf509ag,     PROC_CLASS_PIC12,   "__RF509AG",  { "rf509ag",     "rf509ag",   "rf509ag"  }, 0x7509, 0, 0, 0x3ff,    "rf509ag.lkr"  },
+  { rf675f,      PROC_CLASS_PIC14,   "__RF675F",   { "rf675f",      "rf675f",    "rf675f"   }, 0x3675, 0, 0, 0x3fe,    "rf675f.lkr"   },
+  { rf675h,      PROC_CLASS_PIC14,   "__RF675H",   { "rf675h",      "rf675h",    "rf675h"   }, 0x4675, 0, 0, 0x3fe,    "rf675h.lkr"   },
+  { rf675k,      PROC_CLASS_PIC14,   "__RF675K",   { "rf675k",      "rf675k",    "rf675k"   }, 0x5675, 0, 0, 0x3fe,    "rf675k.lkr"   },
+  { sx18,        PROC_CLASS_SX,      "__SX18",     { "sx18ac",      "sx18",      "sx18"     }, 0x0018, 0, 0, 0x7ff,    NULL           },
+  { sx20,        PROC_CLASS_SX,      "__SX20",     { "sx20ac",      "sx20",      "sx20"     }, 0x0020, 0, 0, 0x7ff,    NULL           },
+  { sx28,        PROC_CLASS_SX,      "__SX28",     { "sx28ac",      "sx28",      "sx28"     }, 0x0028, 0, 0, 0x7ff,    NULL           },
+  { sx48,        PROC_CLASS_SX,      "__SX48",     { "sx48bd",      "sx48",      "sx48"     }, 0x0048, 0, 0, 0xfff,    NULL           },
+  { sx52,        PROC_CLASS_SX,      "__SX52",     { "sx52bd",      "sx52",      "sx52"     }, 0x0052, 0, 0, 0xfff,    NULL           },
+
+  { no_processor,PROC_CLASS_UNKNOWN, 0,            { 0,              0,           0,        }, 0x0,    0, 0, 0x0,      0              }
+};
diff --git a/src/coff/xml/gpprocessor.h b/src/coff/xml/gpprocessor.h
new file mode 100644
index 0000000..5e0ad41
--- /dev/null
+++ b/src/coff/xml/gpprocessor.h
@@ -0,0 +1,371 @@
+/* GNU PIC processor definitions
+   Copyright (C) 2001, 2002, 2003, 2004, 2005
+   Craig Franklin
+
+This file is part of gputils.
+
+gputils is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+gputils is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with gputils; see the file COPYING.  If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA.  */
+
+#ifndef __GPPROCESSOR_H__
+#define __GPPROCESSOR_H__
+
+enum proc_class {
+  PROC_CLASS_UNKNOWN,   /* Unknown device */
+  PROC_CLASS_EEPROM8,   /* 8 bit EEPROM */
+  PROC_CLASS_GENERIC,   /* 12 bit device */
+  PROC_CLASS_PIC12,     /* 12 bit devices */
+  PROC_CLASS_SX,        /* 12 bit devices */
+  PROC_CLASS_PIC14,     /* 14 bit devices */
+  PROC_CLASS_PIC16,     /* 16 bit devices */
+  PROC_CLASS_PIC16E     /* enhanced 16 bit devices */
+};
+
+/* XXXPRO: Need to add an entry for any extra processors.  Please keep
+   this list sorted! */
+
+enum pic_processor {
+  no_processor,
+  eeprom8,
+  generic,
+  pic10f200,
+  pic10f202,
+  pic10f204,
+  pic10f206,
+  pic10f220,
+  pic10f222,
+  pic12c508,
+  pic12c508a,
+  pic12c509,
+  pic12c509a,
+  pic12c671,
+  pic12c672,
+  pic12ce518,
+  pic12ce519,
+  pic12ce673,
+  pic12ce674,
+  pic12cr509a,
+  pic12f508,
+  pic12f509,
+  pic12f510,
+  pic12f629,
+  pic12f635,
+  pic12f675,
+  pic12f683,
+  pic14000,
+  pic16c5x,
+  pic16cxx,
+  pic16c432,
+  pic16c433,
+  pic16c505,
+  pic16c54,
+  pic16c52,
+  pic16c54a,
+  pic16c54b,
+  pic16c54c,
+  pic16c55,
+  pic16c55a,
+  pic16c554,
+  pic16c557,
+  pic16c558,
+  pic16c56,
+  pic16c56a,
+  pic16c57,
+  pic16c57c,
+  pic16c58a,
+  pic16c58b,
+  pic16c61,
+  pic16c62,
+  pic16c62a,
+  pic16c62b,
+  pic16c620,
+  pic16c620a,
+  pic16c621,
+  pic16c621a,
+  pic16c622,
+  pic16c622a,
+  pic16c63,
+  pic16c63a,
+  pic16c64,
+  pic16c64a,
+  pic16c642,
+  pic16c65,
+  pic16c65a,
+  pic16c65b,
+  pic16c66,
+  pic16c662,
+  pic16c67,
+  pic16c71,
+  pic16c710,
+  pic16c711,
+  pic16c712,
+  pic16c715,
+  pic16c716,
+  pic16c717,
+  pic16c72,
+  pic16c72a,
+  pic16c73,
+  pic16c73a,
+  pic16c73b,
+  pic16c74,
+  pic16c745,
+  pic16c74a,
+  pic16c74b,
+  pic16c76,
+  pic16c765,
+  pic16c77,
+  pic16c770,
+  pic16c771,
+  pic16c773,
+  pic16c774,
+  pic16c781,
+  pic16c782,
+  pic16c84,
+  pic16c923,
+  pic16c924,
+  pic16c925,
+  pic16c926,
+  pic16ce623,
+  pic16ce624,
+  pic16ce625,
+  pic16cr54,
+  pic16cr54a,
+  pic16cr54b,
+  pic16cr54c,
+  pic16cr56a,
+  pic16cr57a,
+  pic16cr57b,
+  pic16cr57c,
+  pic16cr58a,
+  pic16cr58b,
+  pic16cr62,
+  pic16cr620a,
+  pic16cr63,
+  pic16cr64,
+  pic16cr65,
+  pic16cr72,
+  pic16cr83,
+  pic16cr84,
+  pic16f505,
+  pic16f54,
+  pic16f57,
+  pic16f59,
+  pic16f610,
+  pic16f627,
+  pic16f627a,
+  pic16f628,
+  pic16f628a,
+  pic16f630,
+  pic16f636,
+  pic16f639,
+  pic16f648a,
+  pic16f676,
+  pic16f684,
+  pic16f685,
+  pic16f687,
+  pic16f688,
+  pic16f689,
+  pic16f690,
+  pic16f716,
+  pic16f72,
+  pic16f73,
+  pic16f737,
+  pic16f74,
+  pic16f747,
+  pic16f76,
+  pic16f767,
+  pic16f77,
+  pic16f777,
+  pic16f785,
+  pic16f818,
+  pic16f819,
+  pic16f83,
+  pic16f84,
+  pic16f87,
+  pic16f84a,
+  pic16f870,
+  pic16f871,
+  pic16f872,
+  pic16f873,
+  pic16f873a,
+  pic16f874,
+  pic16f874a,
+  pic16f876,
+  pic16f876a,
+  pic16f877,
+  pic16f877a,
+  pic16f88,
+  pic16f882,
+  pic16f883,
+  pic16f884,
+  pic16f886,
+  pic16f887,
+  pic16f913,
+  pic16f914,
+  pic16f916,
+  pic16f917,
+  pic16hv540,
+  pic17cxx,
+  pic17c42,
+  pic17c42a,
+  pic17c43,
+  pic17c44,
+  pic17c752,
+  pic17c756,
+  pic17c756a,
+  pic17c762,
+  pic17c766,
+  pic17cr42,
+  pic17cr43,
+  pic18cxx,
+  pic18c242,
+  pic18c252,
+  pic18c442,
+  pic18c452,
+  pic18c601,
+  pic18c658,
+  pic18c801,
+  pic18c858,
+  pic18f1220,
+  pic18f1230,
+  pic18f1320,
+  pic18f1330,
+  pic18f2220,
+  pic18f2320,
+  pic18f2331,
+  pic18f2410,
+  pic18f242,
+  pic18f2420,
+  pic18f2431,
+  pic18f2439,
+  pic18f2455,
+  pic18f248,
+  pic18f2480,
+  pic18f24j10,
+  pic18f2510,
+  pic18f2515,
+  pic18f252,
+  pic18f2525,
+  pic18f2539,
+  pic18f2550,
+  pic18f2520,
+  pic18f258,
+  pic18f2580,
+  pic18f2585,
+  pic18f25j10,
+  pic18f2610,
+  pic18f2620,
+  pic18f2680,
+  pic18f2681,
+  pic18f2682,
+  pic18f2685,
+  pic18f4220,
+  pic18f4320,
+  pic18f4331,
+  pic18f4410,
+  pic18f442,
+  pic18f4420,
+  pic18f4431,
+  pic18f4439,
+  pic18f4455,
+  pic18f448,
+  pic18f4480,
+  pic18f44j10,
+  pic18f4510,
+  pic18f4515,
+  pic18f452,
+  pic18f4520,
+  pic18f4525,
+  pic18f4539,
+  pic18f4550,
+  pic18f458,
+  pic18f4580,
+  pic18f4585,
+  pic18f45j10,
+  pic18f4610,
+  pic18f4620,
+  pic18f4680,
+  pic18f4681,
+  pic18f4682,
+  pic18f4685,
+  pic18f6310,
+  pic18f6390,
+  pic18f6410,
+  pic18f6490,
+  pic18f64j15,
+  pic18f6520,
+  pic18f6525,
+  pic18f6585,
+  pic18f65j10,
+  pic18f65j15,
+  pic18f6620,
+  pic18f6621,
+  pic18f6627,
+  pic18f6680,
+  pic18f66j10,
+  pic18f66j15,
+  pic18f6720,
+  pic18f6722,
+  pic18f67j10,
+  pic18f8310,
+  pic18f8390,
+  pic18f8410,
+  pic18f8490,
+  pic18f84j15,
+  pic18f8520,
+  pic18f8525,
+  pic18f8585,
+  pic18f85j10,
+  pic18f85j15,
+  pic18f8620,
+  pic18f8621,
+  pic18f8627,
+  pic18f8680,
+  pic18f86j10,
+  pic18f86j15,
+  pic18f8720,
+  pic18f8722,
+  pic18f87j10,
+  rf509af,
+  rf509ag,
+  rf675f,
+  rf675h,
+  rf675k,
+  sx18,
+  sx20,
+  sx28,
+  sx48,
+  sx52
+};
+
+#define MAX_NAMES 3 /* Maximum number of names a processor can have */
+#if !defined(NULL)
+#  define NULL 0
+#endif
+
+struct px {
+  enum pic_processor tag;
+  enum proc_class pclass;
+  const char *defined_as;
+  const char *names[MAX_NAMES];
+  unsigned long coff_type;
+  int num_pages;
+  int num_banks;
+  long maxrom;
+  const char *script;
+};
+extern const px pics[];
+
+#endif
diff --git a/src/coff/xml/xml.pro b/src/coff/xml/xml.pro
new file mode 100644
index 0000000..bf1dc3a
--- /dev/null
+++ b/src/coff/xml/xml.pro
@@ -0,0 +1,17 @@
+STOPDIR = ../../..
+include($${STOPDIR}/app.pro)
+
+TARGET   = xml_coff_parser
+SOURCES += gpprocessor.cpp xml_coff_parser.cpp
+LIBS    += ../../devices/list/libdevicelist.a \
+           ../../devices/mem24/mem24/libmem24.a ../../devices/mem24/xml_data/libmem24xml.a \
+           ../../devices/mem24/base/libmem24base.a \
+           ../../devices/pic/pic/libpic.a ../../devices/pic/xml_data/libpicxml.a \
+           ../../devices/pic/base/libpicbase.a ../../xml_to_data/libxmltodata.a \
+           ../../devices/base/libdevicebase.a ../../common/global/libglobal.a \
+           ../../common/nokde/libnokde.a ../../common/common/libcommon.a
+
+unix:QMAKE_POST_LINK = cd ../base && ../xml/xml_coff_parser
+unix:QMAKE_CLEAN += ../base/coff_data.cpp
+win32:QMAKE_POST_LINK = cd ..\base && ..\xml\xml_coff_parser.exe
+win32:QMAKE_CLEAN += ..\base\coff_data.cpp
diff --git a/src/coff/xml/xml_coff_parser.cpp b/src/coff/xml/xml_coff_parser.cpp
new file mode 100644
index 0000000..b6fa2d8
--- /dev/null
+++ b/src/coff/xml/xml_coff_parser.cpp
@@ -0,0 +1,116 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "xml_to_data/prog_xml_to_data.h"
+#include "coff/base/coff_data.h"
+
+#include "devices/base/device_group.h"
+#include "devices/pic/base/pic.h"
+#include "devices/list/device_list.h"
+#include "gpprocessor.h"
+
+//-----------------------------------------------------------------------------
+namespace Coff
+{
+
+class XmlToData : public ExtXmlToData<Data>
+{
+public:
+  XmlToData() : ExtXmlToData<Data>("coff", "Coff") {}
+
+private:
+  QMap<uint, bool> _ids;
+  virtual bool hasFamilies() const { return false; }
+  virtual void parseData(QDomElement element, Data &data);
+  virtual void outputData(const Data &data, QTextStream &s) const;
+  virtual void outputFunctions(QTextStream &s) const;
+  virtual void parse();
+};
+
+void Coff::XmlToData::parseData(QDomElement element, Data &data)
+{
+  QStringList list = QStringList::split(' ', element.attribute("id"));
+  if ( list.isEmpty() ) qFatal("Missing id");
+  if ( list.count()>MAX_NB_IDS ) qFatal("Please raise MAX_NB_IDS");
+  for (uint i=0; i<MAX_NB_IDS; i++) {
+    if ( i<uint(list.count()) ) {
+      bool ok;
+      data.ids[i] = fromHexLabel(list[i], 4, &ok);
+      if ( !ok ) qFatal("Invalid id");
+      //if ( _ids.contains(data.ids[i]) ) qFatal("Duplicated id");
+      //_ids[data.ids[i]] = true;
+    } else data.ids[i] = 0;
+  }
+}
+
+void Coff::XmlToData::outputData(const Data &data, QTextStream &s) const
+{
+  s << "{ ";
+  for (uint i=0; i<MAX_NB_IDS; i++) {
+    if ( i!=0 ) s << ", ";
+    s << toHexLabel(data.ids[i], 4);
+  }
+  s << "}";
+}
+
+void Coff::XmlToData::outputFunctions(QTextStream &s) const
+{
+  ExtXmlToData<Data>::outputFunctions(s);
+  s << "QString findId(uint id)" << endl;
+  s << "{" << endl;
+  s << "  for (uint i=0; DATA_LIST[i]; i++) {" << endl;
+  s << "    for (uint k=0; k<MAX_NB_IDS; k++)" << endl;
+  s << "      if ( DATA_LIST[i]->data.ids[k]==id ) return DATA_LIST[i]->name;" << endl;
+  s << "  }" << endl;
+  s << "  return QString::null;" << endl;
+  s << "}" << endl;
+}
+
+void Coff::XmlToData::parse()
+{
+  ExtXmlToData<Data>::parse();
+
+  // check what devices we are missing
+  const ::Group::Base *gpic = Device::lister().group("pic");
+  ::Group::Base::ConstIterator it;
+  for (it=gpic->begin(); it!=gpic->end(); ++it) {
+    const Pic::Data *data = static_cast<const Pic::Data*>(it.data().data);
+    switch (data->architecture().type()) {
+      case Pic::Architecture::P10X:
+      case Pic::Architecture::P16X:
+      case Pic::Architecture::P17C:
+      case Pic::Architecture::P18C:
+      case Pic::Architecture::P18F:
+      case Pic::Architecture::P18J: break;
+      case Pic::Architecture::P24F:
+      case Pic::Architecture::P24H:
+      case Pic::Architecture::P30F:
+      case Pic::Architecture::P33F: continue;
+      case Pic::Architecture::Nb_Types: Q_ASSERT(false); continue;
+    }
+    if ( !hasDevice(data->name()) ) qWarning("No id for device %s", data->name().latin1());
+  }
+
+  // extract COFF id from gputils
+  for (uint i=0; pics[i].tag!=no_processor; i++) {
+    _current = QString(pics[i].names[2]).upper();
+    if ( !Device::lister().isSupported(_current) ) continue;
+    if ( !hasDevice(_current) ) qDebug(">> add new id %s: %s", _current.latin1(), toHexLabel(pics[i].coff_type, 4).latin1());
+    else {
+      bool ok = false;
+      for (uint k=0; k<MAX_NB_IDS; k++)
+        if ( _map[_current].data.ids[k]==pics[i].coff_type ) ok = true;
+      if ( !ok ) qFatal(QString("Different ids"));
+    }
+  }
+}
+
+} // namespace
+
+//-----------------------------------------------------------------------------
+XML_MAIN(Coff::XmlToData)
diff --git a/src/common/Makefile.am b/src/common/Makefile.am
new file mode 100644
index 0000000..da1638b
--- /dev/null
+++ b/src/common/Makefile.am
@@ -0,0 +1,4 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+SUBDIRS = common global port cli gui
diff --git a/src/common/cli/Makefile.am b/src/common/cli/Makefile.am
new file mode 100644
index 0000000..2225bc0
--- /dev/null
+++ b/src/common/cli/Makefile.am
@@ -0,0 +1,7 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libcli.la
+libcli_la_LDFLAGS = $(all_libraries)
+libcli_la_SOURCES = cli_purl.cpp cli_pfile.cpp cli_global.cpp cli_log.cpp \
+	cli_main.cpp
diff --git a/src/common/cli/cli.pro b/src/common/cli/cli.pro
new file mode 100644
index 0000000..20bb3b7
--- /dev/null
+++ b/src/common/cli/cli.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = cli
+HEADERS += cli_global.h cli_log.h cli_main.h
+SOURCES += cli_global.cpp cli_log.cpp cli_purl.cpp cli_pfile.cpp cli_main.cpp
diff --git a/src/common/cli/cli_global.cpp b/src/common/cli/cli_global.cpp
new file mode 100644
index 0000000..4d58bdd
--- /dev/null
+++ b/src/common/cli/cli_global.cpp
@@ -0,0 +1,37 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "cli_global.h"
+
+#include <qdir.h>
+
+#include "common/global/purl.h"
+#include "cli_log.h"
+
+bool CLI::_force = false;
+bool CLI::_isInteractive = false;
+CLI::View     *CLI::_view = 0;
+CLI::MainBase *CLI::_main = 0;
+
+CLI::ExitCode CLI::errorExit(const QString &message, ExitCode code)
+{
+  Q_ASSERT( code!=OK );
+  _view->log(Log::LineType::SoftError, message);
+  return code;
+}
+
+CLI::ExitCode CLI::okExit(const QString &message)
+{
+  _view->log(Log::LineType::Information, message);
+  return OK;
+}
+
+PURL::Directory CLI::runDirectory()
+{
+  return PURL::Directory(QDir::currentDirPath());
+}
diff --git a/src/common/cli/cli_global.h b/src/common/cli/cli_global.h
new file mode 100644
index 0000000..b90f36e
--- /dev/null
+++ b/src/common/cli/cli_global.h
@@ -0,0 +1,33 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef CLI_GLOBAL_H
+#define CLI_GLOBAL_H
+
+#include <qstring.h>
+namespace PURL { class Directory; }
+
+namespace CLI
+{
+
+class View;
+class MainBase;
+enum ExitCode { EXITING = 1, OK = 0, ARG_ERROR = -1, NOT_SUPPORTED_ERROR = -2,
+                FILE_ERROR = -3, EXEC_ERROR = -4 };
+extern ExitCode errorExit(const QString &message, ExitCode code);
+extern ExitCode okExit(const QString &message);
+extern PURL::Directory runDirectory();
+
+extern bool      _force;
+extern bool      _isInteractive;
+extern View     *_view;
+extern MainBase *_main;
+
+} // namespace
+
+#endif
diff --git a/src/common/cli/cli_log.cpp b/src/common/cli/cli_log.cpp
new file mode 100644
index 0000000..603d5f8
--- /dev/null
+++ b/src/common/cli/cli_log.cpp
@@ -0,0 +1,74 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "cli_log.h"
+
+#include "common/global/global.h"
+#include "cli_global.h"
+
+void CLI::View::doLog(Log::LineType type, const QString &text, Log::Action)
+{
+  QString s = text + "\n";
+  switch (type.type()) {
+    case Log::LineType::Error:
+    case Log::LineType::SoftError: s = "Error: " + s; break;
+    case Log::LineType::Warning: s = "Warning: " + s; break;
+    default: break;
+  }
+#if QT_VERSION<0x040000
+  if ( type==Log::LineType::Error || type==Log::LineType::SoftError ) fprintf(stderr, "%s", s.latin1());
+  else fprintf(stdout, "%s", s.latin1());
+#else
+  QByteArray ba = s.toLatin1();
+  if ( type==Log::LineType::Error || type==Log::LineType::SoftError ) fprintf(stderr, "%s", ba.constData());
+  else fprintf(stdout, "%s", ba.constData());
+#endif
+}
+
+void CLI::View::doLog(Log::DebugLevel, const QString &text, Log::Action)
+{
+  QString s = text + "\n";
+#if QT_VERSION<0x040000
+  fprintf(stdout, "%s", s.latin1());
+#else
+  QByteArray ba = s.toLatin1();
+  fprintf(stdout, "%s", ba.constData());
+#endif
+}
+
+void CLI::View::appendToLastLine(const QString &text)
+{
+#if QT_VERSION<0x040000
+  fprintf(stdout, "%s", text.latin1());
+#else
+  QByteArray ba = text.toLatin1();
+  fprintf(stdout, "%s", ba.constData());
+#endif
+}
+
+void CLI::View::sorry(const QString &message, const QString &details)
+{
+  if ( details.isEmpty() ) log(Log::LineType::Error, message, Log::Immediate);
+  else log(Log::LineType::Error, message + " (" + details + ")", Log::Immediate);
+}
+
+bool CLI::View::askContinue(const QString &message)
+{
+  log(Log::LineType::Warning, message + " " + (_force ? i18n("*yes*") : i18n("*no*")), Log::Immediate);
+  if (_force) return true;
+  if ( !_isInteractive ) return false; // always fail
+  // #### TODO
+  return false;
+}
+
+void CLI::View::logUserAbort()
+{
+  if ( !_isInteractive ) return;
+  return;
+  //Log::View::logUserAbort();
+}
diff --git a/src/common/cli/cli_log.h b/src/common/cli/cli_log.h
new file mode 100644
index 0000000..2fa83dc
--- /dev/null
+++ b/src/common/cli/cli_log.h
@@ -0,0 +1,33 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef CLI_LOG_H
+#define CLI_LOG_H
+
+#include "common/global/log.h"
+
+namespace CLI
+{
+
+class View : public Log::View
+{
+public:
+  virtual void appendToLastLine(const QString &text);
+  virtual void clear() {}
+  virtual void sorry(const QString &message, const QString &details);
+  virtual bool askContinue(const QString &message);
+  virtual void logUserAbort();
+
+private:
+  virtual void doLog(Log::LineType type, const QString &text, Log::Action action);
+  virtual void doLog(Log::DebugLevel level, const QString &text, Log::Action action);
+};
+
+} // namespace
+
+#endif
diff --git a/src/common/cli/cli_main.cpp b/src/common/cli/cli_main.cpp
new file mode 100644
index 0000000..7d75dbb
--- /dev/null
+++ b/src/common/cli/cli_main.cpp
@@ -0,0 +1,208 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "cli_main.h"
+
+#include "cli_log.h"
+#include "common/global/about.h"
+
+//-----------------------------------------------------------------------------
+const CLI::CommandData *CLI::findCommandData(const QString &command)
+{
+  for (uint i=0; NORMAL_COMMAND_DATA[i].name; i++)
+    if ( NORMAL_COMMAND_DATA[i].name==command ) return &NORMAL_COMMAND_DATA[i];
+  if ( !_isInteractive) return 0;
+  for (uint i=0; INTERACTIVE_COMMAND_DATA[i].name; i++)
+    if ( INTERACTIVE_COMMAND_DATA[i].name==command ) return &INTERACTIVE_COMMAND_DATA[i];
+  return 0;
+}
+
+CLI::ExitCode CLI::findCommand(const QString &s)
+{
+  if ( s.isEmpty() ) return errorExit(i18n("No command specified"), ARG_ERROR);
+  const CommandData *data = findCommandData(s);
+  if ( data==0 ) return errorExit(i18n("Unknown command: %1").arg(s), ARG_ERROR);
+  return OK;
+}
+
+//-----------------------------------------------------------------------------
+bool CLI::isPropertyList(const QString &s)
+{
+  for (uint i=0; PROPERTY_DATA[i].name; i++)
+    if ( s==PROPERTY_DATA[i].list ) return true;
+  return false;
+}
+
+bool CLI::isProperty(const QString &s)
+{
+  for (uint i=0; PROPERTY_DATA[i].name; i++)
+    if ( s==PROPERTY_DATA[i].name ) return true;
+  return false;
+}
+
+//-----------------------------------------------------------------------------
+const KCmdLineOptions STANDARD_OPTIONS[] = {
+  { "c",              0, 0 },
+  { "command <name>", I18N_NOOP("Perform the requested command."), 0 },
+  { "command-list",   I18N_NOOP("Return the list of recognized commands."), 0 },
+  { "debug",          I18N_NOOP("Display debug messages."), 0 },
+  { "extra-debug",    I18N_NOOP("Display extra debug messages."), 0 },
+  { "max-debug",      I18N_NOOP("Display all debug messages."), 0 },
+  { "lowlevel-debug", I18N_NOOP("Display low level debug messages."), 0 },
+  { "quiet",          I18N_NOOP("Do not display messages."), 0 },
+  KCmdLineLastOption
+};
+
+const KCmdLineOptions FORCE_OPTIONS[] = {
+  { "f",              0, 0 },
+  { "force",          I18N_NOOP("Overwrite files and answer \"yes\" to questions."), 0 },
+  KCmdLineLastOption
+};
+
+const KCmdLineOptions INTERACTIVE_OPTIONS[] = {
+  { "i",              0, 0 },
+  { "cli",            I18N_NOOP("Interactive mode"), 0 },
+  KCmdLineLastOption
+};
+
+CLI::OptionList::OptionList(Properties properties)
+{
+  init(properties);
+}
+
+CLI::OptionList::OptionList(Properties properties, const KCmdLineOptions *options)
+{
+  init(properties);
+  for (uint i=0; options[i].name; i++) append(options[i]);
+}
+
+void CLI::OptionList::init(Properties properties)
+{
+  for (uint i=0; STANDARD_OPTIONS[i].name; i++) append(STANDARD_OPTIONS[i]);
+  if ( properties & HasForce ) for (uint i=0; FORCE_OPTIONS[i].name; i++) append(FORCE_OPTIONS[i]);
+  if ( properties & HasInteractiveMode ) for (uint i=0; INTERACTIVE_OPTIONS[i].name; i++) append(INTERACTIVE_OPTIONS[i]);
+}
+
+CLI::ExitCode CLI::commandList()
+{
+  Log::KeyList keys(i18n("Supported commands:"));
+  for (uint i=0; NORMAL_COMMAND_DATA[i].name; i++)
+    keys.append(NORMAL_COMMAND_DATA[i].name, i18n(NORMAL_COMMAND_DATA[i].help));
+  if (_isInteractive) {
+    for (uint i=0; INTERACTIVE_COMMAND_DATA[i].name; i++)
+      keys.append(INTERACTIVE_COMMAND_DATA[i].name, i18n(INTERACTIVE_COMMAND_DATA[i].help));
+  }
+  keys.display(*_view);
+  return OK;
+}
+
+CLI::ExitCode CLI::propertyList()
+{
+  Log::KeyList keys;
+  for (uint i=0; PROPERTY_DATA[i].name; i++)
+    keys.append(PROPERTY_DATA[i].name, i18n(PROPERTY_DATA[i].help));
+  keys.display(*_view);
+  return OK;
+}
+
+//-----------------------------------------------------------------------------
+CLI::MainBase::MainBase(Properties properties)
+  : QObject(0, "main"), _properties(properties)
+{
+  Q_ASSERT( _main==0 );
+  _main = this;
+  _view = new View;
+  setView(_view);
+}
+
+void CLI::MainBase::init()
+{
+  _args = KCmdLineArgs::parsedArgs();
+  if ( _properties & HasInteractiveMode ) _isInteractive = _args->isSet("cli");
+  if ( _properties & HasForce ) _force = _args->isSet("force");
+  FOR_EACH(Log::DebugLevel, level) if ( _args->isSet(level.key()) ) _view->setDebugLevel(level);
+}
+
+CLI::OptionList CLI::MainBase::optionList(const char *fileDescription) const
+{
+  OptionList list(_properties, OPTIONS);
+  KCmdLineOptions opt;
+  for (uint i=0; PROPERTY_DATA[i].name; i++) {
+    opt.description = 0;
+    opt.def = 0;
+    if ( PROPERTY_DATA[i].help==0 ) {
+      Q_ASSERT( QString(PROPERTY_DATA[i].name)!=PROPERTY_DATA[i].optName );
+      opt.name = PROPERTY_DATA[i].name; // alias
+      list.append(opt);
+    } else {
+      if ( PROPERTY_DATA[i].optName==0 ) continue; // interactive only
+      if ( PROPERTY_DATA[i].alias ) {
+        opt.name = PROPERTY_DATA[i].alias;
+        list.append(opt);
+      }
+      opt.name = PROPERTY_DATA[i].optName;
+      opt.description = PROPERTY_DATA[i].help;
+      list.append(opt);
+      if ( PROPERTY_DATA[i].list ) {
+        opt.name = PROPERTY_DATA[i].list;
+        opt.description = PROPERTY_DATA[i].listHelp;
+        list.append(opt);
+      }
+    }
+  }
+  if (fileDescription) {
+    opt.name = "+[file]";
+    opt.description = fileDescription;
+    opt.def = 0;
+  }
+  list.append(opt);
+  return list;
+}
+
+CLI::ExitCode CLI::MainBase::list(const QString &command)
+{
+  if ( command=="command-list" ) return commandList();
+  if ( command=="property-list" ) return propertyList();
+  return ARG_ERROR;
+}
+
+CLI::ExitCode CLI::MainBase::doRun()
+{
+  init();
+
+  // process set options
+  for (uint i=0; PROPERTY_DATA[i].name; i++) {
+    if ( PROPERTY_DATA[i].optName==0 ) continue; // alias or interactive only
+    if ( !_args->isSet(PROPERTY_DATA[i].name) ) continue;
+    QString option = _args->getOption(PROPERTY_DATA[i].name);
+    ExitCode code = executeSetCommand(PROPERTY_DATA[i].name, option);
+    if ( code!=OK ) return code;
+    log(Log::LineType::Information, QString("%1: %2").arg(PROPERTY_DATA[i].name).arg(executeGetCommand(PROPERTY_DATA[i].name)));
+  }
+
+  // process default lists
+  if ( _args->isSet("command-list") ) return list("command-list");
+  for (uint i=0; PROPERTY_DATA[i].name; i++) {
+    if ( PROPERTY_DATA[i].list==0 ) continue;
+    if ( _args->isSet(PROPERTY_DATA[i].list) ) return list(PROPERTY_DATA[i].list);
+  }
+
+  bool interactive;
+  ExitCode code = prepareRun(interactive);
+  if ( code!=OK || interactive ) return code;
+
+  // find command
+  QString command = _args->getOption("command");
+  code = findCommand(command);
+  if ( code!=OK ) return code;
+
+  // execute command
+  code = prepareCommand(command);
+  if ( code!=OK ) return code;
+  return executeCommand(command);
+}
diff --git a/src/common/cli/cli_main.h b/src/common/cli/cli_main.h
new file mode 100644
index 0000000..9b54c70
--- /dev/null
+++ b/src/common/cli/cli_main.h
@@ -0,0 +1,82 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef CLI_MAIN_H
+#define CLI_MAIN_H
+
+#include "common/global/about.h"
+#include "common/global/log.h"
+#include "cli_global.h"
+
+namespace CLI
+{
+//-----------------------------------------------------------------------------
+enum Property { NoProperty = 0, HasForce = 1, HasInteractiveMode = 2 };
+Q_DECLARE_FLAGS(Properties, Property)
+Q_DECLARE_OPERATORS_FOR_FLAGS(Properties)
+
+extern const KCmdLineOptions OPTIONS[];
+//-----------------------------------------------------------------------------
+struct CommandData {
+  const char *name;
+  int properties;
+  const char *help;
+};
+extern const CommandData NORMAL_COMMAND_DATA[];
+extern const CommandData INTERACTIVE_COMMAND_DATA[];
+extern const CommandData *findCommandData(const QString &command);
+extern ExitCode findCommand(const QString &s);
+extern ExitCode commandList();
+
+//-----------------------------------------------------------------------------
+struct PropertyData
+{
+  const char *name, *optName, *alias, *help, *list, *listHelp;
+};
+extern const PropertyData PROPERTY_DATA[];
+extern bool isPropertyList(const QString &s);
+extern bool isProperty(const QString &s);
+extern ExitCode propertyList();
+
+//-----------------------------------------------------------------------------
+class OptionList : public Piklab::OptionList
+{
+public:
+  OptionList(Properties properties);
+  OptionList(Properties properties, const KCmdLineOptions *options);
+
+private:
+  void init(Properties properties);
+};
+
+//-----------------------------------------------------------------------------
+class MainBase : public QObject, public Log::Base
+{
+Q_OBJECT
+public:
+  MainBase(Properties properties);
+  virtual OptionList optionList(const char *fileDescription) const;
+  virtual ExitCode doRun();
+  virtual ExitCode list(const QString &listName);
+  virtual ExitCode prepareCommand(const QString &command) = 0;
+  virtual ExitCode executeCommand(const QString &command) = 0;
+  virtual ExitCode executeSetCommand(const QString &property, const QString &value) = 0;
+  virtual QString executeGetCommand(const QString &property) = 0;
+
+protected:
+  Properties    _properties;
+  KCmdLineArgs *_args;
+
+private:
+  virtual ExitCode prepareRun(bool &interactive) = 0;
+  virtual void init();
+};
+
+} // namespace
+
+#endif
diff --git a/src/common/cli/cli_pfile.cpp b/src/common/cli/cli_pfile.cpp
new file mode 100644
index 0000000..96add3a
--- /dev/null
+++ b/src/common/cli/cli_pfile.cpp
@@ -0,0 +1,47 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "common/global/pfile.h"
+
+#include <qfile.h>
+
+//-----------------------------------------------------------------------------
+bool PURL::File::openForWrite()
+{
+  close();
+  _file->setName(url().filepath());
+  if ( !_file->open(IO_WriteOnly) ) {
+    _error = i18n("Could not open file for writing.");
+    _log.sorry(_error, i18n("File: %1").arg(_file->name()));
+    return false;
+  }
+  return true;
+}
+
+bool PURL::File::close()
+{
+  _file->close();
+  return ( uint(_file->status())==IO_Ok );
+}
+
+bool PURL::File::openForRead()
+{
+  close();
+  _file->setName(_url.filepath());
+  if ( !_file->open(IO_ReadOnly) ) {
+    _error = i18n("Could not open file for reading.");
+    _log.sorry(_error, i18n("File: %1").arg(_file->name()));
+    return false;
+  }
+  return true;
+}
+
+bool PURL::File::remove()
+{
+  return _file->remove();
+}
diff --git a/src/common/cli/cli_purl.cpp b/src/common/cli/cli_purl.cpp
new file mode 100644
index 0000000..e52c977
--- /dev/null
+++ b/src/common/cli/cli_purl.cpp
@@ -0,0 +1,9 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "common/global/purl.h"
diff --git a/src/common/common.pro b/src/common/common.pro
new file mode 100644
index 0000000..aa219c1
--- /dev/null
+++ b/src/common/common.pro
@@ -0,0 +1,2 @@
+TEMPLATE = subdirs
+SUBDIRS = common nokde global port cli
diff --git a/src/common/common/Makefile.am b/src/common/common/Makefile.am
new file mode 100644
index 0000000..0f68067
--- /dev/null
+++ b/src/common/common/Makefile.am
@@ -0,0 +1,9 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libcommon.la
+libcommon_la_SOURCES = bitvalue.cpp group.cpp misc.cpp number.cpp purl_base.cpp \
+		storage.cpp synchronous.cpp version_data.cpp
+libcommon_la_LDFLAGS = $(all_libraries)
+
+
diff --git a/src/common/common/bitvalue.cpp b/src/common/common/bitvalue.cpp
new file mode 100644
index 0000000..16d5ef0
--- /dev/null
+++ b/src/common/common/bitvalue.cpp
@@ -0,0 +1,30 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "bitvalue.h"
+
+const uint GenericValue::INVALID = 0xFFFFFFFFU;
+
+BitValue BitValue::XORn(uint n) const
+{
+  uint nb = nbBits(_value);
+  uint mask = maxValue(NumberBase::Bin, n);
+  uint res = 0x0;
+  for (uint i=0; i<nb; i +=n) {
+    res ^= (_value >> i) & mask;
+    //qDebug("%i %s %s", i, toHexLabel((value>>i) & mask, 4).latin1(), toHexLabel(res, 4).latin1());
+  }
+  return res;
+}
+
+BitValue BitValue::XNORn(uint n) const
+{
+  BitValue res = XORn(n);
+  BitValue mask = maxValue(NumberBase::Bin, n);
+  return res.complementInMask(mask);
+}
diff --git a/src/common/common/bitvalue.h b/src/common/common/bitvalue.h
new file mode 100644
index 0000000..d3ef9fe
--- /dev/null
+++ b/src/common/common/bitvalue.h
@@ -0,0 +1,129 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef BITVALUE_H
+#define BITVALUE_H
+
+#include "number.h"
+#include "range.h"
+
+//----------------------------------------------------------------------------
+class GenericValue
+{
+public:
+  GenericValue(uint value) : _value(value) {}
+
+  bool operator <(GenericValue v) const  { CRASH_ASSERT(_value!=INVALID); return _value<v._value;  }
+  bool operator >(GenericValue v) const  { CRASH_ASSERT(_value!=INVALID); return _value>v._value;  }
+  bool operator <=(GenericValue v) const { CRASH_ASSERT(_value!=INVALID); return _value<=v._value; }
+  bool operator >=(GenericValue v) const { CRASH_ASSERT(_value!=INVALID); return _value>=v._value; }
+  bool operator ==(GenericValue v) const { return _value==v._value; }
+  bool operator !=(GenericValue v) const { return _value!=v._value; }
+
+  bool bit(uint index) const { return (_value >> index) & 0x1; }
+  uchar nybble(uint index) const { return (_value >> (4*index)) & 0xF; }
+  uchar byte(uint index) const { return (_value >> (8*index)) & 0xFF; }
+  uint toUInt() const { return _value; }
+
+protected:
+  static const uint INVALID;
+  uint _value;
+
+private:
+  friend QDataStream &operator <<(QDataStream &s, GenericValue v);
+  friend QDataStream &operator >>(QDataStream &s, GenericValue &v);
+};
+
+inline QDataStream &operator <<(QDataStream &s, GenericValue v) { s << v._value; return s; }
+inline QDataStream &operator >>(QDataStream &s, GenericValue &v) { s >> v._value; return s; }
+
+inline QString toLabel(GenericValue v) { return QString::number(v.toUInt()); }
+inline QString toLabel(NumberBase base, GenericValue v, uint nbChars) { return toLabel(base, v.toUInt(), nbChars); }
+inline QString toHexLabel(GenericValue v, uint nbChars) { return toHexLabel(v.toUInt(), nbChars); }
+inline QString toHex(GenericValue v, uint nbChars) { return toHex(v.toUInt(), nbChars); }
+inline QString toHexLabelAbs(GenericValue v) { return ::toHexLabelAbs(v.toUInt()); }
+
+//----------------------------------------------------------------------------
+class Address : public GenericValue
+{
+public:
+  Address(uint value = INVALID) : GenericValue(value) {}
+  bool isValid() const { return ( _value!=INVALID ); }
+
+  Address &operator ++() { CRASH_ASSERT(_value!=INVALID); _value++; return *this; }
+  Address &operator ++(int) { CRASH_ASSERT(_value!=INVALID); _value++; return *this; }
+  Address operator +(int dec) const { CRASH_ASSERT(_value!=INVALID); return _value + dec; }
+  Address &operator +=(int dec)     { CRASH_ASSERT(_value!=INVALID);_value += dec; return *this; }
+  Address &operator --() { CRASH_ASSERT(_value!=INVALID); _value--; return *this; }
+  Address &operator --(int) { CRASH_ASSERT(_value!=INVALID); _value--; return *this; }
+  Address operator -(int dec) const { CRASH_ASSERT(_value!=INVALID);return _value - dec; }
+  Address &operator -=(int dec)     { CRASH_ASSERT(_value!=INVALID);_value -= dec; return *this; }
+  int operator -(Address a) const   { CRASH_ASSERT(_value!=INVALID && a._value!=INVALID); return _value - a._value; }
+};
+
+class AddressRange : public GenericRange<Address>
+{
+public:
+  AddressRange() {}
+  AddressRange(Address s, Address e) { start = s; end = e; }
+  virtual bool isEmpty() const { return !start.isValid() || !end.isValid() || end<=start; }
+};
+
+typedef GenericRangeVector<Address, AddressRange> AddressRangeVector;
+
+//----------------------------------------------------------------------------
+class BitValue : public GenericValue
+{
+public:
+  BitValue(uint value = INVALID) : GenericValue(value) {}
+  bool isInitialized() const { return ( _value!=INVALID ); }
+
+  BitValue operator |(BitValue v) const { return _value | v._value; }
+  BitValue operator <<(uint shift) const { return _value << shift; }
+  BitValue operator >>(uint shift) const { return _value >> shift; }
+  BitValue operator +(BitValue v) const { return _value + v._value; }
+
+  BitValue &operator |=(BitValue v) { _value |= v._value; return *this; }
+  BitValue &operator <<=(uint shift) { _value <<= shift; return *this; }
+  BitValue &operator >>=(uint shift) { _value >>= shift; return *this; }
+  BitValue &operator +=(BitValue v) { _value += v._value; return *this; }
+
+  BitValue XORn(uint n) const; // XOR between groups of n bits inside value
+  BitValue XNORn(uint n) const; // XORn then NOT on n bits
+
+  BitValue maskWith(BitValue mask) const { return _value & mask._value; }
+  bool isInside(BitValue v) const { return ( (_value & v._value)==_value ); }
+  BitValue complementInMask(BitValue mask) const { return mask._value & ~_value; }
+  BitValue twoComplement() const { return -_value; }
+  BitValue clearMaskBits(BitValue mask) const { return _value & ~mask._value; }
+  bool isOverlapping(BitValue v) const { return ( _value & v._value ); }
+
+  class const_iterator {
+  public:
+    const_iterator() {}
+    bool operator !=(const_iterator it) const { return ( _current!=it._current ); }
+    BitValue operator *() const { return BitValue(_current); }
+    const_iterator &operator ++() {
+      do {
+        if ( _current==_value+1 ) _current = INVALID;
+        if ( _current==INVALID ) break;
+        _current++;
+      } while ( (_current & _value)!=_current );
+      return *this;
+    }
+  private:
+    const_iterator(uint value, uint current) : _value(value), _current(current) {}
+    uint _value, _current;
+    friend class BitValue;
+  };
+  const_iterator begin() const { return const_iterator(_value, 0); }
+  const_iterator end() const { return const_iterator(_value, INVALID); }
+
+};
+
+#endif
diff --git a/src/common/common/common.pro b/src/common/common/common.pro
new file mode 100644
index 0000000..3451c92
--- /dev/null
+++ b/src/common/common/common.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = common
+HEADERS += qflags.h misc.h group.h storage.h synchronous.h purl_base.h number.h bitvalue.h key_enum.h version_data.h
+SOURCES += misc.cpp group.cpp storage.cpp synchronous.cpp purl_base.cpp number.cpp bitvalue.cpp version_data.cpp
diff --git a/src/common/common/group.cpp b/src/common/common/group.cpp
new file mode 100644
index 0000000..2a0610f
--- /dev/null
+++ b/src/common/common/group.cpp
@@ -0,0 +1,71 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "group.h"
+
+//-----------------------------------------------------------------------------
+const Group::Support::Data Group::Support::DATA[Nb_Types] = {
+  { "not_supported", I18N_NOOP("Not Supported") },
+  { "untested", I18N_NOOP("Untested") },
+  { "tested", I18N_NOOP("Tested") }
+};
+
+Group::Base::Base()
+  : _gui(0), _initialized(false)
+{}
+
+Group::Base::ConstIterator Group::Base::begin() const
+{
+  const_cast<Base &>(*this).checkInitSupported();
+  return _devices.begin();
+}
+
+Group::Base::ConstIterator Group::Base::end() const
+{
+  const_cast<Base &>(*this).checkInitSupported();
+  return _devices.end();
+}
+
+void Group::Base::addDevice(const QString &name, const Device::Data *data, Support support)
+{
+  _devices[name].data = data;
+  _devices[name].support = support;
+}
+
+Group::Base::Data Group::Base::deviceData(const QString &device) const
+{
+  const_cast<Base &>(*this).checkInitSupported();
+  return _devices[device];
+}
+
+QValueVector<QString> Group::Base::supportedDevices() const
+{
+  const_cast<Base &>(*this).checkInitSupported();
+  QValueVector<QString> names;
+  for (ConstIterator it=begin(); it!=end(); ++it) names.append(it.key());
+  return names;
+}
+
+uint Group::Base::count() const
+{
+  const_cast<Base &>(*this).checkInitSupported();
+  return _devices.count();
+}
+
+void Group::Base::init()
+{
+  _initialized = false;
+}
+
+void Group::Base::checkInitSupported()
+{
+  if (_initialized) return;
+  _initialized = true;
+  _devices.clear();
+  initSupported();
+}
diff --git a/src/common/common/group.h b/src/common/common/group.h
new file mode 100644
index 0000000..2a87674
--- /dev/null
+++ b/src/common/common/group.h
@@ -0,0 +1,82 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef GROUP_H
+#define GROUP_H
+
+#include <qstringlist.h>
+#include <qmap.h>
+
+#include "common/global/global.h"
+#include "key_enum.h"
+namespace Device { class Data; }
+
+namespace Group
+{
+//-----------------------------------------------------------------------------
+class BaseGui;
+BEGIN_DECLARE_ENUM(Support)
+  None = 0, Untested, Tested
+END_DECLARE_ENUM_STD(Support)
+
+//-----------------------------------------------------------------------------
+class Base
+{
+public:
+  class Data {
+  public:
+    Data() : data(0), support(Support::None) {}
+    const Device::Data *data;
+    Support support;
+  };
+  typedef QMap<QString, Data>::ConstIterator ConstIterator;
+
+  Base();
+  virtual ~Base() {}
+  virtual QString name() const = 0;
+  virtual QString label() const = 0;
+  ConstIterator begin() const;
+  ConstIterator end() const;
+  Data deviceData(const QString &device) const;
+  bool isSupported(const QString &device) const { return deviceData(device).support!=Support::None; }
+  QValueVector<QString> supportedDevices() const;
+  uint count() const;
+  const BaseGui *gui() const { return _gui; }
+  void checkInitSupported();
+
+protected:
+  virtual void init();
+  virtual void addDevice(const QString &name, const Device::Data *data, Support support);
+  virtual void initSupported() = 0;
+
+  QMap<QString, Data> _devices;
+
+private:
+  const BaseGui *_gui;
+  bool _initialized;
+
+  template <class GroupType> friend class Lister;
+};
+
+//-----------------------------------------------------------------------------
+class BaseGui
+{
+public:
+  BaseGui() : _group(0) {}
+  virtual ~BaseGui() {}
+  const Base &group() const { return *_group; }
+
+private:
+  const Base *_group;
+
+  template <class GroupType> friend class Lister;
+};
+
+} // namespace
+
+#endif
diff --git a/src/common/common/key_enum.h b/src/common/common/key_enum.h
new file mode 100644
index 0000000..504ca56
--- /dev/null
+++ b/src/common/common/key_enum.h
@@ -0,0 +1,107 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef KEY_ENUM_H
+#define KEY_ENUM_H
+
+#include <qdatastream.h>
+
+#include "misc.h"
+#include "common/global/global.h"
+
+class GenericEnum
+{
+public:
+  GenericEnum(uint value) : _value(value) {}
+  bool operator ==(GenericEnum e) const { return _value==e._value; }
+  bool operator !=(GenericEnum e) const { return _value!=e._value; }
+  bool operator <(GenericEnum e) const { return _value<e._value; }
+  bool operator <=(GenericEnum e) const { return _value<=e._value; }
+  bool operator >(GenericEnum e) const { return _value>e._value; }
+  bool operator >=(GenericEnum e) const { return _value>=e._value; }
+  GenericEnum &operator ++() { _value++; return *this; }
+
+protected:
+  uint _value;
+
+private:
+  friend QDataStream &operator >>(QDataStream &s, GenericEnum &e);
+  friend QDataStream &operator <<(QDataStream &s, const GenericEnum &e);
+};
+
+inline QDataStream &operator <<(QDataStream &s, const GenericEnum &e)
+{
+  s << e._value;
+  return s;
+}
+inline QDataStream &operator >>(QDataStream &s, GenericEnum &e)
+{
+  s >> e._value;
+  return s;
+}
+
+#define BEGIN_DECLARE_ENUM(Enum) \
+class Enum : public GenericEnum \
+{ \
+public: \
+  enum Type {
+
+#define DECLARE_DATA \
+public: \
+  static Type fromKey(const QString &key) { \
+    for (uint i=0; i<Nb_Types; i++) \
+      if ( key==DATA[i].key ) return Type(i); \
+    return Type(Nb_Types); \
+  } \
+  const Data &data() const { \
+    CRASH_ASSERT( _value!=Nb_Types ); \
+    return DATA[_value]; \
+  } \
+  const char *key() const { \
+    if ( _value==Nb_Types ) return 0; \
+    Q_ASSERT(DATA[_value].key); \
+    return DATA[_value].key; \
+  } \
+  QString label() const { \
+    CRASH_ASSERT( _value!=Nb_Types ); \
+    Q_ASSERT(DATA[_value].label); \
+    return i18n(DATA[_value].label); \
+  } \
+  private: \
+    static const Data DATA[Nb_Types]; \
+
+#define DECLARE_ENUM_CLASS(Enum) \
+public: \
+  Enum(Type value = Type(0)) : GenericEnum(value) { Q_ASSERT( value>=0 && value<=Type(Nb_Types)); } \
+  Type type() const { return Type(_value); } \
+};
+
+#define END_DECLARE_ENUM(Enum, EnumData) \
+    , Nb_Types \
+  }; \
+  typedef EnumData Data; \
+  DECLARE_DATA \
+  DECLARE_ENUM_CLASS(Enum) \
+
+#define END_DECLARE_ENUM_STD(Enum) \
+    , Nb_Types \
+  }; \
+  struct Data { \
+    const char *key, *label; \
+  }; \
+  DECLARE_DATA \
+  DECLARE_ENUM_CLASS(Enum)
+
+#define END_DECLARE_ENUM_NO_DATA(Enum) \
+    , Nb_Types \
+  }; \
+  DECLARE_ENUM_CLASS(Enum)
+
+#define FOR_EACH(Enum, e) for(Enum e; e<Enum::Type(Enum::Nb_Types); ++e)
+
+#endif
diff --git a/src/common/common/lister.h b/src/common/common/lister.h
new file mode 100644
index 0000000..35413e8
--- /dev/null
+++ b/src/common/common/lister.h
@@ -0,0 +1,71 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef LISTER_H
+#define LISTER_H
+
+#include "group.h"
+
+namespace Group
+{
+//-----------------------------------------------------------------------------
+template <class GroupType>
+class Lister
+{
+public:
+  typedef typename QMap<QString, const GroupType *>::ConstIterator ConstIterator;
+  ConstIterator begin() const { return ConstIterator(_groups.begin()); }
+  ConstIterator end() const { return ConstIterator(_groups.end()); }
+
+  virtual ~Lister() {
+    for (ConstIterator it=begin(); it!=end(); ++it) delete it.data();
+  }
+
+  QValueVector<QString> supportedDevices() const {
+    QValueVector<QString> names;
+    for (ConstIterator it=begin(); it!=end(); ++it) {
+      QValueVector<QString> gnames = it.data()->supportedDevices();
+      for (uint k=0; k<uint(gnames.count()); k++) names.append(gnames[k]);
+    }
+    return names;
+  }
+
+  uint count() const {
+    uint nb = 0;
+    for (ConstIterator it=begin(); it!=end(); ++it) nb += it.data()->count();
+    return nb;
+  }
+
+  bool isSupported(const QString &device) const {
+    for (ConstIterator it=begin(); it!=end(); ++it)
+      if ( it.data()->isSupported(device) ) return true;
+    return false;
+  }
+
+  const GroupType *group(const QString &name) const {
+    if ( _groups.contains(name) ) return _groups[name];
+    return 0;
+  }
+
+protected:
+  void addGroup(GroupType *group, BaseGui *gui) {
+    Q_ASSERT(group);
+    group->_gui = gui;
+    if (gui) gui->_group = group;
+    group->init();
+    Q_ASSERT( !_groups.contains(group->name()) );
+    _groups.insert(group->name(), group);
+  }
+
+private:
+  QMap<QString, const GroupType *> _groups;
+};
+
+} // namespace
+
+#endif
diff --git a/src/common/common/misc.cpp b/src/common/common/misc.cpp
new file mode 100644
index 0000000..1974024
--- /dev/null
+++ b/src/common/common/misc.cpp
@@ -0,0 +1,72 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "misc.h"
+
+#include <unistd.h>
+
+#include <qregexp.h>
+#include <qtimer.h>
+
+#include "number.h"
+
+//-----------------------------------------------------------------------------
+uchar bin2bcd(uchar bin)
+{
+  char h = bin / 10;
+  char l = bin % 10;
+  return (h*16) + l;
+}
+
+uchar bcd2bin(uchar bcd)
+{
+  char h = bcd / 16;
+  char l = bcd % 16;
+  return (h*10) + l;
+}
+
+QString escapeXml(const QString &cs)
+{
+  QString s;
+  for (uint i=0; i<uint(cs.length()); i++) {
+    if ( cs[i]=='<' ) s += "&lt;";
+    else if ( cs[i]=='>' ) s += "&gt;";
+    else s += cs[i];
+  }
+  return s;
+}
+
+QString htmlTableRow(const QString &title, const QString &value)
+{
+  return "<tr><td>" + title + ":</td><td>" + value + "</td></tr>";
+}
+
+void crash(const char *assert, const char *file, int line)
+{
+  qDebug("CRASH_ASSERT: \"%s\" in %s (%d)", assert, file, line);
+  int * ptr = 0;
+  (*ptr)++;
+}
+
+bool checkAvailable(const QByteArray &data, uint offset, uint nbBytes)
+{
+  return ( offset+nbBytes<=uint(data.size()) );
+}
+
+Q_UINT32 getULong(const QByteArray &data, uint offset, uint nbBytes, bool *ok)
+{
+  Q_ASSERT( nbBytes<=8 );
+  if ( !checkAvailable(data, offset, nbBytes) ) {
+    if (ok) *ok = false;
+    return 0;
+  }
+  if (ok) *ok = true;
+  Q_UINT32 r = 0;
+  for (uint i=0; i<nbBytes; i++) r += Q_UINT8(data[offset+i]) << (8*i);
+  return r;
+}
diff --git a/src/common/common/misc.h b/src/common/common/misc.h
new file mode 100644
index 0000000..f8f92f6
--- /dev/null
+++ b/src/common/common/misc.h
@@ -0,0 +1,39 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef MISC_H
+#define MISC_H
+
+#include <qstring.h>
+
+inline QString repeat(const char *r, uint nb)
+{
+  QString s;
+  for (uint i=0; i<nb; i++) s += r;
+  return s;
+}
+
+inline QString stripEndingWhiteSpaces(const QString &s) {
+  int k = s.length()-1;
+  for (; k>=0; k--) if ( s[k]!=' ' ) break;
+  return s.mid(0, k+1);
+}
+
+extern uchar bin2bcd(uchar bin);
+extern uchar bcd2bin(uchar bcd);
+inline bool XOR(bool b1, bool b2) { return ( (!b1 && b2) || (b1 && !b2) ); }
+
+extern bool checkAvailable(const QByteArray &data, uint offset, uint nbBytes);
+extern Q_UINT32 getULong(const QByteArray &data, uint offset, uint nbBytes, bool *ok);
+
+extern QString escapeXml(const QString &s);
+extern QString htmlTableRow(const QString &title, const QString &value);
+extern void crash(const char *assert, const char *file, int line);
+#define CRASH_ASSERT(x) ((x) ? void(0) : crash(#x, __FILE__, __LINE__))
+
+#endif
diff --git a/src/common/common/number.cpp b/src/common/common/number.cpp
new file mode 100644
index 0000000..12fcac0
--- /dev/null
+++ b/src/common/common/number.cpp
@@ -0,0 +1,201 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "number.h"
+
+#include "common/global/global.h"
+#include "misc.h"
+#if !defined(NO_KDE)
+#  include <kglobal.h>
+#endif
+
+//-----------------------------------------------------------------------------
+const NumberBase::Data NumberBase::DATA[Nb_Types] = {
+  { 10,  "",   I18N_NOOP("Decimal"),     "dec" },
+  { 16,  "0x", I18N_NOOP("Hexadecimal"), "hex" },
+  { 2,   "0b", I18N_NOOP("Binary"),      "bin" },
+  { 8,   "o",  I18N_NOOP("Octal"),       "oct" },
+  { 256, "",   I18N_NOOP("String"),      "str" }
+};
+
+char toChar(NumberBase base, uint value)
+{
+  Q_ASSERT( value<base.data().base );
+  if ( value>=base.data().base ) qDebug("toChar %u (%u)", value, base.data().base);
+  if ( base==NumberBase::String ) {
+    if ( !isprint(value) ) return '.';
+    return value;
+  }
+  if ( value<=9 ) return '0' + value;
+  return 'A' + value - 10;
+}
+
+QString toString(NumberBase base, ulong value, uint nbChars)
+{
+  ulong tmp = value;
+  QString s;
+  s.fill(0, nbChars);
+  for (uint i=0; i<nbChars; i++) {
+    s[nbChars-i-1] = toChar(base, uint(value % base.data().base));
+    value /= base.data().base;
+  }
+  Q_ASSERT( value==0 );
+  if ( value!=0 ) qDebug("toString %s nbChars=%u", toLabel(base, tmp, ::nbChars(base, tmp)).latin1(), nbChars);
+  return s;
+}
+
+QString toLabel(NumberBase base, ulong value, uint nbChars)
+{
+  if ( base==NumberBase::String ) return "\'" + toString(base, value, nbChars) + "\'";
+  return base.data().prefix + toString(base, value, nbChars);
+}
+
+uint nbChars(NumberBase base, ulong value)
+{
+  uint nb = 1;
+  for (;;) {
+    value /= base.data().base;
+    if ( value==0 ) break;
+    nb++;
+  }
+  return nb;
+}
+
+ulong maxValue(NumberBase base, uint nbChars)
+{
+  uint v = 1;
+  for (uint i=0; i<nbChars; i++) v *= base.data().base;
+  return v - 1;
+}
+
+ulong fromString(NumberBase base, const QCString &s, bool *ok)
+{
+  return fromString(base, s.data(), s.length(), ok);
+}
+ulong fromString(NumberBase base, const QString &s, bool *ok)
+{
+#if QT_VERSION<0x040000
+  return fromString(base, s.latin1(), s.length(), ok);
+#else
+  QByteArray a = s.toLatin1();
+  return fromString(base, a.data(), a.count(), ok);
+#endif
+}
+
+ulong fromLabel(NumberBase base, const QString &s, bool *ok)
+{
+#if QT_VERSION<0x040000
+  return fromLabel(base, s.latin1(), s.length(), ok);
+#else
+  QByteArray a = s.toLatin1();
+  return fromLabel(base, a.data(), a.count(), ok);
+#endif
+}
+
+ulong fromLabel(NumberBase base, const QString &s, uint nbChars, bool *ok)
+{
+  if ( uint(s.length())!=nbChars+strlen(base.data().prefix) ) {
+    if (ok) *ok = false;
+    return 0;
+  }
+  return fromLabel(base, s, ok);
+}
+
+ulong fromLabel(NumberBase base, const char *s, uint size, bool *ok)
+{
+  if (ok) *ok = false;
+  if ( s==0 ) return 0;
+  uint psize = (base==NumberBase::String ? 1 : strlen(base.data().prefix));
+  uint ssize = (base==NumberBase::String ? 1 : 0);
+  if ( size<=(psize+ssize) ) return 0;
+  if ( base==NumberBase::String ) {
+    if ( s[0]=='"' ) {
+      if ( s[size-1]!='"' ) return 0;
+    } else if ( s[0]=='\'' ) {
+      if ( s[size-1]!='\'' ) return 0;
+    } else return 0;
+  } else for (uint i=0; i<psize; i++) if ( s[i]!=base.data().prefix[i] ) return 0;
+  return fromString(base, s+psize, size-psize-ssize, ok);
+}
+
+ulong fromAnyLabel(const QString &s, bool *ok)
+{
+  uint v = 0;
+  bool bok = false;
+  FOR_EACH(NumberBase, base) {
+      v = fromLabel(base, s.lower(), &bok);
+    if (bok) break;
+  }
+  if ( !bok ) v = fromString(NumberBase::Dec, s, &bok);
+  if ( !bok ) {
+    if (ok) *ok = false;
+    return 0;
+  }
+  if (ok) *ok = true;
+  return v;
+}
+
+uint fromChar(NumberBase base, char c, bool *ok)
+{
+  uint v = 0;
+  if ( base==NumberBase::String ) {
+    if (ok) *ok = true;
+    return c;
+  }
+  if ( c>='0' && c<='9' ) v = c - '0';
+  else if ( c>='A' && c<'Z' ) v = 10 + c - 'A';
+  else if ( c>='a' && c<'z' ) v = 10 + c - 'a';
+  else {
+    if (ok) *ok = false;
+    return 0;
+  }
+  if (ok) *ok = ( v<base.data().base );
+  return v;
+}
+
+ulong fromString(NumberBase base, const char *s, uint size, bool *ok)
+{
+  if (ok) *ok = false;
+  if ( s==0 || size==0 ) return 0;
+  ulong v = 0;
+  for (uint i=0; i<size; i++) {
+    v *= base.data().base;
+    bool bok;
+    v += fromChar(base, s[i], &bok);
+    if ( !bok ) return 0;
+  }
+  if (ok) *ok = true;
+  return v;
+}
+
+QString toLabels(NumberBase base, const QMemArray<uint> &values, uint nbChars)
+{
+  QString s = "[";
+  for (uint i=0; i<values.count(); i++) {
+    if ( i!=0 ) s += ' ';
+    s += toLabel(base, values[i], nbChars);
+  }
+  s += "]";
+  return s;
+}
+
+QString formatNumber(ulong v)
+{
+#if defined(NO_KDE)
+  return QString::number(v);
+#else
+  return KGlobal::locale()->formatNumber(v, 0);
+#endif
+}
+
+QByteArray toAscii(const QString &s)
+{
+  QByteArray a(s.length());
+  for (uint i=0; i<uint(s.length()); i++) a[i] = s[i].latin1();
+  return a;
+}
diff --git a/src/common/common/number.h b/src/common/common/number.h
new file mode 100644
index 0000000..f4dae79
--- /dev/null
+++ b/src/common/common/number.h
@@ -0,0 +1,92 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef NUMBER_H
+#define NUMBER_H
+
+#include <ctype.h>
+
+#include "common/global/global.h"
+#include "key_enum.h"
+
+//----------------------------------------------------------------------------
+struct NumberBaseData {
+  uint base;
+  const char *prefix, *label,* key;
+};
+
+BEGIN_DECLARE_ENUM(NumberBase)
+  Dec = 0, Hex, Bin, Oct, String
+END_DECLARE_ENUM(NumberBase, NumberBaseData)
+
+extern uint nbChars(NumberBase base, ulong value);
+extern ulong maxValue(NumberBase base, uint nbChars);
+inline uint convertNbChars(uint nb, NumberBase from, NumberBase to) { return nbChars(to, maxValue(from, nb)); }
+
+extern char toChar(NumberBase base, uint value);
+extern QString toString(NumberBase base, ulong value, uint nbChars);
+extern QString toLabel(NumberBase base, ulong value, uint nbChars);
+extern QString toLabels(NumberBase base, const QMemArray<ulong> &values, uint nbChars);
+
+extern uint fromChar(NumberBase base, char c, bool *ok);
+extern ulong fromString(NumberBase base, const char *s, uint size, bool *ok);
+extern ulong fromString(NumberBase base, const QString &s, bool *ok);
+extern ulong fromLabel(NumberBase base, const QString &s, bool *ok);
+extern ulong fromLabel(NumberBase base, const QString &s, uint nbChars, bool *ok);
+extern ulong fromLabel(NumberBase base, const char *s, uint size, bool *ok);
+
+extern ulong fromAnyLabel(const QString &s, bool *ok);
+
+//----------------------------------------------------------------------------
+inline QString toHex(ulong value, uint nbChars) { return toString(NumberBase::Hex, value, nbChars); }
+inline QString toHexLabel(ulong value, uint nbChars) { return toLabel(NumberBase::Hex, value, nbChars); }
+inline QString toHexLabelAbs(ulong value) { return toLabel(NumberBase::Hex, value, nbChars(NumberBase::Hex, value)); }
+
+inline uint fromHex(char c, bool *ok) { return fromChar(NumberBase::Hex, c, ok); }
+inline uint fromHex(QChar c, bool *ok) { return fromChar(NumberBase::Hex, c.latin1(), ok); }
+inline ulong fromHex(const char *s, uint size, bool *ok) { return fromString(NumberBase::Hex, s, size, ok); }
+inline ulong fromHex(const QString &s, bool *ok) { return fromString(NumberBase::Hex, s, ok); }
+inline ulong fromHexLabel(const QString &s, bool *ok) { return fromLabel(NumberBase::Hex, s, ok); }
+inline ulong fromHexLabel(const QString &s, uint nbChars, bool *ok)  { return fromLabel(NumberBase::Hex, s, nbChars, ok); }
+inline ulong fromHexLabel(const char *s, uint size, bool *ok)  { return fromLabel(NumberBase::Hex, s, size, ok); }
+
+//----------------------------------------------------------------------------
+inline uint nbBits(ulong value) { return nbChars(NumberBase::Bin, value); }
+inline uint nbBitsToNbChars(uint nbBits) { return nbBits/4 + (nbBits%4 ? 1 : 0); }
+inline uint nbBitsToNbBytes(uint nbBits) { return nbBits/8 + (nbBits%8 ? 1 : 0); }
+inline uint nbChars(ulong value) { return nbBitsToNbChars(nbBits(value)); }
+inline uint nbBytes(ulong value) { return nbBitsToNbBytes(nbBits(value)); }
+
+//----------------------------------------------------------------------------
+extern QString formatNumber(ulong v);
+extern QByteArray toAscii(const QString &s);
+
+//----------------------------------------------------------------------------
+enum PrintMode { PrintAlphaNum, PrintEscapeAll };
+inline QString toPrintable(char c, PrintMode mode)
+{
+  if ( mode==PrintAlphaNum && isalnum(c) ) return QChar(c);
+  return "\\" + toHex(uchar(c), 2);
+}
+inline QString toPrintable(const char *data, uint size, PrintMode mode)
+{
+  QString s;
+  for (uint i=0; i<size; i++) s += toPrintable(data[i], mode);
+  return s;
+}
+inline QString toPrintable(const QString &s, PrintMode mode)
+{
+  QByteArray a = toAscii(s);
+  return toPrintable(a.data(), a.count(), mode);
+}
+inline QString toPrintable(const QMemArray<uchar> &data, PrintMode mode)
+{
+  return toPrintable((const char *)data.data(), data.size(), mode);
+}
+
+#endif
diff --git a/src/common/common/purl_base.cpp b/src/common/common/purl_base.cpp
new file mode 100644
index 0000000..2493322
--- /dev/null
+++ b/src/common/common/purl_base.cpp
@@ -0,0 +1,133 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "purl_base.h"
+
+#include "common/global/global.h"
+#include <qfileinfo.h>
+
+#include "data/xpms/project.xpm"
+#include "data/xpms/sourcefile.xpm"
+#include "data/xpms/includefile.xpm"
+#include "data/xpms/objectfile.xpm"
+
+const PURL::ToolType::Data PURL::ToolType::DATA[Nb_Types] = {
+  { "assembler", I18N_NOOP("Assembler") },
+  { "compiler",  I18N_NOOP("Compiler")  }
+};
+
+const PURL::SourceFamily::Data PURL::SourceFamily::DATA[Nb_Types] = {
+  { ToolType::Assembler, "asm",   I18N_NOOP("Assembler"),      Inc          },
+  { ToolType::Compiler,  "c",     I18N_NOOP("C Compiler"),     CHeader      },
+  { ToolType::Compiler,  "jal",   I18N_NOOP("JAL Compiler"),   Nb_FileTypes },
+  { ToolType::Compiler,  "cpp",   I18N_NOOP("C++ Compiler"),   CHeader      },
+  { ToolType::Compiler,  "basic", I18N_NOOP("Basic Compiler"), Nb_FileTypes }
+};
+
+const PURL::FileType::Data PURL::FileType::DATA[Nb_Types] = {
+  { "AsmGPAsm",    Source, Editable, SourceFamily::Asm, I18N_NOOP("Assembler File"),            { "asm", "src", "pic", 0 }, sourcefile_xpm,  0,               "XPicAsm"   },
+  { "AsmPIC30",    Source, Editable, SourceFamily::Asm, I18N_NOOP("Assembler File for PIC30"),  { "s", 0 },                 sourcefile_xpm,  0,               "XPicAsm"   },
+  { "AsmPICC",     Source, Editable, SourceFamily::Asm, I18N_NOOP("Assembler File for PICC"),   { "as", 0 },                sourcefile_xpm,  0,               "XPicAsm"   },
+  { "Inc",         Header, Editable, SourceFamily::Asm, I18N_NOOP("Include File"),        { "inc", 0 },               includefile_xpm, 0,               "XPicAsm"   },
+  { "CSource",     Source, Editable, SourceFamily::C,   I18N_NOOP("C Source File"),       { "c", 0 },                 0,               "text/x-csrc",   "C"         },
+  { "CppSource",   Source, Editable, SourceFamily::C,   I18N_NOOP("C++ Source File"),     { "cpp", "cxx", 0 },        0,               "text/x-c++src", "C++"       },
+  { "CHeader",     Header, Editable, SourceFamily::C,   I18N_NOOP("C Header File"),       { "h", 0 },                 0,               "text/x-chdr",   "C"         },
+  { "JalSource",   Source, Editable, SourceFamily::JAL, I18N_NOOP("JAL File"),            { "jal", 0},                sourcefile_xpm,  0,               "XPicJal"   },
+  { "BasicSource", Source, Editable, SourceFamily::Basic, I18N_NOOP("Basic Source File"), { "bas", 0 },               sourcefile_xpm,  0,               "FreeBASIC" },
+
+  { "Object",      LinkerObject, Editable | ReadOnly, SourceFamily::Nb_Types, I18N_NOOP("Object File"),         { "o", "obj", 0 },          objectfile_xpm,  0,               0         },
+  { "Library",     LinkerObject, Editable | ReadOnly, SourceFamily::Nb_Types, I18N_NOOP("Library File"),        { "a", "lib", 0 },          objectfile_xpm,  0,               0         },
+
+  { "Lkr",         LinkerScript, Editable, SourceFamily::Nb_Types, I18N_NOOP("Linker Script"),           { "lkr", 0 },               includefile_xpm, 0,               0         },
+  { "Gld",         LinkerScript, Editable, SourceFamily::Nb_Types, I18N_NOOP("Linker Script for PIC30"), { "gld", 0 },               includefile_xpm, 0,               0         },
+
+  { "Hex",         Nb_FileGroups, Editable,            SourceFamily::Nb_Types, I18N_NOOP("Hex File"),            { "hex", 0 },               0,               "text/x-hex",    0         },
+  { "Elf",         Nb_FileGroups, ReadOnly,            SourceFamily::Nb_Types, I18N_NOOP("Elf File"),            { "elf", 0 },               0,               0,               0         },
+  { "Project",     Nb_FileGroups, NoProperty,          SourceFamily::Nb_Types, I18N_NOOP("Project File"),        { "piklab", 0 },            project_xpm,     0,               0         },
+  { "Lst",         Nb_FileGroups, Editable | ReadOnly, SourceFamily::Nb_Types, I18N_NOOP("List File"),           { "lst", 0 },               0,               "text/plain",    0         },
+  { "Map",         Nb_FileGroups, Editable | ReadOnly, SourceFamily::Nb_Types, I18N_NOOP("Map File"),            { "map", 0 },               0,               "text/plain",    0         },
+  { "Cod",         Nb_FileGroups, ReadOnly,            SourceFamily::Nb_Types, I18N_NOOP("COD File"),            { "cod", 0 },               0,               0,               0         },
+  { "Coff",        Nb_FileGroups, Editable | ReadOnly, SourceFamily::Nb_Types, I18N_NOOP("COFF File"),           { "cof", 0 },               0,               "application/x-object", "XCoffDisasm" },
+
+  { "",            Nb_FileGroups, NoProperty,          SourceFamily::Nb_Types, I18N_NOOP("Unknown File"),        { 0 },                      0,               0,               0         },
+  { "",            Nb_FileGroups, NoProperty,          SourceFamily::Nb_Types, I18N_NOOP("Pikdev Project File"), { "pikprj", 0 },            0,               0,               0         }
+};
+
+QString PURL::addExtension(const QString &filename, FileType type)
+{
+  QFileInfo info(filename);
+  if ( !info.extension().isEmpty() ) return filename;
+  return filename + '.' + extension(type);
+}
+
+QString PURL::extension(FileType type)
+{
+  return type.data().extensions[0];
+}
+
+QString PURL::extensions(FileType type)
+{
+  Q_ASSERT( type!=PURL::Nb_FileTypes );
+  QString s;
+  for (uint i=0; type.data().extensions[i]; i++) {
+    if ( i!=0 ) s += ' ';
+    s += QString("*.") + type.data().extensions[i];
+  }
+  return s;
+}
+
+QString PURL::filter(FileType type)
+{
+  //if ( hasMimetype(type) ) return DATA[type].mimetype; // #### we cannot mix mimetype and regular filters in KFileDialog...
+  QString s = extensions(type);
+  return s + ' ' + s.upper() + '|' + type.label() + " (" + s + ")";
+}
+
+QString PURL::extensions(FileGroup group)
+{
+  QString e;
+  FOR_EACH(FileType, type) {
+    if ( type.data().group!=group ) continue;
+    if ( type!=FileType::Type(0) ) e += ' ';
+    QString s = extensions(type);
+    e += s + ' ' + s.upper();
+  }
+  return e;
+}
+
+QString PURL::sourceFilter(FilterType type)
+{
+  QString f = extensions(Source) + ' ' + extensions(Header) + '|' + i18n("All Source Files");
+  if ( type==CompleteFilter) {
+    FOR_EACH(FileType, type) {
+      if ( !(type.data().properties & (Source | Header)) ) continue;
+      f += '\n' + filter(type);
+    }
+  }
+  return f;
+}
+
+QString PURL::objectFilter(FilterType type)
+{
+  QString f = extensions(Object) + ' ' + extensions(Library) + '|' + i18n("All Object Files");
+  if ( type==CompleteFilter ) {
+    f += '\n' + filter(Object);
+    f += '\n' + filter(Library);
+  }
+  return f;
+}
+
+QString PURL::projectFilter(FilterType type)
+{
+  QString f = extensions(Project) + ' ' + extensions(PikdevProject) + '|' + i18n("Project Files");
+  if ( type==CompleteFilter ) {
+    f += '\n' + filter(Project);
+    f += '\n' + filter(PikdevProject);
+  }
+  return f;
+}
diff --git a/src/common/common/purl_base.h b/src/common/common/purl_base.h
new file mode 100644
index 0000000..7a7e4ea
--- /dev/null
+++ b/src/common/common/purl_base.h
@@ -0,0 +1,79 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PURL_BASE_H
+#define PURL_BASE_H
+
+#include "common/global/global.h"
+#include "common/common/key_enum.h"
+
+//----------------------------------------------------------------------------
+namespace PURL
+{
+BEGIN_DECLARE_ENUM(ToolType)
+  Assembler = 0, Compiler
+END_DECLARE_ENUM_STD(ToolType)
+
+enum FileTypeEnum {
+  AsmGPAsm = 0, AsmPIC30, AsmPICC, Inc, CSource, CppSource, CHeader, JalSource, BasicSource,
+  Object, Library, Lkr, Gld, Hex, Elf, Project, Lst, Map, Cod, Coff,
+  Unknown, PikdevProject,
+  Nb_FileTypes
+};
+
+struct SourceFamilyData {
+  ToolType     toolType;
+  const char  *key, *label;
+  FileTypeEnum headerType;
+};
+BEGIN_DECLARE_ENUM(SourceFamily)
+  Asm = 0, C, JAL, Cpp, Basic
+END_DECLARE_ENUM(SourceFamily, SourceFamilyData)
+
+enum FileGroup { Source = 0, Header, LinkerScript, LinkerObject, Nb_FileGroups };
+
+enum FileProperty { NoProperty = 0, Editable = 1, ReadOnly = 2 };
+Q_DECLARE_FLAGS(FileProperties, FileProperty)
+Q_DECLARE_OPERATORS_FOR_FLAGS(FileProperties)
+
+struct FileTypeData {
+  const char *key;
+  FileGroup group;
+  FileProperties properties;
+  SourceFamily sourceFamily;
+  const char *label;
+  const char *extensions[10];
+  const char **xpm_icon;
+  const char *mimetype;
+  const char *highlightModeName;
+};
+#ifndef Q_MOC_RUN // needed because MOC does not expand defines...
+class FileType : public GenericEnum
+{
+public:
+  typedef FileTypeEnum Type;
+  enum { Nb_Types = Nb_FileTypes };
+  typedef FileTypeData Data;
+DECLARE_DATA
+DECLARE_ENUM_CLASS(FileType)
+#endif
+
+// add correct extension if filename has no extension
+extern QString addExtension(const QString &filename, FileType type);
+extern QString extension(FileType type);
+extern QString extensions(FileType type);
+extern QString filter(FileType type);
+enum FilterType { SimpleFilter, CompleteFilter };
+extern QString sourceFilter(FilterType type);
+extern QString objectFilter(FilterType type);
+extern QString projectFilter(FilterType type);
+extern QString extensions(FileGroup group);
+
+} // namespace
+
+#endif
diff --git a/src/common/common/qflags.h b/src/common/common/qflags.h
new file mode 100644
index 0000000..4858ce4
--- /dev/null
+++ b/src/common/common/qflags.h
@@ -0,0 +1,81 @@
+/****************************************************************************
+**
+** Copyright (C) 1992-2005 Trolltech AS. All rights reserved.
+**
+** This file is part of the QtCore module of the Qt Toolkit.
+**
+** This file may be used under the terms of the GNU General Public
+** License version 2.0 as published by the Free Software Foundation
+** and appearing in the file LICENSE.GPL included in the packaging of
+** this file.  Please review the following information to ensure GNU
+** General Public Licensing requirements will be met:
+** http://www.trolltech.com/products/qt/opensource.html
+**
+** If you are unsure which license is appropriate for your use, please
+** review the following information:
+** http://www.trolltech.com/products/qt/licensing.html or contact the
+** sales department at sales@trolltech.com.
+**
+** This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
+** WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+**
+****************************************************************************/
+#ifndef QFLAGS_H
+#define QFLAGS_H
+
+#include <qglobal.h>
+
+class QFlag
+{
+    int i;
+public:
+    inline QFlag(int i);
+    inline operator int() const { return i; }
+};
+
+inline QFlag::QFlag(int ai) : i(ai) {}
+
+template<typename Enum>
+class QFlags
+{
+    typedef void **Zero;
+    int i;
+public:
+    typedef Enum enum_type;
+    inline QFlags(const QFlags &f) : i(f.i) {}
+    inline QFlags(Enum f) : i(f) {}
+    inline QFlags(Zero = 0) : i(0) {}
+    inline QFlags(QFlag f) : i(f) {}
+
+    inline QFlags &operator=(const QFlags &f) { i = f.i; return *this; }
+    inline QFlags &operator&=(int mask) {  i &= mask; return *this; }
+    inline QFlags &operator&=(uint mask) {  i &= mask; return *this; }
+    inline QFlags &operator|=(QFlags f) {  i |= f.i; return *this; }
+    inline QFlags &operator|=(Enum f) {  i |= f; return *this; }
+    inline QFlags &operator^=(QFlags f) {  i ^= f.i; return *this; }
+    inline QFlags &operator^=(Enum f) {  i ^= f; return *this; }
+
+
+    inline operator int() const { return i;}
+
+    inline QFlags operator|(QFlags f) const { QFlags g; g.i = i | f.i; return g; }
+    inline QFlags operator|(Enum f) const { QFlags g; g.i = i | f; return g; }
+    inline QFlags operator^(QFlags f) const { QFlags g; g.i = i ^ f.i; return g; }
+    inline QFlags operator^(Enum f) const { QFlags g; g.i = i ^ f; return g; }
+    inline QFlags operator&(int mask) const { QFlags g; g.i = i & mask; return g; }
+    inline QFlags operator&(uint mask) const { QFlags g; g.i = i & mask; return g; }
+    inline QFlags operator&(Enum f) const { QFlags g; g.i = i & f; return g; }
+    inline QFlags operator~() const { QFlags g; g.i = ~i; return g; }
+
+    inline bool operator!() const { return !i; }
+};
+
+#define Q_DECLARE_FLAGS(Flags, Enum)\
+typedef QFlags<Enum> Flags;
+#define Q_DECLARE_OPERATORS_FOR_FLAGS(Flags) \
+inline QFlags<Flags::enum_type> operator|(Flags::enum_type f1, Flags::enum_type f2) \
+{ return QFlags<Flags::enum_type>(f1) | f2; } \
+inline QFlags<Flags::enum_type> operator|(Flags::enum_type f1, QFlags<Flags::enum_type> f2) \
+{ return f2 | f1; }
+
+#endif
diff --git a/src/common/common/range.h b/src/common/common/range.h
new file mode 100644
index 0000000..e07cb68
--- /dev/null
+++ b/src/common/common/range.h
@@ -0,0 +1,61 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef RANGE_H
+#define RANGE_H
+
+#include "common/global/global.h"
+
+//-----------------------------------------------------------------------------
+template <typename Type>
+class GenericRange
+{
+public:
+  virtual ~GenericRange() {}
+  virtual bool isEmpty() const = 0;
+  bool contains(Type v) const { return !isEmpty() && v>=start && v<=end; }
+
+  Type start, end;
+};
+
+class Range : public GenericRange<uint>
+{
+public:
+  Range() { start = 0; end = 0; }
+  Range(uint s, uint e) { start = s; end = e; }
+  virtual bool isEmpty() const { return end<=start; }
+};
+
+template <typename Type>
+inline QDataStream &operator >>(QDataStream &s, GenericRange<Type> &r) { s >> r.start >> r.end; return s; }
+template <typename Type>
+inline QDataStream &operator <<(QDataStream &s, const GenericRange<Type> &r) { s << r.start << r.end; return s; }
+template <typename Type>
+inline bool operator ==(const GenericRange<Type> &r1, const GenericRange<Type> &r2) { return ( r1.start==r2.start && r1.end==r2.end ); }
+
+template <typename Type, typename RangeType>
+class GenericRangeVector : public QValueVector<RangeType>
+{
+public:
+  GenericRangeVector() {}
+  GenericRangeVector(const RangeType &range) { append(range); }
+  bool isEmpty() const {
+    uint nb = this->count();
+    for (uint i=0; i<nb; i++) if ( !this->at(i).isEmpty() ) return false;
+    return true;
+  }
+  bool contains(Type v) const {
+    uint nb = this->count();
+    for (uint i=0; i<nb; i++) if ( this->at(i).contains(v) ) return true;
+    return false;
+  }
+};
+
+typedef GenericRangeVector<uint, Range> RangeVector;
+
+#endif
diff --git a/src/common/common/storage.cpp b/src/common/common/storage.cpp
new file mode 100644
index 0000000..00137b8
--- /dev/null
+++ b/src/common/common/storage.cpp
@@ -0,0 +1,42 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "storage.h"
+
+#include <qtimer.h>
+
+//----------------------------------------------------------------------------
+void GenericStorage::delayedChanged()
+{
+  if (_dirty) return;
+  _dirty = true;
+  QTimer::singleShot(0, this, SLOT(changedSlot()));
+}
+
+void GenericStorage::changedSlot()
+{
+  _dirty = false;
+  emit changed();
+}
+
+//----------------------------------------------------------------------------
+void GenericViewProxy::addStorage(GenericStorage &storage)
+{
+  connect(&storage, SIGNAL(changed()), SLOT(changed()));
+}
+
+void GenericViewProxy::changed()
+{
+  _view.updateView();
+}
+
+GenericView::GenericView(GenericStorage &storage)
+{
+  _proxy = new GenericViewProxy(*this);
+  _proxy->addStorage(storage);
+}
diff --git a/src/common/common/storage.h b/src/common/common/storage.h
new file mode 100644
index 0000000..b61123a
--- /dev/null
+++ b/src/common/common/storage.h
@@ -0,0 +1,85 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef STORAGE_H
+#define STORAGE_H
+
+#include "common/global/global.h"
+#include <qobject.h>
+
+//-----------------------------------------------------------------------------
+template <class Type>
+class Fifo
+{
+public:
+  Fifo() {}
+  void clear() { _list.clear(); }
+  uint count() const { return _list.count(); }
+  void put(Type type) { _list.append(type); }
+  Type get() {
+    Type t = _list.first();
+    _list.pop_front();
+    return t;
+  }
+
+private:
+  QValueList<Type> _list;
+};
+
+//----------------------------------------------------------------------------
+class GenericStorage : public QObject
+{
+Q_OBJECT
+public:
+  GenericStorage(QObject *parent = 0, const char *name = 0) : QObject(parent, name), _dirty(false) {}
+
+signals:
+  void changed();
+
+protected:
+  // emit changed() only after a return to the GUI loop and only one time
+  void delayedChanged();
+
+private slots:
+  void changedSlot();
+
+private:
+  bool _dirty;
+};
+
+//----------------------------------------------------------------------------
+class GenericView;
+
+class GenericViewProxy : public QObject
+{
+Q_OBJECT
+public:
+  GenericViewProxy(GenericView &view) : _view(view) {}
+  void addStorage(GenericStorage &storage);
+
+private slots:
+  void changed();
+
+private:
+  GenericView &_view;
+};
+
+class GenericView
+{
+public:
+  GenericView(GenericStorage &storage);
+  virtual ~GenericView() { delete _proxy; }
+  virtual void updateView() = 0;
+
+private:
+  GenericViewProxy *_proxy;
+
+  friend class GenericViewProxy;
+};
+
+#endif
diff --git a/src/common/common/streamer.h b/src/common/common/streamer.h
new file mode 100644
index 0000000..93d1421
--- /dev/null
+++ b/src/common/common/streamer.h
@@ -0,0 +1,59 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef STREAMER_H
+#define STREAMER_H
+
+#include <qdatastream.h>
+#include <qtextstream.h>
+
+#include "common/global/global.h"
+#include "common/common/number.h"
+
+template <class DataType>
+class DataStreamer
+{
+public:
+  uint toCppString(const QValueList<DataType *> &list, QTextStream &s) {
+    QByteArray a;
+#if QT_VERSION<0x040000
+    QDataStream ds(a, IO_WriteOnly);
+#else
+    QDataStream ds(&a, QIODevice::WriteOnly);
+#endif
+    for (uint i=0; i<uint(list.count()); i++) ds << *list[i];
+    s << "\"";
+    for (uint i=0; i<uint(a.count()); i++) {
+      if ( i!=0 && (i%40)==0 ) s << "\"" << endl << "\"";
+      s << "\\x" << toChar(NumberBase::Hex, uchar(a[i])/16) << toChar(NumberBase::Hex, uchar(a[i])%16);
+    }
+    s << "\"";
+    return a.count();
+  }
+
+  QValueList<DataType *> fromCppString(const char *data, uint size) {
+    QByteArray a;
+    a.setRawData(data, size);
+#if QT_VERSION<0x040000
+    QDataStream ds(a, IO_ReadOnly);
+#else
+    QDataStream ds(&a, QIODevice::ReadOnly);
+#endif
+    QValueList<DataType *> list;
+    for (;;) {
+      if ( ds.atEnd() ) break;
+      DataType *data = new DataType;
+      ds >> *data;
+      list.append(data);
+    }
+    a.resetRawData(data, size);
+    return list;
+  }
+};
+
+#endif
diff --git a/src/common/common/synchronous.cpp b/src/common/common/synchronous.cpp
new file mode 100644
index 0000000..f392103
--- /dev/null
+++ b/src/common/common/synchronous.cpp
@@ -0,0 +1,58 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "synchronous.h"
+
+#include "common/global/global.h"
+#if QT_VERSION<0x040000
+#  include <qwidget.h>
+#endif
+
+Synchronous::Synchronous(uint timeout)
+{
+  connect(&_timer, SIGNAL(timeout()), SLOT(done()));
+  if (timeout) _timer.start(timeout, true);
+#if QT_VERSION>=0x040000
+  _loop = new QEventLoop(this);
+#endif
+}
+
+#if QT_VERSION<0x040000
+// uplifted from kdelibs...
+void qt_enter_modal(QWidget *widget);
+void qt_leave_modal(QWidget *widget);
+#endif
+
+bool Synchronous::enterLoop()
+{
+#if QT_VERSION<0x040000
+  QWidget *dummy = 0;
+  if ( qApp->type()!=QApplication::Tty ) {
+    dummy = new QWidget(0, 0, WType_Dialog | WShowModal);
+    dummy->setFocusPolicy(QWidget::NoFocus);
+    qt_enter_modal(dummy);
+  }
+  QApplication::eventLoop()->enterLoop();
+  if ( qApp->type()!=QApplication::Tty ) {
+    qt_leave_modal(dummy);
+    delete dummy;
+  }
+#else
+  _loop->exec();
+#endif
+  return _timer.isActive();
+}
+
+void Synchronous::done()
+{
+#if QT_VERSION<0x040000
+  QApplication::eventLoop()->exitLoop();
+#else
+  _loop->exit();
+#endif
+}
diff --git a/src/common/common/synchronous.h b/src/common/common/synchronous.h
new file mode 100644
index 0000000..e855e38
--- /dev/null
+++ b/src/common/common/synchronous.h
@@ -0,0 +1,32 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef SYNCHRONOUS_H
+#define SYNCHRONOUS_H
+
+#include <qtimer.h>
+#include <qeventloop.h>
+
+class Synchronous : public QObject
+{
+Q_OBJECT
+public:
+  Synchronous(uint timeout = 0); // timeout is ms (0 == no timeout)
+  bool enterLoop(); // return false on timeout
+
+public slots:
+  void done();
+
+private:
+  QTimer _timer;
+#if QT_VERSION>=0x040000
+  QEventLoop *_loop;
+#endif
+};
+
+#endif
diff --git a/src/common/common/version_data.cpp b/src/common/common/version_data.cpp
new file mode 100644
index 0000000..481ba1a
--- /dev/null
+++ b/src/common/common/version_data.cpp
@@ -0,0 +1,55 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "version_data.h"
+
+#include <qregexp.h>
+
+#include "number.h"
+
+VersionData VersionData::fromString(const QString &s)
+{
+  VersionData vd;
+  QRegExp re("([0-9]+)\\.([0-9]+)\\.([0-9]+)(.*)");
+  if ( !re.exactMatch(s) ) return vd;
+  vd._valid = true;
+  vd._majorNum = re.cap(1).toUInt();
+  vd._minorNum = re.cap(2).toUInt();
+  vd._dotNum = re.cap(3).toUInt();
+  vd._sub = re.cap(4);
+  return vd;
+}
+
+VersionData VersionData::fromHexString(const QString &s)
+{
+  VersionData vd;
+  if ( s.length()!=6 ) return vd;
+  vd._valid = true;
+  vd._majorNum = ::fromString(NumberBase::Hex, s.mid(0, 2), 0);
+  vd._minorNum = ::fromString(NumberBase::Hex, s.mid(2, 2), 0);
+  vd._dotNum = ::fromString(NumberBase::Hex, s.mid(4, 2), 0);
+  return vd;
+}
+
+QString VersionData::pretty() const
+{
+  if ( !isValid() ) return "---";
+  return QString::number(_majorNum) + '.' + QString::number(_minorNum) + '.' + QString::number(_dotNum) + _sub;
+}
+
+QString VersionData::prettyWithoutDot() const
+{
+  if ( !isValid() ) return "---";
+  return QString::number(_majorNum) + '.' + QString::number(_minorNum);
+}
+
+uint VersionData::toUInt() const
+{
+  Q_ASSERT(_valid);
+  return (_majorNum << 16) | (_minorNum << 8) | _dotNum;
+}
diff --git a/src/common/common/version_data.h b/src/common/common/version_data.h
new file mode 100644
index 0000000..2571631
--- /dev/null
+++ b/src/common/common/version_data.h
@@ -0,0 +1,47 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef VERSION_DATA_H
+#define VERSION_DATA_H
+
+#include "common/global/global.h"
+
+class VersionData
+{
+public:
+  static VersionData fromString(const QString &s);
+  static VersionData fromHexString(const QString &s);
+
+public:
+  VersionData() : _valid(false) {}
+  VersionData(uchar majorNum, uchar minorNum, uchar dotNum)
+    : _valid(true), _majorNum(majorNum), _minorNum(minorNum), _dotNum(dotNum) {}
+  bool isValid() const { return _valid; }
+  void clear() { _valid = false; }
+  uchar majorNum() const { return _majorNum; }
+  uchar minorNum() const { return _minorNum; }
+  uchar dotNum() const { return _dotNum; }
+  QString sub() const { return _sub; }
+  VersionData toWithoutDot() const { return VersionData(_majorNum, _minorNum, 0); }
+  QString pretty() const;
+  QString prettyWithoutDot() const;
+  uint toUInt() const;
+  bool operator <(const VersionData &vd) const { return toUInt()<vd.toUInt(); }
+  bool operator <=(const VersionData &vd) const { return toUInt()<=vd.toUInt(); }
+  bool operator >(const VersionData &vd) const { return toUInt()>vd.toUInt(); }
+  bool operator >=(const VersionData &vd) const { return toUInt()>=vd.toUInt(); }
+  bool operator ==(const VersionData &vd) const { return toUInt()==vd.toUInt(); }
+  bool operator !=(const VersionData &vd) const { return toUInt()!=vd.toUInt(); }
+
+private:
+  bool    _valid;
+  uchar   _majorNum, _minorNum, _dotNum;
+  QString _sub;
+};
+
+#endif
diff --git a/src/common/global/Makefile.am b/src/common/global/Makefile.am
new file mode 100644
index 0000000..a94b45c
--- /dev/null
+++ b/src/common/global/Makefile.am
@@ -0,0 +1,8 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+SUBDIRS = svn_revision
+
+noinst_LTLIBRARIES = libglobal.la
+libglobal_la_SOURCES = about.cpp generic_config.cpp log.cpp pfile.cpp \
+	process.cpp progress_monitor.cpp purl.cpp xml_data_file.cpp
+libglobal_la_LDFLAGS = $(all_libraries)
diff --git a/src/common/global/about.cpp b/src/common/global/about.cpp
new file mode 100644
index 0000000..33bfae9
--- /dev/null
+++ b/src/common/global/about.cpp
@@ -0,0 +1,94 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "about.h"
+
+#if defined(Q_WS_WIN)
+#  define SVN_REVISION "windows"
+#else
+#  include "svn_revision/svn_revision.h"
+#endif
+
+//---------------------------------------------------------------------------
+const char * const Piklab::URLS[Nb_UrlTypes] = {
+  "http://piklab.sourceforge.net",
+  "http://piklab.sourceforge.net/wiki/index.php/FAQ",
+  "http://sourceforge.net/tracker/?func=add&group_id=138852&atid=743140"
+};
+
+//-----------------------------------------------------------------------------
+Piklab::OptionList::OptionList(const KCmdLineOptions *options)
+  : _options(0)
+{
+  for (uint i=0; options[i].name; i++) append(options[i]);
+}
+
+const KCmdLineOptions *Piklab::OptionList::ptr() const
+{
+  delete[] _options;
+  _options = new KCmdLineOptions[count()+1];
+  for (uint i=0; i<uint(count()); i++) {
+    _options[i] = *at(i);
+    Q_ASSERT( _options[i].name );
+  }
+  _options[count()].name = 0;
+  return _options;
+}
+
+//-----------------------------------------------------------------------------
+void Piklab::init(KAboutData *about, int argc, char **argv, bool gui, const KCmdLineOptions *options)
+{
+  Q_ASSERT(about);
+#if defined(NO_KDE)
+#  if defined(Q_OS_WIN)
+  printf("%s \"win32\": version %s\n", about->appName(), VERSION);
+#  else
+  printf("%s \"qt-only\": version %s (rev. %s)\n", about->appName(), VERSION, SVN_REVISION);
+#  endif
+  Q_UNUSED(gui);
+  Q_ASSERT( !gui );
+#else
+  printf("%s: version %s (rev. %s)\n", about->appName(), VERSION, SVN_REVISION);
+  if ( !gui ) KApplication::disableAutoDcopRegistration();
+#endif
+  KCmdLineArgs::init(argc, argv, about);
+  KCmdLineArgs::addCmdLineOptions(options);
+#if defined(NO_KDE)
+#  if QT_VERSION<0x040000
+  (void)new QApplication(argc, argv, QApplication::Tty);
+#  else
+  (void)new QCoreApplication(argc, argv);
+#  endif
+#else
+  (void)new KApplication(gui, gui);
+#endif
+}
+
+//---------------------------------------------------------------------------
+Piklab::AboutData::AboutData(const char *executable, const char *name,
+			     const char *description)
+  : KAboutData(executable, name, VERSION, description, KAboutData::License_GPL,
+               "(c) 2005-2007 Nicolas Hadacek\n(c) 2002-2005 Alain Gibaud\n(c) 2003-2004 Stephen Landamore\n(c) 2005 Lorenz Möenlechner and Matthias Kranz\n(c) 2001-2005 Craig Franklin",
+               0, URLS[Homepage], URLS[BugReport])
+{
+  addAuthor("Nicolas Hadacek", I18N_NOOP("Author and maintainer."), "hadacek@kde.org");
+  addAuthor("Alain Gibaud", I18N_NOOP("Original author of PiKdev."), "alain.gibaud@free.fr");
+  addAuthor("Stephen Landamore", I18N_NOOP("LPLAB author (original microchip programmer support)."), "webmaster@landamore.com");
+  addAuthor("Craig Franklin", I18N_NOOP("Author of gputils"), "craigfranklin@users.sourceforge.net");
+  addAuthor("Sébastien Laoût", I18N_NOOP("Author of likeback"), "slaout@linux62.org");
+
+  addCredit("Brian C. Lane", I18N_NOOP("Original code for direct programming."), 0);
+  addCredit("Manwlis \"Manos\" Giannos", I18N_NOOP("Direct programming for PIC18F devices."), "mgiannos2000@yahoo.gr");
+  addCredit("Sean A. Walberg", I18N_NOOP("Direct programming for 16F676/630."), "sean@ertw.com");
+  addCredit("Mirko Panciri", I18N_NOOP("Support for direct programmers with bidirectionnal buffers."), "mirko.panciri@adept.it");
+  addCredit("Keith Baker", I18N_NOOP("Direct programming for 16F73/74/76/77."), "susyzygy@pubnix.org" );
+  addCredit("Lorenz Möenlechner and Matthias Kranz", I18N_NOOP("USB support for ICD2 programmer."), "icd2linux@hcilab.org");
+  addCredit("Xiaofan Chen", I18N_NOOP("Test of PICkit2 and ICD2 programmer."), "xiaofanc@gmail.com");
+  addCredit("Homer Reid", I18N_NOOP("Direct programming for dsPICs is inspired from his program \"dspicprg\"."), "homer@homerreid.com");
+  addCredit("Frank Damgaard", I18N_NOOP("Direct programming for 24C EEPROM is inspired from his program \"prog84\"."), "frda@post3.tele.dk");
+}
diff --git a/src/common/global/about.h b/src/common/global/about.h
new file mode 100644
index 0000000..e20ee46
--- /dev/null
+++ b/src/common/global/about.h
@@ -0,0 +1,43 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef ABOUT_H
+#define ABOUT_H
+
+#include "global.h"
+
+namespace Piklab
+{
+//-----------------------------------------------------------------------------
+class OptionList : public QValueList<KCmdLineOptions>
+{
+public:
+  OptionList() : _options(0) {}
+  OptionList(const KCmdLineOptions *options);
+  virtual ~OptionList() { delete[] _options; }
+  const KCmdLineOptions *ptr() const;
+
+private:
+  mutable KCmdLineOptions *_options;
+};
+
+//---------------------------------------------------------------------------
+enum UrlType { Homepage = 0, Support, BugReport, Nb_UrlTypes };
+extern const char * const URLS[Nb_UrlTypes];
+extern void init(KAboutData *about, int argc, char **argv, bool gui, const KCmdLineOptions *options);
+
+//---------------------------------------------------------------------------
+class AboutData : public KAboutData
+{
+public:
+  AboutData(const char *executable, const char *name, const char *description);
+};
+
+} // namespace
+
+#endif
diff --git a/src/common/global/generic_config.cpp b/src/common/global/generic_config.cpp
new file mode 100644
index 0000000..841233b
--- /dev/null
+++ b/src/common/global/generic_config.cpp
@@ -0,0 +1,241 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "generic_config.h"
+
+#include "global.h"
+
+#if defined(NO_KDE)
+#  include <qsettings.h>
+class GenericConfigPrivate
+{
+public:
+  GenericConfigPrivate(const QString &group) { _settings.beginGroup("/piklab/" + group); }
+  QSettings _settings;
+};
+#else
+#  include <kapplication.h>
+#  include <kconfig.h>
+class GenericConfigPrivate
+{
+public:
+  GenericConfigPrivate(const QString &group) : _group(group) {}
+  ~GenericConfigPrivate() { kapp->config()->sync(); }
+  KConfig &config() {
+    KConfig *conf = kapp->config();
+    conf->setGroup(_group);
+    return *conf;
+ }
+
+private:
+  QString _group;
+};
+#endif
+
+GenericConfig::GenericConfig(const QString &group)
+  : _group(group)
+{
+  _d = new GenericConfigPrivate(group);
+}
+
+GenericConfig::~GenericConfig()
+{
+  delete _d;
+}
+
+void GenericConfig::rollback()
+{
+#if defined(NO_KDE)
+  qWarning("Config rollback not supported");
+#else
+  _d->config().rollback();
+#endif
+}
+
+QString GenericConfig::readEntry(const QString &key, const QString &def) const
+{
+#if defined(NO_KDE)
+#  if QT_VERSION<0x040000
+  return _d->_settings.readEntry(key, def);
+#  else
+  return _d->_settings.value(key, def).toString();
+#  endif
+#else
+  return _d->config().readEntry(key, def);
+#endif
+}
+void GenericConfig::writeEntry(const QString &key, const QString &value)
+{
+#if defined(NO_KDE)
+#  if QT_VERSION<0x040000
+  _d->_settings.writeEntry(key, value);
+#  else
+  _d->_settings.setValue(key, value);
+#  endif
+#else
+  _d->config().writeEntry(key, value);
+#endif
+}
+
+QStringList GenericConfig::readListEntry(const QString &key, const QStringList &defaultValues) const
+{
+#if defined(NO_KDE)
+#  if QT_VERSION<0x040000
+  if ( _d->_settings.readEntry(key).isNull() ) return defaultValues;
+  return _d->_settings.readListEntry(key);
+#  else
+  return _d->_settings.value(key, defaultValues).toStringList();
+#  endif
+#else
+  if ( !_d->config().hasKey(key) ) return defaultValues;
+  return _d->config().readListEntry(key);
+#endif
+}
+void GenericConfig::writeEntry(const QString &key, const QStringList &value)
+{
+#if defined(NO_KDE)
+#  if QT_VERSION<0x040000
+  _d->_settings.writeEntry(key, value);
+#  else
+  _d->_settings.setValue(key, value);
+#  endif
+#else
+  _d->config().writeEntry(key, value);
+#endif
+}
+
+QValueList<int> GenericConfig::readIntListEntry(const QString &key) const
+{
+#if defined(NO_KDE)
+  QValueList<int> ilist;
+  QStringList list = readListEntry(key, QStringList());
+  QStringList::const_iterator it;
+  for (it=list.begin(); it!=list.end(); ++it) {
+    bool ok;
+    int v = (*it).toInt(&ok);
+    if ( !ok ) return ilist;
+    ilist.append(v);
+  }
+  return ilist;
+#else
+  return _d->config().readIntListEntry(key);
+#endif
+}
+void GenericConfig::writeEntry(const QString &key, const QValueList<int> &value)
+{
+#if defined(NO_KDE)
+  QStringList list;
+  QValueList<int>::const_iterator it;
+  for (it=value.begin(); it!=value.end(); ++it) list.append(QString::number(*it));
+  writeEntry(key, list);
+#else
+  _d->config().writeEntry(key, value);
+#endif
+}
+
+QSize GenericConfig::readSizeEntry(const QString &key, const QSize *def) const
+{
+#if defined(NO_KDE)
+  QValueList<int> list = readIntListEntry(key);
+  if ( list.count()!=2 ) return *def;
+  return QSize(list[0], list[1]);
+#else
+  return _d->config().readSizeEntry(key, def);
+#endif
+}
+void GenericConfig::writeEntry(const QString &key, const QSize &value)
+{
+#if defined(NO_KDE)
+  QValueList<int> ilist;
+  ilist.append(value.width());
+  ilist.append(value.height());
+  writeEntry(key, ilist);
+#else
+  _d->config().writeEntry(key, value);
+#endif
+}
+
+bool GenericConfig::readBoolEntry(const QString &key, bool def) const
+{
+#if defined(NO_KDE)
+#  if QT_VERSION<0x040000
+  return _d->_settings.readBoolEntry(key, def);
+#  else
+  return _d->_settings.value(key, def).toBool();
+#  endif
+#else
+  return _d->config().readBoolEntry(key, def);
+#endif
+}
+void GenericConfig::writeEntry(const QString &key, bool value)
+{
+#if defined(NO_KDE)
+#  if QT_VERSION<0x040000
+  _d->_settings.writeEntry(key, value);
+#  else
+  _d->_settings.setValue(key, value);
+#  endif
+#else
+  _d->config().writeEntry(key, value);
+#endif
+}
+
+int GenericConfig::readIntEntry(const QString &key, int def) const
+{
+#if defined(NO_KDE)
+#  if QT_VERSION<0x040000
+  return _d->_settings.readNumEntry(key, def);
+#  else
+  return _d->_settings.value(key, def).toInt();
+#  endif
+#else
+  return _d->config().readNumEntry(key, def);
+#endif
+}
+void GenericConfig::writeEntry(const QString &key, int value)
+{
+#if defined(NO_KDE)
+#  if QT_VERSION<0x040000
+  _d->_settings.writeEntry(key, value);
+#  else
+  _d->_settings.setValue(key, value);
+#  endif
+#else
+  _d->config().writeEntry(key, value);
+#endif
+}
+
+void GenericConfig::deleteGroup(const QString &group)
+{
+#if defined(NO_KDE)
+  Q_UNUSED(group);
+  // #### cannot do that...
+#else
+  kapp->config()->deleteGroup(group);
+#endif
+}
+
+QVariant GenericConfig::readVariantEntry(const QString &key, const QVariant &defValue) const
+{
+  switch (defValue.type()) {
+    case QVariant::Bool: return QVariant(readBoolEntry(key, defValue.toBool()), 0);
+    case QVariant::UInt: return readUIntEntry(key, defValue.toUInt());
+    default: break;
+  }
+  Q_ASSERT(false);
+  return QVariant();
+}
+
+void GenericConfig::writeEntry(const QString &key, const QVariant &v)
+{
+  switch (v.type()) {
+    case QVariant::Bool: writeEntry(key, v.toBool()); break;
+    case QVariant::UInt: writeEntry(key, v.toUInt()); break;
+    default: Q_ASSERT(false); break;
+  }
+}
diff --git a/src/common/global/generic_config.h b/src/common/global/generic_config.h
new file mode 100644
index 0000000..70dfeaa
--- /dev/null
+++ b/src/common/global/generic_config.h
@@ -0,0 +1,84 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef GENERIC_CONFIG_H
+#define GENERIC_CONFIG_H
+
+#include <qvariant.h>
+#include <qsize.h>
+
+#include "global.h"
+#include "common/common/misc.h"
+
+class GenericConfigPrivate;
+
+class GenericConfig
+{
+public:
+  GenericConfig(const QString &group);
+  ~GenericConfig();
+  QString group() const { return _group; }
+  void rollback();
+
+  QString readEntry(const QString &key, const QString &def = QString::null) const;
+  void writeEntry(const QString &key, const QString &value);
+  void writeEntry(const QString &key, const QCString &value) { writeEntry(key, QString(value)); }
+  void writeEntry(const QString &key, const char *value) { writeEntry(key, QString(value)); }
+  QStringList readListEntry(const QString &key, const QStringList &defaultValues) const;
+  void writeEntry(const QString &key, const QStringList &value);
+  QValueList<int> readIntListEntry(const QString &key) const;
+  void writeEntry(const QString &key, const QValueList<int> &value);
+  QSize readSizeEntry(const QString &key, const QSize *def = 0) const;
+  void writeEntry(const QString &key, const QSize &value);
+  bool readBoolEntry(const QString &key, bool def) const;
+  void writeEntry(const QString &key, bool value);
+  int readIntEntry(const QString &key, int def = 0) const;
+  void writeEntry(const QString &key, int value);
+  uint readUIntEntry(const QString &key, uint def = 0) const { return qMax(0, readIntEntry(key, def)); }
+  void writeEntry(const QString &key, uint value) { writeEntry(key, int(value)); }
+  template <typename Enum>
+  Enum readEnumEntry(const QString &key, Enum def = Enum::Nb_Types) const { return Enum::fromKey(readEntry(key, def.key())); }
+  template <typename Enum>
+  void writeEnumEntry(const QString &key, Enum v) { writeEntry(key, v.key()); }
+  QVariant readVariantEntry(const QString &key, const QVariant &defValue) const;
+  void writeEntry(const QString &key, const QVariant &value);
+
+  static void deleteGroup(const QString &group);
+
+  struct ItemData {
+    const char *key, *label;
+    QVariant defValue;
+  };
+  template <typename Type>
+  QVariant readVariantEntry(Type type) const { return readVariantEntry(type.data().key, type.data().defValue); }
+  template <typename Type>
+  void writeVariantEntry(Type type, const QVariant &value) {
+    Q_ASSERT( value.type()==type.data().defValue.type() );
+    writeEntry(type.data().key, value);
+  }
+
+private:
+  QString _group;
+  GenericConfigPrivate *_d;
+};
+
+#define BEGIN_DECLARE_CONFIG(Type) \
+  BEGIN_DECLARE_ENUM(Type)
+
+#define END_DECLARE_CONFIG(Type, group) \
+  END_DECLARE_ENUM(Type, GenericConfig::ItemData) \
+  inline QVariant readConfigEntry(Type type) { \
+    GenericConfig config(group); \
+    return config.readVariantEntry<Type>(type); \
+  } \
+  inline void writeConfigEntry(Type type, const QVariant &v) { \
+    GenericConfig config(group); \
+    config.writeVariantEntry<Type>(type, v); \
+  }
+
+#endif
diff --git a/src/common/global/global.h b/src/common/global/global.h
new file mode 100644
index 0000000..72dab0e
--- /dev/null
+++ b/src/common/global/global.h
@@ -0,0 +1,61 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef GLOBAL_H
+#define GLOBAL_H
+
+#include <qglobal.h>
+
+#if QT_VERSION<0x040000
+#  include <qapplication.h>
+#  include <qvaluelist.h>
+#  include <qvaluevector.h>
+#  include <qmemarray.h>
+#  include "common/common/qflags.h"
+#  define qMax QMAX
+#  define qMin QMIN
+#  include <qurl.h>
+#  define Q3Url QUrl
+#  include <qguardedptr.h>
+#else
+#  include <qcoreapplication.h>
+#  include <Qt3Support/Q3ValueList>
+#  define QValueList Q3ValueList
+#  include <Qt3Support/Q3ValueVector>
+#  define QValueVector Q3ValueVector
+#  include <Qt3Support/Q3MemArray>
+#  define QMemArray Q3MemArray
+#  define qHeapSort qSort
+#  include <Qt3Support/Q3Url>
+#  include <Qt3Support/Q3MimeSourceFactory>
+#  define QMimeSourceFactory Q3MimeSourceFactory
+#  include <qpointer.h>
+#  define QGuardedPtr QPointer
+#endif
+
+#if defined(NO_KDE)
+#  include "qt_config.h"
+#  include "common/nokde/nokde_kurl.h"
+#  include "common/nokde/nokde_klocale.h"
+#  include "common/nokde/nokde_kaboutdata.h"
+#  include "common/nokde/nokde_kcmdlineargs.h"
+#else
+#  include "config.h"
+#  include <kapplication.h>
+#  include <klocale.h>
+#  include <kaboutdata.h>
+#  include <kcmdlineargs.h>
+#  include <ktempfile.h>
+#  include <kconfigbackend.h>
+#endif
+
+#if defined(Q_OS_WIN)
+#  include <windows.h>
+#endif
+
+#endif
diff --git a/src/common/global/global.pro b/src/common/global/global.pro
new file mode 100644
index 0000000..3756177
--- /dev/null
+++ b/src/common/global/global.pro
@@ -0,0 +1,8 @@
+STOPDIR = ../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = global
+HEADERS += about.h generic_config.h log.h process.h purl.h pfile.h progress_monitor.h
+SOURCES += about.cpp generic_config.cpp log.cpp process.cpp purl.cpp pfile.cpp progress_monitor.cpp
+
+unix:system(cd svn_revision && sh svn_revision.sh)
diff --git a/src/common/global/log.cpp b/src/common/global/log.cpp
new file mode 100644
index 0000000..cf85303
--- /dev/null
+++ b/src/common/global/log.cpp
@@ -0,0 +1,154 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "log.h"
+
+#include <qeventloop.h>
+#include "global.h"
+
+//-----------------------------------------------------------------------------
+const Log::LineType::Data Log::LineType::DATA[Nb_Types] = {
+  { 0, 0, "red",    false }, // error
+  { 0, 0, "red",    false }, // soft error
+  { 0, 0, "orange", false }, // warning
+  { 0, 0, "black",  false }, // normal
+  { 0, 0, "blue",   false }, // info
+  { 0, 0, "black",  true  }, // command
+};
+
+const Log::DebugLevel::Data Log::DebugLevel::DATA[Nb_Types] = {
+  { "quiet", I18N_NOOP("No debug message"),      0,           false },
+  { "debug", I18N_NOOP("Normal debug messages"), "darkGreen", false },
+  { "extra-debug", I18N_NOOP("Extra debug messages"),  "darkGreen", false },
+  { "max-debug", I18N_NOOP("Max debug messages"),    "darkGreen", false },
+  { "lowlevel-debug", I18N_NOOP("All debug messages"),    "darkGreen", false }
+};
+
+//-----------------------------------------------------------------------------
+Log::View::View()
+{
+  setDebugLevel(DebugLevel::Normal);
+  FOR_EACH(LineType, type) _modes[type.type()] = Show;
+}
+
+void Log::View::setDebugLevel(DebugLevel level)
+{
+  _debugLevel = level;
+}
+
+void Log::View::log(LineType type, const QString &text, Action action)
+{
+  if ( _modes[type.type()]==Show ) doLog(type, text, action);
+}
+
+void Log::View::log(DebugLevel level, const QString &text, Action action)
+{
+  Q_ASSERT( level!=DebugLevel::Quiet );
+  updateDebugLevel();
+  if ( level<=_debugLevel ) doLog(level, text, action);
+}
+
+void Log::View::logUserAbort()
+{
+  doLog(LineType::SoftError, i18n("Operation aborted by user."), Immediate);
+}
+
+//-----------------------------------------------------------------------------
+void Log::StringView::sorry(const QString &message, const QString &details)
+{
+  if ( details.isEmpty() ) _s += message;
+  else _s += message + ": " + details;
+}
+
+bool Log::StringView::askContinue(const QString &message)
+{
+  log(LineType::Warning, message, Immediate);
+  return false; // always fail
+}
+
+//-----------------------------------------------------------------------------
+Log::Base::Base(Base *parent)
+  : _parent(0), _data(0)
+{
+  setParent(parent);
+}
+
+void Log::Base::setParent(Base *parent)
+{
+  delete _data;
+  _parent = parent;
+  _data = (parent ? 0 : new LogData);
+}
+
+Log::Base::~Base()
+{
+  delete _data;
+}
+
+void Log::Base::setView(View *view)
+{
+  Q_ASSERT(_data);
+  _data->view = view;
+}
+
+void Log::Base::logUserAbort()
+{
+  if ( view() ) view()->logUserAbort();
+}
+
+void Log::Base::log(LineType type, const QString &message, Action action)
+{
+  if ( type==LineType::Error ) setError(message);
+  if ( view() ) view()->log(type, message, action);
+}
+
+void Log::Base::log(DebugLevel level, const QString &message, Action action)
+{
+  if ( view() ) view()->log(level, message, action);
+}
+
+void Log::Base::appendToLastLine(const QString &text)
+{
+  if ( view() ) view()->appendToLastLine(text);
+}
+
+void Log::Base::sorry(const QString &message, const QString &details)
+{
+  if ( view() ) view()->sorry(message, details);
+}
+
+bool Log::Base::askContinue(const QString &message)
+{
+  if ( view()==0 ) return false;
+  return view()->askContinue(message);
+}
+
+void Log::Base::clear()
+{
+  resetError();
+  if ( view() ) view()->clear();
+}
+
+//-----------------------------------------------------------------------------
+QString Log::KeyList::text() const
+{
+  QString text;
+  if ( !_title.isEmpty() ) text += _title + "\n";
+  uint nb = 0;
+  for (uint i=0; i<uint(_keys.count()); i++) nb = qMax(nb, uint(_keys[i].length()));
+  for (uint i=0; i<uint(_keys.count()); i++) text += " " + _keys[i].leftJustify(nb+2) + _labels[i] + "\n";
+  return text;
+}
+
+void Log::KeyList::display(Generic &log) const
+{
+  if ( !_title.isEmpty() ) log.log(Log::LineType::Normal, _title);
+  uint nb = 0;
+  for (uint i=0; i<uint(_keys.count()); i++) nb = qMax(nb, uint(_keys[i].length()));
+  for (uint i=0; i<uint(_keys.count()); i++) log.log(Log::LineType::Normal, " " + _keys[i].leftJustify(nb+2) + _labels[i]);
+}
diff --git a/src/common/global/log.h b/src/common/global/log.h
new file mode 100644
index 0000000..7383d57
--- /dev/null
+++ b/src/common/global/log.h
@@ -0,0 +1,134 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef LOG_H
+#define LOG_H
+
+#include <qstringlist.h>
+
+#include "common/common/key_enum.h"
+
+namespace Log
+{
+  // immediat visibily by calling processEvent... BEWARE of side effects
+  enum Action { Immediate, Delayed };
+  enum ShowMode { DontShow, Show };
+  struct LogData {
+    const char *key, *label, *color;
+    bool bold;
+  };
+  BEGIN_DECLARE_ENUM(DebugLevel)
+    Quiet = 0, Normal, Extra, Max, LowLevel
+  END_DECLARE_ENUM(DebugLevel, LogData)
+  BEGIN_DECLARE_ENUM(LineType)
+    Error = 0, SoftError, Warning, Normal, Information, Command
+  END_DECLARE_ENUM(LineType, LogData)
+
+//-----------------------------------------------------------------------------
+class Generic
+{
+public:
+  virtual ~Generic() {}
+  virtual void log(LineType type, const QString &text, Action action = Immediate) = 0;
+  virtual void log(DebugLevel level, const QString &text, Action action = Immediate) = 0;
+  virtual void appendToLastLine(const QString &text) = 0;
+  virtual void sorry(const QString &message, const QString &details) = 0;
+  virtual bool askContinue(const QString &message) = 0;
+  virtual void clear() = 0;
+  virtual void logUserAbort() = 0;
+};
+
+class View : public Generic
+{
+public:
+  View();
+  ShowMode showMode(LineType type) const { return _modes[type.type()]; }
+  void setShowMode(LineType type, ShowMode mode) { _modes[type.type()] = mode; }
+  void setDebugLevel(DebugLevel level);
+  virtual void log(LineType type, const QString &text, Action action = Immediate);
+  virtual void log(DebugLevel level, const QString &text, Action action = Immediate);
+  virtual void logUserAbort();
+
+protected:
+  ShowMode _modes[LineType::Nb_Types];
+  DebugLevel _debugLevel;
+
+  virtual void updateDebugLevel() {}
+  virtual void doLog(LineType type, const QString &text, Action action) = 0;
+  virtual void doLog(DebugLevel level, const QString &text, Action action) = 0;
+};
+
+//-----------------------------------------------------------------------------
+class StringView : public View
+{
+public:
+  StringView() {}
+  QString string() const { return _s; }
+  virtual void appendToLastLine(const QString &text) { _s += text; }
+  virtual void clear() { _s = QString::null; }
+  virtual void sorry(const QString &message, const QString &details);
+  virtual bool askContinue(const QString &message);
+
+private:
+  QString _s;
+
+  virtual void doLog(LineType, const QString &text, Action) { _s += text + "\n"; }
+  virtual void doLog(DebugLevel, const QString &text, Action) { _s += text + "\n"; }
+};
+
+//-----------------------------------------------------------------------------
+class Base : public Generic
+{
+public:
+  Base(Base *parent = 0);
+  virtual ~Base();
+  void setParent(Base *parent);
+  void setView(View *view);
+  View *view() { return logData()->view; }
+
+  virtual void log(LineType type, const QString &message, Action action = Immediate);
+  virtual void log(DebugLevel level, const QString &message, Action action = Immediate);
+  virtual void appendToLastLine(const QString &text);
+  void setError(const QString &error) { logData()->error = error; }
+  virtual bool hasError() const { return !logData()->error.isNull(); }
+  virtual QString error() const { return logData()->error; }
+  virtual void resetError() { logData()->error = QString::null; }
+  virtual void sorry(const QString &message, const QString &details = QString::null);
+  virtual bool askContinue(const QString &message);
+  virtual void clear();
+  void logUserAbort();
+
+protected:
+  Base *_parent;
+  class LogData {
+  public:
+    LogData() : view(0) {}
+    QString error;
+    View *view;
+  };
+  LogData *_data;
+  LogData *logData() { return _parent ? _parent->logData() : _data; }
+  const LogData *logData() const { return _parent ? _parent->logData() : _data; }
+};
+
+class KeyList {
+public:
+  KeyList(const QString &title = QString::null) : _title(title) {}
+  void setTitle(const QString &title) { _title = title; }
+  void append(const QString &key, const QString &label) { _keys += key; _labels += label; }
+  QString text() const;
+  void display(Generic &log) const;
+
+private:
+  QString     _title;
+  QStringList _keys, _labels;
+};
+
+} // namespace
+
+#endif
diff --git a/src/common/global/pfile.cpp b/src/common/global/pfile.cpp
new file mode 100644
index 0000000..71cee16
--- /dev/null
+++ b/src/common/global/pfile.cpp
@@ -0,0 +1,89 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pfile.h"
+
+#include <qfile.h>
+
+//-----------------------------------------------------------------------------
+PURL::FileBase::FileBase(Log::Generic &log, const QString &extension)
+  : _tmp(0), _file(0), _stream(0), _extension(extension), _log(log)
+{}
+
+PURL::FileBase::~FileBase()
+{
+  delete _stream;
+  delete _file;
+  delete _tmp;
+}
+
+const QFile *PURL::FileBase::qfile() const
+{
+  return (_tmp ? _tmp->file() : _file);
+}
+
+QFile *PURL::FileBase::qfile()
+{
+  return (_tmp ? _tmp->file() : _file);
+}
+
+void PURL::FileBase::flush()
+{
+  if ( qfile() ) qfile()->flush();
+}
+
+QTextStream &PURL::FileBase::stream()
+{
+  if ( _stream==0 ) _stream = new QTextStream(qfile());
+  return *_stream;
+}
+
+bool PURL::FileBase::hasError() const
+{
+  if ( qfile()==0 || !_error.isEmpty() ) return true;
+  return ( uint(qfile()->status())!=IO_Ok );
+}
+
+QString PURL::FileBase::errorString() const
+{
+  if ( _error.isEmpty() ) {
+    if ( qfile()==0 ) return i18n("File not open.");
+    else return qfile()->errorString();
+  }
+  return _error;
+}
+
+QStringList PURL::FileBase::readLines()
+{
+  QStringList lines;
+  for (;;) {
+    QString s = stream().readLine();
+    if ( s.isNull() ) break;
+    lines.append(s);
+  }
+  return lines;
+}
+
+QByteArray PURL::FileBase::readAll()
+{
+  if ( qfile() ) return qfile()->readAll();
+  return QByteArray();
+}
+
+//-----------------------------------------------------------------------------
+PURL::File::File(const Url &url, Log::Generic &log)
+  : FileBase(log, QString::null), _url(url)
+{
+  _file = new QFile;
+}
+
+void PURL::File::setUrl(const Url &url)
+{
+  close();
+  _url = url;
+}
diff --git a/src/common/global/pfile.h b/src/common/global/pfile.h
new file mode 100644
index 0000000..d0955e7
--- /dev/null
+++ b/src/common/global/pfile.h
@@ -0,0 +1,66 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PFILE_H
+#define PFILE_H
+
+#include <qtextstream.h>
+#include "purl.h"
+
+namespace PURL
+{
+//-----------------------------------------------------------------------------
+class FileBase
+{
+public:
+  FileBase(Log::Generic &log, const QString &extension);
+  ~FileBase();
+  QFile *qfile();
+  const QFile *qfile() const;
+  QTextStream &stream();
+  QString readText() { return stream().read(); }
+  QString readLine() { return stream().readLine(); }
+  QStringList readLines();
+  QByteArray readAll();
+  void appendText(const QString &text) { stream() << text; }
+  void flush();
+  bool hasError() const;
+  QString errorString() const;
+
+protected:
+  KTempFile    *_tmp;
+  QFile        *_file;
+  QTextStream  *_stream;
+  QString       _error, _extension;
+  Log::Generic &_log;
+
+private: // disable copy constructor and operator =
+  FileBase(const FileBase &base);
+  FileBase &operator =(const FileBase &base);
+};
+
+//-----------------------------------------------------------------------------
+class File : public FileBase
+{
+public:
+  File(const Url &url, Log::Generic &log);
+  ~File() { close(); }
+  void setUrl(const Url &url); // close file too
+  Url url() const { return _url; }
+  bool openForWrite();
+  bool openForRead();
+  bool close();
+  bool remove();
+
+private:
+  Url _url;
+};
+
+} // namespace
+
+#endif
diff --git a/src/common/global/process.cpp b/src/common/global/process.cpp
new file mode 100644
index 0000000..7659eea
--- /dev/null
+++ b/src/common/global/process.cpp
@@ -0,0 +1,193 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "process.h"
+
+#include <qdatetime.h>
+
+#if defined(NO_KDE)
+#  include "common/nokde/nokde_kprocess.h"
+#else
+#  include <kprocess.h>
+#endif
+#include "purl.h"
+#include "common/common/synchronous.h"
+
+//----------------------------------------------------------------------------
+Process::State Process::runSynchronously(Base &process, RunActions actions, uint timeout)
+{
+  Synchronous sync(timeout);
+  QObject::connect(&process, SIGNAL(done(int)), &sync, SLOT(done()));
+  QObject::connect(&process, SIGNAL(requestSynchronousStop()), &sync, SLOT(done()));
+  if ( (actions & Start) && !process.start(0) ) return process.state();
+  Q_ASSERT( process.isRunning() );
+  if ( !sync.enterLoop() ) process.timeoutSlot();
+  return process.state();
+}
+
+//----------------------------------------------------------------------------
+Process::Base::Base(QObject *parent, const char *name)
+  : QObject(parent, name), _state(Stopped)
+{
+  _process = new KProcess(this);
+  connect(_process, SIGNAL(processExited(KProcess *)), SLOT(exited()));
+  connect(_process, SIGNAL(receivedStdout(KProcess *, char *, int)), SLOT(receivedStdout(KProcess*, char *, int)));
+  connect(_process, SIGNAL(receivedStderr(KProcess *, char *, int)), SLOT(receivedStderr(KProcess*, char *, int)));
+  _timer = new QTimer(this);
+  connect(_timer, SIGNAL(timeout()), SLOT(timeoutSlot()));
+}
+
+Process::Base::~Base()
+{
+  _process->kill();
+}
+
+QStringList Process::Base::arguments() const
+{
+  if ( _process==0 ) return QStringList();
+#if defined(NO_KDE)
+  return _process->args();
+#else
+  QStringList list;
+  const QValueList<QCString> &args = _process->args();
+  for (uint i=0; i<args.count(); i++) list.append(args[i]);
+  return list;
+#endif
+}
+
+void Process::Base::setup(const QString &executable, const QStringList &options, bool withWine)
+{
+  _state = Stopped;
+  _timer->stop();
+  _process->clearArguments();
+  if (withWine) {
+    _process->setEnvironment("WINEDEBUG", "-all");
+    *_process << QString("wine");
+  }
+  *_process << executable;
+  *_process << options;
+}
+
+bool Process::Base::start(uint timeout)
+{
+  _state = Stopped;
+  _timer->stop();
+  _stdout = QString::null;
+  _stderr = QString::null;
+#if defined(NO_KDE)
+  if ( !_process->start() ) {
+#else
+  if ( !_process->start(KProcess::NotifyOnExit, KProcess::All) ) {
+#endif
+    _state = StartFailed;
+    return false;
+  }
+  _state = Running;
+  if (timeout) _timer->start(timeout);
+  return true;
+}
+
+void Process::Base::timeoutSlot()
+{
+  _state = Timedout;
+  _process->kill();
+  emit timeout();
+}
+
+int Process::Base::exitCode() const
+{
+  return _process->exitStatus();
+}
+
+void Process::Base::exited()
+{
+  _state = Exited;
+  _timer->stop();
+  emit done(exitCode());
+}
+
+bool Process::Base::isRunning() const
+{
+  return _process->isRunning();
+}
+
+void Process::Base::writeToStdin(const QString &s)
+{
+  QCString cs = s.latin1();
+  _process->writeStdin(cs.data(), cs.length());
+}
+
+bool Process::Base::signal(int n)
+{
+  return _process->kill(n);
+}
+
+void Process::Base::setWorkingDirectory(const PURL::Directory &dir)
+{
+  _process->setWorkingDirectory(dir.path());
+}
+
+void Process::Base::setUseShell(bool useShell)
+{
+  _process->setUseShell(useShell);
+}
+
+bool Process::Base::isFilteredLine(const QString &line)
+{
+  // "wine" returns all those "libGL warning" that mess up the output...
+  return line.startsWith("libGL warning");
+}
+
+//----------------------------------------------------------------------------
+void Process::StringOutput::receivedStdout(KProcess*, char *data, int len)
+{
+  _stdout += QString::fromLatin1(data, len);
+  emit stdoutDataReceived();
+}
+
+void Process::StringOutput::receivedStderr(KProcess*, char *data, int len)
+{
+  _stderr += QString::fromLatin1(data, len);
+  emit stderrDataReceived();
+}
+
+//----------------------------------------------------------------------------
+void Process::LineBase::receivedStdout(KProcess*, char *data, int len)
+{
+  for (uint i=0; i<uint(len); i++) {
+    if ( data[i]=='\r' ) continue;
+    if ( data[i]=='\n' ) {
+      if ( !isFilteredLine(_stdout) ) addStdoutLine(_stdout);
+      _stdout = QString::null;
+    } else _stdout += QString::fromLatin1(data + i, 1);
+  }
+  if ( !_process->isRunning() && !isFilteredLine(_stdout) ) addStdoutLine(_stdout);
+  emit stdoutDataReceived();
+}
+
+void Process::LineBase::receivedStderr(KProcess*, char *data, int len)
+{
+  for (uint i=0; i<uint(len); i++) {
+    if ( data[i]=='\r' ) continue;
+    if ( data[i]=='\n' ) {
+      if ( !isFilteredLine(_stderr) ) addStderrLine(_stderr);
+      _stderr = QString::null;
+    } else _stderr += QString::fromLatin1(data + i, 1);
+  }
+  if ( !_process->isRunning() && !isFilteredLine(_stderr) ) addStderrLine(_stderr);
+  emit stderrDataReceived();
+}
+
+//----------------------------------------------------------------------------
+bool Process::LineOutput::start(uint timeout)
+{
+  _stdoutLines.clear();
+  _stderrLines.clear();
+  return Process::LineBase::start(timeout);
+}
+
diff --git a/src/common/global/process.h b/src/common/global/process.h
new file mode 100644
index 0000000..9c67149
--- /dev/null
+++ b/src/common/global/process.h
@@ -0,0 +1,138 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PROCESS_H
+#define PROCESS_H
+
+#include <signal.h>
+#include <qstringlist.h>
+#include <qobject.h>
+#include <qtimer.h>
+class KProcess;
+
+#include "global.h"
+namespace PURL { class Directory; }
+
+namespace Process
+{
+enum State { Stopped, StartFailed, Running, Exited, Timedout };
+class Base;
+enum RunAction { NoRunAction = 0, Start = 1 };
+Q_DECLARE_FLAGS(RunActions, RunAction)
+Q_DECLARE_OPERATORS_FOR_FLAGS(RunActions)
+extern State runSynchronously(Base &process, RunActions actions, uint timeout); // in ms (0 == no timeout)
+
+//----------------------------------------------------------------------------
+class Base : public QObject
+{
+Q_OBJECT
+public:
+  Base(QObject *parent, const char *name);
+  virtual ~Base();
+  void setup(const QString &executable, const QStringList &options, bool withWine);
+  QStringList arguments() const;
+  void setWorkingDirectory(const PURL::Directory &dir);
+  void setUseShell(bool useShell);
+  virtual bool start(uint timeout); // in ms (0 == no timeout)
+  QString prettyCommand() const { return arguments().join(" "); }
+  void writeToStdin(const QString &s);
+  bool signal(int n);
+  bool isRunning() const;
+  State state() const { return _state; }
+  int exitCode() const;
+
+signals:
+  void requestSynchronousStop();
+  void done(int code);
+  void timeout();
+  void stdoutDataReceived();
+  void stderrDataReceived();
+
+protected slots:
+  void exited();
+  void timeoutSlot();
+  virtual void receivedStdout(KProcess*, char *buffer, int len) = 0;
+  virtual void receivedStderr(KProcess*, char *buffer, int len) = 0;
+
+  friend State runSynchronously(Base &, RunActions, uint);
+
+protected:
+  State     _state;
+  KProcess *_process;
+  QTimer   *_timer;
+  QString   _stdout, _stderr;
+
+  static bool isFilteredLine(const QString &line);
+};
+
+//----------------------------------------------------------------------------
+class StringOutput : public Base
+{
+Q_OBJECT
+public:
+  StringOutput(QObject *parent = 0, const char *name = 0) : Base(parent, name) {}
+  QString sout() const { return _stdout; }
+  QString serr() const { return _stderr; }
+
+private slots:
+  virtual void receivedStdout(KProcess *, char *buffer, int len);
+  virtual void receivedStderr(KProcess *, char *buffer, int len);
+};
+
+//----------------------------------------------------------------------------
+class LineBase : public Base
+{
+Q_OBJECT
+public:
+  LineBase(QObject *parent = 0, const char *name = 0) : Base(parent, name) {}
+
+private slots:
+  virtual void receivedStdout(KProcess *, char *buffer, int len);
+  virtual void receivedStderr(KProcess *, char *buffer, int len);
+
+private:
+  virtual void addStdoutLine(const QString &line) = 0;
+  virtual void addStderrLine(const QString &line) = 0;
+};
+
+//----------------------------------------------------------------------------
+class LineOutput : public LineBase
+{
+Q_OBJECT
+public:
+  LineOutput(QObject *parent = 0, const char *name = 0) : LineBase(parent, name) {}
+  virtual bool start(uint timeout);
+  QStringList sout() const { return _stdoutLines; }
+  QStringList serr() const { return _stderrLines; }
+
+protected:
+  QStringList _stdoutLines, _stderrLines;
+
+  virtual void addStdoutLine(const QString &line) { _stdoutLines += line; }
+  virtual void addStderrLine(const QString &line) { _stderrLines += line; }
+};
+
+//----------------------------------------------------------------------------
+class LineSignal : public LineBase
+{
+Q_OBJECT
+public:
+  LineSignal(QObject *parent = 0, const char *name = 0) : LineBase(parent, name) {}
+
+signals:
+  void logStdoutLine(const QString &line);
+  void logStderrLine(const QString &line);
+
+private:
+  virtual void addStdoutLine(const QString &line) { emit logStdoutLine(line); }
+  virtual void addStderrLine(const QString &line) { emit logStderrLine(line); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/common/global/progress_monitor.cpp b/src/common/global/progress_monitor.cpp
new file mode 100644
index 0000000..fcd0cec
--- /dev/null
+++ b/src/common/global/progress_monitor.cpp
@@ -0,0 +1,84 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "progress_monitor.h"
+
+ProgressMonitor::ProgressMonitor(QObject* parent)
+  : QObject(parent, "progress_monitor")
+{
+  _current = _tasks.end();
+}
+
+void ProgressMonitor::clear()
+{
+  _tasks.clear();
+  _current = _tasks.end();
+  emit showProgress(false);
+}
+
+void ProgressMonitor::appendTask(const QString &label, uint nbSteps)
+{
+  Task task;
+  task.label = label;
+  task.nbSteps = nbSteps;
+  task.nbDoneSteps = 0;
+  _tasks.append(task);
+}
+
+void ProgressMonitor::insertTask(const QString &label, uint nbSteps)
+{
+  Task task;
+  task.label = label;
+  task.nbSteps = nbSteps;
+  task.nbDoneSteps = 0;
+  if ( _current==_tasks.end() ) _current = _tasks.prepend(task);
+  else _current = _tasks.insert(_current, task);
+  update();
+}
+
+uint ProgressMonitor::nbSteps() const
+{
+  uint nb = 0;
+  for (uint i=0; i<uint(_tasks.count()); i++) nb += _tasks[i].nbSteps;
+  return nb;
+}
+
+uint ProgressMonitor::nbDoneSteps() const
+{
+  uint nb = 0;
+  for (uint i=0; i<uint(_tasks.count()); i++) nb += _tasks[i].nbDoneSteps;
+  return nb;
+}
+
+void ProgressMonitor::update()
+{
+  QString label = (_current==_tasks.end() ? QString::null : (*_current).label);
+  emit setLabel(label);
+  emit setTotalProgress(nbSteps());
+  emit setProgress(nbDoneSteps());
+  emit showProgress(true);
+}
+
+void ProgressMonitor::startNextTask()
+{
+  if ( _current==_tasks.end() ) _current = _tasks.begin();
+  else ++_current;
+  Q_ASSERT( _current!=_tasks.end() ) ;
+  update();
+}
+
+void ProgressMonitor::addTaskProgress(uint nbSteps)
+{
+  Q_ASSERT( _current!=_tasks.end() ) ;
+  if ( _current==_tasks.end() ) return;
+  uint nb = (*_current).nbDoneSteps + nbSteps;
+  Q_ASSERT( nb<=(*_current).nbSteps );
+  if ( nb>(*_current).nbSteps ) qDebug("%s %i+%i > %i", (*_current).label.latin1(), (*_current).nbDoneSteps, nbSteps, (*_current).nbSteps);
+  (*_current).nbDoneSteps = QMIN(nb, (*_current).nbSteps);
+  update();
+}
diff --git a/src/common/global/progress_monitor.h b/src/common/global/progress_monitor.h
new file mode 100644
index 0000000..bb905f7
--- /dev/null
+++ b/src/common/global/progress_monitor.h
@@ -0,0 +1,46 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PROGRESS_MONITOR_H
+#define PROGRESS_MONITOR_H
+
+#include "global.h"
+
+class ProgressMonitor : public QObject
+{
+Q_OBJECT
+public:
+  ProgressMonitor(QObject *parent = 0);
+  void clear();
+  void appendTask(const QString &label, uint nbSteps);
+  void insertTask(const QString &label, uint nbSteps);
+  void startNextTask();
+  void addTaskProgress(uint nbSteps);
+  uint nbSteps() const;
+  uint nbDoneSteps() const;
+
+public slots:
+  void update();
+
+signals:
+  void showProgress(bool show);
+  void setLabel(const QString &label);
+  void setTotalProgress(uint nbSteps);
+  void setProgress(uint nbSteps);
+
+private:
+  class Task {
+  public:
+    QString label;
+    uint nbSteps, nbDoneSteps;
+  };
+  QValueList<Task> _tasks;
+  QValueList<Task>::iterator _current;
+};
+
+#endif
diff --git a/src/common/global/purl.cpp b/src/common/global/purl.cpp
new file mode 100644
index 0000000..6db2914
--- /dev/null
+++ b/src/common/global/purl.cpp
@@ -0,0 +1,428 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "purl.h"
+
+#include <qfileinfo.h>
+#include <qdatetime.h>
+#include <qdir.h>
+#include <qregexp.h>
+#include <qmap.h>
+#if QT_VERSION<0x040000
+#  include <qnetwork.h>
+#endif
+
+#include "common/common/synchronous.h"
+#include "process.h"
+
+#if !defined(NO_KDE)
+# include <kio/netaccess.h>
+# include <kfileitem.h>
+# include <kconfigbackend.h>
+#endif
+
+//-----------------------------------------------------------------------------
+PURL::Http::Http(const QString &hostname)
+  : QHttp(hostname)
+{
+  connect(this, SIGNAL(responseHeaderReceived(const QHttpResponseHeader &)),
+          SLOT(responseHeaderReceivedSlot(const QHttpResponseHeader &)));
+}
+
+//-----------------------------------------------------------------------------
+class PURL::Private
+{
+public:
+  QString convertWindowsFilepath(const QString &filepath);
+
+private:
+  QMap<char, QString>    _winDrives;  // drive -> unix path
+  QMap<QString, QString> _winPaths;   // windows path -> unix path
+
+  QString getWindowsDrivePath(char drive);
+  bool checkCachedPath(QString &filepath) const;
+  QString cachePath(const QString &origin, const QString &filepath);
+  QString convertWindowsShortFilepath(const QString &filepath);
+  QString findName(const QString &path, const QString &name);
+  static QString findName(const QString &filepath);
+};
+
+QString PURL::Private::getWindowsDrivePath(char drive)
+{
+#if defined(Q_OS_UNIX)
+  if ( !_winDrives.contains(drive) ) {
+    QStringList args;
+    args += "-u";
+    QString s;
+    s += drive;
+    args += s + ":\\";
+    ::Process::StringOutput process;
+    process.setup("winepath", args, false);
+    ::Process::State state = ::Process::runSynchronously(process, ::Process::Start, 3000);
+    if ( state!=::Process::Exited ) qWarning("Error running \"winepath\" with \"%s\" (%i)", args.join(" ").latin1(), state);
+    s = process.sout() + process.serr();
+    QDir dir(s.stripWhiteSpace());
+    _winDrives[drive] = dir.canonicalPath();
+  }
+  return _winDrives[drive];
+#else
+  return QString("%1:\\").arg(drive);
+#endif
+}
+
+bool PURL::Private::checkCachedPath(QString &filepath) const
+{
+  if ( !_winPaths.contains(filepath) ) return false;
+  filepath = _winPaths[filepath];
+  return true;
+}
+
+QString PURL::Private::cachePath(const QString &origin, const QString &filepath)
+{
+  _winPaths[origin] = filepath;
+  return filepath;
+}
+
+QString PURL::Private::convertWindowsFilepath(const QString &filepath)
+{
+  // appears to be an absolute windows path
+  if ( filepath[0]=='\\' ) {
+    QString tmp = filepath;
+    if ( checkCachedPath(tmp) ) return tmp;
+    return cachePath(filepath, convertWindowsShortFilepath(tmp.replace('\\', "/")));
+  }
+  // appears to be a windows path with a drive
+  if ( (filepath.length()>=2 && filepath[0].isLetter() && filepath[1]==':') ) {
+    QString tmp = filepath;
+    if ( checkCachedPath(tmp) ) return tmp;
+#if QT_VERSION<0x040000
+    tmp = getWindowsDrivePath(filepath[0]) + tmp.mid(2).replace('\\', "/");
+#else
+    tmp = getWindowsDrivePath(filepath[0].toLatin1()) + tmp.mid(2).replace('\\', "/");
+#endif
+    return cachePath(filepath, convertWindowsShortFilepath(tmp));
+  }
+  return filepath;
+}
+
+QString PURL::Private::findName(const QString &path, const QString &name)
+{
+  QString filepath = path + '/' + name;
+  if ( checkCachedPath(filepath) ) return filepath;
+  return cachePath(filepath, findName(filepath));
+}
+
+QString PURL::Private::findName(const QString &filepath)
+{
+  QFileInfo finfo(filepath);
+  if ( finfo.exists() || !finfo.dir().exists() ) return finfo.filePath();
+  QStringList list = finfo.dir().entryList(QDir::All, QDir::Name);
+  // find if name is just in a different case
+  for (uint j=0; j<uint(list.count()); j++) {
+    if ( list[j].lower()!=finfo.fileName().lower() ) continue;
+    return finfo.dirPath() + '/' + list[j];
+  }
+  // find if name is a shorted filename
+  QRegExp rexp("([^~]+)~(\\d+).*");
+  if ( !rexp.exactMatch(finfo.fileName()) ) return finfo.filePath();
+  QString start = rexp.cap(1).lower();
+  uint index = rexp.cap(2).toUInt();
+  uint k = 0;
+  for (uint j = 0; j<uint(list.count()); j++) {
+    if ( !list[j].lower().startsWith(start) ) continue;
+    k++;
+    if ( k==index ) return finfo.dirPath() + '/' + list[j];
+  }
+  return finfo.filePath();
+}
+
+QString PURL::Private::convertWindowsShortFilepath(const QString &filepath)
+{
+  // apparently "winepath" cannot do that for us and it is a real pain too...
+  // we assume filepath is an absolute unix path
+  // first see if we know the dirpath
+  QFileInfo finfo(filepath);
+  QString path = finfo.dirPath();
+  if ( checkCachedPath(path) ) return findName(path, finfo.fileName());
+
+  // otherwise go down the path
+  QStringList names = QStringList::split('/', filepath);
+  QString tmp;
+  for (uint i=0; i<uint(names.count()); i++)
+    tmp = findName(tmp, names[i]);
+  if ( filepath.endsWith("/") ) tmp += "/";
+  return tmp;
+}
+
+//-----------------------------------------------------------------------------
+PURL::Private *PURL::Base::_private = 0;
+
+PURL::Base::Base(const QString &filepath)
+  : _relative(true)
+{
+  if ( !filepath.isEmpty() ) {
+    if ( _private==0 ) _private = new Private;
+#if defined(Q_OS_UNIX)
+    QString tmp = _private->convertWindowsFilepath(filepath);
+#else
+    QString tmp = filepath;
+#endif
+    if ( tmp.startsWith("~") ) tmp = QDir::homeDirPath() + tmp.mid(1);
+    _relative = Q3Url::isRelativeUrl(tmp);
+#if defined(Q_OS_UNIX)
+    if ( !tmp.startsWith("/") ) tmp = '/' + tmp;
+#endif
+#if defined(NO_KDE)
+    _url.setPath(tmp);
+#else
+    _url = KURL::fromPathOrURL(tmp);
+#endif
+    _url.cleanPath();
+  }
+}
+
+PURL::Base::Base(const KURL &url)
+  : _relative(false), _url(url)
+{
+  _url.cleanPath();
+}
+
+bool PURL::Base::isLocal() const
+{
+  return ( _url.protocol().isEmpty() || _url.protocol()=="file" );
+}
+
+bool PURL::Base::operator ==(const Base &url) const
+{
+  if ( _url.isEmpty() ) return url._url.isEmpty();
+  return _url==url._url;
+}
+
+QString PURL::Base::path(SeparatorType type) const
+{
+#if defined(NO_KDE)
+  QString s = _url.dirPath();
+  if ( !s.isEmpty() && !s.endsWith("/") ) s += '/';
+#else
+  QString s = _url.directory(false, false);
+#endif
+  if ( type==WindowsSeparator ) {
+    for (uint i=0; i<uint(s.length()); i++)
+      if ( s[i]=='/' ) s[i] = '\\';
+  }
+  return s;
+}
+
+QString PURL::Base::unterminatedPath(SeparatorType type) const
+{
+#if defined(NO_KDE)
+  QString s = _url.dirPath();
+  if ( s.endsWith("/") ) s = s.mid(0, s.length()-1);
+#else
+  QString s = _url.directory(true, false);
+#endif
+  if ( type==WindowsSeparator ) {
+    for (uint i=0; i<uint(s.length()); i++)
+      if ( s[i]=='/' ) s[i] = '\\';
+  }
+  return s;
+}
+
+QString PURL::Base::pretty() const
+{
+#if defined(NO_KDE)
+  QString s = _url.toString();
+  if ( s.startsWith("://") ) return s.mid(3);
+  return s;
+#else
+  return _url.prettyURL(0, KURL::StripFileProtocol);
+#endif
+}
+
+PURL::Directory PURL::Base::directory() const
+{
+  return Directory(path());
+}
+
+bool PURL::Base::isInto(const Directory &dir) const
+{
+  return path().startsWith(dir.path());
+}
+
+bool PURL::Base::httpUrlExists(bool *ok) const
+{
+#if QT_VERSION<0x040000
+  qInitNetworkProtocols();
+#endif
+  if (ok) *ok = false;
+  Http http(_url.host());
+  Synchronous sync(500);
+  QObject::connect(&http, SIGNAL(done(bool)), &sync, SLOT(done()));
+  QFileInfo info(_url.fileName(false));
+  http.head(_url.path());
+  if ( !sync.enterLoop() ) return false; // timeout
+  if ( http.error()!=QHttp::NoError ) return false;
+  if (ok ) *ok = true;
+  return ( http._header.statusCode()==200 );
+}
+
+bool PURL::Base::exists(QDateTime *lastModified) const
+{
+  if ( isEmpty() ) return false;
+  if ( isLocal() ) {
+    QFileInfo fi(_url.path());
+    if (lastModified) *lastModified = fi.lastModified();
+    return fi.exists();
+  }
+  if ( _url.protocol()=="http" ) return httpUrlExists();
+#if !defined(NO_KDE)
+  if (lastModified) {
+    KIO::UDSEntry uds;
+    if ( !KIO::NetAccess::stat(_url, uds, qApp->mainWidget()) ) return false;
+    KFileItem item(uds, _url);
+    lastModified->setTime_t(item.time(KIO::UDS_MODIFICATION_TIME));
+    return true;
+  } else {
+    // assume file exists if ioslave cannot tell...
+    return KIO::NetAccess::exists(_url, true, qApp->mainWidget());
+  }
+#else
+  if (lastModified) lastModified->setTime_t(0);
+  // assume file exists
+  return true;
+#endif
+}
+
+//----------------------------------------------------------------------------
+PURL::Url PURL::Url::fromPathOrUrl(const QString &s)
+{
+  KURL kurl = KURL::fromPathOrURL(s);
+  if ( !kurl.protocol().isEmpty() && kurl.protocol()!="file" && kurl.protocol().length()!=1 ) return kurl;
+  return Url(s.startsWith("file://") ? s.mid(7) : s);
+}
+
+PURL::Url::Url(const Directory &dir, const QString &filename, FileType type)
+  : Base(dir.path() + '/' + addExtension(filename, type))
+{}
+
+PURL::Url::Url(const Directory &dir, const QString &filepath)
+  : Base(dir.path() + '/' + filepath)
+{}
+
+PURL::FileType PURL::Url::fileType() const
+{
+  QFileInfo info(filename());
+  FOR_EACH(FileType, type)
+    for (uint i=0; type.data().extensions[i]; i++)
+      if ( info.extension(false).lower()==type.data().extensions[i] ) return type;
+  return Unknown;
+}
+
+QString PURL::Url::basename() const
+{
+  QFileInfo info(_url.fileName(false));
+  return info.baseName(true);
+}
+
+QString PURL::Url::filename() const
+{
+  QFileInfo info(_url.fileName(false));
+  return info.fileName();
+}
+
+QString PURL::Url::filepath(SeparatorType type) const
+{
+  return path(type) + filename();
+}
+
+PURL::Url PURL::Url::toExtension(const QString &extension) const
+{
+  QFileInfo info(filename());
+  return Url(directory().path() + info.baseName(true) + '.' + extension);
+}
+
+PURL::Url PURL::Url::appendExtension(const QString &extension) const
+{
+  QFileInfo info(filename());
+  return Url(directory().path() + info.fileName() + '.' + extension);
+}
+
+QString PURL::Url::relativeTo(const Directory &dir, SeparatorType type) const
+{
+  QString s = filepath(type);
+  if ( !isInto(dir) ) return s;
+  return s.right(s.length() - dir.path(type).length());
+}
+
+PURL::Url PURL::Url::toAbsolute(const Directory &dir) const
+{
+  if ( isRelative() ) return Url(dir, filepath());
+  return *this;
+}
+
+bool PURL::findExistingUrl(Url &url)
+{
+  if ( url.exists() ) return true;
+  QFileInfo info(url.filename());
+  Url tmp = url.toExtension(info.extension(false).upper());
+  if ( !tmp.exists() ) {
+    tmp = url.toExtension(info.extension(false).lower());
+    if ( !tmp.exists() ) return false;
+  }
+  url = tmp;
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+#if !defined(NO_KDE)
+PURL::UrlList::UrlList(const KURL::List &list)
+{
+  KURL::List::const_iterator it;
+  for (it=list.begin(); it!=list.end(); ++it) append(*it);
+}
+#endif
+
+//-----------------------------------------------------------------------------
+PURL::Directory::Directory(const QString &path)
+  : Base(path.isEmpty() ? QString::null : path + '/')
+{}
+
+PURL::Directory PURL::Directory::up() const
+{
+  QDir dir(path());
+  dir.cdUp();
+  return PURL::Directory(dir.path());
+}
+
+PURL::Directory PURL::Directory::down(const QString &subPath) const
+{
+  Q_ASSERT( QDir::isRelativePath(subPath) );
+  QDir dir(path());
+  dir.cd(subPath);
+  return PURL::Directory(dir.path());
+}
+
+QStringList PURL::Directory::files(const QString &filter) const
+{
+  QDir dir(path());
+  return dir.entryList(filter, QDir::Files);
+}
+
+PURL::Url PURL::Directory::findMatchingFilename(const QString &filename) const
+{
+  QDir dir(path());
+  QStringList files = dir.entryList(QDir::Files);
+  for (uint i=0; i<uint(files.count()); i++)
+    if ( files[i].lower()==filename.lower() ) return Url(*this, files[i]);
+  return Url(*this, filename);
+}
+
+PURL::Directory PURL::Directory::current()
+{
+  return QDir::currentDirPath();
+}
diff --git a/src/common/global/purl.h b/src/common/global/purl.h
new file mode 100644
index 0000000..6cbf38b
--- /dev/null
+++ b/src/common/global/purl.h
@@ -0,0 +1,136 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PURL_H
+#define PURL_H
+
+#include "common/global/global.h"
+#if QT_VERSION<0x040000
+#  include <qhttp.h>
+#else
+#  include <QtNetwork/QHttp>
+#  include <QDateTime>
+#endif
+#include "common/global/log.h"
+#include "common/common/purl_base.h"
+
+namespace PURL
+{
+//----------------------------------------------------------------------------
+class Http : public QHttp
+{
+Q_OBJECT
+public:
+  Http(const QString &hostname);
+  QHttpResponseHeader _header;
+
+private slots:
+  void responseHeaderReceivedSlot(const QHttpResponseHeader &rh) { _header = rh; }
+};
+
+class Url;
+class Directory;
+class Private;
+
+enum SeparatorType { UnixSeparator, WindowsSeparator };
+
+//----------------------------------------------------------------------------
+class Base
+{
+public:
+  Base(const QString &filepath = QString::null);
+  Base(const KURL &url);
+  bool operator <(const Base &url) const { return _url<url._url; }
+  bool operator ==(const Base &url) const;
+  bool operator !=(const Base &url) const { return !(_url==url._url); }
+  const KURL &kurl() const { return _url; }
+  QString pretty() const;
+  bool isEmpty() const { return _url.isEmpty(); }
+  bool isLocal() const;
+  QString path(SeparatorType type = UnixSeparator) const;             // with ending '/' unless empty path
+  QString unterminatedPath(SeparatorType type = UnixSeparator) const; // no ending '/'
+  Directory directory() const;
+  bool isInto(const Directory &dir) const;
+  bool isRelative() const { return _relative; }
+  bool exists(QDateTime *lastModified = 0) const;
+
+protected:
+  bool _relative;
+  KURL _url;
+  static Private *_private;
+
+private:
+  bool httpUrlExists(bool *ok = 0) const;
+};
+
+//----------------------------------------------------------------------------
+class Url : public Base
+{
+public:
+  Url() {}
+  Url(const KURL &url) : Base(url) {}
+  // add correct extension if filename has no extension
+  Url(const Directory &path, const QString &filename, FileType type);
+  Url(const Directory &path, const QString &filepath);
+  static Url fromPathOrUrl(const QString &s);
+
+  Url toFileType(FileType type) const { return toExtension(type.data().extensions[0]); }
+  Url toExtension(const QString &extension) const;
+  Url appendExtension(const QString &extension) const;
+
+  const FileType::Data &data() const { return fileType().data(); }
+  FileType fileType() const;
+  QString basename() const; // filename without extension
+  QString filename() const; // filename without path
+  QString filepath(SeparatorType type = UnixSeparator) const; // filename with path
+  QString relativeTo(const Directory &dir, SeparatorType type = UnixSeparator) const;
+  Url toAbsolute(const Directory &dir) const;
+#if !defined(NO_KDE)
+  bool isDosFile() const;
+  bool create(Log::Generic &log) const; // do not overwrite
+  bool write(const QString &text, Log::Generic &log) const;
+  bool copyTo(const Url &destination, Log::Generic &log) const; // do not overwrite
+  bool del(Log::Generic &log) const;
+#endif
+
+private:
+  Url(const QString &filepath) : Base(filepath) {}
+};
+
+extern bool findExistingUrl(Url &url); // may transform extension's case if needed
+
+//----------------------------------------------------------------------------
+class UrlList : public QValueList<Url>
+{
+public:
+  UrlList() {}
+  UrlList(const Url &url) { append(url); }
+  UrlList(const QValueList<Url> &list) : QValueList<Url>(list) {}
+#if !defined(NO_KDE)
+  UrlList(const KURL::List &list);
+#endif
+};
+
+//----------------------------------------------------------------------------
+class Directory : public Base
+{
+public:
+  Directory(const QString &path = QString::null);
+  QStringList files(const QString &filter) const;
+  Url findMatchingFilename(const QString &filename) const;
+  Directory up() const;
+  Directory down(const QString &path) const;
+  static Directory current();
+#if !defined(NO_KDE)
+  bool create(Log::Generic &log) const;
+#endif
+};
+
+} // namespace
+
+#endif
diff --git a/src/common/global/svn_revision/Makefile.am b/src/common/global/svn_revision/Makefile.am
new file mode 100644
index 0000000..f3d4ee4
--- /dev/null
+++ b/src/common/global/svn_revision/Makefile.am
@@ -0,0 +1,5 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+all-local:
+	sh svn_revision.sh
diff --git a/src/common/global/svn_revision/svn_revision.sh b/src/common/global/svn_revision/svn_revision.sh
new file mode 100755
index 0000000..3590568
--- /dev/null
+++ b/src/common/global/svn_revision/svn_revision.sh
@@ -0,0 +1,20 @@
+if [ -d .svn ]; then
+  ( echo '// generated file';
+  printf '#define SVN_REVISION "';
+  (svnversion -n .);
+  echo '"' ) > svn_revision.h.new;
+  if [ ! -f svn_revision.h ]; then
+    mv -f svn_revision.h.new svn_revision.h;
+  else
+    if cmp svn_revision.h svn_revision.h.new; then
+      rm -f svn_revision.h.new;
+    else
+      mv -f svn_revision.h.new svn_revision.h;
+    fi
+  fi
+fi
+if [ ! -f svn_revision.h ]; then
+  ( echo '// generated file';
+    echo '#define SVN_REVISION "distribution"'; ) > svn_revision.h;
+fi
+
diff --git a/src/common/global/xml_data_file.cpp b/src/common/global/xml_data_file.cpp
new file mode 100644
index 0000000..2464b34
--- /dev/null
+++ b/src/common/global/xml_data_file.cpp
@@ -0,0 +1,160 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "xml_data_file.h"
+
+#include <qfile.h>
+#include <qstringlist.h>
+#include <ksimpleconfig.h>
+#include <klocale.h>
+#include "common/global/pfile.h"
+
+XmlDataFile::XmlDataFile(const PURL::Url &url, const QString &name)
+  : _url(url), _name(name), _document(name)
+{
+  QDomElement root = _document.createElement(name);
+  _document.appendChild(root);
+}
+
+bool XmlDataFile::load(QString &error)
+{
+  Log::StringView sview;
+  PURL::File file(_url, sview);
+  if ( !file.openForRead() ) {
+    error = i18n("Error opening file: %1").arg(sview.string());
+    return false;
+  }
+  if ( !_document.setContent(file.qfile(), false, &error) ) return false;
+  if ( _document.doctype().name()!=_name
+       || _document.documentElement().nodeName()!=_name ) {
+    error = i18n("File is not of correct type.");
+    return false;
+  }
+  return true;
+}
+
+bool XmlDataFile::save(QString &error) const
+{
+  Log::StringView sview;
+  PURL::File file(_url, sview);
+  bool ok = file.openForWrite();
+  if (ok) {
+    QString s = _document.toString(2);
+    file.appendText(s);
+    ok = file.close();
+  }
+  if ( !ok ) error = i18n("Error saving file: %1").arg(sview.string());
+  return ok;
+}
+
+QDomElement XmlDataFile::findChildElement(QDomElement parent, const QString &name) const
+{
+  QDomNodeList list = parent.elementsByTagName(name);
+  return list.item(0).toElement();
+}
+
+QDomElement XmlDataFile::createChildElement(QDomElement parent, const QString &name)
+{
+  QDomNodeList list = parent.elementsByTagName(name);
+  if ( list.count()==0 ) {
+    QDomElement element = _document.createElement(name);
+    parent.appendChild(element);
+    return element;
+  }
+  return list.item(0).toElement();
+}
+
+void XmlDataFile::removeChilds(QDomNode parent) const
+{
+  QDomNodeList list = parent.childNodes();
+  for (uint i=0; i<list.count(); i++)
+    parent.removeChild(list.item(i));
+}
+
+QString XmlDataFile::value(const QString &group, const QString &key, const QString &defValue) const
+{
+  QDomElement root = _document.documentElement();
+  QDomElement groupElement = findChildElement(root, group);
+  if ( groupElement.isNull() ) return defValue;
+  QDomElement element = findChildElement(groupElement, key);
+  if ( element.isNull() ) return defValue;
+  QDomText text = element.firstChild().toText();
+  if ( text.isNull() ) return defValue;
+  return text.data();
+}
+
+void XmlDataFile::setValue(const QString &group, const QString &key, const QString &value)
+{
+  QDomElement root = _document.documentElement();
+  QDomElement groupElement = createChildElement(root, group);
+  QDomElement element = createChildElement(groupElement, key);
+  removeChilds(element);
+  QDomText text = _document.createTextNode(value);
+  element.appendChild(text);
+}
+
+QStringList XmlDataFile::listValues(const QString &group, const QString &key, const QStringList &defaultValues) const
+{
+  QStringList list;
+  QDomElement root = _document.documentElement();
+  QDomElement groupElement = findChildElement(root, group);
+  if ( groupElement.isNull() ) return defaultValues;
+  QDomElement element = findChildElement(groupElement, key);
+  if ( element.isNull() ) return defaultValues;
+  QDomNodeList childs = element.childNodes();
+  if ( childs.count()==1 ) { // legacy compatibility
+    QDomText text = element.firstChild().toText();
+    if ( !text.isNull() ) return text.data();
+  }
+  for (uint i=0; i<childs.count(); i++) {
+    QDomText text = childs.item(i).toElement().firstChild().toText();
+    if ( text.isNull() ) continue;
+    list.append(text.data());
+  }
+  return list;
+}
+
+void XmlDataFile::appendListValue(const QString &group, const QString &key, const QString &value)
+{
+  QDomElement root = _document.documentElement();
+  QDomElement groupElement = createChildElement(root, group);
+  QDomElement element = createChildElement(groupElement, key);
+  QDomElement item = _document.createElement("item");
+  element.appendChild(item);
+  QDomText text = _document.createTextNode(value);
+  item.appendChild(text);
+}
+
+void XmlDataFile::removeListValue(const QString &group, const QString &key, const QString &value)
+{
+  QDomElement root = _document.documentElement();
+  QDomElement groupElement = createChildElement(root, group);
+  QDomElement element = createChildElement(groupElement, key);
+  QDomNodeList list = element.childNodes();
+  for (uint i=0; i<list.count(); i++) {
+    QDomElement item = list.item(i).toElement();
+    QDomText text = item.firstChild().toText();
+    if ( text.isNull() || text.data()!=value ) continue;
+    element.removeChild(item);
+    break;
+  }
+}
+
+void XmlDataFile::clearList(const QString &group, const QString &key)
+{
+  QDomElement root = _document.documentElement();
+  QDomElement groupElement = createChildElement(root, group);
+  QDomElement element = createChildElement(groupElement, key);
+  groupElement.removeChild(element);
+}
+
+void XmlDataFile::setListValues(const QString &group, const QString &key, const QStringList &values)
+{
+  clearList(group, key);
+  for (uint i=0; i<values.count(); i++) appendListValue(group, key, values[i]);
+}
diff --git a/src/common/global/xml_data_file.h b/src/common/global/xml_data_file.h
new file mode 100644
index 0000000..dfcbc73
--- /dev/null
+++ b/src/common/global/xml_data_file.h
@@ -0,0 +1,45 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef XML_DATA_FILE_H
+#define XML_DATA_FILE_H
+
+#include <qdom.h>
+
+#include "common/global/purl.h"
+
+class XmlDataFile
+{
+public:
+  XmlDataFile(const PURL::Url &url, const QString &name);
+  virtual ~XmlDataFile() {}
+  PURL::Url url() const { return _url; }
+  virtual bool load(QString &error);
+  bool save(QString &error) const;
+
+  QString value(const QString &group, const QString &key, const QString &defaultValue) const;
+  void setValue(const QString &group, const QString &key, const QString &value);
+  QStringList listValues(const QString &group, const QString &key, const QStringList &defaultValues) const;
+  void setListValues(const QString &group, const QString &key, const QStringList &values);
+  void appendListValue(const QString &group, const QString &key, const QString &value);
+  void removeListValue(const QString &group, const QString &key, const QString &value);
+  void clearList(const QString &group, const QString &key);
+
+protected:
+  PURL::Url _url;
+
+private:
+  QString      _name;
+  QDomDocument _document;
+
+  QDomElement findChildElement(QDomElement element, const QString &tag) const;
+  QDomElement createChildElement(QDomElement element, const QString &tag);
+  void removeChilds(QDomNode node) const;
+};
+
+#endif
diff --git a/src/common/gui/Makefile.am b/src/common/gui/Makefile.am
new file mode 100644
index 0000000..c4bb948
--- /dev/null
+++ b/src/common/gui/Makefile.am
@@ -0,0 +1,7 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+libcommonui_la_LDFLAGS = $(all_libraries)
+noinst_LTLIBRARIES = libcommonui.la
+libcommonui_la_SOURCES = container.cpp dialog.cpp editlistbox.cpp \
+	hexword_gui.cpp list_view.cpp misc_gui.cpp number_gui.cpp pfile_ext.cpp purl_ext.cpp \
+	purl_gui.cpp list_container.cpp
diff --git a/src/common/gui/config_widget.h b/src/common/gui/config_widget.h
new file mode 100644
index 0000000..abfafab
--- /dev/null
+++ b/src/common/gui/config_widget.h
@@ -0,0 +1,107 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2004 Alain Gibaud <alain.gibaud@free.fr>                *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef CONFIG_WIDGET_H
+#define CONFIG_WIDGET_H
+
+#include <qpixmap.h>
+#include <qcheckbox.h>
+#include <qvaluevector.h>
+#include <qvariant.h>
+
+#include "container.h"
+
+//-----------------------------------------------------------------------------
+class ConfigWidget : public Container
+{
+Q_OBJECT
+public:
+  ConfigWidget(QWidget *parent = 0) : Container(parent) {}
+  virtual QString title() const { return QString::null; }
+  virtual QString header() const { return QString::null; }
+  virtual QPixmap pixmap() const { return QPixmap(); }
+
+public slots:
+  virtual void loadConfig() = 0;
+  virtual void saveConfig() = 0;
+};
+
+//-----------------------------------------------------------------------------
+template <typename Type>
+class BaseConfigWidget
+{
+public:
+  BaseConfigWidget(ConfigWidget *widget) {
+    _widgets.resize(Type::Nb_Types);
+    for(Type type; type<Type::Nb_Types; ++type) _widgets[type.type()] = createWidget(type, widget);
+  }
+  void loadConfig() {
+    for(Type type; type<Type::Nb_Types; ++type) load(type, _widgets[type.type()]);
+  }
+  void saveConfig() {
+    for(Type type; type<Type::Nb_Types; ++type) save(type, _widgets[type.type()]);
+  }
+  void setDefault() {
+    for(Type type; type<Type::Nb_Types; ++type) setDefault(type, _widgets[type.type()]);
+  }
+
+private:
+  QValueVector<QWidget *> _widgets;
+
+  static QWidget *createWidget(Type type, ConfigWidget *widget) {
+    QWidget *w = 0;
+    uint row = widget->numRows();
+    switch (type.data().defValue.type()) {
+      case QVariant::Bool:
+        w = new QCheckBox(type.label(), widget);
+        widget->addWidget(w, row,row, 0,1);
+        break;
+      default: Q_ASSERT(false); break;
+    }
+    return w;
+  }
+  void load(Type type, QWidget *widget) const {
+    switch (type.data().defValue.type()) {
+      case QVariant::Bool:
+        static_cast<QCheckBox *>(widget)->setChecked(readConfigEntry(type).toBool());
+        break;
+      default: Q_ASSERT(false); break;
+    }
+  }
+  void save(Type type, QWidget *widget) {
+    switch (type.data().defValue.type()) {
+      case QVariant::Bool:
+        writeConfigEntry(type, QVariant(static_cast<QCheckBox *>(widget)->isChecked(), 0));
+        break;
+      default: Q_ASSERT(false); break;
+    }
+  }
+  void setDefault(Type type, QWidget *widget) const {
+    switch (type.data().defValue.type()) {
+      case QVariant::Bool:
+        static_cast<QCheckBox *>(widget)->setChecked(type.data().defValue.toBool());
+        break;
+      default: Q_ASSERT(false); break;
+    }
+  }
+};
+
+//-----------------------------------------------------------------------------
+#define BEGIN_DECLARE_CONFIG_WIDGET(ConfigType, ConfigWidgetType) \
+class ConfigWidgetType : public ::ConfigWidget, public BaseConfigWidget<ConfigType> \
+{ \
+public: \
+  ConfigWidgetType() : BaseConfigWidget<ConfigType>(this) {} \
+  virtual void loadConfig() { BaseConfigWidget<ConfigType>::loadConfig(); } \
+  virtual void saveConfig() { BaseConfigWidget<ConfigType>::saveConfig(); } \
+
+#define END_DECLARE_CONFIG_WIDGET \
+};
+
+#endif
diff --git a/src/common/gui/container.cpp b/src/common/gui/container.cpp
new file mode 100644
index 0000000..881e265
--- /dev/null
+++ b/src/common/gui/container.cpp
@@ -0,0 +1,80 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "container.h"
+
+#include "misc_gui.h"
+
+//----------------------------------------------------------------------------
+Container::Container(QWidget *parent, Type type)
+  : QFrame(parent), _type(type)
+{
+  initLayout();
+}
+
+Container::Container(QWidgetStack *stack, uint index, Type type)
+  : QFrame(stack), _type(type)
+{
+  initLayout();
+  stack->addWidget(this, index);
+}
+
+Container::Container(QTabWidget *tabw, const QString &title, Type type)
+  : QFrame(tabw), _type(type)
+{
+  initLayout();
+  tabw->addTab(this, title);
+}
+
+void Container::setFrame(Type type)
+{
+  _type = type;
+  switch (type) {
+  case Flat:
+    setMargin(parent() && parent()->inherits("QTabWidget") ? 10 : 0);
+    setFrameStyle(QFrame::NoFrame);
+    break;
+  case Sunken:
+    setMargin(10);
+    setFrameStyle(QFrame::StyledPanel | QFrame::Sunken);
+    break;
+  }
+}
+
+void Container::initLayout()
+{
+  _topLayout = new QGridLayout(this, 1, 1, 0, 10);
+  _gridLayout = new QGridLayout(1, 1, 10);
+  _topLayout->addLayout(_gridLayout, 0, 0);
+  _topLayout->setRowStretch(1, 1);
+  setFrame(_type);
+}
+
+void Container::addWidget(QWidget *w, uint startRow, uint endRow, uint startCol, uint endCol, int alignment)
+{
+  Q_ASSERT( startRow<=endRow );
+  Q_ASSERT( startCol<=endCol );
+  w->show();
+  _gridLayout->addMultiCellWidget(w, startRow, endRow, startCol, endCol, alignment);
+}
+
+void Container::addLayout(QLayout *l, uint startRow, uint endRow, uint startCol, uint endCol, int alignment)
+{
+  Q_ASSERT( startRow<=endRow );
+  Q_ASSERT( startCol<=endCol );
+  _gridLayout->addMultiCellLayout(l, startRow, endRow, startCol, endCol, alignment);
+}
+
+//----------------------------------------------------------------------------
+ButtonContainer::ButtonContainer(const QString &title, QWidget *parent)
+  : Container(parent, Sunken)
+{
+  _button = new PopupButton(title, this);
+  addWidget(_button, 0,0, 0,1);
+  setColStretch(2, 1);
+}
diff --git a/src/common/gui/container.h b/src/common/gui/container.h
new file mode 100644
index 0000000..d718c6f
--- /dev/null
+++ b/src/common/gui/container.h
@@ -0,0 +1,58 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef CONTAINER_H
+#define CONTAINER_H
+
+#include <qframe.h>
+#include <qwidgetstack.h>
+#include <qtabwidget.h>
+#include <qlayout.h>
+
+class PopupButton;
+
+//----------------------------------------------------------------------------
+class Container : public QFrame
+{
+Q_OBJECT
+public:
+  enum Type { Flat, Sunken };
+  Container(QWidget *parent = 0, Type type = Flat);
+  Container(QWidgetStack *stack, uint index, Type type = Flat);
+  Container(QTabWidget *tabw, const QString &title, Type type = Flat);
+  void addWidget(QWidget *widget, uint startRow, uint endRow, uint startCol, uint endCol, int alignment = 0);
+  void addLayout(QLayout *layout, uint startRow, uint endRow, uint startCol, uint endCol, int alignment = 0);
+  uint numRows() const { return _gridLayout->numRows(); }
+  uint numCols() const { return _gridLayout->numCols(); }
+  void setFrame(Type type);
+  void setMargin(uint margin) { _topLayout->setMargin(margin); }
+  void setRowSpacing(uint row, uint spacing) { _gridLayout->setRowSpacing(row, spacing); }
+  void setColSpacing(uint col, uint spacing) { _gridLayout->setColSpacing(col, spacing); }
+  void setRowStretch(uint row, uint stretch) { _gridLayout->setRowStretch(row, stretch); }
+  void setColStretch(uint col, uint stretch) { _gridLayout->setColStretch(col, stretch); }
+
+private:
+  Type         _type;
+  QGridLayout *_topLayout, *_gridLayout;
+
+  void initLayout();
+};
+
+//----------------------------------------------------------------------------
+class ButtonContainer : public Container
+{
+Q_OBJECT
+public:
+  ButtonContainer(const QString &title, QWidget *parent);
+  PopupButton &button() { return *_button; }
+
+private:
+  PopupButton *_button;
+};
+
+#endif
diff --git a/src/common/gui/dialog.cpp b/src/common/gui/dialog.cpp
new file mode 100644
index 0000000..650b086
--- /dev/null
+++ b/src/common/gui/dialog.cpp
@@ -0,0 +1,199 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "dialog.h"
+
+#include <qheader.h>
+#include <qtimer.h>
+#include <qlabel.h>
+#include <qwidgetstack.h>
+#include <ktextedit.h>
+
+#include "misc_gui.h"
+
+//-----------------------------------------------------------------------------
+Dialog::Dialog(QWidget *parent, const char *name, bool modal,
+               const QString &caption, int buttonMask, ButtonCode defaultButton,
+               bool separator, const QSize &defaultSize)
+  : KDialogBase(parent, name, modal, caption, buttonMask, defaultButton, separator),
+    _defaultSize(defaultSize)
+{
+  BusyCursor::start();
+  Q_ASSERT(name);
+  QWidget *main = new QWidget(this);
+  setMainWidget(main);
+
+  QTimer::singleShot(0, this, SLOT(updateSize()));
+}
+
+Dialog::Dialog(DialogType type, const QString &caption, int buttonMask, ButtonCode defaultButton,
+               QWidget *parent, const char *name, bool modal, bool separator, const QSize &defaultSize)
+  : KDialogBase(type, caption, buttonMask, defaultButton, parent, name, modal, separator),
+    _defaultSize(defaultSize)
+{
+  BusyCursor::start();
+  Q_ASSERT(name);
+  QTimer::singleShot(0, this, SLOT(updateSize()));
+}
+
+Dialog::~Dialog()
+{
+  GuiConfig gc;
+  gc.writeEntry(QString(name()) + "_size", size());
+}
+
+void Dialog::updateSize()
+{
+  GuiConfig gc;
+  resize(gc.readSizeEntry(QString(name()) + "_size", &_defaultSize));
+  BusyCursor::stop();
+}
+
+//-----------------------------------------------------------------------------
+TreeListDialog::Item::Item(const QString &label, QWidget *page, const QString &title, QListView *listview)
+  : KListViewItem(listview, label), _page(page), _title(title)
+{}
+TreeListDialog::Item::Item(const QString &label, QWidget *page, const QString &title, QListViewItem *item)
+  : KListViewItem(item, label), _page(page), _title(title)
+{}
+
+TreeListDialog::TreeListDialog(QWidget *parent, const char *name, bool modal,
+                               const QString &caption, int buttonMask, ButtonCode defaultButton,
+                               bool separator)
+  : Dialog(parent, name, modal, caption, buttonMask, defaultButton, separator)
+{
+  QVBoxLayout *top = new QVBoxLayout(mainWidget(), 0, 10);
+
+  // list view
+  QValueList<int> widths;
+  widths += 80;
+  widths += 500;
+  Splitter *splitter = new Splitter(widths, Horizontal, mainWidget(), name);
+  top->addWidget(splitter);
+  _listView = new KListView(splitter);
+  connect(_listView, SIGNAL(currentChanged(QListViewItem *)), SLOT(currentChanged(QListViewItem *)));
+  _listView->setAllColumnsShowFocus(true);
+  _listView->setRootIsDecorated(true);
+  _listView->setSorting(0);
+  _listView->addColumn(QString::null);
+  _listView->header()->hide();
+  _listView->setResizeMode(QListView::LastColumn);
+
+  // pages
+  _frame = new QFrame(splitter);
+  QVBoxLayout *vbox = new QVBoxLayout(_frame, 10, 10);
+  _titleBox = new QHBoxLayout(vbox);
+  _label = new QLabel(_frame);
+  _titleBox->addWidget(_label);
+  _stack = new QWidgetStack(_frame);
+  connect(_stack, SIGNAL(aboutToShow(QWidget *)), SIGNAL(aboutToShowPage(QWidget *)));
+  vbox->addWidget(_stack);
+  vbox->addStretch(1);
+}
+
+QWidget *TreeListDialog::addPage(const QStringList &labels)
+{
+  Q_ASSERT( !labels.isEmpty() );
+
+  QWidget *page = 0;
+  QListViewItem *item = 0;
+  QListViewItemIterator it(_listView);
+  for (; it.current(); ++it) {
+    if ( it.current()->text(0)==labels[0] ) {
+      item = it.current();
+      break;
+    }
+  }
+  if ( item==0 ) {
+    page = new QWidget(_stack);
+    connect(page, SIGNAL(destroyed(QObject *)), SLOT(pageDestroyed(QObject *)));
+    _stack->addWidget(page);
+    item = new Item(labels[0], page, labels[0], _listView);
+    item->setOpen(true);
+    bool last = ( labels.count()==1 );
+    item->setSelectable(last);
+  }
+  for (uint i=1; i<labels.count(); i++) {
+    QListViewItem *parent = item;
+    item = 0;
+    QListViewItemIterator iti(parent);
+    for (; it.current(); ++it) {
+      if ( it.current()->text(0)==labels[i] ) {
+        item = it.current();
+        break;
+      }
+    }
+    if ( item==0 ) {
+      page = new QWidget(_stack);
+      connect(page, SIGNAL(destroyed(QObject *)), SLOT(pageDestroyed(QObject *)));
+      _stack->addWidget(page);
+      item = new Item(labels[i], page, labels[i], parent);
+      item->setOpen(true);
+      bool last = ( labels.count()==i+1 );
+      item->setSelectable(last);
+    }
+  }
+
+  return page;
+}
+
+void TreeListDialog::currentChanged(QListViewItem *lvitem)
+{
+  if ( lvitem==0 ) return;
+  Item *item = static_cast<Item *>(lvitem);
+  _listView->ensureItemVisible(item);
+  _label->setText(item->_title);
+  _stack->raiseWidget(item->_page);
+}
+
+void TreeListDialog::showPage(QWidget *page)
+{
+  QListViewItemIterator it(_listView);
+  for (; it.current(); ++it) {
+    Item *item = static_cast<Item *>(it.current());
+    if ( item->_page==page ) {
+      _listView->setCurrentItem(item);
+      currentChanged(item);
+      break;
+    }
+  }
+}
+
+int TreeListDialog::pageIndex(QWidget *page) const
+{
+  return _stack->id(page);
+}
+
+int TreeListDialog::activePageIndex() const
+{
+  const Item *item = static_cast<const Item *>(_listView->currentItem());
+  if ( item==0 ) return -1;
+  return pageIndex(item->_page);
+}
+
+void TreeListDialog::pageDestroyed(QObject *object)
+{
+  QListViewItemIterator it(_listView);
+  for (; it.current(); ++it) {
+    Item *item = static_cast<Item *>(it.current());
+    if ( item->_page!=object ) continue;
+    delete item;
+    break;
+  }
+}
+
+//-----------------------------------------------------------------------------
+TextEditorDialog::TextEditorDialog(const QString &text, const QString &caption,
+                                   bool wrapAtWidgetWidth, QWidget *parent)
+  : Dialog(parent, "text_editor_dialog", true, caption, Close, Close, false, QSize(200, 100))
+{
+  KTextEdit *w = new KTextEdit(text, QString::null, this);
+  w->setReadOnly(true);
+  w->setWordWrap(wrapAtWidgetWidth ? QTextEdit::WidgetWidth : QTextEdit::NoWrap);
+  setMainWidget(w);
+}
diff --git a/src/common/gui/dialog.h b/src/common/gui/dialog.h
new file mode 100644
index 0000000..1227a7d
--- /dev/null
+++ b/src/common/gui/dialog.h
@@ -0,0 +1,77 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DIALOG_H
+#define DIALOG_H
+
+#include <qlayout.h>
+#include <kdialogbase.h>
+#include <klistview.h>
+
+//-----------------------------------------------------------------------------
+class Dialog : public KDialogBase
+{
+Q_OBJECT
+public:
+  Dialog(QWidget *parent, const char *name, bool modal,
+         const QString &caption, int buttonMask, ButtonCode defaultButton, bool separator,
+         const QSize &defaultSize = QSize());
+  Dialog(DialogType type, const QString &caption,
+         int buttonMask, ButtonCode defaultButton, QWidget *parent, const char *name,
+         bool modal, bool separator, const QSize &defaultSize = QSize());
+  virtual ~Dialog();
+
+private slots:
+  void updateSize();
+
+private:
+  QSize _defaultSize;
+};
+
+//-----------------------------------------------------------------------------
+class TreeListDialog : public Dialog
+{
+Q_OBJECT
+public:
+  TreeListDialog(QWidget *parent, const char *name, bool modal,
+                 const QString &caption, int buttonMask, ButtonCode defaultButton, bool separator);
+  QWidget *addPage(const QStringList &labels);
+  void showPage(QWidget *page);
+  int activePageIndex() const;
+  int pageIndex(QWidget *page) const;
+
+protected slots:
+  virtual void currentChanged(QListViewItem *item);
+  void pageDestroyed(QObject *page);
+
+protected:
+  QFrame       *_frame;
+  KListView    *_listView;
+  QHBoxLayout  *_titleBox;
+  QLabel       *_label;
+  QWidgetStack *_stack;
+
+ class Item : public KListViewItem {
+  public:
+    Item(const QString &label, QWidget *page, const QString &title, QListView *listview);
+    Item(const QString &label, QWidget *page, const QString &title, QListViewItem *item);
+    QWidget *_page;
+    QString  _title;
+  };
+};
+
+//-----------------------------------------------------------------------------
+class TextEditorDialog : public Dialog
+{
+Q_OBJECT
+public:
+  TextEditorDialog(const QString &text, const QString &caption,
+                   bool wrapAtWidgetWidth, QWidget *parent);
+};
+
+#endif
diff --git a/src/common/gui/editlistbox.cpp b/src/common/gui/editlistbox.cpp
new file mode 100644
index 0000000..1d2916d
--- /dev/null
+++ b/src/common/gui/editlistbox.cpp
@@ -0,0 +1,340 @@
+/* Copyright (C) 2000 David Faure <faure@kde.org>, Alexander Neundorf <neundorf@kde.org>
+                 2000, 2002 Carsten Pfeiffer <pfeiffer@kde.org>
+   Copyright (C) 2006-2007 Nicolas Hadacek <hadacek@kde.org>
+
+   This library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Library General Public
+   License as published by the Free Software Foundation; either
+   version 2 of the License, or (at your option) any later version.
+
+   This library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Library General Public License for more details.
+
+   You should have received a copy of the GNU Library General Public License
+   along with this library; see the file COPYING.LIB.  If not, write to
+   the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+   Boston, MA 02110-1301, USA.
+*/
+#include "editlistbox.h"
+
+#include <qstringlist.h>
+#include <qlabel.h>
+#include <qheader.h>
+
+#include <kdialog.h>
+#include <klocale.h>
+#include <kapplication.h>
+#include <knotifyclient.h>
+#include <kiconloader.h>
+#include <kstdguiitem.h>
+
+EditListBox::EditListBox(uint nbColumns, QWidget *parent, const char *name, Mode mode, Buttons buttons)
+  : QFrame(parent, name), _mode(mode), _buttons(buttons)
+{
+  m_lineEdit = new KLineEdit;
+  init(nbColumns, m_lineEdit);
+}
+
+EditListBox::EditListBox(uint nbColumns, QWidget *view, KLineEdit *lineEdit, QWidget *parent, const char *name,
+                         Mode mode, Buttons buttons)
+  : QFrame(parent, name), _mode(mode), _buttons(buttons)
+{
+  m_lineEdit = lineEdit;
+  init(nbColumns, view);
+}
+
+void EditListBox::init(uint nbColumns, QWidget *view)
+{
+    _addButton = 0;
+    _removeButton = 0;
+    _moveUpButton = 0;
+    _moveDownButton = 0;
+    _removeAllButton = 0;
+    _resetButton = 0;
+    setSizePolicy(QSizePolicy(QSizePolicy::MinimumExpanding, QSizePolicy::MinimumExpanding));
+
+    QGridLayout *grid = new QGridLayout(this, 1, 1, 0, KDialog::spacingHint());
+    uint row = 0;
+    if (view) {
+      QHBoxLayout *hbox = new QHBoxLayout(KDialog::spacingHint());
+      grid->addMultiCellLayout(hbox, row,row, 0,1);
+      if (m_lineEdit) {
+	KIconLoader loader;
+	QIconSet iconset = loader.loadIcon("locationbar_erase", KIcon::Toolbar);
+	KPushButton *button = new  KPushButton(iconset, QString::null, this);
+	connect(button, SIGNAL(clicked()), SLOT(clearEdit()));
+	hbox->addWidget(button);
+      }
+      view->reparent( this, QPoint(0,0) );
+      hbox->addWidget(view);
+      row++;
+    }
+    _listView= new KListView(this);
+    for (uint i=0; i<nbColumns; i++) _listView->addColumn(QString::null);
+    _listView->header()->hide();
+    _listView->setSorting(-1);
+    _listView->setResizeMode(KListView::LastColumn);
+    _listView->setColumnWidthMode(nbColumns-1, KListView::Maximum);
+    grid->addWidget(_listView, row, 0);
+    QVBoxLayout *vbox = new QVBoxLayout(10);
+    grid->addLayout(vbox, row, 1);
+    _buttonsLayout = new QVBoxLayout(10);
+    vbox->addLayout(_buttonsLayout);
+    vbox->addStretch(1);
+
+    setButtons(_buttons);
+
+    if (m_lineEdit) {
+      connect(m_lineEdit,SIGNAL(textChanged(const QString&)),this,SLOT(typedSomething(const QString&)));
+      m_lineEdit->setTrapReturnKey(true);
+      connect(m_lineEdit,SIGNAL(returnPressed()),this,SLOT(addItem()));
+    }
+    connect(_listView, SIGNAL(selectionChanged()), SLOT(selectionChanged()));
+
+    // maybe supplied lineedit has some text already
+    typedSomething(m_lineEdit ? m_lineEdit->text() : QString::null);
+}
+
+void EditListBox::setButtons(Buttons buttons)
+{
+    _buttons = buttons;
+
+    delete _addButton;
+    _addButton = 0;
+    if ( buttons & Add ) {
+#if KDE_VERSION < KDE_MAKE_VERSION(3,4,0)
+        _addButton = new KPushButton(KGuiItem(i18n("Add"), "edit_add"), this);
+#else
+        _addButton = new KPushButton(KStdGuiItem::add(), this);
+#endif
+        _addButton->setEnabled(false);
+        _addButton->show();
+        connect(_addButton, SIGNAL(clicked()), SLOT(addItem()));
+        _buttonsLayout->addWidget(_addButton);
+    }
+
+    delete _removeButton;
+    _removeButton = 0;
+    if ( buttons & Remove ) {
+        _removeButton = new KPushButton(KGuiItem(i18n("Remove"), "clear"), this);
+        _removeButton->setEnabled(false);
+        _removeButton->show();
+        connect(_removeButton, SIGNAL(clicked()), SLOT(removeItem()));
+        _buttonsLayout->addWidget(_removeButton);
+    }
+
+    delete _removeAllButton;
+    _removeAllButton = 0;
+    if ( buttons & RemoveAll ) {
+        _removeAllButton = new KPushButton(KGuiItem(i18n("Remove All"), "delete"), this);
+        _removeAllButton->show();
+        connect(_removeAllButton, SIGNAL(clicked()), SLOT(clear()));
+        _buttonsLayout->addWidget(_removeAllButton);
+    }
+
+    delete _moveUpButton;
+    _moveUpButton = 0;
+    delete _moveDownButton;
+    _moveDownButton = 0;
+    if ( buttons & UpDown ) {
+        _moveUpButton = new KPushButton(KGuiItem(i18n("Move &Up"), "up"), this);
+        _moveUpButton->setEnabled(false);
+        _moveUpButton->show();
+        connect(_moveUpButton, SIGNAL(clicked()), SLOT(moveItemUp()));
+        _buttonsLayout->addWidget(_moveUpButton);
+        _moveDownButton = new KPushButton(KGuiItem(i18n("Move &Down"), "down"), this);
+        _moveDownButton->setEnabled(false);
+        _moveDownButton->show();
+        connect(_moveDownButton, SIGNAL(clicked()), SLOT(moveItemDown()));
+        _buttonsLayout->addWidget(_moveDownButton);
+    }
+
+    delete _resetButton;
+    _resetButton = 0;
+    if ( buttons & Reset ) {
+        _resetButton = new KPushButton(KStdGuiItem::reset(), this);
+        _resetButton->show();
+        connect(_resetButton, SIGNAL(clicked()), SIGNAL(reset()));
+        _buttonsLayout->addWidget(_resetButton);
+    }
+}
+
+void EditListBox::typedSomething(const QString& text)
+{
+  QListViewItem *item = _listView->selectedItem();
+  if (item) {
+    if( selectedText()!=text ) {
+      item->setText(textColumn(), text);
+      emit changed();
+    }
+  }
+  updateButtons();
+}
+
+void EditListBox::moveItemUp()
+{
+  QListViewItem *item = _listView->selectedItem();
+  if ( item==0 || item->itemAbove()==0 ) return;
+  item->itemAbove()->moveItem(item);
+  updateButtons();
+  emit changed();
+}
+
+void EditListBox::moveItemDown()
+{
+  QListViewItem *item = _listView->selectedItem();
+  if ( item==0 || item->itemBelow()==0 ) return;
+  item->moveItem(item->itemBelow());
+  updateButtons();
+  emit changed();
+}
+
+void EditListBox::addItem()
+{
+    // when m_checkAtEntering is true, the add-button is disabled, but this
+    // slot can still be called through Key_Return/Key_Enter. So we guard
+    // against this.
+    if ( !_addButton || !_addButton->isEnabled() || m_lineEdit==0 ) return;
+
+    addItem(m_lineEdit->text());
+}
+
+void EditListBox::addItem(const QString &text)
+{
+    bool alreadyInList(false);
+    //if we didn't check for dupes at the inserting we have to do it now
+    if ( _mode==DuplicatesDisallowed ) alreadyInList = _listView->findItem(text, textColumn());
+
+    if (m_lineEdit) {
+      bool block = m_lineEdit->signalsBlocked();
+      m_lineEdit->blockSignals(true);
+      m_lineEdit->clear();
+      m_lineEdit->blockSignals(block);
+    }
+    _listView->clearSelection();
+
+    if (!alreadyInList) {
+      QListViewItem *item = createItem();
+      item->setText(textColumn(), text);
+      if ( _listView->lastItem() ) item->moveItem(_listView->lastItem());
+      emit changed();
+      emit added(text);
+    }
+    updateButtons();
+}
+
+void EditListBox::clearEdit()
+{
+  _listView->clearSelection();
+  if (m_lineEdit) {
+    m_lineEdit->clear();
+    m_lineEdit->setFocus();
+  }
+  updateButtons();
+}
+
+void EditListBox::removeItem()
+{
+  QListViewItem *item = _listView->selectedItem();
+  if (item) {
+    QString text = item->text(textColumn());
+    delete item;
+    emit changed();
+    emit removed(text);
+    updateButtons();
+  }
+}
+
+void EditListBox::selectionChanged()
+{
+  if (m_lineEdit) m_lineEdit->setText(selectedText());
+  updateButtons();
+}
+
+void EditListBox::clear()
+{
+  _listView->clear();
+  if (m_lineEdit) {
+    m_lineEdit->clear();
+    m_lineEdit->setFocus();
+  }
+  updateButtons();
+  emit changed();
+}
+
+uint EditListBox::count() const
+{
+  uint nb = 0;
+  QListViewItemIterator it(_listView);
+  for (; it.current(); ++it) nb++;
+  return nb;
+}
+
+const QListViewItem *EditListBox::item(uint i) const
+{
+  uint k = 0;
+  QListViewItemIterator it(_listView);
+  for (; it.current(); ++it) {
+    if ( k==i ) return it.current();
+    k++;
+  }
+  return 0;
+}
+
+QStringList EditListBox::texts() const
+{
+  QStringList list;
+  QListViewItemIterator it(_listView);
+  for (; it.current(); ++it) list.append(it.current()->text(textColumn()));
+  return list;
+}
+
+void EditListBox::setTexts(const QStringList& items)
+{
+  _listView->clear();
+  for (int i=items.count()-1; i>=0; i--) {
+    QListViewItem *item = createItem();
+    item->setText(textColumn(), items[i]);
+  }
+  if (m_lineEdit) m_lineEdit->clear();
+  updateButtons();
+}
+
+void EditListBox::updateButtons()
+{
+  QListViewItem *item = _listView->selectedItem();
+  if (_addButton) {
+    if ( m_lineEdit==0 ) _addButton->setEnabled(true);
+    else {
+      QString text = m_lineEdit->text();
+      if ( _mode!=DuplicatesCheckedAtEntering ) _addButton->setEnabled(!text.isEmpty());
+      else if ( text.isEmpty() ) _addButton->setEnabled(false);
+      else _addButton->setEnabled(!_listView->findItem(text, textColumn()));
+    }
+  }
+  if (_removeButton) _removeButton->setEnabled(item);
+  if (_moveUpButton) _moveUpButton->setEnabled(item && item->itemAbove());
+  if (_moveDownButton) _moveDownButton->setEnabled(item && item->itemBelow());
+  if (_removeAllButton) _removeAllButton->setEnabled(_listView->firstChild());
+}
+
+void EditListBox::setEditText(const QString &text)
+{
+  _listView->clearSelection();
+  if (m_lineEdit) m_lineEdit->setText(text);
+  updateButtons();
+}
+
+QListViewItem *EditListBox::createItem()
+{
+  return new KListViewItem(_listView);
+}
+
+QString EditListBox::selectedText() const
+{
+  QListViewItem *item = _listView->selectedItem();
+  if ( item==0 ) return QString::null;
+  return item->text(textColumn());
+}
diff --git a/src/common/gui/editlistbox.h b/src/common/gui/editlistbox.h
new file mode 100644
index 0000000..c259278
--- /dev/null
+++ b/src/common/gui/editlistbox.h
@@ -0,0 +1,95 @@
+/*  Copyright (C) 2000 David Faure <faure@kde.org>, Alexander Neundorf <neundorf@kde.org>
+    Copyright (C) 2006-2007 Nicolas Hadacek <hadacek@kde.org>
+
+    This library is free software; you can redistribute it and/or
+    modify it under the terms of the GNU Library General Public
+    License as published by the Free Software Foundation; either
+    version 2 of the License, or (at your option) any later version.
+
+    This library is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    Library General Public License for more details.
+
+    You should have received a copy of the GNU Library General Public License
+    along with this library; see the file COPYING.LIB.  If not, write to
+    the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+    Boston, MA 02110-1301, USA.
+*/
+#ifndef EDITLISTBOX_H
+#define EDITLISTBOX_H
+
+#include <qlayout.h>
+#include <klineedit.h>
+#include <kpushbutton.h>
+#include <klistview.h>
+
+#include "common/common/qflags.h"
+
+//----------------------------------------------------------------------------
+// modified KEditListBox (beyond recognition)
+// * support for duplicated items
+// * use KStdGuiItem for buttons
+// * support for New, Clear, Reset buttons
+// * use KListView
+class EditListBox : public QFrame
+{
+Q_OBJECT
+   public:
+      enum Mode { DuplicatesDisallowed, DuplicatesAllowed, DuplicatesCheckedAtEntering };
+      enum Button { Add = 1, Remove = 2, UpDown = 4, RemoveAll = 8, Reset = 16 };
+      Q_DECLARE_FLAGS(Buttons, Button)
+
+      EditListBox(uint nbColumns, QWidget *parent = 0, const char *name = 0, Mode mode = DuplicatesDisallowed,
+                  Buttons buttons = Buttons(Add|Remove|RemoveAll|UpDown) );
+      EditListBox(uint nbColumns, QWidget *view, KLineEdit *lineEdit, QWidget *parent = 0, const char *name = 0,
+                  Mode mode = DuplicatesDisallowed, Buttons buttons = Buttons(Add|Remove|RemoveAll|UpDown) );
+      void setTexts(const QStringList& items);
+      QStringList texts() const;
+      uint count() const;
+      QString text(uint i) const { return item(i)->text(textColumn()); }
+      const QListViewItem *item(uint i) const;
+      Buttons buttons() const { return _buttons; }
+      void setButtons(Buttons buttons);
+      void setEditText(const QString &text);
+      void addItem(const QString &text);
+
+   signals:
+      void reset();
+      void changed();
+      void added( const QString & text );
+      void removed( const QString & text );
+
+   public slots:
+      void clear();
+
+   protected slots:
+      virtual void moveItemUp();
+      virtual void moveItemDown();
+      virtual void clearEdit();
+      virtual void addItem();
+      virtual void removeItem();
+      void selectionChanged();
+      void typedSomething(const QString& text);
+
+   protected:
+      KListView *_listView;
+
+      virtual QListViewItem *createItem();
+      virtual uint textColumn() const { return 0; }
+      QString selectedText() const;
+
+   private:
+      Mode         _mode;
+      Buttons      _buttons;
+      QVBoxLayout *_buttonsLayout;
+      KLineEdit   *m_lineEdit;
+      KPushButton *_addButton, *_removeButton, *_moveUpButton, *_moveDownButton,
+                  *_removeAllButton, *_resetButton;
+
+      void init(uint nbColumns, QWidget *view);
+      void updateButtons();
+};
+Q_DECLARE_OPERATORS_FOR_FLAGS(EditListBox::Buttons)
+
+#endif
diff --git a/src/common/gui/hexword_gui.cpp b/src/common/gui/hexword_gui.cpp
new file mode 100644
index 0000000..d794a11
--- /dev/null
+++ b/src/common/gui/hexword_gui.cpp
@@ -0,0 +1,136 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "hexword_gui.h"
+
+#include <qtimer.h>
+
+#include "common/gui/number_gui.h"
+#include "common/common/misc.h"
+
+//-----------------------------------------------------------------------------
+HexValueValidator::HexValueValidator(uint nbChars, QObject *parent)
+  : QValidator(parent, "hex_value_validator"), _nbChars(nbChars) {}
+
+QValidator::State HexValueValidator::validate(QString &input, int &) const
+{
+  if ( input.length()==0 ) return Acceptable;
+  if ( input.length()>_nbChars ) return Invalid;
+  for (uint i=0; i<input.length(); i++)
+    if ( !isxdigit(input[i].latin1()) && input[i]!='-' ) return Invalid;
+  return Acceptable;
+}
+
+//-----------------------------------------------------------------------------
+GenericHexWordEditor::GenericHexWordEditor(uint nbChars, bool hasBlankValue, QWidget *parent)
+  : KLineEdit(parent, "hex_word_editor"), _nbChars(nbChars), _hasBlankValue(hasBlankValue)
+{
+  setFocusPolicy(ClickFocus);
+  setValidator(new HexValueValidator(nbChars, this));
+  connect(this, SIGNAL(textChanged(const QString &)), SLOT(slotTextChanged()));
+  setFrame(false);
+}
+
+void GenericHexWordEditor::slotTextChanged()
+{
+  if ( text().length()!=_nbChars ) return;
+  if ( changeValue() ) emit moveNext();
+}
+
+bool GenericHexWordEditor::changeValue()
+{
+  if ( !isValid() ) return false;
+  QString s = text();
+  BitValue v = blankValue();
+  if ( s!=QString(repeat("-", _nbChars)) ) {
+    s = s.leftJustify(_nbChars, '0', true);
+    for (uint i=0; i<_nbChars; i++)
+      if ( !isxdigit(s[i].latin1()) ) s[i] = '0';
+    v = normalizeWord(fromHex(s, 0));
+    setText(toHex(v, _nbChars));
+  }
+  if ( v==word() ) return false;
+  setWord(v);
+  emit modified();
+  return true;
+}
+
+void GenericHexWordEditor::set()
+{
+  blockSignals(true);
+  setEnabled(isValid());
+  if ( !isValid() ) clear();
+  else {
+    BitValue value = word();
+    if ( _hasBlankValue && value==blankValue() ) setText(repeat("-", _nbChars));
+    else setText(toHex(normalizeWord(value), _nbChars));
+  }
+  blockSignals(false);
+}
+
+bool GenericHexWordEditor::event(QEvent *e)
+{
+  switch (e->type()) {
+  case QEvent::FocusOut:
+    changeValue();
+    break;
+  case QEvent::FocusIn:
+    QTimer::singleShot(0, this, SLOT(selectAll())); // ugly but it works
+    break;
+  case QEvent::KeyPress:
+    switch ( static_cast<QKeyEvent *>(e)->key() ) {
+      case Key_Next:
+        emit moveNextPage();
+        return true;
+      case Key_Tab:
+      case Key_Enter:
+      case Key_Return:
+        emit moveNext();
+        return true;
+      case Key_Prior:
+        emit movePrevPage();
+        return true;
+      case Key_BackTab:
+        emit movePrev();
+        return true;
+      case Key_Down:
+        emit moveDown();
+        return true;
+      case Key_Up:
+        emit moveUp();
+        return true;
+      case Key_Home:
+        emit moveFirst();
+        return true;
+      case Key_End:
+        emit moveLast();
+        return true;
+      case Key_Right:
+        if ( cursorPosition()!=int(text().length()) ) break;
+        emit moveNext();
+        return true;
+      case Key_Left:
+        if ( cursorPosition()!=0 ) break;
+        emit movePrev();
+        return true;
+    }
+   default: break;
+  }
+  return QLineEdit::event(e);
+}
+
+QSize GenericHexWordEditor::sizeHint() const
+{
+  return QSize(maxCharWidth(NumberBase::Hex, font()) * (_nbChars+1), fontMetrics().height());
+}
+
+QSize GenericHexWordEditor::minimumSizeHint() const
+{
+  return QSize(maxCharWidth(NumberBase::Hex, font()) * (_nbChars+1), fontMetrics().height());
+}
diff --git a/src/common/gui/hexword_gui.h b/src/common/gui/hexword_gui.h
new file mode 100644
index 0000000..5da6840
--- /dev/null
+++ b/src/common/gui/hexword_gui.h
@@ -0,0 +1,88 @@
+/***************************************************************************
+ *   Copyright (C) 2006-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef HEXWORD_GUI_H
+#define HEXWORD_GUI_H
+
+#include <qvalidator.h>
+#include <klineedit.h>
+
+#include "common/common/bitvalue.h"
+
+//-----------------------------------------------------------------------------
+class HexValueValidator : public QValidator
+{
+Q_OBJECT
+public:
+  HexValueValidator(uint nbChars, QObject *parent);
+  virtual State validate(QString &input, int &pos) const;
+
+private:
+  uint _nbChars;
+};
+
+//-----------------------------------------------------------------------------
+class GenericHexWordEditor : public KLineEdit
+{
+Q_OBJECT
+public:
+  GenericHexWordEditor(uint nbChars, bool hasBlankValue, QWidget *parent);
+  virtual QSize sizeHint() const;
+  virtual QSize minimumSizeHint() const;
+
+signals:
+  void modified();
+  void moveNext();
+  void movePrev();
+  void moveUp();
+  void moveDown();
+  void moveFirst();
+  void moveLast();
+  void moveNextPage();
+  void movePrevPage();
+
+private slots:
+  bool changeValue();
+  void slotTextChanged();
+
+protected:
+  uint _nbChars;
+  bool _hasBlankValue;
+
+  virtual bool isValid() const = 0;
+  virtual BitValue mask() const = 0;
+  virtual BitValue normalizeWord(BitValue value) const = 0;
+  virtual bool event(QEvent *e);
+  virtual void set();
+  virtual BitValue word() const = 0;
+  virtual void setWord(BitValue value) = 0;
+  virtual BitValue blankValue() const = 0;
+};
+
+//-----------------------------------------------------------------------------
+class HexWordEditor : public GenericHexWordEditor
+{
+Q_OBJECT
+public:
+  HexWordEditor(uint nbChars, QWidget *parent) : GenericHexWordEditor(nbChars, false, parent) {}
+  void setValue(BitValue word) { _word = word; set(); }
+  BitValue value() const { return _word; }
+
+protected:
+  BitValue _word;
+
+  virtual bool isValid() const { return true; }
+  virtual BitValue mask() const { return maxValue(NumberBase::Hex, _nbChars); }
+  virtual BitValue normalizeWord(BitValue value) const { return value.maskWith(mask()); }
+  virtual BitValue word() const { return _word; }
+  virtual void setWord(BitValue value) { _word = value; }
+  virtual BitValue blankValue() const { return 0; }
+};
+
+#endif
diff --git a/src/common/gui/key_gui.h b/src/common/gui/key_gui.h
new file mode 100644
index 0000000..fb8a9f5
--- /dev/null
+++ b/src/common/gui/key_gui.h
@@ -0,0 +1,125 @@
+/***************************************************************************
+ *   Copyright (C) 2006-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef KEY_GUI_H
+#define KEY_GUI_H
+
+#include <qcombobox.h>
+#include <qwidgetstack.h>
+#include <qpopupmenu.h>
+
+#include "common/gui/misc_gui.h"
+#include "common/common/misc.h"
+
+//-----------------------------------------------------------------------------
+template <typename KeyType, typename Type, typename WidgetType>
+class KeyWidget
+{
+public:
+  typedef QMapConstIterator<KeyType, int> ConstIterator;
+
+public:
+  KeyWidget(QWidget *parent) { _widget = new WidgetType(parent); }
+  virtual ~KeyWidget() { delete _widget; }
+  virtual WidgetType *widget() { return _widget; }
+  virtual void clear() { _ids.clear(); }
+  ConstIterator begin() const { return _ids.begin(); }
+  ConstIterator end() const { return _ids.end(); }
+  uint count() const { return _ids.count(); }
+  void appendItem(const KeyType &key, Type type) {
+    CRASH_ASSERT( !_ids.contains(key) );
+    _ids[key] = append(type);
+  }
+  KeyType currentItem() const { return key(currentId()); }
+  void setCurrentItem(const KeyType &key) {
+    if ( _ids.contains(key) ) setCurrentId(_ids[key]);
+  }
+  bool contains(const KeyType &key) const { return _ids.contains(key); }
+  Type item(const KeyType &key) const {
+    CRASH_ASSERT( _ids.contains(key) );
+    return get(_ids[key]);
+  }
+  Type item(ConstIterator it) const {
+    CRASH_ASSERT( it!=end() );
+    return get(it.data());
+  }
+  KeyType key(int id) const {
+    for (ConstIterator it=begin(); it!=end(); it++)
+      if ( it.data()==id ) return it.key();
+    return KeyType();
+  }
+
+protected:
+  virtual int append(Type type) = 0;
+  virtual int currentId() const = 0;
+  virtual void setCurrentId(int id) = 0;
+  virtual Type get(int id) const = 0;
+
+  QWidget *_parent;
+  QMap<KeyType, int> _ids;
+  WidgetType *_widget;
+};
+
+//-----------------------------------------------------------------------------
+template <typename KeyType>
+class KeyComboBox : public KeyWidget<KeyType, QString, QComboBox>
+{
+public:
+  typedef KeyWidget<KeyType, QString, QComboBox> ParentType;
+  KeyComboBox(QWidget *parent = 0) : ParentType(parent) {}
+  virtual void clear() {
+    ParentType::clear();
+    ParentType::_widget->clear();
+  }
+  void fixMinimumWidth() {
+    ParentType::_widget->setMinimumWidth(ParentType::_widget->sizeHint().width());
+  }
+
+protected:
+  virtual int append(QString label) { ParentType::_widget->insertItem(label); return ParentType::_widget->count()-1; }
+  virtual int currentId() const { return ParentType::_widget->currentItem(); }
+  virtual void setCurrentId(int id) { ParentType::_widget->setCurrentItem(id); }
+  virtual QString get(int id) const { return ParentType::_widget->text(id); }
+};
+
+//-----------------------------------------------------------------------------
+template <typename KeyType>
+class KeyWidgetStack : public KeyWidget<KeyType, QWidget *, QWidgetStack>
+{
+public:
+  typedef KeyWidget<KeyType, QWidget *, QWidgetStack> ParentType;
+  KeyWidgetStack(QWidget *parent = 0) : ParentType(parent) {}
+
+protected:
+  virtual int append(QWidget *widget) { return ParentType::_widget->addWidget(widget); }
+  virtual int currentId() const { return ParentType::_widget->id(ParentType::_widget->visibleWidget()); }
+  virtual void setCurrentId(int id) { ParentType::_widget->raiseWidget(id); }
+  virtual QWidget *get(int id) const { return ParentType::_widget->widget(id); }
+};
+
+//-----------------------------------------------------------------------------
+template <typename KeyType>
+class KeyPopupButton : public KeyWidget<KeyType, QString, PopupButton>
+{
+public:
+  typedef KeyWidget<KeyType, QString, PopupButton> ParentType;
+  KeyPopupButton(QWidget *parent = 0) : ParentType(parent) {}
+
+protected:
+  virtual int append(QString label) { return ParentType::_widget->appendItem(label, QPixmap()); }
+  virtual QString get(int id) const { return ParentType::_widget->popup()->text(id); }
+
+private:
+  // disabled
+  QString currentItem() const;
+  void setCurrentItem(const QString &key);
+  virtual int currentId() const { return 0; }
+  virtual void setCurrentId(int) {}
+};
+
+#endif
diff --git a/src/common/gui/list_container.cpp b/src/common/gui/list_container.cpp
new file mode 100644
index 0000000..0103175
--- /dev/null
+++ b/src/common/gui/list_container.cpp
@@ -0,0 +1,95 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "list_container.h"
+
+//----------------------------------------------------------------------------
+PopupContainer::PopupContainer(const QString &title, QWidget *parent, const char *name)
+  : KPopupMenu(parent, name)
+{
+  if ( !title.isEmpty() ) insertTitle(title);
+}
+
+ListContainer *PopupContainer::appendBranch(const QString &title)
+{
+  PopupContainer *branch = new PopupContainer(title, this);
+  insertItem(title, branch);
+  return branch;
+}
+
+ListContainer *PopupContainer::appendBranch(const QPixmap &pixmap, const QString &title)
+{
+  PopupContainer *branch = new PopupContainer(title, this);
+  insertItem(pixmap, title, branch);
+  return branch;
+}
+
+void PopupContainer::appendItem(const QPixmap &icon, const QString &label, uint id, ItemState state)
+{
+  insertItem(icon, label, id);
+  switch (state) {
+    case Normal:    break;
+    case Checked:   setItemChecked(id, true); break;
+    case UnChecked: setItemChecked(id, false); break;
+    case Disabled:  setItemEnabled(id, false); break;
+  }
+}
+
+//----------------------------------------------------------------------------
+ListViewItemContainer::ListViewItemContainer(const QString &title, KListView *parent)
+  : KListViewItem(parent, title), _parent(0), _column(0)
+{
+  _ids = new QMap<const QListViewItem *, uint>;
+}
+
+ListViewItemContainer::ListViewItemContainer(const QString &title, ListViewItemContainer *parent)
+  : KListViewItem(parent, title), _parent(parent), _column(0)
+{
+  _ids = parent->_ids;
+}
+
+ListViewItemContainer::~ListViewItemContainer()
+{
+  if ( _parent==0 ) delete _ids;
+}
+
+ListContainer *ListViewItemContainer::appendBranch(const QString &title)
+{
+  ListViewItemContainer *branch = new ListViewItemContainer(title, this);
+  branch->setColumn(_column);
+  branch->setSelectable(false);
+  // append instead of prepend
+  QListViewItem *litem=firstChild();
+  while ( litem && litem->nextSibling() ) litem = litem->nextSibling();
+  if (litem) branch->moveItem(litem);
+  return branch;
+}
+
+void ListViewItemContainer::appendItem(const QPixmap &icon, const QString &title, uint id, ItemState state)
+{
+  QListViewItem *item = 0;
+  if ( state==Normal || state==Disabled ) {
+    item = new KListViewItem(this);
+    item->setText(_column, title);
+  } else {
+    item = new QCheckListItem(this, title, QCheckListItem::CheckBox);
+    static_cast<QCheckListItem *>(item)->setState(state==Checked ? QCheckListItem::On : QCheckListItem::Off);
+  }
+  item->setPixmap(_column, icon);
+  item->setSelectable(state==Normal);
+  // append instead of prepend
+  QListViewItem *litem=firstChild();
+  while ( litem && litem->nextSibling() ) litem = litem->nextSibling();
+  if (litem) item->moveItem(litem);
+  (*_ids)[item] = id;
+}
+
+int ListViewItemContainer::id(const QListViewItem *item) const
+{
+  return (_ids->contains(item) ? int((*_ids)[item]) : -1);
+}
diff --git a/src/common/gui/list_container.h b/src/common/gui/list_container.h
new file mode 100644
index 0000000..b70db57
--- /dev/null
+++ b/src/common/gui/list_container.h
@@ -0,0 +1,55 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef LIST_CONTAINER_H
+#define LIST_CONTAINER_H
+
+#include <kpopupmenu.h>
+#include <klistview.h>
+
+//----------------------------------------------------------------------------
+class ListContainer
+{
+public:
+  virtual ~ListContainer() {}
+  virtual ListContainer *appendBranch(const QString &title) = 0;
+  enum ItemState { Normal, Checked, UnChecked, Disabled };
+  void appendItem(const QString &label, uint id, ItemState state) { appendItem(QPixmap(), label, id, state); }
+  virtual void appendItem(const QPixmap &icon, const QString &label, uint id, ItemState state) = 0;
+};
+
+//----------------------------------------------------------------------------
+class PopupContainer : public KPopupMenu, public ListContainer
+{
+Q_OBJECT
+public:
+  PopupContainer(const QString &title, QWidget *parent = 0, const char *name = 0);
+  virtual ListContainer *appendBranch(const QString &title);
+  virtual ListContainer *appendBranch(const QPixmap &icon, const QString &title);
+  virtual void appendItem(const QPixmap &icon, const QString &label, uint id, ItemState state);
+};
+
+//----------------------------------------------------------------------------
+class ListViewItemContainer : public KListViewItem, public ListContainer
+{
+public:
+  ListViewItemContainer(const QString &title, KListView *parent);
+  ListViewItemContainer(const QString &title, ListViewItemContainer *parent);
+  virtual ~ListViewItemContainer();
+  void setColumn(uint column) { _column = column; }
+  virtual ListContainer *appendBranch(const QString &title);
+  virtual void appendItem(const QPixmap &icon, const QString &label, uint id, ItemState state);
+  int id(const QListViewItem* item) const; // -1 if not known
+
+private:
+  ListViewItemContainer *_parent;
+  uint _column;
+  QMap<const QListViewItem *, uint> *_ids;
+};
+
+#endif
diff --git a/src/common/gui/list_view.cpp b/src/common/gui/list_view.cpp
new file mode 100644
index 0000000..c9434f3
--- /dev/null
+++ b/src/common/gui/list_view.cpp
@@ -0,0 +1,221 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 1992-2003 Trolltech AS.                                 *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "list_view.h"
+
+#include <qapplication.h>
+#include <qpainter.h>
+#include <qlineedit.h>
+#include <qheader.h>
+#include <qmetaobject.h>
+#include <qvariant.h>
+
+//----------------------------------------------------------------------------
+ListView::ListView(QWidget *parent, const char *name)
+  : KListView(parent, name)
+{
+  QToolTip::remove(this);
+  _tooltip = new ListViewToolTip(this);
+}
+
+ListView::~ListView()
+{
+  delete _tooltip;
+}
+
+QString ListView::tooltip(const QListViewItem &, int) const
+{
+  return QString::null;
+}
+
+void ListView::clear()
+{
+  _editItems.clear();
+  KListView::clear();
+}
+
+bool ListView::eventFilter(QObject *o, QEvent *e)
+{
+  QValueList<EditListViewItem *>::const_iterator it;
+  for (it=_editItems.begin(); it!=_editItems.end(); ++it) {
+    for (uint i=0; i<(*it)->_editWidgets.count(); i++) {
+      if ( (*it)->_editWidgets[i]==o ) {
+        //qDebug("event %i", e->type());
+        switch (e->type()) {
+          case QEvent::KeyPress: {
+            QKeyEvent *ke = static_cast<QKeyEvent *>(e);
+            switch (ke->key()) {
+              case Key_Enter:
+              case Key_Return:
+                (*it)->renameDone(true);
+                return true;
+              case Key_Escape:
+                (*it)->removeEditBox();
+                return true;
+            }
+            break;
+          }
+          case QEvent::FocusOut: {
+            //qDebug("focus out %i %i=%i", qApp->focusWidget(), focusWidget(), (*it)->_editWidgets[i]);
+            if ( qApp->focusWidget() && focusWidget()==(*it)->_editWidgets[i] ) break;
+            //qDebug("ext");
+            QCustomEvent *e = new QCustomEvent(9999);
+            QApplication::postEvent(o, e);
+            return true;
+          }
+          case 9999:
+            (*it)->renameDone(false);
+            return true;
+          default:
+            //qDebug("  ignored");
+            break;
+        }
+      }
+    }
+  }
+  return KListView::eventFilter(o, e);
+}
+
+void ListView::stopRenaming(bool force)
+{
+  QValueList<EditListViewItem *>::const_iterator it;
+  for (it=_editItems.begin(); it!=_editItems.end(); ++it)
+    if ( (*it)->isRenaming() ) (*it)->renameDone(force);
+}
+
+//----------------------------------------------------------------------------
+void ListViewToolTip::maybeTip(const QPoint &p)
+{
+  if ( _listView==0 ) return;
+  const QListViewItem* item = _listView->itemAt(p);
+  if ( item==0 ) return;
+  QRect rect = _listView->itemRect(item);
+  if ( !rect.isValid() ) return;
+  int col = _listView->header()->sectionAt(p.x());
+  QString text = _listView->tooltip(*item, col);
+  if ( !text.isEmpty() ) {
+    int hpos = _listView->header()->sectionPos(col);
+    rect.setLeft(hpos);
+    rect.setRight(hpos + _listView->header()->sectionSize(col));
+    tip(rect, text);
+  }
+}
+
+//----------------------------------------------------------------------------
+EditListViewItem::EditListViewItem(ListView *list)
+  : KListViewItem(list), _renaming(false)
+{
+  setRenameEnabled(0, true);
+  list->_editItems.append(this);
+}
+
+EditListViewItem::EditListViewItem(KListViewItem *item)
+  : KListViewItem(item), _renaming(false)
+{
+  setRenameEnabled(0, true);
+  static_cast<ListView *>(listView())->_editItems.append(this);
+}
+
+EditListViewItem::~EditListViewItem()
+{
+  if ( listView() ) static_cast<ListView *>(listView())->_editItems.remove(this);
+  for (uint i=0; i<_editWidgets.count(); i++) delete _editWidgets[i];
+}
+
+void EditListViewItem::paintCell(QPainter *p, const QColorGroup &cg, int column, int width, int align)
+{
+  if ( column<int(_editWidgets.count()) && _editWidgets[column] )
+    p->fillRect(0, 0, width, height(), cg.color(QColorGroup::Background));
+  else KListViewItem::paintCell(p, cg, column, width, align);
+}
+
+void EditListViewItem::startRename()
+{
+  if ( !renameEnabled(0) ) return;
+  QListView *lv = listView();
+  if ( !lv ) return;
+  KListViewItem::startRename(0);
+  if (renameBox) {
+    renameBox->removeEventFilter(lv);
+    renameBox->hide();
+    lv->removeChild(renameBox);
+  }
+  _renaming = true;
+  _editWidgets.resize(lv->columns());
+  for (uint i=0; i<_editWidgets.count(); i++) {
+    QRect r = lv->itemRect(this);
+    r = QRect(lv->viewportToContents(r.topLeft()), r.size());
+    r.setLeft(lv->header()->sectionPos(i));
+    r.setWidth(lv->header()->sectionSize(i) - 1);
+    if ( i==0 ) r.setLeft(r.left() + lv->itemMargin() + (depth() + (lv->rootIsDecorated() ? 1 : 0)) * lv->treeStepSize() - 1);
+    if ( (lv->contentsX() + lv->visibleWidth())<(r.x() + r.width()) )
+      lv->scrollBy((r.x() + r.width() ) - ( lv->contentsX() + lv->visibleWidth() ), 0);
+    if ( r.width()>lv->visibleWidth() ) r.setWidth(lv->visibleWidth());
+
+    _editWidgets[i] = editWidgetFactory(i);
+    if ( _editWidgets[i]==0 ) continue;
+    _editWidgets[i]->installEventFilter(lv);
+    lv->addChild(_editWidgets[i], r.x(), r.y());
+    uint w = QMIN(r.width(), _editWidgets[i]->sizeHint().width());
+    _editWidgets[i]->resize(w, r.height());
+    lv->viewport()->setFocusProxy(_editWidgets[i]);
+    _editWidgets[i]->setFocus();
+    _editWidgets[i]->show();
+  }
+}
+
+void EditListViewItem::removeEditBox()
+{
+  QListView *lv = listView();
+  if ( !lv ) return;
+  _renaming = false;
+  bool resetFocus = false;
+  for (uint i=0; i<_editWidgets.count(); i++) {
+    if ( lv->viewport()->focusProxy()==_editWidgets[i] ) resetFocus = true;
+    delete _editWidgets[i];
+  }
+  _editWidgets.clear();
+  delete renameBox;
+  renameBox = 0;
+  if (resetFocus) {
+    lv->viewport()->setFocusProxy(lv);
+    lv->setFocus();
+  }
+}
+
+void EditListViewItem::editDone(int col, const QWidget *edit)
+{
+  if ( edit->metaObject()->findProperty("text", true)!=-1 )
+    emit listView()->itemRenamed(this, col, edit->property("text").toString());
+  else if ( edit->metaObject()->findProperty("currentText", true)!=-1 )
+    emit listView()->itemRenamed(this, col, edit->property("currentText").toString());
+}
+
+void EditListViewItem::renameDone(bool force)
+{
+  QListView *lv = listView();
+  if ( !lv || !_renaming ) return;
+  _renaming = false;
+  for (uint i=0; i<_editWidgets.count(); i++) {
+    if ( !force && !alwaysAcceptEdit(i) ) continue;
+    emit lv->itemRenamed(this, i);
+    if ( _editWidgets[i] ) editDone(i, _editWidgets[i]);
+  }
+  removeEditBox();
+}
+
+int EditListViewItem::width(const QFontMetrics &fm, const QListView *lv, int col) const
+{
+  int w = KListViewItem::width(fm, lv, col);
+  QWidget *edit = editWidgetFactory(col);
+  if ( edit==0 ) return w;
+  w = QMAX(w, edit->sizeHint().width());
+  delete edit;
+  return w;
+}
diff --git a/src/common/gui/list_view.h b/src/common/gui/list_view.h
new file mode 100644
index 0000000..09ca984
--- /dev/null
+++ b/src/common/gui/list_view.h
@@ -0,0 +1,93 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef LIST_VIEW_H
+#define LIST_VIEW_H
+
+#include <qtooltip.h>
+#include <qvaluevector.h>
+#define private public
+#define protected public
+#include <klistview.h>
+#undef private
+#undef protected
+
+//-----------------------------------------------------------------------------
+class EditListViewItem;
+class ListViewToolTip;
+
+class ListView : public KListView
+{
+Q_OBJECT
+public:
+  ListView(QWidget *parent = 0, const char *name = 0);
+  virtual ~ListView();
+  virtual void clear();
+  void stopRenaming(bool force);
+  virtual QString tooltip(const QListViewItem &item, int column) const;
+
+public slots:
+  void cancelRenaming() { stopRenaming(false); }
+  void finishRenaming() { stopRenaming(true); }
+
+protected:
+  virtual bool eventFilter(QObject *o, QEvent *e);
+
+private:
+  ListViewToolTip *_tooltip;
+  QValueList<EditListViewItem *> _editItems;
+
+  friend class EditListViewItem;
+};
+
+//-----------------------------------------------------------------------------
+class ListViewToolTip : public QToolTip
+{
+public:
+  ListViewToolTip(ListView *parent)
+    : QToolTip(parent->viewport()), _listView(parent) {}
+
+protected:
+  virtual void maybeTip(const QPoint &p);
+
+private:
+  ListView *_listView;
+};
+
+//-----------------------------------------------------------------------------
+class EditListViewItem : public KListViewItem
+{
+public:
+  EditListViewItem(ListView *list);
+  EditListViewItem(KListViewItem *item);
+  virtual ~EditListViewItem();
+  void startRename();
+  bool isRenaming() const { return _renaming; }
+
+protected:
+  virtual QWidget *editWidgetFactory(int col) const = 0;
+  virtual bool alwaysAcceptEdit(int col) const = 0;
+  virtual int width(const QFontMetrics &fm, const QListView *lv, int c) const;
+  virtual void editDone(int col, const QWidget *editWidget);
+  virtual void paintCell(QPainter *p, const QColorGroup &cg, int column, int width, int align);
+
+private:
+  bool _renaming;
+  QValueVector<QWidget *> _editWidgets;
+
+  virtual void activate() { startRename(); }
+  virtual void startRename(int) { startRename(); }
+  virtual void okRename(int) { renameDone(true); }
+  virtual void cancelRename(int) { renameDone(false); }
+  void renameDone(bool force);
+  void removeEditBox();
+
+  friend class ListView;
+};
+
+#endif
diff --git a/src/common/gui/misc_gui.cpp b/src/common/gui/misc_gui.cpp
new file mode 100644
index 0000000..00f4997
--- /dev/null
+++ b/src/common/gui/misc_gui.cpp
@@ -0,0 +1,234 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "misc_gui.h"
+
+#include <qapplication.h>
+#include <qpushbutton.h>
+#include <qtimer.h>
+#include <qwidgetstack.h>
+#include <qobjectlist.h>
+#include <qpainter.h>
+#include <qheader.h>
+#include <qmetaobject.h>
+#include <qvariant.h>
+#include <qpopupmenu.h>
+
+#include <kcursor.h>
+#include <kiconloader.h>
+#include <kmessagebox.h>
+#include <kaction.h>
+#include <ktabbar.h>
+
+#include "dialog.h"
+#include "common/common/number.h"
+#include "common/common/misc.h"
+#include "common/gui/number_gui.h"
+
+//-----------------------------------------------------------------------------
+bool BusyCursor::_overridePaused = false;
+
+void BusyCursor::start()
+{
+  QApplication::setOverrideCursor(KCursor::waitCursor(), true);
+}
+
+void BusyCursor::stop()
+{
+  QApplication::restoreOverrideCursor();
+}
+
+void BusyCursor::pause()
+{
+  _overridePaused = QApplication::overrideCursor();
+  stop();
+}
+
+void BusyCursor::restore()
+{
+  if (_overridePaused) start();
+}
+
+//-----------------------------------------------------------------------------
+void MessageBox::information(const QString &text, Log::ShowMode show, const QString &dontShowAgainName)
+{
+  if ( show==Log::DontShow ) return;
+  BusyCursor::pause();
+  KMessageBox::information(qApp->mainWidget(), text, QString::null, dontShowAgainName, KMessageBox::Notify | KMessageBox::AllowLink);
+  BusyCursor::restore();
+}
+
+void MessageBox::detailedSorry(const QString &text, const QString &details, Log::ShowMode show)
+{
+  if ( show==Log::DontShow ) return;
+  BusyCursor::pause();
+  if ( details.isEmpty() ) KMessageBox::sorry(qApp->mainWidget(), text, QString::null, KMessageBox::Notify | KMessageBox::AllowLink);
+  else KMessageBox::detailedSorry(qApp->mainWidget(), text, details, QString::null, KMessageBox::Notify | KMessageBox::AllowLink);
+  BusyCursor::restore();
+}
+
+bool MessageBox::askContinue(const QString &text, const KGuiItem &buttonContinue, const QString &caption)
+{
+  ::BusyCursor::pause();
+  int res = KMessageBox::warningContinueCancel(qApp->mainWidget(), text, caption, buttonContinue);
+  ::BusyCursor::restore();
+  return ( res==KMessageBox::Continue );
+}
+
+bool MessageBox::questionYesNo(const QString &text, const KGuiItem &yesButton,const KGuiItem &noButton, const QString &caption)
+{
+  ::BusyCursor::pause();
+  int res = KMessageBox::questionYesNo(qApp->mainWidget(), text, caption, yesButton, noButton);
+  ::BusyCursor::restore();
+  return ( res==KMessageBox::Yes );
+}
+
+MessageBox::Result MessageBox::questionYesNoCancel(const QString &text, const KGuiItem &yesButton, const KGuiItem &noButton,
+                                                        const QString &caption)
+{
+  ::BusyCursor::pause();
+  int res = KMessageBox::questionYesNoCancel(qApp->mainWidget(), text, caption, yesButton, noButton);
+  ::BusyCursor::restore();
+  if ( res==KMessageBox::Yes ) return Yes;
+  if ( res==KMessageBox::No ) return No;
+  return Cancel;
+}
+
+void MessageBox::text(const QString &text, Log::ShowMode show)
+{
+  if ( show==Log::DontShow ) return;
+  BusyCursor::pause();
+  TextEditorDialog dialog(text, QString::null, false, qApp->mainWidget());
+  dialog.exec();
+  BusyCursor::restore();
+}
+
+//----------------------------------------------------------------------------
+PopupButton::PopupButton(QWidget *parent, const char *name)
+  : KPushButton(parent, name)
+{
+  init();
+}
+
+PopupButton::PopupButton(const QString &text, QWidget *parent, const char *name)
+  : KPushButton(text, parent, name)
+{
+  init();
+}
+
+void PopupButton::init()
+{
+  _separator = false;
+  setFlat(true);
+  QPopupMenu *popup = new QPopupMenu(this);
+  connect(popup, SIGNAL(activated(int)), SIGNAL(activated(int)));
+  setPopup(popup);
+}
+
+void PopupButton::appendAction(KAction *action)
+{
+  if ( _separator && popup()->count()!=0 ) popup()->insertSeparator();
+  _separator = false;
+  action->plug(popup());
+}
+
+void PopupButton::appendAction(const QString &label, const QString &icon,
+                               QObject *receiver, const char *slot)
+{
+  appendAction(new KAction(label, icon, 0, receiver, slot, (KActionCollection *)0));
+}
+
+int PopupButton::appendItem(const QString &label, const QString &icon, int id)
+{
+  KIconLoader loader;
+  QPixmap pixmap = loader.loadIcon(icon, KIcon::Small);
+  return appendItem(label, pixmap, id);
+}
+
+int PopupButton::appendItem(const QString &label, const QPixmap &icon, int id)
+{
+  if ( _separator && popup()->count()!=0 ) popup()->insertSeparator();
+  _separator = false;
+  return popup()->insertItem(icon, label, id);
+}
+
+//-----------------------------------------------------------------------------
+Splitter::Splitter(const QValueList<int> &defaultSizes, Orientation o, QWidget *parent, const char *name)
+  : QSplitter(o, parent, name), _defaultSizes(defaultSizes)
+{
+  Q_ASSERT(name);
+  setOpaqueResize(true);
+  QTimer::singleShot(0, this, SLOT(updateSizes()));
+}
+
+Splitter::~Splitter()
+{
+  GuiConfig gc;
+  gc.writeEntry(QString(name()) + "_sizes", sizes());
+}
+
+void Splitter::updateSizes()
+{
+  GuiConfig gc;
+  QValueList<int> sizes = gc.readIntListEntry(QString(name()) + "_sizes");
+  for (uint i=sizes.count(); i<_defaultSizes.count(); i++) sizes.append(_defaultSizes[i]);
+  setSizes(sizes);
+}
+
+//-----------------------------------------------------------------------------
+TabBar::TabBar(QWidget *parent, const char *name)
+  : KTabBar(parent, name), _ignoreWheelEvent(false)
+{}
+
+void TabBar::wheelEvent(QWheelEvent *e)
+{
+  if (_ignoreWheelEvent) QApplication::sendEvent(parent(), e); // #### not sure why ignoring is not enough...
+  else KTabBar::wheelEvent(e);
+}
+
+TabWidget::TabWidget(QWidget *parent, const char *name)
+  : KTabWidget(parent, name)
+{
+  setTabBar(new TabBar(this));
+}
+
+void TabWidget::setIgnoreWheelEvent(bool ignore)
+{
+  static_cast<TabBar *>(tabBar())->_ignoreWheelEvent = ignore;
+}
+
+void TabWidget::wheelEvent(QWheelEvent *e)
+{
+  if (static_cast<TabBar *>(tabBar())->_ignoreWheelEvent) e->ignore();
+  else KTabWidget::wheelEvent(e);
+}
+
+void TabWidget::setTabBar(TabBar *tabbar)
+{
+  KTabWidget::setTabBar(tabbar);
+  connect(tabBar(), SIGNAL(contextMenu( int, const QPoint & )), SLOT(contextMenu( int, const QPoint & )));
+  connect(tabBar(), SIGNAL(mouseDoubleClick( int )), SLOT(mouseDoubleClick( int )));
+  connect(tabBar(), SIGNAL(mouseMiddleClick( int )), SLOT(mouseMiddleClick( int )));
+  connect(tabBar(), SIGNAL(initiateDrag( int )), SLOT(initiateDrag( int )));
+  connect(tabBar(), SIGNAL(testCanDecode(const QDragMoveEvent *, bool & )), SIGNAL(testCanDecode(const QDragMoveEvent *, bool & )));
+  connect(tabBar(), SIGNAL(receivedDropEvent( int, QDropEvent * )), SLOT(receivedDropEvent( int, QDropEvent * )));
+  connect(tabBar(), SIGNAL(moveTab( int, int )), SLOT(moveTab( int, int )));
+  connect(tabBar(), SIGNAL(closeRequest( int )), SLOT(closeRequest( int )));
+  connect(tabBar(), SIGNAL(wheelDelta( int )), SLOT(wheelDelta( int )));
+}
+
+//-----------------------------------------------------------------------------
+ComboBox::ComboBox(QWidget *parent, const char *name)
+  : QComboBox(parent, name), _ignoreWheelEvent(false)
+{}
+
+void ComboBox::wheelEvent(QWheelEvent *e)
+{
+  if (_ignoreWheelEvent) QApplication::sendEvent(parent(), e); // #### not sure why ignoring is not enough...
+  else QComboBox::wheelEvent(e);
+}
diff --git a/src/common/gui/misc_gui.h b/src/common/gui/misc_gui.h
new file mode 100644
index 0000000..2d58569
--- /dev/null
+++ b/src/common/gui/misc_gui.h
@@ -0,0 +1,164 @@
+/***************************************************************************
+ *   Copyright (C) 2006-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef MISC_GUI_H
+#define MISC_GUI_H
+
+#include <qlayout.h>
+#include <qsplitter.h>
+#include <qvaluevector.h>
+#include <qvalidator.h>
+#include <qcombobox.h>
+#include <qwidgetstack.h>
+
+#include <klocale.h>
+#include <kpushbutton.h>
+#include <ktabwidget.h>
+#include <ktabbar.h>
+#include <kstdguiitem.h>
+#include <klineedit.h>
+class KAction;
+
+#include "common/global/generic_config.h"
+#include "common/global/log.h"
+#include "common/common/number.h"
+
+//-----------------------------------------------------------------------------
+class BusyCursor
+{
+public:
+  BusyCursor() { start(); }
+  ~BusyCursor() { stop(); }
+  static void start();
+  static void stop();
+  static void pause();
+  static void restore();
+
+private:
+  static bool _overridePaused;
+};
+
+//-----------------------------------------------------------------------------
+namespace MessageBox
+{
+extern void information(const QString &text, Log::ShowMode show, const QString &dontShowAgainName = QString::null);
+extern void detailedSorry(const QString &text, const QString &details, Log::ShowMode show);
+inline void sorry(const QString &text, Log::ShowMode show) { detailedSorry(text, QString::null, show); }
+extern bool askContinue(const QString &text, const KGuiItem &continueButton = KStdGuiItem::cont(),
+                        const QString &caption = i18n("Warning"));
+extern bool questionYesNo(const QString &text, const KGuiItem &yesButton, const KGuiItem &noButton,
+                          const QString &caption = i18n("Warning"));
+enum Result { Yes, No, Cancel };
+extern Result questionYesNoCancel(const QString &text, const KGuiItem &yesButton, const KGuiItem &noButton,
+                                  const QString &caption = i18n("Warning"));
+extern void text(const QString &text, Log::ShowMode show);
+}
+
+//----------------------------------------------------------------------------
+class PopupButton : public KPushButton
+{
+Q_OBJECT
+public:
+  PopupButton(QWidget *parent = 0, const char *name = 0);
+  PopupButton(const QString &text, QWidget *parent = 0, const char *name = 0);
+  void appendAction(KAction *action);
+  void appendAction(const QString &label, const QString &icon = QString::null,
+                    QObject *receiver = 0, const char *slot = 0);
+  int appendItem(const QString &label, uint id) { return appendItem(label, QPixmap(), id); }
+  int appendItem(const QString &label, const QString &icon, int id = -1);
+  int appendItem(const QString &label, const QPixmap &icon, int id = -1);
+  void appendSeparator() { _separator = true; }
+
+signals:
+  void activated(int id);
+
+private:
+  bool _separator;
+
+  void init();
+};
+
+//-----------------------------------------------------------------------------
+class Splitter : public QSplitter
+{
+Q_OBJECT
+public:
+  Splitter(const QValueList<int> &defaultSizes, Orientation orientation,
+           QWidget *parent, const char *name);
+  virtual ~Splitter();
+
+private slots:
+  void updateSizes();
+
+private:
+  QValueList<int> _defaultSizes;
+};
+
+//-----------------------------------------------------------------------------
+class GuiConfig : public GenericConfig
+{
+public:
+  GuiConfig() : GenericConfig("gui") {}
+};
+
+//-----------------------------------------------------------------------------
+class SeparatorWidget : public QFrame
+{
+Q_OBJECT
+public:
+  SeparatorWidget(QWidget *parent) : QFrame(parent, "separator") {
+    setFrameStyle(QFrame::Panel | QFrame::Sunken);
+    setMargin(2);
+    setFixedHeight(2*2);
+  }
+};
+
+//-----------------------------------------------------------------------------
+class TabBar : public KTabBar
+{
+Q_OBJECT
+public:
+  TabBar(QWidget *parent = 0, const char *name = 0);
+
+protected:
+  virtual void wheelEvent(QWheelEvent *e);
+
+private:
+  bool _ignoreWheelEvent;
+
+  friend class TabWidget;
+};
+
+class TabWidget : public KTabWidget
+{
+Q_OBJECT
+public:
+  TabWidget(QWidget *parent = 0, const char *name = 0);
+  void setIgnoreWheelEvent(bool ignore);
+
+protected:
+  virtual void wheelEvent(QWheelEvent *e);
+  void setTabBar(TabBar *tabbar);
+};
+
+//-----------------------------------------------------------------------------
+class ComboBox : public QComboBox
+{
+Q_OBJECT
+public:
+  ComboBox(QWidget *parent = 0, const char *name = 0);
+  void setIgnoreWheelEvent(bool ignore) { _ignoreWheelEvent = ignore; }
+
+protected:
+  virtual void wheelEvent(QWheelEvent *e);
+
+private:
+  bool _ignoreWheelEvent;
+};
+
+#endif
diff --git a/src/common/gui/number_gui.cpp b/src/common/gui/number_gui.cpp
new file mode 100644
index 0000000..d855407
--- /dev/null
+++ b/src/common/gui/number_gui.cpp
@@ -0,0 +1,72 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "number_gui.h"
+
+#include <qfontmetrics.h>
+
+//-----------------------------------------------------------------------------
+uint maxCharWidth(const QString &s, const QFont &font)
+{
+  QFontMetrics fm(font);
+  uint w = 0;
+  for (uint i=0; i<uint(s.length()); i++)
+    w = QMAX(w, uint(fm.width(s[i])));
+  return w;
+}
+
+uint maxCharWidth(NumberBase base, const QFont &font)
+{
+  QString s;
+  for (uint i=0; i<base.data().base; i++) s += toChar(base, i);
+  return maxCharWidth(s, font);
+}
+
+uint maxLabelWidth(NumberBase base, uint nbChars, const QFont &font)
+{
+  uint w = maxStringWidth(base, nbChars, font);
+  QFontMetrics fm(font);
+  if ( base==NumberBase::String ) return w + 2 * fm.width("\"");
+  return w + fm.width(base.data().prefix);
+}
+
+//-----------------------------------------------------------------------------
+NumberLineEdit::NumberLineEdit(QWidget *parent, const char *name)
+  : KLineEdit(parent, name)
+{
+  connect(this, SIGNAL(textChanged(const QString &)), SLOT(textChangedSlot()));
+}
+
+NumberLineEdit::NumberLineEdit(const QString &text, QWidget *parent, const char *name)
+  : KLineEdit(text, parent, name)
+{
+  connect(this, SIGNAL(textChanged(const QString &)), SLOT(textChangedSlot()));
+}
+
+QValidator::State validateNumber(const QString &input)
+{
+  if ( input.isEmpty() ) return QValidator::Intermediate;
+  bool ok;
+  (void)fromAnyLabel(input, &ok);
+  if (ok) return QValidator::Acceptable;
+  FOR_EACH(NumberBase, base)
+    if ( input==base.data().prefix ) return QValidator::Intermediate;
+  if ( input[0]=='\"' ) return QValidator::Intermediate;
+  if ( input[0]=='\'' ) return QValidator::Intermediate;
+  return QValidator::Invalid;
+}
+
+void NumberLineEdit::textChangedSlot()
+{
+  QValidator::State state = validateNumber(text());
+  switch (state) {
+    case QValidator::Acceptable: unsetColor(); break;
+    case QValidator::Intermediate: setColor(QColor("#FF9900")); break;
+    case QValidator::Invalid: setColor(red); break;
+  }
+}
diff --git a/src/common/gui/number_gui.h b/src/common/gui/number_gui.h
new file mode 100644
index 0000000..f910820
--- /dev/null
+++ b/src/common/gui/number_gui.h
@@ -0,0 +1,40 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef NUMBER_GUI_H
+#define NUMBER_GUI_H
+
+#include <qvalidator.h>
+#include <klineedit.h>
+
+#include "common/common/number.h"
+
+//-----------------------------------------------------------------------------
+extern uint maxCharWidth(const QString &s, const QFont &font);
+extern uint maxCharWidth(NumberBase base, const QFont &font);
+inline uint maxStringWidth(NumberBase base, uint nbChars, const QFont &font) { return nbChars * maxCharWidth(base, font); }
+extern uint maxLabelWidth(NumberBase base, uint nbChars, const QFont &font);
+
+extern QValidator::State validateNumber(const QString &s);
+
+//-----------------------------------------------------------------------------
+class NumberLineEdit : public KLineEdit
+{
+Q_OBJECT
+public:
+  NumberLineEdit(QWidget *parent = 0, const char *name = 0);
+  NumberLineEdit(const QString &text, QWidget *parent = 0, const char *name = 0);
+  uint value(bool *ok = 0) const { return fromAnyLabel(text(), ok); }
+  void setColor(const QColor &color) { setPaletteForegroundColor(color); }
+  void unsetColor() { unsetPalette(); }
+
+private slots:
+  void textChangedSlot();
+};
+
+#endif
diff --git a/src/common/gui/pfile_ext.cpp b/src/common/gui/pfile_ext.cpp
new file mode 100644
index 0000000..d42de16
--- /dev/null
+++ b/src/common/gui/pfile_ext.cpp
@@ -0,0 +1,114 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pfile_ext.h"
+
+#include <qfile.h>
+#include <kio/netaccess.h>
+#include <ktempfile.h>
+#include "common/gui/misc_gui.h"
+
+//-----------------------------------------------------------------------------
+bool PURL::File::openForWrite()
+{
+  close();
+  if (_tmp) delete _tmp;
+  _tmp = new KTempFile(QString::null, _extension);
+  _tmp->setAutoDelete(true);
+  if ( _tmp->status()!=0 ) {
+    _error = i18n("Could not create temporary file.");
+    _log.sorry(_error, i18n("File: %1").arg(_tmp->name()));
+    return false;
+  }
+  return true;
+}
+
+bool PURL::File::close()
+{
+  if (_tmp) _tmp->close();
+  else _file->close();
+  bool ok = (_tmp ? _tmp->status() : _file->status())==IO_Ok;
+  if ( !_file->name().isEmpty() ) {
+    KIO::NetAccess::removeTempFile(_file->name());
+    _file->setName(QString::null);
+  }
+  delete _stream;
+  _stream = 0;
+  if ( ok && _tmp && !_url.isEmpty() && !KIO::NetAccess::upload(_tmp->name(), _url.kurl(), qApp->mainWidget()) ) {
+    _error = KIO::NetAccess::lastErrorString();
+    ok = false;
+    _log.sorry(i18n("Could not save file."), errorString());
+  }
+  delete _tmp;
+  _tmp = 0;
+  return ok;
+}
+
+bool PURL::File::openForRead()
+{
+  close();
+  QString tmp;
+  if ( !KIO::NetAccess::download(_url.kurl(), tmp, qApp->mainWidget()) ) {
+    _error = KIO::NetAccess::lastErrorString();
+    _log.sorry(i18n("Could not open file for reading."), errorString());
+    return false;
+  }
+  _file->setName(tmp);
+  if ( !_file->open(IO_ReadOnly) ) {
+    _error = i18n("Could not open temporary file.");
+    _log.sorry(_error, i18n("File: %1").arg(_file->name()));
+    return false;
+  }
+  return true;
+}
+
+bool PURL::File::remove()
+{
+  close();
+  if ( !_url.isEmpty() ) return _url.del(_log);
+  return false;
+}
+
+//-----------------------------------------------------------------------------
+PURL::TempFile::TempFile(Log::Generic &log, const QString &extension)
+  : FileBase(log, extension)
+{}
+
+PURL::Url PURL::TempFile::url() const
+{
+  return (_tmp ? Url::fromPathOrUrl(_tmp->name()) : Url());
+}
+
+bool PURL::TempFile::close()
+{
+  delete _stream;
+  _stream = 0;
+  if (_tmp) {
+    _tmp->close();
+    if ( _tmp->status()!=IO_Ok ) {
+      _error = i18n("Could not write to temporary file.");
+      _log.sorry(_error, i18n("File: %1").arg(_tmp->name()));
+      return false;
+    }
+  }
+  return true;
+}
+
+bool PURL::TempFile::openForWrite()
+{
+  close();
+  if (_tmp) delete _tmp;
+  _tmp = new KTempFile(QString::null, _extension);
+  _tmp->setAutoDelete(true);
+  if ( _tmp->status()!=0 ) {
+    _error = i18n("Could not create temporary file.");
+    _log.sorry(_error, i18n("File: %1").arg(_tmp->name()));
+    return false;
+  }
+  return true;
+}
diff --git a/src/common/gui/pfile_ext.h b/src/common/gui/pfile_ext.h
new file mode 100644
index 0000000..14c007a
--- /dev/null
+++ b/src/common/gui/pfile_ext.h
@@ -0,0 +1,29 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PFILE_EXT_H
+#define PFILE_EXT_H
+
+#include "common/global/pfile.h"
+
+namespace PURL
+{
+
+class TempFile : public FileBase
+{
+public:
+  TempFile(Log::Generic &log, const QString &extension = QString::null);
+  ~TempFile() { close(); }
+  Url url() const;
+  bool close();
+  bool openForWrite();
+};
+
+} // namespace
+
+#endif
diff --git a/src/common/gui/purl_ext.cpp b/src/common/gui/purl_ext.cpp
new file mode 100644
index 0000000..5d69d05
--- /dev/null
+++ b/src/common/gui/purl_ext.cpp
@@ -0,0 +1,111 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "common/global/purl.h"
+
+#include <qfile.h>
+#include <qapplication.h>
+#include <kio/netaccess.h>
+#include <kfileitem.h>
+#include <ktempfile.h>
+#include <kconfigbackend.h>
+
+#include "common/global/pfile.h"
+
+bool PURL::Url::copyTo(const Url &destination, Log::Generic &log) const
+{
+//#if defined(NO_KDE)
+//  Synchronous sync;
+//  if ( sync.op().copy(_url.filepath(), destination.filepath()) && sync.execute() ) {
+//    if ( show==Log::Show ) ConsoleView::sorry(i18n("Could not copy file"), sync.error());
+//    return false;
+//  }
+//#else
+  // do not overwrite
+  bool ok = KIO::NetAccess::file_copy(_url, destination._url, -1, false, false, qApp->mainWidget());
+  if ( !ok ) log.sorry(i18n("Could not copy file"), KIO::NetAccess::lastErrorString());
+  return ok;
+//#endif
+}
+
+bool PURL::Url::create(Log::Generic &log) const
+{
+//#if defined(NO_KDE)
+//  QByteArray a;
+//  Synchronous sync;
+//  if ( sync.op().put(a, _url.filepath()) && sync.execute() ) {
+//    if ( show==Log::Show ) ConsoleView::sorry(i18n("Could not create file"), sync.error());
+//    return false;
+//  }
+//#else
+  // assume file do no exist if ioslave cannot tell...
+  if ( KIO::NetAccess::exists(_url, false, qApp->mainWidget()) ) return true;
+  KTempFile tmp;
+  tmp.setAutoDelete(true);
+  // do not overwrite
+  bool ok = KIO::NetAccess::file_copy(tmp.name(), _url, -1, false, false, qApp->mainWidget());
+  if ( !ok ) log.sorry(i18n("Could not create file"), KIO::NetAccess::lastErrorString());
+//#endif
+  return ok;
+}
+
+bool PURL::Url::write(const QString &text, Log::Generic &log) const
+{
+  File file(*this, log);
+  if ( !file.openForWrite() ) return false;
+  file.stream() << text;
+  return file.close();
+}
+
+bool PURL::Url::del(Log::Generic &log) const
+{
+//#if defined(NO_KDE)
+//  Synchronous sync;
+//  if ( sync.op().remove(_url.filepath()) && sync.execute() ) {
+//    if ( show==Log::Show ) ConsoleView::sorry(i18n("Could not delete file"), sync.error());
+//    return false;
+//  }
+//#else
+  bool ok = KIO::NetAccess::del(_url, qApp->mainWidget());
+  if ( !ok ) log.sorry(i18n("Could not delete file."), KIO::NetAccess::lastErrorString());
+  return ok;
+//#endif
+}
+
+bool PURL::Url::isDosFile() const
+{
+  Log::Base log;
+  File file(*this, log);
+  if( !file.openForRead() ) return false;
+  int oldc = 0;
+  for (;;) {
+    int c = file.qfile()->getch();
+    if ( c==-1 )  break;
+    if( c=='\n' && oldc=='\r' ) return true;
+    oldc = c;
+  }
+  return false;
+}
+
+//-----------------------------------------------------------------------------
+bool PURL::Directory::create(Log::Generic &log) const
+{
+//#if defined(NO_KDE)
+//  Synchronous sync;
+//  if ( sync.op().mkdir(_url.filepath()) && sync.execute() ) {
+//    if ( show==Log::Show ) ConsoleView::sorry(i18n("Could not create directory"), sync.error());
+//    return false;
+//  }
+//#else
+  // assume dir do no exist if ioslave cannot tell...
+  if ( KIO::NetAccess::exists(_url, false, qApp->mainWidget()) ) return true;
+  bool ok = KIO::NetAccess::mkdir(_url, qApp->mainWidget());
+  if ( !ok ) log.sorry(i18n("Could not create directory"), KIO::NetAccess::lastErrorString());
+//#endif
+  return ok;
+}
diff --git a/src/common/gui/purl_gui.cpp b/src/common/gui/purl_gui.cpp
new file mode 100644
index 0000000..d81fdb6
--- /dev/null
+++ b/src/common/gui/purl_gui.cpp
@@ -0,0 +1,151 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "purl_gui.h"
+
+#include <qlayout.h>
+#include <kiconloader.h>
+#include <kpushbutton.h>
+#include <krun.h>
+#include <kfiledialog.h>
+#include <kdirselectdialog.h>
+
+#include "misc_gui.h"
+
+//-----------------------------------------------------------------------------
+PURL::Url PURL::getOpenUrl(const QString &startDir, const QString &filter,
+                           QWidget *widget, const QString &caption)
+{
+  return KFileDialog::getOpenURL(startDir, filter, widget, caption);
+}
+
+PURL::UrlList PURL::getOpenUrls(const QString &startDir, const QString &filter,
+                                QWidget *widget, const QString &caption)
+{
+  return KFileDialog::getOpenURLs(startDir, filter, widget, caption);
+}
+
+PURL::Url PURL::getSaveUrl(const QString &startDir, const QString &filter,
+                           QWidget *widget, const QString &caption,
+                           SaveAction action)
+{
+  Url url = KFileDialog::getSaveURL(startDir, filter, widget, caption);
+  if ( url.isEmpty() ) return Url();
+  switch (action) {
+    case NoSaveAction: break;
+    case AskOverwrite:
+      if ( url.exists() ) {
+        if ( !MessageBox::askContinue(i18n("File \"%1\" already exists. Overwrite ?").arg(url.pretty())) ) return Url();
+      }
+      break;
+    case CancelIfExists:
+      if ( url.exists() ) return Url();
+      break;
+  }
+  return url;
+}
+
+PURL::Directory PURL::getExistingDirectory(const QString &startDir, QWidget *widget,
+                                           const QString &caption)
+{
+  KURL kurl = KDirSelectDialog::selectDirectory(startDir, false, widget, caption);
+  if ( kurl.isEmpty() ) return Directory();
+  return Directory(kurl.path(1));
+}
+
+QPixmap PURL::icon(FileType type)
+{
+  if (type.data().xpm_icon) return QPixmap(type.data().xpm_icon);
+  if ( hasMimetype(type) ) return KMimeType::mimeType(type.data().mimetype)->pixmap(KIcon::Small);
+  return QPixmap();
+}
+
+bool PURL::hasMimetype(FileType type)
+{
+  if ( type.data().mimetype==0 ) return false;
+  KMimeType::Ptr ptr = KMimeType::mimeType(type.data().mimetype);
+  return ( ptr!=KMimeType::defaultMimeTypePtr() );
+}
+
+//-----------------------------------------------------------------------------
+PURL::Label::Label(const QString &url, const QString &text,
+                   QWidget *parent, const char *name)
+  : KURLLabel(url, text, parent, name)
+{
+  connect(this, SIGNAL(leftClickedURL()), SLOT(urlClickedSlot()));
+}
+
+void PURL::Label::urlClickedSlot()
+{
+  (void)new KRun(url());
+}
+
+//-----------------------------------------------------------------------------
+PURL::BaseWidget::BaseWidget(QWidget *parent, const char *name)
+  : QWidget(parent, name)
+{
+  init();
+}
+
+PURL::BaseWidget::BaseWidget(const QString &defaultDir, QWidget *parent, const char *name)
+  : QWidget(parent, name), _defaultDir(defaultDir)
+{
+  init();
+}
+
+void PURL::BaseWidget::init()
+{
+  QHBoxLayout *top = new QHBoxLayout(this, 0, 10);
+
+  _edit = new KLineEdit(this);
+  connect(_edit, SIGNAL(textChanged(const QString &)), SIGNAL(changed()));
+  top->addWidget(_edit);
+  KIconLoader loader;
+  QIconSet iconset = loader.loadIcon("fileopen", KIcon::Toolbar);
+  QPushButton *button = new  KPushButton(iconset, QString::null, this);
+  connect(button, SIGNAL(clicked()), SLOT(buttonClicked()));
+  top->addWidget(button);
+}
+
+//----------------------------------------------------------------------------
+void PURL::DirectoryWidget::buttonClicked()
+{
+  Directory dir = getExistingDirectory(_defaultDir, this, i18n("Select Directory"));
+  if ( dir.isEmpty() ) return;
+  _edit->setText(dir.path());
+  emit changed();
+}
+
+//----------------------------------------------------------------------------
+PURL::DirectoriesWidget::DirectoriesWidget(const QString &title, QWidget *parent, const char *name)
+  : QVGroupBox(title, parent, name)
+{
+  init(QString::null);
+}
+
+PURL::DirectoriesWidget::DirectoriesWidget(const QString &title, const QString &defaultDir, QWidget *parent, const char *name)
+  : QVGroupBox(title, parent, name)
+{
+  init(defaultDir);
+}
+
+void PURL::DirectoriesWidget::init(const QString &defaultDir)
+{
+  DirectoryWidget *edit = new DirectoryWidget(defaultDir);
+  _editListBox = new EditListBox(1, edit, edit->lineEdit(), this, "directories_editlistbox");
+  connect(_editListBox, SIGNAL(changed()), SIGNAL(changed()));
+}
+
+//----------------------------------------------------------------------------
+void PURL::UrlWidget::buttonClicked()
+{
+  Url url = getOpenUrl(_defaultDir, _filter, this, i18n("Select File"));
+  if ( url.isEmpty() ) return;
+  _edit->setText(url.filepath());
+  emit changed();
+}
diff --git a/src/common/gui/purl_gui.h b/src/common/gui/purl_gui.h
new file mode 100644
index 0000000..a11bedf
--- /dev/null
+++ b/src/common/gui/purl_gui.h
@@ -0,0 +1,120 @@
+/***************************************************************************
+ *   Copyright (C) 2006-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PURL_GUI_H
+#define PURL_GUI_H
+
+#include <qvgroupbox.h>
+#include <klineedit.h>
+#include <klocale.h>
+#include <kurllabel.h>
+
+#include "common/global/purl.h"
+#include "editlistbox.h"
+
+namespace PURL
+{
+//-----------------------------------------------------------------------------
+extern bool hasMimetype(FileType type);
+extern QPixmap icon(FileType type);
+extern Directory getExistingDirectory(const QString &startDir, QWidget *widget, const QString &caption);
+extern Url getOpenUrl(const QString &startDir, const QString &filter, QWidget *widget,
+                      const QString &caption);
+extern UrlList getOpenUrls(const QString &startDir, const QString &filter, QWidget *widget,
+                          const QString &caption);
+enum SaveAction { NoSaveAction, AskOverwrite, CancelIfExists };
+extern Url getSaveUrl(const QString &startDir, const QString &filter, QWidget *widget,
+                      const QString &caption, SaveAction action);
+
+//-----------------------------------------------------------------------------
+class Label : public KURLLabel
+{
+Q_OBJECT
+public:
+  Label(const QString &url, const QString &text, QWidget *parent = 0, const char *name = 0);
+
+private slots:
+  void urlClickedSlot();
+};
+
+//-----------------------------------------------------------------------------
+class BaseWidget : public QWidget
+{
+Q_OBJECT
+public:
+  BaseWidget(QWidget *parent = 0, const char *name = 0);
+  BaseWidget(const QString &defaultDir, QWidget *parent = 0, const char *name = 0);
+  KLineEdit *lineEdit() { return _edit; }
+
+signals:
+  void changed();
+
+protected slots:
+  virtual void buttonClicked() = 0;
+
+protected:
+  QString    _defaultDir;
+  KLineEdit *_edit;
+
+  void init();
+};
+
+//-----------------------------------------------------------------------------
+class DirectoryWidget : public BaseWidget
+{
+Q_OBJECT
+public:
+  DirectoryWidget(QWidget *parent = 0, const char *name = 0) : BaseWidget(parent, name) {}
+  DirectoryWidget(const QString &defaultDir, QWidget *parent = 0, const char *name = 0) : BaseWidget(defaultDir, parent, name) {}
+  void setDirectory(const Directory &dir) { _edit->setText(dir.path()); }
+  Directory directory() const { return _edit->text(); }
+
+protected slots:
+  virtual void buttonClicked();
+};
+
+//-----------------------------------------------------------------------------
+class DirectoriesWidget : public QVGroupBox
+{
+Q_OBJECT
+public:
+  DirectoriesWidget(const QString &title, QWidget *parent = 0, const char *name = 0);
+  DirectoriesWidget(const QString &title, const QString &defaultDir, QWidget *parent = 0, const char *name = 0);
+  void setDirectories(const QStringList &dirs) { _editListBox->setTexts(dirs); }
+  QStringList directories() const { return _editListBox->texts(); }
+
+signals:
+  void changed();
+
+private:
+  EditListBox *_editListBox;
+  void init(const QString &defaultDir);
+};
+
+//-----------------------------------------------------------------------------
+class UrlWidget : public BaseWidget
+{
+Q_OBJECT
+public:
+  UrlWidget(const QString &filter, QWidget *parent = 0, const char *name = 0)
+    : BaseWidget(parent, name), _filter(filter) {}
+  UrlWidget(const QString &defaultDir, const QString &filter, QWidget *parent = 0, const char *name = 0)
+    : BaseWidget(defaultDir, parent, name), _filter(filter) {}
+  Url url() const { return PURL::Url::fromPathOrUrl(_edit->text()); }
+  void setUrl(const Url &url) { _edit->setText(url.filepath()); }
+
+protected slots:
+  virtual void buttonClicked();
+
+private:
+  QString _filter;
+};
+
+} // namespace
+
+#endif
diff --git a/src/common/nokde/nokde.pro b/src/common/nokde/nokde.pro
new file mode 100644
index 0000000..aa92599
--- /dev/null
+++ b/src/common/nokde/nokde.pro
@@ -0,0 +1,8 @@
+STOPDIR = ../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = nokde
+HEADERS += nokde_klocale.h nokde_kaboutdata.h nokde_kcmdlineargs.h nokde_kprocess.h
+SOURCES += nokde_klocale.cpp nokde_kaboutdata.cpp nokde_kcmdlineargs.cpp nokde_kprocess.cpp
+win32:HEADERS += win32_utils.h
+win32:SOURCES += win32_utils.c
\ No newline at end of file
diff --git a/src/common/nokde/nokde_kaboutdata.cpp b/src/common/nokde/nokde_kaboutdata.cpp
new file mode 100644
index 0000000..21b6917
--- /dev/null
+++ b/src/common/nokde/nokde_kaboutdata.cpp
@@ -0,0 +1,469 @@
+// modified from KDE 3.4 for Windows port (Nicolas Hadacek)
+
+/*
+ * This file is part of the KDE Libraries
+ * Copyright (C) 2000 Espen Sand (espen@kde.org)
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Library General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * Library General Public License for more details.
+ *
+ * You should have received a copy of the GNU Library General Public License
+ * along with this library; see the file COPYING.LIB.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ * Boston, MA 02110-1301, USA.
+ *
+ */
+
+
+#include "nokde_kaboutdata.h"
+//#include <kstandarddirs.h>
+#include <qfile.h>
+#include <qtextstream.h>
+#include <qstringlist.h>
+
+QString
+KAboutPerson::name() const
+{
+   return QString::fromUtf8(mName);
+}
+
+QString
+KAboutPerson::task() const
+{
+   if (mTask && *mTask)
+      return i18n(mTask);
+   else
+      return QString::null;
+}
+
+QString
+KAboutPerson::emailAddress() const
+{
+   return QString::fromUtf8(mEmailAddress);
+}
+
+
+QString
+KAboutPerson::webAddress() const
+{
+   return QString::fromUtf8(mWebAddress);
+}
+
+
+KAboutTranslator::KAboutTranslator(const QString & name,
+                const QString & emailAddress)
+{
+    mName=name;
+    mEmail=emailAddress;
+}
+
+QString KAboutTranslator::name() const
+{
+    return mName;
+}
+
+QString KAboutTranslator::emailAddress() const
+{
+    return mEmail;
+}
+
+class KAboutDataPrivate
+{
+public:
+    KAboutDataPrivate()
+        : translatorName("_: NAME OF TRANSLATORS\nYour names")
+        , translatorEmail("_: EMAIL OF TRANSLATORS\nYour emails")
+        , productName(0)
+//        , programLogo(0)
+        {}
+    ~KAboutDataPrivate()
+        {
+//             delete programLogo;
+        }
+    const char *translatorName;
+    const char *translatorEmail;
+    const char *productName;
+//    QImage* programLogo;
+};
+
+
+
+KAboutData::KAboutData( const char *appName,
+                        const char *programName,
+                        const char *version,
+                        const char *shortDescription,
+                        int licenseType,
+                        const char *copyrightStatement,
+                        const char *text,
+                        const char *homePageAddress,
+                        const char *bugsEmailAddress
+                        ) :
+  mProgramName( programName ),
+  mVersion( version ),
+  mShortDescription( shortDescription ),
+  mLicenseKey( licenseType ),
+  mCopyrightStatement( copyrightStatement ),
+  mOtherText( text ),
+  mHomepageAddress( homePageAddress ),
+  mBugEmailAddress( bugsEmailAddress ),
+  mLicenseText (0)
+{
+   d = new KAboutDataPrivate;
+
+   if( appName ) {
+     const char *p = strrchr(appName, '/');
+     if( p )
+         mAppName = p+1;
+     else
+         mAppName = appName;
+   } else
+     mAppName = 0;
+}
+
+KAboutData::~KAboutData()
+{
+    if (mLicenseKey == License_File)
+        delete [] mLicenseText;
+    delete d;
+}
+
+void
+KAboutData::addAuthor( const char *name, const char *task,
+                    const char *emailAddress, const char *webAddress )
+{
+  mAuthorList.append(KAboutPerson(name,task,emailAddress,webAddress));
+}
+
+void
+KAboutData::addCredit( const char *name, const char *task,
+                    const char *emailAddress, const char *webAddress )
+{
+  mCreditList.append(KAboutPerson(name,task,emailAddress,webAddress));
+}
+
+void
+KAboutData::setTranslator( const char *name, const char *emailAddress)
+{
+  d->translatorName=name;
+  d->translatorEmail=emailAddress;
+}
+
+void
+KAboutData::setLicenseText( const char *licenseText )
+{
+  mLicenseText = licenseText;
+  mLicenseKey = License_Custom;
+}
+
+void
+KAboutData::setLicenseTextFile( const QString &file )
+{
+  mLicenseText = qstrdup(QFile::encodeName(file));
+  mLicenseKey = License_File;
+}
+
+void
+KAboutData::setAppName( const char *appName )
+{
+  mAppName = appName;
+}
+
+void
+KAboutData::setProgramName( const char* programName )
+{
+  mProgramName = programName;
+}
+
+void
+KAboutData::setVersion( const char* version )
+{
+  mVersion = version;
+}
+
+void
+KAboutData::setShortDescription( const char *shortDescription )
+{
+  mShortDescription = shortDescription;
+}
+
+void
+KAboutData::setLicense( LicenseKey licenseKey)
+{
+  mLicenseKey = licenseKey;
+}
+
+void
+KAboutData::setCopyrightStatement( const char *copyrightStatement )
+{
+  mCopyrightStatement = copyrightStatement;
+}
+
+void
+KAboutData::setOtherText( const char *otherText )
+{
+  mOtherText = otherText;
+}
+
+void
+KAboutData::setHomepage( const char *homepage )
+{
+  mHomepageAddress = homepage;
+}
+
+void
+KAboutData::setBugAddress( const char *bugAddress )
+{
+  mBugEmailAddress = bugAddress;
+}
+
+void
+KAboutData::setProductName( const char *productName )
+{
+  d->productName = productName;
+}
+
+const char *
+KAboutData::appName() const
+{
+   return mAppName;
+}
+
+const char *
+KAboutData::productName() const
+{
+   if (d->productName)
+      return d->productName;
+   else
+      return appName();
+}
+
+QString
+KAboutData::programName() const
+{
+   if (mProgramName && *mProgramName)
+      return i18n(mProgramName);
+   else
+      return QString::null;
+}
+/*
+QImage
+KAboutData::programLogo() const
+{
+    return d->programLogo ? (*d->programLogo) : QImage();
+}
+
+void
+KAboutData::setProgramLogo(const QImage& image)
+{
+    if (!d->programLogo)
+       d->programLogo = new QImage( image );
+    else
+       *d->programLogo = image;
+}
+*/
+QString
+KAboutData::version() const
+{
+   return QString::fromLatin1(mVersion);
+}
+
+QString
+KAboutData::shortDescription() const
+{
+   if (mShortDescription && *mShortDescription)
+      return i18n(mShortDescription);
+   else
+      return QString::null;
+}
+
+QString
+KAboutData::homepage() const
+{
+   return QString::fromLatin1(mHomepageAddress);
+}
+
+QString
+KAboutData::bugAddress() const
+{
+   return QString::fromLatin1(mBugEmailAddress);
+}
+
+const QValueList<KAboutPerson>
+KAboutData::authors() const
+{
+   return mAuthorList;
+}
+
+const QValueList<KAboutPerson>
+KAboutData::credits() const
+{
+   return mCreditList;
+}
+
+const QValueList<KAboutTranslator>
+KAboutData::translators() const
+{
+    QValueList<KAboutTranslator> personList;
+
+    if(d->translatorName == 0)
+        return personList;
+
+    QStringList nameList;
+    QStringList emailList;
+
+    QString names = i18n(d->translatorName);
+    if(names != QString::fromUtf8(d->translatorName))
+    {
+#if QT_VERSION < 0x040000
+        nameList = QStringList::split(',',names);
+#else
+        nameList = names.split(',', QString::SkipEmptyParts);
+#endif
+    }
+
+
+    if(d->translatorEmail)
+    {
+        QString emails = i18n(d->translatorEmail);
+
+        if(emails != QString::fromUtf8(d->translatorEmail))
+        {
+#if QT_VERSION < 0x040000
+            emailList = QStringList::split(',',emails,true);
+#else
+            emailList = emails.split(',');
+#endif
+        }
+    }
+
+
+    QStringList::Iterator nit;
+    QStringList::Iterator eit=emailList.begin();
+
+    for(nit = nameList.begin(); nit != nameList.end(); ++nit)
+    {
+        QString email;
+        if(eit != emailList.end())
+        {
+            email=*eit;
+            ++eit;
+        }
+
+        QString name=*nit;
+
+#if QT_VERSION < 0x040000
+        personList.append(KAboutTranslator(name.stripWhiteSpace(), email.stripWhiteSpace()));
+#else
+        personList.append(KAboutTranslator(name.trimmed(), email.trimmed()));
+#endif
+    }
+
+    return personList;
+}
+
+QString
+KAboutData::aboutTranslationTeam()
+{
+    return i18n("replace this with information about your translation team",
+            "<p>KDE is translated into many languages thanks to the work "
+            "of the translation teams all over the world.</p>"
+            "<p>For more information on KDE internationalization "
+            "visit http://i18n.kde.org</p>");
+}
+
+QString
+KAboutData::otherText() const
+{
+   if (mOtherText && *mOtherText)
+      return i18n(mOtherText);
+   else
+      return QString::null;
+}
+
+
+QString
+KAboutData::license() const
+{
+  QString result;
+  if (!copyrightStatement().isEmpty())
+    result = copyrightStatement() + "\n\n";
+
+  QString l;
+  QString f;
+  switch ( mLicenseKey )
+  {
+    case License_File:
+       f = QFile::decodeName(mLicenseText);
+       break;
+    case License_GPL_V2:
+       l = "GPL v2";
+       f = locate("data", "LICENSES/GPL_V2");
+       break;
+    case License_LGPL_V2:
+       l = "LGPL v2";
+       f = locate("data", "LICENSES/LGPL_V2");
+       break;
+    case License_BSD:
+       l = "BSD License";
+       f = locate("data", "LICENSES/BSD");
+       break;
+    case License_Artistic:
+       l = "Artistic License";
+       f = locate("data", "LICENSES/ARTISTIC");
+       break;
+    case License_QPL_V1_0:
+       l = "QPL v1.0";
+       f = locate("data", "LICENSES/QPL_V1.0");
+       break;
+    case License_Custom:
+       if (mLicenseText && *mLicenseText)
+          return( i18n(mLicenseText) );
+       // fall through
+    default:
+       result += i18n("No licensing terms for this program have been specified.\n"
+                   "Please check the documentation or the source for any\n"
+                   "licensing terms.\n");
+       return result;
+      }
+
+  if (!l.isEmpty())
+     result += i18n("This program is distributed under the terms of the %1.").arg( l );
+
+  if (!f.isEmpty())
+  {
+     QFile file(f);
+#if QT_VERSION < 0x040000
+     if (file.open(IO_ReadOnly))
+#else
+     if (file.open(QIODevice::ReadOnly))
+#endif
+     {
+        result += '\n';
+        result += '\n';
+        QTextStream str(&file);
+#if QT_VERSION < 0x040000
+        result += str.read();
+#else
+        result += str.readAll();
+#endif
+     }
+  }
+
+  return result;
+}
+
+QString
+KAboutData::copyrightStatement() const
+{
+  if (mCopyrightStatement && *mCopyrightStatement)
+     return i18n(mCopyrightStatement);
+  else
+     return QString::null;
+}
diff --git a/src/common/nokde/nokde_kaboutdata.h b/src/common/nokde/nokde_kaboutdata.h
new file mode 100644
index 0000000..13076d4
--- /dev/null
+++ b/src/common/nokde/nokde_kaboutdata.h
@@ -0,0 +1,571 @@
+// modified from KDE 3.4 for Windows port (Nicolas Hadacek)
+
+/*
+ * This file is part of the KDE Libraries
+ * Copyright (C) 2000 Espen Sand (espen@kde.org)
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Library General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * Library General Public License for more details.
+ *
+ * You should have received a copy of the GNU Library General Public License
+ * along with this library; see the file COPYING.LIB.  If not, write to
+ * the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ * Boston, MA 02110-1301, USA.
+ *
+ */
+
+#include <qglobal.h>
+#if QT_VERSION < 0x040000
+#  include <qvaluelist.h>
+#else
+#  include <Qt3Support/Q3ValueList>
+#  define QValueList Q3ValueList
+#  include <QStringList>
+#endif
+#include <qstring.h>
+//#include <qimage.h>
+
+#include "nokde_klocale.h"
+
+#ifndef _KABOUTDATA_H_
+#define _KABOUTDATA_H_
+
+class KAboutPersonPrivate;
+class KAboutDataPrivate;
+
+/**
+ * This structure is used to store information about a person or developer.
+ * It can store the person's name, a task, an email address and a
+ * link to a home page. This class is intended for use in the
+ * KAboutData class, but it can be used elsewhere as well.
+ * Normally you should at least define the person's name.
+ *
+ * Example Usage within a main():
+ *
+ * KAboutData about("khello", I18N_NOOP("KHello"), "0.1",
+ *                   I18N_NOOP("A KDE version of Hello, world!"),
+ *                   KAboutData::License_LGPL,
+ *                   I18N_NOOP("Copyright (c) 2003 Developer"));
+ *
+ *   about.addAuthor("Joe Developer", I18N_NOOP("developer"), "joe@host.com", 0);
+ *   about.addCredit("Joe User", I18N_NOOP("A lot of bug reports"),
+ *                   "joe.user@host.org", 0);
+ *   KCmdLineArgs::init(argc, argv, &about);
+ */
+class KDECORE_EXPORT KAboutPerson
+{
+public:
+    /**
+     * Convenience constructor
+     *
+     * @param name The name of the person.
+     *
+     * @param task The task of this person. This string should be
+     *              marked for translation, e.g.
+     *              I18N_NOOP("Task description....")
+     *
+     * @param emailAddress The email address of the person.
+     *
+     * @param webAddress Home page of the person.
+     */
+    KAboutPerson( const char *name, const char *task,
+                  const char *emailAddress, const char *webAddress )
+    {
+      mName = name;
+      mTask = task;
+      mEmailAddress = emailAddress;
+      mWebAddress = webAddress;
+    }
+    /**
+     * @internal
+     * Don't use. Required by QValueList
+     */
+    KAboutPerson() {}
+
+    /**
+     * The person's name
+     * @return the person's name (can be QString::null, if it has been
+     *           constructed with a null name)
+     */
+    QString name() const;
+
+    /**
+     * The person's task
+     * @return the person's task (can be QString::null, if it has been
+     *           constructed with a null task)
+     */
+    QString task() const;
+
+    /**
+     * The person's email address
+     * @return the person's email address (can be QString::null, if it has been
+     *           constructed with a null email)
+     */
+    QString emailAddress() const;
+
+    /**
+     * The home page or a relevant link
+     * @return the persons home page (can be QString::null, if it has been
+     *           constructed with a null home page)
+     */
+    QString webAddress() const;
+
+private:
+    const char *mName;
+    const char *mTask;
+    const char *mEmailAddress;
+    const char *mWebAddress;
+
+    KAboutPersonPrivate *d;
+};
+
+class KAboutTranslatorPrivate;
+/**
+ * This structure is used to store information about a translator.
+ * It can store the translator's name and an email address.
+ * This class is intended for use in the KAboutData class,
+ * but it can be used elsewhere as well.
+ * Normally you should at least define the translator's name.
+ *
+ * It's not possible to use KAboutPerson for this, because
+ * KAboutPerson stores internally only const char* pointers, but the
+ * translator information is generated dynamically from the translation
+ * of a dummy string.
+*/
+class KDECORE_EXPORT KAboutTranslator
+{
+public:
+    /**
+     * Convenience constructor
+     *
+     * @param name The name of the person.
+     *
+     * @param emailAddress The email address of the person.
+     */
+    KAboutTranslator(const QString & name=QString::null,
+                     const QString & emailAddress=QString::null);
+
+    /**
+     * The translator's name
+     * @return the translators's name (can be QString::null, if it has been
+     *           constructed with a null name)
+     */
+    QString name() const;
+
+    /**
+     * The translator's email
+     * @return the translator's email address (can be QString::null, if it has been
+     *           constructed with a null email)
+     */
+    QString emailAddress() const;
+
+private:
+    QString mName;
+    QString mEmail;
+    KAboutTranslatorPrivate* d;
+};
+
+
+/**
+ * This class is used to store information about a program. It can store
+ * such values as version number, program name, home page, email address
+ * for bug reporting, multiple authors and contributors
+ * (using KAboutPerson), license and copyright information.
+ *
+ * Currently, the values set here are shown by the "About" box
+ * (see KAboutDialog), used by the bug report dialog (see KBugReport),
+ * and by the help shown on command line (see KCmdLineArgs).
+ *
+ * @short Holds information needed by the "About" box and other
+ * classes.
+ * @author Espen Sand (espen@kde.org), David Faure (faure@kde.org)
+ */
+class KDECORE_EXPORT KAboutData
+{
+  public:
+  /**
+   * Descibes the license of the software.
+   */
+    enum LicenseKey
+    {
+      License_Custom = -2,
+      License_File = -1,
+      License_Unknown = 0,
+      License_GPL  = 1,
+      License_GPL_V2 = 1,
+      License_LGPL = 2,
+      License_LGPL_V2 = 2,
+      License_BSD  = 3,
+      License_Artistic = 4,
+      License_QPL = 5,
+      License_QPL_V1_0 = 5
+    };
+
+  public:
+    /**
+     * Constructor.
+     *
+     * @param appName The program name used internally. Example: "kedit"
+     *
+     * @param programName A displayable program name string. This string
+     *        should be marked for translation. Example: I18N_NOOP("KEdit")
+     *
+     * @param version The program version string.
+     *
+     * @param shortDescription A short description of what the program does.
+     *        This string should be marked for translation.
+     *        Example: I18N_NOOP("A simple text editor.")
+     *
+     * @param licenseType The license identifier. Use setLicenseText if
+     *        you use a license not predefined here.
+     *
+     * @param copyrightStatement A copyright statement, that can look like this:
+     *        "(c) 1999-2000, Name". The string specified here is not modified
+     *        in any manner. The author information from addAuthor is not
+     *        used.
+     *
+     * @param text Some free form text, that can contain any kind of
+     *        information. The text can contain newlines. This string
+     *        should be marked for translation.
+     *
+     * @param homePageAddress The program homepage string.
+     *        Start the address with "http://". "http://some.domain" is
+     *        is correct, "some.domain" is not.
+     *
+     * @param bugsEmailAddress The bug report email address string.
+     *        This defaults to the kde.org bug system.
+     *
+     */
+    KAboutData( const char *appName,
+                const char *programName,
+                const char *version,
+                const char *shortDescription = 0,
+                int licenseType = License_Unknown,
+                const char *copyrightStatement = 0,
+                const char *text = 0,
+                const char *homePageAddress = 0,
+                const char *bugsEmailAddress = "submit@bugs.kde.org"
+                );
+
+     ~KAboutData();
+
+    /**
+     * Defines an author. You can call this function as many times you
+     * need. Each entry is appended to a list. The person in the first entry
+     * is assumed to be the leader of the project.
+     *
+     * @param name The developer's name in UTF-8 encoding.
+     *
+     * @param task What the person is responsible for. This text can contain
+     *             newlines. It should be marked for translation like this:
+     *             I18N_NOOP("Task description..."). Can be 0.
+     *
+     * @param emailAddress An Email address where the person can be reached.
+     *                     Can be 0.
+     *
+     * @param webAddress The person's homepage or a relevant link.
+     *        Start the address with "http://". "http://some.domain" is
+     *        correct, "some.domain" is not. Can be 0.
+     *
+     */
+    void addAuthor( const char *name,
+                    const char *task=0,
+                    const char *emailAddress=0,
+                    const char *webAddress=0 );
+
+    /**
+     * Defines a person that deserves credit. You can call this function
+     * as many times you need. Each entry is appended to a list.
+     *
+     * @param name The person's name in UTF-8 encoding.
+     *
+     * @param task What the person has done to deserve the honor. The
+     *        text can contain newlines. It should be marked for
+     *        translation like this: I18N_NOOP("Task description...")
+     *        Can be 0.
+     *
+     * @param emailAddress An Email address when the person can be reached.
+     *        Can be 0.
+     *
+     * @param webAddress The person's homepage or a relevant link.
+     *        Start the address with "http://". "http://some.domain" is
+     *        is correct, "some.domain" is not. Can be 0.
+     *
+     */
+    void addCredit( const char *name,
+                    const char *task=0,
+                    const char *emailAddress=0,
+                    const char *webAddress=0 );
+
+    /**
+     * Sets the name of the translator of the gui. Since this depends
+     * on the language, just use a dummy text marked for translation.
+     *
+     * For example:
+     * \code
+     * setTranslator(I18N_NOOP("_: NAME OF TRANSLATORS\\nYour names")
+     * ,I18N_NOOP("_: EMAIL OF TRANSLATORS\\nYour emails"));
+     * \endcode
+     *
+     * The translator can then translate this dummy text with his name
+     * or with a list of names separated with ",".
+     * If there is no translation or the application is used with the
+     * default language, this function call is ignored.
+     *
+     * Note: If you are using the default KDE automake environment,
+     * there is no need to use this function, because the two
+     * default strings above are added to the applications po file
+     * automatically.
+     *
+     * @param name the name of the translator
+     * @param emailAddress the email address of the translator
+     * @see KAboutTranslator
+     */
+    void setTranslator(const char* name, const char* emailAddress);
+
+    /**
+     * Defines a license text.
+     *
+     * The text will be translated if it got marked for
+     * translations with the I18N_NOOP() macro.
+     *
+     * Example:
+     * \code
+     * setLicenseText( I18N_NOOP("This is my license"));
+     * \endcode
+     *
+     * NOTE: No copy of the text is made.
+     *
+     * @param license The license text in utf8 encoding.
+     */
+    void setLicenseText( const char *license );
+
+    /**
+     * Defines a license text.
+     *
+     * @param file File containing the license text.
+     */
+    void setLicenseTextFile( const QString &file );
+
+    /**
+     * Defines the program name used internally.
+     *
+     * @param appName The application name. Example: "kate".
+     */
+    void setAppName( const char *appName );
+
+    /**
+     * Defines the displayable program name string.
+     *
+     * @param programName The program name. This string should be
+     *        marked for translation.
+     *        Example: I18N_NOOP("Advanced Text Editor").
+     */
+    void setProgramName( const char* programName );
+
+    /**
+     * Defines the program logo.
+     * Use this if you need to have application logo
+     * in AboutData other than application icon.
+     *
+     * @param image logo image.
+     * @see programLogo()
+     * @since 3.4
+    */
+//    void setProgramLogo(const QImage& image);
+
+    /**
+     * Defines the program version string.
+     *
+     * @param version The program version.
+     */
+    void setVersion( const char* version );
+
+    /**
+     * Defines a short description of what the program does.
+     *
+     * @param shortDescription The program description This string should be marked
+     *        for translation. Example: I18N_NOOP("An advanced text editor
+     *        with syntax highlithing support.").
+     */
+    void setShortDescription( const char *shortDescription );
+
+    /**
+     * Defines the license identifier.
+     *
+     * @param licenseKey The license identifier.
+     */
+    void setLicense( LicenseKey licenseKey);
+
+    /**
+     * Defines the copyright statement to show when displaying the license.
+     *
+     * @param copyrightStatement A copyright statement, that can look like
+     *        this: "(c) 1999-2000, Name". The string specified here is not
+     *        modified in any manner. The author information from addAuthor
+     *        is not used.
+     */
+    void setCopyrightStatement( const char *copyrightStatement );
+
+    /**
+     * Defines the additional text to show in the about dialog.
+     *
+     * @param otherText Some free form text, that can contain any kind of
+     *        information. The text can contain newlines. This string
+     *        should be marked for translation.
+     */
+    void setOtherText( const char *otherText );
+
+    /**
+     * Defines the program homepage.
+     *
+     * @param homepage The program homepage string.
+     *        Start the address with "http://". "http://kate.kde.org" is
+     *        is correct, "kde.kde.org" is not.
+     */
+    void setHomepage( const char *homepage );
+
+    /**
+     * Defines the address where bug reports should be sent.
+     *
+     * @param bugAddress The bug report email address string.
+     *        This defaults to the kde.org bug system.
+     */
+    void setBugAddress( const char *bugAddress );
+
+    /**
+     * Defines the product name wich will be used in the KBugReport dialog.
+     * By default it's the appName, but you can overwrite it here to provide
+     * support for special components e.g. 'product/component' like
+     * 'kontact/summary'.
+     *
+     * @param name The name of product
+     */
+    void setProductName( const char *name );
+
+    /**
+     * Returns the application's internal name.
+     * @return the internal program name.
+     */
+    const char *appName() const;
+
+    /**
+     * Returns the application's product name, which will be used in KBugReport
+     * dialog. By default it returns appName(), otherwise the one which is set
+     * with setProductName()
+     *
+     * @return the product name.
+     */
+    const char *productName() const;
+
+    /**
+     * Returns the translated program name.
+     * @return the program name (translated).
+     */
+    QString programName() const;
+
+    /**
+     * Returns the program logo image.
+     * @return the program logo data or null image if there is
+     * no custom application logo defined.
+     * @since 3.4
+     */
+//    QImage programLogo() const;
+
+    /**
+     * Returns the program's version.
+     * @return the version string.
+     */
+    QString version() const;
+
+    /**
+     * Returns a short, translated description.
+     * @return the short description (translated). Can be
+     *         QString::null if not set.
+     */
+    QString shortDescription() const;
+
+    /**
+     * Returns the application homepage.
+     * @return the application homepage URL. Can be QString::null if
+     *         not set.
+     */
+    QString homepage() const;
+
+    /**
+     * Returns the email address for bugs.
+     * @return the email address where to report bugs.
+     */
+    QString bugAddress() const;
+
+    /**
+     * Returns a list of authors.
+     * @return author information (list of persons).
+     */
+    const QValueList<KAboutPerson> authors() const;
+
+    /**
+     * Returns a list of persons who contributed.
+     * @return credit information (list of persons).
+     */
+    const QValueList<KAboutPerson> credits() const;
+
+    /**
+     * Returns a list of translators.
+     * @return translators information (list of persons)
+     */
+    const QValueList<KAboutTranslator> translators() const;
+
+    /**
+     * Returns a message about the translation team.
+     * @return a message about the translation team
+     */
+    static QString aboutTranslationTeam();
+
+    /**
+     * Returns a translated, free form text.
+     * @return the free form text (translated). Can be QString::null if not set.
+     */
+    QString otherText() const;
+
+    /**
+     * Returns the license. If the licenseType argument of the constructor has been
+     * used, any text defined by setLicenseText is ignored,
+     * and the standard text for the chosen license will be returned.
+     *
+     * @return The license text.
+     */
+    QString license() const;
+
+    /**
+     * Returns the copyright statement.
+     * @return the copyright statement. Can be QString::null if not set.
+     */
+    QString copyrightStatement() const;
+
+  private:
+    const char *mAppName;
+    const char *mProgramName;
+    const char *mVersion;
+    const char *mShortDescription;
+    int mLicenseKey;
+    const char *mCopyrightStatement;
+    const char *mOtherText;
+    const char *mHomepageAddress;
+    const char *mBugEmailAddress;
+    QValueList<KAboutPerson> mAuthorList;
+    QValueList<KAboutPerson> mCreditList;
+    const char *mLicenseText;
+
+    KAboutDataPrivate *d;
+};
+
+#endif
+
diff --git a/src/common/nokde/nokde_kcmdlineargs.cpp b/src/common/nokde/nokde_kcmdlineargs.cpp
new file mode 100644
index 0000000..7f026fe
--- /dev/null
+++ b/src/common/nokde/nokde_kcmdlineargs.cpp
@@ -0,0 +1,1329 @@
+// modified from KDE 3.4 for Windows port (Nicolas Hadacek)
+
+/*
+   Copyright (C) 1999 Waldo Bastian <bastian@kde.org>
+
+   This library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Library General Public
+   License version 2 as published by the Free Software Foundation.
+
+   This library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Library General Public License for more details.
+
+   You should have received a copy of the GNU Library General Public License
+   along with this library; see the file COPYING.LIB.  If not, write to
+   the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+   Boston, MA 02110-1301, USA.
+*/
+
+//#include <config.h>
+
+#include <sys/param.h>
+
+#include <assert.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+
+#ifdef HAVE_LIMITS_H
+#include <limits.h>
+#endif
+
+#include <qdir.h>
+#include <qfile.h>
+#include <qurl.h>
+
+#include <qstringlist.h>
+#if QT_VERSION<0x040000
+#  include <qasciidict.h>
+#  include <qstrlist.h>
+#else
+#  include <Qt3Support/Q3StrList>
+#  define QGList Q3GList
+#  define QStrList Q3StrList
+#  include <Qt3Support/Q3AsciiDict>
+#  define QGDict Q3GDict
+#  define QAsciiDict Q3AsciiDict
+#  include <Qt3Support/Q3PtrCollection>
+#  define QPtrCollection Q3PtrCollection
+#endif
+
+
+#include "nokde_kcmdlineargs.h"
+#include "nokde_kaboutdata.h"
+#include "nokde_klocale.h"
+//#include <kapplication.h>
+//#include <kglobal.h>
+//#include <kstringhandler.h>
+//#include <kstaticdeleter.h>
+
+#ifdef Q_WS_X11
+#define DISPLAY "DISPLAY"
+#elif defined(Q_WS_QWS)
+#define DISPLAY "QWS_DISPLAY"
+#endif
+
+#ifdef Q_WS_WIN
+#include <win32_utils.h>
+#endif
+
+template class QAsciiDict<QCString>;
+template class QPtrList<KCmdLineArgs>;
+
+class KCmdLineParsedOptions : public QAsciiDict<QCString>
+{
+public:
+   KCmdLineParsedOptions()
+     : QAsciiDict<QCString>( 7 ) { }
+
+   // WABA: Huh?
+   // The compiler doesn't find KCmdLineParsedOptions::write(s) by itself ???
+   // WABA: No, because there is another write function that hides the
+   // write function in the base class even though this function has a
+   // different signature. (obscure C++ feature)
+   QDataStream& save( QDataStream &s) const
+   { return QGDict::write(s); }
+
+   QDataStream& load( QDataStream &s)
+   { return QGDict::read(s); }
+
+protected:
+   virtual QDataStream& write( QDataStream &s, QPtrCollection::Item data) const
+   {
+      QCString *str = (QCString *) data;
+      s << (*str);
+      return s;
+   }
+
+   virtual QDataStream& read( QDataStream &s, QPtrCollection::Item &item)
+   {
+      QCString *str = new QCString;
+      s >> (*str);
+      item = (void *)str;
+      return s;
+   }
+
+};
+
+class KCmdLineParsedArgs : public QStrList
+{
+public:
+   KCmdLineParsedArgs()
+     : QStrList( true ) { }
+   QDataStream& save( QDataStream &s) const
+   { return QGList::write(s); }
+
+   QDataStream& load( QDataStream &s)
+   { return QGList::read(s); }
+};
+
+
+class KCmdLineArgsList: public QPtrList<KCmdLineArgs>
+{
+public:
+   KCmdLineArgsList() { }
+};
+
+KCmdLineArgsList *KCmdLineArgs::argsList = 0;
+int KCmdLineArgs::argc = 0;
+char **KCmdLineArgs::argv = 0;
+char *KCmdLineArgs::mCwd = 0;
+//static KStaticDeleter <char> mCwdd;
+const KAboutData *KCmdLineArgs::about = 0;
+bool KCmdLineArgs::parsed = false;
+bool KCmdLineArgs::ignoreUnknown = false;
+
+//
+// Static functions
+//
+
+void
+KCmdLineArgs::init(int _argc, char **_argv, const char *_appname, const char* programName,
+                   const char *_description, const char *_version, bool noKApp)
+{
+   init(_argc, _argv,
+        new KAboutData(_appname, programName, _version, _description),
+        noKApp);
+}
+
+void
+KCmdLineArgs::init(int _argc, char **_argv, const char *_appname,
+                   const char *_description, const char *_version, bool noKApp)
+{
+   init(_argc, _argv,
+        new KAboutData(_appname, _appname, _version, _description),
+        noKApp);
+}
+
+void
+KCmdLineArgs::initIgnore(int _argc, char **_argv, const char *_appname )
+{
+   init(_argc, _argv,
+        new KAboutData(_appname, _appname, "unknown", "KDE Application", false));
+   ignoreUnknown = true;
+}
+
+void
+KCmdLineArgs::init(const KAboutData* ab)
+{
+   char **_argv = (char **) malloc(sizeof(char *));
+   _argv[0] = (char *) ab->appName();
+   init(1,_argv,ab, true);
+}
+
+
+void
+KCmdLineArgs::init(int _argc, char **_argv, const KAboutData *_about, bool /*noKApp*/)
+{
+   argc = _argc;
+   argv = _argv;
+
+   if (!argv)
+   {
+      fprintf(stderr, "\n\nFAILURE (KCmdLineArgs):\n");
+      fprintf(stderr, "Passing null-pointer to 'argv' is not allowed.\n\n");
+
+      assert( 0 );
+      exit(255);
+   }
+
+   // Strip path from argv[0]
+   if (argc) {
+     char *p = strrchr( argv[0], '/');
+     if (p)
+       argv[0] = p+1;
+   }
+
+   about = _about;
+   parsed = false;
+   mCwd = /*mCwdd.setObject(mCwd, */new char [PATH_MAX+1];//, true);
+   getcwd(mCwd, PATH_MAX);
+#ifdef Q_WS_WIN
+   win32_slashify(mCwd, PATH_MAX);
+#endif
+//   if (!noKApp)
+//      KApplication::addCmdLineOptions();
+}
+
+QString KCmdLineArgs::cwd()
+{
+   return QFile::decodeName(QCString(mCwd));
+}
+
+const char * KCmdLineArgs::appName()
+{
+   if (!argc) return 0;
+   return argv[0];
+}
+
+void
+KCmdLineArgs::addCmdLineOptions( const KCmdLineOptions *options, const char *name,
+                                 const char *id, const char *afterId)
+{
+   if (!argsList)
+      argsList = new KCmdLineArgsList();
+
+   int pos = argsList->count();
+
+   if (pos && id && argsList->last() && !argsList->last()->name)
+      pos--;
+
+   KCmdLineArgs *args;
+   int i = 0;
+   for(args = argsList->first(); args; args = argsList->next(), i++)
+   {
+      if (!id && !args->id)
+         return; // Options already present.
+
+      if (id && args->id && (::qstrcmp(id, args->id) == 0))
+         return; // Options already present.
+
+      if (afterId && args->id && (::qstrcmp(afterId, args->id) == 0))
+         pos = i+1;
+   }
+
+   assert( parsed == false ); // You must add _ALL_ cmd line options
+                              // before accessing the arguments!
+   args = new KCmdLineArgs(options, name, id);
+   argsList->insert(pos, args);
+}
+
+void
+KCmdLineArgs::saveAppArgs( QDataStream &ds)
+{
+   if (!parsed)
+      parseAllArgs();
+
+   // Remove Qt and KDE options.
+   removeArgs("qt");
+   removeArgs("kde");
+
+   QCString qCwd = mCwd;
+   ds << qCwd;
+
+   uint count = argsList ? argsList->count() : 0;
+   ds << count;
+
+   if (!count) return;
+
+   KCmdLineArgs *args;
+   for(args = argsList->first(); args; args = argsList->next())
+   {
+      ds << QCString(args->id);
+      args->save(ds);
+   }
+}
+
+void
+KCmdLineArgs::loadAppArgs( QDataStream &ds)
+{
+   // Remove Qt and KDE options.
+   removeArgs("qt");
+   removeArgs("kde");
+
+   KCmdLineArgs *args;
+   if ( argsList ) {
+      for(args = argsList->first(); args; args = argsList->next())
+      {
+         args->clear();
+      }
+   }
+
+   if (ds.atEnd())
+      return;
+
+   QCString qCwd;
+   ds >> qCwd;
+   delete [] mCwd;
+
+   mCwd = /*mCwdd.setObject(mCwd, */new char[qCwd.length()+1];//, true);
+   strncpy(mCwd, qCwd.data(), qCwd.length()+1);
+
+   uint count;
+   ds >> count;
+
+   while(count--)
+   {
+     QCString id;
+     ds >> id;
+     assert( argsList );
+     for(args = argsList->first(); args; args = argsList->next())
+     {
+       if (args->id  == id)
+       {
+          args->load(ds);
+          break;
+       }
+     }
+   }
+   parsed = true;
+}
+
+KCmdLineArgs *KCmdLineArgs::parsedArgs(const char *id)
+{
+   KCmdLineArgs *args = argsList ? argsList->first() : 0;
+   while(args)
+   {
+      if ((id && ::qstrcmp(args->id, id) == 0) || (!id && !args->id))
+      {
+          if (!parsed)
+             parseAllArgs();
+          return args;
+      }
+      args = argsList->next();
+   }
+
+   return args;
+}
+
+void KCmdLineArgs::removeArgs(const char *id)
+{
+   KCmdLineArgs *args = argsList ? argsList->first() : 0;
+   while(args)
+   {
+      if (args->id && id && ::qstrcmp(args->id, id) == 0)
+      {
+          if (!parsed)
+             parseAllArgs();
+          break;
+      }
+      args = argsList->next();
+   }
+
+   if (args)
+      delete args;
+}
+
+/*
+ * @return:
+ *  0 - option not found.
+ *  1 - option found                    // -fork
+ *  2 - inverse option found ('no')     // -nofork
+ *  3 - option + arg found              // -fork now
+ *
+ *  +4 - no more options follow         // !fork
+ */
+static int
+findOption(const KCmdLineOptions *options, QCString &opt,
+           const char *&opt_name, const char *&def, bool &enabled)
+{
+   int result;
+   bool inverse;
+   int len = opt.length();
+   while(options && options->name)
+   {
+      result = 0;
+      inverse = false;
+      opt_name = options->name;
+      if ((opt_name[0] == ':') || (opt_name[0] == 0))
+      {
+         options++;
+         continue;
+      }
+
+      if (opt_name[0] == '!')
+      {
+         opt_name++;
+         result = 4;
+      }
+      if ((opt_name[0] == 'n') && (opt_name[1] == 'o'))
+      {
+         opt_name += 2;
+         inverse = true;
+      }
+      if (strncmp(opt.data(), opt_name, len) == 0)
+      {
+         opt_name += len;
+         if (!opt_name[0])
+         {
+            if (inverse)
+               return result+2;
+
+            if (!options->description)
+            {
+               options++;
+               if (!options->name)
+                  return result+0;
+               QCString nextOption = options->name;
+#  if QT_VERSION<0x040000
+               int p = nextOption.find(' ');
+#else
+               int p = QString(nextOption).indexOf(' ');
+#endif
+               if (p > 0)
+                  nextOption = nextOption.left(p);
+               if (strncmp(nextOption.data(), "no", 2) == 0)
+               {
+                  nextOption = nextOption.mid(2);
+                  enabled = !enabled;
+               }
+               result = findOption(options, nextOption, opt_name, def, enabled);
+               assert(result);
+               opt = nextOption;
+               return result;
+            }
+
+            return 1;
+         }
+         if (opt_name[0] == ' ')
+         {
+            opt_name++;
+            def = options->def;
+            return result+3;
+         }
+      }
+
+      options++;
+   }
+   return 0;
+}
+
+
+void
+KCmdLineArgs::findOption(const char *_opt, QCString opt, int &i, bool _enabled, bool &moreOptions)
+{
+   KCmdLineArgs *args = argsList->first();
+   const char *opt_name;
+   const char *def;
+   QCString argument;
+#  if QT_VERSION<0x040000
+   int j = opt.find('=');
+#else
+   int j = QString(opt).indexOf('=');
+#endif
+   if (j != -1)
+   {
+      argument = opt.mid(j+1);
+      opt = opt.left(j);
+   }
+
+   bool enabled = true;
+   int result = 0;
+   while (args)
+   {
+      enabled = _enabled;
+      result = ::findOption(args->options, opt, opt_name, def, enabled);
+      if (result) break;
+      args = argsList->next();
+   }
+   if (!args && (_opt[0] == '-') && _opt[1] && (_opt[1] != '-'))
+   {
+      // Option not found check if it is a valid option
+      // in the style of -Pprinter1 or ps -aux
+      int p = 1;
+      while (true)
+      {
+         QCString singleCharOption = " ";
+         singleCharOption[0] = _opt[p];
+         args = argsList->first();
+         while (args)
+         {
+            enabled = _enabled;
+            result = ::findOption(args->options, singleCharOption, opt_name, def, enabled);
+            if (result) break;
+            args = argsList->next();
+         }
+         if (!args)
+            break; // Unknown argument
+
+         p++;
+         if (result == 1) // Single option
+         {
+            args->setOption(singleCharOption, enabled);
+            if (_opt[p])
+               continue; // Next option
+            else
+               return; // Finished
+         }
+         else if (result == 3) // This option takes an argument
+         {
+            if (argument.isEmpty())
+            {
+               argument = _opt+p;
+            }
+            args->setOption(singleCharOption, argument.data());
+            return;
+         }
+         break; // Unknown argument
+      }
+      args = 0;
+      result = 0;
+   }
+
+   if (!args || !result)
+   {
+      if (ignoreUnknown)
+         return;
+      enable_i18n();
+      usage( i18n("Unknown option '%1'.").arg(QString::fromLocal8Bit(_opt)));
+   }
+
+   if ((result & 4) != 0)
+   {
+      result &= ~4;
+      moreOptions = false;
+   }
+
+   if (result == 3) // This option takes an argument
+   {
+      if (!enabled)
+      {
+         if (ignoreUnknown)
+            return;
+         enable_i18n();
+         usage( i18n("Unknown option '%1'.").arg(QString::fromLocal8Bit(_opt)));
+      }
+      if (argument.isEmpty())
+      {
+         i++;
+         if (i >= argc)
+         {
+            enable_i18n();
+            usage( i18n("'%1' missing.").arg( opt_name));
+         }
+         argument = argv[i];
+      }
+      args->setOption(opt, argument.data());
+   }
+   else
+   {
+      args->setOption(opt, enabled);
+   }
+}
+
+void
+KCmdLineArgs::printQ(const QString &msg)
+{
+#  if QT_VERSION<0x040000
+   QCString localMsg = msg.local8Bit();
+#else
+   QCString localMsg = msg.toLocal8Bit();
+#endif
+   fprintf(stdout, "%s", localMsg.data());
+}
+
+void
+KCmdLineArgs::parseAllArgs()
+{
+   bool allowArgs = false;
+   bool inOptions = true;
+   bool everythingAfterArgIsArgs = false;
+   KCmdLineArgs *appOptions = argsList->last();
+   if (!appOptions->id)
+   {
+     const KCmdLineOptions *option = appOptions->options;
+     while(option && option->name)
+     {
+       if (option->name[0] == '+')
+           allowArgs = true;
+       if ( option->name[0] == '!' && option->name[1] == '+' )
+       {
+           allowArgs = true;
+           everythingAfterArgIsArgs = true;
+       }
+       option++;
+     }
+   }
+   for(int i = 1; i < argc; i++)
+   {
+      if (!argv[i])
+         continue;
+
+      if ((argv[i][0] == '-') && argv[i][1] && inOptions)
+      {
+         bool enabled = true;
+         const char *option = &argv[i][1];
+         const char *orig = argv[i];
+         if (option[0] == '-')
+         {
+            option++;
+            argv[i]++;
+            if (!option[0])
+            {
+               inOptions = false;
+               continue;
+            }
+         }
+         if (::qstrcmp(option, "help") == 0)
+         {
+            usage(0);
+         }
+         else if (strncmp(option, "help-",5) == 0)
+         {
+            usage(option+5);
+         }
+         else if ( (::qstrcmp(option, "version") == 0) ||
+                   (::qstrcmp(option, "v") == 0))
+         {
+            printQ( QString("Qt: %1\n").arg(qVersion()));
+//            printQ( QString("KDE: %1\n").arg(KDE_VERSION_STRING));
+            printQ( QString("%1: %2\n").
+                        arg(about->programName()).arg(about->version()));
+            exit(0);
+         } else if ( (::qstrcmp(option, "license") == 0) )
+         {
+            enable_i18n();
+            printQ( about->license() );
+            printQ( "\n" );
+            exit(0);
+         } else if ( ::qstrcmp( option, "author") == 0 ) {
+             enable_i18n();
+             if ( about ) {
+                 const QValueList<KAboutPerson> authors = about->authors();
+                 if ( !authors.isEmpty() ) {
+                     QString authorlist;
+                     for (QValueList<KAboutPerson>::ConstIterator it = authors.begin(); it != authors.end(); ++it ) {
+                         QString email;
+                         if ( !(*it).emailAddress().isEmpty() )
+                                 email = " <" + (*it).emailAddress() + ">";
+                         authorlist += QString("    ") + (*it).name() + email + "\n";
+                     }
+                     printQ( i18n("the 2nd argument is a list of name+address, one on each line","%1 was written by\n%2").arg ( QString(about->programName()) ).arg( authorlist ) );
+                 }
+             } else {
+                 printQ( i18n("%1 was written by somebody who wants to remain anonymous.").arg(about->programName()) );
+             }
+             if (!about->bugAddress().isEmpty())
+             {
+                if (about->bugAddress() == "submit@bugs.kde.org")
+                    printQ( i18n( "Please use http://bugs.kde.org to report bugs, do not mail the authors directly.\n" ) );
+                else
+                    printQ( i18n( "Please use %1 to report bugs, do not mail the authors directly.\n" ).arg(about->bugAddress()) );
+             }
+             exit(0);
+         } else {
+           if ((option[0] == 'n') && (option[1] == 'o'))
+           {
+              option += 2;
+              enabled = false;
+           }
+           findOption(orig, option, i, enabled, inOptions);
+         }
+      }
+      else
+      {
+         // Check whether appOptions allows these arguments
+         if (!allowArgs)
+         {
+            if (ignoreUnknown)
+               continue;
+            enable_i18n();
+            usage( i18n("Unexpected argument '%1'.").arg(QString::fromLocal8Bit(argv[i])));
+         }
+         else
+         {
+            appOptions->addArgument(argv[i]);
+            if (everythingAfterArgIsArgs)
+                inOptions = false;
+         }
+      }
+   }
+   parsed = true;
+}
+
+/**
+ * For KApplication only:
+ *
+ * Return argc
+ */
+int *
+KCmdLineArgs::qt_argc()
+{
+//   if (!argsList)
+//      KApplication::addCmdLineOptions(); // Lazy bastards!
+
+   static int qt_argc = -1;
+   if( qt_argc != -1 )
+      return &qt_argc;
+
+   KCmdLineArgs *args = parsedArgs("qt");
+   assert(args); // No qt options have been added!
+   if (!argv)
+   {
+      fprintf(stderr, "\n\nFAILURE (KCmdLineArgs):\n");
+      fprintf(stderr, "Application has not called KCmdLineArgs::init(...).\n\n");
+
+      assert( 0 );
+      exit(255);
+   }
+
+   assert(argc >= (args->count()+1));
+   qt_argc = args->count() +1;
+   return &qt_argc;
+}
+
+/**
+ * For KApplication only:
+ *
+ * Return argv
+ */
+char ***
+KCmdLineArgs::qt_argv()
+{
+//   if (!argsList)
+//      KApplication::addCmdLineOptions(); // Lazy bastards!
+
+   static char** qt_argv;
+   if( qt_argv != NULL )
+      return &qt_argv;
+
+   KCmdLineArgs *args = parsedArgs("qt");
+   assert(args); // No qt options have been added!
+   if (!argv)
+   {
+      fprintf(stderr, "\n\nFAILURE (KCmdLineArgs):\n");
+      fprintf(stderr, "Application has not called KCmdLineArgs::init(...).\n\n");
+
+      assert( 0 );
+      exit(255);
+   }
+
+   qt_argv = new char*[ args->count() + 2 ];
+   qt_argv[ 0 ] = qstrdup( appName());
+   int i = 0;
+   for(; i < args->count(); i++)
+   {
+      qt_argv[i+1] = qstrdup((char *) args->arg(i));
+   }
+   qt_argv[i+1] = 0;
+
+   return &qt_argv;
+}
+
+void
+KCmdLineArgs::enable_i18n()
+{
+    // called twice or too late
+/*    if (KGlobal::_locale)
+            return;
+
+    if (!KGlobal::_instance) {
+        KInstance *instance = new KInstance(about);
+        (void) instance->config();
+        // Don't delete instance!
+    }*/
+}
+
+void
+KCmdLineArgs::usage(const QString &error)
+{
+//    assert(KGlobal::_locale);
+#  if QT_VERSION<0x040000
+    QCString localError = error.local8Bit();
+#else
+    QCString localError = error.toLocal8Bit();
+#endif
+    if (localError[error.length()-1] == '\n')
+        localError = localError.left(error.length()-1);
+    fprintf(stderr, "%s: %s\n", argv[0], localError.data());
+
+    QString tmp = i18n("Use --help to get a list of available command line options.");
+#  if QT_VERSION<0x040000
+    localError = tmp.local8Bit();
+#else
+    localError = tmp.toLocal8Bit();
+#endif
+    fprintf(stderr, "%s: %s\n", argv[0], localError.data());
+    exit(254);
+}
+
+void
+KCmdLineArgs::usage(const char *id)
+{
+   enable_i18n();
+   assert(argsList != 0); // It's an error to call usage(...) without
+                          // having done addCmdLineOptions first!
+
+   QString optionFormatString           = "  %1 %2\n";
+   QString optionFormatStringDef        = "  %1 %2 [%3]\n";
+   QString optionHeaderString = i18n("\n%1:\n");
+   QString tmp;
+   QString usage;
+
+   KCmdLineArgs *args = argsList->last();
+
+   if (!(args->id) && (args->options) &&
+       (args->options->name) && (args->options->name[0] != '+'))
+   {
+      usage = i18n("[options] ")+usage;
+   }
+
+   while(args)
+   {
+      if (args->name)
+      {
+         usage = i18n("[%1-options]").arg(args->name)+" "+usage;
+      }
+      args = argsList->prev();
+   }
+
+   KCmdLineArgs *appOptions = argsList->last();
+   if (!appOptions->id)
+   {
+     const KCmdLineOptions *option = appOptions->options;
+     while(option && option->name)
+     {
+       if (option->name[0] == '+')
+          usage = usage + (option->name+1) + " ";
+       else if ( option->name[0] == '!' && option->name[1] == '+' )
+          usage = usage + (option->name+2) + " ";
+
+       option++;
+     }
+   }
+
+   printQ(i18n("Usage: %1 %2\n").arg(argv[0]).arg(usage));
+   printQ("\n"+about->shortDescription()+"\n");
+
+   printQ(optionHeaderString.arg(i18n("Generic options")));
+   printQ(optionFormatString.arg("--help", -25).arg(i18n("Show help about options")));
+
+   args = argsList->first();
+   while(args)
+   {
+      if (args->name && args->id)
+      {
+         QString option = QString("--help-%1").arg(args->id);
+         QString desc = i18n("Show %1 specific options").arg(args->name);
+
+         printQ(optionFormatString.arg(option, -25).arg(desc));
+      }
+      args = argsList->next();
+   }
+
+   printQ(optionFormatString.arg("--help-all",-25).arg(i18n("Show all options")));
+   printQ(optionFormatString.arg("--author",-25).arg(i18n("Show author information")));
+   printQ(optionFormatString.arg("-v, --version",-25).arg(i18n("Show version information")));
+   printQ(optionFormatString.arg("--license",-25).arg(i18n("Show license information")));
+   printQ(optionFormatString.arg("--", -25).arg(i18n("End of options")));
+
+   args = argsList->first(); // Sets current to 1st.
+
+   bool showAll = id && (::qstrcmp(id, "all") == 0);
+
+   if (!showAll)
+   {
+     while(args)
+     {
+       if (!id && !args->id) break;
+       if (id && (::qstrcmp(args->id, id) == 0)) break;
+       args = argsList->next();
+     }
+   }
+
+   while(args)
+   {
+     bool hasArgs = false;
+     bool hasOptions = false;
+     QString optionsHeader;
+     if (args->name)
+        optionsHeader = optionHeaderString.arg(i18n("%1 options").arg(QString::fromLatin1(args->name)));
+     else
+        optionsHeader = i18n("\nOptions:\n");
+
+     while (args)
+     {
+       const KCmdLineOptions *option = args->options;
+       QCString opt = "";
+//
+       while(option && option->name)
+       {
+         QString description;
+         QString descriptionRest;
+         QStringList dl;
+
+         // Option header
+         if (option->name[0] == ':')
+         {
+            if (option->description)
+            {
+               optionsHeader = "\n"+i18n(option->description);
+               if (!optionsHeader.endsWith("\n"))
+                  optionsHeader.append("\n");
+               hasOptions = false;
+            }
+            option++;
+            continue;
+         }
+
+         // Free-form comment
+         if (option->name[0] == 0)
+         {
+            if (option->description)
+            {
+               QString tmp = "\n"+i18n(option->description);
+               if (!tmp.endsWith("\n"))
+                  tmp.append("\n");
+               printQ(tmp);
+            }
+            option++;
+            continue;
+         }
+
+         // Options
+         if (option->description)
+         {
+            description = i18n(option->description);
+#  if QT_VERSION<0x040000
+            dl = QStringList::split("\n", description, true);
+#else
+            dl = description.split("\n");
+#endif
+            description = dl.first();
+            dl.erase( dl.begin() );
+         }
+         QCString name = option->name;
+         if (name[0] == '!')
+             name = name.mid(1);
+
+         if (name[0] == '+')
+         {
+            if (!hasArgs)
+            {
+               printQ(i18n("\nArguments:\n"));
+               hasArgs = true;
+            }
+
+            name = name.mid(1);
+            if ((name[0] == '[') && (name[name.length()-1] == ']'))
+               name = name.mid(1, name.length()-2);
+            printQ(optionFormatString.arg(QString(name), -25)
+                 .arg(description));
+         }
+         else
+         {
+            if (!hasOptions)
+            {
+               printQ(optionsHeader);
+               hasOptions = true;
+            }
+
+            if ((name.length() == 1) || (name[1] == ' '))
+               name = "-"+name;
+            else
+               name = "--"+name;
+            if (!option->description)
+            {
+               opt = name + ", ";
+            }
+            else
+            {
+               opt = opt + name;
+               if (!option->def)
+               {
+                  printQ(optionFormatString.arg(QString(opt), -25)
+                         .arg(description));
+               }
+               else
+               {
+                  printQ(optionFormatStringDef.arg(QString(opt), -25)
+                         .arg(description).arg(option->def));
+               }
+               opt = "";
+            }
+         }
+         for(QStringList::Iterator it = dl.begin();
+             it != dl.end();
+             ++it)
+         {
+            printQ(optionFormatString.arg("", -25).arg(*it));
+         }
+
+         option++;
+       }
+       args = argsList->next();
+       if (!args || args->name || !args->id) break;
+     }
+     if (!showAll) break;
+   }
+
+   exit(254);
+}
+
+//
+// Member functions
+//
+
+/**
+ *  Constructor.
+ *
+ *  The given arguments are assumed to be constants.
+ */
+KCmdLineArgs::KCmdLineArgs( const KCmdLineOptions *_options,
+                            const char *_name, const char *_id)
+  : options(_options), name(_name), id(_id)
+{
+  parsedOptionList = 0;
+  parsedArgList = 0;
+  isQt = (::qstrcmp(id, "qt") == 0);
+}
+
+/**
+ *  Destructor.
+ */
+KCmdLineArgs::~KCmdLineArgs()
+{
+  delete parsedOptionList;
+  delete parsedArgList;
+  if (argsList)
+     argsList->removeRef(this);
+}
+
+void
+KCmdLineArgs::clear()
+{
+   delete parsedArgList;
+   parsedArgList = 0;
+   delete parsedOptionList;
+   parsedOptionList = 0;
+}
+
+void
+KCmdLineArgs::reset()
+{
+   if ( argsList ) {
+      argsList->setAutoDelete( true );
+      argsList->clear();
+      delete argsList;
+      argsList = 0;
+   }
+   parsed = false;
+}
+
+void
+KCmdLineArgs::save( QDataStream &ds) const
+{
+   uint count = 0;
+   if (parsedOptionList)
+      parsedOptionList->save( ds );
+   else
+      ds << count;
+
+   if (parsedArgList)
+      parsedArgList->save( ds );
+   else
+      ds << count;
+}
+
+void
+KCmdLineArgs::load( QDataStream &ds)
+{
+   if (!parsedOptionList) parsedOptionList = new KCmdLineParsedOptions;
+   if (!parsedArgList) parsedArgList = new KCmdLineParsedArgs;
+
+   parsedOptionList->load( ds );
+   parsedArgList->load( ds );
+
+   if (parsedOptionList->count() == 0)
+   {
+      delete parsedOptionList;
+      parsedOptionList = 0;
+   }
+   if (parsedArgList->count() == 0)
+   {
+      delete parsedArgList;
+      parsedArgList = 0;
+   }
+}
+
+void
+KCmdLineArgs::setOption(const QCString &opt, bool enabled)
+{
+   if (isQt)
+   {
+      // Qt does it own parsing.
+      QCString arg = "-";
+      if( !enabled )
+          arg += "no";
+      arg += opt;
+      addArgument(arg);
+   }
+   if (!parsedOptionList) {
+        parsedOptionList = new KCmdLineParsedOptions;
+        parsedOptionList->setAutoDelete(true);
+   }
+
+   if (enabled)
+      parsedOptionList->replace( opt, new QCString("t") );
+   else
+      parsedOptionList->replace( opt, new QCString("f") );
+}
+
+void
+KCmdLineArgs::setOption(const QCString &opt, const char *value)
+{
+   if (isQt)
+   {
+      // Qt does it's own parsing.
+      QCString arg = "-";
+      arg += opt;
+      addArgument(arg);
+      addArgument(value);
+
+#ifdef Q_WS_X11
+      // Hack coming up!
+      if (arg == "-display")
+      {
+         setenv(DISPLAY, value, true);
+      }
+#endif
+   }
+   if (!parsedOptionList) {
+        parsedOptionList = new KCmdLineParsedOptions;
+        parsedOptionList->setAutoDelete(true);
+   }
+
+   parsedOptionList->insert( opt, new QCString(value) );
+}
+
+QCString
+KCmdLineArgs::getOption(const char *_opt) const
+{
+   QCString *value = 0;
+   if (parsedOptionList)
+   {
+      value = parsedOptionList->find(_opt);
+   }
+
+   if (value)
+      return (*value);
+
+   // Look up the default.
+   const char *opt_name;
+   const char *def;
+   bool dummy = true;
+   QCString opt = _opt;
+   int result = ::findOption( options, opt, opt_name, def, dummy) & ~4;
+
+   if (result != 3)
+   {
+      fprintf(stderr, "\n\nFAILURE (KCmdLineArgs):\n");
+      fprintf(stderr, "Application requests for getOption(\"%s\") but the \"%s\" option\n",
+                      _opt, _opt);
+      fprintf(stderr, "has never been specified via addCmdLineOptions( ... )\n\n");
+
+      assert( 0 );
+      exit(255);
+   }
+   return QCString(def);
+}
+
+QCStringList
+KCmdLineArgs::getOptionList(const char *_opt) const
+{
+   QCStringList result;
+   if (!parsedOptionList)
+      return result;
+
+   while(true)
+   {
+      QCString *value = parsedOptionList->take(_opt);
+      if (!value)
+         break;
+      result.prepend(*value);
+      delete value;
+   }
+
+   // Reinsert items in dictionary
+   // WABA: This is rather silly, but I don't want to add restrictions
+   // to the API like "you can only call this function once".
+   // I can't access all items without taking them out of the list.
+   // So taking them out and then putting them back is the only way.
+   for(QCStringList::ConstIterator it=result.begin();
+       it != result.end();
+       ++it)
+   {
+      parsedOptionList->insert(_opt, new QCString(*it));
+   }
+   return result;
+}
+
+bool
+KCmdLineArgs::isSet(const char *_opt) const
+{
+   // Look up the default.
+   const char *opt_name;
+   const char *def;
+   bool dummy = true;
+   QCString opt = _opt;
+   int result = ::findOption( options, opt, opt_name, def, dummy) & ~4;
+
+   if (result == 0)
+   {
+      fprintf(stderr, "\n\nFAILURE (KCmdLineArgs):\n");
+      fprintf(stderr, "Application requests for isSet(\"%s\") but the \"%s\" option\n",
+                      _opt, _opt);
+      fprintf(stderr, "has never been specified via addCmdLineOptions( ... )\n\n");
+
+      assert( 0 );
+      exit(255);
+   }
+
+   QCString *value = 0;
+   if (parsedOptionList)
+   {
+      value = parsedOptionList->find(opt);
+   }
+
+   if (value)
+   {
+      if (result == 3)
+         return true;
+      else
+         return ((*value)[0] == 't');
+   }
+
+   if (result == 3)
+      return false; // String option has 'false' as default.
+
+   // We return 'true' as default if the option was listed as '-nofork'
+   // We return 'false' as default if the option was listed as '-fork'
+   return (result == 2);
+}
+
+int
+KCmdLineArgs::count() const
+{
+   if (!parsedArgList)
+      return 0;
+   return parsedArgList->count();
+}
+
+const char *
+KCmdLineArgs::arg(int n) const
+{
+   if (!parsedArgList || (n >= (int) parsedArgList->count()))
+   {
+      fprintf(stderr, "\n\nFAILURE (KCmdLineArgs): Argument out of bounds\n");
+      fprintf(stderr, "Application requests for arg(%d) without checking count() first.\n",
+                      n);
+
+      assert( 0 );
+      exit(255);
+   }
+
+   return parsedArgList->at(n);
+}
+
+KURL
+KCmdLineArgs::url(int n) const
+{
+   return makeURL( arg(n) );
+}
+
+KURL KCmdLineArgs::makeURL(const char *_urlArg)
+{
+   QString urlArg = QFile::decodeName(_urlArg);
+   if (!QDir::isRelativePath(urlArg))
+   {
+      //KURL result;
+      //result.setPath(urlArg);
+      //return result; // Absolute path.
+      return urlArg;
+   }
+#  if QT_VERSION<0x040000
+   if ( !QUrl::isRelativeUrl(urlArg) )
+#else
+   if ( !QUrl(urlArg).isRelative() )
+#endif
+     //return KURL(urlArg); // Argument is a URL
+     return urlArg;
+
+//   KURL result;
+//   result.setPath( cwd()+"/"+urlArg );
+//   result.cleanPath();
+//   return result;  // Relative path
+    return cwd() + "/" + urlArg;
+}
+
+void
+KCmdLineArgs::addArgument(const char *argument)
+{
+   if (!parsedArgList)
+      parsedArgList = new KCmdLineParsedArgs;
+
+   parsedArgList->append(argument);
+}
+
+static const KCmdLineOptions kde_tempfile_option[] =
+{
+   { "tempfile",       I18N_NOOP("The files/URLs opened by the application will be deleted after use"), 0},
+   KCmdLineLastOption
+};
+
+void
+KCmdLineArgs::addTempFileOption()
+{
+    KCmdLineArgs::addCmdLineOptions( kde_tempfile_option, "KDE-tempfile", "kde-tempfile" );
+}
+
+bool KCmdLineArgs::isTempFileSet()
+{
+    KCmdLineArgs* args = KCmdLineArgs::parsedArgs( "kde-tempfile" );
+    if ( args )
+        return args->isSet( "tempfile" );
+    return false;
+}
diff --git a/src/common/nokde/nokde_kcmdlineargs.h b/src/common/nokde/nokde_kcmdlineargs.h
new file mode 100644
index 0000000..8b79b62
--- /dev/null
+++ b/src/common/nokde/nokde_kcmdlineargs.h
@@ -0,0 +1,701 @@
+// modified from KDE 3.4 for Windows port (Nicolas Hadacek)
+
+/* This file is part of the KDE project
+   Copyright (C) 1999 Waldo Bastian <bastian@kde.org>
+
+   This library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Library General Public
+   License version 2 as published by the Free Software Foundation.
+
+   This library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Library General Public License for more details.
+
+   You should have received a copy of the GNU Library General Public License
+   along with this library; see the file COPYING.LIB.  If not, write to
+   the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+   Boston, MA 02110-1301, USA.
+*/
+
+#ifndef _KCMDLINEARGS_H_
+#define _KCMDLINEARGS_H_
+
+#include "nokde_klocale.h"
+#include "nokde_kurl.h"
+
+#  if QT_VERSION<0x040000
+#  include <qptrlist.h>
+#  include <qvaluelist.h>
+#else
+#  include <Qt3Support/Q3CString>
+#  define QCString Q3CString
+#  include <Qt3Support/Q3PtrList>
+#  define QPtrList Q3PtrList
+#  include <Qt3Support/Q3ValueList>
+#  define QValueList Q3ValueList
+#endif
+#  include <qstring.h>
+
+typedef QValueList<QCString> QCStringList;
+
+/**
+ * @short Structure that holds command line options.
+ *
+ * This class is intended to be used with the KCmdLineArgs class, which
+ * provides convenient and powerful command line argument parsing and
+ * handling functionality.
+ *
+ * @see KCmdLineArgs for additional usage information
+ */
+struct KDECORE_EXPORT KCmdLineOptions
+{
+   /**
+    * The name of the argument as it should be called on the command line and
+    * appear in <i>myapp --help</i>.
+    *
+    * Note that if this option starts with "no" that you will need to test for
+    * the name without the "no" and the result will be the inverse of what is
+    * specified. i.e. if "nofoo" is the name of the option and
+    * <i>myapp --nofoo</i> is called:
+    *
+    * \code
+    * KCmdLineArgs::parsedArgs()->isSet("foo"); // false
+    * \endcode
+    */
+   const char *name;
+   /**
+    * The text description of the option as should appear in
+    * <i>myapp --help</i>.  This value should be wrapped with I18N_NOOP().
+    */
+   const char *description;
+   /**
+    * The default value for the option, if it is not specified on the
+    * command line.
+    */
+   const char *def; // Default
+};
+
+#define KCmdLineLastOption { 0, 0, 0 }
+
+class KCmdLineArgsList;
+class KApplication;
+class KUniqueApplication;
+class KCmdLineParsedOptions;
+class KCmdLineParsedArgs;
+class KAboutData;
+class KCmdLineArgsPrivate;
+
+/**
+ *  @short A class for command-line argument handling.
+ *
+ *  KCmdLineArgs provides simple access to the command-line arguments
+ *  for an application. It takes into account Qt-specific options,
+ *  KDE-specific options and application specific options.
+ *
+ *  This class is used in %main() via the static method
+ *  init().
+ *
+ *  A typical %KDE application using %KCmdLineArgs should look like this:
+ *
+ *  \code
+ *  int main(int argc, char *argv[])
+ *  {
+ *     // Initialize command line args
+ *     KCmdLineArgs::init(argc, argv, appName, programName, description, version);
+ *
+ *     // Tell which options are supported
+ *     KCmdLineArgs::addCmdLineOptions( options );
+ *
+ *     // Add options from other components
+ *     KUniqueApplication::addCmdLineOptions();
+ *
+ *     ....
+ *
+ *     // Create application object without passing 'argc' and 'argv' again.
+ *     KUniqueApplication app;
+ *
+ *     ....
+ *
+ *     // Handle our own options/arguments
+ *     // A KApplication will usually do this in main but this is not
+ *     // necessary.
+ *     // A KUniqueApplication might want to handle it in newInstance().
+ *
+ *     KCmdLineArgs *args = KCmdLineArgs::parsedArgs();
+ *
+ *     // A binary option (on / off)
+ *     if (args->isSet("some-option"))
+ *        ....
+ *
+ *     // An option which takes an additional argument
+ *     QCString anotherOptionArg = args->getOption("another-option");
+ *
+ *     // Arguments (e.g. files to open)
+ *     for(int i = 0; i < args->count(); i++) // Counting start at 0!
+ *     {
+ *        // don't forget to convert to Unicode!
+ *        openFile( QFile::decodeName( args->arg(i)));
+ *        // Or more convenient:
+ *        // openURL( args->url(i));
+ *
+ *     }
+ *
+ *     args->clear(); // Free up some memory.
+ *     ....
+ *  }
+ *  \endcode
+ *
+ *  The options that an application supports are configured using the
+ *  KCmdLineOptions class. An example is shown below:
+ *
+ *  \code
+ *  static const KCmdLineOptions options[] =
+ *  {
+ *     { "a", I18N_NOOP("A short binary option"), 0 },
+ *     { "b \<file>", I18N_NOOP("A short option which takes an argument"), 0 },
+ *     { "c \<speed>", I18N_NOOP("As above but with a default value"), "9600" },
+ *     { "option1", I18N_NOOP("A long binary option, off by default"), 0 },
+ *     { "nooption2", I18N_NOOP("A long binary option, on by default"), 0 },
+ *     { ":", I18N_NOOP("Extra options:"), 0 },
+ *     { "option3 \<file>", I18N_NOOP("A long option which takes an argument"), 0 },
+ *     { "option4 \<speed>", I18N_NOOP("A long option which takes an argument, defaulting to 9600"), "9600" },
+ *     { "d", 0, 0 },
+ *     { "option5", I18N_NOOP("A long option which has a short option as alias"), 0 },
+ *     { "e", 0, 0 },
+ *     { "nooption6", I18N_NOOP("Another long option with an alias"), 0 },
+ *     { "f", 0, 0 },
+ *     { "option7 \<speed>", I18N_NOOP("'--option7 speed' is the same as '-f speed'"), 0 },
+ *     { "!option8 \<cmd>", I18N_NOOP("All options following this one will be treated as arguments"), 0 },
+ *     { "+file", I18N_NOOP("A required argument 'file'"), 0 },
+ *     { "+[arg1]", I18N_NOOP("An optional argument 'arg1'"), 0 },
+ *     { "!+command", I18N_NOOP("A required argument 'command', that can contain multiple words, even starting with '-'"), 0 },
+ *     { "", I18N_NOOP("Additional help text not associated with any particular option") 0 },
+ *     KCmdLineLastOption // End of options.
+ *  };
+ *  \endcode
+ *
+ *  The I18N_NOOP macro is used to indicate that these strings should be
+ *  marked for translation. The actual translation is done by KCmdLineArgs.
+ *  You can't use i18n() here because we are setting up a static data
+ *  structure and can't do translations at compile time.
+ *
+ *  Note that a program should define the options before any arguments.
+ *
+ *  When a long option has a short option as an alias, a program should
+ *  only test for the long option.
+ *
+ *  With the above options a command line could look like:
+ *  \code
+ *     myapp -a -c 4800 --display localhost:0.0 --nooption5 -d /tmp/file
+ *  \endcode
+ *
+ *  Long binary options can be in the form 'option' and 'nooption'.
+ *  A command line may contain the same binary option multiple times,
+ *  the last option determines the outcome:
+ *  \code
+ *     myapp --nooption4 --option4 --nooption4
+ *  \endcode
+ *  is the same as:
+ *  \code
+ *     myapp --nooption4
+ *  \endcode
+ *
+ *  If an option value is provided multiple times, normally only the last
+ *  value is used:
+ *  \code
+ *     myapp -c 1200 -c 2400 -c 4800
+ *  \endcode
+ *  is usually the same as:
+ *  \code
+ *     myapp -c 4800
+ *  \endcode
+ *
+ *  However, an application can choose to use all values specified as well.
+ *  As an example of this, consider that you may wish to specify a
+ *  number of directories to use:
+ *  \code
+ *     myapp -I /usr/include -I /opt/kde/include -I /usr/X11/include
+ *  \endcode
+ *  When an application does this it should mention this in the description
+ *  of the option. To access these options, use getOptionList()
+ *
+ *  Tips for end-users:
+ *
+ *  @li Single char options like "-a -b -c" may be combined into "-abc"
+ *  @li The option "--foo bar" may also be written "--foo=bar"
+ *  @li The option "-P lp1" may also be written "-P=lp1" or "-Plp1"
+ *  @li The option "--foo bar" may also be written "-foo bar"
+ *
+ *  @author Waldo Bastian
+ *  @version 0.0.4
+ */
+class KDECORE_EXPORT KCmdLineArgs
+{
+  friend class KApplication;
+  friend class KUniqueApplication;
+  friend class QPtrList<KCmdLineArgs>;
+public:
+  // Static functions:
+
+  /**
+   * Initialize class.
+   *
+   * This function should be called as the very first thing in
+   *  your application.
+   * @param _argc As passed to @p main(...).
+   * @param _argv As passed to @p main(...).
+   * @param _appname The untranslated name of your application. This should
+   *                match with @p argv[0].
+   * @param programName A program name string to be used for display
+   *        purposes. This string should be marked for
+   *        translation. Example: I18N_NOOP("KEdit")
+   * @param _description A short description of what your application is about.
+   * @param _version A version.
+   * @param noKApp Set this true to not add commandline options for
+   *        QApplication / KApplication
+   *
+   * @since 3.2
+   */
+   static void init(int _argc, char **_argv, const char *_appname,
+                    const char* programName, const char *_description,
+                    const char *_version, bool noKApp = false);
+   /**
+    * @deprecated
+    * You should convert any calls to this method to use the one
+    * above, by adding in the program name to be used for display
+    * purposes. Do not forget to mark it for translation using I18N_NOOP.
+    */
+  static void init(int _argc, char **_argv,
+                   const char *_appname, const char *_description,
+                   const char *_version, bool noKApp = false) KDE_DEPRECATED;
+
+  /**
+   * Initialize class.
+   *
+   * This function should be called as the very first thing in
+   *  your application. It uses KAboutData to replace some of the
+   *  arguments that would otherwise be required.
+   *
+   * @param _argc As passed to @p main(...).
+   * @param _argv As passed to @p main(...).
+   * @param about A KAboutData object describing your program.
+   * @param noKApp Set this true to not add commandline options for
+   *        QApplication / KApplication
+   */
+  static void init(int _argc, char **_argv,
+                   const KAboutData *about, bool noKApp = false);
+
+  /**
+   * Initialize Class
+   *
+   * This function should be called as the very first thing in your
+   * application. This method will rarely be used, since it doesn't
+   * provide any argument parsing. It does provide access to the
+   * KAboutData information.
+   * This method is exactly the same as calling
+   * init(0,0, const KAboutData *about, true).
+   *
+   * @param about the about data.
+   * \see KAboutData
+   */
+  static void init(const KAboutData *about);
+
+  /**
+   * Add options to your application.
+   *
+   * You must make sure that all possible options have been added before
+   * any class uses the command line arguments.
+   *
+   * The list of options should look like this:
+   *
+   * \code
+   * static KCmdLineOptions options[] =
+   * {
+   *    { "option1 \<argument>", I18N_NOOP("Description 1"), "my_extra_arg" },
+   *    { "o", 0, 0 },
+   *    { "option2", I18N_NOOP("Description 2"), 0 },
+   *    { "nooption3", I18N_NOOP("Description 3"), 0 },
+   *    KCmdLineLastOption
+   * }
+   * \endcode
+   *
+   * @li "option1" is an option that requires an additional argument,
+   *     but if one is not provided, it uses "my_extra_arg".
+   * @li "option2" is an option that can be turned on. The default is off.
+   * @li "option3" is an option that can be turned off. The default is on.
+   * @li "o" does not have a description. It is an alias for the option
+   *     that follows. In this case "option2".
+   * @li "+file" specifies an argument. The '+' is removed. If your program
+   *     doesn't specify that it can use arguments your program will abort
+   *     when an argument is passed to it. Note that the reverse is not
+   *     true. If required, you must check yourself the number of arguments
+   *     specified by the user:
+   *     \code
+   *       KCmdLineArgs *args = KCmdLineArgs::parsedArgs();
+   *       if (args->count() == 0) KCmdLineArgs::usage(i18n("No file specified!"));
+   *     \endcode
+   *
+   * In BNF:
+   * \code
+   * cmd = myapp [options] file
+   * options = (option)*
+   * option = --option1 \<argument> |
+   *          (-o | --option2 | --nooption2) |
+   *          ( --option3 | --nooption3 )
+   * \endcode
+   *
+   * Instead of "--option3" one may also use "-option3"
+   *
+   * Usage examples:
+   *
+   * @li "myapp --option1 test"
+   * @li "myapp" (same as "myapp --option1 my_extra_arg")
+   * @li "myapp --option2"
+   * @li "myapp --nooption2" (same as "myapp", since it is off by default)
+   * @li "myapp -o" (same as "myapp --option2")
+   * @li "myapp --nooption3"
+   * @li "myapp --option3 (same as "myapp", since it is on by default)
+   * @li "myapp --option2 --nooption2" (same as "myapp", because it
+   *     option2 is off by default, and the last usage applies)
+   * @li "myapp /tmp/file"
+   *
+   * @param options A list of options that your code supplies.
+   * @param name the name of the option, can be 0.
+   * @param id A name with which these options can be identified, can be 0.
+   * @param afterId The options are inserted after this set of options, can be 0.
+   */
+  static void addCmdLineOptions( const KCmdLineOptions *options,
+                                 const char *name=0, const char *id = 0,
+                                 const char *afterId=0);
+
+  /**
+   * Access parsed arguments.
+   *
+   * This function returns all command line arguments that your code
+   * handles. If unknown command-line arguments are encountered the program
+   * is aborted and usage information is shown.
+   *
+   * @param id The name of the options you are interested in, can be 0.
+   */
+  static KCmdLineArgs *parsedArgs(const char *id=0);
+
+  /**
+   * Get the CWD (Current Working Directory) associated with the
+   * current command line arguments.
+   *
+   * Typically this is needed in KUniqueApplication::newInstance()
+   * since the CWD of the process may be different from the CWD
+   * where the user started a second instance.
+   * @return the current working directory
+   **/
+  static QString cwd();
+
+  /**
+   * Get the appname according to argv[0].
+   * @return the name of the application
+   **/
+  static const char *appName();
+
+  /**
+   * Print the usage help to stdout and exit.
+   *
+   * @param id if 0, print all options. If id is set, only print the
+   *        option specified by id. The id is the value set by
+   *        #ref addCmdLineOptions().
+   **/
+  static void usage(const char *id = 0);
+
+  /**
+   * Print an error to stderr and the usage help to stdout and exit.
+   * @param error the error to print
+   **/
+  static void usage(const QString &error);
+
+  /**
+   * Enable i18n to be able to print a translated error message.
+   *
+   * N.B.: This function leaks memory, therefore you are expected to exit
+   * afterwards (e.g., by calling usage()).
+   **/
+  static void enable_i18n();
+
+  // Member functions:
+
+
+  /**
+   *  Read out a string option.
+   *
+   *  The option must have a corresponding KCmdLineOptions entry
+   *  of the form:
+   *  \code
+   *    { "option \<argument>", I18N_NOOP("Description"), "default" }
+   *  \endcode
+   *  You cannot test for the presence of an alias - you must always
+   *  test for the full option.
+   *
+   *  @param option The name of the option without '-'.
+   *
+   *  @return The value of the option. If the option was not
+   *          present on the command line the default is returned.
+   *          If the option was present more than the value of the
+   *          last occurrence is used.
+   */
+  QCString getOption(const char *option) const;
+
+  /**
+   *  Read out all occurrences of a string option.
+   *
+   *  The option must have a corresponding KCmdLineOptions entry
+   *  of the form:
+   *  \code
+   *    { "option \<argument>", I18N_NOOP("Description"), "default" }
+   *  \endcode
+   *  You cannot test for the presence of an alias - you must always
+   *  test for the full option.
+   *
+   *  @param option The name of the option, without '-' or '-no'.
+   *
+   *  @return A list of all option values. If no option was present
+   *          on the command line, an empty list is returned.
+   */
+  QCStringList getOptionList(const char *option) const;
+
+  /**
+   *  Read out a boolean option or check for the presence of string option.
+   *
+   *  @param option The name of the option without '-' or '-no'.
+   *
+   *  @return The value of the option. It will be true if the option
+   *  was specifically turned on in the command line, or if the option
+   *  is turned on by default (in the KCmdLineOptions list) and was
+   *  not specifically turned off in the command line. Equivalently,
+   *  it will be false if the option was specifically turned off in
+   *  the command line, or if the option is turned off by default (in
+   *  the KCmdLineOptions list) and was not specifically turned on in
+   *  the command line.
+   */
+  bool isSet(const char *option) const;
+
+  /**
+   *  Read the number of arguments that aren't options (but,
+   *  for example, filenames).
+   *
+   *  @return The number of arguments that aren't options
+   */
+  int count() const;
+
+  /**
+   *  Read out an argument.
+   *
+   *  @param n The argument to read. 0 is the first argument.
+   * count()-1 is the last argument.
+   *
+   *  @return A @p const @p char @p * pointer to the n'th argument.
+   */
+  const char *arg(int n) const;
+
+  /**
+   *  Read out an argument representing a URL.
+   *
+   *  The argument can be
+   *  @li an absolute filename
+   *  @li a relative filename
+   *  @li a URL
+   *
+   *  @param n The argument to read. 0 is the first argument.
+   * count()-1 is the last argument.
+   *
+   *  @return a URL representing the n'th argument.
+   */
+  KURL url(int n) const;
+
+  /**
+   * Used by url().
+   * Made public for apps that don't use KCmdLineArgs
+   * @param urlArg the argument
+   * @return the url.
+   */
+  static KURL makeURL( const char * urlArg );
+
+  /**
+   * Made public for apps that don't use KCmdLineArgs
+   * To be done before makeURL, to set the current working
+   * directory in case makeURL needs it.
+   * @param cwd the new working directory
+   */
+  static void setCwd( char * cwd ) { mCwd = cwd; }
+
+  /**
+   *  Clear all options and arguments.
+   */
+  void clear();
+
+  /**
+   *  Reset all option definitions, i.e. cancel all addCmdLineOptions calls.
+   *  Note that KApplication's options are removed too, you might want to
+   *  call KApplication::addCmdLineOptions if you want them back.
+   *
+   *  You usually don't want to call this method.
+   */
+  static void reset();
+
+  /**
+   * Load arguments from a stream.
+   */
+  static void loadAppArgs( QDataStream &);
+
+  /**
+   * Add standard option --tempfile
+   * @since 3.4
+   */
+  static void addTempFileOption();
+
+  // this avoids having to know the "id" used by addTempFileOption
+  // but this approach doesn't scale well, we can't have 50 standard options here...
+  /**
+   * @return true if --tempfile was set
+   * @since 3.4
+   */
+  static bool isTempFileSet();
+
+protected:
+  /**
+   * @internal
+   *  Constructor.
+   */
+  KCmdLineArgs( const KCmdLineOptions *_options, const char *_name,
+                const char *_id);
+
+  /**
+   *  @internal use only.
+   *
+   *  Use clear() if you want to free up some memory.
+   *
+   *  Destructor.
+   */
+  ~KCmdLineArgs();
+
+private:
+  /**
+   * @internal
+   *
+   * Checks what to do with a single option
+   */
+  static void findOption(const char *_opt, QCString opt, int &i, bool enabled, bool &moreOptions);
+
+  /**
+   * @internal
+   *
+   * Parse all arguments, verify correct syntax and put all arguments
+   * where they belong.
+   */
+  static void parseAllArgs();
+
+  /**
+   * @internal for KApplication only:
+   *
+   * Return argc
+   */
+  static int *qt_argc();
+
+  /**
+   * @internal for KApplication only:
+   *
+   * Return argv
+   */
+
+  static char ***qt_argv();
+
+  /**
+   * @internal
+   *
+   * Remove named options.
+   *
+   * @param id The name of the options to be removed.
+   */
+  static void removeArgs(const char *id);
+
+  /**
+   * @internal for KUniqueApplication only:
+   *
+   * Save all but the Qt and KDE arguments to a stream.
+   */
+  static void saveAppArgs( QDataStream &);
+
+  /**
+   * @internal
+   *
+   *  Set a boolean option
+   */
+  void setOption(const QCString &option, bool enabled);
+
+  /**
+   * @internal
+   *
+   *  Set a string option
+   */
+  void setOption(const QCString &option, const char *value);
+
+  /**
+   * @internal
+   *
+   * Add an argument
+   */
+  void addArgument(const char *argument);
+
+  /**
+   * @internal
+   *
+   * Save to a stream.
+   */
+  void save( QDataStream &) const;
+
+  /**
+   * @internal
+   *
+   * Restore from a stream.
+   */
+  void load( QDataStream &);
+
+  /**
+   * @internal for KApplication only
+   *
+   * Initialize class.
+   *
+   * This function should be called as the very first thing in
+   *  your application.
+   * @param argc As passed to @p main(...).
+   * @param argv As passed to @p main(...).
+   * @param appname The untranslated name of your application. This should
+   *                match with @p argv[0].
+   *
+   * This function makes KCmdLineArgs ignore all unknown options as well as
+   * all arguments.
+   */
+  static void initIgnore(int _argc, char **_argv, const char *_appname);
+
+  static void printQ(const QString &msg);
+
+  const KCmdLineOptions *options;
+  const char *name;
+  const char *id;
+  KCmdLineParsedOptions *parsedOptionList;
+  KCmdLineParsedArgs *parsedArgList;
+  bool isQt;
+
+  static KCmdLineArgsList *argsList; // All options.
+  static const KAboutData *about;
+
+  static int argc; // The original argc
+  static char **argv; // The original argv
+  static bool parsed; // Whether we have parsed the arguments since calling init
+  static bool ignoreUnknown; // Ignore unknown options and arguments
+  static char *mCwd; // Current working directory. Important for KUnqiueApp!
+  static bool parseArgs;
+
+  KCmdLineArgsPrivate *d;
+};
+
+#endif
+
diff --git a/src/common/nokde/nokde_klocale.cpp b/src/common/nokde/nokde_klocale.cpp
new file mode 100644
index 0000000..e30ba2f
--- /dev/null
+++ b/src/common/nokde/nokde_klocale.cpp
@@ -0,0 +1,4 @@
+#include "nokde_klocale.h"
+
+QString i18n(const QString &, const QString &text) { return text; }
+QString locate(const QString &, const QString &) { return QString::null; }
diff --git a/src/common/nokde/nokde_klocale.h b/src/common/nokde/nokde_klocale.h
new file mode 100644
index 0000000..a1cf720
--- /dev/null
+++ b/src/common/nokde/nokde_klocale.h
@@ -0,0 +1,17 @@
+#ifndef NOKDE_KLOCALE_H
+#define NOKDE_KLOCALE_H
+
+#undef KDECORE_EXPORT
+#define KDECORE_EXPORT
+
+#undef KDE_DEPRECATED
+#define KDE_DEPRECATED
+
+#undef I18N_NOOP
+#define I18N_NOOP(x) (x)
+#include <qstring.h>
+inline QString i18n(const QString &text) { return text; }
+extern QString i18n(const QString &index, const QString &text);
+extern QString locate(const QString &, const QString &);
+
+#endif
diff --git a/src/common/nokde/nokde_kprocess.cpp b/src/common/nokde/nokde_kprocess.cpp
new file mode 100644
index 0000000..92c8968
--- /dev/null
+++ b/src/common/nokde/nokde_kprocess.cpp
@@ -0,0 +1,100 @@
+#include "nokde_kprocess.h"
+
+#if QT_VERSION<0x040000
+#  include <qprocess.h>
+#  define Q3Process QProcess
+#else
+#  include <Qt3Support/Q3Process>
+#endif
+
+#if defined(Q_OS_UNIX)
+#  include <signal.h>
+#endif
+
+KProcess::KProcess(QObject *parent, const char *name)
+  : QObject(parent, name)
+{
+  _process = new Q3Process(this);
+  connect(_process, SIGNAL(processExited()), SLOT(processExitedSlot()));
+  connect(_process, SIGNAL(readyReadStdout()), SLOT(readyReadStdoutSlot()));
+  connect(_process, SIGNAL(readyReadStderr()), SLOT(readyReadStderrSlot()));
+}
+
+bool KProcess::start()
+{
+  _process->setArguments(_arguments);
+  QStringList env;
+  if ( !_environment.isEmpty() ) {
+    for (uint i=0; environ[i]; i++) env += environ[i];
+    env += _environment;
+  }
+  return _process->start(env.isEmpty() ? 0 : &env);
+}
+
+void KProcess::processExitedSlot()
+{
+  readyReadStdoutSlot();
+  readyReadStderrSlot();
+  emit processExited(this);
+}
+
+void KProcess::readyReadStdoutSlot()
+{
+  QByteArray a = _process->readStdout();
+  emit receivedStdout(this, a.data(), a.count());
+}
+
+void KProcess::readyReadStderrSlot()
+{
+  QByteArray a = _process->readStderr();
+  emit receivedStderr(this, a.data(), a.count());
+}
+
+bool KProcess::writeStdin(const char *buffer, int len)
+{
+#if QT_VERSION<0x040000
+  QByteArray a;
+  a.assign(buffer, len);
+#else
+  QByteArray a(buffer, len);
+#endif
+  _process->writeToStdin(a);
+  return true;
+}
+
+bool KProcess::kill()
+{
+  _process->kill();
+  return true;
+}
+
+bool KProcess::kill(int n)
+{
+#if defined(Q_OS_UNIX)
+  return ( ::kill(_process->processIdentifier(), n)!=-1 );
+#elif defined(Q_OS_WIN)
+  // #### impossible to do ??
+  return false;
+#endif
+}
+
+int KProcess::exitStatus() const
+{
+  return _process->exitStatus();
+}
+
+bool KProcess::isRunning() const
+{
+  return _process->isRunning();
+}
+
+void KProcess::setWorkingDirectory(const QDir &dir)
+{
+  return _process->setWorkingDirectory(dir);
+}
+
+void KProcess::setUseShell(bool useShell)
+{
+  // ### TODO: just issue "/bin/sh" "-c" "command"
+  Q_ASSERT(false);
+}
diff --git a/src/common/nokde/nokde_kprocess.h b/src/common/nokde/nokde_kprocess.h
new file mode 100644
index 0000000..59ff73c
--- /dev/null
+++ b/src/common/nokde/nokde_kprocess.h
@@ -0,0 +1,51 @@
+#ifndef _KPROCESS_H_
+#define _KPROCESS_H_
+
+#include <qdir.h>
+#include "common/global/global.h"
+#include "common/common/synchronous.h"
+#if QT_VERSION<0x040000
+class QProcess;
+#else
+class Q3Process;
+#endif
+
+class KProcess : public QObject
+{
+Q_OBJECT
+public:
+  KProcess(QObject *parent = 0, const char *name = 0);
+  void clearArguments() { _arguments.clear(); }
+  KProcess &operator<< (const QString &arg) { _arguments += arg; return *this; }
+  KProcess &operator<< (const QStringList &args) { _arguments += args; return *this; }
+  QStringList args() const { return _arguments; }
+  void setEnvironment(const QString &name, const QString &value) { _environment += name + "=" + value; }
+  bool start();
+  bool writeStdin(const char *buffer, int len);
+  bool kill();
+  bool kill(int n);
+  int exitStatus() const;
+  bool isRunning() const;
+  void setWorkingDirectory(const QDir &dir);
+  void setUseShell(bool useShell);
+
+signals:
+  void processExited(KProcess *process);
+  void receivedStdout(KProcess *process, char *buffer, int len);
+  void receivedStderr(KProcess *process, char *buffer, int len);
+
+private slots:
+  void processExitedSlot();
+  void readyReadStdoutSlot();
+  void readyReadStderrSlot();
+
+private:
+#if QT_VERSION<0x040000
+  QProcess *_process;
+#else
+  Q3Process  *_process;
+#endif
+  QStringList _arguments,_environment;
+};
+
+#endif
diff --git a/src/common/nokde/nokde_kurl.h b/src/common/nokde/nokde_kurl.h
new file mode 100644
index 0000000..202c46d
--- /dev/null
+++ b/src/common/nokde/nokde_kurl.h
@@ -0,0 +1,32 @@
+#ifndef _KURL_H_
+#define _KURL_H_
+
+#include <qfile.h>
+
+#include "common/global/global.h"
+
+class KURL : public Q3Url
+{
+public:
+  KURL() {}
+  KURL(const QString &s) : Q3Url(s) {}
+  void cleanPath() {}
+  bool isEmpty() const { return toString(false, false).isEmpty(); }
+  QString fileName(bool b) const { Q_UNUSED(b); Q_ASSERT(!b); return Q3Url::fileName(); }
+  static KURL fromPathOrURL(const QString &s) { return KURL(s); }
+#if QT_VERSION>=0x040000
+  bool operator <(const KURL &url) const { return path()<url.path(); }
+  bool operator ==(const KURL &url) const { return path()==url.path(); }
+  bool operator !=(const KURL &url) const { return path()!=url.path(); }
+#endif
+};
+
+// ### DUMMY
+class KTempFile
+{
+public:
+  const QFile *file() const { return 0; }
+  QFile *file() { return 0; }
+};
+
+#endif
diff --git a/src/common/nokde/win32_utils.c b/src/common/nokde/win32_utils.c
new file mode 100644
index 0000000..975261e
--- /dev/null
+++ b/src/common/nokde/win32_utils.c
@@ -0,0 +1,81 @@
+/*
+   This file is part of the KDE libraries
+   Copyright (C) 2004 Jaroslaw Staniek <js@iidea.pl>
+
+   This library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Library General Public
+   License version 2 as published by the Free Software Foundation.
+
+   This library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Library General Public License for more details.
+
+   You should have received a copy of the GNU Library General Public License
+   along with this library; see the file COPYING.LIB.  If not, write to
+   the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+   Boston, MA 02110-1301, USA.
+*/
+
+// helper functions
+
+#include "win32_utils.h"
+
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <stdio.h>
+#include <string.h>
+#include <errno.h>
+#include <signal.h>
+
+//---------------------------------------------
+#define _fcopy_BUFLEN 1024*32
+int fcopy(const char *src, const char *dest)
+{
+	static char _fcopy_buf[_fcopy_BUFLEN]; //not reentrant!
+	FILE *in, *out;
+	int c_in=0, c_out=0;
+	int res=0;
+	
+	in=fopen(src, "rb");
+	if (!in)
+		return fcopy_src_err;
+	out=fopen(dest, "wb");
+	if (!out)
+		return fcopy_dest_err;
+	while (!feof(in) && !ferror(in) && !ferror(out)) {
+		c_in=fread(_fcopy_buf, 1, _fcopy_BUFLEN, in);
+		if (ferror(in) || c_in==0) {
+			break;
+		}
+		c_out=fwrite(_fcopy_buf, 1, c_in, out);
+		if (ferror(out) || c_in!=c_out) {
+			break;
+		}
+	}
+	
+	if (ferror(in)) {
+		res=fcopy_src_err;
+	}
+	else if (ferror(out)) {
+		res=fcopy_dest_err;
+	}
+	else if (c_in!=c_out) {
+		res=fcopy_dest_err;
+	}
+	fclose(in);
+	fclose(out);
+	return res;
+}
+
+KDEWIN32_EXPORT 
+void win32_slashify(char *path, int maxlen)
+{
+	int len = 0;
+	if (!path)
+		return;
+	for (; *path && len < maxlen ; path++)
+		if ( *path == '\\' )
+			*path = '/';
+}
+
diff --git a/src/common/nokde/win32_utils.h b/src/common/nokde/win32_utils.h
new file mode 100644
index 0000000..cc5e110
--- /dev/null
+++ b/src/common/nokde/win32_utils.h
@@ -0,0 +1,97 @@
+/*
+   This file is part of the KDE libraries
+   Copyright (C) 2004-2005 Jaroslaw Staniek <js@iidea.pl>
+
+   This library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Library General Public
+   License version 2 as published by the Free Software Foundation.
+
+   This library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Library General Public License for more details.
+
+   You should have received a copy of the GNU Library General Public License
+   along with this library; see the file COPYING.LIB.  If not, write to
+   the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+   Boston, MA 02110-1301, USA.
+*/
+
+#ifndef KDE_WIN32_UTILS_H
+#define KDE_WIN32_UTILS_H
+
+#include <windows.h>
+
+//#include <kdecore/kdelibs_export.h>
+#define KDEWIN32_EXPORT
+
+#ifdef  __cplusplus
+#include <qstring.h>
+
+extern "C" {
+#endif
+
+#define fcopy_src_err -1
+#define fcopy_dest_err -2
+
+/**
+ Copies @p src file to @p dest file.
+ @return 0 on success, fcopy_src_err on source file error,
+ fcopy_dest_err on destination file error.
+*/
+KDEWIN32_EXPORT int fcopy(const char *src, const char *dest);
+
+/**
+ Converts all backslashes to slashes in @p path.
+ Converting is stopped on a null character or at @p maxlen character.
+*/
+KDEWIN32_EXPORT void win32_slashify(char *path, int maxlen);
+
+#ifdef  __cplusplus
+}
+
+/**
+ \return a value from MS Windows native registry.
+ @param key is usually one of HKEY_CLASSES_ROOT, HKEY_CURRENT_USER, HKEY_LOCAL_MACHINE
+        constants defined in WinReg.h. 
+ @param subKey is a registry subkey defined as a path to a registry folder, eg.
+        "SOFTWARE\\Microsoft\\Windows\\CurrentVersion\\Explorer\\Shell Folders"
+        ('\' delimiter must be used)
+ @param item is an item inside subKey or "" if default folder's value should be returned
+ @param ok if not null, will be set to true on success and false on failure
+*/
+KDEWIN32_EXPORT QString getWin32RegistryValue(HKEY key, const QString& subKey, 
+	const QString& item, bool *ok = 0);
+
+/**
+ \return a value from MS Windows native registry for shell folder \a folder.
+*/
+inline QString getWin32ShellFoldersPath(const QString& folder) {
+	return getWin32RegistryValue(HKEY_CURRENT_USER, 
+			"SOFTWARE\\Microsoft\\Windows\\CurrentVersion\\Explorer\\Shell Folders", folder);
+}
+
+/**
+ Shows native MS Windows file property dialog for a file \a fileName.
+ Return true on success. Only works for local absolute paths.
+ Used by KPropertiesDialog, if possible.
+*/
+KDEWIN32_EXPORT
+bool showWin32FilePropertyDialog(const QString& fileName);
+
+/**
+ \return two-letter locale name (like "en" or "pl") taken from MS Windows native registry.
+ Useful when we don't want to rely on KSyCoCa.
+ Used e.g. by kbuildsycoca application.
+*/
+KDEWIN32_EXPORT
+QCString getWin32LocaleName();
+
+/*! Temporary solutiuon
+ \return a KFileDialog-compatible filter string converted to QFileDialog compatible one. 
+ This is temporary solution for kdelibs/win32... */
+KDEWIN32_EXPORT QString convertKFileDialogFilterToQFileDialogFilter(const QString& filter);
+
+#endif //__cplusplus
+
+#endif
diff --git a/src/common/port/Makefile.am b/src/common/port/Makefile.am
new file mode 100644
index 0000000..d1d2ce8
--- /dev/null
+++ b/src/common/port/Makefile.am
@@ -0,0 +1,7 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libport.la
+libport_la_SOURCES = parallel.cpp port.cpp serial.cpp usb_port.cpp \
+	port_base.cpp
+libport_la_LDFLAGS = $(all_libraries)
diff --git a/src/common/port/parallel.cpp b/src/common/port/parallel.cpp
new file mode 100644
index 0000000..22b6a4c
--- /dev/null
+++ b/src/common/port/parallel.cpp
@@ -0,0 +1,247 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *   Copyright (C) 2002-2003 Stephen Landamore <stephen@landamore.com>     *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "parallel.h"
+
+#include "common/global/global.h"
+#if defined(HAVE_PPDEV)
+#  include <linux/ppdev.h>
+#  include <linux/parport.h>
+#  include <fcntl.h>
+#  include <sys/ioctl.h>
+#  include <unistd.h> // needed on some system
+#  include <errno.h>
+#elif defined(HAVE_PPBUS)
+#  include <sys/param.h>
+#  include <machine/cpufunc.h>
+#  include <dev/ppbus/ppi.h>
+#  include <dev/ppbus/ppbconf.h>
+#  include <fcntl.h>
+#  include <unistd.h>
+#  include <errno.h>
+#endif
+#include "common/common/misc.h"
+
+//-----------------------------------------------------------------------------
+QStringList *Port::Parallel::_list = 0;
+
+Port::IODirs Port::Parallel::probe(const QString &device)
+{
+#if defined(HAVE_PPDEV)
+  int fd = ::open(device.latin1(), O_RDWR);
+  if ( fd<0) return NoIO;
+  if ( ioctl(fd, PPCLAIM)<0 ) {
+    ::close(fd) ;
+    return In;
+  }
+  ioctl(fd, PPRELEASE);
+  ::close(fd);
+  return (In | Out);
+#elif defined(HAVE_PPBUS)
+  int fd = ::open(device.latin1(), O_RDWR);
+  if ( fd<0 ) return NoIO;
+  ::close(fd);
+  return In | Out; // #### can we detect read-only ?
+#else
+  return NoIO;
+#endif
+}
+
+QStringList Port::Parallel::deviceList()
+{
+  QStringList list;
+#if defined(HAVE_PPDEV)
+  // standard parport in user space
+  for(int i = 0; i<8; ++i) list.append(QString("/dev/parport%1").arg(i));
+  // new devfs parport flavour
+  for(int i = 0; i<8; ++i) list.append(QString("/dev/parports/%1").arg(i));
+#elif defined(HAVE_PPBUS)
+  // FreeBSD
+  for(int i = 0; i<8; ++i) list.append(QString("/dev/ppi%1").arg(i));
+#endif
+  return list;
+}
+
+const QStringList &Port::Parallel::probedDeviceList()
+{
+  if ( _list==0 ) {
+    QStringList all = deviceList();
+    _list = new QStringList;
+    for (uint i=0; i<uint(all.count()); i++)
+      if( probe(all[i]) & (In | Out) ) _list->append(all[i]);
+  }
+  return *_list;
+}
+
+bool Port::Parallel::isAvailable()
+{
+#if defined(HAVE_PPDEV) || defined(HAVE_PPBUS)
+  return true;
+#else
+  return false;
+#endif
+}
+
+//-----------------------------------------------------------------------------
+const Port::Parallel::PPinData Port::Parallel::PIN_DATA[Nb_Pins] = {
+  { Control, 0x01, Out, "/DS"    }, // !strobe
+  { Data,    0x01, Out, "D0"     }, // data 0
+  { Data,    0x02, Out, "D1"     }, // data 1
+  { Data,    0x04, Out, "D2"     }, // data 2
+  { Data,    0x08, Out, "D3"     }, // data 3
+  { Data,    0x10, Out, "D4"     }, // data 4
+  { Data,    0x20, Out, "D5"     }, // data 5
+  { Data,    0x40, Out, "D6"     }, // data 6
+  { Data,    0x80, Out, "D7"     }, // data 7
+  { Status,  0x40, In,  "/ACK"   }, // !ack
+  { Status,  0x80, In,  "BUSY"   }, // busy
+  { Status,  0x20, In,  "PAPER"  }, // pout
+  { Status,  0x10, In,  "SELin"  }, // select
+  { Control, 0x02, Out, "LF"     }, // !feed
+  { Status,  0x08, In,  "/ERROR" }, // !error
+  { Control, 0x04, Out, "PRIME"  }, // !init
+  { Control, 0x08, Out, "SELout" }, // !si
+  { Nb_RequestTypes, 0x00, NoIO, "GND" }, // GND
+  { Nb_RequestTypes, 0x00, NoIO, "GND" }, // GND
+  { Nb_RequestTypes, 0x00, NoIO, "GND" }, // GND
+  { Nb_RequestTypes, 0x00, NoIO, "GND" }, // GND
+  { Nb_RequestTypes, 0x00, NoIO, "GND" }, // GND
+  { Nb_RequestTypes, 0x00, NoIO, "GND" }, // GND
+  { Nb_RequestTypes, 0x00, NoIO, "GND" }, // GND
+  { Nb_RequestTypes, 0x00, NoIO, "GND" }  // GND
+};
+
+QValueVector<Port::PinData> Port::Parallel::pinData(IODir dir) const
+{
+  QValueVector<PinData> v;
+  for (uint i=0; i<Nb_Pins; i++) {
+    if ( PIN_DATA[i].dir!=dir ) continue;
+    PinData pd = { i, PIN_DATA[i].label };
+    v.append(pd);
+  }
+  return v;
+}
+
+bool Port::Parallel::isGroundPin(uint pin) const
+{
+  return ( PIN_DATA[pin].label==QString("GND") );
+}
+
+Port::IODir Port::Parallel::ioDir(uint pin) const
+{
+  return PIN_DATA[pin].dir;
+}
+
+const Port::Parallel::RequestData Port::Parallel::REQUEST_DATA[Nb_RequestTypes] = {
+#if defined(HAVE_PPDEV)
+  { PPRCONTROL, PPWCONTROL },
+  { PPRSTATUS,  0          },
+  { PPRDATA,    PPWDATA    }
+#elif defined(HAVE_PPBUS)
+  { PPIGCTRL,    PPISCTRL    },
+  { PPIGSTATUS,  0           },
+  { PPIGDATA,    PPISDATA    }
+#else
+  { 0, 0 },
+  { 0, 0 },
+  { 0, 0 }
+#endif
+};
+
+Port::Parallel::Parallel(const QString &device, Log::Base &base)
+  : Base(base), _fd(-1), _device(device)
+{
+  for (uint i=0; i<Nb_RequestTypes; i++) _images[i] = 0;
+}
+
+bool Port::Parallel::internalOpen()
+{
+#if defined(HAVE_PPDEV)
+  _fd = ::open(_device.latin1(), O_RDWR);
+  if ( _fd<0 ) {
+    setSystemError(i18n("Could not open device \"%1\"").arg(_device));
+    return false;
+  }
+  if ( ioctl(_fd, PPCLAIM)<0 ) {
+    setSystemError(i18n("Could not claim device \"%1\": check it is read/write enabled").arg(_device));
+    return false;
+  }
+#elif defined(HAVE_PPBUS)
+  _fd = ::open(_device.latin1(), O_RDWR);
+  if ( _fd<0 ) {
+    setSystemError(i18n("Could not open device \"%1\"").arg(_device));
+    return false;
+  }
+#endif
+  return true;
+}
+
+void Port::Parallel::internalClose()
+{
+  if ( _fd<0 ) return;
+#if defined(HAVE_PPDEV)
+  ioctl(_fd, PPRELEASE);
+  ::close(_fd);
+#elif defined(HAVE_PPBUS)
+  ::close(_fd);
+#endif
+  _fd = -1;
+}
+
+bool Port::Parallel::setPinOn(uint pin, bool on, LogicType type)
+{
+  if ( _fd<0 ) return false;
+#if defined(HAVE_PPDEV) || defined(HAVE_PPBUS)
+  Q_ASSERT( pin<Nb_Pins );
+  Q_ASSERT( PIN_DATA[pin].dir==Out );
+  RequestType rtype = PIN_DATA[pin].rType;
+  Q_ASSERT( rtype!=Nb_RequestTypes );
+  uchar mask = PIN_DATA[pin].mask;
+  uchar c = (XOR(type==NegativeLogic, on) ? _images[rtype] | mask : _images[rtype] &  ~mask);
+  int request = REQUEST_DATA[rtype].write;
+  Q_ASSERT( request!=0 );
+  if ( ioctl(_fd, request, &c)<0 ) {
+    setSystemError(i18n("Error setting pin %1 to %2").arg(PIN_DATA[pin].label).arg(on));
+    return false;
+  }
+  _images[rtype] = c;
+#endif
+  return true;
+}
+
+bool Port::Parallel::readPin(uint pin, LogicType type, bool &value)
+{
+  if ( _fd<0 ) return false;
+#if defined(HAVE_PPDEV) || defined(HAVE_PPBUS)
+  Q_ASSERT( pin<Nb_Pins );
+  Q_ASSERT( PIN_DATA[pin].dir==In );
+  RequestType rtype = PIN_DATA[pin].rType;
+  Q_ASSERT( rtype!=Nb_RequestTypes );
+  int request = REQUEST_DATA[rtype].read;
+  Q_ASSERT( request!=0 );
+  uchar c = 0;
+  if ( ioctl(_fd, request, &c)<0 ) {
+    setSystemError(i18n("Error reading bit on pin %1").arg(PIN_DATA[pin].label));
+    return false;
+  }
+  _images[rtype] = c;
+  value = (type==NegativeLogic ? ~c : c ) & PIN_DATA[pin].mask;
+#endif
+  return true;
+}
+
+void Port::Parallel::setSystemError(const QString &message)
+{
+#if defined(HAVE_PPDEV) || defined(HAVE_PPBUS)
+  log(Log::LineType::Error, message + QString(" (errno=%1).").arg(strerror(errno)));
+#else
+  Q_UNUSED(message);
+#endif
+}
diff --git a/src/common/port/parallel.h b/src/common/port/parallel.h
new file mode 100644
index 0000000..1473db0
--- /dev/null
+++ b/src/common/port/parallel.h
@@ -0,0 +1,70 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *   Copyright (C) 2002-2003 Stephen Landamore <stephen@landamore.com>     *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PARALLEL_H
+#define PARALLEL_H
+
+#include "port_base.h"
+#if defined(Q_OS_WIN)
+# undef ERROR
+#endif
+
+namespace Port
+{
+
+class Parallel : public Base
+{
+public:
+  Parallel(const QString &device, Log::Base &base);
+  virtual ~Parallel() { close(); }
+  virtual Description description() const { return Description(PortType::Parallel, _device); }
+
+  static IODirs probe(const QString &device);
+  static const QStringList &probedDeviceList();
+  static bool isAvailable();
+
+  enum Pin { DS = 0, D0, D1, D2, D3, D4, D5, D6, D7, ACK, BUSY, PAPER, SELin,
+             LF, ERROR, PRIME, SELout, P18, P19, P20, P21, P22, P23, P24, P25,
+             Nb_Pins };
+  enum RequestType { Control = 0, Status, Data, Nb_RequestTypes };
+  struct PPinData {
+    RequestType rType;
+    uchar       mask;
+    IODir       dir;
+    const char *label;
+  };
+  static const PPinData PIN_DATA[Nb_Pins];
+  virtual bool setPinOn(uint pin, bool on, LogicType type);
+  virtual bool readPin(uint pin, LogicType type, bool &value);
+  virtual QValueVector<PinData> pinData(IODir dir) const;
+  virtual bool isGroundPin(uint pin) const;
+  virtual uint groundPin() const { return P25; }
+  virtual IODir ioDir(uint pin) const;
+
+private:
+  int     _fd;
+  QString _device;
+  struct RequestData {
+    int read, write;
+  };
+  static const RequestData REQUEST_DATA[Nb_RequestTypes];
+  uchar _images[Nb_RequestTypes];
+
+  static QStringList *_list;
+  static QStringList deviceList();
+
+  virtual bool internalOpen();
+  virtual void internalClose();
+  virtual void setSystemError(const QString &message);
+};
+
+} // namespace
+
+#endif
diff --git a/src/common/port/port.cpp b/src/common/port/port.cpp
new file mode 100644
index 0000000..c56c120
--- /dev/null
+++ b/src/common/port/port.cpp
@@ -0,0 +1,98 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "port.h"
+
+#if defined(Q_WS_WIN)
+#  include <sys/timeb.h>
+#else
+#  include <sys/time.h>
+#endif
+
+#include "common/global/global.h"
+#include "serial.h"
+#include "parallel.h"
+#include "usb_port.h"
+
+//-----------------------------------------------------------------------------
+void getTime(int &sec, int &usec)
+{
+#if defined (Q_OS_WIN)
+  struct _timeb tb;
+  _ftime (&tb);
+  sec  = tb.time;
+  usec = tb.millitm * 1000 + 500;
+#else
+  struct timeval tv;
+  gettimeofday(&tv, 0);
+  usec = tv.tv_usec;
+  sec = tv.tv_sec;
+#endif
+}
+
+void Port::msleep(uint ms)
+{
+  usleep(ms*1000);
+}
+
+// from Brian C Lane's code
+// works better than usleep
+void Port::usleep(uint us)
+{
+  if ( us==0 ) return;
+  int tsec, tusec;
+  getTime(tsec, tusec);
+  int usec = (tusec + us) % 1000000;
+  int sec = tsec + (tusec + us) / 1000000;
+  for (;;) {
+    getTime(tsec, tusec);
+    if ( tsec>sec ) return;
+    if ( tsec==sec && tusec>usec ) return;
+  }
+}
+
+//-----------------------------------------------------------------------------
+const PortType::Data PortType::DATA[Nb_Types] = {
+  { I18N_NOOP("Serial Port"),   "serial",   true  },
+  { I18N_NOOP("Parallel Port"), "parallel", true  },
+  { I18N_NOOP("USB Port"),      "usb",      false }
+};
+
+const char * const Port::IO_DIR_NAMES[3] = { "no_io", "in", "out" };
+
+QStringList Port::probedDeviceList(PortType type)
+{
+  if ( !isAvailable(type) ) return QStringList();
+  switch (type.type()) {
+    case PortType::Serial:   return Serial::probedDeviceList();
+    case PortType::Parallel: return Parallel::probedDeviceList();
+    case PortType::USB:      return USB::probedDeviceList();
+    case PortType::Nb_Types: break;
+  }
+  return QStringList();
+}
+
+bool Port::isAvailable(PortType type)
+{
+  switch (type.type()) {
+    case PortType::Serial:   return Serial::isAvailable();
+    case PortType::Parallel: return Parallel::isAvailable();
+    case PortType::USB:      return USB::isAvailable();
+    case PortType::Nb_Types: break;
+  }
+  return false;
+}
+
+PortType Port::findType(const QString &portDevice)
+{
+  FOR_EACH(PortType, type) {
+    if ( !type.data().withDevice ) continue;
+    if ( probedDeviceList(type).contains(portDevice) ) return type;
+  }
+  return PortType::Nb_Types;
+}
diff --git a/src/common/port/port.h b/src/common/port/port.h
new file mode 100644
index 0000000..f385deb
--- /dev/null
+++ b/src/common/port/port.h
@@ -0,0 +1,56 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PORT_H
+#define PORT_H
+
+#include <qstringlist.h>
+
+#include "common/global/global.h"
+#include "common/common/key_enum.h"
+
+//-----------------------------------------------------------------------------
+struct PortTypeData {
+  const char *label, *key;
+  bool withDevice;
+};
+
+BEGIN_DECLARE_ENUM(PortType)
+  Serial = 0, Parallel, USB
+END_DECLARE_ENUM(PortType, PortTypeData)
+
+namespace Port
+{
+//-----------------------------------------------------------------------------
+extern void msleep(uint ms); // in milliseconds
+extern void usleep(uint us); // in microseconds
+
+//-----------------------------------------------------------------------------
+  class Description {
+  public:
+    Description() : type(PortType::Nb_Types) {}
+    Description(PortType ptype, const QString &pdevice) : type(ptype), device(pdevice) {}
+    PortType type;
+    QString device;
+  };
+
+  enum IODir { NoIO = 0, In = 1, Out = 2 };
+  extern const char * const IO_DIR_NAMES[3];
+  Q_DECLARE_FLAGS(IODirs, IODir)
+  Q_DECLARE_OPERATORS_FOR_FLAGS(IODirs)
+  extern QStringList probedDeviceList(PortType type);
+  extern PortType findType(const QString &device);
+  extern bool isAvailable(PortType type);
+  struct PinData {
+    uint pin;
+    const char *label;
+  };
+  enum LogicType { PositiveLogic, NegativeLogic };
+} // namespace
+
+#endif
diff --git a/src/common/port/port.pro b/src/common/port/port.pro
new file mode 100644
index 0000000..f09414b
--- /dev/null
+++ b/src/common/port/port.pro
@@ -0,0 +1,10 @@
+STOPDIR = ../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = port
+HEADERS += port.h port_base.h parallel.h serial.h usb_port.h
+SOURCES += port.cpp port_base.cpp parallel.cpp serial.cpp usb_port.cpp
+contains(DEFINES, HAVE_USB) {
+  win32:INCLUDEPATH += $${LIBUSB_PATH}\include
+}
+
diff --git a/src/common/port/port_base.cpp b/src/common/port/port_base.cpp
new file mode 100644
index 0000000..7528eeb
--- /dev/null
+++ b/src/common/port/port_base.cpp
@@ -0,0 +1,127 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "port_base.h"
+
+#include "common/global/global.h"
+#include "common/common/misc.h"
+#include "common/common/number.h"
+
+bool Port::Base::open()
+{
+  close();
+  resetError();
+  _closing = false;
+  return internalOpen();
+}
+
+void Port::Base::close()
+{
+  _closing = true;
+  internalClose();
+}
+
+bool Port::Base::send(const char *data, uint size, uint timeout)
+{
+  log(Log::DebugLevel::LowLevel, QString("Sending: \"%1\"").arg(toPrintable(data, size, PrintAlphaNum)));
+  return internalSend(data, size, timeout);
+}
+
+bool Port::Base::receive(uint size, QString &s, uint timeout)
+{
+  QMemArray<uchar> a;
+  if ( !receive(size, a, timeout) ) return false;
+  s.fill(0, size);
+  for (uint i=0; i<size; i++) s[i] = a[i];
+  return true;
+}
+
+bool Port::Base::receive(uint size, QMemArray<uchar> &a, uint timeout)
+{
+  a.resize(size);
+  bool ok = internalReceive(size, (char *)a.data(), timeout);
+  if (ok) log(Log::DebugLevel::LowLevel, QString("Received: \"%1\"").arg(toPrintable(a, PrintAlphaNum)));
+  return ok;
+}
+
+bool Port::Base::receiveChar(char &c, uint timeout)
+{
+  if ( !internalReceive(1, &c, timeout) ) return false;
+  log(Log::DebugLevel::LowLevel, QString("Received: \"%1\"").arg(toPrintable(c, PrintAlphaNum)));
+  return true;
+}
+
+bool Port::Base::setPinOn(uint, bool, LogicType)
+{
+  qFatal("setPinOn not implemented");
+  return false;
+}
+bool Port::Base::readPin(uint, LogicType, bool &)
+{
+  qFatal("readPin not implemented");
+  return 0;
+}
+QValueVector<Port::PinData> Port::Base::pinData(IODir) const
+{
+  qFatal("pinData not implemented");
+  return QValueVector<PinData>();
+}
+bool Port::Base::isGroundPin(uint) const
+{
+  qFatal("isGroundPin not implemented");
+  return false;
+}
+uint Port::Base::groundPin() const
+{
+  qFatal("groundPin not implemented");
+  return 0;
+}
+Port::IODir Port::Base::ioDir(uint) const
+{
+  qFatal("ioType not implemented");
+  return NoIO;
+}
+
+void Port::Base::log(Log::LineType lineType, const QString &message)
+{
+  if ( lineType==Log::LineType::Error && _closing ) return;
+  Log::Base::log(lineType, description().type.label() + ": " + message);
+  if ( lineType==Log::LineType::Error ) close();
+}
+
+void Port::Base::log(Log::DebugLevel level, const QString &message)
+{
+  Log::Base::log(level, description().type.label() + ": " + message);
+}
+
+void Port::Base::logData(const QString &)
+{
+/*
+  QString vs;
+  for (uint i=0; i<s.length(); i++) {
+    char c = s[i];
+    switch (c) {
+      case '\r': vs += "\\r"; break;
+      case '\n': vs += "\\n"; break;
+      case '<': vs += "&lt;"; break;
+      case '>': vs += "&gt;"; break;
+      default: {
+        if ( c>=32 && c<=126 ) vs += c;
+        else {
+          QString tmp;
+          tmp.sprintf("\\x%02x", c);
+          vs += tmp;
+        }
+        break;
+      }
+    }
+  }
+  qDebug("%s", vs.latin1());
+*/
+  //log(Log::Debug, vs);
+}
diff --git a/src/common/port/port_base.h b/src/common/port/port_base.h
new file mode 100644
index 0000000..3ae4787
--- /dev/null
+++ b/src/common/port/port_base.h
@@ -0,0 +1,59 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PORT_BASE_H
+#define PORT_BASE_H
+
+#include "port.h"
+#include "common/global/log.h"
+
+namespace Port
+{
+
+class Base : public Log::Base
+{
+public:
+  Base(Log::Base &base) : Log::Base(&base) {}
+  virtual PortType type() const { return description().type; }
+  virtual Description description() const = 0;
+  bool open();
+  void close();
+
+  virtual void log(Log::LineType kind, const QString &message);
+  virtual void log(Log::DebugLevel level, const QString &message);
+  void logData(const QString &s);
+
+  enum { DEFAULT_TIMEOUT = 3000 }; // 3s
+  bool sendChar(char c, uint timeout = DEFAULT_TIMEOUT) { return send(&c, 1, timeout); }
+  bool send(const char *data, uint size, uint timeout = DEFAULT_TIMEOUT);
+  bool send(const QMemArray<uchar> &a,  uint timeout = DEFAULT_TIMEOUT) { return send((const char *)a.data(), a.count(), timeout); }
+  bool receiveChar(char &c, uint timeout = DEFAULT_TIMEOUT);
+  bool receive(uint size, QString &s, uint timeout = DEFAULT_TIMEOUT);
+  bool receive(uint size, QMemArray<uchar> &a, uint timeout = DEFAULT_TIMEOUT);
+
+  virtual bool setPinOn(uint pin, bool on, LogicType type);
+  virtual bool readPin(uint pin, LogicType type, bool &value);
+  virtual QValueVector<PinData> pinData(IODir dir) const;
+  virtual bool isGroundPin(uint pin) const;
+  virtual uint groundPin() const;
+  virtual IODir ioDir(uint pin) const;
+
+protected:
+  virtual bool internalOpen() = 0;
+  virtual void internalClose() = 0;
+  virtual bool internalSend(const char *, uint, uint) { qFatal("Not implemented"); return false; }
+  virtual bool internalReceive(uint, char *, uint) { qFatal("Not implemented"); return false; }
+  virtual void setSystemError(const QString &message) = 0;
+
+private:
+  bool _closing;
+};
+
+} // namespace
+
+#endif
diff --git a/src/common/port/serial.cpp b/src/common/port/serial.cpp
new file mode 100644
index 0000000..b370d22
--- /dev/null
+++ b/src/common/port/serial.cpp
@@ -0,0 +1,523 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *   Copyright (C) 2002-2003 Stephen Landamore <stephen@landamore.com>     *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "serial.h"
+
+#ifdef Q_OS_UNIX
+#  include <stdio.h>
+#  include <fcntl.h>
+#  include <sys/time.h>
+#  include <sys/types.h>
+#  include <sys/stat.h>
+#  include <sys/ioctl.h>
+#  include <errno.h>
+#  include <unistd.h> // needed on some system
+#endif
+#include <qdatetime.h>
+
+//-----------------------------------------------------------------------------
+QStringList *Port::Serial::_list = 0;
+#if defined(Q_OS_UNIX)
+const Port::Serial::Handle Port::Serial::INVALID_HANDLE = -1;
+#elif defined(Q_OS_WIN)
+const Port::Serial::Handle Port::Serial::INVALID_HANDLE = INVALID_HANDLE_VALUE;
+#endif
+
+Port::Serial::Handle Port::Serial::openHandle(const QString &device, IODirs dirs)
+{
+#if defined(Q_OS_UNIX)
+  // open non blocking: avoid missing DCD (comment from xwisp2)
+  int mode = O_NOCTTY | O_NONBLOCK;
+  if ( dirs & In ) {
+    if ( dirs & Out ) mode |= O_RDWR;
+    else mode |= O_RDONLY;
+  } else mode |= O_WRONLY;
+  return ::open(device.latin1(), mode);
+#elif defined(Q_OS_WIN)
+  int mode = 0;
+  if ( dirs & In ) mode |= GENERIC_READ;
+  if ( dirs & Out ) mode |= GENERIC_WRITE;
+  return CreateFileA(device.latin1(), mode, 0, NULL, OPEN_EXISTING, FILE_FLAG_NO_BUFFERING, NULL);
+#endif
+}
+
+void Port::Serial::closeHandle(Handle handle)
+{
+#if defined(Q_OS_UNIX)
+  ::close(handle);
+#elif defined(Q_OS_WIN)
+  CloseHandle(handle);
+#endif
+}
+
+Port::IODirs Port::Serial::probe(const QString &device)
+{
+  Handle handle = openHandle(device, In);
+  if ( handle==INVALID_HANDLE ) return NoIO;
+  closeHandle(handle);
+  handle = openHandle(device, In | Out);
+  if ( handle==INVALID_HANDLE ) return In;
+  closeHandle(handle);
+  return (In | Out);
+}
+
+QStringList Port::Serial::deviceList()
+{
+  QStringList list;
+#if defined(Q_OS_UNIX)
+  // standard serport in user space
+  for (uint i=0; i<8; i++) list.append(QString("/dev/ttyS%1").arg(i));
+  // new devfs serport flavour
+  for (uint i=0; i<8; i++) list.append(QString("/dev/tts/%1").arg(i));
+  // standard USB serport in user space
+  for (uint i=0; i<8; i++) list.append(QString("/dev/ttyUSB%1").arg(i));
+  // new devfs USB serport flavour
+  for (uint i=0; i<8; i++) list.append(QString("/dev/usb/tts/%1").arg(i));
+  // FreeBSD
+  for (uint i=0; i<8; i++) list.append(QString("/dev/ttyd%1").arg(i));
+  // Slackware 11 devfs USB Serial port support.
+  for (uint i=0; i<8; i++) list.append(QString("/dev/tts/USB%1").arg(i));
+  // MacOSX devfs USB Serial port support.
+  list.append("/dev/tty.usbserial");
+#elif defined(Q_OS_WIN)
+  for (uint i=1; i<10; i++) list.append(QString("COM%1").arg(i));
+#endif
+  return list;
+}
+
+const QStringList &Port::Serial::probedDeviceList()
+{
+  if ( _list==0 ) {
+    QStringList all = deviceList();
+    _list = new QStringList;
+    for (uint i=0; i<uint(all.count()); i++)
+      if( probe(all[i]) & (In | Out) ) _list->append(all[i]);
+  }
+  return *_list;
+}
+
+//-----------------------------------------------------------------------------
+const uint Port::Serial::SPEED_VALUES[Nb_Speeds] = {
+  0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800, 9600, 19200, 38400,
+  57600, 115200
+};
+const Port::Serial::SpeedData Port::Serial::SPEED_DATA[Nb_Speeds] = {
+#if defined(Q_OS_UNIX)
+  { true, B0     }, { true, B50     }, { true, B75    }, { true, B110   },
+  { true, B134   }, { true, B150    }, { true, B200   }, { true, B300   },
+  { true, B600   }, { true, B1200   }, { true, B1800  }, { true, B2400  },
+  { true, B4800  }, { true, B9600   }, { true, B19200 }, { true, B38400 },
+  { true, B57600 }, { true, B115200 }
+#elif defined(Q_OS_WIN)
+  { false, 0        }, { false, 0         }, { false, 0        }, { true, CBR_110   },
+  { false, 0        }, { false, 0         }, { false, 0        }, { true, CBR_300   },
+  { true,  CBR_600  }, { true, CBR_1200   }, { false, 0        }, { true, CBR_2400  },
+  { true, CBR_4800  }, { true, CBR_9600   }, { true, CBR_19200 }, { true, CBR_38400 },
+  { true, CBR_57600 }, { true, CBR_115200 }
+#endif
+};
+
+const Port::Serial::SPinData Port::Serial::PIN_DATA[Nb_Pins] = {
+  { In,   "DCD" }, { In, "RX"  }, { Out, "TX"  }, { Out, "DTR" },
+  { NoIO, "GND" }, { In, "DSR" }, { Out, "RTS" }, { In,  "CTS" },
+  { Out,  "RI"  }
+};
+
+QValueVector<Port::PinData> Port::Serial::pinData(IODir dir) const
+{
+  QValueVector<PinData> v;
+  for (uint i=0; i<Nb_Pins; i++) {
+    if ( PIN_DATA[i].dir!=dir ) continue;
+    PinData pd = { i, PIN_DATA[i].label };
+    v.append(pd);
+  }
+  return v;
+}
+bool Port::Serial::isGroundPin(uint pin) const
+{
+  return ( PIN_DATA[pin].label==QString("GND") );
+}
+
+Port::IODir Port::Serial::ioDir(uint pin) const
+{
+  return PIN_DATA[pin].dir;
+}
+
+Port::Serial::Serial(const QString &device, Properties properties, Log::Base &base)
+  : Base(base), _device(device), _properties(properties), _fd(INVALID_HANDLE)
+{}
+
+bool Port::Serial::getParameters(Parameters &parameters)
+{
+  if ( _fd==INVALID_HANDLE ) return false;
+#if defined(Q_OS_UNIX)
+  if ( tcgetattr(_fd, &parameters)<0 ) {
+#elif defined(Q_OS_WIN)
+  if ( !GetCommState(_fd, &parameters.dcb) || !GetCommTimeouts(_fd, &parameters.comtmo) ) {
+#endif
+    setSystemError(i18n("Could not get file descriptor parameters"));
+    return false;
+  }
+  return true;
+}
+
+bool Port::Serial::setParameters(const Parameters &parameters)
+{
+  if ( _fd==INVALID_HANDLE ) return false;
+#if defined(Q_OS_UNIX)
+  if ( tcsetattr(_fd, TCSANOW, &parameters)<0 ) {
+#elif defined(Q_OS_WIN)
+  Parameters tmp = parameters;
+  if ( !SetCommState(_fd, &tmp.dcb) || !SetCommTimeouts(_fd, &tmp.comtmo) ) {
+#endif
+    setSystemError(i18n("Could not set file descriptor parameters"));
+    return false;
+  }
+  return true;
+}
+
+bool Port::Serial::internalOpen()
+{
+  _fd = openHandle(_device, In | Out);
+  if ( _fd==INVALID_HANDLE ) {
+    setSystemError(i18n("Could not open device \"%1\" read-write").arg(_device));
+    return false;
+  }
+  if ( !getParameters(_oldParameters) ) return false; // save configuration
+#if defined(Q_OS_UNIX)
+  if ( _properties & Blocking ) {
+    int flags = fcntl(_fd, F_GETFL, 0);
+    if ( fcntl(_fd, F_SETFL, flags & ~O_NONBLOCK)<0 ) {
+      setSystemError(i18n("Could not modify file descriptor flags"));
+      return false;
+    }
+  }
+#endif
+  return flush(DEFAULT_TIMEOUT);
+}
+
+void Port::Serial::internalClose()
+{
+  if ( _fd==INVALID_HANDLE ) return;
+  if ( _properties & NeedFlush ) flush(0);
+  if ( _properties & NeedBreak ) doBreak(1);
+  setParameters(_oldParameters);
+  closeHandle(_fd);
+  _fd = INVALID_HANDLE;
+}
+
+bool Port::Serial::internalSend(const char *data, uint size, uint timeout)
+{
+  if ( _fd==INVALID_HANDLE ) return false;
+  QTime time;
+  time.start();
+  for (uint todo=size; todo!=0; ) {
+#if defined(Q_OS_UNIX)
+    int res = write(_fd, data+size-todo, todo);
+    if ( res<0 && errno!=EAGAIN ) {
+#elif defined(Q_OS_WIN)
+    DWORD res = 0;
+    if ( WriteFile(_fd, data+size-todo, todo, &res, NULL)==0 ) {
+#endif
+      setSystemError(i18n("Error sending data"));
+      return false;
+    }
+    if ( res>0 ) todo -= res;
+    else {
+      if ( uint(time.elapsed())>timeout ) {
+        log(Log::LineType::Error, i18n("Timeout sending data (%1/%2 bytes sent).").arg(size-todo).arg(size));
+        return false;
+      }
+      msleep(1);
+    }
+  }
+  if ( (_properties & NeedDrain) && !drain(timeout) ) return false;
+  return true;
+}
+
+bool Port::Serial::internalReceive(uint size, char *data, uint timeout)
+{
+  if ( _fd==INVALID_HANDLE ) return false;
+  QTime time;
+  time.start();
+  for(uint todo=size; todo!=0; ) {
+#if defined(Q_OS_UNIX)
+    // this help reduce CPU usage. It also prevents blocking if the serial cable is disconnected
+    fd_set rfd;
+    FD_ZERO(&rfd);
+    FD_SET(_fd, &rfd);
+    struct timeval tv;
+    tv.tv_sec = timeout / 1000;
+    tv.tv_usec = (timeout%1000)*1000;
+    int res = select(_fd+1, &rfd, 0, 0, &tv);
+    if ( res<0 ) {
+      setSystemError(i18n("Error receiving data"));
+      return false;
+    }
+    if ( res==0 ) {
+      log(Log::LineType::Error, i18n("Timeout waiting for data."));
+      return false;
+    }
+    res = read(_fd, data+size-todo, todo);
+    if ( res<0 && errno!=EAGAIN ) {
+#elif defined(Q_OS_WIN)
+    DWORD res = 0;
+    if ( ReadFile(_fd, data+size-todo, todo, &res, NULL)==0 ) {
+#endif
+      setSystemError(i18n("Error receiving data"));
+      return false;
+    }
+    if ( res>0 ) todo -= res;
+    else {
+      if ( uint(time.elapsed())>timeout ) {
+        log(Log::LineType::Error, i18n("Timeout receiving data (%1/%2 bytes received).").arg(size-todo).arg(size));
+        return false;
+      }
+      msleep(1);
+    }
+  }
+  return true;
+}
+
+bool Port::Serial::drain(uint timeout)
+{
+  if ( _fd==INVALID_HANDLE ) return false;
+#if defined(Q_OS_UNIX)
+  // tcdrain will block if the serial cable is disconnected
+  // so we first check for data in output buffer...
+  QTime time;
+  time.start();
+  for (;;) {
+    int nb;
+    if ( ioctl(_fd, TIOCOUTQ, &nb)==-1 ) {
+      setSystemError(i18n("Error checking for data in output buffer"));
+      return false;
+    }
+    if ( nb==0 ) break;
+    if ( uint(time.elapsed())>timeout ) {
+      _fd = INVALID_HANDLE; // otherwise close blocks...
+      log(Log::LineType::Error, i18n("Timeout sending data (%1 bytes left).").arg(nb));
+      return false;
+    }
+  }
+  if ( tcdrain(_fd)<0 ) {
+    setSystemError(i18n("Error while draining"));
+    return false;
+  }
+#endif
+  return true;
+}
+
+bool Port::Serial::flush(uint timeout)
+{
+  if ( _fd==INVALID_HANDLE ) return false;
+  if ( (_properties & NeedDrain) && !drain(timeout) ) return false;
+#if defined(Q_OS_UNIX)
+  if ( tcflush(_fd, TCIFLUSH)<0 ) {
+#elif defined(Q_OS_WIN)
+  if ( FlushFileBuffers(_fd)==0 || PurgeComm(_fd, PURGE_TXABORT)==0
+       || PurgeComm(_fd, PURGE_RXABORT)==0 || PurgeComm(_fd, PURGE_TXCLEAR)==0
+       || PurgeComm(_fd, PURGE_RXCLEAR)==0 ) {
+#endif
+    setSystemError(i18n("Could not flush device"));
+    return false;
+  }
+  return true;
+}
+
+bool Port::Serial::internalSetPinOn(Pin pin, bool on)
+{
+#if defined(Q_OS_UNIX)
+  int bit = 0;
+  switch (pin) {
+    case TX:  return ( ioctl(_fd, on ? TIOCSBRK : TIOCCBRK, 0)>=0 );
+    case DTR: bit = TIOCM_DTR; break;
+    case RTS: bit = TIOCM_RTS; break;
+    case RI:  bit = TIOCM_RI; break;
+    default:  Q_ASSERT(false); return false;
+  }
+  return ( ioctl(_fd, on ? TIOCMBIS : TIOCMBIC, &bit)>=0 );
+#elif defined(Q_OS_WIN)
+  DWORD func = 0;
+  switch (pin) {
+    case TX:  func = (on ? SETBREAK : CLRBREAK); break;
+    case DTR: func = (on ? SETDTR : CLRDTR); break;
+    case RTS: func = (on ? SETRTS : CLRRTS); break;
+    case RI:  // #### not possible with Win32 API ??
+    default:  Q_ASSERT(false); return false;
+  }
+  return ( EscapeCommFunction(_fd, func)!=0 );
+#endif
+}
+
+bool Port::Serial::setPinOn(uint pin, bool on, LogicType type)
+{
+  if ( _fd==INVALID_HANDLE ) return false;
+  if ( type==NegativeLogic ) on = !on;
+  Q_ASSERT( pin<Nb_Pins );
+  Q_ASSERT( PIN_DATA[pin].dir==Out );
+  if ( !internalSetPinOn(Pin(pin), on) ) {
+    setSystemError(i18n("Error setting bit %1 of serial port to %2").arg(PIN_DATA[pin].label).arg(on));
+    return false;
+  }
+  return true;
+}
+
+bool Port::Serial::internalReadPin(Pin pin, LogicType type, bool &value)
+{
+#if defined(Q_OS_UNIX)
+  int bits;
+  if ( ioctl(_fd, TIOCMGET, &bits)<0 ) return false;
+  int mask = 0;
+  switch (pin) {
+    case DCD: mask = TIOCM_CD;  break;
+    case RX : mask = TIOCM_SR;  break;
+    case DSR: mask = TIOCM_DSR; break;
+    case CTS: mask = TIOCM_CTS; break;
+    default:  Q_ASSERT(false); return false;
+  }
+  value = ((type==NegativeLogic ? ~bits : bits) & mask);
+  return true;
+#elif defined(Q_OS_WIN)
+  DWORD status;
+  if ( GetCommModemStatus(_fd, &status)==0 ) return false;
+  switch (pin) {
+    case DCD: value = (status & MS_RLSD_ON); break;
+    case DSR: value = (status & MS_DSR_ON); break;
+    case CTS: value = (status & MS_CTS_ON); break;
+    case RX:  // not possible with Win32 API ??
+    default:  Q_ASSERT(false); return false;
+  }
+  if ( type==NegativeLogic) value = !value;
+  return true;
+#endif
+}
+
+  bool Port::Serial::readPin(uint pin, LogicType type, bool &value)
+{
+  if ( _fd==INVALID_HANDLE ) return false;
+  Q_ASSERT( pin<Nb_Pins );
+  Q_ASSERT( PIN_DATA[pin].dir==In );
+  if ( !internalReadPin(Pin(pin), type, value) ) {
+    setSystemError(i18n("Error reading serial pin %1").arg(PIN_DATA[pin].label));
+    return false;
+  }
+  return true;
+}
+
+bool Port::Serial::setMode(InputFlags inputFlags, ControlFlags controlFlags, Speed speed, uint readTimeout)
+{
+  Q_ASSERT (SPEED_DATA[speed].supported );
+  if ( !flush(0) ) return false;
+  Parameters parameters;
+  if ( !getParameters(parameters) ) return false;
+#if defined(Q_OS_UNIX)
+  cfsetispeed(&parameters, SPEED_DATA[speed].flag);
+  cfsetospeed(&parameters, SPEED_DATA[speed].flag);
+  parameters.c_cflag &= ~(CSIZE|PARENB|PARODD|HUPCL|CSTOPB);
+  int cflags = 0;
+  if ( controlFlags & ByteSize8 ) cflags |= CS8;
+  if ( controlFlags & HardwareFlowControl ) cflags |= CRTSCTS;
+  if ( controlFlags & EnableReceiver ) cflags |= CREAD;
+  if ( controlFlags & IgnoreControlLines ) cflags |= CLOCAL;
+  parameters.c_cflag |= cflags;
+  parameters.c_iflag &= ~(ISTRIP|INPCK|IGNCR|INLCR|ICRNL|IXOFF|IXON);
+  int iflags = 0;
+  if ( inputFlags & IgnoreBreak ) iflags |= IGNBRK;
+  if ( inputFlags & IgnoreParity ) iflags |= IGNPAR;
+  parameters.c_iflag |= iflags;
+  parameters.c_oflag &= ~OPOST;
+  parameters.c_lflag &= ~(ICANON|ECHO|ECHONL|ISIG|IEXTEN|TOSTOP);
+  parameters.c_cc[VMIN]  = 0;               // wait for 1 char or timeout
+  parameters.c_cc[VTIME] = readTimeout/100; // wait in deciseconds
+#elif defined(Q_OS_WIN)
+  if ( controlFlags & EnableReceiver ) ; // #### not sure what to do
+  if ( controlFlags & IgnoreControlLines ) ; // #### not sure what to do
+  setHardwareFlowControl(parameters, (controlFlags & HardwareFlowControl));
+  if ( inputFlags & IgnoreParity ) parameters.dcb.Parity = NOPARITY;
+  parameters.dcb.StopBits = ONESTOPBIT;
+  if ( controlFlags & ByteSize8 ) parameters.dcb.ByteSize = 8;
+  parameters.dcb.BaudRate = SPEED_DATA[speed].flag;
+  parameters.comtmo.ReadIntervalTimeout = MAXDWORD;
+  parameters.comtmo.ReadTotalTimeoutMultiplier = MAXDWORD;
+  parameters.comtmo.ReadTotalTimeoutConstant = readTimeout;
+  parameters.comtmo.WriteTotalTimeoutMultiplier = 1;
+  parameters.comtmo.WriteTotalTimeoutConstant = readTimeout;
+#endif
+  return setParameters(parameters);
+  // need flush ??
+}
+
+bool Port::Serial::doBreak(uint duration)
+{
+  if ( !flush(0) ) return false;
+#if defined(Q_OS_UNIX)
+  if ( ioctl(_fd, TIOCSBRK)<0 ) {
+#elif defined(Q_OS_WIN)
+  if ( SetCommBreak(_fd)==0 ) {
+#endif
+    setSystemError(i18n("Error setting up break"));
+    return false;
+  }
+  msleep(duration);
+#if defined(Q_OS_UNIX)
+  if ( ioctl(_fd, TIOCCBRK) ) {
+#elif defined(Q_OS_WIN)
+  if ( ClearCommBreak(_fd)==0 ) {
+#endif
+    setSystemError(i18n("Error clearing up break"));
+    return false;
+  }
+  msleep(1);
+  return flush(0);
+}
+
+void Port::Serial::setHardwareFlowControl(Parameters &parameters, bool on)
+{
+#if defined(Q_OS_UNIX)
+  if (on) parameters.c_cflag |= CRTSCTS;
+  else parameters.c_cflag &= ~CRTSCTS;
+  parameters.c_cc[VMIN]  = 0; // #### needed ?
+  parameters.c_cc[VTIME] = 0; // #### needed ?
+#elif defined(Q_OS_WIN)
+  // #### not sure about that
+  parameters.dcb.fParity = on;
+  parameters.dcb.fOutxCtsFlow = on;
+  parameters.dcb.fOutxDsrFlow = on;
+  parameters.dcb.fDtrControl = (on ? DTR_CONTROL_ENABLE : DTR_CONTROL_DISABLE);
+  parameters.dcb.fDsrSensitivity = on;
+  parameters.dcb.fTXContinueOnXoff = on;
+  parameters.dcb.fOutX = on;
+  parameters.dcb.fInX = on;
+  parameters.dcb.fNull = on;
+  parameters.dcb.fRtsControl = (on ? RTS_CONTROL_ENABLE : RTS_CONTROL_DISABLE);
+  parameters.dcb.fAbortOnError = on;
+#endif
+}
+
+bool Port::Serial::setHardwareFlowControl(bool on)
+{
+  Parameters parameters;
+  if ( !getParameters(parameters) ) return false;
+  setHardwareFlowControl(parameters, on);
+  return setParameters(parameters);
+}
+
+void Port::Serial::setSystemError(const QString &message)
+{
+#if defined(Q_OS_UNIX)
+  log(Log::LineType::Error, message + QString(" (errno=%1)").arg(strerror(errno)));
+#elif defined(Q_OS_WIN)
+  LPVOID lpMsgBuf;
+  FormatMessage(FORMAT_MESSAGE_ALLOCATE_BUFFER | FORMAT_MESSAGE_FROM_SYSTEM | FORMAT_MESSAGE_IGNORE_INSERTS, NULL, GetLastError(), MAKELANGID(LANG_NEUTRAL, SUBLANG_DEFAULT), (LPTSTR)&lpMsgBuf, 0, NULL);
+  log(Log::LineType::Error, message + QString(" (last error=%1 %2)").arg(GetLastError()).arg((const char *)(LPCTSTR)lpMsgBuf));
+  LocalFree(lpMsgBuf);
+#endif
+}
diff --git a/src/common/port/serial.h b/src/common/port/serial.h
new file mode 100644
index 0000000..b2911e6
--- /dev/null
+++ b/src/common/port/serial.h
@@ -0,0 +1,113 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *   Copyright (C) 2002-2003 Stephen Landamore <stephen@landamore.com>     *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef SERIAL_H
+#define SERIAL_H
+
+#include "common/global/global.h"
+#ifdef Q_OS_UNIX
+#  include <termios.h>
+#elif defined(Q_OS_WIN)
+#  include <io.h>
+#endif
+#include "port_base.h"
+
+namespace Port
+{
+
+class Serial : public Base
+{
+public:
+  enum Speed { S0 = 0, S50, S75, S110, S134, S150, S200, S300, S600, S1200,
+               S1800, S2400, S4800, S9600, S19200, S38400, S57600, S115200,
+               Nb_Speeds };
+  static const uint SPEED_VALUES[Nb_Speeds];
+  struct SpeedData {
+    bool supported;
+    uint flag;
+  };
+  static const SpeedData SPEED_DATA[Nb_Speeds];
+
+  enum Property { NoProperty = 0, NeedDrain = 1, NeedFlush = 2, NeedBreak = 4,
+                  Blocking = 8 };
+  Q_DECLARE_FLAGS(Properties, Property)
+
+  Serial(const QString &device, Properties properties, Log::Base &base);
+  virtual ~Serial() { close(); }
+  virtual Description description() const { return Description(PortType::Serial, _device); }
+
+  static const QStringList &probedDeviceList();
+  static IODirs probe(const QString &device);
+  static bool isAvailable() { return true; }
+
+  enum InputFlag { NoInputFlag = 0, IgnoreBreak = 1, IgnoreParity = 2 };
+  Q_DECLARE_FLAGS(InputFlags, InputFlag)
+  enum ControlFlag { NoControlFlag = 0, ByteSize8 = 1, HardwareFlowControl = 2,
+                     EnableReceiver = 4, IgnoreControlLines = 8 };
+  Q_DECLARE_FLAGS(ControlFlags, ControlFlag)
+  bool setMode(InputFlags inputFlags, ControlFlags controlFlags, Speed speed, uint readTimeout); // in ms
+  bool drain(uint timeout);
+  bool flush(uint timeout);
+  bool doBreak(uint duration); // in ms
+  bool setHardwareFlowControl(bool on);
+
+  enum Pin { DCD = 0, RX, TX, DTR, SG, DSR, RTS, CTS, RI, Nb_Pins };
+  struct SPinData {
+    IODir dir;
+    const char *label;
+  };
+  static const SPinData PIN_DATA[Nb_Pins];
+  virtual bool setPinOn(uint pin, bool on, LogicType type);
+  virtual bool readPin(uint pin, LogicType type, bool &value);
+  virtual QValueVector<PinData> pinData(IODir dir) const;
+  virtual bool isGroundPin(uint pin) const;
+  virtual uint groundPin() const { return SG; }
+  virtual IODir ioDir(uint pin) const;
+
+private:
+  QString    _device;
+  Properties _properties;
+#if defined(Q_OS_UNIX)
+  typedef int Handle;
+  typedef termios Parameters;
+#elif defined(Q_OS_WIN)
+  typedef HANDLE Handle;
+  struct Parameters {
+    DCB             dcb;
+    COMMTIMEOUTS    comtmo;
+  };
+#endif
+  Handle  _fd;
+  Parameters _oldParameters;
+
+  bool setParameters(const Parameters &parameters);
+  bool getParameters(Parameters &parameters);
+  virtual bool internalOpen();
+  virtual void internalClose();
+  virtual bool internalSend(const char *data, uint size, uint timeout);
+  virtual bool internalReceive(uint size, char *data, uint timeout);
+  virtual void setSystemError(const QString &message);
+  bool internalSetPinOn(Pin pin, bool on);
+  bool internalReadPin(Pin pin, LogicType type, bool &value);
+
+  static const Handle INVALID_HANDLE;
+  static Handle openHandle(const QString &device, IODirs dirs);
+  static void closeHandle(Handle handle);
+  static QStringList *_list;
+  static QStringList deviceList();
+  static void setHardwareFlowControl(Parameters &parameters, bool on);
+};
+Q_DECLARE_OPERATORS_FOR_FLAGS(Serial::Properties)
+Q_DECLARE_OPERATORS_FOR_FLAGS(Serial::InputFlags)
+Q_DECLARE_OPERATORS_FOR_FLAGS(Serial::ControlFlags)
+
+} // namespace
+
+#endif
diff --git a/src/common/port/usb_port.cpp b/src/common/port/usb_port.cpp
new file mode 100644
index 0000000..392b483
--- /dev/null
+++ b/src/common/port/usb_port.cpp
@@ -0,0 +1,411 @@
+/***************************************************************************
+ * Copyright (C) 2005 Lorenz Mösenlechner & Matthias Kranz                 *
+ *                    <icd2linux@hcilab.org>                               *
+ * Copyright (C) 2003-2005 Orion Sky Lawlor <olawlor@acm.org>              *
+ * Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>               *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "usb_port.h"
+
+#ifdef HAVE_USB
+# include <usb.h>
+#endif
+#include <qdatetime.h>
+
+#include "common/common/version_data.h"
+#include "common/common/number.h"
+
+//-----------------------------------------------------------------------------
+class Port::USB::Private
+{
+public:
+#ifdef HAVE_USB
+  Private() : _interface(0) {}
+  const usb_interface_descriptor *_interface;
+#endif
+};
+
+bool Port::USB::_initialized = false;
+
+void Port::USB::initialize()
+{
+  if (_initialized) return;
+  _initialized = true;
+#ifdef HAVE_USB
+  usb_init();
+  VersionData vd = VersionData::fromString(LIBUSB_VERSION);
+  QString s = QString("libusb %1").arg(vd.pretty());
+  if ( vd<VersionData(0, 1, 8) ) qWarning("%s: may be too old (you need at least version 0.1.8)", s.latin1());
+#endif
+}
+
+bool Port::USB::isAvailable()
+{
+#ifdef HAVE_USB
+  return true;
+#else
+  return false;
+#endif
+}
+
+usb_bus *Port::USB::getBusses()
+{
+  initialize();
+#ifdef HAVE_USB
+  // refresh libusb structures
+  usb_find_busses();
+  usb_find_devices();
+  return usb_get_busses();
+#else
+  return 0;
+#endif
+}
+
+bool Port::USB::findBulk(const struct usb_device *dev)
+{
+  initialize();
+#ifdef HAVE_USB
+  int configuration = -1, interface = -1, altsetting = -1, bulk_endpoint = -1;
+  // walk through the possible configs, etc.
+  qDebug("This device has %d possible configuration(s).", dev->descriptor.bNumConfigurations);
+  for (int c=0; c<dev->descriptor.bNumConfigurations; c++) {
+    qDebug("Looking at configuration %d...This configuration has %d interfaces.", c, dev->config[c].bNumInterfaces);
+    for(int i=0; i<dev->config[c].bNumInterfaces; i++) {
+      qDebug("  Looking at interface %d...This interface has %d altsettings.", i, dev->config[c].interface[i].num_altsetting);
+      for (int a=0; a < dev->config[c].interface[i].num_altsetting; a++) {
+        qDebug("    Looking at altsetting %d...This altsetting has %d endpoints.", a, dev->config[c].interface[i].altsetting[a].bNumEndpoints);
+        for (int e=0; e < dev->config[c].interface[i].altsetting[a].bNumEndpoints; e++) {
+          QString s;
+          s.sprintf("      Endpoint %d: Address %02xh, attributes %02xh ", e, dev->config[c].interface[i].altsetting[a].endpoint[e].bEndpointAddress, dev->config[c].interface[i].altsetting[a].endpoint[e].bmAttributes);
+          uchar attribs = (dev->config[c].interface[i].altsetting[a].endpoint[e].bmAttributes & 3);
+          switch (attribs) {
+          case 0: s += "(Control) "; break;
+          case 1: s += "(Isochronous) "; break;
+          case 2: s += "(Bulk) ";
+            /* Found the correct configuration, interface etc... it has bulk endpoints! */
+            configuration=c;
+            interface=i;
+            altsetting=a;
+            break;
+          case 3: s += "(Interrupt) "; break;
+          default: s += "ERROR! Got an illegal value in endpoint bmAttributes";
+          }
+          if ( attribs!=0 ) {
+            uchar dir = (dev->config[c].interface[i].altsetting[a].endpoint[e].bEndpointAddress & 0x80);
+            switch (dir) {
+            case 0x00: s += "(Out)";
+              // Do nothing in this case
+              break;
+            case 0x80: s += "(In)";
+              if ((dev->config[c].interface[i].altsetting[a].endpoint[e].bmAttributes & 0x03) == 2) /* Make sure it's a *bulk* endpoint */ {
+                // Found the correct endpoint to use for bulk transfer; use its ADDRESS
+                bulk_endpoint=dev->config[c].interface[i].altsetting[a].endpoint[e].bEndpointAddress;
+              }
+              break;
+            default: s += "ERROR! Got an illegal value in endpoint bEndpointAddress";
+            }
+          }
+          qDebug("%s", s.latin1());
+        }
+      }
+    }
+  }
+  if (bulk_endpoint<0) {
+    qDebug("No valid interface found!");
+    return false;
+  }
+#endif
+  return true;
+}
+
+QStringList Port::USB::probedDeviceList()
+{
+  initialize();
+  QStringList list;
+#ifdef HAVE_USB
+  usb_init(); // needed ?
+  for (usb_bus *bus=getBusses(); bus; bus=bus->next) {
+    for (struct usb_device *dev=bus->devices; dev; dev=dev->next) {
+      if ( dev->descriptor.idVendor==0 ) continue; // controller
+      list.append(QString("Vendor Id: %1 - Product Id: %2")
+                  .arg(toLabel(NumberBase::Hex, dev->descriptor.idVendor, 4)).arg(toLabel(NumberBase::Hex, dev->descriptor.idProduct, 4)));
+    }
+  }
+#endif
+  return list;
+}
+
+struct usb_device *Port::USB::findDevice(uint vendorId, uint productId)
+{
+  initialize();
+#ifdef HAVE_USB
+  for (usb_bus *bus=getBusses(); bus; bus=bus->next) {
+    for (struct usb_device *dev=bus->devices; dev; dev=dev->next) {
+      if ( dev->descriptor.idVendor==vendorId && dev->descriptor.idProduct==productId )
+        return dev;
+    }
+  }
+#else
+  Q_UNUSED(vendorId); Q_UNUSED(productId);
+  qDebug("USB support disabled");
+#endif
+  return 0;
+}
+
+//-----------------------------------------------------------------------------
+const char * const Port::USB::ENDPOINT_MODE_NAMES[Nb_EndpointModes] = {
+  "bulk", "interrupt", "control", "isochronous"
+};
+
+Port::USB::USB(Log::Base &base, uint vendorId, uint productId, uint config, uint interface)
+  : Base(base), _vendorId(vendorId), _productId(productId),
+    _config(config), _interface(interface), _handle(0), _device(0)
+{
+  Q_ASSERT( config>=1 );
+  _private = new Private;
+  initialize();
+}
+
+Port::USB::~USB()
+{
+  close();
+  delete _private;
+}
+
+void Port::USB::setSystemError(const QString &message)
+{
+#ifdef HAVE_USB
+  log(Log::LineType::Error, message + QString(" (err=%1).").arg(usb_strerror()));
+#else
+  log(Log::LineType::Error, message);
+#endif
+}
+
+void Port::USB::tryToDetachDriver()
+{
+  // try to detach an already existing driver... (linux only)
+#if defined(LIBUSB_HAS_GET_DRIVER_NP) && LIBUSB_HAS_GET_DRIVER_NP
+  log(Log::DebugLevel::Extra, "find if there is already an installed driver");
+  char dname[256] = "";
+  if ( usb_get_driver_np(_handle, _interface, dname, 255)<0 ) return;
+  log(Log::DebugLevel::Normal, QString("  a driver \"%1\" is already installed...").arg(dname));
+#  if defined(LIBUSB_HAS_DETACH_KERNEL_DRIVER_NP) && LIBUSB_HAS_DETACH_KERNEL_DRIVER_NP
+  usb_detach_kernel_driver_np(_handle, _interface);
+  log(Log::DebugLevel::Normal, "  try to detach it...");
+  if ( usb_get_driver_np(_handle, _interface, dname, 255)<0 ) return;
+  log(Log::DebugLevel::Normal, "  failed to detach it");
+#  endif
+#endif
+}
+
+bool Port::USB::internalOpen()
+{
+#ifdef HAVE_USB
+  _device = findDevice(_vendorId, _productId);
+  if ( _device==0 ) {
+    log(Log::LineType::Error, i18n("Could not find USB device (vendor=%1 product=%2).")
+             .arg(toLabel(NumberBase::Hex, _vendorId, 4)).arg(toLabel(NumberBase::Hex, _productId, 4)));
+    return false;
+  }
+  log(Log::DebugLevel::Extra, QString("found USB device as \"%1\" on bus \"%2\"").arg(_device->filename).arg(_device->bus->dirname));
+  _handle = usb_open(_device);
+  if ( _handle==0 ) {
+    setSystemError(i18n("Error opening USB device."));
+    return false;
+  }
+// windows: usb_reset takes about 7-10 seconds to re-enumerate the device...
+// BSD : not implemented in libusb...
+#  if !defined(Q_OS_BSD4) && !defined(Q_OS_WIN)
+  if ( usb_reset(_handle)<0 ) {
+    setSystemError(i18n("Error resetting USB device."));
+    return false;
+  }
+#  endif
+  usb_close(_handle);
+  _handle = usb_open(_device);
+  if ( _handle==0 ) {
+    setSystemError(i18n("Error opening USB device."));
+    return false;
+  }
+  tryToDetachDriver();
+  uint i = 0;
+  for (; i<_device->descriptor.bNumConfigurations; i++)
+    if ( _config==_device->config[i].bConfigurationValue ) break;
+  if ( i==_device->descriptor.bNumConfigurations ) {
+    uint old = _config;
+    i = 0;
+    _config = _device->config[i].bConfigurationValue;
+    log(Log::LineType::Warning, i18n("Configuration %1 not present: using %2").arg(old).arg(_config));
+  }
+  const usb_config_descriptor &configd = _device->config[i];
+  if ( usb_set_configuration(_handle, _config)<0 ) {
+    setSystemError(i18n("Error setting USB configuration %1.").arg(_config));
+    return false;
+  }
+  for (i=0; i<configd.bNumInterfaces; i++)
+    if ( _interface==configd.interface[i].altsetting[0].bInterfaceNumber ) break;
+  if ( i==configd.bNumInterfaces ) {
+    uint old = _interface;
+    i = 0;
+    _interface = configd.interface[i].altsetting[0].bInterfaceNumber;
+    log(Log::LineType::Warning, i18n("Interface %1 not present: using %2").arg(old).arg(_interface));
+  }
+  _private->_interface = &(configd.interface[i].altsetting[0]);
+  if ( usb_claim_interface(_handle, _interface)<0 ) {
+    setSystemError(i18n("Could not claim USB interface %1").arg(_interface));
+    return false;
+  }
+  log(Log::DebugLevel::Max, QString("alternate setting is %1").arg(_private->_interface->bAlternateSetting));
+  log(Log::DebugLevel::Max, QString("USB bcdDevice: %1").arg(toHexLabel(_device->descriptor.bcdDevice, 4)));
+  return true;
+#else
+  log(Log::LineType::Error, i18n("USB support disabled"));
+  return false;
+#endif
+}
+
+void Port::USB::internalClose()
+{
+  if ( _handle==0 ) return;
+#ifdef HAVE_USB
+  usb_release_interface(_handle, _interface);
+  usb_close(_handle);
+  _private->_interface = 0;
+#endif
+  _device = 0;
+  _handle = 0;
+}
+
+bool Port::USB::sendControlMessage(const ControlMessageData &data)
+{
+  if ( hasError() ) return false;
+#ifdef HAVE_USB
+  QString s = data.bytes;
+  uint length = strlen(data.bytes) / 2;
+  QByteArray ba(length);
+  for (uint i=0; i<length; i++)
+    ba[i] = fromString(NumberBase::Hex, s.mid(2*i, 2), 0);
+  int res = usb_control_msg(_handle, data.type, data.request, data.value, 0, ba.data(), length, 1000); // 1s
+  if ( res<0 ) {
+    setSystemError(i18n("Error sending control message to USB port."));
+    return false;
+  }
+#endif
+  return true;
+}
+
+uint timeout(uint size)
+{
+  return qMax(size*5, uint(1000)); // 5ms per byte or 1s
+}
+
+
+Port::USB::EndpointMode Port::USB::endpointMode(uint ep) const
+{
+#ifdef HAVE_USB
+  uint index = ep & USB_ENDPOINT_ADDRESS_MASK;
+  Q_ASSERT(_private->_interface);
+  const usb_endpoint_descriptor *ued = _private->_interface->endpoint + index;
+  Q_ASSERT(ued);
+  switch (ued->bmAttributes & USB_ENDPOINT_TYPE_MASK) {
+    case USB_ENDPOINT_TYPE_BULK: return Bulk;
+    case USB_ENDPOINT_TYPE_INTERRUPT: return Interrupt;
+    case USB_ENDPOINT_TYPE_ISOCHRONOUS: return Isochronous;
+    case USB_ENDPOINT_TYPE_CONTROL: return Control;
+    default: break;
+  }
+#endif
+  Q_ASSERT(false);
+  return Nb_EndpointModes;
+}
+
+Port::IODir Port::USB::endpointDir(uint ep) const
+{
+#ifdef HAVE_USB
+  switch (ep & USB_ENDPOINT_DIR_MASK) {
+    case USB_ENDPOINT_IN: return In;
+    case USB_ENDPOINT_OUT: return Out;
+    default: break;
+  }
+#endif
+  Q_ASSERT(false);
+  return NoIO;
+}
+
+bool Port::USB::write(uint ep, const char *data, uint size)
+{
+  if ( hasError() ) return false;
+#ifdef HAVE_USB
+  IODir dir = endpointDir(ep);
+  EndpointMode mode = endpointMode(ep);
+  log(Log::DebugLevel::LowLevel, QString("write to endpoint %1 (%2 - %3) %4 chars: \"%5\"")
+                          .arg(toHexLabel(ep, 2)).arg(ENDPOINT_MODE_NAMES[mode]).arg(IO_DIR_NAMES[dir]).arg(size).arg(toPrintable(data, size, PrintEscapeAll)));
+  Q_ASSERT( dir==Out );
+  QTime time;
+  time.start();
+  int todo = size;
+  for (;;) {
+    int res = 0;
+    //qDebug("write ep=%i todo=%i/%i", ep, todo, size);
+    if ( mode==Interrupt ) res = usb_interrupt_write(_handle, ep, (char *)data + size - todo, todo, timeout(todo));
+    else res = usb_bulk_write(_handle, ep, (char *)data + size - todo, todo, timeout(todo));
+    //qDebug("res: %i", res);
+    if ( res==todo ) break;
+    if ( uint(time.elapsed())>3000 ) { // 3 s
+      if ( res<0 ) setSystemError(i18n("Error sending data (ep=%1 res=%2)").arg(toHexLabel(ep, 2)).arg(res));
+      else log(Log::LineType::Error, i18n("Timeout: only some data sent (%1/%2 bytes).").arg(size-todo).arg(size));
+      return false;
+    }
+    if ( res==0 ) log(Log::DebugLevel::Normal, i18n("Nothing sent: retrying..."));
+    if ( res>0 ) todo -= res;
+    msleep(100);
+  }
+#else
+  Q_UNUSED(ep); Q_UNUSED(data); Q_UNUSED(size);
+#endif
+  return true;
+}
+
+bool Port::USB::read(uint ep, char *data, uint size, bool *poll)
+{
+  if ( hasError() ) return false;
+#ifdef HAVE_USB
+  IODir dir = endpointDir(ep);
+  EndpointMode mode = endpointMode(ep);
+  log(Log::DebugLevel::LowLevel, QString("read from endpoint %1 (%2 - %3) %4 chars")
+                          .arg(toHexLabel(ep, 2)).arg(ENDPOINT_MODE_NAMES[mode]).arg(IO_DIR_NAMES[dir]).arg(size));
+  Q_ASSERT( dir==In );
+  QTime time;
+  time.start();
+  int todo = size;
+  for (;;) {
+    int res = 0;
+    //qDebug("read ep=%i size=%i", ep, todo);
+    if ( mode==Interrupt ) res = usb_interrupt_read(_handle, ep, data + size - todo, todo, timeout(todo));
+    else res = usb_bulk_read(_handle, ep, data + size - todo, todo, timeout(todo));
+    //qDebug("res: %i", res);
+    if ( res==todo ) break;
+    if ( uint(time.elapsed())>3000 ) { // 3 s: seems to help icd2 in some case (?)
+      if ( res<0 ) setSystemError(i18n("Error receiving data (ep=%1 res=%2)").arg(toHexLabel(ep, 2)).arg(res));
+      else log(Log::LineType::Error, i18n("Timeout: only some data received (%1/%2 bytes).").arg(size-todo).arg(size));
+      return false;
+    }
+    if ( res==0 ) {
+      if (poll) {
+        *poll = false;
+        return true;
+      } else log(Log::DebugLevel::Normal, i18n("Nothing received: retrying..."));
+    }
+    if ( res>0 ) todo -= res;
+    msleep(100);
+  }
+  if (poll) *poll = true;
+#else
+  Q_UNUSED(ep); Q_UNUSED(data); Q_UNUSED(size);
+#endif
+  return true;
+}
diff --git a/src/common/port/usb_port.h b/src/common/port/usb_port.h
new file mode 100644
index 0000000..73961cc
--- /dev/null
+++ b/src/common/port/usb_port.h
@@ -0,0 +1,70 @@
+/***************************************************************************
+ * Copyright (C) 2005 Lorenz Mösenlechner & Matthias Kranz                 *
+ *                    <icd2linux@hcilab.org>                               *
+ * Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef USB_PORT_H
+#define USB_PORT_H
+
+#include "port_base.h"
+#if defined(Q_OS_WIN)
+#undef interface
+#endif
+struct usb_dev_handle;
+struct usb_device;
+struct usb_bus;
+
+namespace Port
+{
+
+class USB : public Base
+{
+public:
+  USB(Log::Base &base, uint vendorId, uint productId, uint config, uint interface);
+  virtual ~USB();
+  virtual Description description() const { return Description(PortType::USB, QString::null); }
+
+  static struct usb_device *findDevice(uint vendorId, uint productId);
+  static bool isAvailable();
+  static QStringList probedDeviceList();
+
+  struct ControlMessageData {
+    int type, request, value;
+    const char *bytes;
+  };
+  bool sendControlMessage(const ControlMessageData &data);
+  enum EndpointMode { Bulk = 0, Interrupt, Control, Isochronous, Nb_EndpointModes };
+  static const char * const ENDPOINT_MODE_NAMES[Nb_EndpointModes];
+  EndpointMode endpointMode(uint ep) const;
+  IODir endpointDir(uint ep) const;
+
+protected:
+  bool write(uint endPoint, const char *data, uint size);
+  bool read(uint endPoint, char *data, uint size, bool *poll = 0);
+
+private:
+  class Private;
+  Private        *_private;
+  uint _vendorId, _productId, _config, _interface;
+  usb_dev_handle *_handle;
+  usb_device     *_device;
+
+  virtual bool internalOpen();
+  virtual void internalClose();
+  virtual void setSystemError(const QString &message);
+  void tryToDetachDriver();
+
+  static bool _initialized;
+  static void initialize();
+  static usb_bus *getBusses();
+  static bool findBulk(const struct usb_device *device);
+};
+
+} // namespace
+
+#endif
diff --git a/src/data/Makefile.am b/src/data/Makefile.am
new file mode 100644
index 0000000..e900930
--- /dev/null
+++ b/src/data/Makefile.am
@@ -0,0 +1,17 @@
+INCLUDES = $(all_includes)
+SUBDIRS = app_data likeback
+
+piklabdir = $(kde_datadir)/piklab/icons
+piklab_ICON = AUTO
+
+syntaxkatedir = $(kde_datadir)/katepart/syntax
+syntaxkate_DATA = asm-pic.xml coff-pic.xml jal-pic.xml coff-c-pic.xml
+
+noinst_PROGRAMS = syntax_xml_generator
+syntax_xml_generator_SOURCES = syntax_xml_generator.cpp
+syntax_xml_generator_LDADD = $(LIB_QT)
+syntax_xml_generator_LDFLAGS = $(all_libraries)
+
+asm-pic.xml coff-pic.xml: syntax_xml_generator
+	./syntax_xml_generator
+CLEANFILES = asm-pic.xml coff-pic.xml
diff --git a/src/data/app_data/Makefile.am b/src/data/app_data/Makefile.am
new file mode 100644
index 0000000..61959e6
--- /dev/null
+++ b/src/data/app_data/Makefile.am
@@ -0,0 +1,9 @@
+xdg_apps_DATA = piklab.desktop
+
+rcdir   = $(kde_datadir)/piklab
+rc_DATA = piklabui.rc hexeditorpartui.rc
+
+KDE_ICON = AUTO
+
+mimedir   = $(kde_mimedir)/application
+mime_DATA = x-piklab.desktop
diff --git a/src/data/app_data/hexeditorpartui.rc b/src/data/app_data/hexeditorpartui.rc
new file mode 100644
index 0000000..5471b03
--- /dev/null
+++ b/src/data/app_data/hexeditorpartui.rc
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!DOCTYPE kpartgui SYSTEM "kpartgui.dtd">
+<kpartgui name="HexEditorPart" version="1">
+
+<MenuBar>
+  <Menu name="file" noMerge="1"><text>&amp;File</text>
+    <Action name="file_save" group="save_merge" />
+    <Action name="file_save_as" group="save_merge" />
+    <Action name="file_reload" group="revert_merge" />
+  </Menu>
+
+  <Menu name="tools" noMerge="1"><text>&amp;Tools</text>
+    <Action name="tools_toggle_write_lock" group="tools_operations" />
+  </Menu>
+</MenuBar>
+
+<ToolBar name="mainToolBar" noMerge="1"><text>Main Toolbar</text>
+  <Action name="file_save" group="file_operations" />
+  <Action name="file_save_as" group="file_operations" />
+</ToolBar>
+</kpartgui>
diff --git a/src/data/app_data/hi16-app-piklab.png b/src/data/app_data/hi16-app-piklab.png
new file mode 100644
index 0000000..05baea4
--- /dev/null
+++ b/src/data/app_data/hi16-app-piklab.png
diff --git a/src/data/app_data/hi32-app-piklab.png b/src/data/app_data/hi32-app-piklab.png
new file mode 100644
index 0000000..586e094
--- /dev/null
+++ b/src/data/app_data/hi32-app-piklab.png
diff --git a/src/data/app_data/hi32-mime-piklab_project.png b/src/data/app_data/hi32-mime-piklab_project.png
new file mode 100644
index 0000000..586e094
--- /dev/null
+++ b/src/data/app_data/hi32-mime-piklab_project.png
diff --git a/src/data/app_data/hi64-app-piklab.png b/src/data/app_data/hi64-app-piklab.png
new file mode 100644
index 0000000..7b1bf37
--- /dev/null
+++ b/src/data/app_data/hi64-app-piklab.png
diff --git a/src/data/app_data/piklab.desktop b/src/data/app_data/piklab.desktop
new file mode 100644
index 0000000..e2f8145
--- /dev/null
+++ b/src/data/app_data/piklab.desktop
@@ -0,0 +1,13 @@
+[Desktop Entry]
+Type=Application
+Exec=piklab %U
+Icon=piklab.png
+X-DocPath=piklab/index.html
+Categories=Qt;KDE;Development;IDE;Electronics;
+Comment=Integrated development environment for applications based on PIC microcontrollers.
+Comment[fr]=Environnement de développement intégré pour applications utilisant des microcontroleurs PIC.
+Comment[es]=Entorno integrado de desarrollo de aplicaciones basadas en microcontroladores PIC.
+Terminal=false
+Name=Piklab
+GenericName=IDE
+MimeType=text/x-hex;application/x-piklab
diff --git a/src/data/app_data/piklabui.rc b/src/data/app_data/piklabui.rc
new file mode 100644
index 0000000..b6c4845
--- /dev/null
+++ b/src/data/app_data/piklabui.rc
@@ -0,0 +1,203 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!DOCTYPE kpartgui SYSTEM "kpartgui.dtd">
+<kpartgui name="piklab" version="45">
+
+<MenuBar>
+  <Menu name="file" noMerge="1"><text>&amp;File</text>
+    <Action name="file_new"/>
+    <Action name="file_new_hex"/>
+    <DefineGroup name="new_merge"/>
+    <Separator/>
+    <Action name="file_open"/>
+    <Action name="file_open_recent"/>
+    <DefineGroup name="open_merge"/>
+    <Separator/>
+    <DefineGroup name="save_merge"/>
+    <Action name="file_save_all"/>
+    <Separator/>
+    <Action name="file_revert_all"/>
+    <DefineGroup name="revert_merge"/>
+    <Separator/>
+    <DefineGroup name="print_merge"/>
+    <Merge/>
+    <Action name="file_close"/>
+    <Action name="file_close_all"/>
+    <Action name="file_closeother"/>
+    <DefineGroup name="close_merge"/>
+    <Separator/>
+    <Action name="file_quit"/>
+  </Menu>
+  <Menu name="edit"><text>&amp;Edit</text>
+    <DefineGroup name="edit_undo_merge"/>
+    <Separator/>
+    <DefineGroup name="edit_paste_merge"/>
+    <Separator/>
+    <DefineGroup name="edit_select_merge"/>
+    <Separator/>
+    <DefineGroup name="edit_find_merge"/>
+    <DefineGroup name="kdev_edit_find_merge"/>
+    <Separator/>
+    <DefineGroup name="edit_astyle"/>
+    <Separator/>
+    <Merge/>
+  </Menu>
+  <Menu name="view"><text>&amp;View</text>
+    <Action name="view_split_view" />
+    <Action name="view_remove_view" />
+    <DefineGroup name="history_operations"/>
+    <Action name="history_back"/>
+    <Action name="history_forward"/>
+    <Action name="file_switchto"/>
+    <Action name="raise_editor"/>
+    <Separator/>
+    <DefineGroup name="error_operations"/>
+    <Separator/>
+    <Action name="view_tool_views" />
+    <Action name="view_switch_source"/>
+    <Action name="show_disassembly_location"/>
+    <Merge/>
+    <Separator/>
+    <DefineGroup name="view_operations"/>
+  </Menu>
+  <Merge/>
+  <Menu name="project"><text>&amp;Project</text>
+    <Action name="project_new" />
+    <Action name="project_open" />
+    <Action name="project_open_recent" />
+    <Separator/>
+    <Action name="project_options" />
+    <Separator/>
+    <Action name="project_add_source_file" />
+    <Action name="project_add_object_file" />
+    <Action name="project_add_current_file" />
+    <Separator/>
+    <Action name="project_close" />
+  </Menu>
+  <Menu name="build"><text>Bu&amp;ild</text>
+    <Action name="build_compile_file" />
+    <Action name="build_build_project" />
+    <Action name="build_clean" />
+    <Separator/>
+    <Action name="build_stop" />
+  </Menu>
+  <Menu name="prog"><text>Pr&amp;ogrammer</text>
+    <Action name="prog_connect" />
+    <Action name="prog_power" />
+    <Action name="prog_disconnect" />
+    <Separator />
+    <Action name="prog_program" />
+    <Action name="prog_verify" />
+    <Action name="prog_read" />
+    <Action name="prog_erase" />
+    <Action name="prog_blank_check" />
+    <Separator />
+    <Action name="prog_run" />
+    <Action name="prog_stop" />
+    <Action name="prog_restart" />
+    <Separator />
+    <Action  name="prog_advanced" />
+    <Action  name="prog_settings" />
+  </Menu>
+  <Menu name="debug"><text>&amp;Debugger</text>
+    <Action name="debug_start" />
+    <Action name="debug_run" />
+    <Action name="debug_next" />
+    <Action name="debug_step_in" />
+    <Action name="debug_step_out" />
+    <Action name="debug_halt" />
+    <Action name="debug_stop" />
+    <Action name="debug_reset" />
+    <Separator />
+    <action name="debug_show_pc" />
+    <action name="debug_clear_breakpoints" />
+    <Separator />
+    <Action  name="debug_settings" />
+  </Menu>
+  <Menu name="tools"><text>&amp;Tools</text>
+    <Action name="tools_pikloops" />
+    <Action name="tools_kfind" />
+    <Action name="tools_device_information" />
+    <Action name="tools_config_generator" />
+    <DefineGroup name="tools_project_operations"/>
+    <Separator/>
+    <DefineGroup name="tools_operations"/>
+    <Separator/>
+    <DefineGroup name="tools_file_operations"/>
+    <Separator/>
+    <DefineGroup name="tools_language_operations"/>
+    <Merge/>
+  </Menu>
+  <Menu name="settings"><text>&amp;Settings</text>
+    <Action name="options_configure_toolchains" append="configure_merge" />
+  </Menu>
+  <Menu name="help" noMerge="1"><text>&amp;Help</text>
+    <Action name="help_contents"/>
+    <Action name="help_whats_this"/>
+    <Separator/>
+    <Action name="help_report_bug_piklab"/>
+    <Separator/>
+    <MergeLocal name="about_merge"/>
+    <Action name="help_about_app"/>
+    <Action name="help_about_kde"/>
+  </Menu>
+</MenuBar>
+
+<ToolBar name="projectToolBar" hidden="true"><text>Project Toolbar</text>
+  <Action name="project_new" />
+  <Action name="project_open_source" />
+  <Separator />
+  <Action name="project_options" />
+  <Action name="project_close" />
+  <Separator />
+  <Action name="project_add_current_file" />
+</ToolBar>
+
+<ToolBar name="buildToolBar"><text>Build Toolbar</text>
+  <Action name="build_build_project" />
+  <Action name="build_clean" />
+  <Action name="build_stop" />
+</ToolBar>
+
+<ToolBar name="progToolBar"><text>Programmer Toolbar</text>
+  <Action name="prog_connect" />
+  <Action name="prog_power" />
+  <Action name="prog_disconnect" />
+  <Separator />
+  <Action name="prog_program" />
+  <Action name="prog_verify" />
+  <Action name="prog_read" />
+  <Action name="prog_erase" />
+  <Action name="prog_blank_check" />
+  <Separator />
+  <Action name="prog_run" />
+  <Action name="prog_stop" />
+  <Action name="prog_restart" />
+</ToolBar>
+
+<ToolBar name="debugToolBar"><text>Debugger Toolbar</text>
+  <Action name="debug_start" />
+  <Action name="debug_run" />
+  <Action name="debug_next" />
+  <Action name="debug_step_in" />
+  <Action name="debug_step_out" />
+  <Action name="debug_halt" />
+  <Action name="debug_stop" />
+  <Action name="debug_reset" />
+</ToolBar>
+
+<Menu name="ktexteditor_popup">
+  <Action name="enable_breakpoint" />
+  <Action name="toggle_breakpoint" />
+  <Action name="clear_breakpoints" />
+  <Separator />
+  <Action name="show_disassembly_location" />
+  <Separator />
+</Menu>
+
+<Menu name="breakpoint_context_menu">
+  <Action name="enable_breakpoint" />
+  <Action name="toggle_breakpoint" />
+  <Action name="clear_breakpoints" />
+</Menu>
+
+</kpartgui>
diff --git a/src/data/app_data/x-piklab.desktop b/src/data/app_data/x-piklab.desktop
new file mode 100644
index 0000000..de7e510
--- /dev/null
+++ b/src/data/app_data/x-piklab.desktop
@@ -0,0 +1,8 @@
+[Desktop Entry]
+Name=Piklab
+Comment=Piklab Project File
+Comment[es]=Archivo de proyecto de Piklab
+Icon=piklab_project
+Type=MimeType
+MimeType=application/x-piklab
+Patterns=*.piklab;
diff --git a/src/data/coff-c-pic.xml b/src/data/coff-c-pic.xml
new file mode 100644
index 0000000..2090c02
--- /dev/null
+++ b/src/data/coff-c-pic.xml
@@ -0,0 +1,127 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!DOCTYPE language SYSTEM "language.dtd">
+<!-- modification of the C highlighting from the KDE distribution for single line disassembly listing -->
+<language name="XCoffDissC" version="1.0" kateversion="2.4" section="Sources" extensions="*.c;*.C;*.h" mimetype="text/x-csrc;text/x-c++src;text/x-chdr">
+  <highlighting>
+    <list name="keywords">
+      <item> break </item>
+      <item> case </item>
+      <item> continue </item>
+      <item> default </item>
+      <item> do </item>
+      <item> else </item>
+      <item> enum </item>
+      <item> extern </item>
+      <item> for </item>
+      <item> goto </item>
+      <item> if </item>
+      <item> return </item>
+      <item> sizeof </item>
+      <item> struct </item>
+      <item> switch </item>
+      <item> typedef </item>
+      <item> union </item>
+      <item> while </item>
+    </list>
+    <list name="types">
+      <item> auto </item>
+      <item> char </item>
+      <item> const </item>
+      <item> double </item>
+      <item> float </item>
+      <item> int </item>
+      <item> long </item>
+      <item> register </item>
+      <item> short </item>
+      <item> signed </item>
+      <item> static </item>
+      <item> unsigned </item>
+      <item> void </item>
+      <item> volatile </item>
+    </list>
+    <contexts>
+      <context attribute="Normal Text" lineEndContext="#stay" name="Normal">
+        <DetectSpaces />
+        <DetectChar attribute="Preprocessor" context="Preprocessor" char="#" firstNonSpace="true" />
+        <keyword attribute="Keyword" context="#stay" String="keywords"/>
+        <keyword attribute="Data Type" context="#stay" String="types"/>
+        <DetectIdentifier />
+        <DetectChar attribute="Symbol" context="#stay" char="{" />
+        <DetectChar attribute="Symbol" context="#stay" char="}" />
+        <Float attribute="Float" context="#stay">
+          <AnyChar String="fF" attribute="Float" context="#stay"/>
+        </Float>
+        <HlCOct attribute="Octal" context="#stay"/>
+        <HlCHex attribute="Hex" context="#stay"/>
+        <Int attribute="Decimal" context="#stay" >
+          <StringDetect attribute="Decimal" context="#stay" String="ULL" insensitive="TRUE"/>
+          <StringDetect attribute="Decimal" context="#stay" String="LUL" insensitive="TRUE"/>
+          <StringDetect attribute="Decimal" context="#stay" String="LLU" insensitive="TRUE"/>
+          <StringDetect attribute="Decimal" context="#stay" String="UL" insensitive="TRUE"/>
+          <StringDetect attribute="Decimal" context="#stay" String="LU" insensitive="TRUE"/>
+          <StringDetect attribute="Decimal" context="#stay" String="LL" insensitive="TRUE"/>
+          <StringDetect attribute="Decimal" context="#stay" String="U" insensitive="TRUE"/>
+          <StringDetect attribute="Decimal" context="#stay" String="L" insensitive="TRUE"/>
+        </Int>
+        <HlCChar attribute="Char" context="#stay"/>
+        <DetectChar attribute="String" context="String" char="&quot;"/>
+        <Detect2Chars attribute="Comment" context="comment" char="/" char1="*" />
+        <RegExpr attribute="Preprocessor" context="Outscoped" String="#\s*if\s+0" firstNonSpace="true" />
+        <AnyChar attribute="Symbol" context="#stay" String=":!%&amp;()+,-/.*&lt;=&gt;?[]|~^&#59;"/>
+      </context>
+      <context attribute="String" lineEndContext="#pop" name="String">
+        <LineContinue attribute="String" context="#stay"/>
+        <HlCStringChar attribute="String Char" context="#stay"/>
+        <DetectChar attribute="String" context="#pop" char="&quot;"/>
+      </context>
+      <context attribute="Comment" lineEndContext="#pop" name="comment">
+        <Detect2Chars attribute="Comment" context="#pop" char="*" char1="/" />
+        <IncludeRules context="##Alerts" />
+      </context>
+      <context attribute="Preprocessor" lineEndContext="#pop" name="Preprocessor">
+        <LineContinue attribute="Preprocessor" context="#stay"/>
+        <RegExpr attribute="Preprocessor" context="Define" String="define.*((?=\\))"/>
+        <RegExpr attribute="Preprocessor" context="#stay" String="define.*"/>
+        <RangeDetect attribute="Prep. Lib" context="#stay" char="&quot;" char1="&quot;"/>
+        <RangeDetect attribute="Prep. Lib" context="#stay" char="&lt;" char1="&gt;"/>
+        <Detect2Chars attribute="Comment" context="comment" char="/" char1="*" />
+      </context>
+      <context attribute="Preprocessor" lineEndContext="#pop" name="Define">
+        <LineContinue attribute="Preprocessor" context="#stay"/>
+      </context>
+      <context attribute="Comment" lineEndContext="#pop" name="Outscoped" >
+        <Detect2Chars attribute="Comment" context="comment" char="/" char1="*" />
+        <IncludeRules context="##Alerts" />
+        <RegExpr attribute="Comment" context="Outscoped intern" String="#\s*if" firstNonSpace="true" />
+        <RegExpr attribute="Preprocessor" context="#pop" String="#\s*(endif|else|elif)" firstNonSpace="true" />
+      </context>
+      <context attribute="Comment" lineEndContext="#pop" name="Outscoped intern">
+        <Detect2Chars attribute="Comment" context="comment" char="/" char1="*" />
+        <RegExpr attribute="Comment" context="Outscoped intern" String="#\s*if" firstNonSpace="true" />
+        <RegExpr attribute="Comment" context="#pop" String="#\s*endif" firstNonSpace="true" />
+      </context>
+    </contexts>
+    <itemDatas>
+      <itemData name="Normal Text"  defStyleNum="dsNormal"/>
+      <itemData name="Keyword"      defStyleNum="dsKeyword"/>
+      <itemData name="Data Type"    defStyleNum="dsDataType"/>
+      <itemData name="Decimal"      defStyleNum="dsDecVal"/>
+      <itemData name="Octal"        defStyleNum="dsBaseN"/>
+      <itemData name="Hex"          defStyleNum="dsBaseN"/>
+      <itemData name="Float"        defStyleNum="dsFloat"/>
+      <itemData name="Char"         defStyleNum="dsChar"/>
+      <itemData name="String"       defStyleNum="dsString"/>
+      <itemData name="String Char"  defStyleNum="dsChar"/>
+      <itemData name="Comment"      defStyleNum="dsComment"/>
+      <itemData name="Symbol"       defStyleNum="dsNormal"/>
+      <itemData name="Preprocessor" defStyleNum="dsOthers"/>
+      <itemData name="Prep. Lib"    defStyleNum="dsOthers"/>
+    </itemDatas>
+  </highlighting>
+  <general>
+    <comments>
+      <comment name="multiLine" start="/*" end="*/" />
+    </comments>
+    <keywords casesensitive="1" />
+  </general>
+</language>
diff --git a/src/data/hi16-action-piklab_addcurrentfile.png b/src/data/hi16-action-piklab_addcurrentfile.png
new file mode 100644
index 0000000..608c532
--- /dev/null
+++ b/src/data/hi16-action-piklab_addcurrentfile.png
diff --git a/src/data/hi16-action-piklab_addfile.png b/src/data/hi16-action-piklab_addfile.png
new file mode 100644
index 0000000..1a3cfa0
--- /dev/null
+++ b/src/data/hi16-action-piklab_addfile.png
diff --git a/src/data/hi16-action-piklab_blankcheck.png b/src/data/hi16-action-piklab_blankcheck.png
new file mode 100644
index 0000000..c71d4a5
--- /dev/null
+++ b/src/data/hi16-action-piklab_blankcheck.png
diff --git a/src/data/hi16-action-piklab_burnchip.png b/src/data/hi16-action-piklab_burnchip.png
new file mode 100644
index 0000000..7ddef9e
--- /dev/null
+++ b/src/data/hi16-action-piklab_burnchip.png
diff --git a/src/data/hi16-action-piklab_chip.png b/src/data/hi16-action-piklab_chip.png
new file mode 100644
index 0000000..f0e3437
--- /dev/null
+++ b/src/data/hi16-action-piklab_chip.png
diff --git a/src/data/hi16-action-piklab_closeproject.png b/src/data/hi16-action-piklab_closeproject.png
new file mode 100644
index 0000000..bdfd82c
--- /dev/null
+++ b/src/data/hi16-action-piklab_closeproject.png
diff --git a/src/data/hi16-action-piklab_compile.png b/src/data/hi16-action-piklab_compile.png
new file mode 100644
index 0000000..5a5360e
--- /dev/null
+++ b/src/data/hi16-action-piklab_compile.png
diff --git a/src/data/hi16-action-piklab_createproject.png b/src/data/hi16-action-piklab_createproject.png
new file mode 100644
index 0000000..5de505e
--- /dev/null
+++ b/src/data/hi16-action-piklab_createproject.png
diff --git a/src/data/hi16-action-piklab_decompile.png b/src/data/hi16-action-piklab_decompile.png
new file mode 100644
index 0000000..3490d6f
--- /dev/null
+++ b/src/data/hi16-action-piklab_decompile.png
diff --git a/src/data/hi16-action-piklab_editproject.png b/src/data/hi16-action-piklab_editproject.png
new file mode 100644
index 0000000..e8c3d55
--- /dev/null
+++ b/src/data/hi16-action-piklab_editproject.png
diff --git a/src/data/hi16-action-piklab_erasechip.png b/src/data/hi16-action-piklab_erasechip.png
new file mode 100644
index 0000000..36077b0
--- /dev/null
+++ b/src/data/hi16-action-piklab_erasechip.png
diff --git a/src/data/hi16-action-piklab_find_next.png b/src/data/hi16-action-piklab_find_next.png
new file mode 100644
index 0000000..3eaab85
--- /dev/null
+++ b/src/data/hi16-action-piklab_find_next.png
diff --git a/src/data/hi16-action-piklab_find_previous.png b/src/data/hi16-action-piklab_find_previous.png
new file mode 100644
index 0000000..29db6e6
--- /dev/null
+++ b/src/data/hi16-action-piklab_find_previous.png
diff --git a/src/data/hi16-action-piklab_openproject.png b/src/data/hi16-action-piklab_openproject.png
new file mode 100644
index 0000000..2da627b
--- /dev/null
+++ b/src/data/hi16-action-piklab_openproject.png
diff --git a/src/data/hi16-action-piklab_readchip.png b/src/data/hi16-action-piklab_readchip.png
new file mode 100644
index 0000000..b60277e
--- /dev/null
+++ b/src/data/hi16-action-piklab_readchip.png
diff --git a/src/data/hi16-action-piklab_verifychip.png b/src/data/hi16-action-piklab_verifychip.png
new file mode 100644
index 0000000..023f3b7
--- /dev/null
+++ b/src/data/hi16-action-piklab_verifychip.png
diff --git a/src/data/hi22-action-piklab_addcurrentfile.png b/src/data/hi22-action-piklab_addcurrentfile.png
new file mode 100644
index 0000000..4b27037
--- /dev/null
+++ b/src/data/hi22-action-piklab_addcurrentfile.png
diff --git a/src/data/hi22-action-piklab_addfile.png b/src/data/hi22-action-piklab_addfile.png
new file mode 100644
index 0000000..f911d65
--- /dev/null
+++ b/src/data/hi22-action-piklab_addfile.png
diff --git a/src/data/hi22-action-piklab_blankcheck.png b/src/data/hi22-action-piklab_blankcheck.png
new file mode 100644
index 0000000..4c93c85
--- /dev/null
+++ b/src/data/hi22-action-piklab_blankcheck.png
diff --git a/src/data/hi22-action-piklab_breakpoint_active.png b/src/data/hi22-action-piklab_breakpoint_active.png
new file mode 100644
index 0000000..35caf7c
--- /dev/null
+++ b/src/data/hi22-action-piklab_breakpoint_active.png
diff --git a/src/data/hi22-action-piklab_breakpoint_disabled.png b/src/data/hi22-action-piklab_breakpoint_disabled.png
new file mode 100644
index 0000000..c61f4c5
--- /dev/null
+++ b/src/data/hi22-action-piklab_breakpoint_disabled.png
diff --git a/src/data/hi22-action-piklab_breakpoint_invalid.png b/src/data/hi22-action-piklab_breakpoint_invalid.png
new file mode 100644
index 0000000..7c624cc
--- /dev/null
+++ b/src/data/hi22-action-piklab_breakpoint_invalid.png
diff --git a/src/data/hi22-action-piklab_breakpoint_reached.png b/src/data/hi22-action-piklab_breakpoint_reached.png
new file mode 100644
index 0000000..55255af
--- /dev/null
+++ b/src/data/hi22-action-piklab_breakpoint_reached.png
diff --git a/src/data/hi22-action-piklab_burnchip.png b/src/data/hi22-action-piklab_burnchip.png
new file mode 100644
index 0000000..8590c71
--- /dev/null
+++ b/src/data/hi22-action-piklab_burnchip.png
diff --git a/src/data/hi22-action-piklab_chip.png b/src/data/hi22-action-piklab_chip.png
new file mode 100644
index 0000000..0966442
--- /dev/null
+++ b/src/data/hi22-action-piklab_chip.png
diff --git a/src/data/hi22-action-piklab_closeproject.png b/src/data/hi22-action-piklab_closeproject.png
new file mode 100644
index 0000000..4983783
--- /dev/null
+++ b/src/data/hi22-action-piklab_closeproject.png
diff --git a/src/data/hi22-action-piklab_compile.png b/src/data/hi22-action-piklab_compile.png
new file mode 100644
index 0000000..7fa7489
--- /dev/null
+++ b/src/data/hi22-action-piklab_compile.png
diff --git a/src/data/hi22-action-piklab_createproject.png b/src/data/hi22-action-piklab_createproject.png
new file mode 100644
index 0000000..a8b16dc
--- /dev/null
+++ b/src/data/hi22-action-piklab_createproject.png
diff --git a/src/data/hi22-action-piklab_debug_step.png b/src/data/hi22-action-piklab_debug_step.png
new file mode 100644
index 0000000..3b7204c
--- /dev/null
+++ b/src/data/hi22-action-piklab_debug_step.png
diff --git a/src/data/hi22-action-piklab_debug_stepin.png b/src/data/hi22-action-piklab_debug_stepin.png
new file mode 100644
index 0000000..6a09a4c
--- /dev/null
+++ b/src/data/hi22-action-piklab_debug_stepin.png
diff --git a/src/data/hi22-action-piklab_debug_stepout.png b/src/data/hi22-action-piklab_debug_stepout.png
new file mode 100644
index 0000000..405f9a9
--- /dev/null
+++ b/src/data/hi22-action-piklab_debug_stepout.png
diff --git a/src/data/hi22-action-piklab_debug_stepover.png b/src/data/hi22-action-piklab_debug_stepover.png
new file mode 100644
index 0000000..cb512cb
--- /dev/null
+++ b/src/data/hi22-action-piklab_debug_stepover.png
diff --git a/src/data/hi22-action-piklab_debughalt.png b/src/data/hi22-action-piklab_debughalt.png
new file mode 100644
index 0000000..69dfb9e
--- /dev/null
+++ b/src/data/hi22-action-piklab_debughalt.png
diff --git a/src/data/hi22-action-piklab_decompile.png b/src/data/hi22-action-piklab_decompile.png
new file mode 100644
index 0000000..71eeff8
--- /dev/null
+++ b/src/data/hi22-action-piklab_decompile.png
diff --git a/src/data/hi22-action-piklab_editproject.png b/src/data/hi22-action-piklab_editproject.png
new file mode 100644
index 0000000..259c08e
--- /dev/null
+++ b/src/data/hi22-action-piklab_editproject.png
diff --git a/src/data/hi22-action-piklab_erasechip.png b/src/data/hi22-action-piklab_erasechip.png
new file mode 100644
index 0000000..a13f057
--- /dev/null
+++ b/src/data/hi22-action-piklab_erasechip.png
diff --git a/src/data/hi22-action-piklab_find_next.png b/src/data/hi22-action-piklab_find_next.png
new file mode 100644
index 0000000..c047271
--- /dev/null
+++ b/src/data/hi22-action-piklab_find_next.png
diff --git a/src/data/hi22-action-piklab_find_previous.png b/src/data/hi22-action-piklab_find_previous.png
new file mode 100644
index 0000000..99cea7c
--- /dev/null
+++ b/src/data/hi22-action-piklab_find_previous.png
diff --git a/src/data/hi22-action-piklab_openproject.png b/src/data/hi22-action-piklab_openproject.png
new file mode 100644
index 0000000..2d97fd1
--- /dev/null
+++ b/src/data/hi22-action-piklab_openproject.png
diff --git a/src/data/hi22-action-piklab_power.png b/src/data/hi22-action-piklab_power.png
new file mode 100644
index 0000000..b479583
--- /dev/null
+++ b/src/data/hi22-action-piklab_power.png
diff --git a/src/data/hi22-action-piklab_program_counter.png b/src/data/hi22-action-piklab_program_counter.png
new file mode 100644
index 0000000..529281a
--- /dev/null
+++ b/src/data/hi22-action-piklab_program_counter.png
diff --git a/src/data/hi22-action-piklab_program_counter_disabled.png b/src/data/hi22-action-piklab_program_counter_disabled.png
new file mode 100644
index 0000000..617c4ae
--- /dev/null
+++ b/src/data/hi22-action-piklab_program_counter_disabled.png
diff --git a/src/data/hi22-action-piklab_readchip.png b/src/data/hi22-action-piklab_readchip.png
new file mode 100644
index 0000000..1df48d0
--- /dev/null
+++ b/src/data/hi22-action-piklab_readchip.png
diff --git a/src/data/hi22-action-piklab_restart.png b/src/data/hi22-action-piklab_restart.png
new file mode 100644
index 0000000..a8dad33
--- /dev/null
+++ b/src/data/hi22-action-piklab_restart.png
diff --git a/src/data/hi22-action-piklab_run.png b/src/data/hi22-action-piklab_run.png
new file mode 100644
index 0000000..fc861fb
--- /dev/null
+++ b/src/data/hi22-action-piklab_run.png
diff --git a/src/data/hi22-action-piklab_stop.png b/src/data/hi22-action-piklab_stop.png
new file mode 100644
index 0000000..c2b68f7
--- /dev/null
+++ b/src/data/hi22-action-piklab_stop.png
diff --git a/src/data/hi22-action-piklab_verifychip.png b/src/data/hi22-action-piklab_verifychip.png
new file mode 100644
index 0000000..dbd11fa
--- /dev/null
+++ b/src/data/hi22-action-piklab_verifychip.png
diff --git a/src/data/hi32-action-piklab_config_assembler.png b/src/data/hi32-action-piklab_config_assembler.png
new file mode 100644
index 0000000..198b8d8
--- /dev/null
+++ b/src/data/hi32-action-piklab_config_assembler.png
diff --git a/src/data/hi32-action-piklab_config_disassembler.png b/src/data/hi32-action-piklab_config_disassembler.png
new file mode 100644
index 0000000..6107b62
--- /dev/null
+++ b/src/data/hi32-action-piklab_config_disassembler.png
diff --git a/src/data/hi32-action-piklab_config_programmer.png b/src/data/hi32-action-piklab_config_programmer.png
new file mode 100644
index 0000000..586e094
--- /dev/null
+++ b/src/data/hi32-action-piklab_config_programmer.png
diff --git a/src/data/jal-pic.xml b/src/data/jal-pic.xml
new file mode 100644
index 0000000..272d957
--- /dev/null
+++ b/src/data/jal-pic.xml
@@ -0,0 +1,104 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!DOCTYPE language SYSTEM "language.dtd">
+<language name="XPicJal" version="0.1" kateversion="2.0" section="Sources"
+    extensions="*.jal" mimetype="text/x-PicJal">
+
+  <highlighting>
+
+    <list name="directives">
+      <item> function </item>
+      <item> procedure </item>
+      <item> var </item>
+      <item> at </item>
+      <item> const </item>
+      <item> volatile </item>
+      <item> return </item>
+      <item> asm </item>
+      <item> assembler </item>
+    </list>
+
+    <list name="conditionnal">
+      <item> if </item>
+      <item> then </item>
+      <item> else </item>
+      <item> elsif </item>
+      <item> forever </item>
+      <item> end </item>
+      <item> while </item>
+      <item> loop </item>
+      <item> for </item>
+    </list>
+
+    <list name="instructions">
+      <item> bit </item>
+      <item> byte </item>
+    </list>
+
+    <contexts>
+
+      <context name="normal" attribute="Normal Text" lineEndContext="#stay">
+        <RegExpr attribute="Proprocessor" context="#stay" String="include.*"/>
+        <RegExpr attribute="Preprocessor" context="#stay" String="pragma.*"/>
+        <keyword attribute="Directives" context="#stay" String="directives"/>
+        <keyword attribute="Instructions" context="#stay" String="instructions"/>
+        <keyword attribute="SFRS" context="#stay" String="sfrs"/>
+        <keyword attribute="Conditionnal" context="#stay" String="conditionnal"/>
+        <HlCHex attribute="Based Numbers" context="#stay"/>
+        <RegExpr attribute="Based Numbers" context="#stay" String="(0x_[0-9A-F]+)" insensitive="TRUE" />
+        <RegExpr attribute="Based Numbers" context="#stay" String="(0b_[_0-1]+)" insensitive="TRUE" />
+        <Int attribute="Non Based Numbers" context="#stay" />
+        <HlCChar attribute="Char" context="#stay"/>
+        <DetectChar attribute="String" context="string" char="&quot;"/>
+        <DetectChar attribute="Comment" context="comment" char="--" />
+        <RegExpr attribute="Symbol" context="#stay" String="[-/*%+=&gt;&lt;&amp;|^!~]"/>
+        <RegExpr attribute="Symbol" context="#stay" String="(on|off|high|low|false|true)"/>
+      </context>
+
+      <context name="string" attribute="String" lineEndContext="#pop">
+        <LineContinue attribute="String" context="#stay"/>
+        <HlCStringChar attribute="Char" context="#stay"/>
+        <DetectChar attribute="String" context="#pop" char="&quot;"/>
+      </context>
+
+      <context name="comment" attribute="Comment" lineEndContext="#pop">
+        <RegExpr attribute="Instructions" context="#stay"
+           String="(FIXME|TODO|fixme|todo|INPUT|OUTPUT|PARAMETERS|AUTHOR|EMAIL)" />
+        <RegExpr attribute="ModuleMarks" context="#stay" beginRegion="moduleASM"
+           String="(&lt;[+]+[A-Za-z_#]+[A-Za-z0-9_#.]*&gt;)"  />
+        <RegExpr attribute="ModuleMarks" context="#stay"  endRegion="moduleASM"
+           String="(&lt;[-]+&gt;)"  />
+        <RegExpr attribute="ModuleMarks" context="#stay"
+           String="(&lt;[=]+[- 0-9]+&gt;)"  />
+        <RegExpr attribute="ModuleMarks" context="#stay"
+           String="(&lt;[?]+[A-Za-z_#]+[A-Za-z0-9_#]*&gt;)"  />
+      </context>
+
+    </contexts>
+
+    <itemDatas>
+      <itemData name="Normal Text"       defStyleNum="dsNormal"/>
+      <itemData name="Directives"        defStyleNum="dsOthers"/>
+      <itemData name="Preprocessor"      defStyleNum="dsNormal" color="#00FF00" selColor="#00FF00" bold="0" italic="0"/>
+      <itemData name="Conditionnal"      defStyleNum="dsNormal" color="#D819D8" selColor="#D819D8" bold="0" italic="0"/>
+      <itemData name="Instructions"      defStyleNum="dsNormal"  color="#0060FF" selColor="#8293CE" bold="1" italic="0"/>
+      <itemData name="SFRS"              defStyleNum="dsNormal" color="#2A8A19" selcolor="#000000" bold="1" italic="0"/>
+      <itemData name="ModuleMarks"       defStyleNum="dsNormal"   color="#FF20FF" selColor="#8293CE" bold="1" italic="0"/>
+      <itemData name="Non Based Numbers" defStyleNum="dsBaseN"/>
+      <itemData name="Char"              defStyleNum="dsChar"/>
+      <itemData name="String"            defStyleNum="dsString"/>
+      <itemData name="Comment"           defStyleNum="dsNormal" color="#FF3118" selColor="#FF3118" bold="0" italic="1" />
+      <itemData name="Symbol"            defStyleNum="dsNormal" color="#FF0000" selColor="#083194" bold="0" italic="0" />
+      <itemData name="Prep. Lib"         defStyleNum="dsOthers"/>
+      <itemData name="Based Numbers"     defStyleNum="dsBaseN" />
+    </itemDatas>
+
+  </highlighting>
+
+  <general>
+    <comments>
+      <comment name="singleLine" start="--" />
+    </comments>
+    <keywords casesensitive="1" />
+  </general>
+
+</language>
diff --git a/src/data/likeback/Makefile.am b/src/data/likeback/Makefile.am
new file mode 100644
index 0000000..1b17603
--- /dev/null
+++ b/src/data/likeback/Makefile.am
@@ -0,0 +1,2 @@
+piklabdir = $(kde_datadir)/piklab/icons
+piklab_ICON = AUTO
\ No newline at end of file
diff --git a/src/data/likeback/cr16-action-likeback_dislike.png b/src/data/likeback/cr16-action-likeback_dislike.png
new file mode 100644
index 0000000..4f0f8ee
--- /dev/null
+++ b/src/data/likeback/cr16-action-likeback_dislike.png
diff --git a/src/data/likeback/cr16-action-likeback_like.png b/src/data/likeback/cr16-action-likeback_like.png
new file mode 100644
index 0000000..bf6941d
--- /dev/null
+++ b/src/data/likeback/cr16-action-likeback_like.png
diff --git a/src/data/likeback/hi16-action-likeback_bug.png b/src/data/likeback/hi16-action-likeback_bug.png
new file mode 100644
index 0000000..4d7f5a6
--- /dev/null
+++ b/src/data/likeback/hi16-action-likeback_bug.png
diff --git a/src/data/syntax_xml_generator.cpp b/src/data/syntax_xml_generator.cpp
new file mode 100644
index 0000000..9f3553e
--- /dev/null
+++ b/src/data/syntax_xml_generator.cpp
@@ -0,0 +1,231 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+
+// this program generate xml files for kate highlighting
+// the original syntax file was created by Alain Gibaud
+
+#include <qfile.h>
+#include <qtextstream.h>
+
+const char * const DIRECTIVES[] = {
+"__badram", "__config", "__idlocs", "__maxram",
+"bankisel", "banksel", "cblock", "code", "cblock", "constant", "da", "data", "db",
+"de", "dt", "dw", "endm", "endc", "endw", "equ", "error", "errorlevel", "extern",
+"exitm", "expand", "fill", "global", "idata", "list", "local", "macro", "messg",
+"noexpand", "nolist", "org", "page", "processor", "pagesel", "radix", "res", "set",
+"space", "subtitle", "title", "udata", "udata_acs", "udata_ovr", "udata_shr",
+"variable", "end", 0
+};
+const char * const CONDITIONNALS[] = {
+"if", "else", "ifdef", "ifndef", "endif", "while", "include", "endw", "{", "}", 0
+};
+const char * const GPASM_MACROS[] = {
+"addcf", "b", "bc", "bz", "bnc", "bnz", "clrc", "clrz", "setc", "setz", "movfw",
+"negf", "skpc", "skpz", "skpnc", "skpnz", "subcf", "tstf", 0
+};
+const char * const CPIK_MACROS[] = {
+"IBZ", "IBNZ", "IBRA", "ICALL", 0
+};
+const char * const SFRS[] = { // #### should be extracted from dev files...
+"TOSU", "TOSH", "TOSL", "STKPTR", "PCLATU", "PCLATH", "PCL", "TBLPTRU", "TBLPTRH",
+"TBLPTRL", "TABLAT", "PRODH", "PRODL", "INTCON", "INTCON2", "INTCON3", "INDF0",
+"POSTINC0", "POSTDEC0", "PREINC0", "PLUSW0", "FSR0H", "FSR0L", "WREG", "INDF1",
+"POSTINC1", "POSTDEC1", "PREINC1", "PLUSW1", "FSR1H", "FSR1L", "BSR", "INDF2",
+"POSTINC2", "POSTDEC2", "PREINC2", "PLUSW2", "FSR2H", "FSR2L", "STATUS", "TMR0H",
+"TMR0L", "T0CON", "OSCCON", "LVDCON", "WDTCON", "RCON", "TMR1H", "TMR1L","T1CON",
+"TMR2", "PR2", "T2CON", "SSPBUF", "SSPADD", "SSPSTAT", "SSPCON1", "SSPCON2", "ADRESH",
+"ADRESL", "ADCON0", "ADCON1", "ADCON2", "CCPR1H", "CCPR1L", "CCP1CON", "CCPR2H",
+"CCPR2L", "CCP2CON", "PWM1CON", "ECCPAS", "CVRCON", "CMCON", "TMR3H", "TMR3L",
+"T3CON", "SPBRG", "RCREG", "TXREG", "TXSTA", "RCSTA", "EEADR", "EEDATA", "EECON2",
+"EECON1", "IPR2", "PIR2", "PIE2", "IPR1", "PIR1", "PIE1", "OSCTUNE", "TRISE",
+"TRISD", "TRISC", "TRISB", "TRISA", "LATE", "LATD", "LATC", "LATB", "LATA",
+"PORTE", "PORTD", "PORTC", "PORTB", "PORTA", "TMR0", "TMR1", "OPTION_REG", 0
+};
+const char * const INSTRUCTIONS[] = {
+"addlw", "addwf", "addwfc", "andlw",  "andwf", "bcf", "bc", "bn", "bnc", "bnn", "bnov",
+"bnz", "bz", "bov", "bra", "bsf", "btfsc", "btg", "btfss", "call", "clrf", "clrw",
+"clrwdt", "comf", "cpfseq", "cpfsgt", "cpfslt", "daw", "decf", "decfsz", "dcfsnz",
+"goto", "incf", "incfsz", "infsnz", "iorlw", "iorwf", "lfsr", "movf", "movff",
+"movlb", "movlw", "movwf", "mullw", "mulwf", "negf", "nop", "option", "pop", "push",
+"rcall", "reset", "retfie", "retlw", "rlcf", "rlncf", "rrcf", "rrncf", "return", "rlf",
+"rrf", "setf", "sleep", "sublw", "subfwb", "subwf", "subwfb", "swapf", "tstfsz",
+"tris", "tblrd", "tblwt", "xorlw", "xorwf", 0
+};
+
+QTextStream *initFile(QFile &file)
+{
+  if ( !file.open(IO_WriteOnly) ) qFatal("Cannot create \"%s\".", file.name().latin1());
+  QTextStream *s = new QTextStream(&file);
+  (*s) << "<?xml version=\"1.0\" encoding=\"UTF-8\"?>" << endl;
+  (*s) << "<!DOCTYPE language SYSTEM \"language.dtd\">" << endl;
+  (*s) << "<!--This file is generated. Do not edit.-->" << endl;
+  return s;
+}
+
+void addList(QTextStream &s, const QString &name, const char * const *items, bool upper)
+{
+  s << "  <list name=\"" << name << "\">" << endl;
+  for (uint i=0; items[i]; i++) {
+    s << "    <item>" << items[i] << "</item>";
+    if (upper) s << "<item>" << QString(items[i]).upper() << "</item>";
+    s << endl;
+  };
+  s <<"  </list>" << endl;
+}
+
+void addCommon(QTextStream &s)
+{
+  addList(s, "instructions", INSTRUCTIONS, true);
+  s << endl;
+  s << "  <itemDatas>" << endl;
+  s << "    <itemData name=\"Normal Text\"       defStyleNum=\"dsNormal\"/>" << endl;
+  s << "    <itemData name=\"Directives\"        defStyleNum=\"dsOthers\"/>" << endl;
+  s << "    <itemData name=\"Preprocessor\"      defStyleNum=\"dsNormal\" color=\"#D819D8\" selColor=\"#D819D8\" bold=\"0\" italic=\"0\"/>" << endl;
+  s << "    <itemData name=\"Instructions\"      defStyleNum=\"dsNormal\"  color=\"#0060FF\" selColor=\"#8293CE\" bold=\"1\" italic=\"0\"/>" << endl;
+  s << "    <itemData name=\"CPIK-macros\"       defStyleNum=\"dsNormal\" color=\"#0045B3\" selcolor=\"#8293CE\" bold=\"1\" italic=\"0\"/>" << endl;
+  s << "    <itemData name=\"SFRS\"              defStyleNum=\"dsNormal\" color=\"#2A8A19\" selcolor=\"#000000\" bold=\"1\" italic=\"0\"/>" << endl;
+  s << "    <itemData name=\"ModuleMarks\"       defStyleNum=\"dsNormal\"   color=\"#FF20FF\" selColor=\"#8293CE\" bold=\"1\" italic=\"0\"/>" << endl;
+  s << "    <itemData name=\"Non Based Numbers\" defStyleNum=\"dsBaseN\"/>" << endl;
+  s << "    <itemData name=\"Char\"              defStyleNum=\"dsChar\"/>" << endl;
+  s << "    <itemData name=\"String\"            defStyleNum=\"dsString\"/>" << endl;
+  s << "    <itemData name=\"Comment\"           defStyleNum=\"dsNormal\" color=\"#FF3118\" selColor=\"#FF3118\" bold=\"0\" italic=\"1\" />" << endl;
+  s << "    <itemData name=\"Symbol\"            defStyleNum=\"dsNormal\" color=\"#FF0000\" selColor=\"#083194\" bold=\"0\" italic=\"0\" />" << endl;
+  s << "    <itemData name=\"Prep. Lib\"         defStyleNum=\"dsOthers\"/>" << endl;
+  s << "    <itemData name=\"Based Numbers\"     defStyleNum=\"dsBaseN\" />" << endl;
+  s << "    <itemData name=\"GPASM-macros\"      defStyleNum=\"dsNormal\" color=\"#000000\" selcolor=\"#000000\" bold=\"1\" italic=\"0\"/>" << endl;
+  s << "    <itemData name=\"Destination\"       defStyleNum=\"dsNormal\" color=\"#000000\" selcolor=\"#000000\" bold=\"1\" italic=\"0\"/>" << endl;
+  s << "  </itemDatas>" << endl;
+  s << endl;
+  s << "  <contexts>" << endl;
+  s << "    <context name=\"normal\" attribute=\"Normal Text\" lineEndContext=\"#stay\">" << endl;
+}
+
+void addAsmContexts(QTextStream &s)
+{
+  s << "      <keyword attribute=\"Directives\"    context=\"#stay\" String=\"directives\"/>" << endl;
+  s << "      <keyword attribute=\"Instructions\"  context=\"#stay\" String=\"instructions\"/>" << endl;
+  s << "      <keyword attribute=\"CPIK-macros\"   context=\"#stay\" String=\"cpik_macro\"/>" << endl;
+  s << "      <keyword attribute=\"SFRS\"          context=\"#stay\" String=\"sfrs\"/>" << endl;
+  s << "      <keyword attribute=\"Preprocessor\"  context=\"#stay\" String=\"conditionnal\"/>" << endl;
+  s << "      <keyword attribute=\"GPASM-macros\"  context=\"#stay\" String=\"gpasm_macro\"/>" << endl;
+  s << endl;
+  s << "      <HlCHex  attribute=\"Based Numbers\" context=\"#stay\"/>" << endl;
+  s << "      <RegExpr attribute=\"Based Numbers\" context=\"#stay\" String=\"[0-9A-F]+H($|\\s)\" insensitive=\"TRUE\" />" << endl;
+  s << "      <RegExpr attribute=\"Based Numbers\" context=\"#stay\" String=\"[0-9]+D($|\\s)\" insensitive=\"TRUE\" />" << endl;
+  s << "      <RegExpr attribute=\"Based Numbers\" context=\"#stay\" String=\"[0-7]+O($|\\s)\" insensitive=\"TRUE\" />" << endl;
+  s << "      <RegExpr attribute=\"Based Numbers\" context=\"#stay\" String=\"[0-1]+B($|\\s)\" insensitive=\"TRUE\" />" << endl;
+  s << "      <RegExpr attribute=\"Non Based Numbers\" context=\"#stay\" String=\"\\.[0-9]+($|\\s)\" />" << endl;
+  s << "      <RegExpr attribute=\"Non Based Numbers\" context=\"#stay\" String=\"[0-9]+($|\\s)\" />" << endl;
+  s << endl;
+  s << "      <RegExpr attribute=\"Char\"              context=\"#stay\" String=\"A'[^']+'\" insensitive=\"TRUE\" />" << endl;
+  s << "      <RegExpr attribute=\"Based Numbers\"     context=\"#stay\" String=\"B'[01]+'\" insensitive=\"TRUE\" />" << endl;
+  s << "      <RegExpr attribute=\"Based Numbers\"     context=\"#stay\" String=\"H'[0-9A-F]+'\" insensitive=\"TRUE\" />" << endl;
+  s << "      <RegExpr attribute=\"Based Numbers\"     context=\"#stay\" String=\"O'[0-7]+'\" insensitive=\"TRUE\" />" << endl;
+  s << "      <RegExpr attribute=\"Non Based Numbers\" context=\"#stay\" String=\"D'[0-9]+'\" insensitive=\"TRUE\" />" << endl;
+  s << endl;
+  s << "      <DetectChar attribute=\"Destination\"  context=\"#stay\"   char=\"$\" />" << endl;
+  s << "      <RegExpr    attribute=\"Normal Text\"  context=\"#stay\"   String=\"[A-Za-z_.$][A-Za-z0-9_.$]*\" />" << endl;
+  s << "      <HlCChar    attribute=\"Char\"         context=\"#stay\" />" << endl;
+  s << "      <DetectChar attribute=\"String\"       context=\"string\"  char=\"&quot;\" />" << endl;
+  s << "      <DetectChar attribute=\"Comment\"      context=\"comment\" char=\";\" />" << endl;
+  s << "      <AnyChar    attribute=\"Symbol\"       context=\"#stay\"   String=\"[-/*%+=&gt;&lt;&amp;|^!~]\" />" << endl;
+  s << "      <RegExpr    attribute=\"Symbol\"       context=\"#stay\"   String=\"(HIGH|LOW)\" />" << endl;
+  s << "      <RegExpr    attribute=\"Destination\"  context=\"#stay\"   String=\",\\s*[fw]\" insensitive=\"TRUE\" />" << endl;
+  s << "      <RegExpr    attribute=\"Preprocessor\" context=\"preprocessor\" String=\"(#include|#define|#undefine|#v)\" />" << endl;
+  s << "    </context>" << endl;
+  s << "    <context name=\"preprocessor\" attribute=\"Preprocessor\" lineEndContext=\"#pop\">" << endl;
+  s << "      <DetectChar attribute=\"Comment\" context=\"comment\" char=\";\"/>" << endl;
+  s << "    </context>" << endl;
+  s << "    <context name=\"string\" attribute=\"String\" lineEndContext=\"#pop\">" << endl;
+  s << "      <LineContinue attribute=\"String\" context=\"#stay\"/>" << endl;
+  s << "      <HlCStringChar attribute=\"Char\" context=\"#stay\"/>" << endl;
+  s << "      <DetectChar attribute=\"String\" context=\"#pop\" char=\"&quot;\"/>" << endl;
+  s << "    </context>" << endl;
+  s << "    <context name=\"comment\" attribute=\"Comment\" lineEndContext=\"#pop\">" << endl;
+  s << "      <RegExpr attribute=\"Instructions\" context=\"#stay\"" << endl;
+  s << "        String=\"(FIXME|TODO|fixme|todo|INPUT|OUTPUT|PARAMETERS|AUTHOR|EMAIL)\" />" << endl;
+  s << "      <RegExpr attribute=\"ModuleMarks\" context=\"#stay\" beginRegion=\"moduleASM\"" << endl;
+  s << "        String=\"(&lt;[+]+[A-Za-z_#]+[A-Za-z0-9_#.]*&gt;)\"  />" << endl;
+  s << "      <RegExpr attribute=\"ModuleMarks\" context=\"#stay\"  endRegion=\"moduleASM\"" << endl;
+  s << "        String=\"(&lt;[-]+&gt;)\"  />" << endl;
+  s << "      <RegExpr attribute=\"ModuleMarks\" context=\"#stay\"" << endl;
+  s << "        String=\"(&lt;[=]+[- 0-9]+&gt;)\"  />" << endl;
+  s << "      <RegExpr attribute=\"ModuleMarks\" context=\"#stay\"" << endl;
+  s << "        String=\"(&lt;[?]+[A-Za-z_#]+[A-Za-z0-9_#]*&gt;)\"  />" << endl;
+  s << "    </context>" << endl;
+}
+
+void endFile(QTextStream &s)
+{
+  s << "  </contexts>" << endl;
+  s << "</highlighting>" << endl;
+  s << endl;
+  s << "<general>" << endl;
+  s << "  <comments>" << endl;
+  s << "    <comment name=\"singleLine\" start=\";\" />" << endl;
+  s << "  </comments>" << endl;
+  s << "  <keywords casesensitive=\"1\" />" << endl;
+  s << "</general>" << endl;
+  s << endl;
+  s << "</language>" << endl;
+}
+
+int main(int, char **)
+{
+  QFile afile("asm-pic.xml");
+  QTextStream *s = initFile(afile);
+  (*s) << "<language name=\"XPicAsm\" version=\"1.5\" kateversion=\"2.0\" section=\"Sources\"" << endl;
+  (*s) << "  extensions=\"*.src;*.SRC;*.asm;*.ASM;*.slb;*.SLB;*.pic;*.PIC;*.inc;*.INC;*.pic12;*.pic14;*.PIC12;*.PIC14;*.pic16;*.PIC16\"" << endl;
+  (*s) << "  mimetype=\"text/x-PicSrc;text/x-PicHdr\">" << endl;
+  (*s) << endl;
+  (*s) << "<highlighting>" << endl;
+  addList(*s, "directives", DIRECTIVES, true);
+  addList(*s, "conditionnal", CONDITIONNALS, false);
+  addList(*s, "gpasm_macro", GPASM_MACROS, false);
+  addList(*s, "cpik_macro", CPIK_MACROS, false);
+  addList(*s, "sfrs", SFRS, false);
+  addCommon(*s);
+  addAsmContexts(*s);
+  endFile(*s);
+
+  QFile cfile("coff-pic.xml");
+  s = initFile(cfile);
+  (*s) << "<language name=\"XCoffDisasm\" version=\"1.2\" kateversion=\"2.0\" section=\"Sources\">" << endl;
+  (*s) << endl;
+  (*s) << "<highlighting>" << endl;
+  addCommon(*s);
+  (*s) << "      <RegExpr attribute=\"Preprocessor\" context=\"cfile\" String=\"^\\-\\-\\-\\s.+\\.(c|h)\\s\\-+\"/>" << endl;
+  (*s) << "      <RegExpr attribute=\"Preprocessor\" context=\"asmfile\" String=\"^\\-\\-\\-\\s.+\\s\\-+\"/>" << endl;
+  (*s) << "    </context>" << endl;
+  (*s) << "    <context name=\"asmfile\" attribute=\"Normal Text\">" << endl;
+  (*s) << "      <RegExpr attribute=\"Preprocessor\" context=\"asmline\" String=\"\\d+\\s*:\"/>" << endl;
+  (*s) << "      <RegExpr attribute=\"Based Numbers\" context=\"#stay\" String=\"\\s0\\s\" />" << endl;
+  (*s) << "      <RegExpr attribute=\"Normal Text\" context=\"#stay\" String=\"^[0-9A-F]+\" />" << endl;
+  (*s) << "      <keyword attribute=\"Instructions\" context=\"#stay\" String=\"instructions\"/>" << endl;
+  (*s) << "      <HlCHex  attribute=\"Based Numbers\" context=\"#stay\"/>" << endl;
+  (*s) << "      <RegExpr attribute=\"Destination\"  context=\"#stay\"   String=\",\\s*[fw]\" insensitive=\"TRUE\" />" << endl;
+  (*s) << "      <RegExpr attribute=\"Preprocessor\" context=\"#pop\" String=\"^\\-\\-\\-\\s.+\\-\" lookAhead=\"true\"/>" << endl;
+  (*s) << "    </context>" << endl;
+  (*s) << "    <context name=\"asmline\" attribute=\"Normal Text\" lineEndContext=\"#pop\">" << endl;
+  (*s) << "      <IncludeRules context=\"##XPicAsm\" includeAttrib=\"true\" />" << endl;
+  (*s) << "    </context>" << endl;
+  (*s) << "    <context name=\"cfile\" attribute=\"Normal Text\">" << endl;
+  (*s) << "      <RegExpr attribute=\"Preprocessor\" context=\"cline\" String=\"\\d+\\s*:\"/>" << endl;
+  (*s) << "      <RegExpr attribute=\"Based Numbers\" context=\"#stay\" String=\"\\s0\\s\" />" << endl;
+  (*s) << "      <RegExpr attribute=\"Normal Text\" context=\"#stay\" String=\"^[0-9A-F]+\" />" << endl;
+  (*s) << "      <keyword attribute=\"Instructions\" context=\"#stay\" String=\"instructions\"/>" << endl;
+  (*s) << "      <HlCHex  attribute=\"Based Numbers\" context=\"#stay\"/>" << endl;
+  (*s) << "      <RegExpr attribute=\"Destination\"  context=\"#stay\"   String=\",\\s*[fw]\" insensitive=\"TRUE\" />" << endl;
+  (*s) << "      <RegExpr attribute=\"Preprocessor\" context=\"#pop\" String=\"^\\-\\-\\-\\s.+\\-\" lookAhead=\"true\"/>" << endl;
+  (*s) << "    </context>" << endl;
+  (*s) << "    <context name=\"cline\" attribute=\"Normal Text\" lineEndContext=\"#pop\">" << endl;
+  (*s) << "      <IncludeRules context=\"##XCoffDissC\" includeAttrib=\"true\" />" << endl;
+  (*s) << "    </context>" << endl;
+  endFile(*s);
+}
diff --git a/src/data/xpms/csourcefile.xpm b/src/data/xpms/csourcefile.xpm
new file mode 100644
index 0000000..93fdf98
--- /dev/null
+++ b/src/data/xpms/csourcefile.xpm
@@ -0,0 +1,24 @@
+/* XPM */
+static const char * csourcefile_xpm[] = {
+"16 16 5 1",
+" 	c None",
+".	c #000000",
+"+	c #2CF416",
+"@	c #498942",
+"#	c #56CC49",
+"                ",
+"          ..    ",
+"         .++..  ",
+"        .+++++. ",
+"       .+++++@. ",
+"    .. .##++@@. ",
+"   .++..###@@@. ",
+"  .+++++.##@@.  ",
+" .+++++@..#@.   ",
+" .##++@@. ..    ",
+" .###@@@.       ",
+" .###@@.        ",
+"  ..#@.         ",
+"    ..          ",
+"                ",
+"                "};
diff --git a/src/data/xpms/includefile.xpm b/src/data/xpms/includefile.xpm
new file mode 100644
index 0000000..9ac9cbc
--- /dev/null
+++ b/src/data/xpms/includefile.xpm
@@ -0,0 +1,25 @@
+/* XPM */
+static const char *includefile_xpm[]={
+"16 16 6 1",
+". c None",
+"# c #000000",
+"b c #e0bc38",
+"c c #f0dc5c",
+"a c #fcfc80",
+"d c #ff0000",
+"................",
+"..........##....",
+".........#aa##..",
+"........#aaaaa#.",
+".......#aaaaab#.",
+"....##.#ccaabb#.",
+"...#aa##cccbbb#.",
+"..#aaaaa#ccbb#..",
+".#aaaaab##cb#...",
+".#ccaabb#.##....",
+".#cccbbb#.......",
+".#cccbb#...ddd..",
+"..##cb#...ddddd.",
+"....##....ddddd.",
+"..........ddddd.",
+"...........ddd.."};
diff --git a/src/data/xpms/objectfile.xpm b/src/data/xpms/objectfile.xpm
new file mode 100644
index 0000000..5bef5d2
--- /dev/null
+++ b/src/data/xpms/objectfile.xpm
@@ -0,0 +1,24 @@
+/* XPM */
+static const char * objectfile_xpm[] = {
+"16 16 5 1",
+" 	c None",
+".	c #000000",
+"+	c #ECDEEF",
+"@	c #985EA5",
+"#	c #DCBEE2",
+"                ",
+"          ..    ",
+"         .++..  ",
+"        .+++++. ",
+"       .+++++@. ",
+"    .. .##++@@. ",
+"   .++..###@@@. ",
+"  .+++++.##@@.  ",
+" .+++++@..#@.   ",
+" .##++@@. ..    ",
+" .###@@@.       ",
+" .###@@.        ",
+"  ..#@.         ",
+"    ..          ",
+"                ",
+"                "};
diff --git a/src/data/xpms/project.xpm b/src/data/xpms/project.xpm
new file mode 100644
index 0000000..28a6397
--- /dev/null
+++ b/src/data/xpms/project.xpm
@@ -0,0 +1,29 @@
+/* XPM */
+static const char * project_xpm[] = {
+"16 16 10 1",
+" 	c None",
+".	c #000000",
+"+	c #A4E8FC",
+"@	c #24D0FC",
+"#	c #001CD0",
+"$	c #0080E8",
+"%	c #C0FFFF",
+"&	c #00FFFF",
+"*	c #008080",
+"=	c #00C0C0",
+"     ..         ",
+"    .++..       ",
+"   .+++@@.      ",
+"  .@@@@@#...    ",
+"  .$$@@##.%%..  ",
+"  .$$$##.%%%&&. ",
+"  .$$$#.&&&&&*. ",
+"   ...#.==&&**. ",
+"   .++..===***. ",
+"  .+++@@.==**.  ",
+" .@@@@@#..=*.   ",
+" .$$@@##. ..    ",
+" .$$$###.       ",
+" .$$$##.        ",
+"  ..$#.         ",
+"    ..          "};
diff --git a/src/data/xpms/sourcefile.xpm b/src/data/xpms/sourcefile.xpm
new file mode 100644
index 0000000..3cb6c6a
--- /dev/null
+++ b/src/data/xpms/sourcefile.xpm
@@ -0,0 +1,24 @@
+/* XPM */
+static const char * sourcefile_xpm[] = {
+"16 16 5 1",
+" 	c None",
+".	c #000000",
+"+	c #FCFC80",
+"@	c #E0BC38",
+"#	c #F0DC5C",
+"                ",
+"          ..    ",
+"         .++..  ",
+"        .+++++. ",
+"       .+++++@. ",
+"    .. .##++@@. ",
+"   .++..###@@@. ",
+"  .+++++.##@@.  ",
+" .+++++@..#@.   ",
+" .##++@@. ..    ",
+" .###@@@.       ",
+" .###@@.        ",
+"  ..#@.         ",
+"    ..          ",
+"                ",
+"                "};
diff --git a/src/devices/Makefile.am b/src/devices/Makefile.am
new file mode 100644
index 0000000..00ec7c1
--- /dev/null
+++ b/src/devices/Makefile.am
@@ -0,0 +1 @@
+SUBDIRS = base gui pic mem24 list
diff --git a/src/devices/base/Makefile.am b/src/devices/base/Makefile.am
new file mode 100644
index 0000000..836da68
--- /dev/null
+++ b/src/devices/base/Makefile.am
@@ -0,0 +1,9 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libdevicebase.la
+libdevicebase_la_LDFLAGS = $(all_libraries)
+libdevicebase_la_SOURCES = generic_device.cpp hex_buffer.cpp generic_memory.cpp \
+		register.cpp device_group.cpp
+
+
diff --git a/src/devices/base/base.pro b/src/devices/base/base.pro
new file mode 100644
index 0000000..f74efc6
--- /dev/null
+++ b/src/devices/base/base.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = devicebase
+HEADERS += generic_device.h hex_buffer.h generic_memory.h device_group.h register.h
+SOURCES += generic_device.cpp hex_buffer.cpp generic_memory.cpp register.cpp
diff --git a/src/devices/base/device_group.cpp b/src/devices/base/device_group.cpp
new file mode 100644
index 0000000..df230d1
--- /dev/null
+++ b/src/devices/base/device_group.cpp
@@ -0,0 +1,362 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "device_group.h"
+
+#if !defined(NO_KDE)
+#  include <qpainter.h>
+#  include <kglobal.h>
+
+QColor Device::statusColor(Status status)
+{
+  switch (status.type()) {
+    case Status::Future:         return Qt::blue;
+    case Status::InProduction:   return Qt::green;
+    case Status::Mature:
+    case Status::NotRecommended: return QColor("orange");
+    case Status::EOL:            return Qt::red;
+    case Status::Unknown:
+    case Status::Nb_Types: break;
+  }
+  return Qt::black;
+}
+
+QString coloredString(const QString &text, QColor color)
+{
+  return QString("<font color=\"") + color.name() + "\">" + text + "</font>";
+}
+
+QString supportedString(bool supported)
+{
+  return coloredString(supported ? i18n("Supported") : i18n("Unsupported"),
+                       supported ? Qt::green :  Qt::red);
+}
+
+class Tick {
+public:
+  Tick() {}
+  Tick(double value, double oValue) {
+    s = KGlobal::locale()->formatNumber(value, 1);
+    min = oValue;
+  }
+  QString s;
+  double min;
+};
+
+class TickMap : public QMap<double, Tick>
+{
+public:
+  TickMap() {}
+  void add(double value, double oValue) {
+    insert(value, Tick(value, oValue), false);
+    (*this)[value].min = QMIN((*this)[value].min, oValue);
+  }
+};
+
+QPixmap drawGraph(const QValueVector<Device::RangeBox> &boxes)
+{
+  const uint w = 300, h = 200;
+  QPixmap pixmap(w, h);
+  pixmap.fill(Qt::white);
+  QPainter p(&pixmap);
+  QFontMetrics f(p.font());
+  TickMap xTicks, yTicks;
+  xTicks.add(0.0, 0.0);
+  yTicks.add(0.0, 0.0);
+  for (uint i=0; i<boxes.count(); i++) {
+//    qDebug("box #%i: %f=[%f %f] %f=[%f %f]", i, boxes[i].start.x, boxes[i].start.yMin,
+//           boxes[i].start.yMax, boxes[i].end.x, boxes[i].end.yMin, boxes[i].end.yMax);
+    xTicks.add(boxes[i].start.x, boxes[i].start.yMin);
+    xTicks.add(boxes[i].start.x, boxes[i].start.yMax);
+    xTicks.add(boxes[i].end.x, boxes[i].end.yMin);
+    xTicks.add(boxes[i].end.x, boxes[i].end.yMax);
+    yTicks.add(boxes[i].start.yMin, boxes[i].start.x);
+    yTicks.add(boxes[i].start.yMax, boxes[i].start.x);
+    yTicks.add(boxes[i].end.yMin, boxes[i].end.x);
+    yTicks.add(boxes[i].end.yMax, boxes[i].end.x);
+  }
+  double xMax = 0.0, yMax = 0.0;
+  int xStart = 0;
+  int yStart = h-1 - f.lineSpacing();
+  TickMap::const_iterator it = xTicks.begin();
+  for (; it!=xTicks.end(); ++it) {
+    xStart = QMAX(xStart, f.width(it.data().s));
+    xMax = QMAX(xMax, it.key());
+  }
+  for (it = yTicks.begin(); it!=yTicks.end(); ++it)
+    yMax = QMAX(yMax, it.key());
+  int xEnd = w-1 - f.width(xTicks[xMax].s)/2;
+  QRect rect = f.boundingRect(yTicks[yMax].s);
+  int yEnd = rect.height()/2;
+
+  // draw boxes
+  p.setPen(Qt::lightGray);
+  p.setBrush(Qt::lightGray);
+  for (uint i=0; i<boxes.count(); i++) {
+    double ax = double(xEnd - xStart)/xMax;
+    double ay = double(yEnd - yStart)/yMax;
+    QPointArray pa(4);
+    pa.setPoint(0, qRound(ax*boxes[i].start.x), qRound(ay*boxes[i].start.yMin));
+    pa.setPoint(1, qRound(ax*boxes[i].end.x), qRound(ay*boxes[i].end.yMin));
+    pa.setPoint(2, qRound(ax*boxes[i].end.x), qRound(ay*boxes[i].end.yMax));
+    pa.setPoint(3, qRound(ax*boxes[i].start.x), qRound(ay*boxes[i].start.yMax));
+    pa.translate(xStart, yStart);
+    p.drawPolygon(pa);
+  }
+
+  // draw axis
+  p.setPen(Qt::black);
+  p.drawLine(xStart, yStart, w-1, yStart);
+  p.drawLine(xStart, yStart, xStart, 0);
+
+  // draw ticks and lines
+  p.setPen(Qt::DotLine);
+  for (it = yTicks.begin(); it!=yTicks.end(); ++it) {
+    int y1 = yStart + qRound(it.key()*(yEnd-yStart)/yMax);
+    QRect rect = f.boundingRect(it.data().s);
+    p.drawText(xStart/2-rect.width()/2 , y1+rect.height()/2, it.data().s);
+    int xmin = xStart + qRound(it.data().min*(xEnd-xStart)/xMax);
+    p.drawLine(xStart, y1, xmin, y1);
+  }
+  for (it = xTicks.begin(); it!=xTicks.end(); ++it) {
+    int x1 = xStart + qRound(it.key()*(xEnd-xStart)/xMax);
+    QRect rect = f.boundingRect(it.data().s);
+    p.drawText(x1-rect.width()/2, h-1, it.data().s);
+    int ymin = yStart + qRound(it.data().min*(yEnd-yStart)/yMax);
+    p.drawLine(x1, yStart, x1, ymin);
+  }
+
+  return pixmap;
+}
+
+QPixmap Device::vddGraph(const QString &xLabel, const QString &yLabel,
+                         const QValueVector<Device::RangeBox> &boxes)
+{
+  uint sp = 10;
+  QPixmap graph = drawGraph(boxes);
+  QPainter p;
+  QFontMetrics f(p.font());
+  QPixmap pixmap(graph.width() + sp + f.width(xLabel), graph.height() + sp + f.lineSpacing());
+  pixmap.fill(Qt::white);
+  copyBlt(&pixmap, 0, f.lineSpacing() + sp, &graph, 0, 0, graph.width(), graph.height());
+  p.begin(&pixmap);
+  p.setPen(Qt::black);
+  p.drawText(0, f.lineSpacing(), yLabel);
+  p.drawText(pixmap.width()-1-f.width(xLabel), pixmap.height()-1, xLabel);
+  return pixmap;
+}
+
+const Device::Package *Device::barPackage(const char *name, const Device::Data &data)
+{
+  for (uint i=0; i<data.packages().count(); i++)
+    for (uint k=0; k<data.packages()[i].types.count(); k++)
+      if ( Package::TYPE_DATA[data.packages()[i].types[k]].name==name ) return &data.packages()[i];
+  return 0;
+}
+
+QPixmap Device::pinsGraph(const Device::Package &package)
+{
+  QPixmap pixmap;
+  QPainter p;
+  QFontMetrics fm(p.font());
+  uint nb = package.pins.count();
+  const int hspacing = 3, wspacing = 3, wmark = 10, wpin = 4;
+  int theight = fm.ascent() + (fm.ascent()%2==0 ? 1 : 0);
+  int height = hspacing + (nb/2)*(hspacing + theight);
+  int wnumber = fm.width("1");
+  wnumber = QMAX(wnumber, fm.width(QString::number(nb/2)));
+  wnumber = QMAX(wnumber, fm.width(QString::number(nb/2+1)));
+  wnumber = QMAX(wnumber, fm.width(QString::number(nb)));
+  int bwidth = 4*wspacing + 2*wnumber + wmark;
+  int lwidth = 0, rwidth = 0;
+  for (uint k=0; k<nb/2; k++) {
+    lwidth = QMAX(lwidth, fm.width(package.pins[k]));
+    rwidth = QMAX(rwidth, fm.width(package.pins[nb-k-1]));
+  }
+  int bx = lwidth + wspacing + wpin;
+  int width = bx + bwidth + wpin + wspacing + rwidth;
+  pixmap.resize(width, height);
+  pixmap.fill(Qt::white);
+  p.begin(&pixmap);
+  p.setPen(QPen(Qt::black, 2));
+  p.drawRect(bx, 1, bwidth, height-1);
+  p.drawArc(bx+wspacing+wnumber+wspacing, -wmark/2+2, wmark, wmark, 0, -180*16);
+  for (uint k=0; k<nb/2; k++) {
+    int h = hspacing + theight/2 + k*(hspacing + theight);
+    p.drawLine(bx-wpin-1, h, bx, h);
+    p.drawLine(bx+bwidth, h, bx+bwidth+wpin, h);
+    h += theight/2;
+    QString label = package.pins[k];
+    p.drawText(bx-wpin-wspacing-fm.width(label), h, label);
+    p.drawText(bx+bwidth+wpin+wspacing, h, package.pins[nb-k-1]);
+    uint pin = (k+1);
+    if ( pin==1 || pin==(nb/2) ) {
+      p.drawText(bx+wspacing, h, QString::number(pin));
+      label = QString::number(nb-k);
+      p.drawText(bx+bwidth-wspacing-fm.width(label), h, label);
+    }
+  }
+  p.end();
+  return pixmap;
+}
+
+QString Device::htmlInfo(const Device::Data &data, const QString &deviceHref, const QString &documentHtml)
+{
+  QString doc;
+
+  // title
+  doc += "<h1>";
+  bool first = true;
+  FOR_EACH(Special, special) {
+    for (uint k=0; k<data.frequencyRanges().count(); k++) {
+      if ( data.frequencyRanges()[k].special!=special ) continue;
+      if (first) first = false;
+      else doc += " / ";
+      doc += data.fname(special);
+      break;
+    }
+  }
+  doc += "</h1>";
+
+  doc += "<table>";
+  QString status = coloredString(data.status().label(), statusColor(data.status()));
+  doc += htmlTableRow(i18n("Status"), status);
+  if ( data.alternatives().count() ) {
+    QString s;
+    for (uint i=0; i<data.alternatives().count(); i++) {
+      if ( i!=0 ) s += ", ";
+      if ( deviceHref.isEmpty() ) s += data.alternatives()[i].upper();
+      else {
+        QString href = deviceHref.arg(data.alternatives()[i].upper());
+        s += QString("<a href=\"%1\">%2</a>").arg(href).arg(data.alternatives()[i].upper());
+      }
+    }
+    doc += htmlTableRow(i18n("Alternatives"), s);
+  }
+  doc += documentHtml;
+  doc += "</table>";
+
+  doc += "<hr />";
+  doc += "<table>";
+  doc += data.group().informationHtml(data);
+  QString s;
+  for (uint i=0; i<data.packages().count(); i++)
+    for (uint k=0; k<data.packages()[i].types.count(); k++)
+      s += i18n(Package::TYPE_DATA[data.packages()[i].types[k]].label) + QString("[%1] ").arg(data.packages()[i].pins.count());
+  doc += htmlTableRow(i18n("Packaging"), s);
+  doc += "</table>";
+
+  return doc;
+}
+
+QString Device::htmlPinDiagrams(const Device::Data &data, const QString &imagePrefix, QMimeSourceFactory *msf)
+{
+  QString doc;
+  // pins
+  const Package *package = 0;
+  for (uint i=0; Package::TYPE_DATA[i].name; i++) {
+    if ( Package::TYPE_DATA[i].shape!=Package::Bar ) continue;
+    package = barPackage(Package::TYPE_DATA[i].name, data);
+    if (package) break;
+  }
+  if (package) {
+    QPixmap pix = pinsGraph(*package);
+    doc += "<table cellpadding=\"3\"><tr bgcolor=\"gray\"><th align=\"center\">";
+    for (uint k=0; k<package->types.count(); k++) {
+      if ( k!=0 ) doc += " ";
+      doc += i18n(Package::TYPE_DATA[package->types[k]].label);
+      doc += "(" + QString::number(package->pins.count()) + ")";
+    }
+    doc += "</th></tr><tr><td align=\"center\">";
+    QString label = data.name() + "_pins_graph.png";
+    doc += "<img src=\"" + imagePrefix + label + "\" />";
+    if (msf) msf->setPixmap(label, pix);
+    doc += "</td></tr></table>";
+  }
+  return doc;
+}
+
+QString Device::htmlVoltageFrequencyGraphs(const Device::Data &data, const QString &imagePrefix, QMimeSourceFactory *msf)
+{
+  QString doc;
+  FOR_EACH(Special, special) {
+    for (uint k=0; k<data.frequencyRanges().count(); k++) {
+      const Device::FrequencyRange &fr = data.frequencyRanges()[k];
+      if ( fr.special!=special ) continue;
+      doc += "<h3>" + data.fname(special) + " - " + i18n("Temperature range: ") + fr.operatingCondition.label() + "</h3>";
+      QString label = data.name() + "_" + data.fname(special) + "_"
+        + fr.operatingCondition.key() + ".png";
+      doc += "<img src=\"" + imagePrefix + label + "\" />";
+      if (msf) msf->setPixmap(label, Device::vddGraph(i18n("F (MHz)"), i18n("Vdd (V)"), fr.vdds));
+    }
+  }
+  return doc;
+}
+
+QPixmap Device::memoryGraph(const QValueList<MemoryGraphData> &r)
+{
+  QValueList<MemoryGraphData> ranges = r;
+  QPixmap pixmap;
+  QPainter p;
+  QFontMetrics fm(p.font());
+  // order
+  qHeapSort(ranges);
+  // add empty ranges
+  QValueList<MemoryGraphData>::iterator it;
+  for (it=ranges.begin(); it!=ranges.end(); ) {
+    QValueList<MemoryGraphData>::iterator prev = it;
+    ++it;
+    if ( it==ranges.end() ) break;
+    if ( (*prev).endAddress+1==(*it).startAddress ) continue;
+    MemoryGraphData data;
+    data.startAddress = (*prev).endAddress + 1;
+    data.endAddress = (*it).startAddress-1;
+    ranges.insert(it, data);
+  }
+  // compute widths and total height
+  int theight = fm.ascent() + (fm.ascent()%2==0 ? 1 : 0);
+  int hspacing = 5;
+  int height = 1;
+  int w1 = 0, w2 = 0;
+  for (it=ranges.begin(); it!=ranges.end(); ++it) {
+    w1 = QMAX(w1, fm.width((*it).start));
+    w1 = QMAX(w1, fm.width((*it).end));
+    w2 = QMAX(w2, fm.width((*it).label));
+    (*it).height = 2*hspacing + theight;
+    if ( (*it).startAddress!=(*it).endAddress ) (*it).height += 2*theight;
+    height += (*it).height;
+  }
+  int wspacing = 4;
+  int width = wspacing + w1 + wspacing + wspacing + w2;
+  pixmap.resize(width, height);
+  pixmap.fill(Qt::white);
+  p.begin(&pixmap);
+  int h = 0;
+  // draw ranges
+  for (it=ranges.begin(); it!=ranges.end(); ++it) {
+    p.setPen(QPen(Qt::black, 1, Qt::DotLine));
+    p.drawLine(0,h, width-1,h);
+    p.setPen(QPen(Qt::black, 1));
+    p.setBrush((*it).label.isEmpty() ? Qt::gray : Qt::white);
+    p.drawRect(0,h, wspacing+w1+wspacing,(*it).height+1);
+    int hmid = h+(*it).height/2+theight/2;
+    p.drawText(wspacing+w1+wspacing+wspacing,hmid, (*it).label);
+    if ( (*it).startAddress==(*it).endAddress ) p.drawText(wspacing,hmid, (*it).start);
+    else {
+      p.drawText(wspacing,h+theight, (*it).start);
+      p.drawText(wspacing,h+(*it).height-3, (*it).end);
+    }
+    h += (*it).height;
+    p.setPen(QPen(Qt::black, 1, Qt::DotLine));
+    p.drawLine(0,h, width-1,h);
+  }
+  p.end();
+  return pixmap;
+}
+
+#endif
diff --git a/src/devices/base/device_group.h b/src/devices/base/device_group.h
new file mode 100644
index 0000000..087ca99
--- /dev/null
+++ b/src/devices/base/device_group.h
@@ -0,0 +1,87 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DEVICE_GROUP_H
+#define DEVICE_GROUP_H
+
+#if !defined(NO_KDE)
+#  include <qcolor.h>
+#endif
+
+#include "generic_device.h"
+#include "common/common/group.h"
+#include "common/common/streamer.h"
+namespace Debugger { class DeviceSpecific; class Base; }
+
+namespace Device
+{
+class Memory;
+
+//----------------------------------------------------------------------------
+class MemoryRange {
+public:
+  MemoryRange() {}
+  virtual ~MemoryRange() {}
+  virtual bool all() const { return true; }
+};
+
+//----------------------------------------------------------------------------
+class GroupBase : public ::Group::Base
+{
+public:
+  virtual Memory *createMemory(const Device::Data &data) const = 0;
+  virtual QString informationHtml(const Device::Data &data) const = 0;
+#if !defined(NO_KDE)
+  virtual QPixmap memoryGraph(const Device::Data &data) const = 0;
+#endif
+
+protected:
+  virtual void addDevice(const QString &name, const Device::Data *data, ::Group::Support support) {
+    const_cast<Device::Data *>(data)->_group = this;
+    ::Group::Base::addDevice(name, data, support);
+  }
+};
+
+template <class DataType>
+class Group : public GroupBase, public DataStreamer<DataType>
+{
+protected:
+  virtual void initSupported() {
+    QValueList<DataType *> list = fromCppString(dataStream(), dataSize());
+    for (uint i=0; i<uint(list.count()); i++) addDevice(list[i]->name(), list[i], ::Group::Support::Tested);
+  }
+  virtual uint dataSize() const = 0;
+  virtual const char *dataStream() const = 0;
+};
+
+//----------------------------------------------------------------------------
+#if !defined(NO_KDE)
+extern QColor statusColor(Status status);
+extern QPixmap vddGraph(const QString &xLabel, const QString &yLabel, const QValueVector<RangeBox> &boxes);
+extern const Package *barPackage(const char *name, const Data &data);
+extern QPixmap pinsGraph(const Package &package);
+
+extern QString htmlInfo(const Data &data, const QString &deviceHref, const QString &documentHtml);
+extern QString htmlPinDiagrams(const Device::Data &data, const QString &imagePrefix, QMimeSourceFactory *msf);
+extern QString htmlVoltageFrequencyGraphs(const Device::Data &data, const QString &imagePrefix, QMimeSourceFactory *msf);
+
+class MemoryGraphData
+{
+public:
+  Address startAddress, endAddress;
+  QString start, end, label;
+  int height;
+  bool operator <(const MemoryGraphData &data) const { return ( startAddress < data.startAddress ); }
+};
+extern QPixmap memoryGraph(const QValueList<MemoryGraphData> &ranges);
+
+#endif
+
+} // namespace
+
+#endif
diff --git a/src/devices/base/generic_device.cpp b/src/devices/base/generic_device.cpp
new file mode 100644
index 0000000..bf69dce
--- /dev/null
+++ b/src/devices/base/generic_device.cpp
@@ -0,0 +1,216 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "generic_device.h"
+
+#include "common/global/global.h"
+#include "device_group.h"
+#include "register.h"
+
+//-----------------------------------------------------------------------------
+const Device::Status::Data Device::Status::DATA[Nb_Types] = {
+  { "IP",       I18N_NOOP("In Production")                  },
+  { "Future",   I18N_NOOP("Future Product")                 },
+  { "NR",       I18N_NOOP("Not Recommended for New Design") },
+  { "EOL",      I18N_NOOP("End Of Life"  )                  },
+  { "?",        I18N_NOOP("Unknown")                        },
+  { "Mature",   I18N_NOOP("Mature")                         }
+};
+
+const Device::MemoryTechnology::Data Device::MemoryTechnology::DATA[Nb_Types] = {
+  { "FLASH",   I18N_NOOP("Flash")          },
+  { "EPROM",   I18N_NOOP("EPROM (OTP)")    },
+  { "ROM",     I18N_NOOP("ROM")            },
+  { "ROMLESS", I18N_NOOP("ROM-less")       }
+};
+
+const Device::OperatingCondition::Data Device::OperatingCondition::DATA[Nb_Types] = {
+  { "commercial", I18N_NOOP("Commercial") },
+  { "industrial", I18N_NOOP("Industrial") },
+  { "extended",   I18N_NOOP("Extended")   }
+};
+
+const Device::Special::Data Device::Special::DATA[Nb_Types] = {
+  { "",             I18N_NOOP("Normal")       },
+  { "low_power",    I18N_NOOP("Low Power")    },
+  { "low_voltage",  I18N_NOOP("Low Voltage")  },
+  { "high_voltage", I18N_NOOP("High Voltage") }
+};
+
+const Device::Package::TypeData Device::Package::TYPE_DATA[] = {
+  { "pdip",  I18N_NOOP("PDIP"),   Bar,    {  8, 14, 18, 20, 28, 40,  0,  0,   0 } },
+  { "sdip",  I18N_NOOP("SDIP"),   Bar,    {  0,  0,  0,  0, 28,  0,  0,  0,   0 } }, // skinny
+  { "spdip", I18N_NOOP("SPDIP"),  Bar,    {  0,  0,  0,  0, 28,  0, 64,  0,   0 } }, // shrink
+  { "sot23", I18N_NOOP("SOT-23"), Bar,    {  5,  6,  0,  0,  0,  0,  0,  0,   0 } },
+  { "msop",  I18N_NOOP("MSOP"),   Bar,    {  8,  0,  0,  0,  0,  0,  0,  0,   0 } },
+  { "ssop",  I18N_NOOP("SSOP"),   Bar,    {  0,  0,  0, 20, 28,  0,  0,  0,   0 } },
+  { "tssop", I18N_NOOP("TSSOP"),  Bar,    {  8, 14,  0,  0,  0,  0,  0,  0,   0 } },
+  { "soic",  I18N_NOOP("SOIC"),   Bar,    {  8, 14, 18, 20, 28,  0,  0,  0,   0 } },
+  { "tqfp",  I18N_NOOP("TQFP"),   Square, {  0,  0,  0,  0,  0, 44, 64, 80, 100 } },
+  { "mqfp",  I18N_NOOP("MQFP"),   Square, {  0,  0,  0,  0,  0, 44,  0,  0,   0 } },
+  { "dfns",  I18N_NOOP("DFN-S"),  Bar,    {  8,  0,  0,  0,  0,  0,  0,  0,   0 } },
+  { "qfn",   I18N_NOOP("QFN"),    Square, {  0, 16,  0, 20, 28, 44,  0,  0,   0 } },
+  { "qfns",  I18N_NOOP("QFN-S"),  Bar,    {  0,  0,  0,  0, 28,  0,  0,  0,   0 } },
+  { "plcc",  I18N_NOOP("PLCC"),   Square, {  0,  0,  0,  0,  0, 44, 68, 84,   0 } },
+  { "mlf",   I18N_NOOP("MLF"),    Square, {  0,  0,  0,  0, 28,  0,  0,  0,   0 } },
+  { "dfn",   I18N_NOOP("DFN"),    Bar,    {  8,  0,  0,  0,  0,  0,  0,  0,   0 } },
+  {     0,                  0,    Square, {  0,  0,  0,  0,  0,  0,  0,  0,   0 } }
+};
+
+//-----------------------------------------------------------------------------
+double Device::FrequencyRange::vddMin() const
+{
+  double vdd = 0.0;
+  for (uint i=0; i<uint(vdds.count()); i++) {
+    if ( i==0 ) vdd = vdds[i].yMin();
+    vdd = qMin(vdd, vdds[i].yMin());
+  }
+  return vdd;
+}
+
+double Device::FrequencyRange::vddMax() const
+{
+  double vdd = 0.0;
+  for (uint i=0; i<uint(vdds.count()); i++) {
+    if ( i==0 ) vdd = vdds[i].yMax();
+    vdd = qMax(vdd, vdds[i].yMax());
+  }
+  return vdd;
+}
+
+//-----------------------------------------------------------------------------
+Device::Array::Array(const Array &array)
+{
+  _data = array._data.copy();
+}
+
+Device::Array &Device::Array::operator +=(const Array &a)
+{
+  uint s = _data.size();
+  _data.resize(s + a.size());
+  for (uint i=0; i<a.size(); i++) _data[s+i] = a[i];
+  return *this;
+}
+
+void Device::Array::append(uint v)
+{
+  uint s = _data.size();
+  _data.resize(s+1);
+  _data[s] = v;
+}
+
+Device::Array Device::Array::mid(uint index, int s) const
+{
+  CRASH_ASSERT( index<=size() && s<=int(size()-index) && s>=-1 );
+  Array array(s==-1 ? size()-index : s);
+  for (uint i=0; i<array.size(); i++) array[i] = _data[index+i];
+  return array;
+}
+
+Device::Array &Device::Array::operator =(const Array &array)
+{
+  _data = array._data.copy();
+  return *this;
+}
+
+//-----------------------------------------------------------------------------
+Device::Data::~Data()
+{
+  delete _registersData;
+}
+
+double Device::Data::vddMin() const
+{
+  double vdd = 0.0;
+  for (uint i=0; i<uint(_frequencyRanges.count()); i++) {
+    if ( i==0 ) vdd = _frequencyRanges[i].vddMin();
+    vdd = qMin(vdd, _frequencyRanges[i].vddMin());
+  }
+  return vdd;
+}
+
+double Device::Data::vddMax() const
+{
+  double vdd = 0.0;
+  for (uint i=0; i<uint(_frequencyRanges.count()); i++) {
+    if ( i==0 ) vdd = _frequencyRanges[i].vddMax();
+    vdd = qMax(vdd, _frequencyRanges[i].vddMax());
+  }
+  return vdd;
+}
+
+//-----------------------------------------------------------------------------
+QDataStream &Device::operator <<(QDataStream &s, const RangeBox::Value &rbv)
+{
+  s << rbv.x << rbv.yMin << rbv.yMax;
+  return s;
+}
+QDataStream &Device::operator >>(QDataStream &s, RangeBox::Value &rbv)
+{
+  s >> rbv.x >> rbv.yMin >> rbv.yMax;
+  return s;
+}
+
+QDataStream &Device::operator <<(QDataStream &s, const RangeBox &rb)
+{
+  s << rb.start << rb.end << rb.osc << rb.mode << rb.special;
+  return s;
+}
+QDataStream &Device::operator >>(QDataStream &s, RangeBox &rb)
+{
+  s >> rb.start >> rb.end >> rb.osc >> rb.mode >> rb.special;
+  return s;
+}
+
+QDataStream &Device::operator <<(QDataStream &s, const FrequencyRange &frange)
+{
+  s << frange.operatingCondition << frange.special << frange.vdds;
+  return s;
+}
+QDataStream &Device::operator >>(QDataStream &s, FrequencyRange &frange)
+{
+  s >> frange.operatingCondition >> frange.special >> frange.vdds;
+  return s;
+}
+
+QDataStream &Device::operator <<(QDataStream &s, const Package &package)
+{
+  s << package.types << package.pins;
+  return s;
+}
+QDataStream &Device::operator >>(QDataStream &s, Package &package)
+{
+  s >> package.types >> package.pins;
+  return s;
+}
+
+QDataStream &Device::operator <<(QDataStream &s, const Documents &documents)
+{
+  s << documents.webpage << documents.datasheet << documents.progsheet << documents.erratas;
+  return s;
+}
+QDataStream &Device::operator >>(QDataStream &s, Documents &documents)
+{
+  s >> documents.webpage >> documents.datasheet >> documents.progsheet >> documents.erratas;
+  return s;
+}
+
+QDataStream &Device::operator <<(QDataStream &s, const Data &data)
+{
+  s << data._name << data._documents << data._alternatives << data._status
+    << data._frequencyRanges << data._memoryTechnology
+    << data._packages;
+  return s;
+}
+QDataStream &Device::operator >>(QDataStream &s, Data &data)
+{
+  s >> data._name >> data._documents >> data._alternatives >> data._status
+    >> data._frequencyRanges >> data._memoryTechnology
+    >> data._packages;
+  return s;
+}
diff --git a/src/devices/base/generic_device.h b/src/devices/base/generic_device.h
new file mode 100644
index 0000000..e3cbec9
--- /dev/null
+++ b/src/devices/base/generic_device.h
@@ -0,0 +1,171 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef GENERIC_DEVICE_H
+#define GENERIC_DEVICE_H
+
+#include <qstringlist.h>
+
+#include "common/common/misc.h"
+#include "common/common/bitvalue.h"
+#include "common/common/key_enum.h"
+#include "common/global/global.h"
+
+namespace Device
+{
+//----------------------------------------------------------------------------
+BEGIN_DECLARE_ENUM(Status)
+  InProduction = 0, Future, NotRecommended, EOL, Unknown, Mature
+END_DECLARE_ENUM_STD(Status)
+
+BEGIN_DECLARE_ENUM(MemoryTechnology)
+  Flash = 0, Eprom, Rom, Romless
+END_DECLARE_ENUM_STD(MemoryTechnology)
+
+class RangeBox {
+public:
+  struct Value { double x, yMin, yMax; };
+  Value start, end;
+  QString osc, mode, special;
+  double yMin() const { return qMin(start.yMin, end.yMin); }
+  double yMax() const { return qMax(start.yMax, end.yMax); }
+};
+
+BEGIN_DECLARE_ENUM(OperatingCondition)
+  Commercial = 0, Industrial, Extended
+END_DECLARE_ENUM_STD(OperatingCondition)
+
+BEGIN_DECLARE_ENUM(Special)
+  Normal = 0, LowPower, LowVoltage, HighVoltage
+END_DECLARE_ENUM_STD(Special)
+
+class FrequencyRange {
+public:
+  OperatingCondition operatingCondition;
+  Special special;
+  QValueVector<RangeBox> vdds;
+  double vddMin() const;
+  double vddMax() const;
+};
+
+class IdData {
+public:
+  BitValue revision, minorRevision, process;
+  Special special;
+};
+
+class Package
+{
+public:
+  QValueVector<uint> types;
+  QValueVector<QString> pins;
+
+public:
+  enum Shape { Bar, Square };
+  enum { MAX_NB = 9 };
+  struct TypeData {
+    const char *name, *label;
+    Shape shape;
+    uint nbPins[MAX_NB];
+  };
+  static const TypeData TYPE_DATA[];
+};
+
+class Documents
+{
+public:
+  QString webpage, datasheet, progsheet;
+  QStringList erratas;
+};
+
+//----------------------------------------------------------------------------
+class XmlToDataBase;
+class GroupBase;
+class RegistersData;
+
+//----------------------------------------------------------------------------
+// we don't want implicit sharing
+class Array
+{
+public:
+  Array(uint size = 0) : _data(size) {}
+  Array(const Array &array);
+  Array &operator =(const Array &);
+  Array &operator +=(const Array &a);
+  void append(uint v);
+  Array mid(uint index, int size = -1) const;
+  void resize(uint s) { _data.resize(s); }
+  uint size() const { return _data.size(); }
+  uint count() const { return _data.size(); }
+  BitValue operator [](uint i) const { return _data[i]; }
+  BitValue &operator [](uint i) { return _data[i]; }
+  bool operator ==(const Array &array) const { return _data==array._data; }
+  bool operator !=(const Array &array) const { return _data!=array._data; }
+
+private:
+  QMemArray<BitValue> _data;
+};
+
+//----------------------------------------------------------------------------
+class Data
+{
+public:
+  Data(RegistersData *rdata) : _group(0), _registersData(rdata) {}
+  virtual ~Data();
+  const GroupBase &group() const { return *_group; }
+  virtual QString name() const { return _name; }
+  virtual QString fname(Special) const { return _name; }
+  virtual QString listViewGroup() const = 0;
+  Status status() const { return _status; }
+  const Documents &documents() const { return _documents; }
+  const QStringList &alternatives() const { return _alternatives; }
+  MemoryTechnology memoryTechnology() const { return _memoryTechnology; }
+  virtual bool matchId(BitValue rawId, IdData &idata) const = 0;
+  const QValueVector<FrequencyRange> &frequencyRanges() const { return _frequencyRanges; }
+  double vddMin() const;
+  double vddMax() const;
+  virtual uint nbBitsAddress() const = 0;
+  uint nbBytesAddress() const { return nbBitsAddress()/8 + (nbBitsAddress()%8 ? 1 : 0); }
+  uint nbCharsAddress() const { return nbBitsAddress()/4 + (nbBitsAddress()%4 ? 1 : 0); }
+  virtual bool canWriteCalibration() const = 0; // #### REMOVE ME
+  const RegistersData *registersData() const { return _registersData; }
+  const QValueVector<Package> &packages() const { return _packages; }
+
+protected:
+  const GroupBase *_group;
+  QString _name;
+  Documents _documents;
+  QStringList _alternatives;
+  Status _status;
+  QValueVector<FrequencyRange> _frequencyRanges;
+  MemoryTechnology _memoryTechnology;
+  RegistersData *_registersData;
+  QValueVector<Package> _packages;
+
+  friend class XmlToDataBase;
+  friend class GroupBase;
+  friend QDataStream &operator <<(QDataStream &s, const Data &data);
+  friend QDataStream &operator >>(QDataStream &s, Data &data);
+};
+
+QDataStream &operator <<(QDataStream &s, const RangeBox::Value &rbv);
+QDataStream &operator >>(QDataStream &s, RangeBox::Value &rbv);
+QDataStream &operator <<(QDataStream &s, const RangeBox &rb);
+QDataStream &operator >>(QDataStream &s, RangeBox &rb);
+QDataStream &operator <<(QDataStream &s, const FrequencyRange &frange);
+QDataStream &operator >>(QDataStream &s, FrequencyRange &frange);
+QDataStream &operator <<(QDataStream &s, const Package &package);
+QDataStream &operator >>(QDataStream &s, Package &package);
+QDataStream &operator <<(QDataStream &s, const Documents &documents);
+QDataStream &operator >>(QDataStream &s, Documents &documents);
+QDataStream &operator <<(QDataStream &s, const Data &data);
+QDataStream &operator >>(QDataStream &s, Data &data);
+
+} // namespace
+
+#endif
diff --git a/src/devices/base/generic_memory.cpp b/src/devices/base/generic_memory.cpp
new file mode 100644
index 0000000..78c4dd6
--- /dev/null
+++ b/src/devices/base/generic_memory.cpp
@@ -0,0 +1,48 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "generic_memory.h"
+
+bool Device::Memory::load(QTextStream &stream, QStringList &errors,
+			  WarningTypes &warningTypes, QStringList &warnings)
+{
+  HexBuffer hb;
+  if ( !hb.load(stream, errors) ) return false;
+  warningTypes = fromHexBuffer(hb, warnings);
+  return true;
+}
+
+Device::Memory::WarningTypes Device::Memory::fromHexBuffer(const HexBuffer &hb, QStringList &warnings)
+{
+  clear();
+  WarningTypes result = NoWarning;
+  warnings.clear();
+  QMap<uint, bool> inRange;
+  fromHexBuffer(hb, result, warnings, inRange);
+
+   // check that all values in FragBuffer are within memory ranges
+  HexBuffer::const_iterator it = hb.begin();
+  for (; it!=hb.end(); ++it) {
+    if ( !it.data().isInitialized() || inRange[it.key()] ) continue;
+    if ( !(result & ValueOutsideRange) ) {
+      result |= ValueOutsideRange;
+      warnings += i18n("At least one value (at address %1) is defined outside memory ranges.").arg(toHexLabel(it.key(), 8));
+    }
+    break;
+  }
+
+  return result;
+}
+
+bool Device::Memory::save(QTextStream &stream, HexBuffer::Format format) const
+{
+  savePartial(stream, format);
+  HexBuffer hb;
+  hb.saveEnd(stream);
+  return true;
+}
diff --git a/src/devices/base/generic_memory.h b/src/devices/base/generic_memory.h
new file mode 100644
index 0000000..74bd938
--- /dev/null
+++ b/src/devices/base/generic_memory.h
@@ -0,0 +1,47 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef GENERIC_MEMORY_H
+#define GENERIC_MEMORY_H
+
+#include "devices/base/generic_device.h"
+#include "devices/base/hex_buffer.h"
+
+namespace Device
+{
+
+class Memory
+{
+public:
+  const Data &device() const { return _device; }
+  virtual ~Memory() {}
+  virtual void fill(BitValue value) = 0;
+  virtual void clear() { fill(BitValue()); }
+  virtual void copyFrom(const Memory &memory) = 0;
+  virtual BitValue checksum() const = 0;
+
+  virtual HexBuffer toHexBuffer() const = 0;
+  bool save(QTextStream &stream, HexBuffer::Format format) const;
+  enum WarningType { NoWarning = 0, ValueTooLarge = 1, ValueOutsideRange = 2 };
+  Q_DECLARE_FLAGS(WarningTypes, WarningType)
+  WarningTypes fromHexBuffer(const HexBuffer &hb, QStringList &warnings);
+  bool load(QTextStream &stream, QStringList &errors, WarningTypes &warningTypes, QStringList &warnings);
+
+protected:
+  const Data &_device;
+
+  Memory(const Data &device) : _device(device) {}
+  virtual void fromHexBuffer(const HexBuffer &hb, WarningTypes &warningTypes,
+                             QStringList &warnings, QMap<uint, bool> &inRange) = 0;
+  virtual void savePartial(QTextStream &stream, HexBuffer::Format format) const = 0;
+};
+Q_DECLARE_OPERATORS_FOR_FLAGS(Memory::WarningTypes)
+
+} // namespace
+
+#endif
diff --git a/src/devices/base/hex_buffer.cpp b/src/devices/base/hex_buffer.cpp
new file mode 100644
index 0000000..a63554d
--- /dev/null
+++ b/src/devices/base/hex_buffer.cpp
@@ -0,0 +1,290 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *             (C) 2003 by Alain Gibaud                                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "hex_buffer.h"
+
+#include <qtextstream.h>
+
+#include "devices/base/generic_device.h"
+
+//-----------------------------------------------------------------------------
+const char * const HexBuffer::FORMATS[Nb_Formats] = {
+  "inhx8m", /*"inhx8s", */"inhx16", "inhx32"
+};
+
+void HexBuffer::savePartial(QTextStream &stream, Format format) const
+{
+  BitValue oldseg;
+  const_iterator block = begin();
+  int len;
+  while ( fetchNextBlock(block, end(), &len) ) {
+    // block found, write it
+    BitValue seg = block.key() >> 15 ; // 2 * seg address
+    if ( format==IHX32 && seg!=oldseg ) {
+      char buf[50];
+      BitValue check = 0x02 + 0x04 + seg.byte(1) + seg.byte(0);
+      sprintf(buf, ":02000004%04X%02X\n", seg.toUInt(), check.twoComplement().byte(0));
+      stream << buf;
+      oldseg = seg;
+    }
+    writeHexBlock(stream, len, block, format);
+  }
+}
+
+void HexBuffer::saveEnd(QTextStream &stream) const
+{
+  stream << ":00000001FF\n";
+}
+
+/* Write one line of Intel-hex file
+ * Original code source from Timo Rossi,
+ * modified by Alain Gibaud to support large blocks write
+ */
+void HexBuffer::writeHexBlock(QTextStream &stream, int reclen, // length (in words)
+			  const_iterator& data, // pointer to 1st data word (incremented by function)
+                          Format format)
+{
+    while ( reclen>HEXBLKSIZE ) {
+      writeHexBlock(stream, HEXBLKSIZE, data, format);
+      reclen -= HEXBLKSIZE;
+    }
+    if ( reclen<=0 ) return; /* Oops, block has just a HEXBLKSIZE * n size */
+
+    char buf[20];
+    BitValue check = 0x0;
+
+    // line start
+    uint loc =  data.key();
+    switch (format) {
+      case IHX8M:
+      case IHX32:
+        loc *= 2;
+        sprintf(buf,  ":%02X%04X00", 2*reclen, loc & 0xFFFF);
+        check += ((loc) & 0xff) + (((loc) >> 8) & 0xff) + 2*reclen;
+        break;
+      case IHX16:
+        sprintf(buf, ":%02X%04X00", reclen, loc & 0xFFFF);
+        check += (loc & 0xff) + ((loc >> 8) & 0xff) + reclen;
+        break;
+      case Nb_Formats: Q_ASSERT(false); break;
+    }
+    stream << buf;
+
+    // data
+    for (; reclen > 0; ++data, --reclen) {
+      BitValue word =  data.data();
+      switch (format) {
+        case IHX8M:
+        case IHX32:
+          sprintf(buf, "%02X%02X", word.byte(0), word.byte(1));
+          break;
+        case IHX16:
+          sprintf(buf, "%02X%02X", word.byte(1), word.byte(0));
+          break;
+        case Nb_Formats: Q_ASSERT(false); break;
+      }
+      stream << buf;
+      check += word.byte(0) + word.byte(1);
+    }
+
+    // checksum, assumes 2-complement
+    sprintf(buf, "%02X\n", check.twoComplement().byte(0));
+    stream << buf;
+}
+
+/* -------------------------------------------------------------------------
+    This routine detects the next block to output
+    A block is a set of consecutive addresse words not
+    containing 0xFFFFFFFF
+    @return true if a block has been detected
+    'it' is updated to point to the first address of the block
+    '*len' contains the size of the block
+*/
+bool HexBuffer::fetchNextBlock(const_iterator& it, const const_iterator &end, int *len)
+{
+    uint startadr, curadr;
+    // for( i = *start ; (i < MAXPICSIZE) && (Mem[i] == INVALID) ; ++i) ;
+    // skip non-used words
+
+    // Search block start
+    while ( it!=end && !it.data().isInitialized() ) ++it;
+
+    // if(i >= MAXPICSIZE ) return false ;
+    if ( it==end ) return false;
+
+    //for( *start = i ; (i < MAXPICSIZE) && (Mem[i] != INVALID) ; ++i) ;
+    //*len = i - *start ;
+    // search block end - a block may not cross a segment boundary
+    const_iterator itt(it) ;
+    for (curadr = startadr = itt.key(), ++itt; itt!=end; ++itt) {
+      if ( itt.key()!=curadr+1 ) break;    // non contiguous addresses
+      if ( !itt.data().isInitialized() ) break;   // unused word found
+      if ( ((itt.key()) & 0xFFFF0000U)!=(curadr & 0xFFFF0000U) ) break; // cross segment boundary
+      curadr = itt.key();
+    }
+    *len = curadr - startadr + 1 ;
+
+    return *len != 0  ;
+}
+
+QString HexBuffer::ErrorData::message() const
+{
+  switch (type) {
+    case UnrecognizedFormat: return i18n("Unrecognized format (line %1).").arg(line);
+    case UnexpectedEOF: return i18n("Unexpected end-of-file.");
+    case UnexpectedEOL: return i18n("Unexpected end-of-line (line %1).").arg(line);
+    case WrongCRC: return i18n("CRC mismatch (line %1).").arg(line);
+  }
+  Q_ASSERT(false);
+  return QString::null;
+}
+
+bool HexBuffer::load(QTextStream &stream, QStringList &errors)
+{
+  Format format;
+  QValueList<ErrorData> list = load(stream, format);
+  if ( list.isEmpty() ) return true;
+  errors.clear();
+  for (uint i=0; i<uint(list.count()); i++) errors += list[i].message();
+  return false;
+}
+
+QValueList<HexBuffer::ErrorData> HexBuffer::load(QTextStream &stream, Format &format)
+{
+  clear();
+  format = Nb_Formats;
+  QValueList<HexBuffer::ErrorData> errors;
+  load(stream, format, errors);
+  if ( format==Nb_Formats ) format = IHX8M; // default
+  return errors;
+}
+
+/* -------------------------------------------------------------------------
+   Read a Intel HEX file of either INHX16 or INHX8M format type, detecting
+   the format automagicly by the wordcount and length of the line
+   Tested in 8 and 16 bits modes
+   ------------------------------------------------------------------------ */
+void HexBuffer::load(QTextStream &stream, Format &format, QValueList<ErrorData> &errors)
+{
+    uint addrH = 0; // upper 16 bits of 32 bits address (inhx32 format)
+    uint line = 1;
+
+    for (; !stream.atEnd(); line++) { // read each line
+        QString s = stream.readLine();
+        if ( !s.startsWith(":") ) continue; // skip invalid intel hex line
+        s = s.stripWhiteSpace(); // clean-up white spaces at end-of-line
+        if ( s==":" ) continue; // skip empty line
+
+        const char *p = s.latin1();
+        p += 1; // skip ':'
+        uint bytecount = (s.length()-11) / 2; // number of data bytes of this record
+
+        // get the byte count, the address and the type for this line.
+        uint count, addr, type;
+        if ( sscanf(p, "%02X%04X%02X", &count , &addr, &type)!=3 ) {
+          errors += ErrorData(line, UnrecognizedFormat);
+          return;
+        }
+        p += 8;
+        uint cksum = count + (addr >> 8) + (addr & 0xFF) + type;
+
+        if( type==0x01 ) { // EOF field :00 0000 01 FF
+            uint data;
+            if ( sscanf(p, "%02X", &data)!=1 ) errors += ErrorData(line, UnexpectedEOL);
+            else if ( ((cksum+data) & 0xFF)!=0 ) errors += ErrorData(line, WrongCRC);
+            return;
+        }
+
+        if ( type==0x04 ) { // linear extended record (for 0x21xxxx, :02 0000 04 0021 D9)
+            if( sscanf(p, "%04X", &addrH)!=1 ) {
+              errors += ErrorData(line, UnrecognizedFormat); // bad address record
+              return;
+            }
+            p += 4;
+            cksum += (addrH & 0xFF);
+            cksum += (addrH >> 8);
+            if ( format==Nb_Formats || format==IHX8M ) format = IHX32;
+            else if ( format!=IHX32 ) {
+              errors += ErrorData(line, UnrecognizedFormat); // inconsistent format
+              return;
+            }
+            uint data;
+            if ( sscanf(p, "%02X", &data)!=1 ) errors += ErrorData(line, UnexpectedEOL);
+            else if ( ((cksum+data) & 0xFF)!=0 ) errors += ErrorData(line, WrongCRC);
+            //qDebug("new address high: %s", toHex(addrH<<16, 8).data());
+            continue; // goto next record
+        }
+
+        /* Figure out if its INHX16 or INHX8M
+            if count is a 16 bits words count => INHX16
+            if count is a byte count => INHX8M or INHX32 */
+        if ( bytecount==count ) {
+            if ( format==Nb_Formats ) format = IHX8M;
+            else if ( format!=IHX8M && format!=IHX32 ) {
+              errors += ErrorData(line, UnrecognizedFormat); // inconsistent format
+              return;
+            }
+            /* Processing a INHX8M line */
+            /* Modified to be able to read fuses from hexfile created by C18 toolchain */
+            /* changed by Tobias Schoene 9 April 2005, */
+            /* modified by A.G, because low and hi bytes was swapped in Tobias's code , 8 may 2005
+            */
+            uint addrbase = ((addrH << 16) | addr);
+            //qDebug("line %i: address %s", line, toHex(addrbase, 8).data());
+            for (uint x = 0; x<count; x++) {
+              uint data;
+              if ( sscanf(p, "%02X", &data)!=1 ) {
+                errors += ErrorData(line, UnexpectedEOL);
+                break;
+              }
+              p += 2;
+              // A.G: I suspect possible initialization problem
+              // if block begins at odd address
+              // because |= works on an uninitalized word
+              // however, I  don't know if such a situation can occurs
+              uint a = addrbase+x >> 1;
+              BitValue value = (*this)[a];
+              if ( addrbase+x & 1 ) insert(a, value.maskWith(0x00FF) | data << 8); // Odd addr => Hi byte
+              else insert(a, value.maskWith(0xFF00) | data); // Low byte
+              //if ( x==0 ) qDebug("fb@%s: %s", toHex(addrbase+x >> 1, 8).data(), toHex(fb[addrbase+x >> 1], 8).data());
+              cksum += data;
+            }
+        } else if ( bytecount==count*2 ) {
+            if ( format==Nb_Formats ) format = IHX16;
+            else if ( format!=IHX16 ) {
+                errors += ErrorData(line, UnrecognizedFormat); // inconsistent format
+                return;
+            }
+            /* Processing a INHX16 line */
+            for(uint x=0; x<count; x++) {
+                uint datal, datah;
+                if( sscanf(p, "%02X%02X", &datah, &datal)!=2 ) {
+                  errors += ErrorData(line, UnexpectedEOL);
+                  break;
+                }
+                p += 4;
+                //qDebug("%s: %s", toHexLabel(addr+x, 4).latin1(), toHexLabel(datal | (datah << 8), 4).latin1());
+                insert(addr+x, datal | (datah << 8));
+                cksum += datah;
+                cksum += datal;
+            }
+        } else {
+            errors += ErrorData(line, UnrecognizedFormat); // Brrrr !! Strange format.
+            return;
+        }
+
+        /* Process the checksum */
+        uint data;
+        if( sscanf(p, "%02X", &data)!=1 ) errors += ErrorData(line, UnexpectedEOL);
+        else if( ((data + cksum) & 0xFF)!=0 ) errors += ErrorData(line, WrongCRC);
+    }
+
+    errors += ErrorData(line, UnexpectedEOF);
+    return;
+}
diff --git a/src/devices/base/hex_buffer.h b/src/devices/base/hex_buffer.h
new file mode 100644
index 0000000..93b0640
--- /dev/null
+++ b/src/devices/base/hex_buffer.h
@@ -0,0 +1,51 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *             (C) 2003 by Alain Gibaud                                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef HEX_BUFFER_H
+#define HEX_BUFFER_H
+
+#include "common/global/global.h"
+#include "common/common/bitvalue.h"
+class QTextStream;
+
+class HexBuffer : public QMap<uint, BitValue>
+{
+public:
+  enum Format { /// Differents flavors of Intel HEX file formats
+    IHX8M = 0,  ///< 8 bits "swapped" format
+    //    IHX8S,
+    IHX16,      ///< 16 bits format
+    IHX32,      ///< 8 bit format with 32 bits addresses
+    Nb_Formats
+  };
+  static const char * const FORMATS[Nb_Formats];
+
+  void savePartial(QTextStream &s, Format format) const;
+  void saveEnd(QTextStream &s) const;
+  enum ErrorType { UnrecognizedFormat, WrongCRC, UnexpectedEOF, UnexpectedEOL };
+  class ErrorData {
+  public:
+    ErrorData() {}
+    ErrorData(uint _line, ErrorType _type) : line(_line), type(_type) {}
+    QString message() const;
+    uint line;
+    ErrorType type;
+  };
+  QValueList<ErrorData> load(QTextStream &stream, Format &format);
+  bool load(QTextStream &stream, QStringList &errors);
+
+private:
+  enum { HEXBLKSIZE = 8 }; // line size in HEX files
+
+  static bool fetchNextBlock(const_iterator& start, const const_iterator &end, int *len);
+  static void writeHexBlock(QTextStream &stream, int reclen, const_iterator& data, Format format);
+  void load(QTextStream &stream, Format &format, QValueList<ErrorData> &errors);
+};
+
+#endif
diff --git a/src/devices/base/register.cpp b/src/devices/base/register.cpp
new file mode 100644
index 0000000..85fc013
--- /dev/null
+++ b/src/devices/base/register.cpp
@@ -0,0 +1,156 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "register.h"
+
+//----------------------------------------------------------------------------
+namespace Register
+{
+  List *_list = 0;
+}
+Register::List &Register::list()
+{
+  if ( _list==0 ) _list = new List;
+  return *_list;
+}
+
+//----------------------------------------------------------------------------
+Register::TypeData::TypeData(Address address, uint nbChars)
+  : _nbChars(nbChars), _address(address)
+{
+  Q_ASSERT( address.isValid() && nbChars!=0 );
+}
+Register::TypeData::TypeData(const QString &name, uint nbChars)
+  : _nbChars(nbChars), _name(name)
+{
+  Q_ASSERT( !name.isEmpty() && nbChars!=0 );
+}
+Register::TypeData::TypeData(const QString &name, Address address, uint nbChars)
+  : _nbChars(nbChars), _address(address), _name(name)
+{
+  Q_ASSERT( address.isValid() && nbChars!=0 && !name.isEmpty() );
+}
+
+Register::Type Register::TypeData::type() const
+{
+  if ( !_address.isValid() ) {
+    if ( _name.isEmpty() ) return Invalid;
+    return Special;
+  }
+  if ( _name.isEmpty() ) return Regular;
+  return Combined;
+}
+
+QString Register::TypeData::toString() const
+{
+  return QString("%1 %2 %3").arg(toLabel(_address)).arg(_nbChars).arg(_name);
+}
+
+Register::TypeData Register::TypeData::fromString(const QString &s)
+{
+  QStringList list = QStringList::split(" ", s);
+  if ( list.count()<2 || list.count()>3 ) return TypeData();
+  bool ok;
+  Address address = list[0].toUInt(&ok);
+  if ( !ok ) return TypeData();
+  uint nbChars = list[1].toUInt(&ok);
+  if ( !ok || nbChars==0 || (nbChars%2)!=0 ) return TypeData();
+  QString name;
+  if ( list.count()==3 ) name = list[2];
+  if ( !address.isValid() ) {
+    if ( name.isEmpty() ) return TypeData();
+    return TypeData(name, nbChars);
+  }
+  if ( name.isEmpty() ) return TypeData(address, nbChars);
+  return TypeData(name, address, nbChars);
+}
+
+//----------------------------------------------------------------------------
+void Register::List::init()
+{
+  _regulars.clear();
+  _specials.clear();
+  _watched.clear();
+  _portDatas.clear();
+  delayedChanged();
+}
+
+void Register::List::setWatched(const TypeData &data, bool watched)
+{
+  if (watched) {
+    if ( _watched.contains(data) ) return;
+    _watched.append(data);
+  } else _watched.remove(data);
+  delayedChanged();
+}
+
+void Register::List::clearWatched()
+{
+  _watched.clear();
+  delayedChanged();
+}
+
+void Register::List::setValue(const TypeData &data, BitValue value)
+{
+  if ( !data.address().isValid() ) {
+    _specials[data.name()].old = _specials[data.name()].current;
+    _specials[data.name()].current = value;
+  } else {
+    Q_ASSERT( (data.nbChars()%2)==0 );
+    uint nb = data.nbChars()/2;
+    for (uint i=0; i<nb; i++) {
+      Address address = data.address() + i;
+      _regulars[address].old = _regulars[address].current;
+      _regulars[address].current = value.byte(i);
+    }
+  }
+  delayedChanged();
+}
+
+void Register::List::setPortData(uint index, const QMap<uint, Device::PortBitData> &data)
+{
+  _portDatas[index].old = _portDatas[index].current;
+  _portDatas[index].current = data;
+  delayedChanged();
+}
+
+BitValue Register::List::value(const TypeData &data) const
+{
+  if ( !data.address().isValid() ) {
+    if ( !_specials.contains(data.name()) ) return BitValue();
+    return _specials[data.name()].current;
+  }
+  Q_ASSERT( (data.nbChars()%2)==0 );
+  uint nb = data.nbChars()/2;
+  BitValue value = 0;
+  for (int i=nb-1; i>=0; i--) {
+    value <<= 8;
+    BitValue v = _regulars[data.address() + i].current;
+    if ( !v.isInitialized() ) return BitValue();
+    value += v;
+  }
+  return value;
+}
+
+BitValue Register::List::oldValue(const TypeData &data) const
+{
+  if ( !data.address().isValid() ) {
+    if ( !_specials.contains(data.name()) ) return BitValue();
+    return _specials[data.name()].old;
+  }
+  Q_ASSERT( (data.nbChars()%2)==0 );
+  uint nb = data.nbChars()/2;
+  BitValue value = 0;
+  for (int i=nb-1; i>=0; i--) {
+    value <<= 8;
+    BitValue v = _regulars[data.address() + i].old;
+    if ( !v.isInitialized() ) return BitValue();
+    value += v;
+  }
+  return value;
+}
diff --git a/src/devices/base/register.h b/src/devices/base/register.h
new file mode 100644
index 0000000..1c587e2
--- /dev/null
+++ b/src/devices/base/register.h
@@ -0,0 +1,130 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef REGISTER_H
+#define REGISTER_H
+
+#include "common/common/storage.h"
+#include "devices/base/generic_device.h"
+namespace Register { class TypeData; }
+
+namespace Device
+{
+enum RegisterProperty { NotAccessible = 0x0, Readable = 0x1, Writable = 0x2 };
+Q_DECLARE_FLAGS(RegisterProperties, RegisterProperty)
+Q_DECLARE_OPERATORS_FOR_FLAGS(RegisterProperties)
+
+enum { MAX_NB_PORTS = 8 };
+enum { MAX_NB_PORT_BITS = 16 };
+enum BitState { Low = 0, High, WeakPullUp, WeakPullDown, HighImpedance, Unknown };
+enum IoState { IoLow = 0, IoHigh, IoUnknown };
+class PortBitData {
+public:
+  PortBitData() : state(Unknown), driving(false), drivenState(IoUnknown), drivingState(IoUnknown) {}
+  BitState state;
+  bool driving;
+  IoState drivenState, drivingState;
+  bool operator !=(const PortBitData &pdb) const {
+    return ( state!=pdb.state || driving!=pdb.driving || drivenState!=pdb.drivenState || drivingState!=pdb.drivingState );
+  }
+};
+
+} // namespace
+
+namespace Register
+{
+//----------------------------------------------------------------------------
+enum Type { Regular, Special, Combined, Invalid };
+class TypeData {
+public:
+  TypeData() : _nbChars(0) {}
+  TypeData(Address address, uint nbChars);
+  TypeData(const QString &name, uint nbChars);
+  TypeData(const QString &name, Address address, uint nbChars);
+  bool operator ==(const TypeData &data) const { return _name==data._name && _address==data._address && _nbChars==data._nbChars; }
+  Type type() const;
+  QString name() const { return _name; }
+  Address address() const { return _address; }
+  uint nbChars() const { return _nbChars; }
+  QString toString() const;
+  static TypeData fromString(const QString &s);
+
+private:
+  uint    _nbChars;
+  Address _address;
+  QString _name;
+};
+
+} // namespace
+
+namespace Device
+{
+//----------------------------------------------------------------------------
+class RegistersData
+{
+public:
+  RegistersData() {}
+  virtual ~RegistersData() {}
+  virtual uint nbRegisters() const = 0;
+  virtual uint nbBits() const = 0;
+  uint nbBytes() const { return nbBitsToNbBytes(nbBits()); }
+  uint nbChars() const { return nbBitsToNbChars(nbBits()); }
+  virtual uint addressFromIndex(uint i) const = 0;
+  virtual uint indexFromAddress(Address address) const = 0;
+  virtual RegisterProperties properties(Address address) const = 0;
+  virtual QValueList<Register::TypeData> relatedRegisters(const Register::TypeData &data) const = 0;
+  virtual bool hasPort(uint index) const = 0;
+  virtual int portIndex(Address address) const = 0;
+  virtual QString portName(uint index) const = 0;
+  virtual bool hasPortBit(uint index, uint bit) const = 0;
+  virtual QString portBitName(uint index, uint bit) const = 0;
+};
+
+} // namespace
+
+namespace Register
+{
+//----------------------------------------------------------------------------
+class List;
+extern List &list();
+
+class List : public GenericStorage
+{
+Q_OBJECT
+public:
+  List() : GenericStorage(0, "register_list") {}
+  void init();
+  void setWatched(const TypeData &data, bool watched);
+  void clearWatched();
+  const QValueList<TypeData> &watched() const { return _watched; }
+  bool isWatched(const TypeData &data) const { return _watched.contains(data); }
+  void setValue(const TypeData &data, BitValue value);
+  BitValue value(const TypeData &data) const;
+  BitValue oldValue(const TypeData &data) const;
+  void setPortData(uint index, const QMap<uint, Device::PortBitData> &data);
+  QMap<uint, Device::PortBitData> portData(uint index) const { return _portDatas[index].current; }
+  QMap<uint, Device::PortBitData> oldPortData(uint index) const { return _portDatas[index].old; }
+
+private:
+  class StateData {
+  public:
+    BitValue current, old;
+  };
+  QMap<Address, StateData> _regulars; // registers with address
+  QMap<QString, StateData> _specials; // registers with no address
+  class PortData {
+  public:
+    QMap<uint, Device::PortBitData> current, old;
+  };
+  QMap<uint, PortData> _portDatas; // port index
+  QValueList<TypeData> _watched;
+};
+
+} // namespace
+
+#endif
diff --git a/src/devices/devices.pro b/src/devices/devices.pro
new file mode 100644
index 0000000..136930d
--- /dev/null
+++ b/src/devices/devices.pro
@@ -0,0 +1,2 @@
+TEMPLATE = subdirs
+SUBDIRS = base list pic mem24
diff --git a/src/devices/gui/Makefile.am b/src/devices/gui/Makefile.am
new file mode 100644
index 0000000..ae92163
--- /dev/null
+++ b/src/devices/gui/Makefile.am
@@ -0,0 +1,7 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+libdeviceui_la_LDFLAGS = $(all_libraries)
+noinst_LTLIBRARIES = libdeviceui.la
+libdeviceui_la_SOURCES = hex_word_editor.cpp memory_editor.cpp \
+		register_view.cpp hex_view.cpp device_group_ui.cpp
diff --git a/src/devices/gui/device_group_ui.cpp b/src/devices/gui/device_group_ui.cpp
new file mode 100644
index 0000000..64b5c14
--- /dev/null
+++ b/src/devices/gui/device_group_ui.cpp
@@ -0,0 +1,9 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "device_group_ui.h"
diff --git a/src/devices/gui/device_group_ui.h b/src/devices/gui/device_group_ui.h
new file mode 100644
index 0000000..3b2fa91
--- /dev/null
+++ b/src/devices/gui/device_group_ui.h
@@ -0,0 +1,45 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DEVICE_GROUP_UI_H
+#define DEVICE_GROUP_UI_H
+
+#include <qpixmap.h>
+class QWidget;
+class KPopupMenu;
+class KListViewItem;
+class KAction;
+
+#include "devices/base/generic_device.h"
+#include "devices/base/device_group.h"
+#include "devices/base/register.h"
+namespace Register { class View; class ListViewItem; }
+class HexEditor;
+class ListContainer;
+
+namespace Device
+{
+class Memory;
+class HexView;
+class MemoryEditor;
+
+class GroupUI : public ::Group::BaseGui
+{
+public:
+  virtual HexView *createHexView(const HexEditor &editor, QWidget *parent) const = 0;
+  virtual Register::View *createRegisterView(QWidget *parent) const = 0;
+  virtual MemoryEditor *createConfigEditor(Device::Memory &memory, QWidget *parent) const = 0;
+  virtual void fillWatchListContainer(ListContainer *container, QValueVector<Register::TypeData> &ids) const = 0;
+  virtual Register::ListViewItem *createWatchItem(const Register::TypeData &data, KListViewItem *parent) const = 0;
+};
+
+inline const Device::GroupUI &groupui(const Device::Data &data) { return static_cast<const Device::GroupUI &>(*data.group().gui()); }
+
+} // namespace
+
+#endif
diff --git a/src/devices/gui/hex_view.cpp b/src/devices/gui/hex_view.cpp
new file mode 100644
index 0000000..6b26b0a
--- /dev/null
+++ b/src/devices/gui/hex_view.cpp
@@ -0,0 +1,23 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2003 Alain Gibaud <alain.gibaud@free.fr>                *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "hex_view.h"
+
+Device::HexView::HexView(const HexEditor &editor, QWidget *parent, const char *name)
+  : MemoryEditorGroup(0, parent, name), _editor(editor)
+{}
+
+void Device::HexView::display(Memory *memory)
+{
+  _memory = memory;
+  for (uint i=0; i<_editors.count(); i++) delete _editors[i];
+  _editors.clear();
+  if ( _memory==0 ) return;
+  display();
+}
diff --git a/src/devices/gui/hex_view.h b/src/devices/gui/hex_view.h
new file mode 100644
index 0000000..d73710e
--- /dev/null
+++ b/src/devices/gui/hex_view.h
@@ -0,0 +1,39 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2003 Alain Gibaud <alain.gibaud@free.fr>                *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef HEX_VIEW_H
+#define HEX_VIEW_H
+
+#include "memory_editor.h"
+#include "libgui/hex_editor.h"
+
+namespace Device
+{
+
+class HexView : public MemoryEditorGroup
+{
+Q_OBJECT
+public:
+  HexView(const HexEditor &editor, QWidget *parent, const char *name);
+  virtual void display(Memory *memory);
+  virtual uint nbChecksumChars() const = 0;
+  virtual BitValue checksum() const = 0;
+  bool isModified() const { return _editor.isModified(); }
+  const Memory *originalMemory() const { return _editor.originalMemory(); }
+
+protected:
+  virtual void display() = 0;
+
+private:
+  const HexEditor &_editor;
+};
+
+} // namespace
+
+#endif
diff --git a/src/devices/gui/hex_word_editor.cpp b/src/devices/gui/hex_word_editor.cpp
new file mode 100644
index 0000000..fd64e13
--- /dev/null
+++ b/src/devices/gui/hex_word_editor.cpp
@@ -0,0 +1,42 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "hex_word_editor.h"
+
+#include <qframe.h>
+#include <qgroupbox.h>
+#include <qlabel.h>
+#include <qapplication.h>
+#include <qtimer.h>
+
+//-----------------------------------------------------------------------------
+Device::HexWordEditor::HexWordEditor(Memory &memory, uint nbChars, QWidget *parent)
+  : GenericHexWordEditor(nbChars, true, parent), _memory(memory)
+{
+  setOffset(-1);
+}
+
+void Device::HexWordEditor::setOffset(int offset)
+{
+  _offset = offset;
+  set();
+}
+
+//-----------------------------------------------------------------------------
+Device::RegisterHexWordEditor::RegisterHexWordEditor(QWidget *parent, uint nbChars, BitValue mask)
+  : GenericHexWordEditor(nbChars, true, parent), _mask(mask)
+{
+  clear();
+}
+
+void Device::RegisterHexWordEditor::setValue(BitValue word)
+{
+  _word = word;
+  set();
+}
diff --git a/src/devices/gui/hex_word_editor.h b/src/devices/gui/hex_word_editor.h
new file mode 100644
index 0000000..bd9fadb
--- /dev/null
+++ b/src/devices/gui/hex_word_editor.h
@@ -0,0 +1,64 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef HEX_WORD_EDITOR_H
+#define HEX_WORD_EDITOR_H
+
+#include "common/gui/hexword_gui.h"
+#include "devices/base/generic_memory.h"
+
+namespace Device
+{
+//-----------------------------------------------------------------------------
+class HexWordEditor : public GenericHexWordEditor
+{
+Q_OBJECT
+public:
+  HexWordEditor(Memory &memory, uint nbChars, QWidget *parent);
+  void setOffset(int offset);
+  int offset() const { return _offset; }
+
+protected:
+  Device::Memory &_memory;
+  int _offset;
+
+  virtual bool isValid() const { return _offset!=-1; }
+  virtual BitValue mask() const = 0;
+  virtual BitValue normalizeWord(BitValue value) const = 0;
+  virtual BitValue word() const = 0;
+  virtual void setWord(BitValue value) = 0;
+  virtual BitValue blankValue() const { return BitValue(); }
+};
+
+//-----------------------------------------------------------------------------
+class RegisterHexWordEditor : public GenericHexWordEditor
+{
+Q_OBJECT
+public:
+  RegisterHexWordEditor(QWidget *parent, uint nbChars, BitValue mask);
+  void clear() { setValue(BitValue()); }
+  void setValue(BitValue word);
+  BitValue value() const { return _word; }
+  void setColor(QColor color) { setPaletteForegroundColor(color); }
+  void unsetColor() { unsetPalette(); }
+
+private:
+  BitValue _mask, _word;
+
+  virtual bool isValid() const { return true; }
+  virtual BitValue mask() const { return _mask; }
+  virtual BitValue normalizeWord(BitValue value) const { return value.maskWith(_mask); }
+  virtual BitValue word() const { return _word; }
+  virtual void setWord(BitValue value) { _word = value; }
+  virtual BitValue blankValue() const { return BitValue(); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/devices/gui/memory_editor.cpp b/src/devices/gui/memory_editor.cpp
new file mode 100644
index 0000000..175f011
--- /dev/null
+++ b/src/devices/gui/memory_editor.cpp
@@ -0,0 +1,369 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "memory_editor.h"
+
+#include <qlabel.h>
+#include <qscrollbar.h>
+#include <qlayout.h>
+#include <qgrid.h>
+#include <qtimer.h>
+#include <qpopupmenu.h>
+#include <klocale.h>
+#include <kpushbutton.h>
+#include <kaction.h>
+
+#include "common/common/misc.h"
+#include "hex_word_editor.h"
+#include "device_group_ui.h"
+#include "libgui/toplevel.h"
+#include "libgui/main_global.h"
+#include "hex_view.h"
+#include "libgui/gui_prog_manager.h"
+
+//-----------------------------------------------------------------------------
+Device::MemoryEditor::MemoryEditor(Device::Memory *memory, QWidget *parent, const char *name)
+  : QFrame(parent, name), _memory(memory)
+{
+  _top = new QVBoxLayout(this, 5, 10);
+}
+
+//-----------------------------------------------------------------------------
+Device::MemoryRangeEditor::MemoryRangeEditor(Device::Memory &memory,
+                    uint nbLines, uint nbCols, uint offset, int nb,
+                    QWidget *parent, const char *name)
+  : MemoryEditor(&memory, parent, name),
+    _nbLines(nbLines), _nbCols(nbCols), _offset(offset), _nb(nb)
+{}
+
+void Device::MemoryRangeEditor::init()
+{
+  if ( _nb==-1 ) _nb = nbWords();
+  uint totalNbLines = _nb / _nbCols;
+  if ( (_nb % _nbCols)!=0 ) totalNbLines++;
+
+  QHBoxLayout *hbox = new QHBoxLayout(_top);
+
+  QVBoxLayout *vbox = new QVBoxLayout(hbox);
+  QFrame *frame = new QFrame(this);
+  frame->setFrameStyle(QFrame::Panel | QFrame::Raised);
+  frame->setMargin(5);
+  vbox->addWidget(frame);
+  vbox->addStretch(1);
+  QHBoxLayout *fbox = new QHBoxLayout(frame, 5, 5);
+  QGrid *grid = new QGrid(3+_nbCols, QGrid::Horizontal, frame, "memory_range_editor_grid");
+  fbox->addWidget(grid);
+  grid->setSpacing(0);
+  grid->setMargin(3);
+  QFont f("courier", font().pointSize());
+  grid->setFont(f);
+  for (uint k=0; k<_nbLines; ++k) {
+    // addresses
+    QWidget *w = new QWidget(grid);
+    w->setFixedWidth(10);
+    _blocks.append(w);
+    QLabel *label = new QLabel(toHex(0, 2*_memory->device().nbBytesAddress()), grid, "address_label");
+    _addresses.append(label);
+    label = new QLabel(":", grid);
+    // memory
+    for (uint i = 0; i<_nbCols; ++i) {
+      HexWordEditor *h = createHexWordEditor(grid);
+      _editors.append(h);
+      connect(h, SIGNAL(modified()), SIGNAL(modified()));
+      connect(h, SIGNAL(moveNext()), SLOT(moveNext()));
+      connect(h, SIGNAL(movePrev()), SLOT(movePrev()));
+      connect(h, SIGNAL(moveFirst()), SLOT(moveFirst()));
+      connect(h, SIGNAL(moveLast()), SLOT(moveLast()));
+      connect(h, SIGNAL(moveUp()), SLOT(moveUp()));
+      connect(h, SIGNAL(moveDown()), SLOT(moveDown()));
+      connect(h, SIGNAL(moveNextPage()), SLOT(moveNextPage()));
+      connect(h, SIGNAL(movePrevPage()), SLOT(movePrevPage()));
+    }
+  }
+
+  //  scrollbar if there are more lines to display than visible
+  _scrollbar = new QScrollBar(0, QMAX(_nbLines, totalNbLines)-_nbLines, 1, _nbLines, 0,
+                              QScrollBar::Vertical, frame, "memory_range_editor_scrollbar");
+  connect(_scrollbar, SIGNAL(valueChanged(int)), SLOT(setIndex(int))) ;
+  if ( totalNbLines<=_nbLines ) _scrollbar->hide();
+  fbox->addWidget(_scrollbar);
+  fbox->addStretch(1);
+
+  vbox->addStretch(1);
+  QVBoxLayout *vboxc = new QVBoxLayout(hbox);
+  vboxc->setSpacing(0);
+  _comment = new QLabel(this);
+  _comment->hide();
+  vboxc->addWidget(_comment);
+  _spacer = new QLabel(this);
+  _spacer->setFixedHeight(10);
+  _spacer->hide();
+  vboxc->addWidget(_spacer);
+  addLegend(vboxc);
+  vboxc->addStretch(1);
+  hbox->addStretch(1);
+
+  setReadOnly(false);
+  setIndex(0);
+}
+
+void Device::MemoryRangeEditor::setComment(const QString &text)
+{
+  _comment->setText(text);
+  _comment->show();
+  _spacer->show();
+}
+
+void Device::MemoryRangeEditor::setReadOnly(bool readOnly)
+{
+  for (uint i=0; i<_editors.count(); i++)
+    _editors[i]->setReadOnly(readOnly || isRangeReadOnly());
+}
+
+void Device::MemoryRangeEditor::updateDisplay()
+{
+  setIndex(_scrollbar->value());
+}
+
+void Device::MemoryRangeEditor::setStartWord(int index)
+{
+  setIndex(index / _nbCols / addressIncrement());
+}
+
+void Device::MemoryRangeEditor::setEndWord(int index)
+{
+  uint i = index / _nbCols / addressIncrement();
+  i = (i<_nbLines ? 0 : i - _nbLines + 1);
+  setIndex(i);
+}
+
+void Device::MemoryRangeEditor::setIndex(int index)
+{
+  _scrollbar->blockSignals(true);
+  _scrollbar->setValue(index);
+  _scrollbar->blockSignals(false);
+
+  // memory
+  for (uint i=0; i<_editors.count(); i++) {
+    int offset = wordOffset() + i;
+    _editors[i]->setOffset(offset<int(nbWords()) ? offset : -1);
+  }
+
+  // adresses
+  uint inc = addressIncrement();
+  Address address = startAddress() + inc * wordOffset();
+  for (uint i=0; i<_addresses.count(); i++) {
+    _addresses[i]->setText(toHex(address, 2*_memory->device().nbBytesAddress()));
+    updateAddressColor(i, address);
+    address += inc * _nbCols;
+  }
+}
+
+void Device::MemoryRangeEditor::moveNext()
+{
+  QValueList<HexWordEditor *>::iterator it = _editors.find((HexWordEditor *)sender());
+  ++it;
+  if ( it==_editors.end() || (*it)->offset()==-1 ) {
+    if ( current()==uint(_scrollbar->maxValue()) ) return; // at end
+    setIndex(current()+1);
+    _editors[_editors.count()-_nbCols]->setFocus();
+  } else (*it)->setFocus();
+}
+
+void Device::MemoryRangeEditor::movePrev()
+{
+  QValueList<HexWordEditor *>::iterator it = _editors.find((HexWordEditor *)sender());
+  if ( it==_editors.begin() ) {
+    if ( current()==0 ) return; // at beginning
+    setIndex(current()-1);
+    _editors[_nbCols-1]->setFocus();
+  } else {
+    --it;
+    (*it)->setFocus();
+  }
+}
+
+void Device::MemoryRangeEditor::moveFirst()
+{
+  if ( _editors[0]==0 ) return;
+  setIndex(0);
+  _editors[0]->setFocus();
+}
+
+void Device::MemoryRangeEditor::moveLast()
+{
+  if ( _editors.count()==0 ) return;
+  setIndex(_scrollbar->maxValue());
+  for (uint i=1; i<=_nbCols; i++) {
+    if ( _editors[_editors.count()-i]->offset()==-1 ) continue;
+    _editors[_editors.count()-i]->setFocus();
+    break;
+  }
+}
+
+void Device::MemoryRangeEditor::moveUp()
+{
+  int i = _editors.findIndex((HexWordEditor *)sender());
+  uint line = i / _nbCols;
+  if ( line==0 ) {
+    if ( current()==0 ) return; // on first line
+    setIndex(current()-1);
+    _editors[i]->setFocus();
+  } else _editors[i-_nbCols]->setFocus();
+}
+
+void Device::MemoryRangeEditor::moveDown()
+{
+  int i = _editors.findIndex((HexWordEditor *)sender());
+  uint line = i / _nbCols;
+  if ( line+1==_nbLines ) {
+    if ( current()==uint(_scrollbar->maxValue()) ) return; // on last line
+    setIndex(current()+1);
+    if ( _editors[i]->offset()==-1 ) _editors[i-_nbCols]->setFocus();
+    else _editors[i]->setFocus();
+  } else _editors[i+_nbCols]->setFocus();
+}
+
+void Device::MemoryRangeEditor::moveNextPage()
+{
+  int i = _editors.findIndex((HexWordEditor *)sender());
+  if ( _nbLines>(uint(_scrollbar->maxValue()) - current()) ) i = (_nbLines-1) * _nbCols + (i % _nbCols);
+  else setIndex(current()+_nbLines);
+  if ( _editors[i]->offset()==-1 ) _editors[i-_nbCols]->setFocus();
+  else _editors[i]->setFocus();
+}
+
+void Device::MemoryRangeEditor::movePrevPage()
+{
+  int i = _editors.findIndex((HexWordEditor *)sender());
+  if ( current()<_nbLines ) i = (i % _nbCols);
+  else setIndex(current()-_nbLines);
+  _editors[i]->setFocus();
+}
+
+//-----------------------------------------------------------------------------
+Device::MemoryEditorGroup::MemoryEditorGroup(Device::Memory *memory, QWidget *parent, const char *name)
+  : MemoryEditor(memory, parent, name)
+{}
+
+void Device::MemoryEditorGroup::addEditor(MemoryEditor *editor)
+{
+  connect(editor, SIGNAL(modified()), SIGNAL(modified()));
+  _editors.append(editor);
+}
+
+void Device::MemoryEditorGroup::setReadOnly(bool readOnly)
+{
+  for (uint i=0; i<_editors.count(); i++)
+    _editors[i]->setReadOnly(readOnly);
+}
+
+void Device::MemoryEditorGroup::updateDisplay()
+{
+  for (uint i=0; i<_editors.count(); i++)
+    _editors[i]->updateDisplay();
+}
+
+//-----------------------------------------------------------------------------
+const Device::ActionData Device::ACTION_DATA[Nb_Actions] = {
+  { I18N_NOOP("&Clear"),       "fileclose",         NeedWrite },
+  { I18N_NOOP("&Zero"),        0,                   NeedWrite },
+  { I18N_NOOP("For checksum check"), 0,             NeedWrite },
+  { I18N_NOOP("Re&load"),      "reload",            SeparatorAfter | NeedModified },
+  { I18N_NOOP("&Program"),     "piklab_burnchip",   NeedProgrammer },
+  { I18N_NOOP("&Verify"),      "piklab_verifychip", NeedProgrammer },
+  { I18N_NOOP("&Read"),        "piklab_readchip",   NeedProgrammer | NeedWrite },
+  { I18N_NOOP("&Erase"),       "piklab_erasechip",  NeedProgrammer },
+  { I18N_NOOP("&Blank Check"), "piklab_blankcheck", NeedProgrammer }
+};
+
+Device::MemoryTypeEditor::MemoryTypeEditor(const HexView *hexview, Device::Memory &memory,
+                                            QWidget *parent, const char *name)
+  : MemoryEditorGroup(&memory, parent, name),
+    _title(0), _comment(0), _hexview(hexview)
+{
+  for (uint i=0; i<Nb_Actions; i++) _actions[i] = 0;
+}
+
+void Device::MemoryTypeEditor::init(bool first)
+{
+  if ( !first ) _top->addWidget(new SeparatorWidget(this));
+  QHBoxLayout *hbox = new QHBoxLayout(_top);
+
+  _title = new PopupButton(this);
+  for (uint i=0; i<Nb_Actions; i++) {
+    if ( hasAction(Action(i)) ) {
+      _actions[i] = new KAction(i18n(ACTION_DATA[i].label), ACTION_DATA[i].icon, 0,
+                                this, SLOT(doAction()), Main::toplevel().actionCollection());
+      addAction(_actions[i]);
+    }
+    if ( ACTION_DATA[i].properties & SeparatorAfter ) _title->appendSeparator();
+  }
+  _title->appendSeparator();
+  hbox->addWidget(_title);
+
+  _comment = new QLabel(this);
+  hbox->addWidget(_comment);
+  hbox->addStretch(1);
+
+  connect(&Main::toplevel(), SIGNAL(stateChanged()), SLOT(stateChanged()));
+}
+
+void Device::MemoryTypeEditor::addAction(KAction *action)
+{
+  _title->appendAction(action);
+}
+
+void Device::MemoryTypeEditor::doAction()
+{
+  for (uint i=0; i<Nb_Actions; i++) {
+    if ( sender()==_actions[i] ) {
+      doAction(Action(i));
+      break;
+    }
+  }
+}
+
+void Device::MemoryTypeEditor::doAction(Action action)
+{
+  if ( (ACTION_DATA[action].properties & NeedProgrammer)
+       && !Programmer::manager->initProgramming(false) ) return;
+  bool ok = internalDoAction(action);
+  if ( ACTION_DATA[action].properties & NeedProgrammer )
+    Programmer::manager->endProgramming();
+  if (ok) {
+    updateDisplay();
+    modified();
+  }
+}
+
+void Device::MemoryTypeEditor::stateChanged()
+{
+  bool idle = ( Main::state()==Main::Idle );
+  for (uint i=0; i<Nb_Actions; i++) {
+    if ( _actions[i]==0 ) continue;
+    bool on = true;
+    if ( (ACTION_DATA[i].properties & NeedProgrammer) && !idle ) on = false;
+    if ( (ACTION_DATA[i].properties & NeedWrite) && _readOnly ) on = false;
+    if ( (ACTION_DATA[i].properties & NeedModified) && (_hexview==0 || !_hexview->isModified()) ) on = false;
+    _actions[i]->setEnabled(on);
+  }
+}
+
+void Device::MemoryTypeEditor::setReadOnly(bool readOnly)
+{
+  _readOnly = readOnly;
+  MemoryEditorGroup::setReadOnly(readOnly);
+  stateChanged();
+}
+
+const Device::Memory *Device::MemoryTypeEditor::originalMemory() const
+{
+  return (_hexview ? _hexview->originalMemory() : 0);
+}
diff --git a/src/devices/gui/memory_editor.h b/src/devices/gui/memory_editor.h
new file mode 100644
index 0000000..9836261
--- /dev/null
+++ b/src/devices/gui/memory_editor.h
@@ -0,0 +1,156 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef MEMORY_EDITOR_H
+#define MEMORY_EDITOR_H
+
+#include <qframe.h>
+#include <qscrollbar.h>
+#include <qlabel.h>
+#include "common/common/qflags.h"
+#include "common/common/bitvalue.h"
+class QVBoxLayout;
+class QHBoxLayout;
+class QHBox;
+class KAction;
+class PopupButton;
+
+namespace Device
+{
+class HexView;
+class HexWordEditor;
+class Memory;
+
+enum Action { Clear = 0, Zero, ChecksumCheck, Reload,
+              Program, Verify, Read, Erase, BlankCheck, Nb_Actions };
+enum ActionProperty { NoProperty = 0, SeparatorAfter = 1, NeedProgrammer = 2,
+                      NeedWrite = 4, NeedModified = 8 };
+Q_DECLARE_FLAGS(ActionProperties, ActionProperty)
+Q_DECLARE_OPERATORS_FOR_FLAGS(ActionProperties)
+struct ActionData {
+  const char *label, *icon;
+  ActionProperties properties;
+};
+extern const ActionData ACTION_DATA[Nb_Actions];
+
+//----------------------------------------------------------------------------
+class MemoryEditor : public QFrame
+{
+Q_OBJECT
+public:
+  MemoryEditor(Device::Memory *memory, QWidget *parent, const char *name);
+  virtual void setReadOnly(bool readOnly) = 0;
+
+public slots:
+  virtual void updateDisplay() = 0;
+
+signals:
+  void modified();
+
+protected:
+  Device::Memory *_memory;
+  QVBoxLayout    *_top;
+};
+
+//----------------------------------------------------------------------------
+class MemoryRangeEditor : public MemoryEditor
+{
+Q_OBJECT
+public:
+  MemoryRangeEditor(Device::Memory &memory, uint nbLines, uint nbCols,
+                    uint offset, int nb, QWidget *parent, const char *name);
+  virtual void init();
+  virtual void setReadOnly(bool readOnly);
+  void setComment(const QString &text);
+
+public slots:
+  virtual void updateDisplay();
+  void moveNext();
+  void movePrev();
+  void moveFirst();
+  void moveLast();
+  void moveUp();
+  void moveDown();
+  void moveNextPage();
+  void movePrevPage();
+
+protected slots:
+  void setStartWord(int index);
+  void setEndWord(int index);
+  void setIndex(int index);
+
+protected:
+  uint _nbLines, _nbCols, _offset;
+  int  _nb;
+  QValueList<QLabel *> _addresses;
+  QValueList<QWidget *> _blocks;
+  QValueList<HexWordEditor *> _editors;
+  QScrollBar *_scrollbar;
+  QLabel     *_comment;
+  QWidget    *_spacer;
+
+  uint wordOffset() const { return _offset + current() * _nbCols; }
+  uint current() const { return _scrollbar->value(); }
+  virtual uint nbWords() const = 0;
+  virtual uint addressIncrement() const = 0;
+  virtual Address startAddress() const = 0;
+  virtual HexWordEditor *createHexWordEditor(QWidget *parent) = 0;
+  virtual bool isRangeReadOnly() const = 0;
+  virtual void updateAddressColor(uint i, Address address) { Q_UNUSED(i); Q_UNUSED(address); }
+  virtual void addLegend(QVBoxLayout *vbox) { Q_UNUSED(vbox); }
+};
+
+//----------------------------------------------------------------------------
+class MemoryEditorGroup : public MemoryEditor
+{
+Q_OBJECT
+public:
+  MemoryEditorGroup(Device::Memory *memory, QWidget *parent, const char *name);
+  void addEditor(MemoryEditor *editor);
+  virtual void setReadOnly(bool readOnly);
+
+public slots:
+  virtual void updateDisplay();
+
+protected:
+  bool _modified;
+  QValueList<MemoryEditor *> _editors;
+};
+
+//----------------------------------------------------------------------------
+class MemoryTypeEditor : public MemoryEditorGroup
+{
+Q_OBJECT
+public:
+  MemoryTypeEditor(const HexView *hexview, Device::Memory &memory, QWidget *parent, const char *name);
+  virtual void init(bool first);
+  virtual void setReadOnly(bool readOnly);
+
+protected slots:
+  void doAction();
+  void stateChanged();
+
+protected:
+  PopupButton   *_title;
+  QLabel        *_comment;
+  const HexView *_hexview;
+  virtual bool internalDoAction(Action action) = 0; // return true if memory modified
+  virtual bool hasAction(Action) const { return true; }
+  void addAction(KAction *action);
+  const Device::Memory *originalMemory() const;
+
+private:
+  bool     _readOnly;
+  KAction *_actions[Nb_Actions];
+
+  void doAction(Action action);
+};
+
+} // namespace
+
+#endif
diff --git a/src/devices/gui/register_view.cpp b/src/devices/gui/register_view.cpp
new file mode 100644
index 0000000..70dedc9
--- /dev/null
+++ b/src/devices/gui/register_view.cpp
@@ -0,0 +1,208 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "register_view.h"
+
+#include "libgui/main_global.h"
+#include "libgui/gui_debug_manager.h"
+
+//----------------------------------------------------------------------------
+Register::PortBitListViewItem::PortBitListViewItem(uint index, uint bit, KListViewItem *parent)
+  : KListViewItem(parent), _index(index), _bit(bit)
+{
+  const Device::RegistersData *rdata = Main::deviceData()->registersData();
+  setText(1, rdata->portBitName(_index, _bit));
+  setSelectable(false);
+}
+
+void Register::PortBitListViewItem::updateView()
+{
+  const QMap<uint, Device::PortBitData> &pdata = Register::list().portData(_index);
+  QString text;
+  if ( pdata.isEmpty() ) text = "--";
+  else {
+/*
+    switch (pdata[_bit].state) {
+      case Device::High: text = " 1"; break;
+      case Device::Low: text = " 0"; break;
+      case Device::WeakPullUp: text = "w1"; break;
+      case Device::WeakPullDown: text = "w0"; break;
+      case Device::HighImpedance: text = "HZ"; break;
+      case Device::Unknown: text = "  "; break;
+    }
+*/
+    if ( pdata[_bit].drivingState==Device::IoUnknown ) text = " ";
+    else text += (pdata[_bit].drivingState==Device::IoHigh ? "1" : "0");
+    text += (pdata[_bit].driving ? " > " : " < ");
+    if ( pdata[_bit].drivenState==Device::IoUnknown ) text += " ";
+    else text += (pdata[_bit].drivenState==Device::IoHigh ? "1" : "0");
+  }
+  setText(2, text);
+  repaint();
+}
+
+void Register::PortBitListViewItem::paintCell(QPainter *p, const QColorGroup &cg, int column, int width, int align)
+{
+  QColorGroup ncg = cg;
+  const QMap<uint, Device::PortBitData> &data = Register::list().portData(_index);
+  const QMap<uint, Device::PortBitData> &odata = Register::list().oldPortData(_index);
+  bool changed = ( !data.isEmpty() && data[_bit]!=odata[_bit] );
+  if ( column==2 && changed ) ncg.setColor(QColorGroup::Text, red);
+  KListViewItem::paintCell(p, ncg, column, width, align);
+}
+
+QString Register::PortBitListViewItem::tooltip(int col) const
+{
+  if ( col!=2 ) return QString::null;
+  const QMap<uint, Device::PortBitData> &pdata = Register::list().portData(_index);
+  if ( pdata.isEmpty() ) return QString::null;
+  QString s = text(1) + ": ";
+  if (pdata[_bit].driving) {
+    if ( pdata[_bit].drivingState!=Device::IoUnknown ) s += i18n("unknown state");
+    else s += (pdata[_bit].drivingState==Device::IoHigh ? i18n("driving high") : i18n("driving low"));
+    s += i18n(" (output)");
+  } else {
+    if ( pdata[_bit].drivenState==Device::IoUnknown ) s += i18n("unknown state");
+    else s += (pdata[_bit].drivenState==Device::IoHigh ? i18n("driven high") : i18n("driven low"));
+    s += i18n(" (input)");
+  }
+  return s;
+}
+
+//-----------------------------------------------------------------------------
+Register::ListViewItem::ListViewItem(const TypeData &data, KListViewItem *parent)
+  : EditListViewItem(parent), _data(data), _base(NumberBase::Hex)
+{
+  setSelectable(false);
+  const Device::RegistersData *rdata = Main::deviceData()->registersData();
+  if ( data.type()==Regular && rdata ) {
+    int i = rdata->portIndex(data.address());
+    if ( i!=-1 ) {
+      for (int k=Device::MAX_NB_PORT_BITS-1; k>=0; k--) {
+        if ( !rdata->hasPortBit(i, k) ) continue;
+        PortBitListViewItem *item = new PortBitListViewItem(i, k, this);
+        _items.append(item);
+      }
+    }
+  }
+}
+
+QString Register::ListViewItem::text() const
+{
+  BitValue value = Register::list().value(_data);
+  uint nbChars = convertNbChars(_data.nbChars(), NumberBase::Hex, _base);
+  return (value.isInitialized() ? toLabel(_base, value, nbChars) : "--");
+}
+
+int Register::ListViewItem::compare(QListViewItem *item, int, bool) const
+{
+  const TypeData &data = static_cast<ListViewItem *>(item)->data();
+  int i1 = list().watched().findIndex(data);
+  Q_ASSERT( i1!=-1 );
+  int i2 = list().watched().findIndex(_data);
+  Q_ASSERT( i2!=-1 );
+  return ( i1-i2 );
+}
+
+void Register::ListViewItem::updateView()
+{
+  if ( _data.type()!=Special ) setText(0, toHexLabel(_data.address(), nbCharsAddress()) + ":");
+  setText(1, label());
+  setText(2, text());
+  repaint();
+  for (uint i=0; i<_items.count(); i++) _items[i]->updateView();
+}
+
+void Register::ListViewItem::setBase(NumberBase base)
+{
+  _base = base;
+  updateView();
+}
+
+void Register::ListViewItem::paintCell(QPainter *p, const QColorGroup &cg, int column, int width, int align)
+{
+  QColorGroup ncg = cg;
+  BitValue value = Register::list().value(_data);
+  BitValue oldValue = Register::list().oldValue(_data);
+  if ( column==2 && value!=oldValue ) ncg.setColor(QColorGroup::Text, red);
+  EditListViewItem::paintCell(p, ncg, column, width, align);
+}
+
+QString Register::ListViewItem::tooltip(int col) const
+{
+  if ( col!=2 ) return QString::null;
+  BitValue value = Register::list().value(_data);
+  if ( !value.isInitialized() ) return QString::null;
+  BitValue v = value;
+  QString s;
+  for (uint i=0; i<_data.nbChars(); i++) {
+    char c = v.nybble(i);
+    if ( isprint(c) ) s = c + s;
+    else s = "." + s;
+  }
+  return QString("%1 - %2 - \"%3\"").arg(toHexLabel(value, _data.nbChars()))
+         .arg(toLabel(NumberBase::Bin, value, 4*_data.nbChars())).arg(s);
+}
+
+QWidget *Register::ListViewItem::editWidgetFactory(int col) const
+{
+  if ( col!=2 || Main::programmerState()!=Programmer::Halted ) return 0;
+  return new NumberLineEdit(text(), 0);
+}
+
+void Register::ListViewItem::editDone(int col, const QWidget *edit)
+{
+  if ( col!=2 ) return;
+  bool ok;
+  ulong value = static_cast<const NumberLineEdit *>(edit)->value(&ok);
+  if (ok) Debugger::manager->writeRegister(_data, value);
+}
+
+//----------------------------------------------------------------------------
+Register::LineEdit::LineEdit(QWidget *parent, const char *name)
+  : NumberLineEdit(parent, name), _base(NumberBase::Nb_Types)
+{
+  connect(this, SIGNAL(lostFocus()), SLOT(updateText()));
+  connect(this, SIGNAL(returnPressed()), SLOT(returnPressedSlot()));
+}
+
+void Register::LineEdit::updateText()
+{
+  setText(_value.isInitialized() ? toLabel(_base, _value, _nbChars) : "--");
+  uint w = 2*frameWidth() + maxLabelWidth(_base, _nbChars, font());
+  setFixedWidth(w+5);
+  setFixedHeight(minimumSizeHint().height());
+}
+
+void Register::LineEdit::setValue(NumberBase base, BitValue value, uint nbChars)
+{
+  _base = base;
+  _value = value;
+  _nbChars = nbChars;
+  updateText();
+}
+
+void Register::LineEdit::returnPressedSlot()
+{
+  bool ok;
+  uint v = fromAnyLabel(text(), &ok);
+  if (ok) _value = v;
+  updateText();
+  emit modified();
+}
+
+void Register::LineEdit::keyPressEvent(QKeyEvent *e)
+{
+  if ( e->key()==Key_Escape ) clearFocus();
+  else NumberLineEdit::keyPressEvent(e);
+}
+
+//----------------------------------------------------------------------------
+Register::View::View(QWidget *parent, const char *name)
+ : QFrame(parent, name), GenericView(list())
+{}
diff --git a/src/devices/gui/register_view.h b/src/devices/gui/register_view.h
new file mode 100644
index 0000000..7ef8a54
--- /dev/null
+++ b/src/devices/gui/register_view.h
@@ -0,0 +1,105 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef REGISTER_VIEW_H
+#define REGISTER_VIEW_H
+
+#include <qframe.h>
+
+#include "devices/base/register.h"
+#include "common/gui/number_gui.h"
+#include "common/gui/list_view.h"
+
+namespace Register
+{
+enum { PortBitRtti = 1000, RegisterRtti = 1001 };
+
+//-----------------------------------------------------------------------------
+class PortBitListViewItem : public KListViewItem
+{
+public:
+  PortBitListViewItem(uint address, uint bit, KListViewItem *parent);
+  virtual int rtti() const { return PortBitRtti; }
+  void updateView();
+  QString tooltip(int column) const;
+
+private:
+  uint _index, _bit;
+
+  virtual void paintCell(QPainter *p, const QColorGroup &cg, int column, int width, int align);
+};
+
+//-----------------------------------------------------------------------------
+class ListViewItem : public EditListViewItem
+{
+public:
+  ListViewItem(const TypeData &data, KListViewItem *item);
+  virtual int rtti() const { return RegisterRtti; }
+  virtual void updateView();
+  const TypeData &data() const { return _data; }
+  QString tooltip(int column) const;
+  NumberBase base() const { return _base; }
+  void setBase(NumberBase base);
+  virtual QString label() const = 0;
+  virtual int compare(QListViewItem *item, int, bool) const;
+
+protected:
+  TypeData _data;
+  QValueList<PortBitListViewItem *> _items;
+  NumberBase _base;
+
+  virtual void paintCell(QPainter *p, const QColorGroup &cg, int column, int width, int align);
+  virtual QWidget *editWidgetFactory(int col) const;
+  virtual bool alwaysAcceptEdit(int) const { return false; }
+  virtual void editDone(int col, const QWidget *editWidget);
+  virtual uint nbCharsAddress() const = 0;
+  virtual QString text() const;
+  virtual void activate() {}
+};
+
+//-----------------------------------------------------------------------------
+class LineEdit : public NumberLineEdit
+{
+Q_OBJECT
+public:
+  LineEdit(QWidget *parent, const char *name = 0);
+  void setValue(NumberBase base, BitValue value, uint nbChars);
+  BitValue value() const { return _value; }
+
+signals:
+  void modified();
+
+protected:
+  virtual void keyPressEvent(QKeyEvent *e);
+
+private slots:
+  void updateText();
+  void returnPressedSlot();
+
+private:
+  NumberBase _base;
+  BitValue   _value;
+  uint       _nbChars;
+};
+
+//-----------------------------------------------------------------------------
+class View : public QFrame, public GenericView
+{
+Q_OBJECT
+public:
+  View(QWidget *parent, const char *name);
+
+signals:
+  void readSignal(uint address);
+  void writeSignal(uint address, uint value);
+  void setWatchedSignal(uint address, bool watched);
+};
+
+} // namespace
+
+#endif
diff --git a/src/devices/list/Makefile.am b/src/devices/list/Makefile.am
new file mode 100644
index 0000000..ce1c03a
--- /dev/null
+++ b/src/devices/list/Makefile.am
@@ -0,0 +1,11 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+
+noinst_LTLIBRARIES = libdevicelistnoui.la libdevicelistui.la
+
+libdevicelistnoui_la_LDFLAGS = $(all_libraries)
+libdevicelistnoui_la_SOURCES = device_list.cpp device_list_noui.cpp
+
+libdevicelistui_la_LDFLAGS = $(all_libraries)
+libdevicelistui_la_SOURCES = device_list.cpp device_list_ui.cpp
diff --git a/src/devices/list/device_list.cpp b/src/devices/list/device_list.cpp
new file mode 100644
index 0000000..1434ec8
--- /dev/null
+++ b/src/devices/list/device_list.cpp
@@ -0,0 +1,40 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "device_list.h"
+
+#include <qregexp.h>
+
+#include "devices/pic/pic/pic_group.h"
+#include "devices/mem24/mem24/mem24_group.h"
+
+const Device::AutoData Device::AUTO_DATA = { "*", I18N_NOOP("<auto>") };
+
+const Device::Data *Device::Lister::data(const QString &device) const
+{
+  for (ConstIterator it=begin(); it!=end(); it++) {
+    const Data *data = static_cast<const Data *>(it.data()->deviceData(device).data);
+    if (data) return data;
+  }
+  return 0;
+}
+
+QString Device::Lister::checkName(const QString &device) const
+{
+  if ( device==AUTO_DATA.name ) return device;
+  if ( isSupported(device) ) return device;
+  if ( device.startsWith("p") ) // compat mode for PiKdev
+    return checkName(device.mid(1));
+  return "16F871"; // default...
+}
+
+namespace Device
+{
+  Lister _lister;
+  const Lister &lister() { return _lister; }
+}
diff --git a/src/devices/list/device_list.h b/src/devices/list/device_list.h
new file mode 100644
index 0000000..3d9fb78
--- /dev/null
+++ b/src/devices/list/device_list.h
@@ -0,0 +1,34 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DEVICE_LIST_H
+#define DEVICE_LIST_H
+
+#include "devices/base/generic_device.h"
+#include "common/common/lister.h"
+
+namespace Device
+{
+
+struct AutoData {
+  const char *name, *label;
+};
+extern const AutoData AUTO_DATA;
+
+class Lister : public ::Group::Lister<GroupBase>
+{
+public:
+  Lister();
+  const Data *data(const QString &device) const;
+  QString checkName(const QString &device) const;
+};
+extern const Lister &lister();
+
+} // namespace
+
+#endif
diff --git a/src/devices/list/device_list_noui.cpp b/src/devices/list/device_list_noui.cpp
new file mode 100644
index 0000000..46d909e
--- /dev/null
+++ b/src/devices/list/device_list_noui.cpp
@@ -0,0 +1,18 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "device_list.h"
+
+#include "devices/pic/pic/pic_group.h"
+#include "devices/mem24/mem24/mem24_group.h"
+
+Device::Lister::Lister()
+{
+  addGroup(new Pic::Group, 0);
+  addGroup(new Mem24::Group, 0);
+}
diff --git a/src/devices/list/device_list_ui.cpp b/src/devices/list/device_list_ui.cpp
new file mode 100644
index 0000000..ebcd7ea
--- /dev/null
+++ b/src/devices/list/device_list_ui.cpp
@@ -0,0 +1,20 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "device_list.h"
+
+#include "devices/pic/pic/pic_group.h"
+#include "devices/pic/gui/pic_group_ui.h"
+#include "devices/mem24/mem24/mem24_group.h"
+#include "devices/mem24/gui/mem24_group_ui.h"
+
+Device::Lister::Lister()
+{
+  addGroup(new Pic::Group, new Pic::GroupUI);
+  addGroup(new Mem24::Group, new Mem24::GroupUI);
+}
diff --git a/src/devices/list/list.pro b/src/devices/list/list.pro
new file mode 100644
index 0000000..02f07b0
--- /dev/null
+++ b/src/devices/list/list.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = devicelist
+HEADERS += device_list.h
+SOURCES += device_list.cpp device_list_noui.cpp
diff --git a/src/devices/mem24/Makefile.am b/src/devices/mem24/Makefile.am
new file mode 100644
index 0000000..7c80d86
--- /dev/null
+++ b/src/devices/mem24/Makefile.am
@@ -0,0 +1,3 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+SUBDIRS = base xml xml_data mem24 prog gui
diff --git a/src/devices/mem24/base/Makefile.am b/src/devices/mem24/base/Makefile.am
new file mode 100644
index 0000000..336afca
--- /dev/null
+++ b/src/devices/mem24/base/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libmem24base.la
+libmem24base_la_LDFLAGS = $(all_libraries)
+libmem24base_la_SOURCES = mem24.cpp
diff --git a/src/devices/mem24/base/base.pro b/src/devices/mem24/base/base.pro
new file mode 100644
index 0000000..a42b768
--- /dev/null
+++ b/src/devices/mem24/base/base.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = mem24base
+HEADERS += mem24.h
+SOURCES += mem24.cpp
diff --git a/src/devices/mem24/base/mem24.cpp b/src/devices/mem24/base/mem24.cpp
new file mode 100644
index 0000000..03bffe3
--- /dev/null
+++ b/src/devices/mem24/base/mem24.cpp
@@ -0,0 +1,22 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "mem24.h"
+
+QDataStream &Mem24::operator <<(QDataStream &s, const Data &data)
+{
+  s << static_cast<const Device::Data &>(data);
+  s << data._nbBytes << data._nbBlocks << data._nbBytesPage;
+  return s;
+}
+QDataStream &Mem24::operator >>(QDataStream &s, Data &data)
+{
+  s >> static_cast<Device::Data &>(data);
+  s >> data._nbBytes >> data._nbBlocks >> data._nbBytesPage;
+  return s;
+}
diff --git a/src/devices/mem24/base/mem24.h b/src/devices/mem24/base/mem24.h
new file mode 100644
index 0000000..d66ff47
--- /dev/null
+++ b/src/devices/mem24/base/mem24.h
@@ -0,0 +1,47 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef MEM24_H
+#define MEM24_H
+
+#include "common/common/misc.h"
+#include "devices/base/generic_device.h"
+
+namespace Mem24
+{
+class XmlToData;
+class Group;
+
+//-----------------------------------------------------------------------------
+class Data : public Device::Data
+{
+public:
+  Data() : Device::Data(0) {}
+  virtual QString listViewGroup() const { return i18n("24 EEPROM"); }
+  uint nbBytes() const { return _nbBytes; }
+  virtual bool matchId(BitValue, Device::IdData &) const { return false; }
+  virtual uint nbBitsAddress() const { return nbBits(_nbBytes-1); }
+  virtual bool canWriteCalibration() const { return false; }
+  uint nbBlocks() const { return _nbBlocks; }
+  uint nbBytesPage() const { return _nbBytesPage; }
+
+private:
+  uint _nbBytes, _nbBlocks, _nbBytesPage;
+
+  friend class XmlToData;
+  friend class Group;
+  friend QDataStream &operator <<(QDataStream &s, const Data &data);
+  friend QDataStream &operator >>(QDataStream &s, Data &data);
+};
+
+QDataStream &operator <<(QDataStream &s, const Data &data);
+QDataStream &operator >>(QDataStream &s, Data &data);
+
+} // namespace
+
+#endif
diff --git a/src/devices/mem24/gui/Makefile.am b/src/devices/mem24/gui/Makefile.am
new file mode 100644
index 0000000..6838d57
--- /dev/null
+++ b/src/devices/mem24/gui/Makefile.am
@@ -0,0 +1,7 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libmem24ui.la
+libmem24ui_la_SOURCES = mem24_hex_view.cpp mem24_memory_editor.cpp \
+	mem24_group_ui.cpp
+libmem24ui_la_LDFLAGS = $(all_libraries)
diff --git a/src/devices/mem24/gui/mem24_group_ui.cpp b/src/devices/mem24/gui/mem24_group_ui.cpp
new file mode 100644
index 0000000..751e5a7
--- /dev/null
+++ b/src/devices/mem24/gui/mem24_group_ui.cpp
@@ -0,0 +1,16 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "mem24_group_ui.h"
+
+#include "mem24_hex_view.h"
+
+Device::HexView *Mem24::GroupUI::createHexView(const HexEditor &editor, QWidget *parent) const
+{
+  return new HexView(editor, parent);
+}
diff --git a/src/devices/mem24/gui/mem24_group_ui.h b/src/devices/mem24/gui/mem24_group_ui.h
new file mode 100644
index 0000000..37766b5
--- /dev/null
+++ b/src/devices/mem24/gui/mem24_group_ui.h
@@ -0,0 +1,28 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef MEM24_GROUP_UI_H
+#define MEM24_GROUP_UI_H
+
+#include "devices/gui/device_group_ui.h"
+
+namespace Mem24
+{
+class GroupUI : public Device::GroupUI
+{
+public:
+  virtual Device::HexView *createHexView(const HexEditor &editor, QWidget *parent) const;
+  virtual Register::View *createRegisterView(QWidget *) const { return 0; }
+  virtual Device::MemoryEditor *createConfigEditor(Device::Memory &, QWidget *) const { return 0; }
+  virtual void fillWatchListContainer(ListContainer *, QValueVector<Register::TypeData> &) const {}
+  virtual Register::ListViewItem *createWatchItem(const Register::TypeData &, KListViewItem *) const { return 0; }
+};
+
+} // namespace
+
+#endif
diff --git a/src/devices/mem24/gui/mem24_hex_view.cpp b/src/devices/mem24/gui/mem24_hex_view.cpp
new file mode 100644
index 0000000..0ada8d0
--- /dev/null
+++ b/src/devices/mem24/gui/mem24_hex_view.cpp
@@ -0,0 +1,38 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "mem24_hex_view.h"
+
+#include <qlayout.h>
+#include <qlabel.h>
+#include <klocale.h>
+
+#include "mem24_memory_editor.h"
+
+Mem24::HexView::HexView(const HexEditor &editor, QWidget *parent)
+  : Device::HexView(editor, parent, "mem24_hex_view")
+{}
+
+void Mem24::HexView::display()
+{
+  Memory *pmemory = static_cast<Memory *>(_memory);
+  MemoryTypeEditor *e = new MemoryTypeEditor(this, *pmemory, this);
+  e->init(true);
+  e->show();
+  _top->addWidget(e);
+  addEditor(e);
+}
+
+BitValue Mem24::HexView::checksum() const
+{
+  if ( _memory==0 ) return 0x0000;
+  BitValue cs = 0x0000;
+  for (uint i=0; i<static_cast<const Data &>(_memory->device()).nbBytes(); i++)
+    cs += static_cast<const Memory *>(_memory)->byte(i);
+  return cs.maskWith(0xFFFF);
+}
diff --git a/src/devices/mem24/gui/mem24_hex_view.h b/src/devices/mem24/gui/mem24_hex_view.h
new file mode 100644
index 0000000..378a25e
--- /dev/null
+++ b/src/devices/mem24/gui/mem24_hex_view.h
@@ -0,0 +1,33 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef MEM24_HEX_VIEW_H
+#define MEM24_HEX_VIEW_H
+
+class QVBoxLayout;
+
+#include "devices/gui/hex_view.h"
+
+namespace Mem24
+{
+
+class HexView : public Device::HexView
+{
+Q_OBJECT
+public:
+  HexView(const HexEditor &editor, QWidget *parent);
+  virtual uint nbChecksumChars() const { return 4; }
+  virtual BitValue checksum() const;
+
+private:
+  virtual void display();
+};
+
+} // namespace
+
+#endif
diff --git a/src/devices/mem24/gui/mem24_memory_editor.cpp b/src/devices/mem24/gui/mem24_memory_editor.cpp
new file mode 100644
index 0000000..61f98fe
--- /dev/null
+++ b/src/devices/mem24/gui/mem24_memory_editor.cpp
@@ -0,0 +1,80 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "mem24_memory_editor.h"
+
+#include <qlayout.h>
+#include <klocale.h>
+#include <kpushbutton.h>
+
+#include "common/gui/misc_gui.h"
+#include "mem24_hex_view.h"
+#include "progs/base/generic_prog.h"
+#include "libgui/main_global.h"
+#include "devices/base/device_group.h"
+
+//-----------------------------------------------------------------------------
+Mem24::MemoryRangeEditor::MemoryRangeEditor(Memory &memory, QWidget *parent)
+  : Device::MemoryRangeEditor(memory, 16, 16, 0, -1, parent, "mem24_memory_range_editor"),
+    MemoryCaster(memory)
+{}
+
+Device::HexWordEditor *Mem24::MemoryRangeEditor::createHexWordEditor(QWidget *parent)
+{
+  return new HexWordEditor(memory(), parent);
+}
+
+//-----------------------------------------------------------------------------
+Mem24::MemoryTypeEditor::MemoryTypeEditor(const HexView *hexview, Memory &memory, QWidget *parent)
+  : Device::MemoryTypeEditor(hexview, memory, parent, "mem24_memory_type_editor"),
+    MemoryCaster(memory)
+{}
+
+void Mem24::MemoryTypeEditor::init(bool first)
+{
+  Device::MemoryTypeEditor::init(first);
+  _title->setText(i18n("EEPROM Memory"));
+  MemoryRangeEditor *mre = new MemoryRangeEditor(memory(), this);
+  mre->init();
+  addEditor(mre);
+  _top->addWidget(mre);
+}
+
+bool Mem24::MemoryTypeEditor::internalDoAction(Device::Action action)
+{
+  switch (action) {
+    case Device::Clear:
+    case Device::ChecksumCheck:
+      memory().clear(); return true;
+    case Device::Zero:  memory().fill(0);  return true;
+    case Device::Reload:
+      Q_ASSERT(originalMemory());
+      memory().copyFrom(*originalMemory()); return true;
+    case Device::Program:
+      Main::programmer()->program(memory(), Device::MemoryRange());
+      return false;
+    case Device::Verify:
+      Main::programmer()->verify(memory(), Device::MemoryRange());
+      return false;
+    case Device::Read: {
+      Memory mem(device());
+      if ( !Main::programmer()->read(mem, Device::MemoryRange()) ) return false;
+      memory().copyFrom(mem);
+      return true;
+    }
+    case Device::Erase:
+      Main::programmer()->erase(Device::MemoryRange());
+      return false;
+    case Device::BlankCheck:
+      Main::programmer()->blankCheck(Device::MemoryRange());
+      return false;
+    case Device::Nb_Actions: break;
+  }
+  Q_ASSERT(false);
+  return false;
+}
diff --git a/src/devices/mem24/gui/mem24_memory_editor.h b/src/devices/mem24/gui/mem24_memory_editor.h
new file mode 100644
index 0000000..eb99e97
--- /dev/null
+++ b/src/devices/mem24/gui/mem24_memory_editor.h
@@ -0,0 +1,77 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef MEM24_MEMORY_EDITOR_H
+#define MEM24_MEMORY_EDITOR_H
+
+#include "devices/gui/memory_editor.h"
+#include "devices/gui/hex_word_editor.h"
+#include "devices/mem24/mem24/mem24_memory.h"
+
+namespace Mem24
+{
+class HexView;
+
+//-----------------------------------------------------------------------------
+class MemoryCaster
+{
+public:
+  MemoryCaster(Memory &memory) : _memory(memory) {}
+  const Data &device() const { return static_cast<const Data &>(_memory.device()); }
+  const Memory &memory() const { return static_cast<Memory &>(_memory); }
+  Memory &memory() { return static_cast<Memory &>(_memory); }
+
+private:
+  Memory &_memory;
+};
+
+//-----------------------------------------------------------------------------
+class HexWordEditor : public Device::HexWordEditor, public MemoryCaster
+{
+Q_OBJECT
+public:
+  HexWordEditor(Memory &memory, QWidget *parent)
+    : Device::HexWordEditor(memory, 2, parent), MemoryCaster(memory) {}
+
+private:
+  virtual BitValue mask() const { return 0xFF; }
+  virtual BitValue normalizeWord(BitValue value) const { return value; }
+  virtual BitValue word() const { return memory().byte(_offset); }
+  virtual void setWord(BitValue value) { memory().setByte(_offset, value); }
+};
+
+//-----------------------------------------------------------------------------
+class MemoryRangeEditor : public Device::MemoryRangeEditor, public MemoryCaster
+{
+Q_OBJECT
+public:
+  MemoryRangeEditor(Memory &memory, QWidget *parent);
+
+private:
+  virtual uint nbWords() const { return device().nbBytes(); }
+  virtual uint addressIncrement() const { return 1; }
+  virtual Address startAddress() const { return 0x0; }
+  virtual Device::HexWordEditor *createHexWordEditor(QWidget *parent);
+  virtual bool isRangeReadOnly() const { return false; }
+};
+
+//-----------------------------------------------------------------------------
+class MemoryTypeEditor : public Device::MemoryTypeEditor, public MemoryCaster
+{
+Q_OBJECT
+public:
+  MemoryTypeEditor(const HexView *hexview, Memory &memory, QWidget *parent);
+  virtual void init(bool first);
+
+private:
+  virtual bool internalDoAction(Device::Action action);
+};
+
+} // namespace
+
+#endif
diff --git a/src/devices/mem24/mem24.pro b/src/devices/mem24/mem24.pro
new file mode 100644
index 0000000..0602143
--- /dev/null
+++ b/src/devices/mem24/mem24.pro
@@ -0,0 +1,2 @@
+TEMPLATE = subdirs
+SUBDIRS = base xml mem24 xml_data prog
diff --git a/src/devices/mem24/mem24/Makefile.am b/src/devices/mem24/mem24/Makefile.am
new file mode 100644
index 0000000..3c7e9a8
--- /dev/null
+++ b/src/devices/mem24/mem24/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libmem24.la
+libmem24_la_LDFLAGS = $(all_libraries)
+libmem24_la_SOURCES = mem24_memory.cpp mem24_group.cpp
diff --git a/src/devices/mem24/mem24/mem24.pro b/src/devices/mem24/mem24/mem24.pro
new file mode 100644
index 0000000..4bdbea4
--- /dev/null
+++ b/src/devices/mem24/mem24/mem24.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = mem24
+HEADERS += mem24_memory.h mem24_group.h
+SOURCES += mem24_memory.cpp mem24_group.cpp
diff --git a/src/devices/mem24/mem24/mem24_group.cpp b/src/devices/mem24/mem24/mem24_group.cpp
new file mode 100644
index 0000000..53cad5b
--- /dev/null
+++ b/src/devices/mem24/mem24/mem24_group.cpp
@@ -0,0 +1,43 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "mem24_group.h"
+
+#include "mem24_memory.h"
+
+Device::Memory *Mem24::Group::createMemory(const Device::Data &data) const
+{
+  return new Memory(static_cast<const Mem24::Data &>(data));
+}
+
+QString Mem24::Group::informationHtml(const Device::Data &data) const
+{
+  const Mem24::Data &mdata = static_cast<const Mem24::Data &>(data);
+  QString tmp = i18n("%1 bytes").arg(formatNumber(mdata.nbBytes()));
+  return htmlTableRow(i18n("Memory Size"), tmp);
+}
+
+#if !defined(NO_KDE)
+QPixmap Mem24::Group::memoryGraph(const Device::Data &data) const
+{
+  const Mem24::Data &mdata = static_cast<const Mem24::Data &>(data);
+  uint offset = 0x0;
+  QValueList<Device::MemoryGraphData> ranges;
+  for (uint i=0; i<mdata.nbBlocks(); i++) {
+    Device::MemoryGraphData data;
+    data.startAddress = offset;
+    offset += mdata.nbBytes() / mdata.nbBlocks();
+    data.endAddress = offset - 1;
+    data.start = toHexLabel(data.startAddress, mdata.nbCharsAddress());
+    data.end = toHexLabel(data.endAddress, mdata.nbCharsAddress());
+    data.label = i18n("Block #%1").arg(i+1);
+    ranges.append(data);
+  }
+  return Device::memoryGraph(ranges);
+}
+#endif
diff --git a/src/devices/mem24/mem24/mem24_group.h b/src/devices/mem24/mem24/mem24_group.h
new file mode 100644
index 0000000..46a1234
--- /dev/null
+++ b/src/devices/mem24/mem24/mem24_group.h
@@ -0,0 +1,39 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef MEM24_GROUP_H
+#define MEM24_GROUP_H
+
+#include "common/global/global.h"
+#include "devices/base/device_group.h"
+#include "devices/mem24/base/mem24.h"
+
+namespace Mem24
+{
+extern const uint DATA_SIZE;
+extern const char *DATA_STREAM;
+
+class Group : public Device::Group<Data>
+{
+public:
+  virtual QString name() const { return "mem24"; }
+  virtual QString label() const { return i18n("Serial Memory 24"); }
+  virtual Device::Memory *createMemory(const Device::Data &data) const;
+  virtual QString informationHtml(const Device::Data &data) const;
+#if !defined(NO_KDE)
+  virtual QPixmap memoryGraph(const Device::Data &data) const;
+#endif
+
+private:
+  virtual uint dataSize() const { return DATA_SIZE; }
+  virtual const char *dataStream() const { return DATA_STREAM; }
+};
+
+} // namespace
+
+#endif
diff --git a/src/devices/mem24/mem24/mem24_memory.cpp b/src/devices/mem24/mem24/mem24_memory.cpp
new file mode 100644
index 0000000..a4296ea
--- /dev/null
+++ b/src/devices/mem24/mem24/mem24_memory.cpp
@@ -0,0 +1,92 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "mem24_memory.h"
+
+#include <qfile.h>
+
+#include "common/global/global.h"
+#include "common/common/misc.h"
+
+Mem24::Memory::Memory(const Data &data)
+  : Device::Memory(data)
+{
+  fill(BitValue());
+}
+
+void Mem24::Memory::fill(BitValue value)
+{
+  _data = Device::Array(device().nbBytes());
+  for (uint i=0; i<_data.count(); i++) _data[i] = value;
+}
+
+void Mem24::Memory::copyFrom(const Device::Memory &memory)
+{
+  Q_ASSERT( device().name()==memory.device().name() );
+  _data = static_cast<const Memory &>(memory)._data;
+}
+
+Device::Array Mem24::Memory::arrayForWriting() const
+{
+  Device::Array data(_data.count());
+  for (uint i=0; i<data.count(); i++) data[i] = _data[i].maskWith(0xFF);
+  return data;
+}
+
+BitValue Mem24::Memory::byte(uint offset) const
+{
+  Q_ASSERT( _data.size()>offset );
+  return _data[offset];
+}
+
+void Mem24::Memory::setByte(uint offset, BitValue value)
+{
+  Q_ASSERT( _data.size()>offset );
+  Q_ASSERT( value<=0xFF );
+  _data[offset] = value;
+}
+
+BitValue Mem24::Memory::checksum() const
+{
+  BitValue cs = 0x0000;
+  for (uint i=0; i<_data.count(); i++) cs += _data[i];
+  return cs.maskWith(0xFFFF);
+}
+
+//-----------------------------------------------------------------------------
+void Mem24::Memory::savePartial(QTextStream &stream, HexBuffer::Format format) const
+{
+  HexBuffer hb = toHexBuffer();
+  hb.savePartial(stream, format);
+}
+
+//-----------------------------------------------------------------------------
+HexBuffer Mem24::Memory::toHexBuffer() const
+{
+  HexBuffer hb;
+  for (uint k=0; k<device().nbBytes(); k++) hb.insert(k, _data[k]);
+  return hb;
+}
+
+void Mem24::Memory::fromHexBuffer(const HexBuffer &hb, WarningTypes &result,
+                                      QStringList &warnings, QMap<uint, bool> &inRange)
+{
+  BitValue mask = 0xFF;
+  for (uint k=0; k<device().nbBytes(); k++) {
+    _data[k] = hb[k];
+    if ( _data[k].isInitialized() ) {
+      inRange[k] = true;
+      if ( !(result & ValueTooLarge) && !_data[k].isInside(mask) ) {
+        result |= ValueTooLarge;
+        warnings += i18n("At least one word (at offset %1) is larger (%2) than the corresponding mask (%3).")
+                    .arg(toHexLabel(k, 8)).arg(toHexLabel(_data[k], 8)).arg(toHexLabel(mask, 8));
+      }
+      _data[k] = _data[k].maskWith(mask);
+    }
+  }
+}
diff --git a/src/devices/mem24/mem24/mem24_memory.h b/src/devices/mem24/mem24/mem24_memory.h
new file mode 100644
index 0000000..fbd6c64
--- /dev/null
+++ b/src/devices/mem24/mem24/mem24_memory.h
@@ -0,0 +1,45 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef MEM24_MEMORY_H
+#define MEM24_MEMORY_H
+
+#include "common/global/global.h"
+#include "devices/base/generic_memory.h"
+#include "devices/base/hex_buffer.h"
+#include "devices/mem24/base/mem24.h"
+
+namespace Mem24
+{
+
+class Memory : public Device::Memory
+{
+public:
+  Memory(const Data &data);
+  const Data &device() const { return static_cast<const Data &>(_device); }
+  virtual void fill(BitValue value);
+  virtual void checksumCheckFill() { clear(); }
+  Device::Array arrayForWriting() const;
+  BitValue byte(uint offset) const;
+  void setByte(uint offset, BitValue value);
+  virtual BitValue checksum() const;
+
+  virtual HexBuffer toHexBuffer() const;
+  virtual void copyFrom(const Device::Memory &memory);
+
+private:
+  Device::Array _data;
+
+  virtual void savePartial(QTextStream &stream, HexBuffer::Format format) const;
+  virtual void fromHexBuffer(const HexBuffer &hb, WarningTypes &warningTypes,
+                             QStringList &warnings, QMap<uint, bool> &inRange);
+};
+
+} // namespace
+
+#endif
diff --git a/src/devices/mem24/prog/Makefile.am b/src/devices/mem24/prog/Makefile.am
new file mode 100644
index 0000000..1c1a55e
--- /dev/null
+++ b/src/devices/mem24/prog/Makefile.am
@@ -0,0 +1,5 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libmem24prog.la
+libmem24prog_la_SOURCES = mem24_prog.cpp
diff --git a/src/devices/mem24/prog/mem24_prog.cpp b/src/devices/mem24/prog/mem24_prog.cpp
new file mode 100644
index 0000000..4c4b201
--- /dev/null
+++ b/src/devices/mem24/prog/mem24_prog.cpp
@@ -0,0 +1,88 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "mem24_prog.h"
+
+#include "common/global/global.h"
+#include "devices/list/device_list.h"
+#include "progs/base/prog_config.h"
+
+//-----------------------------------------------------------------------------
+bool Programmer::Mem24DeviceSpecific::read(Device::Array &data, const VerifyData *vdata)
+{
+  setPowerOn();
+  doRead(data, vdata);
+  setPowerOff();
+  return !hasError();
+}
+
+bool Programmer::Mem24DeviceSpecific::write(const Device::Array &data)
+{
+  setPowerOn();
+  doWrite(data);
+  setPowerOff();
+  return !hasError();
+}
+
+bool Programmer::Mem24DeviceSpecific::verifyByte(uint index, BitValue d, const VerifyData &vdata)
+{
+  BitValue v = static_cast<const Mem24::Memory &>(vdata.memory).byte(index);
+  v = v.maskWith(0xFF);
+  d = d.maskWith(0xFF);
+  if ( v==d ) return true;
+  Address address = index;
+  if ( vdata.actions & BlankCheckVerify )
+    log(Log::LineType::Error, i18n("Device memory is not blank (at address %1: reading %2 and expecting %3).")
+                    .arg(toHexLabel(address, device().nbCharsAddress())).arg(toHexLabel(d, 2)).arg(toHexLabel(v, 2)));
+  else log(Log::LineType::Error, i18n("Device memory doesn't match hex file (at address %1: reading %2 and expecting %3).")
+                       .arg(toHexLabel(address, device().nbCharsAddress())).arg(toHexLabel(d, 2)).arg(toHexLabel(v, 2)));
+  return false;
+}
+
+//----------------------------------------------------------------------------
+uint Programmer::Mem24Base::nbSteps(Task task, const Device::MemoryRange *) const
+{
+  uint nb = device()->nbBytes();
+  if ( task==Task::Write && readConfigEntry(Config::VerifyAfterProgram).toBool() ) nb += device()->nbBytes();
+  return nb;
+}
+
+bool Programmer::Mem24Base::internalErase(const Device::MemoryRange &)
+{
+  initProgramming();
+  Mem24::Memory memory(*device());
+  return specific()->write(memory.arrayForWriting());
+}
+
+bool Programmer::Mem24Base::internalRead(Device::Memory *memory, const Device::MemoryRange &, const VerifyData *vdata)
+{
+  initProgramming();
+  Device::Array data;
+  if ( !specific()->read(data, vdata) ) return false;
+  if (memory) for (uint i=0; i<data.count(); i++) static_cast<Mem24::Memory *>(memory)->setByte(i, data[i]);
+  return true;
+}
+
+bool Programmer::Mem24Base::internalProgram(const Device::Memory &memory, const Device::MemoryRange &)
+{
+  initProgramming();
+  const Mem24::Memory &pmemory = static_cast<const Mem24::Memory &>(memory);
+  const Device::Array &data = pmemory.arrayForWriting();
+  if ( !specific()->write(data) ) return false;
+  if ( !readConfigEntry(Config::VerifyAfterProgram).toBool() ) return true;
+  VerifyActions actions = IgnoreProtectedVerify;
+  if ( readConfigEntry(Config::OnlyVerifyProgrammed).toBool() ) actions |= OnlyProgrammedVerify;
+  VerifyData vdata(actions, pmemory);
+  Device::Array adata;
+  return specific()->read(adata, &vdata);
+}
+
+bool Programmer::Mem24Base::verifyDeviceId()
+{
+  return specific()->verifyPresence();
+}
diff --git a/src/devices/mem24/prog/mem24_prog.h b/src/devices/mem24/prog/mem24_prog.h
new file mode 100644
index 0000000..86948c2
--- /dev/null
+++ b/src/devices/mem24/prog/mem24_prog.h
@@ -0,0 +1,63 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef MEM24_PROG_H
+#define MEM24_PROG_H
+
+#include "progs/base/generic_prog.h"
+#include "devices/mem24/mem24/mem24_memory.h"
+
+namespace Programmer
+{
+//-----------------------------------------------------------------------------
+class Mem24DeviceSpecific : public DeviceSpecific
+{
+public:
+  Mem24DeviceSpecific(::Programmer::Base &base) : DeviceSpecific(base) {}
+  const Mem24::Data &device() const { return static_cast<const Mem24::Data &>(*_base.device()); }
+  bool read(Device::Array &data, const VerifyData *vdata);
+  bool write(const Device::Array &data);
+  bool verifyByte(uint index, BitValue d, const VerifyData &vdata);
+  virtual bool verifyPresence() = 0;
+
+protected:
+  virtual bool doRead(Device::Array &data, const VerifyData *vdata) = 0;
+  virtual bool doWrite(const Device::Array &data) = 0;
+};
+
+//-----------------------------------------------------------------------------
+class Mem24Hardware : public Hardware
+{
+public:
+  Mem24Hardware(::Programmer::Base &base, Port::Base *port, const QString &name) : Hardware(base, port, name) {}
+  const Mem24::Data &device() const { return static_cast<const Mem24::Data &>(*_base.device()); }
+};
+
+//-----------------------------------------------------------------------------
+class Mem24Base : public Base
+{
+public:
+  Mem24Base(const Group &group, const Mem24::Data *data, const char *name) : Base(group, data, name) {}
+  const Mem24::Data *device() const { return static_cast<const Mem24::Data *>(_device); }
+
+protected:
+  Mem24DeviceSpecific *specific() const { return static_cast<Mem24DeviceSpecific *>(_specific); }
+  virtual bool verifyDeviceId();
+  virtual uint nbSteps(Task task, const Device::MemoryRange *range) const;
+  virtual bool initProgramming() { return true; }
+  virtual bool checkErase() { return true; }
+  virtual bool internalErase(const Device::MemoryRange &range);
+  virtual bool checkRead() { return true; }
+  virtual bool internalRead(Device::Memory *memory, const Device::MemoryRange &range, const VerifyData *vdata);
+  virtual bool checkProgram(const Device::Memory &) { return true; }
+  virtual bool internalProgram(const Device::Memory &memory, const Device::MemoryRange &range);
+};
+
+} // namespace
+
+#endif
diff --git a/src/devices/mem24/prog/prog.pro b/src/devices/mem24/prog/prog.pro
new file mode 100644
index 0000000..2acd347
--- /dev/null
+++ b/src/devices/mem24/prog/prog.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = mem24prog
+HEADERS += mem24_prog.h
+SOURCES += mem24_prog.cpp
diff --git a/src/devices/mem24/xml/Makefile.am b/src/devices/mem24/xml/Makefile.am
new file mode 100644
index 0000000..88a4305
--- /dev/null
+++ b/src/devices/mem24/xml/Makefile.am
@@ -0,0 +1,12 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_PROGRAMS = mem24_xml_to_data
+
+mem24_xml_to_data_SOURCES = mem24_xml_to_data.cpp
+mem24_xml_to_data_DEPENDENCIES = $(top_builddir)/src/devices/mem24/base/libmem24base.la \
+	$(top_builddir)/src/xml_to_data/libxmltodata.la $(top_builddir)/src/devices/base/libdevicebase.la \
+	$(top_builddir)/src/common/common/libcommon.la
+mem24_xml_to_data_LDADD = $(top_builddir)/src/devices/mem24/base/libmem24base.la \
+	$(top_builddir)/src/xml_to_data/libxmltodata.la $(top_builddir)/src/devices/base/libdevicebase.la \
+	$(top_builddir)/src/common/common/libcommon.la $(LIB_KDECORE)
diff --git a/src/devices/mem24/xml/mem24_xml_to_data.cpp b/src/devices/mem24/xml/mem24_xml_to_data.cpp
new file mode 100644
index 0000000..734ebca
--- /dev/null
+++ b/src/devices/mem24/xml/mem24_xml_to_data.cpp
@@ -0,0 +1,60 @@
+/***************************************************************************
+ *   Copyright (C) 2006-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include <qfile.h>
+#include <qtextstream.h>
+
+#include "xml_to_data/device_xml_to_data.h"
+#include "common/common/misc.h"
+#include "devices/mem24/base/mem24.h"
+
+namespace Mem24
+{
+
+class XmlToData : public Device::XmlToData<Data>
+{
+private:
+  virtual uint nbOutputFiles(uint) const { return 1; }
+  virtual bool isIncluded(uint, uint) const { return true; }
+  virtual QString namespaceName() const { return "Mem24"; }
+
+virtual void processDevice(QDomElement device)
+{
+  Device::XmlToDataBase::processDevice(device);
+
+  QDomElement e = findUniqueElement(device, "memory", "name", QString::null);
+  bool ok;
+  data()->_nbBytes = fromHexLabel(e.attribute("size"), &ok);
+  if ( !ok ) qFatal("Missing or invalid size");
+  data()->_nbBlocks = e.attribute("nb_blocks").toUInt(&ok);
+  if ( !ok || data()->_nbBlocks==0 ) qFatal("Missing, zero, or invalid nb_blocks");
+  if ( (data()->_nbBytes % data()->_nbBlocks)!=0 ) qFatal("nb_blocks should divide size");
+  if ( data()->_nbBlocks>8 ) qFatal("nb_blocks is too large (>8)");
+  data()->_nbBytesPage = e.attribute("page_size").toUInt(&ok);
+  if ( !ok || data()->_nbBytesPage==0 ) qFatal("Missing, zero, or invalid page_size");
+  if ( ((data()->_nbBytes/data()->_nbBlocks) % data()->_nbBytesPage)!=0 ) qFatal("page_size should divide size/nb_blocks");
+  QStringList names;
+  names.append(QString::null);
+  checkTagNames(device, "memory", names);
+}
+
+virtual void checkPins(const QMap<QString, uint> &pinLabels) const
+{
+  if ( !pinLabels.contains("VCC") ) qFatal("No VDD pin specified");
+  if ( !pinLabels.contains("VSS") ) qFatal("No VSS pin specified");
+  QMap<QString, uint>::const_iterator it;
+  for (it=pinLabels.begin(); it!=pinLabels.end(); ++it)
+    if ( it.data()!=1 ) qFatal(QString("Duplicated pin %1").arg(it.key()));
+}
+
+}; // class
+
+} // namespace
+
+//-----------------------------------------------------------------------------
+XML_MAIN(Mem24::XmlToData)
diff --git a/src/devices/mem24/xml/xml.pro b/src/devices/mem24/xml/xml.pro
new file mode 100644
index 0000000..9730b29
--- /dev/null
+++ b/src/devices/mem24/xml/xml.pro
@@ -0,0 +1,13 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/app.pro)
+
+TARGET   = mem24_xml_to_data
+SOURCES += mem24_xml_to_data.cpp
+LIBS    += ../../../devices/mem24/base/libmem24base.a ../../../xml_to_data/libxmltodata.a \
+           ../../../devices/base/libdevicebase.a ../../../common/global/libglobal.a \
+           ../../../common/nokde/libnokde.a ../../../common/common/libcommon.a
+
+unix:QMAKE_POST_LINK = cd ../xml_data && ../xml/mem24_xml_to_data
+unix:QMAKE_CLEAN += ../xml_data/mem24_data.cpp
+win32:QMAKE_POST_LINK = cd ..\xml_data && ..\xml\mem24_xml_to_data.exe
+win32:QMAKE_CLEAN += ..\xml_data\mem24_data.cpp
diff --git a/src/devices/mem24/xml_data/24AA00.xml b/src/devices/mem24/xml_data/24AA00.xml
new file mode 100644
index 0000000..6b9e114
--- /dev/null
+++ b/src/devices/mem24/xml_data/24AA00.xml
@@ -0,0 +1,41 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24AA00" document="010770" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="0.1" vdd_min="1.8" vdd_max="5.5" />
+    <frequency start="0.1" end="0.4" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x10" nb_blocks="1" page_size="1" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop dfns" nb_pins="8" >
+    <pin index="1" name="N/C" />
+    <pin index="2" name="N/C" />
+    <pin index="3" name="N/C" />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="N/C" />
+    <pin index="8" name="VCC" />
+  </package>
+
+  <package types="sot23"                nb_pins="5" >
+    <pin index="1" name="SCL" />
+    <pin index="2" name="VSS" />
+    <pin index="3" name="SDA" />
+    <pin index="4" name="N/C" />
+    <pin index="5" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24AA01.xml b/src/devices/mem24/xml_data/24AA01.xml
new file mode 100644
index 0000000..f3aa59d
--- /dev/null
+++ b/src/devices/mem24/xml_data/24AA01.xml
@@ -0,0 +1,41 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24AA01" document="010771" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="0.1" vdd_min="1.8" vdd_max="5.5" />
+    <frequency start="0.1" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x80" nb_blocks="1" page_size="8" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop msop dfns" nb_pins="8" >
+    <pin index="1" name="N/C" />
+    <pin index="2" name="N/C" />
+    <pin index="3" name="N/C" />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+  <package types="sot23"                     nb_pins="5" >
+    <pin index="1" name="SCL" />
+    <pin index="2" name="VSS" />
+    <pin index="3" name="SDA" />
+    <pin index="4" name="VCC" />
+    <pin index="5" name="WP"  />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24AA014.xml b/src/devices/mem24/xml_data/24AA014.xml
new file mode 100644
index 0000000..91b93ca
--- /dev/null
+++ b/src/devices/mem24/xml_data/24AA014.xml
@@ -0,0 +1,33 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24AA014" document="010772" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="0.1" vdd_min="1.8" vdd_max="5.5" />
+    <frequency start="0.1" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x80" nb_blocks="1" page_size="16" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop msop dfns" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24AA02.xml b/src/devices/mem24/xml_data/24AA02.xml
new file mode 100644
index 0000000..a4c3174
--- /dev/null
+++ b/src/devices/mem24/xml_data/24AA02.xml
@@ -0,0 +1,41 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24AA02" document="010774" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="0.1" vdd_min="1.8" vdd_max="5.5" />
+    <frequency start="0.1" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x100" nb_blocks="1" page_size="8" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop msop dfns" nb_pins="8" >
+    <pin index="1" name="N/C" />
+    <pin index="2" name="N/C" />
+    <pin index="3" name="N/C" />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+  <package types="sot23"                     nb_pins="5" >
+    <pin index="1" name="SCL" />
+    <pin index="2" name="VSS" />
+    <pin index="3" name="SDA" />
+    <pin index="4" name="VCC" />
+    <pin index="5" name="WP"  />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24AA024.xml b/src/devices/mem24/xml_data/24AA024.xml
new file mode 100644
index 0000000..7d2bfe5
--- /dev/null
+++ b/src/devices/mem24/xml_data/24AA024.xml
@@ -0,0 +1,33 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24AA024" document="010775" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="0.1" vdd_min="1.8" vdd_max="5.5" />
+    <frequency start="0.1" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x100" nb_blocks="1" page_size="16" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop msop dfns" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24AA025.xml b/src/devices/mem24/xml_data/24AA025.xml
new file mode 100644
index 0000000..174c163
--- /dev/null
+++ b/src/devices/mem24/xml_data/24AA025.xml
@@ -0,0 +1,33 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24AA025" document="020310" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="0.1" vdd_min="1.8" vdd_max="5.5" />
+    <frequency start="0.1" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x100" nb_blocks="1" page_size="16" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop msop dfns" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="N/C" />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24AA04.xml b/src/devices/mem24/xml_data/24AA04.xml
new file mode 100644
index 0000000..18ca2ac
--- /dev/null
+++ b/src/devices/mem24/xml_data/24AA04.xml
@@ -0,0 +1,41 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24AA04" document="010777" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="0.1" vdd_min="1.8" vdd_max="5.5" />
+    <frequency start="0.1" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x200" nb_blocks="2" page_size="16" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop msop dfns" nb_pins="8" >
+    <pin index="1" name="N/C" />
+    <pin index="2" name="N/C" />
+    <pin index="3" name="N/C" />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+  <package types="sot23"                     nb_pins="5" >
+    <pin index="1" name="SCL" />
+    <pin index="2" name="VSS" />
+    <pin index="3" name="SDA" />
+    <pin index="4" name="VCC" />
+    <pin index="5" name="WP"  />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24AA08.xml b/src/devices/mem24/xml_data/24AA08.xml
new file mode 100644
index 0000000..84852f2
--- /dev/null
+++ b/src/devices/mem24/xml_data/24AA08.xml
@@ -0,0 +1,41 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24AA08" document="010779" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="0.1" vdd_min="1.8" vdd_max="5.5" />
+    <frequency start="0.1" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x400" nb_blocks="4" page_size="16" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop msop dfns" nb_pins="8" >
+    <pin index="1" name="N/C" />
+    <pin index="2" name="N/C" />
+    <pin index="3" name="N/C" />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+  <package types="sot23"                     nb_pins="5" >
+    <pin index="1" name="SCL" />
+    <pin index="2" name="VSS" />
+    <pin index="3" name="SDA" />
+    <pin index="4" name="VCC" />
+    <pin index="5" name="WP"  />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24AA1025.xml b/src/devices/mem24/xml_data/24AA1025.xml
new file mode 100644
index 0000000..54940f3
--- /dev/null
+++ b/src/devices/mem24/xml_data/24AA1025.xml
@@ -0,0 +1,33 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24AA1025" document="024638" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="0.1" vdd_min="1.8" vdd_max="5.5" />
+    <frequency start="0.1" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x20000" nb_blocks="2" page_size="128" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="N/C" />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24AA128.xml b/src/devices/mem24/xml_data/24AA128.xml
new file mode 100644
index 0000000..bf113e8
--- /dev/null
+++ b/src/devices/mem24/xml_data/24AA128.xml
@@ -0,0 +1,44 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24AA128" document="010781" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="0.1" vdd_min="1.8" vdd_max="5.5" />
+    <frequency start="0.1" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x4000" nb_blocks="1" page_size="64" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop dfns" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+  <package types="msop"                 nb_pins="8" >
+    <pin index="1" name="N/C" />
+    <pin index="2" name="N/C" />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24AA16.xml b/src/devices/mem24/xml_data/24AA16.xml
new file mode 100644
index 0000000..fb471b5
--- /dev/null
+++ b/src/devices/mem24/xml_data/24AA16.xml
@@ -0,0 +1,41 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24AA16" document="010783" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="0.1" vdd_min="1.8" vdd_max="5.5" />
+    <frequency start="0.1" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x800" nb_blocks="8" page_size="16" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop msop dfns" nb_pins="8" >
+    <pin index="1" name="N/C" />
+    <pin index="2" name="N/C" />
+    <pin index="3" name="N/C" />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+  <package types="sot23"                     nb_pins="5" >
+    <pin index="1" name="SCL" />
+    <pin index="2" name="VSS" />
+    <pin index="3" name="SDA" />
+    <pin index="4" name="VCC" />
+    <pin index="5" name="WP"  />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24AA164.xml b/src/devices/mem24/xml_data/24AA164.xml
new file mode 100644
index 0000000..76ac031
--- /dev/null
+++ b/src/devices/mem24/xml_data/24AA164.xml
@@ -0,0 +1,33 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24AA164" document="010349" status="EOL" alternatives="24AA16" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0"   end="0.1" vdd_min="1.8" vdd_max="6"   />
+    <frequency start="0.1" end="0.4" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x800" nb_blocks="8" page_size="16" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24AA256.xml b/src/devices/mem24/xml_data/24AA256.xml
new file mode 100644
index 0000000..899389d
--- /dev/null
+++ b/src/devices/mem24/xml_data/24AA256.xml
@@ -0,0 +1,44 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24AA256" document="010785" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="0.1" vdd_min="1.8" vdd_max="5.5" />
+    <frequency start="0.1" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x8000" nb_blocks="1" page_size="64" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop dfns" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+  <package types="msop"                 nb_pins="8" >
+    <pin index="1" name="N/C" />
+    <pin index="2" name="N/C" />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24AA32A.xml b/src/devices/mem24/xml_data/24AA32A.xml
new file mode 100644
index 0000000..bc8d0f4
--- /dev/null
+++ b/src/devices/mem24/xml_data/24AA32A.xml
@@ -0,0 +1,33 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24AA32A" document="010787" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="0.1" vdd_min="1.8" vdd_max="5.5" />
+    <frequency start="0.1" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x1000" nb_blocks="1" page_size="32" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop msop dfns" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24AA512.xml b/src/devices/mem24/xml_data/24AA512.xml
new file mode 100644
index 0000000..baa575e
--- /dev/null
+++ b/src/devices/mem24/xml_data/24AA512.xml
@@ -0,0 +1,50 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24AA512" document="010789" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="0.1" vdd_min="1.8" vdd_max="5.5" />
+    <frequency start="0.1" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x10000" nb_blocks="1" page_size="128" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic dfns" nb_pins="8"  >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+  <package types="tssop"          nb_pins="14" >
+    <pin index="1"  name="A0"  />
+    <pin index="2"  name="A1"  />
+    <pin index="3"  name="N/C" />
+    <pin index="4"  name="N/C" />
+    <pin index="5"  name="N/C" />
+    <pin index="6"  name="A2"  />
+    <pin index="7"  name="VSS" />
+    <pin index="8"  name="SDA" />
+    <pin index="9"  name="SCL" />
+    <pin index="10" name="N/C" />
+    <pin index="11" name="N/C" />
+    <pin index="12" name="N/C" />
+    <pin index="13" name="WP"  />
+    <pin index="14" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24AA515.xml b/src/devices/mem24/xml_data/24AA515.xml
new file mode 100644
index 0000000..b80a53a
--- /dev/null
+++ b/src/devices/mem24/xml_data/24AA515.xml
@@ -0,0 +1,33 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24AA515" document="010791" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="0.1" vdd_min="1.8" vdd_max="5.5" />
+    <frequency start="0.1" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x10000" nb_blocks="1" page_size="64" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24AA64.xml b/src/devices/mem24/xml_data/24AA64.xml
new file mode 100644
index 0000000..0d52b6b
--- /dev/null
+++ b/src/devices/mem24/xml_data/24AA64.xml
@@ -0,0 +1,33 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24AA64" document="010793" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="0.1" vdd_min="1.8" vdd_max="5.5" />
+    <frequency start="0.1" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x2000" nb_blocks="1" page_size="32" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop msop dfns" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24AA65.xml b/src/devices/mem24/xml_data/24AA65.xml
new file mode 100644
index 0000000..b35b50b
--- /dev/null
+++ b/src/devices/mem24/xml_data/24AA65.xml
@@ -0,0 +1,33 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24AA65" document="010795" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0"   end="0.1" vdd_min="1.8" vdd_max="6" />
+    <frequency start="0.1" end="0.4" vdd_min="4.5" vdd_max="6" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x2000" nb_blocks="1" page_size="64" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="N/C" />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24C00.xml b/src/devices/mem24/xml_data/24C00.xml
new file mode 100644
index 0000000..13bc0f7
--- /dev/null
+++ b/src/devices/mem24/xml_data/24C00.xml
@@ -0,0 +1,43 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24C00" document="010796" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="0.4" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="0.1" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x10" nb_blocks="1" page_size="1" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop dfns" nb_pins="8" >
+    <pin index="1" name="N/C" />
+    <pin index="2" name="N/C" />
+    <pin index="3" name="N/C" />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="N/C" />
+    <pin index="8" name="VCC" />
+  </package>
+
+  <package types="sot23"                nb_pins="5" >
+    <pin index="1" name="SCL" />
+    <pin index="2" name="VSS" />
+    <pin index="3" name="SDA" />
+    <pin index="4" name="N/C" />
+    <pin index="5" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24C01C.xml b/src/devices/mem24/xml_data/24C01C.xml
new file mode 100644
index 0000000..3526522
--- /dev/null
+++ b/src/devices/mem24/xml_data/24C01C.xml
@@ -0,0 +1,35 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24C01C" document="010797" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="0.4" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="0.1" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x80" nb_blocks="1" page_size="16" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop msop dfns" nb_pins="8" >
+    <pin index="1" name="A0"   />
+    <pin index="2" name="A1"   />
+    <pin index="3" name="A2"   />
+    <pin index="4" name="VSS"  />
+    <pin index="5" name="SDA"  />
+    <pin index="6" name="SCL"  />
+    <pin index="7" name="TEST" />
+    <pin index="8" name="VCC"  />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24C02C.xml b/src/devices/mem24/xml_data/24C02C.xml
new file mode 100644
index 0000000..f4ce091
--- /dev/null
+++ b/src/devices/mem24/xml_data/24C02C.xml
@@ -0,0 +1,35 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24C02C" document="010798" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="0.4" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="0.1" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x100" nb_blocks="1" page_size="16" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop msop dfns" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24C65.xml b/src/devices/mem24/xml_data/24C65.xml
new file mode 100644
index 0000000..6f9be98
--- /dev/null
+++ b/src/devices/mem24/xml_data/24C65.xml
@@ -0,0 +1,32 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24C65" document="010799" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0" end="0.4" vdd_min="4.5" vdd_max="6" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x2000" nb_blocks="1" page_size="64" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="N/C" />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24FC1025.xml b/src/devices/mem24/xml_data/24FC1025.xml
new file mode 100644
index 0000000..c783952
--- /dev/null
+++ b/src/devices/mem24/xml_data/24FC1025.xml
@@ -0,0 +1,32 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24FC1025" document="024639" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="1" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x20000" nb_blocks="2" page_size="128" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="N/C" />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24FC128.xml b/src/devices/mem24/xml_data/24FC128.xml
new file mode 100644
index 0000000..88b0c8e
--- /dev/null
+++ b/src/devices/mem24/xml_data/24FC128.xml
@@ -0,0 +1,44 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24FC128" document="010800" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="0.4" vdd_min="1.8" vdd_max="5.5" />
+    <frequency start="0.4" end="1"   vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x4000" nb_blocks="1" page_size="64" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop dfns" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+  <package types="msop"                 nb_pins="8" >
+    <pin index="1" name="N/C" />
+    <pin index="2" name="N/C" />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24FC256.xml b/src/devices/mem24/xml_data/24FC256.xml
new file mode 100644
index 0000000..08595ed
--- /dev/null
+++ b/src/devices/mem24/xml_data/24FC256.xml
@@ -0,0 +1,44 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24FC256" document="010801" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="0.4" vdd_min="1.8" vdd_max="5.5" />
+    <frequency start="0.4" end="1"   vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x8000" nb_blocks="1" page_size="64" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop dfns" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+  <package types="msop"                 nb_pins="8" >
+    <pin index="1" name="N/C" />
+    <pin index="2" name="N/C" />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24FC512.xml b/src/devices/mem24/xml_data/24FC512.xml
new file mode 100644
index 0000000..0811a8d
--- /dev/null
+++ b/src/devices/mem24/xml_data/24FC512.xml
@@ -0,0 +1,49 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24FC512" document="010802" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="1" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x10000" nb_blocks="1" page_size="128" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic dfns" nb_pins="8"  >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+  <package types="tssop"          nb_pins="14" >
+    <pin index="1"  name="A0"  />
+    <pin index="2"  name="A1"  />
+    <pin index="3"  name="N/C" />
+    <pin index="4"  name="N/C" />
+    <pin index="5"  name="N/C" />
+    <pin index="6"  name="A2"  />
+    <pin index="7"  name="VSS" />
+    <pin index="8"  name="SDA" />
+    <pin index="9"  name="SCL" />
+    <pin index="10" name="N/C" />
+    <pin index="11" name="N/C" />
+    <pin index="12" name="N/C" />
+    <pin index="13" name="WP"  />
+    <pin index="14" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24FC515.xml b/src/devices/mem24/xml_data/24FC515.xml
new file mode 100644
index 0000000..9469c8c
--- /dev/null
+++ b/src/devices/mem24/xml_data/24FC515.xml
@@ -0,0 +1,32 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24FC515" document="010803" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="1" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x10000" nb_blocks="1" page_size="64" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24LC00.xml b/src/devices/mem24/xml_data/24LC00.xml
new file mode 100644
index 0000000..b6b588e
--- /dev/null
+++ b/src/devices/mem24/xml_data/24LC00.xml
@@ -0,0 +1,41 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24LC00" document="010804" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="0.1" vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="0.1" end="0.4" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x10" nb_blocks="1" page_size="1" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop dfns" nb_pins="8" >
+    <pin index="1" name="N/C" />
+    <pin index="2" name="N/C" />
+    <pin index="3" name="N/C" />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="N/C" />
+    <pin index="8" name="VCC" />
+  </package>
+
+  <package types="sot23"                nb_pins="5" >
+    <pin index="1" name="SCL" />
+    <pin index="2" name="VSS" />
+    <pin index="3" name="SDA" />
+    <pin index="4" name="N/C" />
+    <pin index="5" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24LC014.xml b/src/devices/mem24/xml_data/24LC014.xml
new file mode 100644
index 0000000..f3dd3e7
--- /dev/null
+++ b/src/devices/mem24/xml_data/24LC014.xml
@@ -0,0 +1,32 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24LC014" document="010805" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x80" nb_blocks="1" page_size="16" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop msop dfns" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24LC01B.xml b/src/devices/mem24/xml_data/24LC01B.xml
new file mode 100644
index 0000000..f96bc6d
--- /dev/null
+++ b/src/devices/mem24/xml_data/24LC01B.xml
@@ -0,0 +1,40 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24LC01B" document="010806" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x80" nb_blocks="1" page_size="8" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop msop dfns" nb_pins="8" >
+    <pin index="1" name="N/C" />
+    <pin index="2" name="N/C" />
+    <pin index="3" name="N/C" />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+  <package types="sot23"                     nb_pins="5" >
+    <pin index="1" name="SCL" />
+    <pin index="2" name="VSS" />
+    <pin index="3" name="SDA" />
+    <pin index="4" name="VCC" />
+    <pin index="5" name="WP"  />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24LC024.xml b/src/devices/mem24/xml_data/24LC024.xml
new file mode 100644
index 0000000..7fa84bf
--- /dev/null
+++ b/src/devices/mem24/xml_data/24LC024.xml
@@ -0,0 +1,32 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24LC024" document="010808" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x100" nb_blocks="1" page_size="16" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop msop dfns" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24LC025.xml b/src/devices/mem24/xml_data/24LC025.xml
new file mode 100644
index 0000000..8f5df38
--- /dev/null
+++ b/src/devices/mem24/xml_data/24LC025.xml
@@ -0,0 +1,32 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24LC025" document="010809" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x100" nb_blocks="1" page_size="16" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop msop dfns" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="N/C" />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24LC02B.xml b/src/devices/mem24/xml_data/24LC02B.xml
new file mode 100644
index 0000000..3e34cde
--- /dev/null
+++ b/src/devices/mem24/xml_data/24LC02B.xml
@@ -0,0 +1,40 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24LC02B" document="010810" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x100" nb_blocks="1" page_size="8" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop msop dfns" nb_pins="8" >
+    <pin index="1" name="N/C" />
+    <pin index="2" name="N/C" />
+    <pin index="3" name="N/C" />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+  <package types="sot23"                     nb_pins="5" >
+    <pin index="1" name="SCL" />
+    <pin index="2" name="VSS" />
+    <pin index="3" name="SDA" />
+    <pin index="4" name="VCC" />
+    <pin index="5" name="WP"  />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24LC04B.xml b/src/devices/mem24/xml_data/24LC04B.xml
new file mode 100644
index 0000000..0f83be9
--- /dev/null
+++ b/src/devices/mem24/xml_data/24LC04B.xml
@@ -0,0 +1,40 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24LC04B" document="010812" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x200" nb_blocks="2" page_size="16" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop msop dfns" nb_pins="8" >
+    <pin index="1" name="N/C" />
+    <pin index="2" name="N/C" />
+    <pin index="3" name="N/C" />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+  <package types="sot23"                     nb_pins="5" >
+    <pin index="1" name="SCL" />
+    <pin index="2" name="VSS" />
+    <pin index="3" name="SDA" />
+    <pin index="4" name="VCC" />
+    <pin index="5" name="WP"  />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24LC08B.xml b/src/devices/mem24/xml_data/24LC08B.xml
new file mode 100644
index 0000000..a617e0c
--- /dev/null
+++ b/src/devices/mem24/xml_data/24LC08B.xml
@@ -0,0 +1,40 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24LC08B" document="010814" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x400" nb_blocks="4" page_size="16" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop msop dfns" nb_pins="8" >
+    <pin index="1" name="N/C" />
+    <pin index="2" name="N/C" />
+    <pin index="3" name="N/C" />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+  <package types="sot23"                     nb_pins="5" >
+    <pin index="1" name="SCL" />
+    <pin index="2" name="VSS" />
+    <pin index="3" name="SDA" />
+    <pin index="4" name="VCC" />
+    <pin index="5" name="WP"  />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24LC1025.xml b/src/devices/mem24/xml_data/24LC1025.xml
new file mode 100644
index 0000000..79ba144
--- /dev/null
+++ b/src/devices/mem24/xml_data/24LC1025.xml
@@ -0,0 +1,32 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24LC1025" document="024636" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x20000" nb_blocks="2" page_size="128" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="N/C" />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24LC128.xml b/src/devices/mem24/xml_data/24LC128.xml
new file mode 100644
index 0000000..b850eac
--- /dev/null
+++ b/src/devices/mem24/xml_data/24LC128.xml
@@ -0,0 +1,43 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24LC128" document="010817" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x4000" nb_blocks="1" page_size="64" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop dfns" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+  <package types="msop"                 nb_pins="8" >
+    <pin index="1" name="N/C" />
+    <pin index="2" name="N/C" />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24LC16B.xml b/src/devices/mem24/xml_data/24LC16B.xml
new file mode 100644
index 0000000..f07bd5e
--- /dev/null
+++ b/src/devices/mem24/xml_data/24LC16B.xml
@@ -0,0 +1,40 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24LC16B" document="010819" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x800" nb_blocks="8" page_size="16" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop msop dfns" nb_pins="8" >
+    <pin index="1" name="N/C" />
+    <pin index="2" name="N/C" />
+    <pin index="3" name="N/C" />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+  <package types="sot23"                     nb_pins="5" >
+    <pin index="1" name="SCL" />
+    <pin index="2" name="VSS" />
+    <pin index="3" name="SDA" />
+    <pin index="4" name="VCC" />
+    <pin index="5" name="WP"  />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24LC21A.xml b/src/devices/mem24/xml_data/24LC21A.xml
new file mode 100644
index 0000000..010b3a2
--- /dev/null
+++ b/src/devices/mem24/xml_data/24LC21A.xml
@@ -0,0 +1,33 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24LC21A" document="010821" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="0.1" vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="0.1" end="0.4" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x80" nb_blocks="1" page_size="8" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="8" >
+    <pin index="1" name="N/C"  />
+    <pin index="2" name="N/C"  />
+    <pin index="3" name="N/C"  />
+    <pin index="4" name="VSS"  />
+    <pin index="5" name="SDA"  />
+    <pin index="6" name="SCL"  />
+    <pin index="7" name="VCLK" />
+    <pin index="8" name="VCC"  />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24LC22A.xml b/src/devices/mem24/xml_data/24LC22A.xml
new file mode 100644
index 0000000..237b47e
--- /dev/null
+++ b/src/devices/mem24/xml_data/24LC22A.xml
@@ -0,0 +1,33 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24LC22A" document="010822" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="0.1" vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="0.1" end="0.4" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x100" nb_blocks="1" page_size="8" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="8" >
+    <pin index="1" name="N/C"  />
+    <pin index="2" name="N/C"  />
+    <pin index="3" name="N/C"  />
+    <pin index="4" name="VSS"  />
+    <pin index="5" name="SDA"  />
+    <pin index="6" name="SCL"  />
+    <pin index="7" name="VCLK" />
+    <pin index="8" name="VCC"  />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24LC256.xml b/src/devices/mem24/xml_data/24LC256.xml
new file mode 100644
index 0000000..5a49ee9
--- /dev/null
+++ b/src/devices/mem24/xml_data/24LC256.xml
@@ -0,0 +1,43 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24LC256" document="010823" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x8000" nb_blocks="1" page_size="64" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop dfns" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+  <package types="msop"                 nb_pins="8" >
+    <pin index="1" name="N/C" />
+    <pin index="2" name="N/C" />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24LC32A.xml b/src/devices/mem24/xml_data/24LC32A.xml
new file mode 100644
index 0000000..abd17f2
--- /dev/null
+++ b/src/devices/mem24/xml_data/24LC32A.xml
@@ -0,0 +1,32 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24LC32A" document="010825" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x1000" nb_blocks="1" page_size="32" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop msop dfns" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24LC512.xml b/src/devices/mem24/xml_data/24LC512.xml
new file mode 100644
index 0000000..f643c99
--- /dev/null
+++ b/src/devices/mem24/xml_data/24LC512.xml
@@ -0,0 +1,49 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24LC512" document="010828" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x10000" nb_blocks="1" page_size="128" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic dfns" nb_pins="8"  >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+  <package types="tssop"          nb_pins="14" >
+    <pin index="1"  name="A0"  />
+    <pin index="2"  name="A1"  />
+    <pin index="3"  name="N/C" />
+    <pin index="4"  name="N/C" />
+    <pin index="5"  name="N/C" />
+    <pin index="6"  name="A2"  />
+    <pin index="7"  name="VSS" />
+    <pin index="8"  name="SDA" />
+    <pin index="9"  name="SCL" />
+    <pin index="10" name="N/C" />
+    <pin index="11" name="N/C" />
+    <pin index="12" name="N/C" />
+    <pin index="13" name="WP"  />
+    <pin index="14" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24LC515.xml b/src/devices/mem24/xml_data/24LC515.xml
new file mode 100644
index 0000000..55482b3
--- /dev/null
+++ b/src/devices/mem24/xml_data/24LC515.xml
@@ -0,0 +1,32 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24LC515" document="010830" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x10000" nb_blocks="1" page_size="64" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24LC64.xml b/src/devices/mem24/xml_data/24LC64.xml
new file mode 100644
index 0000000..d35cf1a
--- /dev/null
+++ b/src/devices/mem24/xml_data/24LC64.xml
@@ -0,0 +1,32 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24LC64" document="010831" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0" end="0.4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x2000" nb_blocks="1" page_size="32" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop msop dfns" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="WP"  />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24LC65.xml b/src/devices/mem24/xml_data/24LC65.xml
new file mode 100644
index 0000000..3fb3fbb
--- /dev/null
+++ b/src/devices/mem24/xml_data/24LC65.xml
@@ -0,0 +1,33 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24LC65" document="010833" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="0.1" vdd_min="2.5" vdd_max="6"   />
+    <frequency start="0.1" end="0.4" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x2000" nb_blocks="1" page_size="64" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="8" >
+    <pin index="1" name="A0"  />
+    <pin index="2" name="A1"  />
+    <pin index="3" name="A2"  />
+    <pin index="4" name="VSS" />
+    <pin index="5" name="SDA" />
+    <pin index="6" name="SCL" />
+    <pin index="7" name="N/C" />
+    <pin index="8" name="VCC" />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/24LCS21A.xml b/src/devices/mem24/xml_data/24LCS21A.xml
new file mode 100644
index 0000000..0cb4846
--- /dev/null
+++ b/src/devices/mem24/xml_data/24LCS21A.xml
@@ -0,0 +1,33 @@
+<!DOCTYPE piklab_device>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24LCS21A" document="010834" status="IP" memory_technology="FLASH" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="0.1" vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="0.1" end="0.4" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+<!--* Memory ***************************************************************-->
+  <memory size="0x80" nb_blocks="1" page_size="8" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="8" >
+    <pin index="1" name="N/C"  />
+    <pin index="2" name="N/C"  />
+    <pin index="3" name="WP"   />
+    <pin index="4" name="VSS"  />
+    <pin index="5" name="SDA"  />
+    <pin index="6" name="SCL"  />
+    <pin index="7" name="VCLK" />
+    <pin index="8" name="VCC"  />
+  </package>
+
+</device>
diff --git a/src/devices/mem24/xml_data/Makefile.am b/src/devices/mem24/xml_data/Makefile.am
new file mode 100644
index 0000000..42cacaa
--- /dev/null
+++ b/src/devices/mem24/xml_data/Makefile.am
@@ -0,0 +1,12 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libmem24xml.la
+libmem24xml_la_LDFLAGS = $(all_libraries)
+libmem24xml_la_SOURCES = mem24_data.cpp
+libmem24xml_la_DEPENDENCIES = mem24_data.cpp
+
+include deps.mak
+mem24_data.cpp: ../xml/mem24_xml_to_data $(noinst_DATA)
+	../xml/mem24_xml_to_data
+CLEANFILES = mem24_data.cpp
diff --git a/src/devices/mem24/xml_data/deps.mak b/src/devices/mem24/xml_data/deps.mak
new file mode 100644
index 0000000..5c1f243
--- /dev/null
+++ b/src/devices/mem24/xml_data/deps.mak
@@ -0,0 +1,6 @@
+noinst_DATA = \
+     24AA00.xml 24AA01.xml 24AA014.xml 24AA02.xml 24AA024.xml 24AA025.xml 24AA04.xml 24AA08.xml 24AA1025.xml 24AA128.xml\
+     24AA16.xml 24AA164.xml 24AA256.xml 24AA32A.xml 24AA512.xml 24AA515.xml 24AA64.xml 24AA65.xml 24C00.xml 24C01C.xml\
+     24C02C.xml 24C65.xml 24FC1025.xml 24FC128.xml 24FC256.xml 24FC512.xml 24FC515.xml 24LC00.xml 24LC014.xml 24LC01B.xml\
+     24LC024.xml 24LC025.xml 24LC02B.xml 24LC04B.xml 24LC08B.xml 24LC1025.xml 24LC128.xml 24LC16B.xml 24LC21A.xml 24LC22A.xml\
+     24LC256.xml 24LC32A.xml 24LC512.xml 24LC515.xml 24LC64.xml 24LC65.xml 24LCS21A.xml
diff --git a/src/devices/mem24/xml_data/xml_data.pro b/src/devices/mem24/xml_data/xml_data.pro
new file mode 100644
index 0000000..4842ae2
--- /dev/null
+++ b/src/devices/mem24/xml_data/xml_data.pro
@@ -0,0 +1,5 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = mem24xml
+SOURCES += mem24_data.cpp
diff --git a/src/devices/pic/Makefile.am b/src/devices/pic/Makefile.am
new file mode 100644
index 0000000..13e5611
--- /dev/null
+++ b/src/devices/pic/Makefile.am
@@ -0,0 +1,3 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+SUBDIRS = base xml xml_data pic prog gui
diff --git a/src/devices/pic/base/Makefile.am b/src/devices/pic/base/Makefile.am
new file mode 100644
index 0000000..ebade1c
--- /dev/null
+++ b/src/devices/pic/base/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libpicbase.la
+libpicbase_la_SOURCES = pic.cpp pic_config.cpp pic_protection.cpp \
+	pic_register.cpp
diff --git a/src/devices/pic/base/base.pro b/src/devices/pic/base/base.pro
new file mode 100644
index 0000000..621d6d3
--- /dev/null
+++ b/src/devices/pic/base/base.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = picbase
+HEADERS += pic_protection.h pic_config.h pic_register.h pic.h
+SOURCES += pic_protection.cpp pic_config.cpp pic_register.cpp pic.cpp
diff --git a/src/devices/pic/base/pic.cpp b/src/devices/pic/base/pic.cpp
new file mode 100644
index 0000000..8f81540
--- /dev/null
+++ b/src/devices/pic/base/pic.cpp
@@ -0,0 +1,426 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pic.h"
+
+#include "common/global/global.h"
+#include "common/common/misc.h"
+#include "common/global/purl.h"
+#include "pic_register.h"
+#include "pic_config.h"
+
+//------------------------------------------------------------------------------
+const Pic::ProgVoltageType::Data Pic::ProgVoltageType::DATA[Nb_Types] = {
+  { "vpp",            0 },
+  { "vdd_prog",       0 },
+  { "vdd_prog_write", 0 }
+};
+
+const Pic::MemoryRangeType::Data Pic::MemoryRangeType::DATA[Nb_Types] = {
+  { "code",               I18N_NOOP("Code memory"),         Writable },
+  { "calibration",        I18N_NOOP("Calibration"),         Writable },
+  { "user_ids",           I18N_NOOP("User IDs"),            Writable },
+  { "device_id",          I18N_NOOP("Device ID"),           ReadOnly },
+  { "config",             I18N_NOOP("Configuration Bits"),  Writable },
+  { "eeprom",             I18N_NOOP("Data EEPROM"),         Writable },
+  { "debug_vector",       I18N_NOOP("Debug Vector"),        Writable },
+  { "hardware_stack",     I18N_NOOP("Hardware Stack"),      ReadOnly },
+  { "calibration_backup", I18N_NOOP("Calibration Backup"),  Writable },
+  { "program_executive",  I18N_NOOP("Program Executive"),   Writable }
+};
+
+const Pic::SelfWrite::Data Pic::SelfWrite::DATA[Nb_Types] = {
+  { "yes", 0 },
+  { "no",  0 }
+};
+
+const Pic::DeviceType::Data Pic::DeviceType::DATA[Nb_Types] = {
+  { 0, I18N_NOOP("Normal") },
+  { 0, I18N_NOOP("J")      },
+  { 0, I18N_NOOP("K")      }
+};
+
+const Pic::Architecture::Data Pic::Architecture::DATA[Nb_Types] = {
+//  name family_label nbBytesPC nbBytesWord packed nbBitsRegister registerBankLength
+//  {Code, Cal, UserID, DevId, Conf, EEPROM, DebugVec, HardStack, CalBackup, Program Executive} randomAccess
+  { "10X", I18N_NOOP("Baseline Family"),  0, 2, false,  8, 0x020, { 12, 12, 12, 12, 12,  8, 12,  0, 12,  0 }, false, SelfWrite::No,       DeviceType::Normal }, // 9, 10, 11 or 12-bit program counter
+  { "16X", I18N_NOOP("Midrange Family"), 13, 2, false,  8, 0x080, { 14, 14, 14, 14, 14,  8, 14,  0, 14,  0 }, false, SelfWrite::Nb_Types, DeviceType::Normal }, // max eeprom: 256 words
+  { "17C", I18N_NOOP("17C Family"),      16, 2, false,  8, 0x100, { 16,  0,  0,  0, 16,  8,  0,  0,  0,  0 }, true,  SelfWrite::No,       DeviceType::Normal },
+  { "18C", I18N_NOOP("18C Family"),      21, 2, true,   8, 0x100, { 16,  8,  8,  8,  8,  8, 16,  0,  8,  0 }, true,  SelfWrite::No,       DeviceType::Normal },
+  { "18F", I18N_NOOP("18F Family"),      21, 2, true,   8, 0x100, { 16,  8,  8,  8,  8,  8, 16,  0,  8,  0 }, true,  SelfWrite::Nb_Types, DeviceType::Normal },
+  { "18J", I18N_NOOP("18J Family"),      21, 2, true,   8, 0x100, { 16,  8,  8,  8,  8,  8, 16,  0,  8,  0 }, true,  SelfWrite::Yes,      DeviceType::J      },
+  { "24F", I18N_NOOP("24F Family"),      23, 4, false, 16, 0x800, { 24,  0,  0, 16, 24,  0, 24,  0,  0, 24 }, true,  SelfWrite::Yes,      DeviceType::J      },
+  { "24H", I18N_NOOP("24H Family"),      23, 4, false, 16, 0x800, { 24,  0,  8, 16,  8,  0, 24,  0,  0, 24 }, true,  SelfWrite::Yes,      DeviceType::J      },
+  { "30F", I18N_NOOP("30F Family"),      23, 4, false, 16, 0xA00, { 24,  0, 24, 16, 16, 16, 24,  0,  0, 24 }, true,  SelfWrite::Yes,      DeviceType::Normal }, // dsPIC: eeprom max = 2 kwords = 4 kbytes
+  { "33F", I18N_NOOP("33F Family"),      23, 4, false, 16, 0x800, { 24,  0,  8, 16,  8,  0, 24,  0,  0, 24 }, true,  SelfWrite::Yes,      DeviceType::J      }
+};
+
+const Pic::Checksum::Algorithm::Data Pic::Checksum::Algorithm::DATA[Nb_Types] = {
+  { "",      0 },
+  { "XOR4",  0 },
+  { "XNOR7", 0 },
+  { "XNOR8", 0 }
+};
+
+const Pic::Feature::Data Pic::Feature::DATA[Nb_Types] = {
+  { "ccp", I18N_NOOP("CCP")      },
+  { "adc", I18N_NOOP("ADC")      },
+  { "ssp", I18N_NOOP("SSP")      },
+  { "lvd", I18N_NOOP("Low Voltage Detect") },
+  { "usb", I18N_NOOP("USB")      },
+  { "usart",           I18N_NOOP("USART")    },
+  { "can",             I18N_NOOP("CAN")      },
+  { "ecan",            I18N_NOOP("ECAN")     },
+  { "ethernet",        I18N_NOOP("Ethernet") },
+  { "lcd",             I18N_NOOP("LCD")      },
+  { "motor_control",   I18N_NOOP("Motor Control") },
+  { "motion_feedback", I18N_NOOP("Motion Feeback") },
+  { "self_write",      I18N_NOOP("Self-Write") }
+};
+
+//-----------------------------------------------------------------------------
+Pic::Data::Data()
+  : Device::Data(new RegistersData(*this))
+{
+  FOR_EACH(ProgVoltageType, type) {
+    _voltages[type].min = 0.0;
+    _voltages[type].max = 0.0;
+    _voltages[type].nominal = 0.0;
+  }
+  FOR_EACH(MemoryRangeType, type) {
+    _ranges[type].properties = NotPresent;
+    _ranges[type].start = 0;
+    _ranges[type].end = 0;
+    _ranges[type].hexFileOffset = 0;
+  }
+  _config = new Config(*this);
+  _calibration.opcode = 0;
+  _calibration.opcodeMask = 0;
+}
+
+Pic::Data::~Data()
+{
+  delete _config;
+}
+
+bool Pic::Data::isReadable(MemoryRangeType type) const
+{
+  return ( range(type).properties & Programmable );
+}
+
+bool Pic::Data::isWritable(MemoryRangeType type) const
+{
+  return ( (type.data().properties & Writable) && (range(type).properties & Programmable) );
+}
+
+uint Pic::Data::addressIncrement(MemoryRangeType type) const
+{
+  uint inc = _architecture.data().nbBytesWord;
+  if ( _architecture.data().packed
+       && ( type==MemoryRangeType::Code || type==MemoryRangeType::DebugVector ) ) return inc;
+  return inc / 2;
+}
+
+uint Pic::Data::nbWords(MemoryRangeType type) const
+{
+  if ( !isPresent(type) ) return 0;
+  return nbAddresses(type) / addressIncrement(type);
+}
+
+uint Pic::Data::nbAddresses(MemoryRangeType type) const
+{
+  if ( !isPresent(type) ) return 0;
+  return (range(type).end - range(type).start + 1);
+}
+
+QString Pic::Data::fname(Device::Special special) const
+{
+  QString s = name();
+  switch (special.type()) {
+    case Device::Special::Normal: break;
+    case Device::Special::LowPower:
+      // assume name is of form "NNX..."
+      s.insert(2, 'L');
+      break;
+    case Device::Special::LowVoltage:
+      // assume name is of form "NNXN..."
+      s.replace(2, 1, "LV");
+      break;
+    case Device::Special::HighVoltage:
+      // assume name is of form "NNXN..."
+      s.replace(2, 1, "HV");
+      break;
+    case Device::Special::Nb_Types: Q_ASSERT(false); break;
+  }
+  return s;
+}
+
+bool Pic::Data::matchId(BitValue rawId, Device::IdData &idata) const
+{
+  if ( !isPresent(MemoryRangeType::DeviceId) ) return false;
+  QMap<Device::Special, BitValue>::const_iterator it;
+  for (it=_ids.begin(); it!=_ids.end(); ++it) {
+    idata.special = it.key();
+    BitValue nid = 0x0;
+    switch (architecture().type()) {
+      case Architecture::P10X:
+      case Architecture::P16X:
+      case Architecture::P17C:
+      case Architecture::P18C:
+      case Architecture::P18F:
+      case Architecture::P18J:
+        nid = rawId.clearMaskBits(0x1F);
+        idata.revision = rawId.maskWith(0x1F);
+        break;
+      case Architecture::P24F:
+        nid = (rawId >> 16).maskWith(0x3FFF);
+        idata.revision = (rawId >> 6).maskWith(0x7);
+        idata.minorRevision = rawId.maskWith(0x7);
+        break;
+      case Architecture::P30F:
+        nid = (rawId >> 16).maskWith(0xFFFF);
+        idata.revision = (rawId >> 6).maskWith(0x3F);
+        idata.minorRevision = rawId.maskWith(0x3F);
+        idata.process = (rawId >> 12).maskWith(0xF);
+        break;
+      case Architecture::P24H:
+      case Architecture::P33F:
+        nid = (rawId >> 16).maskWith(0xFFFF);
+        idata.revision = rawId.maskWith(0xFFFF); // ??
+        break;
+      case Architecture::Nb_Types: Q_ASSERT(false); break;
+    }
+    if ( nid==it.data() ) return true;
+  }
+  return false;
+}
+
+QStringList Pic::Data::idNames(const QMap<QString, Device::IdData> &ids) const
+{
+  QStringList list;
+  QMap<QString, Device::IdData>::const_iterator it;
+  for (it=ids.begin(); it!=ids.end(); ++it) {
+    switch (_architecture.type()) {
+      case Architecture::P10X:
+      case Architecture::P16X:
+      case Architecture::P17C:
+      case Architecture::P18C:
+      case Architecture::P18F:
+      case Architecture::P18J:
+        list += i18n("%1 (rev. %2)").arg(it.key()).arg(toLabel(it.data().revision));
+        break;
+      case Architecture::P24F:
+        list += i18n("%1 (rev. %2.%3)").arg(it.key()).arg(toLabel(it.data().revision)).arg(toLabel(it.data().minorRevision));
+        break;
+      case Architecture::P30F:
+        list += i18n("%1 (proc. %2; rev. %3.%4)").arg(it.key()).arg(toLabel(it.data().process)).arg(toLabel(it.data().revision)).arg(toLabel(it.data().minorRevision));
+        break;
+      case Architecture::P24H:
+      case Architecture::P33F:
+        list += i18n("%1 (rev. %2)").arg(it.key()).arg(toLabel(it.data().revision));
+        break;
+      case Architecture::Nb_Types: Q_ASSERT(false); break;
+    }
+  }
+  return list;
+}
+
+bool Pic::Data::checkCalibration(const Device::Array &data, QString *message) const
+{
+  Q_ASSERT( nbWords(MemoryRangeType::Cal)==data.count() );
+  for (uint i=0; i<data.count(); i++) {
+    QString address = toHexLabel(range(MemoryRangeType::Cal).start + i*addressIncrement(MemoryRangeType::Cal), nbCharsAddress());
+    if ( data[i]==mask(MemoryRangeType::Cal) ) {
+      if (message) *message = i18n("Calibration word at address %1 is blank.").arg(address);
+      return false;
+    }
+  }
+  if ( data.count()==1 ) {
+    if ( data[0].maskWith(_calibration.opcodeMask)!=_calibration.opcode ) {
+      if (message) *message = i18n("Calibration word is not a compatible opcode (%2).")
+                              .arg(toHexLabel(_calibration.opcode, nbCharsWord(MemoryRangeType::Code)));
+      return false;
+    }
+  }
+  return true;
+}
+
+const Pic::RegistersData &Pic::Data::registersData() const
+{
+  return static_cast<const RegistersData &>(*_registersData);
+}
+
+bool Pic::Data::hasFeature(Feature feature, bool *unknown) const
+{
+  bool ok = ( registersData().nbBanks!=0 );
+  if (unknown) *unknown = !ok;
+  if (!ok) return false;
+  switch (feature.type()) {
+    case Feature::CCP: return registersData().sfrs.contains("CCP1CON");
+    case Feature::ADC: return registersData().sfrs.contains("ADCON0");
+    case Feature::SSP: return registersData().sfrs.contains("SSPCON");
+    case Feature::LVD: return registersData().sfrs.contains("LVDCON");
+    case Feature::USB: return registersData().sfrs.contains("UCON");
+    case Feature::USART:
+      return ( registersData().sfrs.contains("TXSTA")        // 16F
+               || registersData().sfrs.contains("TXSTA1")    // 18F
+               || registersData().sfrs.contains("U1MODE") ); // 30F
+    case Feature::CAN: return registersData().sfrs.contains("CANCON") && !registersData().sfrs.contains("ECANCON");
+    case Feature::ECAN: return registersData().sfrs.contains("ECANCON");
+    case Feature::Ethernet: return registersData().sfrs.contains("ETHCON1");
+    case Feature::LCD: return registersData().sfrs.contains("LCDCON");
+    case Feature::MotorControl: return registersData().sfrs.contains("PWMCON0");
+    case Feature::MotionFeedback: return registersData().sfrs.contains("CAP1CON");
+    case Feature::SelfWrite: return _selfWrite==SelfWrite::Yes;
+    case Feature::Nb_Types: Q_ASSERT(false); break;
+  }
+  return false;
+}
+
+Device::Array Pic::Data::gotoInstruction(Address address, bool withPageSelection) const
+{
+  Q_ASSERT( address<addressIncrement(MemoryRangeType::Code)*nbWords(MemoryRangeType::Code) );
+  Device::Array a;
+  switch (_architecture.type()) {
+  case Architecture::P10X:
+    if ( nbWords(MemoryRangeType::Code)>0x1FF && withPageSelection)
+      a.append(0x4A3 | (address>0x1FF ? 0x100 : 0x000)); // bsf STATUS,PA0 or bcf STATUS,PA0
+    a.append(0xA00 | (address.toUInt() & 0x1FF)); // goto
+    break;
+  case Architecture::P16X:
+    if ( nbWords(MemoryRangeType::Code)>0x7FF && withPageSelection ) {
+      if ( address<=0x7FF ) a.append(0x018A); // clrf PCLATH
+      else {
+        a.append(0x3000 | (address.toUInt() >> 8)); // movl high address
+        a.append(0x008A); // movwf PCLATH
+      }
+    }
+    a.append(0x2800 | (address.toUInt() & 0x7FF));
+    break;
+  case Architecture::P17C:
+    a.append(0xC000 | (address.toUInt() & 0x1FFF));
+    break;
+  case Architecture::P18C:
+  case Architecture::P18F:
+  case Architecture::P18J:
+    a.append(0xEF00 | ((address.toUInt()/2) & 0xFF));
+    a.append(0xF000 | ((address.toUInt()/2) >> 8));
+    break;
+  case Architecture::P24F:
+  case Architecture::P24H:
+  case Architecture::P30F:
+  case Architecture::P33F:
+    a.append(0x040000 | (address.toUInt() & 0x00FFFE));
+    a.append(0X000000 | (address.toUInt() >> 16));
+    break;
+  case Architecture::Nb_Types: Q_ASSERT(false); break;
+  }
+  return a;
+}
+
+bool Pic::Data::isGotoInstruction(BitValue instruction) const
+{
+  switch (_architecture.type()) {
+  case Architecture::P10X: return ( instruction.maskWith(0xE00)==0xA00 );
+  case Architecture::P16X: return ( instruction.maskWith(0xF800)==0x2800 );
+  case Architecture::P17C: return ( instruction.maskWith(0xE000)==0xC000 );
+  case Architecture::P18C:
+  case Architecture::P18F:
+  case Architecture::P18J: return ( instruction.maskWith(0xFF00)==0xEF00 );
+  case Architecture::P24F:
+  case Architecture::P24H:
+  case Architecture::P30F:
+  case Architecture::P33F: return ( instruction.maskWith(0xFF0000)==0x040000 );
+  case Architecture::Nb_Types: Q_ASSERT(false); break;
+  }
+  return false;
+}
+
+uint Pic::Data::nbWordsWriteAlignment(MemoryRangeType type) const
+{
+  if ( type!=MemoryRangeType::Code ) return 1;
+  return QMAX(_nbWordsCodeWrite, uint(16));
+}
+
+//----------------------------------------------------------------------------
+QDataStream &operator <<(QDataStream &s, const Pic::VoltageData &vd)
+{
+  s << vd.min << vd.max << vd.nominal;
+  return s;
+}
+QDataStream &operator >>(QDataStream &s, Pic::VoltageData &vd)
+{
+  s >> vd.min >> vd.max >> vd.nominal;
+  return s;
+}
+
+QDataStream &operator <<(QDataStream &s, const Pic::MemoryRangeData &mrd)
+{
+  s << Q_UINT8(mrd.properties) << mrd.start << mrd.end << mrd.hexFileOffset;
+  return s;
+}
+QDataStream &operator >>(QDataStream &s, Pic::MemoryRangeData &mrd)
+{
+  Q_UINT8 properties;
+  s >> properties >> mrd.start >> mrd.end >> mrd.hexFileOffset;
+  mrd.properties = Pic::MemoryRangeProperties(properties);
+  return s;
+}
+
+QDataStream &operator <<(QDataStream &s, const Pic::Checksum::Data &cd)
+{
+  s << cd.constant << cd.bbsize << cd.algorithm << cd.protectedMaskNames;
+  s << cd.blankChecksum << cd.checkChecksum;
+  return s;
+}
+QDataStream &operator >>(QDataStream &s, Pic::Checksum::Data &cd)
+{
+  s >> cd.constant >> cd.bbsize >> cd.algorithm >> cd.protectedMaskNames;
+  s >> cd.blankChecksum >> cd.checkChecksum;
+  return s;
+}
+
+QDataStream &operator <<(QDataStream &s, const Pic::CalibrationData &cd)
+{
+  s << cd.opcode << cd.opcodeMask;
+  return s;
+}
+QDataStream &operator >>(QDataStream &s, Pic::CalibrationData &cd)
+{
+  s >> cd.opcode >> cd.opcodeMask;
+  return s;
+}
+
+QDataStream &Pic::operator <<(QDataStream &s, const Pic::Data &data)
+{
+  s << static_cast<const Device::Data &>(data);
+  s << data._architecture << data._ids << data._nbBitsPC;
+  s << data._voltages << data._ranges;
+  s << data._userIdRecommendedMask;
+  s << *data._config;
+  s << data._checksums;
+  s << data._calibration;
+  s << static_cast<const Pic::RegistersData &>(*data._registersData);
+  s << data._nbWordsCodeWrite << data._nbWordsCodeRowErase;
+  s << data._selfWrite;
+  return s;
+}
+QDataStream &Pic::operator >>(QDataStream &s, Pic::Data &data)
+{
+  s >> static_cast<Device::Data &>(data);
+  s >> data._architecture >> data._ids >> data._nbBitsPC;
+  s >> data._voltages >> data._ranges;
+  s >> data._userIdRecommendedMask;
+  s >> *data._config;
+  s >> data._checksums;
+  s >> data._calibration;
+  s >> static_cast<Pic::RegistersData &>(*data._registersData);
+  s >> data._nbWordsCodeWrite >> data._nbWordsCodeRowErase;
+  s >> data._selfWrite;
+  return s;
+}
diff --git a/src/devices/pic/base/pic.h b/src/devices/pic/base/pic.h
new file mode 100644
index 0000000..7b0dfc4
--- /dev/null
+++ b/src/devices/pic/base/pic.h
@@ -0,0 +1,179 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PIC_H
+#define PIC_H
+
+#include <qstringlist.h>
+#include <qmap.h>
+
+#include "common/global/global.h"
+#include "common/common/bitvalue.h"
+#include "devices/base/generic_device.h"
+
+namespace Pic
+{
+class XmlToData;
+class Group;
+class Config;
+class RegistersData;
+
+//-----------------------------------------------------------------------------
+struct VoltageData {
+  double min, max, nominal;
+};
+inline bool operator ==(const Pic::VoltageData &v1, const Pic::VoltageData &v2) { return ( v1.min==v2.min && v1.max==v2.max && v1.nominal==v2.nominal ); }
+
+BEGIN_DECLARE_ENUM(ProgVoltageType)
+  Vpp = 0, VddBulkErase, VddWrite
+END_DECLARE_ENUM_STD(ProgVoltageType)
+
+struct CalibrationData {
+  BitValue opcode, opcodeMask;
+};
+
+enum MemoryRangeTypeProperty { ReadOnly = 0, Writable = 1 };
+Q_DECLARE_FLAGS(MemoryRangeTypeProperties, MemoryRangeTypeProperty)
+Q_DECLARE_OPERATORS_FOR_FLAGS(MemoryRangeTypeProperties)
+struct MemoryRangeTypeData {
+  const char *key, *label;
+  MemoryRangeTypeProperties properties;
+};
+BEGIN_DECLARE_ENUM(MemoryRangeType)
+  Code = 0, Cal, UserId, DeviceId, Config, Eeprom, DebugVector, HardwareStack, CalBackup, ProgramExecutive
+END_DECLARE_ENUM(MemoryRangeType, MemoryRangeTypeData)
+
+BEGIN_DECLARE_ENUM(SelfWrite)
+  Yes, No
+END_DECLARE_ENUM_STD(SelfWrite)
+
+BEGIN_DECLARE_ENUM(DeviceType)
+  Normal, J, K
+END_DECLARE_ENUM_STD(DeviceType)
+
+struct ArchitectureData {
+  const char *key, *label;
+  uint nbBitsPC;                     // nb bits program counter
+  uint nbBytesWord;                  // nb bytes per word (hex file and icd2)
+  bool packed;                       // addressIncrement = (packed ? nbBytesWord : nbBytesWord/2)
+  uint nbBitsRegister;
+  uint registerBankLength;
+  uint nbBits[MemoryRangeType::Nb_Types];  // nb bits per word
+  bool hasAddressAccess;             // memory can be accessed randomly
+  SelfWrite::Type selfWrite;
+  DeviceType::Type deviceType;
+};
+BEGIN_DECLARE_ENUM(Architecture)
+  P10X = 0, P16X, P17C, P18C, P18F, P18J, P24F, P24H, P30F, P33F
+END_DECLARE_ENUM(Architecture, ArchitectureData)
+
+enum MemoryRangeProperty { NotPresent = 0, Present = 1, Programmable = 2 };
+Q_DECLARE_FLAGS(MemoryRangeProperties, MemoryRangeProperty)
+Q_DECLARE_OPERATORS_FOR_FLAGS(MemoryRangeProperties)
+struct MemoryRangeData {
+  MemoryRangeProperties properties;
+  Address start, end;
+  uint hexFileOffset;
+};
+
+namespace Checksum
+{
+  BEGIN_DECLARE_ENUM(Algorithm)
+    Normal = 0, XOR4, XNOR7, XNOR8
+  END_DECLARE_ENUM_STD(Algorithm)
+  class Data {
+  public:
+    BitValue constant;
+    Algorithm algorithm;
+    QStringList protectedMaskNames;
+    QString bbsize;
+    BitValue blankChecksum, checkChecksum;
+  };
+} // namespace
+
+BEGIN_DECLARE_ENUM(Feature)
+  CCP, ADC, SSP, LVD, USB, USART, CAN, ECAN, Ethernet, LCD, MotorControl,
+  MotionFeedback, SelfWrite
+END_DECLARE_ENUM_STD(Feature)
+
+//-----------------------------------------------------------------------------
+class Data : public Device::Data
+{
+public:
+  Data();
+  virtual ~Data();
+  virtual QString fname(Device::Special special) const;
+  virtual QString listViewGroup() const { return _architecture.label(); }
+  bool isPresent(MemoryRangeType type) const { return (range(type).properties & Present); }
+  bool isReadable(MemoryRangeType type) const;
+  bool isWritable(MemoryRangeType type) const;
+  uint nbAddresses(MemoryRangeType type) const;
+  uint nbWords(MemoryRangeType type) const;
+  uint addressIncrement(MemoryRangeType type) const;
+  uint nbWordsWriteAlignment(MemoryRangeType type) const;
+  MemoryRangeData range(MemoryRangeType type) const { return _ranges[type]; }
+  virtual uint nbBitsAddress() const { return _nbBitsPC; }
+  uint nbBitsWord(MemoryRangeType type) const { return _architecture.data().nbBits[type.type()]; }
+  uint nbBytesWord(MemoryRangeType type) const { return nbBitsToNbBytes(nbBitsWord(type)); }
+  uint nbCharsWord(MemoryRangeType type) const { return nbBitsToNbChars(nbBitsWord(type)); }
+  BitValue mask(MemoryRangeType type) const { return uint(1 << nbBitsWord(type))-1; }
+  BitValue userIdRecommendedMask() const { return _userIdRecommendedMask; }
+  const Config &config() const { return *_config; }
+  Architecture architecture() const { return _architecture; }
+  bool is18Family() const { return ( _architecture==Architecture::P18C || _architecture==Architecture::P18F || _architecture==Architecture::P18J); }
+  bool is16bitFamily() const { return ( _architecture.data().nbBitsRegister==16 ); }
+  VoltageData voltage(ProgVoltageType type) const { return _voltages[type]; }
+  virtual bool canWriteCalibration() const { return isWritable(MemoryRangeType::Cal); }
+  bool checkCalibration(const Device::Array &data, QString *message = 0) const;
+  const QMap<Device::Special, BitValue> ids() const { return _ids; }
+  virtual bool matchId(BitValue rawId, Device::IdData &data) const;
+  QStringList idNames(const QMap<QString, Device::IdData> &ids) const;
+  const QMap<QString, Checksum::Data> checksums() const { return _checksums; }
+  const RegistersData &registersData() const;
+  const CalibrationData &calibrationData() const { return _calibration; }
+
+  bool hasFeature(Feature feature, bool *unknown = 0) const;
+  BitValue nopInstruction() const { return 0x0; }
+  Device::Array gotoInstruction(Address address, bool withPageSelection) const;
+  bool isGotoInstruction(BitValue instruction) const;
+
+private:
+  Architecture _architecture;
+  QMap<Device::Special, BitValue> _ids;
+  uint             _nbBitsPC;
+  uint             _nbWordsCodeWrite;    // #### only for 18F/18J devices [0 for other devices]
+  uint             _nbWordsCodeRowErase; // #### only for 18F/18J devices [0 for other devices or if not available]
+  QMap<ProgVoltageType, VoltageData>     _voltages;
+  QMap<MemoryRangeType, MemoryRangeData> _ranges;
+  BitValue         _userIdRecommendedMask;
+  Config          *_config;
+  QMap<QString, Checksum::Data> _checksums;
+  CalibrationData  _calibration;
+  SelfWrite        _selfWrite;
+
+  friend class XmlToData;
+  friend class Group;
+  friend QDataStream &operator <<(QDataStream &s, const Data &data);
+  friend QDataStream &operator >>(QDataStream &s, Data &data);
+};
+
+QDataStream &operator <<(QDataStream &s, const Data &data);
+QDataStream &operator >>(QDataStream &s, Data &data);
+
+} // namespace
+
+QDataStream &operator <<(QDataStream &s, const Pic::VoltageData &vd);
+QDataStream &operator >>(QDataStream &s, Pic::VoltageData &vd);
+QDataStream &operator <<(QDataStream &s, const Pic::MemoryRangeData &mrd);
+QDataStream &operator >>(QDataStream &s, Pic::MemoryRangeData &mrd);
+QDataStream &operator <<(QDataStream &s, const Pic::Checksum::Data &cd);
+QDataStream &operator >>(QDataStream &s, Pic::Checksum::Data &cd);
+QDataStream &operator <<(QDataStream &s, const Pic::CalibrationData &cd);
+QDataStream &operator >>(QDataStream &s, Pic::CalibrationData &cd);
+
+#endif
diff --git a/src/devices/pic/base/pic_config.cpp b/src/devices/pic/base/pic_config.cpp
new file mode 100644
index 0000000..6672794
--- /dev/null
+++ b/src/devices/pic/base/pic_config.cpp
@@ -0,0 +1,456 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pic_config.h"
+
+#include <qregexp.h>
+
+const Pic::ConfigNameType::Data Pic::ConfigNameType::DATA[Nb_Types] = {
+  { "cname", 0 },
+  { "ecname", 0 },
+  { "sdcc_cname", 0 }
+};
+
+const Pic::Config::Data Pic::Config::DATA[] = {
+  { { "CP",    I18N_NOOP("Code code-protection")         }, MemoryRange, { { 0, 0 } } },
+  { { "CPD",   I18N_NOOP("Data code-protection")         }, MemoryRange, { { 0, 0 } } },
+  { { "CPC",   I18N_NOOP("Calibration code-protection")  }, MemoryRange, { { 0, 0 } } },
+  { { "CPB",   I18N_NOOP("Boot code-protection")         }, MemoryRange, { { 0, 0 } } },
+
+  { { "WRT",   I18N_NOOP("Code write-protection")           }, MemoryRange, { { 0, 0 } } },
+  { { "WRTD",  I18N_NOOP("Data write-protection")           }, MemoryRange, { { 0, 0 } } },
+  { { "WRTB",  I18N_NOOP("Boot write-protection")           }, MemoryRange, { { 0, 0 } } },
+  { { "WRTC",  I18N_NOOP("Configuration write-protection")  }, MemoryRange, { { 0, 0 } } },
+
+  { { "EBTR",  I18N_NOOP("Table read-protection")      }, MemoryRange, { { 0, 0 } } },
+  { { "EBTRB", I18N_NOOP("Boot table read-protection") }, MemoryRange, { { 0, 0 } } },
+
+  { { "WDT",  I18N_NOOP("Watchdog timer") }, Toggle, { { 0, 0 } } },
+  { { "MCLRE", I18N_NOOP("Master clear reset"), }, Fixed, {
+    { "External", I18N_NOOP("External"),                   },
+    { "Internal", I18N_NOOP("Disabled (connected to Vdd)") }, { 0, 0 } } },
+  { { "PWRTE", I18N_NOOP("Power-up timer") }, Toggle, { { 0, 0 } } },
+
+  { { "FOSC",  I18N_NOOP("Oscillator") }, Fixed,  {
+    { "EXTRC", I18N_NOOP("External RC oscillator")                   },
+    { "EXTRC_CLKOUT", I18N_NOOP("External RC oscillator with CLKOUT") },
+    { "EXTRC_IO", I18N_NOOP("External RC oscillator (no CLKOUT)")   },
+    { "INTRC", I18N_NOOP("Internal oscillator")                      },
+    { "INTRC_CLKOUT", I18N_NOOP("Internal oscillator with CLKOUT")   },
+    { "INTRC_IO", I18N_NOOP("Internal oscillator (no CLKOUT)")       },
+    { "XT", I18N_NOOP("Crystal/resonator")                          },
+    { "XTPLL", I18N_NOOP("Crystal/resonator, PLL enabled") },
+    { "LP", I18N_NOOP("Low power crystal")                           },
+    { "EC", I18N_NOOP("External clock")                              },
+    { "EC_CLKOUT", I18N_NOOP("External clock with CLKOUT")           },
+    { "EC_IO", I18N_NOOP("External clock (no CLKOUT)")               },
+    { "ECPLL_CLKOUT", I18N_NOOP("External clock with CLKOUT, PLL enabled")           },
+    { "ECPLL_IO", I18N_NOOP("External clock (no CLKOUT), PLL enabled")               },
+    { "E4_CLKOUT", I18N_NOOP("External clock with 4x PLL and with CLKOUT") },
+    { "E4_IO", I18N_NOOP("External clock with 4x PLL (no CLKOUT)")   },
+    { "E4S_IO", I18N_NOOP("External clock with software controlled 4x PLL (no CLKOUT)") },
+    { "ER", I18N_NOOP("External resistor")                           },
+    { "ER_CLKOUT", I18N_NOOP("External resistor with CLKOUT")        },
+    { "ER_IO", I18N_NOOP("External resistor (no CLKOUT)")            },
+    { "HS", I18N_NOOP("High speed crystal/resonator")                },
+    { "HSPLL", I18N_NOOP("High speed crystal/resonator, PLL enabled") },
+    { "H4", I18N_NOOP("High speed crystal/resonator with 4x PLL")    },
+    { "H4S", I18N_NOOP("High speed crystal/resonator with software controlled 4x PLL") },
+    { "INTXT", I18N_NOOP("Internal oscillator, XT used by USB") },
+    { "INTHS", I18N_NOOP("Internal oscillator, HS used by USB") },
+    { 0, 0 } } },
+
+  { { "BG",    I18N_NOOP("Bandgap voltage calibration") }, Fixed, {
+    { "Lowest",   I18N_NOOP("Lowest")   },
+    { "Mid/Low",  I18N_NOOP("Mid/Low")  },
+    { "Mid/High", I18N_NOOP("Mid/High") },
+    { "Highest",  I18N_NOOP("Highest")  }, { 0, 0 } } },
+  { { "TRIM", I18N_NOOP("Internal Trim") }, Fixed, {
+    { "00", I18N_NOOP("00") }, { "01", I18N_NOOP("01") },
+    { "10", I18N_NOOP("10") }, { "11", I18N_NOOP("11") }, { 0, 0 } } },
+  { { "BODEN", I18N_NOOP("Brown-out detect")       }, Toggle, {
+    { "On_run",   I18N_NOOP("Enabled in run - Disabled in sleep") },
+    { "Software", I18N_NOOP("SBODEN controls BOD function")       }, { 0, 0 } } },
+  { { "FCMEN", I18N_NOOP("Fail-safe clock monitor")      }, Toggle, { { 0, 0 } } },
+  { { "IESO",  I18N_NOOP("Internal-external switchover") }, Toggle, { { 0, 0 } } },
+  { { "WUREN",  I18N_NOOP("Wake-up reset")               }, Toggle, { { 0, 0 } } },
+  { { "DEBUG", I18N_NOOP("In-circuit debugger")          }, Toggle, { { 0, 0 } } },
+  { { "MPEEN", I18N_NOOP("Memory parity error")          }, Toggle, { { 0, 0 } } },
+  { { "BORV",  I18N_NOOP("Brown-out reset voltage") }, ValueDouble, {
+    { "0", I18N_NOOP("Undefined")  }, { 0, 0 } } },
+  { { "LVP",   I18N_NOOP("Low voltage programming")   }, Toggle, { { 0, 0 } } },
+  { { "CCP2MX", I18N_NOOP("CCP2 multiplex")           }, Pin, { { 0, 0 } } },
+  { { "CCP1MX", I18N_NOOP("CCP1 multiplex")           }, Pin, { { 0, 0 } } },
+  { { "BORSEN", I18N_NOOP("Brown-out reset software") }, Toggle, { { 0, 0 } } },
+  { { "WDTPS", I18N_NOOP("WDT post-scaler") }, Ratio, {
+    { "Disabled", I18N_NOOP("Disabled") }, { 0, 0 } } },
+  { { "PM",    I18N_NOOP("Processor mode") }, Fixed, {
+    { "Extended microcontroller", I18N_NOOP("Extended microcontroller")            },
+    { "Microcontroller", I18N_NOOP("Microcontroller")                              },
+    { "Microprocessor", I18N_NOOP("Microprocessor")                                },
+    { "Code-protected microcontroller", I18N_NOOP("Code protected microcontroller") },
+    { "Microprocessor with boot", I18N_NOOP("Microprocessor with boot block")       },
+    { 0, 0 } } },
+
+  { { "OSCSEN", I18N_NOOP("Oscillator system clock switch") }, Toggle, { { 0, 0 } } },
+  { { "STVREN", I18N_NOOP("Stack full/underflow reset") }, Toggle, { { 0, 0 } } },
+  { { "BW",    I18N_NOOP("External bus data width (in bits)") }, ValueUInt, { { 0, 0 } } },
+  { { "PBADEN", I18N_NOOP("PORTB A/D")              }, Fixed, {
+      { "digital", I18N_NOOP("Digital") },
+      { "analog",  I18N_NOOP("Analog")  }, { 0, 0 } } },
+  { { "WINEN", I18N_NOOP("Watchdog timer window")   }, Toggle, { { 0, 0 } } },
+  { { "HPOL", I18N_NOOP("Odd PWM output polarity")  }, Fixed, {
+    { "high", I18N_NOOP("Active high")  },
+    { "low",  I18N_NOOP("Active low")   }, { 0, 0 } } },
+  { { "LPOL", I18N_NOOP("Even PWM output polarity") }, Fixed, {
+    { "high", I18N_NOOP("Active high")  },
+    { "low",  I18N_NOOP("Active low")   }, { 0, 0 } } },
+  { { "PWMPIN", I18N_NOOP("PWM output pin reset state") }, Toggle, { { 0, 0 } } },
+  { { "T1OSCMX", I18N_NOOP("Timer1 oscillator mode") }, Fixed, {
+    { "Legacy",    I18N_NOOP("Standard operation")      },
+    { "Low Power", I18N_NOOP("Low power in sleep mode") },
+    { "RA6",       I18N_NOOP("T1OSO/T1CKI on RA6") },
+    { "RB2",       I18N_NOOP("T1OSO/T1CKI on RB2") }, { 0, 0 } } },
+  { { "EXCLKMX", I18N_NOOP("TMR0/T5CKI external clock mux") }, Pin, { { 0, 0 } } },
+  { { "FLTAMX", I18N_NOOP("FLTA mux")               }, Pin, { { 0, 0 } } },
+  { { "PWM4MX", I18N_NOOP("PWM4 mux")               }, Pin, { { 0, 0 } } },
+  { { "SSPMX", I18N_NOOP("SSP I/O mux (SCK/SLC, SDA/SDI, SD0)") }, Pins, { { 0, 0 } } },
+  { { "LPT1OSC", I18N_NOOP("Low-power timer1 oscillator") }, Toggle, { { 0, 0 } } },
+  { { "XINST", I18N_NOOP("Extended instruction set") }, Toggle, { { 0, 0 } } },
+  { { "BBSIZ", I18N_NOOP("Boot block size") }, ValueUInt, { { 0, 0 } } },
+  { { "ICPORT", I18N_NOOP("Dedicated in-circuit port") }, Toggle, { { 0, 0 } } },
+  { { "VREGEN", I18N_NOOP("USB voltage regulator")  }, Toggle, { { 0, 0 } } },
+  { { "WAIT", I18N_NOOP("External bus data wait")   }, Toggle, { { 0, 0 } } },
+  { { "ABW", I18N_NOOP("Address bus width (in bits)") }, ValueUInt, { { 0, 0 } } },
+  { { "ECCPMX", I18N_NOOP("ECCP mux") }, Fixed, {
+    { "RE6-RE3", I18N_NOOP("PWM multiplexed onto RE6 and RE3") },
+    { "RH7-RH4", I18N_NOOP("PWM multiplexed onto RH7 and RH4") },
+    { "RE6-RE5", I18N_NOOP("PWM multiplexed onto RE6 and RE5") },
+    { "RH7-RH6", I18N_NOOP("PWM multiplexed onto RH7 and RH6") }, { 0, 0 } } },
+
+  { { "FCKSM", I18N_NOOP("Clock switching mode") }, Fixed, {
+    { "Switching off, monitor off", I18N_NOOP("Switching off, monitor off") },
+    { "Switching on, monitor off",  I18N_NOOP("Switching on, monitor off")  },
+    { "Switching on, monitor on",   I18N_NOOP("Switching on, monitor on")   }, { 0, 0 } } },
+  { { "FOS", I18N_NOOP("Oscillator source") }, Fixed, {
+    { "INTRC_F",  I18N_NOOP("Internal fast RC")      },
+    { "INTRC_LP", I18N_NOOP("Internal low-power RC") },
+    { "PRIM",     I18N_NOOP("Primary")               },
+    { "TMR1",     I18N_NOOP("Timer1")                }, { 0, 0 } } },
+  { { "FPR", I18N_NOOP("Primary oscillator mode") }, Fixed, {
+    { "XTL",          I18N_NOOP("Low-power/low-frequency crystal") },
+    { "HS",           I18N_NOOP("High speed crystal") },
+    { "XT",           I18N_NOOP("XT Crystal") },
+    { "XT4",           I18N_NOOP("XT Crystal with 4x PLL") },
+    { "XT8",           I18N_NOOP("XT Crystal with 8x PLL") },
+    { "XT16",          I18N_NOOP("XT Crystal with 16x PLL") },
+    { "EC_CLKOUT",    I18N_NOOP("External clock with CLKOUT") },
+    { "EC_IO",        I18N_NOOP("External clock (no CLKOUT)") },
+    { "EC4",    I18N_NOOP("External clock with 4x PLL") },
+    { "EC8",    I18N_NOOP("External clock with 8x PLL") },
+    { "EC16",   I18N_NOOP("External clock with 16x PLL") },
+    { "FRC8",    I18N_NOOP("Internal fast RC oscillator with 8x PLL") },
+    { "EXTRC_CLKOUT", I18N_NOOP("External RC oscillator with CLKOUT") },
+    { "EXTRC_IO",     I18N_NOOP("External RC oscillator (no CLKOUT)") }, { 0, 0 } } },
+  { { "FOSFPR", I18N_NOOP("Oscillator mode") }, Fixed, {
+    { "XTL",          I18N_NOOP("Low-power/low-frequency crystal") },
+    { "HS",           I18N_NOOP("High speed crystal") },
+    { "XT",           I18N_NOOP("XT Crystal") },
+    { "XT4",           I18N_NOOP("XT Crystal with 4x PLL") },
+    { "XT8",           I18N_NOOP("XT Crystal with 8x PLL") },
+    { "XT16",          I18N_NOOP("XT Crystal with 16x PLL") },
+    { "HS2_4",           I18N_NOOP("HS/2 Crystal with 4x PLL") },
+    { "HS2_8",           I18N_NOOP("HS/2 Crystal with 8x PLL") },
+    { "HS2_16",          I18N_NOOP("HS/2 Crystal with 16x PLL") },
+    { "HS3_4",           I18N_NOOP("HS/3 Crystal with 4x PLL") },
+    { "HS3_8",           I18N_NOOP("HS/3 Crystal with 8x PLL") },
+    { "HS3_16",          I18N_NOOP("HS/3 Crystal with 16x PLL") },
+    { "EC_CLKOUT",    I18N_NOOP("External clock with CLKOUT") },
+    { "EC_IO",        I18N_NOOP("External clock (no CLKOUT)") },
+    { "EC4",    I18N_NOOP("External clock with 4x PLL") },
+    { "EC8",    I18N_NOOP("External clock with 8x PLL") },
+    { "EC16",   I18N_NOOP("External clock with 16x PLL") },
+    { "FRC4",    I18N_NOOP("Internal fast RC oscillator with 4x PLL") },
+    { "FRC8",    I18N_NOOP("Internal fast RC oscillator with 8x PLL") },
+    { "FRC16",   I18N_NOOP("Internal fast RC oscillator with 16x PLL") },
+    { "TMR1",   I18N_NOOP("Low-power 32 kHz oscillator (TMR1 oscillator)") },
+    { "INTRC_F", I18N_NOOP("Internal fast RC oscillator (no PLL)") },
+    { "INTRC_LP", I18N_NOOP("Internal low-power RC oscillator") },
+    { "EXTRC_CLKOUT", I18N_NOOP("External RC oscillator with CLKOUT") },
+    { "EXTRC_IO",     I18N_NOOP("External RC oscillator (no CLKOUT)") }, { 0, 0 } } },
+  { { "FWPSA", I18N_NOOP("Watchdog timer prescaler A") }, Ratio, { { 0, 0 } } },
+  { { "FWPSB", I18N_NOOP("Watchdog timer prescaler B") }, Ratio, { { 0, 0 } } },
+  { { "FWDTEN", I18N_NOOP("Watchdog") }, Toggle, {
+    { "Software", I18N_NOOP("Software") }, { 0, 0 } } },
+  { { "FPWRT", I18N_NOOP("Power-on reset timer value (ms)") }, ValueUInt, {
+    { "0", I18N_NOOP("Disabled") }, { 0, 0 } } },
+  { { "GCP", I18N_NOOP("General code segment read-protection") }, MemoryRange, { { 0, 0 } } },
+  { { "GWRP", I18N_NOOP("General code segment write-protection") }, MemoryRange, { { 0, 0 } } },
+  { { "COE", I18N_NOOP("Reset into clip on emulation mode") }, Toggle, { { 0, 0 } } },
+  { { "ICS", I18N_NOOP("ICD communication channel") }, Pins, { { 0, 0 } } },
+
+  { { "USBDIV", I18N_NOOP("USB clock (PLL divided by)") }, ValueUInt, {
+    { "1", I18N_NOOP("not divided") }, { 0, 0 } } },
+  { { "CPUDIV", I18N_NOOP("CPU system clock (divided by)") }, ValueUInt, {
+    { "1", I18N_NOOP("not divided") }, { 0, 0 } } },
+  { { "PLLDIV", I18N_NOOP("PLL clock (divided by)") }, ValueUInt, {
+    { "1", I18N_NOOP("not divided") }, { 0, 0 } } },
+
+  { { "MCPU", I18N_NOOP("Master clear pull-up resistor") }, Toggle, { { 0, 0 } } },
+  { { "IOSCFS", I18N_NOOP("Internal oscillator speed") }, Fixed, {
+    { "8MHZ", I18N_NOOP("8 MHz") },
+    { "4MHZ", I18N_NOOP("4 MHz") }, { 0, 0 } } },
+
+  // 18J specific
+  { { "ETHLED", I18N_NOOP("Ethernet LED enable") }, Toggle, { { 0, 0 } } },
+  { { "FOSC2", I18N_NOOP("Default system clock select") }, Fixed, {
+    { "FOSC1:FOSC0", I18N_NOOP("FOSC1:FOSC0") },
+    { "INTRC", I18N_NOOP("INTRC") }, { 0, 0 } } },
+  { { "EMB", I18N_NOOP("External memory bus") }, Fixed, {
+    { "Disabled", I18N_NOOP("Disabled") },
+    { "12BIT", I18N_NOOP("12-bit external bus") },
+    { "16BIT", I18N_NOOP("16-bit external bus") },
+    { "20BIT", I18N_NOOP("20-bit external bus") }, { 0, 0 } } },
+  { { "EASHFT", I18N_NOOP("External address bus shift") }, Toggle, { { 0, 0 } } },
+  { { "MSSPSEL", I18N_NOOP("MSSP address select bit") }, Fixed, {
+    { "7BIT", I18N_NOOP("7-bit address mask mode") },
+    { "5BIT", I18N_NOOP("5-bit address mask mode") }, { 0, 0 } } },
+  { { "PMPMX", I18N_NOOP("PMP pin select bit") }, Fixed, {
+    { "Connected", I18N_NOOP("Connected to EMB") },
+    { "NotConnected", I18N_NOOP("Not connected to EMB") }, { 0, 0 } } },
+
+  // 24X specific / 30F1010 / 30F202X
+  { { "WRTBS", I18N_NOOP("Boot segment write-protection") }, MemoryRange, { { 0, 0 } } },
+  { { "BSSIZ", I18N_NOOP("Boot segment size") }, ValueUInt, { { 0, 0 } } },
+  { { "BSSEC", I18N_NOOP("Boot segment security") }, Fixed, {
+    { "High Security",     I18N_NOOP("High Security") },
+    { "Standard Security", I18N_NOOP("Standard Security") }, { 0, 0 } } },
+  { { "EBSSIZ", I18N_NOOP("Boot segment EEPROM size") }, ValueUInt, { { 0, 0 } } },
+  { { "RBSSIZ", I18N_NOOP("Boot segment RAM size") }, ValueUInt, { { 0, 0 } } },
+  { { "WRTSS", I18N_NOOP("Secure segment write-protection") }, MemoryRange, { { 0, 0 } } },
+  { { "SSSIZ", I18N_NOOP("Secure segment size") }, ValueUInt, { { 0, 0 } } },
+  { { "SSSEC", I18N_NOOP("Secure segment security") }, Fixed, {
+    { "High Security",     I18N_NOOP("High Security") },
+    { "Standard Security", I18N_NOOP("Standard Security") }, { 0, 0 } } },
+  { { "ESSSIZ", I18N_NOOP("Secure segment EEPROM size") }, ValueUInt, { { 0, 0 } } },
+  { { "RSSSIZ", I18N_NOOP("Secure segment RAM size") }, ValueUInt, { { 0, 0 } } },
+  { { "WRTGS", I18N_NOOP("General segment write-protection") }, MemoryRange, { { 0, 0 } } },
+  { { "GSSEC", I18N_NOOP("General segment security") }, Fixed, {
+    { "Off",                I18N_NOOP("Off") },
+    { "High Security",     I18N_NOOP("High security") },
+    { "Standard Security", I18N_NOOP("Standard security") }, { 0, 0 } } },
+  { { "FNOSC", I18N_NOOP("Initial oscillator source") }, Fixed, {
+    { "EXTRC_F" ,    I18N_NOOP("Fast RC oscillator") },
+    { "INTRC_F",     I18N_NOOP("Internal fast RC oscillator") },
+    { "INTRC_F_PLL", I18N_NOOP("Internal fast RC oscillator with PLL") },
+    { "PRIM",        I18N_NOOP("Primary oscillator") },
+    { "PRIM_PLL",    I18N_NOOP("Primary oscillator with PLL") },
+    { "SECOND",      I18N_NOOP("Secondary oscillator (LP)") },
+    { "EXTRC_LP",    I18N_NOOP("Low power RC oscillator") },
+    { "INTRC_F_POST",  I18N_NOOP("Internal fast RC oscillator with postscaler") }, { 0, 0 } } },
+  { { "POSCMD", I18N_NOOP("Primary oscillator mode") }, Fixed, {
+    { "Off", I18N_NOOP("Off") },
+    { "HS",  I18N_NOOP("HS crystal oscillator") },
+    { "XT",  I18N_NOOP("XT crystal oscillator") },
+    { "EC",  I18N_NOOP("External clock") }, { 0, 0 } } },
+  { { "TEMP", I18N_NOOP("Temperature protection") }, Toggle, { { 0, 0 } } },
+  { { "OSCIOFNC", I18N_NOOP("OSC2 pin function") }, Fixed, {
+    { "IO", I18N_NOOP("Digital I/O") },
+    { "Clock", I18N_NOOP("Clock output") }, { 0, 0 } } },
+  { { "WINDIS", I18N_NOOP("Watchdog timer window") }, Toggle, { { 0, 0 } } },
+  { { "WDTPRE", I18N_NOOP("Watchdog timer prescaler") }, Ratio, { { 0, 0 } } },
+  { { "WDTPOST", I18N_NOOP("Watchdog timer postscaler") }, Ratio, { { 0, 0 } } },
+  { { "JTAGEN", I18N_NOOP("JTAG port enabled") }, Toggle, { { 0, 0 } } },
+  { { "IOL1WAY", I18N_NOOP("Peripheral pin select configuration") }, Fixed, {
+    { "One reconfiguration", I18N_NOOP("Allow only one reconfiguration") },
+    { "Multiple reconfigurations", I18N_NOOP("Allow multiple reconfigurations") }, { 0, 0 } } },
+  { { "ALTI2C", I18N_NOOP("Alternate I2C pins") }, Pin, { { 0, 0 } } },
+  { { "I2C1SEL", I18N_NOOP("I2C pins selection") }, Fixed, {
+    { "Default", I18N_NOOP("Default") },
+    { "Alternate", I18N_NOOP("Alternate") }, { 0, 0 } } },
+  { { "FRANGE", I18N_NOOP("Frequency range selection for FRC oscillator") }, Fixed, {
+    { "High range", I18N_NOOP("High range (nominal FRC frequency is 14.1 MHz)") },
+    { "Low range", I18N_NOOP("Low range (nominal FRC frequency is 9.7 MHz)") }, { 0, 0 } } },
+
+  { { 0, 0 }, Fixed, { { 0, 0 } } }
+};
+
+QMap<QString, Pic::Config::MapData> *Pic::Config::_masks = 0;
+QMap<QString, Pic::Config::MapData> &Pic::Config::masks()
+{
+  if ( _masks==0 ) {
+    _masks = new QMap<QString, MapData>;
+    for (uint i=0; DATA[i].mask.name; i++) {
+      (*_masks)[DATA[i].mask.name] = MapData(i, -1);
+      if ( DATA[i].type==MemoryRange ) {
+        for (uint k=0; k<Protection::MAX_NB_BLOCKS; k++)
+          (*_masks)[QString("%1_%2").arg(DATA[i].mask.name).arg(k)] = MapData(i, k);
+      }
+    }
+  }
+  return *_masks;
+}
+
+bool Pic::Config::hasMaskName(const QString &mask)
+{
+  return masks().contains(mask);
+}
+
+QString Pic::Config::maskLabel(const QString &mask)
+{
+  const MapData &mp = masks()[mask];
+  QString s = i18n(DATA[mp.index].mask.label);
+  if ( mp.block>=0 ) return i18n("%1 for block %2").arg(s).arg(mp.block);
+  return s;
+}
+
+const Pic::Config::Mask *Pic::Config::findMask(const QString &mask, uint *wordIndex) const
+{
+  for (uint i=0; i<uint(_words.count()); i++)
+    for (uint k=0; k<uint(_words[i].masks.count()); k++) {
+      if ( _words[i].masks[k].name==mask ) {
+        if (wordIndex) *wordIndex = i;
+        return &_words[i].masks[k];
+      }
+    }
+  return 0;
+}
+
+const Pic::Config::Value *Pic::Config::findValue(const QString &mask, const QString &value) const
+{
+  const Mask *cmask = findMask(mask);
+  if ( cmask==0 ) return 0;
+  for (uint i=0; i<uint(cmask->values.count()); i++)
+    if ( cmask->values[i].name==value ) return &cmask->values[i];
+  return 0;
+}
+
+bool Pic::Config::checkValueName(const QString &mask, const QString &name) const
+{
+  const Data &data = DATA[masks()[mask].index];
+  QString pinRegexp = "[A-Z]+\\d*(/[A-Z]+\\d*)?";
+  switch (data.type) {
+    case Fixed: break;
+    case ValueDouble: {
+      bool ok;
+      (void)name.toDouble(&ok);
+      if (ok) return true;
+      break;
+    }
+    case ValueUInt: {
+      bool ok;
+      (void)name.toUInt(&ok);
+      if (ok) return true;
+      break;
+    }
+    case Ratio: {
+      QRegExp regexp("(\\d+):(\\d+)");
+      if ( regexp.exactMatch(name) ) {
+        bool ok1, ok2;
+        (void)regexp.cap(1).toUInt(&ok1);
+        (void)regexp.cap(2).toUInt(&ok2);
+        if ( ok1 && ok2 ) return true;
+      }
+      break;
+    }
+    case MemoryRange:
+      return _protection.checkRange(mask, name);
+    case Toggle:
+      if ( name=="On" || name=="Off" ) return true;
+      break;
+    case Pin: {
+      QRegExp regexp(pinRegexp);
+      if ( regexp.exactMatch(name) ) return true;
+      break;
+    }
+    case Pins: {
+      QRegExp regexp(pinRegexp + "(, " + pinRegexp + ")+");
+      if ( regexp.exactMatch(name) ) return true;
+      break;
+    }
+  }
+  for (uint i=0; data.values[i].name; i++)
+    if ( data.values[i].name==name ) return true;
+  return false;
+}
+
+QString Pic::Config::valueLabel(const QString &mask, const QString &name)
+{
+  const Data &data = DATA[masks()[mask].index];
+  switch (data.type) {
+    case Fixed:
+    case ValueDouble:
+    case ValueUInt:
+    case Pin:
+    case Pins:
+    case Ratio: break;
+    case MemoryRange:
+      if ( name=="All" ) return i18n("All");
+      if ( name=="Off" ) return i18n("Disabled");
+      break;
+    case Toggle:
+      if ( name=="On" ) return i18n("Enabled");
+      if ( name=="Off" ) return i18n("Disabled");
+      break;
+  }
+  for (uint i=0; data.values[i].name; i++)
+    if ( data.values[i].name==name ) return i18n(data.values[i].label);
+  return name;
+}
+
+BitValue Pic::Config::Word::usedMask() const
+{
+  BitValue mask = 0x0;
+  for (uint i=0; i<uint(masks.count()); i++) mask |= masks[i].value;
+  return mask;
+}
+
+//-----------------------------------------------------------------------------
+QDataStream &Pic::operator <<(QDataStream &s, const Config::Value &value)
+{
+  s << value.name << value.configNames << value.value;
+  return s;
+}
+QDataStream &Pic::operator >>(QDataStream &s, Config::Value &value)
+{
+  s >> value.name >> value.configNames >> value.value;
+  return s;
+}
+
+QDataStream &Pic::operator <<(QDataStream &s, const Config::Mask &mask)
+{
+  s << mask.name << mask.value << mask.values;
+  return s;
+}
+QDataStream &Pic::operator >>(QDataStream &s, Config::Mask &mask)
+{
+  s >> mask.name >> mask.value >> mask.values;
+  return s;
+}
+
+QDataStream &Pic::operator <<(QDataStream &s, const Config::Word &word)
+{
+  s << word.name << word.ignoredCNames << word.wmask << word.pmask << word.cmask << word.bvalue << word.masks;
+  return s;
+}
+QDataStream &Pic::operator >>(QDataStream &s, Config::Word &word)
+{
+  s >> word.name >> word.ignoredCNames >> word.wmask >> word.pmask >> word.cmask >> word.bvalue >> word.masks;
+  return s;
+}
+
+QDataStream &Pic::operator <<(QDataStream &s, const Config &config)
+{
+  s << config._words;
+  return s;
+}
+QDataStream &Pic::operator >>(QDataStream &s, Config &config)
+{
+  s >> config._words;
+  return s;
+}
diff --git a/src/devices/pic/base/pic_config.h b/src/devices/pic/base/pic_config.h
new file mode 100644
index 0000000..185a19e
--- /dev/null
+++ b/src/devices/pic/base/pic_config.h
@@ -0,0 +1,107 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PIC_CONFIG_H
+#define PIC_CONFIG_H
+
+#include <qmap.h>
+#include <qstringlist.h>
+
+#include "common/common/bitvalue.h"
+#include "pic_protection.h"
+#include "pic.h"
+
+namespace Pic
+{
+class Data;
+
+BEGIN_DECLARE_ENUM(ConfigNameType)
+  Default = 0, Extra, SDCC
+END_DECLARE_ENUM_STD(ConfigNameType)
+
+class Config
+{
+public:
+  class Value {
+  public:
+    QString name;
+    QMap<ConfigNameType, QStringList> configNames;
+    BitValue value;
+    bool operator <(const Value &cv) const { return value<cv.value; }
+    bool isValid() const { return !name.isEmpty(); }
+  };
+
+  class Mask {
+  public:
+    QString name;
+    BitValue value;
+    QValueVector<Value> values; // ordered from lower to higher
+    bool operator <(const Mask &cm) const { return value<cm.value; }
+  };
+
+  class Word {
+  public:
+    QString name;
+    QStringList ignoredCNames;
+    BitValue wmask, pmask, cmask; // write, protected, and checksum bits masks
+    BitValue bvalue;              // blank value
+    QValueVector<Mask> masks; // ordered from lower to higher
+    BitValue usedMask() const;
+  };
+
+public:
+  Config(const Pic::Data &data) : _data(data), _protection(data, *this) {}
+  QValueVector<Word> _words;
+  const Protection &protection() const { return _protection; }
+
+  const Value *findValue(const QString &mask, const QString &value) const;
+  const Mask *findMask(const QString &mask, uint *wordIndex = 0) const;
+  static bool hasMaskName(const QString &mask);
+  static QString maskLabel(const QString &mask);
+  bool checkValueName(const QString &mask, const QString &name) const;
+  static QString valueLabel(const QString &mask, const QString &name);
+
+private:
+  class MapData {
+  public:
+    MapData() {}
+    MapData(int i, int b) : index(i), block(b) {}
+    int index, block;
+  };
+  static QMap<QString, MapData> &masks();
+  static QMap<QString, MapData> *_masks; // mask name -> index in DATA
+
+  struct NameData {
+    const char *name, *label;
+  };
+  enum Type { Fixed, ValueDouble, ValueUInt, Ratio, MemoryRange, Toggle, Pin, Pins };
+  class Data {
+  public:
+    const NameData mask;
+    Type type;
+    const NameData values[50];
+  };
+  static const Data DATA[];
+
+private:
+  const Pic::Data &_data;
+  Protection _protection;
+};
+
+QDataStream &operator <<(QDataStream &s, const Config::Value &value);
+QDataStream &operator >>(QDataStream &s, Config::Value &value);
+QDataStream &operator <<(QDataStream &s, const Config::Mask &mask);
+QDataStream &operator >>(QDataStream &s, Config::Mask &mask);
+QDataStream &operator <<(QDataStream &s, const Config::Word &word);
+QDataStream &operator >>(QDataStream &s, Config::Word &word);
+QDataStream &operator <<(QDataStream &s, const Config &config);
+QDataStream &operator >>(QDataStream &s, Config &config);
+
+} //namespace
+
+#endif
diff --git a/src/devices/pic/base/pic_protection.cpp b/src/devices/pic/base/pic_protection.cpp
new file mode 100644
index 0000000..da77881
--- /dev/null
+++ b/src/devices/pic/base/pic_protection.cpp
@@ -0,0 +1,361 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pic_protection.h"
+
+#include "pic_config.h"
+
+#include <qregexp.h>
+
+bool Pic::Protection::isNoneProtectedValueName(const QString &name) const
+{
+  if ( name=="Off" ) return true;
+  if ( _data.architecture()==Architecture::P17C ) return !isAllProtectedValueName(name);
+  return false;
+}
+
+bool Pic::Protection::isAllProtectedValueName(const QString &name) const
+{
+  if ( name=="All" ) return true;
+  if ( _data.architecture()==Architecture::P17C ) return ( name=="Code-protected microcontroller" );
+  return false;
+}
+
+Pic::Protection::Family Pic::Protection::family() const
+{
+  if ( _config.findMask("WRTBS") ) return CodeGuard;
+  QString mask = maskName(ProgramProtected, MemoryRangeType::Code);
+  if ( _config.findMask(QString("%1_%2").arg(mask).arg(0)) ) return BlockProtection;
+  if ( _config.findMask(mask) ) return BasicProtection;
+  return NoProtection;
+}
+
+QString Pic::Protection::securityValueName(Type type) const
+{
+  if ( type==StandardSecurity ) return "Standard Security";
+  if ( type==HighSecurity ) return "High Security";
+  Q_ASSERT( type==Nb_Types );
+  return "Off";
+}
+
+QString Pic::Protection::bootSizeMaskName() const
+{
+  return (family()==CodeGuard ? "BSSIZ" : "BBSIZ");
+}
+
+QString Pic::Protection::bootMaskName(Type type) const
+{
+  Q_ASSERT( type!=Nb_Types );
+  if ( family()==CodeGuard ) {
+    if ( type==WriteProtected ) return "WRTBS";
+    if ( type==StandardSecurity || type==HighSecurity ) return "BSSEC";
+  } else {
+    if ( type==ProgramProtected ) return "CPB";
+    if ( type==WriteProtected ) return "WRTB";
+    if ( type==ReadProtected ) return "EBTRB";
+  }
+  return QString::null;
+}
+
+QString Pic::Protection::blockSizeMaskName(uint block) const
+{
+  if ( family()==CodeGuard ) {
+    Q_ASSERT( block==0 );
+    return "SSSIZ";
+  }
+  return blockMaskName(ProgramProtected, block);
+}
+
+QString Pic::Protection::blockMaskName(Type type, uint block) const
+{
+  Q_ASSERT( type!=Nb_Types );
+  if ( family()==CodeGuard ) {
+    if ( type==WriteProtected ) return (block==0 ? "WRTSS" : "WRTGS");
+    if ( type==StandardSecurity || type==HighSecurity ) return (block==0 ? "SSSEC" : "GSSEC");
+    return QString::null;
+  }
+  return QString("%1_%2").arg(maskName(type, MemoryRangeType::Code)).arg(block);
+}
+
+QString Pic::Protection::maskName(Type type, MemoryRangeType mtype) const
+{
+  Q_ASSERT( type!=Nb_Types );
+  switch (mtype.type()) {
+    case MemoryRangeType::Code:
+      if ( type==ProgramProtected ) {
+        if ( _data.architecture()==Architecture::P17C ) return "PM";
+        if ( _data.architecture()==Architecture::P30F || _data.architecture()==Architecture::P24F ) return "GCP";
+        return "CP";
+      }
+      if ( type==WriteProtected ) {
+        if ( _data.architecture()==Architecture::P30F || _data.architecture()==Architecture::P24F ) return "GWRP";
+        return "WRT";
+      }
+      if ( type==ReadProtected ) return "EBTR";
+      break;
+    case MemoryRangeType::Eeprom:
+      if ( type==ProgramProtected ) return "CPD";
+      if ( type==WriteProtected ) return "WRTD";
+      break;
+    case MemoryRangeType::Cal:
+      if ( type==ProgramProtected ) return "CPC";
+      break;
+    case MemoryRangeType::Config:
+      if ( type==WriteProtected ) return "WRTC";
+      if ( type==ReadProtected ) return "EBTRC";
+      break;
+    case MemoryRangeType::Nb_Types: Q_ASSERT(false); break;
+    default: break;
+  }
+  return QString::null;
+}
+
+bool Pic::Protection::extractRanges(const QString &name, QValueVector<Address> &starts, Address &end, bool &ok)
+{
+  ok = false;
+  QRegExp regexp("([A-F0-9]+)(/[A-F0-9]+)?(/[A-F0-9]+)?:([A-F0-9]+)");
+  if ( !regexp.exactMatch(name) ) return false;
+  bool ok1;
+  end = fromHex(regexp.cap(regexp.numCaptures()), &ok1);
+  if ( !ok1 ) {
+    qDebug("Malformed end address");
+    return true;
+  }
+  starts.clear();
+  for (int i=1; i<regexp.numCaptures(); i++) {
+    if ( regexp.cap(i).isEmpty() ) break;
+    bool ok1;
+    QString s = (i==1 ? regexp.cap(i) : regexp.cap(i).mid(1));
+    Address start = fromHex(s, &ok1);
+    if ( !ok1 ) {
+      qDebug("Malformed start address %s", s.latin1());
+      return true;
+    }
+    if ( start>=end && (starts.count()==0 || starts[starts.count()-1]<start) ) {
+      qDebug("Start addresses should be ordered");
+      return true;
+    }
+    starts.append(start);
+  }
+  ok = true;
+  return true;
+}
+
+AddressRangeVector Pic::Protection::extractRanges(const QString &name, MemoryRangeType type) const
+{
+  if ( isNoneProtectedValueName(name) ) return AddressRange();
+  if ( isAllProtectedValueName(name) ) {
+    const MemoryRangeData &rdata = _data.range(type);
+    return AddressRange(rdata.start, rdata.end);
+  }
+  bool ok1;
+  QValueVector<Address> starts;
+  Address end;
+  bool ok2 = extractRanges(name, starts, end, ok1);
+  Q_ASSERT(ok1);
+  Q_ASSERT(ok2);
+  Q_UNUSED(ok2);
+  AddressRangeVector rv;
+  for (uint i=0; i<uint(starts.count()); i++) rv.append(AddressRange(starts[i], end));
+  return rv;
+}
+
+bool Pic::Protection::checkRange(const QString &mask, const QString &name) const
+{
+  if ( family()!=CodeGuard ) {
+    bool ok;
+    (void)extractRange(mask, name, ok);
+    return ok;
+  }
+
+  bool isBootBlock = false;
+  int block = 0;
+  Type ptype = Nb_Types;
+  for (uint i=0; i<3; i++) {
+    isBootBlock = ( i==0 );
+    block = i - 1;
+    for (uint k=0; k<Nb_Types; k++) {
+      QString mname = (isBootBlock ? bootMaskName(Type(k)) : blockMaskName(Type(k), block));
+      if ( mask!=mname ) continue;
+      ptype = Type(k);
+      break;
+    }
+    if ( ptype!=Nb_Types ) break;
+  }
+  if ( ptype==Nb_Types ) {
+    qDebug("Unknown protected memory range");
+    return false;
+  }
+  // #### TODO
+  return true;
+}
+
+Pic::Protection::ProtectedRange Pic::Protection::extractRange(const QString &mask, const QString &name, bool &ok) const
+{
+  Q_ASSERT( family()!=CodeGuard );
+  //qDebug("extract range %s %s", mask.latin1(), name.latin1());
+  ProtectedRange pr;
+  ok = false;
+
+  QRegExp rexp("([A-Z]+)(?:_([0-9])|)");
+  if ( !rexp.exactMatch(mask) ) {
+    qDebug("Malformed block range");
+    return pr;
+  }
+
+  bool isBootBlock = false;
+  MemoryRangeType rtype = MemoryRangeType::Nb_Types;
+  Type ptype = Nb_Types;
+
+  for (MemoryRangeType type; type<=MemoryRangeType::Nb_Types; ++type) { // #### danger: <=
+    isBootBlock = ( type==MemoryRangeType::Nb_Types );
+    for (uint k=0; k<Nb_Types; k++) {
+      QString mname = (isBootBlock ? bootMaskName(Type(k)) : maskName(Type(k), type));
+      if ( rexp.cap(1)!=mname ) continue;
+      rtype = (isBootBlock ? MemoryRangeType(MemoryRangeType::Code) : type);
+      ptype = Type(k);
+      if ( !rexp.cap(2).isEmpty() ) {
+        if ( isBootBlock || (rtype!=MemoryRangeType::Code && rtype!=MemoryRangeType::Eeprom) ) {
+          qDebug("Multiple blocks only for code and eeprom");
+          return pr;
+        }
+      }
+      break;
+    }
+    if ( rtype!=MemoryRangeType::Nb_Types ) break;
+  }
+  if ( rtype==MemoryRangeType::Nb_Types ) {
+    qDebug("Unknown protected memory range");
+    return pr;
+  }
+
+  if ( isNoneProtectedValueName(name) ) {
+    ok = true;
+    return pr;
+  }
+
+  const Config::Mask *bmask = _config.findMask(bootMaskName(ptype));
+  const Config::Mask *bsmask = _config.findMask(bootSizeMaskName());
+  const MemoryRangeData &rdata = _data.range(rtype);
+  if ( isAllProtectedValueName(name) ) {
+    if ( rtype==MemoryRangeType::Code && !isBootBlock && bmask ) {
+      qDebug("Protected range should be explicit with boot block");
+      return pr;
+    }
+    if (isBootBlock) {
+      if ( bsmask==0 ) {
+        qDebug("Protected range should be explicit when boot size not present");
+        return pr;
+      }
+      Address start = _data.range(MemoryRangeType::Code).start;
+      pr.starts.append(start);
+      for (uint k=0; k<uint(bsmask->values.count()); k++) {
+        bool ok1;
+        uint size = bsmask->values[k].name.toUInt(&ok1);
+        if ( !ok1 ) {
+          qDebug("Could not recognize boot size value");
+          return pr;
+        }
+        if ( size==0 ) {
+          qDebug("Boot size cannot be zero");
+          return pr;
+        }
+        Address end = 2 * size - 1; // instruction words
+        if ( pr.ends.count()!=0 && end==pr.ends[pr.ends.count()-1] ) continue;
+        pr.ends.append(end);
+        qHeapSort(pr.ends);
+      }
+    } else {
+      pr.starts.append(rdata.start);
+      pr.ends.append(rdata.end);
+    }
+    ok = true;
+    return pr;
+  }
+  if ( isBootBlock && bsmask ) {
+    qDebug("Protected range should not be explicit when boot size is present");
+    return pr;
+  }
+
+  // extract start and end
+  Address end;
+  bool ok1;
+  if ( !extractRanges(name, pr.starts, end, ok1) ) {
+    qDebug("Could not recognized explicit range");
+    return pr;
+  }
+  if ( !ok1 ) return pr;
+  if ( end>rdata.end ) {
+    qDebug("End is beyond memory range");
+    return pr;
+  }
+  if ( (rtype!=MemoryRangeType::Code || isBootBlock) && (pr.starts.count()>1 || !rexp.cap(2).isEmpty() || bmask==0)  ) {
+    qDebug("Only code with blocks and boot can have multiple protected ranges");
+    return pr;
+  }
+  if ( isBootBlock && pr.starts[0]!=0 ) {
+    qDebug("Boot block start should be zero");
+    return pr;
+  }
+  pr.ends.append(end);
+
+  // check with boot block
+  if ( pr.starts.count()>1 ) {
+    if ( bmask==0 ) {
+      qDebug("No boot mask");
+      return pr;
+    }
+    for (uint i=0; i<uint(bmask->values.count()); i++) {
+      if ( bmask->values[i].name=="Off" ) continue;
+      bool ok1;
+      ProtectedRange bpr = extractRange(bmask->name, bmask->values[i].name, ok1);
+      if ( !ok1 ) return pr;
+      if ( bpr.ends.count()!=pr.starts.count() ) {
+        qDebug("Boot number of ends (%i) should be the same as code number of starts (%i)", int(bpr.ends.count()), int(pr.starts.count()));
+        return pr;
+      }
+      for (uint k=0; k<uint(bpr.ends.count()); k++) {
+        if ( bpr.ends[k]+1!=pr.starts[k] ) {
+          qDebug("%i: End of boot block (%s) doesn't match start of code block (%s)", k, toHexLabelAbs(bpr.ends[k]).latin1(), toHexLabelAbs(pr.starts[k]).latin1());
+          return pr;
+        }
+      }
+    }
+  }
+
+  ok = true;
+  return pr;
+}
+
+bool Pic::Protection::hasBootBlock() const
+{
+  return ( _config.findMask("CPB") || _config.findMask(bootSizeMaskName()) );
+}
+
+uint Pic::Protection::nbBlocks() const
+{
+  if ( family()==CodeGuard ) return 2; // codeguard : secure segment + general segment
+  for (uint i=0; i<MAX_NB_BLOCKS; i++)
+    if ( _config.findMask(QString("CP_%1").arg(i))==0 ) return i;
+  return MAX_NB_BLOCKS;
+}
+
+QString Pic::Protection::bootLabel() const
+{
+  if ( family()==CodeGuard ) return i18n("Boot Segment");
+  return i18n("Boot Block");
+}
+
+QString Pic::Protection::blockLabel(uint i) const
+{
+  if ( family()==CodeGuard ) {
+    if ( i==0 ) return i18n("Secure Segment");
+    return i18n("General Segment");
+  }
+  return i18n("Block #%1").arg(i);
+}
diff --git a/src/devices/pic/base/pic_protection.h b/src/devices/pic/base/pic_protection.h
new file mode 100644
index 0000000..67ff667
--- /dev/null
+++ b/src/devices/pic/base/pic_protection.h
@@ -0,0 +1,60 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PIC_PROTECTION_H
+#define PIC_PROTECTION_H
+
+#include "pic.h"
+
+namespace Pic
+{
+class Data;
+
+//----------------------------------------------------------------------------
+class Protection
+{
+public:
+  enum { MAX_NB_BLOCKS = 8 };
+  enum Family { NoProtection = 0, BasicProtection, BlockProtection, CodeGuard, Nb_Families };
+  enum Type { ProgramProtected = 0, WriteProtected, ReadProtected,
+              StandardSecurity, HighSecurity, Nb_Types };
+
+public:
+  Protection(const Pic::Data &data, const Config &config) : _data(data), _config(config) {}
+  Family family() const;
+  QString securityValueName(Type type) const;
+  bool hasBootBlock() const;
+  QString bootSizeMaskName() const;
+  QString bootMaskName(Type ptype) const;
+  QString bootLabel() const;
+  uint nbBlocks() const;
+  QString blockSizeMaskName(uint i) const;
+  QString blockMaskName(Type ptype, uint i) const;
+  QString blockLabel(uint i) const;
+  AddressRangeVector extractRanges(const QString &name, MemoryRangeType type) const;
+  bool checkRange(const QString &mask, const QString &name) const;
+  QString maskName(Type type, MemoryRangeType mtype) const;
+  bool isAllProtectedValueName(const QString &valueName) const;
+  bool isNoneProtectedValueName(const QString &valueName) const;
+
+private:
+  const Pic::Data &_data;
+  const Config    &_config;
+
+  enum SegmentType { BootSegment = 0, SecureSegment, GeneralSegment, Nb_SegmentTypes };
+  static bool extractRanges(const QString &name, QValueVector<Address> &starts, Address &end, bool &ok);
+  class ProtectedRange {
+  public:
+    QValueVector<Address> starts, ends;
+  };
+  ProtectedRange extractRange(const QString &mask, const QString &name, bool &ok) const;
+};
+
+} //namespace
+
+#endif
diff --git a/src/devices/pic/base/pic_register.cpp b/src/devices/pic/base/pic_register.cpp
new file mode 100644
index 0000000..fcfe5ef
--- /dev/null
+++ b/src/devices/pic/base/pic_register.cpp
@@ -0,0 +1,287 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pic_register.h"
+
+#include "pic.h"
+
+//-----------------------------------------------------------------------------
+Pic::RegistersData::RegistersData(const Data &data)
+  : nbBanks(0), accessBankSplit(0), _data(data)
+{}
+
+Address Pic::RegistersData::mirroredAddress(Address address) const
+{
+  Address mirror = address;
+  for (uint i=0; i<uint(mirrored.count()); i++) {
+    int delta = -1;
+    for (uint k=0; k<uint(mirrored[i].count()); k++) {
+      if ( address<mirrored[i][k].start
+           || address>=mirrored[i][k].start+mirrored[i][k].length ) continue;
+      delta = address - mirrored[i][k].start;
+      break;
+    }
+    if ( delta==-1 ) continue;
+    for (uint k=0; k<uint(mirrored[i].count()); k++)
+      mirror = QMIN(mirrored[i][k].start + delta, mirror);
+    break;
+  }
+  return mirror;
+}
+
+Device::RegisterProperties Pic::RegistersData::properties(Address address) const
+{
+  switch ( type(address) ) {
+    case Mirrored:
+    case UnusedRegister: return Device::NotAccessible;
+    case Gpr: return (Device::Readable | Device::Writable);
+    case Sfr: {
+      Device::RegisterProperties properties = Device::NotAccessible;
+      RegisterBitProperties rbp = RegisterBitUnused;
+      QMap<QString, RegisterData>::const_iterator it;
+      for (it=sfrs.begin(); it!=sfrs.end(); ++it) {
+        if ( it.data().address!=address ) continue;
+        for (uint i=0; i<Device::MAX_NB_PORT_BITS; i++) rbp |= it.data().bits[i].properties;
+        if ( rbp & RegisterBitRead ) properties |= Device::Readable;
+        if ( rbp & RegisterBitWrite ) properties |= Device::Writable;
+        break;
+      }
+      return properties;
+    }
+  }
+  Q_ASSERT(false);
+  return Device::NotAccessible;
+}
+
+Pic::RegisterType Pic::RegistersData::type(Address address) const
+{
+  for (uint i=0; i<uint(unused.count()); i++)
+    if ( address>=unused[i].start && address<unused[i].start+unused[i].length ) return UnusedRegister;
+  if ( !sfrNames[address].isEmpty() ) return Sfr;
+  Address mirror = mirroredAddress(address);
+  if ( !sfrNames[mirror].isEmpty() ) return Mirrored;
+  if ( address==mirror ) return Gpr;
+  return Mirrored;
+}
+
+QString Pic::RegistersData::label(Address address) const
+{
+  switch ( type(address) ) {
+    case UnusedRegister: return "---";
+    case Mirrored: return i18n("Mirror of %1").arg(toHexLabel(mirroredAddress(address), nbCharsAddress()));
+    case Gpr: return "<GPR>";
+    case Sfr: return sfrNames[address];
+  }
+  Q_ASSERT(false);
+  return QString::null;
+}
+
+bool Pic::RegistersData::hasPort(uint index) const
+{
+  Q_ASSERT( index<Device::MAX_NB_PORTS );
+  if ( sfrs.contains("GPIO") ) return ( index==0 );
+  if ( !sfrs.contains(portName(index)) ) return false;
+  return true;
+}
+
+int Pic::RegistersData::portIndex(Address address) const
+{
+  QString name = sfrNames[address];
+  if ( name.isEmpty() ) return -1;
+  for (uint i=0; i<Device::MAX_NB_PORTS; i++) {
+    if ( !hasPort(i) ) continue;
+    if ( name==portName(i) || name==trisName(i) || name==latchName(i) ) return i;
+  }
+  return -1;
+}
+
+bool Pic::RegistersData::hasPortBit(uint index, uint bit) const
+{
+  if ( !hasPort(index) ) return false;
+  const RegisterData &port = sfrs[portName(index)];
+  return ( port.bits[bit].properties!=RegisterBitUnused );
+}
+
+QString Pic::RegistersData::portName(uint index) const
+{
+  if ( sfrs.contains("GPIO") ) {
+    if ( index!=0 ) return QString::null;
+    return "GPIO";
+  }
+  return QString("PORT") + char('A' + index);
+}
+
+QString Pic::RegistersData::trisName(uint index) const
+{
+  if ( sfrs.contains("GPIO") ) {
+    if ( index!=0 ) return QString::null;
+    return "TRISIO";
+  }
+  if ( _data.architecture()==Architecture::P17C ) {
+    if ( index==0 ) return QString::null;
+    return QString("DDR") + char('A' + index);
+  }
+  return QString("TRIS") + char('A' + index);
+}
+
+bool Pic::RegistersData::hasTris(uint index) const
+{
+  QString name = trisName(index);
+  if ( name.isEmpty() ) return false;
+  return sfrs.contains(name);
+}
+
+QString Pic::RegistersData::latchName(uint index) const
+{
+  if ( _data.architecture()==Architecture::P10X || _data.architecture()==Architecture::P16X || _data.architecture()==Architecture::P17C )
+    return QString::null;
+  return QString("LAT") + char('A' + index);
+}
+
+bool Pic::RegistersData::hasLatch(uint index) const
+{
+  QString name = latchName(index);
+  if ( name.isEmpty() ) return false;
+  return sfrs.contains(name);
+}
+
+QString Pic::RegistersData::portBitName(uint index, uint bit) const
+{
+  if ( sfrs.contains("GPIO") ) return QString("GP") + QString::number(bit);
+  return QString("R") + char('A' + index) + QString::number(bit);
+}
+
+QValueList<Register::TypeData> Pic::RegistersData::relatedRegisters(const Register::TypeData &data) const
+{
+  QValueList<Register::TypeData> list;
+  if ( data.type()==Register::Regular ) {
+    int i = portIndex(data.address());
+    if ( i==-1 ) list.append(data);
+    else {
+      list.append(Register::TypeData(sfrs[portName(i)].address, nbChars()));
+      if ( hasTris(i) ) list.append(Register::TypeData(sfrs[trisName(i)].address, nbChars()));
+      if ( hasLatch(i) ) list.append(Register::TypeData(sfrs[latchName(i)].address, nbChars()));
+    }
+  } else if ( data.type()==Register::Combined ) {
+    uint nb = nbBitsToNbBytes(4*data.nbChars()) / nbBytes();
+    for (uint i=0; i<nb; i++) list.append(Register::TypeData(data.address() + i*nbBytes(), nbChars()));
+  } else list.append(data);
+  return list;
+}
+
+bool Pic::RegistersData::isBankUsed(uint i) const
+{
+  Q_ASSERT( i<nbBanks );
+  return !(unusedBankMask & (1 << i));
+}
+
+bool Pic::RegistersData::bankHasSfrs(uint i) const
+{
+  if ( i==0 ) return true;
+  if ( (_data.architecture()==Pic::Architecture::P18F || _data.architecture()==Pic::Architecture::P18J) && i==15 ) return true;
+  if ( !isBankUsed(i) ) return false;
+  QMap<Address, QString>::const_iterator it;
+  for (it=sfrNames.begin(); it!=sfrNames.end(); ++it)
+    if ( bankFromAddress(it.key())==i ) return true;
+  return false;
+}
+
+bool Pic::RegistersData::hasSharedGprs(uint &firstIndex, bool &all) const
+{
+  bool ok = false;
+  all = true;
+  for (uint i=0; i<nbRegistersPerBank(); i++) {
+    Address address = addressFromIndex(i);
+    if ( type(address)!=Gpr ) continue;
+    uint k = 1;
+    for (; k<nbBanks; k++) {
+      RegisterType t = type(address + k*nbBytesPerBank());
+      if ( t!=Mirrored ) break;
+    }
+    if ( k==nbBanks ) {
+      if ( !ok ) firstIndex = i;
+      ok = true;
+    } else all = false;
+  }
+  return ok;
+}
+
+uint Pic::RegistersData::firstGprIndex() const
+{
+  for (uint i=0; i<nbRegistersPerBank(); i++)
+    if ( type(addressFromIndex(i))==Gpr ) return i;
+  Q_ASSERT(false);
+  return 0;
+}
+
+//----------------------------------------------------------------------------
+QDataStream &Pic::operator <<(QDataStream &s, const RangeData &rd)
+{
+  s << rd.start << rd.length;
+  return s;
+}
+QDataStream &Pic::operator >>(QDataStream &s, RangeData &rd)
+{
+  s >> rd.start >> rd.length;
+  return s;
+}
+
+QDataStream &Pic::operator <<(QDataStream &s, const RegisterBitData &rbd)
+{
+  s << Q_UINT8(rbd.properties) << Q_UINT8(rbd.por) << Q_UINT8(rbd.mclr);
+  return s;
+}
+QDataStream &Pic::operator >>(QDataStream &s, RegisterBitData &rbd)
+{
+  Q_UINT8 properties, por, mclr;
+  s >> properties >> por >> mclr;
+  rbd.properties = RegisterBitProperties(properties);
+  rbd.por = RegisterBitState(por);
+  rbd.mclr = RegisterBitState(mclr);
+  return s;
+}
+
+QDataStream &Pic::operator <<(QDataStream &s, const RegisterData &rd)
+{
+  s << rd.address;
+  for (int i=0; i<Device::MAX_NB_PORT_BITS; i++) s << rd.bits[i];
+  return s;
+}
+QDataStream &Pic::operator >>(QDataStream &s, RegisterData &rd)
+{
+  s >> rd.address;
+  for (int i=0; i<Device::MAX_NB_PORT_BITS; i++) s >> rd.bits[i];
+  return s;
+}
+
+QDataStream &Pic::operator <<(QDataStream &s, const CombinedData &rd)
+{
+  s << rd.address << rd.nbChars;
+  return s;
+}
+QDataStream &Pic::operator >>(QDataStream &s, CombinedData &rd)
+{
+  s >> rd.address >> rd.nbChars;
+  return s;
+}
+
+QDataStream &Pic::operator <<(QDataStream &s, const RegistersData &rd)
+{
+  s << rd.nbBanks << rd.accessBankSplit << rd.unusedBankMask;
+  s << rd.sfrs << rd.mirrored << rd.unused << rd.combined;
+  return s;
+}
+QDataStream &Pic::operator >>(QDataStream &s, RegistersData &rd)
+{
+  s >> rd.nbBanks >> rd.accessBankSplit >> rd.unusedBankMask;
+  s >> rd.sfrs >> rd.mirrored >> rd.unused >> rd.combined;
+  rd.sfrNames.clear();
+  QMap<QString, RegisterData>::const_iterator it;
+  for(it=rd.sfrs.begin(); it!=rd.sfrs.end(); ++it) rd.sfrNames[it.data().address] = it.key();
+  return s;
+}
diff --git a/src/devices/pic/base/pic_register.h b/src/devices/pic/base/pic_register.h
new file mode 100644
index 0000000..41da020
--- /dev/null
+++ b/src/devices/pic/base/pic_register.h
@@ -0,0 +1,115 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PIC_REGISTER_H
+#define PIC_REGISTER_H
+
+#include <qmap.h>
+
+#include "devices/base/register.h"
+#include "pic.h"
+
+namespace Pic
+{
+class Data;
+struct RangeData {
+  Address start;
+  uint length;
+};
+
+//-----------------------------------------------------------------------------
+enum RegisterType { UnusedRegister, Sfr, Gpr, Mirrored};
+enum RegisterBitProperty { RegisterBitUnused = 0x0,
+  RegisterBitRead = 0x1, RegisterBitWrite = 0x2,
+  RegisterBitOnlySoftwareClear = 0x4, RegisterBitOnlySoftwareSet = 0x8,
+  MaxRegisterBitProperty = 0x15
+};
+Q_DECLARE_FLAGS(RegisterBitProperties, RegisterBitProperty)
+Q_DECLARE_OPERATORS_FOR_FLAGS(RegisterBitProperties)
+enum RegisterBitState { RegisterBitUnknown = 0, RegisterBitLow, RegisterBitHigh,
+  RegisterBitUnchanged, RegisterBitDepends, RegisterBitDependsConfig, Nb_RegisterBitStates
+};
+
+//-----------------------------------------------------------------------------
+class RegisterBitData
+{
+public:
+  RegisterBitData() : properties(RegisterBitUnused) {}
+  RegisterBitProperties properties;
+  RegisterBitState por, mclr;
+};
+struct RegisterData
+{
+  Address address;
+  RegisterBitData bits[Device::MAX_NB_PORT_BITS];
+};
+struct CombinedData
+{
+  Address address;
+  uint    nbChars;
+};
+
+class RegistersData : public Device::RegistersData
+{
+public:
+  RegistersData(const Data &data);
+  virtual uint nbBits() const { return _data.architecture().data().nbBitsRegister; }
+  uint nbBytesPerBank() const { return _data.architecture().data().registerBankLength; }
+  uint nbRegistersPerBank() const { return nbBytesPerBank() / nbBytes(); }
+  uint nbCharsAddress() const { return ::nbChars(nbRegisters() - 1); }
+  virtual uint nbRegisters() const { return nbBanks * nbRegistersPerBank(); }
+  virtual uint addressFromIndex(uint i) const { return nbBytes() * i; }
+  virtual uint indexFromAddress(Address address) const { return address.toUInt() / nbBytes(); }
+  bool isBankUsed(uint i) const;
+  uint bankFromAddress(Address address) const { return indexFromAddress(address) / nbRegistersPerBank(); }
+  bool bankHasSfrs(uint i) const; // slow
+  bool hasSharedGprs(uint &firstIndex, bool &all) const; // i.e. mirrored in all banks (all is for first bank only)
+  uint firstGprIndex() const; // in first bank
+
+  uint nbBanks, accessBankSplit, unusedBankMask;
+  QMap<QString, RegisterData> sfrs;
+  QMap<Address, QString> sfrNames; // address -> name
+  QValueVector<QValueVector<RangeData> > mirrored;
+  QValueVector<RangeData> unused;
+  QMap<QString, CombinedData> combined;
+
+  virtual Device::RegisterProperties properties(Address address) const;
+  RegisterType type(Address address) const;
+  QString label(Address address) const;
+  virtual QValueList<Register::TypeData> relatedRegisters(const Register::TypeData &data) const;
+
+  virtual bool hasPort(uint index) const;
+  virtual int portIndex(Address address) const;
+  virtual QString portName(uint index) const;
+  bool hasTris(uint index) const;
+  QString trisName(uint index) const;
+  bool hasLatch(uint index) const;
+  QString latchName(uint index) const;
+  virtual bool hasPortBit(uint index, uint bit) const;
+  virtual QString portBitName(uint index, uint bit) const;
+
+private:
+  const Data &_data;
+  Address mirroredAddress(Address address) const;
+};
+
+//-----------------------------------------------------------------------------
+QDataStream &operator <<(QDataStream &s, const RangeData &rd);
+QDataStream &operator >>(QDataStream &s, RangeData &rd);
+QDataStream &operator <<(QDataStream &s, const RegisterBitData &rbd);
+QDataStream &operator >>(QDataStream &s, RegisterBitData &rbd);
+QDataStream &operator <<(QDataStream &s, const RegisterData &rd);
+QDataStream &operator >>(QDataStream &s, RegisterData &rd);
+QDataStream &operator <<(QDataStream &s, const CombinedData &rd);
+QDataStream &operator >>(QDataStream &s, CombinedData &rd);
+QDataStream &operator <<(QDataStream &s, const RegistersData &rd);
+QDataStream &operator >>(QDataStream &s, RegistersData &rd);
+
+} // namespace
+
+#endif
diff --git a/src/devices/pic/gui/Makefile.am b/src/devices/pic/gui/Makefile.am
new file mode 100644
index 0000000..72f3165
--- /dev/null
+++ b/src/devices/pic/gui/Makefile.am
@@ -0,0 +1,9 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+libpicui_la_LDFLAGS = $(all_libraries)
+noinst_LTLIBRARIES = libpicui.la
+
+
+libpicui_la_SOURCES = pic_config_editor.cpp \
+		pic_config_word_editor.cpp	pic_hex_view.cpp pic_memory_editor.cpp pic_register_view.cpp pic_group_ui.cpp \
+	pic_prog_group_ui.cpp
diff --git a/src/devices/pic/gui/pic_config_editor.cpp b/src/devices/pic/gui/pic_config_editor.cpp
new file mode 100644
index 0000000..1812bbf
--- /dev/null
+++ b/src/devices/pic/gui/pic_config_editor.cpp
@@ -0,0 +1,68 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pic_config_editor.h"
+
+#include <qlayout.h>
+#include <qvgroupbox.h>
+#include <qapplication.h>
+
+#include "pic_config_word_editor.h"
+#include "common/common/misc.h"
+#include "common/gui/misc_gui.h"
+
+//----------------------------------------------------------------------------
+Pic::MemoryConfigEditorWidget::MemoryConfigEditorWidget(Memory &memory, bool withWordEditor, QWidget *parent)
+  : Device::MemoryEditorGroup(&memory, parent, "pic_config_editor_widget"),
+    MemoryCaster(MemoryRangeType::Config, memory)
+{
+  QHBoxLayout *hb = new QHBoxLayout(_top);
+
+  TabWidget *tabw = 0;
+  uint nbWords = device().nbWords(MemoryRangeType::Config);
+  if ( nbWords>1 ) {
+    tabw = new TabWidget(this);
+    tabw->setIgnoreWheelEvent(true);
+    hb->addWidget(tabw);
+  }
+
+  for(uint i=0; i<nbWords; ++i) {
+    //qDebug("BinWordsEditor for config word #%i", i);
+    //uint address = device().range(Device::MemoryConfig).start + device().addressIncrement(Device::MemoryConfig) * i;
+    //qDebug("address: %s %s nb: %i", toHex(address, 8).data(), device().configWord(i).name.latin1(), device().configWord(i).masks.count());
+    if ( device().config()._words[i].masks.count()==0 ) continue;
+    QWidget *page = 0;
+    if ( nbWords>1 ) {
+      page = new QWidget(tabw);
+      tabw->addTab(page, device().config()._words[i].name);
+    } else {
+      page = new QGroupBox(this);
+      hb->addWidget(page);
+    }
+    QVBoxLayout *vbox = new QVBoxLayout(page, 10, 10);
+    QHBoxLayout *hbox = new QHBoxLayout(vbox);
+    ConfigWordEditor *we = new ConfigWordEditor(memory, i, withWordEditor, page);
+    addEditor(we);
+    hbox->addWidget(we);
+    hbox->addStretch(1);
+    vbox->addStretch(1);
+  }
+}
+
+//----------------------------------------------------------------------------
+Pic::MemoryConfigEditor::MemoryConfigEditor(const HexView *hexview, Memory &memory, QWidget *parent)
+  : MemoryTypeEditor(hexview, MemoryRangeType::Config, memory, parent, "pic_config_editor")
+{}
+
+void Pic::MemoryConfigEditor::init(bool first)
+{
+  MemoryTypeEditor::init(first);
+  MemoryConfigEditorWidget *w = new MemoryConfigEditorWidget(memory(), true, this);
+  addEditor(w);
+  _top->addWidget(w);
+}
diff --git a/src/devices/pic/gui/pic_config_editor.h b/src/devices/pic/gui/pic_config_editor.h
new file mode 100644
index 0000000..888debf
--- /dev/null
+++ b/src/devices/pic/gui/pic_config_editor.h
@@ -0,0 +1,37 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PIC_CONFIG_EDITOR_H
+#define PIC_CONFIG_EDITOR_H
+
+#include "pic_memory_editor.h"
+
+//----------------------------------------------------------------------------
+namespace Pic
+{
+class HexView;
+
+class MemoryConfigEditorWidget : public Device::MemoryEditorGroup, public MemoryCaster
+{
+Q_OBJECT
+public:
+  MemoryConfigEditorWidget(Memory &memory, bool withWordEditor, QWidget *parent);
+};
+
+//----------------------------------------------------------------------------
+class MemoryConfigEditor : public MemoryTypeEditor
+{
+Q_OBJECT
+public:
+  MemoryConfigEditor(const HexView *hexview, Memory &memory, QWidget *parent);
+  virtual void init(bool first);
+};
+
+} // namespace
+
+#endif
diff --git a/src/devices/pic/gui/pic_config_word_editor.cpp b/src/devices/pic/gui/pic_config_word_editor.cpp
new file mode 100644
index 0000000..23e4bce
--- /dev/null
+++ b/src/devices/pic/gui/pic_config_word_editor.cpp
@@ -0,0 +1,196 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pic_config_word_editor.h"
+
+#include <qlabel.h>
+#include <qlayout.h>
+#include <qcombobox.h>
+#include <klocale.h>
+
+#include "common/common/misc.h"
+#include "common/gui/misc_gui.h"
+
+//----------------------------------------------------------------------------
+Pic::ConfigWordComboBox::ConfigWordComboBox(QWidget *parent)
+  : ComboBox(parent)
+{
+  setIgnoreWheelEvent(true);
+}
+
+uint Pic::ConfigWordComboBox::index() const
+{
+  if ( isValid() ) return _map[currentItem()];
+  if ( currentItem()==0 ) return _invalidIndex;
+  return _map[currentItem()-1];
+}
+
+void Pic::ConfigWordComboBox::setItem(uint i)
+{
+  if ( !isValid() ) removeItem(0);
+  for (uint l=0; l<_map.count(); l++)
+    if ( _map[l]==i ) setCurrentItem(l);
+}
+
+void Pic::ConfigWordComboBox::setInvalidItem(uint i, const QString &label)
+{
+  if ( !isValid() ) changeItem(label, 0);
+  else insertItem(label, 0);
+  setCurrentItem(0);
+  _invalidIndex = i;
+}
+
+//----------------------------------------------------------------------------
+Pic::ConfigWordDialog::ConfigWordDialog(const Memory &memory, uint ci, QWidget *parent)
+  : Dialog(parent, "config_word_dialog", true, i18n("Config Word Details"), Close, Close, false)
+{
+  uint nbChars = memory.device().nbCharsWord(MemoryRangeType::Config);
+  const Config::Word &cword = memory.device().config()._words[ci];
+
+  QGridLayout *grid = new QGridLayout(mainWidget(), 0, 0, 10, 10);
+  uint row = 0;
+  QLabel *label = new QLabel(i18n("Name:"), mainWidget());
+  grid->addWidget(label, row, 0);
+  label = new QLabel(cword.name, mainWidget());
+  grid->addWidget(label, row, 1);
+  row++;
+  label = new QLabel(i18n("Index:"), mainWidget());
+  grid->addWidget(label, row, 0);
+  label = new QLabel(QString::number(ci), mainWidget());
+  grid->addWidget(label, row, 1);
+  row++;
+  label = new QLabel(i18n("Raw Value:"), mainWidget());
+  grid->addWidget(label, row, 0);
+  label = new QLabel(toHexLabel(memory.word(MemoryRangeType::Config, ci), nbChars), mainWidget());
+  grid->addWidget(label, row, 1);
+  row++;
+  label = new QLabel(i18n("Value:"), mainWidget());
+  grid->addWidget(label, row, 0);
+  label = new QLabel(toHexLabel(memory.normalizedWord(MemoryRangeType::Config, ci), nbChars), mainWidget());
+  grid->addWidget(label, row, 1);
+  row++;
+  label = new QLabel(i18n("Raw Blank Value:"), mainWidget());
+  grid->addWidget(label, row, 0);
+  label = new QLabel(toHexLabel(cword.bvalue, nbChars), mainWidget());
+  grid->addWidget(label, row, 1);
+  row++;
+  label = new QLabel(i18n("Used Mask:"), mainWidget());
+  grid->addWidget(label, row, 0);
+  label = new QLabel(toHexLabel(cword.usedMask(), nbChars), mainWidget());
+  grid->addWidget(label, row, 1);
+  row++;
+  label = new QLabel(i18n("Write Mask:"), mainWidget());
+  grid->addWidget(label, row, 0);
+  label = new QLabel(toHexLabel(cword.wmask, nbChars), mainWidget());
+  grid->addWidget(label, row, 1);
+  row++;
+  label = new QLabel(i18n("Protected Mask:"), mainWidget());
+  grid->addWidget(label, row, 0);
+  label = new QLabel(toHexLabel(cword.pmask, nbChars), mainWidget());
+  grid->addWidget(label, row, 1);
+  row++;
+  label = new QLabel(i18n("Checksum Mask:"), mainWidget());
+  grid->addWidget(label, row, 0);
+  label = new QLabel(toHexLabel(cword.cmask, nbChars), mainWidget());
+  grid->addWidget(label, row, 1);
+  row++;
+}
+
+//----------------------------------------------------------------------------
+Pic::ConfigWordEditor::ConfigWordEditor(Memory &memory, uint ci, bool withWordEditor, QWidget *parent)
+  : MemoryEditor(MemoryRangeType::Config, memory, parent, "pic_config_word_editor"), _configIndex(ci)
+{
+  if (withWordEditor) {
+    QHBoxLayout *hbox = new QHBoxLayout(_top);
+    _mdb = new MemoryRangeEditor(MemoryRangeType::Config, memory, 1, 1, ci, 1, this);
+    _mdb->init();
+    connect(_mdb, SIGNAL(modified()), SIGNAL(modified()));
+    connect(_mdb, SIGNAL(modified()), SLOT(updateDisplay()));
+    hbox->addWidget(_mdb);
+    KPushButton *button = new KPushButton(i18n("Details..."), this);
+    button->setFixedHeight(button->sizeHint().height());
+    connect(button, SIGNAL(clicked()), SLOT(showDialog()));
+    hbox->addWidget(button);
+    hbox->addStretch(1);
+  } else _mdb = 0;
+
+  QGridLayout *grid = new QGridLayout(_top);
+  grid->setColStretch(2, 1);
+  const Config::Word &cword = device().config()._words[ci];
+  _combos.resize(cword.masks.count());
+  uint nbChars = device().nbCharsWord(MemoryRangeType::Config);
+  for (uint k=0; k<_combos.count(); k++) {
+    const Config::Mask &cmask = cword.masks[k];
+    QLabel *label = new QLabel(Config::maskLabel(cmask.name) + ":", this);
+    grid->addWidget(label, k, 0);
+    label = new QLabel(cmask.name, this);
+    grid->addWidget(label, k, 1);
+    _combos[k] = new ConfigWordComboBox(this);
+    for (uint i=0; i<cmask.values.count(); i++) {
+      if ( !cmask.values[i].isValid() ) continue;
+      QString label = Config::valueLabel(cmask.name, cmask.values[i].name);
+      label += " (" + toHexLabel(cmask.values[i].value, nbChars) + ")";
+      _combos[k]->appendItem(label, i);
+    }
+    connect(_combos[k], SIGNAL(activated(int)), SLOT(slotModified()));
+    grid->addWidget(_combos[k], k, 2);
+  }
+}
+
+void Pic::ConfigWordEditor::setReadOnly(bool readOnly)
+{
+  if (_mdb) _mdb->setReadOnly(readOnly);
+  const Config::Word &cword = device().config()._words[_configIndex];
+  for (uint k=0; k<_combos.count(); k++) {
+    const Config::Mask &cmask = cword.masks[k];
+    _combos[k]->setEnabled(!readOnly && !cmask.value.isOverlapping(cword.pmask) && cmask.values.count()!=1);
+  }
+}
+
+void Pic::ConfigWordEditor::slotModified()
+{
+  BitValue v = memory().word(MemoryRangeType::Config, _configIndex);
+  //qDebug("BinWordEditor::slotModified %i: %s", _configIndex, toHex(v, 4).data());
+  for (uint k=0; k<_combos.count(); k++) {
+    const Config::Mask &cmask = device().config()._words[_configIndex].masks[k];
+    v = v.clearMaskBits(cmask.value);
+    v |= cmask.values[_combos[k]->index()].value; // set value
+  }
+  memory().setWord(MemoryRangeType::Config, _configIndex, v);
+  //qDebug("  now: %s", toHex(v, 4).data());
+  if (_mdb) _mdb->updateDisplay();
+  emit modified();
+}
+
+void Pic::ConfigWordEditor::updateDisplay()
+{
+  BitValue v = memory().word(MemoryRangeType::Config, _configIndex);
+  uint nbChars = device().nbCharsWord(MemoryRangeType::Config);
+  //qDebug("BinWordEditor::updateDisplay %i: %s", _configIndex, toHex(v, 4).data());
+  for (uint k=0; k<_combos.count(); k++) {
+    const Config::Mask &cmask = device().config()._words[_configIndex].masks[k];
+    for (int i=cmask.values.count()-1; i>=0; i--) {
+      if ( cmask.values[i].value.isInside(v) ) {
+        if ( cmask.values[i].isValid() ) _combos[k]->setItem(i);
+        else {
+          QString label = i18n("<invalid>") + " (" + toHexLabel(cmask.values[i].value, nbChars) + ")";
+          _combos[k]->setInvalidItem(i, label);
+        }
+        break;
+      }
+    }
+  }
+  if (_mdb) _mdb->updateDisplay();
+}
+
+void Pic::ConfigWordEditor::showDialog()
+{
+  ConfigWordDialog dialog(memory(), _configIndex, this);
+  dialog.exec();
+}
diff --git a/src/devices/pic/gui/pic_config_word_editor.h b/src/devices/pic/gui/pic_config_word_editor.h
new file mode 100644
index 0000000..8f483c7
--- /dev/null
+++ b/src/devices/pic/gui/pic_config_word_editor.h
@@ -0,0 +1,70 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PIC_CONFIG_WORD_EDITOR_H
+#define PIC_CONFIG_WORD_EDITOR_H
+
+#include <qcombobox.h>
+
+#include "common/gui/dialog.h"
+#include "common/gui/misc_gui.h"
+#include "pic_memory_editor.h"
+
+namespace Pic
+{
+//----------------------------------------------------------------------------
+class ConfigWordDialog : public Dialog
+{
+Q_OBJECT
+public:
+  ConfigWordDialog(const Memory &memory, uint index, QWidget *parent);
+};
+
+//----------------------------------------------------------------------------
+class ConfigWordComboBox : public ComboBox
+{
+Q_OBJECT
+public:
+  ConfigWordComboBox(QWidget *parent);
+  void appendItem(const QString &text, uint index) { insertItem(text); _map.append(index); }
+  uint index() const;
+  void setItem(uint index);
+  void setInvalidItem(uint index, const QString &label);
+
+private:
+  QValueVector<uint> _map; // item index -> value index
+  uint _invalidIndex; // if invalid -> value index
+
+  bool isValid() const { return uint(count())==_map.count(); }
+};
+
+//----------------------------------------------------------------------------
+class ConfigWordEditor : public MemoryEditor
+{
+Q_OBJECT
+public:
+  ConfigWordEditor(Memory &memory, uint index, bool withWordEditor, QWidget *parent);
+  virtual void setReadOnly(bool readOnly);
+
+public slots:
+  virtual void updateDisplay();
+
+private slots:
+  void slotModified();
+  void showDialog();
+
+private:
+  uint _configIndex;
+  MemoryRangeEditor *_mdb;
+  QValueVector<ConfigWordComboBox *> _combos;
+};
+
+} // namespace
+
+#endif
diff --git a/src/devices/pic/gui/pic_group_ui.cpp b/src/devices/pic/gui/pic_group_ui.cpp
new file mode 100644
index 0000000..3f7a84c
--- /dev/null
+++ b/src/devices/pic/gui/pic_group_ui.cpp
@@ -0,0 +1,87 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pic_group_ui.h"
+
+#include <kaction.h>
+
+#include "libgui/main_global.h"
+#include "pic_hex_view.h"
+#include "pic_register_view.h"
+#include "pic_config_editor.h"
+#include "coff/base/text_coff.h"
+#include "libgui/gui_debug_manager.h"
+#include "common/gui/list_container.h"
+
+Device::HexView *Pic::GroupUI::createHexView(const HexEditor &editor, QWidget *parent) const
+{
+  return new HexView(editor, parent);
+}
+
+Register::View *Pic::GroupUI::createRegisterView(QWidget *parent) const
+{
+  return new RegisterView(parent);
+}
+
+Device::MemoryEditor *Pic::GroupUI::createConfigEditor(Device::Memory &memory, QWidget *parent) const
+{
+  return new MemoryConfigEditorWidget(static_cast<Memory &>(memory), false, parent);
+}
+
+void Pic::GroupUI::fillWatchListContainer(ListContainer *container, QValueVector<Register::TypeData> &ids) const
+{
+  ids.clear();
+  const Pic::Data &data = static_cast<const Pic::Data &>(*Main::deviceData());
+  const Pic::RegistersData &rdata = data.registersData();
+  ListContainer *branch = container->appendBranch(i18n("SFRs"));
+  QValueVector<Pic::RegisterNameData> list = Pic::sfrList(data);
+  for (uint i=0; i<list.count(); i++) {
+    branch->appendItem(list[i].label(), ids.count(), ListContainer::UnChecked);
+    ids.append(list[i].data());
+  }
+  branch = container->appendBranch(i18n("I/Os"));
+  for (uint i=0; i<Device::MAX_NB_PORTS; i++) {
+    if ( !rdata.hasPort(i) ) continue;
+    QString name = rdata.portName(i);
+    branch->appendItem(name, ids.count(), ListContainer::UnChecked);
+    ids.append(Register::TypeData(rdata.sfrs[name].address, rdata.nbChars()));
+  }
+  branch = container->appendBranch(i18n("GPRs"));
+  const Coff::Object *coff = Debugger::manager->coff();
+  list = Pic::gprList(data, coff);
+  for (uint k=0; k<rdata.nbBanks; k++) {
+    if ( !rdata.isBankUsed(k) ) continue;
+    ListContainer *bbranch = (rdata.nbBanks==1 ? branch : branch->appendBranch(i18n("Bank %1").arg(k)));
+    uint nb = 0;
+    for (uint i=0; i<list.count(); i++) {
+      if ( rdata.bankFromAddress(list[i].data().address())!=k ) continue;
+      bbranch->appendItem(list[i].label(), ids.count(), ListContainer::UnChecked);
+      ids.append(list[i].data());
+      nb++;
+    }
+  }
+  branch = container->appendBranch(i18n("Variables"));
+  if (coff) {
+    list = Pic::variableList(data, *coff);
+    if ( list.count()==0 ) {
+      branch->appendItem(i18n("No variable"), ids.count(), ListContainer::Disabled);
+      ids.append(Register::TypeData());
+    } else for (uint i=0; i<list.count(); i++) {
+      branch->appendItem(list[i].label(), ids.count(), ListContainer::UnChecked);
+      ids.append(list[i].data());
+    }
+  } else {
+    branch->appendItem(i18n("Please compile the current project"), ids.count(), ListContainer::Disabled);
+    ids.append(Register::TypeData());
+  }
+}
+
+Register::ListViewItem *Pic::GroupUI::createWatchItem(const Register::TypeData &data, KListViewItem *parent) const
+{
+  return new Pic::RegisterListViewItem(data, parent);
+}
diff --git a/src/devices/pic/gui/pic_group_ui.h b/src/devices/pic/gui/pic_group_ui.h
new file mode 100644
index 0000000..a8bee66
--- /dev/null
+++ b/src/devices/pic/gui/pic_group_ui.h
@@ -0,0 +1,29 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PIC_GROUP_UI_H
+#define PIC_GROUP_UI_H
+
+#include "devices/gui/device_group_ui.h"
+
+namespace Pic
+{
+
+class GroupUI : public Device::GroupUI
+{
+public:
+  virtual Device::HexView *createHexView(const HexEditor &editor, QWidget *parent) const;
+  virtual Register::View *createRegisterView(QWidget *parent) const;
+  virtual Device::MemoryEditor *createConfigEditor(Device::Memory &memory, QWidget *parent) const;
+  virtual void fillWatchListContainer(ListContainer *container, QValueVector<Register::TypeData> &ids) const;
+  virtual Register::ListViewItem *createWatchItem(const Register::TypeData &data, KListViewItem *parent) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/devices/pic/gui/pic_hex_view.cpp b/src/devices/pic/gui/pic_hex_view.cpp
new file mode 100644
index 0000000..07a1938
--- /dev/null
+++ b/src/devices/pic/gui/pic_hex_view.cpp
@@ -0,0 +1,60 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2003 Alain Gibaud <alain.gibaud@free.fr>                *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pic_hex_view.h"
+
+#include <qlayout.h>
+#include <qlabel.h>
+
+#include <klocale.h>
+
+#include "pic_memory_editor.h"
+#include "pic_config_editor.h"
+
+Pic::HexView::HexView(const HexEditor &editor, QWidget *parent)
+  : Device::HexView(editor, parent, "pic_hex_view")
+{}
+
+const Pic::MemoryRangeType::Type Pic::HexView::MEMORY_DATA[] = {
+  MemoryRangeType::Code, MemoryRangeType::Config, MemoryRangeType::Eeprom, MemoryRangeType::UserId,
+  MemoryRangeType::Cal, MemoryRangeType::Nb_Types
+};
+
+void Pic::HexView::display()
+{
+  bool first = true;
+  for (uint i=0; MEMORY_DATA[i]!=MemoryRangeType::Nb_Types; i++) {
+    Pic::MemoryRangeType type = MEMORY_DATA[i];
+    if ( !memory()->device().isReadable(type) ) continue;
+    Device::MemoryTypeEditor *e = 0;
+    switch (type.type()) {
+      case MemoryRangeType::Config: e = new MemoryConfigEditor(this, *memory(), this); break;
+      case MemoryRangeType::Cal:    e = new MemoryCalibrationEditor(this, *memory(), this); break;
+      case MemoryRangeType::Code:
+      case MemoryRangeType::Eeprom: e = new MemoryTypeRangeEditor(this, type, *memory(), this); break;
+      case MemoryRangeType::UserId: e = new MemoryUserIdEditor(this, *memory(), this); break;
+      case MemoryRangeType::DeviceId:
+      case MemoryRangeType::HardwareStack:
+      case MemoryRangeType::ProgramExecutive:
+      case MemoryRangeType::DebugVector:
+      case MemoryRangeType::CalBackup:
+      case MemoryRangeType::Nb_Types: Q_ASSERT(false); break;
+    }
+    e->init(first);
+    e->show();
+    _top->addWidget(e);
+    addEditor(e);
+    first = false;
+  }
+}
+
+BitValue Pic::HexView::checksum() const
+{
+  return (_memory ? memory()->checksum() : 0x0000);
+}
diff --git a/src/devices/pic/gui/pic_hex_view.h b/src/devices/pic/gui/pic_hex_view.h
new file mode 100644
index 0000000..2086ccb
--- /dev/null
+++ b/src/devices/pic/gui/pic_hex_view.h
@@ -0,0 +1,39 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2003 Alain Gibaud <alain.gibaud@free.fr>                *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PIC_HEX_VIEW_H
+#define PIC_HEX_VIEW_H
+
+class QVBoxLayout;
+
+#include "devices/gui/hex_view.h"
+#include "devices/pic/pic/pic_memory.h"
+
+namespace Pic
+{
+
+class HexView : public Device::HexView
+{
+Q_OBJECT
+public:
+  HexView(const HexEditor &editor, QWidget *parent);
+  Memory *memory() { return static_cast<Memory *>(_memory); }
+  const Memory *memory() const { return static_cast<Memory *>(_memory); }
+  virtual uint nbChecksumChars() const { return 4; }
+  virtual BitValue checksum() const;
+
+private:
+  static const MemoryRangeType::Type MEMORY_DATA[];
+
+  virtual void display();
+};
+
+} // namespace
+
+#endif
diff --git a/src/devices/pic/gui/pic_memory_editor.cpp b/src/devices/pic/gui/pic_memory_editor.cpp
new file mode 100644
index 0000000..3d78097
--- /dev/null
+++ b/src/devices/pic/gui/pic_memory_editor.cpp
@@ -0,0 +1,404 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pic_memory_editor.h"
+
+#include <qframe.h>
+#include <qgroupbox.h>
+#include <qlabel.h>
+#include <qscrollbar.h>
+#include <qgrid.h>
+#include <qhbox.h>
+#include <qtooltip.h>
+#include <qregexp.h>
+#include <qcolor.h>
+#include <qlayout.h>
+#include <qpixmap.h>
+
+#include <klocale.h>
+#include <kpushbutton.h>
+#include <kaction.h>
+
+#include "common/common/misc.h"
+#include "pic_config_editor.h"
+#include "libgui/toplevel.h"
+#include "libgui/main_global.h"
+#include "devices/pic/prog/pic_prog.h"
+#include "libgui/global_config.h"
+#include "pic_hex_view.h"
+
+//-----------------------------------------------------------------------------
+Pic::MemoryEditorLegend::Data::Data(const QString &text, QWidget *parent)
+{
+  button = new PopupButton(text, parent);
+  KActionCollection *ac = 0;
+  KAction *a = new KAction(i18n("Go to start"), "top", 0, parent, SLOT(gotoStart()), ac);
+  actions.append(a);
+  button->appendAction(a);
+  a = new KAction(i18n("Go to end"), "bottom", 0, parent, SLOT(gotoEnd()), ac);
+  actions.append(a);
+  button->appendAction(a);
+  label = new QLabel(parent);
+}
+
+void Pic::MemoryEditorLegend::Data::setProtected(bool on)
+{
+  if (on) label->setPaletteBackgroundColor(MemoryEditorLegend::protectedColor());
+  else label->unsetPalette();
+}
+
+bool Pic::MemoryEditorLegend::Data::hasAction(const KAction *action) const
+{
+  for (uint i=0; i<actions.count(); i++) if ( actions[i]==action ) return true;
+  return false;
+}
+
+//-----------------------------------------------------------------------------
+const char * const Pic::MemoryEditorLegend::BLOCK_COLORS[Protection::MAX_NB_BLOCKS] = {
+  "#88FF88", "#88FFFF", "#FFFF88", "#FF88FF", "#0088FF", "#88FF00", "#00FF88", "#FF8800"
+};
+
+Pic::MemoryEditorLegend::MemoryEditorLegend(MemoryRangeType type, Memory &memory, QWidget *parent)
+  : MemoryEditor(type, memory, parent, "memory_displayer_legend")
+{
+  QGridLayout *grid = new QGridLayout(_top);
+
+  QWidget *w = new QWidget(this);
+  w->setFixedWidth(20);
+  w->setPaletteBackgroundColor(protectedColor());
+  grid->addWidget(w, 0, 0);
+  const Protection &protection = device().config().protection();
+  QString s = (protection.family()==Protection::CodeGuard ? i18n("High Security") : i18n("Code protection"));
+  QLabel *label = new QLabel(s, this);
+  grid->addMultiCellWidget(label, 0,0, 1,2);
+  grid->addRowSpacing(1, 10);
+  uint row = 2;
+
+  if ( type==MemoryRangeType::Code && protection.hasBootBlock() ) {
+    w = new QWidget(this);
+    w->setFixedWidth(20);
+    w->setPaletteBackgroundColor(bootColor());
+    grid->addWidget(w, row, 0);
+    _boot = Data(protection.bootLabel(), this);
+    grid->addWidget(_boot.button, row, 1);
+    grid->addWidget(_boot.label, row, 2);
+    row++;
+  }
+
+  uint nb = (type==MemoryRangeType::Code ? protection.nbBlocks() : 0);
+  for (uint i=0; i<nb; i++) {
+    w = new QWidget(this);
+    w->setFixedWidth(20);
+    w->setPaletteBackgroundColor(blockColor(i));
+    grid->addWidget(w, row, 0);
+    _blocks.append(Data(protection.blockLabel(i), this));
+    grid->addWidget(_blocks[i].button, row, 1);
+    grid->addWidget(_blocks[i].label, row, 2);
+    row++;
+  }
+}
+
+void Pic::MemoryEditorLegend::updateDisplay()
+{
+  const Protection &protection = device().config().protection();
+  Protection::Type ptype = (protection.family()==Protection::CodeGuard ? Protection::HighSecurity : Protection::ProgramProtected);
+  uint nbChars = 2 * device().nbBytesAddress();
+  if (_boot.label) {
+    AddressRange r = memory().bootRange();
+    if ( r.isEmpty() ) _boot.label->setText(i18n("not present"));
+    else _boot.label->setText(QString("[%1:%2]").arg(toHex(r.start, nbChars)).arg(toHex(r.end, nbChars)));
+    _boot.button->setEnabled(!r.isEmpty());
+    _boot.setProtected(memory().isBootProtected(ptype));
+  }
+  for (uint i=0; i<_blocks.count(); i++) {
+    AddressRange r = memory().blockRange(i);
+    if ( r.isEmpty() ) _blocks[i].label->setText(i18n("not present"));
+    else _blocks[i].label->setText(QString("[%1:%2]").arg(toHex(r.start, nbChars)).arg(toHex(r.end, nbChars)));
+    _blocks[i].button->setEnabled(!r.isEmpty());
+    _blocks[i].setProtected(memory().isBlockProtected(ptype, i));
+  }
+}
+
+void Pic::MemoryEditorLegend::gotoStart()
+{
+  Address start = device().range(type()).start;
+  const KAction *action = static_cast<const KAction *>(sender());
+  if ( _boot.hasAction(action) ) {
+    AddressRange r = memory().bootRange();
+    emit setStartWord(r.start - start);
+    return;
+  }
+  for (uint i=0; i<_blocks.count(); i++) {
+    if ( _blocks[i].hasAction(action) ) {
+      AddressRange r = memory().blockRange(i);
+      emit setStartWord(r.start - start);
+      return;
+    }
+  }
+  Q_ASSERT(false);
+}
+
+void Pic::MemoryEditorLegend::gotoEnd()
+{
+  Address start = device().range(type()).start;
+  const KAction *action = static_cast<const KAction *>(sender());
+  if ( _boot.hasAction(action) ) {
+    AddressRange r = memory().bootRange();
+    emit setEndWord(r.end - start);
+    return;
+  }
+  for (uint i=0; i<_blocks.count(); i++) {
+    if ( _blocks[i].hasAction(action) ) {
+      AddressRange r = memory().blockRange(i);
+      emit setEndWord(r.end - start);
+      return;
+    }
+  }
+  Q_ASSERT(false);
+}
+
+
+//-----------------------------------------------------------------------------
+Pic::HexWordEditor::HexWordEditor(MemoryRangeType type, Memory &memory, QWidget *parent)
+  : Device::HexWordEditor(memory, memory.device().nbCharsWord(type), parent),
+    MemoryCaster(type, memory)
+{}
+
+void Pic::HexWordEditor::setWord(BitValue value)
+{
+  if ( type()==MemoryRangeType::Config ) {
+    const Config::Word &cword = device().config()._words[_offset];
+    value |= cword.usedMask().complementInMask(device().mask(MemoryRangeType::Config));
+  }
+  memory().setWord(type(), _offset, value);
+}
+
+//-----------------------------------------------------------------------------
+Pic::MemoryRangeEditor::MemoryRangeEditor(MemoryRangeType type, Memory &memory,
+                                          uint nbLines, uint nbCols,
+                                          uint wordOffset, int nbWords, QWidget *parent)
+  : Device::MemoryRangeEditor(memory, nbLines, nbCols, wordOffset, nbWords, parent, "pic_memory_range_editor"),
+    MemoryCaster(type, memory), _legend(0)
+{
+  if ( type==MemoryRangeType::Code ) _blockRanges.resize(memory.device().config().protection().nbBlocks());
+}
+
+void Pic::MemoryRangeEditor::addLegend(QVBoxLayout *vbox)
+{
+  if ( type()==MemoryRangeType::Code || type()==MemoryRangeType::Eeprom ) {
+    _legend = new MemoryEditorLegend(type(), memory(), this);
+    connect(_legend, SIGNAL(setStartWord(int)), SLOT(setStartWord(int)));
+    connect(_legend, SIGNAL(setEndWord(int)), SLOT(setEndWord(int)));
+    vbox->addWidget(_legend);
+  }
+}
+
+bool Pic::MemoryRangeEditor::isRangeReadOnly() const
+{
+  return ( (type().data().properties & ReadOnly) || type()==MemoryRangeType::CalBackup );
+}
+
+void Pic::MemoryRangeEditor::updateDisplay()
+{
+  const Protection &protection = device().config().protection();
+  if ( type()==MemoryRangeType::Code ) {
+    if ( protection.hasBootBlock() ) _bootRange = memory().bootRange();
+    for (uint k=0; k<_blockRanges.count(); k++)
+      _blockRanges[k] = memory().blockRange(k);
+  }
+  Protection::Type ptype = (protection.family()==Protection::CodeGuard ? Protection::HighSecurity : Protection::ProgramProtected);
+  _codeProtected = memory().protectedRanges(ptype, type());
+  Device::MemoryRangeEditor::updateDisplay();
+  if (_legend) _legend->updateDisplay();
+}
+
+void Pic::MemoryRangeEditor::updateAddressColor(uint i, Address address)
+{
+  if ( _codeProtected.contains(address) )
+    _addresses[i]->setPaletteBackgroundColor(MemoryEditorLegend::protectedColor());
+  else _addresses[i]->unsetPalette();
+  _blocks[i]->unsetPalette();
+  if ( type()==MemoryRangeType::Code ) {
+    if ( _bootRange.contains(address) ) _blocks[i]->setPaletteBackgroundColor(MemoryEditorLegend::bootColor());
+    else for (uint k=0; k<_blockRanges.count(); k++) {
+      if ( !_blockRanges[k].contains(address) ) continue;
+      _blocks[i]->setPaletteBackgroundColor(MemoryEditorLegend::blockColor(k));
+      break;
+    }
+  }
+}
+
+Device::HexWordEditor *Pic::MemoryRangeEditor::createHexWordEditor(QWidget *parent)
+{
+  return new HexWordEditor(type(), memory(), parent);
+}
+
+//-----------------------------------------------------------------------------
+Pic::MemoryTypeEditor::MemoryTypeEditor(const HexView *hexview, MemoryRangeType type, Memory &memory, QWidget *parent, const char *name)
+  : Device::MemoryTypeEditor(hexview, memory, parent, name), MemoryCaster(type, memory)
+{}
+
+void Pic::MemoryTypeEditor::init(bool first)
+{
+  Device::MemoryTypeEditor::init(first);
+  _title->setText(type().label());
+
+  uint nbChars = device().nbCharsWord(type());
+  QString add;
+  if ( type()==MemoryRangeType::UserId ) add = i18n(" - recommended mask: %1").arg(toHexLabel(device().userIdRecommendedMask(), nbChars));
+  if ( type()==MemoryRangeType::Cal && _hexview ) add = i18n(" - not programmed by default");
+  QString comment = i18n("%1-bit words - mask: %2")
+                   .arg(device().nbBitsWord(type())).arg(toHexLabel(device().mask(type()), nbChars));
+  _comment->setText(comment + add);
+}
+
+bool Pic::MemoryTypeEditor::internalDoAction(Device::Action action)
+{
+  Programmer::PicBase *prog = static_cast<Programmer::PicBase *>(Main::programmer());
+  switch (action) {
+    case Device::Clear: memory().clear(type()); return true;
+    case Device::Zero:  memory().fill(type(), 0);  return true;
+    case Device::ChecksumCheck : memory().checksumCheckFill(); return true;
+    case Device::Reload: {
+      const Memory *omemory = static_cast<const Memory *>(originalMemory());
+      Q_ASSERT(omemory);
+      memory().copyFrom(type(), *omemory); return true;
+    }
+    case Device::Program:
+      prog->programSingle(type(), memory());
+      return false;
+    case Device::Verify:
+      prog->verifySingle(type(), memory());
+      return false;
+    case Device::Read:
+      return prog->readSingle(type(), memory());
+    case Device::Erase:
+      prog->eraseSingle(type());
+      return false;
+    case Device::BlankCheck:
+      prog->blankCheckSingle(type());
+      return false;
+    case Device::Nb_Actions: break;
+  }
+  Q_ASSERT(false);
+  return false;
+}
+
+//-----------------------------------------------------------------------------
+Pic::MemoryTypeRangeEditor::MemoryTypeRangeEditor(const HexView *hexview, MemoryRangeType type, Memory &memory, QWidget *parent)
+  : MemoryTypeEditor(hexview, type, memory, parent, "pic_memory_type_range_editor"), _mre(0)
+{}
+
+void Pic::MemoryTypeRangeEditor::init(bool first)
+{
+  MemoryTypeEditor::init(first);
+  uint nbLines = 0;
+  if ( type()==MemoryRangeType::Code ) nbLines = 16;
+  else if ( type()==MemoryRangeType::Eeprom ) nbLines = 8;
+  else nbLines = (device().nbWords(type())/8>1 ? 2 : 1);
+  _mre = new MemoryRangeEditor(type(), memory(), nbLines, 8, 0, -1, this);
+  addEditor(_mre);
+  _top->addWidget(_mre);
+  _mre->init();
+}
+
+//-----------------------------------------------------------------------------
+Pic::MemoryUserIdEditor::MemoryUserIdEditor(const HexView *hexview, Memory &memory, QWidget *parent)
+  : MemoryTypeRangeEditor(hexview, MemoryRangeType::UserId, memory, parent), _saveReadOnly(false)
+{}
+
+void Pic::MemoryUserIdEditor::init(bool first)
+{
+  MemoryTypeRangeEditor::init(first);
+  _setToChecksum = new KToggleAction(i18n("Set to unprotected checksum"), 0, 0,
+    this, SLOT(toggleSetToChecksum()), Main::toplevel().actionCollection());
+  addAction(_setToChecksum);
+  if ( readConfigEntry(BaseGlobalConfig::UserIdSetToChecksum).toBool() && memory().isClear(MemoryRangeType::UserId) ) {
+    _setToChecksum->activate();
+    toggleSetToChecksum();
+  }
+}
+
+void Pic::MemoryUserIdEditor::toggleSetToChecksum()
+{
+  if ( _setToChecksum->isChecked() ) {
+    _mre->setComment(i18n("Set to unprotected checksum"));
+    emit modified();
+  } else _mre->setComment(QString::null);
+  setReadOnly(_saveReadOnly);
+}
+
+void Pic::MemoryUserIdEditor::updateDisplay()
+{
+  if ( _setToChecksum->isChecked() ) memory().setUserIdToUnprotectedChecksum();
+  MemoryTypeRangeEditor::updateDisplay();
+}
+
+void Pic::MemoryUserIdEditor::setReadOnly(bool readOnly)
+{
+  _saveReadOnly = readOnly;
+  MemoryTypeRangeEditor::setReadOnly(readOnly || _setToChecksum->isChecked());
+}
+
+//-----------------------------------------------------------------------------
+Pic::MemoryCalibrationEditor::MemoryCalibrationEditor(const HexView *hexview, Memory &memory, QWidget *parent)
+  : MemoryTypeEditor(hexview, MemoryRangeType::Cal, memory, parent, "pic_memory_calibration_editor")
+{}
+
+void Pic::MemoryCalibrationEditor::init(bool first)
+{
+  MemoryTypeEditor::init(first);
+  MemoryRangeEditor *mre = new MemoryRangeEditor(MemoryRangeType::Cal, memory(), 1, 8, 0, -1, this);
+  addEditor(mre);
+  _top->addWidget(mre);
+  mre->init();
+  if ( device().isReadable(MemoryRangeType::CalBackup) ) {
+    mre = new MemoryRangeEditor(MemoryRangeType::CalBackup, memory(), 1, 8, 0, -1, this);
+    addEditor(mre);
+    _top->addWidget(mre);
+    mre->init();
+    mre->setComment(i18n("(backup)"));
+  }
+}
+
+bool Pic::MemoryCalibrationEditor::hasAction(Device::Action action) const
+{
+  return ( action==Device::Read || action==Device::Verify || action==Device::Program );
+}
+
+bool Pic::MemoryCalibrationEditor::internalDoAction(Device::Action action)
+{
+  Programmer::PicBase *prog = static_cast<Programmer::PicBase *>(Main::programmer());
+  switch (action) {
+    case Device::Reload: {
+      const Memory *omemory = static_cast<const Memory *>(originalMemory());
+      Q_ASSERT(omemory);
+      memory().copyFrom(MemoryRangeType::Cal, *omemory);
+      memory().copyFrom(MemoryRangeType::CalBackup, *omemory);
+      return true;
+    }
+    case Device::Program:
+      if ( prog->programCalibration(memory().arrayForWriting(Pic::MemoryRangeType::Cal)) )
+        return prog->readSingle(MemoryRangeType::Cal, memory());
+      return false;
+    case Device::Verify:
+      prog->verifySingle(MemoryRangeType::Cal, memory());
+      return false;
+    case Device::Read:
+      return prog->readSingle(MemoryRangeType::Cal, memory());
+    case Device::Clear:
+    case Device::Zero:
+    case Device::ChecksumCheck:
+    case Device::Erase:
+    case Device::BlankCheck:
+    case Device::Nb_Actions: break;
+  }
+  Q_ASSERT(false);
+  return false;
+}
diff --git a/src/devices/pic/gui/pic_memory_editor.h b/src/devices/pic/gui/pic_memory_editor.h
new file mode 100644
index 0000000..bf67cd1
--- /dev/null
+++ b/src/devices/pic/gui/pic_memory_editor.h
@@ -0,0 +1,189 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PIC_MEMORY_EDITOR_H
+#define PIC_MEMORY_EDITOR_H
+
+#include <qscrollbar.h>
+#include <qgroupbox.h>
+class KToggleAction;
+
+#include "devices/gui/memory_editor.h"
+#include "devices/gui/hex_word_editor.h"
+#include "devices/pic/pic/pic_memory.h"
+class PopupButton;
+
+namespace Pic
+{
+class HexView;
+
+//-----------------------------------------------------------------------------
+class MemoryCaster
+{
+public:
+  MemoryCaster(MemoryRangeType type, Device::Memory &memory) : _type(type), _memory(memory) {}
+  MemoryRangeType type() const { return _type; }
+  const Data &device() const { return static_cast<const Data &>(_memory.device()); }
+  const Memory &memory() const { return static_cast<Memory &>(_memory); }
+  Memory &memory() { return static_cast<Memory &>(_memory); }
+
+private:
+  MemoryRangeType _type;
+  Device::Memory &_memory;
+};
+
+//-----------------------------------------------------------------------------
+class MemoryEditor : public Device::MemoryEditor, public MemoryCaster
+{
+Q_OBJECT
+public:
+  MemoryEditor(MemoryRangeType type, Memory &memory, QWidget *parent, const char *name)
+    : Device::MemoryEditor(&memory, parent, name), MemoryCaster(type, memory) {}
+};
+
+//-----------------------------------------------------------------------------
+class MemoryEditorLegend : public MemoryEditor
+{
+Q_OBJECT
+public:
+  MemoryEditorLegend(MemoryRangeType type, Memory &memory, QWidget *parent);
+  virtual void setReadOnly(bool) {}
+
+  static QColor protectedColor() { return QColor("#FF8888"); }
+  static QColor bootColor() { return QColor("#8888FF"); }
+  static QColor blockColor(uint i) { return QColor(BLOCK_COLORS[i]); }
+
+signals:
+  void setStartWord(int i);
+  void setEndWord(int i);
+
+public slots:
+  virtual void updateDisplay();
+
+private slots:
+  void gotoStart();
+  void gotoEnd();
+
+private:
+  class Data {
+  public:
+    Data() : button(0), label(0) {}
+    Data(const QString &text, QWidget *parent);
+    void setProtected(bool on);
+    bool hasAction(const KAction *action) const;
+    PopupButton *button;
+    QLabel      *label;
+    QValueVector<KAction *> actions;
+  };
+  Data _boot;
+  QValueVector<Data> _blocks;
+
+  static const char * const BLOCK_COLORS[Protection::MAX_NB_BLOCKS];
+};
+
+//-----------------------------------------------------------------------------
+class HexWordEditor : public Device::HexWordEditor, public MemoryCaster
+{
+Q_OBJECT
+public:
+  HexWordEditor(MemoryRangeType type, Memory &memory, QWidget *parent);
+
+private:
+  virtual BitValue mask() const { return memory().device().mask(type()); }
+  virtual BitValue normalizeWord(BitValue value) const { return memory().normalizeWord(type(), _offset, value); }
+  virtual BitValue word() const { return memory().word(type(), _offset); }
+  virtual void setWord(BitValue value);
+};
+
+//-----------------------------------------------------------------------------
+class MemoryRangeEditor : public Device::MemoryRangeEditor, public MemoryCaster
+{
+  Q_OBJECT
+public:
+  MemoryRangeEditor(MemoryRangeType type, Memory &memory,
+                    uint nbLines, uint nbCols, uint wordOffset, int nbWords, QWidget *parent);
+
+public slots:
+  virtual void updateDisplay();
+
+private:
+  MemoryEditorLegend *_legend;
+  AddressRange        _bootRange;
+  AddressRangeVector  _blockRanges;
+  AddressRangeVector  _codeProtected;
+
+  virtual uint nbWords() const { return device().nbWords(type()); }
+  virtual uint addressIncrement() const { return device().addressIncrement(type()); }
+  virtual Address startAddress() const { return device().range(type()).start; }
+  virtual Device::HexWordEditor *createHexWordEditor(QWidget *parent);
+  virtual void updateAddressColor(uint i, Address address);
+  virtual bool isRangeReadOnly() const;
+  virtual void addLegend(QVBoxLayout *vbox);
+};
+
+//-----------------------------------------------------------------------------
+class MemoryTypeEditor : public Device::MemoryTypeEditor, public MemoryCaster
+{
+Q_OBJECT
+public:
+  MemoryTypeEditor(const HexView *hexview, MemoryRangeType type, Memory &memory, QWidget *parent, const char *name);
+  virtual void init(bool first);
+
+private:
+  virtual bool internalDoAction(Device::Action action);
+};
+
+//-----------------------------------------------------------------------------
+class MemoryTypeRangeEditor : public MemoryTypeEditor
+{
+Q_OBJECT
+public:
+  MemoryTypeRangeEditor(const HexView *hexview, MemoryRangeType type, Memory &memory, QWidget *parent);
+  virtual void init(bool first);
+
+protected:
+  MemoryRangeEditor *_mre;
+};
+
+//-----------------------------------------------------------------------------
+class MemoryUserIdEditor : public MemoryTypeRangeEditor
+{
+Q_OBJECT
+public:
+  MemoryUserIdEditor(const HexView *hexview, Memory &memory, QWidget *parent);
+  virtual void init(bool first);
+  virtual void setReadOnly(bool readOnly);
+
+public slots:
+  virtual void updateDisplay();
+
+private slots:
+  void toggleSetToChecksum();
+
+private:
+  bool _saveReadOnly;
+  KToggleAction *_setToChecksum;
+};
+
+//-----------------------------------------------------------------------------
+class MemoryCalibrationEditor : public MemoryTypeEditor
+{
+Q_OBJECT
+public:
+  MemoryCalibrationEditor(const HexView *hexview, Memory &memory, QWidget *parent);
+  virtual void init(bool first);
+
+private:
+  virtual bool hasAction(Device::Action action) const;
+  virtual bool internalDoAction(Device::Action action);
+};
+
+} // namespace
+
+#endif
diff --git a/src/devices/pic/gui/pic_prog_group_ui.cpp b/src/devices/pic/gui/pic_prog_group_ui.cpp
new file mode 100644
index 0000000..e063b77
--- /dev/null
+++ b/src/devices/pic/gui/pic_prog_group_ui.cpp
@@ -0,0 +1,41 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pic_prog_group_ui.h"
+
+#include "progs/gui/prog_config_widget.h"
+#include "progs/base/prog_group.h"
+
+Programmer::PicAdvancedDialog::PicAdvancedDialog(PicBase &base, QWidget *parent, const char *name)
+  : AdvancedDialog(base, parent, name)
+{
+  if (_voltagesContainer) {
+    uint k = _voltagesContainer->numRows();
+    for (uint i=0; i<Pic::Nb_VoltageTypes; i++) {
+      if ( !base.group().canReadVoltage(Pic::VoltageType(i)) ) _voltages[i] = 0;
+      else {
+        QLabel *label = new QLabel(i18n(Pic::VOLTAGE_TYPE_LABELS[i]) + ":", _voltagesContainer);
+        _voltagesContainer->addWidget(label, k,k, 0,0);
+        _voltages[i] = new QLabel(_voltagesContainer);
+        _voltagesContainer->addWidget(_voltages[i], k,k, 1,1);
+        k++;
+      }
+    }
+  }
+}
+
+void Programmer::PicAdvancedDialog::updateDisplay()
+{
+  ::Programmer::AdvancedDialog::updateDisplay();
+  for (uint i=0; i<Pic::Nb_VoltageTypes; i++) {
+    if ( !base().group().canReadVoltage(Pic::VoltageType(i)) ) continue;
+    double v = base().voltage(Pic::VoltageType(i));
+    if ( v==::Programmer::UNKNOWN_VOLTAGE ) _voltages[i]->setText("---");
+    else _voltages[i]->setText(QString("%1 V").arg(v));
+  }
+}
diff --git a/src/devices/pic/gui/pic_prog_group_ui.h b/src/devices/pic/gui/pic_prog_group_ui.h
new file mode 100644
index 0000000..75821b5
--- /dev/null
+++ b/src/devices/pic/gui/pic_prog_group_ui.h
@@ -0,0 +1,31 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PIC_PROG_GROUP_UI_H
+#define PIC_PROG_GROUP_UI_H
+
+#include "progs/gui/prog_group_ui.h"
+#include "devices/pic/prog/pic_prog.h"
+
+namespace Programmer
+{
+class PicAdvancedDialog : public ::Programmer::AdvancedDialog
+{
+Q_OBJECT
+public:
+  PicAdvancedDialog(PicBase &base, QWidget *parent, const char *name);
+  virtual void updateDisplay();
+
+private:
+  QLabel *_voltages[Pic::Nb_VoltageTypes];
+  PicBase &base() { return static_cast<PicBase &>(_base); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/devices/pic/gui/pic_register_view.cpp b/src/devices/pic/gui/pic_register_view.cpp
new file mode 100644
index 0000000..ef7de9b
--- /dev/null
+++ b/src/devices/pic/gui/pic_register_view.cpp
@@ -0,0 +1,329 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pic_register_view.h"
+
+#include <qlayout.h>
+#include <qlabel.h>
+#include <qpushbutton.h>
+#include <qcheckbox.h>
+#include <qcombobox.h>
+#include <qpopupmenu.h>
+
+#include <klocale.h>
+#include <kiconloader.h>
+
+#include "libgui/main_global.h"
+#include "devices/gui/hex_word_editor.h"
+#include "common/gui/misc_gui.h"
+#include "devices/pic/base/pic.h"
+#include "progs/base/generic_prog.h"
+#include "progs/base/generic_debug.h"
+#include "progs/base/prog_group.h"
+#include "libgui/gui_debug_manager.h"
+#include "coff/base/text_coff.h"
+
+//-----------------------------------------------------------------------------
+Pic::BankWidget::BankWidget(uint i, QWidget *parent)
+  : QFrame(parent, "bank_widget"), _bindex(i), _bankCombo(0)
+{
+  setFrameStyle(WinPanel | Sunken);
+  QGridLayout *top = new QGridLayout(this, 1, 1, 5, 0);
+  top->setColSpacing(1, 4);
+  QFont f("courier", font().pointSize());
+
+  const Pic::Data &data = static_cast<const Pic::Data &>(*Main::deviceData());
+  const Pic::RegistersData &rdata = data.registersData();
+  bool debugging = Main::programmerGroup().isDebugger();
+  uint row = 0;
+  if ( rdata.nbBanks!=1 ) {
+    if ( data.is18Family() ) {
+      if ( (i/2)==0 ) {
+        QString title = ((i%2)==0 ? i18n("Access Bank (low)") : i18n("Access Bank (high)"));
+        QLabel *label = new QLabel(title, this);
+        label->setAlignment(AlignCenter);
+        top->addMultiCellWidget(label, row,row, 0,6, AlignHCenter);
+      } else {
+        _bankCombo = new QComboBox(this);
+        for (uint k=1; k<2*rdata.nbBanks-1; k++) {
+	  _bankCombo->insertItem((k%2)==0 ? i18n("Bank %1 (low)").arg(k/2) : i18n("Bank %1 (high)").arg(k/2));
+	}
+        if ( _bindex==3 ) _bankCombo->setCurrentItem(1);
+        connect(_bankCombo, SIGNAL(activated(int)), SLOT(bankChanged()));
+        top->addMultiCellWidget(_bankCombo, row,row, 0,6, AlignHCenter);
+      }
+    } else {
+      QLabel *label = new QLabel(i18n("Bank %1").arg(i), this);
+      label->setAlignment(AlignCenter);
+      top->addMultiCellWidget(label, row,row, 0,6, AlignHCenter);
+    }
+    row++;
+    top->setRowSpacing(row, 5);
+    row++;
+  }
+
+  KIconLoader loader;
+  QPixmap readIcon = loader.loadIcon("viewmag", KIcon::Small);
+  QPixmap editIcon = loader.loadIcon("edit", KIcon::Small);
+  uint nb;
+  if ( !data.is18Family() ) nb = rdata.nbRegistersPerBank();
+  else nb = kMax(rdata.accessBankSplit, rdata.nbRegistersPerBank() - rdata.accessBankSplit);
+  _registers.resize(nb);
+  for (uint k=0; k<nb; k++) {
+    _registers[k].alabel = new QLabel(this);
+    _registers[k].alabel->setFont(f);
+    top->addWidget(_registers[k].alabel, row, 0);
+    if (debugging) {
+      _registers[k].button = new PopupButton(this);
+      _registers[k].button->appendItem(i18n("Read"), readIcon, ReadId);
+      _registers[k].button->appendItem(i18n("Edit"), editIcon, EditId);
+      _registers[k].button->appendItem(i18n("Watch"), WatchId);
+      connect(_registers[k].button, SIGNAL(activated(int)), SLOT(buttonActivated(int)));
+      top->addWidget(_registers[k].button, row, 2);
+      _registers[k].edit = new Register::LineEdit(this);
+      connect(_registers[k].edit, SIGNAL(modified()), SLOT(write()));
+      _registers[k].edit->setFont(f);
+      top->addWidget(_registers[k].edit, row, 6);
+    } else {
+      _registers[k].label = new QLabel(this);
+      top->addWidget(_registers[k].label, row, 2);
+    }
+    row++;
+  }
+
+  if (debugging) {
+    top->setColSpacing(3, 5);
+    top->setColSpacing(5, 5);
+  }
+  top->setRowStretch(row, 1);
+
+  updateRegisterAddresses();
+}
+
+void Pic::BankWidget::bankChanged()
+{
+  updateRegisterAddresses();
+  updateView();
+}
+
+uint Pic::BankWidget::bank() const
+{
+  const Pic::Data &data = static_cast<const Pic::Data &>(*Main::deviceData());
+  if ( !data.is18Family() ) return _bindex;
+  if ( _bindex==0 ) return 0;
+  const Pic::RegistersData &rdata = data.registersData();
+  if ( _bindex==1 ) return rdata.nbBanks - 1;
+  return (_bankCombo->currentItem()+1)/2;
+}
+
+uint Pic::BankWidget::nbRegisters() const
+{
+  const Pic::Data &data = static_cast<const Pic::Data &>(*Main::deviceData());
+  const Pic::RegistersData &rdata = data.registersData();
+  if ( !data.is18Family() ) return rdata.nbRegistersPerBank();
+  if ( _bindex==0 || (_bankCombo && _bankCombo->currentItem()==2*int(rdata.nbBanks)-3) ) return rdata.accessBankSplit;
+  if ( _bindex==1 || (_bankCombo && _bankCombo->currentItem()==0) ) return rdata.nbRegistersPerBank() - rdata.accessBankSplit;
+  return rdata.nbRegistersPerBank() / 2;
+}
+
+uint Pic::BankWidget::indexOffset() const
+{
+  const Pic::Data &data = static_cast<const Pic::Data &>(*Main::deviceData());
+  const Pic::RegistersData &rdata = data.registersData();
+  uint offset = bank() * rdata.nbRegistersPerBank();
+  if ( !data.is18Family() ) return offset;
+  if ( _bindex==0 || (_bankCombo && (_bankCombo->currentItem()%2)==1) ) return offset;
+  if ( _bindex==1 || (_bankCombo && _bankCombo->currentItem()==0) ) return offset + rdata.accessBankSplit;
+  return offset + rdata.nbRegistersPerBank()/2;
+}
+
+void Pic::BankWidget::updateRegisterAddresses()
+{
+  const Pic::Data &data = static_cast<const Pic::Data &>(*Main::deviceData());
+  const Pic::RegistersData &rdata = data.registersData();
+  uint nbChars = rdata.nbCharsAddress();
+  uint nb = nbRegisters();
+  uint offset = indexOffset();
+  for (uint k=0; k<_registers.count(); k++) {
+    if ( k<nb ) {
+      _registers[k].alabel->show();
+      _registers[k].address = rdata.addressFromIndex(offset + k);
+      _registers[k].alabel->setText(toHexLabel(_registers[k].address, nbChars) + ":");
+    } else _registers[k].alabel->hide();
+  }
+}
+
+void Pic::BankWidget::buttonActivated(int id)
+{
+  const Pic::Data &data = static_cast<const Pic::Data &>(*Main::deviceData());
+  const Pic::RegistersData &rdata = data.registersData();
+  for (uint i=0; i<_registers.count(); i++) {
+    if ( sender()!=_registers[i].button ) continue;
+    Register::TypeData rtd(_registers[i].address, rdata.nbChars());
+    switch (id) {
+      case ReadId: Debugger::manager->readRegister(rtd); break;
+      case EditId:
+        _registers[i].edit->selectAll();
+        _registers[i].edit->setFocus();
+        break;
+      case WatchId: {
+        bool isWatched = Register::list().isWatched(rtd);
+        Debugger::manager->setRegisterWatched(rtd, !isWatched);
+        break;
+      }
+    }
+    break;
+  }
+}
+
+void Pic::BankWidget::write()
+{
+  const Pic::Data &data = static_cast<const Pic::Data &>(*Main::deviceData());
+  const Pic::RegistersData &rdata = data.registersData();
+  for (uint i=0; i<_registers.count(); i++) {
+    if ( sender()!=_registers[i].edit ) continue;
+    Register::TypeData rtd(_registers[i].address, rdata.nbChars());
+    Debugger::manager->writeRegister(rtd, _registers[i].edit->value());
+    break;
+  }
+}
+
+void Pic::BankWidget::updateView()
+{
+  const Pic::Data &data = static_cast<const Pic::Data &>(*Main::deviceData());
+  const Pic::RegistersData &rdata = data.registersData();
+  bool active = ( Main::programmerState()==Programmer::Halted );
+  const Coff::Object *coff = Debugger::manager->coff();
+  uint nb = nbRegisters();
+  for (uint i=0; i<_registers.count(); i++) {
+    uint address = _registers[i].address;
+    Device::RegisterProperties rp = rdata.properties(address);
+    QString label = rdata.label(address);
+    Register::TypeData rtd(address, rdata.nbChars());
+    bool isWatched = Register::list().isWatched(rtd);
+    if (coff) {
+      QString name = coff->variableName(address);
+      if ( !name.isEmpty() ) label = "<" + name + ">";
+    }
+    if (_registers[i].button) {
+      if ( i<nb ) {
+	_registers[i].button->show();
+	_registers[i].button->setText(label);
+	if (isWatched) {
+	  QFont f = _registers[i].button->font();
+	  f.setBold(true);
+	  _registers[i].button->setFont(f);
+	} else _registers[i].button->unsetFont();
+	_registers[i].button->popup()->setItemEnabled(ReadId, active && (rp & Device::Readable));
+	_registers[i].button->popup()->setItemEnabled(EditId, active);
+	_registers[i].button->popup()->changeItem(WatchId, isWatched ? i18n("Stop Watching") : i18n("Watch"));
+	_registers[i].button->popup()->setItemEnabled(WatchId, rp & Device::Readable);
+      } else _registers[i].button->hide();
+    }
+    if (_registers[i].label) {
+      if ( i<nb ) {
+	_registers[i].label->show();
+	_registers[i].label->setText(label);
+      } else _registers[i].label->hide();
+    }
+    if (_registers[i].edit) {
+      if ( i<nb ) {
+	_registers[i].edit->show();
+	_registers[i].edit->setEnabled(active);
+	BitValue value = Register::list().value(rtd);
+	if ( value!=Register::list().oldValue(rtd) ) _registers[i].edit->setColor(red);
+	else _registers[i].edit->unsetColor();
+	_registers[i].edit->setValue(NumberBase::Hex, value, rdata.nbChars());
+      } else _registers[i].edit->hide();
+    }
+  }
+}
+
+//-----------------------------------------------------------------------------
+Pic::RegisterView::RegisterView(QWidget *parent)
+  : Register::View(parent, "pic_register_view"),
+    _readAllButton(0), _clearAllButton(0)
+{
+  QVBoxLayout *vbox = new QVBoxLayout(this, 10, 10);
+  QHBoxLayout *hbox = new QHBoxLayout(vbox);
+
+  bool debugging = Main::programmerGroup().isDebugger();
+  const Pic::Data &data = static_cast<const Pic::Data &>(*Main::deviceData());
+  uint nb = data.registersData().nbBanks;
+  if ( debugging && nb!=0 ) {
+    QWidget *w = new QWidget(this);
+    hbox->addWidget(w);
+    QGridLayout *grid = new QGridLayout(w, 1, 1, 0, 10);
+    _readAllButton = new QPushButton(i18n("Read All"), w);
+    connect(_readAllButton, SIGNAL(clicked()), Debugger::manager, SLOT(readAllRegisters()));
+    grid->addWidget(_readAllButton, 0, 0);
+    _clearAllButton = new QPushButton(i18n("Clear all watching"), w);
+    connect(_clearAllButton, SIGNAL(clicked()), SLOT(stopWatchAllRegisters()));
+    grid->addWidget(_clearAllButton, 0, 1);
+    grid->setColStretch(2, 1);
+  }
+
+  QHBoxLayout *hbox2 = 0;
+  if ( nb==0 ) {
+    QLabel *label = new QLabel(i18n("Registers information not available."), this);
+    vbox->addWidget(label);
+  } else {
+    hbox = new QHBoxLayout(vbox);
+    hbox2 = new QHBoxLayout(hbox);
+    hbox->addStretch(1);
+    if ( data.is18Family() ) {
+      nb = 2;
+      for (uint k=1; k<data.registersData().nbBanks-1; k++) {
+        if ( !data.registersData().isBankUsed(k) ) continue;
+        nb += 2;
+        break;
+      }
+    }
+    _banks.resize(nb);
+    for (uint i=0; i<nb; i++) {
+      _banks[i] = new BankWidget(i, this);
+      _banks[i]->show();
+      hbox2->addWidget(_banks[i]);
+    }
+  }
+  vbox->addStretch(1);
+}
+
+void Pic::RegisterView::updateView()
+{
+  if (_readAllButton) _readAllButton->setEnabled(Main::programmerState()==Programmer::Halted);
+  for (uint i=0; i<_banks.count(); i++) if (_banks[i]) _banks[i]->updateView();
+}
+
+void Pic::RegisterView::stopWatchAllRegisters()
+{
+  Debugger::manager->stopWatchAll();
+}
+
+//----------------------------------------------------------------------------
+Pic::RegisterListViewItem::RegisterListViewItem(const Register::TypeData &data, KListViewItem *parent)
+  : Register::ListViewItem(data, parent)
+{}
+
+uint Pic::RegisterListViewItem::nbCharsAddress() const
+{
+  const Pic::Data &data = static_cast<const Pic::Data &>(*Main::deviceData());
+  return data.registersData().nbCharsAddress();
+}
+
+QString Pic::RegisterListViewItem::label() const
+{
+  if ( _data.type()!=Register::Regular ) return _data.name();
+  const Coff::Object *coff = Debugger::manager->coff();
+  if (coff) {
+    QString name = coff->variableName(_data.address());
+    if ( !name.isEmpty() ) return "<" + name + ">";
+  }
+  const Pic::Data &data = static_cast<const Pic::Data &>(*Main::deviceData());
+  return data.registersData().label(_data.address());
+}
diff --git a/src/devices/pic/gui/pic_register_view.h b/src/devices/pic/gui/pic_register_view.h
new file mode 100644
index 0000000..f5b9d4b
--- /dev/null
+++ b/src/devices/pic/gui/pic_register_view.h
@@ -0,0 +1,88 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PIC_REGISTER_VIEW_H
+#define PIC_REGISTER_VIEW_H
+
+#include <qvaluevector.h>
+class QPushButton;
+class QCheckBox;
+class QLabel;
+class QComboBox;
+
+#include "devices/gui/register_view.h"
+#include "devices/pic/base/pic.h"
+#include "devices/pic/base/pic_register.h"
+class PopupButton;
+namespace Device { class RegisterHexWordEditor; }
+
+namespace Pic
+{
+//-----------------------------------------------------------------------------
+class BankWidget : public QFrame
+{
+Q_OBJECT
+public:
+  BankWidget(uint bank, QWidget *parent);
+  void updateView();
+
+private slots:
+  void buttonActivated(int id);
+  void write();
+  void bankChanged();
+
+private:
+  enum Id { ReadId, EditId, WatchId };
+  class Data {
+  public:
+    Data() : label(0), button(0), edit(0) {}
+    uint address;
+    QLabel *alabel, *label;
+    PopupButton *button;
+    Register::LineEdit *edit;
+  };
+  uint _bindex;
+  QComboBox *_bankCombo;
+  QValueVector<Data> _registers;
+
+  uint bank() const;
+  uint nbRegisters() const;
+  uint indexOffset() const;
+  void updateRegisterAddresses();
+};
+
+//-----------------------------------------------------------------------------
+class RegisterView : public Register::View
+{
+Q_OBJECT
+public:
+  RegisterView(QWidget *parent);
+  virtual void updateView();
+
+private slots:
+  void stopWatchAllRegisters();
+
+private:
+  QPushButton *_readAllButton, *_clearAllButton;
+  QValueVector<BankWidget *> _banks;
+};
+
+//-----------------------------------------------------------------------------
+class RegisterListViewItem : public Register::ListViewItem
+{
+public:
+  RegisterListViewItem(const Register::TypeData &data, KListViewItem *parent);
+
+private:
+  virtual uint nbCharsAddress() const;
+  virtual QString label() const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/devices/pic/pic.pro b/src/devices/pic/pic.pro
new file mode 100644
index 0000000..cf3c06a
--- /dev/null
+++ b/src/devices/pic/pic.pro
@@ -0,0 +1,2 @@
+TEMPLATE = subdirs
+SUBDIRS = base xml pic xml_data prog
diff --git a/src/devices/pic/pic/Makefile.am b/src/devices/pic/pic/Makefile.am
new file mode 100644
index 0000000..e9deb80
--- /dev/null
+++ b/src/devices/pic/pic/Makefile.am
@@ -0,0 +1,5 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libpic.la
+libpic_la_SOURCES = pic_memory.cpp pic_group.cpp
diff --git a/src/devices/pic/pic/pic.pro b/src/devices/pic/pic/pic.pro
new file mode 100644
index 0000000..8893c67
--- /dev/null
+++ b/src/devices/pic/pic/pic.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = pic
+HEADERS += pic_memory.h pic_group.h
+SOURCES += pic_memory.cpp pic_group.cpp
\ No newline at end of file
diff --git a/src/devices/pic/pic/pic_group.cpp b/src/devices/pic/pic/pic_group.cpp
new file mode 100644
index 0000000..639d2cf
--- /dev/null
+++ b/src/devices/pic/pic/pic_group.cpp
@@ -0,0 +1,87 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pic_group.h"
+
+#if !defined(NO_KDE)
+# include <qpainter.h>
+#endif
+
+#include "pic_memory.h"
+#include "devices/pic/base/pic_register.h"
+
+Device::Memory *Pic::Group::createMemory(const Device::Data &data) const
+{
+  return new Memory(static_cast<const Pic::Data &>(data));
+}
+
+QString Pic::Group::informationHtml(const Device::Data &data) const
+{
+  const Pic::Data &pdata = static_cast<const Pic::Data &>(data);
+  // memory type
+  QString s = htmlTableRow(i18n("Memory Type"), data.memoryTechnology().label());
+  if ( pdata.isPresent(MemoryRangeType::Code) ) {
+    uint nbw = pdata.nbWords(MemoryRangeType::Code);
+    QString tmp = i18n("%1 words").arg(formatNumber(nbw));
+    tmp += i18n(" (%2 bits)").arg(pdata.nbBitsWord(MemoryRangeType::Code));
+    s += htmlTableRow(MemoryRangeType(MemoryRangeType::Code).label(), tmp);
+  }
+  if ( pdata.isPresent(MemoryRangeType::Eeprom) ) {
+    uint nbw = pdata.nbWords(MemoryRangeType::Eeprom);
+    QString tmp = i18n("%1 bytes").arg(formatNumber(nbw));
+    tmp += i18n(" (%2 bits)").arg(pdata.nbBitsWord(MemoryRangeType::Eeprom));
+    if ( !(pdata.range(MemoryRangeType::Eeprom).properties & Programmable) ) tmp += i18n(" (not programmable)");
+    s += htmlTableRow(MemoryRangeType(MemoryRangeType::Eeprom).label(), tmp);
+  }
+
+  // io ports
+  const Pic::RegistersData &rdata = pdata.registersData();
+  QString tmp;
+  if ( rdata.nbBanks!=0 ) {
+    uint nb = 0;
+    for (uint i=0; i<Device::MAX_NB_PORTS; i++) {
+      if ( !rdata.hasPort(i) ) continue;
+      uint nbBits = 0;
+      for (uint k=0; k<Device::MAX_NB_PORT_BITS; k++) if ( rdata.hasPortBit(i, k) ) nbBits++;
+      tmp += rdata.portName(i) + "[" + QString::number(nbBits) + "] ";
+      nb++;
+    }
+    if ( nb==0 ) tmp = i18n("<none>");
+    s += htmlTableRow(i18n("IO Ports"), tmp);
+  }
+
+  // features
+  tmp = QString::null;
+  FOR_EACH(Feature, feature) {
+    if ( !pdata.hasFeature(feature) ) continue;
+    if ( !tmp.isEmpty() ) tmp += ", ";
+    tmp += feature.label();
+  }
+  if ( !tmp.isEmpty() ) s += htmlTableRow(i18n("Features"), tmp);
+
+  return s;
+}
+
+#if !defined(NO_KDE)
+QPixmap Pic::Group::memoryGraph(const Device::Data &data) const
+{
+  const Pic::Data &pdata = static_cast<const Pic::Data &>(data);
+  QValueList<Device::MemoryGraphData> ranges;
+  FOR_EACH(Pic::MemoryRangeType, type) {
+    if ( type==Pic::MemoryRangeType::Eeprom || !pdata.isPresent(type) ) continue;
+    Device::MemoryGraphData data;
+    data.startAddress = pdata.range(type).start;
+    data.start = toHexLabel(pdata.range(type).start, pdata.nbCharsAddress());
+    data.endAddress = pdata.range(type).end;
+    data.end = toHexLabel(pdata.range(type).end, pdata.nbCharsAddress());
+    data.label = type.label();
+    ranges.append(data);
+  }
+  return Device::memoryGraph(ranges);
+}
+#endif
diff --git a/src/devices/pic/pic/pic_group.h b/src/devices/pic/pic/pic_group.h
new file mode 100644
index 0000000..1b95e09
--- /dev/null
+++ b/src/devices/pic/pic/pic_group.h
@@ -0,0 +1,39 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PIC_GROUP_H
+#define PIC_GROUP_H
+
+#include "common/global/global.h"
+#include "devices/base/device_group.h"
+#include "devices/pic/base/pic.h"
+
+namespace Pic
+{
+extern const uint DATA_SIZE;
+extern const char *DATA_STREAM;
+
+class Group : public Device::Group<Data>
+{
+public:
+  virtual QString name() const { return "pic"; }
+  virtual QString label() const { return i18n("PIC"); }
+  virtual Device::Memory *createMemory(const Device::Data &data) const;
+  virtual QString informationHtml(const Device::Data &data) const;
+#if !defined(NO_KDE)
+  virtual QPixmap memoryGraph(const Device::Data &data) const;
+#endif
+
+private:
+  virtual uint dataSize() const { return DATA_SIZE; }
+  virtual const char *dataStream() const { return DATA_STREAM; }
+};
+
+} // namespace
+
+#endif
diff --git a/src/devices/pic/pic/pic_memory.cpp b/src/devices/pic/pic/pic_memory.cpp
new file mode 100644
index 0000000..cccb2f9
--- /dev/null
+++ b/src/devices/pic/pic/pic_memory.cpp
@@ -0,0 +1,560 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pic_memory.h"
+
+#include <qfile.h>
+
+#include "common/common/misc.h"
+
+Pic::Memory::Memory(const Data &data)
+  : Device::Memory(data)
+{
+  FOR_EACH(MemoryRangeType, i) _ranges[i].resize(device().nbWords(i));
+  fill(BitValue());
+}
+
+void Pic::Memory::fill(MemoryRangeType type, BitValue value)
+{
+  for (uint i=0; i<_ranges[type].count(); i++) {
+    if ( type==MemoryRangeType::Config && !value.isInitialized() ) _ranges[type][i] = device().config()._words[i].bvalue;
+    else _ranges[type][i] = value;
+  }
+}
+
+bool Pic::Memory::isClear(MemoryRangeType type) const
+{
+  for (uint i=0; i<_ranges[type].count(); i++) {
+    if ( type==MemoryRangeType::Config ) {
+      if ( _ranges[type][i]!=device().config()._words[i].bvalue ) return false;
+    } else if ( _ranges[type][i].isInitialized() ) return false;
+  }
+  return true;
+}
+
+void Pic::Memory::fill(BitValue value)
+{
+  FOR_EACH(MemoryRangeType, k) fill(k, value);
+}
+
+void Pic::Memory::copyFrom(MemoryRangeType type, const Memory &memory)
+{
+  Q_ASSERT( memory.device().name()==device().name() );
+  for (uint i=0; i<_ranges[type].count(); i++) _ranges[type][i] = memory._ranges[type][i];
+}
+
+void Pic::Memory::copyFrom(const Device::Memory &memory)
+{
+  Q_ASSERT( memory.device().name()==device().name() );
+  FOR_EACH(MemoryRangeType, i) copyFrom(i, static_cast<const Memory &>(memory));
+}
+
+Device::Array Pic::Memory::arrayForWriting(MemoryRangeType type) const
+{
+  Device::Array data = _ranges[type];
+  for (uint i=0; i<data.count(); i++)
+    data[i] = data[i].maskWith(type==MemoryRangeType::Config ? device().config()._words[i].wmask : device().mask(type));
+  return data;
+}
+
+BitValue Pic::Memory::word(MemoryRangeType type, uint offset) const
+{
+  CRASH_ASSERT( offset<_ranges[type].size() );
+  return _ranges[type][offset];
+}
+
+BitValue Pic::Memory::normalizeWord(MemoryRangeType type, uint offset, BitValue value) const
+{
+  if ( type==MemoryRangeType::Config) {
+    const Config::Word &cword = device().config()._words[offset];
+    return value.maskWith(cword.usedMask());
+  }
+  if ( type==MemoryRangeType::UserId ) return value.maskWith(device().userIdRecommendedMask());
+  return value.maskWith(device().mask(type));
+}
+
+BitValue Pic::Memory::normalizedWord(MemoryRangeType type, uint offset) const
+{
+  return normalizeWord(type, offset, word(type, offset));
+}
+
+void Pic::Memory::setWord(MemoryRangeType type, uint offset, BitValue value)
+{
+  if ( offset>=_ranges[type].size() ) qDebug("Memory::setWord: type=%s offset=%s size=%s value=%s", type.key(), toHexLabelAbs(offset).latin1(), toHexLabelAbs(_ranges[type].size()).latin1(), toHexLabelAbs(value).latin1());
+  CRASH_ASSERT( offset<_ranges[type].size() );
+  _ranges[type][offset] = value;
+}
+
+void Pic::Memory::setArray(MemoryRangeType type, const Device::Array &data)
+{
+  CRASH_ASSERT( _ranges[type].size()==data.size() );
+  _ranges[type] = data;
+}
+
+QString Pic::Memory::findValue(const QString &maskName) const
+{
+  if ( maskName.isEmpty() ) return QString::null;
+  uint i;
+  const Config::Mask *mask = device().config().findMask(maskName, &i);
+  if ( mask==0 ) return QString::null;
+  BitValue v = word(MemoryRangeType::Config, i).maskWith(mask->value);
+  for (uint k=0; k<uint(mask->values.count()); k++)
+    if ( v.isInside(mask->values[k].value) ) return mask->values[k].name;
+  Q_ASSERT(false);
+  return QString::null;
+}
+
+AddressRange Pic::Memory::bootRange() const
+{
+  const Protection &protection = device().config().protection();
+  // with boot size
+  QString value = findValue(protection.bootSizeMaskName());
+  if ( !value.isEmpty() ) {
+    uint size = value.toUInt();
+    if ( size==0 ) return AddressRange();
+    Address start = device().range(MemoryRangeType::Code).start;
+    if ( device().architecture()==Architecture::P30F ) start = 0x100;
+    return AddressRange(start, 2 * size - 1); // instruction words
+  }
+  // only CPB
+  QString maskName = protection.bootMaskName(Protection::ProgramProtected);
+  const Config::Mask *mask = device().config().findMask(maskName);
+  for (uint k=0; k<uint(mask->values.count()); k++) {
+    AddressRangeVector rv = protection.extractRanges(mask->values[k].name, MemoryRangeType::Code);
+    if ( !rv.isEmpty() ) return rv[0];
+  }
+  Q_ASSERT(false);
+  return AddressRange();
+}
+
+AddressRange Pic::Memory::blockRange(uint i) const
+{
+  const Protection &protection = device().config().protection();
+  Q_ASSERT( i<protection.nbBlocks() );
+  if ( protection.family()==Protection::CodeGuard && i==1 ) { // general segment
+    AddressRange previous = blockRange(0);
+    if ( previous.isEmpty() ) previous = bootRange();
+    Address start = (previous.isEmpty() ? device().range(MemoryRangeType::Code).start : previous.end + 1);
+    return AddressRange(start, device().range(MemoryRangeType::Code).end);
+  }
+  QString maskName = protection.blockSizeMaskName(i);
+  if ( protection.family()==Protection::CodeGuard ) { // secure segment
+    QString value = findValue(maskName);
+    Q_ASSERT( !value.isEmpty() );
+    uint size = value.toUInt();
+    if ( size==0 ) return AddressRange();
+    AddressRange previous = bootRange();
+    Address start = (previous.isEmpty() ? device().range(MemoryRangeType::Code).start : previous.end + 1);
+    return AddressRange(start, 2 * size - 1);
+  }
+  AddressRange previous = (i==0 ? bootRange() : blockRange(i-1));
+  const Config::Mask *mask = device().config().findMask(maskName);
+  for (uint k=0; k<uint(mask->values.count()); k++) {
+    AddressRangeVector rv = protection.extractRanges(mask->values[k].name, MemoryRangeType::Code);
+    if ( !rv.isEmpty() ) return AddressRange(previous.end + 1, rv[0].end);
+  }
+  Q_ASSERT(false);
+  return AddressRange();
+}
+
+AddressRange Pic::Memory::bootProtectedRange(Protection::Type ptype) const
+{
+  const Protection &protection = device().config().protection();
+  QString maskName = protection.bootMaskName(ptype);
+  QString value = findValue(maskName);
+  if ( value.isEmpty() ) return AddressRange();
+  if ( protection.family()!=Protection::CodeGuard ) {
+    if ( protection.extractRanges(value, MemoryRangeType::Code).isEmpty() ) return AddressRange();
+  } else {
+    if ( value!=protection.securityValueName(ptype) ) return AddressRange();
+  }
+  return bootRange();
+}
+
+AddressRange Pic::Memory::blockProtectedRange(Protection::Type ptype, uint i) const
+{
+  const Protection &protection = device().config().protection();
+  QString maskName = protection.blockMaskName(ptype, i);
+  QString value = findValue(maskName);
+  if ( value.isEmpty() ) return AddressRange();
+  if ( protection.family()!=Protection::CodeGuard ) {
+    if ( protection.extractRanges(value, MemoryRangeType::Code).isEmpty() ) return AddressRange();
+  } else {
+    if ( value!=protection.securityValueName(ptype) ) return AddressRange();
+  }
+  return blockRange(i);
+}
+
+AddressRangeVector Pic::Memory::protectedRanges(Protection::Type ptype, MemoryRangeType type) const
+{
+  const Protection &protection = device().config().protection();
+  AddressRangeVector rv;
+  if ( type==MemoryRangeType::Code ) {
+    if ( protection.hasBootBlock() ) rv.append(bootProtectedRange(ptype));
+    if ( protection.nbBlocks()!=0 ) {
+      for (uint i=0; i<protection.nbBlocks(); i++) rv.append(blockProtectedRange(ptype, i));
+      return rv;
+    }
+  }
+  if ( protection.family()!=Protection::CodeGuard ) {
+    QString maskName = protection.maskName(ptype, type);
+    QString value = findValue(maskName);
+    //qDebug("%s %s", maskName.latin1(), value.latin1());
+    if ( !value.isEmpty() ) {
+      AddressRangeVector tmp = protection.extractRanges(value, type);
+      Q_ASSERT( tmp.count()==1 );
+      rv.append(tmp[0]);
+    }
+  }
+  return rv;
+}
+
+void Pic::Memory::setBootProtection(bool on, Protection::Type ptype)
+{
+  QString maskName = device().config().protection().bootMaskName(ptype);
+  setProtection(on, maskName, ptype);
+}
+
+void Pic::Memory::setBlockProtection(bool on, Protection::Type ptype, uint block)
+{
+  QString maskName = device().config().protection().blockMaskName(ptype, block);
+  setProtection(on, maskName, ptype);
+}
+
+void Pic::Memory::setProtection(bool on, Protection::Type ptype, MemoryRangeType type)
+{
+  const Protection &protection = device().config().protection();
+  if ( type==MemoryRangeType::Code ) {
+    if ( protection.hasBootBlock() ) setBootProtection(on, ptype);
+    if ( protection.nbBlocks()!=0 ) {
+      for (uint i=0; i<protection.nbBlocks(); i++) setBlockProtection(on, ptype, i);
+      return;
+    }
+  }
+  setProtection(on, protection.maskName(ptype, type), ptype);
+}
+
+void Pic::Memory::setConfigValue(const QString &maskName, const QString &valueName)
+{
+  uint i;
+  const Config::Mask *mask = device().config().findMask(maskName, &i);
+  Q_ASSERT(mask);
+  BitValue v = word(MemoryRangeType::Config, i);
+  v = v.clearMaskBits(mask->value);
+  for (int k=mask->values.count()-1; k>=0; k--) { // important to get the highest value in case of identical values
+    if ( mask->values[k].name!=valueName ) continue;
+    setWord(MemoryRangeType::Config, i, v | mask->values[k].value);
+    return;
+  }
+  Q_ASSERT(false);
+}
+
+void Pic::Memory::setProtection(bool on, const QString &maskName, Protection::Type ptype)
+{
+  const Config::Mask *mask = device().config().findMask(maskName, 0);
+  if( mask==0 ) return;
+  const Protection &protection = device().config().protection();
+  QString valueName;
+  if ( ptype==Protection::StandardSecurity || ptype==Protection::HighSecurity )
+    valueName = protection.securityValueName(ptype);
+  else {
+    for (int k=mask->values.count()-1; k>=0; k--) {
+      if ( (on && protection.isAllProtectedValueName(mask->values[k].name))
+           || (!on && protection.isNoneProtectedValueName(mask->values[k].name)) ) valueName = mask->values[k].name;
+    }
+  }
+  setConfigValue(maskName, valueName);
+}
+
+bool Pic::Memory::hasFlagOn(const QString &maskName, bool valueIfNotPresent) const
+{
+  const Config::Mask *mask = device().config().findMask(maskName, 0);
+  if ( mask==0 ) return valueIfNotPresent;
+  Q_ASSERT(mask);
+  Q_ASSERT( mask->values.count()==2 );
+  return ( findValue(maskName)=="On" );
+}
+
+void Pic::Memory::setFlagOn(const QString &maskName, bool on)
+{
+  const Config::Mask *mask = device().config().findMask(maskName, 0);
+  Q_UNUSED(mask);
+  Q_ASSERT(mask);
+  Q_ASSERT( mask->values.count()==2 );
+  setConfigValue(maskName, on ? "On" : "Off");
+}
+
+void Pic::Memory::checksumCheckFill()
+{
+  clear();
+  switch (device().architecture().type()) {
+    case Architecture::P10X:
+      setWord(MemoryRangeType::Code, device().range(MemoryRangeType::Code).start.toUInt(), 0x723);
+      setWord(MemoryRangeType::Code, device().range(MemoryRangeType::Code).end.toUInt(), 0x723);
+      break;
+    case Architecture::P16X:
+      if ( device().name()=="16F72" || device().name()=="16F73" || device().name()=="16F74" || device().name()=="16F76" || device().name()=="16F77"
+           || device().name()=="16CR73" || device().name()=="16CR74" || device().name()=="16CR76" || device().name()=="16CR77" ) {
+        setWord(MemoryRangeType::Code, device().range(MemoryRangeType::Code).start.toUInt(), 0x05E6);
+        setWord(MemoryRangeType::Code, device().range(MemoryRangeType::Code).end.toUInt(), 0x05E6);
+      } else {
+        setWord(MemoryRangeType::Code, device().range(MemoryRangeType::Code).start.toUInt(), 0x25E6);
+        setWord(MemoryRangeType::Code, device().range(MemoryRangeType::Code).end.toUInt(), 0x25E6);
+      }
+      break;
+    case Architecture::P17C:
+      setWord(MemoryRangeType::Code, device().range(MemoryRangeType::Code).start.toUInt(), 0xC0DE);
+      setWord(MemoryRangeType::Code, device().range(MemoryRangeType::Code).end.toUInt(), 0xC0DE);
+      break;
+    case Architecture::P18C:
+    case Architecture::P18F:
+    case Architecture::P18J:
+      setWord(MemoryRangeType::Code, device().range(MemoryRangeType::Code).start.toUInt()/2, 0xAAFF);
+      setWord(MemoryRangeType::Code, device().range(MemoryRangeType::Code).end.toUInt()/2, 0xFFAA);
+      break;
+    case Architecture::P24F:
+    case Architecture::P24H:
+    case Architecture::P30F:
+    case Architecture::P33F:
+      setWord(MemoryRangeType::Code, device().range(MemoryRangeType::Code).start.toUInt(), 0xAAAAAA);
+      setWord(MemoryRangeType::Code, device().range(MemoryRangeType::Code).end.toUInt(), 0xAAAAAA);
+      break;
+    case Architecture::Nb_Types: Q_ASSERT(false); break;
+  }
+}
+
+BitValue Pic::Memory::checksum() const
+{
+  // code
+  BitValue mask = device().mask(MemoryRangeType::Code);
+  AddressRangeVector rv = protectedRanges(Protection::ProgramProtected, MemoryRangeType::Code);
+  bool isProtected = !rv.isEmpty();
+  uint inc = device().addressIncrement(MemoryRangeType::Code);
+  //uint nbChars = device().nbCharsWord(MemoryRangeType::Code);
+  //qDebug("protected: %i  nb: %s (%s)", isProtected, toHexLabelAbs(inc*device().nbWords(MemoryRangeType::Code)).latin1(), toHexLabel(mask, nbChars).latin1());
+  //for (uint i=0; i<rv.count(); i++)
+  //  qDebug("protected: %s:%s", toHex(rv[i].start, nbChars).latin1(), toHex(rv[i].end, nbChars).latin1());
+  if ( isProtected && (device().architecture()==Pic::Architecture::P18J || device().architecture()==Pic::Architecture::P24F) )
+    return 0x0000;
+  Checksum::Algorithm algorithm = Checksum::Algorithm::Normal;
+  BitValue cs = 0x0000;
+  const Protection &protection = device().config().protection();
+  if ( protection.family()==Protection::BasicProtection ) {
+    QString maskName = protection.maskName(Protection::ProgramProtected, MemoryRangeType::Code);
+    QString valueName = findValue(maskName);
+    const QMap<QString, Checksum::Data> &checksums = device().checksums();
+    if ( checksums.contains(valueName) ) { // #### REMOVE ME !!
+      algorithm = checksums[valueName].algorithm;
+      cs = checksums[valueName].constant;
+    }
+  }
+  //qDebug("constant: %s", toHexLabelAbs(cs).data());
+  //qDebug("algo: %s", Checksum::ALGORITHM_DATA[algorithm].name);
+  for (uint i=0; i<device().nbWords(MemoryRangeType::Code); i++) {
+    if ( algorithm==Checksum::Algorithm::Normal && rv.contains(inc*i) ) continue;
+    BitValue v = word(MemoryRangeType::Code, i).maskWith(mask);
+    //if ( i==0 || i==device().nbWords(MemoryRangeType::Code)-1 ) qDebug("%s %s", toHexLabel(i, 4).latin1(), toHexLabel(v, 4).latin1());
+    switch (device().architecture().type()) {
+      case Architecture::P10X:
+      case Architecture::P16X:
+      case Architecture::P17C:
+        if ( rv.contains(i) ) {
+          switch (algorithm.type()) {
+            case Checksum::Algorithm::Normal: cs += v;           break;
+            case Checksum::Algorithm::XOR4:   cs += v.XORn(4);  break;
+            case Checksum::Algorithm::XNOR7:  cs += v.XNORn(7); break;
+            case Checksum::Algorithm::XNOR8:  cs += v.XNORn(8) + (v.XNORn(8) << 8); break;
+            case Checksum::Algorithm::Nb_Types: Q_ASSERT(false); break;
+          }
+        } else cs += v;
+        break;
+      case Architecture::P18C:
+      case Architecture::P18F: // #### not true for all 18F ??
+      case Architecture::P18J:
+        cs += v.byte(0) + v.byte(1);
+        break;
+      case Architecture::P24F:
+      case Architecture::P24H:
+      case Architecture::P30F:
+      case Architecture::P33F:
+        cs += v.byte(0) + v.byte(1) + v.byte(2);
+        break;
+      case Architecture::Nb_Types: Q_ASSERT(false); break;
+    }
+  }
+  //qDebug("after code: %s", toHexLabelAbs(cs).latin1());
+  // config
+  const Config &config = device().config();
+  for (uint i=0; i<uint(config._words.count()); i++) {
+    const Config::Word &cword = config._words[i];
+    BitValue v = word(MemoryRangeType::Config, i).maskWith(cword.cmask);
+    //uint nbChars = device().nbCharsWord(MemoryRangeType::Config);
+    // qDebug("%i: %s %s", i, toHex(word(MemoryRangeType::Config, i), nbChars).latin1(), toHex(cword.cmask, nbChars).latin1());
+    if ( ( device().name()=="16C61" || device().name()=="16C71" ) && isProtected ) cs += v | 0x0060;
+    else if ( device().is16bitFamily() ) cs += v.byte(0) + v.byte(1);
+    else cs += v;
+  }
+  //qDebug("after config: %s", toHexLabelAbs(cs).latin1());
+  // user ids
+  if ( isProtected && device().isPresent(MemoryRangeType::UserId) && !device().is16bitFamily() && algorithm==Checksum::Algorithm::Normal ) {
+    BitValue id = 0x0;
+    uint nb = device().nbWords(MemoryRangeType::UserId);
+    for (uint i=0; i<nb; i++) {
+      BitValue v = word(MemoryRangeType::UserId, nb-i-1).maskWith(0xF);
+      if ( device().is18Family() ) id += v;
+      else {
+        // qDebug("id %i (%i): %s %s", i, nbb, toHex(v, 4).latin1(), toHex(v << (nbb*i), 9).latin1());
+        id += v << (4*i);
+      }
+    }
+    //qDebug("id %s", toHexLabelAbs(id).latin1());
+    cs += id;
+  }
+  //qDebug("checksum: %s %s", toHexLabelAbs(cs).latin1(), toHex(cs & 0xFFFF, 4).latin1());
+  return cs.maskWith(0xFFFF);
+}
+
+BitValue Pic::Memory::unprotectedChecksum() const
+{
+  const Protection &protection = device().config().protection();
+  Memory tmp(*this);
+  if ( protection.hasBootBlock() ) tmp.setBootProtection(false, Protection::ProgramProtected);
+  if ( protection.nbBlocks()!=0 ) {
+    for (uint i=0; i<protection.nbBlocks(); i++)
+      tmp.setBlockProtection(false, Protection::ProgramProtected, i);
+  } else tmp.setProtection(false, Protection::ProgramProtected, MemoryRangeType::Code);
+  tmp.setProtection(false, Protection::ProgramProtected, MemoryRangeType::Eeprom);
+  tmp.setProtection(false, Protection::ProgramProtected, MemoryRangeType::Config);
+  tmp.setProtection(false, Protection::ProgramProtected, MemoryRangeType::Cal);
+  return tmp.checksum();
+}
+
+void Pic::Memory::setUserIdToUnprotectedChecksum()
+{
+  BitValue cs = unprotectedChecksum();
+  uint nb = device().nbWords(MemoryRangeType::UserId);
+  for (uint i=0; i<nb; i++) setWord(MemoryRangeType::UserId, nb-i-1, cs.nybble(i));
+}
+
+//-----------------------------------------------------------------------------
+void Pic::Memory::savePartial(QTextStream &stream, HexBuffer::Format format) const
+{
+  // save memory ranges in the same order as MPLAB (for easy checking)
+  const MemoryRangeType saveOrder[] = { MemoryRangeType::Code, MemoryRangeType::Eeprom, MemoryRangeType::Config, MemoryRangeType::UserId, MemoryRangeType::Cal, MemoryRangeType::Nb_Types };
+  HexBuffer hb;
+  for (uint i=0; saveOrder[i]!=MemoryRangeType::Nb_Types; i++) {
+    hb.clear();
+    toHexBuffer(saveOrder[i], hb);
+    hb.savePartial(stream, format);
+  }
+}
+
+//-----------------------------------------------------------------------------
+void Pic::Memory::toHexBuffer(MemoryRangeType type, HexBuffer &hb) const
+{
+  if ( !device().isWritable(type) ) return;
+  uint nbBytes = device().architecture().data().nbBytesWord;
+  bool packed = device().architecture().data().packed;
+  uint offset = device().range(type).hexFileOffset;
+  if ( offset==0 ) offset = device().range(type).start.toUInt();
+  BitValue mask = device().mask(type);
+  uint wNbBytes = nbBytes;
+  if ( packed && type!=Pic::MemoryRangeType::Code ) {
+    offset /= 2;
+    wNbBytes /= 2;
+  }
+  uint byte = 0;
+  uint wOffset = 0;
+  uint wByte = 0;
+  //qDebug("%s wnb=%i snb=%i div=%i", MEMORY_RANGE_TYPE_DATA[type].label, wNbBytes, sNbBytes, div);
+  for (uint k=0; k<wNbBytes*device().nbWords(type); k++) {
+    // set byte
+    BitValue s = _ranges[type][wOffset].maskWith(mask);
+    //if ( k<4 ) qDebug("s=%s so=%s sb=%i wo=%i wb=%i", toHex(s, 8).data(), toHex(sOffset, 8).data(), sByte, wOffset, wByte);
+    s = s.byte(wByte);
+    if ( (byte%2)==0 ) hb.insert(offset, s);
+    else hb.insert(offset, hb[offset] | (s << ((byte%2)*8)));
+    // increment offsets
+    byte++;
+    if ( (byte%nbBytes)==0 ) {
+      byte = 0;
+      offset++;
+    } else if ( byte==2 ) offset++;
+    wByte++;
+    if ( (wByte%wNbBytes)==0 ) {
+      wByte = 0;
+      wOffset++;
+    }
+  }
+}
+
+HexBuffer Pic::Memory::toHexBuffer() const
+{
+  HexBuffer hb;
+  FOR_EACH(MemoryRangeType, i) toHexBuffer(i, hb);
+  return hb;
+}
+
+void Pic::Memory::fromHexBuffer(MemoryRangeType type, const HexBuffer &hb, WarningTypes &result,
+                                QStringList &warnings, QMap<uint, bool> &inRange)
+{
+  if ( !device().isWritable(type) ) return;
+  uint nbBytes = device().architecture().data().nbBytesWord;
+  bool packed = device().architecture().data().packed;
+  uint offset = device().range(type).hexFileOffset;
+  if ( offset==0 ) offset = device().range(type).start.toUInt();
+  BitValue mask = device().mask(type);
+  uint wNbBytes = nbBytes;
+  if ( packed && type!=Pic::MemoryRangeType::Code ) {
+    offset /= 2;
+    wNbBytes /= 2;
+  }
+  uint byte = 0;
+  uint wOffset = 0;
+  uint wByte = 0;
+  //qDebug("%s wnb=%i snb=%i", MEMORY_RANGE_TYPE_DATA[type].label, wNbBytes, nbBytes);
+  for (uint k=0; k<wNbBytes*device().nbWords(type); k++) {
+    // set byte
+    BitValue s = hb[offset];
+    //if ( k<4 ) qDebug("s=%s so=%s sb=%i wo=%i wb=%i", toHex(s, 8).data(), toHex(offset, 8).data(), byte, wOffset, wByte);
+    if ( !s.isInitialized() ) {
+      if ( type==MemoryRangeType::Config ) _ranges[type][wOffset] = mask;
+      else _ranges[type][wOffset] = BitValue();
+    } else {
+      inRange[offset] = true;
+      s = s.byte(byte%2);
+      if ( wByte==0 ) _ranges[type][wOffset] = s;
+      else _ranges[type][wOffset] |= (s << (wByte*8));
+    }
+    // increment offsets
+    byte++;
+    if ( (byte%nbBytes)==0 ) {
+      byte = 0;
+      offset++;
+    } else if ( byte==2 ) offset++;
+    wByte++;
+    if ( (wByte%wNbBytes)==0 ) {
+      if ( _ranges[type][wOffset].isInitialized() ) {
+        if ( !(result & ValueTooLarge) && _ranges[type][wOffset].maskWith(mask)!=_ranges[type][wOffset] ) {
+          result |= ValueTooLarge;
+          warnings += i18n("At least one word (at offset %1) is larger (%2) than the corresponding mask (%3).")
+                      .arg(toHexLabel(offset, 8)).arg(toHexLabel(_ranges[type][wOffset], 8)).arg(toHexLabel(mask, 8));
+        }
+        _ranges[type][wOffset] = _ranges[type][wOffset].maskWith(mask);
+      }
+      wByte = 0;
+      wOffset++;
+    }
+  }
+}
+
+void Pic::Memory::fromHexBuffer(const HexBuffer &hb, WarningTypes &result,
+                                QStringList &warnings, QMap<uint, bool> &inRange)
+{
+  FOR_EACH(MemoryRangeType, i) fromHexBuffer(i, hb, result, warnings, inRange);
+}
diff --git a/src/devices/pic/pic/pic_memory.h b/src/devices/pic/pic/pic_memory.h
new file mode 100644
index 0000000..f7c98ba
--- /dev/null
+++ b/src/devices/pic/pic/pic_memory.h
@@ -0,0 +1,80 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PIC_MEMORY_H
+#define PIC_MEMORY_H
+
+#include "common/global/global.h"
+#include "devices/base/generic_memory.h"
+#include "devices/base/hex_buffer.h"
+#include "devices/pic/base/pic_config.h"
+
+namespace Pic
+{
+
+class Memory : public Device::Memory
+{
+public:
+  Memory(const Data &data);
+  const Data &device() const { return static_cast<const Data &>(_device); }
+  virtual void fill(BitValue value);
+  void checksumCheckFill(); // a special memory fill for checksum check (cf datasheets)
+  virtual void fill(MemoryRangeType type, BitValue value);
+  virtual void clear() { Device::Memory::clear(); }
+  bool isClear(MemoryRangeType type) const;
+  void clear(MemoryRangeType type) { fill(type, BitValue()); }
+  Device::Array arrayForWriting(MemoryRangeType type) const;
+  BitValue word(MemoryRangeType type, uint offset) const;
+  BitValue normalizeWord(MemoryRangeType type, uint offset, BitValue value) const;
+  BitValue normalizedWord(MemoryRangeType type, uint offset) const;
+  void setWord(MemoryRangeType type, uint offset, BitValue value);
+  void setArray(MemoryRangeType type, const Device::Array &array);
+
+  AddressRange bootRange() const;
+  AddressRange blockRange(uint i) const;
+  bool isBootProtected(Protection::Type ptype) const { return !bootProtectedRange(ptype).isEmpty(); }
+  bool isBlockProtected(Protection::Type ptype, uint i) const { return !blockProtectedRange(ptype, i).isEmpty(); }
+  bool isProtected(Protection::Type ptype, MemoryRangeType type) const { return !protectedRanges(ptype, type).isEmpty(); }
+  AddressRangeVector protectedRanges(Protection::Type ptype, MemoryRangeType type) const;
+  void setConfigValue(const QString &maskName, const QString &valueName);
+  bool hasDebugOn() const { return hasFlagOn("DEBUG", false); }
+  void setDebugOn(bool on) { setFlagOn("DEBUG", on); }
+  bool hasWatchdogTimerOn() const { return hasFlagOn("WDT", false); }
+  void setWatchdogTimerOn(bool on) { return setFlagOn("WDT", on); }
+  void setBootProtection(bool on, Protection::Type ptype);
+  void setBlockProtection(bool on, Protection::Type ptype, uint block);
+  void setProtection(bool on, Protection::Type ptype, MemoryRangeType type);
+
+  virtual BitValue checksum() const;
+  BitValue unprotectedChecksum() const;
+  void setUserIdToUnprotectedChecksum();
+
+  virtual HexBuffer toHexBuffer() const;
+  virtual void copyFrom(const Device::Memory &memory);
+  void copyFrom(MemoryRangeType type, const Memory &memory);
+  void fromHexBuffer(MemoryRangeType type, const HexBuffer &hb, WarningTypes &warningTypes,
+                     QStringList &warnings, QMap<uint, bool> &inRange);
+
+private:
+  QMap<MemoryRangeType, Device::Array> _ranges;
+
+  void toHexBuffer(MemoryRangeType type, HexBuffer &hb) const;
+  virtual void savePartial(QTextStream &stream, HexBuffer::Format format) const;
+  virtual void fromHexBuffer(const HexBuffer &hb, WarningTypes &warningTypes,
+                             QStringList &warnings, QMap<uint, bool> &inRange);
+  QString findValue(const QString &maskName) const;
+  bool hasFlagOn(const QString &maskName, bool valueIfNotPresent) const;
+  void setFlagOn(const QString &maskName, bool on);
+  void setProtection(bool on, const QString &maskName, Protection::Type ptype);
+  AddressRange bootProtectedRange(Protection::Type ptype) const;
+  AddressRange blockProtectedRange(Protection::Type ptype, uint block) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/devices/pic/prog/Makefile.am b/src/devices/pic/prog/Makefile.am
new file mode 100644
index 0000000..055d2cd
--- /dev/null
+++ b/src/devices/pic/prog/Makefile.am
@@ -0,0 +1,5 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libpicprog.la
+libpicprog_la_SOURCES = pic_prog.cpp pic_prog_specific.cpp pic_debug.cpp
diff --git a/src/devices/pic/prog/pic_debug.cpp b/src/devices/pic/prog/pic_debug.cpp
new file mode 100644
index 0000000..443bb10
--- /dev/null
+++ b/src/devices/pic/prog/pic_debug.cpp
@@ -0,0 +1,118 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pic_debug.h"
+
+#include "common/common/misc.h"
+#include "devices/pic/base/pic_register.h"
+#include "progs/manager/debug_manager.h"
+
+//----------------------------------------------------------------------------
+Register::TypeData Debugger::PicBase::registerTypeData(const QString &name) const
+{
+  const Pic::RegistersData &rdata = device()->registersData();
+  Q_ASSERT(rdata.sfrs.contains(name));
+  return Register::TypeData(rdata.sfrs[name].address, rdata.nbChars());
+}
+
+bool Debugger::PicBase::updatePortStatus(uint index, QMap<uint, Device::PortBitData> &bits)
+{
+  const Pic::RegistersData &rdata = device()->registersData();
+  BitValue tris;
+  if ( rdata.hasTris(index) ) {
+    tris = Register::list().value(registerTypeData(rdata.trisName(index)));
+    Q_ASSERT( tris.isInitialized() );
+  }
+  BitValue port = Register::list().value(registerTypeData(rdata.portName(index)));
+  Q_ASSERT( port.isInitialized() );
+  BitValue latch;
+  if ( rdata.hasLatch(index) ) {
+    latch = Register::list().value(registerTypeData(rdata.latchName(index)));
+    Q_ASSERT( latch.isInitialized() );
+  }
+  for (uint i=0; i<Device::MAX_NB_PORT_BITS; i++) {
+    if ( !rdata.hasPortBit(index, i) ) continue;
+    bits[i].state = Device::Unknown;
+    bits[i].drivenState = Device::IoUnknown;
+    bits[i].drivingState = Device::IoUnknown;
+    if ( tris.isInitialized() ) {
+      bits[i].driving = !tris.bit(i);
+      if (bits[i].driving) {
+        bits[i].drivenState = Device::IoUnknown;
+        bits[i].drivingState = (port.bit(i) ? Device::IoHigh : Device::IoLow);
+      } else {
+        bits[i].drivenState = (port.bit(i) ? Device::IoHigh : Device::IoLow);
+        if ( latch.isInitialized() ) bits[i].drivingState = (latch.bit(i) ? Device::IoHigh : Device::IoLow);
+        else bits[i].drivingState = Device::IoUnknown;
+      }
+    }
+  }
+  return true;
+}
+
+//----------------------------------------------------------------------------
+Debugger::PicBase &Debugger::PicSpecific::base()
+{
+  return static_cast<PicBase &>(_base);
+}
+const Debugger::PicBase &Debugger::PicSpecific::base() const
+{
+  return static_cast<PicBase &>(_base);
+}
+
+bool Debugger::PicSpecific::updateStatus()
+{
+  if ( !Debugger::manager->readRegister(base().pcTypeData()) ) return false;
+  if ( !Debugger::manager->readRegister(base().registerTypeData("STATUS")) ) return false;
+  if ( !Debugger::manager->readRegister(wregTypeData()) ) return false;
+  return true;
+}
+
+//----------------------------------------------------------------------------
+Register::TypeData Debugger::P16FSpecific::wregTypeData() const
+{
+  return Register::TypeData("WREG", device().registersData().nbChars());
+}
+
+QString Debugger::P16FSpecific::statusString() const
+{
+  const Pic::RegistersData &rdata = device().registersData();
+  BitValue status = Register::list().value(base().registerTypeData("STATUS"));
+  uint bank = (status.bit(5) ? 1 : 0) + (status.bit(6) ? 2 : 0);
+  BitValue wreg = Register::list().value(wregTypeData());
+  return QString("W:%1   %2 %3 %4   PC:%5   Bank:%6")
+         .arg(toHexLabel(wreg, rdata.nbChars())).arg(status.bit(2) ? "Z" : "z")
+         .arg(status.bit(1) ? "DC" : "dc").arg(status.bit(0) ? "C" : "c")
+         .arg(toHexLabel(_base.pc(), device().nbCharsAddress())).arg(bank);
+}
+
+//----------------------------------------------------------------------------
+bool Debugger::P18FSpecific::updateStatus()
+{
+  if ( !PicSpecific::updateStatus() ) return false;
+  if ( !Debugger::manager->readRegister(base().registerTypeData("BSR")) ) return false;
+  return true;
+}
+
+Register::TypeData Debugger::P18FSpecific::wregTypeData() const
+{
+  return base().registerTypeData("WREG");
+}
+
+QString Debugger::P18FSpecific::statusString() const
+{
+  const Pic::RegistersData &rdata = device().registersData();
+  BitValue status = Register::list().value(base().registerTypeData("STATUS"));
+  BitValue bsr = Register::list().value(base().registerTypeData("BSR"));
+  BitValue wreg = Register::list().value(wregTypeData());
+  return QString("W:%1   %2 %3 %4 %5 %6  PC:%7   Bank:%8")
+         .arg(toHexLabel(wreg, rdata.nbChars())).arg(status.bit(4) ? "N" : "n")
+         .arg(status.bit(3) ? "OV" : "ov").arg(status.bit(2) ? "Z" : "z")
+         .arg(status.bit(1) ? "DC" : "dc").arg(status.bit(0) ? "C" : "c")
+         .arg(toHexLabel(base().pc(), device().nbCharsAddress())).arg(toLabel(bsr));
+}
diff --git a/src/devices/pic/prog/pic_debug.h b/src/devices/pic/prog/pic_debug.h
new file mode 100644
index 0000000..dfb8af6
--- /dev/null
+++ b/src/devices/pic/prog/pic_debug.h
@@ -0,0 +1,65 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PIC_DEBUG_H
+#define PIC_DEBUG_H
+
+#include "progs/base/generic_debug.h"
+#include "pic_prog.h"
+#include "devices/base/register.h"
+
+namespace Debugger
+{
+class PicBase;
+
+//----------------------------------------------------------------------------
+class PicSpecific : public DeviceSpecific
+{
+public:
+  PicSpecific(Debugger::Base &base) : DeviceSpecific(base) {}
+  const Pic::Data &device() const { return static_cast<const Pic::Data &>(*_base.device()); }
+  PicBase &base();
+  const PicBase &base() const;
+  virtual bool updateStatus();
+  virtual Register::TypeData wregTypeData() const = 0;
+};
+
+//----------------------------------------------------------------------------
+class P16FSpecific : public PicSpecific
+{
+public:
+  P16FSpecific(Debugger::Base &base) : PicSpecific(base) {}
+  virtual QString statusString() const;
+  virtual Register::TypeData wregTypeData() const;
+};
+
+//----------------------------------------------------------------------------
+class P18FSpecific : public PicSpecific
+{
+public:
+  P18FSpecific(Debugger::Base &base) : PicSpecific(base) {}
+  virtual QString statusString() const;
+  virtual bool updateStatus();
+  virtual Register::TypeData wregTypeData() const;
+};
+
+//----------------------------------------------------------------------------
+class PicBase : public Debugger::Base
+{
+public:
+  PicBase(Programmer::PicBase &base) : Debugger::Base(base) {}
+  PicSpecific *deviceSpecific() { return static_cast<PicSpecific *>(_deviceSpecific); }
+  const PicSpecific *deviceSpecific() const { return static_cast<const PicSpecific *>(_deviceSpecific); }
+  const Pic::Data *device() const { return static_cast<const Pic::Data *>(Debugger::Base::device()); }
+  Register::TypeData registerTypeData(const QString &name) const;
+  virtual bool updatePortStatus(uint index, QMap<uint, Device::PortBitData> &bits);
+};
+
+} // namespace
+
+#endif
diff --git a/src/devices/pic/prog/pic_prog.cpp b/src/devices/pic/prog/pic_prog.cpp
new file mode 100644
index 0000000..bc7dcd1
--- /dev/null
+++ b/src/devices/pic/prog/pic_prog.cpp
@@ -0,0 +1,751 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pic_prog.h"
+
+#include "common/global/global.h"
+#include "devices/list/device_list.h"
+#include "progs/base/prog_config.h"
+#include "progs/base/prog_group.h"
+#include "pic_debug.h"
+
+//-----------------------------------------------------------------------------
+bool Programmer::PicGroup::canReadVoltages() const
+{
+  for (uint i=0; i<Pic::Nb_VoltageTypes; i++)
+    if ( canReadVoltage(Pic::VoltageType(i)) ) return true;
+  return false;
+}
+
+Debugger::DeviceSpecific *Programmer::PicGroup::createDebuggerDeviceSpecific(::Debugger::Base &base) const
+{
+  const Pic::Data *data = static_cast<const Pic::Data *>(base.device());
+  if ( data==0 ) return 0;
+  switch (data->architecture().type()) {
+    case Pic::Architecture::P10X:
+    case Pic::Architecture::P16X: return new ::Debugger::P16FSpecific(base);
+    case Pic::Architecture::P18C:
+    case Pic::Architecture::P18F:
+    case Pic::Architecture::P18J: return new ::Debugger::P18FSpecific(base);
+    case Pic::Architecture::P24F:
+    case Pic::Architecture::P24H:
+    case Pic::Architecture::P30F:
+    case Pic::Architecture::P33F:
+    case Pic::Architecture::P17C:
+    case Pic::Architecture::Nb_Types: break;
+  }
+  Q_ASSERT(false);
+  return 0;
+}
+
+//-----------------------------------------------------------------------------
+Programmer::PicBase::PicBase(const Group &group, const Pic::Data *data, const char *name)
+  : Base(group, data, name), _deviceMemory(0), _hasProtectedCode(false), _hasProtectedEeprom(false)
+{
+  if (data) _deviceMemory = new Pic::Memory(*data);
+}
+
+Programmer::PicBase::~PicBase()
+{
+  delete _deviceMemory;
+}
+
+void Programmer::PicBase::clear()
+{
+  ::Programmer::Base::clear();
+  for (uint i=0; i<Pic::Nb_VoltageTypes; i++) {
+    _voltages[i].error = false;
+    _voltages[i].value = UNKNOWN_VOLTAGE;
+  }
+}
+
+uint Programmer::PicBase::nbSteps(Task task, const Device::MemoryRange *range) const
+{
+  const Pic::MemoryRange *prange = static_cast<const Pic::MemoryRange *>(range);
+  switch (task.type()) {
+    case Task::Erase: return 1;
+    case Task::Read:
+    case Task::Verify:
+    case Task::BlankCheck: {
+      uint nb = 0;
+      FOR_EACH(Pic::MemoryRangeType, type) {
+        if ( type!=Pic::MemoryRangeType::Code && type!=Pic::MemoryRangeType::Eeprom ) continue;
+        if ( !device()->isReadable(type) || !specific()->canReadRange(type) ) continue;
+        if ( !prange->all() && prange->_type!=type ) continue;
+        nb += device()->nbWords(type);
+      }
+      return QMAX(nb, uint(1));
+    }
+    case Task::Write: {
+      uint nb = 0;
+      FOR_EACH(Pic::MemoryRangeType, type) {
+        if ( type!=Pic::MemoryRangeType::Code && type!=Pic::MemoryRangeType::Eeprom ) continue;
+        if ( !device()->isWritable(type) || !specific()->canWriteRange(type) ) continue;
+        if ( !prange->all() && prange->_type!=type ) continue;
+        nb += device()->nbWords(type);
+        if ( readConfigEntry(Config::VerifyAfterProgram).toBool() ) nb += device()->nbWords(type);
+      }
+      return QMAX(nb, uint(1));
+    }
+    case Task::Nb_Types: break;
+  }
+  Q_ASSERT(false);
+  return 0;
+}
+
+bool Programmer::PicBase::readVoltages()
+{
+  if ( !hardware()->readVoltages(_voltages) ) return false;
+  bool ok = true;
+  for (uint i=0; i<Pic::Nb_VoltageTypes; i++) {
+    if ( !group().canReadVoltage(Pic::VoltageType(i)) ) continue;
+    if ( _voltages[i].error==true ) {
+      ok = false;
+      log(Log::LineType::Error, i18n("  %1 = %2 V: error in voltage level.").arg(i18n(Pic::VOLTAGE_TYPE_LABELS[i])).arg(_voltages[i].value));
+    } else if ( _voltages[i].value!=UNKNOWN_VOLTAGE )
+      log(Log::DebugLevel::Normal, QString("  %1 = %2 V").arg(i18n(Pic::VOLTAGE_TYPE_LABELS[i])).arg(_voltages[i].value));
+  }
+  return ok;
+}
+
+bool Programmer::PicBase::internalSetupHardware()
+{
+  if ( !Base::internalSetupHardware() ) return false;
+  if ( group().properties() & ::Programmer::CanReleaseReset ) {
+    log(Log::DebugLevel::Normal, "  Hold reset");
+    if ( !hardware()->setTargetReset(Pic::ResetHeld) ) return false;
+  }
+  Pic::TargetMode mode;
+  if ( !getTargetMode(mode) ) return false;
+  if ( mode!=Pic::TargetInProgramming ) {
+    log(Log::LineType::Error, i18n("Device not in programming"));
+    return false;
+  }
+  return true;
+}
+
+bool Programmer::PicBase::initProgramming(Task)
+{
+/*
+  if ( vpp()!=UNKNOWN_VOLTAGE ) {
+    const Pic::VoltageData &tvpp = device()->voltage(Pic::Vpp);
+    if ( vpp()<tvpp.min )
+      log(Log::LineType::Warning, i18n("Vpp (%1 V) is lower than the minimum required voltage (%2 V).")
+                        .arg(vpp()).arg(tvpp.min));
+    if ( vpp()>tvpp.max ) {
+      QString s = i18n("Vpp (%1 V) is higher than the maximum voltage (%2 V). You may damage the device.")
+                  .arg(vpp()).arg(tvpp.max);
+      log(Log::LineType::Warning, s);
+      if ( !askContinue(s) ) {
+        logUserAbort();
+        return false;
+      }
+    }
+  }
+  if ( vdd()!=UNKNOWN_VOLTAGE ) {
+    Q_ASSERT( type!=Pic::Vpp );
+    const Pic::VoltageData &tvdd = device()->voltage(type);
+    if ( vdd()<tvdd.min ) {
+      if ( type==Pic::VddBulkErase && device()->voltage(Pic::VddWrite).min!=tvdd.min )
+        log(Log::LineType::Warning, i18n("Vdd (%1 V) is too low for high-voltage programming\n(piklab only supports high-voltage programming at the moment).\nMinimum required is %2 V.")
+                          .arg(vdd()).arg(tvdd.min));
+      else if ( type==Pic::VddRead && device()->voltage(Pic::VddWrite).min!=tvdd.min )
+        log(Log::LineType::Warning, i18n("Vdd (%1 V) is too low for reading\nMinimum required is %2 V.")
+                          .arg(vdd()).arg(tvdd.min));
+      else log(Log::LineType::Warning, i18n("Vdd (%1 V) is too low for programming\nMinimum required is %2 V.")
+                            .arg(vdd()).arg(tvdd.min));
+    } else if ( vdd()>tvdd.max ) {
+      QString s = i18n("Vdd (%1 V) is higher than the maximum voltage (%2 V). You may damage the device.")
+                  .arg(vdd()).arg(tvdd.max);
+      log(Log::LineType::Warning, s);
+      if ( !askContinue(s) ) {
+        logUserAbort();
+        return false;
+      }
+    }
+  }
+*/
+  if ( specific()->canReadRange(Pic::MemoryRangeType::Config) ) {
+    // read config
+    Device::Array data;
+    if ( !specific()->read(Pic::MemoryRangeType::Config, data, 0) ) return false;
+    _deviceMemory->setArray(Pic::MemoryRangeType::Config, data);
+    _hasProtectedCode = _deviceMemory->isProtected(Pic::Protection::ProgramProtected, Pic::MemoryRangeType::Code);
+    _hasProtectedEeprom = _deviceMemory->isProtected(Pic::Protection::ProgramProtected, Pic::MemoryRangeType::Eeprom);
+    log(Log::DebugLevel::Normal, QString("  protected: code=%1 data=%2")
+                          .arg(_hasProtectedCode ? "true" : "false").arg(_hasProtectedEeprom ? "true" : "false"));
+    // read calibration
+    if ( !readCalibration() ) return false;
+  }
+
+  return initProgramming();
+}
+
+bool Programmer::PicBase::preserveCode()
+{
+  if ( _hasProtectedCode && !askContinue(i18n("All or part of code memory is protected so it cannot be preserved. Continue anyway?")) )
+    return false;
+  return readRange(Pic::MemoryRangeType::Code, _deviceMemory, 0);
+}
+
+bool Programmer::PicBase::preserveEeprom()
+{
+  if ( _hasProtectedEeprom && !askContinue(i18n("All or part of data EEPROM is protected so it cannot be preserved. Continue anyway?")) )
+    return false;
+  return readRange(Pic::MemoryRangeType::Eeprom, _deviceMemory, 0);
+}
+
+bool Programmer::PicBase::internalRun()
+{
+  _state = ::Programmer::Running;
+  return hardware()->setTargetReset(Pic::ResetReleased);
+}
+
+bool Programmer::PicBase::internalStop()
+{
+  _state = ::Programmer::Stopped;
+  return hardware()->setTargetReset(Pic::ResetHeld);
+}
+
+bool Programmer::PicBase::getTargetMode(Pic::TargetMode &mode)
+{
+  return hardware()->getTargetMode(mode);
+}
+
+bool Programmer::PicBase::initProgramming()
+{
+  _state = ::Programmer::Stopped;
+  return hardware()->setTargetReset(Pic::ResetHeld);
+}
+
+//-----------------------------------------------------------------------------
+BitValue Programmer::PicBase::readDeviceId()
+{
+  Device::Array data;
+  if ( !specific()->read(Pic::MemoryRangeType::DeviceId, data, 0) ) return 0;
+  Q_ASSERT( data.count()!=0 );
+  BitValue id = 0x0;
+  switch (device()->architecture().type()) {
+    case Pic::Architecture::P10X:
+    case Pic::Architecture::P16X:
+    case Pic::Architecture::P17C: id = data[0]; break;
+    case Pic::Architecture::P18C:
+    case Pic::Architecture::P18F:
+    case Pic::Architecture::P18J: id = data[0] | (data[1] << 8); break;
+    case Pic::Architecture::P24F:
+    case Pic::Architecture::P24H:
+    case Pic::Architecture::P30F:
+    case Pic::Architecture::P33F: id = data[1] | (data[0] << 16); break;
+    case Pic::Architecture::Nb_Types: Q_ASSERT(false); break;
+  }
+  return id;
+}
+
+bool Programmer::PicBase::verifyDeviceId()
+{
+  if ( !specific()->canReadRange(Pic::MemoryRangeType::DeviceId ) ) return true;
+  if ( !device()->isReadable(Pic::MemoryRangeType::DeviceId) ) {
+    log(Log::LineType::Information, i18n("Device not autodetectable: continuing with the specified device name \"%1\"...").arg(device()->name()));
+    return true;
+  }
+  BitValue rawId = readDeviceId();
+  if ( hasError() ) return false;
+  uint nbChars = device()->nbWords(Pic::MemoryRangeType::DeviceId) * device()->nbCharsWord(Pic::MemoryRangeType::DeviceId);
+  if ( rawId==0x0 || rawId==device()->mask(Pic::MemoryRangeType::DeviceId) ) {
+    log(Log::LineType::Error, i18n("Missing or incorrect device (Read id is %1).").arg(toHexLabel(rawId, nbChars)));
+    return false;
+  }
+  QMap<QString, Device::IdData> ids;
+  QValueVector<QString> names = group().supportedDevices();
+  for (uint k=0; k<uint(names.count()); k++) {
+    const Pic::Data *data = static_cast<const Pic::Data *>(group().deviceData(names[k]).data);
+    if ( data->architecture()!=device()->architecture() ) continue;
+    Device::IdData idata;
+    if ( data->matchId(rawId, idata) ) ids[names[k]] = idata;
+    }
+  QString message;
+  if ( ids.count()!=0 ) {
+    log(Log::LineType::Information, i18n("Read id: %1").arg(device()->idNames(ids).join("; ")));
+    if ( ids.contains(device()->name()) ) return true;
+    message = i18n("Read id does not match the specified device name \"%1\".").arg(device()->name());
+  } else {
+    log(Log::LineType::Warning, i18n("  Unknown or incorrect device (Read id is %1).").arg(toHexLabel(rawId, nbChars)));
+    message = i18n("Unknown device.");
+  }
+  if ( !askContinue(message) ) {
+    logUserAbort();
+    return false;
+  }
+  log(Log::LineType::Information, i18n("Continue with the specified device name: \"%1\"...").arg(device()->name()));
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+QString Programmer::PicBase::prettyCalibration(const Device::Array &data) const
+{
+  QString s;
+  for (uint i=0; i<data.count(); i++) {
+    if ( i!=0 ) s += ", ";
+    s += toHexLabel(data[i], device()->nbCharsWord(Pic::MemoryRangeType::Cal));
+  }
+  return s;
+}
+
+bool Programmer::PicBase::readCalibration()
+{
+  if ( device()->isReadable(Pic::MemoryRangeType::Cal) ) {
+    if ( !specific()->canReadRange(Pic::MemoryRangeType::Cal) ) {
+      log(Log::LineType::Warning, i18n("Osccal cannot be read by the selected programmer"));
+      return true;
+    }
+    Device::Array data;
+    if ( !specific()->read(Pic::MemoryRangeType::Cal, data, 0) ) return false;
+    _deviceMemory->setArray(Pic::MemoryRangeType::Cal, data);
+    log(Log::DebugLevel::Normal, QString("  Read osccal: %1").arg(prettyCalibration(data)));
+    QString message;
+    if ( !device()->checkCalibration(data, &message) ) log(Log::LineType::Warning, "  " + message);
+    if ( device()->isReadable(Pic::MemoryRangeType::CalBackup) ) {
+      if ( !specific()->canReadRange(Pic::MemoryRangeType::CalBackup) ) {
+        log(Log::LineType::Warning, i18n("Osccal backup cannot be read by the selected programmer"));
+        return true;
+      }
+      if ( !specific()->read(Pic::MemoryRangeType::CalBackup, data, 0) ) return false;
+      _deviceMemory->setArray(Pic::MemoryRangeType::CalBackup, data);
+      log(Log::DebugLevel::Normal, QString("  Read osccal backup: %1").arg(prettyCalibration(data)));
+      if ( !device()->checkCalibration(data, &message) ) log(Log::LineType::Warning, "  " + message);
+    }
+  }
+  return true;
+}
+
+bool Programmer::PicBase::restoreCalibration()
+{
+  if ( !specific()->canReadRange(Pic::MemoryRangeType::Cal) || !specific()->canWriteRange(Pic::MemoryRangeType::Cal) ) return true;
+  if ( !device()->isWritable(Pic::MemoryRangeType::Cal) ) return true;
+  Device::Array data = _deviceMemory->arrayForWriting(Pic::MemoryRangeType::Cal);
+  Device::Array bdata = _deviceMemory->arrayForWriting(Pic::MemoryRangeType::CalBackup);
+  if ( device()->isReadable(Pic::MemoryRangeType::CalBackup) && specific()->canReadRange(Pic::MemoryRangeType::CalBackup) ) {
+    if ( !device()->checkCalibration(data) && device()->checkCalibration(bdata) ) {
+      log(Log::LineType::Information, i18n("  Replace invalid osccal with backup value."));
+      data = bdata;
+    }
+  }
+  Device::Array cdata;
+  if ( !specific()->read(Pic::MemoryRangeType::Cal, cdata, 0) ) return false;
+  if ( cdata==data ) {
+    log(Log::LineType::Information, i18n("  Osccal is unchanged."));
+    return true;
+  }
+  if ( !programRange(Pic::MemoryRangeType::Cal, data) ) return false;
+  if ( !specific()->read(Pic::MemoryRangeType::Cal, cdata, 0) ) return false;
+  if ( cdata==data ) log(Log::LineType::Information, i18n("  Osccal has been preserved."));
+
+  if ( !device()->isWritable(Pic::MemoryRangeType::CalBackup) || !device()->checkCalibration(bdata) ) return true;
+  if ( !specific()->read(Pic::MemoryRangeType::CalBackup, cdata, 0) ) return false;
+  if ( cdata.count()==0 ) {
+    log(Log::LineType::Warning, i18n("Osccal backup cannot be read by selected programmer"));
+    return true;
+  }
+  if ( cdata==bdata ) {
+    log(Log::LineType::Information, i18n("  Osccal backup is unchanged."));
+    return true;
+  }
+  if ( !programRange(Pic::MemoryRangeType::CalBackup, bdata) ) return false;
+  if ( !specific()->read(Pic::MemoryRangeType::CalBackup, cdata, 0) ) return false;
+  if ( cdata==bdata ) log(Log::LineType::Information, i18n("  Osccal backup has been preserved."));
+  return true;
+}
+
+bool Programmer::PicBase::restoreBandGapBits()
+{
+  if ( !specific()->canReadRange(Pic::MemoryRangeType::Config) ) return true;
+  bool hasProtectedBits = false;
+  for (uint i=0; i<device()->nbWords(Pic::MemoryRangeType::Config); i++)
+    if ( device()->config()._words[i].pmask!=0 ) hasProtectedBits = true;
+  if ( !hasProtectedBits ) return true;
+  Device::Array cdata;
+  if ( !specific()->read(Pic::MemoryRangeType::Config, cdata, 0) ) return false;
+  Device::Array data = _deviceMemory->arrayForWriting(Pic::MemoryRangeType::Config);
+  for (uint i=0; i<cdata.count(); i++) {
+    BitValue pmask = device()->config()._words[i].pmask;
+    if ( pmask==0 ) continue;
+    cdata[i] = cdata[i].clearMaskBits(pmask);
+    cdata[i] |= data[i].maskWith(pmask);
+  }
+  if ( !specific()->canWriteRange(Pic::MemoryRangeType::Config) ) {
+    log(Log::LineType::Warning, i18n("Could not restore band gap bits because programmer does not support writing config bits."));
+    return true;
+  }
+  log(Log::DebugLevel::Normal, QString("  Write config with band gap bits: %2").arg(toHexLabel(cdata[0], device()->nbCharsWord(Pic::MemoryRangeType::Config))));
+  if ( !programRange(Pic::MemoryRangeType::Config, cdata) ) return false;
+  if ( !specific()->read(Pic::MemoryRangeType::Config, data, 0) ) return false;
+  if ( data==cdata ) log(Log::LineType::Information, i18n("  Band gap bits have been preserved."));
+  return true;
+}
+
+bool Programmer::PicBase::eraseAll()
+{
+  if ( !specific()->canEraseAll() ) {
+    log(Log::LineType::SoftError, i18n("The selected programmer does not support erasing the whole device."));
+    return false;
+  }
+  if ( !specific()->erase(_hasProtectedCode || _hasProtectedEeprom) ) return false;
+  if ( !restoreCalibration() ) return false;
+  return true;
+}
+
+bool Programmer::PicBase::checkErase()
+{
+  if ( device()->memoryTechnology()==Device::MemoryTechnology::Rom || device()->memoryTechnology()==Device::MemoryTechnology::Romless
+       || device()->memoryTechnology()==Device::MemoryTechnology::Eprom ) {
+    log(Log::LineType::SoftError, i18n("Cannot erase ROM or EPROM device."));
+    return false;
+  }
+  return true;
+}
+
+bool Programmer::PicBase::internalErase(const Device::MemoryRange &range)
+{
+  if ( !initProgramming(Task::Erase) ) return false;
+  bool ok = true;
+  if ( range.all() ) ok = eraseAll();
+  else ok = eraseRange(static_cast<const Pic::MemoryRange &>(range)._type);
+  if ( !restoreBandGapBits() ) return false;
+  return ok;
+}
+
+bool Programmer::PicBase::eraseSingle(Pic::MemoryRangeType type)
+{
+  return erase(Pic::MemoryRange(type));
+}
+
+bool Programmer::PicBase::eraseRange(Pic::MemoryRangeType type)
+{
+  bool ok = internalEraseRange(type);
+  if ( !restoreCalibration() ) return false;
+  if ( ok && readConfigEntry(Config::BlankCheckAfterErase).toBool() ) {
+    Pic::Memory memory(*device());
+    VerifyData vdata(BlankCheckVerify, memory);
+    return readRange(type, 0, &vdata);
+  }
+  return ok;
+}
+
+bool Programmer::PicBase::internalEraseRange(Pic::MemoryRangeType type)
+{
+  if ( !specific()->canEraseRange(type) && !specific()->canEraseAll() ) {
+    log(Log::LineType::SoftError, i18n("The selected programmer does not support erasing neither the specified range nor the whole device."));
+    return false;
+  }
+  if ( type==Pic::MemoryRangeType::Code && _hasProtectedCode ) {
+    log(Log::LineType::SoftError, i18n("Cannot erase protected code memory. Consider erasing the whole chip."));
+    return false;
+  }
+  if ( type==Pic::MemoryRangeType::Eeprom && _hasProtectedEeprom ) {
+    log(Log::LineType::SoftError, i18n("Cannot erase protected data EEPROM. Consider erasing the whole chip."));
+    return false;
+  }
+  if ( specific()->canEraseRange(type) ) return specific()->eraseRange(type);
+  bool softErase = true;
+  if ( type!=Pic::MemoryRangeType::Code && (!specific()->canReadRange(Pic::MemoryRangeType::Code)
+       || !specific()->canWriteRange(Pic::MemoryRangeType::Code)) ) softErase = false;
+  if ( type!=Pic::MemoryRangeType::Eeprom && (!specific()->canReadRange(Pic::MemoryRangeType::Eeprom)
+       || !specific()->canWriteRange(Pic::MemoryRangeType::Eeprom)) ) softErase = false;
+  if ( type!=Pic::MemoryRangeType::Config && (!specific()->canReadRange(Pic::MemoryRangeType::Config)
+       || !specific()->canWriteRange(Pic::MemoryRangeType::Config)) ) softErase = false;
+  if ( type!=Pic::MemoryRangeType::UserId && (!specific()->canReadRange(Pic::MemoryRangeType::UserId)
+       || !specific()->canWriteRange(Pic::MemoryRangeType::UserId)) ) softErase = false;
+  if ( !softErase ) {
+    log(Log::LineType::SoftError, i18n("Cannot erase specified range because of programmer limitations."));
+    return false;
+  }
+  if ( !askContinue(i18n("%1: Erasing this range only is not supported with this programmer. This will erase the whole chip and restore the other memory ranges.").arg(type.label())) ) {
+    logUserAbort();
+    return false;
+  }
+  if ( type!=Pic::MemoryRangeType::Code && !preserveCode() ) return false;
+  if ( type!=Pic::MemoryRangeType::Eeprom && !preserveEeprom() ) return false;
+  if ( type!=Pic::MemoryRangeType::UserId && !readRange(Pic::MemoryRangeType::UserId, _deviceMemory, 0) ) return false;
+  specific()->erase(_hasProtectedCode || _hasProtectedEeprom);
+  if ( type!=Pic::MemoryRangeType::Code && !programAndVerifyRange(Pic::MemoryRangeType::Code, *_deviceMemory) ) return false;
+  if ( type!=Pic::MemoryRangeType::Eeprom && !programAndVerifyRange(Pic::MemoryRangeType::Eeprom, *_deviceMemory) ) return false;
+  if ( type!=Pic::MemoryRangeType::UserId && !programAndVerifyRange(Pic::MemoryRangeType::UserId, *_deviceMemory) ) return false;
+  if ( !programAndVerifyRange(Pic::MemoryRangeType::Config, *_deviceMemory) ) return false;
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+bool Programmer::PicBase::readSingle(Pic::MemoryRangeType type, Pic::Memory &memory)
+{
+  if ( !specific()->canReadRange(type) ) {
+    log(Log::LineType::SoftError, i18n("The selected programmer cannot read the specified memory range."));
+    return false;
+  }
+  Pic::Memory tmp(*device());
+  if ( !read(tmp, Pic::MemoryRange(type)) ) return false;
+  memory.copyFrom(type, tmp);
+  if ( type==Pic::MemoryRangeType::Cal ) memory.copyFrom(Pic::MemoryRangeType::CalBackup, tmp);
+  return true;
+}
+
+bool Programmer::PicBase::readRange(Pic::MemoryRangeType type, Pic::Memory *memory, const VerifyData *vd)
+{
+  if ( !device()->isReadable(type) ) return true;
+  if ( !specific()->canReadRange(type) ) {
+    log(Log::LineType::Information, i18n("The selected programmer cannot read %1: operation skipped.").arg(type.label()));
+    return true;
+  }
+  VerifyData *vdata = (vd ? new VerifyData(vd->actions, vd->memory) : 0);
+  if (vdata) {
+    log(Log::LineType::Information, i18n("  Verify memory: %1").arg(type.label()));
+    if ( !(vdata->actions & IgnoreProtectedVerify) ) {
+      vdata->protectedRanges = static_cast<const Pic::Memory &>(vdata->memory).protectedRanges(Pic::Protection::ProgramProtected, type);
+      if ( !vdata->protectedRanges.isEmpty() ) log(Log::LineType::Warning, i18n("  Part of device memory is protected (in %1) and cannot be verified.")
+                                               .arg(type.label()));
+    } else vdata->protectedRanges.clear();
+  } else {
+    log(Log::LineType::Information, i18n("  Read memory: %1").arg(type.label()));
+    CRASH_ASSERT(memory);
+  }
+  Device::Array data;
+  bool ok = specific()->read(type, data, vdata);
+  delete vdata;
+  if (!ok) return false;
+  if (memory) memory->setArray(type, data);
+  return true;
+}
+
+bool Programmer::PicBase::checkRead()
+{
+  if ( device()->memoryTechnology()==Device::MemoryTechnology::Romless ) {
+    log(Log::LineType::SoftError, i18n("Cannot read ROMless device."));
+    return false;
+  }
+  return true;
+}
+
+bool Programmer::PicBase::internalRead(Device::Memory *memory, const Device::MemoryRange &range, const VerifyData *vdata)
+{
+  if ( !initProgramming(Task::Read) ) return false;
+  Pic::Memory *pmemory = static_cast<Pic::Memory *>(memory);
+  if ( !range.all() ) {
+    Pic::MemoryRangeType type = static_cast<const Pic::MemoryRange &>(range)._type;
+    if ( type==Pic::MemoryRangeType::Cal ) {
+      if ( !readRange(Pic::MemoryRangeType::Cal, pmemory, vdata) ) return false;
+      return readRange(Pic::MemoryRangeType::CalBackup, pmemory, vdata);
+    }
+    return readRange(type, pmemory, vdata);
+  }
+  if ( !readRange(Pic::MemoryRangeType::Config,    pmemory, vdata) ) return false;
+  if ( !readRange(Pic::MemoryRangeType::UserId,    pmemory, vdata) ) return false;
+  if ( vdata==0 ) if ( !readRange(Pic::MemoryRangeType::Cal,       pmemory, 0) ) return false;
+  if ( vdata==0 ) if ( !readRange(Pic::MemoryRangeType::CalBackup, pmemory, 0) ) return false;
+  if ( !readRange(Pic::MemoryRangeType::Code,      pmemory, vdata) ) return false;
+  if ( !readRange(Pic::MemoryRangeType::Eeprom,    pmemory, vdata) ) return false;
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+bool Programmer::PicBase::programSingle(Pic::MemoryRangeType type, const Pic::Memory &memory)
+{
+  if ( !specific()->canWriteRange(type) ) {
+    log(Log::LineType::SoftError, i18n("The selected programmer cannot read the specified memory range."));
+    return false;
+  }
+  return program(memory, Pic::MemoryRange(type));
+}
+
+bool Programmer::PicBase::programRange(Pic::MemoryRangeType mtype, const Device::Array &data)
+{
+  log(Log::LineType::Information, i18n("  Write memory: %1").arg(mtype.label()));
+  bool only = ( readConfigEntry(Config::OnlyProgramNonMask).toBool()
+                && (mtype==Pic::MemoryRangeType::Code || mtype==Pic::MemoryRangeType::Eeprom) );
+  return specific()->write(mtype, data, !only);
+}
+
+bool Programmer::PicBase::programAndVerifyRange(Pic::MemoryRangeType type, const Pic::Memory &memory)
+{
+  if ( !device()->isWritable(type) || !specific()->canWriteRange(type) ) return true;
+  Device::Array data = memory.arrayForWriting(type);
+  if ( !programRange(type, data) ) return false;
+  if ( !readConfigEntry(Config::VerifyAfterProgram).toBool() ) return true;
+  if ( !specific()->canReadRange(type) ) return true;
+  VerifyActions actions = IgnoreProtectedVerify;
+  if ( type==Pic::MemoryRangeType::Code && readConfigEntry(Config::OnlyVerifyProgrammed).toBool() ) actions |= OnlyProgrammedVerify;
+  VerifyData vdata(actions, memory);
+  return readRange(type, 0, &vdata);
+}
+
+bool Programmer::PicBase::programAll(const Pic::Memory &memory)
+{
+  if ( !programAndVerifyRange(Pic::MemoryRangeType::Code, memory) ) return false;
+  if ( readConfigEntry(Config::ProgramEeprom).toBool() ) {
+    const Pic::Memory &tmp = (readConfigEntry(Config::PreserveEeprom).toBool() ? *_deviceMemory : memory);
+    if ( !programAndVerifyRange(Pic::MemoryRangeType::Eeprom, tmp) ) return false;
+  }
+  if ( !programAndVerifyRange(Pic::MemoryRangeType::UserId, memory) ) return false;
+  if ( memory.isProtected(Pic::Protection::WriteProtected, Pic::MemoryRangeType::Config) ) {
+    log(Log::DebugLevel::Normal, "  Config write protection is on: first program without it and then with it");
+    Pic::Memory tmp(memory.device());
+    tmp.copyFrom(Pic::MemoryRangeType::Config, memory);
+    tmp.setProtection(false, Pic::Protection::WriteProtected, Pic::MemoryRangeType::Config);
+    if ( !programAndVerifyRange(Pic::MemoryRangeType::Config, tmp) ) return false;
+  }
+  if ( !programAndVerifyRange(Pic::MemoryRangeType::Config, memory) ) return false;
+  return true;
+}
+
+bool Programmer::PicBase::checkProgram(const Device::Memory &memory)
+{
+  if ( device()->memoryTechnology()==Device::MemoryTechnology::Rom || device()->memoryTechnology()==Device::MemoryTechnology::Romless ) {
+    log(Log::LineType::SoftError, i18n("Cannot write ROM or ROMless device."));
+    return false;
+  }
+  if ( !group().isDebugger() && static_cast<const Pic::Memory &>(memory).hasDebugOn() ) {
+    if ( !askContinue(i18n("DEBUG configuration bit is on. Are you sure you want to continue programming the chip?")) ) {
+      logUserAbort();
+      return false;
+    }
+  }
+  return true;
+}
+
+bool Programmer::PicBase::internalProgram(const Device::Memory &memory, const Device::MemoryRange &range)
+{
+  if ( !initProgramming(Task::Erase) ) return false;
+  const Pic::Memory &pmemory = static_cast<const Pic::Memory &>(memory);
+
+  // blank check if OTP device
+  bool eprom = ( device()->memoryTechnology()==Device::MemoryTechnology::Eprom );
+  if (eprom) {
+    log(Log::LineType::Information, i18n("  EPROM device: blank checking first..."));
+    Pic::Memory memory(*device());
+    VerifyData vdata(BlankCheckVerify, memory);
+    if ( !internalRead(0, range, &vdata) ) return false;
+    log(Log::LineType::Information, i18n("  Blank check successful"));
+    // check if protecting device
+    bool protectedCode = pmemory.isProtected(Pic::Protection::ProgramProtected, Pic::MemoryRangeType::Code);
+    bool protectedEeprom = pmemory.isProtected(Pic::Protection::ProgramProtected, Pic::MemoryRangeType::Eeprom);
+    if ( protectedCode || protectedEeprom ) {
+      log(Log::LineType::SoftError, i18n("Protecting code memory or data EEPROM on OTP devices is disabled as a security..."));
+      return false;
+    }
+  }
+
+  // programming
+  bool ok = true;
+  if ( !range.all() ) {
+    Pic::MemoryRangeType type = static_cast<const Pic::MemoryRange &>(range)._type;
+    if ( (type==Pic::MemoryRangeType::Code && _hasProtectedCode) || (type==Pic::MemoryRangeType::Eeprom && _hasProtectedEeprom) ) {
+      log(Log::LineType::SoftError, i18n("This memory range is programming protected."));
+      return false;
+    }
+    if ( specific()->canEraseRange(type) ) {
+      if ( !specific()->emulatedErase() && !eraseRange(type) ) return false;
+    } else log(Log::LineType::Warning, i18n("The range cannot be erased first by the selected programmer so programming may fail..."));
+    ok = programRange(type, pmemory.arrayForWriting(type));
+    VerifyData vdata(NormalVerify, pmemory);
+    if (ok) ok = readRange(type, 0, &vdata);
+  } else {
+    if ( !eprom ) {
+      if ( specific()->canEraseAll() ) {
+        if ( !specific()->emulatedErase() ) {
+          log(Log::LineType::Information, i18n("  Erasing device"));
+          ok = ( !readConfigEntry(Config::PreserveEeprom).toBool() || preserveEeprom() );
+          if (ok) ok = eraseAll();
+        }
+      } else log(Log::LineType::Warning, i18n("The device cannot be erased first by the selected programmer so programming may fail..."));
+    }
+    if (ok) ok = programAll(pmemory);
+  }
+  if ( !restoreBandGapBits() ) return false;
+  return ok;
+}
+
+//-----------------------------------------------------------------------------
+bool Programmer::PicBase::checkProgramCalibration(const Device::Array &data)
+{
+  QString message, s = prettyCalibration(data);
+  if ( !device()->checkCalibration(data, &message) ) {
+    sorry(i18n("The calibration word %1 is not valid.").arg(s), message);
+    return false;
+  }
+  return askContinue(i18n("Do you want to overwrite the device calibration with %1?").arg(s));
+}
+
+bool Programmer::PicBase::tryProgramCalibration(const Device::Array &data, bool &success)
+{
+  log(Log::LineType::Information, i18n("  Write memory: %1").arg(Pic::MemoryRangeType(Pic::MemoryRangeType::Cal).label()));
+  success = true;
+  if ( !specific()->write(Pic::MemoryRangeType::Cal, data, true) ) return false;
+  Device::Array read;
+  if ( !specific()->read(Pic::MemoryRangeType::Cal, read, 0) ) return false;
+  for (uint i=0; i<data.count(); i++)
+    if ( data[i]!=read[i] ) success = false;
+  if ( !success ) return true;
+  if ( device()->isWritable(Pic::MemoryRangeType::CalBackup) ) {
+    if ( !specific()->read(Pic::MemoryRangeType::CalBackup, read, 0) ) return false;
+    if ( device()->checkCalibration(read) ) return true; // do not overwrite correct backup value
+    log(Log::LineType::Information, i18n("  Write memory: %1").arg(Pic::MemoryRangeType(Pic::MemoryRangeType::CalBackup).label()));
+    if ( !specific()->write(Pic::MemoryRangeType::CalBackup, data, true) ) return false;
+    if ( !specific()->read(Pic::MemoryRangeType::CalBackup, read, 0) ) return false;
+    for (uint i=0; i<data.count(); i++)
+      if ( data[i]!=read[i] ) success = false;
+  }
+  return true;
+}
+
+bool Programmer::PicBase::internalProgramCalibration(const Device::Array &data)
+{
+  if ( !initProgramming(Task::Write) ) return false;
+  // try without erase
+  bool success;
+  if ( !tryProgramCalibration(data, success) ) return false;
+  if (success) return true;
+  if ( !askContinue(i18n("Programming calibration data needs a chip erase. Continue anyway?")) ) {
+    logUserAbort();
+    return false;
+  }
+  log(Log::LineType::Information, i18n("  Erasing device"));
+  bool ok = specific()->erase(_hasProtectedCode || _hasProtectedEeprom);
+  if ( !restoreBandGapBits() ) return false;
+  if ( !ok ) return false;
+  // retry
+  if ( !tryProgramCalibration(data, success) ) return false;
+  return success;
+}
+
+bool Programmer::PicBase::programCalibration(const Device::Array &data)
+{
+  _progressMonitor.clear();
+  bool ok = doProgramCalibration(data);
+  endProgramming();
+  return ok;
+}
+
+bool Programmer::PicBase::doProgramCalibration(const Device::Array &data)
+{
+  if ( !checkProgramCalibration(data) ) return false;
+  if ( !doConnectDevice() ) return false;
+  log(Log::LineType::Information, i18n("Programming calibration..."));
+  emit actionMessage(i18n("Programming calibration..."));
+  if ( !internalProgramCalibration(data) ) return false;
+  log(Log::LineType::Information, i18n("Programming calibration successful"));
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+bool Programmer::PicBase::verifySingle(Pic::MemoryRangeType type, const Pic::Memory &memory)
+{
+  return verify(memory, Pic::MemoryRange(type));
+}
+
+bool Programmer::PicBase::blankCheckSingle(Pic::MemoryRangeType type)
+{
+  return blankCheck(Pic::MemoryRange(type));
+}
diff --git a/src/devices/pic/prog/pic_prog.h b/src/devices/pic/prog/pic_prog.h
new file mode 100644
index 0000000..0fb37f7
--- /dev/null
+++ b/src/devices/pic/prog/pic_prog.h
@@ -0,0 +1,110 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PIC_PROG_H
+#define PIC_PROG_H
+
+#include "pic_prog_specific.h"
+#include "progs/base/prog_group.h"
+#include "devices/base/device_group.h"
+
+namespace Pic
+{
+
+class MemoryRange : public Device::MemoryRange {
+public:
+  MemoryRange(MemoryRangeType type) : _type(type) {}
+  virtual bool all() const { return _type==MemoryRangeType::Nb_Types; }
+  MemoryRangeType _type;
+};
+
+} //namespace
+
+namespace Programmer
+{
+//-----------------------------------------------------------------------------
+class PicGroup : public Group
+{
+public:
+  virtual bool canReadVoltage(Pic::VoltageType) const { return false; }
+  virtual bool canReadVoltages() const;
+  virtual ::Debugger::DeviceSpecific *createDebuggerDeviceSpecific(::Debugger::Base &base) const;
+};
+
+//-----------------------------------------------------------------------------
+class PicBase : public Base
+{
+public:
+  PicBase(const Group &group, const Pic::Data *data, const char *name);
+  virtual ~PicBase();
+  PicDeviceSpecific *specific() { return static_cast<PicDeviceSpecific *>(_specific); }
+  const PicDeviceSpecific *specific() const { return static_cast<PicDeviceSpecific *>(_specific); }
+  const Pic::Data *device() const { return static_cast<const Pic::Data *>(_device); }
+  const Pic::Memory &deviceMemory() const { return *_deviceMemory; }
+  const PicGroup &group() const { return static_cast<const PicGroup &>(_group); }
+  double voltage(Pic::VoltageType type) const { return _voltages[type].value; }
+  virtual bool readVoltages();
+  bool getTargetMode(Pic::TargetMode &mode);
+
+  bool eraseSingle(Pic::MemoryRangeType type);
+  bool readSingle(Pic::MemoryRangeType type, Pic::Memory &memory);
+  bool programSingle(Pic::MemoryRangeType type, const Pic::Memory &memory);
+  bool verifySingle(Pic::MemoryRangeType type, const Pic::Memory &memory);
+  bool blankCheckSingle(Pic::MemoryRangeType type);
+  bool readCalibration();
+  bool programCalibration(const Device::Array &data);
+
+protected:
+  PicHardware *hardware() { return static_cast<PicHardware *>(_hardware); }
+  virtual bool internalSetupHardware();
+  virtual double vdd() const { return _voltages[Pic::TargetVdd].value; }
+  virtual double vpp() const { return _voltages[Pic::TargetVpp].value; }
+  virtual bool verifyDeviceId();
+  virtual uint nbSteps(Task task, const Device::MemoryRange *range) const;
+  bool initProgramming(Task task);
+  virtual bool initProgramming();
+  virtual bool internalRun();
+  virtual bool internalStop();
+  virtual void clear();
+
+  virtual bool checkErase();
+  virtual bool internalErase(const Device::MemoryRange &range);
+
+  virtual bool checkRead();
+  virtual bool internalRead(Device::Memory *memory, const Device::MemoryRange &range, const VerifyData *data);
+  bool readRange(Pic::MemoryRangeType type, Pic::Memory *memory, const VerifyData *data);
+
+  virtual bool checkProgram(const Device::Memory &memory);
+  virtual bool internalProgram(const Device::Memory &memory, const Device::MemoryRange &range);
+  virtual bool programAll(const Pic::Memory &memory);
+  bool programAndVerifyRange(Pic::MemoryRangeType type, const Pic::Memory &memory);
+  bool programRange(Pic::MemoryRangeType type, const Device::Array &array);
+
+private:
+  Pic::Memory *_deviceMemory;
+  bool _hasProtectedCode, _hasProtectedEeprom;
+  PicHardware::VoltagesData _voltages;
+
+  BitValue readDeviceId();
+  bool eraseAll();
+  bool eraseRange(Pic::MemoryRangeType type);
+  bool restoreCalibration();
+  bool restoreBandGapBits();
+  bool doProgramCalibration(const Device::Array &data);
+  bool checkProgramCalibration(const Device::Array &data);
+  bool internalProgramCalibration(const Device::Array &data);
+  QString prettyCalibration(const Device::Array &data) const;
+  bool tryProgramCalibration(const Device::Array &data, bool &success);
+  bool preserveCode();
+  bool preserveEeprom();
+  bool internalEraseRange(Pic::MemoryRangeType type);
+};
+
+} // namespace
+
+#endif
diff --git a/src/devices/pic/prog/pic_prog_specific.cpp b/src/devices/pic/prog/pic_prog_specific.cpp
new file mode 100644
index 0000000..bfcd2fa
--- /dev/null
+++ b/src/devices/pic/prog/pic_prog_specific.cpp
@@ -0,0 +1,121 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pic_prog_specific.h"
+
+#include "common/global/global.h"
+
+//-----------------------------------------------------------------------------
+const char * const Pic::VOLTAGE_TYPE_LABELS[Nb_VoltageTypes] = {
+  I18N_NOOP("Programmer Vpp"), I18N_NOOP("Target Vdd"), I18N_NOOP("Target Vpp")
+};
+
+const char * const Pic::TARGET_MODE_LABELS[Nb_TargetModes] = {
+  I18N_NOOP("Stopped"), I18N_NOOP("Running"), I18N_NOOP("In Programming")
+};
+
+const char * const Pic::RESET_MODE_LABELS[Nb_ResetModes] = {
+  I18N_NOOP("Reset Held"), I18N_NOOP("Reset Released")
+};
+
+//-----------------------------------------------------------------------------
+uint Programmer::PicDeviceSpecific::findNonMaskStart(Pic::MemoryRangeType type, const Device::Array &data) const
+{
+  uint start = 0;
+  for (; start<data.count(); start++)
+    if ( data[start]!=device().mask(type) ) break;
+  const_cast<PicDeviceSpecific *>(this)->log(Log::DebugLevel::Normal, QString("start before align: %1").arg(start));
+  uint align = device().nbWordsWriteAlignment(type);
+  start -= start % align;
+  const_cast<PicDeviceSpecific *>(this)->log(Log::DebugLevel::Normal, QString("start after align: %1 (align=%2)").arg(start).arg(align));
+  return start;
+}
+
+uint Programmer::PicDeviceSpecific::findNonMaskEnd(Pic::MemoryRangeType type, const Device::Array &data) const
+{
+  uint end = data.count()-1;
+  for (; end>0; end--)
+    if ( data[end]!=device().mask(type) ) break;
+  const_cast<PicDeviceSpecific *>(this)->log(Log::DebugLevel::Normal, QString("end before align: %1").arg(end));
+  uint align = device().nbWordsWriteAlignment(type);
+  if ( (end+1) % align ) end += align - (end+1) % align;
+  const_cast<PicDeviceSpecific *>(this)->log(Log::DebugLevel::Normal, QString("end after align: %1 (align=%2)").arg(end).arg(align));
+  Q_ASSERT(end<data.count());
+  return end;
+}
+
+bool Programmer::PicDeviceSpecific::read(Pic::MemoryRangeType type, Device::Array &data, const VerifyData *vdata)
+{
+  setPowerOn();
+  bool ok = doRead(type, data, vdata);
+  setPowerOff();
+  return ok;
+}
+
+bool Programmer::PicDeviceSpecific::write(Pic::MemoryRangeType mtype, const Device::Array &data, bool force)
+{
+  setPowerOn();
+  bool ok = doWrite(mtype, data, force);
+  setPowerOff();
+  return ok;
+}
+
+bool Programmer::PicDeviceSpecific::erase(bool isProtected)
+{
+  setPowerOn();
+  bool ok = doErase(isProtected);
+  setPowerOff();
+  return ok;
+}
+
+bool Programmer::PicDeviceSpecific::eraseRange(Pic::MemoryRangeType type)
+{
+  setPowerOn();
+  bool ok = doEraseRange(type);
+  setPowerOff();
+  return ok;
+}
+
+bool Programmer::PicDeviceSpecific::doEmulatedEraseRange(Pic::MemoryRangeType type)
+{
+  Pic::Memory memory(device());
+  if ( !doWrite(type, memory.arrayForWriting(type), true) ) return false;
+  if ( !canReadRange(type) ) return true;
+  VerifyData vdata(BlankCheckVerify, memory);
+  Device::Array data;
+  return doRead(type, data, &vdata);
+}
+
+//-----------------------------------------------------------------------------
+bool Programmer::PicHardware::compareWords(Pic::MemoryRangeType type, uint index, BitValue v, BitValue d, Programmer::VerifyActions actions)
+{
+  if ( v==d ) return true;
+  uint inc = device().addressIncrement(type);
+  Address address = device().range(type).start + inc * index;
+  if ( actions & ::Programmer::BlankCheckVerify )
+    log(Log::LineType::SoftError, i18n("Device memory is not blank (in %1 at address %2: reading %3 and expecting %4).")
+      .arg(type.label()).arg(toHexLabel(address, device().nbCharsAddress()))
+      .arg(toHexLabel(d, device().nbCharsWord(type))).arg(toHexLabel(v, device().nbCharsWord(type))));
+  else log(Log::LineType::SoftError, i18n("Device memory does not match hex file (in %1 at address %2: reading %3 and expecting %4).")
+      .arg(type.label()).arg(toHexLabel(address, device().nbCharsAddress()))
+      .arg(toHexLabel(d, device().nbCharsWord(type))).arg(toHexLabel(v, device().nbCharsWord(type))));
+  return false;
+}
+
+bool Programmer::PicHardware::verifyWord(uint i, BitValue word, Pic::MemoryRangeType type, const VerifyData &vdata)
+{
+  if ( !(vdata.actions & ::Programmer::IgnoreProtectedVerify) && vdata.protectedRanges.contains(i) ) return true; // protected
+  BitValue v = static_cast<const Pic::Memory &>(vdata.memory).normalizedWord(type, i);
+  BitValue d = static_cast<const Pic::Memory &>(vdata.memory).normalizeWord(type, i, word);
+  if ( type==Pic::MemoryRangeType::Config ) {
+    BitValue pmask = device().config()._words[i].pmask;
+    v = v.clearMaskBits(pmask);
+    d = d.clearMaskBits(pmask);
+  }
+  return compareWords(type, i, v, d, vdata.actions);
+}
diff --git a/src/devices/pic/prog/pic_prog_specific.h b/src/devices/pic/prog/pic_prog_specific.h
new file mode 100644
index 0000000..fef8a61
--- /dev/null
+++ b/src/devices/pic/prog/pic_prog_specific.h
@@ -0,0 +1,86 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PIC_PROG_SPECIFIC_H
+#define PIC_PROG_SPECIFIC_H
+
+#include "progs/base/prog_specific.h"
+#include "progs/base/generic_prog.h"
+#include "devices/pic/pic/pic_memory.h"
+
+//----------------------------------------------------------------------------
+namespace Pic
+{
+  enum ResetMode { ResetHeld = 0, ResetReleased, Nb_ResetModes};
+  extern const char * const RESET_MODE_LABELS[Nb_ResetModes];
+
+  enum VoltageType { ProgrammerVpp = 0, TargetVdd, TargetVpp, Nb_VoltageTypes };
+  extern const char * const VOLTAGE_TYPE_LABELS[Nb_VoltageTypes];
+
+  enum TargetMode { TargetStopped = 0, TargetRunning, TargetInProgramming, Nb_TargetModes};
+  extern const char * const TARGET_MODE_LABELS[Nb_TargetModes];
+
+  enum WriteMode { WriteOnlyMode = 0, EraseWriteMode, Nb_WriteModes };
+} // namespace
+
+namespace Programmer
+{
+//-----------------------------------------------------------------------------
+class PicDeviceSpecific : public DeviceSpecific
+{
+public:
+  PicDeviceSpecific(::Programmer::Base &base) : DeviceSpecific(base) {}
+  const Pic::Data &device() const { return static_cast<const Pic::Data &>(*_base.device()); }
+  virtual bool canEraseAll() const = 0;
+  virtual bool canEraseRange(Pic::MemoryRangeType type) const = 0;
+  virtual bool emulatedErase() const { return false; }
+  virtual bool canReadRange(Pic::MemoryRangeType type) const = 0;
+  virtual bool canWriteRange(Pic::MemoryRangeType type) const = 0;
+  bool eraseRange(Pic::MemoryRangeType type);
+  bool erase(bool isProtected);
+  bool read(Pic::MemoryRangeType type, Device::Array &data, const VerifyData *vdata);
+  bool write(Pic::MemoryRangeType type, const Device::Array &data, bool force);
+  uint findNonMaskStart(Pic::MemoryRangeType type, const Device::Array &data) const;
+  uint findNonMaskEnd(Pic::MemoryRangeType type, const Device::Array &data) const;
+
+protected:
+  virtual bool doErase(bool isProtected) = 0;
+  virtual bool doEraseRange(Pic::MemoryRangeType type) = 0;
+  bool doEmulatedEraseRange(Pic::MemoryRangeType type);
+  virtual bool doRead(Pic::MemoryRangeType type, Device::Array &data, const VerifyData *vdata) = 0;
+  virtual bool doWrite(Pic::MemoryRangeType type, const Device::Array &data, bool force) = 0;
+};
+
+//-----------------------------------------------------------------------------
+class PicHardware : public Hardware
+{
+public:
+  class VoltageData {
+  public:
+    VoltageData() : value(UNKNOWN_VOLTAGE) {}
+    double value;
+    bool error;
+  };
+  class VoltagesData : public QValueVector<VoltageData> {
+  public:
+    VoltagesData() : QValueVector<VoltageData>(Pic::Nb_VoltageTypes) {}
+  };
+
+public:
+  PicHardware(::Programmer::Base &base, Port::Base *port, const QString &name) : Hardware(base, port, name) {}
+  const Pic::Data &device() const { return static_cast<const Pic::Data &>(*_base.device()); }
+  virtual bool readVoltages(VoltagesData &) { return true; }
+  virtual bool getTargetMode(Pic::TargetMode &mode) { mode = Pic::TargetInProgramming; return true; }
+  virtual bool setTargetReset(Pic::ResetMode) { return true; }
+  bool compareWords(Pic::MemoryRangeType type, uint index, BitValue v, BitValue d, VerifyActions actions);
+  bool verifyWord(uint index, BitValue word, Pic::MemoryRangeType type, const VerifyData &vdata);
+};
+
+} // namespace
+
+#endif
diff --git a/src/devices/pic/prog/prog.pro b/src/devices/pic/prog/prog.pro
new file mode 100644
index 0000000..c0caf87
--- /dev/null
+++ b/src/devices/pic/prog/prog.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = picprog
+HEADERS += pic_prog.h pic_debug.h pic_prog_specific.h
+SOURCES += pic_prog.cpp pic_debug.cpp pic_prog_specific.cpp
diff --git a/src/devices/pic/xml/Makefile.am b/src/devices/pic/xml/Makefile.am
new file mode 100644
index 0000000..a941f8d
--- /dev/null
+++ b/src/devices/pic/xml/Makefile.am
@@ -0,0 +1,12 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_PROGRAMS = pic_xml_to_data
+
+pic_xml_to_data_SOURCES = pic_xml_to_data.cpp
+pic_xml_to_data_DEPENDENCIES = $(top_builddir)/src/devices/pic/base/libpicbase.la \
+	$(top_builddir)/src/xml_to_data/libxmltodata.la $(top_builddir)/src/devices/base/libdevicebase.la \
+	$(top_builddir)/src/common/common/libcommon.la
+pic_xml_to_data_LDADD = $(top_builddir)/src/devices/pic/base/libpicbase.la \
+	$(top_builddir)/src/xml_to_data/libxmltodata.la $(top_builddir)/src/devices/base/libdevicebase.la \
+	$(top_builddir)/src/common/common/libcommon.la $(LIB_KDECORE)
diff --git a/src/devices/pic/xml/pic_xml_to_data.cpp b/src/devices/pic/xml/pic_xml_to_data.cpp
new file mode 100644
index 0000000..f3675de
--- /dev/null
+++ b/src/devices/pic/xml/pic_xml_to_data.cpp
@@ -0,0 +1,718 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include <qfile.h>
+#include <qregexp.h>
+
+#include "xml_to_data/device_xml_to_data.h"
+#include "common/common/misc.h"
+#include "devices/pic/base/pic_config.h"
+#include "devices/pic/base/pic_register.h"
+
+namespace Pic
+{
+class XmlToData : public Device::XmlToData<Data>
+{
+private:
+  virtual QString namespaceName() const { return "Pic"; }
+
+bool getVoltages(ProgVoltageType type, QDomElement element)
+{
+  QDomElement voltages = findUniqueElement(element, "voltages", "name", type.key());
+  if ( voltages.isNull() ) return false;
+  bool ok1, ok2, ok3;
+  data()->_voltages[type].min = voltages.attribute("min").toDouble(&ok1);
+  data()->_voltages[type].max = voltages.attribute("max").toDouble(&ok2);
+  data()->_voltages[type].nominal = voltages.attribute("nominal").toDouble(&ok3);
+  if ( !ok1 || !ok2 || !ok3 ) qFatal(QString("Cannot extract voltage value for \"%1\"").arg(type.key()));
+  if ( data()->_voltages[type].min>data()->_voltages[type].max
+       || data()->_voltages[type].nominal<data()->_voltages[type].min
+       || data()->_voltages[type].nominal>data()->_voltages[type].max )
+    qFatal("Inconsistent voltages order");
+  return true;
+}
+
+bool getMemoryRange(MemoryRangeType type, QDomElement element)
+{
+  QDomElement range = findUniqueElement(element, "memory", "name", type.key());
+  if ( range.isNull() ) return false;
+  data()->_ranges[type].properties = Present;
+  bool ok;
+  uint nbCharsAddress = data()->nbCharsAddress();
+  data()->_ranges[type].start = fromHexLabel(range.attribute("start"), nbCharsAddress, &ok);
+  if ( !ok ) qFatal("Cannot extract start address");
+  data()->_ranges[type].end = fromHexLabel(range.attribute("end"), nbCharsAddress, &ok);
+  if ( !ok ) qFatal("Cannot extract end address");
+  if ( data()->_ranges[type].end<data()->_ranges[type].start ) qFatal("Memory range end is before its start");
+  uint nbCharsWord = data()->nbCharsWord(type);
+  if ( data()->nbBitsWord(type)==0 ) qFatal(QString("Architecture doesn't contain memory range %1").arg(type.key()));
+  if ( type==MemoryRangeType::UserId ) {
+    data()->_userIdRecommendedMask = fromHexLabel(range.attribute("rmask"), nbCharsWord, &ok);
+    if ( !ok ) qFatal("Cannot extract rmask value for user id");
+    if ( !data()->_userIdRecommendedMask.isInside(data()->mask(type)) ) qFatal(QString("rmask is not inside mask %1 (%2)").arg(toHexLabel(data()->_userIdRecommendedMask, 8)).arg(toHexLabel(data()->mask(type), 8)));
+  }
+  if ( range.attribute("hexfile_offset")!="?" ) {
+    data()->_ranges[type].properties |= Programmable;
+    if ( !range.attribute("hexfile_offset").isEmpty() ) {
+      data()->_ranges[type].hexFileOffset = fromHexLabel(range.attribute("hexfile_offset"), nbCharsAddress, &ok);
+      if ( !ok ) qFatal("Cannot extract hexfile_offset");
+    }
+  }
+  if ( type==MemoryRangeType::Cal && !data()->is18Family() ) {
+    data()->_calibration.opcodeMask = fromHexLabel(range.attribute("cal_opmask"), nbCharsWord, &ok);
+    if ( !ok ) qFatal("Cannot extract calibration opcode mask");
+    data()->_calibration.opcode = fromHexLabel(range.attribute("cal_opcode"), nbCharsWord, &ok);
+    if ( !ok ) qFatal("Cannot extract calibration opcode");
+    if ( !data()->_calibration.opcode.isInside(data()->_calibration.opcodeMask) ) qFatal("Calibration opcode should be inside opcode mask");
+    if ( !data()->_calibration.opcodeMask.isInside(data()->mask(type)) ) qFatal("Calibration mask should be inside opcode mask");
+  }
+  QString wwa = range.attribute("word_write_align");
+  QString wea = range.attribute("word_erase_align");
+  if ( type==MemoryRangeType::Code ) {
+    if ( data()->_architecture==Architecture::P18F || data()->_architecture==Architecture::P18J ) {
+      data()->_nbWordsCodeWrite = wwa.toUInt(&ok);
+      if ( !ok || data()->_nbWordsCodeWrite==0 || (data()->_nbWordsCodeWrite%4)!=0 ) qFatal("Missing or malformed word write align");
+      data()->_nbWordsCodeRowErase = wea.toUInt(&ok);
+      if ( !ok || (data()->_nbWordsCodeRowErase%4)!=0 ) qFatal("Missing or malformed word erase align");
+    } else {
+      if ( !wwa.isEmpty() || !wea.isEmpty() ) qFatal("word align should not be defined for this device family/subfamily");
+      data()->_nbWordsCodeWrite = 0; // #### TODO
+      data()->_nbWordsCodeRowErase = 0; // #### TODO
+    }
+  } else if ( !wwa.isEmpty() || !wea.isEmpty() ) qFatal("word align should not be defined for this memory range");
+  return true;
+}
+
+bool hasValue(const Pic::Config::Mask &mask, BitValue value)
+{
+  for (uint i=0; i<uint(mask.values.count()); i++)
+    if ( mask.values[i].value==value ) return true;
+  return false;
+}
+
+void processName(const Pic::Config::Mask &cmask, BitValue pmask, Pic::Config::Value &cvalue)
+{
+  QStringList &cnames = cvalue.configNames[Pic::ConfigNameType::Default];
+  if ( cvalue.name=="invalid" ) {
+    cvalue.name = QString::null;
+    if ( !cnames.isEmpty() ) qFatal(QString("No cname should be defined for invalid value in mask %1").arg(cmask.name));
+    return;
+  }
+  if ( cvalue.name.isEmpty() ) qFatal(QString("Empty value name in mask %1").arg(cmask.name));
+  if ( cmask.value.isInside(pmask) ) { // protected bits
+    if ( !cnames.isEmpty() ) qFatal(QString("Config name should be null for protected config mask \"%1\"").arg(cmask.name));
+  } else {
+    if ( cnames.isEmpty() && cmask.name!="BSSEC" && cmask.name!="BSSIZ" && cmask.name!="SSSEC" && cmask.name!="SSSIZ" ) {
+      // ### FIXME: 18J 24H 30F1010/202X
+      if ( data()->architecture()!=Pic::Architecture::P18J && data()->architecture()!=Pic::Architecture::P24H
+           && data()->architecture()!=Pic::Architecture::P24F && data()->architecture()!=Pic::Architecture::P33F
+           && data()->name()!="30F1010" && data()->name()!="30F2020" && data()->name()!="30F2023" )
+        qFatal(QString("cname not defined for \"%1\" (%2)").arg(cvalue.name).arg(cmask.name));
+    }
+    if ( cnames.count()==1 && cnames[0]=="_" ) cnames.clear();
+    for (uint i=0; i<uint(cnames.count()); i++) {
+      if ( cnames[i].startsWith("0x") ) {
+        if ( cnames.count()!=1 ) qFatal("Hex cname cannot be combined");
+        bool ok;
+        BitValue v = fromHexLabel(cnames[i], &ok);
+        uint nbChars = data()->nbCharsWord(MemoryRangeType::Config);
+        BitValue mask = cmask.value.complementInMask(maxValue(NumberBase::Hex, nbChars));
+        if ( ok && v==(mask | cvalue.value) ) continue;
+      } else if ( XOR(cnames[i].startsWith("_"), data()->architecture()==Pic::Architecture::P30F) ) continue;
+      qFatal(QString("Invalid config name for \"%1\"/\"%2\"").arg(cmask.name).arg(cvalue.name));
+    }
+    QStringList &ecnames = cvalue.configNames[Pic::ConfigNameType::Extra];
+    for (uint i=0; i<uint(ecnames.count()); i++)
+      if ( ecnames[i][0]!='_'  ) qFatal(QString("Invalid extra config name for %1").arg(cvalue.name));
+  }
+}
+
+Pic::Config::Mask toConfigMask(QDomElement mask, BitValue pmask)
+{
+  uint nbChars = data()->nbCharsWord(MemoryRangeType::Config);
+  bool ok;
+  QString defName;
+  QMap<Pic::ConfigNameType, QStringList> defConfigNames;
+  Config::Mask cmask;
+  cmask.name = mask.attribute("name");
+  if ( !Config::hasMaskName(cmask.name) ) qFatal(QString("Unknown mask name %1").arg(cmask.name));
+  cmask.value = fromHexLabel(mask.attribute("value"), nbChars, &ok);
+  if ( !ok || cmask.value==0 || cmask.value>data()->mask(MemoryRangeType::Config) )
+    qFatal(QString("Malformed mask value in mask %1").arg(mask.attribute("name")));
+  //QStringList names;
+  QDomNode child = mask.firstChild();
+  while ( !child.isNull() ) {
+    QDomElement value = child.toElement();
+    child = child.nextSibling();
+    if ( value.isNull() ) continue;
+    if ( value.nodeName()!="value" ) qFatal(QString("Non value child in mask %1").arg(cmask.name));
+    if ( value.attribute("value")=="default" ) {
+      if ( !defName.isEmpty() ) qFatal(QString("Default value already defined for mask %1").arg(cmask.name));
+      defName = value.attribute("name");
+      //if ( names.contains(defName) ) qFatal(QString("Value name duplicated in mask %1").arg(cmask.name));
+      //names.append(defName);
+      FOR_EACH(Pic::ConfigNameType, type) defConfigNames[type] = QStringList::split(' ', value.attribute(type.data().key));
+      continue;
+    }
+    Config::Value cvalue;
+    cvalue.value = fromHexLabel(value.attribute("value"), nbChars, &ok);
+    if ( !ok || !cvalue.value.isInside(cmask.value) ) qFatal(QString("Malformed value in mask %1").arg(cmask.name));
+    cvalue.name = value.attribute("name");
+    //if ( names.contains(cvalue.name) ) qFatal(QString("Value name duplicated in mask %1").arg(cmask.name));
+    //names.append(cvalue.name);
+    FOR_EACH(Pic::ConfigNameType, type) cvalue.configNames[type] = QStringList::split(' ', value.attribute(type.data().key));
+    processName(cmask, pmask, cvalue);
+    cmask.values.append(cvalue);
+  }
+  // add default values
+  if ( !defName.isEmpty() ) {
+    uint nb = 0;
+    BitValue::const_iterator it;
+    for (it=cmask.value.begin(); it!=cmask.value.end(); ++it) {
+      if ( hasValue(cmask, *it) ) continue; // already set
+      nb++;
+      Config::Value cvalue;
+      cvalue.value = *it;
+      cvalue.name = defName;
+      cvalue.configNames = defConfigNames;
+      processName(cmask, pmask, cvalue);
+      cmask.values.append(cvalue);
+    }
+    if ( nb<=1 ) qFatal(QString("Default value used less than twice in mask %1").arg(cmask.name));
+  }
+  qHeapSort(cmask.values);
+  return cmask;
+}
+
+Pic::Config::Word toConfigWord(QDomElement config)
+{
+  uint nbChars = data()->nbCharsWord(MemoryRangeType::Config);
+  Config::Word cword;
+  cword.name = config.attribute("name");
+  if ( cword.name.isNull() ) qFatal("Config word name not specified.");
+  bool ok;
+  cword.wmask = fromHexLabel(config.attribute("wmask"), nbChars, &ok);
+  BitValue gmask = data()->mask(MemoryRangeType::Config);
+  if ( !ok || cword.wmask>gmask ) qFatal(QString("Missing or malformed config wmask \"%1\"").arg(config.attribute("wmask")));
+  cword.bvalue = fromHexLabel(config.attribute("bvalue"), nbChars, &ok);
+  if ( !ok ) qFatal(QString("Missing or malformed config bvalue \"%1\"").arg(config.attribute("bvalue")));
+  if ( config.attribute("pmask").isEmpty() ) cword.pmask = 0;
+  else {
+    bool ok;
+    cword.pmask = fromHexLabel(config.attribute("pmask"), nbChars, &ok);
+    if ( !ok || cword.pmask>gmask ) qFatal("Missing or malformed config pmask");
+  }
+  cword.ignoredCNames = QStringList::split(' ', config.attribute("icnames"));
+  for (uint i=0; i<uint(cword.ignoredCNames.count()); i++)
+    if ( cword.ignoredCNames[i][0]!='_'  ) qFatal(QString("Invalid ignored config name for %1").arg(cword.name));
+  QDomNode child = config.firstChild();
+  while ( !child.isNull() ) {
+    QDomElement mask = child.toElement();
+    child = child.nextSibling();
+    if ( mask.isNull() ) continue;
+    if ( mask.nodeName()!="mask" ) qFatal(QString("Non mask child in config %1").arg(cword.name));
+    if ( mask.attribute("name").isEmpty() ) qFatal(QString("Empty mask name in config %1").arg(cword.name));
+    Config::Mask cmask = toConfigMask(mask, cword.pmask);
+    if ( !cmask.value.isInside(gmask) ) qFatal(QString("Mask value not inside mask in config %1").arg(cword.name));
+    for (uint i=0; i<uint(cword.masks.count()); i++) {
+      if ( cword.masks[i].name==cmask.name ) qFatal(QString("Duplicated mask name %1 in config %2").arg(cmask.name).arg(cword.name));
+      if ( cmask.value.isOverlapping(cword.masks[i].value) ) qFatal(QString("Overlapping masks in config %1").arg(cword.name));
+    }
+    cword.masks.append(cmask);
+  }
+  qHeapSort(cword.masks);
+  BitValue mask = (cword.usedMask() | cword.bvalue).clearMaskBits(cword.pmask);
+  if ( config.attribute("cmask").isEmpty() ) {
+    if ( data()->_architecture==Pic::Architecture::P30F ) cword.cmask = cword.wmask;
+    else cword.cmask = mask;
+  } else {
+    bool ok;
+    cword.cmask = fromHexLabel(config.attribute("cmask"), nbChars, &ok);
+    if ( !ok || cword.cmask>gmask ) qFatal("Missing or malformed config cmask");
+    //if ( data()->_architecture==Pic::Architecture::P30X &&cword.cmask==cword.wmask ) qFatal(QString("Redundant cmask in %1").arg(cword.name));
+    if ( cword.cmask==mask ) qFatal(QString("Redundant cmask in %1").arg(cword.name));
+  }
+  if ( !cword.pmask.isInside(cword.usedMask()) ) qFatal("pmask should be inside or'ed mask values.");
+  return cword;
+}
+
+QValueVector<Pic::Config::Word> getConfigWords(QDomElement element)
+{
+  uint nbWords = data()->nbWords(MemoryRangeType::Config);
+  QValueVector<Config::Word> configWords(nbWords);
+  QDomNode child = element.firstChild();
+  while ( !child.isNull() ) {
+    QDomElement config = child.toElement();
+    child = child.nextSibling();
+    if ( config.isNull() || config.nodeName()!="config" ) continue;
+    bool ok;
+    uint offset = fromHexLabel(config.attribute("offset"), 1, &ok);
+    if ( !ok ) qFatal("Missing or malformed config offset");
+    if ( (offset % data()->addressIncrement(MemoryRangeType::Config))!=0 ) qFatal("Config offset not aligned");
+    offset /= data()->addressIncrement(MemoryRangeType::Config);
+    if ( offset>=nbWords ) qFatal(QString("Offset too big %1/%2").arg(offset).arg(nbWords));
+    if ( !configWords[offset].name.isNull() ) qFatal(QString("Config offset %1 is duplicated").arg(offset));
+    for (uint i=0; i<nbWords; i++) {
+      if ( !configWords[i].name.isNull() && configWords[i].name==config.attribute("name") )
+        qFatal(QString("Duplicated config name %1").arg(configWords[i].name));
+    }
+    configWords[offset] = toConfigWord(config);
+  }
+  return configWords;
+}
+
+QString getChecksumData(QDomElement checksum)
+{
+  Checksum::Data cdata;
+  cdata.blankChecksum = 0x0;
+  cdata.checkChecksum = 0x0;
+
+  const Protection &protection = data()->_config->protection();
+  QString valueName;
+  if ( protection.family()==Protection::BlockProtection ) {
+    valueName = checksum.attribute("protected_blocks");
+    bool ok;
+    uint nb = valueName.toUInt(&ok);
+    uint max = (protection.hasBootBlock() ? 1 : 0) + protection.nbBlocks();
+    if ( !ok || nb>max ) qFatal("Invalid number of protected blocks for checksum");
+    if ( nb>0 ) cdata.protectedMaskNames += "CPB";
+    for (uint i=1; i<nb; i++) cdata.protectedMaskNames += "CP_" + QString::number(i-1);
+    cdata.bbsize = checksum.attribute("bbsize");
+    const Config::Mask *mask = data()->_config->findMask(protection.bootSizeMaskName());
+    if ( mask==0 ) {
+      if ( !cdata.bbsize.isEmpty() ) qFatal("Device does not have a variable boot size (no \"bbsize\" allowed in checksum)");
+    } else if ( cdata.bbsize.isEmpty() ) {
+      if ( nb==1 ) qFatal("\"bbsize\" should be define in checksum for \"protected_blocks\"==1");
+    } else {
+      const Config::Value *value = data()->_config->findValue(protection.bootSizeMaskName(), cdata.bbsize);
+      if ( value==0 ) qFatal("Invalid \"bbsize\" in checksum");
+      valueName += "_" + cdata.bbsize;
+    }
+  } else {
+    valueName = checksum.attribute("protected");
+    if ( protection.family()==Protection::NoProtection && !valueName.isEmpty() )
+      qFatal("Checksum protected attribute for device with no code protection");
+  }
+  if ( data()->_checksums.contains(valueName) ) qFatal("Duplicate checksum protected range");
+
+  QString s = checksum.attribute("constant");
+  if ( s.isEmpty() ) cdata.constant = 0x0000;
+  else {
+    bool ok;
+    cdata.constant = fromHexLabel(s, 4, &ok);
+    if ( !ok ) qFatal("Malformed checksum constant");
+  }
+
+  s = checksum.attribute("type");
+  if ( s.isEmpty() ) cdata.algorithm = Checksum::Algorithm::Normal;
+  else {
+    cdata.algorithm = Checksum::Algorithm::fromKey(s);
+    if ( cdata.algorithm==Checksum::Algorithm::Nb_Types ) qFatal("Unrecognized checksum algorithm");
+  }
+
+  s = checksum.attribute("mprotected");
+  if ( !s.isEmpty() ) {
+    QStringList list = QStringList::split(" ", s);
+    for (uint i=0; i<uint(list.count()); i++) {
+      const Config::Mask *mask = data()->config().findMask(list[i]);
+      if ( mask==0 ) qFatal(QString("Not valid mask name for \"protected\" tag in checksum: %1").arg(list[i]));
+      if ( mask->values.count()==2 ) continue;
+      for (uint k=0; k<uint(mask->values.count()); k++) {
+        QString valueName = mask->values[k].name;
+        if ( valueName.isEmpty() ) continue;
+        if ( !protection.isNoneProtectedValueName(valueName) && !protection.isAllProtectedValueName(valueName) )
+          qFatal(QString("Not switch protection from mask name for \"protected\" tag in checksum: %1").arg(list[i]));
+      }
+    }
+    cdata.protectedMaskNames = list;
+  }
+
+  s = checksum.attribute("bchecksum");
+  if ( s.isEmpty() ) qFatal("No blank checksum");
+  else {
+    bool ok;
+    cdata.blankChecksum = fromHexLabel(s, 4, &ok);
+    if ( !ok ) qFatal("Malformed blank checksum");
+  }
+
+  s = checksum.attribute("cchecksum");
+  if ( s.isEmpty() ) qFatal("No check checksum");
+  else {
+    bool ok;
+    cdata.checkChecksum = fromHexLabel(s, 4, &ok);
+    if ( !ok ) qFatal("Malformed check checksum");
+  }
+
+  data()->_checksums[valueName] = cdata;
+  return valueName;
+}
+
+virtual void processDevice(QDomElement device)
+{
+  Device::XmlToDataBase::processDevice(device);
+
+  QString arch = device.attribute("architecture");
+  data()->_architecture = Architecture::fromKey(arch);
+  if ( data()->_architecture==Architecture::Nb_Types ) qFatal(QString("Unrecognized architecture \"%1\"").arg(arch));
+  if ( (data()->_architecture==Architecture::P18F && data()->_name.contains("C"))
+       || (data()->_architecture==Architecture::P18F && data()->_name.contains("J")) ) qFatal("Not matching family");
+
+  bool ok;
+  QString pc = device.attribute("pc");
+  data()->_nbBitsPC = data()->_architecture.data().nbBitsPC;
+  if ( data()->_nbBitsPC==0 ) {
+    data()->_nbBitsPC = pc.toUInt(&ok);
+    if ( !ok || data()->_nbBitsPC==0 ) qFatal("Malformed or missing PC");
+  } else if ( !pc.isEmpty() ) qFatal("No PC should be provided for this device architecture");
+
+  QString sw = device.attribute("self_write");
+  data()->_selfWrite = (data()->_memoryTechnology!=Device::MemoryTechnology::Flash ? SelfWrite::No : data()->_architecture.data().selfWrite);
+  if ( data()->_selfWrite==SelfWrite::Nb_Types ) {
+    data()->_selfWrite = SelfWrite::fromKey(sw);
+    if ( data()->_selfWrite==SelfWrite::Nb_Types ) qFatal("Malformed or missing self-write field");
+  } else if ( !sw.isEmpty() ) qFatal("Self-write is set for the whole family or non-flash device");
+
+  // device ids
+  FOR_EACH(Device::Special, special) {
+    QString key = "id" + (special==Device::Special::Normal ? QString::null : QString("_") + special.key());
+    QString id = device.attribute(key);
+    if ( id.isEmpty() ) {
+      if ( special==Device::Special::Normal ) data()->_ids[special] = 0x0000;
+    } else {
+      data()->_ids[special] = fromHexLabel(id, 4, &ok);
+      if ( !ok ) qFatal("Malformed id");
+    }
+  }
+
+  // voltages
+  QStringList names;
+  FOR_EACH(ProgVoltageType, vtype) {
+    names += vtype.key();
+    if ( !getVoltages(vtype, device) ) {
+      switch (vtype.type()) {
+        case ProgVoltageType::Vpp:
+        case ProgVoltageType::VddBulkErase: qFatal(QString("Voltage \"%1\" not defined").arg(vtype.key()));
+        case ProgVoltageType::VddWrite: data()->_voltages[ProgVoltageType::VddWrite] = data()->_voltages[ProgVoltageType::VddBulkErase]; break;
+        case ProgVoltageType::Nb_Types: Q_ASSERT(false); break;
+      }
+    }
+  }
+  //if ( data()->vddMin()>data()->_voltages[ProgVoltageType::VddWrite].min ) qFatal("Vdd min higher than VddWrite min");
+  //if ( data()->vddMax()<data()->_voltages[ProgVoltageType::VddWrite].max ) qFatal("Vdd max lower than VddWrite max");
+  if ( data()->_voltages[ProgVoltageType::VddWrite].min>data()->_voltages[ProgVoltageType::VddBulkErase].min ) qFatal("VddWrite min higher than VddBulkErase min");
+  if ( data()->_voltages[ProgVoltageType::VddWrite].max<data()->_voltages[ProgVoltageType::VddBulkErase].max ) qFatal("VddWrite max lower than VddBulkErase max");
+  checkTagNames(device, "voltages", names);
+
+  // memory ranges
+  names.clear();
+  FOR_EACH(MemoryRangeType, i) {
+    names += i.key();
+    if ( !getMemoryRange(i, device) ) continue;
+     if ( !(data()->_ranges[i].properties & Programmable) ) continue;
+    for(MemoryRangeType k; k<i; ++k) {
+      if ( !(data()->_ranges[k].properties & Present)
+           || !(data()->_ranges[k].properties & Programmable) ) continue;
+      if ( i==MemoryRangeType::DebugVector
+           && k==MemoryRangeType::ProgramExecutive ) continue;
+      if ( k==MemoryRangeType::DebugVector
+           && i==MemoryRangeType::ProgramExecutive ) continue;
+      Address start1 = data()->_ranges[k].start + data()->_ranges[k].hexFileOffset;
+      Address end1 = data()->_ranges[k].end + data()->_ranges[k].hexFileOffset;
+      Address start2 = data()->_ranges[i].start + data()->_ranges[i].hexFileOffset;
+      Address end2 = data()->_ranges[i].end + data()->_ranges[i].hexFileOffset;
+      if ( end1>=start2 && start1<=end2 )
+        qFatal(QString("Overlapping memory ranges (%1 and %2)").arg(k.key()).arg(i.key()));
+    }
+  }
+  checkTagNames(device, "memory", names);
+  if ( XOR(data()->_ids[Device::Special::Normal]!=0x0000, (data()->_ranges[MemoryRangeType::DeviceId].properties & Present)) )
+    qFatal("Id present and device id memory range absent or the opposite");
+
+  // config words
+  QValueVector<Config::Word> cwords = getConfigWords(device);
+  uint nbWords = data()->nbWords(MemoryRangeType::Config);
+  data()->_config->_words.resize(nbWords);
+  FOR_EACH(Pic::ConfigNameType, type) {
+    QMap<QString, QString> cnames; // cname -> mask name
+    for (uint i=0; i<nbWords; i++) {
+      if ( cwords[i].name.isNull() ) qFatal(QString("Config word #%1 not defined").arg(i));
+      data()->_config->_words[i] = cwords[i];
+      const Config::Word &word = data()->_config->_words[i];
+      for (uint j=0; j<uint(word.masks.count()); j++) {
+        const Config::Mask &mask = word.masks[j];
+        for (uint k=0; k<uint(mask.values.count()); k++) {
+          const QStringList &vcnames = mask.values[k].configNames[type];
+          for (uint l=0; l<uint(vcnames.count()); l++) {
+            if ( vcnames[l].startsWith("0x") ) continue;
+            if ( cnames.contains(vcnames[l]) && cnames[vcnames[l]]!=mask.name )
+              qFatal(QString("Duplicated config name for %1/%2").arg(mask.name).arg(mask.values[k].name));
+            cnames[vcnames[l]] = word.masks[j].name;
+          }
+        }
+      }
+    }
+  }
+  // check validity of value names
+  for (uint i=0; i<nbWords; i++) {
+    const Config::Word &word = data()->_config->_words[i];
+    for (uint j=0; j<uint(word.masks.count()); j++) {
+      const Config::Mask &mask = word.masks[j];
+      for (uint k=0; k<uint(mask.values.count()); k++) {
+        const Config::Value &value = mask.values[k];
+        if ( !value.isValid() ) continue;
+        if ( !data()->_config->checkValueName(mask.name, value.name) )
+          qFatal(QString("Malformed value name \"%1\" in mask %2").arg(value.name).arg(mask.name));
+      }
+    }
+  }
+  // check if all values are explicit
+  for (uint i=0; i<nbWords; i++) {
+    const Config::Word &word = data()->_config->_words[i];
+    for (uint j=0; j<uint(word.masks.count()); j++) {
+      const Config::Mask &mask = word.masks[j];
+      BitValue::const_iterator it;
+      for (it=mask.value.begin(); it!=mask.value.end(); ++it)
+        if ( !hasValue(mask, *it) ) qFatal(QString("Value %1 not defined in mask %2").arg(toHexLabel(*it, data()->nbCharsWord(MemoryRangeType::Config))).arg(mask.name));
+    }
+  }
+
+  // checksums (after config bits!)
+  QDomElement checksums = findUniqueElement(device, "checksums", QString::null, QString::null);
+  if ( checksums.isNull() ) {
+    // qFatal("No checksum defined"); // #### FIXME
+  } else {
+    QMap<QString, bool> valueNames;
+    const Pic::Protection &protection = data()->_config->protection();
+    if ( protection.family()==Protection::BasicProtection ) {
+      QString maskName = protection.maskName(Protection::ProgramProtected, MemoryRangeType::Code);
+      const Pic::Config::Mask *mask = data()->_config->findMask(maskName);
+      Q_ASSERT(mask);
+      for (uint i=0; i<uint(mask->values.count()); i++) valueNames[mask->values[i].name] = false;
+    }
+    QDomNode child = checksums.firstChild();
+    while ( !child.isNull() ) {
+      if ( !child.isElement() ) continue;
+      if ( child.nodeName()!="checksum" ) qFatal("Childs of \"checksums\" should \"checksum\"");
+      QString valueName = getChecksumData(child.toElement());
+      if ( protection.family()==Protection::BasicProtection ) {
+        if ( !valueNames.contains(valueName) ) qFatal("Unknown protected attribute");
+        valueNames[valueName] = true;
+      }
+      child = child.nextSibling();
+    }
+    QMap<QString, bool>::const_iterator it;
+    for (it=valueNames.begin(); it!=valueNames.end(); ++it)
+      if ( !it.key().isEmpty() && !it.data() ) qFatal(QString("Missing checksum \"%1\"").arg(it.key()));
+  }
+}
+
+void processMirrored(QDomElement element)
+{
+  QValueVector<RangeData> mirrored;
+  QDomNode child = element.firstChild();
+  while ( !child.isNull() ) {
+    if ( !child.isElement() ) qFatal("\"mirror\" child should be an element");
+    QDomElement e = child.toElement();
+    if ( e.nodeName()!="range" ) qFatal("\"mirror\" child should be \"range\"");
+    RangeData rd;
+    bool ok;
+    rd.start = fromHexLabel(e.attribute("start"), &ok);
+    Address end = fromHexLabel(e.attribute("end"), &ok);
+    rd.length = end-rd.start+1;
+    if ( !mirrored.isEmpty() && rd.length!=mirrored[0].length )
+      qFatal("Mirrored are not of the same length");
+    mirrored.append(rd);
+    child = child.nextSibling();
+  }
+  if ( !mirrored.isEmpty() ) static_cast<RegistersData *>(data()->_registersData)->mirrored.append(mirrored);
+}
+
+void processUnused(QDomElement e)
+{
+  RangeData rd;
+  bool ok;
+  rd.start = fromHexLabel(e.attribute("start"), &ok);
+  if (!ok) qFatal("Malformed start for unused register");
+  Address end = fromHexLabel(e.attribute("end"), &ok);
+  rd.length = end-rd.start+1;
+  if (!ok) qFatal("Malformed end for unused register");
+  static_cast<RegistersData *>(data()->_registersData)->unused.append(rd);
+}
+
+void processSfr(QDomElement e)
+{
+  QString name = e.attribute("name");
+  if ( name.isEmpty() ) qFatal("SFR cannot have empty name");
+  if ( data()->registersData().sfrs.contains(name) || data()->registersData().combined.contains(name) )
+    qFatal("SFR name is duplicated");
+  bool ok;
+  uint address = fromHexLabel(e.attribute("address"), &ok);
+  if ( !ok ) qFatal(QString("SFR %1 address %2 is malformed").arg(name).arg(e.attribute("address")));
+  uint rlength = data()->registersData().nbBanks * data()->architecture().data().registerBankLength;
+  if ( address>=rlength ) qFatal(QString("Address %1 outside register range").arg(toHexLabel(address, 3)));
+  RegisterData rdata;
+  rdata.address = address;
+  uint nb = data()->registersData().nbBits();
+  if ( nb>Device::MAX_NB_PORT_BITS ) qFatal(QString("Need higher MAX_NB_PORT_BITS: %1").arg(nb));
+  QString access = e.attribute("access");
+  if ( uint(access.length())!=nb ) qFatal("access is missing or malformed");
+  QString mclr = e.attribute("mclr");
+  if ( uint(mclr.length())!=nb ) qFatal("mclr is missing or malformed");
+  QString por = e.attribute("por");
+  if ( uint(por.length())!=nb ) qFatal("por is missing or malformed");
+  for (uint i=0; i<nb; i++) {
+    uint k = nb - i - 1;
+    bool ok;
+    rdata.bits[k].properties = RegisterBitProperties(fromHex(access[i].latin1(), &ok));
+    if ( !ok || rdata.bits[k].properties>MaxRegisterBitProperty ) qFatal(QString("Malformed access bit %1").arg(k));
+    rdata.bits[k].mclr = RegisterBitState(fromHex(mclr[i].latin1(), &ok));
+    if ( !ok || rdata.bits[k].mclr>Nb_RegisterBitStates ) qFatal(QString("Malformed mclr bit %1").arg(k));
+    rdata.bits[k].por = RegisterBitState(fromHex(por[i].latin1(), &ok));
+    if ( !ok || rdata.bits[k].por>Nb_RegisterBitStates ) qFatal(QString("Malformed por bit %1").arg(k));
+  }
+  static_cast<RegistersData *>(data()->_registersData)->sfrs[name] = rdata;
+}
+
+void processCombined(QDomElement e)
+{
+  QString name = e.attribute("name");
+  if ( name.isEmpty() ) qFatal("Combined register cannot have empty name");
+  if ( data()->registersData().sfrs.contains(name) || data()->registersData().combined.contains(name) )
+    qFatal("Combined register name is duplicated");
+  bool ok;
+  CombinedData rdata;
+  rdata.address = fromHexLabel(e.attribute("address"), &ok);
+  if ( !ok ) qFatal(QString("Combined %1 address %2 is malformed").arg(name).arg(e.attribute("address")));
+  uint rlength = data()->registersData().nbBanks * data()->architecture().data().registerBankLength;
+  if ( rdata.address>=rlength ) qFatal(QString("Address %1 outside register range").arg(toHexLabel(rdata.address, 3)));
+  rdata.nbChars = 2*e.attribute("size").toUInt(&ok);
+  if ( !ok || rdata.nbChars<2 ) qFatal(QString("Combined %1 size %2 is malformed").arg(name).arg(e.attribute("size")));
+  Address end = rdata.address + rdata.nbChars/2 - 1;
+  if ( end>=rlength ) qFatal(QString("Address %1 outside register range").arg(toHexLabel(end, 3)));
+  static_cast<RegistersData *>(data()->_registersData)->combined[name] = rdata;
+}
+
+void processDeviceRegisters(QDomElement element)
+{
+  QString s = element.attribute("same_as");
+  if ( !s.isEmpty() ) {
+    if ( !_map.contains(s) ) qFatal(QString("Registers same as unknown device %1").arg(s));
+    const Pic::Data *d = static_cast<const Pic::Data *>(_map[s]);
+    data()->_registersData = d->_registersData;
+    return;
+  }
+
+  RegistersData &rdata = *static_cast<RegistersData *>(data()->_registersData);
+  bool ok;
+  rdata.nbBanks = element.attribute("nb_banks").toUInt(&ok);
+  if ( !ok || data()->registersData().nbBanks==0 ) qFatal("Malformed number of banks");
+  if ( data()->is18Family() ) {
+    rdata.accessBankSplit = fromHexLabel(element.attribute("access_bank_split_offset"), &ok);
+    if ( !ok || rdata.accessBankSplit==0 || rdata.accessBankSplit>=0xFF ) qFatal("Malformed access bank split offset");
+    rdata.unusedBankMask = fromHexLabel(element.attribute("unused_bank_mask"), &ok);
+    if ( !ok || rdata.unusedBankMask>=maxValue(NumberBase::Hex, rdata.nbBanks) ) qFatal("Malformed access unused bank mask");
+  } else {
+    rdata.accessBankSplit = 0;
+    rdata.unusedBankMask = 0;
+  }
+
+  QDomNode child = element.firstChild();
+  while ( !child.isNull() ) {
+    if ( !child.isElement() ) qFatal("\"device\" child should be an element");
+    QDomElement e = child.toElement();
+    if ( e.nodeName()=="mirror" ) processMirrored(e);
+    else if ( e.nodeName()=="unused" ) processUnused(e);
+    else if ( e.nodeName()=="combined" ) processCombined(e);
+    else if ( e.nodeName()=="sfr" ) processSfr(e);
+    else qFatal(QString("Node name \"%1\" is not recognized").arg(e.nodeName()));
+    child = child.nextSibling();
+  }
+
+  for (uint i=0; i<Device::MAX_NB_PORTS; i++) {
+    QString portname = rdata.portName(i);
+    if ( portname.isEmpty() ) break;
+    bool hasPort = rdata.sfrs.contains(portname);
+    QString trisname = rdata.trisName(i);
+    if ( trisname.isEmpty() ) continue;
+    bool hasTris = rdata.sfrs.contains(trisname);
+    if ( !hasPort && hasTris ) qFatal(QString("%1 needs %2 to be present").arg(trisname).arg(portname));
+    QString latchname = rdata.latchName(i);
+    if ( latchname.isEmpty() ) continue;
+    bool hasLatch = rdata.sfrs.contains(latchname);
+    if ( !hasPort && hasLatch ) qFatal(QString("%1 needs %2 to be present").arg(latchname).arg(portname));
+  }
+}
+
+void processRegistersFile(const QString &filename, QStringList &devices)
+{
+  QDomDocument doc = parseFile(filename);
+  QDomElement root = doc.documentElement();
+  if ( root.nodeName()!="registers" ) qFatal("root node should be \"registers\"");
+  for (QDomNode child=root.firstChild(); !child.isNull(); child = child.nextSibling()) {
+    if ( child.isComment() ) qDebug("comment: %s", child.toComment().data().latin1());
+    else {
+      if ( !child.isElement() ) qFatal("\"registers\" child should be an element");
+      if ( child.nodeName()!="device" ) qFatal("Device node should be named \"device\"");
+      QDomElement device = child.toElement();
+      QString name = device.attribute("name");
+      if ( devices.contains(name) ) qFatal(QString("Registers already defined for %1").arg(name));
+      if ( _map.contains(name) ) {
+        _data = _map[name];
+        processDeviceRegisters(device);
+        devices.append(name);
+      }
+    }
+  }
+}
+
+void processRegisters()
+{
+  QStringList devices;
+  processRegistersFile("registers/registers.xml", devices);
+  processRegistersFile("registers/registers_missing.xml", devices);
+
+  // check if we miss any register description
+  QMap<QString, Device::Data *>::const_iterator it = _map.begin();
+  for (; it!=_map.end(); ++it) {
+    _data = it.data();
+    if ( !devices.contains(it.key()) ) qWarning("Register description not found for %s", it.key().latin1());
+  }
+}
+
+virtual void checkPins(const QMap<QString, uint> &pinLabels) const
+{
+  if ( !pinLabels.contains("VDD") ) qFatal("No VDD pin specified");
+  if ( !pinLabels.contains("VSS") ) qFatal("No VSS pin specified");
+  QMap<QString, uint>::const_iterator it;
+  for (it=pinLabels.begin(); it!=pinLabels.end(); ++it) {
+    if ( it.key()=="VDD" || it.key()=="VSS" || it.key().startsWith("CCP") ) continue;
+    if ( it.data()!=1 ) qFatal(QString("Duplicated pin \"%1\"").arg(it.key()));
+  }
+  const Pic::RegistersData &rdata = static_cast<const Pic::RegistersData &>(*_data->registersData());
+  for (uint i=0; i<Device::MAX_NB_PORTS; i++) {
+    if ( !rdata.hasPort(i) ) continue;
+    for (uint k=0; k<Device::MAX_NB_PORT_BITS; k++) {
+      if ( !rdata.hasPortBit(i, k) ) continue;
+      QString name = rdata.portBitName(i, k);
+      if ( !pinLabels.contains(name) ) qFatal(QString("Pin \"%1\" not present").arg(name));
+    }
+  }
+}
+
+virtual void parse()
+{
+  Device::XmlToDataBase::parse();
+  processRegisters();
+}
+
+}; // class Pic::XmlToData
+
+} // namespace
+
+//-----------------------------------------------------------------------------
+XML_MAIN(Pic::XmlToData)
diff --git a/src/devices/pic/xml/xml.pro b/src/devices/pic/xml/xml.pro
new file mode 100644
index 0000000..d63b0aa
--- /dev/null
+++ b/src/devices/pic/xml/xml.pro
@@ -0,0 +1,13 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/app.pro)
+
+TARGET   = pic_xml_to_data
+SOURCES += pic_xml_to_data.cpp
+LIBS    += ../../../devices/pic/base/libpicbase.a ../../../xml_to_data/libxmltodata.a \
+           ../../../devices/base/libdevicebase.a ../../../common/global/libglobal.a \
+           ../../../common/nokde/libnokde.a ../../../common/common/libcommon.a
+
+unix:QMAKE_POST_LINK = cd ../xml_data && ../xml/pic_xml_to_data
+unix:QMAKE_CLEAN += ../xml_data/pic_data.cpp
+win32:QMAKE_POST_LINK = cd ..\xml_data && ..\xml\pic_xml_to_data.exe
+win32:QMAKE_CLEAN += ..\xml_data\pic_data.cpp
diff --git a/src/devices/pic/xml_data/10F200.xml b/src/devices/pic/xml_data/10F200.xml
new file mode 100644
index 0000000..11ce1ff
--- /dev/null
+++ b/src/devices/pic/xml_data/10F200.xml
@@ -0,0 +1,76 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="10F200" document="019863" status="IP" memory_technology="FLASH" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xEF1D" cchecksum="0xDD65" />
+    <checksum protected="040:0FE" bchecksum="0xEEF1" cchecksum="0xD45D" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="4" end="4" vdd_min="2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.5"  max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"            start="0x000" end="0x0FE" />
+  <memory name="calibration"        start="0x0FF" end="0x0FF" cal_opmask="0xF00"     cal_opcode="0xC00" />
+  <memory name="user_ids"           start="0x100" end="0x103" rmask="0x00F"          />
+  <memory name="config"             start="0x1FF" end="0x1FF" hexfile_offset="0xFFF" />
+  <memory name="calibration_backup" start="0x104" end="0x104" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFF" bvalue="0x01F" cmask="0x01C" >
+    <mask name="FOSC"  value="0x003" >
+      <value value="default" name="invalid" />
+      <value value="0x003"   name="INTRC" cname="_IntRC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"    value="0x008" >
+      <value value="0x000" name="040:0FE" cname="_CP_ON"  />
+      <value value="0x008" name="Off"     cname="_CP_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x010" >
+      <value value="0x000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x010" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip"  nb_pins="8" >
+    <pin index="1" name="N/C"             />
+    <pin index="2" name="VDD"             />
+    <pin index="3" name="GP2/T0CKI/FOSC4" />
+    <pin index="4" name="GP1/ICSPCLK"     />
+    <pin index="5" name="GP3/MCLR/VPP"    />
+    <pin index="6" name="VSS"             />
+    <pin index="7" name="N/C"             />
+    <pin index="8" name="GP0/ISCPDAT"     />
+  </package>
+
+  <package types="sot23" nb_pins="6" >
+    <pin index="1" name="" />
+    <pin index="2" name="" />
+    <pin index="3" name="" />
+    <pin index="4" name="" />
+    <pin index="5" name="" />
+    <pin index="6" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/10F202.xml b/src/devices/pic/xml_data/10F202.xml
new file mode 100644
index 0000000..25ce72a
--- /dev/null
+++ b/src/devices/pic/xml_data/10F202.xml
@@ -0,0 +1,76 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="10F202" document="020030" status="IP" memory_technology="FLASH" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xEE1D" cchecksum="0xDC65" />
+    <checksum protected="040:1FE" bchecksum="0xEDF1" cchecksum="0xD35D" />
+  </checksums>
+  
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="4" end="4" vdd_min="2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.5"  max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"            start="0x000" end="0x1FE" />
+  <memory name="calibration"        start="0x1FF" end="0x1FF" cal_opmask="0xF00"     cal_opcode="0xC00" />
+  <memory name="user_ids"           start="0x200" end="0x203" rmask="0x00F"          />
+  <memory name="config"             start="0x3FF" end="0x3FF" hexfile_offset="0xFFF" />
+  <memory name="calibration_backup" start="0x204" end="0x204" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFF" bvalue="0x01F" cmask="0x01C" >
+    <mask name="FOSC"  value="0x003" >
+      <value value="default" name="invalid" />
+      <value value="0x003" name="INTRC" cname="_IntRC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"    value="0x008" >
+      <value value="0x000" name="040:1FE" cname="_CP_ON"  />
+      <value value="0x008" name="Off"     cname="_CP_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x010" >
+      <value value="0x000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x010" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip"  nb_pins="8" >
+    <pin index="1" name="N/C"             />
+    <pin index="2" name="VDD"             />
+    <pin index="3" name="GP2/T0CKI/FOSC4" />
+    <pin index="4" name="GP1/ICSPCLK"     />
+    <pin index="5" name="GP3/MCLR/VPP"    />
+    <pin index="6" name="VSS"             />
+    <pin index="7" name="N/C"             />
+    <pin index="8" name="GP0/ISCPDAT"     />
+  </package>
+
+  <package types="sot23" nb_pins="6" >
+    <pin index="1" name="" />
+    <pin index="2" name="" />
+    <pin index="3" name="" />
+    <pin index="4" name="" />
+    <pin index="5" name="" />
+    <pin index="6" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/10F204.xml b/src/devices/pic/xml_data/10F204.xml
new file mode 100644
index 0000000..e2d2e6d
--- /dev/null
+++ b/src/devices/pic/xml_data/10F204.xml
@@ -0,0 +1,76 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="10F204" document="020031" status="IP" memory_technology="FLASH" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xEF1D" cchecksum="0xDD65" />
+    <checksum protected="040:0FE" bchecksum="0xEEF1" cchecksum="0xD45D" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="4" end="4" vdd_min="2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.5"  max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"            start="0x000" end="0x0FE" />
+  <memory name="calibration"        start="0x0FF" end="0x0FF" cal_opmask="0xF00"     cal_opcode="0xC00" />
+  <memory name="user_ids"           start="0x100" end="0x103" rmask="0x00F"          />
+  <memory name="config"             start="0x1FF" end="0x1FF" hexfile_offset="0xFFF" />
+  <memory name="calibration_backup" start="0x104" end="0x104" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFF" bvalue="0x01F" cmask="0x01C" >
+    <mask name="FOSC"  value="0x003" >
+      <value value="default" name="invalid" />
+      <value value="0x003" name="INTRC" cname="_IntRC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"    value="0x008" >
+      <value value="0x000" name="040:0FE" cname="_CP_ON"  />
+      <value value="0x008" name="Off"     cname="_CP_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x010" >
+      <value value="0x000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x010" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip"  nb_pins="8" >
+    <pin index="1" name="N/C"                  />
+    <pin index="2" name="VDD"                  />
+    <pin index="3" name="GP2/T0CKI/FOSC4/COUT" />
+    <pin index="4" name="GP1/ISCPCLK/CIN-"     />
+    <pin index="5" name="GP3/MCLR/VPP"         />
+    <pin index="6" name="VSS"                  />
+    <pin index="7" name="N/C"                  />
+    <pin index="8" name="GP0/ISCPDAT/CIN+"     />
+  </package>
+
+  <package types="sot23" nb_pins="6" >
+    <pin index="1" name="" />
+    <pin index="2" name="" />
+    <pin index="3" name="" />
+    <pin index="4" name="" />
+    <pin index="5" name="" />
+    <pin index="6" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/10F206.xml b/src/devices/pic/xml_data/10F206.xml
new file mode 100644
index 0000000..4e66268
--- /dev/null
+++ b/src/devices/pic/xml_data/10F206.xml
@@ -0,0 +1,76 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="10F206" document="020032" status="IP" memory_technology="FLASH" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xEE1D" cchecksum="0xDC65" />
+    <checksum protected="040:1FE" bchecksum="0xEDF1" cchecksum="0xD35D" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="4" end="4" vdd_min="2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.5"  max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"            start="0x000" end="0x1FE" />
+  <memory name="calibration"        start="0x1FF" end="0x1FF" cal_opmask="0xF00"     cal_opcode="0xC00" />
+  <memory name="user_ids"           start="0x200" end="0x203" rmask="0x00F"          />
+  <memory name="config"             start="0x3FF" end="0x3FF" hexfile_offset="0xFFF" />
+  <memory name="calibration_backup" start="0x204" end="0x204" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFF" bvalue="0x01F" cmask="0x01C" >
+    <mask name="FOSC"  value="0x003" >
+      <value value="default" name="invalid" />
+      <value value="0x003" name="INTRC" cname="_IntRC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"    value="0x008" >
+      <value value="0x000" name="040:1FE" cname="_CP_ON"  />
+      <value value="0x008" name="Off"     cname="_CP_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x010" >
+      <value value="0x000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x010" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip"  nb_pins="8" >
+    <pin index="1" name="N/C"                  />
+    <pin index="2" name="VDD"                  />
+    <pin index="3" name="GP2/T0CKI/FOSC4/COUT" />
+    <pin index="4" name="GP1/ISCPCLK/CIN-"     />
+    <pin index="5" name="GP3/MCLR/VPP"         />
+    <pin index="6" name="VSS"                  />
+    <pin index="7" name="N/C"                  />
+    <pin index="8" name="GP0/ISCPDAT/CIN+"     />
+  </package>
+
+  <package types="sot23" nb_pins="6" >
+    <pin index="1" name="" />
+    <pin index="2" name="" />
+    <pin index="3" name="" />
+    <pin index="4" name="" />
+    <pin index="5" name="" />
+    <pin index="6" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/10F220.xml b/src/devices/pic/xml_data/10F220.xml
new file mode 100644
index 0000000..694d161
--- /dev/null
+++ b/src/devices/pic/xml_data/10F220.xml
@@ -0,0 +1,81 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="10F220" document="023673" status="IP" memory_technology="FLASH" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xEF20" cchecksum="0xDD68" />
+    <checksum protected="040:0FE" bchecksum="0xEEF7" cchecksum="0xD463" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="4" end="4" vdd_min="2" vdd_max="5.5" />
+    <frequency start="8" end="8" vdd_min="2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.5"  max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"            start="0x000" end="0x0FE" />
+  <memory name="calibration"        start="0x0FF" end="0x0FF" cal_opmask="0xF00"     cal_opcode="0xC00" />
+  <memory name="user_ids"           start="0x100" end="0x103" rmask="0x00F"          />
+  <memory name="config"             start="0x1FF" end="0x1FF" hexfile_offset="0xFFF" />
+  <memory name="calibration_backup" start="0x104" end="0x104" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFF" bvalue="0x01F" >
+    <mask name="IOSCFS" value="0x001" >
+      <value value="0x000" name="4MHZ" cname="_IOFSCS_4MHZ" ecnames="_IOSCFS_4MHZ" />
+      <value value="0x001" name="8MHZ" cname="_IOFSCS_8MHZ" ecnames="_IOSCFS_8MHZ" />
+    </mask>
+    <mask name="MCPU"   value="0x002" >
+      <value value="0x000" name="On"  cname="_MCPU_ON"  />
+      <value value="0x002" name="Off" cname="_MCPU_OFF" />
+    </mask>
+    <mask name="WDT"    value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"     value="0x008" >
+      <value value="0x000" name="040:0FE" cname="_CP_ON"  />
+      <value value="0x008" name="Off"     cname="_CP_OFF" />
+    </mask>
+    <mask name="MCLRE"  value="0x010" >
+      <value value="0x000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x010" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip"  nb_pins="8" >
+    <pin index="1" name="N/C"             />
+    <pin index="2" name="VDD"             />
+    <pin index="3" name="GP2/T0CKI/FOSC4" />
+    <pin index="4" name="GP1/ISCPCLK/AN1" />
+    <pin index="5" name="GP3/MCLR/VPP"    />
+    <pin index="6" name="VSS"             />
+    <pin index="7" name="N/C"             />
+    <pin index="8" name="GP0/ISCPDAT/AN0" />
+  </package>
+
+  <package types="sot23" nb_pins="6" >
+    <pin index="1" name="" />
+    <pin index="2" name="" />
+    <pin index="3" name="" />
+    <pin index="4" name="" />
+    <pin index="5" name="" />
+    <pin index="6" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/10F222.xml b/src/devices/pic/xml_data/10F222.xml
new file mode 100644
index 0000000..4cba906
--- /dev/null
+++ b/src/devices/pic/xml_data/10F222.xml
@@ -0,0 +1,81 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="10F222" document="023672" status="IP" memory_technology="FLASH" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xEE20" cchecksum="0xDC68" />
+    <checksum protected="040:1FE" bchecksum="0xEDF7" cchecksum="0xD363" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="4" end="4" vdd_min="2" vdd_max="5.5" />
+    <frequency start="8" end="8" vdd_min="2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.5"  max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"            start="0x000" end="0x1FE" />
+  <memory name="calibration"        start="0x1FF" end="0x1FF" cal_opmask="0xF00"     cal_opcode="0xC00" />
+  <memory name="user_ids"           start="0x200" end="0x203" rmask="0x00F"          />
+  <memory name="config"             start="0x3FF" end="0x3FF" hexfile_offset="0xFFF" />
+  <memory name="calibration_backup" start="0x204" end="0x204" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFF" bvalue="0x01F" >
+    <mask name="IOSCFS" value="0x001" >
+      <value value="0x000" name="4MHZ" cname="_IOFSCS_4MHZ" ecnames="_IOSCFS_4MHZ" />
+      <value value="0x001" name="8MHZ" cname="_IOFSCS_8MHZ" ecnames="_IOSCFS_8MHZ" />
+    </mask>
+    <mask name="MCPU"   value="0x002" >
+      <value value="0x000" name="On"  cname="_MCPU_ON"  />
+      <value value="0x002" name="Off" cname="_MCPU_OFF" />
+    </mask>
+    <mask name="WDT"    value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"     value="0x008" >
+      <value value="0x000" name="040:1FE" cname="_CP_ON"  />
+      <value value="0x008" name="Off"     cname="_CP_OFF" />
+    </mask>
+    <mask name="MCLRE"  value="0x010" >
+      <value value="0x000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x010" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip"  nb_pins="8" >
+    <pin index="1" name="N/C"             />
+    <pin index="2" name="VDD"             />
+    <pin index="3" name="GP2/T0CKI/FOSC4" />
+    <pin index="4" name="GP1/ISCPCLK/AN1" />
+    <pin index="5" name="GP3/MCLR/VPP"    />
+    <pin index="6" name="VSS"             />
+    <pin index="7" name="N/C"             />
+    <pin index="8" name="GP0/ISCPDAT/AN0" />
+  </package>
+
+  <package types="sot23" nb_pins="6" >
+    <pin index="1" name="" />
+    <pin index="2" name="" />
+    <pin index="3" name="" />
+    <pin index="4" name="" />
+    <pin index="5" name="" />
+    <pin index="6" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/12C508.xml b/src/devices/pic/xml_data/12C508.xml
new file mode 100644
index 0000000..cb39eae
--- /dev/null
+++ b/src/devices/pic/xml_data/12C508.xml
@@ -0,0 +1,71 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="12C508" document="010102" status="NR" alternative="12F508" memory_technology="EPROM" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xEE20" cchecksum="0xDC68" />
+    <checksum protected="040:1FE" bchecksum="0xEDF7" cchecksum="0xD363" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4" vdd_min="3" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="13"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"     start="0x000" end="0x1FE" />
+  <memory name="calibration" start="0x1FF" end="0x1FF" cal_opmask="0xF00" cal_opcode="0xC00" />
+  <memory name="user_ids"    start="0x200" end="0x203" rmask="0x00F"      />
+  <memory name="config"      start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x01F" bvalue="0x01F" >
+    <mask name="FOSC"  value="0x003" >
+      <value value="0x000" name="LP"    cname="_LP_OSC"    />
+      <value value="0x001" name="XT"    cname="_XT_OSC"    />
+      <value value="0x002" name="INTRC" cname="_IntRC_OSC" />
+      <value value="0x003" name="EXTRC" cname="_ExtRC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"    value="0x008" >
+      <value value="0x000" name="040:1FE" cname="_CP_ON"  />
+      <value value="0x008" name="Off"     cname="_CP_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x010" >
+      <value value="0x000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x010" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="8" >
+    <pin index="1" name="VDD"            />
+    <pin index="2" name="GP5/OSC1/CLKIN" />
+    <pin index="3" name="GP4/OSC2"       />
+    <pin index="4" name="GP3/MCLR/VPP"   />
+    <pin index="5" name="GP2/T0CKI"      />
+    <pin index="6" name="GP1"            />
+    <pin index="7" name="GP0"            />
+    <pin index="8" name="VSS"            />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/12C508A.xml b/src/devices/pic/xml_data/12C508A.xml
new file mode 100644
index 0000000..f1ffb3f
--- /dev/null
+++ b/src/devices/pic/xml_data/12C508A.xml
@@ -0,0 +1,68 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="12C508A" document="010103" status="NR" alternative="12F508" memory_technology="EPROM" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xEE20" cchecksum="0xDC68" />
+    <checksum protected="040:1FE" bchecksum="0xEDF7" cchecksum="0xD363" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0" end="4" vdd_min="3" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="13"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"     start="0x000" end="0x1FE" />
+  <memory name="calibration" start="0x1FF" end="0x1FF" cal_opmask="0xF00" cal_opcode="0xC00" />
+  <memory name="user_ids"    start="0x200" end="0x203" rmask="0x00F"      />
+  <memory name="config"      start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x01F" bvalue="0x01F" >
+    <mask name="FOSC"  value="0x003" >
+      <value value="0x000" name="LP"    cname="_LP_OSC"    />
+      <value value="0x001" name="XT"    cname="_XT_OSC"    />
+      <value value="0x002" name="INTRC" cname="_IntRC_OSC" />
+      <value value="0x003" name="EXTRC" cname="_ExtRC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"    value="0x008" >
+      <value value="0x000" name="040:1FE" cname="_CP_ON"  />
+      <value value="0x008" name="Off"     cname="_CP_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x010" >
+      <value value="0x000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x010" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="8" >
+    <pin index="1" name="VDD"            />
+    <pin index="2" name="GP5/OSC1/CLKIN" />
+    <pin index="3" name="GP4/OSC2"       />
+    <pin index="4" name="GP3/MCLR/VPP"   />
+    <pin index="5" name="GP2/T0CKI"      />
+    <pin index="6" name="GP1"            />
+    <pin index="7" name="GP0"            />
+    <pin index="8" name="VSS"            />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/12C509.xml b/src/devices/pic/xml_data/12C509.xml
new file mode 100644
index 0000000..dbe885b
--- /dev/null
+++ b/src/devices/pic/xml_data/12C509.xml
@@ -0,0 +1,71 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="12C509" document="010104" status="NR" alternative="12F509" memory_technology="EPROM" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xEC20" cchecksum="0xDA68" />
+    <checksum protected="040:3FE" bchecksum="0xEBF7" cchecksum="0xD163" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4" vdd_min="3" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="13"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"     start="0x000" end="0x3FE" />
+  <memory name="calibration" start="0x3FF" end="0x3FF" cal_opmask="0xF00" cal_opcode="0xC00" />
+  <memory name="user_ids"    start="0x400" end="0x403" rmask="0x00F"      />
+  <memory name="config"      start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x01F" bvalue="0x01F" >
+    <mask name="FOSC"  value="0x003" >
+      <value value="0x000" name="LP"    cname="_LP_OSC"    />
+      <value value="0x001" name="XT"    cname="_XT_OSC"    />
+      <value value="0x002" name="INTRC" cname="_IntRC_OSC" />
+      <value value="0x003" name="EXTRC" cname="_ExtRC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"    value="0x008" >
+      <value value="0x000" name="040:3FE" cname="_CP_ON"  />
+      <value value="0x008" name="Off"     cname="_CP_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x010" >
+      <value value="0x000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x010" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="8" >
+    <pin index="1" name="VDD"            />
+    <pin index="2" name="GP5/OSC1/CLKIN" />
+    <pin index="3" name="GP4/OSC2"       />
+    <pin index="4" name="GP3/MCLR/VPP"   />
+    <pin index="5" name="GP2/T0CKI"      />
+    <pin index="6" name="GP1"            />
+    <pin index="7" name="GP0"            />
+    <pin index="8" name="VSS"            />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/12C509A.xml b/src/devices/pic/xml_data/12C509A.xml
new file mode 100644
index 0000000..240783f
--- /dev/null
+++ b/src/devices/pic/xml_data/12C509A.xml
@@ -0,0 +1,68 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="12C509A" document="010105" status="NR" alternative="12F509" memory_technology="EPROM" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xEC20" cchecksum="0xDA68" />
+    <checksum protected="040:3FE" bchecksum="0xEBF7" cchecksum="0xD163" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0" end="4" vdd_min="3" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="13"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"     start="0x000" end="0x3FE" />
+  <memory name="calibration" start="0x3FF" end="0x3FF" cal_opmask="0xF00" cal_opcode="0xC00" />
+  <memory name="user_ids"    start="0x400" end="0x403" rmask="0x00F"      />
+  <memory name="config"      start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x01F" bvalue="0x01F" >
+    <mask name="FOSC"  value="0x003" >
+      <value value="0x000" name="LP"    cname="_LP_OSC"    />
+      <value value="0x001" name="XT"    cname="_XT_OSC"    />
+      <value value="0x002" name="INTRC" cname="_IntRC_OSC" />
+      <value value="0x003" name="EXTRC" cname="_ExtRC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"    value="0x008" >
+      <value value="0x000" name="040:3FE" cname="_CP_ON"  />
+      <value value="0x008" name="Off"     cname="_CP_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x010" >
+      <value value="0x000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x010" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="8" >
+    <pin index="1" name="VDD"            />
+    <pin index="2" name="GP5/OSC1/CLKIN" />
+    <pin index="3" name="GP4/OSC2"       />
+    <pin index="4" name="GP3/MCLR/VPP"   />
+    <pin index="5" name="GP2/T0CKI"      />
+    <pin index="6" name="GP1"            />
+    <pin index="7" name="GP0"            />
+    <pin index="8" name="VSS"            />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/12C671.xml b/src/devices/pic/xml_data/12C671.xml
new file mode 100644
index 0000000..f675723
--- /dev/null
+++ b/src/devices/pic/xml_data/12C671.xml
@@ -0,0 +1,85 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="12C671" document="010106" status="NR" alternative="12F675" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xFC00" cchecksum="0xC7CE" />
+    <checksum protected="200:3FE" bchecksum="0x0FBF" cchecksum="0xC174" />
+    <checksum protected="All"     bchecksum="0xFC9F" cchecksum="0xC86D" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0" end="10" vdd_min="3" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="commercial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"     start="0x0000" end="0x03FE" />
+  <memory name="calibration" start="0x03FF" end="0x03FF" cal_opmask="0x3C00" cal_opcode="0x3400" />
+  <memory name="user_ids"    start="0x2000" end="0x2003" rmask="0x000F"      />
+  <memory name="config"      start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3FFF" icnames="_CP_50" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="invalid" />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTRC_OSC" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRC_OSC" />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0080" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0080" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F60" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1520" name="200:3FE" cname="_CP_75"  />
+      <value value="default" name="Off"     cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="8" >
+    <pin index="1" name="VDD"                 />
+    <pin index="2" name="GP5/OSC1/CLKIN"      />
+    <pin index="3" name="GP4/OSC2/AN3/CLKOUT" />
+    <pin index="4" name="GP3/MCLR/VPP"        />
+    <pin index="5" name="GP2/T0CKI/AN2/INT"   />
+    <pin index="6" name="GP1/AN1/VREF"        />
+    <pin index="7" name="GP0/AN0"             />
+    <pin index="8" name="VSS"                 />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/12C672.xml b/src/devices/pic/xml_data/12C672.xml
new file mode 100644
index 0000000..80511f1
--- /dev/null
+++ b/src/devices/pic/xml_data/12C672.xml
@@ -0,0 +1,87 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="12C672" document="010107" status="NR" alternative="12F683" memory_technology="EPROM" architecture="16X" 
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xF800" cchecksum="0xC3CE" />
+    <checksum protected="400:7FE" bchecksum="0x1EDF" cchecksum="0xD094" />
+    <checksum protected="200:7FE" bchecksum="0x0BBF" cchecksum="0xBD74" />
+    <checksum protected="All"     bchecksum="0xF89F" cchecksum="0xC46D" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0" end="10" vdd_min="3" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="commercial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"     start="0x0000" end="0x07FE" />
+  <memory name="calibration" start="0x07FF" end="0x07FF" cal_opmask="0x3C00" cal_opcode="0x3400" />
+  <memory name="user_ids"    start="0x2000" end="0x2003" rmask="0x000F"      />
+  <memory name="config"      start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="invalid" />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTRC_OSC" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRC_OSC" />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0080" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0080" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F60" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1520" name="200:7FE" cname="_CP_75"  />
+      <value value="0x2A40" name="400:7FE" cname="_CP_50"  />
+      <value value="default" name="Off"     cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="8" >
+    <pin index="1" name="VDD"                 />
+    <pin index="2" name="GP5/OSC1/CLKIN"      />
+    <pin index="3" name="GP4/OSC2/AN3/CLKOUT" />
+    <pin index="4" name="GP3/MCLR/VPP"        />
+    <pin index="5" name="GP2/T0CKI/AN2/INT"   />
+    <pin index="6" name="GP1/AN1/VREF"        />
+    <pin index="7" name="GP0/AN0"             />
+    <pin index="8" name="VSS"                 />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/12CE518.xml b/src/devices/pic/xml_data/12CE518.xml
new file mode 100644
index 0000000..e27cbb3
--- /dev/null
+++ b/src/devices/pic/xml_data/12CE518.xml
@@ -0,0 +1,69 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="12CE518" document="010108" status="NR" alternative="12F629" memory_technology="EPROM" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xEE20" cchecksum="0xDC68" />
+    <checksum protected="040:1FE" bchecksum="0xEDF7" cchecksum="0xD363" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0" end="4" vdd_min="3" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="13"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"     start="0x000" end="0x1FE" />
+  <memory name="calibration" start="0x1FF" end="0x1FF" cal_opmask="0xF00" cal_opcode="0xC00" />
+  <memory name="user_ids"    start="0x200" end="0x203" rmask="0x00F"      />
+  <memory name="config"      start="0xFFF" end="0xFFF" />
+  <memory name="eeprom"      start="0x000" end="0x00F" rmask="0xFF" hexfile_offset="?" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x01F" bvalue="0x01F" >
+    <mask name="FOSC"  value="0x003" >
+      <value value="0x000" name="LP"    cname="_LP_OSC"    />
+      <value value="0x001" name="XT"    cname="_XT_OSC"    />
+      <value value="0x002" name="INTRC" cname="_IntRC_OSC" />
+      <value value="0x003" name="EXTRC" cname="_ExtRC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"    value="0x008" >
+      <value value="0x000" name="040:1FE" cname="_CP_ON"  />
+      <value value="0x008" name="Off"     cname="_CP_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x010" >
+      <value value="0x000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x010" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="8" >
+    <pin index="1" name="VDD"            />
+    <pin index="2" name="GP5/OSC1/CLKIN" />
+    <pin index="3" name="GP4/OSC2"       />
+    <pin index="4" name="GP3/MCLR/VPP"   />
+    <pin index="5" name="GP2/T0CKI"      />
+    <pin index="6" name="GP1"            />
+    <pin index="7" name="GP0"            />
+    <pin index="8" name="VSS"            />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/12CE519.xml b/src/devices/pic/xml_data/12CE519.xml
new file mode 100644
index 0000000..210e186
--- /dev/null
+++ b/src/devices/pic/xml_data/12CE519.xml
@@ -0,0 +1,69 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="12CE519" document="010109" status="NR" alternative="12F629" memory_technology="EPROM" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xEC20" cchecksum="0xDA68" />
+    <checksum protected="040:3FE" bchecksum="0xEBF7" cchecksum="0xD163" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0" end="4" vdd_min="3" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="13"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"     start="0x000" end="0x3FE" />
+  <memory name="calibration" start="0x3FF" end="0x3FF" cal_opmask="0xF00" cal_opcode="0xC00" />
+  <memory name="user_ids"    start="0x400" end="0x403" rmask="0x00F"      />
+  <memory name="config"      start="0xFFF" end="0xFFF" />
+  <memory name="eeprom"      start="0x000" end="0x00F" rmask="0xFF" hexfile_offset="?" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x01F" bvalue="0x01F" >
+    <mask name="FOSC"  value="0x003" >
+      <value value="0x000" name="LP"    cname="_LP_OSC"    />
+      <value value="0x001" name="XT"    cname="_XT_OSC"    />
+      <value value="0x002" name="INTRC" cname="_IntRC_OSC" />
+      <value value="0x003" name="EXTRC" cname="_ExtRC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"    value="0x008" >
+      <value value="0x000" name="040:3FE" cname="_CP_ON"  />
+      <value value="0x008" name="Off"     cname="_CP_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x010" >
+      <value value="0x000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x010" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="8" >
+    <pin index="1" name="VDD"            />
+    <pin index="2" name="GP5/OSC1/CLKIN" />
+    <pin index="3" name="GP4/OSC2"       />
+    <pin index="4" name="GP3/MCLR/VPP"   />
+    <pin index="5" name="GP2/T0CKI"      />
+    <pin index="6" name="GP1"            />
+    <pin index="7" name="GP0"            />
+    <pin index="8" name="VSS"            />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/12CE673.xml b/src/devices/pic/xml_data/12CE673.xml
new file mode 100644
index 0000000..3007c29
--- /dev/null
+++ b/src/devices/pic/xml_data/12CE673.xml
@@ -0,0 +1,86 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="12CE673" document="010110" status="NR" alternative="12F675" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xFC00" cchecksum="0xC7CE" />
+    <checksum protected="200:3FE" bchecksum="0x0FBF" cchecksum="0xC174" />
+    <checksum protected="All"     bchecksum="0xFC9F" cchecksum="0xC86D" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0" end="10" vdd_min="3" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="commercial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"     start="0x0000" end="0x03FE" />
+  <memory name="calibration" start="0x03FF" end="0x03FF" cal_opmask="0x3C00" cal_opcode="0x3400" />
+  <memory name="user_ids"    start="0x2000" end="0x2003" rmask="0x000F"      />
+  <memory name="config"      start="0x2007" end="0x2007" />
+  <memory name="eeprom"      start="0x0000" end="0x000F" hexfile_offset="?" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3FFF" icnames="_CP_50" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="invalid" />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTRC_OSC" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRC_OSC" />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0080" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0080" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F60" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1520" name="200:3FE" cname="_CP_75"  />
+      <value value="default" name="Off"     cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="8" >
+    <pin index="1" name="VDD"                 />
+    <pin index="2" name="GP5/OSC1/CLKIN"      />
+    <pin index="3" name="GP4/OSC2/AN3/CLKOUT" />
+    <pin index="4" name="GP3/MCLR/VPP"        />
+    <pin index="5" name="GP2/T0CKI/AN2/INT"   />
+    <pin index="6" name="GP1/AN1/VREF"        />
+    <pin index="7" name="GP0/AN0"             />
+    <pin index="8" name="VSS"                 />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/12CE674.xml b/src/devices/pic/xml_data/12CE674.xml
new file mode 100644
index 0000000..7670f3f
--- /dev/null
+++ b/src/devices/pic/xml_data/12CE674.xml
@@ -0,0 +1,88 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="12CE674" document="010111" status="NR" alternative="12F683" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xF800" cchecksum="0xC3CE" />
+    <checksum protected="400:7FE" bchecksum="0x1EDF" cchecksum="0xD094" />
+    <checksum protected="200:7FE" bchecksum="0x0BBF" cchecksum="0xBD74" />
+    <checksum protected="All"     bchecksum="0xF89F" cchecksum="0xC46D" />
+  </checksums>
+
+  <!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0" end="10" vdd_min="3" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="commercial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"     start="0x0000" end="0x07FE" />
+  <memory name="calibration" start="0x07FF" end="0x07FF" cal_opmask="0x3C00" cal_opcode="0x3400" />
+  <memory name="user_ids"    start="0x2000" end="0x2003" rmask="0x000F"      />
+  <memory name="config"      start="0x2007" end="0x2007" />
+  <memory name="eeprom"      start="0x0000" end="0x000F" hexfile_offset="?" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="invalid" />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTRC_OSC" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRC_OSC" />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0080" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0080" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F60" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1520" name="200:7FE" cname="_CP_75"  />
+      <value value="0x2A40" name="400:7FE" cname="_CP_50"  />
+      <value value="default" name="Off"     cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="8" >
+    <pin index="1" name="VDD"                 />
+    <pin index="2" name="GP5/OSC1/CLKIN"      />
+    <pin index="3" name="GP4/OSC2/AN3/CLKOUT" />
+    <pin index="4" name="GP3/MCLR/VPP"        />
+    <pin index="5" name="GP2/T0CKI/AN2/INT"   />
+    <pin index="6" name="GP1/AN1/VREF"        />
+    <pin index="7" name="GP0/AN0"             />
+    <pin index="8" name="VSS"                 />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/12CR509A.xml b/src/devices/pic/xml_data/12CR509A.xml
new file mode 100644
index 0000000..9a795da
--- /dev/null
+++ b/src/devices/pic/xml_data/12CR509A.xml
@@ -0,0 +1,68 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="12CR509A" document="010112" status="NR" alternative="12F509" memory_technology="ROM" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xEC20" cchecksum="0xDA68" />
+    <checksum protected="040:3FE" bchecksum="0xEBF7" cchecksum="0xD163" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0" end="4" vdd_min="3" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="13"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"     start="0x000" end="0x3FE" />
+  <memory name="calibration" start="0x3FF" end="0x3FF" cal_opmask="0xF00" cal_opcode="0xC00" />
+  <memory name="user_ids"    start="0x400" end="0x403" rmask="0x00F"      />
+  <memory name="config"      start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x01F" bvalue="0x01F" >
+    <mask name="FOSC"  value="0x003" >
+      <value value="0x000" name="LP"    cname="_LP_OSC"    />
+      <value value="0x001" name="XT"    cname="_XT_OSC"    />
+      <value value="0x002" name="INTRC" cname="_IntRC_OSC" />
+      <value value="0x003" name="EXTRC" cname="_ExtRC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"    value="0x008" >
+      <value value="0x000" name="040:3FE" cname="_CP_ON"  />
+      <value value="0x008" name="Off"     cname="_CP_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x010" >
+      <value value="0x000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x010" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="8" >
+    <pin index="1" name="VDD"            />
+    <pin index="2" name="GP5/OSC1/CLKIN" />
+    <pin index="3" name="GP4/OSC2"       />
+    <pin index="4" name="GP3/MCLR/VPP"   />
+    <pin index="5" name="GP2/T0CKI"      />
+    <pin index="6" name="GP1"            />
+    <pin index="7" name="GP0"            />
+    <pin index="8" name="VSS"            />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/12F508.xml b/src/devices/pic/xml_data/12F508.xml
new file mode 100644
index 0000000..19fd956
--- /dev/null
+++ b/src/devices/pic/xml_data/12F508.xml
@@ -0,0 +1,71 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="12F508" document="020094" status="IP" memory_technology="FLASH" architecture="10X" pc="12"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xEE20" cchecksum="0xDC68" />
+    <checksum protected="040:1FE" bchecksum="0xEDF7" cchecksum="0xD363" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.5"  max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"            start="0x000" end="0x1FE" />
+  <memory name="calibration"        start="0x1FF" end="0x1FF" cal_opmask="0xF00"     cal_opcode="0xC00" />
+  <memory name="user_ids"           start="0x200" end="0x203" rmask="0x00F"          />
+  <memory name="config"             start="0x3FF" end="0x3FF" hexfile_offset="0xFFF" />
+  <memory name="calibration_backup" start="0x204" end="0x204" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x01F" bvalue="0x01F" >
+    <mask name="FOSC"  value="0x003" >
+      <value value="0x000" name="LP"    cname="_LP_OSC"    />
+      <value value="0x001" name="XT"    cname="_XT_OSC"    />
+      <value value="0x002" name="INTRC" cname="_IntRC_OSC" />
+      <value value="0x003" name="EXTRC" cname="_ExtRC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"    value="0x008" >
+      <value value="0x000" name="040:1FE" cname="_CP_ON"  />
+      <value value="0x008" name="Off"     cname="_CP_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x010" >
+      <value value="0x000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x010" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic msop" nb_pins="8" >
+    <pin index="1" name="VDD"            />
+    <pin index="2" name="GP5/OSC1/CLKIN" />
+    <pin index="3" name="GP4/OSC2"       />
+    <pin index="4" name="GP3/MCLR/VPP"   />
+    <pin index="5" name="GP2/T0CKI"      />
+    <pin index="6" name="GP1/ICSPCLK"    />
+    <pin index="7" name="GP0/ICSPDAT"    />
+    <pin index="8" name="VSS"            />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/12F509.xml b/src/devices/pic/xml_data/12F509.xml
new file mode 100644
index 0000000..8f3ae12
--- /dev/null
+++ b/src/devices/pic/xml_data/12F509.xml
@@ -0,0 +1,71 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="12F509" document="020095" status="IP" memory_technology="FLASH" architecture="10X" pc="12"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xEC20" cchecksum="0xDA68" />
+    <checksum protected="040:3FE" bchecksum="0xEBF7" cchecksum="0xD163" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.5"  max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"            start="0x000" end="0x3FE" />
+  <memory name="calibration"        start="0x3FF" end="0x3FF" cal_opmask="0xF00"     cal_opcode="0xC00" />
+  <memory name="user_ids"           start="0x400" end="0x403" rmask="0x00F"          />
+  <memory name="config"             start="0x7FF" end="0x7FF" hexfile_offset="0xFFF" />
+  <memory name="calibration_backup" start="0x404" end="0x404" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x01F" bvalue="0x01F" >
+    <mask name="FOSC"  value="0x003" >
+      <value value="0x000" name="LP"    cname="_LP_OSC"    />
+      <value value="0x001" name="XT"    cname="_XT_OSC"    />
+      <value value="0x002" name="INTRC" cname="_IntRC_OSC" />
+      <value value="0x003" name="EXTRC" cname="_ExtRC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"    value="0x008" >
+      <value value="0x000" name="040:3FE" cname="_CP_ON"  />
+      <value value="0x008" name="Off"     cname="_CP_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x010" >
+      <value value="0x000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x010" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic msop" nb_pins="8" >
+    <pin index="1" name="VDD"            />
+    <pin index="2" name="GP5/OSC1/CLKIN" />
+    <pin index="3" name="GP4/OSC2"       />
+    <pin index="4" name="GP3/MCLR/VPP"   />
+    <pin index="5" name="GP2/T0CKI"      />
+    <pin index="6" name="GP1/ICSPCLK"    />
+    <pin index="7" name="GP0/ICSPDAT"    />
+    <pin index="8" name="VSS"            />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/12F510.xml b/src/devices/pic/xml_data/12F510.xml
new file mode 100644
index 0000000..15a2d81
--- /dev/null
+++ b/src/devices/pic/xml_data/12F510.xml
@@ -0,0 +1,74 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="12F510" document="023670" status="IP" memory_technology="FLASH" architecture="10X" pc="10"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xEC40" cchecksum="0xDA88" />
+    <checksum protected="040:3FE" bchecksum="0xEC37" cchecksum="0xD1A3" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0" end="4" vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4" end="8" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.5"  max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"            start="0x000" end="0x3FE" />
+  <memory name="calibration"        start="0x3FF" end="0x3FF" cal_opmask="0xF00"     cal_opcode="0xC00" />
+  <memory name="user_ids"           start="0x400" end="0x403" rmask="0x00F"          />
+  <memory name="config"             start="0x7FF" end="0x7FF" hexfile_offset="0xFFF" />
+  <memory name="calibration_backup" start="0x404" end="0x404" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFF" bvalue="0x03F" >
+    <mask name="FOSC"   value="0x003" >
+      <value value="0x000" name="LP"    cname="_LP_OSC"    />
+      <value value="0x001" name="XT"    cname="_XT_OSC"    />
+      <value value="0x002" name="INTRC" cname="_IntRC_OSC" />
+      <value value="0x003" name="EXTRC" cname="_ExtRC_OSC" />
+    </mask>
+    <mask name="WDT"    value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"     value="0x008" >
+      <value value="0x000" name="040:3FE" cname="_CP_ON"  />
+      <value value="0x008" name="Off"     cname="_CP_OFF" />
+    </mask>
+    <mask name="MCLRE"  value="0x010" >
+      <value value="0x000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x010" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="IOSCFS" value="0x020" >
+      <value value="0x000" name="4MHZ" cname="_IOSCFS_OFF" />
+      <value value="0x020" name="8MHZ" cname="_IOSCFS_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic msop" nb_pins="8" >
+    <pin index="1" name="VDD"                   />
+    <pin index="2" name="GP5/OSC1/CLKIN"        />
+    <pin index="3" name="GP4/OSC2"              />
+    <pin index="4" name="GP3/MCLR/VPP"          />
+    <pin index="5" name="GP2/AN2/T0CKI/C1OUT"   />
+    <pin index="6" name="GP1/AN1/C1IN-/ICSPCLK" />
+    <pin index="7" name="GP0/AN0/C1IN+/ICSPDAT" />
+    <pin index="8" name="VSS"                   />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/12F519.xml b/src/devices/pic/xml_data/12F519.xml
new file mode 100644
index 0000000..600618c
--- /dev/null
+++ b/src/devices/pic/xml_data/12F519.xml
@@ -0,0 +1,82 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="12F519" status="IP" memory_technology="FLASH" architecture="10X" pc="11"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+  <!--* Documents ************************************************************-->
+  <documents webpage="530188" datasheet="41319" progsheet="41316" erratas="" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"                      bchecksum="0xEC80" cchecksum="0xDAC8" />
+    <checksum protected="040:3FE" mprotected="CPD" bchecksum="0xEC77" cchecksum="0xD1E3" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="5.5" />
+    <frequency start="4" end="8" vdd_min="3.0" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.5"  max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"               start="0x000" end="0x3FE" />
+  <memory name="calibration"        start="0x3FF" end="0x3FF" cal_opmask="0xF00"     cal_opcode="0xC00" />
+  <memory name="eeprom"             start="0x400" end="0x43F" />
+  <memory name="user_ids"           start="0x440" end="0x443" rmask="0x00F"          />
+  <memory name="config"             start="0x7FF" end="0x7FF" hexfile_offset="0xFFF" />
+  <memory name="calibration_backup" start="0x444" end="0x444" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFF" bvalue="0x07F" >
+    <mask name="FOSC"   value="0x003" >
+      <value value="0x000" name="LP"    cname="_LP_OSC"    />
+      <value value="0x001" name="XT"    cname="_XT_OSC"    />
+      <value value="0x002" name="INTRC" cname="_IntRC_OSC" />
+      <value value="0x003" name="EXTRC" cname="_ExtRC_OSC" />
+    </mask>
+    <mask name="WDT"    value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"     value="0x008" >
+      <value value="0x000" name="040:3FE" cname="_CP_ON"  />
+      <value value="0x008" name="Off"     cname="_CP_OFF" />
+    </mask>
+    <mask name="MCLRE"  value="0x010" >
+      <value value="0x000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x010" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="IOSCFS" value="0x020" >
+      <value value="0x000" name="4MHZ" cname="_IOSCFS_OFF" />
+      <value value="0x020" name="8MHZ" cname="_IOSCFS_ON"  />
+    </mask>
+    <mask name="CPD"    value="0x040" >
+      <value value="0x000" name="All" cname="_CPDF_ON"  />
+      <value value="0x040" name="Off" cname="_CPDF_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic msop dfn" nb_pins="8" >
+    <pin index="1" name="VDD"                   />
+    <pin index="2" name="GP5/OSC1/CLKIN"        />
+    <pin index="3" name="GP4/OSC2"              />
+    <pin index="4" name="GP3/MCLR/VPP"          />
+    <pin index="5" name="GP2/T0CKI"             />
+    <pin index="6" name="GP1/ICSPCLK"           />
+    <pin index="7" name="GP0/ICSPDAT"           />
+    <pin index="8" name="VSS"                   />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/12F609.xml b/src/devices/pic/xml_data/12F609.xml
new file mode 100644
index 0000000..d3409ee
--- /dev/null
+++ b/src/devices/pic/xml_data/12F609.xml
@@ -0,0 +1,99 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="12F609" status="IP" memory_technology="FLASH" self_write="no" self_write="no" architecture="16X" id="0x2240" id_high_voltage="0x2280"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="028259" datasheet="41302" progsheet="41284" erratas="80294" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xFFFF" cchecksum="0xCBCD" />
+    <checksum protected="All" bchecksum="0x03BE" cchecksum="0xCF8C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="8"  vdd_min="2.0" vdd_max="5.5" />
+    <frequency start="8"  end="10" vdd_min="3.0" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <frequency_range name="extended" special="high_voltage" >
+    <frequency start="0"  end="8"  vdd_min="2.0" vdd_max="5.0" />
+    <frequency start="8"  end="10" vdd_min="3.0" vdd_max="5.0" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.0" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13"  nominal="11.5" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"    />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"    />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x03FF" />
+  <memory name="calibration"  start="0x2008" end="0x2008" cal_opmask="0x0000" cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"      />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x03FF" >
+    <mask name="FOSC"   value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"    value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE"  value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE"  value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"     value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="IOSCFS" value="0x0080" >
+      <value value="0x0000" name="4MHZ" cname="_IOSCFS_4MHZ" />
+      <value value="0x0080" name="8MHZ" cname="_IOSCFS_8MHZ" />
+    </mask>
+    <mask name="BODEN"  value="0x0300" >
+      <value value="default" name="Off"    cname="_BOR_OFF"    />
+      <value value="0x0200"  name="On_run" cname="_BOR_NSLEEP" />
+      <value value="0x0300"  name="On"     cname="_BOR_ON"     />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic dfns tssop" nb_pins="8" >
+    <pin index="1" name="VDD" />
+    <pin index="2" name="GP5/OSC1/T1CKI/CLKIN" />
+    <pin index="3" name="GP4/OSC2/C1IN-/T1G/CLKOUT" />
+    <pin index="4" name="GP3/MCLR/VPP" />
+    <pin index="5" name="GP2/T0CKI/INT/COUT" />
+    <pin index="6" name="GP1/C0IN-/CLK" />
+    <pin index="7" name="GP0/CIN+/DAT" />
+    <pin index="8" name="VSS" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/12F615.xml b/src/devices/pic/xml_data/12F615.xml
new file mode 100644
index 0000000..d59445e
--- /dev/null
+++ b/src/devices/pic/xml_data/12F615.xml
@@ -0,0 +1,99 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="12F615" status="IP" memory_technology="FLASH" self_write="no" self_write="no" architecture="16X" id="0x2180" id_high_voltage="0x21A0"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="027148" datasheet="41302" progsheet="41284" erratas="80294" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xFFFF" cchecksum="0xCBCD" />
+    <checksum protected="All" bchecksum="0x03BE" cchecksum="0xCF8C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <frequency_range name="extended" special="high_voltage">
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.0" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.0" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.0" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13"  nominal="11.5" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"    />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"    />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x03FF" />
+  <memory name="calibration"  start="0x2008" end="0x2008" cal_opmask="0x0000" cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"      />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x03FF" >
+    <mask name="FOSC"   value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"    value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE"  value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE"  value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"     value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="IOSCFS" value="0x0080" >
+      <value value="0x0000" name="4MHZ" cname="_IOSCFS_4MHZ" />
+      <value value="0x0080" name="8MHZ" cname="_IOSCFS_8MHZ" />
+    </mask>
+    <mask name="BODEN"  value="0x0300" >
+      <value value="default" name="Off"    cname="_BOR_OFF"    />
+      <value value="0x0200" name="On_run" cname="_BOR_NSLEEP" />
+      <value value="0x0300" name="On"     cname="_BOR_ON"     />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic dfns tssop" nb_pins="8" >
+    <pin index="1" name="VDD" />
+    <pin index="2" name="GP5/OSC1/T1CKI/CLKIN" />
+    <pin index="3" name="GP4/OSC2/AN3/C1IN-/T1G/CLKOUT" />
+    <pin index="4" name="GP3/MCLR/VPP" />
+    <pin index="5" name="GP2/AN2/T0CKI/INT/COUT/CCP1/P1A" />
+    <pin index="6" name="GP1/AN1/C0IN-/VREF/CLK" />
+    <pin index="7" name="GP0/AN0/CIN+/P1B/DAT" />
+    <pin index="8" name="VSS" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/12F629.xml b/src/devices/pic/xml_data/12F629.xml
new file mode 100644
index 0000000..53c0cf4
--- /dev/null
+++ b/src/devices/pic/xml_data/12F629.xml
@@ -0,0 +1,102 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="12F629" document="010113" status="IP" memory_technology="FLASH" self_write="no" self_write="no" architecture="16X" id="0x0F80"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xBE00" cchecksum="0x89CE" />
+    <checksum protected="All" bchecksum="0xBF7F" cchecksum="0x8B4D" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" special="AD off" />
+    <frequency start="0"  end="4"  vdd_min="2.2" vdd_max="5.5" special="AD on"  />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" special="AD off" />
+    <frequency start="0"  end="4"  vdd_min="2.5" vdd_max="5.5" special="AD on"  />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.5"   max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x03FE" />
+  <memory name="calibration"  start="0x03FF" end="0x03FF" cal_opmask="0x3C00"     cal_opcode="0x3400" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x007F" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x31FF" bvalue="0x31FF" pmask="0x3000" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC"           cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0080" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0080" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0100" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0100" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BG"    value="0x3000">
+      <value value="0x0000" name="Lowest"   />
+      <value value="0x1000" name="Mid/Low"  />
+      <value value="0x2000" name="Mid/High" />
+      <value value="0x3000" name="Highest"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic dfns" nb_pins="8" >
+    <pin index="1" name="VDD"                  />
+    <pin index="2" name="GP5/T1CKI/OSC1/CLKIN" />
+    <pin index="3" name="GP4/T1G/OSC2/CLKOUT"  />
+    <pin index="4" name="GP3/MCLR/VPP"         />
+    <pin index="5" name="GP2/T0CKI/INT/COUT"   />
+    <pin index="6" name="GP1/CIN-/ICSPCLK"     />
+    <pin index="7" name="GP0/CIN+/ICSPDAT"     />
+    <pin index="8" name="VSS"                  />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/12F635.xml b/src/devices/pic/xml_data/12F635.xml
new file mode 100644
index 0000000..f06c3b6
--- /dev/null
+++ b/src/devices/pic/xml_data/12F635.xml
@@ -0,0 +1,104 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="12F635" document="019829" status="IP" memory_technology="FLASH" self_write="no" self_write="no" architecture="16X" id="0x0FA0"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x1BFF" cchecksum="0xE7CD" />
+    <checksum protected="All" bchecksum="0x3BBE" cchecksum="0x078C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13"  nominal="11.5" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"    />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"    />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x03FF" />
+  <memory name="calibration"  start="0x2008" end="0x2009" cal_opmask="0x0000"     cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x007F" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x1FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0080" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0300" >
+      <value value="0x0000" name="Off"      cname="_BOD_OFF"    />
+      <value value="0x0100" name="Software" cname="_BOD_SBODEN" />
+      <value value="0x0200" name="On_run"   cname="_BOD_NSLEEP" />
+      <value value="0x0300" name="On"       cname="_BOD_ON"     />
+    </mask>
+    <mask name="IESO"  value="0x0400" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0400" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="FCMEN" value="0x0800" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0800" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="WUREN" value="0x1000" >
+      <value value="0x0000" name="On"  cname="_WUREN_ON"  />
+      <value value="0x1000" name="Off" cname="_WUREN_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic dfns" nb_pins="8" >
+    <pin index="1" name="VDD"                    />
+    <pin index="2" name="GP5/T1CKI/OSC1/CLKIN"   />
+    <pin index="3" name="GP4/T1G/OSC2/CLKOUT"    />
+    <pin index="4" name="GP3/MCLR/VPP"           />
+    <pin index="5" name="GP2/T0CKI/INT/COUT"     />
+    <pin index="6" name="GP1/CIN-/ICSPCLK"       />
+    <pin index="7" name="GP0/CIN+/ICSPDAT/ULPWU" />
+    <pin index="8" name="VSS"                    />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/12F675.xml b/src/devices/pic/xml_data/12F675.xml
new file mode 100644
index 0000000..6e0f054
--- /dev/null
+++ b/src/devices/pic/xml_data/12F675.xml
@@ -0,0 +1,102 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="12F675" document="010114" status="IP" memory_technology="FLASH" self_write="no" self_write="no" architecture="16X" id="0x0FC0"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xBE00" cchecksum="0x89CE" />
+    <checksum protected="All" bchecksum="0xBF7F" cchecksum="0x8B4D" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" special="AD off" />
+    <frequency start="0"  end="4"  vdd_min="2.2" vdd_max="5.5" special="AD on"  />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" special="AD off" />
+    <frequency start="0"  end="4"  vdd_min="2.5" vdd_max="5.5" special="AD on"  />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.5"   max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x03FE" />
+  <memory name="calibration"  start="0x03FF" end="0x03FF" cal_opmask="0x3C00"     cal_opcode="0x3400" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x007F" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x31FF" bvalue="0x31FF" pmask="0x3000" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC"           cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0080" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0080" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0100" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0100" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BG"    value="0x3000">
+      <value value="0x0000" name="Lowest"   />
+      <value value="0x1000" name="Mid/Low"  />
+      <value value="0x2000" name="Mid/High" />
+      <value value="0x3000" name="Highest"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic dfns" nb_pins="8" >
+    <pin index="1" name="VDD"                       />
+    <pin index="2" name="GP5/T1CKI/OSC1/CLKIN"      />
+    <pin index="3" name="GP4/AN3/T1G/OSC2/CLKOUT"   />
+    <pin index="4" name="GP3/MCLR/VPP"              />
+    <pin index="5" name="GP2/AN2/T0CKI/INT/COUT"    />
+    <pin index="6" name="GP1/AN1/CIN-/VREF/ICSPCLK" />
+    <pin index="7" name="GP0/AN0/CIN+/ICSPDAT"      />
+    <pin index="8" name="VSS"                       />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/12F683.xml b/src/devices/pic/xml_data/12F683.xml
new file mode 100644
index 0000000..1c23260
--- /dev/null
+++ b/src/devices/pic/xml_data/12F683.xml
@@ -0,0 +1,100 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="12F683" document="010115" status="IP" memory_technology="FLASH" self_write="no" self_write="no" architecture="16X" id="0x0460"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x07FF" cchecksum="0xD3CD" />
+    <checksum protected="All" bchecksum="0x17BE" cchecksum="0xE38C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13"  nominal="11.5" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"    />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"    />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x07FF" />
+  <memory name="calibration"  start="0x2008" end="0x2008" cal_opmask="0x0000"     cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x0FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0080" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0300" >
+      <value value="0x0000" name="Off"      cname="_BOD_OFF"    />
+      <value value="0x0100" name="Software" cname="_BOD_SBODEN" />
+      <value value="0x0200" name="On_run"   cname="_BOD_NSLEEP" />
+      <value value="0x0300" name="On"       cname="_BOD_ON"     />
+    </mask>
+    <mask name="IESO"  value="0x0400" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0400" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="FCMEN" value="0x0800" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0800" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic dfn dfns" nb_pins="8" >
+    <pin index="1" name="VDD"                         />
+    <pin index="2" name="GP5/T1CKI/OSC1/CLKIN"        />
+    <pin index="3" name="GP4/AN3/T1G/OSC2/CLKOUT"     />
+    <pin index="4" name="GP3/MCLR/VPP"                />
+    <pin index="5" name="GP2/AN2/T0CKI/INT/COUT/CCP1" />
+    <pin index="6" name="GP1/AN1/C1IN-/VREF/ICSPCLK"  />
+    <pin index="7" name="GP0/AN0/C1IN+/ICSPDAT/ULPWU" />
+    <pin index="8" name="VSS"                         />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/14000.xml b/src/devices/pic/xml_data/14000.xml
new file mode 100644
index 0000000..8cf2db6
--- /dev/null
+++ b/src/devices/pic/xml_data/14000.xml
@@ -0,0 +1,99 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="14000" document="010116" status="IP" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"                  bchecksum="0x2FFD" cchecksum="0xFBCB" />
+    <checksum protected="All" mprotected="CPC" bchecksum="0x300A" cchecksum="0xFBD8" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"  vdd_min="2.7" vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"     start="0x0000" end="0x0FBF" />
+  <memory name="calibration" start="0x0FC0" end="0x0FFF" cal_opmask="0x0000" cal_opcode="0x0000" />
+  <memory name="user_ids"    start="0x2000" end="0x2003" rmask="0x007F"      />
+  <memory name="config"      start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3FBD" pmask="0x0042" >
+    <mask name="FOSC"  value="0x0001" >
+      <value value="0x0000" name="HS"    cname="_FOSC_HS" />
+      <value value="0x0001" name="INTRC" cname="_FOSC_RC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="TRIM" value="0x0042" >
+      <value value="0x0000" name="00" />
+      <value value="0x0002" name="01" />
+      <value value="0x0040" name="10" />
+      <value value="0x0042" name="11" />
+    </mask>
+    <mask name="CP"    value="0x1E30" >
+      <value value="0x0000"  name="All" cname="_CPP_ON _CPU_ON"   />
+      <value value="0x1E30"  name="Off" cname="_CPP_OFF _CPU_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+    <mask name="CPC"   value="0x2180" >
+      <value value="0x0000"  name="All" cname="_CPC_ON"  />
+      <value value="0x2180"  name="Off" cname="_CPC_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C432.xml b/src/devices/pic/xml_data/16C432.xml
new file mode 100644
index 0000000..e112d5c
--- /dev/null
+++ b/src/devices/pic/xml_data/16C432.xml
@@ -0,0 +1,88 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C432" document="010117" status="IP" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x377F" cchecksum="0x034D" />
+    <checksum protected="400:7FF" bchecksum="0x5DEE" cchecksum="0x0FA3" />
+    <checksum protected="200:7FF" bchecksum="0x4ADE" cchecksum="0xFC93" />
+    <checksum protected="All"     bchecksum="0x37CE" cchecksum="0x039C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x07FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="200:7FF" cname="_CP_75"  />
+      <value value="0x2A20" name="400:7FF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip ssop" nb_pins="20" >
+    <pin index="1"  name="LIN"          />
+    <pin index="2"  name="RA2/AN2/VREF" />
+    <pin index="3"  name="RA3/AN3"      />
+    <pin index="4"  name="RA4/T0CKI"    />
+    <pin index="5"  name="MCLR/VPP"     />
+    <pin index="6"  name="VSS"          />
+    <pin index="7"  name="RB0/INT"      />
+    <pin index="8"  name="RB1"          />
+    <pin index="9"  name="RB2"          />
+    <pin index="10" name="RB3"          />
+    <pin index="11" name="RB4"          />
+    <pin index="12" name="RB5"          />
+    <pin index="13" name="RB6"          />
+    <pin index="14" name="RB7"          />
+    <pin index="15" name="VDD"          />
+    <pin index="16" name="OSC2/CLKOUT"  />
+    <pin index="17" name="OSC1/CLKIN"   />
+    <pin index="18" name="RA0/AN0"      />
+    <pin index="19" name="BACT"         />
+    <pin index="20" name="VBAT"         />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C433.xml b/src/devices/pic/xml_data/16C433.xml
new file mode 100644
index 0000000..cf07aaa
--- /dev/null
+++ b/src/devices/pic/xml_data/16C433.xml
@@ -0,0 +1,91 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C433" document="010118" status="IP" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xF800" cchecksum="0xC3CE" />
+    <checksum protected="400:7FE" bchecksum="0x1EDF" cchecksum="0xD094" />
+    <checksum protected="200:7FE" bchecksum="0x0BBF" cchecksum="0xBD74" />
+    <checksum protected="All"     bchecksum="0xF89F" cchecksum="0xC46D" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="10" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"     start="0x0000" end="0x07FE" />
+  <memory name="calibration" start="0x07FF" end="0x07FF" cal_opmask="0x3C00" cal_opcode="0x3400" />
+  <memory name="user_ids"    start="0x2000" end="0x2003" rmask="0x007F"      />
+  <memory name="config"      start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="invalid" />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTRC_OSC" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRC_OSC" />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0080" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0080" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F60" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1520" name="200:7FE" cname="_CP_75"  />
+      <value value="0x2A40" name="400:7FE" cname="_CP_50"  />
+      <value value="0x3F60" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="LIN"                 />
+    <pin index="2"  name="N/C"                 />
+    <pin index="3"  name="VSS"                 />
+    <pin index="4"  name="VDD"                 />
+    <pin index="5"  name="AVDD"                />
+    <pin index="6"  name="GP5/OSC1/CLKIN"      />
+    <pin index="7"  name="GP4/OSC2/AN3/CLKOUT" />
+    <pin index="8"  name="GP3/MCLR/VPP"        />
+    <pin index="9"  name="N/C"                 />
+    <pin index="10" name="N/C"                 />
+    <pin index="11" name="GP2/T0CKI/AN2/INT"   />
+    <pin index="12" name="GP1/AN1/VREF"        />
+    <pin index="13" name="GP0/AN0"             />
+    <pin index="14" name="VSS"                 />
+    <pin index="15" name="AVSS"                />
+    <pin index="16" name="VSS"                 />
+    <pin index="17" name="BACT"                />
+    <pin index="18" name="VBAT"                />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C505.xml b/src/devices/pic/xml_data/16C505.xml
new file mode 100644
index 0000000..2cbe2c9
--- /dev/null
+++ b/src/devices/pic/xml_data/16C505.xml
@@ -0,0 +1,87 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C505" document="010119" status="NR" alternative="16F505" memory_technology="EPROM" architecture="10X" pc="12"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xFC00" cchecksum="0xEA48" />
+    <checksum protected="040:3FE" bchecksum="0xFBEF" cchecksum="0xE15B" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0"  end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"     start="0x000" end="0x3FE" />
+  <memory name="calibration" start="0x3FF" end="0x3FF" cal_opmask="0xF00" cal_opcode="0xC00" />
+  <memory name="user_ids"    start="0x400" end="0x403" rmask="0x00F"      />
+  <memory name="config"      start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFF" bvalue="0xFFF" >
+    <mask name="FOSC"  value="0x007" >
+      <value value="0x000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x003" name="invalid" />
+      <value value="0x004" name="INTRC_IO"     cname="_IntRC_OSC_RB4EN"    />
+      <value value="0x005" name="INTRC_CLKOUT" cname="_IntRC_OSC_CLKOUTEN" />
+      <value value="0x006" name="EXTRC_IO"     cname="_ExtRC_OSC_RB4EN"    />
+      <value value="0x007" name="EXTRC_CLKOUT" cname="_ExtRC_OSC_CLKOUTEN" />
+    </mask>
+    <mask name="WDT"   value="0x008" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="MCLRE" value="0x020" >
+      <value value="0x000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0xFD0" >
+      <value value="0x000" name="040:3FE" cname="_CP_ON"  />
+      <value value="0xFD0" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="14" >
+    <pin index="1"  name="VDD"             />
+    <pin index="2"  name="RB5/OSC1/CLKIN"  />
+    <pin index="3"  name="RB4/OSC2/CLKOUT" />
+    <pin index="4"  name="RB3/MCLR/VPP"    />
+    <pin index="5"  name="RC5/T0CKI"       />
+    <pin index="6"  name="RC4"             />
+    <pin index="7"  name="RC3"             />
+    <pin index="8"  name="RC2"             />
+    <pin index="9"  name="RC1"             />
+    <pin index="10" name="RC0"             />
+    <pin index="11" name="RB2"             />
+    <pin index="12" name="RB1/ICSPCLK"     />
+    <pin index="13" name="RB0/ICSPDAT"     />
+    <pin index="14" name="VSS"             />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C52.xml b/src/devices/pic/xml_data/16C52.xml
new file mode 100644
index 0000000..6ef7753
--- /dev/null
+++ b/src/devices/pic/xml_data/16C52.xml
@@ -0,0 +1,90 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C52" document="010120" status="EOL" memory_technology="EPROM" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"             bchecksum="0xFE8B" cchecksum="0xECD3" />
+    <checksum protected="All" type="XOR4" bchecksum="0x1683" cchecksum="0x1671" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="3" vdd_max="6.25" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code" start="0x000" end="0x17F" />
+  <memory name="config"  start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x008" bvalue="0x00B" >
+    <mask name="FOSC" value="0x003" >
+      <value value="default" name="invalid" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="CP"   value="0x008" >
+      <value value="0x000" name="All" cname="_CP_ON"  />
+      <value value="0x008" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="T0CKI"       />
+    <pin index="4"  name="MCLR/VPP"    />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0"         />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C54.xml b/src/devices/pic/xml_data/16C54.xml
new file mode 100644
index 0000000..06455ee
--- /dev/null
+++ b/src/devices/pic/xml_data/16C54.xml
@@ -0,0 +1,105 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C54" document="010121" status="NR" alternative="16F54" memory_technology="EPROM" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" constant="0x0FF0" bchecksum="0x0DFF" cchecksum="0xFC47" />
+    <checksum protected="All" type="XOR4"       bchecksum="0x1E07" cchecksum="0x1DF5" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"    vdd_min="3"   vdd_max="6.25" osc="RC" />
+    <frequency start="0" end="4"    vdd_min="3"   vdd_max="6.25" osc="XT" />
+    <frequency start="0" end="20"   vdd_min="4.5" vdd_max="5.5"  osc="HS" />
+    <frequency start="0" end="0.04" vdd_min="2.5" vdd_max="6.25" osc="LP" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"    vdd_min="3.25" vdd_max="6"   osc="RC" />
+    <frequency start="0" end="4"    vdd_min="3.25" vdd_max="6"   osc="XT" />
+    <frequency start="0" end="20"   vdd_min="4.5"  vdd_max="5.5" osc="HS" />
+    <frequency start="0" end="0.04" vdd_min="2.5"  vdd_max="6"   osc="LP" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x1FF" />
+  <memory name="user_ids" start="0x200" end="0x203" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x00C" bvalue="0x00F" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0x008" >
+      <value value="0x000" name="All" cname="_CP_ON"  />
+      <value value="0x008" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="T0CKL"       />
+    <pin index="4"  name="MCLR/VPP"    />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0"         />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="RA2" 		/>
+    <pin index="2"  name="RA3" 		/>
+    <pin index="3"  name="RTCC" 	/>
+    <pin index="4"  name="MCLR/VPP" 	/>
+    <pin index="5"  name="VSS" 		/>
+    <pin index="6"  name="VSS" 		/>
+    <pin index="7"  name="RB0" 		/>
+    <pin index="8"  name="RB1" 		/>
+    <pin index="9"  name="RB2" 		/>
+    <pin index="10" name="RB3" 		/>
+    <pin index="11" name="RB4" 		/>
+    <pin index="12" name="RB5" 		/>
+    <pin index="13" name="RB6" 		/>
+    <pin index="14" name="RB7" 		/>
+    <pin index="15" name="VDD" 		/>
+    <pin index="16" name="VDD" 		/>
+    <pin index="17" name="OSC2/CLKOUT" 	/>
+    <pin index="18" name="OSC1/CLKIN" 	/>
+    <pin index="19" name="RA0" 		/>
+    <pin index="20" name="RA1" 		/>
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C54A.xml b/src/devices/pic/xml_data/16C54A.xml
new file mode 100644
index 0000000..c264f10
--- /dev/null
+++ b/src/devices/pic/xml_data/16C54A.xml
@@ -0,0 +1,115 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C54A" document="010122" status="NR" alternative="16F54" memory_technology="EPROM" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"             bchecksum="0x0DFF" cchecksum="0xFC47" />
+    <checksum protected="All" type="XOR4" bchecksum="0x1E07" cchecksum="0x1DF5" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="6.25" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="6.25" osc="XT" />
+    <frequency start="0" end="20"  vdd_min="4.5" vdd_max="5.5"  osc="HS" />
+    <frequency start="0" end="0.2" vdd_min="3"   vdd_max="6.25" osc="LP" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_voltage" >
+    <frequency start="0" end="4"   vdd_min="2" vdd_max="3.8" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="2" vdd_max="3.8" osc="XT" />
+    <frequency start="0" end="0.2" vdd_min="2" vdd_max="3.8" osc="LP" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3.5" vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"  vdd_min="3.5" vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20" vdd_min="4.5" vdd_max="5.5" osc="HS" />
+  </frequency_range>
+  <frequency_range name="extended"   special="low_power"   >
+    <frequency start="0" end="4"   vdd_min="2.5" vdd_max="6.25" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="2.5" vdd_max="6.25" osc="XT" />
+    <frequency start="0" end="0.2" vdd_min="2.5" vdd_max="6.25" osc="LP" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x1FF" />
+  <memory name="user_ids" start="0x200" end="0x203" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFC" bvalue="0xFFF" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0xFF8" >
+      <value value="0x000" name="All" cname="_CP_ON"  />
+      <value value="0xFF8" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="T0CKI"       />
+    <pin index="4"  name="MCLR/VPP"    />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0"         />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C54B.xml b/src/devices/pic/xml_data/16C54B.xml
new file mode 100644
index 0000000..d20ae0e
--- /dev/null
+++ b/src/devices/pic/xml_data/16C54B.xml
@@ -0,0 +1,110 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C54B" document="010123" status="EOL" memory_technology="EPROM" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x0DFF" cchecksum="0xFC47" />
+    <checksum protected="040:1FF" bchecksum="0x0DC6" cchecksum="0xF332" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20"  vdd_min="4.5" vdd_max="5.5" osc="HS" />
+    <frequency start="0" end="0.2" vdd_min="3"   vdd_max="5.5" osc="LP" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="0.2" vdd_min="2.5" vdd_max="5.5" osc="LP" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20" vdd_min="4.5" vdd_max="5.5" osc="HS" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x1FF" />
+  <memory name="user_ids" start="0x200" end="0x203" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFC" bvalue="0xFFF" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0xFF8" >
+      <value value="0x000" name="040:1FF" cname="_CP_ON"  />
+      <value value="0xFF8" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="T0CKI"       />
+    <pin index="4"  name="MCLR/VPP"    />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0"         />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C54C.xml b/src/devices/pic/xml_data/16C54C.xml
new file mode 100644
index 0000000..0d1907b
--- /dev/null
+++ b/src/devices/pic/xml_data/16C54C.xml
@@ -0,0 +1,110 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C54C" document="010124" status="NR" alternative="16F54" memory_technology="EPROM" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x0DFF" cchecksum="0xFC47" />
+    <checksum protected="040:1FF" bchecksum="0x0DC6" cchecksum="0xF332" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20"  vdd_min="4.5" vdd_max="5.5" osc="HS" />
+    <frequency start="0" end="0.2" vdd_min="3"   vdd_max="5.5" osc="LP" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="0.2" vdd_min="2.5" vdd_max="5.5" osc="LP" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20" vdd_min="4.5" vdd_max="5.5" osc="HS" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x1FF" />
+  <memory name="user_ids" start="0x200" end="0x203" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFC" bvalue="0xFFF" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0xFF8" >
+      <value value="0x000" name="040:1FF" cname="_CP_ON"  />
+      <value value="0xFF8" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="T0CKI"       />
+    <pin index="4"  name="MCLR/VPP"    />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0"         />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C55.xml b/src/devices/pic/xml_data/16C55.xml
new file mode 100644
index 0000000..0d93443
--- /dev/null
+++ b/src/devices/pic/xml_data/16C55.xml
@@ -0,0 +1,123 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C55" document="010125" status="NR" alternative="16C55A" memory_technology="EPROM" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" constant="0x0FF0" bchecksum="0x0DFF" cchecksum="0xFC47" />
+    <checksum protected="All" type="XOR4"       bchecksum="0x1E07" cchecksum="0x1DF5" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"    vdd_min="3"   vdd_max="6.25" osc="RC" />
+    <frequency start="0" end="4"    vdd_min="3"   vdd_max="6.25" osc="XT" />
+    <frequency start="0" end="20"   vdd_min="4.5" vdd_max="5.5"  osc="HS" />
+    <frequency start="0" end="0.04" vdd_min="2.5" vdd_max="6.25" osc="LP" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"    vdd_min="3.25" vdd_max="6"   osc="RC" />
+    <frequency start="0" end="4"    vdd_min="3.25" vdd_max="6"   osc="XT" />
+    <frequency start="0" end="20"   vdd_min="4.5"  vdd_max="5.5" osc="HS" />
+    <frequency start="0" end="0.04" vdd_min="2.5"  vdd_max="6"   osc="LP" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x1FF" />
+  <memory name="user_ids" start="0x200" end="0x203" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x00C" bvalue="0x00F" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0x008" >
+      <value value="0x000" name="All" cname="_CP_ON"  />
+      <value value="0x008" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="T0CKI"       />
+    <pin index="2"  name="VDD"         />
+    <pin index="3"  name="N/C"         />
+    <pin index="4"  name="VSS"         />
+    <pin index="5"  name="N/C"         />
+    <pin index="6"  name="RA0"         />
+    <pin index="7"  name="RA1"         />
+    <pin index="8"  name="RA2"         />
+    <pin index="9"  name="RA3"         />
+    <pin index="10" name="RB0"         />
+    <pin index="11" name="RB1"         />
+    <pin index="12" name="RB2"         />
+    <pin index="13" name="RB3"         />
+    <pin index="14" name="RB4"         />
+    <pin index="15" name="RB5"         />
+    <pin index="16" name="RB6"         />
+    <pin index="17" name="RB7"         />
+    <pin index="18" name="RC0"         />
+    <pin index="19" name="RC1"         />
+    <pin index="20" name="RC2"         />
+    <pin index="21" name="RC3"         />
+    <pin index="22" name="RC4"         />
+    <pin index="23" name="RC5"         />
+    <pin index="24" name="RC6"         />
+    <pin index="25" name="RC7"         />
+    <pin index="26" name="OSC2/CLKOUT" />
+    <pin index="27" name="OSC1/CLKIN"  />
+    <pin index="28" name="MCLR/VPP"    />
+  </package>
+
+  <package types="ssop"      nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C554.xml b/src/devices/pic/xml_data/16C554.xml
new file mode 100644
index 0000000..1723220
--- /dev/null
+++ b/src/devices/pic/xml_data/16C554.xml
@@ -0,0 +1,112 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C554" document="010126" status="IP" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x3D3F" cchecksum="0x090D" />
+    <checksum protected="All" bchecksum="0x3D4E" cchecksum="0x091C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0"  end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4.5" />
+  </frequency_range>
+  <frequency_range name="commercial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.7" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x01FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FBC" bvalue="0x3F3F"  >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x3F30" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="RA4/T0CKI"   />
+    <pin index="4"  name="MCLR/VPP"    />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0/INT"     />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C557.xml b/src/devices/pic/xml_data/16C557.xml
new file mode 100644
index 0000000..3a9ddab
--- /dev/null
+++ b/src/devices/pic/xml_data/16C557.xml
@@ -0,0 +1,137 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C557" status="?" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="?" datasheet="40143" progsheet="30261" erratas="40143e1" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x373F" cchecksum="0x030D" />
+    <checksum protected="400:7FF" bchecksum="0x5D6E" cchecksum="0x0F23" />
+    <checksum protected="200:7FF" bchecksum="0x4A5E" cchecksum="0xFC13" />
+    <checksum protected="All"     bchecksum="0x374E" cchecksum="0x031C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0"  end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4.5" />
+  </frequency_range>
+  <frequency_range name="commercial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.7" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x07FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FBC" bvalue="0x3F3F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="200:7FF" cname="_CP_75"  />
+      <value value="0x2A20" name="400:7FF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="RA4/T0CKI"   />
+    <pin index="2"  name="VDD"         />
+    <pin index="3"  name="N/C"         />
+    <pin index="4"  name="VSS"         />
+    <pin index="5"  name="RA5"         />
+    <pin index="6"  name="RA0"         />
+    <pin index="7"  name="RA1"         />
+    <pin index="8"  name="RA2"         />
+    <pin index="9"  name="RA3"         />
+    <pin index="10" name="RB0/INT"     />
+    <pin index="11" name="RB1"         />
+    <pin index="12" name="RB2"         />
+    <pin index="13" name="RB3"         />
+    <pin index="14" name="RB4"         />
+    <pin index="15" name="RB5"         />
+    <pin index="16" name="RB6"         />
+    <pin index="17" name="RB7"         />
+    <pin index="18" name="RC0"         />
+    <pin index="19" name="RC1"         />
+    <pin index="20" name="RC2"         />
+    <pin index="21" name="RC3"         />
+    <pin index="22" name="RC4"         />
+    <pin index="23" name="RC5"         />
+    <pin index="24" name="RC6"         />
+    <pin index="25" name="RC7"         />
+    <pin index="26" name="OSC2/CLKOUT" />
+    <pin index="27" name="OSC1/CLKIN"  />
+    <pin index="28" name="MCLR/VPP"    />
+  </package>
+
+  <package types="ssop"      nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C558.xml b/src/devices/pic/xml_data/16C558.xml
new file mode 100644
index 0000000..484efee
--- /dev/null
+++ b/src/devices/pic/xml_data/16C558.xml
@@ -0,0 +1,116 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C558" document="010127" status="IP" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x373F" cchecksum="0x030D" />
+    <checksum protected="400:7FF" bchecksum="0x5D6E" cchecksum="0x0F23" />
+    <checksum protected="200:7FF" bchecksum="0x4A5E" cchecksum="0xFC13" />
+    <checksum protected="All"     bchecksum="0x374E" cchecksum="0x031C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0"  end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4.5" />
+  </frequency_range>
+  <frequency_range name="commercial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.7" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x07FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FBC" bvalue="0x3F3F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="200:7FF" cname="_CP_75"  />
+      <value value="0x2A20" name="400:7FF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="RA4/T0CKI"   />
+    <pin index="4"  name="MCLR/VPP"    />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0/INT"     />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C55A.xml b/src/devices/pic/xml_data/16C55A.xml
new file mode 100644
index 0000000..27b9eac
--- /dev/null
+++ b/src/devices/pic/xml_data/16C55A.xml
@@ -0,0 +1,128 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C55A" document="010128" status="IP" memory_technology="EPROM" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x0DFF" cchecksum="0xFC47" />
+    <checksum protected="040:1FF" bchecksum="0x0DC6" cchecksum="0xF332" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20"  vdd_min="4.5" vdd_max="5.5" osc="HS" />
+    <frequency start="0" end="0.2" vdd_min="3"   vdd_max="5.5" osc="LP" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="0.2" vdd_min="2.5" vdd_max="5.5" osc="LP" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20" vdd_min="4.5" vdd_max="5.5" osc="HS" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x1FF" />
+  <memory name="user_ids" start="0x200" end="0x203" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFC" bvalue="0xFFF" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0xFF8" >
+      <value value="0x000" name="040:1FF" cname="_CP_ON"  />
+      <value value="0xFF8" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="T0CKI"       />
+    <pin index="2"  name="VDD"         />
+    <pin index="3"  name="N/C"         />
+    <pin index="4"  name="VSS"         />
+    <pin index="5"  name="N/C"         />
+    <pin index="6"  name="RA0"         />
+    <pin index="7"  name="RA1"         />
+    <pin index="8"  name="RA2"         />
+    <pin index="9"  name="RA3"         />
+    <pin index="10" name="RB0"         />
+    <pin index="11" name="RB1"         />
+    <pin index="12" name="RB2"         />
+    <pin index="13" name="RB3"         />
+    <pin index="14" name="RB4"         />
+    <pin index="15" name="RB5"         />
+    <pin index="16" name="RB6"         />
+    <pin index="17" name="RB7"         />
+    <pin index="18" name="RC0"         />
+    <pin index="19" name="RC1"         />
+    <pin index="20" name="RC2"         />
+    <pin index="21" name="RC3"         />
+    <pin index="22" name="RC4"         />
+    <pin index="23" name="RC5"         />
+    <pin index="24" name="RC6"         />
+    <pin index="25" name="RC7"         />
+    <pin index="26" name="OSC2/CLKOUT" />
+    <pin index="27" name="OSC1/CLKIN"  />
+    <pin index="28" name="MCLR/VPP"    />
+  </package>
+
+  <package types="ssop"      nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C56.xml b/src/devices/pic/xml_data/16C56.xml
new file mode 100644
index 0000000..a8ec195
--- /dev/null
+++ b/src/devices/pic/xml_data/16C56.xml
@@ -0,0 +1,105 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C56" document="010129" status="NR" alternative="16C56A" memory_technology="EPROM" architecture="10X" pc="10"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" constant="0x0FF0" bchecksum="0x0BFF" cchecksum="0xFA47" />
+    <checksum protected="All" type="XOR4"       bchecksum="0x3C07" cchecksum="0x3BF5" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"    vdd_min="3"   vdd_max="6.25" osc="RC" />
+    <frequency start="0" end="4"    vdd_min="3"   vdd_max="6.25" osc="XT" />
+    <frequency start="0" end="20"   vdd_min="4.5" vdd_max="5.5"  osc="HS" />
+    <frequency start="0" end="0.04" vdd_min="2.5" vdd_max="6.25" osc="LP" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"    vdd_min="3.25" vdd_max="6"   osc="RC" />
+    <frequency start="0" end="4"    vdd_min="3.25" vdd_max="6"   osc="XT" />
+    <frequency start="0" end="20"   vdd_min="4.5"  vdd_max="5.5" osc="HS" />
+    <frequency start="0" end="0.04" vdd_min="2.5"  vdd_max="6"   osc="LP" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x3FF" />
+  <memory name="user_ids" start="0x400" end="0x403" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x00C" bvalue="0x00F" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0x008" >
+      <value value="0x000" name="All" cname="_CP_ON"  />
+      <value value="0x008" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="T0CKI"       />
+    <pin index="4"  name="MCLR/VPP"    />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0"         />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C56A.xml b/src/devices/pic/xml_data/16C56A.xml
new file mode 100644
index 0000000..0543765
--- /dev/null
+++ b/src/devices/pic/xml_data/16C56A.xml
@@ -0,0 +1,110 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C56A" document="010130" status="IP" memory_technology="EPROM" architecture="10X" pc="10"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x0BFF" cchecksum="0xFA47" />
+    <checksum protected="040:3FF" bchecksum="0x0BC6" cchecksum="0xF132" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20"  vdd_min="4.5" vdd_max="5.5" osc="HS" />
+    <frequency start="0" end="0.2" vdd_min="3"   vdd_max="5.5" osc="LP" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="0.2" vdd_min="2.5" vdd_max="5.5" osc="LP" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20" vdd_min="4.5" vdd_max="5.5" osc="HS" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x3FF" />
+  <memory name="user_ids" start="0x400" end="0x403" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFC" bvalue="0xFFF" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0xFF8" >
+      <value value="0x000" name="040:3FF" cname="_CP_ON"  />
+      <value value="0xFF8" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="T0CKI"       />
+    <pin index="4"  name="MCLR/VPP"    />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0"         />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C57.xml b/src/devices/pic/xml_data/16C57.xml
new file mode 100644
index 0000000..4aef05a
--- /dev/null
+++ b/src/devices/pic/xml_data/16C57.xml
@@ -0,0 +1,123 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C57" document="010131" status="NR" alternative="16F57" memory_technology="EPROM" architecture="10X" pc="11"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" constant="0x0FF0" bchecksum="0x07FF" cchecksum="0xF647" />
+    <checksum protected="All" type="XOR4"       bchecksum="0x7807" cchecksum="0x77F5" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"    vdd_min="3"   vdd_max="6.25" osc="RC" />
+    <frequency start="0" end="4"    vdd_min="3"   vdd_max="6.25" osc="XT" />
+    <frequency start="0" end="20"   vdd_min="4.5" vdd_max="5.5"  osc="HS" />
+    <frequency start="0" end="0.04" vdd_min="2.5" vdd_max="6.25" osc="LP" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"    vdd_min="3.25" vdd_max="6"   osc="RC" />
+    <frequency start="0" end="4"    vdd_min="3.25" vdd_max="6"   osc="XT" />
+    <frequency start="0" end="20"   vdd_min="4.5"  vdd_max="5.5" osc="HS" />
+    <frequency start="0" end="0.04" vdd_min="2.5"  vdd_max="6"   osc="LP" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x7FF" />
+  <memory name="user_ids" start="0x800" end="0x803" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x00C" bvalue="0x00F" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0x008" >
+      <value value="0x000" name="All" cname="_CP_ON"  />
+      <value value="0x008" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="T0CKI"       />
+    <pin index="2"  name="VDD"         />
+    <pin index="3"  name="N/C"         />
+    <pin index="4"  name="VSS"         />
+    <pin index="5"  name="N/C"         />
+    <pin index="6"  name="RA0"         />
+    <pin index="7"  name="RA1"         />
+    <pin index="8"  name="RA2"         />
+    <pin index="9"  name="RA3"         />
+    <pin index="10" name="RB0"         />
+    <pin index="11" name="RB1"         />
+    <pin index="12" name="RB2"         />
+    <pin index="13" name="RB3"         />
+    <pin index="14" name="RB4"         />
+    <pin index="15" name="RB5"         />
+    <pin index="16" name="RB6"         />
+    <pin index="17" name="RB7"         />
+    <pin index="18" name="RC0"         />
+    <pin index="19" name="RC1"         />
+    <pin index="20" name="RC2"         />
+    <pin index="21" name="RC3"         />
+    <pin index="22" name="RC4"         />
+    <pin index="23" name="RC5"         />
+    <pin index="24" name="RC6"         />
+    <pin index="25" name="RC7"         />
+    <pin index="26" name="OSC2/CLKOUT" />
+    <pin index="27" name="OSC1/CLKIN"  />
+    <pin index="28" name="MCLR/VPP"    />
+  </package>
+
+  <package types="ssop"      nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C57C.xml b/src/devices/pic/xml_data/16C57C.xml
new file mode 100644
index 0000000..4d5f180
--- /dev/null
+++ b/src/devices/pic/xml_data/16C57C.xml
@@ -0,0 +1,128 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C57C" document="010132" status="NR" alternative="16F57" memory_technology="EPROM" architecture="10X" pc="11"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x07FF" cchecksum="0xF647" />
+    <checksum protected="040:7FF" bchecksum="0x07C6" cchecksum="0xED32" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20"  vdd_min="4.5" vdd_max="5.5" osc="HS" />
+    <frequency start="0" end="0.2" vdd_min="3"   vdd_max="5.5" osc="LP" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="0.2" vdd_min="2.5" vdd_max="5.5" osc="LP" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20" vdd_min="4.5" vdd_max="5.5" osc="HS" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x7FF" />
+  <memory name="user_ids" start="0x800" end="0x803" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFC" bvalue="0xFFF" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0xFF8" >
+      <value value="0x000" name="040:7FF" cname="_CP_ON"  />
+      <value value="0xFF8" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="T0CKI"       />
+    <pin index="2"  name="VDD"         />
+    <pin index="3"  name="N/C"         />
+    <pin index="4"  name="VSS"         />
+    <pin index="5"  name="N/C"         />
+    <pin index="6"  name="RA0"         />
+    <pin index="7"  name="RA1"         />
+    <pin index="8"  name="RA2"         />
+    <pin index="9"  name="RA3"         />
+    <pin index="10" name="RB0"         />
+    <pin index="11" name="RB1"         />
+    <pin index="12" name="RB2"         />
+    <pin index="13" name="RB3"         />
+    <pin index="14" name="RB4"         />
+    <pin index="15" name="RB5"         />
+    <pin index="16" name="RB6"         />
+    <pin index="17" name="RB7"         />
+    <pin index="18" name="RC0"         />
+    <pin index="19" name="RC1"         />
+    <pin index="20" name="RC2"         />
+    <pin index="21" name="RC3"         />
+    <pin index="22" name="RC4"         />
+    <pin index="23" name="RC5"         />
+    <pin index="24" name="RC6"         />
+    <pin index="25" name="RC7"         />
+    <pin index="26" name="OSC2/CLKOUT" />
+    <pin index="27" name="OSC1/CLKIN"  />
+    <pin index="28" name="MCLR/VPP"    />
+  </package>
+
+  <package types="ssop"      nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C58A.xml b/src/devices/pic/xml_data/16C58A.xml
new file mode 100644
index 0000000..a12abb6
--- /dev/null
+++ b/src/devices/pic/xml_data/16C58A.xml
@@ -0,0 +1,114 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C58A" document="010133" status="EOL" memory_technology="EPROM" architecture="10X" pc="11"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" constant="0x0FF0" bchecksum="0x07FF" cchecksum="0xF647" />
+    <checksum protected="All" type="XOR4"       bchecksum="0x7807" cchecksum="0x77F5" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="6.25" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="6.25" osc="XT" />
+    <frequency start="0" end="20"  vdd_min="4.5" vdd_max="5.5"  osc="HS" />
+    <frequency start="0" end="0.2" vdd_min="3"   vdd_max="6.25" osc="LP" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_voltage" >
+    <frequency start="0" end="4"   vdd_min="2" vdd_max="3.8" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="2" vdd_max="3.8" osc="XT" />
+    <frequency start="0" end="0.2" vdd_min="2" vdd_max="3.8" osc="LP" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3.5" vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"  vdd_min="3.5" vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20" vdd_min="4.5" vdd_max="5.5" osc="HS" />
+  </frequency_range>
+  <frequency_range name="extended"   special="low_power"   >
+    <frequency start="0" end="4"   vdd_min="2.5" vdd_max="6.25" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="2.5" vdd_max="6.25" osc="XT" />
+    <frequency start="0" end="0.2" vdd_min="2.5" vdd_max="6.25" osc="LP" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x7FF" />
+  <memory name="user_ids" start="0x800" end="0x803" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x00C" bvalue="0x00F" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0x008" >
+      <value value="0x000" name="All" cname="_CP_ON"  />
+      <value value="0x008" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="T0CKI"       />
+    <pin index="4"  name="MCLR/VPP"    />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0"         />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C58B.xml b/src/devices/pic/xml_data/16C58B.xml
new file mode 100644
index 0000000..04f56ce
--- /dev/null
+++ b/src/devices/pic/xml_data/16C58B.xml
@@ -0,0 +1,110 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C58B" document="010134" status="IP" memory_technology="EPROM" architecture="10X" pc="11"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x07FF" cchecksum="0xF647" />
+    <checksum protected="040:7FF" bchecksum="0x07C6" cchecksum="0xED32" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20"  vdd_min="4.5" vdd_max="5.5" osc="HS" />
+    <frequency start="0" end="0.2" vdd_min="3"   vdd_max="5.5" osc="LP" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="0.2" vdd_min="2.5" vdd_max="5.5" osc="LP" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20" vdd_min="4.5" vdd_max="5.5" osc="HS" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x7FF" />
+  <memory name="user_ids" start="0x800" end="0x803" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFC" bvalue="0xFFF" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0xFF8" >
+      <value value="0x000" name="040:7FF" cname="_CP_ON"  />
+      <value value="0xFF8" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="T0CKI"       />
+    <pin index="4"  name="MCLR/VPP"    />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0"         />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C61.xml b/src/devices/pic/xml_data/16C61.xml
new file mode 100644
index 0000000..0b62c88
--- /dev/null
+++ b/src/devices/pic/xml_data/16C61.xml
@@ -0,0 +1,84 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C61" status="EOL" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="?" datasheet="30234" progsheet="30228" erratas="80132" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" constant="0x3FE0" bchecksum="0x3BFF" cchecksum="0x07CD" />
+    <checksum protected="All" type="XNOR7"      bchecksum="0xFC6F" cchecksum="0xFC15" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="3" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x03FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x001F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="Off" cname="_PWRTE_OFF" />
+      <value value="0x0008" name="On"  cname="_PWRTE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0010" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0010" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="RA4/T0CKI"   />
+    <pin index="4"  name="MCLR/VPP"    />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0/INT"     />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C62.xml b/src/devices/pic/xml_data/16C62.xml
new file mode 100644
index 0000000..8eebe47
--- /dev/null
+++ b/src/devices/pic/xml_data/16C62.xml
@@ -0,0 +1,95 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C62" document="010135" status="EOL" alternative="16C62B 16F72" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"                  constant="0x3F80" bchecksum="0x37BF" cchecksum="0x038D" />
+    <checksum protected="400:7FF" type="XNOR7" constant="0x3F80" bchecksum="0x37AF" cchecksum="0x1D69" />
+    <checksum protected="200:7FF" type="XNOR7" constant="0x3F80" bchecksum="0x379F" cchecksum="0x1D59" />
+    <checksum protected="All"     type="XNOR7" constant="0x3F80" bchecksum="0x378F" cchecksum="0x3735" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="3" vdd_max="6" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x07FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x003F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="Off" cname="_PWRTE_OFF" />
+      <value value="0x0008" name="On"  cname="_PWRTE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0030" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x0010" name="200:7FF" cname="_CP_75"  />
+      <value value="0x0020" name="400:7FF" cname="_CP_50"  />
+      <value value="0x0030" name="Off"     cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic ssop" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"        />
+    <pin index="2"  name="RA0"             />
+    <pin index="3"  name="RA1"             />
+    <pin index="4"  name="RA2"             />
+    <pin index="5"  name="RA3"             />
+    <pin index="6"  name="RA4/T0CKI"       />
+    <pin index="7"  name="RA5/SS"          />
+    <pin index="8"  name="VSS"             />
+    <pin index="9"  name="OSC1/CLKIN"      />
+    <pin index="10" name="OSC2/CLKOUT"     />
+    <pin index="11" name="RC0/T1OSI/T1CKI" />
+    <pin index="12" name="RC1/T1OSO"       />
+    <pin index="13" name="RC2/CCP1"        />
+    <pin index="14" name="RC3/SCK/SCL"     />
+    <pin index="15" name="RC4/SDI/SDA"     />
+    <pin index="16" name="RC5/SDO"         />
+    <pin index="17" name="RC6"             />
+    <pin index="18" name="RC7"             />
+    <pin index="19" name="VSS"             />
+    <pin index="20" name="VDD"             />
+    <pin index="21" name="RB0/INT"         />
+    <pin index="22" name="RB1"             />
+    <pin index="23" name="RB2"             />
+    <pin index="24" name="RB3"             />
+    <pin index="25" name="RB4"             />
+    <pin index="26" name="RB5"             />
+    <pin index="27" name="RB6"             />
+    <pin index="28" name="RB7"             />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C620.xml b/src/devices/pic/xml_data/16C620.xml
new file mode 100644
index 0000000..8a676af
--- /dev/null
+++ b/src/devices/pic/xml_data/16C620.xml
@@ -0,0 +1,113 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C620" document="010136" status="NR" alternative="16C620A" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x3D7F" cchecksum="0x094D" />
+    <checksum protected="All" bchecksum="0x3DCE" cchecksum="0x099C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0"  end="10" vdd_min="3"   vdd_max="6" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="6" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="6" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x01FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x3F30" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C620A.xml b/src/devices/pic/xml_data/16C620A.xml
new file mode 100644
index 0000000..9770da4
--- /dev/null
+++ b/src/devices/pic/xml_data/16C620A.xml
@@ -0,0 +1,117 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C620A" document="010137" status="IP" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x3D7F" cchecksum="0x094D" />
+    <checksum protected="All" bchecksum="0x3DCE" cchecksum="0x099C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" vdd_min_end="4.5" />
+    <frequency start="20" end="40" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="commercial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.7" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x01FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x3F30" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C621.xml b/src/devices/pic/xml_data/16C621.xml
new file mode 100644
index 0000000..401ee06
--- /dev/null
+++ b/src/devices/pic/xml_data/16C621.xml
@@ -0,0 +1,115 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C621" document="010138" status="NR" alternative="16C621A" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x3B7F" cchecksum="0x074D" />
+    <checksum protected="200:3FF" bchecksum="0x4EDE" cchecksum="0x0093" />
+    <checksum protected="All"     bchecksum="0x3BCE" cchecksum="0x079C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0"  end="10" vdd_min="3" vdd_max="6" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="6" vdd_min_end="4.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="6" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="6" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x03FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="200:3FF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C621A.xml b/src/devices/pic/xml_data/16C621A.xml
new file mode 100644
index 0000000..97e136e
--- /dev/null
+++ b/src/devices/pic/xml_data/16C621A.xml
@@ -0,0 +1,119 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C621A" document="010139" status="IP" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x3B7F" cchecksum="0x074D" />
+    <checksum protected="200:3FF" bchecksum="0x4EDE" cchecksum="0x0093" />
+    <checksum protected="All"     bchecksum="0x3BCE" cchecksum="0x079C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" vdd_min_end="4.5" />
+    <frequency start="20" end="40" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="commercial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.7" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x03FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="200:3FF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C622.xml b/src/devices/pic/xml_data/16C622.xml
new file mode 100644
index 0000000..f1675bc
--- /dev/null
+++ b/src/devices/pic/xml_data/16C622.xml
@@ -0,0 +1,117 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C622" document="010140" status="NR" alternative="16C622A" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x377F" cchecksum="0x034D" />
+    <checksum protected="400:7FF" bchecksum="0x5DEE" cchecksum="0x0FA3" />
+    <checksum protected="200:7FF" bchecksum="0x4ADE" cchecksum="0xFC93" />
+    <checksum protected="All"     bchecksum="0x37CE" cchecksum="0x039C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0"  end="10" vdd_min="3" vdd_max="6" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="6" vdd_min_end="4.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="6" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="6" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x07FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="200:7FF" cname="_CP_75"  />
+      <value value="0x2A20" name="400:7FF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C622A.xml b/src/devices/pic/xml_data/16C622A.xml
new file mode 100644
index 0000000..04e0d9b
--- /dev/null
+++ b/src/devices/pic/xml_data/16C622A.xml
@@ -0,0 +1,121 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C622A" document="010141" status="IP" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x377F" cchecksum="0x034D" />
+    <checksum protected="400:7FF" bchecksum="0x5DEE" cchecksum="0x0FA3" />
+    <checksum protected="200:7FF" bchecksum="0x4ADE" cchecksum="0xFC93" />
+    <checksum protected="All"     bchecksum="0x37CE" cchecksum="0x039C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" vdd_min_end="4.5" />
+    <frequency start="20" end="40" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="commercial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.7" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x07FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="200:7FF" cname="_CP_75"  />
+      <value value="0x2A20" name="400:7FF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C62A.xml b/src/devices/pic/xml_data/16C62A.xml
new file mode 100644
index 0000000..71bf13f
--- /dev/null
+++ b/src/devices/pic/xml_data/16C62A.xml
@@ -0,0 +1,100 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C62A" document="010142" status="NR" alternative="16C62B 16F72" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x377F" cchecksum="0x034D" />
+    <checksum protected="400:7FF" bchecksum="0x5DEE" cchecksum="0x0FA3" />
+    <checksum protected="200:7FF" bchecksum="0x4ADE" cchecksum="0xFC93" />
+    <checksum protected="All"     bchecksum="0x37CE" cchecksum="0x039C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x07FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="200:7FF" cname="_CP_75"  />
+      <value value="0x2A20" name="400:7FF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic ssop" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"        />
+    <pin index="2"  name="RA0"             />
+    <pin index="3"  name="RA1"             />
+    <pin index="4"  name="RA2"             />
+    <pin index="5"  name="RA3"             />
+    <pin index="6"  name="RA4/T0CKI"       />
+    <pin index="7"  name="RA5/SS"          />
+    <pin index="8"  name="VSS"             />
+    <pin index="9"  name="OSC1/CLKIN"      />
+    <pin index="10" name="OSC2/CLKOUT"     />
+    <pin index="11" name="RC0/T1OSO/T1CKI" />
+    <pin index="12" name="RC1/T1OSI"       />
+    <pin index="13" name="RC2/CCP1"        />
+    <pin index="14" name="RC3/SCK/SCL"     />
+    <pin index="15" name="RC4/SDI/SDA"     />
+    <pin index="16" name="RC5/SDO"         />
+    <pin index="17" name="RC6"             />
+    <pin index="18" name="RC7"             />
+    <pin index="19" name="VSS"             />
+    <pin index="20" name="VDD"             />
+    <pin index="21" name="RB0/INT"         />
+    <pin index="22" name="RB1"             />
+    <pin index="23" name="RB2"             />
+    <pin index="24" name="RB3"             />
+    <pin index="25" name="RB4"             />
+    <pin index="26" name="RB5"             />
+    <pin index="27" name="RB6"             />
+    <pin index="28" name="RB7"             />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C62B.xml b/src/devices/pic/xml_data/16C62B.xml
new file mode 100644
index 0000000..6550cbb
--- /dev/null
+++ b/src/devices/pic/xml_data/16C62B.xml
@@ -0,0 +1,100 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C62B" document="010143" status="IP" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x377F" cchecksum="0x034D" />
+    <checksum protected="400:7FF" bchecksum="0x5DEE" cchecksum="0x0FA3" />
+    <checksum protected="200:7FF" bchecksum="0x4ADE" cchecksum="0xFC93" />
+    <checksum protected="All"     bchecksum="0x37CE" cchecksum="0x039C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x07FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="200:7FF" cname="_CP_75"  />
+      <value value="0x2A20" name="400:7FF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic ssop" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"        />
+    <pin index="2"  name="RA0"             />
+    <pin index="3"  name="RA1"             />
+    <pin index="4"  name="RA2"             />
+    <pin index="5"  name="RA3"             />
+    <pin index="6"  name="RA4/T0CKI"       />
+    <pin index="7"  name="RA5/SS"          />
+    <pin index="8"  name="VSS"             />
+    <pin index="9"  name="OSC1/CLKIN"      />
+    <pin index="10" name="OSC2/CLKOUT"     />
+    <pin index="11" name="RC0/T1OSO/T1CKI" />
+    <pin index="12" name="RC1/T1OSI"       />
+    <pin index="13" name="RC2/CCP1"        />
+    <pin index="14" name="RC3/SCK/SCL"     />
+    <pin index="15" name="RC4/SDI/SDA"     />
+    <pin index="16" name="RC5/SDO"         />
+    <pin index="17" name="RC6"             />
+    <pin index="18" name="RC7"             />
+    <pin index="19" name="VSS"             />
+    <pin index="20" name="VDD"             />
+    <pin index="21" name="RB0/INT"         />
+    <pin index="22" name="RB1"             />
+    <pin index="23" name="RB2"             />
+    <pin index="24" name="RB3"             />
+    <pin index="25" name="RB4"             />
+    <pin index="26" name="RB5"             />
+    <pin index="27" name="RB6"             />
+    <pin index="28" name="RB7"             />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C63.xml b/src/devices/pic/xml_data/16C63.xml
new file mode 100644
index 0000000..7d21001
--- /dev/null
+++ b/src/devices/pic/xml_data/16C63.xml
@@ -0,0 +1,100 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C63" document="010144" status="NR" alternative="16C63A 16F73" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x2F7F" cchecksum="0xFB4D" />
+    <checksum protected="800:FFF" bchecksum="0x51EE" cchecksum="0x03A3" />
+    <checksum protected="400:FFF" bchecksum="0x40DE" cchecksum="0xF293" />
+    <checksum protected="All"     bchecksum="0x2FCE" cchecksum="0xFB9C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x0FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="400:FFF" cname="_CP_75"  />
+      <value value="0x2A20" name="800:FFF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"        />
+    <pin index="2"  name="RA0"             />
+    <pin index="3"  name="RA1"             />
+    <pin index="4"  name="RA2"             />
+    <pin index="5"  name="RA3"             />
+    <pin index="6"  name="RA4/T0CKI"       />
+    <pin index="7"  name="RA5/SS"          />
+    <pin index="8"  name="VSS"             />
+    <pin index="9"  name="OSC1/CLKIN"      />
+    <pin index="10" name="OSC2/CLKOUT"     />
+    <pin index="11" name="RC0/T1OSI/T1CKI" />
+    <pin index="12" name="RC1/T1OSO/CCP2"  />
+    <pin index="13" name="RC2/CCP1"        />
+    <pin index="14" name="RC3/SCK/SCL"     />
+    <pin index="15" name="RC4/SDI/SDA"     />
+    <pin index="16" name="RC5/SDO"         />
+    <pin index="17" name="RC6/TX/CK"       />
+    <pin index="18" name="RC7/RX/DT"       />
+    <pin index="19" name="VSS"             />
+    <pin index="20" name="VDD"             />
+    <pin index="21" name="RB0/INT"         />
+    <pin index="22" name="RB1"             />
+    <pin index="23" name="RB2"             />
+    <pin index="24" name="RB3"             />
+    <pin index="25" name="RB4"             />
+    <pin index="26" name="RB5"             />
+    <pin index="27" name="RB6"             />
+    <pin index="28" name="RB7"             />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C63A.xml b/src/devices/pic/xml_data/16C63A.xml
new file mode 100644
index 0000000..2a3eac3
--- /dev/null
+++ b/src/devices/pic/xml_data/16C63A.xml
@@ -0,0 +1,101 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C63A" document="010145" status="IP" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x2F7F" cchecksum="0xFB4D" />
+    <checksum protected="800:FFF" bchecksum="0x51EE" cchecksum="0x03A3" />
+    <checksum protected="400:FFF" bchecksum="0x40DE" cchecksum="0xF293" />
+    <checksum protected="All"     bchecksum="0x2FCE" cchecksum="0xFB9C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x0FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="400:FFF" cname="_CP_75"  />
+      <value value="0x2A20" name="800:FFF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"        />
+    <pin index="2"  name="RA0/AN0"         />
+    <pin index="3"  name="RA1/AN1"         />
+    <pin index="4"  name="RA2/AN2"         />
+    <pin index="5"  name="RA3/AN3/VREF"    />
+    <pin index="6"  name="RA4/T0CKI"       />
+    <pin index="7"  name="RA5/SS/AN4"      />
+    <pin index="8"  name="VSS"             />
+    <pin index="9"  name="OSC1/CLKIN"      />
+    <pin index="10" name="OSC2/CLKOUT"     />
+    <pin index="11" name="RC0/T1OSI/T1CKI" />
+    <pin index="12" name="RC1/T1OSO/CCP2"  />
+    <pin index="13" name="RC2/CCP1"        />
+    <pin index="14" name="RC3/SCK/SCL"     />
+    <pin index="15" name="RC4/SDI/SDA"     />
+    <pin index="16" name="RC5/SDO"         />
+    <pin index="17" name="RC6/TX/CK"       />
+    <pin index="18" name="RC7/RX/DT"       />
+    <pin index="19" name="VSS"             />
+    <pin index="20" name="VDD"             />
+    <pin index="21" name="RB0/INT"         />
+    <pin index="22" name="RB1"             />
+    <pin index="23" name="RB2"             />
+    <pin index="24" name="RB3"             />
+    <pin index="25" name="RB4"             />
+    <pin index="26" name="RB5"             />
+    <pin index="27" name="RB6"             />
+    <pin index="28" name="RB7"             />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C64.xml b/src/devices/pic/xml_data/16C64.xml
new file mode 100644
index 0000000..2bd6f77
--- /dev/null
+++ b/src/devices/pic/xml_data/16C64.xml
@@ -0,0 +1,201 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C64" document="010146" status="EOL" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+  
+  <!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"                  constant="0x3F80" bchecksum="0x37BF" cchecksum="0x038D" />
+    <checksum protected="400:7FF" type="XNOR7" constant="0x3F80" bchecksum="0x37AF" cchecksum="0x1D69" />
+    <checksum protected="200:7FF" type="XNOR7" constant="0x3F80" bchecksum="0x379F" cchecksum="0x1D59" />
+    <checksum protected="All"     type="XNOR7" constant="0x3F80" bchecksum="0x378F" cchecksum="0x3735" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="3" vdd_max="6" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x07FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x003F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="Off" cname="_PWRTE_OFF" />
+      <value value="0x0008" name="On"  cname="_PWRTE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0030" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x0010" name="200:7FF" cname="_CP_75"  />
+      <value value="0x0020" name="400:7FF" cname="_CP_50"  />
+      <value value="0x0030" name="Off"     cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="mqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C641.xml b/src/devices/pic/xml_data/16C641.xml
new file mode 100644
index 0000000..2a819ff
--- /dev/null
+++ b/src/devices/pic/xml_data/16C641.xml
@@ -0,0 +1,99 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C641" status="?" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="?" datasheet="30559" progsheet="?" erratas="er16c641" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="3" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x07FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3FFF" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="MPEEN" value="0x0080" >
+      <value value="0x0000" name="Off" cname="_MPEEN_OFF" />
+      <value value="0x0080" name="On"  cname="_MPEEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="400:7FF" cname="_CP_50"  />
+      <value value="0x2A20" name="200:7FF" cname="_CP_75"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"     />
+    <pin index="2"  name="RA0/AN0"      />
+    <pin index="3"  name="RA1/AN1"      />
+    <pin index="4"  name="RA2/AN2/VREF" />
+    <pin index="5"  name="RA3/AN3"      />
+    <pin index="6"  name="RA4/T0CKI"    />
+    <pin index="7"  name="RA5"          />
+    <pin index="8"  name="VSS"          />
+    <pin index="9"  name="OSC1/CLKIN"   />
+    <pin index="10" name="OSC2/CLKOUT"  />
+    <pin index="11" name="RC0"          />
+    <pin index="12" name="RC1"          />
+    <pin index="13" name="RC2"          />
+    <pin index="14" name="RC3"          />
+    <pin index="15" name="RC4"          />
+    <pin index="16" name="RC5"          />
+    <pin index="17" name="RC6"          />
+    <pin index="18" name="RC7"          />
+    <pin index="19" name="VSS"          />
+    <pin index="20" name="VDD"          />
+    <pin index="21" name="RB0/INT"      />
+    <pin index="22" name="RB1"          />
+    <pin index="23" name="RB2"          />
+    <pin index="24" name="RB3"          />
+    <pin index="25" name="RB4"          />
+    <pin index="26" name="RB5"          />
+    <pin index="27" name="RB6"          />
+    <pin index="28" name="RB7"          />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C642.xml b/src/devices/pic/xml_data/16C642.xml
new file mode 100644
index 0000000..c5847a9
--- /dev/null
+++ b/src/devices/pic/xml_data/16C642.xml
@@ -0,0 +1,104 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C642" document="010147" status="NR" alternative="16F72" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x2FFF" cchecksum="0xFBCD" />
+    <checksum protected="800:FFF" bchecksum="0x52EE" cchecksum="0x04A3" />
+    <checksum protected="400:FFF" bchecksum="0x41DE" cchecksum="0xF393" />
+    <checksum protected="All"     bchecksum="0x30CE" cchecksum="0xFC9C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="3" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x0FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3FFF" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="MPEEN" value="0x0080" >
+      <value value="0x0000" name="Off" cname="_MPEEN_OFF" />
+      <value value="0x0080" name="On"  cname="_MPEEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="400:FFF" cname="_CP_75"  />
+      <value value="0x2A20" name="800:FFF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"     />
+    <pin index="2"  name="RA0/AN0"      />
+    <pin index="3"  name="RA1/AN1"      />
+    <pin index="4"  name="RA2/AN2/VREF" />
+    <pin index="5"  name="RA3/AN3"      />
+    <pin index="6"  name="RA4/T0CKI"    />
+    <pin index="7"  name="RA5"          />
+    <pin index="8"  name="VSS"          />
+    <pin index="9"  name="OSC1/CLKIN"   />
+    <pin index="10" name="OSC2/CLKOUT"  />
+    <pin index="11" name="RC0"          />
+    <pin index="12" name="RC1"          />
+    <pin index="13" name="RC2"          />
+    <pin index="14" name="RC3"          />
+    <pin index="15" name="RC4"          />
+    <pin index="16" name="RC5"          />
+    <pin index="17" name="RC6"          />
+    <pin index="18" name="RC7"          />
+    <pin index="19" name="VSS"          />
+    <pin index="20" name="VDD"          />
+    <pin index="21" name="RB0/INT"      />
+    <pin index="22" name="RB1"          />
+    <pin index="23" name="RB2"          />
+    <pin index="24" name="RB3"          />
+    <pin index="25" name="RB4"          />
+    <pin index="26" name="RB5"          />
+    <pin index="27" name="RB6"          />
+    <pin index="28" name="RB7"          />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C64A.xml b/src/devices/pic/xml_data/16C64A.xml
new file mode 100644
index 0000000..c5331e6
--- /dev/null
+++ b/src/devices/pic/xml_data/16C64A.xml
@@ -0,0 +1,253 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C64A" document="010148" status="NR" alternative="16F74" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x377F" cchecksum="0x034D" />
+    <checksum protected="400:7FF" bchecksum="0x5DEE" cchecksum="0x0FA3" />
+    <checksum protected="200:7FF" bchecksum="0x4ADE" cchecksum="0xFC93" />
+    <checksum protected="All"     bchecksum="0x37CE" cchecksum="0x039C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x07FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="200:7FF" cname="_CP_75"  />
+      <value value="0x2A20" name="400:7FF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="mqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C65.xml b/src/devices/pic/xml_data/16C65.xml
new file mode 100644
index 0000000..1d5de06
--- /dev/null
+++ b/src/devices/pic/xml_data/16C65.xml
@@ -0,0 +1,201 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C65" document="010149" status="EOL" alternative="16C65B" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"                  constant="0x3F80" bchecksum="0x2FBF" cchecksum="0xFB8D" />
+    <checksum protected="800:FFF" type="XNOR7" constant="0x3F80" bchecksum="0x2FAF" cchecksum="0x1569" />
+    <checksum protected="400:FFF" type="XNOR7" constant="0x3F80" bchecksum="0x2F9F" cchecksum="0x1559" />
+    <checksum protected="All"     type="XNOR7" constant="0x3F80" bchecksum="0x2F8F" cchecksum="0x2F35" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="3" vdd_max="6" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x0FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x003F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="Off" cname="_PWRTE_OFF" />
+      <value value="0x0008" name="On"  cname="_PWRTE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0030" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x0010" name="400:FFF" cname="_CP_75"  />
+      <value value="0x0020" name="800:FFF" cname="_CP_50"  />
+      <value value="0x0030" name="Off"     cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="mqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C65A.xml b/src/devices/pic/xml_data/16C65A.xml
new file mode 100644
index 0000000..4220f2d
--- /dev/null
+++ b/src/devices/pic/xml_data/16C65A.xml
@@ -0,0 +1,253 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C65A" document="010150" status="NR" alternative="16C65B 16F74" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x2F7F" cchecksum="0xFB4D" />
+    <checksum protected="800:FFF" bchecksum="0x51EE" cchecksum="0x03A3" />
+    <checksum protected="400:FFF" bchecksum="0x40DE" cchecksum="0xF293" />
+    <checksum protected="All"     bchecksum="0x2FCE" cchecksum="0xFB9C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x0FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="400:FFF" cname="_CP_75"  />
+      <value value="0x2A20" name="800:FFF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="mqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C65B.xml b/src/devices/pic/xml_data/16C65B.xml
new file mode 100644
index 0000000..c5eae8a
--- /dev/null
+++ b/src/devices/pic/xml_data/16C65B.xml
@@ -0,0 +1,207 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C65B" document="010151" status="IP" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x2F7F" cchecksum="0xFB4D" />
+    <checksum protected="800:FFF" bchecksum="0x51EE" cchecksum="0x03A3" />
+    <checksum protected="400:FFF" bchecksum="0x40DE" cchecksum="0xF293" />
+    <checksum protected="All"     bchecksum="0x2FCE" cchecksum="0xFB9C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x0FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="400:FFF" cname="_CP_75"  />
+      <value value="0x2A20" name="800:FFF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip"      nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc"      nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="mqfp tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C66.xml b/src/devices/pic/xml_data/16C66.xml
new file mode 100644
index 0000000..bfa3307
--- /dev/null
+++ b/src/devices/pic/xml_data/16C66.xml
@@ -0,0 +1,100 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C66" document="010152" status="NR" alternative="16F76" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"       bchecksum="0x1F7F" cchecksum="0xEB4D" />
+    <checksum protected="1000:1FFF" bchecksum="0x39EE" cchecksum="0xEBA3" />
+    <checksum protected="0800:1FFF" bchecksum="0x2CDE" cchecksum="0xDE93" />
+    <checksum protected="All"       bchecksum="0x1FCE" cchecksum="0xEB9C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x1FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"       cname="_CP_ALL" />
+      <value value="0x1510" name="0800:1FFF" cname="_CP_75"  />
+      <value value="0x2A20" name="1000:1FFF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"       cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"        />
+    <pin index="2"  name="RA0"             />
+    <pin index="3"  name="RA1"             />
+    <pin index="4"  name="RA2"             />
+    <pin index="5"  name="RA3"             />
+    <pin index="6"  name="RA4/T0CKI"       />
+    <pin index="7"  name="RA5/SS"          />
+    <pin index="8"  name="VSS"             />
+    <pin index="9"  name="OSC1/CLKIN"      />
+    <pin index="10" name="OSC2/CLKOUT"     />
+    <pin index="11" name="RC0/T1OSI/T1CKI" />
+    <pin index="12" name="RC1/T1OSO/CCP2"  />
+    <pin index="13" name="RC2/CCP1"        />
+    <pin index="14" name="RC3/SCK/SCL"     />
+    <pin index="15" name="RC4/SDI/SDA"     />
+    <pin index="16" name="RC5/SDO"         />
+    <pin index="17" name="RC6/TX/CK"       />
+    <pin index="18" name="RC7/RX/DT"       />
+    <pin index="19" name="VSS"             />
+    <pin index="20" name="VDD"             />
+    <pin index="21" name="RB0/INT"         />
+    <pin index="22" name="RB1"             />
+    <pin index="23" name="RB2"             />
+    <pin index="24" name="RB3"             />
+    <pin index="25" name="RB4"             />
+    <pin index="26" name="RB5"             />
+    <pin index="27" name="RB6"             />
+    <pin index="28" name="RB7"             />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C661.xml b/src/devices/pic/xml_data/16C661.xml
new file mode 100644
index 0000000..612f636
--- /dev/null
+++ b/src/devices/pic/xml_data/16C661.xml
@@ -0,0 +1,111 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C661" status="?" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="?" datasheet="30559" progsheet="?" erratas="er16c661" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="3" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x07FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3FFF" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="MPEEN" value="0x0080" >
+      <value value="0x0000" name="Off" cname="_MPEEN_OFF" />
+      <value value="0x0080" name="On"  cname="_MPEEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="200:7FF" cname="_CP_75"  />
+      <value value="0x2A20" name="400:7FF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C662.xml b/src/devices/pic/xml_data/16C662.xml
new file mode 100644
index 0000000..a09c5c5
--- /dev/null
+++ b/src/devices/pic/xml_data/16C662.xml
@@ -0,0 +1,116 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C662" document="010153" status="NR" alternative="16F74" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x2FFF" cchecksum="0xFBCD" />
+    <checksum protected="800:FFF" bchecksum="0x52EE" cchecksum="0x04A3" />
+    <checksum protected="400:FFF" bchecksum="0x41DE" cchecksum="0xF393" />
+    <checksum protected="All"     bchecksum="0x30CE" cchecksum="0xFC9C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="3" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x0FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3FFF" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="MPEEN" value="0x0080" >
+      <value value="0x0000" name="Off" cname="_MPEEN_OFF" />
+      <value value="0x0080" name="On"  cname="_MPEEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="400:FFF" cname="_CP_75"  />
+      <value value="0x2A20" name="800:FFF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C67.xml b/src/devices/pic/xml_data/16C67.xml
new file mode 100644
index 0000000..43c1aa1
--- /dev/null
+++ b/src/devices/pic/xml_data/16C67.xml
@@ -0,0 +1,253 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C67" document="010154" status="NR" alternative="16F77" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"       bchecksum="0x1F7F" cchecksum="0xEB4D" />
+    <checksum protected="1000:1FFF" bchecksum="0x39EE" cchecksum="0xEBA3" />
+    <checksum protected="0800:1FFF" bchecksum="0x2CDE" cchecksum="0xDE93" />
+    <checksum protected="All"       bchecksum="0x1FCE" cchecksum="0xEB9C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x1FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"       cname="_CP_ALL" />
+      <value value="0x1510" name="0800:1FFF" cname="_CP_75"  />
+      <value value="0x2A20" name="1000:1FFF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"       cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="mqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C71.xml b/src/devices/pic/xml_data/16C71.xml
new file mode 100644
index 0000000..d23acc3
--- /dev/null
+++ b/src/devices/pic/xml_data/16C71.xml
@@ -0,0 +1,81 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C71" document="010155" status="NR" alternative="16F716" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" constant="0x3FE0" bchecksum="0x3BFF" cchecksum="0x07CD" />
+    <checksum protected="All" type="XNOR7"      bchecksum="0xFC6F" cchecksum="0xFC15" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="0.2" vdd_min="3" vdd_max="6" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x03FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x001F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="Off" cname="_PWRTE_OFF" />
+      <value value="0x0008" name="On"  cname="_PWRTE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0010" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0010" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2/AN2"      />
+    <pin index="2"  name="RA3/AN3/VREF" />
+    <pin index="3"  name="RA4/T0CKI"    />
+    <pin index="4"  name="MCLR/VPP"     />
+    <pin index="5"  name="VSS"          />
+    <pin index="6"  name="RB0/INT"      />
+    <pin index="7"  name="RB1"          />
+    <pin index="8"  name="RB2"          />
+    <pin index="9"  name="RB3"          />
+    <pin index="10" name="RB4"          />
+    <pin index="11" name="RB5"          />
+    <pin index="12" name="RB6"          />
+    <pin index="13" name="RB7"          />
+    <pin index="14" name="VDD"          />
+    <pin index="15" name="OSC2/CLKOUT"  />
+    <pin index="16" name="OSC1/CLKIN"   />
+    <pin index="17" name="RA0/AN0"      />
+    <pin index="18" name="RA1/AN1"      />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C710.xml b/src/devices/pic/xml_data/16C710.xml
new file mode 100644
index 0000000..d6a90c2
--- /dev/null
+++ b/src/devices/pic/xml_data/16C710.xml
@@ -0,0 +1,112 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C710" document="010156" status="NR" alternative="16F716" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x3DFF" cchecksum="0x09CD" />
+    <checksum protected="040:1FF" bchecksum="0x3E0E" cchecksum="0xEFC3" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   special="low_power" >
+    <frequency start="0" end="4" vdd_min="3" vdd_max="6" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x01FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3FFF" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3FB0" >
+      <value value="0x0000" name="040:1FF" cname="_CP_ON"  />
+      <value value="0x3FB0" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2/AN2"      />
+    <pin index="2"  name="RA3/AN3/VREF" />
+    <pin index="3"  name="RA4/T0CKI"    />
+    <pin index="4"  name="MCLR/VPP"     />
+    <pin index="5"  name="VSS"          />
+    <pin index="6"  name="RB0/INT"      />
+    <pin index="7"  name="RB1"          />
+    <pin index="8"  name="RB2"          />
+    <pin index="9"  name="RB3"          />
+    <pin index="10" name="RB4"          />
+    <pin index="11" name="RB5"          />
+    <pin index="12" name="RB6"          />
+    <pin index="13" name="RB7"          />
+    <pin index="14" name="VDD"          />
+    <pin index="15" name="OSC2/CLKOUT"  />
+    <pin index="16" name="OSC1/CLKIN"   />
+    <pin index="17" name="RA0/AN0"      />
+    <pin index="18" name="RA1/AN1"      />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C711.xml b/src/devices/pic/xml_data/16C711.xml
new file mode 100644
index 0000000..29518e3
--- /dev/null
+++ b/src/devices/pic/xml_data/16C711.xml
@@ -0,0 +1,112 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C711" document="010157" status="NR" alternative="16F716" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x3BFF" cchecksum="0x07CD" />
+    <checksum protected="040:3FF" bchecksum="0x3C0E" cchecksum="0xEDC3" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   special="low_power" >
+    <frequency start="0" end="4" vdd_min="3" vdd_max="6" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x03FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3FFF" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3FB0" >
+      <value value="0x0000" name="040:3FF" cname="_CP_ON"  />
+      <value value="0x3FB0" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2/AN2"      />
+    <pin index="2"  name="RA3/AN3/VREF" />
+    <pin index="3"  name="RA4/T0CKI"    />
+    <pin index="4"  name="MCLR/VPP"     />
+    <pin index="5"  name="VSS"          />
+    <pin index="6"  name="RB0/INT"      />
+    <pin index="7"  name="RB1"          />
+    <pin index="8"  name="RB2"          />
+    <pin index="9"  name="RB3"          />
+    <pin index="10" name="RB4"          />
+    <pin index="11" name="RB5"          />
+    <pin index="12" name="RB6"          />
+    <pin index="13" name="RB7"          />
+    <pin index="14" name="VDD"          />
+    <pin index="15" name="OSC2/CLKOUT"  />
+    <pin index="16" name="OSC1/CLKIN"   />
+    <pin index="17" name="RA0/AN0"      />
+    <pin index="18" name="RA1/AN1"      />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C712.xml b/src/devices/pic/xml_data/16C712.xml
new file mode 100644
index 0000000..6979deb
--- /dev/null
+++ b/src/devices/pic/xml_data/16C712.xml
@@ -0,0 +1,108 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C712" document="010158" status="NR" alternative="16F716" memory_technology="EPROM" architecture="16X" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x3B7F" cchecksum="0x074D" />
+    <checksum protected="200:3FF" bchecksum="0x63EE" cchecksum="0x15A3" />
+    <checksum protected="All"     bchecksum="0x3BCE" cchecksum="0x079C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x03FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x2A20" name="200:3FF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C715.xml b/src/devices/pic/xml_data/16C715.xml
new file mode 100644
index 0000000..501018f
--- /dev/null
+++ b/src/devices/pic/xml_data/16C715.xml
@@ -0,0 +1,117 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C715" document="010159" status="NR" alternative="16F716" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x37FF" cchecksum="0x03CD" />
+    <checksum protected="400:7FF" bchecksum="0x5EEE" cchecksum="0x10A3" />
+    <checksum protected="200:7FF" bchecksum="0x4BDE" cchecksum="0xFD93" />
+    <checksum protected="All"     bchecksum="0x38CE" cchecksum="0x049C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x07FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3FFF" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="MPEEN" value="0x0080" >
+      <value value="0x0000" name="Off" cname="_MPEEN_OFF" />
+      <value value="0x0080" name="On"  cname="_MPEEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="200:7FF" cname="_CP_75"  />
+      <value value="0x2A20" name="400:7FF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2/AN2"      />
+    <pin index="2"  name="RA3/AN3/VREF" />
+    <pin index="3"  name="RA4/T0CKI"    />
+    <pin index="4"  name="MCLR/VPP"     />
+    <pin index="5"  name="VSS"          />
+    <pin index="6"  name="RB0/INT"      />
+    <pin index="7"  name="RB1"          />
+    <pin index="8"  name="RB2"          />
+    <pin index="9"  name="RB3"          />
+    <pin index="10" name="RB4"          />
+    <pin index="11" name="RB5"          />
+    <pin index="12" name="RB6"          />
+    <pin index="13" name="RB7"          />
+    <pin index="14" name="VDD"          />
+    <pin index="15" name="OSC2/CLKOUT"  />
+    <pin index="16" name="OSC1/CLKIN"   />
+    <pin index="17" name="RA0/AN0"      />
+    <pin index="18" name="RA1/AN1"      />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C716.xml b/src/devices/pic/xml_data/16C716.xml
new file mode 100644
index 0000000..f34e760
--- /dev/null
+++ b/src/devices/pic/xml_data/16C716.xml
@@ -0,0 +1,112 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C716" document="010160" status="NR" alternative="16F716" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x377F" cchecksum="0x034D" />
+    <checksum protected="400:7FF" bchecksum="0x5DEE" cchecksum="0x0FA3" />
+    <checksum protected="200:7FF" bchecksum="0x4ADE" cchecksum="0xFC93" />
+    <checksum protected="All"     bchecksum="0x37CE" cchecksum="0x039C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x07FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="200:7FF" cname="_CP_75"  />
+      <value value="0x2A20" name="400:7FF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C717.xml b/src/devices/pic/xml_data/16C717.xml
new file mode 100644
index 0000000..19c6f6a
--- /dev/null
+++ b/src/devices/pic/xml_data/16C717.xml
@@ -0,0 +1,129 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C717" document="010161" status="IP" memory_technology="EPROM" architecture="16X" id="0x0AC0"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x377F" cchecksum="0x034D" />
+    <checksum protected="All"     bchecksum="0x43FE" cchecksum="0x0FCC" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" special="low_power" >
+    <frequency start="0"  end="4"  vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" vdd_min_end="4" />
+  </frequency_range>
+  <frequency_range name="industrial" >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0"  end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x0000" end="0x07FF" />
+  <memory name="user_ids"  start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="device_id" start="0x2006" end="0x2006" />
+  <memory name="config"    start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EXTCLK_OSC"         />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   />
+      <value value="0x0006" name="ER_IO"        cname="_ER_OSC_NOCLKOUT"    />
+      <value value="0x0007" name="ER_CLKOUT"    cname="_ER_OSC_CLKOUT"      />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C00" >
+      <value value="0x0000" name="4.5" cname="_VBOR_45" />
+      <value value="0x0400" name="4.2" cname="_VBOR_42" />
+      <value value="0x0800" name="2.7" cname="_VBOR_27" />
+      <value value="0x0C00" name="2.5" cname="_VBOR_25" />
+    </mask>
+    <mask name="CP"    value="0x3300" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x3300" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C72.xml b/src/devices/pic/xml_data/16C72.xml
new file mode 100644
index 0000000..e6b88a2
--- /dev/null
+++ b/src/devices/pic/xml_data/16C72.xml
@@ -0,0 +1,100 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C72" document="010162" status="NR" alternative="16F72" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x377F" cchecksum="0x034D" />
+    <checksum protected="400:7FF" bchecksum="0x5DEE" cchecksum="0x0FA3" />
+    <checksum protected="200:7FF" bchecksum="0x4ADE" cchecksum="0xFC93" />
+    <checksum protected="All"     bchecksum="0x37CE" cchecksum="0x039C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x07FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="200:7FF" cname="_CP_75"  />
+      <value value="0x2A20" name="400:7FF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"        />
+    <pin index="2"  name="RA0/AN0"         />
+    <pin index="3"  name="RA1/AN1"         />
+    <pin index="4"  name="RA2/AN2"         />
+    <pin index="5"  name="RA3/AN3/VREF"    />
+    <pin index="6"  name="RA4/T0CKI"       />
+    <pin index="7"  name="RA5/SS/AN4"      />
+    <pin index="8"  name="VSS"             />
+    <pin index="9"  name="OSC1/CLKIN"      />
+    <pin index="10" name="OSC2/CLKOUT"     />
+    <pin index="11" name="RC0/T1OSO/T1CKI" />
+    <pin index="12" name="RC1/T1OSI"       />
+    <pin index="13" name="RC2/CCP1"        />
+    <pin index="14" name="RC3/SCK/SCL"     />
+    <pin index="15" name="RC4/SDI/SDA"     />
+    <pin index="16" name="RC5/SDO"         />
+    <pin index="17" name="RC6"             />
+    <pin index="18" name="RC7"             />
+    <pin index="19" name="VSS"             />
+    <pin index="20" name="VDD"             />
+    <pin index="21" name="RB0/INT"         />
+    <pin index="22" name="RB1"             />
+    <pin index="23" name="RB2"             />
+    <pin index="24" name="RB3"             />
+    <pin index="25" name="RB4"             />
+    <pin index="26" name="RB5"             />
+    <pin index="27" name="RB6"             />
+    <pin index="28" name="RB7"             />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C72A.xml b/src/devices/pic/xml_data/16C72A.xml
new file mode 100644
index 0000000..cabb079
--- /dev/null
+++ b/src/devices/pic/xml_data/16C72A.xml
@@ -0,0 +1,100 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C72A" document="010163" status="NR" alternative="16F72" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x377F" cchecksum="0x034D" />
+    <checksum protected="400:7FF" bchecksum="0x5DEE" cchecksum="0x0FA3" />
+    <checksum protected="200:7FF" bchecksum="0x4ADE" cchecksum="0xFC93" />
+    <checksum protected="All"     bchecksum="0x37CE" cchecksum="0x039C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x07FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="200:7FF" cname="_CP_75"  />
+      <value value="0x2A20" name="400:7FF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic ssop" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"        />
+    <pin index="2"  name="RA0/AN0"         />
+    <pin index="3"  name="RA1/AN1"         />
+    <pin index="4"  name="RA2/AN2"         />
+    <pin index="5"  name="RA3/AN3/VREF"    />
+    <pin index="6"  name="RA4/T0CKI"       />
+    <pin index="7"  name="RA5/SS/AN4"      />
+    <pin index="8"  name="VSS"             />
+    <pin index="9"  name="OSC1/CLKIN"      />
+    <pin index="10" name="OSC2/CLKOUT"     />
+    <pin index="11" name="RC0/T1OSO/T1CKI" />
+    <pin index="12" name="RC1/T1OSI"       />
+    <pin index="13" name="RC2/CCP1"        />
+    <pin index="14" name="RC3/SCK/SCL"     />
+    <pin index="15" name="RC4/SDI/SDA"     />
+    <pin index="16" name="RC5/SDO"         />
+    <pin index="17" name="RC6"             />
+    <pin index="18" name="RC7"             />
+    <pin index="19" name="VSS"             />
+    <pin index="20" name="VDD"             />
+    <pin index="21" name="RB0/INT"         />
+    <pin index="22" name="RB1"             />
+    <pin index="23" name="RB2"             />
+    <pin index="24" name="RB3"             />
+    <pin index="25" name="RB4"             />
+    <pin index="26" name="RB5"             />
+    <pin index="27" name="RB6"             />
+    <pin index="28" name="RB7"             />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C73.xml b/src/devices/pic/xml_data/16C73.xml
new file mode 100644
index 0000000..78b69fa
--- /dev/null
+++ b/src/devices/pic/xml_data/16C73.xml
@@ -0,0 +1,95 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C73" document="010164" status="EOL" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     constant="0x3F80"              bchecksum="0x2FBF" cchecksum="0xFB8D" />
+    <checksum protected="800:FFF" constant="0x3F80" type="XNOR7" bchecksum="0x2FAF" cchecksum="0x1569" />
+    <checksum protected="400:FFF" constant="0x3F80" type="XNOR7" bchecksum="0x2F9F" cchecksum="0x1559" />
+    <checksum protected="All"     constant="0x3F80" type="XNOR7" bchecksum="0x2F8F" cchecksum="0x2F35" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="3" vdd_max="6" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x0FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x003F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="Off" cname="_PWRTE_OFF" />
+      <value value="0x0008" name="On"  cname="_PWRTE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0030" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x0010" name="400:FFF" cname="_CP_75"  />
+      <value value="0x0020" name="800:FFF" cname="_CP_50"  />
+      <value value="0x0030" name="Off"     cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"        />
+    <pin index="2"  name="RA0/AN0"         />
+    <pin index="3"  name="RA1/AN1"         />
+    <pin index="4"  name="RA2/AN2"         />
+    <pin index="5"  name="RA3/AN3/VREF"    />
+    <pin index="6"  name="RA4/T0CKI"       />
+    <pin index="7"  name="RA5/SS/AN4"      />
+    <pin index="8"  name="VSS"             />
+    <pin index="9"  name="OSC1/CLKIN"      />
+    <pin index="10" name="OSC2/CLKOUT"     />
+    <pin index="11" name="RC0/T1OSI/T1CKI" />
+    <pin index="12" name="RC1/T1OSO/CCP2"  />
+    <pin index="13" name="RC2/CCP1"        />
+    <pin index="14" name="RC3/SCK/SCL"     />
+    <pin index="15" name="RC4/SDI/SDA"     />
+    <pin index="16" name="RC5/SDO"         />
+    <pin index="17" name="RC6/TX/CK"       />
+    <pin index="18" name="RC7/RX/DT"       />
+    <pin index="19" name="VSS"             />
+    <pin index="20" name="VDD"             />
+    <pin index="21" name="RB0/INT"         />
+    <pin index="22" name="RB1"             />
+    <pin index="23" name="RB2"             />
+    <pin index="24" name="RB3"             />
+    <pin index="25" name="RB4"             />
+    <pin index="26" name="RB5"             />
+    <pin index="27" name="RB6"             />
+    <pin index="28" name="RB7"             />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C73A.xml b/src/devices/pic/xml_data/16C73A.xml
new file mode 100644
index 0000000..df9a672
--- /dev/null
+++ b/src/devices/pic/xml_data/16C73A.xml
@@ -0,0 +1,100 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C73A" document="010165" status="NR" alternative="16F73" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x2F7F" cchecksum="0xFB4D" />
+    <checksum protected="800:FFF" bchecksum="0x51EE" cchecksum="0x03A3" />
+    <checksum protected="400:FFF" bchecksum="0x40DE" cchecksum="0xF293" />
+    <checksum protected="All"     bchecksum="0x2FCE" cchecksum="0xFB9C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x0FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="400:FFF" cname="_CP_75"  />
+      <value value="0x2A20" name="800:FFF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"        />
+    <pin index="2"  name="RA0/AN0"         />
+    <pin index="3"  name="RA1/AN1"         />
+    <pin index="4"  name="RA2/AN2"         />
+    <pin index="5"  name="RA3/AN3/VREF"    />
+    <pin index="6"  name="RA4/T0CKI"       />
+    <pin index="7"  name="RA5/SS/AN4"      />
+    <pin index="8"  name="VSS"             />
+    <pin index="9"  name="OSC1/CLKIN"      />
+    <pin index="10" name="OSC2/CLKOUT"     />
+    <pin index="11" name="RC0/T1OSI/T1CKI" />
+    <pin index="12" name="RC1/T1OSO/CCP2"  />
+    <pin index="13" name="RC2/CCP1"        />
+    <pin index="14" name="RC3/SCK/SCL"     />
+    <pin index="15" name="RC4/SDI/SDA"     />
+    <pin index="16" name="RC5/SDO"         />
+    <pin index="17" name="RC6/TX/CK"       />
+    <pin index="18" name="RC7/RX/DT"       />
+    <pin index="19" name="VSS"             />
+    <pin index="20" name="VDD"             />
+    <pin index="21" name="RB0/INT"         />
+    <pin index="22" name="RB1"             />
+    <pin index="23" name="RB2"             />
+    <pin index="24" name="RB3"             />
+    <pin index="25" name="RB4"             />
+    <pin index="26" name="RB5"             />
+    <pin index="27" name="RB6"             />
+    <pin index="28" name="RB7"             />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C73B.xml b/src/devices/pic/xml_data/16C73B.xml
new file mode 100644
index 0000000..b2418f1
--- /dev/null
+++ b/src/devices/pic/xml_data/16C73B.xml
@@ -0,0 +1,101 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C73B" document="010166" status="NR" alternative="16F73" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x2F7F" cchecksum="0xFB4D" />
+    <checksum protected="800:FFF" bchecksum="0x51EE" cchecksum="0x03A3" />
+    <checksum protected="400:FFF" bchecksum="0x40DE" cchecksum="0xF293" />
+    <checksum protected="All"     bchecksum="0x2FCE" cchecksum="0xFB9C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x0FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="400:FFF" cname="_CP_75"  />
+      <value value="0x2A20" name="800:FFF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"        />
+    <pin index="2"  name="RA0/AN0"         />
+    <pin index="3"  name="RA1/AN1"         />
+    <pin index="4"  name="RA2/AN2"         />
+    <pin index="5"  name="RA3/AN3/VREF"    />
+    <pin index="6"  name="RA4/T0CKI"       />
+    <pin index="7"  name="RA5/SS/AN4"      />
+    <pin index="8"  name="VSS"             />
+    <pin index="9"  name="OSC1/CLKIN"      />
+    <pin index="10" name="OSC2/CLKOUT"     />
+    <pin index="11" name="RC0/T1OSI/T1CKI" />
+    <pin index="12" name="RC1/T1OSO/CCP2"  />
+    <pin index="13" name="RC2/CCP1"        />
+    <pin index="14" name="RC3/SCK/SCL"     />
+    <pin index="15" name="RC4/SDI/SDA"     />
+    <pin index="16" name="RC5/SDO"         />
+    <pin index="17" name="RC6/TX/CK"       />
+    <pin index="18" name="RC7/RX/DT"       />
+    <pin index="19" name="VSS"             />
+    <pin index="20" name="VDD"             />
+    <pin index="21" name="RB0/INT"         />
+    <pin index="22" name="RB1"             />
+    <pin index="23" name="RB2"             />
+    <pin index="24" name="RB3"             />
+    <pin index="25" name="RB4"             />
+    <pin index="26" name="RB5"             />
+    <pin index="27" name="RB6"             />
+    <pin index="28" name="RB7"             />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C74.xml b/src/devices/pic/xml_data/16C74.xml
new file mode 100644
index 0000000..091501d
--- /dev/null
+++ b/src/devices/pic/xml_data/16C74.xml
@@ -0,0 +1,201 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C74" document="010167" status="EOL" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     constant="0x3F80"              bchecksum="0x2FBF" cchecksum="0xFB8D" />
+    <checksum protected="800:FFF" constant="0x3F80" type="XNOR7" bchecksum="0x2FAF" cchecksum="0x1569" />
+    <checksum protected="400:FFF" constant="0x3F80" type="XNOR7" bchecksum="0x2F9F" cchecksum="0x1559" />
+    <checksum protected="All"     constant="0x3F80" type="XNOR7" bchecksum="0x2F8F" cchecksum="0x2F35" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="3" vdd_max="6" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x0FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x003F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="Off" cname="_PWRTE_OFF" />
+      <value value="0x0008" name="On"  cname="_PWRTE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0030" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x0010" name="400:FFF" cname="_CP_75"  />
+      <value value="0x0020" name="800:FFF" cname="_CP_50"  />
+      <value value="0x0030" name="Off"     cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="mqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C745.xml b/src/devices/pic/xml_data/16C745.xml
new file mode 100644
index 0000000..1a4ab42
--- /dev/null
+++ b/src/devices/pic/xml_data/16C745.xml
@@ -0,0 +1,92 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C745" document="010168" status="IP" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"       bchecksum="0x1F3F" cchecksum="0xEB0D" />
+    <checksum protected="1000:1FFF" bchecksum="0x396E" cchecksum="0xEB23" />
+    <checksum protected="0800:1FFF" bchecksum="0x2C5E" cchecksum="0xDE13" />
+    <checksum protected="All"       bchecksum="0x1F4E" cchecksum="0xEB1C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="24" end="24" vdd_min="4.35" vdd_max="5.25" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x1FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F3F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="HS"        cname="_HS_OSC" />
+      <value value="0x0001" name="EC_CLKOUT" cname="_EC_OSC" />
+      <value value="0x0002" name="H4"        cname="_H4_OSC" />
+      <value value="0x0003" name="E4_CLKOUT" cname="_E4_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"       cname="_CP_ALL" />
+      <value value="0x1510" name="0800:1FFF" cname="_CP_75"  />
+      <value value="0x2A20" name="1000:1FFF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"       cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C74A.xml b/src/devices/pic/xml_data/16C74A.xml
new file mode 100644
index 0000000..0d784c9
--- /dev/null
+++ b/src/devices/pic/xml_data/16C74A.xml
@@ -0,0 +1,206 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C74A" document="010169" status="NR" alternative="16F74" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x2F7F" cchecksum="0xFB4D" />
+    <checksum protected="800:FFF" bchecksum="0x51EE" cchecksum="0x03A3" />
+    <checksum protected="400:FFF" bchecksum="0x40DE" cchecksum="0xF293" />
+    <checksum protected="All"     bchecksum="0x2FCE" cchecksum="0xFB9C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x0FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="400:FFF" cname="_CP_75"  />
+      <value value="0x2A20" name="800:FFF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip"      nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc"      nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="mqfp tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C74B.xml b/src/devices/pic/xml_data/16C74B.xml
new file mode 100644
index 0000000..ce7274f
--- /dev/null
+++ b/src/devices/pic/xml_data/16C74B.xml
@@ -0,0 +1,207 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C74B" document="010170" status="NR" alternative="16F74" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x2F7F" cchecksum="0xFB4D" />
+    <checksum protected="800:FFF" bchecksum="0x51EE" cchecksum="0x03A3" />
+    <checksum protected="400:FFF" bchecksum="0x40DE" cchecksum="0xF293" />
+    <checksum protected="All"     bchecksum="0x2FCE" cchecksum="0xFB9C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x0FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="400:FFF" cname="_CP_75"  />
+      <value value="0x2A20" name="800:FFF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip"      nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc"      nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="mqfp tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C76.xml b/src/devices/pic/xml_data/16C76.xml
new file mode 100644
index 0000000..c5819a2
--- /dev/null
+++ b/src/devices/pic/xml_data/16C76.xml
@@ -0,0 +1,100 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C76" document="010171" status="NR" alternative="16F76" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"       bchecksum="0x1F7F" cchecksum="0xEB4D" />
+    <checksum protected="1000:1FFF" bchecksum="0x39EE" cchecksum="0xEBA3" />
+    <checksum protected="0800:1FFF" bchecksum="0x2CDE" cchecksum="0xDE93" />
+    <checksum protected="All"       bchecksum="0x1FCE" cchecksum="0xEB9C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x1FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"       cname="_CP_ALL" />
+      <value value="0x1510" name="0800:1FFF" cname="_CP_75"  />
+      <value value="0x2A20" name="1000:1FFF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"       cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"        />
+    <pin index="2"  name="RA0/AN0"         />
+    <pin index="3"  name="RA1/AN1"         />
+    <pin index="4"  name="RA2/AN2"         />
+    <pin index="5"  name="RA3/AN3/VREF"    />
+    <pin index="6"  name="RA4/T0CKI"       />
+    <pin index="7"  name="RA5/SS/AN4"      />
+    <pin index="8"  name="VSS"             />
+    <pin index="9"  name="OSC1/CLKIN"      />
+    <pin index="10" name="OSC2/CLKOUT"     />
+    <pin index="11" name="RC0/T1OSI/T1CKI" />
+    <pin index="12" name="RC1/T1OSO/CCP2"  />
+    <pin index="13" name="RC2/CCP1"        />
+    <pin index="14" name="RC3/SCK/SCL"     />
+    <pin index="15" name="RC4/SDI/SDA"     />
+    <pin index="16" name="RC5/SDO"         />
+    <pin index="17" name="RC6/TX/CK"       />
+    <pin index="18" name="RC7/RX/DT"       />
+    <pin index="19" name="VSS"             />
+    <pin index="20" name="VDD"             />
+    <pin index="21" name="RB0/INT"         />
+    <pin index="22" name="RB1"             />
+    <pin index="23" name="RB2"             />
+    <pin index="24" name="RB3"             />
+    <pin index="25" name="RB4"             />
+    <pin index="26" name="RB5"             />
+    <pin index="27" name="RB6"             />
+    <pin index="28" name="RB7"             />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C765.xml b/src/devices/pic/xml_data/16C765.xml
new file mode 100644
index 0000000..c441e17
--- /dev/null
+++ b/src/devices/pic/xml_data/16C765.xml
@@ -0,0 +1,198 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C765" document="010172" status="IP" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"       bchecksum="0x1F3F" cchecksum="0xEB0D" />
+    <checksum protected="1000:1FFF" bchecksum="0x396E" cchecksum="0xEB23" />
+    <checksum protected="0800:1FFF" bchecksum="0x2C5E" cchecksum="0xDE13" />
+    <checksum protected="All"       bchecksum="0x1F4E" cchecksum="0xEB1C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="24" end="24" vdd_min="4.35" vdd_max="5.25" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x1FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F3F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="HS"        cname="_HS_OSC" />
+      <value value="0x0001" name="EC_CLKOUT" cname="_EC_OSC" />
+      <value value="0x0002" name="H4"        cname="_H4_OSC" />
+      <value value="0x0003" name="E4_CLKOUT" cname="_E4_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"       cname="_CP_ALL" />
+      <value value="0x1510" name="0800:1FFF" cname="_CP_75"  />
+      <value value="0x2A20" name="1000:1FFF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"       cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C77.xml b/src/devices/pic/xml_data/16C77.xml
new file mode 100644
index 0000000..f863d24
--- /dev/null
+++ b/src/devices/pic/xml_data/16C77.xml
@@ -0,0 +1,206 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C77" document="010173" status="NR" alternative="16F77" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"       bchecksum="0x1F7F" cchecksum="0xEB4D" />
+    <checksum protected="1000:1FFF" bchecksum="0x39EE" cchecksum="0xEBA3" />
+    <checksum protected="0800:1FFF" bchecksum="0x2CDE" cchecksum="0xDE93" />
+    <checksum protected="All"       bchecksum="0x1FCE" cchecksum="0xEB9C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x1FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"       cname="_CP_ALL" />
+      <value value="0x1510" name="0800:1FFF" cname="_CP_75"  />
+      <value value="0x2A20" name="1000:1FFF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"       cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip"      nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc"      nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="mqfp tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C770.xml b/src/devices/pic/xml_data/16C770.xml
new file mode 100644
index 0000000..de1d9e9
--- /dev/null
+++ b/src/devices/pic/xml_data/16C770.xml
@@ -0,0 +1,108 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C770" document="010174" status="IP" memory_technology="EPROM" architecture="16X" id="0x0AE0"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x377F" cchecksum="0x034D" />
+    <checksum protected="All"     bchecksum="0x43FE" cchecksum="0x0FCC" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" special="low_power" >
+    <frequency start="0"  end="4"  vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" vdd_min_end="4" />
+  </frequency_range>
+  <frequency_range name="industrial" >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0"  end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x0000" end="0x07FF" />
+  <memory name="user_ids"  start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="device_id" start="0x2006" end="0x2006" />
+  <memory name="config"    start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EXTCLK_OSC"         />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   />
+      <value value="0x0006" name="ER_IO"        cname="_ER_OSC_NOCLKOUT"    />
+      <value value="0x0007" name="ER_CLKOUT"    cname="_ER_OSC_CLKOUT"      />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C00" >
+      <value value="0x0000" name="4.5" cname="_VBOR_45" />
+      <value value="0x0400" name="4.2" cname="_VBOR_42" />
+      <value value="0x0800" name="2.7" cname="_VBOR_27" />
+      <value value="0x0C00" name="2.5" cname="_VBOR_25" />
+    </mask>
+    <mask name="CP"    value="0x3300" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x3300" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C771.xml b/src/devices/pic/xml_data/16C771.xml
new file mode 100644
index 0000000..4bf7fcd
--- /dev/null
+++ b/src/devices/pic/xml_data/16C771.xml
@@ -0,0 +1,108 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C771" document="010175" status="IP" memory_technology="EPROM" architecture="16X" id="0x0B00"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x2F7F" cchecksum="0xFB4D" />
+    <checksum protected="All"     bchecksum="0x3BFE" cchecksum="0x07CC" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" special="low_power" >
+    <frequency start="0"  end="4"  vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" vdd_min_end="4" />
+  </frequency_range>
+  <frequency_range name="industrial" >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0"  end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x0000" end="0x0FFF" />
+  <memory name="user_ids"  start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="device_id" start="0x2006" end="0x2006" />
+  <memory name="config"    start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EXTCLK_OSC"         />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   />
+      <value value="0x0006" name="ER_IO"        cname="_ER_OSC_NOCLKOUT"    />
+      <value value="0x0007" name="ER_CLKOUT"    cname="_ER_OSC_CLKOUT"      />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C00" >
+      <value value="0x0000" name="4.5" cname="_VBOR_45" />
+      <value value="0x0400" name="4.2" cname="_VBOR_42" />
+      <value value="0x0800" name="2.7" cname="_VBOR_27" />
+      <value value="0x0C00" name="2.5" cname="_VBOR_25" />
+    </mask>
+    <mask name="CP"    value="0x3300" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x3300" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C773.xml b/src/devices/pic/xml_data/16C773.xml
new file mode 100644
index 0000000..1b74ed5
--- /dev/null
+++ b/src/devices/pic/xml_data/16C773.xml
@@ -0,0 +1,106 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C773" document="010176" status="IP" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x2F7F" cchecksum="0xFB4D" />
+    <checksum protected="800:FFF" bchecksum="0x55EE" cchecksum="0x07A3" />
+    <checksum protected="400:FFF" bchecksum="0x48DE" cchecksum="0xFA93" />
+    <checksum protected="All"     bchecksum="0x3BCE" cchecksum="0x079C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x0FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C00" >
+      <value value="0x0000" name="4.5" cname="_VBOR_45" />
+      <value value="0x0400" name="4.2" cname="_VBOR_42" />
+      <value value="0x0800" name="2.7" cname="_VBOR_27" />
+      <value value="0x0C00" name="2.5" cname="_VBOR_25" />
+    </mask>
+    <mask name="CP"    value="0x3330" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1110" name="400:FFF" cname="_CP_75"  />
+      <value value="0x2220" name="800:FFF" cname="_CP_50"  />
+      <value value="0x3330" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C774.xml b/src/devices/pic/xml_data/16C774.xml
new file mode 100644
index 0000000..1d577ee
--- /dev/null
+++ b/src/devices/pic/xml_data/16C774.xml
@@ -0,0 +1,259 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C774" document="010177" status="IP" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x2F7F" cchecksum="0xFB4D" />
+    <checksum protected="800:FFF" bchecksum="0x55EE" cchecksum="0x07A3" />
+    <checksum protected="400:FFF" bchecksum="0x48DE" cchecksum="0xFA93" />
+    <checksum protected="All"     bchecksum="0x3BCE" cchecksum="0x079C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x0FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C00" >
+      <value value="0x0000" name="4.5" cname="_VBOR_45" />
+      <value value="0x0400" name="4.2" cname="_VBOR_42" />
+      <value value="0x0800" name="2.7" cname="_VBOR_27" />
+      <value value="0x0C00" name="2.5" cname="_VBOR_25" />
+    </mask>
+    <mask name="CP"    value="0x3330" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1110" name="400:FFF" cname="_CP_75"  />
+      <value value="0x2220" name="800:FFF" cname="_CP_50"  />
+      <value value="0x3330" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="mqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C781.xml b/src/devices/pic/xml_data/16C781.xml
new file mode 100644
index 0000000..2861a67
--- /dev/null
+++ b/src/devices/pic/xml_data/16C781.xml
@@ -0,0 +1,104 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C781" document="010178" status="IP" memory_technology="EPROM" architecture="16X" id="0x0D40"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x3B7F" cchecksum="0x074D" />
+    <checksum protected="All"     bchecksum="0x47FE" cchecksum="0x13CC" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2.7" vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x0000" end="0x03FF" />
+  <memory name="user_ids"  start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="device_id" start="0x2006" end="0x2006" />
+  <memory name="config"    start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EXTCLK_OSC"         />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   />
+      <value value="0x0006" name="ER_IO"        cname="_ER_OSC_NOCLKOUT"    />
+      <value value="0x0007" name="ER_CLKOUT"    cname="_ER_OSC_CLKOUT"      />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C00" >
+      <value value="0x0000" name="4.5" cname="_VBOR_45" />
+      <value value="0x0400" name="4.2" cname="_VBOR_42" />
+      <value value="0x0800" name="2.7" cname="_VBOR_27" />
+      <value value="0x0C00" name="2.5" cname="_VBOR_25" />
+    </mask>
+    <mask name="CP"    value="0x3300" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x3300" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C782.xml b/src/devices/pic/xml_data/16C782.xml
new file mode 100644
index 0000000..6192a30
--- /dev/null
+++ b/src/devices/pic/xml_data/16C782.xml
@@ -0,0 +1,104 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C782" document="010179" status="IP" memory_technology="EPROM" architecture="16X" id="0x0D60"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x377F" cchecksum="0x034D" />
+    <checksum protected="All"     bchecksum="0x43FE" cchecksum="0x0FCC" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2.7" vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x0000" end="0x07FF" />
+  <memory name="user_ids"  start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="device_id" start="0x2006" end="0x2006" />
+  <memory name="config"    start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EXTCLK_OSC"         />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   />
+      <value value="0x0006" name="ER_IO"        cname="_ER_OSC_NOCLKOUT"    />
+      <value value="0x0007" name="ER_CLKOUT"    cname="_ER_OSC_CLKOUT"      />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C00" >
+      <value value="0x0000" name="4.5" cname="_VBOR_45" />
+      <value value="0x0400" name="4.2" cname="_VBOR_42" />
+      <value value="0x0800" name="2.7" cname="_VBOR_27" />
+      <value value="0x0C00" name="2.5" cname="_VBOR_25" />
+    </mask>
+    <mask name="CP"    value="0x3300" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x3300" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C84.xml b/src/devices/pic/xml_data/16C84.xml
new file mode 100644
index 0000000..595bcd9
--- /dev/null
+++ b/src/devices/pic/xml_data/16C84.xml
@@ -0,0 +1,99 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C84" document="010180" status="EOL" alternative="16F84A 16F627A" memory_technology="ROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="10" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="2" vdd_min="2" vdd_max="6" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12"  max="14"  nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x03FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="config"   start="0x2007" end="0x2007" />
+  <memory name="eeprom"   start="0x0000" end="0x003F" hexfile_offset="0x2100" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x001F" cmask="0x0018" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="Off" cname="_PWRTE_OFF" />
+      <value value="0x0008" name="On"  cname="_PWRTE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0010" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0010" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="RA4/T0CKI"   />
+    <pin index="4"  name="MCLR"        />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0/INT"     />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C923.xml b/src/devices/pic/xml_data/16C923.xml
new file mode 100644
index 0000000..a670a59
--- /dev/null
+++ b/src/devices/pic/xml_data/16C923.xml
@@ -0,0 +1,270 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C923" document="010181" status="NR" alternative="16C925" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x2F3F" cchecksum="0xFB0D" />
+    <checksum protected="800:FFF" bchecksum="0x516E" cchecksum="0x0323" />
+    <checksum protected="400:FFF" bchecksum="0x405E" cchecksum="0xF213" />
+    <checksum protected="All"     bchecksum="0x2F4E" cchecksum="0xFB1C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="8" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x0FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F3F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="400:FFF" cname="_CP_75"  />
+      <value value="0x2A20" name="800:FFF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="spdip" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+  <package types="plcc"  nb_pins="68" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+  </package>
+
+  <package types="tqfp"  nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C924.xml b/src/devices/pic/xml_data/16C924.xml
new file mode 100644
index 0000000..614ff48
--- /dev/null
+++ b/src/devices/pic/xml_data/16C924.xml
@@ -0,0 +1,270 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C924" document="010182" status="NR" alternative="16C925" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x2F3F" cchecksum="0xFB0D" />
+    <checksum protected="800:FFF" bchecksum="0x516E" cchecksum="0x0323" />
+    <checksum protected="400:FFF" bchecksum="0x405E" cchecksum="0xF213" />
+    <checksum protected="All"     bchecksum="0x2F4E" cchecksum="0xFB1C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="8" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x0FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F3F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="400:FFF" cname="_CP_75"  />
+      <value value="0x2A20" name="800:FFF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="spdip" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+  <package types="plcc"  nb_pins="68" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+  </package>
+
+  <package types="tqfp"  nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C925.xml b/src/devices/pic/xml_data/16C925.xml
new file mode 100644
index 0000000..b9c703d
--- /dev/null
+++ b/src/devices/pic/xml_data/16C925.xml
@@ -0,0 +1,199 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C925" document="010183" status="IP" memory_technology="EPROM" architecture="16X" id="0x0140"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x0000" end="0x0FFF" />
+  <memory name="user_ids"  start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="device_id" start="0x2006" end="0x2006" />
+  <memory name="config"    start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="CP"    value="0x0030" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x0010" name="000:EFF" cname="_CP_75"  />
+      <value value="0x0020" name="000:7FF" cname="_CP_50"  />
+      <value value="0x0030" name="Off"     cname="_CP_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="plcc" nb_pins="68" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16C926.xml b/src/devices/pic/xml_data/16C926.xml
new file mode 100644
index 0000000..4120d43
--- /dev/null
+++ b/src/devices/pic/xml_data/16C926.xml
@@ -0,0 +1,199 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16C926" document="010184" status="IP" memory_technology="EPROM" architecture="16X" id="0x0100"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x0000" end="0x1FFF" />
+  <memory name="user_ids"  start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="device_id" start="0x2006" end="0x2006" />
+  <memory name="config"    start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x007F" cmask="0x3F3F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="CP"    value="0x0030" >
+      <value value="0x0000" name="All"       cname="_CP_ALL" />
+      <value value="0x0010" name="0000:1EFF" cname="_CP_75"  />
+      <value value="0x0020" name="0000:0FFF" cname="_CP_50"  />
+      <value value="0x0030" name="Off"       cname="_CP_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="plcc" nb_pins="68" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CE623.xml b/src/devices/pic/xml_data/16CE623.xml
new file mode 100644
index 0000000..18e6848
--- /dev/null
+++ b/src/devices/pic/xml_data/16CE623.xml
@@ -0,0 +1,114 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CE623" document="010185" status="NR" alternative="16F627A" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x3D7F" cchecksum="0x094D" />
+    <checksum protected="All" bchecksum="0x3DCE" cchecksum="0x099C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0"  end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x01FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+  <memory name="eeprom"   start="0x0000" end="0x007F" hexfile_offset="?" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x3F30" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CE624.xml b/src/devices/pic/xml_data/16CE624.xml
new file mode 100644
index 0000000..4f205a7
--- /dev/null
+++ b/src/devices/pic/xml_data/16CE624.xml
@@ -0,0 +1,116 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CE624" document="010186" status="NR" alternative="16F627A" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x3B7F" cchecksum="0x074D" />
+    <checksum protected="200:3FF" bchecksum="0x4EDE" cchecksum="0x0093" />
+    <checksum protected="All"     bchecksum="0x3BCE" cchecksum="0x079C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0"  end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x03FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+  <memory name="eeprom"   start="0x0000" end="0x007F" hexfile_offset="?" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="200:3FF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CE625.xml b/src/devices/pic/xml_data/16CE625.xml
new file mode 100644
index 0000000..d7aa576
--- /dev/null
+++ b/src/devices/pic/xml_data/16CE625.xml
@@ -0,0 +1,117 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CE625" document="010187" status="NR" alternative="16F628A" memory_technology="EPROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x377F" cchecksum="0x034D" />
+    <checksum protected="400:7FF" bchecksum="0x5DEE" cchecksum="0x0FA3" />
+    <checksum protected="200:7FF" bchecksum="0x4ADE" cchecksum="0xFC93" />
+    <checksum protected="All"     bchecksum="0x37CE" cchecksum="0x039C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0"  end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x07FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="200:7FF" cname="_CP_75"  />
+      <value value="0x2A20" name="400:7FF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CR54.xml_broken b/src/devices/pic/xml_data/16CR54.xml_broken
new file mode 100644
index 0000000..cef44cb
--- /dev/null
+++ b/src/devices/pic/xml_data/16CR54.xml_broken
@@ -0,0 +1,87 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CR54" document="" status="?" memory_technology="ROM" architecture="10X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Operating characteristics ********************************************-->
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="program"  start="0x000" end="0x1FF" />
+  <memory name="user_ids" start="0x200" end="0x203" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFC" bvalue="0x00C" cmask="0x008" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0x008" >
+      <value value="0x000" name="All" cname="_CP_ON"  />
+      <value value="0x008" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="T0CKI"       />
+    <pin index="4"  name="MCLR/VPP"    />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0"         />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CR54A.xml b/src/devices/pic/xml_data/16CR54A.xml
new file mode 100644
index 0000000..c3a5d2a
--- /dev/null
+++ b/src/devices/pic/xml_data/16CR54A.xml
@@ -0,0 +1,107 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CR54A" document="010188" status="NR" alternative="16F54" memory_technology="ROM" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"             bchecksum="0x0DFF" cchecksum="0xFC47" />
+    <checksum protected="All" type="XOR4" bchecksum="0x1E07" cchecksum="0x1DF5" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"  vdd_min="2.5" vdd_max="6.25" osc="RC" />
+    <frequency start="0" end="4"  vdd_min="2.5" vdd_max="6.25" osc="XT" />
+    <frequency start="0" end="20" vdd_min="4.5" vdd_max="5.5"  osc="HS" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="0.2" vdd_min="2.5" vdd_max="6.25" osc="LP" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3.25" vdd_max="6"   osc="RC" />
+    <frequency start="0" end="4"  vdd_min="3.25" vdd_max="6"   osc="XT" />
+    <frequency start="0" end="20" vdd_min="4.5"  vdd_max="5.5" osc="HS" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x1FF" />
+  <memory name="user_ids" start="0x200" end="0x203" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFC" bvalue="0xFFF" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0xFF8" >
+      <value value="0x000" name="All" cname="_CP_ON"  />
+      <value value="0xFF8" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="T0CKI"       />
+    <pin index="4"  name="MCLR/VPP"    />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0"         />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CR54B.xml b/src/devices/pic/xml_data/16CR54B.xml
new file mode 100644
index 0000000..43456d8
--- /dev/null
+++ b/src/devices/pic/xml_data/16CR54B.xml
@@ -0,0 +1,110 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CR54B" document="010189" status="EOL" memory_technology="ROM" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x0DFF" cchecksum="0xFC47" />
+    <checksum protected="040:1FF" bchecksum="0x0DC6" cchecksum="0xF332" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20"  vdd_min="4.5" vdd_max="5.5" osc="HS" />
+    <frequency start="0" end="0.2" vdd_min="3"   vdd_max="5.5" osc="LP" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="0.2" vdd_min="2.5" vdd_max="5.5" osc="LP" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20" vdd_min="4.5" vdd_max="5.5" osc="HS" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x1FF" />
+  <memory name="user_ids" start="0x200" end="0x203" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFC" bvalue="0xFFF" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0xFF8" >
+      <value value="0x000" name="040:1FF" cname="_CP_ON"  />
+      <value value="0xFF8" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="T0CKI"       />
+    <pin index="4"  name="MCLR/VPP"    />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0"         />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CR54C.xml b/src/devices/pic/xml_data/16CR54C.xml
new file mode 100644
index 0000000..3667ce3
--- /dev/null
+++ b/src/devices/pic/xml_data/16CR54C.xml
@@ -0,0 +1,110 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CR54C" document="010190" status="NR" alternative="16F54" memory_technology="ROM" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x0DFF" cchecksum="0xFC47" />
+    <checksum protected="040:1FF" bchecksum="0x0DC6" cchecksum="0xF332" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20"  vdd_min="4.5" vdd_max="5.5" osc="HS" />
+    <frequency start="0" end="0.2" vdd_min="3"   vdd_max="5.5" osc="LP" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="0.2" vdd_min="2.5" vdd_max="5.5" osc="LP" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20" vdd_min="4.5" vdd_max="5.5" osc="HS" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x1FF" />
+  <memory name="user_ids" start="0x200" end="0x203" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFC" bvalue="0xFFF" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0xFF8" >
+      <value value="0x000" name="040:1FF" cname="_CP_ON"  />
+      <value value="0xFF8" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="T0CKI"       />
+    <pin index="4"  name="MCLR/VPP"    />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0"         />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CR56A.xml b/src/devices/pic/xml_data/16CR56A.xml
new file mode 100644
index 0000000..0b28931
--- /dev/null
+++ b/src/devices/pic/xml_data/16CR56A.xml
@@ -0,0 +1,110 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CR56A" document="010191" status="IP" memory_technology="ROM" architecture="10X" pc="10"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x0BFF" cchecksum="0xFA47" />
+    <checksum protected="040:3FF" bchecksum="0x0BC6" cchecksum="0xF132" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20"  vdd_min="4.5" vdd_max="5.5" osc="HS" />
+    <frequency start="0" end="0.2" vdd_min="3"   vdd_max="5.5" osc="LP" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="0.2" vdd_min="2.5" vdd_max="5.5" osc="LP" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20" vdd_min="4.5" vdd_max="5.5" osc="HS" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x3FF" />
+  <memory name="user_ids" start="0x400" end="0x403" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFC" bvalue="0xFFF" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0xFF8" >
+      <value value="0x000" name="040:3FF" cname="_CP_ON"  />
+      <value value="0xFF8" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="T0CKI"       />
+    <pin index="4"  name="MCLR/VPP"    />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0"         />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CR57B.xml b/src/devices/pic/xml_data/16CR57B.xml
new file mode 100644
index 0000000..caba4c3
--- /dev/null
+++ b/src/devices/pic/xml_data/16CR57B.xml
@@ -0,0 +1,125 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CR57B" document="010193" status="EOL" memory_technology="ROM" architecture="10X" pc="11"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x07FF" cchecksum="0xF647" />
+    <checksum protected="040:7FF" bchecksum="0x07C6" cchecksum="0xED32" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="6.25" osc="RC" />
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="6.25" osc="XT" />
+    <frequency start="0" end="20" vdd_min="4.5" vdd_max="5.5"  osc="HS" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="0.2" vdd_min="2.5" vdd_max="6.25" osc="LP" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3.25" vdd_max="6"   osc="RC" />
+    <frequency start="0" end="4"  vdd_min="3.25" vdd_max="6"   osc="XT" />
+    <frequency start="0" end="20" vdd_min="4.5"  vdd_max="5.5" osc="HS" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x7FF" />
+  <memory name="user_ids" start="0x800" end="0x803" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFC" bvalue="0xFFF" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0xFF8" >
+      <value value="0x000" name="040:7FF" cname="_CP_ON"  />
+      <value value="0xFF8" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="T0CKI"       />
+    <pin index="2"  name="VDD"         />
+    <pin index="3"  name="N/C"         />
+    <pin index="4"  name="VSS"         />
+    <pin index="5"  name="N/C"         />
+    <pin index="6"  name="RA0"         />
+    <pin index="7"  name="RA1"         />
+    <pin index="8"  name="RA2"         />
+    <pin index="9"  name="RA3"         />
+    <pin index="10" name="RB0"         />
+    <pin index="11" name="RB1"         />
+    <pin index="12" name="RB2"         />
+    <pin index="13" name="RB3"         />
+    <pin index="14" name="RB4"         />
+    <pin index="15" name="RB5"         />
+    <pin index="16" name="RB6"         />
+    <pin index="17" name="RB7"         />
+    <pin index="18" name="RC0"         />
+    <pin index="19" name="RC1"         />
+    <pin index="20" name="RC2"         />
+    <pin index="21" name="RC3"         />
+    <pin index="22" name="RC4"         />
+    <pin index="23" name="RC5"         />
+    <pin index="24" name="RC6"         />
+    <pin index="25" name="RC7"         />
+    <pin index="26" name="OSC2/CLKOUT" />
+    <pin index="27" name="OSC1/CLKIN"  />
+    <pin index="28" name="MCLR/VPP"    />
+  </package>
+
+  <package types="ssop"      nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CR57C.xml b/src/devices/pic/xml_data/16CR57C.xml
new file mode 100644
index 0000000..379f1bc
--- /dev/null
+++ b/src/devices/pic/xml_data/16CR57C.xml
@@ -0,0 +1,128 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CR57C" document="010194" status="NR" alternative="16F57" memory_technology="ROM" architecture="10X" pc="11"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x07FF" cchecksum="0xF647" />
+    <checksum protected="040:7FF" bchecksum="0x07C6" cchecksum="0xED32" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20"  vdd_min="4.5" vdd_max="5.5" osc="HS" />
+    <frequency start="0" end="0.2" vdd_min="3"   vdd_max="5.5" osc="LP" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="0.2" vdd_min="2.5" vdd_max="5.5" osc="LP" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20" vdd_min="4.5" vdd_max="5.5" osc="HS" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x7FF" />
+  <memory name="user_ids" start="0x800" end="0x803" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFC" bvalue="0xFFF" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0xFF8" >
+      <value value="0x000" name="040:7FF" cname="_CP_ON"  />
+      <value value="0xFF8" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="T0CKI"       />
+    <pin index="2"  name="VDD"         />
+    <pin index="3"  name="N/C"         />
+    <pin index="4"  name="VSS"         />
+    <pin index="5"  name="N/C"         />
+    <pin index="6"  name="RA0"         />
+    <pin index="7"  name="RA1"         />
+    <pin index="8"  name="RA2"         />
+    <pin index="9"  name="RA3"         />
+    <pin index="10" name="RB0"         />
+    <pin index="11" name="RB1"         />
+    <pin index="12" name="RB2"         />
+    <pin index="13" name="RB3"         />
+    <pin index="14" name="RB4"         />
+    <pin index="15" name="RB5"         />
+    <pin index="16" name="RB6"         />
+    <pin index="17" name="RB7"         />
+    <pin index="18" name="RC0"         />
+    <pin index="19" name="RC1"         />
+    <pin index="20" name="RC2"         />
+    <pin index="21" name="RC3"         />
+    <pin index="22" name="RC4"         />
+    <pin index="23" name="RC5"         />
+    <pin index="24" name="RC6"         />
+    <pin index="25" name="RC7"         />
+    <pin index="26" name="OSC2/CLKOUT" />
+    <pin index="27" name="OSC1/CLKIN"  />
+    <pin index="28" name="MCLR/VPP"    />
+  </package>
+
+  <package types="ssop"      nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CR58A.xml b/src/devices/pic/xml_data/16CR58A.xml
new file mode 100644
index 0000000..3841400
--- /dev/null
+++ b/src/devices/pic/xml_data/16CR58A.xml
@@ -0,0 +1,107 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CR58A" document="010195" status="EOL" memory_technology="ROM" architecture="10X" pc="11"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x07FF" cchecksum="0xF647" />
+    <checksum protected="040:7FF" bchecksum="0x07C6" cchecksum="0xED32" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="6.25" osc="RC" />
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="6.25" osc="XT" />
+    <frequency start="0" end="20" vdd_min="4.5" vdd_max="5.5"  osc="HS" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="0.2" vdd_min="2.5" vdd_max="6.25" osc="LP" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3.25" vdd_max="6"   osc="RC" />
+    <frequency start="0" end="4"  vdd_min="3.25" vdd_max="6"   osc="XT" />
+    <frequency start="0" end="20" vdd_min="4.5"  vdd_max="5.5" osc="HS" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x7FF" />
+  <memory name="user_ids" start="0x800" end="0x803" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFC" bvalue="0xFFF" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0xFF8" >
+      <value value="0x000" name="040:7FF" cname="_CP_ON"  />
+      <value value="0xFF8" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="T0CKI"       />
+    <pin index="4"  name="MCLR/VPP"    />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0"         />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CR58B.xml b/src/devices/pic/xml_data/16CR58B.xml
new file mode 100644
index 0000000..b450e31
--- /dev/null
+++ b/src/devices/pic/xml_data/16CR58B.xml
@@ -0,0 +1,110 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CR58B" document="010196" status="IP" memory_technology="ROM" architecture="10X" pc="11"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x07FF" cchecksum="0xF647" />
+    <checksum protected="040:7FF" bchecksum="0x07C6" cchecksum="0xED32" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20"  vdd_min="4.5" vdd_max="5.5" osc="HS" />
+    <frequency start="0" end="0.2" vdd_min="3"   vdd_max="5.5" osc="LP" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"   vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="0.2" vdd_min="2.5" vdd_max="5.5" osc="LP" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" osc="RC" />
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" osc="XT" />
+    <frequency start="0" end="20" vdd_min="4.5" vdd_max="5.5" osc="HS" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x7FF" />
+  <memory name="user_ids" start="0x800" end="0x803" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFC" bvalue="0xFFF" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0xFF8" >
+      <value value="0x000" name="040:7FF" cname="_CP_ON"  />
+      <value value="0xFF8" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="T0CKI"       />
+    <pin index="4"  name="MCLR/VPP"    />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0"         />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CR62.xml b/src/devices/pic/xml_data/16CR62.xml
new file mode 100644
index 0000000..0b27a3c
--- /dev/null
+++ b/src/devices/pic/xml_data/16CR62.xml
@@ -0,0 +1,100 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CR62" document="010197" status="EOL" memory_technology="ROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x377F" cchecksum="0x034D" />
+    <checksum protected="400:7FF" bchecksum="0x5DEE" cchecksum="0x0FA3" />
+    <checksum protected="200:7FF" bchecksum="0x4ADE" cchecksum="0xFC93" />
+    <checksum protected="All"     bchecksum="0x37CE" cchecksum="0x039C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x07FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="200:7FF" cname="_CP_75"  />
+      <value value="0x2A20" name="400:7FF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic ssop" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"        />
+    <pin index="2"  name="RA0"             />
+    <pin index="3"  name="RA1"             />
+    <pin index="4"  name="RA2"             />
+    <pin index="5"  name="RA3"             />
+    <pin index="6"  name="RA4/T0CKI"       />
+    <pin index="7"  name="RA5/SS"          />
+    <pin index="8"  name="VSS"             />
+    <pin index="9"  name="OSC1/CLKIN"      />
+    <pin index="10" name="OSC2/CLKOUT"     />
+    <pin index="11" name="RC0/T1OSO/T1CKI" />
+    <pin index="12" name="RC1/T1OSI"       />
+    <pin index="13" name="RC2/CCP1"        />
+    <pin index="14" name="RC3/SCK/SCL"     />
+    <pin index="15" name="RC4/SDI/SDA"     />
+    <pin index="16" name="RC5/SDO"         />
+    <pin index="17" name="RC6"             />
+    <pin index="18" name="RC7"             />
+    <pin index="19" name="VSS"             />
+    <pin index="20" name="VDD"             />
+    <pin index="21" name="RB0/INT"         />
+    <pin index="22" name="RB1"             />
+    <pin index="23" name="RB2"             />
+    <pin index="24" name="RB3"             />
+    <pin index="25" name="RB4"             />
+    <pin index="26" name="RB5"             />
+    <pin index="27" name="RB6"             />
+    <pin index="28" name="RB7"             />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CR620A.xml b/src/devices/pic/xml_data/16CR620A.xml
new file mode 100644
index 0000000..a2e6db3
--- /dev/null
+++ b/src/devices/pic/xml_data/16CR620A.xml
@@ -0,0 +1,113 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CR620A" document="010198" status="IP" memory_technology="ROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x3D7F" cchecksum="0x094D" />
+    <checksum protected="All" bchecksum="0x3DCE" cchecksum="0x099C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0"  end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x01FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x3F30" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CR63.xml b/src/devices/pic/xml_data/16CR63.xml
new file mode 100644
index 0000000..08d6f3f
--- /dev/null
+++ b/src/devices/pic/xml_data/16CR63.xml
@@ -0,0 +1,100 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CR63" document="010199" status="IP" memory_technology="ROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x2F7F" cchecksum="0xFB4D" />
+    <checksum protected="800:FFF" bchecksum="0x51EE" cchecksum="0x03A3" />
+    <checksum protected="400:FFF" bchecksum="0x40DE" cchecksum="0xF293" />
+    <checksum protected="All"     bchecksum="0x2FCE" cchecksum="0xFB9C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="3" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x0FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="400:FFF" cname="_CP_75"  />
+      <value value="0x2A20" name="800:FFF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"        />
+    <pin index="2"  name="RA0"             />
+    <pin index="3"  name="RA1"             />
+    <pin index="4"  name="RA2"             />
+    <pin index="5"  name="RA3"             />
+    <pin index="6"  name="RA4/T0CKI"       />
+    <pin index="7"  name="RA5/SS"          />
+    <pin index="8"  name="VSS"             />
+    <pin index="9"  name="OSC1/CLKIN"      />
+    <pin index="10" name="OSC2/CLKOUT"     />
+    <pin index="11" name="RC0/T1OSI/T1CKI" />
+    <pin index="12" name="RC1/T1OSO/CCP2"  />
+    <pin index="13" name="RC2/CCP1"        />
+    <pin index="14" name="RC3/SCK/SCL"     />
+    <pin index="15" name="RC4/SDI/SDA"     />
+    <pin index="16" name="RC5/SDO"         />
+    <pin index="17" name="RC6/TX/CK"       />
+    <pin index="18" name="RC7/RX/DT"       />
+    <pin index="19" name="VSS"             />
+    <pin index="20" name="VDD"             />
+    <pin index="21" name="RB0/INT"         />
+    <pin index="22" name="RB1"             />
+    <pin index="23" name="RB2"             />
+    <pin index="24" name="RB3"             />
+    <pin index="25" name="RB4"             />
+    <pin index="26" name="RB5"             />
+    <pin index="27" name="RB6"             />
+    <pin index="28" name="RB7"             />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CR64.xml b/src/devices/pic/xml_data/16CR64.xml
new file mode 100644
index 0000000..e155a97
--- /dev/null
+++ b/src/devices/pic/xml_data/16CR64.xml
@@ -0,0 +1,206 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CR64" document="010200" status="EOL" memory_technology="ROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x377F" cchecksum="0x034D" />
+    <checksum protected="400:7FF" bchecksum="0x5DEE" cchecksum="0x0FA3" />
+    <checksum protected="200:7FF" bchecksum="0x4ADE" cchecksum="0xFC93" />
+    <checksum protected="All"     bchecksum="0x37CE" cchecksum="0x039C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x07FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="200:7FF" cname="_CP_75"  />
+      <value value="0x2A20" name="400:7FF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="mqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CR65.xml b/src/devices/pic/xml_data/16CR65.xml
new file mode 100644
index 0000000..df4d3f4
--- /dev/null
+++ b/src/devices/pic/xml_data/16CR65.xml
@@ -0,0 +1,253 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CR65" document="010201" status="IP" memory_technology="ROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x2F7F" cchecksum="0xFB4D" />
+    <checksum protected="800:FFF" bchecksum="0x51EE" cchecksum="0x03A3" />
+    <checksum protected="400:FFF" bchecksum="0x40DE" cchecksum="0xF293" />
+    <checksum protected="All"     bchecksum="0x2FCE" cchecksum="0xFB9C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="3" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x0FFF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="400:FFF" cname="_CP_75"  />
+      <value value="0x2A20" name="800:FFF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="mqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CR72.xml b/src/devices/pic/xml_data/16CR72.xml
new file mode 100644
index 0000000..efaa9f8
--- /dev/null
+++ b/src/devices/pic/xml_data/16CR72.xml
@@ -0,0 +1,100 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CR72" document="010202" status="IP" memory_technology="ROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x377F" cchecksum="0x034D" />
+    <checksum protected="400:7FF" bchecksum="0x5DEE" cchecksum="0x0FA3" />
+    <checksum protected="200:7FF" bchecksum="0x4ADE" cchecksum="0xFC93" />
+    <checksum protected="All"     bchecksum="0x37CE" cchecksum="0x039C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="5.5"   />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x07FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="config"   start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3F7F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="CP"    value="0x3F30" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1510" name="200:7FF" cname="_CP_75"  />
+      <value value="0x2A20" name="400:7FF" cname="_CP_50"  />
+      <value value="0x3F30" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+<package types="sdip soic ssop" nb_pins="28" >
+	<pin index="1"  name="MCLR/VPP"        />
+	<pin index="2"  name="RA0/AN0"         />
+	<pin index="3"  name="RA1/AN1"         />
+	<pin index="4"  name="RA2/AN2"         />
+	<pin index="5"  name="RA3/AN3/VREF"    />
+	<pin index="6"  name="RA4/T0CKI"       />
+	<pin index="7"  name="RA5/SS/AN4"      />
+	<pin index="8"  name="VSS"             />
+	<pin index="9"  name="OSC1/CLKIN"      />
+	<pin index="10" name="OSC2/CLKOUT"     />
+	<pin index="11" name="RC0/T1OSO/T1CKI" />
+	<pin index="12" name="RC1/T1OSI"       />
+	<pin index="13" name="RC2/CCP1"        />
+	<pin index="14" name="RC3/SCK/SCL"     />
+	<pin index="15" name="RC4/SDI/SDA"     />
+	<pin index="16" name="RC5/SDO"         />
+	<pin index="17" name="RC6"             />
+	<pin index="18" name="RC7"             />
+	<pin index="19" name="VSS"             />
+	<pin index="20" name="VDD"             />
+	<pin index="21" name="RB0/INT"         />
+	<pin index="22" name="RB1"             />
+	<pin index="23" name="RB2"             />
+	<pin index="24" name="RB3"             />
+	<pin index="25" name="RB4"             />
+	<pin index="26" name="RB5"             />
+	<pin index="27" name="RB6"             />
+	<pin index="28" name="RB7"             />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CR73.xml b/src/devices/pic/xml_data/16CR73.xml
new file mode 100644
index 0000000..6513255
--- /dev/null
+++ b/src/devices/pic/xml_data/16CR73.xml
@@ -0,0 +1,127 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CR73" document="026371" status="IP" memory_technology="ROM" architecture="16X" id="0x0600"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+<!--  <checksums>
+    <checksum protected="Off" bchecksum="0xF05F" cchecksum="0x7C2D" />
+    <checksum protected="All" bchecksum="0x005E" cchecksum="0x005E" />
+  </checksums>
+-->
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"           min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"      min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x0000" end="0x0FFF" />
+  <memory name="user_ids"  start="0x2000" end="0x2003" rmask="0x000F" />
+  <memory name="device_id" start="0x2006" end="0x2006" />
+  <memory name="config"    start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x005F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" ecnames="_WDTEN_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  ecnames="_WDTEN_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  ecnames="_PWRTEN_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" ecnames="_PWRTEN_OFF" />
+    </mask>
+    <mask name="CP"    value="0x0010" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x0010" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" ecnames="_BOREN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  ecnames="_BOREN_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"        />
+    <pin index="2"  name="RA0/AN0"         />
+    <pin index="3"  name="RA1/AN1"         />
+    <pin index="4"  name="RA2/AN2"         />
+    <pin index="5"  name="RA3/AN3/VREF"    />
+    <pin index="6"  name="RA4/T0CKI"       />
+    <pin index="7"  name="RA5/SS/AN4"      />
+    <pin index="8"  name="VSS"             />
+    <pin index="9"  name="OSC1/CLKIN"      />
+    <pin index="10" name="OSC2/CLKOUT"     />
+    <pin index="11" name="RC0/T1OSI/T1CKI" />
+    <pin index="12" name="RC1/T1OSO/CCP2"  />
+    <pin index="13" name="RC2/CCP1"        />
+    <pin index="14" name="RC3/SCK/SCL"     />
+    <pin index="15" name="RC4/SDI/SDA"     />
+    <pin index="16" name="RC5/SDO"         />
+    <pin index="17" name="RC6/TX/CK"       />
+    <pin index="18" name="RC7/RX/DT"       />
+    <pin index="19" name="VSS"             />
+    <pin index="20" name="VDD"             />
+    <pin index="21" name="RB0/INT"         />
+    <pin index="22" name="RB1"             />
+    <pin index="23" name="RB2"             />
+    <pin index="24" name="RB3"             />
+    <pin index="25" name="RB4"             />
+    <pin index="26" name="RB5"             />
+    <pin index="27" name="RB6/PGC"         />
+    <pin index="28" name="RB7/PGD"         />
+  </package>
+
+  <package types="mlf"            nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CR74.xml b/src/devices/pic/xml_data/16CR74.xml
new file mode 100644
index 0000000..6fec92e
--- /dev/null
+++ b/src/devices/pic/xml_data/16CR74.xml
@@ -0,0 +1,202 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CR74" document="026370" status="IP" memory_technology="ROM" architecture="16X" id="0x0620"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+<!--  <checksums>
+    <checksum protected="Off" bchecksum="0xF05F" cchecksum="0x7C2D" />
+    <checksum protected="All" bchecksum="0x005E" cchecksum="0x005E" />
+  </checksums>
+-->
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"           min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"      min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x0000" end="0x0FFF" />
+  <memory name="user_ids"  start="0x2000" end="0x2003" rmask="0x000F" />
+  <memory name="device_id" start="0x2006" end="0x2006" />
+  <memory name="config"    start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x005F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" ecnames="_WDTEN_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  ecnames="_WDTEN_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  ecnames="_PWRTEN_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" ecnames="_PWRTEN_OFF" />
+    </mask>
+    <mask name="CP"    value="0x0010" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x0010" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" ecnames="_BOREN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  ecnames="_BOREN_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CR76.xml b/src/devices/pic/xml_data/16CR76.xml
new file mode 100644
index 0000000..dd9916a
--- /dev/null
+++ b/src/devices/pic/xml_data/16CR76.xml
@@ -0,0 +1,127 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CR76" document="025241" status="IP" memory_technology="ROM" architecture="16X" id="0x0640"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+<!--  <checksums>
+    <checksum protected="Off" bchecksum="0xE05F" cchecksum="0x8C2D" />
+    <checksum protected="All" bchecksum="0x005E" cchecksum="0x005E" />
+  </checksums>
+-->
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"           min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"      min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x0000" end="0x1FFF" />
+  <memory name="user_ids"  start="0x2000" end="0x2003" rmask="0x000F" />
+  <memory name="device_id" start="0x2006" end="0x2006" />
+  <memory name="config"    start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x005F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" ecnames="_WDTEN_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  ecnames="_WDTEN_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  ecnames="_PWRTEN_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" ecnames="_PWRTEN_OFF" />
+    </mask>
+    <mask name="CP"    value="0x0010" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x0010" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" ecnames="_BOREN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  ecnames="_BOREN_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"        />
+    <pin index="2"  name="RA0/AN0"         />
+    <pin index="3"  name="RA1/AN1"         />
+    <pin index="4"  name="RA2/AN2"         />
+    <pin index="5"  name="RA3/AN3/VREF"    />
+    <pin index="6"  name="RA4/T0CKI"       />
+    <pin index="7"  name="RA5/SS/AN4"      />
+    <pin index="8"  name="VSS"             />
+    <pin index="9"  name="OSC1/CLKIN"      />
+    <pin index="10" name="OSC2/CLKOUT"     />
+    <pin index="11" name="RC0/T1OSI/T1CKI" />
+    <pin index="12" name="RC1/T1OSO/CCP2"  />
+    <pin index="13" name="RC2/CCP1"        />
+    <pin index="14" name="RC3/SCK/SCL"     />
+    <pin index="15" name="RC4/SDI/SDA"     />
+    <pin index="16" name="RC5/SDO"         />
+    <pin index="17" name="RC6/TX/CK"       />
+    <pin index="18" name="RC7/RX/DT"       />
+    <pin index="19" name="VSS"             />
+    <pin index="20" name="VDD"             />
+    <pin index="21" name="RB0/INT"         />
+    <pin index="22" name="RB1"             />
+    <pin index="23" name="RB2"             />
+    <pin index="24" name="RB3"             />
+    <pin index="25" name="RB4"             />
+    <pin index="26" name="RB5"             />
+    <pin index="27" name="RB6/PGC"         />
+    <pin index="28" name="RB7/PGD"         />
+  </package>
+
+  <package types="mlf"            nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CR77.xml b/src/devices/pic/xml_data/16CR77.xml
new file mode 100644
index 0000000..661ebf0
--- /dev/null
+++ b/src/devices/pic/xml_data/16CR77.xml
@@ -0,0 +1,202 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CR77" document="025194" status="IP" memory_technology="ROM" architecture="16X" id="0x0660"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+<!--  <checksums>
+    <checksum protected="Off" bchecksum="0xE05F" cchecksum="0x8C2D" />
+    <checksum protected="All" bchecksum="0x005E" cchecksum="0x005E" />
+  </checksums>
+-->
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"           min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"      min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x0000" end="0x1FFF" />
+  <memory name="user_ids"  start="0x2000" end="0x2003" rmask="0x000F" />
+  <memory name="device_id" start="0x2006" end="0x2006" />
+  <memory name="config"    start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x005F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" ecnames="_WDTEN_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  ecnames="_WDTEN_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  ecnames="_PWRTEN_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" ecnames="_PWRTEN_OFF" />
+    </mask>
+    <mask name="CP"    value="0x0010" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x0010" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" ecnames="_BOREN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  ecnames="_BOREN_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CR83.xml b/src/devices/pic/xml_data/16CR83.xml
new file mode 100644
index 0000000..01c4166
--- /dev/null
+++ b/src/devices/pic/xml_data/16CR83.xml
@@ -0,0 +1,110 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CR83" document="010203" status="NR" alternative="16F84A" memory_technology="ROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"                  bchecksum="0x3DFF" cchecksum="0x09CD" />
+    <checksum protected="All" mprotected="CPD" bchecksum="0x3E0E" cchecksum="0x09DC" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="10" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="2" vdd_min="2" vdd_max="6" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12"  max="14"  nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x01FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="config"   start="0x2007" end="0x2007" />
+  <memory name="eeprom"   start="0x0000" end="0x003F" hexfile_offset="0x2100" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3FFF" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_DP_ON"  />
+      <value value="0x0080" name="Off" cname="_DP_OFF" />
+    </mask>
+    <mask name="CP"    value="0x3F70" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x3F70" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="RA4/T0CKI"   />
+    <pin index="4"  name="MCLR"        />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0/INT"     />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16CR84.xml b/src/devices/pic/xml_data/16CR84.xml
new file mode 100644
index 0000000..5d93205
--- /dev/null
+++ b/src/devices/pic/xml_data/16CR84.xml
@@ -0,0 +1,110 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16CR84" document="010204" status="NR" alternative="16F84A" memory_technology="ROM" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"                  bchecksum="0x3BFF" cchecksum="0x07CD" />
+    <checksum protected="All" mprotected="CPD" bchecksum="0x3C0E" cchecksum="0x07DC" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="10" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="2" vdd_min="2" vdd_max="6" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12"  max="14"  nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x03FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="config"   start="0x2007" end="0x2007" />
+  <memory name="eeprom"   start="0x0000" end="0x003F" hexfile_offset="0x2100" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3FFF"  >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_DP_ON"  />
+      <value value="0x0080" name="Off" cname="_DP_OFF" />
+    </mask>
+    <mask name="CP"    value="0x3F70" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x3F70" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="RA4/T0CKI"   />
+    <pin index="4"  name="MCLR"        />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0/INT"     />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F505.xml b/src/devices/pic/xml_data/16F505.xml
new file mode 100644
index 0000000..bbc2607
--- /dev/null
+++ b/src/devices/pic/xml_data/16F505.xml
@@ -0,0 +1,81 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F505" document="020096" status="IP" memory_technology="FLASH" architecture="10X" pc="12"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xEC40" cchecksum="0xDA88" />
+    <checksum protected="040:3FE" bchecksum="0xEC2F" cchecksum="0xD19B" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.5"  max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"            start="0x000" end="0x3FE" />
+  <memory name="calibration"        start="0x3FF" end="0x3FF" cal_opmask="0xF00"     cal_opcode="0xC00" />
+  <memory name="user_ids"           start="0x400" end="0x403" rmask="0x00F"          />
+  <memory name="config"             start="0x7FF" end="0x7FF" hexfile_offset="0xFFF" />
+  <memory name="calibration_backup" start="0x404" end="0x404" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFF" bvalue="0x03F" >
+    <mask name="FOSC"  value="0x007" >
+      <value value="0x000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x003" name="EC_IO"        cname="_EC_RB4EN"           />
+      <value value="0x004" name="INTRC_IO"     cname="_IntRC_OSC_RB4EN"    />
+      <value value="0x005" name="INTRC_CLKOUT" cname="_IntRC_OSC_CLKOUTEN" />
+      <value value="0x006" name="EXTRC_IO"     cname="_ExtRC_OSC_RB4EN"    />
+      <value value="0x007" name="EXTRC_CLKOUT" cname="_ExtRC_OSC_CLKOUTEN" />
+    </mask>
+    <mask name="WDT"   value="0x008" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"    value="0x010" >
+      <value value="0x000" name="040:3FE" cname="_CP_ON"  />
+      <value value="0x010" name="Off"     cname="_CP_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x020" >
+      <value value="0x000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop" nb_pins="14" >
+    <pin index="1"  name="VDD"             />
+    <pin index="2"  name="RB5/OSC1/CLKIN"  />
+    <pin index="3"  name="RB4/OSC2/CLKOUT" />
+    <pin index="4"  name="RB3/MCLR/VPP"    />
+    <pin index="5"  name="RC5/T0CKI"       />
+    <pin index="6"  name="RC4"             />
+    <pin index="7"  name="RC3"             />
+    <pin index="8"  name="RC2"             />
+    <pin index="9"  name="RC1"             />
+    <pin index="10" name="RC0"             />
+    <pin index="11" name="RB2"             />
+    <pin index="12" name="RB1/ICSPCLK"     />
+    <pin index="13" name="RB0/ICSPDAT"     />
+    <pin index="14" name="VSS"             />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F506.xml b/src/devices/pic/xml_data/16F506.xml
new file mode 100644
index 0000000..4fa7a47
--- /dev/null
+++ b/src/devices/pic/xml_data/16F506.xml
@@ -0,0 +1,86 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F506" document="023671" status="IP" memory_technology="FLASH" architecture="10X" pc="10"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0xEC80" cchecksum="0xDAC8" />
+    <checksum protected="040:3FE" bchecksum="0xECAF" cchecksum="0xD21B" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="8"  vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="8"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.5"  max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"            start="0x000" end="0x3FE" />
+  <memory name="calibration"        start="0x3FF" end="0x3FF" cal_opmask="0xF00"     cal_opcode="0xC00" />
+  <memory name="user_ids"           start="0x400" end="0x403" rmask="0x00F"          />
+  <memory name="config"             start="0x7FF" end="0x7FF" hexfile_offset="0xFFF" />
+  <memory name="calibration_backup" start="0x404" end="0x404" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFF" bvalue="0x07F" >
+    <mask name="FOSC"   value="0x007" >
+      <value value="0x000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x004" name="INTRC_IO"     cname="_IntRC_OSC_RB4EN"    />
+      <value value="0x005" name="INTRC_CLKOUT" cname="_IntRC_OSC_CLKOUTEN" />
+      <value value="0x006" name="EXTRC_IO"     cname="_ExtRC_OSC_RB4EN"    />
+      <value value="0x007" name="EXTRC_CLKOUT" cname="_ExtRC_OSC_CLKOUTEN" />
+    </mask>
+    <mask name="WDT"    value="0x008" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"     value="0x010" >
+      <value value="0x000" name="040:3FE" cname="_CP_ON"  />
+      <value value="0x010" name="Off"     cname="_CP_OFF" />
+    </mask>
+    <mask name="MCLRE"  value="0x020" >
+      <value value="0x000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="IOSCFS" value="0x040" >
+      <value value="0x000" name="4MHZ" cname="_IOSCFS_OFF" />
+      <value value="0x040" name="8MHZ" cname="_IOSCFS_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop" nb_pins="14" >
+    <pin index="1"  name="VDD"                   />
+    <pin index="2"  name="RB5/OSC1/CLKIN"        />
+    <pin index="3"  name="RB4/OSC2/CLKOUT"       />
+    <pin index="4"  name="RB3/MCLR/VPP"          />
+    <pin index="5"  name="RC5/T0CKI"             />
+    <pin index="6"  name="RC4/C2OUT"             />
+    <pin index="7"  name="RC3"                   />
+    <pin index="8"  name="RC2/CVREF"             />
+    <pin index="9"  name="RC1/C2IN-"             />
+    <pin index="10" name="RC0/C2IN+"             />
+    <pin index="11" name="RB2/AN2/C1OUT"         />
+    <pin index="12" name="RB1/AN1/C1IN-/ICSPCLK" />
+    <pin index="13" name="RB0/AN0/C1IN+/ICSPDAT" />
+    <pin index="14" name="VSS"                   />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F54.xml b/src/devices/pic/xml_data/16F54.xml
new file mode 100644
index 0000000..4b55624
--- /dev/null
+++ b/src/devices/pic/xml_data/16F54.xml
@@ -0,0 +1,98 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F54" document="010205" status="IP" memory_technology="FLASH" architecture="10X" pc="9"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     constant="0x0FF0" bchecksum="0x0DFF" cchecksum="0xFC47" />
+    <checksum protected="040:1FF" constant="0x0FF0" bchecksum="0x1DB6" cchecksum="0x0322" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.5"  max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x1FF" />
+  <memory name="user_ids" start="0x200" end="0x203" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFF" bvalue="0x00F" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0x008" >
+      <value value="0x000" name="040:1FF" cname="_CP_ON"  />
+      <value value="0x008" name="Off"     cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="T0CKI"       />
+    <pin index="4"  name="MCLR/VPP"    />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0"         />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6/ICSPCLK" />
+    <pin index="13" name="RB7/ICSPDAT" />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F57.xml b/src/devices/pic/xml_data/16F57.xml
new file mode 100644
index 0000000..e84e053
--- /dev/null
+++ b/src/devices/pic/xml_data/16F57.xml
@@ -0,0 +1,116 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F57" document="010206" status="IP" memory_technology="FLASH" architecture="10X" pc="11"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     constant="0x0FF0" bchecksum="0x07FF" cchecksum="0xF647" />
+    <checksum protected="040:7FF" constant="0x0FF0" bchecksum="0x17B6" cchecksum="0xFD22" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.5"  max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x7FF" />
+  <memory name="user_ids" start="0x800" end="0x803" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFF" bvalue="0x00F" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0x008" >
+      <value value="0x000" name="040:7FF" cname="_CP_ON"  />
+      <value value="0x008" name="Off"     cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="T0CKI"       />
+    <pin index="2"  name="VDD"         />
+    <pin index="3"  name="N/C"         />
+    <pin index="4"  name="VSS"         />
+    <pin index="5"  name="N/C"         />
+    <pin index="6"  name="RA0"         />
+    <pin index="7"  name="RA1"         />
+    <pin index="8"  name="RA2"         />
+    <pin index="9"  name="RA3"         />
+    <pin index="10" name="RB0"         />
+    <pin index="11" name="RB1"         />
+    <pin index="12" name="RB2"         />
+    <pin index="13" name="RB3"         />
+    <pin index="14" name="RB4"         />
+    <pin index="15" name="RB5"         />
+    <pin index="16" name="RB6/ICSPCLK" />
+    <pin index="17" name="RB7/ICSPDAT" />
+    <pin index="18" name="RC0"         />
+    <pin index="19" name="RC1"         />
+    <pin index="20" name="RC2"         />
+    <pin index="21" name="RC3"         />
+    <pin index="22" name="RC4"         />
+    <pin index="23" name="RC5"         />
+    <pin index="24" name="RC6"         />
+    <pin index="25" name="RC7"         />
+    <pin index="26" name="OSC2/CLKOUT" />
+    <pin index="27" name="OSC1/CLKIN"  />
+    <pin index="28" name="MCLR/VPP"    />
+  </package>
+
+  <package types="ssop"      nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F59.xml b/src/devices/pic/xml_data/16F59.xml
new file mode 100644
index 0000000..b29659a
--- /dev/null
+++ b/src/devices/pic/xml_data/16F59.xml
@@ -0,0 +1,144 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F59" document="021222" status="IP" memory_technology="FLASH" architecture="10X" pc="11"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     constant="0x0FF0" bchecksum="0x07FF" cchecksum="0xF647" />
+    <checksum protected="040:7FF" constant="0x0FF0" bchecksum="0x17B6" cchecksum="0xFD22" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.5"  max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x7FF" />
+  <memory name="user_ids" start="0x800" end="0x803" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFF" bvalue="0x00F" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0x008" >
+      <value value="0x000" name="040:7FF" cname="_CP_ON"  />
+      <value value="0x008" name="Off"     cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="RA0"         />
+    <pin index="2"  name="RA1"         />
+    <pin index="3"  name="RA2"         />
+    <pin index="4"  name="RA3"         />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0"         />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6/ICSPCLK" />
+    <pin index="13" name="RB7/ICSPDAT" />
+    <pin index="14" name="MCLR/VPP"    />
+    <pin index="15" name="VDD"         />
+    <pin index="16" name="RC0"         />
+    <pin index="17" name="RC1"         />
+    <pin index="18" name="RC2"         />
+    <pin index="19" name="RC3"         />
+    <pin index="20" name="RC4"         />
+    <pin index="21" name="RC5"         />
+    <pin index="22" name="RC6"         />
+    <pin index="23" name="RC7"         />
+    <pin index="24" name="RD0"         />
+    <pin index="25" name="VAA"         />
+    <pin index="26" name="RD1"         />
+    <pin index="27" name="RD2"         />
+    <pin index="28" name="RD3"         />
+    <pin index="29" name="RD4"         />
+    <pin index="30" name="RD5"         />
+    <pin index="31" name="RD6"         />
+    <pin index="32" name="RD7"         />
+    <pin index="33" name="OSC2/CLKOUT" />
+    <pin index="34" name="OSC1/CLKIN"  />
+    <pin index="35" name="VDD"         />
+    <pin index="36" name="RE4"         />
+    <pin index="37" name="RE5"         />
+    <pin index="38" name="RE6"         />
+    <pin index="39" name="RE7"         />
+    <pin index="40" name="T0CKI"       />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F610.xml b/src/devices/pic/xml_data/16F610.xml
new file mode 100644
index 0000000..46795b1
--- /dev/null
+++ b/src/devices/pic/xml_data/16F610.xml
@@ -0,0 +1,123 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F610" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x2260" id_high_voltage="0x22A0"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="028257" datasheet="41288" progsheet="41284" erratas="80296" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xFFFF" cchecksum="0xCBCD" />
+    <checksum protected="All" bchecksum="0x03BE" cchecksum="0xCF8C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="8"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="8"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended" special="high_voltage">
+    <frequency start="0"  end="8"  vdd_min="2"   vdd_max="5.0" />
+    <frequency start="8"  end="10" vdd_min="3"   vdd_max="5.0" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.0" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13"  nominal="11.5" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"    />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"    />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x03FF" />
+  <memory name="calibration"  start="0x2008" end="0x2008" cal_opmask="0x0000" cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"      />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x03FF" >
+    <mask name="FOSC"   value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"    value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE"  value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE"  value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"     value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="IOSCFS" value="0x0080" >
+      <value value="0x0000" name="4MHZ" cname="_IOSCFS_4MHZ" />
+      <value value="0x0080" name="8MHZ" cname="_IOSCFS_8MHZ" />
+    </mask>
+    <mask name="BODEN"  value="0x0300" >
+      <value value="default" name="Off"    cname="_BOR_OFF"    />
+      <value value="0x0200" name="On_run" cname="_BOR_NSLEEP" />
+      <value value="0x0300" name="On"     cname="_BOR_ON"     />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop" nb_pins="14" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="16" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F616.xml b/src/devices/pic/xml_data/16F616.xml
new file mode 100644
index 0000000..9f8ca55
--- /dev/null
+++ b/src/devices/pic/xml_data/16F616.xml
@@ -0,0 +1,124 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F616" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x1240" id_high_voltage="0x1260"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="026028" datasheet="41288" progsheet="41284" erratas="80296" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xFBFF" cchecksum="0xC7CD" />
+    <checksum protected="All" bchecksum="0xFFBE" cchecksum="0xCB8C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <frequency_range name="extended" special="high_voltage">
+    <frequency start="0"  end="8"  vdd_min="2"   vdd_max="5.0" />
+    <frequency start="8"  end="10" vdd_min="3"   vdd_max="5.0" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.0" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13"  nominal="11.5" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"    />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"    />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x07FF" />
+  <memory name="calibration"  start="0x2008" end="0x2008" cal_opmask="0x0000" cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"      />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x03FF" >
+    <mask name="FOSC"   value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"    value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE"  value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE"  value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"     value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="IOSCFS" value="0x0080" >
+      <value value="0x0000" name="4MHZ" cname="_IOSCFS_4MHZ" />
+      <value value="0x0080" name="8MHZ" cname="_IOSCFS_8MHZ" />
+    </mask>
+    <mask name="BODEN"  value="0x0300" >
+      <value value="default" name="Off"    cname="_BOR_OFF"    />
+      <value value="0x0200" name="On_run" cname="_BOR_NSLEEP" />
+      <value value="0x0300" name="On"     cname="_BOR_ON"     />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop" nb_pins="14" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="16" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F627.xml b/src/devices/pic/xml_data/16F627.xml
new file mode 100644
index 0000000..7ce03a5
--- /dev/null
+++ b/src/devices/pic/xml_data/16F627.xml
@@ -0,0 +1,143 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F627" status="NR" alternative="16F627A" memory_technology="FLASH" self_write="no" architecture="16X" id="0x07A0"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010207" datasheet="40300" progsheet="30034" erratas="80073" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x39FF" cchecksum="0x05CD" />
+    <checksum protected="200:3FF" bchecksum="0x4DFE" cchecksum="0xFFB3" />
+    <checksum protected="All"     bchecksum="0x3BFE" cchecksum="0x07CC" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0"  end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4.5" />
+  </frequency_range>
+  <frequency_range name="commercial" special="low_power" >
+    <frequency start="0"  end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13.5" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"  nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x0000" end="0x03FF" />
+  <memory name="user_ids"  start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id" start="0x2006" end="0x2006" />
+  <memory name="config"    start="0x2007" end="0x2007" />
+  <memory name="eeprom"    start="0x0000" end="0x007F" hexfile_offset="0x2100" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3DFF" icnames="_CP_50" >
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="FOSC"  value="0x0013" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EXTCLK_OSC"         />
+      <value value="0x0010" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" />
+      <value value="0x0011" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   />
+      <value value="0x0012" name="ER_IO"        cname="_ER_OSC_NOCLKOUT"    />
+      <value value="0x0013" name="ER_CLKOUT"    cname="_ER_OSC_CLKOUT"      />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="LVP"   value="0x0080" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x0080" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="CPD"   value="0x0100" >
+      <value value="0x0000" name="All" cname="_DATA_CP_ON"  />
+      <value value="0x0100" name="Off" cname="_DATA_CP_OFF" />
+    </mask>
+    <mask name="CP"    value="0x3C00" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1400" name="200:3FF" cname="_CP_75"  />
+      <value value="0x3C00" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2/AN2/VREF"        />
+    <pin index="2"  name="RA3/AN3/CMP1"        />
+    <pin index="3"  name="RA4/T0CKI/CMP2"      />
+    <pin index="4"  name="RA5/MCLR/VPP"        />
+    <pin index="5"  name="VSS"                 />
+    <pin index="6"  name="RB0/INT"             />
+    <pin index="7"  name="RB1/RX/DT"           />
+    <pin index="8"  name="RB2/TX/CK"           />
+    <pin index="9"  name="RB3/CCP1"            />
+    <pin index="10" name="RB4/PGM"             />
+    <pin index="11" name="RB5"                 />
+    <pin index="12" name="RB6/T1OSI/PGC"       />
+    <pin index="13" name="RB7/T1OSO/T1CKI/PGD" />
+    <pin index="14" name="VDD"                 />
+    <pin index="15" name="RA6/OSC2/CLKOUT"     />
+    <pin index="16" name="RA7/OSC1/CLKIN"      />
+    <pin index="17" name="RA0/AN0"             />
+    <pin index="18" name="RA1/AN1"             />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F627A.xml b/src/devices/pic/xml_data/16F627A.xml
new file mode 100644
index 0000000..de43d7a
--- /dev/null
+++ b/src/devices/pic/xml_data/16F627A.xml
@@ -0,0 +1,164 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F627A" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x1040"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010208" datasheet="40044" progsheet="41196" erratas="80151" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x1DFF" cchecksum="0xE9CD" />
+    <checksum protected="All"     bchecksum="0x1FFE" cchecksum="0xEBCC" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0"  end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13.5" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"  nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x03FF" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x007F" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x21FF" >
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="FOSC"  value="0x0013" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"              />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"              />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"              />
+      <value value="0x0003" name="EC_IO"        cname="_EXTCLK_OSC"          />
+      <value value="0x0010" name="INTRC_IO"     cname="_INTOSC_OSC_NOCLKOUT" ecnames="_INTRC_OSC_NOCLKOUT" />
+      <value value="0x0011" name="INTRC_CLKOUT" cname="_INTOSC_OSC_CLKOUT"   ecnames="_INTRC_OSC_CLKOUT"   />
+      <value value="0x0012" name="ER_IO"        cname="_RC_OSC_NOCLKOUT"     ecnames="_ER_OSC_NOCLKOUT"    />
+      <value value="0x0013" name="ER_CLKOUT"    cname="_RC_OSC_CLKOUT"       ecnames="_ER_OSC_CLKOUT"      />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BOREN_OFF" ecnames="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BOREN_ON"  ecnames="_BODEN_ON"  />
+    </mask>
+    <mask name="LVP"   value="0x0080" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x0080" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="CPD"   value="0x0100" >
+      <value value="0x0000" name="All" cname="_DATA_CP_ON"  />
+      <value value="0x0100" name="Off" cname="_DATA_CP_OFF" />
+    </mask>
+    <mask name="CP"    value="0x2000" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x2000" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2/AN2/VREF"        />
+    <pin index="2"  name="RA3/AN3/CMP1"        />
+    <pin index="3"  name="RA4/T0CKI/CMP2"      />
+    <pin index="4"  name="RA5/MCLR/VPP"        />
+    <pin index="5"  name="VSS"                 />
+    <pin index="6"  name="RB0/INT"             />
+    <pin index="7"  name="RB1/RX/DT"           />
+    <pin index="8"  name="RB2/TX/CK"           />
+    <pin index="9"  name="RB3/CCP1"            />
+    <pin index="10" name="RB4/PGM"             />
+    <pin index="11" name="RB5"                 />
+    <pin index="12" name="RB6/T1OSI/PGC"       />
+    <pin index="13" name="RB7/T1OSO/T1CKI/PGD" />
+    <pin index="14" name="VDD"                 />
+    <pin index="15" name="RA6/OSC2/CLKOUT"     />
+    <pin index="16" name="RA7/OSC1/CLKIN"      />
+    <pin index="17" name="RA0/AN0"             />
+    <pin index="18" name="RA1/AN1"             />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F628.xml b/src/devices/pic/xml_data/16F628.xml
new file mode 100644
index 0000000..fed16fa
--- /dev/null
+++ b/src/devices/pic/xml_data/16F628.xml
@@ -0,0 +1,145 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F628" status="NR" alternative="16F628A" memory_technology="FLASH" self_write="no" architecture="16X" id="0x07C0"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010209" datasheet="40300" progsheet="30034" erratas="80073" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x35FF" cchecksum="0x01CD" />
+    <checksum protected="400:7FF" bchecksum="0x5BFE" cchecksum="0x0DB3" />
+    <checksum protected="200:7FF" bchecksum="0x49FE" cchecksum="0xFBB3" />
+    <checksum protected="All"     bchecksum="0x37FE" cchecksum="0x03CC" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0"  end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4.5" />
+  </frequency_range>
+  <frequency_range name="commercial" special="low_power" >
+    <frequency start="0"  end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="4"  vdd_min="3"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13.5" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"  nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x0000" end="0x07FF" />
+  <memory name="user_ids"  start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id" start="0x2006" end="0x2006" />
+  <memory name="config"    start="0x2007" end="0x2007" />
+  <memory name="eeprom"    start="0x0000" end="0x007F" hexfile_offset="0x2100" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3DFF" >
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="FOSC"  value="0x0013" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EXTCLK_OSC"         />
+      <value value="0x0010" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" />
+      <value value="0x0011" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   />
+      <value value="0x0012" name="ER_IO"        cname="_ER_OSC_NOCLKOUT"    />
+      <value value="0x0013" name="ER_CLKOUT"    cname="_ER_OSC_CLKOUT"      />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="LVP"   value="0x0080" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x0080" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="CPD"   value="0x0100" >
+      <value value="0x0000" name="All" cname="_DATA_CP_ON"  />
+      <value value="0x0100" name="Off" cname="_DATA_CP_OFF" />
+    </mask>
+    <mask name="CP"    value="0x3C00" >
+      <value value="0x0000" name="All"     cname="_CP_ALL" />
+      <value value="0x1400" name="200:7FF" cname="_CP_75"  />
+      <value value="0x2800" name="400:7FF" cname="_CP_50"  />
+      <value value="0x3C00" name="Off"     cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2/AN2/VREF"        />
+    <pin index="2"  name="RA3/AN3/CMP1"        />
+    <pin index="3"  name="RA4/T0CKI/CMP2"      />
+    <pin index="4"  name="RA5/MCLR/VPP"        />
+    <pin index="5"  name="VSS"                 />
+    <pin index="6"  name="RB0/INT"             />
+    <pin index="7"  name="RB1/RX/DT"           />
+    <pin index="8"  name="RB2/TX/CK"           />
+    <pin index="9"  name="RB3/CCP1"            />
+    <pin index="10" name="RB4/PGM"             />
+    <pin index="11" name="RB5"                 />
+    <pin index="12" name="RB6/T1OSI/PGC"       />
+    <pin index="13" name="RB7/T1OSO/T1CKI/PGD" />
+    <pin index="14" name="VDD"                 />
+    <pin index="15" name="RA6/OSC2/CLKOUT"     />
+    <pin index="16" name="RA7/OSC1/CLKIN"      />
+    <pin index="17" name="RA0/AN0"             />
+    <pin index="18" name="RA1/AN1"             />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F628A.xml b/src/devices/pic/xml_data/16F628A.xml
new file mode 100644
index 0000000..8c5a4cc
--- /dev/null
+++ b/src/devices/pic/xml_data/16F628A.xml
@@ -0,0 +1,164 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F628A" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x1060"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010210" datasheet="40044" progsheet="41196" erratas="80151" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x19FF" cchecksum="0xE5CD" />
+    <checksum protected="All"     bchecksum="0x1BFE" cchecksum="0xE7CC" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0"  end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13.5" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"  nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x07FF" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x007F" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x21FF" >
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="FOSC"  value="0x0013" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"              />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"              />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"              />
+      <value value="0x0003" name="EC_IO"        cname="_EXTCLK_OSC"          />
+      <value value="0x0010" name="INTRC_IO"     cname="_INTOSC_OSC_NOCLKOUT" ecnames="_INTRC_OSC_NOCLKOUT" />
+      <value value="0x0011" name="INTRC_CLKOUT" cname="_INTOSC_OSC_CLKOUT"   ecnames="_INTRC_OSC_CLKOUT"   />
+      <value value="0x0012" name="ER_IO"        cname="_RC_OSC_NOCLKOUT"     ecnames="_ER_OSC_NOCLKOUT"    />
+      <value value="0x0013" name="ER_CLKOUT"    cname="_RC_OSC_CLKOUT"       ecnames="_ER_OSC_CLKOUT"      />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BOREN_OFF" ecnames="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BOREN_ON"  ecnames="_BODEN_ON"  />
+    </mask>
+    <mask name="LVP"   value="0x0080" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x0080" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="CPD"   value="0x0100" >
+      <value value="0x0000" name="All" cname="_DATA_CP_ON"  />
+      <value value="0x0100" name="Off" cname="_DATA_CP_OFF" />
+    </mask>
+    <mask name="CP"    value="0x2000" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x2000" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2/AN2/VREF"        />
+    <pin index="2"  name="RA3/AN3/CMP1"        />
+    <pin index="3"  name="RA4/T0CKI/CMP2"      />
+    <pin index="4"  name="RA5/MCLR/VPP"        />
+    <pin index="5"  name="VSS"                 />
+    <pin index="6"  name="RB0/INT"             />
+    <pin index="7"  name="RB1/RX/DT"           />
+    <pin index="8"  name="RB2/TX/CK"           />
+    <pin index="9"  name="RB3/CCP1"            />
+    <pin index="10" name="RB4/PGM"             />
+    <pin index="11" name="RB5"                 />
+    <pin index="12" name="RB6/T1OSI/PGC"       />
+    <pin index="13" name="RB7/T1OSO/T1CKI/PGD" />
+    <pin index="14" name="VDD"                 />
+    <pin index="15" name="RA6/OSC2/CLKOUT"     />
+    <pin index="16" name="RA7/OSC1/CLKIN"      />
+    <pin index="17" name="RA0/AN0"             />
+    <pin index="18" name="RA1/AN1"             />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F630.xml b/src/devices/pic/xml_data/16F630.xml
new file mode 100644
index 0000000..a82ffdb
--- /dev/null
+++ b/src/devices/pic/xml_data/16F630.xml
@@ -0,0 +1,108 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F630" document="010211" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x10C0"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xBE00" cchecksum="0x89CE" />
+    <checksum protected="All" bchecksum="0xBF7F" cchecksum="0x8B4D" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" special="AD off" />
+    <frequency start="0"  end="4"  vdd_min="2.2" vdd_max="5.5" special="AD on"  />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" special="AD off" />
+    <frequency start="0"  end="4"  vdd_min="2.5" vdd_max="5.5" special="AD on"  />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.5"   max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x03FE" />
+  <memory name="calibration"  start="0x03FF" end="0x03FF" cal_opmask="0x3C00"     cal_opcode="0x3400" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x007F" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x31FF" bvalue="0x31FF" pmask="0x3000" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC"           cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN"     />
+    </mask>
+    <mask name="CP"    value="0x0080" >
+      <value value="0x0000" name="All" cname="_CP"     />
+      <value value="0x0080" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0100" >
+      <value value="0x0000" name="All" cname="_CPD"     />
+      <value value="0x0100" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BG"    value="0x3000">
+      <value value="0x0000" name="Lowest"   />
+      <value value="0x1000" name="Mid/Low"  />
+      <value value="0x2000" name="Mid/High" />
+      <value value="0x3000" name="Highest"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop" nb_pins="14" >
+    <pin index="1"  name="VDD"                  />
+    <pin index="2"  name="RA5/T1CKI/OSC1/CLKIN" />
+    <pin index="3"  name="RA4/T1G/OSC2/CLKOUT"  />
+    <pin index="4"  name="RA3/MCLR/VPP"         />
+    <pin index="5"  name="RC5"                  />
+    <pin index="6"  name="RC4"                  />
+    <pin index="7"  name="RC3"                  />
+    <pin index="8"  name="RC2"                  />
+    <pin index="9"  name="RC1"                  />
+    <pin index="10" name="RC0"                  />
+    <pin index="11" name="RA2/COUT/T0CKI/INT"   />
+    <pin index="12" name="RA1/CIN-/ICSPCLK"     />
+    <pin index="13" name="RA0/CIN+/ICSPDAT"     />
+    <pin index="14" name="VSS"                  />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F631.xml b/src/devices/pic/xml_data/16F631.xml
new file mode 100644
index 0000000..e6a5274
--- /dev/null
+++ b/src/devices/pic/xml_data/16F631.xml
@@ -0,0 +1,135 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F631" document="026027" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x1420"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x0BFF" cchecksum="0xD7CD" />
+    <checksum protected="All" bchecksum="0x1BBE" cchecksum="0xE78C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13"  nominal="11.5" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"    />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"    />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x03FF" />
+  <memory name="calibration"  start="0x2008" end="0x2008" cal_opmask="0x0000"     cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x007F" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x0FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0080" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0300" >
+      <value value="0x0000" name="Off"      cname="_BOR_OFF"    />
+      <value value="0x0100" name="Software" cname="_BOR_SBODEN" />
+      <value value="0x0200" name="On_run"   cname="_BOR_NSLEEP" />
+      <value value="0x0300" name="On"       cname="_BOR_ON"     />
+    </mask>
+    <mask name="IESO"  value="0x0400" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0400" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="FCMEN" value="0x0800" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0800" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="20" >
+    <pin index="1"  name="VDD"                     />
+    <pin index="2"  name="RA5/T1CKI/OSC1/CLKIN"    />
+    <pin index="3"  name="RA4/T1G/OSC2/CLKOUT"     />
+    <pin index="4"  name="RA3/MCLR/VPP"            />
+    <pin index="5"  name="RC5"                     />
+    <pin index="6"  name="RC4/C2OUT"               />
+    <pin index="7"  name="RC3/C12IN3-"             />
+    <pin index="8"  name="RC6"                     />
+    <pin index="9"  name="RC7"                     />
+    <pin index="10" name="RB7"                     />
+    <pin index="11" name="RB6"                     />
+    <pin index="12" name="RB5"                     />
+    <pin index="13" name="RB4"                     />
+    <pin index="14" name="RC2/C12IN2-"             />
+    <pin index="15" name="RC1/C12IN1-"             />
+    <pin index="16" name="RC0/C12IN+"              />
+    <pin index="17" name="RA2/C1OUT/T0CKI/INT"     />
+    <pin index="18" name="RA1/C12IN0-/ICSPCLK"     />
+    <pin index="19" name="RA0/C1IN+/ICSPDAT/ULPWU" />
+    <pin index="20" name="VSS"                     />
+  </package>
+
+  <package types="qfn"            nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F636.xml b/src/devices/pic/xml_data/16F636.xml
new file mode 100644
index 0000000..e47314e
--- /dev/null
+++ b/src/devices/pic/xml_data/16F636.xml
@@ -0,0 +1,110 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F636" document="019833" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x10A0"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x17FF" cchecksum="0xE3CD" />
+    <checksum protected="All" bchecksum="0x37BE" cchecksum="0x038C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13"  nominal="11.5" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"    />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"    />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x07FF" />
+  <memory name="calibration"  start="0x2008" end="0x2009" cal_opmask="0x0000"     cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x1FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0080" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0300" >
+      <value value="0x0000" name="Off"      cname="_BOD_OFF"    />
+      <value value="0x0100" name="Software" cname="_BOD_SBODEN" />
+      <value value="0x0200" name="On_run"   cname="_BOD_NSLEEP" />
+      <value value="0x0300" name="On"       cname="_BOD_ON"     />
+    </mask>
+    <mask name="IESO"  value="0x0400" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0400" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="FCMEN" value="0x0800" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0800" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="WUREN" value="0x1000" >
+      <value value="0x0000" name="On"  cname="_WUREN_ON"  />
+      <value value="0x1000" name="Off" cname="_WUREN_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop" nb_pins="14" >
+    <pin index="1"  name="VDD"                     />
+    <pin index="2"  name="RA5/T1CKI/OSC1/CLKIN"    />
+    <pin index="3"  name="RA4/T1G/OSC2/CLKOUT"     />
+    <pin index="4"  name="RA3/MCLR/VPP"            />
+    <pin index="5"  name="RC5"                     />
+    <pin index="6"  name="RC4/C2OUT"               />
+    <pin index="7"  name="RC3"                     />
+    <pin index="8"  name="RC2"                     />
+    <pin index="9"  name="RC1/C2IN-"               />
+    <pin index="10" name="RC0/C2IN+"               />
+    <pin index="11" name="RA2/C1OUT/T0CKI/INT"     />
+    <pin index="12" name="RA1/C1IN-/VREF/ICSPCLK"  />
+    <pin index="13" name="RA0/C1IN+/ICSPDAT/ULPWU" />
+    <pin index="14" name="VSS"                     />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F639.xml b/src/devices/pic/xml_data/16F639.xml
new file mode 100644
index 0000000..7affb7b
--- /dev/null
+++ b/src/devices/pic/xml_data/16F639.xml
@@ -0,0 +1,116 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F639" document="022266" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x10A0"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x17FF" cchecksum="0xE3CD" />
+    <checksum protected="All" bchecksum="0x37BE" cchecksum="0x038C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13"  nominal="11.5" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"    />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"    />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x07FF" />
+  <memory name="calibration"  start="0x2008" end="0x2009" cal_opmask="0x0000"     cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x1FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0080" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0300" >
+      <value value="0x0000" name="Off"      cname="_BOD_OFF"    />
+      <value value="0x0100" name="Software" cname="_BOD_SBODEN" />
+      <value value="0x0200" name="On_run"   cname="_BOD_NSLEEP" />
+      <value value="0x0300" name="On"       cname="_BOD_ON"     />
+    </mask>
+    <mask name="IESO"  value="0x0400" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0400" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="FCMEN" value="0x0800" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0800" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="WUREN" value="0x1000" >
+      <value value="0x0000" name="On"  cname="_WUREN_ON"  />
+      <value value="0x1000" name="Off" cname="_WUREN_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="ssop" nb_pins="20" >
+    <pin index="1"  name="VDD"                       />
+    <pin index="2"  name="RA5/T1CKI/OSC1/CLKIN"      />
+    <pin index="3"  name="RA4/T1G/OSC2/CLKOUT"       />
+    <pin index="4"  name="RA3/MCLR/VPP"              />
+    <pin index="5"  name="RC5"                       />
+    <pin index="6"  name="RC4/C2OUT"                 />
+    <pin index="7"  name="RC3/LFDATA/RSSI/CCLK/SDIO" />
+    <pin index="8"  name="VDDT"                      />
+    <pin index="9"  name="LCZ"                       />
+    <pin index="10" name="LCY"                       />
+    <pin index="11" name="LCX"                       />
+    <pin index="12" name="LCCOM"                     />
+    <pin index="13" name="VSST"                      />
+    <pin index="14" name="RC2/SCLK/ALERT"            />
+    <pin index="15" name="RC1/C2IN1-/CS"             />
+    <pin index="16" name="RC0/C2IN+"                 />
+    <pin index="17" name="RA2/C1OUT/T0CKI/INT"       />
+    <pin index="18" name="RA1/C1IN-/VREF/ICSPCLK"    />
+    <pin index="19" name="RA0/C1IN+/ICSPDAT/ULPWU"   />
+    <pin index="20" name="VSS"                       />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F648A.xml b/src/devices/pic/xml_data/16F648A.xml
new file mode 100644
index 0000000..17b4f83
--- /dev/null
+++ b/src/devices/pic/xml_data/16F648A.xml
@@ -0,0 +1,164 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F648A" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x1100"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010212" datasheet="40044" progsheet="41196" erratas="80151" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x11FF" cchecksum="0xDDCD" />
+    <checksum protected="All"     bchecksum="0x13FE" cchecksum="0xDFCC" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0"  end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13.5" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"  nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x0FFF" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x21FF" >
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="FOSC"  value="0x0013" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"              />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"              />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"              />
+      <value value="0x0003" name="EC_IO"        cname="_EXTCLK_OSC"          />
+      <value value="0x0010" name="INTRC_IO"     cname="_INTOSC_OSC_NOCLKOUT" ecnames="_INTRC_OSC_NOCLKOUT" />
+      <value value="0x0011" name="INTRC_CLKOUT" cname="_INTOSC_OSC_CLKOUT"   ecnames="_INTRC_OSC_CLKOUT"   />
+      <value value="0x0012" name="ER_IO"        cname="_RC_OSC_NOCLKOUT"     ecnames="_ER_OSC_NOCLKOUT"    />
+      <value value="0x0013" name="ER_CLKOUT"    cname="_RC_OSC_CLKOUT"       ecnames="_ER_OSC_CLKOUT"      />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BOREN_OFF" ecnames="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BOREN_ON"  ecnames="_BODEN_ON"  />
+    </mask>
+    <mask name="LVP"   value="0x0080" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x0080" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="CPD"   value="0x0100" >
+      <value value="0x0000" name="All" cname="_DATA_CP_ON"  />
+      <value value="0x0100" name="Off" cname="_DATA_CP_OFF" />
+    </mask>
+    <mask name="CP"    value="0x2000" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x2000" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2/AN2/VREF"        />
+    <pin index="2"  name="RA3/AN3/CMP1"        />
+    <pin index="3"  name="RA4/T0CKI/CMP2"      />
+    <pin index="4"  name="RA5/MCLR/VPP"        />
+    <pin index="5"  name="VSS"                 />
+    <pin index="6"  name="RB0/INT"             />
+    <pin index="7"  name="RB1/RX/DT"           />
+    <pin index="8"  name="RB2/TX/CK"           />
+    <pin index="9"  name="RB3/CCP1"            />
+    <pin index="10" name="RB4/PGM"             />
+    <pin index="11" name="RB5"                 />
+    <pin index="12" name="RB6/T1OSI/PGC"       />
+    <pin index="13" name="RB7/T1OSO/T1CKI/PGD" />
+    <pin index="14" name="VDD"                 />
+    <pin index="15" name="RA6/OSC2/CLKOUT"     />
+    <pin index="16" name="RA7/OSC1/CLKIN"      />
+    <pin index="17" name="RA0/AN0"             />
+    <pin index="18" name="RA1/AN1"             />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F676.xml b/src/devices/pic/xml_data/16F676.xml
new file mode 100644
index 0000000..b608d48
--- /dev/null
+++ b/src/devices/pic/xml_data/16F676.xml
@@ -0,0 +1,108 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F676" document="010213" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x10E0"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xBE00" cchecksum="0x89CE" />
+    <checksum protected="All" bchecksum="0xBF7F" cchecksum="0x8B4D" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="commercial" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" special="AD off" />
+    <frequency start="0"  end="4"  vdd_min="2.2" vdd_max="5.5" special="AD on"  />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" special="AD off" />
+    <frequency start="0"  end="4"  vdd_min="2.5" vdd_max="5.5" special="AD on"  />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.5"   max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x03FE" />
+  <memory name="calibration"  start="0x03FF" end="0x03FF" cal_opmask="0x3C00"     cal_opcode="0x3400" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x007F" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x31FF" bvalue="0x31FF" pmask="0x3000" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC"           cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN"     />
+    </mask>
+    <mask name="CP"    value="0x0080" >
+      <value value="0x0000" name="All" cname="_CP"     />
+      <value value="0x0080" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0100" >
+      <value value="0x0000" name="All" cname="_CPD"     />
+      <value value="0x0100" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BG"    value="0x3000">
+      <value value="0x0000" name="Lowest"   />
+      <value value="0x1000" name="Mid/Low"  />
+      <value value="0x2000" name="Mid/High" />
+      <value value="0x3000" name="Highest"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop" nb_pins="14" >
+    <pin index="1"  name="VDD"                     />
+    <pin index="2"  name="RA5/T1CKI/OSC1/CLKIN"    />
+    <pin index="3"  name="RA4/T1G/OSC2/AN3/CLKOUT" />
+    <pin index="4"  name="RA3/MCLR/VPP"            />
+    <pin index="5"  name="RC5"                     />
+    <pin index="6"  name="RC4"                     />
+    <pin index="7"  name="RC3/AN7"                 />
+    <pin index="8"  name="RC2/AN6"                 />
+    <pin index="9"  name="RC1/AN5"                 />
+    <pin index="10" name="RC0/AN4"                 />
+    <pin index="11" name="RA2/AN2/COUT/T0CKI/INT"  />
+    <pin index="12" name="RA1/AN1/CIN-/ICSPCLK"    />
+    <pin index="13" name="RA0/AN0/CIN+/ICSPDAT"    />
+    <pin index="14" name="VSS"                     />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F677.xml b/src/devices/pic/xml_data/16F677.xml
new file mode 100644
index 0000000..d27b2eb
--- /dev/null
+++ b/src/devices/pic/xml_data/16F677.xml
@@ -0,0 +1,135 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F677" document="026026" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x1440"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x07FF" cchecksum="0xD3CD" />
+    <checksum protected="All" bchecksum="0x17BE" cchecksum="0xE38C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13"  nominal="11.5" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"    />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"    />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x07FF" />
+  <memory name="calibration"  start="0x2008" end="0x2008" cal_opmask="0x0000"     cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x0FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0080" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0300" >
+      <value value="0x0000" name="Off"      cname="_BOR_OFF"    />
+      <value value="0x0100" name="Software" cname="_BOR_SBODEN" />
+      <value value="0x0200" name="On_run"   cname="_BOR_NSLEEP" />
+      <value value="0x0300" name="On"       cname="_BOR_ON"     />
+    </mask>
+    <mask name="IESO"  value="0x0400" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0400" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="FCMEN" value="0x0800" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0800" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="20" >
+    <pin index="1"  name="VDD"                          />
+    <pin index="2"  name="RA5/T1CKI/OSC1/CLKIN"         />
+    <pin index="3"  name="RA4/AN3/T1G/OSC2/CLKOUT"      />
+    <pin index="4"  name="RA3/MCLR/VPP"                 />
+    <pin index="5"  name="RC5"                          />
+    <pin index="6"  name="RC4/C2OUT"                    />
+    <pin index="7"  name="RC3/AN7/C12IN3-"              />
+    <pin index="8"  name="RC6/AN8/SS"                   />
+    <pin index="9"  name="RC7/AN9/SDO"                  />
+    <pin index="10" name="RB7"                          />
+    <pin index="11" name="RB6/SCK/SCL"                  />
+    <pin index="12" name="RB5/AN11"                     />
+    <pin index="13" name="RB4/AN10/SDI/SDA"             />
+    <pin index="14" name="RC2/AN6/C12IN2-"              />
+    <pin index="15" name="RC1/AN5/C12IN1-"              />
+    <pin index="16" name="RC0/AN4/C12IN+"               />
+    <pin index="17" name="RA2/AN2/C1OUT/T0CKI/INT"      />
+    <pin index="18" name="RA1/AN1/C12IN0-/VREF/ICSPCLK" />
+    <pin index="19" name="RA0/AN0/C1IN+/ICSPDAT/ULPWU"  />
+    <pin index="20" name="VSS"                          />
+  </package>
+
+  <package types="qfn"            nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F684.xml b/src/devices/pic/xml_data/16F684.xml
new file mode 100644
index 0000000..f330925
--- /dev/null
+++ b/src/devices/pic/xml_data/16F684.xml
@@ -0,0 +1,106 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F684" document="010214" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x1080"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x07FF" cchecksum="0xD3CD" />
+    <checksum protected="All" bchecksum="0x17BE" cchecksum="0xE38C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13"  nominal="11.5" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"    />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"    />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x07FF" />
+  <memory name="calibration"  start="0x2008" end="0x2008" cal_opmask="0x0000"     cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x0FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0080" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0300" >
+      <value value="0x0000" name="Off"      cname="_BOD_OFF"    />
+      <value value="0x0100" name="Software" cname="_BOD_SBODEN" />
+      <value value="0x0200" name="On_run"   cname="_BOD_NSLEEP" />
+      <value value="0x0300" name="On"       cname="_BOD_ON"     />
+    </mask>
+    <mask name="IESO"  value="0x0400" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0400" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="FCMEN" value="0x0800" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0800" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop" nb_pins="14" >
+    <pin index="1"  name="VDD"                         />
+    <pin index="2"  name="RA5/T1CKI/OSC1/CLKIN"        />
+    <pin index="3"  name="RA4/T1G/OSC2/AN3/CLKOUT"     />
+    <pin index="4"  name="RA3/MCLR/VPP"                />
+    <pin index="5"  name="RC5/CCP1/P1A"                />
+    <pin index="6"  name="RC4/C2OUT/P1B"               />
+    <pin index="7"  name="RC3/AN7/P1C"                 />
+    <pin index="8"  name="RC2/AN6/P1D"                 />
+    <pin index="9"  name="RC1/AN5/C2IN-"               />
+    <pin index="10" name="RC0/AN4/C2IN+"               />
+    <pin index="11" name="RA2/AN2/C1OUT/T0CKI/INT"     />
+    <pin index="12" name="RA1/AN1/C1IN-/VREF/ICSPCLK"  />
+    <pin index="13" name="RA0/AN0/C1IN+/ICSPDAT/ULPWU" />
+    <pin index="14" name="VSS"                         />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F685.xml b/src/devices/pic/xml_data/16F685.xml
new file mode 100644
index 0000000..aa35aa3
--- /dev/null
+++ b/src/devices/pic/xml_data/16F685.xml
@@ -0,0 +1,135 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F685" document="023115" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x04A0"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xFFFF" cchecksum="0xCBCD" />
+    <checksum protected="All" bchecksum="0x0FBE" cchecksum="0xDB8C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13"  nominal="11.5" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"    />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"    />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x0FFF" />
+  <memory name="calibration"  start="0x2008" end="0x2008" cal_opmask="0x0000"     cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x0FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0080" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0300" >
+      <value value="0x0000" name="Off"      cname="_BOR_OFF"    />
+      <value value="0x0100" name="Software" cname="_BOR_SBODEN" />
+      <value value="0x0200" name="On_run"   cname="_BOR_NSLEEP" />
+      <value value="0x0300" name="On"       cname="_BOR_ON"     />
+    </mask>
+    <mask name="IESO"  value="0x0400" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0400" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="FCMEN" value="0x0800" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0800" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="20" >
+    <pin index="1"  name="VDD"                          />
+    <pin index="2"  name="RA5/T1CKI/OSC1/CLKIN"         />
+    <pin index="3"  name="RA4/AN3/T1G/OSC2/CLKOUT"      />
+    <pin index="4"  name="RA3/MCLR/VPP"                 />
+    <pin index="5"  name="RC5/CCP1/P1A"                 />
+    <pin index="6"  name="RC4/C2OUT/P1B"                />
+    <pin index="7"  name="RC3/AN7/C12IN3-/P1C"          />
+    <pin index="8"  name="RC6/AN8"                      />
+    <pin index="9"  name="RC7/AN9"                      />
+    <pin index="10" name="RB7"                          />
+    <pin index="11" name="RB6"                          />
+    <pin index="12" name="RB5/AN11"                     />
+    <pin index="13" name="RB4/AN10"                     />
+    <pin index="14" name="RC2/AN6/C12IN2-/P1D"          />
+    <pin index="15" name="RC1/AN5/C12IN1-"              />
+    <pin index="16" name="RC0/AN4/C12IN+"               />
+    <pin index="17" name="RA2/AN2/C1OUT/T0CKI/INT"      />
+    <pin index="18" name="RA1/AN1/C12IN0-/VREF/ICSPCLK" />
+    <pin index="19" name="RA0/AN0/C1IN+/ICSPDAT/ULPWU"  />
+    <pin index="20" name="VSS"                          />
+  </package>
+
+  <package types="qfn"            nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F687.xml b/src/devices/pic/xml_data/16F687.xml
new file mode 100644
index 0000000..2e58780
--- /dev/null
+++ b/src/devices/pic/xml_data/16F687.xml
@@ -0,0 +1,135 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F687" document="023114" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x1320"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x07FF" cchecksum="0xD3CD" />
+    <checksum protected="All" bchecksum="0x17BE" cchecksum="0xE38C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13"  nominal="11.5" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"    />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"    />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x07FF" />
+  <memory name="calibration"  start="0x2008" end="0x2008" cal_opmask="0x0000"     cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x0FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0080" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0300" >
+      <value value="0x0000" name="Off"      cname="_BOR_OFF"    />
+      <value value="0x0100" name="Software" cname="_BOR_SBODEN" />
+      <value value="0x0200" name="On_run"   cname="_BOR_NSLEEP" />
+      <value value="0x0300" name="On"       cname="_BOR_ON"     />
+    </mask>
+    <mask name="IESO"  value="0x0400" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0400" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="FCMEN" value="0x0800" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0800" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="20" >
+    <pin index="1"  name="VDD"                          />
+    <pin index="2"  name="RA5/T1CKI/OSC1/CLKIN"         />
+    <pin index="3"  name="RA4/AN3/T1G/OSC2/CLKOUT"      />
+    <pin index="4"  name="RA3/MCLR/VPP"                 />
+    <pin index="5"  name="RC5"                          />
+    <pin index="6"  name="RC4/C2OUT"                    />
+    <pin index="7"  name="RC3/AN7/C12IN3-"              />
+    <pin index="8"  name="RC6/AN8/SS"                   />
+    <pin index="9"  name="RC7/AN9/SDO"                  />
+    <pin index="10" name="RB7/TX/CK"                    />
+    <pin index="11" name="RB6/SCK/SCL"                  />
+    <pin index="12" name="RB5/AN11/RX/DT"               />
+    <pin index="13" name="RB4/AN10/SDI/SDA"             />
+    <pin index="14" name="RC2/AN6/C12IN2-"              />
+    <pin index="15" name="RC1/AN5/C12IN1-"              />
+    <pin index="16" name="RC0/AN4/C12IN+"               />
+    <pin index="17" name="RA2/AN2/C1OUT/T0CKI/INT"      />
+    <pin index="18" name="RA1/AN1/C12IN0-/VREF/ICSPCLK" />
+    <pin index="19" name="RA0/AN0/C1IN+/ICSPDAT/ULPWU"  />
+    <pin index="20" name="VSS"                          />
+  </package>
+
+  <package types="qfn"            nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F688.xml b/src/devices/pic/xml_data/16F688.xml
new file mode 100644
index 0000000..2692159
--- /dev/null
+++ b/src/devices/pic/xml_data/16F688.xml
@@ -0,0 +1,106 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F688" document="010215" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x1180"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xFFFF" cchecksum="0xCBCD" />
+    <checksum protected="All" bchecksum="0x0FBE" cchecksum="0xDB8C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13"  nominal="11.5" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"    />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"    />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x0FFF" />
+  <memory name="calibration"  start="0x2008" end="0x2008" cal_opmask="0x0000"     cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x0FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0080" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0300" >
+      <value value="0x0000" name="Off"      cname="_BOD_OFF"    />
+      <value value="0x0100" name="Software" cname="_BOD_SBODEN" />
+      <value value="0x0200" name="On_run"   cname="_BOD_NSLEEP" />
+      <value value="0x0300" name="On"       cname="_BOD_ON"     />
+    </mask>
+    <mask name="IESO"  value="0x0400" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0400" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="FCMEN" value="0x0800" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0800" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic tssop" nb_pins="14" >
+    <pin index="1"  name="VDD"                         />
+    <pin index="2"  name="RA5/T1CKI/OSC1/CLKIN"        />
+    <pin index="3"  name="RA4/T1G/OSC2/AN3/CLKOUT"     />
+    <pin index="4"  name="RA3/MCLR/VPP"                />
+    <pin index="5"  name="RC5/RX/DT"                   />
+    <pin index="6"  name="RC4/TX/CK"                   />
+    <pin index="7"  name="RC3/AN7"                     />
+    <pin index="8"  name="RC2/AN6"                     />
+    <pin index="9"  name="RC1/AN5/C2IN-"               />
+    <pin index="10" name="RC0/AN4/C2IN+"               />
+    <pin index="11" name="RA2/AN2/C1OUT/T0CKI/INT"     />
+    <pin index="12" name="RA1/AN1/C1IN-/VREF/ICSPCLK"  />
+    <pin index="13" name="RA0/AN0/C1IN+/ICSPDAT/ULPWU" />
+    <pin index="14" name="VSS"                         />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F689.xml b/src/devices/pic/xml_data/16F689.xml
new file mode 100644
index 0000000..f22fdcd
--- /dev/null
+++ b/src/devices/pic/xml_data/16F689.xml
@@ -0,0 +1,135 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F689" document="023113" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x1340"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xFFFF" cchecksum="0xCBCD" />
+    <checksum protected="All" bchecksum="0x0FBE" cchecksum="0xDB8C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13"  nominal="11.5" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"    />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"    />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x0FFF" />
+  <memory name="calibration"  start="0x2008" end="0x2008" cal_opmask="0x0000"     cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x0FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0080" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0300" >
+      <value value="0x0000" name="Off"      cname="_BOR_OFF"    />
+      <value value="0x0100" name="Software" cname="_BOR_SBODEN" />
+      <value value="0x0200" name="On_run"   cname="_BOR_NSLEEP" />
+      <value value="0x0300" name="On"       cname="_BOR_ON"     />
+    </mask>
+    <mask name="IESO"  value="0x0400" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0400" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="FCMEN" value="0x0800" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0800" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="20" >
+    <pin index="1"  name="VDD"                          />
+    <pin index="2"  name="RA5/T1CKI/OSC1/CLKIN"         />
+    <pin index="3"  name="RA4/AN3/T1G/OSC2/CLKOUT"      />
+    <pin index="4"  name="RA3/MCLR/VPP"                 />
+    <pin index="5"  name="RC5"                          />
+    <pin index="6"  name="RC4/C2OUT"                    />
+    <pin index="7"  name="RC3/AN7/C12IN3-"              />
+    <pin index="8"  name="RC6/AN8/SS"                   />
+    <pin index="9"  name="RC7/AN9/SDO"                  />
+    <pin index="10" name="RB7/TX/CK"                    />
+    <pin index="11" name="RB6/SCK/SCL"                  />
+    <pin index="12" name="RB5/AN11/RX/DT"               />
+    <pin index="13" name="RB4/AN10/SDI/SDA"             />
+    <pin index="14" name="RC2/AN6/C12IN2-"              />
+    <pin index="15" name="RC1/AN5/C12IN1-"              />
+    <pin index="16" name="RC0/AN4/C12IN+"               />
+    <pin index="17" name="RA2/AN2/C1OUT/T0CKI/INT"      />
+    <pin index="18" name="RA1/AN1/C12IN0-/VREF/ICSPCLK" />
+    <pin index="19" name="RA0/AN0/C1IN+/ICSPDAT/ULPWU"  />
+    <pin index="20" name="VSS"                          />
+  </package>
+
+  <package types="qfn"            nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F690.xml b/src/devices/pic/xml_data/16F690.xml
new file mode 100644
index 0000000..7a51bac
--- /dev/null
+++ b/src/devices/pic/xml_data/16F690.xml
@@ -0,0 +1,135 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F690" document="023112" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x1400"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xFFFF" cchecksum="0xCBCD" />
+    <checksum protected="All" bchecksum="0x0FBE" cchecksum="0xDB8C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13"  nominal="11.5" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"    />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"    />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x0FFF" />
+  <memory name="calibration"  start="0x2008" end="0x2008" cal_opmask="0x0000"     cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x0FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0080" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0300" >
+      <value value="0x0000" name="Off"      cname="_BOR_OFF"    />
+      <value value="0x0100" name="Software" cname="_BOR_SBODEN" />
+      <value value="0x0200" name="On_run"   cname="_BOR_NSLEEP" />
+      <value value="0x0300" name="On"       cname="_BOR_ON"     />
+    </mask>
+    <mask name="IESO"  value="0x0400" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0400" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="FCMEN" value="0x0800" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0800" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="20" >
+    <pin index="1"  name="VDD"                          />
+    <pin index="2"  name="RA5/T1CKI/OSC1/CLKIN"         />
+    <pin index="3"  name="RA4/AN3/T1G/OSC2/CLKOUT"      />
+    <pin index="4"  name="RA3/MCLR/VPP"                 />
+    <pin index="5"  name="RC5/CPP1/P1A"                 />
+    <pin index="6"  name="RC4/C2OUT/P1B"                />
+    <pin index="7"  name="RC3/AN7/C12IN3-"              />
+    <pin index="8"  name="RC6/AN8/SS"                   />
+    <pin index="9"  name="RC7/AN9/SDO"                  />
+    <pin index="10" name="RB7/TX/CK"                    />
+    <pin index="11" name="RB6/SCK/SCL"                  />
+    <pin index="12" name="RB5/AN11/RX/DT"               />
+    <pin index="13" name="RB4/AN10/SDI/SDA"             />
+    <pin index="14" name="RC2/AN6/C12IN2-/P1D"          />
+    <pin index="15" name="RC1/AN5/C12IN1-"              />
+    <pin index="16" name="RC0/AN4/C12IN+"               />
+    <pin index="17" name="RA2/AN2/C1OUT/T0CKI/INT"      />
+    <pin index="18" name="RA1/AN1/C12IN0-/VREF/ICSPCLK" />
+    <pin index="19" name="RA0/AN0/C1IN+/ICSPDAT/ULPWU"  />
+    <pin index="20" name="VSS"                          />
+  </package>
+
+  <package types="qfn"            nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F716.xml b/src/devices/pic/xml_data/16F716.xml
new file mode 100644
index 0000000..8ebaa00
--- /dev/null
+++ b/src/devices/pic/xml_data/16F716.xml
@@ -0,0 +1,119 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F716" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x1140"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010216" datasheet="41206" progsheet="40245" erratas="80184" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x18CF" cchecksum="0xE49D" />
+    <checksum protected="All"     bchecksum="0x199E" cchecksum="0xE56C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="10" vdd_min="3" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="11"  max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x07FF" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x20CF" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BOREN_OFF" ecnames="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BOREN_ON"  ecnames="_BODEN_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0080" >
+      <value value="0x0000" name="2.5" cname="_VBOR_25" />
+      <value value="0x0080" name="4.0" cname="_VBOR_40" />
+    </mask>
+    <mask name="CP"    value="0x2000" >
+      <value value="0x0000" name="All" cname="_CP_ON"  ecnames="_CP_ALL" />
+      <value value="0x2000" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2/AN2"         />
+    <pin index="2"  name="RA3/AN3/VREF"    />
+    <pin index="3"  name="RA4/T0CKI"       />
+    <pin index="4"  name="MCLR/VPP"        />
+    <pin index="5"  name="VSS"             />
+    <pin index="6"  name="RB0/INT/ECCPAS2" />
+    <pin index="7"  name="RB1/T1OSO/T1CKI" />
+    <pin index="8"  name="RB2/T1OSI"       />
+    <pin index="9"  name="RB3/CCP1/P1A"    />
+    <pin index="10" name="RB4/ECCPAS0"     />
+    <pin index="11" name="RB5/P1B"         />
+    <pin index="12" name="RB6/P1C"         />
+    <pin index="13" name="RB7/P1D"         />
+    <pin index="14" name="VDD"             />
+    <pin index="15" name="OSC2/CLKOUT"     />
+    <pin index="16" name="OSC1/CLKIN"      />
+    <pin index="17" name="RA0/AN0"         />
+    <pin index="18" name="RA1/AN1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F72.xml b/src/devices/pic/xml_data/16F72.xml
new file mode 100644
index 0000000..d49b2cd
--- /dev/null
+++ b/src/devices/pic/xml_data/16F72.xml
@@ -0,0 +1,130 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F72" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x00A0"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010217" datasheet="39597" progsheet="39588" erratas="80155" />
+
+<!--* Checksums ************************************************************-->
+<!--  <checksums>
+    <checksum protected="Off" bchecksum="0xF85F" cchecksum="0x842D" />
+    <checksum protected="All" bchecksum="0x005E" cchecksum="0x005E" />
+  </checksums>
+-->
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"           min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"      min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x0000" end="0x07FF" />
+  <memory name="user_ids"  start="0x2000" end="0x2003" rmask="0x000F" />
+  <memory name="device_id" start="0x2006" end="0x2006" />
+  <memory name="config"    start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x005F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" ecnames="_WDTEN_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  ecnames="_WDTEN_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  ecnames="_PWRTEN_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" ecnames="_PWRTEN_OFF" />
+    </mask>
+    <mask name="CP"    value="0x0010" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x0010" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" ecnames="_BOREN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  ecnames="_BOREN_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"        />
+    <pin index="2"  name="RA0/AN0"         />
+    <pin index="3"  name="RA1/AN1"         />
+    <pin index="4"  name="RA2/AN2"         />
+    <pin index="5"  name="RA3/AN3/VREF"    />
+    <pin index="6"  name="RA4/T0CKI"       />
+    <pin index="7"  name="RA5/SS/AN4"      />
+    <pin index="8"  name="VSS"             />
+    <pin index="9"  name="OSC1/CLKIN"      />
+    <pin index="10" name="OSC2/CLKOUT"     />
+    <pin index="11" name="RC0/T1OSO/T1CKI" />
+    <pin index="12" name="RC1/T1OSI"       />
+    <pin index="13" name="RC2/CCP1"        />
+    <pin index="14" name="RC3/SCK/SCL"     />
+    <pin index="15" name="RC4/SDI/SDA"     />
+    <pin index="16" name="RC5/SDO"         />
+    <pin index="17" name="RC6"             />
+    <pin index="18" name="RC7"             />
+    <pin index="19" name="VSS"             />
+    <pin index="20" name="VDD"             />
+    <pin index="21" name="RB0/INT"         />
+    <pin index="22" name="RB1"             />
+    <pin index="23" name="RB2"             />
+    <pin index="24" name="RB3"             />
+    <pin index="25" name="RB4"             />
+    <pin index="26" name="RB5"             />
+    <pin index="27" name="RB6/PGC"         />
+    <pin index="28" name="RB7/PGD"         />
+  </package>
+
+  <package types="qfn"            nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F73.xml b/src/devices/pic/xml_data/16F73.xml
new file mode 100644
index 0000000..157cb74
--- /dev/null
+++ b/src/devices/pic/xml_data/16F73.xml
@@ -0,0 +1,121 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F73" document="010218" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x0600"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"           min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"      min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x0000" end="0x0FFF" />
+  <memory name="user_ids"  start="0x2000" end="0x2003" rmask="0x000F" />
+  <memory name="device_id" start="0x2006" end="0x2006" />
+  <memory name="config"    start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x005F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" ecnames="_WDTEN_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  ecnames="_WDTEN_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  ecnames="_PWRTEN_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" ecnames="_PWRTEN_OFF" />
+    </mask>
+    <mask name="CP"    value="0x0010" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x0010" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" ecnames="_BOREN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  ecnames="_BOREN_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"        />
+    <pin index="2"  name="RA0/AN0"         />
+    <pin index="3"  name="RA1/AN1"         />
+    <pin index="4"  name="RA2/AN2"         />
+    <pin index="5"  name="RA3/AN3/VREF"    />
+    <pin index="6"  name="RA4/T0CKI"       />
+    <pin index="7"  name="RA5/SS/AN4"      />
+    <pin index="8"  name="VSS"             />
+    <pin index="9"  name="OSC1/CLKIN"      />
+    <pin index="10" name="OSC2/CLKOUT"     />
+    <pin index="11" name="RC0/T1OSI/T1CKI" />
+    <pin index="12" name="RC1/T1OSO/CCP2"  />
+    <pin index="13" name="RC2/CCP1"        />
+    <pin index="14" name="RC3/SCK/SCL"     />
+    <pin index="15" name="RC4/SDI/SDA"     />
+    <pin index="16" name="RC5/SDO"         />
+    <pin index="17" name="RC6/TX/CK"       />
+    <pin index="18" name="RC7/RX/DT"       />
+    <pin index="19" name="VSS"             />
+    <pin index="20" name="VDD"             />
+    <pin index="21" name="RB0/INT"         />
+    <pin index="22" name="RB1"             />
+    <pin index="23" name="RB2"             />
+    <pin index="24" name="RB3"             />
+    <pin index="25" name="RB4"             />
+    <pin index="26" name="RB5"             />
+    <pin index="27" name="RB6/PGC"         />
+    <pin index="28" name="RB7/PGD"         />
+  </package>
+
+  <package types="mlf"            nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F737.xml b/src/devices/pic/xml_data/16F737.xml
new file mode 100644
index 0000000..0184aa9
--- /dev/null
+++ b/src/devices/pic/xml_data/16F737.xml
@@ -0,0 +1,215 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F737" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x0BA0"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010219" datasheet="30498" progsheet="30492" erratas="80177" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x2A42" cchecksum="0xF610" />
+    <checksum protected="All"     bchecksum="0x4484" cchecksum="0x1052" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"           min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"      min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x0FFF" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2008" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1" wmask="0x3FFF" bvalue="0x39FF" >
+    <mask name="WDT"    value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE"  value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="FOSC"   value="0x0013" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"       />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"       />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"       />
+      <value value="0x0003" name="EC_IO"        cname="_EXTCLK"       />
+      <value value="0x0010" name="INTRC_IO"     cname="_INTRC_IO"     />
+      <value value="0x0011" name="INTRC_CLKOUT" cname="_INTRC_CLKOUT" />
+      <value value="0x0012" name="EXTRC_IO"     cname="_EXTRC_IO"     />
+      <value value="0x0013" name="EXTRC_CLKOUT" cname="_EXTRC_CLKOUT" />
+    </mask>
+    <mask name="MCLRE"  value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLR_OFF" />
+      <value value="0x0020" name="External" cname="_MCLR_ON"  />
+    </mask>
+    <mask name="BODEN"  value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BOREN_0" />
+      <value value="0x0040" name="On"  cname="_BOREN_1" />
+    </mask>
+    <mask name="BORV"   value="0x0180" >
+      <value value="0x0000" name="4.5" cname="_VBOR_4_5" />
+      <value value="0x0080" name="4.2" cname="_VBOR_4_2" />
+      <value value="0x0100" name="2.7" cname="_VBOR_2_7" />
+      <value value="0x0180" name="2.0" cname="_VBOR_2_0" />
+    </mask>
+    <mask name="DEBUG"  value="0x0800" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x0800" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+    <mask name="CCP2MX" value="0x1000" >
+      <value value="0x0000" name="RB3" cname="_CCP2_RB3" />
+      <value value="0x1000" name="RC1" cname="_CCP2_RC1" />
+    </mask>
+    <mask name="CP"     value="0x2000" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x2000" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG2" wmask="0x3FFF" bvalue="0x0043" >
+    <mask name="FCMEN"  value="0x0001" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0001" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"   value="0x0002" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0002" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="BORSEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BORSEN_0" />
+      <value value="0x0040" name="On"  cname="_BORSEN_1" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP/RE3"           />
+    <pin index="2"  name="RA0/AN0"                />
+    <pin index="3"  name="RA1/AN1"                />
+    <pin index="4"  name="RA2/AN2/VREF-/CVREF"    />
+    <pin index="5"  name="RA3/AN3/VREF+"          />
+    <pin index="6"  name="RA4/T0CKI/C1OUT"        />
+    <pin index="7"  name="RA5/SS/AN4/LVDIN/C2OUT" />
+    <pin index="8"  name="VSS"                    />
+    <pin index="9"  name="OSC1/CLKIN/RA7"         />
+    <pin index="10" name="OSC2/CLKOUT/RA6"        />
+    <pin index="11" name="RC0/T1OSI/T1CKI"        />
+    <pin index="12" name="RC1/T1OSO/CCP2"         />
+    <pin index="13" name="RC2/CCP1"               />
+    <pin index="14" name="RC3/SCK/SCL"            />
+    <pin index="15" name="RC4/SDI/SDA"            />
+    <pin index="16" name="RC5/SDO"                />
+    <pin index="17" name="RC6/TX/CK"              />
+    <pin index="18" name="RC7/RX/DT"              />
+    <pin index="19" name="VSS"                    />
+    <pin index="20" name="VDD"                    />
+    <pin index="21" name="RB0/INT/AN12"           />
+    <pin index="22" name="RB1/AN10"               />
+    <pin index="23" name="RB2/AN8"                />
+    <pin index="24" name="RB3/CCP2/AN9"           />
+    <pin index="25" name="RB4/AN11"               />
+    <pin index="26" name="RB5/AN13/CCP3"          />
+    <pin index="27" name="RB6/PGC"                />
+    <pin index="28" name="RB7/PGD"                />
+  </package>
+
+  <package types="qfn"            nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn"            nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F74.xml b/src/devices/pic/xml_data/16F74.xml
new file mode 100644
index 0000000..fc2b312
--- /dev/null
+++ b/src/devices/pic/xml_data/16F74.xml
@@ -0,0 +1,196 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F74" document="010220" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x0620"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"           min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"      min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x0000" end="0x0FFF" />
+  <memory name="user_ids"  start="0x2000" end="0x2003" rmask="0x000F" />
+  <memory name="device_id" start="0x2006" end="0x2006" />
+  <memory name="config"    start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x005F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" ecnames="_WDTEN_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  ecnames="_WDTEN_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  ecnames="_PWRTEN_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" ecnames="_PWRTEN_OFF" />
+    </mask>
+    <mask name="CP"    value="0x0010" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x0010" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" ecnames="_BOREN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  ecnames="_BOREN_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F747.xml b/src/devices/pic/xml_data/16F747.xml
new file mode 100644
index 0000000..ec03640
--- /dev/null
+++ b/src/devices/pic/xml_data/16F747.xml
@@ -0,0 +1,196 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F747" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x0BE0"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010221" datasheet="30498" progsheet="30492" erratas="80177" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x2A42" cchecksum="0xF610" />
+    <checksum protected="All"     bchecksum="0x4484" cchecksum="0x1052" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"           min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"      min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x0FFF" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2008" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1" wmask="0x3FFF" bvalue="0x39FF" >
+    <mask name="WDT"    value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE"  value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="FOSC"   value="0x0013" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"       />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"       />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"       />
+      <value value="0x0003" name="EC_IO"        cname="_EXTCLK"       />
+      <value value="0x0010" name="INTRC_IO"     cname="_INTRC_IO"     />
+      <value value="0x0011" name="INTRC_CLKOUT" cname="_INTRC_CLKOUT" />
+      <value value="0x0012" name="EXTRC_IO"     cname="_EXTRC_IO"     />
+      <value value="0x0013" name="EXTRC_CLKOUT" cname="_EXTRC_CLKOUT" />
+    </mask>
+    <mask name="MCLRE"  value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLR_OFF" />
+      <value value="0x0020" name="External" cname="_MCLR_ON"  />
+    </mask>
+    <mask name="BODEN"  value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BOREN_0" />
+      <value value="0x0040" name="On"  cname="_BOREN_1" />
+    </mask>
+    <mask name="BORV"   value="0x0180" >
+      <value value="0x0000" name="4.5" cname="_VBOR_4_5" />
+      <value value="0x0080" name="4.2" cname="_VBOR_4_2" />
+      <value value="0x0100" name="2.7" cname="_VBOR_2_7" />
+      <value value="0x0180" name="2.0" cname="_VBOR_2_0" />
+    </mask>
+    <mask name="DEBUG"  value="0x0800" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x0800" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+    <mask name="CCP2MX" value="0x1000" >
+      <value value="0x0000" name="RB3" cname="_CCP2_RB3" />
+      <value value="0x1000" name="RC1" cname="_CCP2_RC1" />
+    </mask>
+    <mask name="CP"     value="0x2000" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x2000" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG2" wmask="0x3FFF" bvalue="0x0043" >
+    <mask name="FCMEN"  value="0x0001" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0001" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"   value="0x0002" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0002" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="BORSEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BORSEN_0" />
+      <value value="0x0040" name="On"  cname="_BORSEN_1" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="MCLR/VPP/RE3"           />
+    <pin index="2"  name="RA0/AN0"                />
+    <pin index="3"  name="RA1/AN1"                />
+    <pin index="4"  name="RA2/AN2/VREF-/CVREF"    />
+    <pin index="5"  name="RA3/AN3/VREF+"          />
+    <pin index="6"  name="RA4/T0CKI/C1OUT"        />
+    <pin index="7"  name="RA5/SS/AN4/LVDIN/C2OUT" />
+    <pin index="8"  name="RE0/RD/AN5"             />
+    <pin index="9"  name="RE1/WR/AN6"             />
+    <pin index="10" name="RE2/CS/AN7"             />
+    <pin index="11" name="VDD"                    />
+    <pin index="12" name="VSS"                    />
+    <pin index="13" name="OSC1/CLKIN/RA7"         />
+    <pin index="14" name="OSC2/CLKOUT/RA6"        />
+    <pin index="15" name="RC0/T1OSO/T1CKI"        />
+    <pin index="16" name="RC1/T1OSI/CCP2"         />
+    <pin index="17" name="RC2/CCP1"               />
+    <pin index="18" name="RC3/SCK/SCL"            />
+    <pin index="19" name="RD0/PSP0"               />
+    <pin index="20" name="RD1/PSP1"               />
+    <pin index="21" name="RD2/PSP2"               />
+    <pin index="22" name="RD3/PSP3"               />
+    <pin index="23" name="RC4/SDI/SDA"            />
+    <pin index="24" name="RC5/SDO"                />
+    <pin index="25" name="RC6/TX/CK"              />
+    <pin index="26" name="RC7/RX/DT"              />
+    <pin index="27" name="RD4/PSP4"               />
+    <pin index="28" name="RD5/PSP5"               />
+    <pin index="29" name="RD6/PSP6"               />
+    <pin index="30" name="RD7/PSP7"               />
+    <pin index="31" name="VSS"                    />
+    <pin index="32" name="VDD"                    />
+    <pin index="33" name="RB0/INT/AN12"           />
+    <pin index="34" name="RB1/AN10"               />
+    <pin index="35" name="RB2/AN8"                />
+    <pin index="36" name="RB3/CCP2/AN9"           />
+    <pin index="37" name="RB4/AN11"               />
+    <pin index="38" name="RB5/AN13/CCP3"          />
+    <pin index="39" name="RB6/PGC"                />
+    <pin index="40" name="RB7/PGD"                />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F76.xml b/src/devices/pic/xml_data/16F76.xml
new file mode 100644
index 0000000..3b6fcf3
--- /dev/null
+++ b/src/devices/pic/xml_data/16F76.xml
@@ -0,0 +1,121 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F76" document="010222" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x0640"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"           min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"      min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x0000" end="0x1FFF" />
+  <memory name="user_ids"  start="0x2000" end="0x2003" rmask="0x000F" />
+  <memory name="device_id" start="0x2006" end="0x2006" />
+  <memory name="config"    start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x005F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" ecnames="_WDTEN_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  ecnames="_WDTEN_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  ecnames="_PWRTEN_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" ecnames="_PWRTEN_OFF" />
+    </mask>
+    <mask name="CP"    value="0x0010" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x0010" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" ecnames="_BOREN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  ecnames="_BOREN_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"        />
+    <pin index="2"  name="RA0/AN0"         />
+    <pin index="3"  name="RA1/AN1"         />
+    <pin index="4"  name="RA2/AN2"         />
+    <pin index="5"  name="RA3/AN3/VREF"    />
+    <pin index="6"  name="RA4/T0CKI"       />
+    <pin index="7"  name="RA5/SS/AN4"      />
+    <pin index="8"  name="VSS"             />
+    <pin index="9"  name="OSC1/CLKIN"      />
+    <pin index="10" name="OSC2/CLKOUT"     />
+    <pin index="11" name="RC0/T1OSI/T1CKI" />
+    <pin index="12" name="RC1/T1OSO/CCP2"  />
+    <pin index="13" name="RC2/CCP1"        />
+    <pin index="14" name="RC3/SCK/SCL"     />
+    <pin index="15" name="RC4/SDI/SDA"     />
+    <pin index="16" name="RC5/SDO"         />
+    <pin index="17" name="RC6/TX/CK"       />
+    <pin index="18" name="RC7/RX/DT"       />
+    <pin index="19" name="VSS"             />
+    <pin index="20" name="VDD"             />
+    <pin index="21" name="RB0/INT"         />
+    <pin index="22" name="RB1"             />
+    <pin index="23" name="RB2"             />
+    <pin index="24" name="RB3"             />
+    <pin index="25" name="RB4"             />
+    <pin index="26" name="RB5"             />
+    <pin index="27" name="RB6/PGC"         />
+    <pin index="28" name="RB7/PGD"         />
+  </package>
+
+  <package types="mlf"            nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F767.xml b/src/devices/pic/xml_data/16F767.xml
new file mode 100644
index 0000000..77ed134
--- /dev/null
+++ b/src/devices/pic/xml_data/16F767.xml
@@ -0,0 +1,215 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F767" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x0EA0"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010223" datasheet="30498" progsheet="30492" erratas="80177" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x1A42" cchecksum="0xE610" />
+    <checksum protected="All"     bchecksum="0x3484" cchecksum="0x0052" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"           min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"      min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x1FFF" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2008" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1" wmask="0x3FFF" bvalue="0x39FF" >
+    <mask name="WDT"    value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE"  value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="FOSC"   value="0x0013" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"       />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"       />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"       />
+      <value value="0x0003" name="EC_IO"        cname="_EXTCLK"       />
+      <value value="0x0010" name="INTRC_IO"     cname="_INTRC_IO"     />
+      <value value="0x0011" name="INTRC_CLKOUT" cname="_INTRC_CLKOUT" />
+      <value value="0x0012" name="EXTRC_IO"     cname="_EXTRC_IO"     />
+      <value value="0x0013" name="EXTRC_CLKOUT" cname="_EXTRC_CLKOUT" />
+    </mask>
+    <mask name="MCLRE"  value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLR_OFF" />
+      <value value="0x0020" name="External" cname="_MCLR_ON"  />
+    </mask>
+    <mask name="BODEN"  value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BOREN_0" />
+      <value value="0x0040" name="On"  cname="_BOREN_1" />
+    </mask>
+    <mask name="BORV"   value="0x0180" >
+      <value value="0x0000" name="4.5" cname="_VBOR_4_5" />
+      <value value="0x0080" name="4.2" cname="_VBOR_4_2" />
+      <value value="0x0100" name="2.7" cname="_VBOR_2_7" />
+      <value value="0x0180" name="2.0" cname="_VBOR_2_0" />
+    </mask>
+    <mask name="DEBUG"  value="0x0800" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x0800" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+    <mask name="CCP2MX" value="0x1000" >
+      <value value="0x0000" name="RB3" cname="_CCP2_RB3" />
+      <value value="0x1000" name="RC1" cname="_CCP2_RC1" />
+    </mask>
+    <mask name="CP"     value="0x2000" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x2000" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG2" wmask="0x3FFF" bvalue="0x0043" >
+    <mask name="FCMEN"  value="0x0001" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0001" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"   value="0x0002" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0002" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="BORSEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BORSEN_0" />
+      <value value="0x0040" name="On"  cname="_BORSEN_1" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP/RE3"           />
+    <pin index="2"  name="RA0/AN0"                />
+    <pin index="3"  name="RA1/AN1"                />
+    <pin index="4"  name="RA2/AN2/VREF-/CVREF"    />
+    <pin index="5"  name="RA3/AN3/VREF+"          />
+    <pin index="6"  name="RA4/T0CKI/C1OUT"        />
+    <pin index="7"  name="RA5/SS/AN4/LVDIN/C2OUT" />
+    <pin index="8"  name="VSS"                    />
+    <pin index="9"  name="OSC1/CLKIN/RA7"         />
+    <pin index="10" name="OSC2/CLKOUT/RA6"        />
+    <pin index="11" name="RC0/T1OSI/T1CKI"        />
+    <pin index="12" name="RC1/T1OSO/CCP2"         />
+    <pin index="13" name="RC2/CCP1"               />
+    <pin index="14" name="RC3/SCK/SCL"            />
+    <pin index="15" name="RC4/SDI/SDA"            />
+    <pin index="16" name="RC5/SDO"                />
+    <pin index="17" name="RC6/TX/CK"              />
+    <pin index="18" name="RC7/RX/DT"              />
+    <pin index="19" name="VSS"                    />
+    <pin index="20" name="VDD"                    />
+    <pin index="21" name="RB0/INT/AN12"           />
+    <pin index="22" name="RB1/AN10"               />
+    <pin index="23" name="RB2/AN8"                />
+    <pin index="24" name="RB3/CCP2/AN9"           />
+    <pin index="25" name="RB4/AN11"               />
+    <pin index="26" name="RB5/AN13/CCP3"          />
+    <pin index="27" name="RB6/PGC"                />
+    <pin index="28" name="RB7/PGD"                />
+  </package>
+
+  <package types="qfn"            nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn"            nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F77.xml b/src/devices/pic/xml_data/16F77.xml
new file mode 100644
index 0000000..e02e2cb
--- /dev/null
+++ b/src/devices/pic/xml_data/16F77.xml
@@ -0,0 +1,196 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F77" document="010224" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x0660"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"           min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"      min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x0000" end="0x1FFF" />
+  <memory name="user_ids"  start="0x2000" end="0x2003" rmask="0x000F" />
+  <memory name="device_id" start="0x2006" end="0x2006" />
+  <memory name="config"    start="0x2007" end="0x2007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x005F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" ecnames="_WDTEN_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  ecnames="_WDTEN_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  ecnames="_PWRTEN_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" ecnames="_PWRTEN_OFF" />
+    </mask>
+    <mask name="CP"    value="0x0010" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x0010" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" ecnames="_BOREN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  ecnames="_BOREN_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F777.xml b/src/devices/pic/xml_data/16F777.xml
new file mode 100644
index 0000000..71899b2
--- /dev/null
+++ b/src/devices/pic/xml_data/16F777.xml
@@ -0,0 +1,196 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F777" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x0DE0"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010225" datasheet="30498" progsheet="30492" erratas="80177" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"     bchecksum="0x1A42" cchecksum="0xE610" />
+    <checksum protected="All"     bchecksum="0x3484" cchecksum="0x0052" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"           min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"      min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x1FFF" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2008" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1" wmask="0x3FFF" bvalue="0x39FF" >
+    <mask name="WDT"    value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE"  value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="FOSC"   value="0x0013" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"       />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"       />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"       />
+      <value value="0x0003" name="EC_IO"        cname="_EXTCLK"       />
+      <value value="0x0010" name="INTRC_IO"     cname="_INTRC_IO"     />
+      <value value="0x0011" name="INTRC_CLKOUT" cname="_INTRC_CLKOUT" />
+      <value value="0x0012" name="EXTRC_IO"     cname="_EXTRC_IO"     />
+      <value value="0x0013" name="EXTRC_CLKOUT" cname="_EXTRC_CLKOUT" />
+    </mask>
+    <mask name="MCLRE"  value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLR_OFF" />
+      <value value="0x0020" name="External" cname="_MCLR_ON"  />
+    </mask>
+    <mask name="BODEN"  value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BOREN_0" />
+      <value value="0x0040" name="On"  cname="_BOREN_1" />
+    </mask>
+    <mask name="BORV"   value="0x0180" >
+      <value value="0x0000" name="4.5" cname="_VBOR_4_5" />
+      <value value="0x0080" name="4.2" cname="_VBOR_4_2" />
+      <value value="0x0100" name="2.7" cname="_VBOR_2_7" />
+      <value value="0x0180" name="2.0" cname="_VBOR_2_0" />
+    </mask>
+    <mask name="DEBUG"  value="0x0800" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x0800" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+    <mask name="CCP2MX" value="0x1000" >
+      <value value="0x0000" name="RB3" cname="_CCP2_RB3" />
+      <value value="0x1000" name="RC1" cname="_CCP2_RC1" />
+    </mask>
+    <mask name="CP"     value="0x2000" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x2000" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG2" wmask="0x3FFF" bvalue="0x0043" >
+    <mask name="FCMEN"  value="0x0001" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0001" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"   value="0x0002" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0002" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="BORSEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BORSEN_0" />
+      <value value="0x0040" name="On"  cname="_BORSEN_1" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="MCLR/VPP/RE3"           />
+    <pin index="2"  name="RA0/AN0"                />
+    <pin index="3"  name="RA1/AN1"                />
+    <pin index="4"  name="RA2/AN2/VREF-/CVREF"    />
+    <pin index="5"  name="RA3/AN3/VREF+"          />
+    <pin index="6"  name="RA4/T0CKI/C1OUT"        />
+    <pin index="7"  name="RA5/SS/AN4/LVDIN/C2OUT" />
+    <pin index="8"  name="RE0/RD/AN5"             />
+    <pin index="9"  name="RE1/WR/AN6"             />
+    <pin index="10" name="RE2/CS/AN7"             />
+    <pin index="11" name="VDD"                    />
+    <pin index="12" name="VSS"                    />
+    <pin index="13" name="OSC1/CLKIN/RA7"         />
+    <pin index="14" name="OSC2/CLKOUT/RA6"        />
+    <pin index="15" name="RC0/T1OSO/T1CKI"        />
+    <pin index="16" name="RC1/T1OSI/CCP2"         />
+    <pin index="17" name="RC2/CCP1"               />
+    <pin index="18" name="RC3/SCK/SCL"            />
+    <pin index="19" name="RD0/PSP0"               />
+    <pin index="20" name="RD1/PSP1"               />
+    <pin index="21" name="RD2/PSP2"               />
+    <pin index="22" name="RD3/PSP3"               />
+    <pin index="23" name="RC4/SDI/SDA"            />
+    <pin index="24" name="RC5/SDO"                />
+    <pin index="25" name="RC6/TX/CK"              />
+    <pin index="26" name="RC7/RX/DT"              />
+    <pin index="27" name="RD4/PSP4"               />
+    <pin index="28" name="RD5/PSP5"               />
+    <pin index="29" name="RD6/PSP6"               />
+    <pin index="30" name="RD7/PSP7"               />
+    <pin index="31" name="VSS"                    />
+    <pin index="32" name="VDD"                    />
+    <pin index="33" name="RB0/INT/AN12"           />
+    <pin index="34" name="RB1/AN10"               />
+    <pin index="35" name="RB2/AN8"                />
+    <pin index="36" name="RB3/CCP2/AN9"           />
+    <pin index="37" name="RB4/AN11"               />
+    <pin index="38" name="RB5/AN13/CCP3"          />
+    <pin index="39" name="RB6/PGC"                />
+    <pin index="40" name="RB7/PGD"                />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F785.xml b/src/devices/pic/xml_data/16F785.xml
new file mode 100644
index 0000000..80c9091
--- /dev/null
+++ b/src/devices/pic/xml_data/16F785.xml
@@ -0,0 +1,120 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F785" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x1200" id_high_voltage="0x1220"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="020257" datasheet="41249" progsheet="41237" erratas="80234" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"                  bchecksum="0x07FF" cchecksum="0xD3CD" />
+    <checksum protected="All" mprotected="CPD" bchecksum="0x173E" cchecksum="0xE30C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended" special="high_voltage">
+    <frequency start="0"  end="8"  vdd_min="2"   vdd_max="5.0" />
+    <frequency start="8"  end="10" vdd_min="3"   vdd_max="5.0" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.0" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="12"  nominal="11" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x07FF" />
+  <memory name="calibration"  start="0x2008" end="0x2009" cal_opmask="0x0000"     cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x0FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0080" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0300" >
+      <value value="0x0000" name="Off"      cname="_BOR_OFF"    ecnames="_BOD_OFF"    />
+      <value value="0x0100" name="Software" cname="_BOR_SBOREN" ecnames="_BOD_SBODEN" />
+      <value value="0x0200" name="On_run"   cname="_BOR_NSLEEP" ecnames="_BOD_NSLEEP" />
+      <value value="0x0300" name="On"       cname="_BOR_ON"     ecnames="_BOD_ON"     />
+    </mask>
+    <mask name="IESO"  value="0x0400" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0400" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="FCMEN" value="0x0800" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0800" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="20" >
+    <pin index="1"  name="VDD"                          />
+    <pin index="2"  name="RA5/T1CKI/OSC1/CLKIN"         />
+    <pin index="3"  name="RA4/AN3/T1G/OSC2/CLKOUT"      />
+    <pin index="4"  name="RA3/MCLR/VPP"                 />
+    <pin index="5"  name="RC5/CPP1"                     />
+    <pin index="6"  name="RC4/C2OUT/PH2"                />
+    <pin index="7"  name="RC3/AN7/C12IN3-/OP1"          />
+    <pin index="8"  name="RC6/AN8/OP1-"                 />
+    <pin index="9"  name="RC7/AN9/OP1+"                 />
+    <pin index="10" name="RB7/SYNC"                     />
+    <pin index="11" name="RB6"                          />
+    <pin index="12" name="RB5/AN11/OP2+"                />
+    <pin index="13" name="RB4/AN10/OP2-"                />
+    <pin index="14" name="RC2/AN6/C12IN2-/OP2"          />
+    <pin index="15" name="RC1/AN5/C12IN1-/PH1"          />
+    <pin index="16" name="RC0/AN4/C12IN+"               />
+    <pin index="17" name="RA2/AN2/C1OUT/T0CKI/INT"      />
+    <pin index="18" name="RA1/AN1/C12IN0-/VREF/ICSPCLK" />
+    <pin index="19" name="RA0/AN0/C1IN+/ICSPDAT"        />
+    <pin index="20" name="VSS"                          />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F818.xml b/src/devices/pic/xml_data/16F818.xml
new file mode 100644
index 0000000..0ff73b5
--- /dev/null
+++ b/src/devices/pic/xml_data/16F818.xml
@@ -0,0 +1,176 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F818" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x04C0"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010226" datasheet="39598" progsheet="39603" erratas="80159 80212" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x3BFF" cchecksum="0x07CD" />
+    <checksum protected="All" bchecksum="0x5BFE" cchecksum="0x27CC" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13.5" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"  nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x03FF" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x007F" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3FFF" >
+    <mask name="WDT"    value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE"  value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="FOSC"   value="0x0013" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"       />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"       />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"       />
+      <value value="0x0003" name="EC_IO"        cname="_EXTCLK"       />
+      <value value="0x0010" name="INTRC_IO"     cname="_INTRC_IO"     />
+      <value value="0x0011" name="INTRC_CLKOUT" cname="_INTRC_CLKOUT" />
+      <value value="0x0012" name="EXTRC_IO"     cname="_EXTRC_IO"     />
+      <value value="0x0013" name="EXTRC_CLKOUT" cname="_EXTRC_CLKOUT" />
+    </mask>
+    <mask name="MCLRE"  value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLR_OFF" />
+      <value value="0x0020" name="External" cname="_MCLR_ON"  />
+    </mask>
+    <mask name="BODEN"  value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x0080" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x0080" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="CPD"    value="0x0100" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0100" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="WRT"    value="0x0600" >
+      <value value="0x0000" name="invalid" />
+      <value value="0x0200" name="000:3FF" cname="_WRT_ENABLE_1024" />
+      <value value="0x0400" name="000:1FF" cname="_WRT_ENABLE_512"  />
+      <value value="0x0600" name="Off"     cname="_WRT_ENABLE_OFF"  />
+    </mask>
+    <mask name="DEBUG"  value="0x0800" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x0800" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+    <mask name="CCP1MX" value="0x1000" >
+      <value value="0x0000" name="RB3" cname="_CCP1_RB3" />
+      <value value="0x1000" name="RB2" cname="_CCP1_RB2" />
+    </mask>
+    <mask name="CP"     value="0x2000" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x2000" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2/AN2/VREF-"       />
+    <pin index="2"  name="RA3/AN3/VREF+"       />
+    <pin index="3"  name="RA4/AN4/T0CKI"       />
+    <pin index="4"  name="RA5/MCLR/VPP"        />
+    <pin index="5"  name="VSS"                 />
+    <pin index="6"  name="RB0/INT"             />
+    <pin index="7"  name="RB1/SDI/SDA"         />
+    <pin index="8"  name="RB2/SDO/CCP1"        />
+    <pin index="9"  name="RB3/CCP1/PGM"        />
+    <pin index="10" name="RB4/SCK/SCL"         />
+    <pin index="11" name="RB5/SS"              />
+    <pin index="12" name="RB6/T1OSO/T1CKI/PGC" />
+    <pin index="13" name="RB7/T1OSI/PGD"       />
+    <pin index="14" name="VDD"                 />
+    <pin index="15" name="RA6/OSC2/CLKOUT"     />
+    <pin index="16" name="RA7/OSC1/CLKIN"      />
+    <pin index="17" name="RA0/AN0"             />
+    <pin index="18" name="RA1/AN1"             />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F819.xml b/src/devices/pic/xml_data/16F819.xml
new file mode 100644
index 0000000..e7ee0a6
--- /dev/null
+++ b/src/devices/pic/xml_data/16F819.xml
@@ -0,0 +1,176 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F819" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x04E0"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010227" datasheet="39598" progsheet="39603" erratas="80159 80212" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x37FF" cchecksum="0x03CD" />
+    <checksum protected="All" bchecksum="0x57FE" cchecksum="0x23CC" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13.5" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"  nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x07FF" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3FFF" >
+    <mask name="WDT"    value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE"  value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="FOSC"   value="0x0013" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"       />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"       />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"       />
+      <value value="0x0003" name="EC_IO"        cname="_EXTCLK"       />
+      <value value="0x0010" name="INTRC_IO"     cname="_INTRC_IO"     />
+      <value value="0x0011" name="INTRC_CLKOUT" cname="_INTRC_CLKOUT" />
+      <value value="0x0012" name="EXTRC_IO"     cname="_EXTRC_IO"     />
+      <value value="0x0013" name="EXTRC_CLKOUT" cname="_EXTRC_CLKOUT" />
+    </mask>
+    <mask name="MCLRE"  value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLR_OFF" />
+      <value value="0x0020" name="External" cname="_MCLR_ON"  />
+    </mask>
+    <mask name="BODEN"  value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x0080" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x0080" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="CPD"    value="0x0100" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0100" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="WRT"    value="0x0600" >
+      <value value="0x0000" name="000:5FF" cname="_WRT_ENABLE_1536" />
+      <value value="0x0200" name="000:3FF" cname="_WRT_ENABLE_1024" />
+      <value value="0x0400" name="000:1FF" cname="_WRT_ENABLE_512"  />
+      <value value="0x0600" name="Off"     cname="_WRT_ENABLE_OFF"  />
+    </mask>
+    <mask name="DEBUG"  value="0x0800" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x0800" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+    <mask name="CCP1MX" value="0x1000" >
+      <value value="0x0000" name="RB3" cname="_CCP1_RB3" />
+      <value value="0x1000" name="RB2" cname="_CCP1_RB2" />
+    </mask>
+    <mask name="CP"     value="0x2000" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x2000" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2/AN2/VREF-"       />
+    <pin index="2"  name="RA3/AN3/VREF+"       />
+    <pin index="3"  name="RA4/AN4/T0CKI"       />
+    <pin index="4"  name="RA5/MCLR/VPP"        />
+    <pin index="5"  name="VSS"                 />
+    <pin index="6"  name="RB0/INT"             />
+    <pin index="7"  name="RB1/SDI/SDA"         />
+    <pin index="8"  name="RB2/SDO/CCP1"        />
+    <pin index="9"  name="RB3/CCP1/PGM"        />
+    <pin index="10" name="RB4/SCK/SCL"         />
+    <pin index="11" name="RB5/SS"              />
+    <pin index="12" name="RB6/T1OSO/T1CKI/PGC" />
+    <pin index="13" name="RB7/T1OSI/PGD"       />
+    <pin index="14" name="VDD"                 />
+    <pin index="15" name="RA6/OSC2/CLKOUT"     />
+    <pin index="16" name="RA7/OSC1/CLKIN"      />
+    <pin index="17" name="RA0/AN0"             />
+    <pin index="18" name="RA1/AN1"             />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F83.xml b/src/devices/pic/xml_data/16F83.xml
new file mode 100644
index 0000000..25b80a3
--- /dev/null
+++ b/src/devices/pic/xml_data/16F83.xml
@@ -0,0 +1,106 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F83" document="010228" status="NR" alternative="16F84A" memory_technology="FLASH" self_write="no" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x3DFF" cchecksum="0x09CD" />
+    <checksum protected="All" bchecksum="0x3E0E" cchecksum="0x09DC" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="10" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="2" vdd_min="2" vdd_max="6" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12"  max="14"  nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x01FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="config"   start="0x2007" end="0x2007" />
+  <memory name="eeprom"   start="0x0000" end="0x003F" hexfile_offset="0x2100" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3FFF" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="CP"    value="0x3FF0" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x3FF0" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="RA4/T0CKI"   />
+    <pin index="4"  name="MCLR"        />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0/INT"     />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F84.xml b/src/devices/pic/xml_data/16F84.xml
new file mode 100644
index 0000000..62c1f8d
--- /dev/null
+++ b/src/devices/pic/xml_data/16F84.xml
@@ -0,0 +1,106 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F84" document="010229" status="NR" alternative="16F84A" memory_technology="FLASH" self_write="no" architecture="16X"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x3BFF" cchecksum="0x07CD" />
+    <checksum protected="All" bchecksum="0x3C0E" cchecksum="0x07DC" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="6"   />
+    <frequency start="4" end="10" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="2" vdd_min="2" vdd_max="6" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12"  max="14"  nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x0000" end="0x03FF" />
+  <memory name="user_ids" start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="config"   start="0x2007" end="0x2007" />
+  <memory name="eeprom"   start="0x0000" end="0x003F" hexfile_offset="0x2100" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3FFF" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="CP"    value="0x3FF0" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x3FF0" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="RA4/T0CKI"   />
+    <pin index="4"  name="MCLR"        />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0/INT"     />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F84A.xml b/src/devices/pic/xml_data/16F84A.xml
new file mode 100644
index 0000000..ffffba1
--- /dev/null
+++ b/src/devices/pic/xml_data/16F84A.xml
@@ -0,0 +1,108 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F84A" document="010230" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x0560"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x3BFF" cchecksum="0x07CD" />
+    <checksum protected="All" bchecksum="0x3C0E" cchecksum="0x07DC" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0" end="4"  vdd_min="4"   vdd_max="5.5" />
+    <frequency start="4" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12"  max="14"  nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x0000" end="0x03FF" />
+  <memory name="user_ids"  start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id" start="0x2006" end="0x2006" />
+  <memory name="config"    start="0x2007" end="0x2007" />
+  <memory name="eeprom"    start="0x0000" end="0x003F" hexfile_offset="0x2100" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3FFF" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="CP"    value="0x3FF0" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x3FF0" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="RA4/T0CKI"   />
+    <pin index="4"  name="MCLR"        />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0/INT"     />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F87.xml b/src/devices/pic/xml_data/16F87.xml
new file mode 100644
index 0000000..835b481
--- /dev/null
+++ b/src/devices/pic/xml_data/16F87.xml
@@ -0,0 +1,186 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F87" status="IP" memory_technology="FLASH" self_write="yes" architecture="16X" id="0x0720"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010231" datasheet="30488" progsheet="39607" erratas="80171 80301" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x3002" cchecksum="0xFBD0" />
+    <checksum protected="All" bchecksum="0x5004" cchecksum="0x1BD2" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"           min="10"  max="13.5" nominal="13" />
+  <voltages name="vdd_prog"      min="4.5" max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x0FFF" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2008" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1" wmask="0x3FFF" bvalue="0x3FFF" >
+    <mask name="WDT"    value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE"  value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="FOSC"   value="0x0013" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"       />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"       />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"       />
+      <value value="0x0003" name="EC_IO"        cname="_EXTCLK"       />
+      <value value="0x0010" name="INTRC_IO"     cname="_INTRC_IO"     />
+      <value value="0x0011" name="INTRC_CLKOUT" cname="_INTRC_CLKOUT" />
+      <value value="0x0012" name="EXTRC_IO"     cname="_EXTRC_IO"     />
+      <value value="0x0013" name="EXTRC_CLKOUT" cname="_EXTRC_CLKOUT" />
+    </mask>
+    <mask name="MCLRE"  value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLR_OFF" />
+      <value value="0x0020" name="External" cname="_MCLR_ON"  />
+    </mask>
+    <mask name="BODEN"  value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x0080" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x0080" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="CPD"    value="0x0100" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0100" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="WRT"    value="0x0600" >
+      <value value="0x0000" name="All"     cname="_WRT_PROTECT_ALL"  />
+      <value value="0x0200" name="000:7FF" cname="_WRT_PROTECT_2048" />
+      <value value="0x0400" name="000:0FF" cname="_WRT_PROTECT_256"  />
+      <value value="0x0600" name="Off"     cname="_WRT_PROTECT_OFF"  />
+    </mask>
+    <mask name="DEBUG"  value="0x0800" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x0800" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+    <mask name="CCP1MX" value="0x1000" >
+      <value value="0x0000" name="RB3" cname="_CCP1_RB3" />
+      <value value="0x1000" name="RB0" cname="_CCP1_RB0" />
+    </mask>
+    <mask name="CP"     value="0x2000" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x2000" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG2" wmask="0x3FFF" bvalue="0x0003" >
+    <mask name="FCMEN" value="0x0001" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0001" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x0002" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0002" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2/AN2/VREF-/CVREF"     />
+    <pin index="2"  name="RA3/AN3/VREF+/C1OUT"     />
+    <pin index="3"  name="RA4/AN4/T0CKI/C2OUT"     />
+    <pin index="4"  name="RA5/MCLR/VPP"            />
+    <pin index="5"  name="VSS"                     />
+    <pin index="6"  name="RB0/INT/CCP1"            />
+    <pin index="7"  name="RB1/SDI/SDA"             />
+    <pin index="8"  name="RB2/SDO/CCP1"            />
+    <pin index="9"  name="RB3/CCP1/PGM"            />
+    <pin index="10" name="RB4/SCK/SCL"             />
+    <pin index="11" name="RB5/SS/TX/CK"            />
+    <pin index="12" name="RB6/AN5/T1OSO/T1CKI/PGC" />
+    <pin index="13" name="RB7/AN6/T1OSI/PGD"       />
+    <pin index="14" name="VDD"                     />
+    <pin index="15" name="RA6/OSC2/CLKOUT"         />
+    <pin index="16" name="RA7/OSC1/CLKIN"          />
+    <pin index="17" name="RA0/AN0"                 />
+    <pin index="18" name="RA1/AN1"                 />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F870.xml b/src/devices/pic/xml_data/16F870.xml
new file mode 100644
index 0000000..ec66b54
--- /dev/null
+++ b/src/devices/pic/xml_data/16F870.xml
@@ -0,0 +1,120 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F870" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x0D00"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010232" datasheet="30569" progsheet="39025" erratas="80077" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x33FF" cchecksum="0xFFCD" />
+    <checksum protected="All" bchecksum="0x3FCE" cchecksum="0x0B9C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0"  end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="2" vdd_max="5.5" vdd_min_end="3" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13.5" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"  nominal="5"  />
+  <voltages name="vdd_prog_write" min="2.2" max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x07FF" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x003F" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3BFF" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="LVP"   value="0x0080" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x0080" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="CPD"   value="0x0100" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0100" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="WRT"   value="0x0200" >
+      <value value="0x0000" name="Off" cname="_WRT_ENABLE_OFF" />
+      <value value="0x0200" name="All" cname="_WRT_ENABLE_ON"  />
+    </mask>
+    <mask name="DEBUG" value="0x0800" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x0800" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+    <mask name="CP"    value="0x3030" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x3030" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP/THV"    />
+    <pin index="2"  name="RA0/AN0"         />
+    <pin index="3"  name="RA1/AN1"         />
+    <pin index="4"  name="RA2/AN2/VREF-"   />
+    <pin index="5"  name="RA3/AN3/VREF+"   />
+    <pin index="6"  name="RA4/T0CKI"       />
+    <pin index="7"  name="RA5/AN4"         />
+    <pin index="8"  name="VSS"             />
+    <pin index="9"  name="OSC1/CLKIN"      />
+    <pin index="10" name="OSC2/CLKOUT"     />
+    <pin index="11" name="RC0/T1OSO/T1CKI" />
+    <pin index="12" name="RC1/T1OSI"       />
+    <pin index="13" name="RC2/CCP1"        />
+    <pin index="14" name="RC3"             />
+    <pin index="15" name="RC4"             />
+    <pin index="16" name="RC5"             />
+    <pin index="17" name="RC6/TX/CK"       />
+    <pin index="18" name="RC7/RX/DT"       />
+    <pin index="19" name="VSS"             />
+    <pin index="20" name="VDD"             />
+    <pin index="21" name="RB0/INT"         />
+    <pin index="22" name="RB1"             />
+    <pin index="23" name="RB2"             />
+    <pin index="24" name="RB3/PGM"         />
+    <pin index="25" name="RB4"             />
+    <pin index="26" name="RB5"             />
+    <pin index="27" name="RB6/PGC"         />
+    <pin index="28" name="RB7/PGD"         />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F871.xml b/src/devices/pic/xml_data/16F871.xml
new file mode 100644
index 0000000..8b918ca
--- /dev/null
+++ b/src/devices/pic/xml_data/16F871.xml
@@ -0,0 +1,226 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F871" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x0D20"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010233" datasheet="30569" progsheet="39025" erratas="80077" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x33FF" cchecksum="0xFFCD" />
+    <checksum protected="All" bchecksum="0x3FCE" cchecksum="0x0B9C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0"  end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="2" vdd_max="5.5" vdd_min_end="3" />
+    <frequency start="10" end="20" vdd_min="3" vdd_max="5.5" vdd_min_end="4" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13.5" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"  nominal="5"  />
+  <voltages name="vdd_prog_write" min="2.2" max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x07FF" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x003F" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3BFF" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="LVP"   value="0x0080" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x0080" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="CPD"   value="0x0100" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0100" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="WRT"   value="0x0200" >
+      <value value="0x0000" name="Off" cname="_WRT_ENABLE_OFF" />
+      <value value="0x0200" name="All" cname="_WRT_ENABLE_ON"  />
+    </mask>
+    <mask name="DEBUG" value="0x0800" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x0800" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+    <mask name="CP"    value="0x3030" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x3030" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F872.xml b/src/devices/pic/xml_data/16F872.xml
new file mode 100644
index 0000000..7702922
--- /dev/null
+++ b/src/devices/pic/xml_data/16F872.xml
@@ -0,0 +1,120 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F872" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x08E0"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010234" datasheet="30221" progsheet="39025" erratas="80070 80076" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x33FF" cchecksum="0xFFCD" />
+    <checksum protected="All" bchecksum="0x3FCE" cchecksum="0x0B9C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0"  end="4"  vdd_min="2.2" vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="2.2" vdd_max="5.5" vdd_min_end="3" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" vdd_min_end="4" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13.5" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"  nominal="5"  />
+  <voltages name="vdd_prog_write" min="2.2" max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x07FF" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x003F" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3BFF" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="LVP"   value="0x0080" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x0080" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="CPD"   value="0x0100" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0100" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="WRT"   value="0x0200" >
+      <value value="0x0000" name="Off" cname="_WRT_ENABLE_OFF" />
+      <value value="0x0200" name="All" cname="_WRT_ENABLE_ON"  />
+    </mask>
+    <mask name="DEBUG" value="0x0800" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x0800" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+    <mask name="CP"    value="0x3030" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x3030" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"        />
+    <pin index="2"  name="RA0/AN0"         />
+    <pin index="3"  name="RA1/AN1"         />
+    <pin index="4"  name="RA2/AN2/VREF-"   />
+    <pin index="5"  name="RA3/AN3/VREF+"   />
+    <pin index="6"  name="RA4/T0CKI"       />
+    <pin index="7"  name="RA5/SS/AN4"      />
+    <pin index="8"  name="VSS"             />
+    <pin index="9"  name="OSC1/CLKIN"      />
+    <pin index="10" name="OSC2/CLKOUT"     />
+    <pin index="11" name="RC0/T1OSO/T1CKI" />
+    <pin index="12" name="RC1/T1OSI/CCP2"  />
+    <pin index="13" name="RC2/CCP1"        />
+    <pin index="14" name="RC3/SCK/SCL"     />
+    <pin index="15" name="RC4/SDI/SDA"     />
+    <pin index="16" name="RC5/SDO"         />
+    <pin index="17" name="RC6/TX/CK"       />
+    <pin index="18" name="RC7/RX/DT"       />
+    <pin index="19" name="VSS"             />
+    <pin index="20" name="VDD"             />
+    <pin index="21" name="RB0/INT"         />
+    <pin index="22" name="RB1"             />
+    <pin index="23" name="RB2"             />
+    <pin index="24" name="RB3/PGM"         />
+    <pin index="25" name="RB4"             />
+    <pin index="26" name="RB5"             />
+    <pin index="27" name="RB6/PGC"         />
+    <pin index="28" name="RB7/PGD"         />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F873.xml b/src/devices/pic/xml_data/16F873.xml
new file mode 100644
index 0000000..4bbb1cb
--- /dev/null
+++ b/src/devices/pic/xml_data/16F873.xml
@@ -0,0 +1,127 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F873" status="NR" alternative="16F873A" memory_technology="FLASH" self_write="no" architecture="16X" id="0x0960"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010235" datasheet="30292" progsheet="39025" erratas="80053 80052 80051" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"       bchecksum="0x2BFF" cchecksum="0xF7CD" />
+    <checksum protected="0F00:0FFF" bchecksum="0x48EE" cchecksum="0xFAA3" />
+    <checksum protected="0800:0FFF" bchecksum="0x3FDE" cchecksum="0xF193" />
+    <checksum protected="All"       bchecksum="0x37CE" cchecksum="0x039C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="16" vdd_min="4"   vdd_max="5.5" />
+    <frequency start="16" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="10" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13.5" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"  nominal="5"  />
+  <voltages name="vdd_prog_write" min="2.2" max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x0FFF" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x007F" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3BFF" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="LVP"   value="0x0080" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x0080" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="CPD"   value="0x0100" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0100" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="WRT"   value="0x0200" >
+      <value value="0x0000" name="Off" cname="_WRT_ENABLE_OFF" />
+      <value value="0x0200" name="All" cname="_WRT_ENABLE_ON"  />
+    </mask>
+    <mask name="DEBUG" value="0x0800" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x0800" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+    <mask name="CP"    value="0x3030" >
+      <value value="0x0000" name="All"       cname="_CP_ALL"       />
+      <value value="0x1010" name="0800:0FFF" cname="_CP_HALF"      />
+      <value value="0x2020" name="0F00:0FFF" cname="_CP_UPPER_256" />
+      <value value="0x3030" name="Off"       cname="_CP_OFF"       />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"        />
+    <pin index="2"  name="RA0/AN0"         />
+    <pin index="3"  name="RA1/AN1"         />
+    <pin index="4"  name="RA2/AN2/VREF-"   />
+    <pin index="5"  name="RA3/AN3/VREF+"   />
+    <pin index="6"  name="RA4/T0CKI"       />
+    <pin index="7"  name="RA5/SS/AN4"      />
+    <pin index="8"  name="VSS"             />
+    <pin index="9"  name="OSC1/CLKIN"      />
+    <pin index="10" name="OSC2/CLKOUT"     />
+    <pin index="11" name="RC0/T1OSO/T1CKI" />
+    <pin index="12" name="RC1/T1OSI/CCP2"  />
+    <pin index="13" name="RC2/CCP1"        />
+    <pin index="14" name="RC3/SCK/SCL"     />
+    <pin index="15" name="RC4/SDI/SDA"     />
+    <pin index="16" name="RC5/SDO"         />
+    <pin index="17" name="RC6/TX/CK"       />
+    <pin index="18" name="RC7/RX/DT"       />
+    <pin index="19" name="VSS"             />
+    <pin index="20" name="VDD"             />
+    <pin index="21" name="RB0/INT"         />
+    <pin index="22" name="RB1"             />
+    <pin index="23" name="RB2"             />
+    <pin index="24" name="RB3/PGM"         />
+    <pin index="25" name="RB4"             />
+    <pin index="26" name="RB5"             />
+    <pin index="27" name="RB6/PGC"         />
+    <pin index="28" name="RB7/PGD"         />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F873A.xml b/src/devices/pic/xml_data/16F873A.xml
new file mode 100644
index 0000000..ee26828
--- /dev/null
+++ b/src/devices/pic/xml_data/16F873A.xml
@@ -0,0 +1,151 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F873A" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x0E40"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010236" datasheet="39582" progsheet="39589" erratas="80128 80133 80240 80276" />
+
+<!--* Checksums ************************************************************-->
+<!-- <checksums>
+    <checksum protected="Off" bchecksum="0x1FCF" cchecksum="0xEB9D" />
+    <checksum protected="All" bchecksum="0x4F9E" cchecksum="0x1B6C" />
+  </checksums>
+-->
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="3" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13.5" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"  nominal="5"  />
+  <voltages name="vdd_prog_write" min="2.2" max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x0FFF" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F" />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x007F" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x2FCF" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="LVP"   value="0x0080" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x0080" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="CPD"   value="0x0100" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0100" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="WRT"   value="0x0600" >
+      <value value="0x0000" name="0000:07FF" cname="_WRT_HALF"    />
+      <value value="0x0200" name="0000:03FF" cname="_WRT_1FOURTH" />
+      <value value="0x0400" name="0000:00FF" cname="_WRT_256"     />
+      <value value="0x0600" name="Off"       cname="_WRT_OFF"     />
+    </mask>
+    <mask name="DEBUG" value="0x0800" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x0800" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+    <mask name="CP"    value="0x2000" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x2000" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"            />
+    <pin index="2"  name="RA0/AN0"             />
+    <pin index="3"  name="RA1/AN1"             />
+    <pin index="4"  name="RA2/AN2/VREF-/CVREF" />
+    <pin index="5"  name="RA3/AN3/VREF+"       />
+    <pin index="6"  name="RA4/T0CKI/C1OUT"     />
+    <pin index="7"  name="RA5/SS/AN4/C2OUT"    />
+    <pin index="8"  name="VSS"                 />
+    <pin index="9"  name="OSC1/CLKIN"          />
+    <pin index="10" name="OSC2/CLKOUT"         />
+    <pin index="11" name="RC0/T1OSO/T1CKI"     />
+    <pin index="12" name="RC1/T1OSI/CCP2"      />
+    <pin index="13" name="RC2/CCP1"            />
+    <pin index="14" name="RC3/SCK/SCL"         />
+    <pin index="15" name="RC4/SDI/SDA"         />
+    <pin index="16" name="RC5/SDO"             />
+    <pin index="17" name="RC6/TX/CK"           />
+    <pin index="18" name="RC7/RX/DT"           />
+    <pin index="19" name="VSS"                 />
+    <pin index="20" name="VDD"                 />
+    <pin index="21" name="RB0/INT"             />
+    <pin index="22" name="RB1"                 />
+    <pin index="23" name="RB2"                 />
+    <pin index="24" name="RB3/PGM"             />
+    <pin index="25" name="RB4"                 />
+    <pin index="26" name="RB5"                 />
+    <pin index="27" name="RB6/PGC"             />
+    <pin index="28" name="RB7/PGD"             />
+  </package>
+
+  <package types="qfn"            nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F874.xml b/src/devices/pic/xml_data/16F874.xml
new file mode 100644
index 0000000..fe20128
--- /dev/null
+++ b/src/devices/pic/xml_data/16F874.xml
@@ -0,0 +1,233 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F874" status="NR" alternative="16F874A" memory_technology="FLASH" self_write="no" architecture="16X" id="0x0920"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010237" datasheet="30292" progsheet="39025" erratas="80053 80052 80051" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"       bchecksum="0x2BFF" cchecksum="0xF7CD" />
+    <checksum protected="0F00:0FFF" bchecksum="0x48EE" cchecksum="0xFAA3" />
+    <checksum protected="0800:0FFF" bchecksum="0x3FDE" cchecksum="0xF193" />
+    <checksum protected="All"       bchecksum="0x37CE" cchecksum="0x039C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="16" vdd_min="4"   vdd_max="5.5" />
+    <frequency start="16" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="3" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="10" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13.5" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"  nominal="5"  />
+  <voltages name="vdd_prog_write" min="2.2" max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x0FFF" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x007F" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3BFF" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="LVP"   value="0x0080" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x0080" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="CPD"   value="0x0100" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0100" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="WRT"   value="0x0200" >
+      <value value="0x0000" name="Off" cname="_WRT_ENABLE_OFF" />
+      <value value="0x0200" name="All" cname="_WRT_ENABLE_ON"  />
+    </mask>
+    <mask name="DEBUG" value="0x0800" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x0800" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+    <mask name="CP"    value="0x3030" >
+      <value value="0x0000" name="All"       cname="_CP_ALL"       />
+      <value value="0x1010" name="0800:0FFF" cname="_CP_HALF"      />
+      <value value="0x2020" name="0F00:0FFF" cname="_CP_UPPER_256" />
+      <value value="0x3030" name="Off"       cname="_CP_OFF"       />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+<package types="pdip"      nb_pins="40" >
+	<pin index="1"  name="MCLR/VPP"			/>
+	<pin index="2"  name="RA0/AN0"			/>
+	<pin index="3"  name="RA1/AN1"			/>
+	<pin index="4"  name="RA2/AN2/VREF-"		/>
+	<pin index="5"  name="RA3/AN3/VREF+"		/>
+	<pin index="6"  name="RA4/T0CKL"		/>
+	<pin index="7"  name="RA5/AN4/SS"		/>
+	<pin index="8"  name="RE0/RD/AN5"		/>
+	<pin index="9"  name="RE1/WR/AN6"		/>
+	<pin index="10" name="RE2/CS/AN7"		/>
+	<pin index="11" name="VDD"			/>
+	<pin index="12" name="VSS"			/>
+	<pin index="13" name="OSC1/CLKIN"		/>
+	<pin index="14" name="OSC2/CLKOUT"		/>
+	<pin index="15" name="RC0/T1OSO/T1CKL"		/>
+	<pin index="16" name="RC1/T1OSI/CCP2"		/>
+	<pin index="17" name="RC2/CCP1"			/>
+	<pin index="18" name="RC3/SCK/SCL"		/>
+	<pin index="19" name="RD0/PSP0"			/>
+	<pin index="20" name="RD1/PSP1"			/>
+	<pin index="21" name="RD2/PSP2"			/>
+	<pin index="22" name="RD3/PSP3"			/>
+	<pin index="23" name="RC4/SDI/SDA"		/>
+	<pin index="24" name="RC5/SDO"			/>
+	<pin index="25" name="RC6/TX/CK"		/>
+	<pin index="26" name="RC7/RX/DT"		/>
+	<pin index="27" name="RD4/PSP4"			/>
+	<pin index="28" name="RD5/PSP5"			/>
+	<pin index="29" name="RD6/PSP6"			/>
+	<pin index="30" name="RD7/PSP7"			/>
+	<pin index="31" name="VSS"			/>
+	<pin index="32" name="VDD"			/>
+	<pin index="33" name="RB0/INT"			/>
+	<pin index="34" name="RB1"			/>
+	<pin index="35" name="RB2"			/>
+	<pin index="36" name="RB3/PGM"			/>
+	<pin index="37" name="RB4"			/>
+	<pin index="38" name="RB5"			/>
+	<pin index="39" name="RB6/PGC"			/>
+	<pin index="40" name="RB7/PGD"			/>
+</package>
+
+<package types="plcc"      nb_pins="44" >
+	<pin index="1"  name=""				/>
+	<pin index="2"  name="MCLR/VPP"			/>
+	<pin index="3"  name="RA0/AN0"			/>
+	<pin index="4"  name="RA1/AN1"			/>
+	<pin index="5"  name="RA2/AN2/VREF-"		/>
+	<pin index="6"  name="RA3/AN3/VREF+"		/>
+	<pin index="7"  name="RA4/T0CKL"		/>
+	<pin index="8"  name="RA5/AN4/SS"		/>
+	<pin index="9"  name="RE0/RD/AN5"		/>
+	<pin index="10" name="RE1/WR/AN6"		/>
+	<pin index="11" name="RE2/CS/AN7"		/>
+	<pin index="12" name="VDD"			/>
+	<pin index="13" name="VSS"			/>
+	<pin index="14" name="OSC1/CLKIN"		/>
+	<pin index="15" name="OSC2/CLKOUT"		/>
+	<pin index="16" name="RC0/T1OSO/T1CK1"		/>
+	<pin index="17" name=""				/>
+	<pin index="18" name="RC1/T1OSI/CCP2"		/>
+	<pin index="19" name="RC2/CCP1"			/>
+	<pin index="20" name="RC3/SCK/SCL"		/>
+	<pin index="21" name="RD0/PSP0"			/>
+	<pin index="22" name="RD1/PSP1"			/>
+	<pin index="23" name="RD2/PSP2"			/>
+	<pin index="24" name="RD3/PSP3"			/>
+	<pin index="25" name="RC4/SDI/SDA"		/>
+	<pin index="26" name="RC5/SDO"			/>
+	<pin index="27" name="RC6/TX/CK"		/>
+	<pin index="28" name=""				/>
+	<pin index="29" name="RC7/RX/DT"		/>
+	<pin index="30" name="RD4/PSP4"			/>
+	<pin index="31" name="RD5/PSP5"			/>
+	<pin index="32" name="RD6/PSP6"			/>
+	<pin index="33" name="RD7/PSP7"			/>
+	<pin index="34" name="VSS"			/>
+	<pin index="35" name="VDD"			/>
+	<pin index="36" name="RB0/INT"			/>
+	<pin index="37" name="RB1"			/>
+	<pin index="38" name="RB2"			/>
+	<pin index="39" name="RB3/PGM"			/>
+	<pin index="40" name=""				/>
+	<pin index="41" name="RB4"			/>
+	<pin index="42" name="RB5"			/>
+	<pin index="43" name="RB6/PGC"			/>
+	<pin index="44" name="RB7/PGD"			/>
+</package>
+
+<package types="mqfp tqfp" nb_pins="44" >
+	<pin index="1"  name="RC7/RX/DT"		/>
+	<pin index="2"  name="RD4/PSP4"			/>
+	<pin index="3"  name="RD5/PSP5"			/>
+	<pin index="4"  name="RD6/PSP6"			/>
+	<pin index="5"  name="RD7/PSP7"			/>
+	<pin index="6"  name="VSS"			/>
+	<pin index="7"  name="VDD"			/>
+	<pin index="8"  name="RB0/INT"			/>
+	<pin index="9"  name="RB1"			/>
+	<pin index="10" name="RB2"			/>
+	<pin index="11" name="RB3/PGM"			/>
+	<pin index="12" name=""				/>
+	<pin index="13" name=""				/>
+	<pin index="14" name="RB4"			/>
+	<pin index="15" name="RB5"			/>
+	<pin index="16" name="RB6/PGC"			/>
+	<pin index="17" name="RB7/PGD"			/>
+	<pin index="18" name="MCLR/VPP"			/>
+	<pin index="19" name="RA0/AN0"			/>
+	<pin index="20" name="RA1/AN1"			/>
+	<pin index="21" name="RA2/AN2/VREF-"		/>
+	<pin index="22" name="RA3/AN3/VREF+"		/>
+	<pin index="23" name="RA4/T0CKL"		/>
+	<pin index="24" name="RA5/AN4/SS"		/>
+	<pin index="25" name="RE0/AN5/RD"		/>
+	<pin index="26" name="RE1/AN6/WR"		/>
+	<pin index="27" name="RE2/AN7/CS"		/>
+	<pin index="28" name="VDD"			/>
+	<pin index="29" name="VSS"			/>
+	<pin index="30" name="OSC1/CLKIN"		/>
+	<pin index="31" name="OSC2/CLKOUT"		/>
+	<pin index="32" name="RC0/T1OSO/T1CKL"		/>
+	<pin index="33" name=""				/>
+	<pin index="34" name=""				/>
+	<pin index="35" name="RC1/T1OSI/CCP2"		/>
+	<pin index="36" name="RC2/CCP1"			/>
+	<pin index="37" name="RC3/SCK/SCL"		/>
+	<pin index="38" name="RD0/PSP0"			/>
+	<pin index="39" name="RD1/PSP1"			/>
+	<pin index="40" name="RD2/PSP2"			/>
+	<pin index="41" name="RD3/PSP3"			/>
+	<pin index="42" name="RC4/SDI/SDA"		/>
+	<pin index="43" name="RC5/SDO"			/>
+	<pin index="44" name="RC6/TX/CK"		/>
+</package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F874A.xml b/src/devices/pic/xml_data/16F874A.xml
new file mode 100644
index 0000000..c89b407
--- /dev/null
+++ b/src/devices/pic/xml_data/16F874A.xml
@@ -0,0 +1,273 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F874A" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x0E60"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010238" datasheet="39582" progsheet="39589" erratas="80128 80133 80240 80276" />
+
+<!--* Checksums ************************************************************-->
+<!--  <checksums>
+    <checksum protected="Off" bchecksum="0x1FCF" cchecksum="0xEB9D" />
+    <checksum protected="All" bchecksum="0x4F9E" cchecksum="0x1B6C" />
+  </checksums>
+-->
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13.5" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"  nominal="5"  />
+  <voltages name="vdd_prog_write" min="2.2" max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x0FFF" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x007F" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x2FCF" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="LVP"   value="0x0080" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x0080" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="CPD"   value="0x0100" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0100" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="WRT"   value="0x0600" >
+      <value value="0x0000" name="0000:07FF" cname="_WRT_HALF"    />
+      <value value="0x0200" name="0000:03FF" cname="_WRT_1FOURTH" />
+      <value value="0x0400" name="0000:00FF" cname="_WRT_256"     />
+      <value value="0x0600" name="Off"       cname="_WRT_OFF"     />
+    </mask>
+    <mask name="DEBUG" value="0x0800" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x0800" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+    <mask name="CP"    value="0x2000" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x2000" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F876.xml b/src/devices/pic/xml_data/16F876.xml
new file mode 100644
index 0000000..19264e8
--- /dev/null
+++ b/src/devices/pic/xml_data/16F876.xml
@@ -0,0 +1,127 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F876" status="NR" alternative="16F876A" memory_technology="FLASH" self_write="no" architecture="16X" id="0x09E0"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010239" datasheet="30292" progsheet="39025" erratas="80053 80052 80051" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"       bchecksum="0x1BFF" cchecksum="0xE7CD" />
+    <checksum protected="1F00:1FFF" bchecksum="0x28EE" cchecksum="0xDAA3" />
+    <checksum protected="1000:1FFF" bchecksum="0x27DE" cchecksum="0xD993" />
+    <checksum protected="All"       bchecksum="0x27CE" cchecksum="0xF39C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="16" vdd_min="4"   vdd_max="5.5" />
+    <frequency start="16" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="10" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13.5" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"  nominal="5"  />
+  <voltages name="vdd_prog_write" min="2.2" max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x1FFF" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3BFF" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="LVP"   value="0x0080" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x0080" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="CPD"   value="0x0100" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0100" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="WRT"   value="0x0200" >
+      <value value="0x0000" name="Off" cname="_WRT_ENABLE_OFF" />
+      <value value="0x0200" name="All" cname="_WRT_ENABLE_ON"  />
+    </mask>
+    <mask name="DEBUG" value="0x0800" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x0800" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+    <mask name="CP"    value="0x3030" >
+      <value value="0x0000" name="All"       cname="_CP_ALL"       />
+      <value value="0x1010" name="1000:1FFF" cname="_CP_HALF"      />
+      <value value="0x2020" name="1F00:1FFF" cname="_CP_UPPER_256" />
+      <value value="0x3030" name="Off"       cname="_CP_OFF"       />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"        />
+    <pin index="2"  name="RA0/AN0"         />
+    <pin index="3"  name="RA1/AN1"         />
+    <pin index="4"  name="RA2/AN2/VREF-"   />
+    <pin index="5"  name="RA3/AN3/VREF+"   />
+    <pin index="6"  name="RA4/T0CKI"       />
+    <pin index="7"  name="RA5/SS/AN4"      />
+    <pin index="8"  name="VSS"             />
+    <pin index="9"  name="OSC1/CLKIN"      />
+    <pin index="10" name="OSC2/CLKOUT"     />
+    <pin index="11" name="RC0/T1OSO/T1CKI" />
+    <pin index="12" name="RC1/T1OSI/CCP2"  />
+    <pin index="13" name="RC2/CCP1"        />
+    <pin index="14" name="RC3/SCK/SCL"     />
+    <pin index="15" name="RC4/SDI/SDA"     />
+    <pin index="16" name="RC5/SDO"         />
+    <pin index="17" name="RC6/TX/CK"       />
+    <pin index="18" name="RC7/RX/DT"       />
+    <pin index="19" name="VSS"             />
+    <pin index="20" name="VDD"             />
+    <pin index="21" name="RB0/INT"         />
+    <pin index="22" name="RB1"             />
+    <pin index="23" name="RB2"             />
+    <pin index="24" name="RB3/PGM"         />
+    <pin index="25" name="RB4"             />
+    <pin index="26" name="RB5"             />
+    <pin index="27" name="RB6/PGC"         />
+    <pin index="28" name="RB7/PGD"         />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F876A.xml b/src/devices/pic/xml_data/16F876A.xml
new file mode 100644
index 0000000..f1c23ce
--- /dev/null
+++ b/src/devices/pic/xml_data/16F876A.xml
@@ -0,0 +1,151 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F876A" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x0E00"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010240" datasheet="39582" progsheet="39589" erratas="80128 80133 80240 80276" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x0FCF" cchecksum="0xDB9D" />
+    <checksum protected="All" bchecksum="0x1F9E" cchecksum="0xEB6C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13.5" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"  nominal="5"  />
+  <voltages name="vdd_prog_write" min="2.2" max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x1FFF" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x2FCF">
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="LVP"   value="0x0080" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x0080" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="CPD"   value="0x0100" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0100" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="WRT"   value="0x0600" >
+      <value value="0x0000" name="0000:0FFF" cname="_WRT_HALF"    />
+      <value value="0x0200" name="0000:07FF" cname="_WRT_1FOURTH" />
+      <value value="0x0400" name="0000:00FF" cname="_WRT_256"     />
+      <value value="0x0600" name="Off"       cname="_WRT_OFF"     />
+    </mask>
+    <mask name="DEBUG" value="0x0800" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x0800" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+    <mask name="CP"    value="0x2000" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x2000" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="28" >
+    <pin index="1"  name="MCLR/VPP"            />
+    <pin index="2"  name="RA0/AN0"             />
+    <pin index="3"  name="RA1/AN1"             />
+    <pin index="4"  name="RA2/AN2/VREF-/CVREF" />
+    <pin index="5"  name="RA3/AN3/VREF+"       />
+    <pin index="6"  name="RA4/T0CKI/C1OUT"     />
+    <pin index="7"  name="RA5/SS/AN4/C2OUT"    />
+    <pin index="8"  name="VSS"                 />
+    <pin index="9"  name="OSC1/CLKIN"          />
+    <pin index="10" name="OSC2/CLKOUT"         />
+    <pin index="11" name="RC0/T1OSO/T1CKI"     />
+    <pin index="12" name="RC1/T1OSI/CCP2"      />
+    <pin index="13" name="RC2/CCP1"            />
+    <pin index="14" name="RC3/SCK/SCL"         />
+    <pin index="15" name="RC4/SDI/SDA"         />
+    <pin index="16" name="RC5/SDO"             />
+    <pin index="17" name="RC6/TX/CK"           />
+    <pin index="18" name="RC7/RX/DT"           />
+    <pin index="19" name="VSS"                 />
+    <pin index="20" name="VDD"                 />
+    <pin index="21" name="RB0/INT"             />
+    <pin index="22" name="RB1"                 />
+    <pin index="23" name="RB2"                 />
+    <pin index="24" name="RB3/PGM"             />
+    <pin index="25" name="RB4"                 />
+    <pin index="26" name="RB5"                 />
+    <pin index="27" name="RB6/PGC"             />
+    <pin index="28" name="RB7/PGD"             />
+  </package>
+
+  <package types="qfn"            nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F877.xml b/src/devices/pic/xml_data/16F877.xml
new file mode 100644
index 0000000..f83da05
--- /dev/null
+++ b/src/devices/pic/xml_data/16F877.xml
@@ -0,0 +1,233 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F877" status="NR" alternative="16F877A" memory_technology="FLASH" self_write="no" architecture="16X" id="0x09A0"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010241" datasheet="30292" progsheet="39025" erratas="80053 80052 80051" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off"       bchecksum="0x1BFF" cchecksum="0xE7CD" />
+    <checksum protected="1F00:1FFF" bchecksum="0x28EE" cchecksum="0xDAA3" />
+    <checksum protected="1000:1FFF" bchecksum="0x27DE" cchecksum="0xD993" />
+    <checksum protected="All"       bchecksum="0x27CE" cchecksum="0xF39C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="16" vdd_min="4"   vdd_max="5.5" />
+    <frequency start="16" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="10" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13.5" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"  nominal="5"  />
+  <voltages name="vdd_prog_write" min="2.2" max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x1FFF" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x3BFF" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="LVP"   value="0x0080" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x0080" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="CPD"   value="0x0100" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0100" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="WRT"   value="0x0200" >
+      <value value="0x0000" name="Off" cname="_WRT_ENABLE_OFF" />
+      <value value="0x0200" name="All" cname="_WRT_ENABLE_ON"  />
+    </mask>
+    <mask name="DEBUG" value="0x0800" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x0800" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+    <mask name="CP"    value="0x3030" >
+      <value value="0x0000" name="All"       cname="_CP_ALL"       />
+      <value value="0x1010" name="1000:1FFF" cname="_CP_HALF"      />
+      <value value="0x2020" name="1F00:1FFF" cname="_CP_UPPER_256" />
+      <value value="0x3030" name="Off"       cname="_CP_OFF"       />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip"      nb_pins="40" >
+    <pin index="1"  name="MCLR/VPP"		/>
+    <pin index="2"  name="RA0/AN0"		/>
+    <pin index="3"  name="RA1/AN1"		/>
+    <pin index="4"  name="RA2/AN2/VREF-"	/>
+    <pin index="5"  name="RA3/AN3/VREF+"	/>
+    <pin index="6"  name="RA4/T0CKL"		/>
+    <pin index="7"  name="RA5/AN4/SS"		/>
+    <pin index="8"  name="RE0/RD/AN5"		/>
+    <pin index="9"  name="RE1/WR/AN6"		/>
+    <pin index="10" name="RE2/CS/AN7"		/>
+    <pin index="11" name="VDD"			/>
+    <pin index="12" name="VSS"			/>
+    <pin index="13" name="OSC1/CLKIN"		/>
+    <pin index="14" name="OSC2/CLKOUT"		/>
+    <pin index="15" name="RC0/T1OSO/T1CKL"	/>
+    <pin index="16" name="RC1/T1OSI/CCP2"	/>
+    <pin index="17" name="RC2/CCP1"		/>
+    <pin index="18" name="RC3/SCK/SCL"		/>
+    <pin index="19" name="RD0/PSP0"		/>
+    <pin index="20" name="RD1/PSP1"		/>
+    <pin index="21" name="RD2/PSP2"		/>
+    <pin index="22" name="RD3/PSP3"		/>
+    <pin index="23" name="RC4/SDI/SDA"		/>
+    <pin index="24" name="RC5/SDO"		/>
+    <pin index="25" name="RC6/TX/CK"		/>
+    <pin index="26" name="RC7/RX/DT"		/>
+    <pin index="27" name="RD4/PSP4"		/>
+    <pin index="28" name="RD5/PSP5"		/>
+    <pin index="29" name="RD6/PSP6"		/>
+    <pin index="30" name="RD7/PSP7"		/>
+    <pin index="31" name="VSS"			/>
+    <pin index="32" name="VDD"			/>
+    <pin index="33" name="RB0/INT"		/>
+    <pin index="34" name="RB1"			/>
+    <pin index="35" name="RB2"			/>
+    <pin index="36" name="RB3/PGM"		/>
+    <pin index="37" name="RB4"			/>
+    <pin index="38" name="RB5"			/>
+    <pin index="39" name="RB6/PGC"		/>
+    <pin index="40" name="RB7/PGD"		/>
+  </package>
+
+  <package types="plcc"      nb_pins="44" >
+    <pin index="1"  name=""			/>
+    <pin index="2"  name="MCLR/VPP"		/>
+    <pin index="3"  name="RA0/AN0"		/>
+    <pin index="4"  name="RA1/AN1"		/>
+    <pin index="5"  name="RA2/AN2/VREF-"	/>
+    <pin index="6"  name="RA3/AN3/VREF+"	/>
+    <pin index="7"  name="RA4/T0CKL"		/>
+    <pin index="8"  name="RA5/AN4/SS"		/>
+    <pin index="9"  name="RE0/RD/AN5"		/>
+    <pin index="10" name="RE1/WR/AN6"		/>
+    <pin index="11" name="RE2/CS/AN7"		/>
+    <pin index="12" name="VDD"			/>
+    <pin index="13" name="VSS"			/>
+    <pin index="14" name="OSC1/CLKIN"		/>
+    <pin index="15" name="OSC2/CLKOUT"		/>
+    <pin index="16" name="RC0/T1OSO/T1CK1"	/>
+    <pin index="17" name=""			/>
+    <pin index="18" name="RC1/T1OSI/CCP2"	/>
+    <pin index="19" name="RC2/CCP1"		/>
+    <pin index="20" name="RC3/SCK/SCL"		/>
+    <pin index="21" name="RD0/PSP0"		/>
+    <pin index="22" name="RD1/PSP1"		/>
+    <pin index="23" name="RD2/PSP2"		/>
+    <pin index="24" name="RD3/PSP3"		/>
+    <pin index="25" name="RC4/SDI/SDA"		/>
+    <pin index="26" name="RC5/SDO"		/>
+    <pin index="27" name="RC6/TX/CK"		/>
+    <pin index="28" name=""			/>
+    <pin index="29" name="RC7/RX/DT"		/>
+    <pin index="30" name="RD4/PSP4"		/>
+    <pin index="31" name="RD5/PSP5"		/>
+    <pin index="32" name="RD6/PSP6"		/>
+    <pin index="33" name="RD7/PSP7"		/>
+    <pin index="34" name="VSS"			/>
+    <pin index="35" name="VDD"			/>
+    <pin index="36" name="RB0/INT"		/>
+    <pin index="37" name="RB1"			/>
+    <pin index="38" name="RB2"			/>
+    <pin index="39" name="RB3/PGM"		/>
+    <pin index="40" name=""			/>
+    <pin index="41" name="RB4"			/>
+    <pin index="42" name="RB5"			/>
+    <pin index="43" name="RB6/PGC"		/>
+    <pin index="44" name="RB7/PGD"		/>
+  </package>
+
+  <package types="mqfp tqfp" nb_pins="44" >
+    <pin index="1"  name="RC7/RX/DT"		/>
+    <pin index="2"  name="RD4/PSP4"		/>
+    <pin index="3"  name="RD5/PSP5"		/>
+    <pin index="4"  name="RD6/PSP6"		/>
+    <pin index="5"  name="RD7/PSP7"		/>
+    <pin index="6"  name="VSS"			/>
+    <pin index="7"  name="VDD"			/>
+    <pin index="8"  name="RB0/INT"		/>
+    <pin index="9"  name="RB1"			/>
+    <pin index="10" name="RB2"			/>
+    <pin index="11" name="RB3/PGM"		/>
+    <pin index="12" name=""			/>
+    <pin index="13" name=""			/>
+    <pin index="14" name="RB4"			/>
+    <pin index="15" name="RB5"			/>
+    <pin index="16" name="RB6/PGC"		/>
+    <pin index="17" name="RB7/PGD"		/>
+    <pin index="18" name="MCLR/VPP"		/>
+    <pin index="19" name="RA0/AN0"		/>
+    <pin index="20" name="RA1/AN1"		/>
+    <pin index="21" name="RA2/AN2/VREF-"	/>
+    <pin index="22" name="RA3/AN3/VREF+"	/>
+    <pin index="23" name="RA4/T0CKL"		/>
+    <pin index="24" name="RA5/AN4/SS"		/>
+    <pin index="25" name="RE0/AN5/RD"		/>
+    <pin index="26" name="RE1/AN6/WR"		/>
+    <pin index="27" name="RE2/AN7/CS"		/>
+    <pin index="28" name="VDD"			/>
+    <pin index="29" name="VSS"			/>
+    <pin index="30" name="OSC1/CLKIN"		/>
+    <pin index="31" name="OSC2/CLKOUT"		/>
+    <pin index="32" name="RC0/T1OSO/T1CKL"	/>
+    <pin index="33" name=""			/>
+    <pin index="34" name=""			/>
+    <pin index="35" name="RC1/T1OSI/CCP2"	/>
+    <pin index="36" name="RC2/CCP1"		/>
+    <pin index="37" name="RC3/SCK/SCL"		/>
+    <pin index="38" name="RD0/PSP0"		/>
+    <pin index="39" name="RD1/PSP1"		/>
+    <pin index="40" name="RD2/PSP2"		/>
+    <pin index="41" name="RD3/PSP3"		/>
+    <pin index="42" name="RC4/SDI/SDA"		/>
+    <pin index="43" name="RC5/SDO"		/>
+    <pin index="44" name="RC6/TX/CK"		/>
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F877A.xml b/src/devices/pic/xml_data/16F877A.xml
new file mode 100644
index 0000000..3a16d77
--- /dev/null
+++ b/src/devices/pic/xml_data/16F877A.xml
@@ -0,0 +1,273 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F877A" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x0E20"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010242" datasheet="39582" progsheet="39589" erratas="80128 80133 80240 80276" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x0FCF" cchecksum="0xDB9D" />
+    <checksum protected="All" bchecksum="0x1F9E" cchecksum="0xEB6C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13.5" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"  nominal="5"  />
+  <voltages name="vdd_prog_write" min="2.2" max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x1FFF" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0x3FFF" bvalue="0x2FCF" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC" />
+      <value value="0x0001" name="XT"           cname="_XT_OSC" />
+      <value value="0x0002" name="HS"           cname="_HS_OSC" />
+      <value value="0x0003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"   value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="LVP"   value="0x0080" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x0080" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="CPD"   value="0x0100" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0100" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="WRT"   value="0x0600" >
+      <value value="0x0000" name="0000:0FFF" cname="_WRT_HALF"    />
+      <value value="0x0200" name="0000:07FF" cname="_WRT_1FOURTH" />
+      <value value="0x0400" name="0000:00FF" cname="_WRT_256"     />
+      <value value="0x0600" name="Off"       cname="_WRT_OFF"     />
+    </mask>
+    <mask name="DEBUG" value="0x0800" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x0800" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+    <mask name="CP"    value="0x2000" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x2000" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F88.xml b/src/devices/pic/xml_data/16F88.xml
new file mode 100644
index 0000000..b2325c3
--- /dev/null
+++ b/src/devices/pic/xml_data/16F88.xml
@@ -0,0 +1,184 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F88" status="IP" memory_technology="FLASH" self_write="yes" architecture="16X" id="0x0760" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010243" datasheet="30488" progsheet="39607" erratas="80171 80301" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x3002" cchecksum="0xFBD0" />
+    <checksum protected="All" bchecksum="0x5004" cchecksum="0x1BD2" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4" end="10" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="20" vdd_min="4" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"           min="10"  max="13.5" nominal="13" />
+  <voltages name="vdd_prog"      min="4.5" max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x0FFF" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2008" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1" wmask="0x3FFF" bvalue="0x3FFF" >
+    <mask name="WDT"    value="0x0004" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE"  value="0x0008" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0008" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="FOSC"   value="0x0013" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"       />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"       />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"       />
+      <value value="0x0003" name="EC_IO"        cname="_EXTCLK"       />
+      <value value="0x0010" name="INTRC_IO"     cname="_INTRC_IO"     />
+      <value value="0x0011" name="INTRC_CLKOUT" cname="_INTRC_CLKOUT" />
+      <value value="0x0012" name="EXTRC_IO"     cname="_EXTRC_IO"     />
+      <value value="0x0013" name="EXTRC_CLKOUT" cname="_EXTRC_CLKOUT" />
+    </mask>
+    <mask name="MCLRE"  value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLR_OFF" />
+      <value value="0x0020" name="External" cname="_MCLR_ON"  />
+    </mask>
+    <mask name="BODEN"  value="0x0040" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x0040" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x0080" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x0080" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="CPD"    value="0x0100" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0100" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="WRT"    value="0x0600" >
+      <value value="0x0000" name="All"     cname="_WRT_PROTECT_ALL"  />
+      <value value="0x0200" name="000:7FF" cname="_WRT_PROTECT_2048" />
+      <value value="0x0400" name="000:0FF" cname="_WRT_PROTECT_256"  />
+      <value value="0x0600" name="Off"     cname="_WRT_PROTECT_OFF"  />
+    </mask>
+    <mask name="DEBUG"  value="0x0800" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x0800" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+    <mask name="CCP1MX" value="0x1000" >
+      <value value="0x0000" name="RB3" cname="_CCP1_RB3" />
+      <value value="0x1000" name="RB0" cname="_CCP1_RB0" />
+    </mask>
+    <mask name="CP"     value="0x2000" >
+      <value value="0x0000" name="All" cname="_CP_ALL" />
+      <value value="0x2000" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG2" wmask="0x3FFF" bvalue="0x0003" >
+    <mask name="FCMEN" value="0x0001" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0001" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x0002" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0002" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2/AN2/VREF-/CVREF"     />
+    <pin index="2"  name="RA3/AN3/VREF+/C1OUT"     />
+    <pin index="3"  name="RA4/AN4/T0CKI/C2OUT"     />
+    <pin index="4"  name="RA5/MCLR/VPP"            />
+    <pin index="5"  name="VSS"                     />
+    <pin index="6"  name="RB0/INT/CCP1"            />
+    <pin index="7"  name="RB1/SDI/SDA"             />
+    <pin index="8"  name="RB2/SDO/CCP1"            />
+    <pin index="9"  name="RB3/CCP1/PGM"            />
+    <pin index="10" name="RB4/SCK/SCL"             />
+    <pin index="11" name="RB5/SS/TX/CK"            />
+    <pin index="12" name="RB6/AN5/T1OSO/T1CKI/PGC" />
+    <pin index="13" name="RB7/AN6/T1OSI/PGD"       />
+    <pin index="14" name="VDD"                     />
+    <pin index="15" name="RA6/OSC2/CLKOUT"         />
+    <pin index="16" name="RA7/OSC1/CLKIN"          />
+    <pin index="17" name="RA0/AN0"                 />
+    <pin index="18" name="RA1/AN1"                 />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F882.xml b/src/devices/pic/xml_data/16F882.xml
new file mode 100644
index 0000000..db2c723
--- /dev/null
+++ b/src/devices/pic/xml_data/16F882.xml
@@ -0,0 +1,175 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F882" status="IP" memory_technology="FLASH" self_write="yes" architecture="16X" id="0x2000"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="530146" datasheet="41291" progsheet="41287" erratas="80302" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x3EFF" cchecksum="0x0ACD" />
+    <checksum protected="All" bchecksum="0x85BE" cchecksum="0x518C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="8"  vdd_min="2.0"   vdd_max="5.5" />
+    <frequency start="8"  end="10" vdd_min="3.0" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="12"  nominal="12" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x07FF" />
+  <memory name="calibration"  start="0x2009" end="0x2009" cal_opmask="0x0000"     cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2008" />
+  <memory name="eeprom"       start="0x0000" end="0x007F" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1" wmask="0x3FFF" bvalue="0x3FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0080" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0300" >
+      <value value="0x0000" name="Off"      cname="_BOR_OFF"    />
+      <value value="0x0100" name="Software" cname="_BOR_SBODEN" />
+      <value value="0x0200" name="On_run"   cname="_BOR_NSLEEP" />
+      <value value="0x0300" name="On"       cname="_BOR_ON"     />
+    </mask>
+    <mask name="IESO"  value="0x0400" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0400" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="FCMEN" value="0x0800" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0800" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="LVP"   value="0x1000" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x1000" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG" value="0x2000" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x2000" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG2" wmask="0x3FFF" bvalue="0x0700" >
+    <mask name="BORV" value="0x0100" >
+      <value value="0x0100" name="4.0" cname="_BOR40V" />
+      <value value="0x0000" name="2.1" cname="_BOR21V" />
+    </mask>
+    <mask name="WRT"  value="0x0600" >
+      <value value="0x0000" name="0000:03FF" cname="_WRT_HALF"    />
+      <value value="0x0200" name="0000:00FF" cname="_WRT_1FOURTH" />
+      <value value="0x0400" name="invalid" />
+      <value value="0x0600" name="Off"       cname="_WRT_OFF"     />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn"            nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F883.xml b/src/devices/pic/xml_data/16F883.xml
new file mode 100644
index 0000000..1140b72
--- /dev/null
+++ b/src/devices/pic/xml_data/16F883.xml
@@ -0,0 +1,175 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F883" status="IP" memory_technology="FLASH" self_write="yes" architecture="16X" id="0x2020"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="026563" datasheet="41291" progsheet="41287" erratas="80302" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x36FF" cchecksum="0x02CD" />
+    <checksum protected="All" bchecksum="0x7DBE" cchecksum="0x498C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="8"  vdd_min="2.0"   vdd_max="5.5" />
+    <frequency start="8"  end="10" vdd_min="3.0" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="12"  nominal="12" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x0FFF" />
+  <memory name="calibration"  start="0x2009" end="0x2009" cal_opmask="0x0000"     cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2008" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1" wmask="0x3FFF" bvalue="0x3FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0080" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0300" >
+      <value value="0x0000" name="Off"      cname="_BOR_OFF"    />
+      <value value="0x0100" name="Software" cname="_BOR_SBODEN" />
+      <value value="0x0200" name="On_run"   cname="_BOR_NSLEEP" />
+      <value value="0x0300" name="On"       cname="_BOR_ON"     />
+    </mask>
+    <mask name="IESO"  value="0x0400" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0400" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="FCMEN" value="0x0800" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0800" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="LVP"   value="0x1000" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x1000" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG" value="0x2000" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x2000" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG2" wmask="0x3FFF" bvalue="0x0700" >
+    <mask name="BORV" value="0x0100" >
+      <value value="0x0100" name="4.0" cname="_BOR40V" />
+      <value value="0x0000" name="2.1" cname="_BOR21V" />
+    </mask>
+    <mask name="WRT"  value="0x0600" >
+      <value value="0x0000" name="0000:07FF" cname="_WRT_HALF"    />
+      <value value="0x0200" name="0000:03FF" cname="_WRT_1FOURTH" />
+      <value value="0x0400" name="0000:00FF" cname="_WRT_256"     />
+      <value value="0x0600" name="Off"       cname="_WRT_OFF"     />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn"            nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F884.xml b/src/devices/pic/xml_data/16F884.xml
new file mode 100644
index 0000000..fbe9423
--- /dev/null
+++ b/src/devices/pic/xml_data/16F884.xml
@@ -0,0 +1,250 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F884" status="IP" memory_technology="FLASH" self_write="yes" architecture="16X" id="0x2040"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="026564" datasheet="41291" progsheet="41287" erratas="80302" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x36FF" cchecksum="0x02CD" />
+    <checksum protected="All" bchecksum="0x7DBE" cchecksum="0x498C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="8"  vdd_min="2.0"   vdd_max="5.5" />
+    <frequency start="8"  end="10" vdd_min="3.0" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="12"  nominal="12" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x0FFF" />
+  <memory name="calibration"  start="0x2009" end="0x2009" cal_opmask="0x0000"     cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2008" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1" wmask="0x3FFF" bvalue="0x3FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0080" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0300" >
+      <value value="0x0000" name="Off"      cname="_BOR_OFF"    />
+      <value value="0x0100" name="Software" cname="_BOR_SBODEN" />
+      <value value="0x0200" name="On_run"   cname="_BOR_NSLEEP" />
+      <value value="0x0300" name="On"       cname="_BOR_ON"     />
+    </mask>
+    <mask name="IESO"  value="0x0400" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0400" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="FCMEN" value="0x0800" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0800" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="LVP"   value="0x1000" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x1000" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG" value="0x2000" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x2000" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG2" wmask="0x3FFF" bvalue="0x0700" >
+    <mask name="BORV" value="0x0100" >
+      <value value="0x0100" name="4.0" cname="_BOR40V" />
+      <value value="0x0000" name="2.1" cname="_BOR21V" />
+    </mask>
+    <mask name="WRT"  value="0x0600" >
+      <value value="0x0000" name="0000:07FF" cname="_WRT_HALF"    />
+      <value value="0x0200" name="0000:03FF" cname="_WRT_1FOURTH" />
+      <value value="0x0400" name="0000:00FF" cname="_WRT_256"     />
+      <value value="0x0600" name="Off"       cname="_WRT_OFF"     />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F886.xml b/src/devices/pic/xml_data/16F886.xml
new file mode 100644
index 0000000..3205cd7
--- /dev/null
+++ b/src/devices/pic/xml_data/16F886.xml
@@ -0,0 +1,175 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F886" status="IP" memory_technology="FLASH" self_write="yes" architecture="16X" id="0x2060"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="026562" datasheet="41291" progsheet="41287" erratas="80302" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x26FF" cchecksum="0xF2CD" />
+    <checksum protected="All" bchecksum="0x6DBE" cchecksum="0x398C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="8"  vdd_min="2.0"   vdd_max="5.5" />
+    <frequency start="8"  end="10" vdd_min="3.0" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="12"  nominal="12" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x1FFF" />
+  <memory name="calibration"  start="0x2009" end="0x2009" cal_opmask="0x0000"     cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2008" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1" wmask="0x3FFF" bvalue="0x3FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0080" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0300" >
+      <value value="0x0000" name="Off"      cname="_BOR_OFF"    />
+      <value value="0x0100" name="Software" cname="_BOR_SBODEN" />
+      <value value="0x0200" name="On_run"   cname="_BOR_NSLEEP" />
+      <value value="0x0300" name="On"       cname="_BOR_ON"     />
+    </mask>
+    <mask name="IESO"  value="0x0400" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0400" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="FCMEN" value="0x0800" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0800" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="LVP"   value="0x1000" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x1000" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG" value="0x2000" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x2000" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG2" wmask="0x3FFF" bvalue="0x0700" >
+    <mask name="BORV" value="0x0100" >
+      <value value="0x0100" name="4.0" cname="_BOR40V" />
+      <value value="0x0000" name="2.1" cname="_BOR21V" />
+    </mask>
+    <mask name="WRT"  value="0x0600" >
+      <value value="0x0000" name="0000:0FFF" cname="_WRT_HALF"    />
+      <value value="0x0200" name="0000:07FF" cname="_WRT_1FOURTH" />
+      <value value="0x0400" name="0000:00FF" cname="_WRT_256"     />
+      <value value="0x0600" name="Off"       cname="_WRT_OFF"     />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn"            nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F887.xml b/src/devices/pic/xml_data/16F887.xml
new file mode 100644
index 0000000..78be11e
--- /dev/null
+++ b/src/devices/pic/xml_data/16F887.xml
@@ -0,0 +1,250 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F887" status="IP" memory_technology="FLASH" self_write="yes" architecture="16X" id="0x2080"
+        xmlns:xsi='http://www.w3.org/2001/XMLSchema-instance'
+        xsi:noNamespaceSchemaLocation='pic.xsd'>
+
+<!--* Documents ************************************************************-->
+  <documents webpage="026561" datasheet="41291" progsheet="41287" erratas="80302" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x26FF" cchecksum="0xF2CD" />
+    <checksum protected="All" bchecksum="0x6DBE" cchecksum="0x398C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="8"  vdd_min="2.0"   vdd_max="5.5" />
+    <frequency start="8"  end="10" vdd_min="3.0" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="12"  nominal="12" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x1FFF" />
+  <memory name="calibration"  start="0x2009" end="0x2009" cal_opmask="0x0000"     cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2008" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1" wmask="0x3FFF" bvalue="0x3FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0080" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0300" >
+      <value value="0x0000" name="Off"      cname="_BOR_OFF"    />
+      <value value="0x0100" name="Software" cname="_BOR_SBODEN" />
+      <value value="0x0200" name="On_run"   cname="_BOR_NSLEEP" />
+      <value value="0x0300" name="On"       cname="_BOR_ON"     />
+    </mask>
+    <mask name="IESO"  value="0x0400" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0400" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="FCMEN" value="0x0800" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0800" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="LVP"   value="0x1000" >
+      <value value="0x0000" name="Off" cname="_LVP_OFF" />
+      <value value="0x1000" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG" value="0x2000" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x2000" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG2" wmask="0x3FFF" bvalue="0x0700" >
+    <mask name="BORV" value="0x0100" >
+      <value value="0x0100" name="4.0" cname="_BOR40V" />
+      <value value="0x0000" name="2.1" cname="_BOR21V" />
+    </mask>
+    <mask name="WRT"  value="0x0600" >
+      <value value="0x0000" name="0000:0FFF" cname="_WRT_HALF"    />
+      <value value="0x0200" name="0000:07FF" cname="_WRT_1FOURTH" />
+      <value value="0x0400" name="0000:00FF" cname="_WRT_256"     />
+      <value value="0x0600" name="Off"       cname="_WRT_OFF"     />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F913.xml b/src/devices/pic/xml_data/16F913.xml
new file mode 100644
index 0000000..c904d5d
--- /dev/null
+++ b/src/devices/pic/xml_data/16F913.xml
@@ -0,0 +1,156 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F913" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x13E0" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="020199" datasheet="41250" progsheet="41244" erratas="80238" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x0FFF" cchecksum="0xDBCD" />
+    <checksum protected="All" bchecksum="0x2FBE" cchecksum="0xFB8C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13"  nominal="11.5" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"    />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"    />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x0FFF" />
+  <memory name="calibration"  start="0x2008" end="0x2009" cal_opmask="0x0000"     cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG" wmask="0x3FFF" bvalue="0x1FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0080" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0300" >
+      <value value="0x0000" name="Off"      cname="_BOD_OFF"    />
+      <value value="0x0100" name="Software" cname="_BOD_SBODEN" />
+      <value value="0x0200" name="On_run"   cname="_BOD_NSLEEP" />
+      <value value="0x0300" name="On"       cname="_BOD_ON"     />
+    </mask>
+    <mask name="IESO"  value="0x0400" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0400" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="FCMEN" value="0x0800" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0800" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="DEBUG" value="0x1000" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x1000" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F914.xml b/src/devices/pic/xml_data/16F914.xml
new file mode 100644
index 0000000..d74a0d5
--- /dev/null
+++ b/src/devices/pic/xml_data/16F914.xml
@@ -0,0 +1,188 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F914" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x13C0" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="020200" datasheet="41250" progsheet="41244" erratas="80238" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x0FFF" cchecksum="0xDBCD" />
+    <checksum protected="All" bchecksum="0x2FBE" cchecksum="0xFB8C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13"  nominal="11.5" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"    />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"    />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x0FFF" />
+  <memory name="calibration"  start="0x2008" end="0x2009" cal_opmask="0x0000"     cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG" wmask="0x3FFF" bvalue="0x1FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0080" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0300" >
+      <value value="0x0000" name="Off"      cname="_BOD_OFF"    />
+      <value value="0x0100" name="Software" cname="_BOD_SBODEN" />
+      <value value="0x0200" name="On_run"   cname="_BOD_NSLEEP" />
+      <value value="0x0300" name="On"       cname="_BOD_ON"     />
+    </mask>
+    <mask name="IESO"  value="0x0400" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0400" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="FCMEN" value="0x0800" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0800" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="DEBUG" value="0x1000" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x1000" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F916.xml b/src/devices/pic/xml_data/16F916.xml
new file mode 100644
index 0000000..b066f93
--- /dev/null
+++ b/src/devices/pic/xml_data/16F916.xml
@@ -0,0 +1,156 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F916" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x13A0" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="020201" datasheet="41250" progsheet="41244" erratas="80238" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xFFFF" cchecksum="0xCBCD" />
+    <checksum protected="All" bchecksum="0x1FBE" cchecksum="0xEB8C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13"  nominal="11.5" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"    />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"    />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x1FFF" />
+  <memory name="calibration"  start="0x2008" end="0x2009" cal_opmask="0x0000"     cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG" wmask="0x3FFF" bvalue="0x1FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0080" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0300" >
+      <value value="0x0000" name="Off"      cname="_BOD_OFF"    />
+      <value value="0x0100" name="Software" cname="_BOD_SBODEN" />
+      <value value="0x0200" name="On_run"   cname="_BOD_NSLEEP" />
+      <value value="0x0300" name="On"       cname="_BOD_ON"     />
+    </mask>
+    <mask name="IESO"  value="0x0400" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0400" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="FCMEN" value="0x0800" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0800" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="DEBUG" value="0x1000" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x1000" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F917.xml b/src/devices/pic/xml_data/16F917.xml
new file mode 100644
index 0000000..9e17dcc
--- /dev/null
+++ b/src/devices/pic/xml_data/16F917.xml
@@ -0,0 +1,188 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F917" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x1380" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="020202" datasheet="41250" progsheet="41244" erratas="80238" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xFFFF" cchecksum="0xCBCD" />
+    <checksum protected="All" bchecksum="0x1FBE" cchecksum="0xEB8C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13"  nominal="11.5" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"    />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"    />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x1FFF" />
+  <memory name="calibration"  start="0x2008" end="0x2009" cal_opmask="0x0000"     cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG" wmask="0x3FFF" bvalue="0x1FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0080" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0300" >
+      <value value="0x0000" name="Off"      cname="_BOD_OFF"    />
+      <value value="0x0100" name="Software" cname="_BOD_SBODEN" />
+      <value value="0x0200" name="On_run"   cname="_BOD_NSLEEP" />
+      <value value="0x0300" name="On"       cname="_BOD_ON"     />
+    </mask>
+    <mask name="IESO"  value="0x0400" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0400" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="FCMEN" value="0x0800" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0800" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="DEBUG" value="0x1000" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x1000" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16F946.xml b/src/devices/pic/xml_data/16F946.xml
new file mode 100644
index 0000000..53df522
--- /dev/null
+++ b/src/devices/pic/xml_data/16F946.xml
@@ -0,0 +1,161 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16F946" status="IP" memory_technology="FLASH" self_write="no" architecture="16X" id="0x1460" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="023674" datasheet="41250" progsheet="41244" erratas="80238" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xFFFF" cchecksum="0xCBCD" />
+    <checksum protected="All" bchecksum="0x1FBE" cchecksum="0xEB8C" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="extended" >
+    <frequency start="0"  end="4"  vdd_min="2"   vdd_max="5.5" />
+    <frequency start="4"  end="10" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"  max="13"  nominal="11.5" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5" nominal="5"    />
+  <voltages name="vdd_prog_write" min="2"   max="5.5" nominal="5"    />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x0000" end="0x1FFF" />
+  <memory name="calibration"  start="0x2008" end="0x2009" cal_opmask="0x0000"     cal_opcode="0x0000" />
+  <memory name="user_ids"     start="0x2000" end="0x2003" rmask="0x007F"          />
+  <memory name="device_id"    start="0x2006" end="0x2006" />
+  <memory name="config"       start="0x2007" end="0x2007" />
+  <memory name="eeprom"       start="0x0000" end="0x00FF" hexfile_offset="0x2100" />
+  <memory name="debug_vector" start="0x2004" end="0x2004" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG" wmask="0x3FFF" bvalue="0x1FFF" >
+    <mask name="FOSC"  value="0x0007" >
+      <value value="0x0000" name="LP"           cname="_LP_OSC"             />
+      <value value="0x0001" name="XT"           cname="_XT_OSC"             />
+      <value value="0x0002" name="HS"           cname="_HS_OSC"             />
+      <value value="0x0003" name="EC_IO"        cname="_EC_OSC"             />
+      <value value="0x0004" name="INTRC_IO"     cname="_INTRC_OSC_NOCLKOUT" ecnames="_INTOSCIO" />
+      <value value="0x0005" name="INTRC_CLKOUT" cname="_INTRC_OSC_CLKOUT"   ecnames="_INTOSC"   />
+      <value value="0x0006" name="EXTRC_IO"     cname="_EXTRC_OSC_NOCLKOUT" ecnames="_EXTRCIO"  />
+      <value value="0x0007" name="EXTRC_CLKOUT" cname="_EXTRC_OSC_CLKOUT"   ecnames="_EXTRC"    />
+    </mask>
+    <mask name="WDT"   value="0x0008" >
+      <value value="0x0000" name="Off" cname="_WDT_OFF" />
+      <value value="0x0008" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="PWRTE" value="0x0010" >
+      <value value="0x0000" name="On"  cname="_PWRTE_ON"  />
+      <value value="0x0010" name="Off" cname="_PWRTE_OFF" />
+    </mask>
+    <mask name="MCLRE" value="0x0020" >
+      <value value="0x0000" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x0020" name="External" cname="_MCLRE_ON"  />
+    </mask>
+    <mask name="CP"    value="0x0040" >
+      <value value="0x0000" name="All" cname="_CP_ON"  />
+      <value value="0x0040" name="Off" cname="_CP_OFF" />
+    </mask>
+    <mask name="CPD"   value="0x0080" >
+      <value value="0x0000" name="All" cname="_CPD_ON"  />
+      <value value="0x0080" name="Off" cname="_CPD_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x0300" >
+      <value value="0x0000" name="Off"      cname="_BOD_OFF"    />
+      <value value="0x0100" name="Software" cname="_BOD_SBODEN" />
+      <value value="0x0200" name="On_run"   cname="_BOD_NSLEEP" />
+      <value value="0x0300" name="On"       cname="_BOD_ON"     />
+    </mask>
+    <mask name="IESO"  value="0x0400" >
+      <value value="0x0000" name="Off" cname="_IESO_OFF" />
+      <value value="0x0400" name="On"  cname="_IESO_ON"  />
+    </mask>
+    <mask name="FCMEN" value="0x0800" >
+      <value value="0x0000" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x0800" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="DEBUG" value="0x1000" >
+      <value value="0x0000" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x1000" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/16HV540.xml b/src/devices/pic/xml_data/16HV540.xml
new file mode 100644
index 0000000..439aa82
--- /dev/null
+++ b/src/devices/pic/xml_data/16HV540.xml
@@ -0,0 +1,97 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="16HV540" document="010244" status="IP" memory_technology="EPROM" architecture="10X" pc="9">
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" constant="0x0FF0" bchecksum="0x0DFF" cchecksum="0xFC47" />
+    <checksum protected="All" type="XOR4"       bchecksum="0x1E07" cchecksum="0x1DF5" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4"     vdd_min="3.5" vdd_max="15" osc="RC" />
+    <frequency start="0" end="4"     vdd_min="3.5" vdd_max="15" osc="XT" />
+    <frequency start="0" end="20"    vdd_min="4.5" vdd_max="15" osc="HS" />
+    <frequency start="0" end="0.032" vdd_min="3.5" vdd_max="15" osc="LP" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.5" max="13.5" nominal="13" />
+  <voltages name="vdd_prog" min="4.75" max="5.25" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"  start="0x000" end="0x1FF" />
+  <memory name="user_ids" start="0x200" end="0x203" rmask="0x00F" />
+  <memory name="config"   start="0xFFF" end="0xFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFF" bvalue="0x00F" >
+    <mask name="FOSC" value="0x003" >
+      <value value="0x000" name="LP"           cname="_LP_OSC" />
+      <value value="0x001" name="XT"           cname="_XT_OSC" />
+      <value value="0x002" name="HS"           cname="_HS_OSC" />
+      <value value="0x003" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+    <mask name="WDT"  value="0x004" >
+      <value value="0x000" name="Off" cname="_WDT_OFF" />
+      <value value="0x004" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="CP"   value="0x008" >
+      <value value="0x000" name="All" cname="_CP_ON"  />
+      <value value="0x008" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="RA2"         />
+    <pin index="2"  name="RA3"         />
+    <pin index="3"  name="T0CKI"       />
+    <pin index="4"  name="MCLR/VPP"    />
+    <pin index="5"  name="VSS"         />
+    <pin index="6"  name="RB0"         />
+    <pin index="7"  name="RB1"         />
+    <pin index="8"  name="RB2"         />
+    <pin index="9"  name="RB3"         />
+    <pin index="10" name="RB4"         />
+    <pin index="11" name="RB5"         />
+    <pin index="12" name="RB6"         />
+    <pin index="13" name="RB7"         />
+    <pin index="14" name="VDD"         />
+    <pin index="15" name="OSC2/CLKOUT" />
+    <pin index="16" name="OSC1/CLKIN"  />
+    <pin index="17" name="RA0"         />
+    <pin index="18" name="RA1"         />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/17C42.xml b/src/devices/pic/xml_data/17C42.xml
new file mode 100644
index 0000000..e072c94
--- /dev/null
+++ b/src/devices/pic/xml_data/17C42.xml
@@ -0,0 +1,192 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="17C42" document="010245" status="EOL" alternatives="17C42A" memory_technology="EPROM" architecture="17C" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Microprocessor"                              constant="0xFFA0" bchecksum="0xF7FF" cchecksum="0x79BD" />
+    <checksum protected="Microcontroller"                             constant="0xFFA0" bchecksum="0xF7EF" cchecksum="0x79AD" />
+    <checksum protected="Extended microcontroller"                    constant="0xFFA0" bchecksum="0xF7BF" cchecksum="0x797D" />
+    <checksum protected="Code-protected microcontroller" type="XNOR8" constant="0xFFA0" bchecksum="0xF7AF" cchecksum="0xBB73" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="25" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code" start="0x0000" end="0x07FF" />
+  <memory name="config"  start="0xFE00" end="0xFE00" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFFF" bvalue="0x005F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LF_OSC" />
+      <value value="0x0001" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+      <value value="0x0002" name="XT"           cname="_XT_OSC" />
+      <value value="0x0003" name="EC"           cname="_EC_OSC" />
+    </mask>
+    <mask name="WDTPS" value="0x000C" >
+      <value value="0x0000" name="Disabled" cname="_WDT_OFF" ecnames="_WDT_NORM" />
+      <value value="0x0004" name="1:128"    cname="_WDT_64"  />
+      <value value="0x0008" name="1:512"    cname="_WDT_256" />
+      <value value="0x000C" name="1:1"      cname="_WDT_1"   />
+    </mask>
+    <mask name="PM"    value="0x0050" >
+      <value value="0x0000" name="Code-protected microcontroller" cname="_PMC_MODE" />
+      <value value="0x0010" name="Extended microcontroller"       cname="_XMC_MODE" />
+      <value value="0x0040" name="Microcontroller"                cname="_MC_MODE"  />
+      <value value="0x0050" name="Microprocessor"                 cname="_MP_MODE"  />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip"      nb_pins="40" >
+    <pin index="1"  name="VDD"			/>
+    <pin index="2"  name="RC0/AD0"		/>
+    <pin index="3"  name="RC1/AD1"		/>
+    <pin index="4"  name="RC2/AD2"		/>
+    <pin index="5"  name="RC3/AD3"		/>
+    <pin index="6"  name="RC4/AD4"		/>
+    <pin index="7"  name="RC5/AD5"		/>
+    <pin index="8"  name="RC6/AD6"		/>
+    <pin index="9"  name="RC7/AD7"		/>
+    <pin index="10" name="VSS"			/>
+    <pin index="11" name="RB0/CAP1"		/>
+    <pin index="12" name="RB1/CAP2"		/>
+    <pin index="13" name="RB2/PWM1"		/>
+    <pin index="14" name="RB3/PWM2"		/>
+    <pin index="15" name="RB4/TCLK2"		/>
+    <pin index="16" name="RB5/TCLK3"		/>
+    <pin index="17" name="RB6"			/>
+    <pin index="18" name="RB7"			/>
+    <pin index="19" name="OSC1/CLKIN"		/>
+    <pin index="20" name="OSC2/CLKOUT"		/>
+    <pin index="21" name="RA5/TX/CK"		/>
+    <pin index="22" name="RA4/RX/DT"		/>
+    <pin index="23" name="RA3"			/>
+    <pin index="24" name="RA2"			/>
+    <pin index="25" name="RA1/T0CKL"		/>
+    <pin index="26" name="RA0/INT"		/>
+    <pin index="27" name="TEST"			/>
+    <pin index="28" name="RE2/WR"		/>
+    <pin index="29" name="RE1/OE"		/>
+    <pin index="30" name="RE0/ALE"		/>
+    <pin index="31" name="VSS"			/>
+    <pin index="32" name="MCLR/VPP"		/>
+    <pin index="33" name="RD7/AD15"		/>
+    <pin index="34" name="RD6/AD14"		/>
+    <pin index="35" name="RD5/AD13"		/>
+    <pin index="36" name="RD4/AD12"		/>
+    <pin index="37" name="RD3/AD11"		/>
+    <pin index="38" name="RD2/AD10"		/>
+    <pin index="39" name="RD1/AD9"		/>
+    <pin index="40" name="RD0/AD8"		/>
+  </package>
+
+  <package types="plcc"      nb_pins="44" >
+    <pin index="1"  name="VDD"			/>
+    <pin index="2"  name="NC"			/>
+    <pin index="3"  name="RC0/AD0"		/>
+    <pin index="4"  name="RC1/AD1"		/>
+    <pin index="5"  name="RC2/AD2"		/>
+    <pin index="6"  name="RC3/AD3"		/>
+    <pin index="7"  name="RC4/AD4"		/>
+    <pin index="8"  name="RC5/AD5"		/>
+    <pin index="9"  name="RC6/AD6"		/>
+    <pin index="10" name="RC7/AD7"		/>
+    <pin index="11" name="VSS"			/>
+    <pin index="12" name="VSS"			/>
+    <pin index="13" name="RB0/CAP1"		/>
+    <pin index="14" name="RB1/CAP2"		/>
+    <pin index="15" name="RB2/PWM1"		/>
+    <pin index="16" name="RB3/PWM2"		/>
+    <pin index="17" name="RB4/TCLK2"		/>
+    <pin index="18" name="RB5/TCLK3"		/>
+    <pin index="19" name="RB6"			/>
+    <pin index="20" name="RB7"			/>
+    <pin index="21" name="OSC1/CLKIN"		/>
+    <pin index="22" name="OSC2/CLKOUT"		/>
+    <pin index="23" name="RA5/TX/CK"		/>
+    <pin index="24" name="RA4/RX/DT"		/>
+    <pin index="25" name="RA3"			/>
+    <pin index="26" name="RA2"			/>
+    <pin index="27" name="RA1/T0CKL"		/>
+    <pin index="28" name="RA0/INT"		/>
+    <pin index="29" name="TEST"			/>
+    <pin index="30" name="RE2/WR"		/>
+    <pin index="31" name="RE1/OE"		/>
+    <pin index="32" name="RE0/ALE"		/>
+    <pin index="33" name="VSS"			/>
+    <pin index="34" name="VSS"			/>
+    <pin index="35" name="MCLR/VPP"		/>
+    <pin index="36" name="RD7/AD15"		/>
+    <pin index="37" name="RD6/AD14"		/>
+    <pin index="38" name="RD5/AD13"		/>
+    <pin index="39" name="RD4/AD12"		/>
+    <pin index="40" name="RD3/AD11"		/>
+    <pin index="41" name="RD2/AD10"		/>
+    <pin index="42" name="RD1/AD9"		/>
+    <pin index="43" name="RD0/AD8"		/>
+    <pin index="44" name="VDD"			/>
+  </package>
+
+  <package types="mqfp tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/17C42A.xml b/src/devices/pic/xml_data/17C42A.xml
new file mode 100644
index 0000000..58c59b3
--- /dev/null
+++ b/src/devices/pic/xml_data/17C42A.xml
@@ -0,0 +1,196 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="17C42A" document="010246" status="NR" alternative="18F4220" memory_technology="EPROM" architecture="17C" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Microprocessor"                              bchecksum="0xF95F" cchecksum="0x7B1D" />
+    <checksum protected="Microcontroller"                             bchecksum="0xF94F" cchecksum="0x7B0D" />
+    <checksum protected="Extended microcontroller"                    bchecksum="0xF91F" cchecksum="0x7ADD" />
+    <checksum protected="Code-protected microcontroller" type="XNOR8" bchecksum="0xF80F" cchecksum="0xBBD3" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="33" vdd_min="4.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="8" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code" start="0x0000" end="0x07FF" />
+  <memory name="config"  start="0xFE00" end="0xFE00" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFFF" bvalue="0x015F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LF_OSC" />
+      <value value="0x0001" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+      <value value="0x0002" name="XT"           cname="_XT_OSC" />
+      <value value="0x0003" name="EC"           cname="_EC_OSC" />
+    </mask>
+    <mask name="WDTPS" value="0x000C" >
+      <value value="0x0000" name="Disabled" cname="_WDT_OFF" ecnames="_WDT_NORM" />
+      <value value="0x0004" name="1:128"    cname="_WDT_64"  />
+      <value value="0x0008" name="1:512"    cname="_WDT_256" />
+      <value value="0x000C" name="1:1"      cname="_WDT_1"   />
+    </mask>
+    <mask name="PM"    value="0x0150" >
+      <value value="0x0000" name="Code-protected microcontroller" cname="_PMC_MODE" />
+      <value value="0x0110" name="Extended microcontroller"       cname="_XMC_MODE" />
+      <value value="0x0140" name="Microcontroller"                cname="_MC_MODE"  />
+      <value value="0x0150" name="Microprocessor"                 cname="_MP_MODE"  />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip"      nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc"      nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="mqfp tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/17C43.xml b/src/devices/pic/xml_data/17C43.xml
new file mode 100644
index 0000000..4c91f40
--- /dev/null
+++ b/src/devices/pic/xml_data/17C43.xml
@@ -0,0 +1,196 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="17C43" document="010247" status="NR" alternative="18F4320" memory_technology="EPROM" architecture="17C" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Microprocessor"                              bchecksum="0xF15F" cchecksum="0x731D" />
+    <checksum protected="Microcontroller"                             bchecksum="0xF14F" cchecksum="0x730D" />
+    <checksum protected="Extended microcontroller"                    bchecksum="0xF11F" cchecksum="0x72DD" />
+    <checksum protected="Code-protected microcontroller" type="XNOR8" bchecksum="0xF00F" cchecksum="0xB3D3" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="33" vdd_min="4.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="8" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code" start="0x0000" end="0x0FFF" />
+  <memory name="config"  start="0xFE00" end="0xFE00" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFFF" bvalue="0x015F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LF_OSC" />
+      <value value="0x0001" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+      <value value="0x0002" name="XT"           cname="_XT_OSC" />
+      <value value="0x0003" name="EC"           cname="_EC_OSC" />
+    </mask>
+    <mask name="WDTPS" value="0x000C" >
+      <value value="0x0000" name="Disabled" cname="_WDT_OFF" ecnames="_WDT_NORM" />
+      <value value="0x0004" name="1:128"    cname="_WDT_64"  />
+      <value value="0x0008" name="1:512"    cname="_WDT_256" />
+      <value value="0x000C" name="1:1"      cname="_WDT_1"   />
+    </mask>
+    <mask name="PM"    value="0x0150" >
+      <value value="0x0000" name="Code-protected microcontroller" cname="_PMC_MODE" />
+      <value value="0x0110" name="Extended microcontroller"       cname="_XMC_MODE" />
+      <value value="0x0140" name="Microcontroller"                cname="_MC_MODE"  />
+      <value value="0x0150" name="Microprocessor"                 cname="_MP_MODE"  />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip"      nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc"      nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="mqfp tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/17C44.xml b/src/devices/pic/xml_data/17C44.xml
new file mode 100644
index 0000000..da4be7b
--- /dev/null
+++ b/src/devices/pic/xml_data/17C44.xml
@@ -0,0 +1,196 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="17C44" document="010248" status="NR" alternative="18F4420" memory_technology="EPROM" architecture="17C" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Microprocessor"                              bchecksum="0xE15F" cchecksum="0x631D" />
+    <checksum protected="Microcontroller"                             bchecksum="0xE14F" cchecksum="0x630D" />
+    <checksum protected="Extended microcontroller"                    bchecksum="0xE11F" cchecksum="0x62DD" />
+    <checksum protected="Code-protected microcontroller" type="XNOR8" bchecksum="0xE00F" cchecksum="0xA3D3" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="33" vdd_min="4.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="8" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code" start="0x0000" end="0x1FFF" />
+  <memory name="config"  start="0xFE00" end="0xFE00" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFFF" bvalue="0x015F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LF_OSC" />
+      <value value="0x0001" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+      <value value="0x0002" name="XT"           cname="_XT_OSC" />
+      <value value="0x0003" name="EC"           cname="_EC_OSC" />
+    </mask>
+    <mask name="WDTPS" value="0x000C" >
+      <value value="0x0000" name="Disabled" cname="_WDT_OFF" ecnames="_WDT_NORM" />
+      <value value="0x0004" name="1:128"    cname="_WDT_64"  />
+      <value value="0x0008" name="1:512"    cname="_WDT_256" />
+      <value value="0x000C" name="1:1"      cname="_WDT_1"   />
+    </mask>
+    <mask name="PM"    value="0x0150" >
+      <value value="0x0000" name="Code-protected microcontroller" cname="_PMC_MODE" />
+      <value value="0x0110" name="Extended microcontroller"       cname="_XMC_MODE" />
+      <value value="0x0140" name="Microcontroller"                cname="_MC_MODE"  />
+      <value value="0x0150" name="Microprocessor"                 cname="_MP_MODE"  />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip"      nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc"      nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="mqfp tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/17C752.xml b/src/devices/pic/xml_data/17C752.xml
new file mode 100644
index 0000000..20f798f
--- /dev/null
+++ b/src/devices/pic/xml_data/17C752.xml
@@ -0,0 +1,201 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="17C752" document="010249" status="NR" alternative="18F6520" memory_technology="EPROM" architecture="17C" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Microprocessor"                              bchecksum="0xA05F" cchecksum="0x221D" />
+    <checksum protected="Microcontroller"                             bchecksum="0xA04F" cchecksum="0x220D" />
+    <checksum protected="Extended microcontroller"                    bchecksum="0xA01F" cchecksum="0x21DD" />
+    <checksum protected="Code-protected microcontroller" type="XNOR8" bchecksum="0x200F" cchecksum="0xE3D3" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="8" vdd_min="3" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="33" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code" start="0x0000" end="0x1FFF" />
+  <memory name="config"  start="0xFE00" end="0xFE00" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFFF" bvalue="0xC05F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LF_OSC" />
+      <value value="0x0001" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+      <value value="0x0002" name="XT"           cname="_XT_OSC" />
+      <value value="0x0003" name="EC"           cname="_EC_OSC" />
+    </mask>
+    <mask name="WDTPS" value="0x000C" >
+      <value value="0x0000" name="Disabled" cname="_WDT_OFF" ecnames="_WDT_NORM" />
+      <value value="0x0004" name="1:64"     cname="_WDT_64"  />
+      <value value="0x0008" name="1:256"    cname="_WDT_256" />
+      <value value="0x000C" name="1:1"      cname="_WDT_1"   ecnames="_WDT_0"    />
+    </mask>
+    <mask name="BODEN" value="0x4000" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x4000" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="PM"    value="0x8050" >
+      <value value="0x0000" name="Code-protected microcontroller" cname="_PMC_MODE" />
+      <value value="0x8010" name="Extended microcontroller"       cname="_XMC_MODE" />
+      <value value="0x8040" name="Microcontroller"                cname="_MC_MODE"  />
+      <value value="0x8050" name="Microprocessor"                 cname="_MP_MODE"  />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="plcc" nb_pins="68" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/17C756.xml b/src/devices/pic/xml_data/17C756.xml
new file mode 100644
index 0000000..a5df4c4
--- /dev/null
+++ b/src/devices/pic/xml_data/17C756.xml
@@ -0,0 +1,201 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="17C756" document="010250" status="EOL" alternatives="17C756A" memory_technology="EPROM" architecture="17C" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Microprocessor"                              bchecksum="0x805F" cchecksum="0x021D" />
+    <checksum protected="Microcontroller"                             bchecksum="0x804F" cchecksum="0x020D" />
+    <checksum protected="Extended microcontroller"                    bchecksum="0x801F" cchecksum="0x01DD" />
+    <checksum protected="Code-protected microcontroller" type="XNOR8" bchecksum="0x000F" cchecksum="0xC3D3" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="8" vdd_min="3" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="33" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code" start="0x0000" end="0x3FFF" />
+  <memory name="config"  start="0xFE00" end="0xFE00" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFFF" bvalue="0xC05F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LF_OSC" />
+      <value value="0x0001" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+      <value value="0x0002" name="XT"           cname="_XT_OSC" />
+      <value value="0x0003" name="EC"           cname="_EC_OSC" />
+    </mask>
+    <mask name="WDTPS" value="0x000C" >
+      <value value="0x0000" name="Disabled" cname="_WDT_OFF" ecnames="_WDT_NORM" />
+      <value value="0x0004" name="1:64"     cname="_WDT_64"  />
+      <value value="0x0008" name="1:256"    cname="_WDT_256" />
+      <value value="0x000C" name="1:1"      cname="_WDT_1"   ecnames="_WDT_0"    />
+    </mask>
+    <mask name="BODEN" value="0x4000" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x4000" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="PM"    value="0x8050" >
+      <value value="0x0000" name="Code-protected microcontroller" cname="_PMC_MODE" />
+      <value value="0x8010" name="Extended microcontroller"       cname="_XMC_MODE" />
+      <value value="0x8040" name="Microcontroller"                cname="_MC_MODE"  />
+      <value value="0x8050" name="Microprocessor"                 cname="_MP_MODE"  />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="plcc" nb_pins="68" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/17C756A.xml b/src/devices/pic/xml_data/17C756A.xml
new file mode 100644
index 0000000..f20ee31
--- /dev/null
+++ b/src/devices/pic/xml_data/17C756A.xml
@@ -0,0 +1,201 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="17C756A" document="010251" status="NR" alternative="18F6520" memory_technology="EPROM" architecture="17C" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Microprocessor"                              bchecksum="0x805F" cchecksum="0x021D" />
+    <checksum protected="Microcontroller"                             bchecksum="0x804F" cchecksum="0x020D" />
+    <checksum protected="Extended microcontroller"                    bchecksum="0x801F" cchecksum="0x01DD" />
+    <checksum protected="Code-protected microcontroller" type="XNOR8" bchecksum="0x000F" cchecksum="0xC3D3" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="8" vdd_min="3" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="33" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code" start="0x0000" end="0x3FFF" />
+  <memory name="config"  start="0xFE00" end="0xFE00" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFFF" bvalue="0xC05F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LF_OSC" />
+      <value value="0x0001" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+      <value value="0x0002" name="XT"           cname="_XT_OSC" />
+      <value value="0x0003" name="EC"           cname="_EC_OSC" />
+    </mask>
+    <mask name="WDTPS" value="0x000C" >
+      <value value="0x0000" name="Disabled" cname="_WDT_OFF" ecnames="_WDT_NORM" />
+      <value value="0x0004" name="1:64"     cname="_WDT_64"  />
+      <value value="0x0008" name="1:256"    cname="_WDT_256" />
+      <value value="0x000C" name="1:1"      cname="_WDT_1"   ecnames="_WDT_0"    />
+    </mask>
+    <mask name="BODEN" value="0x4000" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x4000" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="PM"    value="0x8050" >
+      <value value="0x0000" name="Code-protected microcontroller" cname="_PMC_MODE" />
+      <value value="0x8010" name="Extended microcontroller"       cname="_XMC_MODE" />
+      <value value="0x8040" name="Microcontroller"                cname="_MC_MODE"  />
+      <value value="0x8050" name="Microprocessor"                 cname="_MP_MODE"  />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="plcc" nb_pins="68" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/17C762.xml b/src/devices/pic/xml_data/17C762.xml
new file mode 100644
index 0000000..10e3a86
--- /dev/null
+++ b/src/devices/pic/xml_data/17C762.xml
@@ -0,0 +1,233 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="17C762" document="010252" status="NR" alternative="18F8520" memory_technology="EPROM" architecture="17C" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Microprocessor"                              bchecksum="0xA05F" cchecksum="0x221D" />
+    <checksum protected="Microcontroller"                             bchecksum="0xA04F" cchecksum="0x220D" />
+    <checksum protected="Extended microcontroller"                    bchecksum="0xA01F" cchecksum="0x21DD" />
+    <checksum protected="Code-protected microcontroller" type="XNOR8" bchecksum="0x200F" cchecksum="0xE3D3" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="8" vdd_min="3" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="33" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code" start="0x0000" end="0x1FFF" />
+  <memory name="config"  start="0xFE00" end="0xFE00" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFFF" bvalue="0xC05F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LF_OSC" />
+      <value value="0x0001" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+      <value value="0x0002" name="XT"           cname="_XT_OSC" />
+      <value value="0x0003" name="EC"           cname="_EC_OSC" />
+    </mask>
+    <mask name="WDTPS" value="0x000C" >
+      <value value="0x0000" name="Disabled" cname="_WDT_OFF" ecnames="_WDT_NORM" />
+      <value value="0x0004" name="1:64"     cname="_WDT_64"  />
+      <value value="0x0008" name="1:256"    cname="_WDT_256" />
+      <value value="0x000C" name="1:1"      cname="_WDT_1"   ecnames="_WDT_0"    />
+    </mask>
+    <mask name="BODEN" value="0x4000" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x4000" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="PM"    value="0x8050" >
+      <value value="0x0000" name="Code-protected microcontroller" cname="_PMC_MODE" />
+      <value value="0x8010" name="Extended microcontroller"       cname="_XMC_MODE" />
+      <value value="0x8040" name="Microcontroller"                cname="_MC_MODE"  />
+      <value value="0x8050" name="Microprocessor"                 cname="_MP_MODE"  />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="84" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+    <pin index="81" name="" />
+    <pin index="82" name="" />
+    <pin index="83" name="" />
+    <pin index="84" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/17C766.xml b/src/devices/pic/xml_data/17C766.xml
new file mode 100644
index 0000000..0d2559d
--- /dev/null
+++ b/src/devices/pic/xml_data/17C766.xml
@@ -0,0 +1,233 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="17C766" document="010253" status="NR" alternative="18F8520" memory_technology="EPROM" architecture="17C" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Microprocessor"                              bchecksum="0x805F" cchecksum="0x021D" />
+    <checksum protected="Microcontroller"                             bchecksum="0x804F" cchecksum="0x020D" />
+    <checksum protected="Extended microcontroller"                    bchecksum="0x801F" cchecksum="0x01DD" />
+    <checksum protected="Code-protected microcontroller" type="XNOR8" bchecksum="0x000F" cchecksum="0xC3D3" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="8" vdd_min="3" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="33" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code" start="0x0000" end="0x3FFF" />
+  <memory name="config"  start="0xFE00" end="0xFE00" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFFF" bvalue="0xC05F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LF_OSC" />
+      <value value="0x0001" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+      <value value="0x0002" name="XT"           cname="_XT_OSC" />
+      <value value="0x0003" name="EC"           cname="_EC_OSC" />
+    </mask>
+    <mask name="WDTPS" value="0x000C" >
+      <value value="0x0000" name="Disabled" cname="_WDT_OFF" ecnames="_WDT_NORM" />
+      <value value="0x0004" name="1:64"     cname="_WDT_64"  />
+      <value value="0x0008" name="1:256"    cname="_WDT_256" />
+      <value value="0x000C" name="1:1"      cname="_WDT_1"   ecnames="_WDT_0"    />
+    </mask>
+    <mask name="BODEN" value="0x4000" >
+      <value value="0x0000" name="Off" cname="_BODEN_OFF" />
+      <value value="0x4000" name="On"  cname="_BODEN_ON"  />
+    </mask>
+    <mask name="PM"    value="0x8050" >
+      <value value="0x0000" name="Code-protected microcontroller" cname="_PMC_MODE" />
+      <value value="0x8010" name="Extended microcontroller"       cname="_XMC_MODE" />
+      <value value="0x8040" name="Microcontroller"                cname="_MC_MODE"  />
+      <value value="0x8050" name="Microprocessor"                 cname="_MP_MODE"  />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="84" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+    <pin index="81" name="" />
+    <pin index="82" name="" />
+    <pin index="83" name="" />
+    <pin index="84" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/17CR42.xml b/src/devices/pic/xml_data/17CR42.xml
new file mode 100644
index 0000000..b691cd8
--- /dev/null
+++ b/src/devices/pic/xml_data/17CR42.xml
@@ -0,0 +1,196 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="17CR42" document="010254" status="EOL" memory_technology="ROM" architecture="17C" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Microprocessor"                              bchecksum="0xF95F" cchecksum="0x7B1D" />
+    <checksum protected="Microcontroller"                             bchecksum="0xF94F" cchecksum="0x7B0D" />
+    <checksum protected="Extended microcontroller"                    bchecksum="0xF91F" cchecksum="0x7ADD" />
+    <checksum protected="Code-protected microcontroller" type="XNOR8" bchecksum="0xF80F" cchecksum="0xBBD3" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="33" vdd_min="4.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="8" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code" start="0x0000" end="0x07FF" />
+  <memory name="config"  start="0xFE00" end="0xFE00" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFFF" bvalue="0x015F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LF_OSC" />
+      <value value="0x0001" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+      <value value="0x0002" name="XT"           cname="_XT_OSC" />
+      <value value="0x0003" name="EC"           cname="_EC_OSC" />
+    </mask>
+    <mask name="WDTPS" value="0x000C" >
+      <value value="0x0000" name="Disabled" cname="_WDT_OFF" ecnames="_WDT_NORM" />
+      <value value="0x0004" name="1:128"    cname="_WDT_64"  />
+      <value value="0x0008" name="1:512"    cname="_WDT_256" />
+      <value value="0x000C" name="1:1"      cname="_WDT_1"   />
+    </mask>
+    <mask name="PM"    value="0x0150" >
+      <value value="0x0000" name="Code-protected microcontroller" cname="_PMC_MODE" />
+      <value value="0x0110" name="Extended microcontroller"       cname="_XMC_MODE" />
+      <value value="0x0140" name="Microcontroller"                cname="_MC_MODE"  />
+      <value value="0x0150" name="Microprocessor"                 cname="_MP_MODE"  />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip"      nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc"      nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="mqfp tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/17CR43.xml b/src/devices/pic/xml_data/17CR43.xml
new file mode 100644
index 0000000..13c1f2c
--- /dev/null
+++ b/src/devices/pic/xml_data/17CR43.xml
@@ -0,0 +1,196 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="17CR43" document="010255" status="EOL" memory_technology="ROM" architecture="17C" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Microprocessor"                              bchecksum="0xF15F" cchecksum="0x731D" />
+    <checksum protected="Microcontroller"                             bchecksum="0xF14F" cchecksum="0x730D" />
+    <checksum protected="Extended microcontroller"                    bchecksum="0xF11F" cchecksum="0x72DD" />
+    <checksum protected="Code-protected microcontroller" type="XNOR8" bchecksum="0xF00F" cchecksum="0xB3D3" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="33" vdd_min="4.5" vdd_max="6" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="8" vdd_min="2.5" vdd_max="6" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code" start="0x0000" end="0x0FFF" />
+  <memory name="config"  start="0xFE00" end="0xFE00" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="" wmask="0xFFFF" bvalue="0x015F" >
+    <mask name="FOSC"  value="0x0003" >
+      <value value="0x0000" name="LP"           cname="_LF_OSC" />
+      <value value="0x0001" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+      <value value="0x0002" name="XT"           cname="_XT_OSC" />
+      <value value="0x0003" name="EC"           cname="_EC_OSC" />
+    </mask>
+    <mask name="WDTPS" value="0x000C" >
+      <value value="0x0000" name="Disabled" cname="_WDT_OFF" ecnames="_WDT_NORM" />
+      <value value="0x0004" name="1:128"    cname="_WDT_64"  />
+      <value value="0x0008" name="1:512"    cname="_WDT_256" />
+      <value value="0x000C" name="1:1"      cname="_WDT_1"   />
+    </mask>
+    <mask name="PM"    value="0x0150" >
+      <value value="0x0000" name="Code-protected microcontroller" cname="_PMC_MODE" />
+      <value value="0x0110" name="Extended microcontroller"       cname="_XMC_MODE" />
+      <value value="0x0140" name="Microcontroller"                cname="_MC_MODE"  />
+      <value value="0x0150" name="Microprocessor"                 cname="_MP_MODE"  />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip"      nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc"      nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="mqfp tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18C242.xml b/src/devices/pic/xml_data/18C242.xml
new file mode 100644
index 0000000..798c478
--- /dev/null
+++ b/src/devices/pic/xml_data/18C242.xml
@@ -0,0 +1,146 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18C242" document="010256" status="NR" alternative="18F2420" memory_technology="EPROM" architecture="18C" id="0x0320" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xC146" cchecksum="0xC09C" />
+    <checksum protected="All" bchecksum="0x005E" cchecksum="0x0068" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="6"  vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="6" end="40" vdd_min="2.5" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x000000" end="0x003FFF" />
+  <memory name="user_ids"  start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id" start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"    start="0x300000" end="0x300007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG0" wmask="0xFF" bvalue="0xFF" >
+    <mask name="CP" value="0xFF" >
+      <value value="0x00" name="All" cname="_CP_ON"  />
+      <value value="0xFF" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC"   value="0x07" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"    />
+      <value value="0x01" name="XT"           cname="_XT_OSC"    />
+      <value value="0x02" name="HS"           cname="_HS_OSC"    />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC"    />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"    />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"  />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC" />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"  />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON"  />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.5" cname="_BORV_25" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG3" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG4" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG5" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_OFF" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG6" wmask="0xFF" bvalue="0x01" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG7" wmask="0xFF" bvalue="0x00" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18C252.xml b/src/devices/pic/xml_data/18C252.xml
new file mode 100644
index 0000000..81f370b
--- /dev/null
+++ b/src/devices/pic/xml_data/18C252.xml
@@ -0,0 +1,146 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18C252" document="010257" status="NR" alternative="18F2520" memory_technology="EPROM" architecture="18C" id="0x0220" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x8146" cchecksum="0x809C" />
+    <checksum protected="All" bchecksum="0x005A" cchecksum="0x0064" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="6"  vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="6" end="40" vdd_min="2.5" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x000000" end="0x007FFF" />
+  <memory name="user_ids"  start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id" start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"    start="0x300000" end="0x300007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG0" wmask="0xFF" bvalue="0xFF" >
+    <mask name="CP" value="0xFF" >
+      <value value="0x00" name="All" cname="_CP_ON"  />
+      <value value="0xFF" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC"   value="0x07" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"    />
+      <value value="0x01" name="XT"           cname="_XT_OSC"    />
+      <value value="0x02" name="HS"           cname="_HS_OSC"    />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC"    />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"    />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"  />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC" />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"  />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON"  />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.5" cname="_BORV_25" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG3" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG4" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG5" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_OFF" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG6" wmask="0xFF" bvalue="0x01" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG7" wmask="0xFF" bvalue="0x00" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18C442.xml b/src/devices/pic/xml_data/18C442.xml
new file mode 100644
index 0000000..419ee29
--- /dev/null
+++ b/src/devices/pic/xml_data/18C442.xml
@@ -0,0 +1,252 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18C442" document="010258" status="NR" alternative="18F4420" memory_technology="EPROM" architecture="18C" id="0x0300" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xC146" cchecksum="0xC09C" />
+    <checksum protected="All" bchecksum="0x005E" cchecksum="0x0068" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="6"  vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="6" end="40" vdd_min="2.5" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x000000" end="0x003FFF" />
+  <memory name="user_ids"  start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id" start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"    start="0x300000" end="0x300007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG0" wmask="0xFF" bvalue="0xFF" >
+    <mask name="CP" value="0xFF" >
+      <value value="0x00" name="All" cname="_CP_ON"  />
+      <value value="0xFF" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC"   value="0x07" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"    />
+      <value value="0x01" name="XT"           cname="_XT_OSC"    />
+      <value value="0x02" name="HS"           cname="_HS_OSC"    />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC"    />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"    />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"  />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC" />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"  />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON"  />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.5" cname="_BORV_25" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG3" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG4" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG5" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_OFF" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG6" wmask="0xFF" bvalue="0x01" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG7" wmask="0xFF" bvalue="0x00" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18C452.xml b/src/devices/pic/xml_data/18C452.xml
new file mode 100644
index 0000000..73e3610
--- /dev/null
+++ b/src/devices/pic/xml_data/18C452.xml
@@ -0,0 +1,252 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18C452" document="010259" status="NR" alternative="18F4520" memory_technology="EPROM" architecture="18C" id="0x0200" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x8146" cchecksum="0x809C" />
+    <checksum protected="All" bchecksum="0x005A" cchecksum="0x0064" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="6"  vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="6" end="40" vdd_min="2.5" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x000000" end="0x007FFF" />
+  <memory name="user_ids"  start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id" start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"    start="0x300000" end="0x300007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG0" wmask="0xFF" bvalue="0xFF" >
+    <mask name="CP" value="0xFF" >
+      <value value="0x00" name="All" cname="_CP_ON"  />
+      <value value="0xFF" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC"   value="0x07" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"    />
+      <value value="0x01" name="XT"           cname="_XT_OSC"    />
+      <value value="0x02" name="HS"           cname="_HS_OSC"    />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC"    />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"    />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"  />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC" />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"  />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON"  />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.5" cname="_BORV_25" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG3" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG4" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG5" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_OFF" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG6" wmask="0xFF" bvalue="0x01" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG7" wmask="0xFF" bvalue="0x00" />
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18C601.xml b/src/devices/pic/xml_data/18C601.xml
new file mode 100644
index 0000000..6d41b1c
--- /dev/null
+++ b/src/devices/pic/xml_data/18C601.xml
@@ -0,0 +1,225 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18C601" document="010260" status="IP" memory_technology="ROMLESS" architecture="18C" id="0x0120" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0"  end="4"  vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="4"  end="16" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3"   />
+    <frequency start="16" end="25" vdd_min="3"   vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="device_id" start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"    start="0x300000" end="0x300007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x02" >
+    <mask name="FOSC" value="0x03" >
+      <value value="0x00" name="LP"           cname="_LP_OSC" />
+      <value value="0x01" name="EC_CLKOUT"    cname="_EC_OSC" />
+      <value value="0x02" name="HS"           cname="_HS_OSC" />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x41" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BW"    value="0x40" >
+      <value value="0x00" name="8"  cname="_BW_8_BIT"  />
+      <value value="0x40" name="16" cname="_BW_16_BIT" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x81" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="0x7F"  />
+      <value value="0x80" name="Off" cname="0xFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="68" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18C658.xml b/src/devices/pic/xml_data/18C658.xml
new file mode 100644
index 0000000..9ca140c
--- /dev/null
+++ b/src/devices/pic/xml_data/18C658.xml
@@ -0,0 +1,248 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18C658" document="010261" status="NR" alternative="18F6585" memory_technology="EPROM" architecture="18C" id="0x00A0" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x8145" cchecksum="0x809B" />
+    <checksum protected="All" bchecksum="0x0058" cchecksum="0x0062" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="6"  vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="6" end="40" vdd_min="2.5" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x000000" end="0x007FFF" />
+  <memory name="user_ids"  start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id" start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"    start="0x300000" end="0x300007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG0" wmask="0xFF" bvalue="0xFF" >
+    <mask name="CP" value="0xFF" >
+      <value value="0x00" name="All" cname="_CP_ON"  />
+      <value value="0xFF" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC"   value="0x07" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"    />
+      <value value="0x01" name="XT"           cname="_XT_OSC"    />
+      <value value="0x02" name="HS"           cname="_HS_OSC"    />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC"    />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"    />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"  />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC" />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"  />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON"  />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.5" cname="_BORV_25" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG3" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG4" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG5" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x6" name="CONFIG6" wmask="0xFF" bvalue="0x01" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG7" wmask="0xFF" bvalue="0x00" />
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="68" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18C801.xml b/src/devices/pic/xml_data/18C801.xml
new file mode 100644
index 0000000..3e067ad
--- /dev/null
+++ b/src/devices/pic/xml_data/18C801.xml
@@ -0,0 +1,257 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18C801" document="010262" status="IP" memory_technology="ROMLESS" architecture="18C" id="0x0100" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0"  end="4"  vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="4"  end="16" vdd_min="2.5" vdd_max="5.5" vdd_min_end="3"   />
+    <frequency start="16" end="25" vdd_min="3"   vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="device_id" start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"    start="0x300000" end="0x300007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x02" >
+    <mask name="FOSC" value="0x03" >
+      <value value="0x00" name="LP"           cname="_LP_OSC" />
+      <value value="0x01" name="EC_CLKOUT"    cname="_EC_OSC" />
+      <value value="0x02" name="HS"           cname="_HS_OSC" />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x41" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BW"    value="0x40" >
+      <value value="0x00" name="8"  cname="_BW_8_BIT"  />
+      <value value="0x40" name="16" cname="_BW_16_BIT" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x81" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="0x7F"  />
+      <value value="0x80" name="Off" cname="0xFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="84" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+    <pin index="81" name="" />
+    <pin index="82" name="" />
+    <pin index="83" name="" />
+    <pin index="84" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18C858.xml b/src/devices/pic/xml_data/18C858.xml
new file mode 100644
index 0000000..7ce8087
--- /dev/null
+++ b/src/devices/pic/xml_data/18C858.xml
@@ -0,0 +1,280 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18C858" document="010263" status="NR" alternative="18F8585" memory_technology="EPROM" architecture="18C" id="0x00E0" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0x8145" cchecksum="0x809B" />
+    <checksum protected="All" bchecksum="0x0058" cchecksum="0x0062" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="6"  vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="6" end="40" vdd_min="2.5" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="12.75" max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.75"  max="5.25"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"   start="0x000000" end="0x007FFF" />
+  <memory name="user_ids"  start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id" start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"    start="0x300000" end="0x300007" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG0" wmask="0xFF" bvalue="0xFF" >
+    <mask name="CP" value="0xFF" >
+      <value value="0x00" name="All" cname="_CP_ON"  />
+      <value value="0xFF" name="Off" cname="_CP_OFF" />
+      <value value="default" name="invalid" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC"   value="0x07" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"    />
+      <value value="0x01" name="XT"           cname="_XT_OSC"    />
+      <value value="0x02" name="HS"           cname="_HS_OSC"    />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC"    />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"    />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"  />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC" />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"  />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON"  />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.5" cname="_BORV_25" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG3" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG4" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG5" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x6" name="CONFIG6" wmask="0xFF" bvalue="0x01" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG7" wmask="0xFF" bvalue="0x00" />
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="84" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+    <pin index="81" name="" />
+    <pin index="82" name="" />
+    <pin index="83" name="" />
+    <pin index="84" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F1220.xml b/src/devices/pic/xml_data/18F1220.xml
new file mode 100644
index 0000000..e46f7f0
--- /dev/null
+++ b/src/devices/pic/xml_data/18F1220.xml
@@ -0,0 +1,279 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F1220" document="010264" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x07E0" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0xF3EB" cchecksum="0xF341" />
+    <checksum protected_blocks="1" bchecksum="0xF5D6" cchecksum="0xF56D" />
+    <checksum protected_blocks="3" bchecksum="0x03D3" cchecksum="0x03BF" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x000FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0xCF" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"     sdcc_cname="_OSC_LP" />
+      <value value="0x01" name="XT"           cname="_XT_OSC"     sdcc_cname="_OSC_XT" />
+      <value value="0x02" name="HS"           cname="_HS_OSC"     sdcc_cname="_OSC_HS" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_RC_OSC"  sdcc_cname="_OSC_EXT_CLKOUT_on_RA6" />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"     sdcc_cname="_OSC_EC_CLKOUT" />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"   sdcc_cname="_OSC_EC_PORT" />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC"  sdcc_cname="_OSC_HS_PLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"   sdcc_cname="_OSC_EXT_Port_on_RA6" />
+      <value value="0x08" name="INTRC_IO"     cname="_INTIO2_OSC" sdcc_cname="_OSC_INT_Port_on_RA6_Port_on_RA7" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_INTIO1_OSC" sdcc_cname="_OSC_INT_CLKOUT_on_RA6_Port_on_RA7" />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FSCM_OFF" sdcc_cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FSCM_ON"  sdcc_cname="_FCMEN_ON" />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  sdcc_cname="_PUT_ON" />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" sdcc_cname="_PUT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" sdcc_cname="_BODEN_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  sdcc_cname="_BODEN_ON" />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" sdcc_cname="_BODENV_4_5V" />
+      <value value="0x04" name="4.2" cname="_BORV_42" sdcc_cname="_BODENV_4_2V" />
+      <value value="0x08" name="2.7" cname="_BORV_27" sdcc_cname="_BODENV_2_7V" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" sdcc_cname="_BODENV_2_0V" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" sdcc_cname="_WDT_DISABLED_CONTROLLED" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  sdcc_cname="_WDT_ON" />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   sdcc_cname="_WDTPS_1_1" />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   sdcc_cname="_WDTPS_1_2" />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   sdcc_cname="_WDTPS_1_4" />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   sdcc_cname="_WDTPS_1_8" />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  sdcc_cname="_WDTPS_1_16" />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  sdcc_cname="_WDTPS_1_32" />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  sdcc_cname="_WDTPS_1_64" />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" sdcc_cname="_WDTPS_1_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" sdcc_cname="_WDTPS_1_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" sdcc_cname="_WDTPS_1_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1K"  sdcc_cname="_WDTPS_1_1024" />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2K"  sdcc_cname="_WDTPS_1_2048" />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4K"  sdcc_cname="_WDTPS_1_4096" />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8K"  sdcc_cname="_WDTPS_1_8192" />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16K" sdcc_cname="_WDTPS_1_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32K" sdcc_cname="_WDTPS_1_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x80" >
+    <mask name="MCLRE" value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" sdcc_cname="_MCLRE_MCLR_disabled_RA5_input_en" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  sdcc_cname="_MCLRE_MCLR_enabled_RA5_input_dis" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  sdcc_cname="_BACKBUG_ON" />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" sdcc_cname="_BACKBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:07FF" cname="_CP0_ON"  sdcc_cname="_CP_0_ON" />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" sdcc_cname="_CP_0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_CP1_ON"  sdcc_cname="_CP_1_ON" />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" sdcc_cname="_CP_1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:07FF" cname="_WRT0_ON"  sdcc_cname="_WRT_0_ON" />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" sdcc_cname="_WRT_0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_WRT1_ON"  sdcc_cname="_WRT_1_ON" />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" sdcc_cname="_WRT_1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:07FF" cname="_EBTR0_ON"  sdcc_cname="_EBTR_0_ON" />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" sdcc_cname="_EBTR_0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_EBTR1_ON"  sdcc_cname="_EBTR_1_ON" />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" sdcc_cname="_EBTR_1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F1230.xml b/src/devices/pic/xml_data/18F1230.xml
new file mode 100644
index 0000000..043687a
--- /dev/null
+++ b/src/devices/pic/xml_data/18F1230.xml
@@ -0,0 +1,311 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F1230" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x1E00" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="022956" datasheet="39758" progsheet="39752" erratas="80308" />
+
+<!--* Checksums ************************************************************-->
+<!--  <checksums>
+    <checksum protected_blocks="0"              bchecksum="0xF33E" cchecksum="0xF294" />
+    <checksum protected_blocks="1" bbsize="256" bchecksum="0xF2FE" cchecksum="0xF254" />
+    <checksum protected_blocks="1" bbsize="512" bchecksum="0xF30E" cchecksum="0xF264" />
+    <checksum protected_blocks="2"              bchecksum="0xF30D" cchecksum="0xF263" />
+    <checksum protected_blocks="3"              bchecksum="0xF31B" cchecksum="0xF271" />
+  </checksums>
+-->
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9.5" max="12.5" nominal="12" />
+  <voltages name="vdd_prog"       min="3"   max="5.5"  nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x000FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x00007F" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO2" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO1" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOR_OFF"        />
+      <value value="0x02" name="Software" cname="_BOR_SBORENCTRL" />
+      <value value="0x04" name="On_run"   cname="_BOR_BOACTIVE"   />
+      <value value="0x06" name="On"       cname="_BOR_BOHW"       />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x0E" >
+    <mask name="PWMPIN" value="0x02" >
+      <value value="0x00" name="On"  cname="_PWMPIN_ON"  />
+      <value value="0x02" name="Off" cname="_PWMPIN_OFF" />
+    </mask>
+    <mask name="LPOL"   value="0x04" >
+      <value value="0x00" name="low"  cname="_LPOL_LOW"  />
+      <value value="0x04" name="high" cname="_LPOL_HIGH" />
+    </mask>
+    <mask name="HPOL"   value="0x08" >
+      <value value="0x00" name="low"  cname="_HPOL_LOW"  />
+      <value value="0x08" name="high" cname="_HPOL_HIGH" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x81" >
+    <mask name="FLTAMX"  value="0x01" >
+      <value value="0x00" name="RA7" cname="_FLTAMX_RA7" />
+      <value value="0x01" name="RA5" cname="_FLTAMX_RA5" />
+    </mask>
+    <mask name="T1OSCMX" value="0x08" >
+      <value value="0x00" name="RB2" cname="_T1OSCMX_HIGH" />
+      <value value="0x08" name="RA6" cname="_T1OSCMX_LOW"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x81" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x30" >
+      <value value="0x00"    name="256" cname="_BBSIZ_BB256" />
+      <value value="default" name="512" cname="_BBSIZ_BB512" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200/0400:07FF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"            cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200/0400:07FF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"            cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200/0400:07FF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"            cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F1320.xml b/src/devices/pic/xml_data/18F1320.xml
new file mode 100644
index 0000000..d4dd214
--- /dev/null
+++ b/src/devices/pic/xml_data/18F1320.xml
@@ -0,0 +1,280 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F1320" document="010265" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x07C0" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0xE3EB" cchecksum="0xE341" />
+    <checksum protected_blocks="1" bchecksum="0xE5D5" cchecksum="0xE56C" />
+    <checksum protected_blocks="3" bchecksum="0x03D2" cchecksum="0x03BE" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x001FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0xCF" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"     />
+      <value value="0x01" name="XT"           cname="_XT_OSC"     />
+      <value value="0x02" name="HS"           cname="_HS_OSC"     />
+      <value value="0x03" name="invalid" />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"     />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"   />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"   />
+      <value value="0x08" name="INTRC_IO"     cname="_INTIO2_OSC" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_INTIO1_OSC" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FSCM_OFF" />
+      <value value="0x40" name="On"  cname="_FSCM_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1K"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2K"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4K"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8K"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16K" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32K" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x80" >
+    <mask name="MCLRE" value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:0FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:0FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:0FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F1330.xml b/src/devices/pic/xml_data/18F1330.xml
new file mode 100644
index 0000000..14130ce
--- /dev/null
+++ b/src/devices/pic/xml_data/18F1330.xml
@@ -0,0 +1,313 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F1330" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x1E20" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="022957" datasheet="39758" progsheet="39752" erratas="80308" />
+
+<!--* Checksums ************************************************************-->
+<!--  <checksums>
+    <checksum protected_blocks="0"               bchecksum="0xE33E" cchecksum="0xE294" />
+    <checksum protected_blocks="1" bbsize="256"  bchecksum="0xE2FE" cchecksum="0xE254" />
+    <checksum protected_blocks="1" bbsize="512"  bchecksum="0xE30E" cchecksum="0xE264" />
+    <checksum protected_blocks="1" bbsize="1024" bchecksum="0xE31E" cchecksum="0xE274" />
+    <checksum protected_blocks="2"               bchecksum="0xE31D" cchecksum="0xE273" />
+    <checksum protected_blocks="3"               bchecksum="0xF31B" cchecksum="0xE271" />
+  </checksums>
+-->
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9.5" max="12.5" nominal="12" />
+  <voltages name="vdd_prog"       min="3"   max="5.5"  nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"  nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x001FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x00007F" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO2" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO1" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOR_OFF"        />
+      <value value="0x02" name="Software" cname="_BOR_SBORENCTRL" />
+      <value value="0x04" name="On_run"   cname="_BOR_BOACTIVE"   />
+      <value value="0x06" name="On"       cname="_BOR_BOHW"       />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x0E" >
+    <mask name="PWMPIN" value="0x02" >
+      <value value="0x00" name="On"  cname="_PWMPIN_ON"  />
+      <value value="0x02" name="Off" cname="_PWMPIN_OFF" />
+    </mask>
+    <mask name="LPOL"   value="0x04" >
+      <value value="0x00" name="low"  cname="_LPOL_LOW"  />
+      <value value="0x04" name="high" cname="_LPOL_HIGH" />
+    </mask>
+    <mask name="HPOL"   value="0x08" >
+      <value value="0x00" name="low"  cname="_HPOL_LOW"  />
+      <value value="0x08" name="high" cname="_HPOL_HIGH" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x81" >
+    <mask name="FLTAMX"  value="0x01" >
+      <value value="0x00" name="RA7" cname="_FLTAMX_RA7" />
+      <value value="0x01" name="RA5" cname="_FLTAMX_RA5" />
+    </mask>
+    <mask name="T1OSCMX" value="0x08" >
+      <value value="0x00" name="RB2" cname="_T1OSCMX_HIGH" />
+      <value value="0x08" name="RA6" cname="_T1OSCMX_LOW"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x81" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x30" >
+      <value value="0x00" name="256"  cname="_BBSIZ_BB256" />
+      <value value="0x10" name="512"  cname="_BBSIZ_BB512" />
+      <value value="default" name="1024" cname="_BBSIZ_BB1K"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200/0400/0800:0FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"                 cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200/0400/0800:0FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"                 cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200/0400/0800:0FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"                 cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+  </package>
+
+  <package types="ssop"      nb_pins="20" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2220.xml b/src/devices/pic/xml_data/18F2220.xml
new file mode 100644
index 0000000..43f6fbc
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2220.xml
@@ -0,0 +1,244 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2220" document="010266" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0580" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0xF412" cchecksum="0xF368" />
+    <checksum protected_blocks="1" bchecksum="0xF5E8" cchecksum="0xF59D" />
+    <checksum protected_blocks="2" bchecksum="0xFBE7" cchecksum="0xFB9C" />
+    <checksum protected_blocks="3" bchecksum="0x03E5" cchecksum="0x03EF" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x000FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0xCF" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"     sdcc_cname="_OSC_LP" />
+      <value value="0x01" name="XT"           cname="_XT_OSC"     sdcc_cname="_OSC_XT" />
+      <value value="0x02" name="HS"           cname="_HS_OSC"     sdcc_cname="_OSC_HS" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_RC_OSC"  sdcc_cname="_OSC_EXT_CLKOUT_on_RA6" />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"     sdcc_cname="_OSC_EC_CLKOUT" />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"   sdcc_cname="_OSC_EC_PORT" />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC"  sdcc_cname="_OSC_HS_PLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"   sdcc_cname="_OSC_EXT_Port_on_RA6" />
+      <value value="0x08" name="INTRC_IO"     cname="_INTIO2_OSC" sdcc_cname="_OSC_INT_Port_on_RA6_Port_on_RA7" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_INTIO1_OSC" sdcc_cname="_OSC_INT_CLKOUT_on_RA6_Port_on_RA7" />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FSCM_OFF" sdcc_cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FSCM_ON"  sdcc_cname="_FCMEN_ON" />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  sdcc_cname="_PUT_ON" />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" sdcc_cname="_PUT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" sdcc_cname="_BODEN_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  sdcc_cname="_BODEN_ON" />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" sdcc_cname="_BODENV_4_5V" />
+      <value value="0x04" name="4.2" cname="_BORV_42" sdcc_cname="_BODENV_4_2V" />
+      <value value="0x08" name="2.7" cname="_BORV_27" sdcc_cname="_BODENV_2_7V" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" sdcc_cname="_BODENV_2_0V" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" sdcc_cname="_WDT_DISABLED_CONTROLLED" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  sdcc_cname="_WDT_ON" />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   sdcc_cname="_WDTPS_1_1" />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   sdcc_cname="_WDTPS_1_2" />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   sdcc_cname="_WDTPS_1_4" />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   sdcc_cname="_WDTPS_1_8" />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  sdcc_cname="_WDTPS_1_16" />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  sdcc_cname="_WDTPS_1_32" />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  sdcc_cname="_WDTPS_1_64" />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" sdcc_cname="_WDTPS_1_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" sdcc_cname="_WDTPS_1_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" sdcc_cname="_WDTPS_1_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1K"  sdcc_cname="_WDTPS_1_1024" />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2K"  sdcc_cname="_WDTPS_1_2048" />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4K"  sdcc_cname="_WDTPS_1_4096" />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8K"  sdcc_cname="_WDTPS_1_8192" />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16K" sdcc_cname="_WDTPS_1_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32K" sdcc_cname="_WDTPS_1_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_B3" ecnames="_CCP2MX_OFF" sdcc_cname="_CCP2MUX_RB3" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_C1" ecnames="_CCP2MX_ON"  sdcc_cname="_CCP2MUX_RC1" />
+    </mask>
+    <mask name="PBADEN" value="0x02" >
+      <value value="0x00" name="digital" cname="_PBAD_DIG" sdcc_cname="_PBADEN_PORTB_4_0__digital_I_O_on_REST" />
+      <value value="0x02" name="analog"  cname="_PBAD_ANA" sdcc_cname="_PBADEN_PORTB_4_0__analog_inputs_on_RSET" />
+    </mask>
+    <mask name="MCLRE"  value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" sdcc_cname="_MCLRE_MCLR_Disabled_RE3_Enabled" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  sdcc_cname="_MCLRE_MCLR_Enabled_RE3_Disabled" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  sdcc_cname="_BACKBUG_ON" />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" sdcc_cname="_BACKBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:07FF" cname="_CP0_ON"  sdcc_cname="_CP_0_ON" />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" sdcc_cname="_CP_0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_CP1_ON"  sdcc_cname="_CP_1_ON" />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" sdcc_cname="_CP_1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:07FF" cname="_WRT0_ON"  sdcc_cname="_WRT_0_ON" />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" sdcc_cname="_WRT_0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_WRT1_ON"  sdcc_cname="_WRT_1_ON" />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" sdcc_cname="_WRT_1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:07FF" cname="_EBTR0_ON"  sdcc_cname="_EBTR_0_ON" />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" sdcc_cname="_EBTR_0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_EBTR1_ON"  sdcc_cname="_EBTR_1_ON" />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" sdcc_cname="_EBTR_1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2221.xml b/src/devices/pic/xml_data/18F2221.xml
new file mode 100644
index 0000000..f2a58d6
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2221.xml
@@ -0,0 +1,281 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2221" document="024612" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x2160" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x000FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO2" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO1" />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOR_OFF"   />
+      <value value="0x02" name="Software" cname="_BOR_SOFT"  />
+      <value value="0x04" name="On_run"   cname="_BOR_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOR_ON"    />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x87" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_RB3" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_RC1" />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_DIG" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ANA" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" cmask="0x30" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x30" >
+      <value value="0x00" name="256" cname="_BBSIZ_BB256" />
+      <value value="default" name="512" cname="_BBSIZ_BB512" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="200/400:7FF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"         cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200/0400:07FF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"            cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200/0400:07FF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"            cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic ssop" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn"            nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2320.xml b/src/devices/pic/xml_data/18F2320.xml
new file mode 100644
index 0000000..80e8250
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2320.xml
@@ -0,0 +1,271 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2320" document="010267" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0500" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0xE412" cchecksum="0xE368" />
+    <checksum protected_blocks="1" bchecksum="0xE5E7" cchecksum="0xE59C" />
+    <checksum protected_blocks="2" bchecksum="0xEBE6" cchecksum="0xEB9B" />
+    <checksum protected_blocks="3" bchecksum="0xF3E4" cchecksum="0xF399" />
+    <checksum protected_blocks="4" bchecksum="0xFBE0" cchecksum="0xFB95" />
+    <checksum protected_blocks="5" bchecksum="0x03D8" cchecksum="0x03E2" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x001FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0xCF" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"     />
+      <value value="0x01" name="XT"           cname="_XT_OSC"     />
+      <value value="0x02" name="HS"           cname="_HS_OSC"     />
+      <value value="0x03" name="invalid" />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"     />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"   />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"   />
+      <value value="0x08" name="INTRC_IO"     cname="_INTIO2_OSC" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_INTIO1_OSC" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FSCM_OFF" />
+      <value value="0x40" name="On"  cname="_FSCM_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1K"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2K"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4K"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8K"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16K" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32K" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_B3" ecnames="_CCP2MX_OFF" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_C1" ecnames="_CCP2MX_ON"  />
+    </mask>
+    <mask name="PBADEN" value="0x02" >
+      <value value="0x00" name="digital" cname="_PBAD_DIG" />
+      <value value="0x02" name="analog"  cname="_PBAD_ANA" />
+    </mask>
+    <mask name="MCLRE"  value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:07FF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="1000:17FF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="1800:1FFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:07FF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="1000:17FF" cname="_WRT2_ON"  />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="1800:1FFF" cname="_WRT3_ON"  />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:07FF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="1000:17FF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="1800:1FFF" cname="_EBTR3_ON"  />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2321.xml b/src/devices/pic/xml_data/18F2321.xml
new file mode 100644
index 0000000..a016fc7
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2321.xml
@@ -0,0 +1,282 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2321" document="024609" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x2120" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x001FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO2" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO1" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOR_OFF"   />
+      <value value="0x02" name="Software" cname="_BOR_SOFT"  />
+      <value value="0x04" name="On_run"   cname="_BOR_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOR_ON"    />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x87" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_RB3" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_RC1" />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_DIG" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ANA" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" cmask="0x30" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x30" >
+      <value value="0x00" name="256"  cname="_BBSIZ_BB256" />
+      <value value="0x10" name="512"  cname="_BBSIZ_BB512" />
+      <value value="default" name="1024" cname="_BBSIZ_BB1K"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200/0400/0800:0FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"                 cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200/0400/0800:0FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"                 cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200/0400/0800:0FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"                 cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic ssop" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn"            nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2331.xml b/src/devices/pic/xml_data/18F2331.xml
new file mode 100644
index 0000000..46a8872
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2331.xml
@@ -0,0 +1,256 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2331" document="010268" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x08E0" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0xE464" cchecksum="0xE3BA" />
+    <checksum protected_blocks="1" bchecksum="0xE640" cchecksum="0xE5F5" />
+    <checksum protected_blocks="3" bchecksum="0x043D" cchecksum="0x0447" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x001FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0xCF" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"    />
+      <value value="0x01" name="XT"           cname="_OSC_XT"    />
+      <value value="0x02" name="HS"           cname="_OSC_HS"    />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"    />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"  />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"  />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_IRCIO" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_IRC"   />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"    />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRTEN_ON"  />
+      <value value="0x01" name="Off" cname="_PWRTEN_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOREN_OFF" />
+      <value value="0x02" name="On"  cname="_BOREN_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x3F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDTEN_OFF" />
+      <value value="0x01" name="On"  cname="_WDTEN_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDPS_32768" />
+    </mask>
+    <mask name="WINEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_WINEN_ON"  />
+      <value value="0x20" name="Off" cname="_WINEN_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x3C" >
+    <mask name="PWMPIN"  value="0x04" >
+      <value value="0x00" name="On"  cname="_PWMPIN_ON"  />
+      <value value="0x04" name="Off" cname="_PWMPIN_OFF" />
+    </mask>
+    <mask name="LPOL"    value="0x08" >
+      <value value="0x00" name="low"  cname="_LPOL_LOW"  />
+      <value value="0x08" name="high" cname="_LPOL_HIGH" />
+    </mask>
+    <mask name="HPOL"    value="0x10" >
+      <value value="0x00" name="low"  cname="_HPOL_LOW"  />
+      <value value="0x10" name="high" cname="_HPOL_HIGH" />
+    </mask>
+    <mask name="T1OSCMX" value="0x20" >
+      <value value="0x00" name="Legacy"    cname="_T1OSCMX_OFF" />
+      <value value="0x20" name="Low Power" cname="_T1OSCMX_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x9D" >
+    <mask name="MCLRE" value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:0FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:0FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:0FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2410.xml b/src/devices/pic/xml_data/18F2410.xml
new file mode 100644
index 0000000..15d6179
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2410.xml
@@ -0,0 +1,268 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2410" document="020415" status="IP" memory_technology="FLASH" self_write="no" architecture="18F" id="0x1160" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FFF" word_write_align="16" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"      />
+      <value value="0x01" name="XT"           cname="_OSC_XT"      />
+      <value value="0x02" name="HS"           cname="_OSC_HS"      />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"      />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"   />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7"  />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"     />
+      <value value="0x02" name="Software" cname="_BOREN_ON"      />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP"   />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC"  />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x40" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x60" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F242.xml b/src/devices/pic/xml_data/18F242.xml
new file mode 100644
index 0000000..d09dd83
--- /dev/null
+++ b/src/devices/pic/xml_data/18F242.xml
@@ -0,0 +1,221 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F242" document="010269" status="NR" alternative="18F2420" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0480" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0xC2B4" cchecksum="0xC20A" />
+    <checksum protected_blocks="1" bchecksum="0xC491" cchecksum="0xC437" />
+    <checksum protected_blocks="3" bchecksum="0x028E" cchecksum="0x0289" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC"   value="0x07" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"    sdcc_cname="_OSC_LP" />
+      <value value="0x01" name="XT"           cname="_XT_OSC"    sdcc_cname="_OSC_XT" />
+      <value value="0x02" name="HS"           cname="_HS_OSC"    sdcc_cname="_OSC_HS" />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC"    sdcc_cname="_OSC_RC" />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"    sdcc_cname="_OSC_EC_OSC2_Clock_Out" />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"  sdcc_cname="_OSC_EC_OSC2_RA6" />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC" sdcc_cname="_OSC_HS_PLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"  sdcc_cname="_OSC_RC_OSC2" />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON"  />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  sdcc_cname="_PUT_ON" />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" sdcc_cname="_PUT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" sdcc_cname="_BODEN_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  sdcc_cname="_BODEN_ON" />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" sdcc_cname="_BODENV_4_5V" />
+      <value value="0x04" name="4.2" cname="_BORV_42" sdcc_cname="_BODENV_4_2V" />
+      <value value="0x08" name="2.7" cname="_BORV_27" sdcc_cname="_BODENV_2_7V" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" sdcc_cname="_BODENV_2_0V" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   sdcc_cname="_WDTPS_1_1" />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   sdcc_cname="_WDTPS_1_2" />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   sdcc_cname="_WDTPS_1_4" />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   sdcc_cname="_WDTPS_1_8" />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  sdcc_cname="_WDTPS_1_16" />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  sdcc_cname="_WDTPS_1_32" />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  sdcc_cname="_WDTPS_1_64" />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" sdcc_cname="_WDTPS_1_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_OFF" sdcc_cname="_CCP2MUX_RB3" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_ON"  sdcc_cname="_CCP2MUX_RC1" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  sdcc_cname="_BACKBUG_ON" />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" sdcc_cname="_BACKBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" icnames="_CP2_OFF _CP2_ON _CP3_OFF _CP3_ON"         >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_CP0_ON"  sdcc_cname="_CP_0_ON" />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" sdcc_cname="_CP_0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  sdcc_cname="_CP_1_ON" />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" sdcc_cname="_CP_1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" icnames="_WRT2_OFF _WRT2_ON _WRT3_OFF _WRT3_ON"     >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_WRT0_ON"  sdcc_cname="_WRT_0_ON" />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" sdcc_cname="_WRT_0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  sdcc_cname="_WRT_1_ON" />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" sdcc_cname="_WRT_1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" icnames="_EBTR2_OFF _EBTR2_ON _EBTR3_OFF _EBTR3_ON" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_EBTR0_ON"  sdcc_cname="_EBTR_0_ON" />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" sdcc_cname="_EBTR_0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  sdcc_cname="_EBTR_1_ON" />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" sdcc_cname="_EBTR_1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2420.xml b/src/devices/pic/xml_data/18F2420.xml
new file mode 100644
index 0000000..aba9ace
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2420.xml
@@ -0,0 +1,277 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2420" document="010270" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x1140" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FFF" word_write_align="16" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"      />
+      <value value="0x01" name="XT"           cname="_OSC_XT"      />
+      <value value="0x02" name="HS"           cname="_OSC_HS"      />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"      />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"   />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7"  />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"     />
+      <value value="0x02" name="Software" cname="_BOREN_ON"      />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP"   />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC"  />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" cmask="0x80" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" cmask="0x80" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2423.xml b/src/devices/pic/xml_data/18F2423.xml
new file mode 100644
index 0000000..0905f18
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2423.xml
@@ -0,0 +1,274 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2423" document="026428" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x1150" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="12.5"  nominal="9" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FFF" word_write_align="16" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"      />
+      <value value="0x01" name="XT"           cname="_OSC_XT"      />
+      <value value="0x02" name="HS"           cname="_OSC_HS"      />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"      />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"   />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7"  />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"     />
+      <value value="0x02" name="Software" cname="_BOREN_ON"      />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP"   />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC"  />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" cmask="0x80" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" cmask="0x80" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2431.xml b/src/devices/pic/xml_data/18F2431.xml
new file mode 100644
index 0000000..f898f99
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2431.xml
@@ -0,0 +1,257 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2431" document="010271" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x08C0" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0xC488" cchecksum="0xC3DE" />
+    <checksum protected_blocks="1" bchecksum="0xC668" cchecksum="0xC61D" />
+    <checksum protected_blocks="2" bchecksum="0xE465" cchecksum="0xE41A" />
+    <checksum protected_blocks="3" bchecksum="0x0459" cchecksum="0x0463" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0xCF" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"    />
+      <value value="0x01" name="XT"           cname="_OSC_XT"    />
+      <value value="0x02" name="HS"           cname="_OSC_HS"    />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"    />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"  />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"  />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_IRCIO" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_IRC"   />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"    />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRTEN_ON"  />
+      <value value="0x01" name="Off" cname="_PWRTEN_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOREN_OFF" />
+      <value value="0x02" name="On"  cname="_BOREN_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x3F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDTEN_OFF" />
+      <value value="0x01" name="On"  cname="_WDTEN_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDPS_32768" />
+    </mask>
+    <mask name="WINEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_WINEN_ON"  />
+      <value value="0x20" name="Off" cname="_WINEN_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x3C" >
+    <mask name="PWMPIN"  value="0x04" >
+      <value value="0x00" name="On"  cname="_PWMPIN_ON"  />
+      <value value="0x04" name="Off" cname="_PWMPIN_OFF" />
+    </mask>
+    <mask name="LPOL"    value="0x08" >
+      <value value="0x00" name="low"  cname="_LPOL_LOW"  />
+      <value value="0x08" name="high" cname="_LPOL_HIGH" />
+    </mask>
+    <mask name="HPOL"    value="0x10" >
+      <value value="0x00" name="low"  cname="_HPOL_LOW"  />
+      <value value="0x10" name="high" cname="_HPOL_HIGH" />
+    </mask>
+    <mask name="T1OSCMX" value="0x20" >
+      <value value="0x00" name="Legacy"    cname="_T1OSCMX_OFF" />
+      <value value="0x20" name="Low Power" cname="_T1OSCMX_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x9D" >
+    <mask name="MCLRE" value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:0FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:0FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:0FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2439.xml b/src/devices/pic/xml_data/18F2439.xml
new file mode 100644
index 0000000..ad389e3
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2439.xml
@@ -0,0 +1,210 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2439" document="010272" status="NR" alternative="18F2431" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0480" >
+
+<!--* Checksums ************************************************************-->
+<!--  <checksums>
+    <checksum protected_blocks="0" bchecksum="0xC2BF" cchecksum="0xC215" />
+    <checksum protected_blocks="1" bchecksum="0xC4A5" cchecksum="0xC43C" />
+    <checksum protected_blocks="2" bchecksum="0xE2A2" cchecksum="0xE239" />
+    <checksum protected_blocks="3" bchecksum="0x029E" cchecksum="0x028A" />
+  </checksums>
+-->
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC" value="0x07" >
+      <value value="default" name="invalid" />
+      <value value="0x02" name="HS"        cname="_OSC_HS"    />
+      <value value="0x04" name="EC_CLKOUT" cname="_OSC_EC"    />
+      <value value="0x05" name="EC_IO"     cname="_OSC_ECIO"  />
+      <value value="0x06" name="H4"        cname="_OSC_HSPLL" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.5" cname="_BORV_25" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x07" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x07" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2450.xml b/src/devices/pic/xml_data/18F2450.xml
new file mode 100644
index 0000000..2388a92
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2450.xml
@@ -0,0 +1,299 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2450" document="023497" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x2420" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FFF" word_write_align="8" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x07" cmask="0x00" >
+    <mask name="PLLDIV" value="0x07" >
+      <value value="0x00" name="1"  cname="_PLLDIV_1"  />
+      <value value="0x01" name="2"  cname="_PLLDIV_2"  />
+      <value value="0x02" name="3"  cname="_PLLDIV_3"  />
+      <value value="0x03" name="4"  cname="_PLLDIV_4"  />
+      <value value="0x04" name="5"  cname="_PLLDIV_5"  />
+      <value value="0x05" name="6"  cname="_PLLDIV_6"  />
+      <value value="0x06" name="10" cname="_PLLDIV_10" />
+      <value value="0x07" name="12" cname="_PLLDIV_12" />
+    </mask>
+    <mask name="CPUDIV" value="0x18" >
+      <value value="0x00" name="1" cname="_CPUDIV_OSC1_PLL2" />
+      <value value="0x08" name="2" cname="_CPUDIV_OSC2_PLL3" />
+      <value value="0x10" name="3" cname="_CPUDIV_OSC3_PLL4" />
+      <value value="0x18" name="4" cname="_CPUDIV_OSC4_PLL6" />
+    </mask>
+    <mask name="USBDIV" value="0x20" >
+      <value value="0x00" name="1" cname="_USBDIV_1" />
+      <value value="0x20" name="2" cname="_USBDIV_2" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" cmask="0x00" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="XT"           cname="_FOSC_XT_XT"       />
+      <value value="0x01" name="XT"           cname="_FOSC_XT_XT"       />
+      <value value="0x02" name="XTPLL"        cname="_FOSC_XTPLL"       />
+      <value value="0x03" name="XTPLL"        cname="_FOSC_XTPLL_XT"    />
+      <value value="0x04" name="EC_IO"        cname="_FOSC_ECIO_EC"     />
+      <value value="0x05" name="EC_CLKOUT"    cname="_FOSC_EC_EC"       />
+      <value value="0x06" name="ECPLL_IO"     cname="_FOSC_ECPLLIO_EC"  />
+      <value value="0x07" name="ECPLL_CLKOUT" cname="_FOSC_ECPLL_EC"    />
+      <value value="0x08" name="INTRC_IO"     cname="_FOSC_INTOSCIO_EC" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_FOSC_INTOSC_EC"   />
+      <value value="0x0A" name="INTXT"        cname="_FOSC_INTOSC_XT"   />
+      <value value="0x0B" name="INTHS"        cname="_FOSC_INTOSC_HS"   />
+      <value value="0x0C" name="HS"           cname="_FOSC_HS"          />
+      <value value="0x0D" name="HS"           cname="_FOSC_HS"          />
+      <value value="0x0E" name="HSPLL"        cname="_FOSC_HSPLL_HS"    />
+      <value value="0x0F" name="HSPLL"        cname="_FOSC_HSPLL_HS"    />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE"  value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN"  value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOR_OFF"       />
+      <value value="0x02" name="Software" cname="_BOR_SOFT"      />
+      <value value="0x04" name="On_run"   cname="_BOR_ON_ACTIVE" />
+      <value value="0x06" name="On"       cname="_BOR_ON"        />
+    </mask>
+    <mask name="BORV"   value="0x18" >
+      <value value="0x00" name="4.6" cname="_BORV_46" />
+      <value value="0x08" name="4.3" cname="_BORV_43" />
+      <value value="0x10" name="2.8" cname="_BORV_28" />
+      <value value="0x18" name="2.1" cname="_BORV_21" />
+    </mask>
+    <mask name="VREGEN" value="0x20" >
+      <value value="0x00" name="Off" cname="_VREGEN_OFF" />
+      <value value="0x20" name="On"  cname="_VREGEN_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x82" cmask="0x00" >
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" cmask="0x08" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x08" >
+      <value value="0x00" name="1024" cname="_BBSIZ_BB1K" />
+      <value value="0x08" name="2048" cname="_BBSIZ_BB2K" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800/1000:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"            cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x40" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800/1000:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"            cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x60" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800/1000:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"            cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2455.xml b/src/devices/pic/xml_data/18F2455.xml
new file mode 100644
index 0000000..7097218
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2455.xml
@@ -0,0 +1,288 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2455" document="010273" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x1260" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="48" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0"  end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4"  end="16" vdd_min="3" vdd_max="5.5" />
+    <frequency start="16" end="25"  vdd_min="4" vdd_max="5.5" />
+    <frequency start="25"  end="48" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x005FFF" word_write_align="16" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" >
+    <mask name="PLLDIV" value="0x07" >
+      <value value="0x00" name="1"  cname="_PLLDIV_1"  sdcc_cname="_PLLDIV_NO_DIVIDE__4MHZ_INPUT_" />
+      <value value="0x01" name="2"  cname="_PLLDIV_2"  sdcc_cname="_PLLDIV_DIVIDE_BY_2__8MHZ_INPUT_" />
+      <value value="0x02" name="3"  cname="_PLLDIV_3"  sdcc_cname="_PLLDIV_DIVIDE_BY_3__12MHZ_INPUT_" />
+      <value value="0x03" name="4"  cname="_PLLDIV_4"  sdcc_cname="_PLLDIV_DIVIDE_BY_4__16MHZ_INPUT_" />
+      <value value="0x04" name="5"  cname="_PLLDIV_5"  sdcc_cname="_PLLDIV_DIVIDE_BY_5__20MHZ_INPUT_" />
+      <value value="0x05" name="6"  cname="_PLLDIV_6"  sdcc_cname="_PLLDIV_DIVIDE_BY_6__24MHZ_INPUT_" />
+      <value value="0x06" name="10" cname="_PLLDIV_10" sdcc_cname="_PLLDIV_DIVIDE_BY_10__40MHZ_INPUT_" />
+      <value value="0x07" name="12" cname="_PLLDIV_12" sdcc_cname="_PLLDIV_DIVIDE_BY_12__48MHZ_INPUT_" />
+    </mask>
+    <mask name="CPUDIV" value="0x18" >
+      <value value="0x00" name="1" cname="_CPUDIV_OSC1_PLL2" sdcc_cname="_CPUDIV__OSC1_OSC2_SRC___1__96MHZ_PLL_SRC___2_" />
+      <value value="0x08" name="2" cname="_CPUDIV_OSC2_PLL3" sdcc_cname="_CPUDIV__OSC1_OSC2_SRC___2__96MHZ_PLL_SRC___3_" />
+      <value value="0x10" name="3" cname="_CPUDIV_OSC3_PLL4" sdcc_cname="_CPUDIV__OSC1_OSC2_SRC___3__96MHZ_PLL_SRC___4_" />
+      <value value="0x18" name="4" cname="_CPUDIV_OSC4_PLL6" sdcc_cname="_CPUDIV__OSC1_OSC2_SRC___4__96MHZ_PLL_SRC___6_" />
+    </mask>
+    <mask name="USBDIV" value="0x20" >
+      <value value="0x00" name="1" cname="_USBDIV_1" sdcc_cname="_USBPLL_CLOCK_SRC_FROM_OSC1_OSC2" />
+      <value value="0x20" name="2" cname="_USBDIV_2" sdcc_cname="_USBPLL_CLOCK_SRC_FROM_96MHZ_PLL_2" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x05" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="XT"           cname="_FOSC_XT_XT"       sdcc_cname="_OSC_XT__USB_XT" />
+      <value value="0x01" name="XT"           cname="_FOSC_XT_XT"       sdcc_cname="_OSC_XT__USB_XT" />
+      <value value="0x02" name="XTPLL"        cname="_FOSC_XTPLL"       sdcc_cname="_OSC_XT__XT_PLL__USB_XT" />
+      <value value="0x03" name="XTPLL"        cname="_FOSC_XTPLL_XT"    sdcc_cname="_OSC_XT__XT_PLL__USB_XT" />
+      <value value="0x04" name="EC_IO"        cname="_FOSC_ECIO_EC"     sdcc_cname="_OSC_EC__EC_RA6__USB_EC" />
+      <value value="0x05" name="EC_CLKOUT"    cname="_FOSC_EC_EC"       sdcc_cname="_OSC_EC__EC_CLKO_RA6___USB_EC" />
+      <value value="0x06" name="ECPLL_IO"     cname="_FOSC_ECPLLIO_EC"  sdcc_cname="_OSC_EC__EC_PLL__EC_PLL_RA6__USB_EC" />
+      <value value="0x07" name="ECPLL_CLKOUT" cname="_FOSC_ECPLL_EC"    sdcc_cname="_OSC_EC__EC_PLL__EC_PLL_CLKO_RA6___USB_EC" />
+      <value value="0x08" name="INTRC_IO"     cname="_FOSC_INTOSCIO_EC" sdcc_cname="_OSC_INTOSC__INTOSC_RA6__USB_EC" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_FOSC_INTOSC_EC"   sdcc_cname="_OSC_INTOSC__INTOSC_CLK0_RA6___USB_EC" />
+      <value value="0x0A" name="INTXT"        cname="_FOSC_INTOSC_XT"   sdcc_cname="_OSC_INTOSC__USB_XT" />
+      <value value="0x0B" name="INTHS"        cname="_FOSC_INTOSC_HS"   sdcc_cname="_OSC_INTOSC__USB_HS" />
+      <value value="0x0C" name="HS"           cname="_FOSC_HS"          sdcc_cname="_OSC_HS__USB_HS" />
+      <value value="0x0D" name="HS"           cname="_FOSC_HS"          sdcc_cname="_OSC_HS__USB_HS" />
+      <value value="0x0E" name="HSPLL"        cname="_FOSC_HSPLL_HS"    sdcc_cname="_OSC_HS__HS_PLL__USB_HS" />
+      <value value="0x0F" name="HSPLL"        cname="_FOSC_HSPLL_HS"    sdcc_cname="_OSC_HS__HS_PLL__USB_HS" />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEM_OFF" sdcc_cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEM_ON"  sdcc_cname="_FCMEN_ON" />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" cmask="0x18" >
+    <mask name="PWRTE"  value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  sdcc_cname="_PUT_ON" />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" sdcc_cname="_PUT_OFF" />
+    </mask>
+    <mask name="BODEN"  value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOR_OFF"       sdcc_cname="_BODEN_OFF" />
+      <value value="0x02" name="Software" cname="_BOR_SOFT"      sdcc_cname="_BODEN_CONTROLLED_WITH_SBOREN_BIT" />
+      <value value="0x04" name="On_run"   cname="_BOR_ON_ACTIVE" sdcc_cname="_BODEN_ON_WHILE_ACTIVE" />
+      <value value="0x06" name="On"       cname="_BOR_ON"        sdcc_cname="_BODEN_ON" />
+    </mask>
+    <mask name="BORV"   value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" sdcc_cname="_BODENV_4_5V" />
+      <value value="0x08" name="4.2" cname="_BORV_1" sdcc_cname="_BODENV_4_2V" />
+      <value value="0x10" name="2.7" cname="_BORV_2" sdcc_cname="_BODENV_2_7V" />
+      <value value="0x18" name="2.0" cname="_BORV_3" sdcc_cname="_BODENV_2_0V" />
+    </mask>
+    <mask name="VREGEN" value="0x20" >
+      <value value="0x00" name="Off" cname="_VREGEN_OFF" />
+      <value value="0x20" name="On"  cname="_VREGEN_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" sdcc_cname="_WDT_DISABLED_CONTROLLED" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  sdcc_cname="_WDT_ON" />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     sdcc_cname="_WDTPS_1_1" />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     sdcc_cname="_WDTPS_1_2" />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     sdcc_cname="_WDTPS_1_4" />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     sdcc_cname="_WDTPS_1_8" />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    sdcc_cname="_WDTPS_1_16" />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    sdcc_cname="_WDTPS_1_32" />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    sdcc_cname="_WDTPS_1_64" />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   sdcc_cname="_WDTPS_1_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   sdcc_cname="_WDTPS_1_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   sdcc_cname="_WDTPS_1_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  sdcc_cname="_WDTPS_1_1024" />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  sdcc_cname="_WDTPS_1_2048" />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  sdcc_cname="_WDTPS_1_4096" />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  sdcc_cname="_WDTPS_1_8192" />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" sdcc_cname="_WDTPS_1_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" sdcc_cname="_WDTPS_1_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_OFF" sdcc_cname="_CCP2MUX_RB3" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_ON"  sdcc_cname="_CCP2MUX_RC1" />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" sdcc_cname="_PBADEN_PORTB_4_0__CONFIGURED_AS_DIGITAL_I_O_ON_RESET" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  sdcc_cname="_PBADEN_PORTB_4_0__CONFIGURED_AS_ANALOG_INPUTS_ON_RESET" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" sdcc_cname="_MCLRE_MCLR_OFF_RE3_ON" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  sdcc_cname="_MCLRE_MCLR_ON_RE3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xDF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" sdcc_cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  sdcc_cname="_STVR_ON" />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" sdcc_cname="_ENHCPU_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  sdcc_cname="_ENHCPU_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  sdcc_cname="_BACKBUG_ON" />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" sdcc_cname="_BACKBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x07" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_CP0_ON"  sdcc_cname="_CP_0_ON" />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" sdcc_cname="_CP_0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  sdcc_cname="_CP_1_ON" />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" sdcc_cname="_CP_1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_CP2_ON"  sdcc_cname="_CP_2_ON" />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" sdcc_cname="_CP_2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_WRT0_ON"  sdcc_cname="_WRT_0_ON" />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" sdcc_cname="_WRT_0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  sdcc_cname="_WRT_1_ON" />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" sdcc_cname="_WRT_1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_WRT2_ON"  sdcc_cname="_WRT_2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" sdcc_cname="_WRT_2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" cmask="0xC0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x07" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_EBTR0_ON"  sdcc_cname="_EBTR_0_ON" />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" sdcc_cname="_EBTR_0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  sdcc_cname="_EBTR_1_ON" />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" sdcc_cname="_EBTR_1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_EBTR2_ON"  sdcc_cname="_EBTR_2_ON" />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" sdcc_cname="_EBTR_2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F248.xml b/src/devices/pic/xml_data/18F248.xml
new file mode 100644
index 0000000..973ba90
--- /dev/null
+++ b/src/devices/pic/xml_data/18F248.xml
@@ -0,0 +1,216 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F248" document="010274" status="NR" alternative="18F2480" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0800" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0xC2B3" cchecksum="0xC209" />
+    <checksum protected_blocks="1" bchecksum="0xC48F" cchecksum="0xC435" />
+    <checksum protected_blocks="3" bchecksum="0x028C" cchecksum="0x0287" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC"   value="0x07" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"    sdcc_cname="_OSC_LP" />
+      <value value="0x01" name="XT"           cname="_XT_OSC"    sdcc_cname="_OSC_XT" />
+      <value value="0x02" name="HS"           cname="_HS_OSC"    sdcc_cname="_OSC_HS" />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC"    sdcc_cname="_OSC_RC" />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"    sdcc_cname="_OSC_EC_OSC2_Clock_Out" />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"  sdcc_cname="_OSC_EC_OSC2_RA6" />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC" sdcc_cname="_OSC_HS_PLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"  sdcc_cname="_OSC_RC_OSC2" />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON"  />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  sdcc_cname="_PUT_ON" />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" sdcc_cname="_PUT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" sdcc_cname="_BODEN_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  sdcc_cname="_BODEN_ON" />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" sdcc_cname="_BODENV_4_5V" />
+      <value value="0x04" name="4.2" cname="_BORV_42" sdcc_cname="_BODENV_4_2V" />
+      <value value="0x08" name="2.7" cname="_BORV_27" sdcc_cname="_BODENV_2_7V" />
+      <value value="0x0C" name="2.0" cname="_BORV_25" sdcc_cname="_BODENV_2_0V" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   sdcc_cname="_WDTPS_1_1" />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   sdcc_cname="_WDTPS_1_2" />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   sdcc_cname="_WDTPS_1_4" />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   sdcc_cname="_WDTPS_1_8" />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  sdcc_cname="_WDTPS_1_16" />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  sdcc_cname="_WDTPS_1_32" />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  sdcc_cname="_WDTPS_1_64" />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" sdcc_cname="_WDTPS_1_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  sdcc_cname="_BACKBUG_ON" />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" sdcc_cname="_BACKBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_CP0_ON"  sdcc_cname="_CP_0_ON" />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" sdcc_cname="_CP_0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  sdcc_cname="_CP_1_ON" />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" sdcc_cname="_CP_1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_WRT0_ON"  sdcc_cname="_WRT_0_ON" />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" sdcc_cname="_WRT_0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  sdcc_cname="_WRT_1_ON" />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" sdcc_cname="_WRT_1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_EBTR0_ON"  sdcc_cname="_EBTR_0_ON" />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" sdcc_cname="_EBTR_0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  sdcc_cname="_EBTR_1_ON" />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" sdcc_cname="_EBTR_1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2480.xml b/src/devices/pic/xml_data/18F2480.xml
new file mode 100644
index 0000000..7f8929b
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2480.xml
@@ -0,0 +1,283 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2480" document="010612" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x1AE0" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FFF" word_write_align="16" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" cmask="0x0F" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"      />
+      <value value="0x01" name="XT"           cname="_OSC_XT"      />
+      <value value="0x02" name="HS"           cname="_OSC_HS"      />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"      />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"    />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"   />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"    />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_IRCIO67"  />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_IRCIO7"  />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" cmask="0x06" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"        />
+      <value value="0x02" name="Software" cname="_BOREN_SBORENCTRL" />
+      <value value="0x04" name="On_run"   cname="_BOREN_BOACTIVE"   />
+      <value value="0x06" name="On"       cname="_BOREN_BOHW"       />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x82" cmask="0x02" >
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" cmask="0x10" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x10" >
+      <value value="0x00" name="1024" cname="_BBSIZ_1024" />
+      <value value="0x10" name="2048" cname="_BBSIZ_2048" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800/1000:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"            cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800/1000:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"            cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800/1000:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"            cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F24J10.xml b/src/devices/pic/xml_data/18F24J10.xml
new file mode 100644
index 0000000..c4ae257
--- /dev/null
+++ b/src/devices/pic/xml_data/18F24J10.xml
@@ -0,0 +1,182 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek                                   *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F24J10" status="IP" memory_technology="FLASH" architecture="18J" id="0x1D00" id_low_power="0x1D40">
+
+<!--* Documents ************************************************************-->
+  <documents webpage="024621" datasheet="39682" progsheet="39687" erratas="80265 80269" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="2.7" vdd_max="3.6" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="2.7" />
+    <frequency start="4" end="40" vdd_min="2.35" vdd_max="2.7" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="2.7"   max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="2.7"   max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="2.7"   max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FF7" word_write_align="32" word_erase_align="512" />
+  <memory name="config"    start="0x003FF8" end="0x003FFF" />
+  <memory name="device_id" start="0x3FFFFE" end="0x3FFFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0x7F" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x07" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0xFF" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0xF8" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F2510.xml b/src/devices/pic/xml_data/18F2510.xml
new file mode 100644
index 0000000..1950de1
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2510.xml
@@ -0,0 +1,298 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2510" document="010416" status="IP" memory_technology="FLASH" self_write="no" architecture="18F" id="0x1120" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x007FFF" word_write_align="16" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"      />
+      <value value="0x01" name="XT"           cname="_OSC_XT"      />
+      <value value="0x02" name="HS"           cname="_OSC_HS"      />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"      />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"   />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7"  />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"     />
+      <value value="0x02" name="Software" cname="_BOREN_ON"      />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP"   />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC"  />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x40" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_WRT2_ON"  />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_WRT3_ON"  />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x60" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_EBTR3_ON"  />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2515.xml b/src/devices/pic/xml_data/18F2515.xml
new file mode 100644
index 0000000..89960ae
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2515.xml
@@ -0,0 +1,255 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2515" document="010275" status="IP" memory_technology="FLASH" self_write="no" architecture="18F" id="0x0CE0" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00BFFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"      />
+      <value value="0x01" name="XT"           cname="_OSC_XT"      />
+      <value value="0x02" name="HS"           cname="_OSC_HS"      />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"      />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"   />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7"  />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"     />
+      <value value="0x02" name="Software" cname="_BOREN_ON"      />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP"   />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC"  />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x07" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x40" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON"  />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x60" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x07" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F252.xml b/src/devices/pic/xml_data/18F252.xml
new file mode 100644
index 0000000..b1d4153
--- /dev/null
+++ b/src/devices/pic/xml_data/18F252.xml
@@ -0,0 +1,246 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F252" document="010276" status="NR" alternative="18F2520" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0400" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0x82D8" cchecksum="0x822E" />
+    <checksum protected_blocks="1" bchecksum="0x84B7" cchecksum="0x845D" />
+    <checksum protected_blocks="3" bchecksum="0xC2B4" cchecksum="0xC25A" />
+    <checksum protected_blocks="5" bchecksum="0x02A8" cchecksum="0x02A3" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x007FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC"   value="0x07" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"    sdcc_cname="_OSC_LP" />
+      <value value="0x01" name="XT"           cname="_XT_OSC"    sdcc_cname="_OSC_XT" />
+      <value value="0x02" name="HS"           cname="_HS_OSC"    sdcc_cname="_OSC_HS" />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC"    sdcc_cname="_OSC_RC" />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"    sdcc_cname="_OSC_EC_OSC2_Clock_Out" />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"  sdcc_cname="_OSC_EC_OSC2_RA6" />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC" sdcc_cname="_OSC_HS_PLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"  sdcc_cname="_OSC_RC_OSC2" />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON"  />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  sdcc_cname="_PUT_ON" />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" sdcc_cname="_PUT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" sdcc_cname="_BODEN_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  sdcc_cname="_BODEN_ON" />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" sdcc_cname="_BODENV_4_5V" />
+      <value value="0x04" name="4.2" cname="_BORV_42" sdcc_cname="_BODENV_4_2V" />
+      <value value="0x08" name="2.7" cname="_BORV_27" sdcc_cname="_BODENV_2_7V" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" sdcc_cname="_BODENV_2_0V" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   sdcc_cname="_WDTPS_1_1" />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   sdcc_cname="_WDTPS_1_2" />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   sdcc_cname="_WDTPS_1_4" />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   sdcc_cname="_WDTPS_1_8" />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  sdcc_cname="_WDTPS_1_16" />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  sdcc_cname="_WDTPS_1_32" />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  sdcc_cname="_WDTPS_1_64" />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" sdcc_cname="_WDTPS_1_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_OFF" sdcc_cname="_CCP2MUX_RB3" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_ON"  sdcc_cname="_CCP2MUX_RC1" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  sdcc_cname="_BACKBUG_ON" />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" sdcc_cname="_BACKBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_CP0_ON"  sdcc_cname="_CP_0_ON" />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" sdcc_cname="_CP_0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  sdcc_cname="_CP_1_ON" />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" sdcc_cname="_CP_1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_CP2_ON"  sdcc_cname="_CP_2_ON" />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" sdcc_cname="_CP_2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_CP3_ON"  sdcc_cname="_CP_3_ON" />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" sdcc_cname="_CP_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_WRT0_ON"  sdcc_cname="_WRT_0_ON" />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" sdcc_cname="_WRT_0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  sdcc_cname="_WRT_1_ON" />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" sdcc_cname="_WRT_1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_WRT2_ON"  sdcc_cname="_WRT_2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" sdcc_cname="_WRT_2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_WRT3_ON"  sdcc_cname="_WRT_3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" sdcc_cname="_WRT_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_EBTR0_ON"  sdcc_cname="_EBTR_0_ON" />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" sdcc_cname="_EBTR_0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  sdcc_cname="_EBTR_1_ON" />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" sdcc_cname="_EBTR_1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_EBTR2_ON"  sdcc_cname="_EBTR_2_ON" />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" sdcc_cname="_EBTR_2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_EBTR3_ON"  sdcc_cname="_EBTR_3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" sdcc_cname="_EBTR_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2520.xml b/src/devices/pic/xml_data/18F2520.xml
new file mode 100644
index 0000000..3c77df0
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2520.xml
@@ -0,0 +1,307 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2520" document="010277" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x1100" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x007FFF" word_write_align="16" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"      />
+      <value value="0x01" name="XT"           cname="_OSC_XT"      />
+      <value value="0x02" name="HS"           cname="_OSC_HS"      />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"      />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"   />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7"  />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"     />
+      <value value="0x02" name="Software" cname="_BOREN_ON"      />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP"   />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC"  />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" cmask="0x80" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_WRT2_ON"  />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_WRT3_ON"  />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" cmask="0x80" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_EBTR3_ON"  />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2523.xml b/src/devices/pic/xml_data/18F2523.xml
new file mode 100644
index 0000000..6a92c8d
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2523.xml
@@ -0,0 +1,298 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2523" document="026427" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x1110" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="12.5" nominal="9" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x007FFF" word_write_align="16" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"      />
+      <value value="0x01" name="XT"           cname="_OSC_XT"      />
+      <value value="0x02" name="HS"           cname="_OSC_HS"      />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"      />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"   />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7"  />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"   />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"     />
+      <value value="0x02" name="Software" cname="_BOREN_ON"      />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP"   />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC"  />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" cmask="0x80" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_WRT2_ON"  />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_WRT3_ON"  />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" cmask="0x80" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_EBTR3_ON"  />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2525.xml b/src/devices/pic/xml_data/18F2525.xml
new file mode 100644
index 0000000..2ff5bc7
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2525.xml
@@ -0,0 +1,264 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2525" document="010278" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0CC0" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00BFFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"      />
+      <value value="0x01" name="XT"           cname="_OSC_XT"      />
+      <value value="0x02" name="HS"           cname="_OSC_HS"      />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"      />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"   />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7"  />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"     />
+      <value value="0x02" name="Software" cname="_BOREN_ON"      />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP"   />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC"  />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x07" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" cmask="0x80" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON"  />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" cmask="0x80" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x07" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2539.xml b/src/devices/pic/xml_data/18F2539.xml
new file mode 100644
index 0000000..0f4a17a
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2539.xml
@@ -0,0 +1,222 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2539" document="010279" status="NR" alternative="18F2431" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0400" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0xA2BF" cchecksum="0xA215" />
+    <checksum protected_blocks="1" bchecksum="0xA4A5" cchecksum="0xA43C" />
+    <checksum protected_blocks="3" bchecksum="0xE2A2" cchecksum="0xE239" />
+    <checksum protected_blocks="4" bchecksum="0x029E" cchecksum="0x028A" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x005FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC" value="0x07" >
+      <value value="default" name="invalid" />
+      <value value="0x02" name="HS"        cname="_OSC_HS"    />
+      <value value="0x04" name="EC_CLKOUT" cname="_OSC_EC"    />
+      <value value="0x05" name="EC_IO"     cname="_OSC_ECIO"  />
+      <value value="0x06" name="H4"        cname="_OSC_HSPLL" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.5" cname="_BORV_25" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x07" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x07" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2550.xml b/src/devices/pic/xml_data/18F2550.xml
new file mode 100644
index 0000000..21ab9ae
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2550.xml
@@ -0,0 +1,292 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2550" document="010280" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x1240" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="48" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0"  end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4"  end="16" vdd_min="3" vdd_max="5.5" />
+    <frequency start="16" end="25"  vdd_min="4" vdd_max="5.5" />
+    <frequency start="25"  end="48" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x007FFF" word_write_align="16" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" >
+    <mask name="PLLDIV" value="0x07" >
+      <value value="0x00" name="1"  cname="_PLLDIV_1"  sdcc_cname="_PLLDIV_NO_DIVIDE__4MHZ_INPUT_" />
+      <value value="0x01" name="2"  cname="_PLLDIV_2"  sdcc_cname="_PLLDIV_DIVIDE_BY_2__8MHZ_INPUT_" />
+      <value value="0x02" name="3"  cname="_PLLDIV_3"  sdcc_cname="_PLLDIV_DIVIDE_BY_3__12MHZ_INPUT_" />
+      <value value="0x03" name="4"  cname="_PLLDIV_4"  sdcc_cname="_PLLDIV_DIVIDE_BY_4__16MHZ_INPUT_" />
+      <value value="0x04" name="5"  cname="_PLLDIV_5"  sdcc_cname="_PLLDIV_DIVIDE_BY_5__20MHZ_INPUT_" />
+      <value value="0x05" name="6"  cname="_PLLDIV_6"  sdcc_cname="_PLLDIV_DIVIDE_BY_6__24MHZ_INPUT_" />
+      <value value="0x06" name="10" cname="_PLLDIV_10" sdcc_cname="_PLLDIV_DIVIDE_BY_10__40MHZ_INPUT_" />
+      <value value="0x07" name="12" cname="_PLLDIV_12" sdcc_cname="_PLLDIV_DIVIDE_BY_12__48MHZ_INPUT_" />
+    </mask>
+    <mask name="CPUDIV" value="0x18" >
+      <value value="0x00" name="1" cname="_CPUDIV_OSC1_PLL2" sdcc_cname="_CPUDIV__OSC1_OSC2_SRC___1__96MHZ_PLL_SRC___2_" />
+      <value value="0x08" name="2" cname="_CPUDIV_OSC2_PLL3" sdcc_cname="_CPUDIV__OSC1_OSC2_SRC___2__96MHZ_PLL_SRC___3_" />
+      <value value="0x10" name="3" cname="_CPUDIV_OSC3_PLL4" sdcc_cname="_CPUDIV__OSC1_OSC2_SRC___3__96MHZ_PLL_SRC___4_" />
+      <value value="0x18" name="4" cname="_CPUDIV_OSC4_PLL6" sdcc_cname="_CPUDIV__OSC1_OSC2_SRC___4__96MHZ_PLL_SRC___6_" />
+    </mask>
+    <mask name="USBDIV" value="0x20" >
+      <value value="0x00" name="1" cname="_USBDIV_1" sdcc_cname="_USBPLL_CLOCK_SRC_FROM_OSC1_OSC2" />
+      <value value="0x20" name="2" cname="_USBDIV_2" sdcc_cname="_USBPLL_CLOCK_SRC_FROM_96MHZ_PLL_2" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x05" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="XT"           cname="_FOSC_XT_XT"       sdcc_cname="_OSC_XT__USB_XT" />
+      <value value="0x01" name="XT"           cname="_FOSC_XT_XT"       sdcc_cname="_OSC_XT__USB_XT" />
+      <value value="0x02" name="XTPLL"        cname="_FOSC_XTPLL"       sdcc_cname="_OSC_XT__XT_PLL__USB_XT" />
+      <value value="0x03" name="XTPLL"        cname="_FOSC_XTPLL_XT"    sdcc_cname="_OSC_XT__XT_PLL__USB_XT" />
+      <value value="0x04" name="EC_IO"        cname="_FOSC_ECIO_EC"     sdcc_cname="_OSC_EC__EC_RA6__USB_EC" />
+      <value value="0x05" name="EC_CLKOUT"    cname="_FOSC_EC_EC"       sdcc_cname="_OSC_EC__EC_CLKO_RA6___USB_EC" />
+      <value value="0x06" name="ECPLL_IO"     cname="_FOSC_ECPLLIO_EC"  sdcc_cname="_OSC_EC__EC_PLL__EC_PLL_RA6__USB_EC" />
+      <value value="0x07" name="ECPLL_CLKOUT" cname="_FOSC_ECPLL_EC"    sdcc_cname="_OSC_EC__EC_PLL__EC_PLL_CLKO_RA6___USB_EC" />
+      <value value="0x08" name="INTRC_IO"     cname="_FOSC_INTOSCIO_EC" sdcc_cname="_OSC_INTOSC__INTOSC_RA6__USB_EC" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_FOSC_INTOSC_EC"   sdcc_cname="_OSC_INTOSC__INTOSC_CLK0_RA6___USB_EC" />
+      <value value="0x0A" name="INTXT"        cname="_FOSC_INTOSC_XT"   sdcc_cname="_OSC_INTOSC__USB_XT" />
+      <value value="0x0B" name="INTHS"        cname="_FOSC_INTOSC_HS"   sdcc_cname="_OSC_INTOSC__USB_HS" />
+      <value value="0x0C" name="HS"           cname="_FOSC_HS"          sdcc_cname="_OSC_HS__USB_HS" />
+      <value value="0x0D" name="HS"           cname="_FOSC_HS"          sdcc_cname="_OSC_HS__USB_HS" />
+      <value value="0x0E" name="HSPLL"        cname="_FOSC_HSPLL_HS"    sdcc_cname="_OSC_HS__HS_PLL__USB_HS" />
+      <value value="0x0F" name="HSPLL"        cname="_FOSC_HSPLL_HS"    sdcc_cname="_OSC_HS__HS_PLL__USB_HS" />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEM_OFF" sdcc_cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEM_ON"  sdcc_cname="_FCMEN_ON" />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE"  value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  sdcc_cname="_PUT_ON" />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" sdcc_cname="_PUT_OFF" />
+    </mask>
+    <mask name="BODEN"  value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOR_OFF"       sdcc_cname="_BODEN_OFF" />
+      <value value="0x02" name="Software" cname="_BOR_SOFT"      sdcc_cname="_BODEN_CONTROLLED_WITH_SBOREN_BIT" />
+      <value value="0x04" name="On_run"   cname="_BOR_ON_ACTIVE" sdcc_cname="_BODEN_ON_WHILE_ACTIVE" />
+      <value value="0x06" name="On"       cname="_BOR_ON"        sdcc_cname="_BODEN_ON" />
+    </mask>
+    <mask name="BORV"   value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" sdcc_cname="_BODENV_4_5V" />
+      <value value="0x08" name="4.2" cname="_BORV_1" sdcc_cname="_BODENV_4_2V" />
+      <value value="0x10" name="2.7" cname="_BORV_2" sdcc_cname="_BODENV_2_7V" />
+      <value value="0x18" name="2.0" cname="_BORV_3" sdcc_cname="_BODENV_2_0V" />
+    </mask>
+    <mask name="VREGEN" value="0x20" >
+      <value value="0x00" name="Off" cname="_VREGEN_OFF" />
+      <value value="0x20" name="On"  cname="_VREGEN_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" sdcc_cname="_WDT_DISABLED_CONTROLLED" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  sdcc_cname="_WDT_ON" />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     sdcc_cname="_WDTPS_1_1" />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     sdcc_cname="_WDTPS_1_2" />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     sdcc_cname="_WDTPS_1_4" />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     sdcc_cname="_WDTPS_1_8" />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    sdcc_cname="_WDTPS_1_16" />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    sdcc_cname="_WDTPS_1_32" />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    sdcc_cname="_WDTPS_1_64" />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   sdcc_cname="_WDTPS_1_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   sdcc_cname="_WDTPS_1_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   sdcc_cname="_WDTPS_1_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  sdcc_cname="_WDTPS_1_1024" />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  sdcc_cname="_WDTPS_1_2048" />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  sdcc_cname="_WDTPS_1_4096" />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  sdcc_cname="_WDTPS_1_8192" />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" sdcc_cname="_WDTPS_1_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" sdcc_cname="_WDTPS_1_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_OFF" sdcc_cname="_CCP2MUX_RB3" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_ON"  sdcc_cname="_CCP2MUX_RC1" />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" sdcc_cname="_PBADEN_PORTB_4_0__CONFIGURED_AS_DIGITAL_I_O_ON_RESET" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  sdcc_cname="_PBADEN_PORTB_4_0__CONFIGURED_AS_ANALOG_INPUTS_ON_RESET" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" sdcc_cname="_MCLRE_MCLR_OFF_RE3_ON" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  sdcc_cname="_MCLRE_MCLR_ON_RE3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xDF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" sdcc_cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  sdcc_cname="_STVR_ON" />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" sdcc_cname="_ENHCPU_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  sdcc_cname="_ENHCPU_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  sdcc_cname="_BACKBUG_ON" />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" sdcc_cname="_BACKBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_CP0_ON"  sdcc_cname="_CP_0_ON" />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" sdcc_cname="_CP_0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  sdcc_cname="_CP_1_ON" />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" sdcc_cname="_CP_1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_CP2_ON"  sdcc_cname="_CP_2_ON" />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" sdcc_cname="_CP_2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_CP3_ON"  sdcc_cname="_CP_3_ON" />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" sdcc_cname="_CP_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x40" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_WRT0_ON"  sdcc_cname="_WRT_0_ON" />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" sdcc_cname="_WRT_0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  sdcc_cname="_WRT_1_ON" />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" sdcc_cname="_WRT_1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_WRT2_ON"  sdcc_cname="_WRT_2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" sdcc_cname="_WRT_2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_WRT3_ON"  sdcc_cname="_WRT_3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" sdcc_cname="_WRT_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x60" cmask="0x40" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_EBTR0_ON"  sdcc_cname="_EBTR_0_ON" />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" sdcc_cname="_EBTR_0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  sdcc_cname="_EBTR_1_ON" />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" sdcc_cname="_EBTR_1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_EBTR2_ON"  sdcc_cname="_EBTR_2_ON" />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" sdcc_cname="_EBTR_2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_EBTR3_ON"  sdcc_cname="_EBTR_3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" sdcc_cname="_EBTR_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F258.xml b/src/devices/pic/xml_data/18F258.xml
new file mode 100644
index 0000000..bb27ca5
--- /dev/null
+++ b/src/devices/pic/xml_data/18F258.xml
@@ -0,0 +1,241 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F258" document="010281" status="NR" alternative="18F2580" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0840" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0x82D7" cchecksum="0x822D" />
+    <checksum protected_blocks="1" bchecksum="0x84B5" cchecksum="0x845B" />
+    <checksum protected_blocks="3" bchecksum="0xC2B2" cchecksum="0xC258" />
+    <checksum protected_blocks="5" bchecksum="0x02A6" cchecksum="0x02A1" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x007FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC"   value="0x07" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"    sdcc_cname="_OSC_LP" />
+      <value value="0x01" name="XT"           cname="_XT_OSC"    sdcc_cname="_OSC_XT" />
+      <value value="0x02" name="HS"           cname="_HS_OSC"    sdcc_cname="_OSC_HS" />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC"    sdcc_cname="_OSC_RC" />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"    sdcc_cname="_OSC_EC_OSC2_Clock_Out" />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"  sdcc_cname="_OSC_EC_OSC2_RA6" />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC" sdcc_cname="_OSC_HS_PLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"  sdcc_cname="_OSC_RC_OSC2" />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON"  />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  sdcc_cname="_PUT_ON" />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" sdcc_cname="_PUT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" sdcc_cname="_BODEN_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  sdcc_cname="_BODEN_ON" />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" sdcc_cname="_BODENV_4_5V" />
+      <value value="0x04" name="4.2" cname="_BORV_42" sdcc_cname="_BODENV_4_2V" />
+      <value value="0x08" name="2.7" cname="_BORV_27" sdcc_cname="_BODENV_2_7V" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" sdcc_cname="_BODENV_2_0V" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   sdcc_cname="_WDTPS_1_1" />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   sdcc_cname="_WDTPS_1_2" />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   sdcc_cname="_WDTPS_1_4" />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   sdcc_cname="_WDTPS_1_8" />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  sdcc_cname="_WDTPS_1_16" />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  sdcc_cname="_WDTPS_1_32" />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  sdcc_cname="_WDTPS_1_64" />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" sdcc_cname="_WDTPS_1_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  sdcc_cname="_BACKBUG_ON" />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" sdcc_cname="_BACKBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_CP0_ON"  sdcc_cname="_CP_0_ON" />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" sdcc_cname="_CP_0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  sdcc_cname="_CP_1_ON" />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" sdcc_cname="_CP_1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_CP2_ON"  sdcc_cname="_CP_2_ON" />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" sdcc_cname="_CP_2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_CP3_ON"  sdcc_cname="_CP_3_ON" />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" sdcc_cname="_CP_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_WRT0_ON"  sdcc_cname="_WRT_0_ON" />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" sdcc_cname="_WRT_0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  sdcc_cname="_WRT_1_ON" />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" sdcc_cname="_WRT_1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_WRT2_ON"  sdcc_cname="_WRT_2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" sdcc_cname="_WRT_2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_WRT3_ON"  sdcc_cname="_WRT_3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" sdcc_cname="_WRT_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_EBTR0_ON"  sdcc_cname="_EBTR_0_ON" />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" sdcc_cname="_EBTR_0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  sdcc_cname="_EBTR_1_ON" />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" sdcc_cname="_EBTR_1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_EBTR2_ON"  sdcc_cname="_EBTR_2_ON" />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" sdcc_cname="_EBTR_2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_EBTR3_ON"  sdcc_cname="_EBTR_3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" sdcc_cname="_EBTR_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2580.xml b/src/devices/pic/xml_data/18F2580.xml
new file mode 100644
index 0000000..6721af5
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2580.xml
@@ -0,0 +1,307 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2580" document="010613" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x1AC0" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x007FFF" word_write_align="16" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_IRCIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_IRCIO7" />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"        />
+      <value value="0x02" name="Software" cname="_BOREN_SBORENCTRL" />
+      <value value="0x04" name="On_run"   cname="_BOREN_BOACTIVE"   />
+      <value value="0x06" name="On"       cname="_BOREN_BOHW"       />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x82" >
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" cmask="0x10" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x10" >
+      <value value="0x00" name="1024" cname="_BBSIZ_1024" />
+      <value value="0x10" name="2048" cname="_BBSIZ_2048" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800/1000:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"            cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800/1000:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"            cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800/1000:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"            cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2585.xml b/src/devices/pic/xml_data/18F2585.xml
new file mode 100644
index 0000000..12b38f1
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2585.xml
@@ -0,0 +1,266 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2585" document="010282" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0EE0" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00BFFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_IRCIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_IRCIO7" />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"   />
+      <value value="0x02" name="Software" cname="_BOREN_SBORENCTRL"  />
+      <value value="0x04" name="On_run"   cname="_BOREN_BOACTIVE" />
+      <value value="0x06" name="On"       cname="_BOREN_BOHW"    />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x82" >
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" cmask="0x30" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x30" >
+      <value value="0x00" name="1024" cname="_BBSIZ_1024" />
+      <value value="0x10" name="2048" cname="_BBSIZ_2048" />
+      <value value="0x20" name="4096" cname="_BBSIZ_4096" />
+      <value value="0x30" name="4096" cname="_BBSIZ_4096" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x07" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"                 cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"                 cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x07" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"                 cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F25J10.xml b/src/devices/pic/xml_data/18F25J10.xml
new file mode 100644
index 0000000..57f37d4
--- /dev/null
+++ b/src/devices/pic/xml_data/18F25J10.xml
@@ -0,0 +1,182 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek                                   *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F25J10" status="IP" memory_technology="FLASH" architecture="18J" id="0x1C00" id_low_power="0x1C40">
+
+<!--* Documents ************************************************************-->
+  <documents webpage="024622" datasheet="39682" progsheet="39687" erratas="80265 80269" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="2.7" vdd_max="3.6" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="2.7" />
+    <frequency start="4" end="40" vdd_min="2.35" vdd_max="2.7" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="2.7"   max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="2.7"   max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="2.7"   max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x007FF7" word_write_align="32" word_erase_align="512" />
+  <memory name="config"       start="0x007FF8" end="0x007FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0x7F" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x07" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0xFF" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0xF8" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic ssop" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F2610.xml b/src/devices/pic/xml_data/18F2610.xml
new file mode 100644
index 0000000..e38c6d2
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2610.xml
@@ -0,0 +1,267 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2610" document="010283" status="IP" memory_technology="FLASH" self_write="no" architecture="18F" id="0x0CA0" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00FFFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"      />
+      <value value="0x01" name="XT"           cname="_OSC_XT"      />
+      <value value="0x02" name="HS"           cname="_OSC_HS"      />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"      />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"   />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7"  />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"     />
+      <value value="0x02" name="Software" cname="_BOREN_ON"      />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP"   />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON" />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x40" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x60" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2620.xml b/src/devices/pic/xml_data/18F2620.xml
new file mode 100644
index 0000000..7c25f21
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2620.xml
@@ -0,0 +1,265 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2620" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0C80" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010284" datasheet="39626" progsheet="39622" erratas="80222 80200 80224 80282" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00FFFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"      />
+      <value value="0x01" name="XT"           cname="_OSC_XT"      />
+      <value value="0x02" name="HS"           cname="_OSC_HS"      />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"      />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"   />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7"  />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"     />
+      <value value="0x02" name="Software" cname="_BOREN_ON"      />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP"   />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.6" cname="_BORV_0" sdcc_cname="_BORV_46" />
+      <value value="0x08" name="4.3" cname="_BORV_1" sdcc_cname="_BORV_43" />
+      <value value="0x10" name="2.8" cname="_BORV_2" sdcc_cname="_BORV_28" />
+      <value value="0x18" name="2.1" cname="_BORV_3" sdcc_cname="_BORV_21" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" sdcc_cname="_WDT_DISABLED_CONTROLLED" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     sdcc_cname="_WDTPS_1_1" />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     sdcc_cname="_WDTPS_1_2" />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     sdcc_cname="_WDTPS_1_4" />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     sdcc_cname="_WDTPS_1_8" />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    sdcc_cname="_WDTPS_1_16" />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    sdcc_cname="_WDTPS_1_32" />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    sdcc_cname="_WDTPS_1_64" />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   sdcc_cname="_WDTPS_1_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   sdcc_cname="_WDTPS_1_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   sdcc_cname="_WDTPS_1_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  sdcc_cname="_WDTPS_1_1024" />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  sdcc_cname="_WDTPS_1_2048" />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  sdcc_cname="_WDTPS_1_4096" />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  sdcc_cname="_WDTPS_1_8192" />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" sdcc_cname="_WDTPS_1_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" sdcc_cname="_WDTPS_1_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_PORTBE" sdcc_cname="_CCP2MUX_RB3" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC"  sdcc_cname="_CCP2MUX_RC1" />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" sdcc_cname="_PBADEN_PORTB_4_0__CONFIGURED_AS_DIGITAL_I_O_ON_RESET" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  sdcc_cname="_PBADEN_PORTB_4_0__CONFIGURED_AS_ANALOG_INPUTS_ON_RESET" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" sdcc_cname="_MCLRE_MCLR_OFF_RE3_ON" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  sdcc_cname="_MCLRE_MCLR_ON_RE3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" sdcc_cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  sdcc_cname="_STVR_ON" />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_CP0_ON"  sdcc_cname="_CP_0_ON" />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" sdcc_cname="_CP_0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  sdcc_cname="_CP_1_ON" />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" sdcc_cname="_CP_1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  sdcc_cname="_CP_2_ON" />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" sdcc_cname="_CP_2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON"  sdcc_cname="_CP_3_ON" />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" sdcc_cname="_CP_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x40" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_WRT0_ON"  sdcc_cname="_WRT_0_ON" />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" sdcc_cname="_WRT_0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  sdcc_cname="_WRT_1_ON" />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" sdcc_cname="_WRT_1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON"  sdcc_cname="_WRT_2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" sdcc_cname="_WRT_2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON"  sdcc_cname="_WRT_3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" sdcc_cname="_WRT_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x60" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_EBTR0_ON"  sdcc_cname="_EBTR_0_ON" />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" sdcc_cname="_EBTR_0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  sdcc_cname="_EBTR_1_ON" />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" sdcc_cname="_EBTR_1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  sdcc_cname="_EBTR_2_ON" />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" sdcc_cname="_EBTR_2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON"  sdcc_cname="_EBTR_3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" sdcc_cname="_EBTR_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2680.xml b/src/devices/pic/xml_data/18F2680.xml
new file mode 100644
index 0000000..2dcd013
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2680.xml
@@ -0,0 +1,278 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2680" document="010285" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0EC0" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00FFFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_IRCIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_IRCIO7" />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"   />
+      <value value="0x02" name="Software" cname="_BOREN_SBORENCTRL"  />
+      <value value="0x04" name="On_run"   cname="_BOREN_BOACTIVE" />
+      <value value="0x06" name="On"       cname="_BOREN_BOHW"    />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x82" >
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" cmask="0x30" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x30" >
+      <value value="0x00" name="1024" cname="_BBSIZ_1024" />
+      <value value="0x10" name="2048" cname="_BBSIZ_2048" />
+      <value value="0x20" name="4096" cname="_BBSIZ_4096" />
+      <value value="0x30" name="4096" cname="_BBSIZ_4096" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"                 cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"                 cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"                 cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2682.xml b/src/devices/pic/xml_data/18F2682.xml
new file mode 100644
index 0000000..8c13b2d
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2682.xml
@@ -0,0 +1,284 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2682" document="026329" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x2700" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x013FFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_IRCIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_IRCIO7" />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"   />
+      <value value="0x02" name="Software" cname="_BOREN_SBORENCTRL"  />
+      <value value="0x04" name="On_run"   cname="_BOREN_BOACTIVE" />
+      <value value="0x06" name="On"       cname="_BOREN_BOHW"    />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x82" >
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" cmask="0x30" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x30" >
+      <value value="0x00" name="1024" cname="_BBSIZ_1024" />
+      <value value="0x10" name="2048" cname="_BBSIZ_2048" />
+      <value value="0x20" name="4096" cname="_BBSIZ_4096" />
+      <value value="0x30" name="4096" cname="_BBSIZ_4096" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"                 cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+    <mask name="CP_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_CP4_ON" />
+      <value value="0x10" name="Off"         cname="_CP4_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"                 cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+    <mask name="WRT_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_WRT4_ON" />
+      <value value="0x10" name="Off"         cname="_WRT4_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"                 cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+    <mask name="EBTR_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_EBTR4_ON" />
+      <value value="0x10" name="Off"         cname="_EBTR4_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F2685.xml b/src/devices/pic/xml_data/18F2685.xml
new file mode 100644
index 0000000..bca6818
--- /dev/null
+++ b/src/devices/pic/xml_data/18F2685.xml
@@ -0,0 +1,296 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F2685" document="026328" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x2720" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x017FFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_IRCIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_IRCIO7" />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"   />
+      <value value="0x02" name="Software" cname="_BOREN_SBORENCTRL"  />
+      <value value="0x04" name="On_run"   cname="_BOREN_BOACTIVE" />
+      <value value="0x06" name="On"       cname="_BOREN_BOHW"    />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x82" >
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" cmask="0x30" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x30" >
+      <value value="0x00" name="1024" cname="_BBSIZ_1024" />
+      <value value="0x10" name="2048" cname="_BBSIZ_2048" />
+      <value value="0x20" name="4096" cname="_BBSIZ_4096" />
+      <value value="0x30" name="4096" cname="_BBSIZ_4096" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x3F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"                 cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON" />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+    <mask name="CP_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_CP4_ON" />
+      <value value="0x10" name="Off"         cname="_CP4_OFF" />
+    </mask>
+    <mask name="CP_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_CP5_ON" />
+      <value value="0x20" name="Off"         cname="_CP5_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x3F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"                 cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+    <mask name="WRT_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_WRT4_ON" />
+      <value value="0x10" name="Off"         cname="_WRT4_OFF" />
+    </mask>
+    <mask name="WRT_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_WRT5_ON" />
+      <value value="0x20" name="Off"         cname="_WRT5_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x3F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"                 cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+    <mask name="EBTR_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_EBTR4_ON" />
+      <value value="0x10" name="Off"         cname="_EBTR4_OFF" />
+    </mask>
+    <mask name="EBTR_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_EBTR5_ON" />
+      <value value="0x20" name="Off"         cname="_EBTR5_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4220.xml b/src/devices/pic/xml_data/18F4220.xml
new file mode 100644
index 0000000..f1c19c7
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4220.xml
@@ -0,0 +1,351 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4220" document="010286" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x05A0" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0xF412" cchecksum="0xF368" />
+    <checksum protected_blocks="1" bchecksum="0xF5E8" cchecksum="0xF59D" />
+    <checksum protected_blocks="2" bchecksum="0xFBE7" cchecksum="0xFB9C" />
+    <checksum protected_blocks="3" bchecksum="0x03E5" cchecksum="0x03EF" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x000FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0xCF" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"     />
+      <value value="0x01" name="XT"           cname="_XT_OSC"     />
+      <value value="0x02" name="HS"           cname="_HS_OSC"     />
+      <value value="0x03" name="invalid" />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"     />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"   />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"   />
+      <value value="0x08" name="INTRC_IO"     cname="_INTIO2_OSC" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_INTIO1_OSC" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FSCM_OFF" />
+      <value value="0x40" name="On"  cname="_FSCM_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1K"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2K"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4K"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8K"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16K" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32K" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_B3" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_C1" />
+    </mask>
+    <mask name="PBADEN" value="0x02" >
+      <value value="0x00" name="digital" cname="_PBAD_DIG" />
+      <value value="0x02" name="analog"  cname="_PBAD_ANA" />
+    </mask>
+    <mask name="MCLRE"  value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:07FF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:07FF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:07FF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4221.xml b/src/devices/pic/xml_data/18F4221.xml
new file mode 100644
index 0000000..d4a7e11
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4221.xml
@@ -0,0 +1,368 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4221" document="024611" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x2140" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x000FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO2" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO1" />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOR_OFF"   />
+      <value value="0x02" name="Software" cname="_BOR_SOFT"  />
+      <value value="0x04" name="On_run"   cname="_BOR_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOR_ON"    />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x87" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_RB3" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_RC1" />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_DIG" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ANA" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" cmask="0x38" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="ICPORT" value="0x08" >
+      <value value="0x00" name="Off" cname="_ICPORT_OFF" />
+      <value value="0x08" name="On"  cname="_ICPORT_ON" />
+    </mask>
+    <mask name="BBSIZ"  value="0x30" >
+      <value value="0x00" name="256" cname="_BBSIZ_BB256" />
+      <value value="0x10" name="512" cname="_BBSIZ_BB512" />
+      <value value="0x20" name="512" cname="_BBSIZ_BB512" />
+      <value value="0x30" name="512" cname="_BBSIZ_BB512" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200/0400:07FF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"            cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200/0400:07FF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"            cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200/0400:07FF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"            cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4320.xml b/src/devices/pic/xml_data/18F4320.xml
new file mode 100644
index 0000000..734bb11
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4320.xml
@@ -0,0 +1,377 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4320" document="010287" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0520" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0xE412" cchecksum="0xE368" />
+    <checksum protected_blocks="1" bchecksum="0xE5E7" cchecksum="0xE59C" />
+    <checksum protected_blocks="2" bchecksum="0xEBE6" cchecksum="0xEB9B" />
+    <checksum protected_blocks="3" bchecksum="0xF3E4" cchecksum="0xF399" />
+    <checksum protected_blocks="4" bchecksum="0xFBE0" cchecksum="0xFB95" />
+    <checksum protected_blocks="5" bchecksum="0x03D8" cchecksum="0x03E2" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x001FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0xCF" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"     />
+      <value value="0x01" name="XT"           cname="_XT_OSC"     />
+      <value value="0x02" name="HS"           cname="_HS_OSC"     />
+      <value value="0x03" name="invalid" />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"     />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"   />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"   />
+      <value value="0x08" name="INTRC_IO"     cname="_INTIO2_OSC" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_INTIO1_OSC" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FSCM_OFF" />
+      <value value="0x40" name="On"  cname="_FSCM_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1K"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2K"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4K"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8K"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16K" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32K" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_B3" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_C1" />
+    </mask>
+    <mask name="PBADEN" value="0x02" >
+      <value value="0x00" name="digital" cname="_PBAD_DIG" />
+      <value value="0x02" name="analog"  cname="_PBAD_ANA" />
+    </mask>
+    <mask name="MCLRE"  value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:07FF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="1000:17FF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="1800:1FFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:07FF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="1000:17FF" cname="_WRT2_ON"  />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="1800:1FFF" cname="_WRT3_ON"  />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:07FF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="0800:0FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="1000:17FF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="1800:1FFF" cname="_EBTR3_ON"  />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4321.xml b/src/devices/pic/xml_data/18F4321.xml
new file mode 100644
index 0000000..6bdd265
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4321.xml
@@ -0,0 +1,368 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4321" document="024610" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x2100" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x001FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO2" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO1" />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOR_OFF"   />
+      <value value="0x02" name="Software" cname="_BOR_SOFT"  />
+      <value value="0x04" name="On_run"   cname="_BOR_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOR_ON"    />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x87" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CPP2MX_RB3" />
+      <value value="0x01" name="RC1" cname="_CPP2MX_RC1" />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_DIG" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ANA" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" cmask="0x38" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="ICPORT" value="0x08" >
+      <value value="0x00" name="Off" cname="_ICPORT_OFF" />
+      <value value="0x08" name="On"  cname="_ICPORT_ON" />
+    </mask>
+    <mask name="BBSIZ"  value="0x30" >
+      <value value="0x00" name="256"  cname="_BBSIZ_BB256" />
+      <value value="0x10" name="512"  cname="_BBSIZ_BB512" />
+      <value value="0x20" name="1024" cname="_BBSIZ_BB512" />
+      <value value="0x30" name="1024" cname="_BBSIZ_BB512" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200/0400/0800:0FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"                 cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200/0400/0800:0FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"                 cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200/0400/0800:0FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"                 cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4331.xml b/src/devices/pic/xml_data/18F4331.xml
new file mode 100644
index 0000000..a22e667
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4331.xml
@@ -0,0 +1,384 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4331" document="010288" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x08A0" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0xE464" cchecksum="0xE3BA" />
+    <checksum protected_blocks="1" bchecksum="0xE640" cchecksum="0xE5F5" />
+    <checksum protected_blocks="3" bchecksum="0x043D" cchecksum="0x0447" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x001FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0xCF" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"    />
+      <value value="0x01" name="XT"           cname="_OSC_XT"    />
+      <value value="0x02" name="HS"           cname="_OSC_HS"    />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC2"   />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"    />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"  />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"  />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_IRCIO" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_IRC"   />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"    />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC1"   />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"    />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"    />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"    />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"    />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRTEN_ON"  />
+      <value value="0x01" name="Off" cname="_PWRTEN_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOREN_OFF" />
+      <value value="0x02" name="On"  cname="_BOREN_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x3F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDTEN_OFF" />
+      <value value="0x01" name="On"  cname="_WDTEN_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDPS_32768" />
+    </mask>
+    <mask name="WINEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_WINEN_ON"  />
+      <value value="0x20" name="Off" cname="_WINEN_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x3C" >
+    <mask name="PWMPIN"  value="0x04" >
+      <value value="0x00" name="On"  cname="_PWMPIN_ON"  />
+      <value value="0x04" name="Off" cname="_PWMPIN_OFF" />
+    </mask>
+    <mask name="LPOL"    value="0x08" >
+      <value value="0x00" name="low"  cname="_LPOL_LOW"  />
+      <value value="0x08" name="high" cname="_LPOL_HIGH" />
+    </mask>
+    <mask name="HPOL"    value="0x10" >
+      <value value="0x00" name="low"  cname="_HPOL_LOW"  />
+      <value value="0x10" name="high" cname="_HPOL_HIGH" />
+    </mask>
+    <mask name="T1OSCMX" value="0x20" >
+      <value value="0x00" name="Legacy"    cname="_T1OSCMX_OFF" />
+      <value value="0x20" name="Low Power" cname="_T1OSCMX_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x9D" >
+    <mask name="FLTAMX" value="0x01" >
+      <value value="0x00" name="RD4" cname="_FLTAMX_RD4" />
+      <value value="0x01" name="RC1" cname="_FLTAMX_RC1"  />
+    </mask>
+    <mask name="SSPMX" value="0x04" >
+      <value value="0x00" name="RD3, RD2, RD1" cname="_SSPMX_RD1" />
+      <value value="0x04" name="RC5, RC4, RC7" cname="_SSPMX_RC7"  />
+    </mask>
+    <mask name="PWM4MX" value="0x08" >
+      <value value="0x00" name="RD5" cname="_PWM4MX_RD5" />
+      <value value="0x08" name="RB5" cname="_PWM4MX_RB5"  />
+    </mask>
+    <mask name="EXCLKMX" value="0x10" >
+      <value value="0x00" name="RD0" cname="_EXCLKMX_RD0" />
+      <value value="0x10" name="RC3" cname="_EXCLKMX_RC3"  />
+    </mask>
+    <mask name="MCLRE" value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:0FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:0FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:0FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4410.xml b/src/devices/pic/xml_data/18F4410.xml
new file mode 100644
index 0000000..8ca9b17
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4410.xml
@@ -0,0 +1,349 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4410" document="010417" status="IP" memory_technology="FLASH" self_write="no" architecture="18F" id="0x10E0" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FFF" word_write_align="16" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"      />
+      <value value="0x01" name="XT"           cname="_OSC_XT"      />
+      <value value="0x02" name="HS"           cname="_OSC_HS"      />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"      />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"   />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7"  />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"     />
+      <value value="0x02" name="Software" cname="_BOREN_ON"      />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP"   />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x40" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x60" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F442.xml b/src/devices/pic/xml_data/18F442.xml
new file mode 100644
index 0000000..61f6a63
--- /dev/null
+++ b/src/devices/pic/xml_data/18F442.xml
@@ -0,0 +1,327 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F442" document="010289" status="NR" alternative="18F4420" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x04A0" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0xC2B4" cchecksum="0xC20A" />
+    <checksum protected_blocks="1" bchecksum="0xC491" cchecksum="0xC437" />
+    <checksum protected_blocks="3" bchecksum="0x028E" cchecksum="0x0289" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC"   value="0x07" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"    sdcc_cname="_OSC_LP" />
+      <value value="0x01" name="XT"           cname="_XT_OSC"    sdcc_cname="_OSC_XT" />
+      <value value="0x02" name="HS"           cname="_HS_OSC"    sdcc_cname="_OSC_HS" />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC"    sdcc_cname="_OSC_RC" />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"    sdcc_cname="_OSC_EC_OSC2_Clock_Out" />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"  sdcc_cname="_OSC_EC_OSC2_RA6" />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC" sdcc_cname="_OSC_HS_PLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"  sdcc_cname="_OSC_RC_OSC2" />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON"  />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  sdcc_cname="_PUT_ON" />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" sdcc_cname="_PUT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" sdcc_cname="_BODEN_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  sdcc_cname="_BODEN_ON" />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" sdcc_cname="_BODENV_4_5V" />
+      <value value="0x04" name="4.2" cname="_BORV_42" sdcc_cname="_BODENV_4_2V" />
+      <value value="0x08" name="2.7" cname="_BORV_27" sdcc_cname="_BODENV_2_7V" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" sdcc_cname="_BODENV_2_0V" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   sdcc_cname="_WDTPS_1_1" />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   sdcc_cname="_WDTPS_1_2" />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   sdcc_cname="_WDTPS_1_4" />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   sdcc_cname="_WDTPS_1_8" />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  sdcc_cname="_WDTPS_1_16" />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  sdcc_cname="_WDTPS_1_32" />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  sdcc_cname="_WDTPS_1_64" />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" sdcc_cname="_WDTPS_1_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_OFF" sdcc_cname="_CCP2MUX_RB3" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_ON"  sdcc_cname="_CCP2MUX_RC1"/>
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  sdcc_cname="_BACKBUG_ON" />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" sdcc_cname="_BACKBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_CP0_ON"  sdcc_cname="_CP_0_ON" />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" sdcc_cname="_CP_0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  sdcc_cname="_CP_1_ON" />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" sdcc_cname="_CP_1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_WRT0_ON"  sdcc_cname="_WRT_0_ON" />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" sdcc_cname="_WRT_0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  sdcc_cname="_WRT_1_ON" />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" sdcc_cname="_WRT_1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_EBTR0_ON"  sdcc_cname="_EBTR_0_ON" />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" sdcc_cname="_EBTR_0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  sdcc_cname="_EBTR_1_ON" />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" sdcc_cname="_EBTR_1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4420.xml b/src/devices/pic/xml_data/18F4420.xml
new file mode 100644
index 0000000..83a0022
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4420.xml
@@ -0,0 +1,358 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4420" document="010290" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x10C0" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FFF" word_write_align="16" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"      />
+      <value value="0x01" name="XT"           cname="_OSC_XT"      />
+      <value value="0x02" name="HS"           cname="_OSC_HS"      />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"      />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"   />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7"  />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"     />
+      <value value="0x02" name="Software" cname="_BOREN_ON"      />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP"   />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" cmask="0x80" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" cmask="0x80" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4423.xml b/src/devices/pic/xml_data/18F4423.xml
new file mode 100644
index 0000000..1760494
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4423.xml
@@ -0,0 +1,349 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4423" document="026426" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x10D0" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="12.5"  nominal="9" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FFF" word_write_align="16" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"      />
+      <value value="0x01" name="XT"           cname="_OSC_XT"      />
+      <value value="0x02" name="HS"           cname="_OSC_HS"      />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"      />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"   />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7"  />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"     />
+      <value value="0x02" name="Software" cname="_BOREN_ON"      />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP"   />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC"  />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" cmask="0x80" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" cmask="0x80" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+  
+  <!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+  
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+  
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4431.xml b/src/devices/pic/xml_data/18F4431.xml
new file mode 100644
index 0000000..c19b48a
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4431.xml
@@ -0,0 +1,409 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4431" document="010291" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0880" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0xC488" cchecksum="0xC3DE" />
+    <checksum protected_blocks="1" bchecksum="0xC668" cchecksum="0xC61D" />
+    <checksum protected_blocks="3" bchecksum="0xE465" cchecksum="0xE41A" />
+    <checksum protected_blocks="5" bchecksum="0x0459" cchecksum="0x0463" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0xCF" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"    />
+      <value value="0x01" name="XT"           cname="_OSC_XT"    />
+      <value value="0x02" name="HS"           cname="_OSC_HS"    />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC2"   />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"    />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"  />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"  />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_IRCIO" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_IRC"   />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"    />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC1"   />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"    />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"    />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"    />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"    />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRTEN_ON"  />
+      <value value="0x01" name="Off" cname="_PWRTEN_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOREN_OFF" />
+      <value value="0x02" name="On"  cname="_BOREN_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x3F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDTEN_OFF" />
+      <value value="0x01" name="On"  cname="_WDTEN_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDPS_32768" />
+    </mask>
+    <mask name="WINEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_WINEN_ON"  />
+      <value value="0x20" name="Off" cname="_WINEN_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x3C" >
+    <mask name="PWMPIN"  value="0x04" >
+      <value value="0x00" name="On"  cname="_PWMPIN_ON"  />
+      <value value="0x04" name="Off" cname="_PWMPIN_OFF" />
+    </mask>
+    <mask name="LPOL"    value="0x08" >
+      <value value="0x00" name="low"  cname="_LPOL_LOW"  />
+      <value value="0x08" name="high" cname="_LPOL_HIGH" />
+    </mask>
+    <mask name="HPOL"    value="0x10" >
+      <value value="0x00" name="low"  cname="_HPOL_LOW"  />
+      <value value="0x10" name="high" cname="_HPOL_HIGH" />
+    </mask>
+    <mask name="T1OSCMX" value="0x20" >
+      <value value="0x00" name="Legacy"    cname="_T1OSCMX_OFF" />
+      <value value="0x20" name="Low Power" cname="_T1OSCMX_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x9D" >
+    <mask name="FLTAMX" value="0x01" >
+      <value value="0x00" name="RD4" cname="_FLTAMX_RD4" />
+      <value value="0x01" name="RC1" cname="_FLTAMX_RC1"  />
+    </mask>
+    <mask name="SSPMX" value="0x04" >
+      <value value="0x00" name="RD3, RD2, RD1" cname="_SSPMX_RD1" />
+      <value value="0x04" name="RC5, RC4, RC7" cname="_SSPMX_RC7"  />
+    </mask>
+    <mask name="PWM4MX" value="0x08" >
+      <value value="0x00" name="RD5" cname="_PWM4MX_RD5" />
+      <value value="0x08" name="RB5" cname="_PWM4MX_RB5"  />
+    </mask>
+    <mask name="EXCLKMX" value="0x10" >
+      <value value="0x00" name="RD0" cname="_EXCLKMX_RD0" />
+      <value value="0x10" name="RC3" cname="_EXCLKMX_RC3"  />
+    </mask>
+    <mask name="MCLRE" value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:0FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="2000:2FFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="3000:3FFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:0FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="2000:2FFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="3000:3FFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:0FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="1000:1FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="2000:2FFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="3000:3FFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4439.xml b/src/devices/pic/xml_data/18F4439.xml
new file mode 100644
index 0000000..3441809
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4439.xml
@@ -0,0 +1,316 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4439" document="010292" status="NR" alternative="18F4431" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x04A0" >
+
+<!--* Checksums ************************************************************-->
+<!--  <checksums>
+    <checksum protected_blocks="0" bchecksum="0xC2BF" cchecksum="0xC215" />
+    <checksum protected_blocks="1" bchecksum="0xC4A5" cchecksum="0xC43C" />
+    <checksum protected_blocks="2" bchecksum="0xE2A2" cchecksum="0xE239" />
+    <checksum protected_blocks="3" bchecksum="0x029E" cchecksum="0x028A" />
+  </checksums>
+-->
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC" value="0x07" >
+      <value value="default" name="invalid" />
+      <value value="0x02" name="HS"        cname="_OSC_HS"    />
+      <value value="0x04" name="EC_CLKOUT" cname="_OSC_EC"    />
+      <value value="0x05" name="EC_IO"     cname="_OSC_ECIO"  />
+      <value value="0x06" name="H4"        cname="_OSC_HSPLL" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.5" cname="_BORV_25" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x07" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x07" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4450.xml b/src/devices/pic/xml_data/18F4450.xml
new file mode 100644
index 0000000..e634df1
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4450.xml
@@ -0,0 +1,378 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4450" document="023498" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x2400" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FFF" word_write_align="8" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x07" cmask="0x00" >
+    <mask name="PLLDIV" value="0x07" >
+      <value value="0x00" name="1"  cname="_PLLDIV_1"  />
+      <value value="0x01" name="2"  cname="_PLLDIV_2"  />
+      <value value="0x02" name="3"  cname="_PLLDIV_3"  />
+      <value value="0x03" name="4"  cname="_PLLDIV_4"  />
+      <value value="0x04" name="5"  cname="_PLLDIV_5"  />
+      <value value="0x05" name="6"  cname="_PLLDIV_6"  />
+      <value value="0x06" name="10" cname="_PLLDIV_10" />
+      <value value="0x07" name="12" cname="_PLLDIV_12" />
+    </mask>
+    <mask name="CPUDIV" value="0x18" >
+      <value value="0x00" name="1" cname="_CPUDIV_OSC1_PLL2" />
+      <value value="0x08" name="2" cname="_CPUDIV_OSC2_PLL3" />
+      <value value="0x10" name="3" cname="_CPUDIV_OSC3_PLL4" />
+      <value value="0x18" name="4" cname="_CPUDIV_OSC4_PLL6" />
+    </mask>
+    <mask name="USBDIV" value="0x20" >
+      <value value="0x00" name="1" cname="_USBDIV_1" />
+      <value value="0x20" name="2" cname="_USBDIV_2" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" cmask="0x00" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="XT"           cname="_FOSC_XT_XT"       />
+      <value value="0x01" name="XT"           cname="_FOSC_XT_XT"       />
+      <value value="0x02" name="XTPLL"        cname="_FOSC_XTPLL"       />
+      <value value="0x03" name="XTPLL"        cname="_FOSC_XTPLL_XT"    />
+      <value value="0x04" name="EC_IO"        cname="_FOSC_ECIO_EC"     />
+      <value value="0x05" name="EC_CLKOUT"    cname="_FOSC_EC_EC"       />
+      <value value="0x06" name="ECPLL_IO"     cname="_FOSC_ECPLLIO_EC"  />
+      <value value="0x07" name="ECPLL_CLKOUT" cname="_FOSC_ECPLL_EC"    />
+      <value value="0x08" name="INTRC_IO"     cname="_FOSC_INTOSCIO_EC" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_FOSC_INTOSC_EC"   />
+      <value value="0x0A" name="INTXT"        cname="_FOSC_INTOSC_XT"   />
+      <value value="0x0B" name="INTHS"        cname="_FOSC_INTOSC_HS"   />
+      <value value="0x0C" name="HS"           cname="_FOSC_HS"          />
+      <value value="0x0D" name="HS"           cname="_FOSC_HS"          />
+      <value value="0x0E" name="HSPLL"        cname="_FOSC_HSPLL_HS"    />
+      <value value="0x0F" name="HSPLL"        cname="_FOSC_HSPLL_HS"    />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE"  value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN"  value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOR_OFF"       />
+      <value value="0x02" name="Software" cname="_BOR_SOFT"      />
+      <value value="0x04" name="On_run"   cname="_BOR_ON_ACTIVE" />
+      <value value="0x06" name="On"       cname="_BOR_ON"        />
+    </mask>
+    <mask name="BORV"   value="0x18" >
+      <value value="0x00" name="4.6" cname="_BORV_46" />
+      <value value="0x08" name="4.3" cname="_BORV_43" />
+      <value value="0x10" name="2.8" cname="_BORV_28" />
+      <value value="0x18" name="2.1" cname="_BORV_21" />
+    </mask>
+    <mask name="VREGEN" value="0x20" >
+      <value value="0x00" name="Off" cname="_VREGEN_OFF" />
+      <value value="0x20" name="On"  cname="_VREGEN_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x82" cmask="0x00" >
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" cmask="0x28" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x08" >
+      <value value="0x00" name="1024" cname="_BBSIZ_1024" />
+      <value value="0x08" name="2048" cname="_BBSIZ_2048" />
+    </mask>
+    <mask name="ICPORT" value="0x20" >
+      <value value="0x00" name="On"  cname="_ICPORT_ON" />
+      <value value="0x20" name="Off" cname="_ICPORT_OFF" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800/1000:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"            cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x40" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800/1000:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"            cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x60" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800/1000:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"            cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4455.xml b/src/devices/pic/xml_data/18F4455.xml
new file mode 100644
index 0000000..282decb
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4455.xml
@@ -0,0 +1,398 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4455" document="010293" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x1220" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="48" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0"  end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4"  end="16" vdd_min="3" vdd_max="5.5" />
+    <frequency start="16" end="25"  vdd_min="4" vdd_max="5.5" />
+    <frequency start="25"  end="48" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x005FFF" word_write_align="16" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" >
+    <mask name="PLLDIV" value="0x07" >
+      <value value="0x00" name="1"  cname="_PLLDIV_1"  sdcc_cname="_PLLDIV_NO_DIVIDE__4MHZ_INPUT_" />
+      <value value="0x01" name="2"  cname="_PLLDIV_2"  sdcc_cname="_PLLDIV_DIVIDE_BY_2__8MHZ_INPUT_" />
+      <value value="0x02" name="3"  cname="_PLLDIV_3"  sdcc_cname="_PLLDIV_DIVIDE_BY_3__12MHZ_INPUT_" />
+      <value value="0x03" name="4"  cname="_PLLDIV_4"  sdcc_cname="_PLLDIV_DIVIDE_BY_4__16MHZ_INPUT_" />
+      <value value="0x04" name="5"  cname="_PLLDIV_5"  sdcc_cname="_PLLDIV_DIVIDE_BY_5__20MHZ_INPUT_" />
+      <value value="0x05" name="6"  cname="_PLLDIV_6"  sdcc_cname="_PLLDIV_DIVIDE_BY_6__24MHZ_INPUT_" />
+      <value value="0x06" name="10" cname="_PLLDIV_10" sdcc_cname="_PLLDIV_DIVIDE_BY_10__40MHZ_INPUT_" />
+      <value value="0x07" name="12" cname="_PLLDIV_12" sdcc_cname="_PLLDIV_DIVIDE_BY_12__48MHZ_INPUT_" />
+    </mask>
+    <mask name="CPUDIV" value="0x18" >
+      <value value="0x00" name="1" cname="_CPUDIV_OSC1_PLL2" sdcc_cname="_CPUDIV__OSC1_OSC2_SRC___1__96MHZ_PLL_SRC___2_" />
+      <value value="0x08" name="2" cname="_CPUDIV_OSC2_PLL3" sdcc_cname="_CPUDIV__OSC1_OSC2_SRC___2__96MHZ_PLL_SRC___3_" />
+      <value value="0x10" name="3" cname="_CPUDIV_OSC3_PLL4" sdcc_cname="_CPUDIV__OSC1_OSC2_SRC___3__96MHZ_PLL_SRC___4_" />
+      <value value="0x18" name="4" cname="_CPUDIV_OSC4_PLL6" sdcc_cname="_CPUDIV__OSC1_OSC2_SRC___4__96MHZ_PLL_SRC___6_" />
+    </mask>
+    <mask name="USBDIV" value="0x20" >
+      <value value="0x00" name="1" cname="_USBDIV_1" sdcc_cname="_USBPLL_CLOCK_SRC_FROM_OSC1_OSC2" />
+      <value value="0x20" name="2" cname="_USBDIV_2" sdcc_cname="_USBPLL_CLOCK_SRC_FROM_96MHZ_PLL_2" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x05" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="XT"           cname="_FOSC_XT_XT"       sdcc_cname="_OSC_XT__USB_XT" />
+      <value value="0x01" name="XT"           cname="_FOSC_XT_XT"       sdcc_cname="_OSC_XT__USB_XT" />
+      <value value="0x02" name="XTPLL"        cname="_FOSC_XTPLL"       sdcc_cname="_OSC_XT__XT_PLL__USB_XT" />
+      <value value="0x03" name="XTPLL"        cname="_FOSC_XTPLL_XT"    sdcc_cname="_OSC_XT__XT_PLL__USB_XT" />
+      <value value="0x04" name="EC_IO"        cname="_FOSC_ECIO_EC"     sdcc_cname="_OSC_EC__EC_RA6__USB_EC" />
+      <value value="0x05" name="EC_CLKOUT"    cname="_FOSC_EC_EC"       sdcc_cname="_OSC_EC__EC_CLKO_RA6___USB_EC" />
+      <value value="0x06" name="ECPLL_IO"     cname="_FOSC_ECPLLIO_EC"  sdcc_cname="_OSC_EC__EC_PLL__EC_PLL_RA6__USB_EC" />
+      <value value="0x07" name="ECPLL_CLKOUT" cname="_FOSC_ECPLL_EC"    sdcc_cname="_OSC_EC__EC_PLL__EC_PLL_CLKO_RA6___USB_EC" />
+      <value value="0x08" name="INTRC_IO"     cname="_FOSC_INTOSCIO_EC" sdcc_cname="_OSC_INTOSC__INTOSC_RA6__USB_EC" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_FOSC_INTOSC_EC"   sdcc_cname="_OSC_INTOSC__INTOSC_CLK0_RA6___USB_EC" />
+      <value value="0x0A" name="INTXT"        cname="_FOSC_INTOSC_XT"   sdcc_cname="_OSC_INTOSC__USB_XT" />
+      <value value="0x0B" name="INTHS"        cname="_FOSC_INTOSC_HS"   sdcc_cname="_OSC_INTOSC__USB_HS" />
+      <value value="0x0C" name="HS"           cname="_FOSC_HS"          sdcc_cname="_OSC_HS__USB_HS" />
+      <value value="0x0D" name="HS"           cname="_FOSC_HS"          sdcc_cname="_OSC_HS__USB_HS" />
+      <value value="0x0E" name="HSPLL"        cname="_FOSC_HSPLL_HS"    sdcc_cname="_OSC_HS__HS_PLL__USB_HS" />
+      <value value="0x0F" name="HSPLL"        cname="_FOSC_HSPLL_HS"    sdcc_cname="_OSC_HS__HS_PLL__USB_HS" />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEM_OFF" sdcc_cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEM_ON"  sdcc_cname="_FCMEN_ON" />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE"  value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  sdcc_cname="_PUT_ON" />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" sdcc_cname="_PUT_OFF" />
+    </mask>
+    <mask name="BODEN"  value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOR_OFF"       sdcc_cname="_BODEN_OFF" />
+      <value value="0x02" name="Software" cname="_BOR_SOFT"      sdcc_cname="_BODEN_CONTROLLED_WITH_SBOREN_BIT" />
+      <value value="0x04" name="On_run"   cname="_BOR_ON_ACTIVE" sdcc_cname="_BODEN_ON_WHILE_ACTIVE" />
+      <value value="0x06" name="On"       cname="_BOR_ON"        sdcc_cname="_BODEN_ON" />
+    </mask>
+    <mask name="BORV"   value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" sdcc_cname="_BODENV_4_5V" />
+      <value value="0x08" name="4.2" cname="_BORV_1" sdcc_cname="_BODENV_4_2V" />
+      <value value="0x10" name="2.7" cname="_BORV_2" sdcc_cname="_BODENV_2_7V" />
+      <value value="0x18" name="2.0" cname="_BORV_3" sdcc_cname="_BODENV_2_0V" />
+    </mask>
+    <mask name="VREGEN" value="0x20" >
+      <value value="0x00" name="Off" cname="_VREGEN_OFF" />
+      <value value="0x20" name="On"  cname="_VREGEN_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" sdcc_cname="_WDT_DISABLED_CONTROLLED" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  sdcc_cname="_WDT_ON" />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     sdcc_cname="_WDTPS_1_1" />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     sdcc_cname="_WDTPS_1_2" />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     sdcc_cname="_WDTPS_1_4" />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     sdcc_cname="_WDTPS_1_8" />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    sdcc_cname="_WDTPS_1_16" />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    sdcc_cname="_WDTPS_1_32" />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    sdcc_cname="_WDTPS_1_64" />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   sdcc_cname="_WDTPS_1_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   sdcc_cname="_WDTPS_1_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   sdcc_cname="_WDTPS_1_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  sdcc_cname="_WDTPS_1_1024" />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  sdcc_cname="_WDTPS_1_2048" />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  sdcc_cname="_WDTPS_1_4096" />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  sdcc_cname="_WDTPS_1_8192" />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" sdcc_cname="_WDTPS_1_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" sdcc_cname="_WDTPS_1_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_OFF" sdcc_cname="_CCP2MUX_RB3" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_ON"  sdcc_cname="_CCP2MUX_RC1" />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" sdcc_cname="_PBADEN_PORTB_4_0__CONFIGURED_AS_DIGITAL_I_O_ON_RESET" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  sdcc_cname="_PBADEN_PORTB_4_0__CONFIGURED_AS_ANALOG_INPUTS_ON_RESET" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" sdcc_cname="_MCLRE_MCLR_OFF_RE3_ON" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  sdcc_cname="_MCLRE_MCLR_ON_RE3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" cmask="0x20" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" sdcc_cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  sdcc_cname="_STVR_ON" />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="ICPORT" value="0x20" >
+      <value value="0x00" name="Off" cname="_ICPRT_OFF" sdcc_cname="_ENICPORT_OFF" />
+      <value value="0x20" name="On"  cname="_ICPRT_ON"  sdcc_cname="_ENICPORT_ON" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" sdcc_cname="_ENHCPU_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  sdcc_cname="_ENHCPU_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  sdcc_cname="_BACKBUG_ON" />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" sdcc_cname="_BACKBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x07" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_CP0_ON"  sdcc_cname="_CP_0_ON" />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" sdcc_cname="_CP_0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  sdcc_cname="_CP_1_ON" />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" sdcc_cname="_CP_1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_CP2_ON"  sdcc_cname="_CP_2_ON" />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" sdcc_cname="_CP_2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_WRT0_ON"  sdcc_cname="_WRT_0_ON" />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" sdcc_cname="_WRT_0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  sdcc_cname="_WRT_1_ON" />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" sdcc_cname="_WRT_1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_WRT2_ON"  sdcc_cname="_WRT_2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" sdcc_cname="_WRT_2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" cmask="0xC0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x07" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_EBTR0_ON"  sdcc_cname="_EBTR_0_ON" />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" sdcc_cname="_EBTR_0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  sdcc_cname="_EBTR_1_ON" />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" sdcc_cname="_EBTR_1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_EBTR2_ON"  sdcc_cname="_EBTR_2_ON" />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" sdcc_cname="_EBTR_2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F448.xml b/src/devices/pic/xml_data/18F448.xml
new file mode 100644
index 0000000..40de124
--- /dev/null
+++ b/src/devices/pic/xml_data/18F448.xml
@@ -0,0 +1,322 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F448" document="010294" status="NR" alternative="18F4480" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0820" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0xC2B3" cchecksum="0xC209" />
+    <checksum protected_blocks="1" bchecksum="0xC48F" cchecksum="0xC435" />
+    <checksum protected_blocks="3" bchecksum="0x028C" cchecksum="0x0287" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC"   value="0x07" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"    sdcc_cname="_OSC_LP" />
+      <value value="0x01" name="XT"           cname="_XT_OSC"    sdcc_cname="_OSC_XT" />
+      <value value="0x02" name="HS"           cname="_HS_OSC"    sdcc_cname="_OSC_HS" />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC"    sdcc_cname="_OSC_RC" />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"    sdcc_cname="_OSC_EC_OSC2_Clock_Out" />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"  sdcc_cname="_OSC_EC_OSC2_RA6" />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC" sdcc_cname="_OSC_HS_PLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"  sdcc_cname="_OSC_RC_OSC2" />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON"  />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  sdcc_cname="_PUT_ON" />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" sdcc_cname="_PUT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" sdcc_cname="_BODEN_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  sdcc_cname="_BODEN_ON" />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" sdcc_cname="_BODENV_4_5V" />
+      <value value="0x04" name="4.2" cname="_BORV_42" sdcc_cname="_BODENV_4_2V" />
+      <value value="0x08" name="2.7" cname="_BORV_27" sdcc_cname="_BODENV_2_7V" />
+      <value value="0x0C" name="2.0" cname="_BORV_25" sdcc_cname="_BODENV_2_0V" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   sdcc_cname="_WDTPS_1_1" />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   sdcc_cname="_WDTPS_1_2" />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   sdcc_cname="_WDTPS_1_4" />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   sdcc_cname="_WDTPS_1_8" />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  sdcc_cname="_WDTPS_1_16" />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  sdcc_cname="_WDTPS_1_32" />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  sdcc_cname="_WDTPS_1_64" />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" sdcc_cname="_WDTPS_1_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  sdcc_cname="_BACKBUG_ON" />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" sdcc_cname="_BACKBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_CP0_ON"  sdcc_cname="_CP_0_ON" />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" sdcc_cname="_CP_0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  sdcc_cname="_CP_1_ON" />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" sdcc_cname="_CP_1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_WRT0_ON"  sdcc_cname="_WRT_0_ON" />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" sdcc_cname="_WRT_0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  sdcc_cname="_WRT_1_ON" />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" sdcc_cname="_WRT_1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_EBTR0_ON"  sdcc_cname="_EBTR_0_ON" />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" sdcc_cname="_EBTR_0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  sdcc_cname="_EBTR_1_ON" />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" sdcc_cname="_EBTR_1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4480.xml b/src/devices/pic/xml_data/18F4480.xml
new file mode 100644
index 0000000..b9a87da
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4480.xml
@@ -0,0 +1,358 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4480" document="010614" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x1AA0" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FFF" word_write_align="16" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_IRCIO67"/>
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_IRCIO7" />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"   />
+      <value value="0x02" name="Software" cname="_BOREN_SBORENCTRL"  />
+      <value value="0x04" name="On_run"   cname="_BOREN_BOACTIVE" />
+      <value value="0x06" name="On"       cname="_BOREN_BOHW"    />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x82" >
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" cmask="0x10" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x10" >
+      <value value="0x00" name="1024" cname="_BBSIZ_1024" />
+      <value value="0x10" name="2048" cname="_BBSIZ_2048" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x03" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800/1000:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"            cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x03" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800/1000:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"            cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x03" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800/1000:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"            cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F44J10.xml b/src/devices/pic/xml_data/18F44J10.xml
new file mode 100644
index 0000000..ddf2019
--- /dev/null
+++ b/src/devices/pic/xml_data/18F44J10.xml
@@ -0,0 +1,129 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek                                   *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F44J10" status="IP" memory_technology="FLASH" architecture="18J" id="0x1D20" id_low_power="0x1D60">
+
+<!--* Documents ************************************************************-->
+  <documents webpage="024620" datasheet="39682" progsheet="39687" erratas="80265 80269" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="2.7" vdd_max="3.6" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="2.7" />
+    <frequency start="4" end="40" vdd_min="2.35" vdd_max="2.7" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="2.7"   max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="2.7"   max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="2.7"   max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x003FF7" word_write_align="32" word_erase_align="512" />
+  <memory name="config"       start="0x003FF8" end="0x003FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0x7F" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x07" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0xFF" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0xF8" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+  </package>
+
+  <package types="qfn" nb_pins="44" >
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F4510.xml b/src/devices/pic/xml_data/18F4510.xml
new file mode 100644
index 0000000..b038b39
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4510.xml
@@ -0,0 +1,373 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4510" document="010418" status="IP" memory_technology="FLASH" self_write="no" architecture="18F" id="0x10A0" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x007FFF" word_write_align="16" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"      />
+      <value value="0x01" name="XT"           cname="_OSC_XT"      />
+      <value value="0x02" name="HS"           cname="_OSC_HS"      />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"      />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"   />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7"  />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"     />
+      <value value="0x02" name="Software" cname="_BOREN_ON"      />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP"   />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_CP3_ON" />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x40" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x60" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4515.xml b/src/devices/pic/xml_data/18F4515.xml
new file mode 100644
index 0000000..4325432
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4515.xml
@@ -0,0 +1,361 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4515" document="010295" status="IP" memory_technology="FLASH" self_write="no" architecture="18F" id="0x0C60" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00BFFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"      />
+      <value value="0x01" name="XT"           cname="_OSC_XT"      />
+      <value value="0x02" name="HS"           cname="_OSC_HS"      />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"      />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"   />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7"  />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"     />
+      <value value="0x02" name="Software" cname="_BOREN_ON"      />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP"   />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x07" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x40" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x60" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x07" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F452.xml b/src/devices/pic/xml_data/18F452.xml
new file mode 100644
index 0000000..12ad5ce
--- /dev/null
+++ b/src/devices/pic/xml_data/18F452.xml
@@ -0,0 +1,352 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F452" document="010296" status="NR" alternative="18F4520" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0420" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0x82D8" cchecksum="0x822E" />
+    <checksum protected_blocks="1" bchecksum="0x84B7" cchecksum="0x845D" />
+    <checksum protected_blocks="3" bchecksum="0xC2B4" cchecksum="0xC25A" />
+    <checksum protected_blocks="5" bchecksum="0x02A8" cchecksum="0x02A3" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x007FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC"   value="0x07" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"    sdcc_cname="_OSC_LP" />
+      <value value="0x01" name="XT"           cname="_XT_OSC"    sdcc_cname="_OSC_XT" />
+      <value value="0x02" name="HS"           cname="_HS_OSC"    sdcc_cname="_OSC_HS" />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC"    sdcc_cname="_OSC_RC" />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"    sdcc_cname="_OSC_EC_OSC2_Clock_Out" />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"  sdcc_cname="_OSC_EC_OSC2_RA6" />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC" sdcc_cname="_OSC_HS_PLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"  sdcc_cname="_OSC_RC_OSC2" />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON"  />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  sdcc_cname="_PUT_ON" />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" sdcc_cname="_PUT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" sdcc_cname="_BODEN_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  sdcc_cname="_BODEN_ON" />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" sdcc_cname="_BODENV_4_5V" />
+      <value value="0x04" name="4.2" cname="_BORV_42" sdcc_cname="_BODENV_4_2V" />
+      <value value="0x08" name="2.7" cname="_BORV_27" sdcc_cname="_BODENV_2_7V" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" sdcc_cname="_BODENV_2_0V" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   sdcc_cname="_WDTPS_1_1" />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   sdcc_cname="_WDTPS_1_2" />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   sdcc_cname="_WDTPS_1_4" />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   sdcc_cname="_WDTPS_1_8" />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  sdcc_cname="_WDTPS_1_16" />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  sdcc_cname="_WDTPS_1_32" />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  sdcc_cname="_WDTPS_1_64" />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" sdcc_cname="_WDTPS_1_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_OFF" sdcc_cname="_CCP2MUX_RB3" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_ON"  sdcc_cname="_CCP2MUX_RC1" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  sdcc_cname="_BACKBUG_ON" />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" sdcc_cname="_BACKBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_CP0_ON"  sdcc_cname="_CP_0_ON" />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" sdcc_cname="_CP_0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  sdcc_cname="_CP_1_ON" />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" sdcc_cname="_CP_1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_CP2_ON"  sdcc_cname="_CP_2_ON" />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" sdcc_cname="_CP_2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_CP3_ON"  sdcc_cname="_CP_3_ON" />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" sdcc_cname="_CP_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_WRT0_ON"  sdcc_cname="_WRT_0_ON" />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" sdcc_cname="_WRT_0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  sdcc_cname="_WRT_1_ON" />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" sdcc_cname="_WRT_1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_WRT2_ON"  sdcc_cname="_WRT_2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" sdcc_cname="_WRT_2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_WRT3_ON"  sdcc_cname="_WRT_3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" sdcc_cname="_WRT_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_EBTR0_ON"  sdcc_cname="_EBTR_0_ON" />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" sdcc_cname="_EBTR_0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  sdcc_cname="_EBTR_1_ON" />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" sdcc_cname="_EBTR_1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_EBTR2_ON"  sdcc_cname="_EBTR_2_ON" />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" sdcc_cname="_EBTR_2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_EBTR3_ON"  sdcc_cname="_EBTR_3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" sdcc_cname="_EBTR_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4520.xml b/src/devices/pic/xml_data/18F4520.xml
new file mode 100644
index 0000000..a1a1e75
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4520.xml
@@ -0,0 +1,382 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4520" document="010297" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x1080" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x007FFF" word_write_align="16" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"      />
+      <value value="0x01" name="XT"           cname="_OSC_XT"      />
+      <value value="0x02" name="HS"           cname="_OSC_HS"      />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"      />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"   />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7"  />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"     />
+      <value value="0x02" name="Software" cname="_BOREN_ON"      />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP"   />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_CP3_ON" />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4523.xml b/src/devices/pic/xml_data/18F4523.xml
new file mode 100644
index 0000000..29b2583
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4523.xml
@@ -0,0 +1,379 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4523" document="026425" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x1090" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="12.5" nominal="9" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x007FFF" word_write_align="16" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"      />
+      <value value="0x01" name="XT"           cname="_OSC_XT"      />
+      <value value="0x02" name="HS"           cname="_OSC_HS"      />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"      />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"   />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7"  />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"     />
+      <value value="0x02" name="Software" cname="_BOREN_ON"      />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP"   />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_PORTB" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_CP3_ON" />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4525.xml b/src/devices/pic/xml_data/18F4525.xml
new file mode 100644
index 0000000..f37d90b
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4525.xml
@@ -0,0 +1,370 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4525" document="010298" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0C40" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00BFFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"      />
+      <value value="0x01" name="XT"           cname="_OSC_XT"      />
+      <value value="0x02" name="HS"           cname="_OSC_HS"      />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"      />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"   />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7"  />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"     />
+      <value value="0x02" name="Software" cname="_BOREN_ON"      />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP"   />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x07" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x07" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4539.xml b/src/devices/pic/xml_data/18F4539.xml
new file mode 100644
index 0000000..71a1f4c
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4539.xml
@@ -0,0 +1,328 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4539" document="010299" status="NR" alternative="18F4431" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0420" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0xA2BF" cchecksum="0xA215" />
+    <checksum protected_blocks="1" bchecksum="0xA4A5" cchecksum="0xA43C" />
+    <checksum protected_blocks="3" bchecksum="0xE2A2" cchecksum="0xE239" />
+    <checksum protected_blocks="4" bchecksum="0x029E" cchecksum="0x028A" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x005FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC" value="0x07" >
+      <value value="default" name="invalid" />
+      <value value="0x02" name="HS"        cname="_OSC_HS"    />
+      <value value="0x04" name="EC_CLKOUT" cname="_OSC_EC"    />
+      <value value="0x05" name="EC_IO"     cname="_OSC_ECIO"  />
+      <value value="0x06" name="H4"        cname="_OSC_HSPLL" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.5" cname="_BORV_25" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x07" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x07" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4550.xml b/src/devices/pic/xml_data/18F4550.xml
new file mode 100644
index 0000000..b0e26c8
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4550.xml
@@ -0,0 +1,402 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4550" document="010300" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x1200" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="48" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0"  end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4"  end="16" vdd_min="3" vdd_max="5.5" />
+    <frequency start="16" end="25"  vdd_min="4" vdd_max="5.5" />
+    <frequency start="25"  end="48" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x007FFF" word_write_align="16" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" >
+    <mask name="PLLDIV" value="0x07" >
+      <value value="0x00" name="1"  cname="_PLLDIV_1"  sdcc_cname="_PLLDIV_NO_DIVIDE__4MHZ_INPUT_" />
+      <value value="0x01" name="2"  cname="_PLLDIV_2"  sdcc_cname="_PLLDIV_DIVIDE_BY_2__8MHZ_INPUT_" />
+      <value value="0x02" name="3"  cname="_PLLDIV_3"  sdcc_cname="_PLLDIV_DIVIDE_BY_3__12MHZ_INPUT_" />
+      <value value="0x03" name="4"  cname="_PLLDIV_4"  sdcc_cname="_PLLDIV_DIVIDE_BY_4__16MHZ_INPUT_" />
+      <value value="0x04" name="5"  cname="_PLLDIV_5"  sdcc_cname="_PLLDIV_DIVIDE_BY_5__20MHZ_INPUT_" />
+      <value value="0x05" name="6"  cname="_PLLDIV_6"  sdcc_cname="_PLLDIV_DIVIDE_BY_6__24MHZ_INPUT_" />
+      <value value="0x06" name="10" cname="_PLLDIV_10" sdcc_cname="_PLLDIV_DIVIDE_BY_10__40MHZ_INPUT_" />
+      <value value="0x07" name="12" cname="_PLLDIV_12" sdcc_cname="_PLLDIV_DIVIDE_BY_12__48MHZ_INPUT_" />
+    </mask>
+    <mask name="CPUDIV" value="0x18" >
+      <value value="0x00" name="1" cname="_CPUDIV_OSC1_PLL2" sdcc_cname="_CPUDIV__OSC1_OSC2_SRC___1__96MHZ_PLL_SRC___2_" />
+      <value value="0x08" name="2" cname="_CPUDIV_OSC2_PLL3" sdcc_cname="_CPUDIV__OSC1_OSC2_SRC___2__96MHZ_PLL_SRC___3_" />
+      <value value="0x10" name="3" cname="_CPUDIV_OSC3_PLL4" sdcc_cname="_CPUDIV__OSC1_OSC2_SRC___3__96MHZ_PLL_SRC___4_" />
+      <value value="0x18" name="4" cname="_CPUDIV_OSC4_PLL6" sdcc_cname="_CPUDIV__OSC1_OSC2_SRC___4__96MHZ_PLL_SRC___6_" />
+    </mask>
+    <mask name="USBDIV" value="0x20" >
+      <value value="0x00" name="1" cname="_USBDIV_1" sdcc_cname="_USBPLL_CLOCK_SRC_FROM_OSC1_OSC2" />
+      <value value="0x20" name="2" cname="_USBDIV_2" sdcc_cname="_USBPLL_CLOCK_SRC_FROM_96MHZ_PLL_2" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x05" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="XT"           cname="_FOSC_XT_XT"       sdcc_cname="_OSC_XT__USB_XT" />
+      <value value="0x01" name="XT"           cname="_FOSC_XT_XT"       sdcc_cname="_OSC_XT__USB_XT" />
+      <value value="0x02" name="XTPLL"        cname="_FOSC_XTPLL"       sdcc_cname="_OSC_XT__XT_PLL__USB_XT" />
+      <value value="0x03" name="XTPLL"        cname="_FOSC_XTPLL_XT"    sdcc_cname="_OSC_XT__XT_PLL__USB_XT" />
+      <value value="0x04" name="EC_IO"        cname="_FOSC_ECIO_EC"     sdcc_cname="_OSC_EC__EC_RA6__USB_EC" />
+      <value value="0x05" name="EC_CLKOUT"    cname="_FOSC_EC_EC"       sdcc_cname="_OSC_EC__EC_CLKO_RA6___USB_EC" />
+      <value value="0x06" name="ECPLL_IO"     cname="_FOSC_ECPLLIO_EC"  sdcc_cname="_OSC_EC__EC_PLL__EC_PLL_RA6__USB_EC" />
+      <value value="0x07" name="ECPLL_CLKOUT" cname="_FOSC_ECPLL_EC"    sdcc_cname="_OSC_EC__EC_PLL__EC_PLL_CLKO_RA6___USB_EC" />
+      <value value="0x08" name="INTRC_IO"     cname="_FOSC_INTOSCIO_EC" sdcc_cname="_OSC_INTOSC__INTOSC_RA6__USB_EC" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_FOSC_INTOSC_EC"   sdcc_cname="_OSC_INTOSC__INTOSC_CLK0_RA6___USB_EC" />
+      <value value="0x0A" name="INTXT"        cname="_FOSC_INTOSC_XT"   sdcc_cname="_OSC_INTOSC__USB_XT" />
+      <value value="0x0B" name="INTHS"        cname="_FOSC_INTOSC_HS"   sdcc_cname="_OSC_INTOSC__USB_HS" />
+      <value value="0x0C" name="HS"           cname="_FOSC_HS"          sdcc_cname="_OSC_HS__USB_HS" />
+      <value value="0x0D" name="HS"           cname="_FOSC_HS"          sdcc_cname="_OSC_HS__USB_HS" />
+      <value value="0x0E" name="HSPLL"        cname="_FOSC_HSPLL_HS"    sdcc_cname="_OSC_HS__HS_PLL__USB_HS" />
+      <value value="0x0F" name="HSPLL"        cname="_FOSC_HSPLL_HS"    sdcc_cname="_OSC_HS__HS_PLL__USB_HS" />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEM_OFF" sdcc_cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEM_ON"  sdcc_cname="_FCMEN_ON" />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE"  value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  sdcc_cname="_PUT_ON" />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" sdcc_cname="_PUT_OFF" />
+    </mask>
+    <mask name="BODEN"  value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOR_OFF"       sdcc_cname="_BODEN_OFF" />
+      <value value="0x02" name="Software" cname="_BOR_SOFT"      sdcc_cname="_BODEN_CONTROLLED_WITH_SBOREN_BIT" />
+      <value value="0x04" name="On_run"   cname="_BOR_ON_ACTIVE" sdcc_cname="_BODEN_ON_WHILE_ACTIVE" />
+      <value value="0x06" name="On"       cname="_BOR_ON"        sdcc_cname="_BODEN_ON" />
+    </mask>
+    <mask name="BORV"   value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" sdcc_cname="_BODENV_4_5V" />
+      <value value="0x08" name="4.2" cname="_BORV_1" sdcc_cname="_BODENV_4_2V" />
+      <value value="0x10" name="2.7" cname="_BORV_2" sdcc_cname="_BODENV_2_7V" />
+      <value value="0x18" name="2.0" cname="_BORV_3" sdcc_cname="_BODENV_2_0V" />
+    </mask>
+    <mask name="VREGEN" value="0x20" >
+      <value value="0x00" name="Off" cname="_VREGEN_OFF" />
+      <value value="0x20" name="On"  cname="_VREGEN_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" sdcc_cname="_WDT_DISABLED_CONTROLLED" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  sdcc_cname="_WDT_ON" />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     sdcc_cname="_WDTPS_1_1" />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     sdcc_cname="_WDTPS_1_2" />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     sdcc_cname="_WDTPS_1_4" />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     sdcc_cname="_WDTPS_1_8" />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    sdcc_cname="_WDTPS_1_16" />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    sdcc_cname="_WDTPS_1_32" />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    sdcc_cname="_WDTPS_1_64" />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   sdcc_cname="_WDTPS_1_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   sdcc_cname="_WDTPS_1_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   sdcc_cname="_WDTPS_1_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  sdcc_cname="_WDTPS_1_1024" />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  sdcc_cname="_WDTPS_1_2048" />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  sdcc_cname="_WDTPS_1_4096" />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  sdcc_cname="_WDTPS_1_8192" />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" sdcc_cname="_WDTPS_1_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" sdcc_cname="_WDTPS_1_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_OFF" sdcc_cname="_CCP2MUX_RB3" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_ON"  sdcc_cname="_CCP2MUX_RC1" />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" sdcc_cname="_PBADEN_PORTB_4_0__CONFIGURED_AS_DIGITAL_I_O_ON_RESET" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  sdcc_cname="_PBADEN_PORTB_4_0__CONFIGURED_AS_ANALOG_INPUTS_ON_RESET" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" sdcc_cname="_MCLRE_MCLR_OFF_RE3_ON" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  sdcc_cname="_MCLRE_MCLR_ON_RE3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" cmask="0x20" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" sdcc_cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  sdcc_cname="_STVR_ON" />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="ICPORT" value="0x20" >
+      <value value="0x00" name="Off" cname="_ICPRT_OFF" sdcc_cname="_ENICPORT_OFF" />
+      <value value="0x20" name="On"  cname="_ICPRT_ON"  sdcc_cname="_ENICPORT_ON" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" sdcc_cname="_ENHCPU_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  sdcc_cname="_ENHCPU_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  sdcc_cname="_BACKBUG_ON" />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" sdcc_cname="_BACKBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_CP0_ON"  sdcc_cname="_CP_0_ON" />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" sdcc_cname="_CP_0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  sdcc_cname="_CP_1_ON" />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" sdcc_cname="_CP_1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_CP2_ON"  sdcc_cname="_CP_2_ON" />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" sdcc_cname="_CP_2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_CP3_ON"  sdcc_cname="_CP_3_ON" />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" sdcc_cname="_CP_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x40" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_WRT0_ON"  sdcc_cname="_WRT_0_ON" />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" sdcc_cname="_WRT_0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  sdcc_cname="_WRT_1_ON" />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" sdcc_cname="_WRT_1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_WRT2_ON"  sdcc_cname="_WRT_2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" sdcc_cname="_WRT_2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_WRT3_ON"  sdcc_cname="_WRT_3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" sdcc_cname="_WRT_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x60" cmask="0x40" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_EBTR0_ON"  sdcc_cname="_EBTR_0_ON" />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" sdcc_cname="_EBTR_0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  sdcc_cname="_EBTR_1_ON" />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" sdcc_cname="_EBTR_1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_EBTR2_ON"  sdcc_cname="_EBTR_2_ON" />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" sdcc_cname="_EBTR_2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_EBTR3_ON"  sdcc_cname="_EBTR_3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" sdcc_cname="_EBTR_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F458.xml b/src/devices/pic/xml_data/18F458.xml
new file mode 100644
index 0000000..33069dd
--- /dev/null
+++ b/src/devices/pic/xml_data/18F458.xml
@@ -0,0 +1,347 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F458" document="010301" status="NR" alternative="18F4580" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0860" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0x82D7" cchecksum="0x822D" />
+    <checksum protected_blocks="1" bchecksum="0x84B5" cchecksum="0x845B" />
+    <checksum protected_blocks="3" bchecksum="0xC2B2" cchecksum="0xC258" />
+    <checksum protected_blocks="5" bchecksum="0x02A6" cchecksum="0x02A1" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x007FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC"   value="0x07" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"    sdcc_cname="_OSC_LP" />
+      <value value="0x01" name="XT"           cname="_XT_OSC"    sdcc_cname="_OSC_XT" />
+      <value value="0x02" name="HS"           cname="_HS_OSC"    sdcc_cname="_OSC_HS" />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC"    sdcc_cname="_OSC_RC" />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"    sdcc_cname="_OSC_EC_OSC2_Clock_Out" />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"  sdcc_cname="_OSC_EC_OSC2_RA6" />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC" sdcc_cname="_OSC_HS_PLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"  sdcc_cname="_OSC_RC_OSC2" />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON"  />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  sdcc_cname="_PUT_ON" />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" sdcc_cname="_PUT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" sdcc_cname="_BODEN_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  sdcc_cname="_BODEN_ON" />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" sdcc_cname="_BODENV_4_5V" />
+      <value value="0x04" name="4.2" cname="_BORV_42" sdcc_cname="_BODENV_4_2V" />
+      <value value="0x08" name="2.7" cname="_BORV_27" sdcc_cname="_BODENV_2_7V" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" sdcc_cname="_BODENV_2_0V" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   sdcc_cname="_WDTPS_1_1" />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   sdcc_cname="_WDTPS_1_2" />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   sdcc_cname="_WDTPS_1_4" />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   sdcc_cname="_WDTPS_1_8" />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  sdcc_cname="_WDTPS_1_16" />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  sdcc_cname="_WDTPS_1_32" />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  sdcc_cname="_WDTPS_1_64" />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" sdcc_cname="_WDTPS_1_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  sdcc_cname="_BACKBUG_ON" />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" sdcc_cname="_BACKBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_CP0_ON"  sdcc_cname="_CP_0_ON" />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" sdcc_cname="_CP_0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  sdcc_cname="_CP_1_ON" />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" sdcc_cname="_CP_1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_CP2_ON"  sdcc_cname="_CP_2_ON" />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" sdcc_cname="_CP_2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_CP3_ON"  sdcc_cname="_CP_3_ON" />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" sdcc_cname="_CP_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_WRT0_ON"  sdcc_cname="_WRT_0_ON" />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" sdcc_cname="_WRT_0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  sdcc_cname="_WRT_1_ON" />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" sdcc_cname="_WRT_1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_WRT2_ON"  sdcc_cname="_WRT_2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" sdcc_cname="_WRT_2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_WRT3_ON"  sdcc_cname="_WRT_3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" sdcc_cname="_WRT_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:1FFF" cname="_EBTR0_ON"  sdcc_cname="_EBTR_0_ON" />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" sdcc_cname="_EBTR_0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  sdcc_cname="_EBTR_1_ON" />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" sdcc_cname="_EBTR_1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_EBTR2_ON"  sdcc_cname="_EBTR_2_ON" />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" sdcc_cname="_EBTR_2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_EBTR3_ON"  sdcc_cname="_EBTR_3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" sdcc_cname="_EBTR_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4580.xml b/src/devices/pic/xml_data/18F4580.xml
new file mode 100644
index 0000000..e6e105a
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4580.xml
@@ -0,0 +1,382 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4580" document="010615" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x1A80" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x007FFF" word_write_align="16" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0000FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_IRCIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_IRCIO7" />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"   />
+      <value value="0x02" name="Software" cname="_BOREN_SBORENCTRL"  />
+      <value value="0x04" name="On_run"   cname="_BOREN_BOACTIVE" />
+      <value value="0x06" name="On"       cname="_BOREN_BOHW"    />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x82" >
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" cmask="0x10" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x10" >
+      <value value="0x00" name="1024" cname="_BBSIZ_1024" />
+      <value value="0x10" name="2048" cname="_BBSIZ_2048" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800/1000:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"            cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800/1000:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"            cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800/1000:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"            cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4585.xml b/src/devices/pic/xml_data/18F4585.xml
new file mode 100644
index 0000000..fb438b8
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4585.xml
@@ -0,0 +1,372 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4585" document="010302" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0EA0" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00BFFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_IRCIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_IRCIO7" />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"   />
+      <value value="0x02" name="Software" cname="_BOREN_SBORENCTRL"  />
+      <value value="0x04" name="On_run"   cname="_BOREN_BOACTIVE" />
+      <value value="0x06" name="On"       cname="_BOREN_BOHW"    />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x82" >
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" cmask="0x30" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x30" >
+      <value value="0x00" name="1024" cname="_BBSIZ_1024" />
+      <value value="0x10" name="2048" cname="_BBSIZ_2048" />
+      <value value="0x20" name="4096" cname="_BBSIZ_4096" />
+      <value value="0x30" name="4096" cname="_BBSIZ_4096" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x07" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"                 cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"                 cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x07" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"                 cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F45J10.xml b/src/devices/pic/xml_data/18F45J10.xml
new file mode 100644
index 0000000..af2c752
--- /dev/null
+++ b/src/devices/pic/xml_data/18F45J10.xml
@@ -0,0 +1,129 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek                                   *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F45J10" status="IP" memory_technology="FLASH" architecture="18J" id="0x1C20" id_low_power="0x1C60">
+
+<!--* Documents ************************************************************-->
+  <documents webpage="024619" datasheet="39682" progsheet="39687" erratas="80265 80269" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="2.7" vdd_max="3.6" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="2.7" />
+    <frequency start="4" end="40" vdd_min="2.35" vdd_max="2.7" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="2.7"   max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="2.7"   max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="2.7"   max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x007FF7" word_write_align="32" word_erase_align="512" />
+  <memory name="config"       start="0x007FF8" end="0x007FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0x7F" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x07" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0xFF" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0xF8" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+  </package>
+
+  <package types="qfn" nb_pins="44" >
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F4610.xml b/src/devices/pic/xml_data/18F4610.xml
new file mode 100644
index 0000000..d105cdb
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4610.xml
@@ -0,0 +1,373 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4610" document="010303" status="IP" memory_technology="FLASH" self_write="no" architecture="18F" id="0x0C20" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00FFFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"      />
+      <value value="0x01" name="XT"           cname="_OSC_XT"      />
+      <value value="0x02" name="HS"           cname="_OSC_HS"      />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"      />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"   />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7"  />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"     />
+      <value value="0x02" name="Software" cname="_BOREN_ON"      />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP"   />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON" />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x40" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x60" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4620.xml b/src/devices/pic/xml_data/18F4620.xml
new file mode 100644
index 0000000..5964590
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4620.xml
@@ -0,0 +1,371 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4620" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0C00" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010304" datasheet="39626" progsheet="39622" erratas="80222 80200 80224 80282" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00FFFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"      />
+      <value value="0x01" name="XT"           cname="_OSC_XT"      />
+      <value value="0x02" name="HS"           cname="_OSC_HS"      />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"      />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"      />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"   />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7"  />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  sdcc_cname="_PUT_ON" />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" sdcc_cname="_PUT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"     sdcc_cname="_BODEN_OFF" />
+      <value value="0x02" name="Software" cname="_BOREN_ON"      sdcc_cname="_BODEN_ON" />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP"   sdcc_cname="_BODEN_ON_WHILE_ACTIVE" />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" sdcc_cname="_BODEN_CONTROLLED_WITH_SBOREN_BIT" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.6" cname="_BORV_0" sdcc_cname="_BODENV_4_5V" />
+      <value value="0x08" name="4.3" cname="_BORV_1" sdcc_cname="_BODENV_4_2V" />
+      <value value="0x10" name="2.8" cname="_BORV_2" sdcc_cname="_BODENV_2_7V" />
+      <value value="0x18" name="2.1" cname="_BORV_3" sdcc_cname="_BODENV_2_0V" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" sdcc_cname="_WDT_DISABLED_CONTROLLED" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     sdcc_cname="_WDTPS_1_1" />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     sdcc_cname="_WDTPS_1_2" />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     sdcc_cname="_WDTPS_1_4" />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     sdcc_cname="_WDTPS_1_8" />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    sdcc_cname="_WDTPS_1_16" />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    sdcc_cname="_WDTPS_1_32" />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    sdcc_cname="_WDTPS_1_64" />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   sdcc_cname="_WDTPS_1_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   sdcc_cname="_WDTPS_1_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   sdcc_cname="_WDTPS_1_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  sdcc_cname="_WDTPS_1_1024" />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  sdcc_cname="_WDTPS_1_2048" />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  sdcc_cname="_WDTPS_1_4096" />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  sdcc_cname="_WDTPS_1_8192" />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" sdcc_cname="_WDTPS_1_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" sdcc_cname="_WDTPS_1_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x01" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_PORTBE" sdcc_cname="_CCP2MUX_RB3" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC"  sdcc_cname="_CCP2MUX_RC1" />
+    </mask>
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" sdcc_cname="_PBADEN_PORTB_4_0__CONFIGURED_AS_DIGITAL_I_O_ON_RESET" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON"  sdcc_cname="_PBADEN_PORTB_4_0__CONFIGURED_AS_ANALOG_INPUTS_ON_RESET" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" sdcc_cname="_MCLRE_MCLR_OFF_RE3_ON" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  sdcc_cname="_MCLRE_MCLR_ON_RE3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" sdcc_cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  sdcc_cname="_STVR_ON" />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  sdcc_cname="_BACKBUG_ON" />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" sdcc_cname="_BACKBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_CP0_ON"  sdcc_cname="_CP_0_ON" />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" sdcc_cname="_CP_0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  sdcc_cname="_CP_1_ON" />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" sdcc_cname="_CP_1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  sdcc_cname="_CP_2_ON" />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" sdcc_cname="_CP_2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON"  sdcc_cname="_CP_3_ON" />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" sdcc_cname="_CP_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x40" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_WRT0_ON"  sdcc_cname="_WRT_0_ON" />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" sdcc_cname="_WRT_0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  sdcc_cname="_WRT_1_ON" />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" sdcc_cname="_WRT_1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON"  sdcc_cname="_WRT_2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" sdcc_cname="_WRT_2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON"  sdcc_cname="_WRT_3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" sdcc_cname="_WRT_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x60" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_EBTR0_ON"  sdcc_cname="_EBTR_0_ON" />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" sdcc_cname="_EBTR_0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  sdcc_cname="_EBTR_1_ON" />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" sdcc_cname="_EBTR_1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  sdcc_cname="_EBTR_2_ON" />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" sdcc_cname="_EBTR_2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON"  sdcc_cname="_EBTR_3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" sdcc_cname="_EBTR_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4680.xml b/src/devices/pic/xml_data/18F4680.xml
new file mode 100644
index 0000000..f5ef137
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4680.xml
@@ -0,0 +1,384 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4680" document="010305" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0E80" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00FFFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_IRCIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_IRCIO7" />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"   />
+      <value value="0x02" name="Software" cname="_BOREN_SBORENCTRL"  />
+      <value value="0x04" name="On_run"   cname="_BOREN_BOACTIVE" />
+      <value value="0x06" name="On"       cname="_BOREN_BOHW"    />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x82" >
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" cmask="0x30" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x30" >
+      <value value="0x00" name="1024" cname="_BBSIZ_1024" />
+      <value value="0x10" name="2048" cname="_BBSIZ_2048" />
+      <value value="0x20" name="4096" cname="_BBSIZ_4096" />
+      <value value="0x30" name="4096" cname="_BBSIZ_4096" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"                 cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"                 cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"                 cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4682.xml b/src/devices/pic/xml_data/18F4682.xml
new file mode 100644
index 0000000..19b387b
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4682.xml
@@ -0,0 +1,390 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4682" document="026325" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x2740" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x013FFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_IRCIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_IRCIO7" />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"   />
+      <value value="0x02" name="Software" cname="_BOREN_SBORENCTRL"  />
+      <value value="0x04" name="On_run"   cname="_BOREN_BOACTIVE" />
+      <value value="0x06" name="On"       cname="_BOREN_BOHW"    />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x82" >
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" cmask="0x30" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x30" >
+      <value value="0x00" name="1024" cname="_BBSIZ_1024" />
+      <value value="0x10" name="2048" cname="_BBSIZ_2048" />
+      <value value="0x20" name="4096" cname="_BBSIZ_4096" />
+      <value value="0x30" name="4096" cname="_BBSIZ_4096" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"                 cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON" />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+    <mask name="CP_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_CP4_ON" />
+      <value value="0x10" name="Off"         cname="_CP4_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"                 cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+    <mask name="WRT_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_WRT4_ON" />
+      <value value="0x10" name="Off"         cname="_WRT4_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"                 cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+    <mask name="EBTR_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_EBTR4_ON" />
+      <value value="0x10" name="Off"         cname="_EBTR4_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F4685.xml b/src/devices/pic/xml_data/18F4685.xml
new file mode 100644
index 0000000..7b68ee2
--- /dev/null
+++ b/src/devices/pic/xml_data/18F4685.xml
@@ -0,0 +1,402 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F4685" document="026324" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x2760" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9" max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="3" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x017FFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_IRCIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_IRCIO7" />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF"   />
+      <value value="0x02" name="Software" cname="_BOREN_SBORENCTRL"  />
+      <value value="0x04" name="On_run"   cname="_BOREN_BOACTIVE" />
+      <value value="0x06" name="On"       cname="_BOREN_BOHW"    />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"     />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"     />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"     />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"     />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"    />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"    />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"    />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128"   />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256"   />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512"   />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x82" >
+    <mask name="PBADEN"  value="0x02" >
+      <value value="0x00" name="digital" cname="_PBADEN_OFF" />
+      <value value="0x02" name="analog"  cname="_PBADEN_ON" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON"  />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" cmask="0x30" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x30" >
+      <value value="0x00" name="1024" cname="_BBSIZ_1024" />
+      <value value="0x10" name="2048" cname="_BBSIZ_2048" />
+      <value value="0x20" name="4096" cname="_BBSIZ_4096" />
+      <value value="0x30" name="4096" cname="_BBSIZ_4096" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x3F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"                 cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON" />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+    <mask name="CP_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_CP4_ON" />
+      <value value="0x10" name="Off"         cname="_CP4_OFF" />
+    </mask>
+    <mask name="CP_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_CP5_ON" />
+      <value value="0x20" name="Off"         cname="_CP5_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x3F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"                 cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+    <mask name="WRT_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_WRT4_ON" />
+      <value value="0x10" name="Off"         cname="_WRT4_OFF" />
+    </mask>
+    <mask name="WRT_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_WRT5_ON" />
+      <value value="0x20" name="Off"         cname="_WRT5_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x3F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"                 cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+    <mask name="EBTR_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_EBTR4_ON" />
+      <value value="0x10" name="Off"         cname="_EBTR4_OFF" />
+    </mask>
+    <mask name="EBTR_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_EBTR5_ON" />
+      <value value="0x20" name="Off"         cname="_EBTR5_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON"  />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F6310.xml b/src/devices/pic/xml_data/18F6310.xml
new file mode 100644
index 0000000..9bdbfb7
--- /dev/null
+++ b/src/devices/pic/xml_data/18F6310.xml
@@ -0,0 +1,250 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F6310" document="019698" status="IP" memory_technology="FLASH" self_write="no" architecture="18F" id="0x0BE0" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xE20C" cchecksum="0xE162" />
+    <checksum protected="All" bchecksum="0x0227" cchecksum="0x0222" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"   max="12"  nominal="11" />
+  <voltages name="vdd_prog"       min="2.75" max="5.5" nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"    max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x001FFF" word_write_align="8" word_erase_align="0" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF" />
+      <value value="0x02" name="Software" cname="_BOREN_ON" />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xC3" >
+    <mask name="PM"   value="0x03" >
+      <value value="0x00" name="Extended microcontroller" cname="_PM_EM" />
+      <value value="0x01" name="Microprocessor with boot" cname="_PM_MPB" />
+      <value value="0x02" name="Microprocessor"           cname="_PM_MP" />
+      <value value="0x03" name="Microcontroller"          cname="_PM_MC" />
+    </mask>
+    <mask name="BW"   value="0x40" >
+      <value value="0x00" name="8"  cname="_BW_8" />
+      <value value="0x40" name="16" cname="_BW_16" />
+    </mask>
+    <mask name="WAIT" value="0x80" >
+      <value value="0x00" name="On"  cname="_WAIT_ON" />
+      <value value="0x80" name="Off" cname="_WAIT_OFF" />
+    </mask>
+  </config>
+  
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x81" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RE7/RB3" cname="_CCP2MX_PORTE" />
+      <value value="0x01" name="RC1"     cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON" />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x81" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x01" >
+    <mask name="CP" value="0x01" >
+      <value value="0x00" name="All" cname="_CP_ON" />
+      <value value="0x01" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x01" >
+    <mask name="EBTR" value="0x01" >
+      <value value="0x00" name="All" cname="_EBTR_ON" />
+      <value value="0x01" name="Off" cname="_EBTR_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x00" />
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F6390.xml b/src/devices/pic/xml_data/18F6390.xml
new file mode 100644
index 0000000..02f2498
--- /dev/null
+++ b/src/devices/pic/xml_data/18F6390.xml
@@ -0,0 +1,250 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F6390" document="019705" status="IP" memory_technology="FLASH" self_write="no" architecture="18F" id="0x0BA0" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xE20C" cchecksum="0xE162" />
+    <checksum protected="All" bchecksum="0x0227" cchecksum="0x0222" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"   max="12"  nominal="11" />
+  <voltages name="vdd_prog"       min="2.75" max="5.5" nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"    max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x001FFF" word_write_align="8" word_erase_align="0" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF" />
+      <value value="0x02" name="Software" cname="_BOREN_ON" />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xC3" >
+    <mask name="PM"   value="0x03" >
+      <value value="0x00" name="Extended microcontroller" cname="_PM_EM" />
+      <value value="0x01" name="Microprocessor with boot" cname="_PM_MPB" />
+      <value value="0x02" name="Microprocessor"           cname="_PM_MP" />
+      <value value="0x03" name="Microcontroller"          cname="_PM_MC" />
+    </mask>
+    <mask name="BW"   value="0x40" >
+      <value value="0x00" name="8"  cname="_BW_8" />
+      <value value="0x40" name="16" cname="_BW_16" />
+    </mask>
+    <mask name="WAIT" value="0x80" >
+      <value value="0x00" name="On"  cname="_WAIT_ON" />
+      <value value="0x80" name="Off" cname="_WAIT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x81" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RE7/RB3" cname="_CCP2MX_PORTE" />
+      <value value="0x01" name="RC1"     cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON" />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x81" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x01" >
+    <mask name="CP" value="0x01" >
+      <value value="0x00" name="All" cname="_CP_ON" />
+      <value value="0x01" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x01" >
+    <mask name="EBTR" value="0x01" >
+      <value value="0x00" name="All" cname="_EBTR_ON" />
+      <value value="0x01" name="Off" cname="_EBTR_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x00" />
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F6393.xml b/src/devices/pic/xml_data/18F6393.xml
new file mode 100644
index 0000000..bc778f4
--- /dev/null
+++ b/src/devices/pic/xml_data/18F6393.xml
@@ -0,0 +1,253 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F6393" status="IP" memory_technology="FLASH" self_write="no" architecture="18F" id="0x1A00" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="530835" datasheet="39896" progsheet="39624" erratas="" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xC20C" cchecksum="0xC162" />
+    <checksum protected="All" bchecksum="0x0225" cchecksum="0x0220" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"   max="12"  nominal="11" />
+  <voltages name="vdd_prog"       min="2.75" max="5.5" nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"    max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x001FFF" word_write_align="8" word_erase_align="0" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF" />
+      <value value="0x02" name="Software" cname="_BOREN_ON" />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xC3" >
+    <mask name="PM"   value="0x03" >
+      <value value="0x00" name="Extended microcontroller" cname="_PM_EM" />
+      <value value="0x01" name="Microprocessor with boot" cname="_PM_MPB" />
+      <value value="0x02" name="Microprocessor"           cname="_PM_MP" />
+      <value value="0x03" name="Microcontroller"          cname="_PM_MC" />
+    </mask>
+    <mask name="BW"   value="0x40" >
+      <value value="0x00" name="8"  cname="_BW_8" />
+      <value value="0x40" name="16" cname="_BW_16" />
+    </mask>
+    <mask name="WAIT" value="0x80" >
+      <value value="0x00" name="On"  cname="_WAIT_ON" />
+      <value value="0x80" name="Off" cname="_WAIT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x81" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RE7/RB3" cname="_CCP2MX_PORTE" />
+      <value value="0x01" name="RC1"     cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON" />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x81" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x01" >
+    <mask name="CP" value="0x01" >
+      <value value="0x00" name="All" cname="_CP_ON" />
+      <value value="0x01" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x01" >
+    <mask name="EBTR" value="0x01" >
+      <value value="0x00" name="All" cname="_EBTR_ON" />
+      <value value="0x01" name="Off" cname="_EBTR_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x00" />
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F63J11.xml b/src/devices/pic/xml_data/18F63J11.xml
new file mode 100644
index 0000000..37273bc
--- /dev/null
+++ b/src/devices/pic/xml_data/18F63J11.xml
@@ -0,0 +1,185 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F63J11" status="IP" memory_technology="FLASH" architecture="18J" id="0x3900" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="026365" datasheet="39774" progsheet="39644" erratas="80318" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x001FF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x001FF8" end="0x001FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F63J90.xml b/src/devices/pic/xml_data/18F63J90.xml
new file mode 100644
index 0000000..ef1310c
--- /dev/null
+++ b/src/devices/pic/xml_data/18F63J90.xml
@@ -0,0 +1,184 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F63J90" status="IP" memory_technology="FLASH" architecture="18J" id="0x3800" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="026347" datasheet="39774" progsheet="39770" erratas="80286 80312" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x001FF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x001FF8" end="0x001FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F6410.xml b/src/devices/pic/xml_data/18F6410.xml
new file mode 100644
index 0000000..c270208
--- /dev/null
+++ b/src/devices/pic/xml_data/18F6410.xml
@@ -0,0 +1,250 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F6410" document="019711" status="IP" memory_technology="FLASH" self_write="no" architecture="18F" id="0x06E0" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xC20C" cchecksum="0xC162" />
+    <checksum protected="All" bchecksum="0x0225" cchecksum="0x0220" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"   max="12"  nominal="11" />
+  <voltages name="vdd_prog"       min="2.75" max="5.5" nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"    max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FFF" word_write_align="8" word_erase_align="0" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF" />
+      <value value="0x02" name="Software" cname="_BOREN_ON" />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xC3" >
+    <mask name="PM"   value="0x03" >
+      <value value="0x00" name="Extended microcontroller" cname="_PM_EM" />
+      <value value="0x01" name="Microprocessor with boot" cname="_PM_MPB" />
+      <value value="0x02" name="Microprocessor"           cname="_PM_MP" />
+      <value value="0x03" name="Microcontroller"          cname="_PM_MC" />
+    </mask>
+    <mask name="BW"   value="0x40" >
+      <value value="0x00" name="8"  cname="_BW_8" />
+      <value value="0x40" name="16" cname="_BW_16" />
+    </mask>
+    <mask name="WAIT" value="0x80" >
+      <value value="0x00" name="On"  cname="_WAIT_ON" />
+      <value value="0x80" name="Off" cname="_WAIT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x81" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RE7/RB3" cname="_CCP2MX_PORTE" />
+      <value value="0x01" name="RC1"     cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON" />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x81" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x01" >
+    <mask name="CP" value="0x01" >
+      <value value="0x00" name="All" cname="_CP_ON" />
+      <value value="0x01" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x01" >
+    <mask name="EBTR" value="0x01" >
+      <value value="0x00" name="All" cname="_EBTR_ON" />
+      <value value="0x01" name="Off" cname="_EBTR_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x00" />
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F6490.xml b/src/devices/pic/xml_data/18F6490.xml
new file mode 100644
index 0000000..1727686
--- /dev/null
+++ b/src/devices/pic/xml_data/18F6490.xml
@@ -0,0 +1,250 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F6490" document="010307" status="IP" memory_technology="FLASH" self_write="no" architecture="18F" id="0x06A0" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xC20C" cchecksum="0xC162" />
+    <checksum protected="All" bchecksum="0x0225" cchecksum="0x0220" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"   max="12"  nominal="11" />
+  <voltages name="vdd_prog"       min="2.75" max="5.5" nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"    max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FFF" word_write_align="8" word_erase_align="0" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF" />
+      <value value="0x02" name="Software" cname="_BOREN_ON" />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xC3" >
+    <mask name="PM"   value="0x03" >
+      <value value="0x00" name="Extended microcontroller" cname="_PM_EM" />
+      <value value="0x01" name="Microprocessor with boot" cname="_PM_MPB" />
+      <value value="0x02" name="Microprocessor"           cname="_PM_MP" />
+      <value value="0x03" name="Microcontroller"          cname="_PM_MC" />
+    </mask>
+    <mask name="BW"   value="0x40" >
+      <value value="0x00" name="8"  cname="_BW_8" />
+      <value value="0x40" name="16" cname="_BW_16" />
+    </mask>
+    <mask name="WAIT" value="0x80" >
+      <value value="0x00" name="On"  cname="_WAIT_ON" />
+      <value value="0x80" name="Off" cname="_WAIT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x81" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RE7/RB3" cname="_CCP2MX_PORTE" />
+      <value value="0x01" name="RC1"     cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON" />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x81" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x01" >
+    <mask name="CP" value="0x01" >
+      <value value="0x00" name="All" cname="_CP_ON" />
+      <value value="0x01" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x01" >
+    <mask name="EBTR" value="0x01" >
+      <value value="0x00" name="All" cname="_EBTR_ON" />
+      <value value="0x01" name="Off" cname="_EBTR_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x00" />
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F6493.xml b/src/devices/pic/xml_data/18F6493.xml
new file mode 100644
index 0000000..89f409d
--- /dev/null
+++ b/src/devices/pic/xml_data/18F6493.xml
@@ -0,0 +1,253 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F6493" status="IP" memory_technology="FLASH" self_write="no" architecture="18F" id="0x0E00" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="530834" datasheet="39896" progsheet="39624" erratas="" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xC20C" cchecksum="0xC162" />
+    <checksum protected="All" bchecksum="0x0225" cchecksum="0x0220" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"   max="12"  nominal="11" />
+  <voltages name="vdd_prog"       min="2.75" max="5.5" nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"    max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x003FFF" word_write_align="8" word_erase_align="0" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF" />
+      <value value="0x02" name="Software" cname="_BOREN_ON" />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xC3" >
+    <mask name="PM"   value="0x03" >
+      <value value="0x00" name="Extended microcontroller" cname="_PM_EM" />
+      <value value="0x01" name="Microprocessor with boot" cname="_PM_MPB" />
+      <value value="0x02" name="Microprocessor"           cname="_PM_MP" />
+      <value value="0x03" name="Microcontroller"          cname="_PM_MC" />
+    </mask>
+    <mask name="BW"   value="0x40" >
+      <value value="0x00" name="8"  cname="_BW_8" />
+      <value value="0x40" name="16" cname="_BW_16" />
+    </mask>
+    <mask name="WAIT" value="0x80" >
+      <value value="0x00" name="On"  cname="_WAIT_ON" />
+      <value value="0x80" name="Off" cname="_WAIT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x81" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RE7/RB3" cname="_CCP2MX_PORTE" />
+      <value value="0x01" name="RC1"     cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON" />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x81" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x01" >
+    <mask name="CP" value="0x01" >
+      <value value="0x00" name="All" cname="_CP_ON" />
+      <value value="0x01" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x01" >
+    <mask name="EBTR" value="0x01" >
+      <value value="0x00" name="All" cname="_EBTR_ON" />
+      <value value="0x01" name="Off" cname="_EBTR_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x00" />
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F64J11.xml b/src/devices/pic/xml_data/18F64J11.xml
new file mode 100644
index 0000000..fd126a0
--- /dev/null
+++ b/src/devices/pic/xml_data/18F64J11.xml
@@ -0,0 +1,185 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F64J11" status="IP" memory_technology="FLASH" architecture="18J" id="0x3920" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="026364" datasheet="39774" progsheet="39644" erratas="80318" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x003FF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x003FF8" end="0x003FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F64J90.xml b/src/devices/pic/xml_data/18F64J90.xml
new file mode 100644
index 0000000..fedf592
--- /dev/null
+++ b/src/devices/pic/xml_data/18F64J90.xml
@@ -0,0 +1,185 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F64J90" status="IP" memory_technology="FLASH" architecture="18J" id="0x3820" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="026346" datasheet="39774" progsheet="39644" erratas="80318" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x003FF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x003FF8" end="0x003FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F6520.xml b/src/devices/pic/xml_data/18F6520.xml
new file mode 100644
index 0000000..a022295
--- /dev/null
+++ b/src/devices/pic/xml_data/18F6520.xml
@@ -0,0 +1,283 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F6520" document="010308" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0B20" >
+
+<!--* Checksums ************************************************************-->
+<!--
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0x85A8" cchecksum="0x84FE" />
+    <checksum protected_blocks="1" bchecksum="0x8787" cchecksum="0x873C" />
+    <checksum protected_blocks="3" bchecksum="0xC584" cchecksum="0xC539" />
+    <checksum protected_blocks="5" bchecksum="0xE480" cchecksum="0xE48A" />
+  </checksums>
+-->
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x007FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC"   value="0x07" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"    />
+      <value value="0x01" name="XT"           cname="_OSC_XT"    />
+      <value value="0x02" name="HS"           cname="_OSC_HS"    />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"    />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"    />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"  />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"  />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON" />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.5" cname="_BORV_25" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RE7" cname="_CCP2MUX_RE7" />
+      <value value="0x01" name="RC1" cname="_CCP2MUX_RC1" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0xFF" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0xFF" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0xFF" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON" />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F6525.xml b/src/devices/pic/xml_data/18F6525.xml
new file mode 100644
index 0000000..953e12a
--- /dev/null
+++ b/src/devices/pic/xml_data/18F6525.xml
@@ -0,0 +1,287 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F6525" document="010309" status="NR" alternative="18F6527" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0AE0" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0x4642" cchecksum="0x4598" />
+    <checksum protected_blocks="1" bchecksum="0x4E12" cchecksum="0x4DC7" />
+    <checksum protected_blocks="3" bchecksum="0xC60F" cchecksum="0xC5C4" />
+    <checksum protected_blocks="4" bchecksum="0x060B" cchecksum="0x0615" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00BFFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x2F" >
+    <mask name="FOSC"   value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"    />
+      <value value="0x01" name="XT"           cname="_OSC_XT"    />
+      <value value="0x02" name="HS"           cname="_OSC_HS"    />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"    />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"    />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"  />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"  />
+      <value value="default" name="invalid" />
+      <value value="0x0C" name="E4_IO"        cname="_OSC_ECIOPLL" />
+      <value value="0x0D" name="E4S_IO"       cname="_OSC_ECIOSWPLL" />
+      <value value="0x0E" name="H4S"          cname="_OSC_HSSWPLL" />
+      <value value="0x0F" name="EXTRC_IO"     cname="_OSC_RCIO"  />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON" />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RE7" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="MCLRE"  value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0xFF" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0xFF" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0xFF" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON" />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F6527.xml b/src/devices/pic/xml_data/18F6527.xml
new file mode 100644
index 0000000..04a2bf1
--- /dev/null
+++ b/src/devices/pic/xml_data/18F6527.xml
@@ -0,0 +1,302 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F6527" document="021970" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x1340" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00BFFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"     />
+      <value value="0x01" name="XT"           cname="_XT_OSC"     />
+      <value value="0x02" name="HS"           cname="_HS_OSC"     />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"     />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"   />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"   />
+      <value value="0x08" name="INTRC_IO"     cname="_INTIO2_OSC" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_INTIO1_OSC" />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FSCM_OFF" />
+      <value value="0x40" name="On"  cname="_FSCM_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF" />
+      <value value="0x02" name="Software" cname="_BOREN_ON" />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1K"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2K"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4K"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8K"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16K" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32K" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x85" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RE7" cname="_CCP2MX_PORTE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON" />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x30" >
+      <value value="0x00" name="1024" cname="_BBSIZ_1024" />
+      <value value="0x10" name="2048" cname="_BBSIZ_2048" />
+      <value value="0x20" name="4096" cname="_BBSIZ_4096" />
+      <value value="0x30" name="4096" cname="_BBSIZ_4096" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x07" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"                 cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"                 cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x07" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"                 cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON" />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F6585.xml b/src/devices/pic/xml_data/18F6585.xml
new file mode 100644
index 0000000..0bf9bab
--- /dev/null
+++ b/src/devices/pic/xml_data/18F6585.xml
@@ -0,0 +1,350 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F6585" document="010310" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0A60" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00BFFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x2F" >
+    <mask name="FOSC"   value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"    />
+      <value value="0x01" name="XT"           cname="_OSC_XT"    />
+      <value value="0x02" name="HS"           cname="_OSC_HS"    />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"    />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"    />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"  />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"  />
+      <value value="default" name="invalid" />
+      <value value="0x0C" name="E4_IO"        cname="_OSC_ECIOPLL" />
+      <value value="0x0D" name="E4S_IO"       cname="_OSC_ECIOSWPLL" />
+      <value value="0x0E" name="H4S"          cname="_OSC_HSSWPLL" />
+      <value value="0x0F" name="EXTRC_IO"     cname="_OSC_RCIO"  />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON" />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x81" cmask="0x02" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RE7" cname="_CCP2MX_OFF" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_ON" />
+    </mask>
+    <mask name="MCLRE"  value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x07" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x07" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON" />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="68" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F65J10.xml b/src/devices/pic/xml_data/18F65J10.xml
new file mode 100644
index 0000000..a67fe87
--- /dev/null
+++ b/src/devices/pic/xml_data/18F65J10.xml
@@ -0,0 +1,185 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F65J10" status="IP" memory_technology="FLASH" architecture="18J" id="0x1520" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="022354" datasheet="39663" progsheet="39644" erratas="80315 80246 80341 80340" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x007FF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x007FF8" end="0x007FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F65J11.xml b/src/devices/pic/xml_data/18F65J11.xml
new file mode 100644
index 0000000..2ef5b3d
--- /dev/null
+++ b/src/devices/pic/xml_data/18F65J11.xml
@@ -0,0 +1,185 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F65J11" status="IP" memory_technology="FLASH" architecture="18J" id="0x3960" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="026363" datasheet="39774" progsheet="39644" erratas="80318" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x007FF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x007FF8" end="0x007FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F65J15.xml b/src/devices/pic/xml_data/18F65J15.xml
new file mode 100644
index 0000000..f5f310a
--- /dev/null
+++ b/src/devices/pic/xml_data/18F65J15.xml
@@ -0,0 +1,185 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F65J15" status="IP" memory_technology="FLASH" architecture="18J" id="0x1540" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="022355" datasheet="39663" progsheet="39644" erratas="80315 80246 80341 80340" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x00BFF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x00BFF8" end="0x00BFFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F65J50.xml b/src/devices/pic/xml_data/18F65J50.xml
new file mode 100644
index 0000000..d0cdd2b
--- /dev/null
+++ b/src/devices/pic/xml_data/18F65J50.xml
@@ -0,0 +1,199 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek                                   *-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F65J50" status="IP" memory_technology="FLASH" architecture="18J" id="0x4100" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="027180" datasheet="39775" progsheet="39644" erratas="80321" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="8" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="8" end="48" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x007FF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x007FF8" end="0x007FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xEF" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="PLLDIV"  value="0x0E" >
+      <value value="0x00" name="12" cname="" />
+      <value value="0x02" name="10" cname="" />
+      <value value="0x04" name="6"  cname="" />
+      <value value="0x06" name="5"  cname="" />
+      <value value="0x08" name="4"  cname="" />
+      <value value="0x0A" name="3"  cname="" />
+      <value value="0x0C" name="2"  cname="" />
+      <value value="0x0E" name="1"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x09" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+    <mask name="MSSPSEL" value="0x08" >
+      <value value="0x00" name="5BIT"  cname="" />
+      <value value="0x08" name="7BIT"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F65J90.xml b/src/devices/pic/xml_data/18F65J90.xml
new file mode 100644
index 0000000..91997da
--- /dev/null
+++ b/src/devices/pic/xml_data/18F65J90.xml
@@ -0,0 +1,185 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F65J90" status="IP" memory_technology="FLASH" architecture="18J" id="0x3860" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="026345" datasheet="39774" progsheet="39644" erratas="80318" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x007FF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x007FF8" end="0x007FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F6620.xml b/src/devices/pic/xml_data/18F6620.xml
new file mode 100644
index 0000000..e88ee06
--- /dev/null
+++ b/src/devices/pic/xml_data/18F6620.xml
@@ -0,0 +1,285 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F6620" status="NR" alternative="18F6622" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0660" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="010311" datasheet="39609" progsheet="39583" erratas="80129 80172" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0x02D8" cchecksum="0x022E" />
+    <checksum protected_blocks="1" bchecksum="0x04AF" cchecksum="0x0455" />
+    <checksum protected_blocks="3" bchecksum="0x82AC" cchecksum="0x8252" />
+    <checksum protected_blocks="5" bchecksum="0x02A0" cchecksum="0x029B" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="25" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="16" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00FFFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC"   value="0x07" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"    sdcc_cname="_OSC_LP" />
+      <value value="0x01" name="XT"           cname="_XT_OSC"    sdcc_cname="_OSC_XT" />
+      <value value="0x02" name="HS"           cname="_HS_OSC"    sdcc_cname="_OSC_HS" />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC"    sdcc_cname="_OSC_RC" />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"    sdcc_cname="_OSC_EC_OSC2_Clock_Out" />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"  sdcc_cname="_OSC_EC_OSC2_RA6" />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC" sdcc_cname="_OSC_HS_PLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"  sdcc_cname="_OSC_RC_OSC2" />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON" />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  sdcc_cname="_PUT_ON" />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" sdcc_cname="_PUT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" sdcc_cname="_BODEN_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  sdcc_cname="_BODEN_ON" />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" sdcc_cname="_BODENV_4_5V" />
+      <value value="0x04" name="4.2" cname="_BORV_42" sdcc_cname="_BODENV_4_2V" />
+      <value value="0x08" name="2.7" cname="_BORV_27" sdcc_cname="_BODENV_2_7V" />
+      <value value="0x0C" name="2.5" cname="_BORV_20" sdcc_cname="_BODENV_2_5V" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   sdcc_cname="_WDTPS_1_1" />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   sdcc_cname="_WDTPS_1_2" />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   sdcc_cname="_WDTPS_1_4" />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   sdcc_cname="_WDTPS_1_8" />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  sdcc_cname="_WDTPS_1_16" />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  sdcc_cname="_WDTPS_1_32" />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  sdcc_cname="_WDTPS_1_64" />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" sdcc_cname="_WDTPS_1_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RE7" cname="_CCP2MX_OFF" sdcc_cname="_CCP2MUX_RE7" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_ON"  sdcc_cname="_CCP2MUX_RC1" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  sdcc_cname="_BACKBUG_ON" />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" sdcc_cname="_BACKBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:3FFF" cname="_CP0_ON"  sdcc_cname="_CP_0_ON" />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" sdcc_cname="_CP_0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  sdcc_cname="_CP_1_ON" />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" sdcc_cname="_CP_1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  sdcc_cname="_CP_2_ON" />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" sdcc_cname="_CP_2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON"  sdcc_cname="_CP_3_ON" />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" sdcc_cname="_CP_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:3FFF" cname="_WRT0_ON"  sdcc_cname="_WRT_0_ON" />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" sdcc_cname="_WRT_0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  sdcc_cname="_WRT_1_ON" />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" sdcc_cname="_WRT_1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON"  sdcc_cname="_WRT_2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" sdcc_cname="_WRT_2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON"  sdcc_cname="_WRT_3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" sdcc_cname="_WRT_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:3FFF" cname="_EBTR0_ON"  sdcc_cname="_EBTR_0_ON" />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" sdcc_cname="_EBTR_0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  sdcc_cname="_EBTR_1_ON" />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" sdcc_cname="_EBTR_1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  sdcc_cname="_EBTR_2_ON" />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" sdcc_cname="_EBTR_2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON"  sdcc_cname="_EBTR_3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" sdcc_cname="_EBTR_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON" />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F6621.xml b/src/devices/pic/xml_data/18F6621.xml
new file mode 100644
index 0000000..664de3f
--- /dev/null
+++ b/src/devices/pic/xml_data/18F6621.xml
@@ -0,0 +1,299 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F6621" document="010312" status="NR" alternative="18F6622" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0AA0" >
+
+<!--* Checksums ************************************************************-->
+<!--  <checksums>
+    <checksum protected_blocks="0" bchecksum="0x0642" cchecksum="0x0598" />
+    <checksum protected_blocks="1" bchecksum="0x0E0E" cchecksum="0x0DC3" />
+    <checksum protected_blocks="3" bchecksum="0x860B" cchecksum="0x85C0" />
+    <checksum protected_blocks="4" bchecksum="0x05FF" cchecksum="0x0609" />
+  </checksums>
+-->
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00FFFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x2F" >
+    <mask name="FOSC"   value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"    />
+      <value value="0x01" name="XT"           cname="_OSC_XT"    />
+      <value value="0x02" name="HS"           cname="_OSC_HS"    />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"    />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"    />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"  />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"  />
+      <value value="default" name="invalid" />
+      <value value="0x0C" name="E4_IO"        cname="_OSC_ECIOPLL" />
+      <value value="0x0D" name="E4S_IO"       cname="_OSC_ECIOSWPLL" />
+      <value value="0x0E" name="H4S"          cname="_OSC_HSSWPLL" />
+      <value value="0x0F" name="EXTRC_IO"     cname="_OSC_RCIO"  />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON" />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RE7" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="MCLRE"  value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON" />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F6622.xml b/src/devices/pic/xml_data/18F6622.xml
new file mode 100644
index 0000000..6fb81d7
--- /dev/null
+++ b/src/devices/pic/xml_data/18F6622.xml
@@ -0,0 +1,314 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F6622" document="021969" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x1380" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00FFFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"     />
+      <value value="0x01" name="XT"           cname="_XT_OSC"     />
+      <value value="0x02" name="HS"           cname="_HS_OSC"     />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"     />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"   />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"   />
+      <value value="0x08" name="INTRC_IO"     cname="_INTIO2_OSC" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_INTIO1_OSC" />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FSCM_OFF" />
+      <value value="0x40" name="On"  cname="_FSCM_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF" />
+      <value value="0x02" name="Software" cname="_BOREN_ON" />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1K"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2K"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4K"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8K"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16K" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32K" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x85" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RE7" cname="_CCP2MX_PORTE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON" />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x30" >
+      <value value="0x00" name="1024" cname="_BBSIZ_BB2K" />
+      <value value="0x10" name="2048" cname="_BBSIZ_BB4K" />
+      <value value="0x20" name="4096" cname="_BBSIZ_BB8K" />
+      <value value="0x30" name="4096" cname="_BBSIZ_BB8K" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"                 cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"                 cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"                 cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON" />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F6627.xml b/src/devices/pic/xml_data/18F6627.xml
new file mode 100644
index 0000000..74248c6
--- /dev/null
+++ b/src/devices/pic/xml_data/18F6627.xml
@@ -0,0 +1,332 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F6627" document="010313" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x13C0" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x017FFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF" />
+      <value value="0x02" name="Software" cname="_BOREN_ON" />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x85" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RE7" cname="_CCP2MX_PORTE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON" />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x30" >
+      <value value="0x00" name="1024" cname="_BBSIZ_BB2K" />
+      <value value="0x10" name="2048" cname="_BBSIZ_BB4K" />
+      <value value="0x20" name="4096" cname="_BBSIZ_BB8K" />
+      <value value="0x30" name="4096" cname="_BBSIZ_BB8K" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x3F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"                 cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+    <mask name="CP_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_CP4_ON" />
+      <value value="0x10" name="Off"         cname="_CP4_OFF" />
+    </mask>
+    <mask name="CP_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_CP5_ON" />
+      <value value="0x20" name="Off"         cname="_CP5_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x3F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"                 cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+    <mask name="WRT_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_WRT4_ON" />
+      <value value="0x10" name="Off"         cname="_WRT4_OFF" />
+    </mask>
+    <mask name="WRT_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_WRT5_ON" />
+      <value value="0x20" name="Off"         cname="_WRT5_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x3F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"                 cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+    <mask name="EBTR_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_EBTR4_ON" />
+      <value value="0x10" name="Off"         cname="_EBTR4_OFF" />
+    </mask>
+    <mask name="EBTR_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_EBTR5_ON" />
+      <value value="0x20" name="Off"         cname="_EBTR5_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON" />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F6680.xml b/src/devices/pic/xml_data/18F6680.xml
new file mode 100644
index 0000000..d0a9922
--- /dev/null
+++ b/src/devices/pic/xml_data/18F6680.xml
@@ -0,0 +1,362 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F6680" document="010314" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0A20" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00FFFF"  word_write_align="4" word_erase_align="32"/>
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x2F" >
+    <mask name="FOSC"   value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"    />
+      <value value="0x01" name="XT"           cname="_OSC_XT"    />
+      <value value="0x02" name="HS"           cname="_OSC_HS"    />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"    />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"    />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"  />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"  />
+      <value value="default" name="invalid" />
+      <value value="0x0C" name="E4_IO"        cname="_OSC_ECIOPLL" />
+      <value value="0x0D" name="E4S_IO"       cname="_OSC_ECIOSWPLL" />
+      <value value="0x0E" name="H4S"          cname="_OSC_HSSWPLL" />
+      <value value="0x0F" name="EXTRC_IO"     cname="_OSC_RCIO"  />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON" />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x81" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RE7" cname="_CCP2MX_OFF" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_ON" />
+    </mask>
+    <mask name="MCLRE"  value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" cmask="0x08" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" cmask="0x08" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" cmask="0x08" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON" />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+  <package types="plcc" nb_pins="68" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F66J10.xml b/src/devices/pic/xml_data/18F66J10.xml
new file mode 100644
index 0000000..7bb9aa7
--- /dev/null
+++ b/src/devices/pic/xml_data/18F66J10.xml
@@ -0,0 +1,185 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F66J10" status="IP" memory_technology="FLASH" architecture="18J" id="0x1560" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="022356" datasheet="39663" progsheet="39644" erratas="80315 80246 80341 80340" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x00FFF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x00FFF8" end="0x00FFFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F66J11.xml b/src/devices/pic/xml_data/18F66J11.xml
new file mode 100644
index 0000000..8fd1314
--- /dev/null
+++ b/src/devices/pic/xml_data/18F66J11.xml
@@ -0,0 +1,190 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek                                   *-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F66J11" status="IP" memory_technology="FLASH" architecture="18J" id="0x4440" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="027154" datasheet="39778" progsheet="39644" erratas="80305 80344" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="8"  vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="8" end="48" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x00FFF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x00FFF8" end="0x00FFFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x09" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname="" />
+      <value value="0x01" name="RC1"  cname="" />
+    </mask>
+    <mask name="MSSPSEL" value="0x08" >
+      <value value="0x00" name="5BIT"  cname="" />
+      <value value="0x08" name="7BIT"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F66J15.xml b/src/devices/pic/xml_data/18F66J15.xml
new file mode 100644
index 0000000..c1c5c95
--- /dev/null
+++ b/src/devices/pic/xml_data/18F66J15.xml
@@ -0,0 +1,185 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F66J15" status="IP" memory_technology="FLASH" architecture="18J" id="0x1580" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="020090" datasheet="39663" progsheet="39644" erratas="80315 80246 80341 80340" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x017FF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x017FF8" end="0x017FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F66J16.xml b/src/devices/pic/xml_data/18F66J16.xml
new file mode 100644
index 0000000..cf84f44
--- /dev/null
+++ b/src/devices/pic/xml_data/18F66J16.xml
@@ -0,0 +1,189 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek                                   *-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F66J16" status="IP" memory_technology="FLASH" architecture="18J" id="0x4460" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="027153" datasheet="39778" progsheet="39644" erratas="80305 80344" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="8"  vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="8" end="48" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x017FF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x017FF8" end="0x017FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x09" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname="" />
+      <value value="0x01" name="RC1"  cname="" />
+    </mask>
+    <mask name="MSSPSEL" value="0x08" >
+      <value value="0x00" name="5BIT"  cname="" />
+      <value value="0x08" name="7BIT"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F66J50.xml b/src/devices/pic/xml_data/18F66J50.xml
new file mode 100644
index 0000000..34dbe21
--- /dev/null
+++ b/src/devices/pic/xml_data/18F66J50.xml
@@ -0,0 +1,199 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek                                   *-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F66J50" status="IP" memory_technology="FLASH" architecture="18J" id="0x4140" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="027179" datasheet="39775" progsheet="39644" erratas="80321" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="8" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="8" end="48" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x00FFF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x00FFF8" end="0x00FFFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xEF" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="PLLDIV"  value="0x0E" >
+      <value value="0x00" name="12" cname="" />
+      <value value="0x02" name="10" cname="" />
+      <value value="0x04" name="6"  cname="" />
+      <value value="0x06" name="5"  cname="" />
+      <value value="0x08" name="4"  cname="" />
+      <value value="0x0A" name="3"  cname="" />
+      <value value="0x0C" name="2"  cname="" />
+      <value value="0x0E" name="1"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x09" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+    <mask name="MSSPSEL" value="0x08" >
+      <value value="0x00" name="5BIT"  cname="" />
+      <value value="0x08" name="7BIT"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F66J55.xml b/src/devices/pic/xml_data/18F66J55.xml
new file mode 100644
index 0000000..7e95978
--- /dev/null
+++ b/src/devices/pic/xml_data/18F66J55.xml
@@ -0,0 +1,199 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek                                   *-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F66J55" status="IP" memory_technology="FLASH" architecture="18J" id="0x4160" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="027178" datasheet="39775" progsheet="39644" erratas="80321" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="8" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="8" end="48" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x017FF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x017FF8" end="0x017FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xEF" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="PLLDIV"  value="0x0E" >
+      <value value="0x00" name="12" cname="" />
+      <value value="0x02" name="10" cname="" />
+      <value value="0x04" name="6"  cname="" />
+      <value value="0x06" name="5"  cname="" />
+      <value value="0x08" name="4"  cname="" />
+      <value value="0x0A" name="3"  cname="" />
+      <value value="0x0C" name="2"  cname="" />
+      <value value="0x0E" name="1"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x09" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+    <mask name="MSSPSEL" value="0x08" >
+      <value value="0x00" name="5BIT"  cname="" />
+      <value value="0x08" name="7BIT"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F66J60.xml b/src/devices/pic/xml_data/18F66J60.xml
new file mode 100644
index 0000000..e4ac5ea
--- /dev/null
+++ b/src/devices/pic/xml_data/18F66J60.xml
@@ -0,0 +1,185 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F66J60" document="026447" status="IP" memory_technology="FLASH" architecture="18J" id="0x1800" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="41.6667" vdd_min="2.7" vdd_max="3.6" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="2.7" />
+    <frequency start="4" end="41.6667" vdd_min="2.35" vdd_max="2.7" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3"   max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6"   nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3"   max="3.6"   nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00FFF7" word_write_align="32" word_erase_align="512" />
+  <memory name="config"       start="0x00FFF8" end="0x00FFFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+    <mask name="ETHLED" value="0x01" >
+      <value value="0x00" name="Off"  cname=""  />
+      <value value="0x01" name="On"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F66J65.xml b/src/devices/pic/xml_data/18F66J65.xml
new file mode 100644
index 0000000..8431ec8
--- /dev/null
+++ b/src/devices/pic/xml_data/18F66J65.xml
@@ -0,0 +1,185 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F66J65" document="026446" status="IP" memory_technology="FLASH" architecture="18J" id="0x1F00" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="41.6667" vdd_min="2.7" vdd_max="3.6" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="2.7" />
+    <frequency start="4" end="41.6667" vdd_min="2.35" vdd_max="2.7" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3"   max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6"   nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3"   max="3.6"   nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x017FF7" word_write_align="32" word_erase_align="512" />
+  <memory name="config"       start="0x017FF8" end="0x017FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+    <mask name="ETHLED" value="0x01" >
+      <value value="0x00" name="Off"  cname=""  />
+      <value value="0x01" name="On"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F6720.xml b/src/devices/pic/xml_data/18F6720.xml
new file mode 100644
index 0000000..c023b5e
--- /dev/null
+++ b/src/devices/pic/xml_data/18F6720.xml
@@ -0,0 +1,330 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F6720" document="010315" status="NR" alternative="18F6722" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0620" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0x05A8" cchecksum="0x04FE" />
+    <checksum protected_blocks="1" bchecksum="0x077F" cchecksum="0x0734" />
+    <checksum protected_blocks="3" bchecksum="0x857C" cchecksum="0x8531" />
+    <checksum protected_blocks="9" bchecksum="0x0480" cchecksum="0x048A" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="25" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="16" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x01FFFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC"   value="0x07" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"    />
+      <value value="0x01" name="XT"           cname="_XT_OSC"    />
+      <value value="0x02" name="HS"           cname="_HS_OSC"    />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC"    />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"    />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"  />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC" />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"  />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON" />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RE7" cname="_CCP2MX_OFF" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_ON" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0xFF" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+    <mask name="CP_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_CP4_ON" />
+      <value value="0x10" name="Off"         cname="_CP4_OFF" />
+    </mask>
+    <mask name="CP_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_CP5_ON" />
+      <value value="0x20" name="Off"         cname="_CP5_OFF" />
+    </mask>
+    <mask name="CP_6" value="0x40" >
+      <value value="0x00" name="18000:1BFFF" cname="_CP6_ON" />
+      <value value="0x40" name="Off"         cname="_CP6_OFF" />
+    </mask>
+    <mask name="CP_7" value="0x80" >
+      <value value="0x00" name="1C000:1FFFF" cname="_CP7_ON" />
+      <value value="0x80" name="Off"         cname="_CP7_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0xFF" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+    <mask name="WRT_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_WRT4_ON" />
+      <value value="0x10" name="Off"         cname="_WRT4_OFF" />
+    </mask>
+    <mask name="WRT_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_WRT5_ON" />
+      <value value="0x20" name="Off"         cname="_WRT5_OFF" />
+    </mask>
+    <mask name="WRT_6" value="0x40" >
+      <value value="0x00" name="18000:1BFFF" cname="_WRT6_ON" />
+      <value value="0x40" name="Off"         cname="_WRT6_OFF" />
+    </mask>
+    <mask name="WRT_7" value="0x80" >
+      <value value="0x00" name="1C000:1FFFF" cname="_WRT7_ON" />
+      <value value="0x80" name="Off"         cname="_WRT7_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0xFF" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+    <mask name="EBTR_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_EBTR4_ON" />
+      <value value="0x10" name="Off"         cname="_EBTR4_OFF" />
+    </mask>
+    <mask name="EBTR_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_EBTR5_ON" />
+      <value value="0x20" name="Off"         cname="_EBTR5_OFF" />
+    </mask>
+    <mask name="EBTR_6" value="0x40" >
+      <value value="0x00" name="18000:1BFFF" cname="_EBTR6_ON" />
+      <value value="0x40" name="Off"         cname="_EBTR6_OFF" />
+    </mask>
+    <mask name="EBTR_7" value="0x80" >
+      <value value="0x00" name="1C000:1FFFF" cname="_EBTR7_ON" />
+      <value value="0x80" name="Off"         cname="_EBTR7_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON" />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F6722.xml b/src/devices/pic/xml_data/18F6722.xml
new file mode 100644
index 0000000..fb30985
--- /dev/null
+++ b/src/devices/pic/xml_data/18F6722.xml
@@ -0,0 +1,356 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F6722" document="010316" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x1400" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x01FFFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+   </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF" />
+      <value value="0x02" name="Software" cname="_BOREN_ON" />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x85" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RE7" cname="_CCP2MX_PORTE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON" />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x30" >
+      <value value="0x00" name="1024" cname="_BBSIZ_BB2K" />
+      <value value="0x10" name="2048" cname="_BBSIZ_BB4K" />
+      <value value="0x20" name="4096" cname="_BBSIZ_BB8K" />
+      <value value="0x30" name="4096" cname="_BBSIZ_BB8K" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0xFF" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"                 cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+    <mask name="CP_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_CP4_ON" />
+      <value value="0x10" name="Off"         cname="_CP4_OFF" />
+    </mask>
+    <mask name="CP_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_CP5_ON" />
+      <value value="0x20" name="Off"         cname="_CP5_OFF" />
+    </mask>
+    <mask name="CP_6" value="0x40" >
+      <value value="0x00" name="18000:1BFFF" cname="_CP6_ON" />
+      <value value="0x40" name="Off"         cname="_CP6_OFF" />
+    </mask>
+    <mask name="CP_7" value="0x80" >
+      <value value="0x00" name="1C000:1FFFF" cname="_CP7_ON" />
+      <value value="0x80" name="Off"         cname="_CP7_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0xFF" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"                 cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+    <mask name="WRT_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_WRT4_ON" />
+      <value value="0x10" name="Off"         cname="_WRT4_OFF" />
+    </mask>
+    <mask name="WRT_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_WRT5_ON" />
+      <value value="0x20" name="Off"         cname="_WRT5_OFF" />
+    </mask>
+    <mask name="WRT_6" value="0x40" >
+      <value value="0x00" name="18000:1BFFF" cname="_WRT6_ON" />
+      <value value="0x40" name="Off"         cname="_WRT6_OFF" />
+    </mask>
+    <mask name="WRT_7" value="0x80" >
+      <value value="0x00" name="1C000:1FFFF" cname="_WRT7_ON" />
+      <value value="0x80" name="Off"         cname="_WRT7_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0xFF" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"                 cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+    <mask name="EBTR_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_EBTR4_ON" />
+      <value value="0x10" name="Off"         cname="_EBTR4_OFF" />
+    </mask>
+    <mask name="EBTR_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_EBTR5_ON" />
+      <value value="0x20" name="Off"         cname="_EBTR5_OFF" />
+    </mask>
+    <mask name="EBTR_6" value="0x40" >
+      <value value="0x00" name="18000:1BFFF" cname="_EBTR6_ON" />
+      <value value="0x40" name="Off"         cname="_EBTR6_OFF" />
+    </mask>
+    <mask name="EBTR_7" value="0x80" >
+      <value value="0x00" name="1C000:1FFFF" cname="_EBTR7_ON" />
+      <value value="0x80" name="Off"         cname="_EBTR7_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON" />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F67J10.xml b/src/devices/pic/xml_data/18F67J10.xml
new file mode 100644
index 0000000..78223c3
--- /dev/null
+++ b/src/devices/pic/xml_data/18F67J10.xml
@@ -0,0 +1,185 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F67J10" status="IP" memory_technology="FLASH" architecture="18J" id="0x15A0" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="020089" datasheet="39663" progsheet="39644" erratas="80315 80246 80341 80340" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x01FFF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x01FFF8" end="0x01FFFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F67J11.xml b/src/devices/pic/xml_data/18F67J11.xml
new file mode 100644
index 0000000..d13e7dc
--- /dev/null
+++ b/src/devices/pic/xml_data/18F67J11.xml
@@ -0,0 +1,190 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek                                   *-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F67J11" status="IP" memory_technology="FLASH" architecture="18J" id="0x4480" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="027152" datasheet="39778" progsheet="39644" erratas="80305 80344" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="8"  vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="8" end="48" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x01FFF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x01FFF8" end="0x01FFFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x09" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname="" />
+      <value value="0x01" name="RC1"  cname="" />
+    </mask>
+    <mask name="MSSPSEL" value="0x08" >
+      <value value="0x00" name="5BIT"  cname="" />
+      <value value="0x08" name="7BIT"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F67J50.xml b/src/devices/pic/xml_data/18F67J50.xml
new file mode 100644
index 0000000..91eade3
--- /dev/null
+++ b/src/devices/pic/xml_data/18F67J50.xml
@@ -0,0 +1,199 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek                                   *-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F67J50" status="IP" memory_technology="FLASH" architecture="18J" id="0x4180" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="027177" datasheet="39775" progsheet="39644" erratas="80321" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="8" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="8" end="48" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x01FFF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x01FFF8" end="0x01FFFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xEF" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="PLLDIV"  value="0x0E" >
+      <value value="0x00" name="12" cname="" />
+      <value value="0x02" name="10" cname="" />
+      <value value="0x04" name="6"  cname="" />
+      <value value="0x06" name="5"  cname="" />
+      <value value="0x08" name="4"  cname="" />
+      <value value="0x0A" name="3"  cname="" />
+      <value value="0x0C" name="2"  cname="" />
+      <value value="0x0E" name="1"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x09" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+    <mask name="MSSPSEL" value="0x08" >
+      <value value="0x00" name="5BIT"  cname="" />
+      <value value="0x08" name="7BIT"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F67J60.xml b/src/devices/pic/xml_data/18F67J60.xml
new file mode 100644
index 0000000..29922db
--- /dev/null
+++ b/src/devices/pic/xml_data/18F67J60.xml
@@ -0,0 +1,185 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F67J60" document="026445" status="IP" memory_technology="FLASH" architecture="18J" id="0x1F20" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="41.6667" vdd_min="2.7" vdd_max="3.6" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="2.7" />
+    <frequency start="4" end="41.6667" vdd_min="2.35" vdd_max="2.7" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3"   max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6"   nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3"   max="3.6"   nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x01FFF7" word_write_align="32" word_erase_align="512" />
+  <memory name="config"       start="0x01FFF8" end="0x01FFFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+    <mask name="ETHLED" value="0x01" >
+      <value value="0x00" name="Off"  cname=""  />
+      <value value="0x01" name="On"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F8310.xml b/src/devices/pic/xml_data/18F8310.xml
new file mode 100644
index 0000000..1fe084d
--- /dev/null
+++ b/src/devices/pic/xml_data/18F8310.xml
@@ -0,0 +1,266 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F8310" document="019695" status="IP" memory_technology="FLASH" self_write="no" architecture="18F" id="0x0BC0" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xE20C" cchecksum="0xE162" />
+    <checksum protected="All" bchecksum="0x0227" cchecksum="0x0222" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"   max="12"  nominal="11" />
+  <voltages name="vdd_prog"       min="2.75" max="5.5" nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"    max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x001FFF" word_write_align="8" word_erase_align="0" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF" />
+      <value value="0x02" name="Software" cname="_BOREN_ON" />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xC3" >
+    <mask name="PM"   value="0x03" >
+      <value value="0x00" name="Extended microcontroller" cname="_PM_EM" />
+      <value value="0x01" name="Microprocessor with boot" cname="_PM_MPB" />
+      <value value="0x02" name="Microprocessor"           cname="_PM_MP" />
+      <value value="0x03" name="Microcontroller"          cname="_PM_MC" />
+    </mask>
+    <mask name="BW"   value="0x40" >
+      <value value="0x00" name="8"  cname="_BW_8" />
+      <value value="0x40" name="16" cname="_BW_16" />
+    </mask>
+    <mask name="WAIT" value="0x80" >
+      <value value="0x00" name="On"  cname="_WAIT_ON" />
+      <value value="0x80" name="Off" cname="_WAIT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x81" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RE7/RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1"     cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON" />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x81" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x01" >
+    <mask name="CP" value="0x01" >
+      <value value="0x00" name="All" cname="_CP_ON" />
+      <value value="0x01" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x01" >
+    <mask name="EBTR" value="0x01" >
+      <value value="0x00" name="All" cname="_EBTR_ON" />
+      <value value="0x01" name="Off" cname="_EBTR_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x00" />
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F8390.xml b/src/devices/pic/xml_data/18F8390.xml
new file mode 100644
index 0000000..4dbff0c
--- /dev/null
+++ b/src/devices/pic/xml_data/18F8390.xml
@@ -0,0 +1,266 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F8390" document="019709" status="IP" memory_technology="FLASH" self_write="no" architecture="18F" id="0x0B80" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xE20C" cchecksum="0xE162" />
+    <checksum protected="All" bchecksum="0x0227" cchecksum="0x0222" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"   max="12"  nominal="11" />
+  <voltages name="vdd_prog"       min="2.75" max="5.5" nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"    max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x001FFF" word_write_align="8" word_erase_align="0" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF" />
+      <value value="0x02" name="Software" cname="_BOREN_ON" />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xC3" >
+    <mask name="PM"   value="0x03" >
+      <value value="0x00" name="Extended microcontroller" cname="_PM_EM" />
+      <value value="0x01" name="Microprocessor with boot" cname="_PM_MPB" />
+      <value value="0x02" name="Microprocessor"           cname="_PM_MP" />
+      <value value="0x03" name="Microcontroller"          cname="_PM_MC" />
+    </mask>
+    <mask name="BW"   value="0x40" >
+      <value value="0x00" name="8"  cname="_BW_8" />
+      <value value="0x40" name="16" cname="_BW_16" />
+    </mask>
+    <mask name="WAIT" value="0x80" >
+      <value value="0x00" name="On"  cname="_WAIT_ON" />
+      <value value="0x80" name="Off" cname="_WAIT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x81" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RE7/RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1"     cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON" />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x81" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x01" >
+    <mask name="CP" value="0x01" >
+      <value value="0x00" name="All" cname="_CP_ON" />
+      <value value="0x01" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x01" >
+    <mask name="EBTR" value="0x01" >
+      <value value="0x00" name="All" cname="_EBTR_ON" />
+      <value value="0x01" name="Off" cname="_EBTR_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x00" />
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F8393.xml b/src/devices/pic/xml_data/18F8393.xml
new file mode 100644
index 0000000..ce846db
--- /dev/null
+++ b/src/devices/pic/xml_data/18F8393.xml
@@ -0,0 +1,254 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F8393" status="IP" memory_technology="FLASH" self_write="no" architecture="18F" id="0x1A20" >
+  
+  <!--* Documents ************************************************************-->
+  <documents webpage="530833" datasheet="39896" progsheet="39624" erratas="" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xC20C" cchecksum="0xC162" />
+    <checksum protected="All" bchecksum="0x0225" cchecksum="0x0220" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"   max="12"  nominal="11" />
+  <voltages name="vdd_prog"       min="2.75" max="5.5" nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"    max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x001FFF" word_write_align="8" word_erase_align="0" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF" />
+      <value value="0x02" name="Software" cname="_BOREN_ON" />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xC3" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x81" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RE7/RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1"     cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON" />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x81" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x01" >
+    <mask name="CP" value="0x01" >
+      <value value="0x00" name="All" cname="_CP_ON" />
+      <value value="0x01" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x01" >
+    <mask name="EBTR" value="0x01" >
+      <value value="0x00" name="All" cname="_EBTR_ON" />
+      <value value="0x01" name="Off" cname="_EBTR_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x00" />
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F83J11.xml b/src/devices/pic/xml_data/18F83J11.xml
new file mode 100644
index 0000000..4a9d249
--- /dev/null
+++ b/src/devices/pic/xml_data/18F83J11.xml
@@ -0,0 +1,143 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F83J11" status="IP" memory_technology="FLASH" architecture="18J" id="0x3980" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="026362" datasheet="39774" progsheet="39644" erratas="80318" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x001FF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x001FF8" end="0x001FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+    <mask name="EASHFT"  value="0x08" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x08" name="On"  cname="" />
+    </mask>
+    <mask name="EMB"  value="0x30" >
+      <value value="0x00" name="20BIT"    cname="" />
+      <value value="0x10" name="16BIT"    cname="" />
+      <value value="0x20" name="12BIT"    cname="" />
+      <value value="0x30" name="Disabled" cname="" />
+    </mask>
+    <mask name="BW"  value="0x40" >
+      <value value="0x00" name="8"  cname="" />
+      <value value="0x40" name="16" cname="" />
+    </mask>
+    <mask name="WAIT"  value="0x80" >
+      <value value="0x00" name="On"  cname="" />
+      <value value="0x80" name="Off" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x03" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"  cname=""  />
+      <value value="0x02" name="RE6-RE3"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F83J90.xml b/src/devices/pic/xml_data/18F83J90.xml
new file mode 100644
index 0000000..8e10c27
--- /dev/null
+++ b/src/devices/pic/xml_data/18F83J90.xml
@@ -0,0 +1,143 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F83J90" status="IP" memory_technology="FLASH" architecture="18J" id="0x3880" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="026344" datasheet="39774" progsheet="39644" erratas="80318" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x001FF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x001FF8" end="0x001FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+    <mask name="EASHFT"  value="0x08" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x08" name="On"  cname="" />
+    </mask>
+    <mask name="EMB"  value="0x30" >
+      <value value="0x00" name="20BIT"    cname="" />
+      <value value="0x10" name="16BIT"    cname="" />
+      <value value="0x20" name="12BIT"    cname="" />
+      <value value="0x30" name="Disabled" cname="" />
+    </mask>
+    <mask name="BW"  value="0x40" >
+      <value value="0x00" name="8"  cname="" />
+      <value value="0x40" name="16" cname="" />
+    </mask>
+    <mask name="WAIT"  value="0x80" >
+      <value value="0x00" name="On"  cname="" />
+      <value value="0x80" name="Off" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x03" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"  cname=""  />
+      <value value="0x02" name="RE6-RE3"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F8410.xml b/src/devices/pic/xml_data/18F8410.xml
new file mode 100644
index 0000000..b5c49cd
--- /dev/null
+++ b/src/devices/pic/xml_data/18F8410.xml
@@ -0,0 +1,251 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F8410" document="010317" status="IP" memory_technology="FLASH" self_write="no" architecture="18F" id="0x06C0" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xC20C" cchecksum="0xC162" />
+    <checksum protected="All" bchecksum="0x0225" cchecksum="0x0220" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"   max="12"  nominal="11" />
+  <voltages name="vdd_prog"       min="2.75" max="5.5" nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"    max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FFF" word_write_align="8" word_erase_align="0" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF" />
+      <value value="0x02" name="Software" cname="_BOREN_ON" />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xC3" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x81" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RE7/RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1"     cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON" />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x81" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x01" >
+    <mask name="CP" value="0x01" >
+      <value value="0x00" name="All" cname="_CP_ON" />
+      <value value="0x01" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x01" >
+    <mask name="EBTR" value="0x01" >
+      <value value="0x00" name="All" cname="_EBTR_ON" />
+      <value value="0x01" name="Off" cname="_EBTR_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x00" />
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F8490.xml b/src/devices/pic/xml_data/18F8490.xml
new file mode 100644
index 0000000..3871a60
--- /dev/null
+++ b/src/devices/pic/xml_data/18F8490.xml
@@ -0,0 +1,251 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F8490" document="010318" status="IP" memory_technology="FLASH" self_write="no" architecture="18F" id="0x0680" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xC20C" cchecksum="0xC162" />
+    <checksum protected="All" bchecksum="0x0225" cchecksum="0x0220" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"   max="12"  nominal="11" />
+  <voltages name="vdd_prog"       min="2.75" max="5.5" nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"    max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FFF" word_write_align="8" word_erase_align="0" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF" />
+      <value value="0x02" name="Software" cname="_BOREN_ON" />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xC3" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x81" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RE7/RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1"     cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON" />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x81" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x01" >
+    <mask name="CP" value="0x01" >
+      <value value="0x00" name="All" cname="_CP_ON" />
+      <value value="0x01" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x01" >
+    <mask name="EBTR" value="0x01" >
+      <value value="0x00" name="All" cname="_EBTR_ON" />
+      <value value="0x01" name="Off" cname="_EBTR_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x00" />
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F8493.xml b/src/devices/pic/xml_data/18F8493.xml
new file mode 100644
index 0000000..4e8bc52
--- /dev/null
+++ b/src/devices/pic/xml_data/18F8493.xml
@@ -0,0 +1,254 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F8493" status="IP" memory_technology="FLASH" self_write="no" architecture="18F" id="0x0E20" >
+  
+  <!--* Documents ************************************************************-->
+  <documents webpage="530832" datasheet="39896" progsheet="39624" erratas="" />
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected="Off" bchecksum="0xC20C" cchecksum="0xC162" />
+    <checksum protected="All" bchecksum="0x0225" cchecksum="0x0220" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="10"   max="12"  nominal="11" />
+  <voltages name="vdd_prog"       min="2.75" max="5.5" nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"    max="5.5" nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x003FFF" word_write_align="8" word_erase_align="0" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF" />
+      <value value="0x02" name="Software" cname="_BOREN_ON" />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xC3" />
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x81" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RE7/RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1"     cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON" />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x81" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x01" >
+    <mask name="CP" value="0x01" >
+      <value value="0x00" name="All" cname="_CP_ON" />
+      <value value="0x01" name="Off" cname="_CP_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x01" >
+    <mask name="EBTR" value="0x01" >
+      <value value="0x00" name="All" cname="_EBTR_ON" />
+      <value value="0x01" name="Off" cname="_EBTR_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x00" />
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F84J11.xml b/src/devices/pic/xml_data/18F84J11.xml
new file mode 100644
index 0000000..9c69d2b
--- /dev/null
+++ b/src/devices/pic/xml_data/18F84J11.xml
@@ -0,0 +1,143 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F84J11" status="IP" memory_technology="FLASH" architecture="18J" id="0x39A0" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="026361" datasheet="39774" progsheet="39644" erratas="80318" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x003FF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x003FF8" end="0x003FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+    <mask name="EASHFT"  value="0x08" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x08" name="On"  cname="" />
+    </mask>
+    <mask name="EMB"  value="0x30" >
+      <value value="0x00" name="20BIT"    cname="" />
+      <value value="0x10" name="16BIT"    cname="" />
+      <value value="0x20" name="12BIT"    cname="" />
+      <value value="0x30" name="Disabled" cname="" />
+    </mask>
+    <mask name="BW"  value="0x40" >
+      <value value="0x00" name="8"  cname="" />
+      <value value="0x40" name="16" cname="" />
+    </mask>
+    <mask name="WAIT"  value="0x80" >
+      <value value="0x00" name="On"  cname="" />
+      <value value="0x80" name="Off" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x03" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"  cname=""  />
+      <value value="0x02" name="RE6-RE3"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F84J90.xml b/src/devices/pic/xml_data/18F84J90.xml
new file mode 100644
index 0000000..59711f3
--- /dev/null
+++ b/src/devices/pic/xml_data/18F84J90.xml
@@ -0,0 +1,143 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F84J90" status="IP" memory_technology="FLASH" architecture="18J" id="0x38A0" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="026343" datasheet="39774" progsheet="39644" erratas="80318" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x003FF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x003FF8" end="0x003FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+    <mask name="EASHFT"  value="0x08" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x08" name="On"  cname="" />
+    </mask>
+    <mask name="EMB"  value="0x30" >
+      <value value="0x00" name="20BIT"    cname="" />
+      <value value="0x10" name="16BIT"    cname="" />
+      <value value="0x20" name="12BIT"    cname="" />
+      <value value="0x30" name="Disabled" cname="" />
+    </mask>
+    <mask name="BW"  value="0x40" >
+      <value value="0x00" name="8"  cname="" />
+      <value value="0x40" name="16" cname="" />
+    </mask>
+    <mask name="WAIT"  value="0x80" >
+      <value value="0x00" name="On"  cname="" />
+      <value value="0x80" name="Off" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x03" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"  cname=""  />
+      <value value="0x02" name="RE6-RE3"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F8520.xml b/src/devices/pic/xml_data/18F8520.xml
new file mode 100644
index 0000000..6bc1aae
--- /dev/null
+++ b/src/devices/pic/xml_data/18F8520.xml
@@ -0,0 +1,311 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F8520" document="010319" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0B00" >
+
+<!--* Checksums ************************************************************-->
+<!--  <checksums>
+    <checksum protected_blocks="0" bchecksum="0x05AA" cchecksum="0x0500" />
+    <checksum protected_blocks="1" bchecksum="0x0783" cchecksum="0x071A" />
+    <checksum protected_blocks="3" bchecksum="0x8580" cchecksum="0x8517" />
+    <checksum protected_blocks="5" bchecksum="0x0484" cchecksum="0x0470" />
+  </checksums>
+-->
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" mode="not microcontroller" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+    <frequency start="4" end="25" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" mode="not microcontroller" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x007FFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC"   value="0x07" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"    />
+      <value value="0x01" name="XT"           cname="_OSC_XT"    />
+      <value value="0x02" name="HS"           cname="_OSC_HS"    />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"    />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"    />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"  />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"  />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON" />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.5" cname="_BORV_25" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x83" >
+    <mask name="PM"   value="0x03" >
+      <value value="0x00" name="Extended microcontroller" cname="_MODE_EM" />
+      <value value="0x01" name="Microprocessor with boot" cname="_MODE_MPB" />
+      <value value="0x02" name="Microprocessor"           cname="_MODE_MP" />
+      <value value="0x03" name="Microcontroller"          cname="_MODE_MC" />
+    </mask>
+    <mask name="WAIT" value="0x80" >
+      <value value="0x00" name="On"  cname="_WAIT_ON" />
+      <value value="0x80" name="Off" cname="_WAIT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" cmask="0x02" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RE7" cname="_CCP2MUX_RE7" />
+      <value value="0x01" name="RC1" cname="_CCP2MUX_RC1" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" cmask="0x40" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" cmask="0x40" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:1FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="2000:3FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="4000:5FFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="6000:7FFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON" />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F8525.xml b/src/devices/pic/xml_data/18F8525.xml
new file mode 100644
index 0000000..e7b5219
--- /dev/null
+++ b/src/devices/pic/xml_data/18F8525.xml
@@ -0,0 +1,312 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F8525" document="010320" status="NR" alternative="18F8527" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0AC0" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" mode="not microcontroller" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+    <frequency start="4" end="25" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" mode="not microcontroller" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00BFFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x2F" >
+    <mask name="FOSC"   value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"    />
+      <value value="0x01" name="XT"           cname="_OSC_XT"    />
+      <value value="0x02" name="HS"           cname="_OSC_HS"    />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"    />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"    />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"  />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"  />
+      <value value="default" name="invalid" />
+      <value value="0x0C" name="E4_IO"        cname="_OSC_ECIOPLL" />
+      <value value="0x0D" name="E4S_IO"       cname="_OSC_ECIOSWPLL" />
+      <value value="0x0E" name="H4S"          cname="_OSC_HSSWPLL" />
+      <value value="0x0F" name="EXTRC_IO"     cname="_OSC_RCIO"  />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON" />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x83" >
+    <mask name="PM"   value="0x03" >
+      <value value="0x00" name="Extended microcontroller" cname="_MODE_EM" />
+      <value value="0x01" name="Microprocessor with boot" cname="_MODE_MPB" />
+      <value value="0x02" name="Microprocessor"           cname="_MODE_MP" />
+      <value value="0x03" name="Microcontroller"          cname="_MODE_MC" />
+    </mask>
+    <mask name="WAIT" value="0x80" >
+      <value value="0x00" name="On"  cname="_WAIT_ON" />
+      <value value="0x80" name="Off" cname="_WAIT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x02" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RE7" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4" cname="_ECCPMX_PORTH" />
+      <value value="0x02" name="RE6-RE3" cname="_ECCPMX_PORTE" />
+    </mask>
+    <mask name="MCLRE"  value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x07" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x07" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON" />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F8527.xml b/src/devices/pic/xml_data/18F8527.xml
new file mode 100644
index 0000000..62c01d4
--- /dev/null
+++ b/src/devices/pic/xml_data/18F8527.xml
@@ -0,0 +1,346 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F8527" document="021968" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x1360" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+    <frequency start="0" end="20" vdd_min="4.2" vdd_max="5.5" mode="8-bit external memory" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+    <frequency start="4" end="25" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" mode="8-bit external memory" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+    <frequency start="0" end="20" vdd_min="4.2" vdd_max="5.5" mode="8-bit external memory" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00BFFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"     />
+      <value value="0x01" name="XT"           cname="_XT_OSC"     />
+      <value value="0x02" name="HS"           cname="_HS_OSC"     />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"     />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"   />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"   />
+      <value value="0x08" name="INTRC_IO"     cname="_INTIO2_OSC" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_INTIO1_OSC" />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FSCM_OFF" />
+      <value value="0x40" name="On"  cname="_FSCM_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF" />
+      <value value="0x02" name="Software" cname="_BOREN_ON" />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1K"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2K"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4K"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8K"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16K" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32K" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF3" >
+    <mask name="PM"   value="0x03" >
+      <value value="0x00" name="Extended microcontroller" cname="_MODE_EM" />
+      <value value="0x01" name="Microprocessor with boot" cname="_MODE_MPB" />
+      <value value="0x02" name="Microprocessor"           cname="_MODE_MP" />
+      <value value="0x03" name="Microcontroller"          cname="_MODE_MC" />
+    </mask>
+    <mask name="ABW"  value="0x30" >
+      <value value="0x00" name="8"  cname="_ADDRBW_ADDR8BIT" />
+      <value value="0x10" name="12" cname="_ADDRBW_ADDR12BIT" />
+      <value value="0x20" name="16" cname="_ADDRBW_ADDR16BIT" />
+      <value value="0x30" name="20" cname="_ADDRBW_ADDR20BIT" />
+    </mask>
+    <mask name="BW"   value="0x40" >
+      <value value="0x00" name="8"  cname="_DATABW_DATA8BIT" />
+      <value value="0x40" name="16" cname="_DATABW_DATA16BIT" />
+    </mask>
+    <mask name="WAIT" value="0x80" >
+      <value value="0x00" name="On"  cname="_WAIT_ON" />
+      <value value="0x80" name="Off" cname="_WAIT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x02" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="ECCPMX"  value="0x02" >
+      <value value="0x00" name="RH7-RH4" cname="_ECCPMX_PORTH" />
+      <value value="0x02" name="RE6-RE3" cname="_ECCPMX_PORTE" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON" />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x30" >
+      <value value="0x00" name="1024" cname="_BBSIZ_BB2K" />
+      <value value="0x10" name="2048" cname="_BBSIZ_BB4K" />
+      <value value="0x20" name="4096" cname="_BBSIZ_BB8K" />
+      <value value="0x30" name="4096" cname="_BBSIZ_BB8K" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x07" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"                 cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"                 cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x07" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"                 cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON" />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F8585.xml b/src/devices/pic/xml_data/18F8585.xml
new file mode 100644
index 0000000..08367ab
--- /dev/null
+++ b/src/devices/pic/xml_data/18F8585.xml
@@ -0,0 +1,312 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F8585" document="010321" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0A40" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" mode="not microcontroller" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+    <frequency start="4" end="25" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" mode="not microcontroller" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00BFFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x2F" >
+    <mask name="FOSC"   value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"    />
+      <value value="0x01" name="XT"           cname="_OSC_XT"    />
+      <value value="0x02" name="HS"           cname="_OSC_HS"    />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"    />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"    />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"  />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"  />
+      <value value="default" name="invalid" />
+      <value value="0x0C" name="E4_IO"        cname="_OSC_ECIOPLL" />
+      <value value="0x0D" name="E4S_IO"       cname="_OSC_ECIOSWPLL" />
+      <value value="0x0E" name="H4S"          cname="_OSC_HSSWPLL" />
+      <value value="0x0F" name="EXTRC_IO"     cname="_OSC_RCIO"  />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON" />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x83" >
+    <mask name="PM"   value="0x03" >
+      <value value="0x00" name="Extended microcontroller" cname="_MODE_EM" />
+      <value value="0x01" name="Microprocessor with boot" cname="_MODE_MPB" />
+      <value value="0x02" name="Microprocessor"           cname="_MODE_MP" />
+      <value value="0x03" name="Microcontroller"          cname="_MODE_MC" />
+    </mask>
+    <mask name="WAIT" value="0x80" >
+      <value value="0x00" name="On"  cname="_WAIT_ON" />
+      <value value="0x80" name="Off" cname="_WAIT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x02" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RE7" cname="_CCP2MX_OFF" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_ON" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH6" cname="_ECCPMX_PORTH" />
+      <value value="0x02" name="RE6-RE5" cname="_ECCPMX_PORTE" />
+    </mask>
+    <mask name="MCLRE"  value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x07" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x07" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON" />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F85J10.xml b/src/devices/pic/xml_data/18F85J10.xml
new file mode 100644
index 0000000..99b998c
--- /dev/null
+++ b/src/devices/pic/xml_data/18F85J10.xml
@@ -0,0 +1,143 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F85J10" status="IP" memory_technology="FLASH" architecture="18J" id="0x15E0" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="022353" datasheet="39663" progsheet="39644" erratas="80315 80246 80341 80340" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x007FF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x007FF8" end="0x007FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+    <mask name="EASHFT"  value="0x08" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x08" name="On"  cname="" />
+    </mask>
+    <mask name="EMB"  value="0x30" >
+      <value value="0x00" name="20BIT"    cname="" />
+      <value value="0x10" name="16BIT"    cname="" />
+      <value value="0x20" name="12BIT"    cname="" />
+      <value value="0x30" name="Disabled" cname="" />
+    </mask>
+    <mask name="BW"  value="0x40" >
+      <value value="0x00" name="8"  cname="" />
+      <value value="0x40" name="16" cname="" />
+    </mask>
+    <mask name="WAIT"  value="0x80" >
+      <value value="0x00" name="On"  cname="" />
+      <value value="0x80" name="Off" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x03" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"  cname=""  />
+      <value value="0x02" name="RE6-RE3"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F85J11.xml b/src/devices/pic/xml_data/18F85J11.xml
new file mode 100644
index 0000000..91b4cc2
--- /dev/null
+++ b/src/devices/pic/xml_data/18F85J11.xml
@@ -0,0 +1,143 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F85J11" status="IP" memory_technology="FLASH" architecture="18J" id="0x39E0" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="026360" datasheet="39774" progsheet="39644" erratas="80318" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x007FF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x007FF8" end="0x007FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+    <mask name="EASHFT"  value="0x08" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x08" name="On"  cname="" />
+    </mask>
+    <mask name="EMB"  value="0x30" >
+      <value value="0x00" name="20BIT"    cname="" />
+      <value value="0x10" name="16BIT"    cname="" />
+      <value value="0x20" name="12BIT"    cname="" />
+      <value value="0x30" name="Disabled" cname="" />
+    </mask>
+    <mask name="BW"  value="0x40" >
+      <value value="0x00" name="8"  cname="" />
+      <value value="0x40" name="16" cname="" />
+    </mask>
+    <mask name="WAIT"  value="0x80" >
+      <value value="0x00" name="On"  cname="" />
+      <value value="0x80" name="Off" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x03" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"  cname=""  />
+      <value value="0x02" name="RE6-RE3"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F85J15.xml b/src/devices/pic/xml_data/18F85J15.xml
new file mode 100644
index 0000000..c2445ab
--- /dev/null
+++ b/src/devices/pic/xml_data/18F85J15.xml
@@ -0,0 +1,143 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F85J15" status="IP" memory_technology="FLASH" architecture="18J" id="0x1700" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="022352" datasheet="39663" progsheet="39644" erratas="80315 80246 80341 80340" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x00BFF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x00BFF8" end="0x00BFFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+    <mask name="EASHFT"  value="0x08" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x08" name="On"  cname="" />
+    </mask>
+    <mask name="EMB"  value="0x30" >
+      <value value="0x00" name="20BIT"    cname="" />
+      <value value="0x10" name="16BIT"    cname="" />
+      <value value="0x20" name="12BIT"    cname="" />
+      <value value="0x30" name="Disabled" cname="" />
+    </mask>
+    <mask name="BW"  value="0x40" >
+      <value value="0x00" name="8"  cname="" />
+      <value value="0x40" name="16" cname="" />
+    </mask>
+    <mask name="WAIT"  value="0x80" >
+      <value value="0x00" name="On"  cname="" />
+      <value value="0x80" name="Off" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x03" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"  cname=""  />
+      <value value="0x02" name="RE6-RE3"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F85J50.xml b/src/devices/pic/xml_data/18F85J50.xml
new file mode 100644
index 0000000..dee0637
--- /dev/null
+++ b/src/devices/pic/xml_data/18F85J50.xml
@@ -0,0 +1,161 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek                                   *-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F85J50" status="IP" memory_technology="FLASH" architecture="18J" id="0x41A0" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="027176" datasheet="39775" progsheet="39644" erratas="80321" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x007FF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x007FF8" end="0x007FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xEF" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="PLLDIV"  value="0x0E" >
+      <value value="0x00" name="12" cname="" />
+      <value value="0x02" name="10" cname="" />
+      <value value="0x04" name="6"  cname="" />
+      <value value="0x06" name="5"  cname="" />
+      <value value="0x08" name="4"  cname="" />
+      <value value="0x0A" name="3"  cname="" />
+      <value value="0x0C" name="2"  cname="" />
+      <value value="0x0E" name="1"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+    <mask name="EASHFT"  value="0x08" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x08" name="On"  cname="" />
+    </mask>
+    <mask name="EMB"  value="0x30" >
+      <value value="0x00" name="20BIT"    cname="" />
+      <value value="0x10" name="16BIT"    cname="" />
+      <value value="0x20" name="12BIT"    cname="" />
+      <value value="0x30" name="Disabled" cname="" />
+    </mask>
+    <mask name="BW"  value="0x40" >
+      <value value="0x00" name="8"  cname="" />
+      <value value="0x40" name="16" cname="" />
+    </mask>
+    <mask name="WAIT"  value="0x80" >
+      <value value="0x00" name="On"  cname="" />
+      <value value="0x80" name="Off" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"  cname=""  />
+      <value value="0x02" name="RE6-RE3"   cname="" />
+    </mask>
+    <mask name="PMPMX" value="0x04" >
+      <value value="0x00" name="NotConnected"  cname="" />
+      <value value="0x04" name="Connected"     cname="" />
+    </mask>
+    <mask name="MSSPSEL" value="0x08" >
+      <value value="0x00" name="5BIT"  cname="" />
+      <value value="0x08" name="7BIT"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F85J90.xml b/src/devices/pic/xml_data/18F85J90.xml
new file mode 100644
index 0000000..61e7571
--- /dev/null
+++ b/src/devices/pic/xml_data/18F85J90.xml
@@ -0,0 +1,142 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F85J90" status="IP" memory_technology="FLASH" architecture="18J" id="0x38E0" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="026342" datasheet="39770" progsheet="39644" erratas="80286 80312" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x007FF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x007FF8" end="0x007FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+    <mask name="EASHFT"  value="0x08" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x08" name="On"  cname="" />
+    </mask>
+    <mask name="EMB"  value="0x30" >
+      <value value="0x00" name="20BIT"    cname="" />
+      <value value="0x10" name="16BIT"    cname="" />
+      <value value="0x20" name="12BIT"    cname="" />
+      <value value="0x30" name="Disabled" cname="" />
+    </mask>
+    <mask name="BW"  value="0x40" >
+      <value value="0x00" name="8"  cname="" />
+      <value value="0x40" name="16" cname="" />
+    </mask>
+    <mask name="WAIT"  value="0x80" >
+      <value value="0x00" name="On"  cname="" />
+      <value value="0x80" name="Off" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x03" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"  cname=""  />
+      <value value="0x02" name="RE6-RE3"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F8620.xml b/src/devices/pic/xml_data/18F8620.xml
new file mode 100644
index 0000000..8503556
--- /dev/null
+++ b/src/devices/pic/xml_data/18F8620.xml
@@ -0,0 +1,311 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F8620" document="010322" status="NR" alternative="18F8622" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0640" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0x035B" cchecksum="0x02B1" />
+    <checksum protected_blocks="1" bchecksum="0x052E" cchecksum="0x04D4" />
+    <checksum protected_blocks="3" bchecksum="0x832B" cchecksum="0x82D1" />
+    <checksum protected_blocks="5" bchecksum="0x031F" cchecksum="0x031A" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+    <frequency start="0" end="16" vdd_min="4.2" vdd_max="5.5" mode="not microcontroller" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="25" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+    <frequency start="4" end="16" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" mode="not microcontroller" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="16" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00FFFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC"   value="0x07" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"    sdcc_cname="_OSC_LP" />
+      <value value="0x01" name="XT"           cname="_XT_OSC"    sdcc_cname="_OSC_XT" />
+      <value value="0x02" name="HS"           cname="_HS_OSC"    sdcc_cname="_OSC_HS" />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC"    sdcc_cname="_OSC_RC" />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"    sdcc_cname="_OSC_EC_OSC2_Clock_Out" />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"  sdcc_cname="_OSC_EC_OSC2_RA6" />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC" sdcc_cname="_OSC_HS_PLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"  sdcc_cname="_OSC_RC_OSC2" />
+   </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON" />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  sdcc_cname="_PUT_ON" />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" sdcc_cname="_PUT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" sdcc_cname="_BODEN_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  sdcc_cname="_BODEN_ON" />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" sdcc_cname="_BODENV_4_5V" />
+      <value value="0x04" name="4.2" cname="_BORV_42" sdcc_cname="_BODENV_4_2V" />
+      <value value="0x08" name="2.7" cname="_BORV_27" sdcc_cname="_BODENV_2_7V" />
+      <value value="0x0C" name="2.5" cname="_BORV_20" sdcc_cname="_BODENV_2_5V" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   sdcc_cname="_WDTPS_1_1" />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   sdcc_cname="_WDTPS_1_2" />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   sdcc_cname="_WDTPS_1_4" />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   sdcc_cname="_WDTPS_1_8" />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  sdcc_cname="_WDTPS_1_16" />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  sdcc_cname="_WDTPS_1_32" />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  sdcc_cname="_WDTPS_1_64" />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" sdcc_cname="_WDTPS_1_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x83" >
+    <mask name="PM"   value="0x03" >
+      <value value="0x00" name="Extended microcontroller" cname="_XMC_MODE" sdcc_cname="_PMODE_EXT" />
+      <value value="0x01" name="Microprocessor with boot" cname="_MPB_MODE" sdcc_cname="_PMODE_MICROPROCESSOR_w_Boot" />
+      <value value="0x02" name="Microprocessor"           cname="_MP_MODE"  sdcc_cname="_PMODE_MICROPROCESSOR_" />
+      <value value="0x03" name="Microcontroller"          cname="_MC_MODE"  sdcc_cname="_PMODE_MICROCONTROLLER" />
+    </mask>
+    <mask name="WAIT" value="0x80" >
+      <value value="0x00" name="On"  cname="_WAIT_ON" />
+      <value value="0x80" name="Off" cname="_WAIT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RE7" cname="_CCP2MX_OFF" sdcc_cname="_CCP2MUX_RE7_MICROCONTROLLER__RB3" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_ON"  sdcc_cname="_CCP2MUX_RC1" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  sdcc_cname="_BACKBUG_ON" />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" sdcc_cname="_BACKBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:3FFF" cname="_CP0_ON"  sdcc_cname="_CP_0_ON" />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" sdcc_cname="_CP_0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  sdcc_cname="_CP_1_ON" />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" sdcc_cname="_CP_1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  sdcc_cname="_CP_2_ON" />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" sdcc_cname="_CP_2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON"  sdcc_cname="_CP_3_ON" />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" sdcc_cname="_CP_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:3FFF" cname="_WRT0_ON"  sdcc_cname="_WRT_0_ON" />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" sdcc_cname="_WRT_0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  sdcc_cname="_WRT_1_ON" />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" sdcc_cname="_WRT_1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON"  sdcc_cname="_WRT_2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" sdcc_cname="_WRT_2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON"  sdcc_cname="_WRT_3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" sdcc_cname="_WRT_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:3FFF" cname="_EBTR0_ON"  sdcc_cname="_EBTR_0_ON" />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" sdcc_cname="_EBTR_0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  sdcc_cname="_EBTR_1_ON" />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" sdcc_cname="_EBTR_1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  sdcc_cname="_EBTR_2_ON" />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" sdcc_cname="_EBTR_2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON"  sdcc_cname="_EBTR_3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" sdcc_cname="_EBTR_3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_EBTRB_ON" />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F8621.xml b/src/devices/pic/xml_data/18F8621.xml
new file mode 100644
index 0000000..e5689ae
--- /dev/null
+++ b/src/devices/pic/xml_data/18F8621.xml
@@ -0,0 +1,324 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F8621" document="010323" status="NR" alternative="18F8622" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0A80" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" mode="not microcontroller" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+    <frequency start="4" end="25" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" mode="not microcontroller" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00FFFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x2F" >
+    <mask name="FOSC"   value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"    />
+      <value value="0x01" name="XT"           cname="_OSC_XT"    />
+      <value value="0x02" name="HS"           cname="_OSC_HS"    />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"    />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"    />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"  />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"  />
+      <value value="default" name="invalid" />
+      <value value="0x0C" name="E4_IO"        cname="_OSC_ECIOPLL" />
+      <value value="0x0D" name="E4S_IO"       cname="_OSC_ECIOSWPLL" />
+      <value value="0x0E" name="H4S"          cname="_OSC_HSSWPLL" />
+      <value value="0x0F" name="EXTRC_IO"     cname="_OSC_RCIO"  />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON" />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x83" >
+    <mask name="PM"   value="0x03" >
+      <value value="0x00" name="Extended microcontroller" cname="_MODE_EM" />
+      <value value="0x01" name="Microprocessor with boot" cname="_MODE_MPB" />
+      <value value="0x02" name="Microprocessor"           cname="_MODE_MP" />
+      <value value="0x03" name="Microcontroller"          cname="_MODE_MC" />
+    </mask>
+    <mask name="WAIT" value="0x80" >
+      <value value="0x00" name="On"  cname="_WAIT_ON" />
+      <value value="0x80" name="Off" cname="_WAIT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x02" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RE7" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4" cname="_ECCPMX_PORTH" />
+      <value value="0x02" name="RE6-RE3" cname="_ECCPMX_PORTE" />
+    </mask>
+    <mask name="MCLRE"  value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" cmask="0x08" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" cmask="0x08" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" cmask="0x08" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON" />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F8622.xml b/src/devices/pic/xml_data/18F8622.xml
new file mode 100644
index 0000000..fe29be9
--- /dev/null
+++ b/src/devices/pic/xml_data/18F8622.xml
@@ -0,0 +1,358 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F8622" document="021967" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x13A0" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+    <frequency start="0" end="20" vdd_min="4.2" vdd_max="5.5" mode="8-bit external memory" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+    <frequency start="4" end="25" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" mode="8-bit external memory" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+    <frequency start="0" end="20" vdd_min="4.2" vdd_max="5.5" mode="8-bit external memory" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00FFFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"     />
+      <value value="0x01" name="XT"           cname="_XT_OSC"     />
+      <value value="0x02" name="HS"           cname="_HS_OSC"     />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"     />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"   />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"   />
+      <value value="0x08" name="INTRC_IO"     cname="_INTIO2_OSC" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_INTIO1_OSC" />
+      <value value="0x0A" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x0B" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x0C" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x0D" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x0E" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+      <value value="0x0F" name="EXTRC_CLKOUT" cname="_RC_OSC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FSCM_OFF" />
+      <value value="0x40" name="On"  cname="_FSCM_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF" />
+      <value value="0x02" name="Software" cname="_BOREN_ON" />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1K"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2K"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4K"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8K"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16K" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32K" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF3" >
+    <mask name="PM"   value="0x03" >
+      <value value="0x00" name="Extended microcontroller" cname="_MODE_EM" />
+      <value value="0x01" name="Microprocessor with boot" cname="_MODE_MPB" />
+      <value value="0x02" name="Microprocessor"           cname="_MODE_MP" />
+      <value value="0x03" name="Microcontroller"          cname="_MODE_MC" />
+    </mask>
+    <mask name="ABW"  value="0x30" >
+      <value value="0x00" name="8"  cname="_ADDRBW_ADDR8BIT" />
+      <value value="0x10" name="12" cname="_ADDRBW_ADDR12BIT" />
+      <value value="0x20" name="16" cname="_ADDRBW_ADDR16BIT" />
+      <value value="0x30" name="20" cname="_ADDRBW_ADDR20BIT" />
+    </mask>
+    <mask name="BW"   value="0x40" >
+      <value value="0x00" name="8"  cname="_DATABW_DATA8BIT" />
+      <value value="0x40" name="16" cname="_DATABW_DATA16BIT" />
+    </mask>
+    <mask name="WAIT" value="0x80" >
+      <value value="0x00" name="On"  cname="_WAIT_ON" />
+      <value value="0x80" name="Off" cname="_WAIT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x02" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CPP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CPP2MX_PORTC" />
+    </mask>
+    <mask name="ECCPMX"  value="0x02" >
+      <value value="0x00" name="RH7-RH6" cname="_ECCPMX_PORTH" />
+      <value value="0x02" name="RE6-RE5" cname="_ECCPMX_PORTE" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON" />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x30" >
+      <value value="0x00" name="1024" cname="_BBSIZ_BB2K" />
+      <value value="0x10" name="2048" cname="_BBSIZ_BB4K" />
+      <value value="0x20" name="4096" cname="_BBSIZ_BB8K" />
+      <value value="0x30" name="4096" cname="_BBSIZ_BB7K" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"                 cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"                 cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"                 cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON" />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F8627.xml b/src/devices/pic/xml_data/18F8627.xml
new file mode 100644
index 0000000..2b7f70b
--- /dev/null
+++ b/src/devices/pic/xml_data/18F8627.xml
@@ -0,0 +1,376 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F8627" document="010324" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x13E0" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+    <frequency start="0" end="20" vdd_min="4.2" vdd_max="5.5" mode="8-bit external memory" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+    <frequency start="4" end="25" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" mode="8-bit external memory" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+    <frequency start="0" end="20" vdd_min="4.2" vdd_max="5.5" mode="8-bit external memory" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x017FFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+    </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF" />
+      <value value="0x02" name="Software" cname="_BOREN_ON" />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF3" >
+    <mask name="PM"   value="0x03" >
+      <value value="0x00" name="Extended microcontroller" cname="_MODE_EM" />
+      <value value="0x01" name="Microprocessor with boot" cname="_MODE_MPB" />
+      <value value="0x02" name="Microprocessor"           cname="_MODE_MP" />
+      <value value="0x03" name="Microcontroller"          cname="_MODE_MC" />
+    </mask>
+    <mask name="ABW"  value="0x30" >
+      <value value="0x00" name="8"  cname="_ADDRBW_ADDR8BIT" />
+      <value value="0x10" name="12" cname="_ADDRBW_ADDR12BIT" />
+      <value value="0x20" name="16" cname="_ADDRBW_ADDR16BIT" />
+      <value value="0x30" name="20" cname="_ADDRBW_ADDR20BIT" />
+    </mask>
+    <mask name="BW"   value="0x40" >
+      <value value="0x00" name="8"  cname="_DATABW_DATA8BIT" />
+      <value value="0x40" name="16" cname="_DATABW_DATA16BIT" />
+    </mask>
+    <mask name="WAIT" value="0x80" >
+      <value value="0x00" name="On"  cname="_WAIT_ON" />
+      <value value="0x80" name="Off" cname="_WAIT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x02" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="ECCPMX"  value="0x02" >
+      <value value="0x00" name="RH7-RH6" cname="_ECCPMX_PORTH" />
+      <value value="0x02" name="RE6-RE5" cname="_ECCPMX_PORTE" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON" />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x30" >
+      <value value="0x00" name="1024" cname="_BBSIZ_BB2K" />
+      <value value="0x10" name="2048" cname="_BBSIZ_BB4K" />
+      <value value="0x20" name="4096" cname="_BBSIZ_BB8K" />
+      <value value="0x30" name="4096" cname="_BBSIZ_BB8K" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x3F" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"                 cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+    <mask name="CP_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_CP4_ON" />
+      <value value="0x10" name="Off"         cname="_CP4_OFF" />
+    </mask>
+    <mask name="CP_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_CP5_ON" />
+      <value value="0x20" name="Off"         cname="_CP5_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x3F" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"                 cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+    <mask name="WRT_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_WRT4_ON" />
+      <value value="0x10" name="Off"         cname="_WRT4_OFF" />
+    </mask>
+    <mask name="WRT_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_WRT5_ON" />
+      <value value="0x20" name="Off"         cname="_WRT5_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x3F" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"                 cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+    <mask name="EBTR_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_EBTR4_ON" />
+      <value value="0x10" name="Off"         cname="_EBTR4_OFF" />
+    </mask>
+    <mask name="EBTR_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_EBTR5_ON" />
+      <value value="0x20" name="Off"         cname="_EBTR5_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON" />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F8680.xml b/src/devices/pic/xml_data/18F8680.xml
new file mode 100644
index 0000000..97ec3c0
--- /dev/null
+++ b/src/devices/pic/xml_data/18F8680.xml
@@ -0,0 +1,324 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F8680" document="010325" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0A00" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" mode="not microcontroller" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+    <frequency start="4" end="25" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" mode="not microcontroller" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00FFFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x2F" >
+    <mask name="FOSC"   value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"    />
+      <value value="0x01" name="XT"           cname="_OSC_XT"    />
+      <value value="0x02" name="HS"           cname="_OSC_HS"    />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_OSC_RC"    />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"    />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO"  />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL" />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO"  />
+      <value value="default" name="invalid" />
+      <value value="0x0C" name="E4_IO"        cname="_OSC_ECIOPLL" />
+      <value value="0x0D" name="E4S_IO"       cname="_OSC_ECIOSWPLL" />
+      <value value="0x0E" name="H4S"          cname="_OSC_HSSWPLL" />
+      <value value="0x0F" name="EXTRC_IO"     cname="_OSC_RCIO"  />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON" />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x83" >
+    <mask name="PM"   value="0x03" >
+      <value value="0x00" name="Extended microcontroller" cname="_MODE_EM" />
+      <value value="0x01" name="Microprocessor with boot" cname="_MODE_MPB" />
+      <value value="0x02" name="Microprocessor"           cname="_MODE_MP" />
+      <value value="0x03" name="Microcontroller"          cname="_MODE_MC" />
+    </mask>
+    <mask name="WAIT" value="0x80" >
+      <value value="0x00" name="On"  cname="_WAIT_ON" />
+      <value value="0x80" name="Off" cname="_WAIT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x02" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RE7" cname="_CCP2MX_OFF" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_ON" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH6" cname="_ECCPMX_PORTH" />
+      <value value="0x02" name="RE6-RE5" cname="_ECCPMX_PORTE" />
+    </mask>
+    <mask name="MCLRE"  value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0x0F" cmask="0x08" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0x0F" cmask="0x08" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0x0F" cmask="0x08" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON" />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F86J10.xml b/src/devices/pic/xml_data/18F86J10.xml
new file mode 100644
index 0000000..6cc1ec1
--- /dev/null
+++ b/src/devices/pic/xml_data/18F86J10.xml
@@ -0,0 +1,143 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F86J10" status="IP" memory_technology="FLASH" architecture="18J" id="0x1720" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="022351" datasheet="39663" progsheet="39644" erratas="80315 80246 80341 80340" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x00FFF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x00FFF8" end="0x00FFFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+    <mask name="EASHFT"  value="0x08" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x08" name="On"  cname="" />
+    </mask>
+    <mask name="EMB"  value="0x30" >
+      <value value="0x00" name="20BIT"    cname="" />
+      <value value="0x10" name="16BIT"    cname="" />
+      <value value="0x20" name="12BIT"    cname="" />
+      <value value="0x30" name="Disabled" cname="" />
+    </mask>
+    <mask name="BW"  value="0x40" >
+      <value value="0x00" name="8"  cname="" />
+      <value value="0x40" name="16" cname="" />
+    </mask>
+    <mask name="WAIT"  value="0x80" >
+      <value value="0x00" name="On"  cname="" />
+      <value value="0x80" name="Off" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x03" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"  cname=""  />
+      <value value="0x02" name="RE6-RE3"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F86J11.xml b/src/devices/pic/xml_data/18F86J11.xml
new file mode 100644
index 0000000..05e065e
--- /dev/null
+++ b/src/devices/pic/xml_data/18F86J11.xml
@@ -0,0 +1,152 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek                                   *-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F86J11" status="IP" memory_technology="FLASH" architecture="18J" id="0x44E0" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="027151" datasheet="39778" progsheet="39644" erratas="80305 80344" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x00FFF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x00FFF8" end="0x00FFFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+    <mask name="EASHFT"  value="0x08" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x08" name="On"  cname="" />
+    </mask>
+    <mask name="EMB"  value="0x30" >
+      <value value="0x00" name="20BIT"    cname="" />
+      <value value="0x10" name="16BIT"    cname="" />
+      <value value="0x20" name="12BIT"    cname="" />
+      <value value="0x30" name="Disabled" cname="" />
+    </mask>
+    <mask name="BW"  value="0x40" >
+      <value value="0x00" name="8"  cname="" />
+      <value value="0x40" name="16" cname="" />
+    </mask>
+    <mask name="WAIT"  value="0x80" >
+      <value value="0x00" name="On"  cname="" />
+      <value value="0x80" name="Off" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"  cname=""  />
+      <value value="0x02" name="RE6-RE3"   cname="" />
+    </mask>
+    <mask name="PMPMX" value="0x04" >
+      <value value="0x00" name="NotConnected"  cname="" />
+      <value value="0x04" name="Connected"     cname="" />
+    </mask>
+    <mask name="MSSPSEL" value="0x08" >
+      <value value="0x00" name="5BIT"  cname="" />
+      <value value="0x08" name="7BIT"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F86J15.xml b/src/devices/pic/xml_data/18F86J15.xml
new file mode 100644
index 0000000..bcebf10
--- /dev/null
+++ b/src/devices/pic/xml_data/18F86J15.xml
@@ -0,0 +1,143 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F86J15" status="IP" memory_technology="FLASH" architecture="18J" id="0x1740" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="020088" datasheet="39663" progsheet="39644" erratas="80315 80246 80341 80340" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x017FF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x017FF8" end="0x017FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+    <mask name="EASHFT"  value="0x08" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x08" name="On"  cname="" />
+    </mask>
+    <mask name="EMB"  value="0x30" >
+      <value value="0x00" name="20BIT"    cname="" />
+      <value value="0x10" name="16BIT"    cname="" />
+      <value value="0x20" name="12BIT"    cname="" />
+      <value value="0x30" name="Disabled" cname="" />
+    </mask>
+    <mask name="BW"  value="0x40" >
+      <value value="0x00" name="8"  cname="" />
+      <value value="0x40" name="16" cname="" />
+    </mask>
+    <mask name="WAIT"  value="0x80" >
+      <value value="0x00" name="On"  cname="" />
+      <value value="0x80" name="Off" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x03" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"  cname=""  />
+      <value value="0x02" name="RE6-RE3"   cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F86J16.xml b/src/devices/pic/xml_data/18F86J16.xml
new file mode 100644
index 0000000..b06b858
--- /dev/null
+++ b/src/devices/pic/xml_data/18F86J16.xml
@@ -0,0 +1,151 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek                                   *-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F86J16" status="IP" memory_technology="FLASH" architecture="18J" id="0x4500" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="027150" datasheet="39778" progsheet="39644" erratas="80305 80344" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x017FF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x017FF8" end="0x017FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+    <mask name="EASHFT"  value="0x08" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x08" name="On"  cname="" />
+    </mask>
+    <mask name="EMB"  value="0x30" >
+      <value value="0x00" name="20BIT"    cname="" />
+      <value value="0x10" name="16BIT"    cname="" />
+      <value value="0x20" name="12BIT"    cname="" />
+      <value value="0x30" name="Disabled" cname="" />
+    </mask>
+    <mask name="BW"  value="0x40" >
+      <value value="0x00" name="8"  cname="" />
+      <value value="0x40" name="16" cname="" />
+    </mask>
+    <mask name="WAIT"  value="0x80" >
+      <value value="0x00" name="On"  cname="" />
+      <value value="0x80" name="Off" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"  cname=""  />
+      <value value="0x02" name="RE6-RE3"   cname="" />
+    </mask>
+    <mask name="PMPMX" value="0x04" >
+      <value value="0x00" name="NotConnected"  cname="" />
+      <value value="0x04" name="Connected"     cname="" />
+    </mask>
+    <mask name="MSSPSEL" value="0x08" >
+      <value value="0x00" name="5BIT"  cname="" />
+      <value value="0x08" name="7BIT"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F86J50.xml b/src/devices/pic/xml_data/18F86J50.xml
new file mode 100644
index 0000000..fa67e08
--- /dev/null
+++ b/src/devices/pic/xml_data/18F86J50.xml
@@ -0,0 +1,161 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek                                   *-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F86J50" status="IP" memory_technology="FLASH" architecture="18J" id="0x41E0" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="027175" datasheet="39775" progsheet="39644" erratas="80321" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x00FFF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x00FFF8" end="0x00FFFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xEF" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="PLLDIV"  value="0x0E" >
+      <value value="0x00" name="12" cname="" />
+      <value value="0x02" name="10" cname="" />
+      <value value="0x04" name="6"  cname="" />
+      <value value="0x06" name="5"  cname="" />
+      <value value="0x08" name="4"  cname="" />
+      <value value="0x0A" name="3"  cname="" />
+      <value value="0x0C" name="2"  cname="" />
+      <value value="0x0E" name="1"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+    <mask name="EASHFT"  value="0x08" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x08" name="On"  cname="" />
+    </mask>
+    <mask name="EMB"  value="0x30" >
+      <value value="0x00" name="20BIT"    cname="" />
+      <value value="0x10" name="16BIT"    cname="" />
+      <value value="0x20" name="12BIT"    cname="" />
+      <value value="0x30" name="Disabled" cname="" />
+    </mask>
+    <mask name="BW"  value="0x40" >
+      <value value="0x00" name="8"  cname="" />
+      <value value="0x40" name="16" cname="" />
+    </mask>
+    <mask name="WAIT"  value="0x80" >
+      <value value="0x00" name="On"  cname="" />
+      <value value="0x80" name="Off" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"  cname=""  />
+      <value value="0x02" name="RE6-RE3"   cname="" />
+    </mask>
+    <mask name="PMPMX" value="0x04" >
+      <value value="0x00" name="NotConnected"  cname="" />
+      <value value="0x04" name="Connected"     cname="" />
+    </mask>
+    <mask name="MSSPSEL" value="0x08" >
+      <value value="0x00" name="5BIT"  cname="" />
+      <value value="0x08" name="7BIT"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F86J55.xml b/src/devices/pic/xml_data/18F86J55.xml
new file mode 100644
index 0000000..9b29823
--- /dev/null
+++ b/src/devices/pic/xml_data/18F86J55.xml
@@ -0,0 +1,161 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek                                   *-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F86J55" status="IP" memory_technology="FLASH" architecture="18J" id="0x4200" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="027181" datasheet="39775" progsheet="39644" erratas="80321" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x017FF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x017FF8" end="0x017FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xEF" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="PLLDIV"  value="0x0E" >
+      <value value="0x00" name="12" cname="" />
+      <value value="0x02" name="10" cname="" />
+      <value value="0x04" name="6"  cname="" />
+      <value value="0x06" name="5"  cname="" />
+      <value value="0x08" name="4"  cname="" />
+      <value value="0x0A" name="3"  cname="" />
+      <value value="0x0C" name="2"  cname="" />
+      <value value="0x0E" name="1"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+    <mask name="EASHFT"  value="0x08" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x08" name="On"  cname="" />
+    </mask>
+    <mask name="EMB"  value="0x30" >
+      <value value="0x00" name="20BIT"    cname="" />
+      <value value="0x10" name="16BIT"    cname="" />
+      <value value="0x20" name="12BIT"    cname="" />
+      <value value="0x30" name="Disabled" cname="" />
+    </mask>
+    <mask name="BW"  value="0x40" >
+      <value value="0x00" name="8"  cname="" />
+      <value value="0x40" name="16" cname="" />
+    </mask>
+    <mask name="WAIT"  value="0x80" >
+      <value value="0x00" name="On"  cname="" />
+      <value value="0x80" name="Off" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"  cname=""  />
+      <value value="0x02" name="RE6-RE3"   cname="" />
+    </mask>
+    <mask name="PMPMX" value="0x04" >
+      <value value="0x00" name="NotConnected"  cname="" />
+      <value value="0x04" name="Connected"     cname="" />
+    </mask>
+    <mask name="MSSPSEL" value="0x08" >
+      <value value="0x00" name="5BIT"  cname="" />
+      <value value="0x08" name="7BIT"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F86J60.xml b/src/devices/pic/xml_data/18F86J60.xml
new file mode 100644
index 0000000..42f3d20
--- /dev/null
+++ b/src/devices/pic/xml_data/18F86J60.xml
@@ -0,0 +1,196 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F86J60" status="IP" memory_technology="FLASH" architecture="18J" id="0x1820" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="026444" datasheet="39762" progsheet="39688" erratas="80292" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="41.6667" vdd_min="2.7" vdd_max="3.6" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="2.7" />
+    <frequency start="4" end="41.6667" vdd_min="2.35" vdd_max="2.7" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3"   max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6"   nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3"   max="3.6"   nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00FFF7" word_write_align="32" word_erase_align="512" />
+  <memory name="config"       start="0x00FFF8" end="0x00FFFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x07" >
+    <mask name="ETHLED" value="0x01" >
+      <value value="0x00" name="Off"  cname=""  />
+      <value value="0x01" name="On"   cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"     cname="" />
+      <value value="0x02" name="RE6-RE3"     cname=""  />
+    </mask>
+    <mask name="CCP2MX"  value="0x04" >
+      <value value="0x00" name="RE7" cname="" />
+      <value value="0x04" name="RC1" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F86J65.xml b/src/devices/pic/xml_data/18F86J65.xml
new file mode 100644
index 0000000..c2cdf41
--- /dev/null
+++ b/src/devices/pic/xml_data/18F86J65.xml
@@ -0,0 +1,193 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F86J65" document="026443" status="IP" memory_technology="FLASH" architecture="18J" id="0x1F40" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="41.6667" vdd_min="2.7" vdd_max="3.6" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="2.7" />
+    <frequency start="4" end="41.6667" vdd_min="2.35" vdd_max="2.7" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3"   max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6"   nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3"   max="3.6"   nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x017FF7" word_write_align="32" word_erase_align="512" />
+  <memory name="config"       start="0x017FF8" end="0x017FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x07" >
+    <mask name="ETHLED" value="0x01" >
+      <value value="0x00" name="Off"  cname=""  />
+      <value value="0x01" name="On"   cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"     cname="" />
+      <value value="0x02" name="RE6-RE3"     cname=""  />
+    </mask>
+    <mask name="CCP2MX"  value="0x04" >
+      <value value="0x00" name="RE7" cname="" />
+      <value value="0x04" name="RC1" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F8720.xml b/src/devices/pic/xml_data/18F8720.xml
new file mode 100644
index 0000000..f634b25
--- /dev/null
+++ b/src/devices/pic/xml_data/18F8720.xml
@@ -0,0 +1,359 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F8720" document="010326" status="NR" alternative="18F8722" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x0600" >
+
+<!--* Checksums ************************************************************-->
+  <checksums>
+    <checksum protected_blocks="0" bchecksum="0x062B" cchecksum="0x0581" />
+    <checksum protected_blocks="1" bchecksum="0x07FE" cchecksum="0x07A4" />
+    <checksum protected_blocks="3" bchecksum="0x85FB" cchecksum="0x85A1" />
+    <checksum protected_blocks="9" bchecksum="0x04FF" cchecksum="0x04FA" />
+  </checksums>
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+    <frequency start="0" end="16" vdd_min="4.2" vdd_max="5.5" mode="not microcontroller" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="25" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+    <frequency start="4" end="16" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" mode="not microcontroller" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="16" vdd_min="4.2" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x01FFFF" word_write_align="4" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x27" >
+    <mask name="FOSC"   value="0x07" >
+      <value value="0x00" name="LP"           cname="_LP_OSC"    />
+      <value value="0x01" name="XT"           cname="_XT_OSC"    />
+      <value value="0x02" name="HS"           cname="_HS_OSC"    />
+      <value value="0x03" name="EXTRC_CLKOUT" cname="_RC_OSC"    />
+      <value value="0x04" name="EC_CLKOUT"    cname="_EC_OSC"    />
+      <value value="0x05" name="EC_IO"        cname="_ECIO_OSC"  />
+      <value value="0x06" name="H4"           cname="_HSPLL_OSC" />
+      <value value="0x07" name="EXTRC_IO"     cname="_RCIO_OSC"  />
+    </mask>
+    <mask name="OSCSEN" value="0x20" >
+      <value value="0x00" name="On"  cname="_OSCS_ON" />
+      <value value="0x20" name="Off" cname="_OSCS_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x0F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x02" >
+      <value value="0x00" name="Off" cname="_BOR_OFF" />
+      <value value="0x02" name="On"  cname="_BOR_ON"  />
+    </mask>
+    <mask name="BORV"  value="0x0C" >
+      <value value="0x00" name="4.5" cname="_BORV_45" />
+      <value value="0x04" name="4.2" cname="_BORV_42" />
+      <value value="0x08" name="2.7" cname="_BORV_27" />
+      <value value="0x0C" name="2.0" cname="_BORV_20" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x0E" >
+      <value value="0x00" name="1:1"   cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"   cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"   cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"   cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"  cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"  cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"  cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128" cname="_WDTPS_128" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x83" >
+    <mask name="PM"   value="0x03" >
+      <value value="0x00" name="Extended microcontroller" cname="_XMC_MODE" />
+      <value value="0x01" name="Microprocessor with boot" cname="_MPB_MODE" />
+      <value value="0x02" name="Microprocessor"           cname="_MP_MODE" />
+      <value value="0x03" name="Microcontroller"          cname="_MC_MODE" />
+    </mask>
+    <mask name="WAIT" value="0x80" >
+      <value value="0x00" name="On"  cname="_WAIT_ON" />
+      <value value="0x80" name="Off" cname="_WAIT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x01" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RE7" cname="_CCP2MX_OFF" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_ON" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVR_OFF" />
+      <value value="0x01" name="On"  cname="_STVR_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0xFF" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0200:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"       cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+    <mask name="CP_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_CP4_ON" />
+      <value value="0x10" name="Off"         cname="_CP4_OFF" />
+    </mask>
+    <mask name="CP_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_CP5_ON" />
+      <value value="0x20" name="Off"         cname="_CP5_OFF" />
+    </mask>
+    <mask name="CP_6" value="0x40" >
+      <value value="0x00" name="18000:1BFFF" cname="_CP6_ON" />
+      <value value="0x40" name="Off"         cname="_CP6_OFF" />
+    </mask>
+    <mask name="CP_7" value="0x80" >
+      <value value="0x00" name="1C000:1FFFF" cname="_CP7_ON" />
+      <value value="0x80" name="Off"         cname="_CP7_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_CPB_ON"  />
+      <value value="0x40" name="Off"       cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0xFF" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0200:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"       cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+    <mask name="WRT_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_WRT4_ON" />
+      <value value="0x10" name="Off"         cname="_WRT4_OFF" />
+    </mask>
+    <mask name="WRT_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_WRT5_ON" />
+      <value value="0x20" name="Off"         cname="_WRT5_OFF" />
+    </mask>
+    <mask name="WRT_6" value="0x40" >
+      <value value="0x00" name="18000:1BFFF" cname="_WRT6_ON" />
+      <value value="0x40" name="Off"         cname="_WRT6_OFF" />
+    </mask>
+    <mask name="WRT_7" value="0x80" >
+      <value value="0x00" name="1C000:1FFFF" cname="_WRT7_ON" />
+      <value value="0x80" name="Off"         cname="_WRT7_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="0000:01FF" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off"       cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0xFF" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0200:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"       cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+    <mask name="EBTR_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_EBTR4_ON" />
+      <value value="0x10" name="Off"         cname="_EBTR4_OFF" />
+    </mask>
+    <mask name="EBTR_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_EBTR5_ON" />
+      <value value="0x20" name="Off"         cname="_EBTR5_OFF" />
+    </mask>
+    <mask name="EBTR_6" value="0x40" >
+      <value value="0x00" name="18000:1BFFF" cname="_EBTR6_ON" />
+      <value value="0x40" name="Off"         cname="_EBTR6_OFF" />
+    </mask>
+    <mask name="EBTR_7" value="0x80" >
+      <value value="0x00" name="1C000:1FFFF" cname="_EBTR7_ON" />
+      <value value="0x80" name="Off"         cname="_EBTR7_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="0000:07FF" cname="_EBTRB_ON" />
+      <value value="0x40" name="Off"       cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F8722.xml b/src/devices/pic/xml_data/18F8722.xml
new file mode 100644
index 0000000..3db0bbd
--- /dev/null
+++ b/src/devices/pic/xml_data/18F8722.xml
@@ -0,0 +1,400 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F8722" document="010327" status="IP" memory_technology="FLASH" self_write="yes" architecture="18F" id="0x1420" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="40" vdd_min="4.2" vdd_max="5.5" />
+    <frequency start="0" end="20" vdd_min="4.2" vdd_max="5.5" mode="8-bit external memory" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4"  vdd_min="2" vdd_max="5.5" />
+    <frequency start="4" end="40" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" />
+    <frequency start="4" end="25" vdd_min="2" vdd_max="5.5" vdd_min_end="4.2" mode="8-bit external memory" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0" end="25" vdd_min="4.2" vdd_max="5.5" />
+    <frequency start="0" end="20" vdd_min="4.2" vdd_max="5.5" mode="8-bit external memory" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2"   max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x01FFFF" word_write_align="32" word_erase_align="32" />
+  <memory name="user_ids"     start="0x200000" end="0x200007" rmask="0x0F"              />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+  <memory name="config"       start="0x300000" end="0x30000D" />
+  <memory name="eeprom"       start="0x000000" end="0x0003FF" hexfile_offset="0xF00000" />
+  <memory name="debug_vector" start="0x200028" end="0x200037" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xFF" bvalue="0x07" >
+    <mask name="FOSC"  value="0x0F" >
+      <value value="0x00" name="LP"           cname="_OSC_LP"     />
+      <value value="0x01" name="XT"           cname="_OSC_XT"     />
+      <value value="0x02" name="HS"           cname="_OSC_HS"     />
+      <value value="0x04" name="EC_CLKOUT"    cname="_OSC_EC"     />
+      <value value="0x05" name="EC_IO"        cname="_OSC_ECIO6"   />
+      <value value="0x06" name="H4"           cname="_OSC_HSPLL"  />
+      <value value="0x07" name="EXTRC_IO"     cname="_OSC_RCIO6"   />
+      <value value="0x08" name="INTRC_IO"     cname="_OSC_INTIO67" />
+      <value value="0x09" name="INTRC_CLKOUT" cname="_OSC_INTIO7" />
+      <value value="default" name="EXTRC_CLKOUT" cname="_OSC_RC"     />
+   </mask>
+    <mask name="FCMEN" value="0x40" >
+      <value value="0x00" name="Off" cname="_FCMEN_OFF" />
+      <value value="0x40" name="On"  cname="_FCMEN_ON"  />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="Off" cname="_IESO_OFF" />
+      <value value="0x80" name="On"  cname="_IESO_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0x1F" >
+    <mask name="PWRTE" value="0x01" >
+      <value value="0x00" name="On"  cname="_PWRT_ON"  />
+      <value value="0x01" name="Off" cname="_PWRT_OFF" />
+    </mask>
+    <mask name="BODEN" value="0x06" >
+      <value value="0x00" name="Off"      cname="_BOREN_OFF" />
+      <value value="0x02" name="Software" cname="_BOREN_ON" />
+      <value value="0x04" name="On_run"   cname="_BOREN_NOSLP" />
+      <value value="0x06" name="On"       cname="_BOREN_SBORDIS" />
+    </mask>
+    <mask name="BORV"  value="0x18" >
+      <value value="0x00" name="4.5" cname="_BORV_0" />
+      <value value="0x08" name="4.2" cname="_BORV_1" />
+      <value value="0x10" name="2.7" cname="_BORV_2" />
+      <value value="0x18" name="2.0" cname="_BORV_3" />
+    </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x1F" >
+    <mask name="WDT"   value="0x01" >
+      <value value="0x00" name="Off" cname="_WDT_OFF" />
+      <value value="0x01" name="On"  cname="_WDT_ON"  />
+    </mask>
+    <mask name="WDTPS" value="0x1E" >
+      <value value="0x00" name="1:1"     cname="_WDTPS_1"   />
+      <value value="0x02" name="1:2"     cname="_WDTPS_2"   />
+      <value value="0x04" name="1:4"     cname="_WDTPS_4"   />
+      <value value="0x06" name="1:8"     cname="_WDTPS_8"   />
+      <value value="0x08" name="1:16"    cname="_WDTPS_16"  />
+      <value value="0x0A" name="1:32"    cname="_WDTPS_32"  />
+      <value value="0x0C" name="1:64"    cname="_WDTPS_64"  />
+      <value value="0x0E" name="1:128"   cname="_WDTPS_128" />
+      <value value="0x10" name="1:256"   cname="_WDTPS_256" />
+      <value value="0x12" name="1:512"   cname="_WDTPS_512" />
+      <value value="0x14" name="1:1024"  cname="_WDTPS_1024"  />
+      <value value="0x16" name="1:2048"  cname="_WDTPS_2048"  />
+      <value value="0x18" name="1:4096"  cname="_WDTPS_4096"  />
+      <value value="0x1A" name="1:8192"  cname="_WDTPS_8192"  />
+      <value value="0x1C" name="1:16384" cname="_WDTPS_16384" />
+      <value value="0x1E" name="1:32768" cname="_WDTPS_32768" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF3" >
+    <mask name="PM"   value="0x03" >
+      <value value="0x00" name="Extended microcontroller" cname="_MODE_EM" />
+      <value value="0x01" name="Microprocessor with boot" cname="_MODE_MPB" />
+      <value value="0x02" name="Microprocessor"           cname="_MODE_MP" />
+      <value value="0x03" name="Microcontroller"          cname="_MODE_MC" />
+    </mask>
+    <mask name="ABW"  value="0x30" >
+      <value value="0x00" name="8"  cname="_ADDRBW_ADDR8BIT" />
+      <value value="0x10" name="12" cname="_ADDRBW_ADDR12BIT" />
+      <value value="0x20" name="16" cname="_ADDRBW_ADDR16BIT" />
+      <value value="0x30" name="20" cname="_ADDRBW_ADDR20BIT" />
+    </mask>
+    <mask name="BW"   value="0x40" >
+      <value value="0x00" name="8"  cname="_DATABW_DATA8BIT" />
+      <value value="0x40" name="16" cname="_DATABW_DATA16BIT" />
+    </mask>
+    <mask name="WAIT" value="0x80" >
+      <value value="0x00" name="On"  cname="_WAIT_ON" />
+      <value value="0x80" name="Off" cname="_WAIT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x83" cmask="0x02" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RB3" cname="_CCP2MX_PORTBE" />
+      <value value="0x01" name="RC1" cname="_CCP2MX_PORTC" />
+    </mask>
+    <mask name="ECCPMX"  value="0x02" >
+      <value value="0x00" name="RH7-RH6" cname="_ECCPMX_PORTH" />
+      <value value="0x02" name="RE6-RE5" cname="_ECCPMX_PORTE" />
+    </mask>
+    <mask name="LPT1OSC" value="0x04" >
+      <value value="0x00" name="Off" cname="_LPT1OSC_OFF" />
+      <value value="0x04" name="On"  cname="_LPT1OSC_ON" />
+    </mask>
+    <mask name="MCLRE"   value="0x80" >
+      <value value="0x00" name="Internal" cname="_MCLRE_OFF" />
+      <value value="0x80" name="External" cname="_MCLRE_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x85" >
+    <mask name="STVREN" value="0x01" >
+      <value value="0x00" name="Off" cname="_STVREN_OFF" />
+      <value value="0x01" name="On"  cname="_STVREN_ON"  />
+    </mask>
+    <mask name="LVP"    value="0x04" >
+      <value value="0x00" name="Off" cname="_LVP_OFF" />
+      <value value="0x04" name="On"  cname="_LVP_ON"  />
+    </mask>
+    <mask name="BBSIZ"  value="0x30" >
+      <value value="0x00" name="1024" cname="_BBSIZ_BB2K" />
+      <value value="0x10" name="2048" cname="_BBSIZ_BB4K" />
+      <value value="0x20" name="4096" cname="_BBSIZ_BB8K" />
+      <value value="0x30" name="4096" cname="_BBSIZ_BB8K" />
+    </mask>
+    <mask name="XINST"  value="0x40" >
+      <value value="0x00" name="Off" cname="_XINST_OFF" />
+      <value value="0x40" name="On"  cname="_XINST_ON" />
+    </mask>
+    <mask name="DEBUG"  value="0x80" >
+      <value value="0x00" name="On"  cname="_DEBUG_ON"  />
+      <value value="0x80" name="Off" cname="_DEBUG_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" />
+
+  <config offset="0x8" name="CONFIG5L" wmask="0xFF" bvalue="0xFF" >
+    <mask name="CP_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_CP0_ON"  />
+      <value value="0x01" name="Off"                 cname="_CP0_OFF" />
+    </mask>
+    <mask name="CP_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_CP1_ON"  />
+      <value value="0x02" name="Off"       cname="_CP1_OFF" />
+    </mask>
+    <mask name="CP_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_CP2_ON"  />
+      <value value="0x04" name="Off"       cname="_CP2_OFF" />
+    </mask>
+    <mask name="CP_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_CP3_ON"  />
+      <value value="0x08" name="Off"       cname="_CP3_OFF" />
+    </mask>
+    <mask name="CP_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_CP4_ON" />
+      <value value="0x10" name="Off"         cname="_CP4_OFF" />
+    </mask>
+    <mask name="CP_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_CP5_ON" />
+      <value value="0x20" name="Off"         cname="_CP5_OFF" />
+    </mask>
+    <mask name="CP_6" value="0x40" >
+      <value value="0x00" name="18000:1BFFF" cname="_CP6_ON" />
+      <value value="0x40" name="Off"         cname="_CP6_OFF" />
+    </mask>
+    <mask name="CP_7" value="0x80" >
+      <value value="0x00" name="1C000:1FFFF" cname="_CP7_ON" />
+      <value value="0x80" name="Off"         cname="_CP7_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0x9" name="CONFIG5H" wmask="0xFF" bvalue="0xC0" >
+    <mask name="CPB" value="0x40" >
+      <value value="0x00" name="All" cname="_CPB_ON"  />
+      <value value="0x40" name="Off" cname="_CPB_OFF" />
+    </mask>
+    <mask name="CPD" value="0x80" >
+      <value value="0x00" name="All" cname="_CPD_ON"  />
+      <value value="0x80" name="Off" cname="_CPD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="CONFIG6L" wmask="0xFF" bvalue="0xFF" >
+    <mask name="WRT_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_WRT0_ON"  />
+      <value value="0x01" name="Off"                 cname="_WRT0_OFF" />
+    </mask>
+    <mask name="WRT_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_WRT1_ON"  />
+      <value value="0x02" name="Off"       cname="_WRT1_OFF" />
+    </mask>
+    <mask name="WRT_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_WRT2_ON" />
+      <value value="0x04" name="Off"       cname="_WRT2_OFF" />
+    </mask>
+    <mask name="WRT_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_WRT3_ON" />
+      <value value="0x08" name="Off"       cname="_WRT3_OFF" />
+    </mask>
+    <mask name="WRT_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_WRT4_ON" />
+      <value value="0x10" name="Off"         cname="_WRT4_OFF" />
+    </mask>
+    <mask name="WRT_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_WRT5_ON" />
+      <value value="0x20" name="Off"         cname="_WRT5_OFF" />
+    </mask>
+    <mask name="WRT_6" value="0x40" >
+      <value value="0x00" name="18000:1BFFF" cname="_WRT6_ON" />
+      <value value="0x40" name="Off"         cname="_WRT6_OFF" />
+    </mask>
+    <mask name="WRT_7" value="0x80" >
+      <value value="0x00" name="1C000:1FFFF" cname="_WRT7_ON" />
+      <value value="0x80" name="Off"         cname="_WRT7_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xB" name="CONFIG6H" wmask="0xFF" bvalue="0xE0" >
+    <mask name="WRTC" value="0x20" >
+      <value value="0x00" name="All" cname="_WRTC_ON"  />
+      <value value="0x20" name="Off" cname="_WRTC_OFF" />
+    </mask>
+    <mask name="WRTB" value="0x40" >
+      <value value="0x00" name="All" cname="_WRTB_ON"  />
+      <value value="0x40" name="Off" cname="_WRTB_OFF" />
+    </mask>
+    <mask name="WRTD" value="0x80" >
+      <value value="0x00" name="All" cname="_WRTD_ON"  />
+      <value value="0x80" name="Off" cname="_WRTD_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="CONFIG7L" wmask="0xFF" bvalue="0xFF" >
+    <mask name="EBTR_0" value="0x01" >
+      <value value="0x00" name="0800/1000/2000:3FFF" cname="_EBTR0_ON"  />
+      <value value="0x01" name="Off"                 cname="_EBTR0_OFF" />
+    </mask>
+    <mask name="EBTR_1" value="0x02" >
+      <value value="0x00" name="4000:7FFF" cname="_EBTR1_ON"  />
+      <value value="0x02" name="Off"       cname="_EBTR1_OFF" />
+    </mask>
+    <mask name="EBTR_2" value="0x04" >
+      <value value="0x00" name="8000:BFFF" cname="_EBTR2_ON"  />
+      <value value="0x04" name="Off"       cname="_EBTR2_OFF" />
+    </mask>
+    <mask name="EBTR_3" value="0x08" >
+      <value value="0x00" name="C000:FFFF" cname="_EBTR3_ON" />
+      <value value="0x08" name="Off"       cname="_EBTR3_OFF" />
+    </mask>
+    <mask name="EBTR_4" value="0x10" >
+      <value value="0x00" name="10000:13FFF" cname="_EBTR4_ON" />
+      <value value="0x10" name="Off"         cname="_EBTR4_OFF" />
+    </mask>
+    <mask name="EBTR_5" value="0x20" >
+      <value value="0x00" name="14000:17FFF" cname="_EBTR5_ON" />
+      <value value="0x20" name="Off"         cname="_EBTR5_OFF" />
+    </mask>
+    <mask name="EBTR_6" value="0x40" >
+      <value value="0x00" name="18000:1BFFF" cname="_EBTR6_ON" />
+      <value value="0x40" name="Off"         cname="_EBTR6_OFF" />
+    </mask>
+    <mask name="EBTR_7" value="0x80" >
+      <value value="0x00" name="1C000:1FFFF" cname="_EBTR7_ON" />
+      <value value="0x80" name="Off"         cname="_EBTR7_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xD" name="CONFIG7H" wmask="0xFF" bvalue="0x40" >
+    <mask name="EBTRB" value="0x40" >
+      <value value="0x00" name="All" cname="_EBTRB_ON" />
+      <value value="0x40" name="Off" cname="_EBTRB_OFF" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/18F87J10.xml b/src/devices/pic/xml_data/18F87J10.xml
new file mode 100644
index 0000000..bc21af2
--- /dev/null
+++ b/src/devices/pic/xml_data/18F87J10.xml
@@ -0,0 +1,143 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F87J10" status="IP" memory_technology="FLASH" architecture="18J" id="0x1760" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="020071" datasheet="39663" progsheet="39644" erratas="80315 80246 80341 80340" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="2.65"   max="3.6"   nominal="3.3" />
+  <voltages name="vdd_prog"       min="2.65"   max="3.6"   nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="2.65"   max="3.6"   nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x01FFF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x01FFF8" end="0x01FFFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xC1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+    <mask name="EASHFT"  value="0x08" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x08" name="On"  cname="" />
+    </mask>
+    <mask name="EMB"  value="0x30" >
+      <value value="0x00" name="20BIT"    cname="" />
+      <value value="0x10" name="16BIT"    cname="" />
+      <value value="0x20" name="12BIT"    cname="" />
+      <value value="0x30" name="Disabled" cname="" />
+    </mask>
+    <mask name="BW"  value="0x40" >
+      <value value="0x00" name="8"  cname="" />
+      <value value="0x40" name="16" cname="" />
+    </mask>
+    <mask name="WAIT"  value="0x80" >
+      <value value="0x00" name="On"  cname="" />
+      <value value="0x80" name="Off" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x03" >
+    <mask name="CCP2MX"  value="0x01" >
+      <value value="0x00" name="RE7" cname="" />
+      <value value="0x01" name="RC1" cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"     cname="" />
+      <value value="0x02" name="RE6-RE3"     cname=""  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F87J11.xml b/src/devices/pic/xml_data/18F87J11.xml
new file mode 100644
index 0000000..d3c84fb
--- /dev/null
+++ b/src/devices/pic/xml_data/18F87J11.xml
@@ -0,0 +1,151 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek                                   *-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F87J11" status="IP" memory_technology="FLASH" architecture="18J" id="0x4520" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="027149" datasheet="39778" progsheet="39644" erratas="80305 80344" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x01FFF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x01FFF8" end="0x01FFFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+    <mask name="EASHFT"  value="0x08" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x08" name="On"  cname="" />
+    </mask>
+    <mask name="EMB"  value="0x30" >
+      <value value="0x00" name="20BIT"    cname="" />
+      <value value="0x10" name="16BIT"    cname="" />
+      <value value="0x20" name="12BIT"    cname="" />
+      <value value="0x30" name="Disabled" cname="" />
+    </mask>
+    <mask name="BW"  value="0x40" >
+      <value value="0x00" name="8"  cname="" />
+      <value value="0x40" name="16" cname="" />
+    </mask>
+    <mask name="WAIT"  value="0x80" >
+      <value value="0x00" name="On"  cname="" />
+      <value value="0x80" name="Off" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"  cname=""  />
+      <value value="0x02" name="RE6-RE3"   cname="" />
+    </mask>
+    <mask name="PMPMX" value="0x04" >
+      <value value="0x00" name="NotConnected"  cname="" />
+      <value value="0x04" name="Connected"     cname="" />
+    </mask>
+    <mask name="MSSPSEL" value="0x08" >
+      <value value="0x00" name="5BIT"  cname="" />
+      <value value="0x08" name="7BIT"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F87J50.xml b/src/devices/pic/xml_data/18F87J50.xml
new file mode 100644
index 0000000..1749435
--- /dev/null
+++ b/src/devices/pic/xml_data/18F87J50.xml
@@ -0,0 +1,161 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek                                   *-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F87J50" status="IP" memory_technology="FLASH" architecture="18J" id="0x4220" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="027172" datasheet="39775" progsheet="39644" erratas="80321" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="3.6" />
+    <frequency start="4" end="40" vdd_min="2.0" vdd_min_end="2.35" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6" nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3" max="3.6" nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"         start="0x000000" end="0x01FFF7" word_write_align="32" word_erase_align="0" />
+  <memory name="config"       start="0x01FFF8" end="0x01FFFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xEF" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="PLLDIV"  value="0x0E" >
+      <value value="0x00" name="12" cname="" />
+      <value value="0x02" name="10" cname="" />
+      <value value="0x04" name="6"  cname="" />
+      <value value="0x06" name="5"  cname="" />
+      <value value="0x08" name="4"  cname="" />
+      <value value="0x0A" name="3"  cname="" />
+      <value value="0x0C" name="2"  cname="" />
+      <value value="0x0E" name="1"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+    <mask name="EASHFT"  value="0x08" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x08" name="On"  cname="" />
+    </mask>
+    <mask name="EMB"  value="0x30" >
+      <value value="0x00" name="20BIT"    cname="" />
+      <value value="0x10" name="16BIT"    cname="" />
+      <value value="0x20" name="12BIT"    cname="" />
+      <value value="0x30" name="Disabled" cname="" />
+    </mask>
+    <mask name="BW"  value="0x40" >
+      <value value="0x00" name="8"  cname="" />
+      <value value="0x40" name="16" cname="" />
+    </mask>
+    <mask name="WAIT"  value="0x80" >
+      <value value="0x00" name="On"  cname="" />
+      <value value="0x80" name="Off" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="CCP2MX" value="0x01" >
+      <value value="0x00" name="RB3"  cname=""  />
+      <value value="0x01" name="RC1"   cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"  cname=""  />
+      <value value="0x02" name="RE6-RE3"   cname="" />
+    </mask>
+    <mask name="PMPMX" value="0x04" >
+      <value value="0x00" name="NotConnected"  cname="" />
+      <value value="0x04" name="Connected"     cname="" />
+    </mask>
+    <mask name="MSSPSEL" value="0x08" >
+      <value value="0x00" name="5BIT"  cname="" />
+      <value value="0x08" name="7BIT"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F87J60.xml b/src/devices/pic/xml_data/18F87J60.xml
new file mode 100644
index 0000000..d101ed3
--- /dev/null
+++ b/src/devices/pic/xml_data/18F87J60.xml
@@ -0,0 +1,193 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F87J60" document="026442" status="IP" memory_technology="FLASH" architecture="18J" id="0x1F60" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="41.6667" vdd_min="2.7" vdd_max="3.6" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="2.7" />
+    <frequency start="4" end="41.6667" vdd_min="2.35" vdd_max="2.7" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3"   max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6"   nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3"   max="3.6"   nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x01FFF7" word_write_align="32" word_erase_align="512" />
+  <memory name="config"       start="0x01FFF8" end="0x01FFFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="0000:FFF7" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x07" >
+    <mask name="ETHLED" value="0x01" >
+      <value value="0x00" name="Off"  cname=""  />
+      <value value="0x01" name="On"   cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"     cname="" />
+      <value value="0x02" name="RE6-RE3"     cname=""  />
+    </mask>
+    <mask name="CCP2MX"  value="0x04" >
+      <value value="0x00" name="RE7" cname="" />
+      <value value="0x04" name="RC1" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F96J60.xml b/src/devices/pic/xml_data/18F96J60.xml
new file mode 100644
index 0000000..655b586
--- /dev/null
+++ b/src/devices/pic/xml_data/18F96J60.xml
@@ -0,0 +1,211 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F96J60" document="026441" status="IP" memory_technology="FLASH" architecture="18J" id="0x1840" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="41.6667" vdd_min="2.7" vdd_max="3.6" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="2.7" />
+    <frequency start="4" end="41.6667" vdd_min="2.35" vdd_max="2.7" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3"   max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6"   nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3"   max="3.6"   nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x00FFF7" word_write_align="32" word_erase_align="512" />
+  <memory name="config"       start="0x00FFF8" end="0x00FFFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+    <mask name="WAIT" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off" cname="" />
+    </mask>
+    <mask name="BW" value="0x40" >
+      <value value="0x00" name="8" cname="" />
+      <value value="0x40" name="16" cname="" />
+    </mask>
+    <mask name="EMB" value="0x30" >
+      <value value="0x00" name="Disabled" cname="" />
+      <value value="0x10" name="12BIT" cname="" />
+      <value value="0x20" name="16BIT" cname="" />
+      <value value="0x30" name="20BIT" cname="" />
+    </mask>
+    <mask name="EASHFT" value="0x08" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x08" name="On" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x07" >
+    <mask name="ETHLED" value="0x01" >
+      <value value="0x00" name="Off"  cname=""  />
+      <value value="0x01" name="On"   cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"     cname="" />
+      <value value="0x02" name="RE6-RE3"     cname=""  />
+    </mask>
+    <mask name="CCP2MX"  value="0x04" >
+      <value value="0x00" name="RE7" cname="" />
+      <value value="0x04" name="RC1" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F96J65.xml b/src/devices/pic/xml_data/18F96J65.xml
new file mode 100644
index 0000000..a61bb94
--- /dev/null
+++ b/src/devices/pic/xml_data/18F96J65.xml
@@ -0,0 +1,211 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F96J65" document="026440" status="IP" memory_technology="FLASH" architecture="18J" id="0x1F80" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="41.6667" vdd_min="2.7" vdd_max="3.6" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="2.7" />
+    <frequency start="4" end="41.6667" vdd_min="2.35" vdd_max="2.7" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3"   max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6"   nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3"   max="3.6"   nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x017FF7" word_write_align="32" word_erase_align="512" />
+  <memory name="config"       start="0x017FF8" end="0x017FFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+    <mask name="WAIT" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off" cname="" />
+    </mask>
+    <mask name="BW" value="0x40" >
+      <value value="0x00" name="8" cname="" />
+      <value value="0x40" name="16" cname="" />
+    </mask>
+    <mask name="EMB" value="0x30" >
+      <value value="0x00" name="Disabled" cname="" />
+      <value value="0x10" name="12BIT" cname="" />
+      <value value="0x20" name="16BIT" cname="" />
+      <value value="0x30" name="20BIT" cname="" />
+    </mask>
+    <mask name="EASHFT" value="0x08" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x08" name="On" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x07" >
+    <mask name="ETHLED" value="0x01" >
+      <value value="0x00" name="Off"  cname=""  />
+      <value value="0x01" name="On"   cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"     cname="" />
+      <value value="0x02" name="RE6-RE3"     cname=""  />
+    </mask>
+    <mask name="CCP2MX"  value="0x04" >
+      <value value="0x00" name="RE7" cname="" />
+      <value value="0x04" name="RC1" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/18F97J60.xml b/src/devices/pic/xml_data/18F97J60.xml
new file mode 100644
index 0000000..ce570ba
--- /dev/null
+++ b/src/devices/pic/xml_data/18F97J60.xml
@@ -0,0 +1,211 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Alan Page                                         *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="18F97J60" document="026439" status="IP" memory_technology="FLASH" architecture="18J" id="0x1FA0" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="41.6667" vdd_min="2.7" vdd_max="3.6" />
+  </frequency_range>
+  <frequency_range name="industrial" special="low_power" >
+    <frequency start="0" end="4" vdd_min="2.0" vdd_max="2.7" />
+    <frequency start="4" end="41.6667" vdd_min="2.35" vdd_max="2.7" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3"   max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog"       min="3" max="3.6"   nominal="3.3"  />
+  <voltages name="vdd_prog_write" min="3"   max="3.6"   nominal="3.3"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"      start="0x000000" end="0x01FFF7" word_write_align="32" word_erase_align="512" />
+  <memory name="config"       start="0x01FFF8" end="0x01FFFF" />
+  <memory name="device_id"    start="0x3FFFFE" end="0x3FFFFF" />
+
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1L" wmask="0xFF" bvalue="0xE1" >
+    <mask name="WDT"  value="0x01" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x01" name="On"  cname="" />
+    </mask>
+    <mask name="STVREN" value="0x20" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x20" name="On"  cname="" />
+    </mask>
+    <mask name="XINST" value="0x40" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x40" name="On"  cname="" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x1" name="CONFIG1H" wmask="0xF7" bvalue="0x04" >
+    <mask name="CP" value="0x04" >
+      <value value="0x00" name="All" cname="" />
+      <value value="0x04" name="Off"  cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2L" wmask="0xFF" bvalue="0xC7" >
+    <mask name="FOSC"   value="0x03" >
+      <value value="0x00" name="HS"           cname=""    />
+      <value value="0x01" name="HSPLL"        cname=""    />
+      <value value="0x02" name="EC"           cname=""    />
+      <value value="0x03" name="ECPLL_IO"     cname=""    />
+    </mask>
+    <mask name="FOSC2"  value="0x04" >
+      <value value="0x00" name="FOSC1:FOSC0"  cname=""    />
+      <value value="0x04" name="INTRC"        cname=""    />
+    </mask>
+    <mask name="FCMEN"  value="0x40" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x40" name="Off"  cname=""    />
+    </mask>
+    <mask name="IESO"  value="0x80" >
+      <value value="0x00" name="On"   cname=""    />
+      <value value="0x80" name="Off"  cname=""    />
+     </mask>
+  </config>
+
+  <config offset="0x3" name="CONFIG2H" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WDTPS" value="0x0F" >
+      <value value="0x00" name="1:1"     cname=""   />
+      <value value="0x01" name="1:2"     cname=""   />
+      <value value="0x02" name="1:4"     cname=""   />
+      <value value="0x03" name="1:8"     cname=""   />
+      <value value="0x04" name="1:16"    cname=""  />
+      <value value="0x05" name="1:32"    cname=""  />
+      <value value="0x06" name="1:64"    cname=""  />
+      <value value="0x07" name="1:128"   cname="" />
+      <value value="0x08" name="1:256"   cname="" />
+      <value value="0x09" name="1:512"   cname="" />
+      <value value="0x0A" name="1:1024"  cname=""  />
+      <value value="0x0B" name="1:2048"  cname=""  />
+      <value value="0x0C" name="1:4096"  cname=""  />
+      <value value="0x0D" name="1:8192"  cname=""  />
+      <value value="0x0E" name="1:16384" cname="" />
+      <value value="0x0F" name="1:32768" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="CONFIG3L" wmask="0xFF" bvalue="0xF8" >
+    <mask name="WAIT" value="0x80" >
+      <value value="0x00" name="On" cname="" />
+      <value value="0x80" name="Off" cname="" />
+    </mask>
+    <mask name="BW" value="0x40" >
+      <value value="0x00" name="8" cname="" />
+      <value value="0x40" name="16" cname="" />
+    </mask>
+    <mask name="EMB" value="0x30" >
+      <value value="0x00" name="Disabled" cname="" />
+      <value value="0x10" name="12BIT" cname="" />
+      <value value="0x20" name="16BIT" cname="" />
+      <value value="0x30" name="20BIT" cname="" />
+    </mask>
+    <mask name="EASHFT" value="0x08" >
+      <value value="0x00" name="Off" cname="" />
+      <value value="0x08" name="On" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x5" name="CONFIG3H" wmask="0xFF" bvalue="0x07" >
+    <mask name="ETHLED" value="0x01" >
+      <value value="0x00" name="Off"  cname=""  />
+      <value value="0x01" name="On"   cname="" />
+    </mask>
+    <mask name="ECCPMX" value="0x02" >
+      <value value="0x00" name="RH7-RH4"     cname="" />
+      <value value="0x02" name="RE6-RE3"     cname=""  />
+    </mask>
+    <mask name="CCP2MX"  value="0x04" >
+      <value value="0x00" name="RE7" cname="" />
+      <value value="0x04" name="RC1" cname="" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="CONFIG4L" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x7" name="CONFIG4H" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
+
diff --git a/src/devices/pic/xml_data/24FJ128GA006.xml b/src/devices/pic/xml_data/24FJ128GA006.xml
new file mode 100644
index 0000000..7f264b9
--- /dev/null
+++ b/src/devices/pic/xml_data/24FJ128GA006.xml
@@ -0,0 +1,122 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24FJ128GA006" status="IP" memory_technology="FLASH" architecture="24F" id="0x0407" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="024807" datasheet="39747" progsheet="39768" erratas="80295 80330" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="32" vdd_min="2.0" vdd_max="2.75" />
+  </frequency_range>
+
+  <voltages name="vpp" min="2.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="2.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"              start="0x000200" end="0x0157FB" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0x0157FC" end="0x0157FF" />
+<!--   <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFFFF" /> -->
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x8007EF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1" wmask="0xFFFFFF" bvalue="0x007DDF" >
+    <mask name="WDTPOST" value="0x00000F" >
+      <value value="0x000000" name="1:1" />
+      <value value="0x000001" name="1:2" />
+      <value value="0x000002" name="1:4" />
+      <value value="0x000003" name="1:8" />
+      <value value="0x000004" name="1:16" />
+      <value value="0x000005" name="1:32" />
+      <value value="0x000006" name="1:64" />
+      <value value="0x000007" name="1:128" />
+      <value value="0x000008" name="1:256" />
+      <value value="0x000009" name="1:512" />
+      <value value="0x00000A" name="1:1024" />
+      <value value="0x00000B" name="1:2048" />
+      <value value="0x00000C" name="1:4096" />
+      <value value="0x00000D" name="1:8192" />
+      <value value="0x00000E" name="1:16384" />
+      <value value="0x00000F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x000010" >
+      <value value="0x000000" name="1:32" />
+      <value value="0x000010" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x000040" >
+      <value value="0x000000" name="On" />
+      <value value="0x000040" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x000080" >
+      <value value="0x000000" name="Software" />
+      <value value="0x000080" name="On" />
+    </mask>
+    <mask name="ICS" value="0x000100" >
+      <value value="0x000000" name="EMUC1, EMUD1" />
+      <value value="0x000100" name="EMUC2, EMUD2" />
+    </mask>
+    <mask name="DEBUG" value="0x000800" >
+      <value value="0x000000" name="On" />
+      <value value="0x000800" name="Off" />
+    </mask>
+    <mask name="GWRP" value="0x001000" >
+      <value value="0x000000" name="All" />
+      <value value="0x001000" name="Off" />
+    </mask>
+    <mask name="GCP" value="0x002000" >
+      <value value="0x000000" name="All" />
+      <value value="0x002000" name="Off" />
+    </mask>
+    <mask name="JTAGEN" value="0x004000" >
+      <value value="0x000000" name="Off" />
+      <value value="0x004000" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2" wmask="0xFFFFFF" bvalue="0x0087E3" >
+    <mask name="POSCMD" value="0x000003" >
+      <value value="0x000000" name="EC" />
+      <value value="0x000001" name="XT" />
+      <value value="0x000002" name="HS" />
+      <value value="0x000003" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x000020" >
+      <value value="0x000000" name="IO" />
+      <value value="0x000020" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0x0000C0" >
+      <value value="0x000000" name="Switching on, monitor on" />
+      <value value="0x000040" name="Switching on, monitor off" />
+      <value value="0x000080" name="Switching off, monitor off" />
+      <value value="0x0000C0" name="Switching off, monitor off" />
+    </mask>
+    <mask name="FNOSC" value="0x000700" >
+      <value value="0x000000" name="EXTRC_F" />
+      <value value="0x000100" name="INTRC_F_PLL" />
+      <value value="0x000200" name="PRIM" />
+      <value value="0x000300" name="PRIM_PLL" />
+      <value value="0x000400" name="SECOND" />
+      <value value="0x000500" name="EXTRC_LP" />
+      <value value="0x000600" name="invalid" />
+      <value value="0x000700" name="INTRC_F_POST" />
+    </mask>
+    <mask name="IESO" value="0x008000" >
+      <value value="0x000000" name="Off" />
+      <value value="0x008000" name="On" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24FJ128GA008.xml b/src/devices/pic/xml_data/24FJ128GA008.xml
new file mode 100644
index 0000000..b8d43d8
--- /dev/null
+++ b/src/devices/pic/xml_data/24FJ128GA008.xml
@@ -0,0 +1,122 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24FJ128GA008" status="IP" memory_technology="FLASH" architecture="24F" id="0x040A" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="024806" datasheet="39747" progsheet="39768" erratas="80295 80330" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="32" vdd_min="2.0" vdd_max="2.75" />
+  </frequency_range>
+
+  <voltages name="vpp" min="2.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="2.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"              start="0x000200" end="0x0157FB" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0x0157FC" end="0x0157FF" />
+<!--   <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFFFF" /> -->
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x8007EF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1" wmask="0xFFFFFF" bvalue="0x007DDF" >
+    <mask name="WDTPOST" value="0x00000F" >
+      <value value="0x000000" name="1:1" />
+      <value value="0x000001" name="1:2" />
+      <value value="0x000002" name="1:4" />
+      <value value="0x000003" name="1:8" />
+      <value value="0x000004" name="1:16" />
+      <value value="0x000005" name="1:32" />
+      <value value="0x000006" name="1:64" />
+      <value value="0x000007" name="1:128" />
+      <value value="0x000008" name="1:256" />
+      <value value="0x000009" name="1:512" />
+      <value value="0x00000A" name="1:1024" />
+      <value value="0x00000B" name="1:2048" />
+      <value value="0x00000C" name="1:4096" />
+      <value value="0x00000D" name="1:8192" />
+      <value value="0x00000E" name="1:16384" />
+      <value value="0x00000F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x000010" >
+      <value value="0x000000" name="1:32" />
+      <value value="0x000010" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x000040" >
+      <value value="0x000000" name="On" />
+      <value value="0x000040" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x000080" >
+      <value value="0x000000" name="Software" />
+      <value value="0x000080" name="On" />
+    </mask>
+    <mask name="ICS" value="0x000100" >
+      <value value="0x000000" name="EMUC1, EMUD1" />
+      <value value="0x000100" name="EMUC2, EMUD2" />
+    </mask>
+    <mask name="DEBUG" value="0x000800" >
+      <value value="0x000000" name="On" />
+      <value value="0x000800" name="Off" />
+    </mask>
+    <mask name="GWRP" value="0x001000" >
+      <value value="0x000000" name="All" />
+      <value value="0x001000" name="Off" />
+    </mask>
+    <mask name="GCP" value="0x002000" >
+      <value value="0x000000" name="All" />
+      <value value="0x002000" name="Off" />
+    </mask>
+    <mask name="JTAGEN" value="0x004000" >
+      <value value="0x000000" name="Off" />
+      <value value="0x004000" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2" wmask="0xFFFFFF" bvalue="0x0087E3" >
+    <mask name="POSCMD" value="0x000003" >
+      <value value="0x000000" name="EC" />
+      <value value="0x000001" name="XT" />
+      <value value="0x000002" name="HS" />
+      <value value="0x000003" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x000020" >
+      <value value="0x000000" name="IO" />
+      <value value="0x000020" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0x0000C0" >
+      <value value="0x000000" name="Switching on, monitor on" />
+      <value value="0x000040" name="Switching on, monitor off" />
+      <value value="0x000080" name="Switching off, monitor off" />
+      <value value="0x0000C0" name="Switching off, monitor off" />
+    </mask>
+    <mask name="FNOSC" value="0x000700" >
+      <value value="0x000000" name="EXTRC_F" />
+      <value value="0x000100" name="INTRC_F_PLL" />
+      <value value="0x000200" name="PRIM" />
+      <value value="0x000300" name="PRIM_PLL" />
+      <value value="0x000400" name="SECOND" />
+      <value value="0x000500" name="EXTRC_LP" />
+      <value value="0x000600" name="invalid" />
+      <value value="0x000700" name="INTRC_F_POST" />
+    </mask>
+    <mask name="IESO" value="0x008000" >
+      <value value="0x000000" name="Off" />
+      <value value="0x008000" name="On" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24FJ128GA010.xml b/src/devices/pic/xml_data/24FJ128GA010.xml
new file mode 100644
index 0000000..d57c7ff
--- /dev/null
+++ b/src/devices/pic/xml_data/24FJ128GA010.xml
@@ -0,0 +1,122 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24FJ128GA010" status="IP" memory_technology="FLASH" architecture="24F" id="0x040D" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="024805" datasheet="39747" progsheet="39768" erratas="80295 80330" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="32" vdd_min="2.0" vdd_max="2.75" />
+  </frequency_range>
+
+  <voltages name="vpp" min="2.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="2.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"              start="0x000200" end="0x0157FB" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0x0157FC" end="0x0157FF" />
+<!--   <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFFFF" /> -->
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x8007EF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1" wmask="0xFFFFFF" bvalue="0x007DDF" >
+    <mask name="WDTPOST" value="0x00000F" >
+      <value value="0x000000" name="1:1" />
+      <value value="0x000001" name="1:2" />
+      <value value="0x000002" name="1:4" />
+      <value value="0x000003" name="1:8" />
+      <value value="0x000004" name="1:16" />
+      <value value="0x000005" name="1:32" />
+      <value value="0x000006" name="1:64" />
+      <value value="0x000007" name="1:128" />
+      <value value="0x000008" name="1:256" />
+      <value value="0x000009" name="1:512" />
+      <value value="0x00000A" name="1:1024" />
+      <value value="0x00000B" name="1:2048" />
+      <value value="0x00000C" name="1:4096" />
+      <value value="0x00000D" name="1:8192" />
+      <value value="0x00000E" name="1:16384" />
+      <value value="0x00000F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x000010" >
+      <value value="0x000000" name="1:32" />
+      <value value="0x000010" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x000040" >
+      <value value="0x000000" name="On" />
+      <value value="0x000040" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x000080" >
+      <value value="0x000000" name="Software" />
+      <value value="0x000080" name="On" />
+    </mask>
+    <mask name="ICS" value="0x000100" >
+      <value value="0x000000" name="EMUC1, EMUD1" />
+      <value value="0x000100" name="EMUC2, EMUD2" />
+    </mask>
+    <mask name="DEBUG" value="0x000800" >
+      <value value="0x000000" name="On" />
+      <value value="0x000800" name="Off" />
+    </mask>
+    <mask name="GWRP" value="0x001000" >
+      <value value="0x000000" name="All" />
+      <value value="0x001000" name="Off" />
+    </mask>
+    <mask name="GCP" value="0x002000" >
+      <value value="0x000000" name="All" />
+      <value value="0x002000" name="Off" />
+    </mask>
+    <mask name="JTAGEN" value="0x004000" >
+      <value value="0x000000" name="Off" />
+      <value value="0x004000" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2" wmask="0xFFFFFF" bvalue="0x0087E3" >
+    <mask name="POSCMD" value="0x000003" >
+      <value value="0x000000" name="EC" />
+      <value value="0x000001" name="XT" />
+      <value value="0x000002" name="HS" />
+      <value value="0x000003" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x000020" >
+      <value value="0x000000" name="IO" />
+      <value value="0x000020" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0x0000C0" >
+      <value value="0x000000" name="Switching on, monitor on" />
+      <value value="0x000040" name="Switching on, monitor off" />
+      <value value="0x000080" name="Switching off, monitor off" />
+      <value value="0x0000C0" name="Switching off, monitor off" />
+    </mask>
+    <mask name="FNOSC" value="0x000700" >
+      <value value="0x000000" name="EXTRC_F" />
+      <value value="0x000100" name="INTRC_F_PLL" />
+      <value value="0x000200" name="PRIM" />
+      <value value="0x000300" name="PRIM_PLL" />
+      <value value="0x000400" name="SECOND" />
+      <value value="0x000500" name="EXTRC_LP" />
+      <value value="0x000600" name="invalid" />
+      <value value="0x000700" name="INTRC_F_POST" />
+    </mask>
+    <mask name="IESO" value="0x008000" >
+      <value value="0x000000" name="Off" />
+      <value value="0x008000" name="On" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="100" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24FJ64GA002.xml b/src/devices/pic/xml_data/24FJ64GA002.xml
new file mode 100644
index 0000000..e051b07
--- /dev/null
+++ b/src/devices/pic/xml_data/24FJ64GA002.xml
@@ -0,0 +1,132 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24FJ64GA002" status="IP" memory_technology="FLASH" architecture="24F" id="0x0447" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="026374" datasheet="39881" progsheet="39768" erratas="80333 80316" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="32" vdd_min="2.0" vdd_max="2.75" />
+  </frequency_range>
+
+  <voltages name="vpp" min="2.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="2.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"              start="0x000200" end="0x00ABFB" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0x00ABFC" end="0x00ABFF" />
+<!--   <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFFFF" /> -->
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x8007EF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1" wmask="0xFFFFFF" bvalue="0x007FDF" >
+    <mask name="WDTPOST" value="0x00000F" >
+      <value value="0x000000" name="1:1" />
+      <value value="0x000001" name="1:2" />
+      <value value="0x000002" name="1:4" />
+      <value value="0x000003" name="1:8" />
+      <value value="0x000004" name="1:16" />
+      <value value="0x000005" name="1:32" />
+      <value value="0x000006" name="1:64" />
+      <value value="0x000007" name="1:128" />
+      <value value="0x000008" name="1:256" />
+      <value value="0x000009" name="1:512" />
+      <value value="0x00000A" name="1:1024" />
+      <value value="0x00000B" name="1:2048" />
+      <value value="0x00000C" name="1:4096" />
+      <value value="0x00000D" name="1:8192" />
+      <value value="0x00000E" name="1:16384" />
+      <value value="0x00000F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x000010" >
+      <value value="0x000000" name="1:32" />
+      <value value="0x000010" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x000040" >
+      <value value="0x000000" name="On" />
+      <value value="0x000040" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x000080" >
+      <value value="0x000000" name="Software" />
+      <value value="0x000080" name="On" />
+    </mask>
+    <mask name="ICS" value="0x000300" >
+      <value value="0x000000" name="invalid" />
+      <value value="0x000100" name="EMUC3, EMUD3" />
+      <value value="0x000200" name="EMUC2, EMUD2" />
+      <value value="0x000300" name="EMUC1, EMUD1" />
+    </mask>
+    <mask name="DEBUG" value="0x000800" >
+      <value value="0x000000" name="On" />
+      <value value="0x000800" name="Off" />
+    </mask>
+    <mask name="GWRP" value="0x001000" >
+      <value value="0x000000" name="All" />
+      <value value="0x001000" name="Off" />
+    </mask>
+    <mask name="GCP" value="0x002000" >
+      <value value="0x000000" name="All" />
+      <value value="0x002000" name="Off" />
+    </mask>
+    <mask name="JTAGEN" value="0x004000" >
+      <value value="0x000000" name="Off" />
+      <value value="0x004000" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2" wmask="0xFFFFFF" bvalue="0x0087F7" >
+    <mask name="POSCMD" value="0x000003" >
+      <value value="0x000000" name="EC" />
+      <value value="0x000001" name="XT" />
+      <value value="0x000002" name="HS" />
+      <value value="0x000003" name="Off" />
+    </mask>
+    <mask name="I2C1SEL" value="0x000004" >
+      <value value="0x000000" name="Alternate" />
+      <value value="0x000004" name="Default" />
+    </mask>
+    <mask name="IOL1WAY" value="0x000010" >
+      <value value="0x000000" name="Multiple reconfigurations" />
+      <value value="0x000010" name="One reconfiguration" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x000020" >
+      <value value="0x000000" name="IO" />
+      <value value="0x000020" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0x0000C0" >
+      <value value="0x000000" name="Switching on, monitor on" />
+      <value value="0x000040" name="Switching on, monitor off" />
+      <value value="0x000080" name="Switching off, monitor off" />
+      <value value="0x0000C0" name="Switching off, monitor off" />
+    </mask>
+    <mask name="FNOSC" value="0x000700" >
+      <value value="0x000000" name="EXTRC_F" />
+      <value value="0x000100" name="INTRC_F_PLL" />
+      <value value="0x000200" name="PRIM" />
+      <value value="0x000300" name="PRIM_PLL" />
+      <value value="0x000400" name="SECOND" />
+      <value value="0x000500" name="EXTRC_LP" />
+      <value value="0x000600" name="invalid" />
+      <value value="0x000700" name="INTRC_F_POST" />
+    </mask>
+    <mask name="IESO" value="0x008000" >
+      <value value="0x000000" name="Off" />
+      <value value="0x008000" name="On" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="spdip ssop soic qfn" nb_pins="28" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24FJ64GA004.xml b/src/devices/pic/xml_data/24FJ64GA004.xml
new file mode 100644
index 0000000..c87748e
--- /dev/null
+++ b/src/devices/pic/xml_data/24FJ64GA004.xml
@@ -0,0 +1,132 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24FJ64GA004" status="IP" memory_technology="FLASH" architecture="24F" id="0x044F" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="026375" datasheet="39881" progsheet="39768" erratas="80333 80316" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="32" vdd_min="2.0" vdd_max="2.75" />
+  </frequency_range>
+
+  <voltages name="vpp" min="2.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="2.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"              start="0x000200" end="0x00ABFB" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0x00ABFC" end="0x00ABFF" />
+<!--   <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFFFF" /> -->
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x8007EF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1" wmask="0xFFFFFF" bvalue="0x007FDF" >
+    <mask name="WDTPOST" value="0x00000F" >
+      <value value="0x000000" name="1:1" />
+      <value value="0x000001" name="1:2" />
+      <value value="0x000002" name="1:4" />
+      <value value="0x000003" name="1:8" />
+      <value value="0x000004" name="1:16" />
+      <value value="0x000005" name="1:32" />
+      <value value="0x000006" name="1:64" />
+      <value value="0x000007" name="1:128" />
+      <value value="0x000008" name="1:256" />
+      <value value="0x000009" name="1:512" />
+      <value value="0x00000A" name="1:1024" />
+      <value value="0x00000B" name="1:2048" />
+      <value value="0x00000C" name="1:4096" />
+      <value value="0x00000D" name="1:8192" />
+      <value value="0x00000E" name="1:16384" />
+      <value value="0x00000F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x000010" >
+      <value value="0x000000" name="1:32" />
+      <value value="0x000010" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x000040" >
+      <value value="0x000000" name="On" />
+      <value value="0x000040" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x000080" >
+      <value value="0x000000" name="Software" />
+      <value value="0x000080" name="On" />
+    </mask>
+    <mask name="ICS" value="0x000300" >
+      <value value="0x000000" name="invalid" />
+      <value value="0x000100" name="EMUC3, EMUD3" />
+      <value value="0x000200" name="EMUC2, EMUD2" />
+      <value value="0x000300" name="EMUC1, EMUD1" />
+    </mask>
+    <mask name="DEBUG" value="0x000800" >
+      <value value="0x000000" name="On" />
+      <value value="0x000800" name="Off" />
+    </mask>
+    <mask name="GWRP" value="0x001000" >
+      <value value="0x000000" name="All" />
+      <value value="0x001000" name="Off" />
+    </mask>
+    <mask name="GCP" value="0x002000" >
+      <value value="0x000000" name="All" />
+      <value value="0x002000" name="Off" />
+    </mask>
+    <mask name="JTAGEN" value="0x004000" >
+      <value value="0x000000" name="Off" />
+      <value value="0x004000" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2" wmask="0xFFFFFF" bvalue="0x0087F7" >
+    <mask name="POSCMD" value="0x000003" >
+      <value value="0x000000" name="EC" />
+      <value value="0x000001" name="XT" />
+      <value value="0x000002" name="HS" />
+      <value value="0x000003" name="Off" />
+    </mask>
+    <mask name="I2C1SEL" value="0x000004" >
+      <value value="0x000000" name="Alternate" />
+      <value value="0x000004" name="Default" />
+    </mask>
+    <mask name="IOL1WAY" value="0x000010" >
+      <value value="0x000000" name="Multiple reconfigurations" />
+      <value value="0x000010" name="One reconfiguration" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x000020" >
+      <value value="0x000000" name="IO" />
+      <value value="0x000020" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0x0000C0" >
+      <value value="0x000000" name="Switching on, monitor on" />
+      <value value="0x000040" name="Switching on, monitor off" />
+      <value value="0x000080" name="Switching off, monitor off" />
+      <value value="0x0000C0" name="Switching off, monitor off" />
+    </mask>
+    <mask name="FNOSC" value="0x000700" >
+      <value value="0x000000" name="EXTRC_F" />
+      <value value="0x000100" name="INTRC_F_PLL" />
+      <value value="0x000200" name="PRIM" />
+      <value value="0x000300" name="PRIM_PLL" />
+      <value value="0x000400" name="SECOND" />
+      <value value="0x000500" name="EXTRC_LP" />
+      <value value="0x000600" name="invalid" />
+      <value value="0x000700" name="INTRC_F_POST" />
+    </mask>
+    <mask name="IESO" value="0x008000" >
+      <value value="0x000000" name="Off" />
+      <value value="0x008000" name="On" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="qfn tqfp" nb_pins="44" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24FJ64GA006.xml b/src/devices/pic/xml_data/24FJ64GA006.xml
new file mode 100644
index 0000000..6492f51
--- /dev/null
+++ b/src/devices/pic/xml_data/24FJ64GA006.xml
@@ -0,0 +1,122 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24FJ64GA006" status="IP" memory_technology="FLASH" architecture="24F" id="0x0405" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="024813" datasheet="39747" progsheet="39768" erratas="80295 80330" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="32" vdd_min="2.0" vdd_max="2.75" />
+  </frequency_range>
+
+  <voltages name="vpp" min="2.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="2.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"              start="0x000200" end="0x00ABFB" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0x00ABFC" end="0x00ABFF" />
+<!--   <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFFFF" /> -->
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x8007EF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1" wmask="0xFFFFFF" bvalue="0x007DDF" >
+    <mask name="WDTPOST" value="0x00000F" >
+      <value value="0x000000" name="1:1" />
+      <value value="0x000001" name="1:2" />
+      <value value="0x000002" name="1:4" />
+      <value value="0x000003" name="1:8" />
+      <value value="0x000004" name="1:16" />
+      <value value="0x000005" name="1:32" />
+      <value value="0x000006" name="1:64" />
+      <value value="0x000007" name="1:128" />
+      <value value="0x000008" name="1:256" />
+      <value value="0x000009" name="1:512" />
+      <value value="0x00000A" name="1:1024" />
+      <value value="0x00000B" name="1:2048" />
+      <value value="0x00000C" name="1:4096" />
+      <value value="0x00000D" name="1:8192" />
+      <value value="0x00000E" name="1:16384" />
+      <value value="0x00000F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x000010" >
+      <value value="0x000000" name="1:32" />
+      <value value="0x000010" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x000040" >
+      <value value="0x000000" name="On" />
+      <value value="0x000040" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x000080" >
+      <value value="0x000000" name="Software" />
+      <value value="0x000080" name="On" />
+    </mask>
+    <mask name="ICS" value="0x000100" >
+      <value value="0x000000" name="EMUC1, EMUD1" />
+      <value value="0x000100" name="EMUC2, EMUD2" />
+    </mask>
+    <mask name="DEBUG" value="0x000800" >
+      <value value="0x000000" name="On" />
+      <value value="0x000800" name="Off" />
+    </mask>
+    <mask name="GWRP" value="0x001000" >
+      <value value="0x000000" name="All" />
+      <value value="0x001000" name="Off" />
+    </mask>
+    <mask name="GCP" value="0x002000" >
+      <value value="0x000000" name="All" />
+      <value value="0x002000" name="Off" />
+    </mask>
+    <mask name="JTAGEN" value="0x004000" >
+      <value value="0x000000" name="Off" />
+      <value value="0x004000" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2" wmask="0xFFFFFF" bvalue="0x0087E3" >
+    <mask name="POSCMD" value="0x000003" >
+      <value value="0x000000" name="EC" />
+      <value value="0x000001" name="XT" />
+      <value value="0x000002" name="HS" />
+      <value value="0x000003" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x000020" >
+      <value value="0x000000" name="IO" />
+      <value value="0x000020" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0x0000C0" >
+      <value value="0x000000" name="Switching on, monitor on" />
+      <value value="0x000040" name="Switching on, monitor off" />
+      <value value="0x000080" name="Switching off, monitor off" />
+      <value value="0x0000C0" name="Switching off, monitor off" />
+    </mask>
+    <mask name="FNOSC" value="0x000700" >
+      <value value="0x000000" name="EXTRC_F" />
+      <value value="0x000100" name="INTRC_F_PLL" />
+      <value value="0x000200" name="PRIM" />
+      <value value="0x000300" name="PRIM_PLL" />
+      <value value="0x000400" name="SECOND" />
+      <value value="0x000500" name="EXTRC_LP" />
+      <value value="0x000600" name="invalid" />
+      <value value="0x000700" name="INTRC_F_POST" />
+    </mask>
+    <mask name="IESO" value="0x008000" >
+      <value value="0x000000" name="Off" />
+      <value value="0x008000" name="On" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24FJ64GA008.xml b/src/devices/pic/xml_data/24FJ64GA008.xml
new file mode 100644
index 0000000..2ead302
--- /dev/null
+++ b/src/devices/pic/xml_data/24FJ64GA008.xml
@@ -0,0 +1,122 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24FJ64GA008" status="IP" memory_technology="FLASH" architecture="24F" id="0x0408" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="024812" datasheet="39747" progsheet="39768" erratas="80295 80330" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="32" vdd_min="2.0" vdd_max="2.75" />
+  </frequency_range>
+
+  <voltages name="vpp" min="2.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="2.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"              start="0x000200" end="0x00ABFB" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0x00ABFC" end="0x00ABFF" />
+<!--   <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFFFF" /> -->
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x8007EF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1" wmask="0xFFFFFF" bvalue="0x007DDF" >
+    <mask name="WDTPOST" value="0x00000F" >
+      <value value="0x000000" name="1:1" />
+      <value value="0x000001" name="1:2" />
+      <value value="0x000002" name="1:4" />
+      <value value="0x000003" name="1:8" />
+      <value value="0x000004" name="1:16" />
+      <value value="0x000005" name="1:32" />
+      <value value="0x000006" name="1:64" />
+      <value value="0x000007" name="1:128" />
+      <value value="0x000008" name="1:256" />
+      <value value="0x000009" name="1:512" />
+      <value value="0x00000A" name="1:1024" />
+      <value value="0x00000B" name="1:2048" />
+      <value value="0x00000C" name="1:4096" />
+      <value value="0x00000D" name="1:8192" />
+      <value value="0x00000E" name="1:16384" />
+      <value value="0x00000F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x000010" >
+      <value value="0x000000" name="1:32" />
+      <value value="0x000010" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x000040" >
+      <value value="0x000000" name="On" />
+      <value value="0x000040" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x000080" >
+      <value value="0x000000" name="Software" />
+      <value value="0x000080" name="On" />
+    </mask>
+    <mask name="ICS" value="0x000100" >
+      <value value="0x000000" name="EMUC1, EMUD1" />
+      <value value="0x000100" name="EMUC2, EMUD2" />
+    </mask>
+    <mask name="DEBUG" value="0x000800" >
+      <value value="0x000000" name="On" />
+      <value value="0x000800" name="Off" />
+    </mask>
+    <mask name="GWRP" value="0x001000" >
+      <value value="0x000000" name="All" />
+      <value value="0x001000" name="Off" />
+    </mask>
+    <mask name="GCP" value="0x002000" >
+      <value value="0x000000" name="All" />
+      <value value="0x002000" name="Off" />
+    </mask>
+    <mask name="JTAGEN" value="0x004000" >
+      <value value="0x000000" name="Off" />
+      <value value="0x004000" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2" wmask="0xFFFFFF" bvalue="0x0087E3" >
+    <mask name="POSCMD" value="0x000003" >
+      <value value="0x000000" name="EC" />
+      <value value="0x000001" name="XT" />
+      <value value="0x000002" name="HS" />
+      <value value="0x000003" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x000020" >
+      <value value="0x000000" name="IO" />
+      <value value="0x000020" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0x0000C0" >
+      <value value="0x000000" name="Switching on, monitor on" />
+      <value value="0x000040" name="Switching on, monitor off" />
+      <value value="0x000080" name="Switching off, monitor off" />
+      <value value="0x0000C0" name="Switching off, monitor off" />
+    </mask>
+    <mask name="FNOSC" value="0x000700" >
+      <value value="0x000000" name="EXTRC_F" />
+      <value value="0x000100" name="INTRC_F_PLL" />
+      <value value="0x000200" name="PRIM" />
+      <value value="0x000300" name="PRIM_PLL" />
+      <value value="0x000400" name="SECOND" />
+      <value value="0x000500" name="EXTRC_LP" />
+      <value value="0x000600" name="invalid" />
+      <value value="0x000700" name="INTRC_F_POST" />
+    </mask>
+    <mask name="IESO" value="0x008000" >
+      <value value="0x000000" name="Off" />
+      <value value="0x008000" name="On" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24FJ64GA010.xml b/src/devices/pic/xml_data/24FJ64GA010.xml
new file mode 100644
index 0000000..627da04
--- /dev/null
+++ b/src/devices/pic/xml_data/24FJ64GA010.xml
@@ -0,0 +1,122 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24FJ64GA010" status="IP" memory_technology="FLASH" architecture="24F" id="0x040B" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="024811" datasheet="39747" progsheet="39768" erratas="80295 80330" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="32" vdd_min="2.0" vdd_max="2.75" />
+  </frequency_range>
+
+  <voltages name="vpp" min="2.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="2.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"              start="0x000200" end="0x00ABFB" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0x00ABFC" end="0x00ABFF" />
+<!--   <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFFFF" /> -->
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x8007EF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1" wmask="0xFFFFFF" bvalue="0x007DDF" >
+    <mask name="WDTPOST" value="0x00000F" >
+      <value value="0x000000" name="1:1" />
+      <value value="0x000001" name="1:2" />
+      <value value="0x000002" name="1:4" />
+      <value value="0x000003" name="1:8" />
+      <value value="0x000004" name="1:16" />
+      <value value="0x000005" name="1:32" />
+      <value value="0x000006" name="1:64" />
+      <value value="0x000007" name="1:128" />
+      <value value="0x000008" name="1:256" />
+      <value value="0x000009" name="1:512" />
+      <value value="0x00000A" name="1:1024" />
+      <value value="0x00000B" name="1:2048" />
+      <value value="0x00000C" name="1:4096" />
+      <value value="0x00000D" name="1:8192" />
+      <value value="0x00000E" name="1:16384" />
+      <value value="0x00000F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x000010" >
+      <value value="0x000000" name="1:32" />
+      <value value="0x000010" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x000040" >
+      <value value="0x000000" name="On" />
+      <value value="0x000040" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x000080" >
+      <value value="0x000000" name="Software" />
+      <value value="0x000080" name="On" />
+    </mask>
+    <mask name="ICS" value="0x000100" >
+      <value value="0x000000" name="EMUC1, EMUD1" />
+      <value value="0x000100" name="EMUC2, EMUD2" />
+    </mask>
+    <mask name="DEBUG" value="0x000800" >
+      <value value="0x000000" name="On" />
+      <value value="0x000800" name="Off" />
+    </mask>
+    <mask name="GWRP" value="0x001000" >
+      <value value="0x000000" name="All" />
+      <value value="0x001000" name="Off" />
+    </mask>
+    <mask name="GCP" value="0x002000" >
+      <value value="0x000000" name="All" />
+      <value value="0x002000" name="Off" />
+    </mask>
+    <mask name="JTAGEN" value="0x004000" >
+      <value value="0x000000" name="Off" />
+      <value value="0x004000" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2" wmask="0xFFFFFF" bvalue="0x0087E3" >
+    <mask name="POSCMD" value="0x000003" >
+      <value value="0x000000" name="EC" />
+      <value value="0x000001" name="XT" />
+      <value value="0x000002" name="HS" />
+      <value value="0x000003" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x000020" >
+      <value value="0x000000" name="IO" />
+      <value value="0x000020" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0x0000C0" >
+      <value value="0x000000" name="Switching on, monitor on" />
+      <value value="0x000040" name="Switching on, monitor off" />
+      <value value="0x000080" name="Switching off, monitor off" />
+      <value value="0x0000C0" name="Switching off, monitor off" />
+    </mask>
+    <mask name="FNOSC" value="0x000700" >
+      <value value="0x000000" name="EXTRC_F" />
+      <value value="0x000100" name="INTRC_F_PLL" />
+      <value value="0x000200" name="PRIM" />
+      <value value="0x000300" name="PRIM_PLL" />
+      <value value="0x000400" name="SECOND" />
+      <value value="0x000500" name="EXTRC_LP" />
+      <value value="0x000600" name="invalid" />
+      <value value="0x000700" name="INTRC_F_POST" />
+    </mask>
+    <mask name="IESO" value="0x008000" >
+      <value value="0x000000" name="Off" />
+      <value value="0x008000" name="On" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="100" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24FJ96GA006.xml b/src/devices/pic/xml_data/24FJ96GA006.xml
new file mode 100644
index 0000000..9f02be4
--- /dev/null
+++ b/src/devices/pic/xml_data/24FJ96GA006.xml
@@ -0,0 +1,122 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24FJ96GA006" status="IP" memory_technology="FLASH" architecture="24F" id="0x0406" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="024808" datasheet="39747" progsheet="39768" erratas="80295 80330" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="32" vdd_min="2.0" vdd_max="2.75" />
+  </frequency_range>
+
+  <voltages name="vpp" min="2.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="2.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"              start="0x000200" end="0x00FFFB" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0x00FFFC" end="0x00FFFF" />
+<!--   <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFFFF" /> -->
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x8007EF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1" wmask="0xFFFFFF" bvalue="0x007DDF" >
+    <mask name="WDTPOST" value="0x00000F" >
+      <value value="0x000000" name="1:1" />
+      <value value="0x000001" name="1:2" />
+      <value value="0x000002" name="1:4" />
+      <value value="0x000003" name="1:8" />
+      <value value="0x000004" name="1:16" />
+      <value value="0x000005" name="1:32" />
+      <value value="0x000006" name="1:64" />
+      <value value="0x000007" name="1:128" />
+      <value value="0x000008" name="1:256" />
+      <value value="0x000009" name="1:512" />
+      <value value="0x00000A" name="1:1024" />
+      <value value="0x00000B" name="1:2048" />
+      <value value="0x00000C" name="1:4096" />
+      <value value="0x00000D" name="1:8192" />
+      <value value="0x00000E" name="1:16384" />
+      <value value="0x00000F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x000010" >
+      <value value="0x000000" name="1:32" />
+      <value value="0x000010" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x000040" >
+      <value value="0x000000" name="On" />
+      <value value="0x000040" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x000080" >
+      <value value="0x000000" name="Software" />
+      <value value="0x000080" name="On" />
+    </mask>
+    <mask name="ICS" value="0x000100" >
+      <value value="0x000000" name="EMUC1, EMUD1" />
+      <value value="0x000100" name="EMUC2, EMUD2" />
+    </mask>
+    <mask name="DEBUG" value="0x000800" >
+      <value value="0x000000" name="On" />
+      <value value="0x000800" name="Off" />
+    </mask>
+    <mask name="GWRP" value="0x001000" >
+      <value value="0x000000" name="All" />
+      <value value="0x001000" name="Off" />
+    </mask>
+    <mask name="GCP" value="0x002000" >
+      <value value="0x000000" name="All" />
+      <value value="0x002000" name="Off" />
+    </mask>
+    <mask name="JTAGEN" value="0x004000" >
+      <value value="0x000000" name="Off" />
+      <value value="0x004000" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2" wmask="0xFFFFFF" bvalue="0x0087E3" >
+    <mask name="POSCMD" value="0x000003" >
+      <value value="0x000000" name="EC" />
+      <value value="0x000001" name="XT" />
+      <value value="0x000002" name="HS" />
+      <value value="0x000003" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x000020" >
+      <value value="0x000000" name="IO" />
+      <value value="0x000020" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0x0000C0" >
+      <value value="0x000000" name="Switching on, monitor on" />
+      <value value="0x000040" name="Switching on, monitor off" />
+      <value value="0x000080" name="Switching off, monitor off" />
+      <value value="0x0000C0" name="Switching off, monitor off" />
+    </mask>
+    <mask name="FNOSC" value="0x000700" >
+      <value value="0x000000" name="EXTRC_F" />
+      <value value="0x000100" name="INTRC_F_PLL" />
+      <value value="0x000200" name="PRIM" />
+      <value value="0x000300" name="PRIM_PLL" />
+      <value value="0x000400" name="SECOND" />
+      <value value="0x000500" name="EXTRC_LP" />
+      <value value="0x000600" name="invalid" />
+      <value value="0x000700" name="INTRC_F_POST" />
+    </mask>
+    <mask name="IESO" value="0x008000" >
+      <value value="0x000000" name="Off" />
+      <value value="0x008000" name="On" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24FJ96GA008.xml b/src/devices/pic/xml_data/24FJ96GA008.xml
new file mode 100644
index 0000000..eeba6d2
--- /dev/null
+++ b/src/devices/pic/xml_data/24FJ96GA008.xml
@@ -0,0 +1,122 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24FJ96GA008" status="IP" memory_technology="FLASH" architecture="24F" id="0x0409" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="024809" datasheet="39747" progsheet="39768" erratas="80295 80330" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="32" vdd_min="2.0" vdd_max="2.75" />
+  </frequency_range>
+
+  <voltages name="vpp" min="2.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="2.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"              start="0x000200" end="0x00FFFB" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0x00FFFC" end="0x00FFFF" />
+<!--   <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFFFF" /> -->
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x8007EF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1" wmask="0xFFFFFF" bvalue="0x007DDF" >
+    <mask name="WDTPOST" value="0x00000F" >
+      <value value="0x000000" name="1:1" />
+      <value value="0x000001" name="1:2" />
+      <value value="0x000002" name="1:4" />
+      <value value="0x000003" name="1:8" />
+      <value value="0x000004" name="1:16" />
+      <value value="0x000005" name="1:32" />
+      <value value="0x000006" name="1:64" />
+      <value value="0x000007" name="1:128" />
+      <value value="0x000008" name="1:256" />
+      <value value="0x000009" name="1:512" />
+      <value value="0x00000A" name="1:1024" />
+      <value value="0x00000B" name="1:2048" />
+      <value value="0x00000C" name="1:4096" />
+      <value value="0x00000D" name="1:8192" />
+      <value value="0x00000E" name="1:16384" />
+      <value value="0x00000F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x000010" >
+      <value value="0x000000" name="1:32" />
+      <value value="0x000010" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x000040" >
+      <value value="0x000000" name="On" />
+      <value value="0x000040" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x000080" >
+      <value value="0x000000" name="Software" />
+      <value value="0x000080" name="On" />
+    </mask>
+    <mask name="ICS" value="0x000100" >
+      <value value="0x000000" name="EMUC1, EMUD1" />
+      <value value="0x000100" name="EMUC2, EMUD2" />
+    </mask>
+    <mask name="DEBUG" value="0x000800" >
+      <value value="0x000000" name="On" />
+      <value value="0x000800" name="Off" />
+    </mask>
+    <mask name="GWRP" value="0x001000" >
+      <value value="0x000000" name="All" />
+      <value value="0x001000" name="Off" />
+    </mask>
+    <mask name="GCP" value="0x002000" >
+      <value value="0x000000" name="All" />
+      <value value="0x002000" name="Off" />
+    </mask>
+    <mask name="JTAGEN" value="0x004000" >
+      <value value="0x000000" name="Off" />
+      <value value="0x004000" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2" wmask="0xFFFFFF" bvalue="0x0087E3" >
+    <mask name="POSCMD" value="0x000003" >
+      <value value="0x000000" name="EC" />
+      <value value="0x000001" name="XT" />
+      <value value="0x000002" name="HS" />
+      <value value="0x000003" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x000020" >
+      <value value="0x000000" name="IO" />
+      <value value="0x000020" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0x0000C0" >
+      <value value="0x000000" name="Switching on, monitor on" />
+      <value value="0x000040" name="Switching on, monitor off" />
+      <value value="0x000080" name="Switching off, monitor off" />
+      <value value="0x0000C0" name="Switching off, monitor off" />
+    </mask>
+    <mask name="FNOSC" value="0x000700" >
+      <value value="0x000000" name="EXTRC_F" />
+      <value value="0x000100" name="INTRC_F_PLL" />
+      <value value="0x000200" name="PRIM" />
+      <value value="0x000300" name="PRIM_PLL" />
+      <value value="0x000400" name="SECOND" />
+      <value value="0x000500" name="EXTRC_LP" />
+      <value value="0x000600" name="invalid" />
+      <value value="0x000700" name="INTRC_F_POST" />
+    </mask>
+    <mask name="IESO" value="0x008000" >
+      <value value="0x000000" name="Off" />
+      <value value="0x008000" name="On" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24FJ96GA010.xml b/src/devices/pic/xml_data/24FJ96GA010.xml
new file mode 100644
index 0000000..700d288
--- /dev/null
+++ b/src/devices/pic/xml_data/24FJ96GA010.xml
@@ -0,0 +1,122 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24FJ96GA010" status="IP" memory_technology="FLASH" architecture="24F" id="0x040C" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="024810" datasheet="39747" progsheet="39768" erratas="80295 80330" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="32" vdd_min="2.0" vdd_max="2.75" />
+  </frequency_range>
+
+  <voltages name="vpp" min="2.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="2.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"              start="0x000200" end="0x00FFFB" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0x00FFFC" end="0x00FFFF" />
+<!--   <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFFFF" /> -->
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x8007EF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="CONFIG1" wmask="0xFFFFFF" bvalue="0x007DDF" >
+    <mask name="WDTPOST" value="0x00000F" >
+      <value value="0x000000" name="1:1" />
+      <value value="0x000001" name="1:2" />
+      <value value="0x000002" name="1:4" />
+      <value value="0x000003" name="1:8" />
+      <value value="0x000004" name="1:16" />
+      <value value="0x000005" name="1:32" />
+      <value value="0x000006" name="1:64" />
+      <value value="0x000007" name="1:128" />
+      <value value="0x000008" name="1:256" />
+      <value value="0x000009" name="1:512" />
+      <value value="0x00000A" name="1:1024" />
+      <value value="0x00000B" name="1:2048" />
+      <value value="0x00000C" name="1:4096" />
+      <value value="0x00000D" name="1:8192" />
+      <value value="0x00000E" name="1:16384" />
+      <value value="0x00000F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x000010" >
+      <value value="0x000000" name="1:32" />
+      <value value="0x000010" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x000040" >
+      <value value="0x000000" name="On" />
+      <value value="0x000040" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x000080" >
+      <value value="0x000000" name="Software" />
+      <value value="0x000080" name="On" />
+    </mask>
+    <mask name="ICS" value="0x000100" >
+      <value value="0x000000" name="EMUC1, EMUD1" />
+      <value value="0x000100" name="EMUC2, EMUD2" />
+    </mask>
+    <mask name="DEBUG" value="0x000800" >
+      <value value="0x000000" name="On" />
+      <value value="0x000800" name="Off" />
+    </mask>
+    <mask name="GWRP" value="0x001000" >
+      <value value="0x000000" name="All" />
+      <value value="0x001000" name="Off" />
+    </mask>
+    <mask name="GCP" value="0x002000" >
+      <value value="0x000000" name="All" />
+      <value value="0x002000" name="Off" />
+    </mask>
+    <mask name="JTAGEN" value="0x004000" >
+      <value value="0x000000" name="Off" />
+      <value value="0x004000" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="CONFIG2" wmask="0xFFFFFF" bvalue="0x0087E3" >
+    <mask name="POSCMD" value="0x000003" >
+      <value value="0x000000" name="EC" />
+      <value value="0x000001" name="XT" />
+      <value value="0x000002" name="HS" />
+      <value value="0x000003" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x000020" >
+      <value value="0x000000" name="IO" />
+      <value value="0x000020" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0x0000C0" >
+      <value value="0x000000" name="Switching on, monitor on" />
+      <value value="0x000040" name="Switching on, monitor off" />
+      <value value="0x000080" name="Switching off, monitor off" />
+      <value value="0x0000C0" name="Switching off, monitor off" />
+    </mask>
+    <mask name="FNOSC" value="0x000700" >
+      <value value="0x000000" name="EXTRC_F" />
+      <value value="0x000100" name="INTRC_F_PLL" />
+      <value value="0x000200" name="PRIM" />
+      <value value="0x000300" name="PRIM_PLL" />
+      <value value="0x000400" name="SECOND" />
+      <value value="0x000500" name="EXTRC_LP" />
+      <value value="0x000600" name="invalid" />
+      <value value="0x000700" name="INTRC_F_POST" />
+    </mask>
+    <mask name="IESO" value="0x008000" >
+      <value value="0x000000" name="Off" />
+      <value value="0x008000" name="On" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="100" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24HJ128GP206.xml b/src/devices/pic/xml_data/24HJ128GP206.xml
new file mode 100644
index 0000000..c065e99
--- /dev/null
+++ b/src/devices/pic/xml_data/24HJ128GP206.xml
@@ -0,0 +1,199 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24HJ128GP206" document="024685" status="IP" memory_technology="FLASH" architecture="24H" id="0x005D" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="40" vdd_min="3.0" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp" min="3.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="3.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000200" end="0x0157FF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000F" />
+  <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x800FFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FBS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTBS" value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="BSSIZ"  value="0x06" >
+      <value value="0x00" name="8192" />
+      <value value="0x02" name="4096" />
+      <value value="0x04" name="1024" />
+      <value value="0x06" name="0"  />
+    </mask>
+    <mask name="BSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RBSSIZ" value="0xC0" >
+      <value value="0x00" name="1024" />
+      <value value="0x40" name="256"  />
+      <value value="0x80" name="128"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FSS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTSS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="SSSIZ"  value="0x06" >
+      <value value="0x00" name="32768" />
+      <value value="0x02" name="16384"  />
+      <value value="0x04" name="8192"  />
+      <value value="0x06" name="0"   />
+    </mask>
+    <mask name="SSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RSSSIZ" value="0xC0" >
+      <value value="0x00" name="4096" />
+      <value value="0x40" name="2048" />
+      <value value="0x80" name="256"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FGS" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRTGS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="GSSEC" value="0x06" >
+      <value value="0x00" name="High Security" />
+      <value value="0x02" name="High Security" />
+      <value value="0x04" name="Standard Security" />
+      <value value="0x06" name="Off" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FOSCSEL" wmask="0xFF" bvalue="0xA7" >
+    <mask name="FNOSC" value="0x07" >
+      <value value="0x00" name="EXTRC_F" />
+      <value value="0x01" name="INTRC_F_PLL" />
+      <value value="0x02" name="PRIM" />
+      <value value="0x03" name="PRIM_PLL" />
+      <value value="0x04" name="SECOND" />
+      <value value="0x05" name="EXTRC_LP" />
+      <value value="0x06" name="invalid" />
+      <value value="0x07" name="INTRC_F_POST" />
+    </mask>
+    <mask name="TEMP" value="0x20" >
+      <value value="0x00" name="On" />
+      <value value="0x20" name="Off" />
+    </mask>
+    <mask name="IESO" value="0x80" >
+      <value value="0x00" name="Off" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x8" name="FOSC" wmask="0xFF" bvalue="0xC7" >
+    <mask name="POSCMD" value="0x03" >
+      <value value="0x00" name="EC" />
+      <value value="0x01" name="XT" />
+      <value value="0x02" name="HS" />
+      <value value="0x03" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x04" >
+      <value value="0x00" name="IO" />
+      <value value="0x04" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0xC0" >
+      <value value="0x00" name="Switching on, monitor on" />
+      <value value="0x40" name="Switching on, monitor off" />
+      <value value="0x80" name="Switching off, monitor off" />
+      <value value="0xC0" name="Switching off, monitor off" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="FWDT" wmask="0xFF" bvalue="0xDF">
+    <mask name="WDTPOST" value="0x0F" >
+      <value value="0x00" name="1:1" />
+      <value value="0x01" name="1:2" />
+      <value value="0x02" name="1:4" />
+      <value value="0x03" name="1:8" />
+      <value value="0x04" name="1:16" />
+      <value value="0x05" name="1:32" />
+      <value value="0x06" name="1:64" />
+      <value value="0x07" name="1:128" />
+      <value value="0x08" name="1:256" />
+      <value value="0x09" name="1:512" />
+      <value value="0x0A" name="1:1024" />
+      <value value="0x0B" name="1:2048" />
+      <value value="0x0C" name="1:4096" />
+      <value value="0x0D" name="1:8192" />
+      <value value="0x0E" name="1:16384" />
+      <value value="0x0F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x10" >
+      <value value="0x00" name="1:32" />
+      <value value="0x10" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x80" >
+      <value value="0x00" name="Software" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="FPOR" wmask="0xFF" bvalue="0x07" >
+    <mask name="FPWRT" value="0x07" >
+      <value value="0x00" name="0" />
+      <value value="0x01" name="2" />
+      <value value="0x02" name="4" />
+      <value value="0x03" name="8" />
+      <value value="0x04" name="16" />
+      <value value="0x05" name="32" />
+      <value value="0x06" name="64" />
+      <value value="0x07" name="128" />
+    </mask>
+  </config>
+
+  <config offset="0xE" name="FICD" wmask="0xFF" bvalue="0xE3" >
+    <mask name="ICS" value="0x03" >
+      <value value="0x00" name="EMUC3, EMUD3" />
+      <value value="0x01" name="EMUC2, EMUD2" />
+      <value value="0x02" name="EMUC1, EMUD1" />
+      <value value="0x03" name="PGC/EMUC, PGD/EMUD" />
+    </mask>
+    <mask name="JTAGEN" value="0x20" >
+      <value value="0x00" name="Off" />
+      <value value="0x20" name="On" />
+    </mask>
+    <mask name="COE" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" />
+      <value value="0x80" name="Off" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24HJ128GP210.xml b/src/devices/pic/xml_data/24HJ128GP210.xml
new file mode 100644
index 0000000..b0922d0
--- /dev/null
+++ b/src/devices/pic/xml_data/24HJ128GP210.xml
@@ -0,0 +1,199 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24HJ128GP210" document="024686" status="IP" memory_technology="FLASH" architecture="24H" id="0x005F" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="40" vdd_min="3.0" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp" min="3.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="3.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000200" end="0x0157FF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000F" />
+  <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x800FFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FBS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTBS" value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="BSSIZ"  value="0x06" >
+      <value value="0x00" name="8192" />
+      <value value="0x02" name="4096" />
+      <value value="0x04" name="1024" />
+      <value value="0x06" name="0"  />
+    </mask>
+    <mask name="BSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RBSSIZ" value="0xC0" >
+      <value value="0x00" name="1024" />
+      <value value="0x40" name="256"  />
+      <value value="0x80" name="128"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FSS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTSS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="SSSIZ"  value="0x06" >
+      <value value="0x00" name="32768" />
+      <value value="0x02" name="16384"  />
+      <value value="0x04" name="8192"  />
+      <value value="0x06" name="0"   />
+    </mask>
+    <mask name="SSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RSSSIZ" value="0xC0" >
+      <value value="0x00" name="4096" />
+      <value value="0x40" name="2048" />
+      <value value="0x80" name="256"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FGS" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRTGS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="GSSEC" value="0x06" >
+      <value value="0x00" name="High Security" />
+      <value value="0x02" name="High Security" />
+      <value value="0x04" name="Standard Security" />
+      <value value="0x06" name="Off" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FOSCSEL" wmask="0xFF" bvalue="0xA7" >
+    <mask name="FNOSC" value="0x07" >
+      <value value="0x00" name="EXTRC_F" />
+      <value value="0x01" name="INTRC_F_PLL" />
+      <value value="0x02" name="PRIM" />
+      <value value="0x03" name="PRIM_PLL" />
+      <value value="0x04" name="SECOND" />
+      <value value="0x05" name="EXTRC_LP" />
+      <value value="0x06" name="invalid" />
+      <value value="0x07" name="INTRC_F_POST" />
+    </mask>
+    <mask name="TEMP" value="0x20" >
+      <value value="0x00" name="On" />
+      <value value="0x20" name="Off" />
+    </mask>
+    <mask name="IESO" value="0x80" >
+      <value value="0x00" name="Off" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x8" name="FOSC" wmask="0xFF" bvalue="0xC7" >
+    <mask name="POSCMD" value="0x03" >
+      <value value="0x00" name="EC" />
+      <value value="0x01" name="XT" />
+      <value value="0x02" name="HS" />
+      <value value="0x03" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x04" >
+      <value value="0x00" name="IO" />
+      <value value="0x04" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0xC0" >
+      <value value="0x00" name="Switching on, monitor on" />
+      <value value="0x40" name="Switching on, monitor off" />
+      <value value="0x80" name="Switching off, monitor off" />
+      <value value="0xC0" name="Switching off, monitor off" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="FWDT" wmask="0xFF" bvalue="0xDF">
+    <mask name="WDTPOST" value="0x0F" >
+      <value value="0x00" name="1:1" />
+      <value value="0x01" name="1:2" />
+      <value value="0x02" name="1:4" />
+      <value value="0x03" name="1:8" />
+      <value value="0x04" name="1:16" />
+      <value value="0x05" name="1:32" />
+      <value value="0x06" name="1:64" />
+      <value value="0x07" name="1:128" />
+      <value value="0x08" name="1:256" />
+      <value value="0x09" name="1:512" />
+      <value value="0x0A" name="1:1024" />
+      <value value="0x0B" name="1:2048" />
+      <value value="0x0C" name="1:4096" />
+      <value value="0x0D" name="1:8192" />
+      <value value="0x0E" name="1:16384" />
+      <value value="0x0F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x10" >
+      <value value="0x00" name="1:32" />
+      <value value="0x10" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x80" >
+      <value value="0x00" name="Software" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="FPOR" wmask="0xFF" bvalue="0x07" >
+    <mask name="FPWRT" value="0x07" >
+      <value value="0x00" name="0" />
+      <value value="0x01" name="2" />
+      <value value="0x02" name="4" />
+      <value value="0x03" name="8" />
+      <value value="0x04" name="16" />
+      <value value="0x05" name="32" />
+      <value value="0x06" name="64" />
+      <value value="0x07" name="128" />
+    </mask>
+  </config>
+
+  <config offset="0xE" name="FICD" wmask="0xFF" bvalue="0xE3" >
+    <mask name="ICS" value="0x03" >
+      <value value="0x00" name="EMUC3, EMUD3" />
+      <value value="0x01" name="EMUC2, EMUD2" />
+      <value value="0x02" name="EMUC1, EMUD1" />
+      <value value="0x03" name="PGC/EMUC, PGD/EMUD" />
+    </mask>
+    <mask name="JTAGEN" value="0x20" >
+      <value value="0x00" name="Off" />
+      <value value="0x20" name="On" />
+    </mask>
+    <mask name="COE" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" />
+      <value value="0x80" name="Off" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="100" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24HJ128GP306.xml b/src/devices/pic/xml_data/24HJ128GP306.xml
new file mode 100644
index 0000000..97f23e1
--- /dev/null
+++ b/src/devices/pic/xml_data/24HJ128GP306.xml
@@ -0,0 +1,199 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24HJ128GP306" document="024689" status="IP" memory_technology="FLASH" architecture="24H" id="0x0065" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="40" vdd_min="3.0" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp" min="3.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="3.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000200" end="0x0157FF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000F" />
+  <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x800FFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FBS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTBS" value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="BSSIZ"  value="0x06" >
+      <value value="0x00" name="8192" />
+      <value value="0x02" name="4096" />
+      <value value="0x04" name="1024" />
+      <value value="0x06" name="0"  />
+    </mask>
+    <mask name="BSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RBSSIZ" value="0xC0" >
+      <value value="0x00" name="1024" />
+      <value value="0x40" name="256"  />
+      <value value="0x80" name="128"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FSS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTSS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="SSSIZ"  value="0x06" >
+      <value value="0x00" name="32768" />
+      <value value="0x02" name="16384"  />
+      <value value="0x04" name="8192"  />
+      <value value="0x06" name="0"   />
+    </mask>
+    <mask name="SSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RSSSIZ" value="0xC0" >
+      <value value="0x00" name="4096" />
+      <value value="0x40" name="2048" />
+      <value value="0x80" name="256"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FGS" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRTGS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="GSSEC" value="0x06" >
+      <value value="0x00" name="High Security" />
+      <value value="0x02" name="High Security" />
+      <value value="0x04" name="Standard Security" />
+      <value value="0x06" name="Off" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FOSCSEL" wmask="0xFF" bvalue="0xA7" >
+    <mask name="FNOSC" value="0x07" >
+      <value value="0x00" name="EXTRC_F" />
+      <value value="0x01" name="INTRC_F_PLL" />
+      <value value="0x02" name="PRIM" />
+      <value value="0x03" name="PRIM_PLL" />
+      <value value="0x04" name="SECOND" />
+      <value value="0x05" name="EXTRC_LP" />
+      <value value="0x06" name="invalid" />
+      <value value="0x07" name="INTRC_F_POST" />
+    </mask>
+    <mask name="TEMP" value="0x20" >
+      <value value="0x00" name="On" />
+      <value value="0x20" name="Off" />
+    </mask>
+    <mask name="IESO" value="0x80" >
+      <value value="0x00" name="Off" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x8" name="FOSC" wmask="0xFF" bvalue="0xC7" >
+    <mask name="POSCMD" value="0x03" >
+      <value value="0x00" name="EC" />
+      <value value="0x01" name="XT" />
+      <value value="0x02" name="HS" />
+      <value value="0x03" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x04" >
+      <value value="0x00" name="IO" />
+      <value value="0x04" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0xC0" >
+      <value value="0x00" name="Switching on, monitor on" />
+      <value value="0x40" name="Switching on, monitor off" />
+      <value value="0x80" name="Switching off, monitor off" />
+      <value value="0xC0" name="Switching off, monitor off" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="FWDT" wmask="0xFF" bvalue="0xDF">
+    <mask name="WDTPOST" value="0x0F" >
+      <value value="0x00" name="1:1" />
+      <value value="0x01" name="1:2" />
+      <value value="0x02" name="1:4" />
+      <value value="0x03" name="1:8" />
+      <value value="0x04" name="1:16" />
+      <value value="0x05" name="1:32" />
+      <value value="0x06" name="1:64" />
+      <value value="0x07" name="1:128" />
+      <value value="0x08" name="1:256" />
+      <value value="0x09" name="1:512" />
+      <value value="0x0A" name="1:1024" />
+      <value value="0x0B" name="1:2048" />
+      <value value="0x0C" name="1:4096" />
+      <value value="0x0D" name="1:8192" />
+      <value value="0x0E" name="1:16384" />
+      <value value="0x0F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x10" >
+      <value value="0x00" name="1:32" />
+      <value value="0x10" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x80" >
+      <value value="0x00" name="Software" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="FPOR" wmask="0xFF" bvalue="0x07" >
+    <mask name="FPWRT" value="0x07" >
+      <value value="0x00" name="0" />
+      <value value="0x01" name="2" />
+      <value value="0x02" name="4" />
+      <value value="0x03" name="8" />
+      <value value="0x04" name="16" />
+      <value value="0x05" name="32" />
+      <value value="0x06" name="64" />
+      <value value="0x07" name="128" />
+    </mask>
+  </config>
+
+  <config offset="0xE" name="FICD" wmask="0xFF" bvalue="0xE3" >
+    <mask name="ICS" value="0x03" >
+      <value value="0x00" name="EMUC3, EMUD3" />
+      <value value="0x01" name="EMUC2, EMUD2" />
+      <value value="0x02" name="EMUC1, EMUD1" />
+      <value value="0x03" name="PGC/EMUC, PGD/EMUD" />
+    </mask>
+    <mask name="JTAGEN" value="0x20" >
+      <value value="0x00" name="Off" />
+      <value value="0x20" name="On" />
+    </mask>
+    <mask name="COE" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" />
+      <value value="0x80" name="Off" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24HJ128GP310.xml b/src/devices/pic/xml_data/24HJ128GP310.xml
new file mode 100644
index 0000000..a600601
--- /dev/null
+++ b/src/devices/pic/xml_data/24HJ128GP310.xml
@@ -0,0 +1,199 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24HJ128GP310" document="024690" status="IP" memory_technology="FLASH" architecture="24H" id="0x0067" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="40" vdd_min="3.0" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp" min="3.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="3.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000200" end="0x0157FF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000F" />
+  <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x800FFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FBS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTBS" value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="BSSIZ"  value="0x06" >
+      <value value="0x00" name="8192" />
+      <value value="0x02" name="4096" />
+      <value value="0x04" name="1024" />
+      <value value="0x06" name="0"  />
+    </mask>
+    <mask name="BSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RBSSIZ" value="0xC0" >
+      <value value="0x00" name="1024" />
+      <value value="0x40" name="256"  />
+      <value value="0x80" name="128"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FSS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTSS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="SSSIZ"  value="0x06" >
+      <value value="0x00" name="32768" />
+      <value value="0x02" name="16384"  />
+      <value value="0x04" name="8192"  />
+      <value value="0x06" name="0"   />
+    </mask>
+    <mask name="SSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RSSSIZ" value="0xC0" >
+      <value value="0x00" name="4096" />
+      <value value="0x40" name="2048" />
+      <value value="0x80" name="256"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FGS" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRTGS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="GSSEC" value="0x06" >
+      <value value="0x00" name="High Security" />
+      <value value="0x02" name="High Security" />
+      <value value="0x04" name="Standard Security" />
+      <value value="0x06" name="Off" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FOSCSEL" wmask="0xFF" bvalue="0xA7" >
+    <mask name="FNOSC" value="0x07" >
+      <value value="0x00" name="EXTRC_F" />
+      <value value="0x01" name="INTRC_F_PLL" />
+      <value value="0x02" name="PRIM" />
+      <value value="0x03" name="PRIM_PLL" />
+      <value value="0x04" name="SECOND" />
+      <value value="0x05" name="EXTRC_LP" />
+      <value value="0x06" name="invalid" />
+      <value value="0x07" name="INTRC_F_POST" />
+    </mask>
+    <mask name="TEMP" value="0x20" >
+      <value value="0x00" name="On" />
+      <value value="0x20" name="Off" />
+    </mask>
+    <mask name="IESO" value="0x80" >
+      <value value="0x00" name="Off" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x8" name="FOSC" wmask="0xFF" bvalue="0xC7" >
+    <mask name="POSCMD" value="0x03" >
+      <value value="0x00" name="EC" />
+      <value value="0x01" name="XT" />
+      <value value="0x02" name="HS" />
+      <value value="0x03" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x04" >
+      <value value="0x00" name="IO" />
+      <value value="0x04" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0xC0" >
+      <value value="0x00" name="Switching on, monitor on" />
+      <value value="0x40" name="Switching on, monitor off" />
+      <value value="0x80" name="Switching off, monitor off" />
+      <value value="0xC0" name="Switching off, monitor off" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="FWDT" wmask="0xFF" bvalue="0xDF">
+    <mask name="WDTPOST" value="0x0F" >
+      <value value="0x00" name="1:1" />
+      <value value="0x01" name="1:2" />
+      <value value="0x02" name="1:4" />
+      <value value="0x03" name="1:8" />
+      <value value="0x04" name="1:16" />
+      <value value="0x05" name="1:32" />
+      <value value="0x06" name="1:64" />
+      <value value="0x07" name="1:128" />
+      <value value="0x08" name="1:256" />
+      <value value="0x09" name="1:512" />
+      <value value="0x0A" name="1:1024" />
+      <value value="0x0B" name="1:2048" />
+      <value value="0x0C" name="1:4096" />
+      <value value="0x0D" name="1:8192" />
+      <value value="0x0E" name="1:16384" />
+      <value value="0x0F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x10" >
+      <value value="0x00" name="1:32" />
+      <value value="0x10" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x80" >
+      <value value="0x00" name="Software" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="FPOR" wmask="0xFF" bvalue="0x07" >
+    <mask name="FPWRT" value="0x07" >
+      <value value="0x00" name="0" />
+      <value value="0x01" name="2" />
+      <value value="0x02" name="4" />
+      <value value="0x03" name="8" />
+      <value value="0x04" name="16" />
+      <value value="0x05" name="32" />
+      <value value="0x06" name="64" />
+      <value value="0x07" name="128" />
+    </mask>
+  </config>
+
+  <config offset="0xE" name="FICD" wmask="0xFF" bvalue="0xE3" >
+    <mask name="ICS" value="0x03" >
+      <value value="0x00" name="EMUC3, EMUD3" />
+      <value value="0x01" name="EMUC2, EMUD2" />
+      <value value="0x02" name="EMUC1, EMUD1" />
+      <value value="0x03" name="PGC/EMUC, PGD/EMUD" />
+    </mask>
+    <mask name="JTAGEN" value="0x20" >
+      <value value="0x00" name="Off" />
+      <value value="0x20" name="On" />
+    </mask>
+    <mask name="COE" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" />
+      <value value="0x80" name="Off" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="100" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24HJ128GP506.xml b/src/devices/pic/xml_data/24HJ128GP506.xml
new file mode 100644
index 0000000..ae2fd06
--- /dev/null
+++ b/src/devices/pic/xml_data/24HJ128GP506.xml
@@ -0,0 +1,199 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24HJ128GP506" document="024687" status="IP" memory_technology="FLASH" architecture="24H" id="0x0061" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="40" vdd_min="3.0" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp" min="3.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="3.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000200" end="0x0157FF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000F" />
+  <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x800FFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FBS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTBS" value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="BSSIZ"  value="0x06" >
+      <value value="0x00" name="8192" />
+      <value value="0x02" name="4096" />
+      <value value="0x04" name="1024" />
+      <value value="0x06" name="0"  />
+    </mask>
+    <mask name="BSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RBSSIZ" value="0xC0" >
+      <value value="0x00" name="1024" />
+      <value value="0x40" name="256"  />
+      <value value="0x80" name="128"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FSS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTSS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="SSSIZ"  value="0x06" >
+      <value value="0x00" name="32768" />
+      <value value="0x02" name="16384"  />
+      <value value="0x04" name="8192"  />
+      <value value="0x06" name="0"   />
+    </mask>
+    <mask name="SSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RSSSIZ" value="0xC0" >
+      <value value="0x00" name="4096" />
+      <value value="0x40" name="2048" />
+      <value value="0x80" name="256"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FGS" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRTGS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="GSSEC" value="0x06" >
+      <value value="0x00" name="High Security" />
+      <value value="0x02" name="High Security" />
+      <value value="0x04" name="Standard Security" />
+      <value value="0x06" name="Off" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FOSCSEL" wmask="0xFF" bvalue="0xA7" >
+    <mask name="FNOSC" value="0x07" >
+      <value value="0x00" name="EXTRC_F" />
+      <value value="0x01" name="INTRC_F_PLL" />
+      <value value="0x02" name="PRIM" />
+      <value value="0x03" name="PRIM_PLL" />
+      <value value="0x04" name="SECOND" />
+      <value value="0x05" name="EXTRC_LP" />
+      <value value="0x06" name="invalid" />
+      <value value="0x07" name="INTRC_F_POST" />
+    </mask>
+    <mask name="TEMP" value="0x20" >
+      <value value="0x00" name="On" />
+      <value value="0x20" name="Off" />
+    </mask>
+    <mask name="IESO" value="0x80" >
+      <value value="0x00" name="Off" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x8" name="FOSC" wmask="0xFF" bvalue="0xC7" >
+    <mask name="POSCMD" value="0x03" >
+      <value value="0x00" name="EC" />
+      <value value="0x01" name="XT" />
+      <value value="0x02" name="HS" />
+      <value value="0x03" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x04" >
+      <value value="0x00" name="IO" />
+      <value value="0x04" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0xC0" >
+      <value value="0x00" name="Switching on, monitor on" />
+      <value value="0x40" name="Switching on, monitor off" />
+      <value value="0x80" name="Switching off, monitor off" />
+      <value value="0xC0" name="Switching off, monitor off" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="FWDT" wmask="0xFF" bvalue="0xDF">
+    <mask name="WDTPOST" value="0x0F" >
+      <value value="0x00" name="1:1" />
+      <value value="0x01" name="1:2" />
+      <value value="0x02" name="1:4" />
+      <value value="0x03" name="1:8" />
+      <value value="0x04" name="1:16" />
+      <value value="0x05" name="1:32" />
+      <value value="0x06" name="1:64" />
+      <value value="0x07" name="1:128" />
+      <value value="0x08" name="1:256" />
+      <value value="0x09" name="1:512" />
+      <value value="0x0A" name="1:1024" />
+      <value value="0x0B" name="1:2048" />
+      <value value="0x0C" name="1:4096" />
+      <value value="0x0D" name="1:8192" />
+      <value value="0x0E" name="1:16384" />
+      <value value="0x0F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x10" >
+      <value value="0x00" name="1:32" />
+      <value value="0x10" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x80" >
+      <value value="0x00" name="Software" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="FPOR" wmask="0xFF" bvalue="0x07" >
+    <mask name="FPWRT" value="0x07" >
+      <value value="0x00" name="0" />
+      <value value="0x01" name="2" />
+      <value value="0x02" name="4" />
+      <value value="0x03" name="8" />
+      <value value="0x04" name="16" />
+      <value value="0x05" name="32" />
+      <value value="0x06" name="64" />
+      <value value="0x07" name="128" />
+    </mask>
+  </config>
+
+  <config offset="0xE" name="FICD" wmask="0xFF" bvalue="0xE3" >
+    <mask name="ICS" value="0x03" >
+      <value value="0x00" name="EMUC3, EMUD3" />
+      <value value="0x01" name="EMUC2, EMUD2" />
+      <value value="0x02" name="EMUC1, EMUD1" />
+      <value value="0x03" name="PGC/EMUC, PGD/EMUD" />
+    </mask>
+    <mask name="JTAGEN" value="0x20" >
+      <value value="0x00" name="Off" />
+      <value value="0x20" name="On" />
+    </mask>
+    <mask name="COE" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" />
+      <value value="0x80" name="Off" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24HJ128GP510.xml b/src/devices/pic/xml_data/24HJ128GP510.xml
new file mode 100644
index 0000000..7195e60
--- /dev/null
+++ b/src/devices/pic/xml_data/24HJ128GP510.xml
@@ -0,0 +1,199 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24HJ128GP510" document="024688" status="IP" memory_technology="FLASH" architecture="24H" id="0x0063" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="40" vdd_min="3.0" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp" min="3.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="3.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000200" end="0x0157FF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000F" />
+  <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x800FFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FBS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTBS" value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="BSSIZ"  value="0x06" >
+      <value value="0x00" name="8192" />
+      <value value="0x02" name="4096" />
+      <value value="0x04" name="1024" />
+      <value value="0x06" name="0"  />
+    </mask>
+    <mask name="BSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RBSSIZ" value="0xC0" >
+      <value value="0x00" name="1024" />
+      <value value="0x40" name="256"  />
+      <value value="0x80" name="128"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FSS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTSS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="SSSIZ"  value="0x06" >
+      <value value="0x00" name="32768" />
+      <value value="0x02" name="16384"  />
+      <value value="0x04" name="8192"  />
+      <value value="0x06" name="0"   />
+    </mask>
+    <mask name="SSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RSSSIZ" value="0xC0" >
+      <value value="0x00" name="4096" />
+      <value value="0x40" name="2048" />
+      <value value="0x80" name="256"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FGS" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRTGS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="GSSEC" value="0x06" >
+      <value value="0x00" name="High Security" />
+      <value value="0x02" name="High Security" />
+      <value value="0x04" name="Standard Security" />
+      <value value="0x06" name="Off" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FOSCSEL" wmask="0xFF" bvalue="0xA7" >
+    <mask name="FNOSC" value="0x07" >
+      <value value="0x00" name="EXTRC_F" />
+      <value value="0x01" name="INTRC_F_PLL" />
+      <value value="0x02" name="PRIM" />
+      <value value="0x03" name="PRIM_PLL" />
+      <value value="0x04" name="SECOND" />
+      <value value="0x05" name="EXTRC_LP" />
+      <value value="0x06" name="invalid" />
+      <value value="0x07" name="INTRC_F_POST" />
+    </mask>
+    <mask name="TEMP" value="0x20" >
+      <value value="0x00" name="On" />
+      <value value="0x20" name="Off" />
+    </mask>
+    <mask name="IESO" value="0x80" >
+      <value value="0x00" name="Off" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x8" name="FOSC" wmask="0xFF" bvalue="0xC7" >
+    <mask name="POSCMD" value="0x03" >
+      <value value="0x00" name="EC" />
+      <value value="0x01" name="XT" />
+      <value value="0x02" name="HS" />
+      <value value="0x03" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x04" >
+      <value value="0x00" name="IO" />
+      <value value="0x04" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0xC0" >
+      <value value="0x00" name="Switching on, monitor on" />
+      <value value="0x40" name="Switching on, monitor off" />
+      <value value="0x80" name="Switching off, monitor off" />
+      <value value="0xC0" name="Switching off, monitor off" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="FWDT" wmask="0xFF" bvalue="0xDF">
+    <mask name="WDTPOST" value="0x0F" >
+      <value value="0x00" name="1:1" />
+      <value value="0x01" name="1:2" />
+      <value value="0x02" name="1:4" />
+      <value value="0x03" name="1:8" />
+      <value value="0x04" name="1:16" />
+      <value value="0x05" name="1:32" />
+      <value value="0x06" name="1:64" />
+      <value value="0x07" name="1:128" />
+      <value value="0x08" name="1:256" />
+      <value value="0x09" name="1:512" />
+      <value value="0x0A" name="1:1024" />
+      <value value="0x0B" name="1:2048" />
+      <value value="0x0C" name="1:4096" />
+      <value value="0x0D" name="1:8192" />
+      <value value="0x0E" name="1:16384" />
+      <value value="0x0F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x10" >
+      <value value="0x00" name="1:32" />
+      <value value="0x10" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x80" >
+      <value value="0x00" name="Software" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="FPOR" wmask="0xFF" bvalue="0x07" >
+    <mask name="FPWRT" value="0x07" >
+      <value value="0x00" name="0" />
+      <value value="0x01" name="2" />
+      <value value="0x02" name="4" />
+      <value value="0x03" name="8" />
+      <value value="0x04" name="16" />
+      <value value="0x05" name="32" />
+      <value value="0x06" name="64" />
+      <value value="0x07" name="128" />
+    </mask>
+  </config>
+
+  <config offset="0xE" name="FICD" wmask="0xFF" bvalue="0xE3" >
+    <mask name="ICS" value="0x03" >
+      <value value="0x00" name="EMUC3, EMUD3" />
+      <value value="0x01" name="EMUC2, EMUD2" />
+      <value value="0x02" name="EMUC1, EMUD1" />
+      <value value="0x03" name="PGC/EMUC, PGD/EMUD" />
+    </mask>
+    <mask name="JTAGEN" value="0x20" >
+      <value value="0x00" name="Off" />
+      <value value="0x20" name="On" />
+    </mask>
+    <mask name="COE" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" />
+      <value value="0x80" name="Off" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="100" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24HJ12GP201.xml b/src/devices/pic/xml_data/24HJ12GP201.xml
new file mode 100644
index 0000000..b0c3357
--- /dev/null
+++ b/src/devices/pic/xml_data/24HJ12GP201.xml
@@ -0,0 +1,177 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24HJ12GP201" document="520472" status="IP" memory_technology="FLASH" architecture="24H" id="0x080A" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="40" vdd_min="3.0" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp" min="3.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="3.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000200" end="0x001FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000F" />
+  <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x800FFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FBS" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRTBS" value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="BSSIZ"  value="0x06" >
+      <value value="0x00" name="1792" />
+      <value value="0x02" name="768" />
+      <value value="0x04" name="256" />
+      <value value="0x06" name="0"  />
+    </mask>
+    <mask name="BSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="reserved" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x4" name="FGS" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRTGS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="GSSEC" value="0x06" >
+      <value value="0x00" name="High Security" />
+      <value value="0x02" name="High Security" />
+      <value value="0x04" name="Standard Security" />
+      <value value="0x06" name="Off" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FOSCSEL" wmask="0xFF" bvalue="0x87" >
+    <mask name="FNOSC" value="0x07" >
+      <value value="0x00" name="EXTRC_F" />
+      <value value="0x01" name="INTRC_F_PLL" />
+      <value value="0x02" name="PRIM" />
+      <value value="0x03" name="PRIM_PLL" />
+      <value value="0x04" name="SECOND" />
+      <value value="0x05" name="EXTRC_LP" />
+      <value value="0x06" name="invalid" />
+      <value value="0x07" name="INTRC_F_POST" />
+    </mask>
+    <mask name="IESO" value="0x80" >
+      <value value="0x00" name="Off" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x8" name="FOSC" wmask="0xFF" bvalue="0xC7" >
+    <mask name="POSCMD" value="0x03" >
+      <value value="0x00" name="EC" />
+      <value value="0x01" name="XT" />
+      <value value="0x02" name="HS" />
+      <value value="0x03" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x04" >
+      <value value="0x00" name="IO" />
+      <value value="0x04" name="Clock" />
+    </mask>
+    <mask name="IOL1WAY" value="0x20" >
+      <value value="0x00" name="Multiple reconfigurations" />
+      <value value="0x20" name="One reconfiguration" />
+    </mask>
+    <mask name="FCKSM" value="0xC0" >
+      <value value="0x00" name="Switching on, monitor on" />
+      <value value="0x40" name="Switching on, monitor off" />
+      <value value="0x80" name="Switching off, monitor off" />
+      <value value="0xC0" name="Switching off, monitor off" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="FWDT" wmask="0xFF" bvalue="0xDF">
+    <mask name="WDTPOST" value="0x0F" >
+      <value value="0x00" name="1:1" />
+      <value value="0x01" name="1:2" />
+      <value value="0x02" name="1:4" />
+      <value value="0x03" name="1:8" />
+      <value value="0x04" name="1:16" />
+      <value value="0x05" name="1:32" />
+      <value value="0x06" name="1:64" />
+      <value value="0x07" name="1:128" />
+      <value value="0x08" name="1:256" />
+      <value value="0x09" name="1:512" />
+      <value value="0x0A" name="1:1024" />
+      <value value="0x0B" name="1:2048" />
+      <value value="0x0C" name="1:4096" />
+      <value value="0x0D" name="1:8192" />
+      <value value="0x0E" name="1:16384" />
+      <value value="0x0F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x10" >
+      <value value="0x00" name="1:32" />
+      <value value="0x10" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x80" >
+      <value value="0x00" name="Software" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="FPOR" wmask="0xFF" bvalue="0x17" >
+    <mask name="FPWRT" value="0x07" >
+      <value value="0x00" name="0" />
+      <value value="0x01" name="2" />
+      <value value="0x02" name="4" />
+      <value value="0x03" name="8" />
+      <value value="0x04" name="16" />
+      <value value="0x05" name="32" />
+      <value value="0x06" name="64" />
+      <value value="0x07" name="128" />
+    </mask>
+    <mask name="ALTI2C" value="0x10" >
+      <value value="0x00" name="ASDA1/ASCL1" />
+      <value value="0x10" name="SDA1/SCL1" />
+    </mask>
+  </config>
+
+  <config offset="0xE" name="FICD" wmask="0xFF" bvalue="0xE3" >
+    <mask name="ICS" value="0x03" >
+      <value value="0x00" name="EMUC3, EMUD3" />
+      <value value="0x01" name="EMUC2, EMUD2" />
+      <value value="0x02" name="EMUC1, EMUD1" />
+      <value value="0x03" name="PGC/EMUC, PGD/EMUD" />
+    </mask>
+    <mask name="JTAGEN" value="0x20" >
+      <value value="0x00" name="Off" />
+      <value value="0x20" name="On" />
+    </mask>
+    <mask name="COE" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" />
+      <value value="0x80" name="Off" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24HJ12GP202.xml b/src/devices/pic/xml_data/24HJ12GP202.xml
new file mode 100644
index 0000000..60fdce8
--- /dev/null
+++ b/src/devices/pic/xml_data/24HJ12GP202.xml
@@ -0,0 +1,177 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24HJ12GP202" document="520471" status="IP" memory_technology="FLASH" architecture="24H" id="0x080B" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="40" vdd_min="3.0" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp" min="3.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="3.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000200" end="0x001FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000F" />
+  <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x800FFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FBS" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRTBS" value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="BSSIZ"  value="0x06" >
+      <value value="0x00" name="1792" />
+      <value value="0x02" name="768" />
+      <value value="0x04" name="256" />
+      <value value="0x06" name="0"  />
+    </mask>
+    <mask name="BSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="reserved" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x4" name="FGS" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRTGS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="GSSEC" value="0x06" >
+      <value value="0x00" name="High Security" />
+      <value value="0x02" name="High Security" />
+      <value value="0x04" name="Standard Security" />
+      <value value="0x06" name="Off" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FOSCSEL" wmask="0xFF" bvalue="0x87" >
+    <mask name="FNOSC" value="0x07" >
+      <value value="0x00" name="EXTRC_F" />
+      <value value="0x01" name="INTRC_F_PLL" />
+      <value value="0x02" name="PRIM" />
+      <value value="0x03" name="PRIM_PLL" />
+      <value value="0x04" name="SECOND" />
+      <value value="0x05" name="EXTRC_LP" />
+      <value value="0x06" name="invalid" />
+      <value value="0x07" name="INTRC_F_POST" />
+    </mask>
+    <mask name="IESO" value="0x80" >
+      <value value="0x00" name="Off" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x8" name="FOSC" wmask="0xFF" bvalue="0xC7" >
+    <mask name="POSCMD" value="0x03" >
+      <value value="0x00" name="EC" />
+      <value value="0x01" name="XT" />
+      <value value="0x02" name="HS" />
+      <value value="0x03" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x04" >
+      <value value="0x00" name="IO" />
+      <value value="0x04" name="Clock" />
+    </mask>
+    <mask name="IOL1WAY" value="0x20" >
+      <value value="0x00" name="Multiple reconfigurations" />
+      <value value="0x20" name="One reconfiguration" />
+    </mask>
+    <mask name="FCKSM" value="0xC0" >
+      <value value="0x00" name="Switching on, monitor on" />
+      <value value="0x40" name="Switching on, monitor off" />
+      <value value="0x80" name="Switching off, monitor off" />
+      <value value="0xC0" name="Switching off, monitor off" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="FWDT" wmask="0xFF" bvalue="0xDF">
+    <mask name="WDTPOST" value="0x0F" >
+      <value value="0x00" name="1:1" />
+      <value value="0x01" name="1:2" />
+      <value value="0x02" name="1:4" />
+      <value value="0x03" name="1:8" />
+      <value value="0x04" name="1:16" />
+      <value value="0x05" name="1:32" />
+      <value value="0x06" name="1:64" />
+      <value value="0x07" name="1:128" />
+      <value value="0x08" name="1:256" />
+      <value value="0x09" name="1:512" />
+      <value value="0x0A" name="1:1024" />
+      <value value="0x0B" name="1:2048" />
+      <value value="0x0C" name="1:4096" />
+      <value value="0x0D" name="1:8192" />
+      <value value="0x0E" name="1:16384" />
+      <value value="0x0F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x10" >
+      <value value="0x00" name="1:32" />
+      <value value="0x10" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x80" >
+      <value value="0x00" name="Software" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="FPOR" wmask="0xFF" bvalue="0x17" >
+    <mask name="FPWRT" value="0x07" >
+      <value value="0x00" name="0" />
+      <value value="0x01" name="2" />
+      <value value="0x02" name="4" />
+      <value value="0x03" name="8" />
+      <value value="0x04" name="16" />
+      <value value="0x05" name="32" />
+      <value value="0x06" name="64" />
+      <value value="0x07" name="128" />
+    </mask>
+    <mask name="ALTI2C" value="0x10" >
+      <value value="0x00" name="ASDA1/ASCL1" />
+      <value value="0x10" name="SDA1/SCL1" />
+    </mask>
+  </config>
+
+  <config offset="0xE" name="FICD" wmask="0xFF" bvalue="0xE3" >
+    <mask name="ICS" value="0x03" >
+      <value value="0x00" name="EMUC3, EMUD3" />
+      <value value="0x01" name="EMUC2, EMUD2" />
+      <value value="0x02" name="EMUC1, EMUD1" />
+      <value value="0x03" name="PGC/EMUC, PGD/EMUD" />
+    </mask>
+    <mask name="JTAGEN" value="0x20" >
+      <value value="0x00" name="Off" />
+      <value value="0x20" name="On" />
+    </mask>
+    <mask name="COE" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" />
+      <value value="0x80" name="Off" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic qfn" nb_pins="28" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24HJ16GP304.xml b/src/devices/pic/xml_data/24HJ16GP304.xml
new file mode 100644
index 0000000..f4d50d8
--- /dev/null
+++ b/src/devices/pic/xml_data/24HJ16GP304.xml
@@ -0,0 +1,180 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24HJ16GP304" status="IP" memory_technology="FLASH" architecture="24H" id="0x0F17" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="530329" datasheet="70289" progsheet="70152" erratas="80339" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="40" vdd_min="3.0" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp" min="3.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="3.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"              start="0x000200" end="0x002BFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000F" />
+  <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x800FFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FBS" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRTBS" value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="BSSIZ"  value="0x06" >
+      <value value="0x00" name="1792" />
+      <value value="0x02" name="768" />
+      <value value="0x04" name="256" />
+      <value value="0x06" name="0"  />
+    </mask>
+    <mask name="BSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="reserved" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x4" name="FGS" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRTGS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="GSSEC" value="0x06" >
+      <value value="0x00" name="High Security" />
+      <value value="0x02" name="High Security" />
+      <value value="0x04" name="Standard Security" />
+      <value value="0x06" name="Off" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FOSCSEL" wmask="0xFF" bvalue="0x87" >
+    <mask name="FNOSC" value="0x07" >
+      <value value="0x00" name="EXTRC_F" />
+      <value value="0x01" name="INTRC_F_PLL" />
+      <value value="0x02" name="PRIM" />
+      <value value="0x03" name="PRIM_PLL" />
+      <value value="0x04" name="SECOND" />
+      <value value="0x05" name="EXTRC_LP" />
+      <value value="0x06" name="invalid" />
+      <value value="0x07" name="INTRC_F_POST" />
+    </mask>
+    <mask name="IESO" value="0x80" >
+      <value value="0x00" name="Off" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x8" name="FOSC" wmask="0xFF" bvalue="0xC7" >
+    <mask name="POSCMD" value="0x03" >
+      <value value="0x00" name="EC" />
+      <value value="0x01" name="XT" />
+      <value value="0x02" name="HS" />
+      <value value="0x03" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x04" >
+      <value value="0x00" name="IO" />
+      <value value="0x04" name="Clock" />
+    </mask>
+    <mask name="IOL1WAY" value="0x20" >
+      <value value="0x00" name="Multiple reconfigurations" />
+      <value value="0x20" name="One reconfiguration" />
+    </mask>
+    <mask name="FCKSM" value="0xC0" >
+      <value value="0x00" name="Switching on, monitor on" />
+      <value value="0x40" name="Switching on, monitor off" />
+      <value value="0x80" name="Switching off, monitor off" />
+      <value value="0xC0" name="Switching off, monitor off" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="FWDT" wmask="0xFF" bvalue="0xDF">
+    <mask name="WDTPOST" value="0x0F" >
+      <value value="0x00" name="1:1" />
+      <value value="0x01" name="1:2" />
+      <value value="0x02" name="1:4" />
+      <value value="0x03" name="1:8" />
+      <value value="0x04" name="1:16" />
+      <value value="0x05" name="1:32" />
+      <value value="0x06" name="1:64" />
+      <value value="0x07" name="1:128" />
+      <value value="0x08" name="1:256" />
+      <value value="0x09" name="1:512" />
+      <value value="0x0A" name="1:1024" />
+      <value value="0x0B" name="1:2048" />
+      <value value="0x0C" name="1:4096" />
+      <value value="0x0D" name="1:8192" />
+      <value value="0x0E" name="1:16384" />
+      <value value="0x0F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x10" >
+      <value value="0x00" name="1:32" />
+      <value value="0x10" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x80" >
+      <value value="0x00" name="Software" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="FPOR" wmask="0xFF" bvalue="0x17" >
+    <mask name="FPWRT" value="0x07" >
+      <value value="0x00" name="0" />
+      <value value="0x01" name="2" />
+      <value value="0x02" name="4" />
+      <value value="0x03" name="8" />
+      <value value="0x04" name="16" />
+      <value value="0x05" name="32" />
+      <value value="0x06" name="64" />
+      <value value="0x07" name="128" />
+    </mask>
+    <mask name="ALTI2C" value="0x10" >
+      <value value="0x00" name="ASDA1/ASCL1" />
+      <value value="0x10" name="SDA1/SCL1" />
+    </mask>
+  </config>
+
+  <config offset="0xE" name="FICD" wmask="0xFF" bvalue="0xE3" >
+    <mask name="ICS" value="0x03" >
+      <value value="0x00" name="EMUC3, EMUD3" />
+      <value value="0x01" name="EMUC2, EMUD2" />
+      <value value="0x02" name="EMUC1, EMUD1" />
+      <value value="0x03" name="PGC/EMUC, PGD/EMUD" />
+    </mask>
+    <mask name="JTAGEN" value="0x20" >
+      <value value="0x00" name="Off" />
+      <value value="0x20" name="On" />
+    </mask>
+    <mask name="COE" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" />
+      <value value="0x80" name="Off" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="44" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24HJ256GP206.xml b/src/devices/pic/xml_data/24HJ256GP206.xml
new file mode 100644
index 0000000..d977b29
--- /dev/null
+++ b/src/devices/pic/xml_data/24HJ256GP206.xml
@@ -0,0 +1,199 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24HJ256GP206" document="024691" status="IP" memory_technology="FLASH" architecture="24H" id="0x0071" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="40" vdd_min="3.0" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp" min="3.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="3.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000200" end="0x02ABFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000F" />
+  <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x800FFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FBS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTBS" value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="BSSIZ"  value="0x06" >
+      <value value="0x00" name="8192" />
+      <value value="0x02" name="4096" />
+      <value value="0x04" name="1024" />
+      <value value="0x06" name="0"  />
+    </mask>
+    <mask name="BSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RBSSIZ" value="0xC0" >
+      <value value="0x00" name="1024" />
+      <value value="0x40" name="256"  />
+      <value value="0x80" name="128"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FSS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTSS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="SSSIZ"  value="0x06" >
+      <value value="0x00" name="32768" />
+      <value value="0x02" name="16384"  />
+      <value value="0x04" name="8192"  />
+      <value value="0x06" name="0"   />
+    </mask>
+    <mask name="SSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RSSSIZ" value="0xC0" >
+      <value value="0x00" name="4096" />
+      <value value="0x40" name="2048" />
+      <value value="0x80" name="256"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FGS" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRTGS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="GSSEC" value="0x06" >
+      <value value="0x00" name="High Security" />
+      <value value="0x02" name="High Security" />
+      <value value="0x04" name="Standard Security" />
+      <value value="0x06" name="Off" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FOSCSEL" wmask="0xFF" bvalue="0xA7" >
+    <mask name="FNOSC" value="0x07" >
+      <value value="0x00" name="EXTRC_F" />
+      <value value="0x01" name="INTRC_F_PLL" />
+      <value value="0x02" name="PRIM" />
+      <value value="0x03" name="PRIM_PLL" />
+      <value value="0x04" name="SECOND" />
+      <value value="0x05" name="EXTRC_LP" />
+      <value value="0x06" name="invalid" />
+      <value value="0x07" name="INTRC_F_POST" />
+    </mask>
+    <mask name="TEMP" value="0x20" >
+      <value value="0x00" name="On" />
+      <value value="0x20" name="Off" />
+    </mask>
+    <mask name="IESO" value="0x80" >
+      <value value="0x00" name="Off" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x8" name="FOSC" wmask="0xFF" bvalue="0xC7" >
+    <mask name="POSCMD" value="0x03" >
+      <value value="0x00" name="EC" />
+      <value value="0x01" name="XT" />
+      <value value="0x02" name="HS" />
+      <value value="0x03" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x04" >
+      <value value="0x00" name="IO" />
+      <value value="0x04" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0xC0" >
+      <value value="0x00" name="Switching on, monitor on" />
+      <value value="0x40" name="Switching on, monitor off" />
+      <value value="0x80" name="Switching off, monitor off" />
+      <value value="0xC0" name="Switching off, monitor off" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="FWDT" wmask="0xFF" bvalue="0xDF">
+    <mask name="WDTPOST" value="0x0F" >
+      <value value="0x00" name="1:1" />
+      <value value="0x01" name="1:2" />
+      <value value="0x02" name="1:4" />
+      <value value="0x03" name="1:8" />
+      <value value="0x04" name="1:16" />
+      <value value="0x05" name="1:32" />
+      <value value="0x06" name="1:64" />
+      <value value="0x07" name="1:128" />
+      <value value="0x08" name="1:256" />
+      <value value="0x09" name="1:512" />
+      <value value="0x0A" name="1:1024" />
+      <value value="0x0B" name="1:2048" />
+      <value value="0x0C" name="1:4096" />
+      <value value="0x0D" name="1:8192" />
+      <value value="0x0E" name="1:16384" />
+      <value value="0x0F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x10" >
+      <value value="0x00" name="1:32" />
+      <value value="0x10" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x80" >
+      <value value="0x00" name="Software" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="FPOR" wmask="0xFF" bvalue="0x07" >
+    <mask name="FPWRT" value="0x07" >
+      <value value="0x00" name="0" />
+      <value value="0x01" name="2" />
+      <value value="0x02" name="4" />
+      <value value="0x03" name="8" />
+      <value value="0x04" name="16" />
+      <value value="0x05" name="32" />
+      <value value="0x06" name="64" />
+      <value value="0x07" name="128" />
+    </mask>
+  </config>
+
+  <config offset="0xE" name="FICD" wmask="0xFF" bvalue="0xE3" >
+    <mask name="ICS" value="0x03" >
+      <value value="0x00" name="EMUC3, EMUD3" />
+      <value value="0x01" name="EMUC2, EMUD2" />
+      <value value="0x02" name="EMUC1, EMUD1" />
+      <value value="0x03" name="PGC/EMUC, PGD/EMUD" />
+    </mask>
+    <mask name="JTAGEN" value="0x20" >
+      <value value="0x00" name="Off" />
+      <value value="0x20" name="On" />
+    </mask>
+    <mask name="COE" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" />
+      <value value="0x80" name="Off" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24HJ256GP210.xml b/src/devices/pic/xml_data/24HJ256GP210.xml
new file mode 100644
index 0000000..000bc00
--- /dev/null
+++ b/src/devices/pic/xml_data/24HJ256GP210.xml
@@ -0,0 +1,199 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24HJ256GP210" document="024692" status="IP" memory_technology="FLASH" architecture="24H" id="0x0073" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="40" vdd_min="3.0" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp" min="3.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="3.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000200" end="0x02ABFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000F" />
+  <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x800FFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FBS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTBS" value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="BSSIZ"  value="0x06" >
+      <value value="0x00" name="8192" />
+      <value value="0x02" name="4096" />
+      <value value="0x04" name="1024" />
+      <value value="0x06" name="0"  />
+    </mask>
+    <mask name="BSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RBSSIZ" value="0xC0" >
+      <value value="0x00" name="1024" />
+      <value value="0x40" name="256"  />
+      <value value="0x80" name="128"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FSS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTSS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="SSSIZ"  value="0x06" >
+      <value value="0x00" name="32768" />
+      <value value="0x02" name="16384"  />
+      <value value="0x04" name="8192"  />
+      <value value="0x06" name="0"   />
+    </mask>
+    <mask name="SSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RSSSIZ" value="0xC0" >
+      <value value="0x00" name="4096" />
+      <value value="0x40" name="2048" />
+      <value value="0x80" name="256"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FGS" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRTGS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="GSSEC" value="0x06" >
+      <value value="0x00" name="High Security" />
+      <value value="0x02" name="High Security" />
+      <value value="0x04" name="Standard Security" />
+      <value value="0x06" name="Off" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FOSCSEL" wmask="0xFF" bvalue="0xA7" >
+    <mask name="FNOSC" value="0x07" >
+      <value value="0x00" name="EXTRC_F" />
+      <value value="0x01" name="INTRC_F_PLL" />
+      <value value="0x02" name="PRIM" />
+      <value value="0x03" name="PRIM_PLL" />
+      <value value="0x04" name="SECOND" />
+      <value value="0x05" name="EXTRC_LP" />
+      <value value="0x06" name="invalid" />
+      <value value="0x07" name="INTRC_F_POST" />
+    </mask>
+    <mask name="TEMP" value="0x20" >
+      <value value="0x00" name="On" />
+      <value value="0x20" name="Off" />
+    </mask>
+    <mask name="IESO" value="0x80" >
+      <value value="0x00" name="Off" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x8" name="FOSC" wmask="0xFF" bvalue="0xC7" >
+    <mask name="POSCMD" value="0x03" >
+      <value value="0x00" name="EC" />
+      <value value="0x01" name="XT" />
+      <value value="0x02" name="HS" />
+      <value value="0x03" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x04" >
+      <value value="0x00" name="IO" />
+      <value value="0x04" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0xC0" >
+      <value value="0x00" name="Switching on, monitor on" />
+      <value value="0x40" name="Switching on, monitor off" />
+      <value value="0x80" name="Switching off, monitor off" />
+      <value value="0xC0" name="Switching off, monitor off" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="FWDT" wmask="0xFF" bvalue="0xDF">
+    <mask name="WDTPOST" value="0x0F" >
+      <value value="0x00" name="1:1" />
+      <value value="0x01" name="1:2" />
+      <value value="0x02" name="1:4" />
+      <value value="0x03" name="1:8" />
+      <value value="0x04" name="1:16" />
+      <value value="0x05" name="1:32" />
+      <value value="0x06" name="1:64" />
+      <value value="0x07" name="1:128" />
+      <value value="0x08" name="1:256" />
+      <value value="0x09" name="1:512" />
+      <value value="0x0A" name="1:1024" />
+      <value value="0x0B" name="1:2048" />
+      <value value="0x0C" name="1:4096" />
+      <value value="0x0D" name="1:8192" />
+      <value value="0x0E" name="1:16384" />
+      <value value="0x0F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x10" >
+      <value value="0x00" name="1:32" />
+      <value value="0x10" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x80" >
+      <value value="0x00" name="Software" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="FPOR" wmask="0xFF" bvalue="0x07" >
+    <mask name="FPWRT" value="0x07" >
+      <value value="0x00" name="0" />
+      <value value="0x01" name="2" />
+      <value value="0x02" name="4" />
+      <value value="0x03" name="8" />
+      <value value="0x04" name="16" />
+      <value value="0x05" name="32" />
+      <value value="0x06" name="64" />
+      <value value="0x07" name="128" />
+    </mask>
+  </config>
+
+  <config offset="0xE" name="FICD" wmask="0xFF" bvalue="0xE3" >
+    <mask name="ICS" value="0x03" >
+      <value value="0x00" name="EMUC3, EMUD3" />
+      <value value="0x01" name="EMUC2, EMUD2" />
+      <value value="0x02" name="EMUC1, EMUD1" />
+      <value value="0x03" name="PGC/EMUC, PGD/EMUD" />
+    </mask>
+    <mask name="JTAGEN" value="0x20" >
+      <value value="0x00" name="Off" />
+      <value value="0x20" name="On" />
+    </mask>
+    <mask name="COE" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" />
+      <value value="0x80" name="Off" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="100" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24HJ256GP610.xml b/src/devices/pic/xml_data/24HJ256GP610.xml
new file mode 100644
index 0000000..4c1e714
--- /dev/null
+++ b/src/devices/pic/xml_data/24HJ256GP610.xml
@@ -0,0 +1,199 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24HJ256GP610" document="024693" status="IP" memory_technology="FLASH" architecture="24H" id="0x007B" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="40" vdd_min="3.0" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp" min="3.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="3.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000200" end="0x02ABFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000F" />
+  <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x800FFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FBS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTBS" value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="BSSIZ"  value="0x06" >
+      <value value="0x00" name="8192" />
+      <value value="0x02" name="4096" />
+      <value value="0x04" name="1024" />
+      <value value="0x06" name="0"  />
+    </mask>
+    <mask name="BSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RBSSIZ" value="0xC0" >
+      <value value="0x00" name="1024" />
+      <value value="0x40" name="256"  />
+      <value value="0x80" name="128"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FSS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTSS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="SSSIZ"  value="0x06" >
+      <value value="0x00" name="32768" />
+      <value value="0x02" name="16384"  />
+      <value value="0x04" name="8192"  />
+      <value value="0x06" name="0"   />
+    </mask>
+    <mask name="SSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RSSSIZ" value="0xC0" >
+      <value value="0x00" name="4096" />
+      <value value="0x40" name="2048" />
+      <value value="0x80" name="256"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FGS" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRTGS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="GSSEC" value="0x06" >
+      <value value="0x00" name="High Security" />
+      <value value="0x02" name="High Security" />
+      <value value="0x04" name="Standard Security" />
+      <value value="0x06" name="Off" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FOSCSEL" wmask="0xFF" bvalue="0xA7" >
+    <mask name="FNOSC" value="0x07" >
+      <value value="0x00" name="EXTRC_F" />
+      <value value="0x01" name="INTRC_F_PLL" />
+      <value value="0x02" name="PRIM" />
+      <value value="0x03" name="PRIM_PLL" />
+      <value value="0x04" name="SECOND" />
+      <value value="0x05" name="EXTRC_LP" />
+      <value value="0x06" name="invalid" />
+      <value value="0x07" name="INTRC_F_POST" />
+    </mask>
+    <mask name="TEMP" value="0x20" >
+      <value value="0x00" name="On" />
+      <value value="0x20" name="Off" />
+    </mask>
+    <mask name="IESO" value="0x80" >
+      <value value="0x00" name="Off" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x8" name="FOSC" wmask="0xFF" bvalue="0xC7" >
+    <mask name="POSCMD" value="0x03" >
+      <value value="0x00" name="EC" />
+      <value value="0x01" name="XT" />
+      <value value="0x02" name="HS" />
+      <value value="0x03" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x04" >
+      <value value="0x00" name="IO" />
+      <value value="0x04" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0xC0" >
+      <value value="0x00" name="Switching on, monitor on" />
+      <value value="0x40" name="Switching on, monitor off" />
+      <value value="0x80" name="Switching off, monitor off" />
+      <value value="0xC0" name="Switching off, monitor off" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="FWDT" wmask="0xFF" bvalue="0xDF">
+    <mask name="WDTPOST" value="0x0F" >
+      <value value="0x00" name="1:1" />
+      <value value="0x01" name="1:2" />
+      <value value="0x02" name="1:4" />
+      <value value="0x03" name="1:8" />
+      <value value="0x04" name="1:16" />
+      <value value="0x05" name="1:32" />
+      <value value="0x06" name="1:64" />
+      <value value="0x07" name="1:128" />
+      <value value="0x08" name="1:256" />
+      <value value="0x09" name="1:512" />
+      <value value="0x0A" name="1:1024" />
+      <value value="0x0B" name="1:2048" />
+      <value value="0x0C" name="1:4096" />
+      <value value="0x0D" name="1:8192" />
+      <value value="0x0E" name="1:16384" />
+      <value value="0x0F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x10" >
+      <value value="0x00" name="1:32" />
+      <value value="0x10" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x80" >
+      <value value="0x00" name="Software" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="FPOR" wmask="0xFF" bvalue="0x07" >
+    <mask name="FPWRT" value="0x07" >
+      <value value="0x00" name="0" />
+      <value value="0x01" name="2" />
+      <value value="0x02" name="4" />
+      <value value="0x03" name="8" />
+      <value value="0x04" name="16" />
+      <value value="0x05" name="32" />
+      <value value="0x06" name="64" />
+      <value value="0x07" name="128" />
+    </mask>
+  </config>
+
+  <config offset="0xE" name="FICD" wmask="0xFF" bvalue="0xE3" >
+    <mask name="ICS" value="0x03" >
+      <value value="0x00" name="EMUC3, EMUD3" />
+      <value value="0x01" name="EMUC2, EMUD2" />
+      <value value="0x02" name="EMUC1, EMUD1" />
+      <value value="0x03" name="PGC/EMUC, PGD/EMUD" />
+    </mask>
+    <mask name="JTAGEN" value="0x20" >
+      <value value="0x00" name="Off" />
+      <value value="0x20" name="On" />
+    </mask>
+    <mask name="COE" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" />
+      <value value="0x80" name="Off" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="100" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24HJ32GP202.xml b/src/devices/pic/xml_data/24HJ32GP202.xml
new file mode 100644
index 0000000..d93607a
--- /dev/null
+++ b/src/devices/pic/xml_data/24HJ32GP202.xml
@@ -0,0 +1,180 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24HJ32GP202" status="IP" memory_technology="FLASH" architecture="24H" id="0x0F1D" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="530328" datasheet="70289" progsheet="70152" erratas="80339" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="40" vdd_min="3.0" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp" min="3.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="3.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"              start="0x000200" end="0x0057FF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000F" />
+  <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x800FFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FBS" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRTBS" value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="BSSIZ"  value="0x06" >
+      <value value="0x00" name="1792" />
+      <value value="0x02" name="768" />
+      <value value="0x04" name="256" />
+      <value value="0x06" name="0"  />
+    </mask>
+    <mask name="BSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="reserved" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x4" name="FGS" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRTGS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="GSSEC" value="0x06" >
+      <value value="0x00" name="High Security" />
+      <value value="0x02" name="High Security" />
+      <value value="0x04" name="Standard Security" />
+      <value value="0x06" name="Off" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FOSCSEL" wmask="0xFF" bvalue="0x87" >
+    <mask name="FNOSC" value="0x07" >
+      <value value="0x00" name="EXTRC_F" />
+      <value value="0x01" name="INTRC_F_PLL" />
+      <value value="0x02" name="PRIM" />
+      <value value="0x03" name="PRIM_PLL" />
+      <value value="0x04" name="SECOND" />
+      <value value="0x05" name="EXTRC_LP" />
+      <value value="0x06" name="invalid" />
+      <value value="0x07" name="INTRC_F_POST" />
+    </mask>
+    <mask name="IESO" value="0x80" >
+      <value value="0x00" name="Off" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x8" name="FOSC" wmask="0xFF" bvalue="0xC7" >
+    <mask name="POSCMD" value="0x03" >
+      <value value="0x00" name="EC" />
+      <value value="0x01" name="XT" />
+      <value value="0x02" name="HS" />
+      <value value="0x03" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x04" >
+      <value value="0x00" name="IO" />
+      <value value="0x04" name="Clock" />
+    </mask>
+    <mask name="IOL1WAY" value="0x20" >
+      <value value="0x00" name="Multiple reconfigurations" />
+      <value value="0x20" name="One reconfiguration" />
+    </mask>
+    <mask name="FCKSM" value="0xC0" >
+      <value value="0x00" name="Switching on, monitor on" />
+      <value value="0x40" name="Switching on, monitor off" />
+      <value value="0x80" name="Switching off, monitor off" />
+      <value value="0xC0" name="Switching off, monitor off" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="FWDT" wmask="0xFF" bvalue="0xDF">
+    <mask name="WDTPOST" value="0x0F" >
+      <value value="0x00" name="1:1" />
+      <value value="0x01" name="1:2" />
+      <value value="0x02" name="1:4" />
+      <value value="0x03" name="1:8" />
+      <value value="0x04" name="1:16" />
+      <value value="0x05" name="1:32" />
+      <value value="0x06" name="1:64" />
+      <value value="0x07" name="1:128" />
+      <value value="0x08" name="1:256" />
+      <value value="0x09" name="1:512" />
+      <value value="0x0A" name="1:1024" />
+      <value value="0x0B" name="1:2048" />
+      <value value="0x0C" name="1:4096" />
+      <value value="0x0D" name="1:8192" />
+      <value value="0x0E" name="1:16384" />
+      <value value="0x0F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x10" >
+      <value value="0x00" name="1:32" />
+      <value value="0x10" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x80" >
+      <value value="0x00" name="Software" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="FPOR" wmask="0xFF" bvalue="0x17" >
+    <mask name="FPWRT" value="0x07" >
+      <value value="0x00" name="0" />
+      <value value="0x01" name="2" />
+      <value value="0x02" name="4" />
+      <value value="0x03" name="8" />
+      <value value="0x04" name="16" />
+      <value value="0x05" name="32" />
+      <value value="0x06" name="64" />
+      <value value="0x07" name="128" />
+    </mask>
+    <mask name="ALTI2C" value="0x10" >
+      <value value="0x00" name="ASDA1/ASCL1" />
+      <value value="0x10" name="SDA1/SCL1" />
+    </mask>
+  </config>
+
+  <config offset="0xE" name="FICD" wmask="0xFF" bvalue="0xE3" >
+    <mask name="ICS" value="0x03" >
+      <value value="0x00" name="EMUC3, EMUD3" />
+      <value value="0x01" name="EMUC2, EMUD2" />
+      <value value="0x02" name="EMUC1, EMUD1" />
+      <value value="0x03" name="PGC/EMUC, PGD/EMUD" />
+    </mask>
+    <mask name="JTAGEN" value="0x20" >
+      <value value="0x00" name="Off" />
+      <value value="0x20" name="On" />
+    </mask>
+    <mask name="COE" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" />
+      <value value="0x80" name="Off" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic qfn" nb_pins="28" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24HJ32GP204.xml b/src/devices/pic/xml_data/24HJ32GP204.xml
new file mode 100644
index 0000000..5a9e126
--- /dev/null
+++ b/src/devices/pic/xml_data/24HJ32GP204.xml
@@ -0,0 +1,180 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24HJ32GP204" status="IP" memory_technology="FLASH" architecture="24H" id="0x0F1F" >
+
+<!--* Documents ************************************************************-->
+  <documents webpage="530271" datasheet="70289" progsheet="70152" erratas="80339" />
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="40" vdd_min="3.0" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp" min="3.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="3.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"              start="0x000200" end="0x0057FF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000F" />
+  <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x800FFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FBS" wmask="0xFF" bvalue="0x0F" >
+    <mask name="WRTBS" value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="BSSIZ"  value="0x06" >
+      <value value="0x00" name="1792" />
+      <value value="0x02" name="768" />
+      <value value="0x04" name="256" />
+      <value value="0x06" name="0"  />
+    </mask>
+    <mask name="BSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="reserved" wmask="0xFF" bvalue="0x00" >
+  </config>
+
+  <config offset="0x4" name="FGS" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRTGS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="GSSEC" value="0x06" >
+      <value value="0x00" name="High Security" />
+      <value value="0x02" name="High Security" />
+      <value value="0x04" name="Standard Security" />
+      <value value="0x06" name="Off" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FOSCSEL" wmask="0xFF" bvalue="0x87" >
+    <mask name="FNOSC" value="0x07" >
+      <value value="0x00" name="EXTRC_F" />
+      <value value="0x01" name="INTRC_F_PLL" />
+      <value value="0x02" name="PRIM" />
+      <value value="0x03" name="PRIM_PLL" />
+      <value value="0x04" name="SECOND" />
+      <value value="0x05" name="EXTRC_LP" />
+      <value value="0x06" name="invalid" />
+      <value value="0x07" name="INTRC_F_POST" />
+    </mask>
+    <mask name="IESO" value="0x80" >
+      <value value="0x00" name="Off" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x8" name="FOSC" wmask="0xFF" bvalue="0xC7" >
+    <mask name="POSCMD" value="0x03" >
+      <value value="0x00" name="EC" />
+      <value value="0x01" name="XT" />
+      <value value="0x02" name="HS" />
+      <value value="0x03" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x04" >
+      <value value="0x00" name="IO" />
+      <value value="0x04" name="Clock" />
+    </mask>
+    <mask name="IOL1WAY" value="0x20" >
+      <value value="0x00" name="Multiple reconfigurations" />
+      <value value="0x20" name="One reconfiguration" />
+    </mask>
+    <mask name="FCKSM" value="0xC0" >
+      <value value="0x00" name="Switching on, monitor on" />
+      <value value="0x40" name="Switching on, monitor off" />
+      <value value="0x80" name="Switching off, monitor off" />
+      <value value="0xC0" name="Switching off, monitor off" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="FWDT" wmask="0xFF" bvalue="0xDF">
+    <mask name="WDTPOST" value="0x0F" >
+      <value value="0x00" name="1:1" />
+      <value value="0x01" name="1:2" />
+      <value value="0x02" name="1:4" />
+      <value value="0x03" name="1:8" />
+      <value value="0x04" name="1:16" />
+      <value value="0x05" name="1:32" />
+      <value value="0x06" name="1:64" />
+      <value value="0x07" name="1:128" />
+      <value value="0x08" name="1:256" />
+      <value value="0x09" name="1:512" />
+      <value value="0x0A" name="1:1024" />
+      <value value="0x0B" name="1:2048" />
+      <value value="0x0C" name="1:4096" />
+      <value value="0x0D" name="1:8192" />
+      <value value="0x0E" name="1:16384" />
+      <value value="0x0F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x10" >
+      <value value="0x00" name="1:32" />
+      <value value="0x10" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x80" >
+      <value value="0x00" name="Software" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="FPOR" wmask="0xFF" bvalue="0x17" >
+    <mask name="FPWRT" value="0x07" >
+      <value value="0x00" name="0" />
+      <value value="0x01" name="2" />
+      <value value="0x02" name="4" />
+      <value value="0x03" name="8" />
+      <value value="0x04" name="16" />
+      <value value="0x05" name="32" />
+      <value value="0x06" name="64" />
+      <value value="0x07" name="128" />
+    </mask>
+    <mask name="ALTI2C" value="0x10" >
+      <value value="0x00" name="ASDA1/ASCL1" />
+      <value value="0x10" name="SDA1/SCL1" />
+    </mask>
+  </config>
+
+  <config offset="0xE" name="FICD" wmask="0xFF" bvalue="0xE3" >
+    <mask name="ICS" value="0x03" >
+      <value value="0x00" name="EMUC3, EMUD3" />
+      <value value="0x01" name="EMUC2, EMUD2" />
+      <value value="0x02" name="EMUC1, EMUD1" />
+      <value value="0x03" name="PGC/EMUC, PGD/EMUD" />
+    </mask>
+    <mask name="JTAGEN" value="0x20" >
+      <value value="0x00" name="Off" />
+      <value value="0x20" name="On" />
+    </mask>
+    <mask name="COE" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" />
+      <value value="0x80" name="Off" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="44" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24HJ64GP206.xml b/src/devices/pic/xml_data/24HJ64GP206.xml
new file mode 100644
index 0000000..a3266fa
--- /dev/null
+++ b/src/devices/pic/xml_data/24HJ64GP206.xml
@@ -0,0 +1,199 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24HJ64GP206" document="024680" status="IP" memory_technology="FLASH" architecture="24H" id="0x0041" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="40" vdd_min="3.0" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp" min="3.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="3.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000200" end="0x00ABFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000F" />
+  <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x800FFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FBS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTBS" value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="BSSIZ"  value="0x06" >
+      <value value="0x00" name="8192" />
+      <value value="0x02" name="4096" />
+      <value value="0x04" name="1024" />
+      <value value="0x06" name="0"  />
+    </mask>
+    <mask name="BSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RBSSIZ" value="0xC0" >
+      <value value="0x00" name="1024" />
+      <value value="0x40" name="256"  />
+      <value value="0x80" name="128"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FSS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTSS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="SSSIZ"  value="0x06" >
+      <value value="0x00" name="16384" />
+      <value value="0x02" name="8192"  />
+      <value value="0x04" name="4096"  />
+      <value value="0x06" name="0"   />
+    </mask>
+    <mask name="SSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RSSSIZ" value="0xC0" >
+      <value value="0x00" name="4096" />
+      <value value="0x40" name="2048" />
+      <value value="0x80" name="256"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FGS" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRTGS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="GSSEC" value="0x06" >
+      <value value="0x00" name="High Security" />
+      <value value="0x02" name="High Security" />
+      <value value="0x04" name="Standard Security" />
+      <value value="0x06" name="Off" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FOSCSEL" wmask="0xFF" bvalue="0xA7" >
+    <mask name="FNOSC" value="0x07" >
+      <value value="0x00" name="EXTRC_F" />
+      <value value="0x01" name="INTRC_F_PLL" />
+      <value value="0x02" name="PRIM" />
+      <value value="0x03" name="PRIM_PLL" />
+      <value value="0x04" name="SECOND" />
+      <value value="0x05" name="EXTRC_LP" />
+      <value value="0x06" name="invalid" />
+      <value value="0x07" name="INTRC_F_POST" />
+    </mask>
+    <mask name="TEMP" value="0x20" >
+      <value value="0x00" name="On" />
+      <value value="0x20" name="Off" />
+    </mask>
+    <mask name="IESO" value="0x80" >
+      <value value="0x00" name="Off" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x8" name="FOSC" wmask="0xFF" bvalue="0xC7" >
+    <mask name="POSCMD" value="0x03" >
+      <value value="0x00" name="EC" />
+      <value value="0x01" name="XT" />
+      <value value="0x02" name="HS" />
+      <value value="0x03" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x04" >
+      <value value="0x00" name="IO" />
+      <value value="0x04" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0xC0" >
+      <value value="0x00" name="Switching on, monitor on" />
+      <value value="0x40" name="Switching on, monitor off" />
+      <value value="0x80" name="Switching off, monitor off" />
+      <value value="0xC0" name="Switching off, monitor off" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="FWDT" wmask="0xFF" bvalue="0xDF">
+    <mask name="WDTPOST" value="0x0F" >
+      <value value="0x00" name="1:1" />
+      <value value="0x01" name="1:2" />
+      <value value="0x02" name="1:4" />
+      <value value="0x03" name="1:8" />
+      <value value="0x04" name="1:16" />
+      <value value="0x05" name="1:32" />
+      <value value="0x06" name="1:64" />
+      <value value="0x07" name="1:128" />
+      <value value="0x08" name="1:256" />
+      <value value="0x09" name="1:512" />
+      <value value="0x0A" name="1:1024" />
+      <value value="0x0B" name="1:2048" />
+      <value value="0x0C" name="1:4096" />
+      <value value="0x0D" name="1:8192" />
+      <value value="0x0E" name="1:16384" />
+      <value value="0x0F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x10" >
+      <value value="0x00" name="1:32" />
+      <value value="0x10" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x80" >
+      <value value="0x00" name="Software" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="FPOR" wmask="0xFF" bvalue="0x07" >
+    <mask name="FPWRT" value="0x07" >
+      <value value="0x00" name="0" />
+      <value value="0x01" name="2" />
+      <value value="0x02" name="4" />
+      <value value="0x03" name="8" />
+      <value value="0x04" name="16" />
+      <value value="0x05" name="32" />
+      <value value="0x06" name="64" />
+      <value value="0x07" name="128" />
+    </mask>
+  </config>
+
+  <config offset="0xE" name="FICD" wmask="0xFF" bvalue="0xE3" >
+    <mask name="ICS" value="0x03" >
+      <value value="0x00" name="EMUC3, EMUD3" />
+      <value value="0x01" name="EMUC2, EMUD2" />
+      <value value="0x02" name="EMUC1, EMUD1" />
+      <value value="0x03" name="PGC/EMUC, PGD/EMUD" />
+    </mask>
+    <mask name="JTAGEN" value="0x20" >
+      <value value="0x00" name="Off" />
+      <value value="0x20" name="On" />
+    </mask>
+    <mask name="COE" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" />
+      <value value="0x80" name="Off" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24HJ64GP210.xml b/src/devices/pic/xml_data/24HJ64GP210.xml
new file mode 100644
index 0000000..630a12a
--- /dev/null
+++ b/src/devices/pic/xml_data/24HJ64GP210.xml
@@ -0,0 +1,199 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24HJ64GP210" document="024681" status="IP" memory_technology="FLASH" architecture="24H" id="0x0047" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="40" vdd_min="3.0" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp" min="3.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="3.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000200" end="0x00ABFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000F" />
+  <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x800FFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FBS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTBS" value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="BSSIZ"  value="0x06" >
+      <value value="0x00" name="8192" />
+      <value value="0x02" name="4096" />
+      <value value="0x04" name="1024" />
+      <value value="0x06" name="0"  />
+    </mask>
+    <mask name="BSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RBSSIZ" value="0xC0" >
+      <value value="0x00" name="1024" />
+      <value value="0x40" name="256"  />
+      <value value="0x80" name="128"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FSS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTSS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="SSSIZ"  value="0x06" >
+      <value value="0x00" name="16384" />
+      <value value="0x02" name="8192"  />
+      <value value="0x04" name="4096"  />
+      <value value="0x06" name="0"   />
+    </mask>
+    <mask name="SSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RSSSIZ" value="0xC0" >
+      <value value="0x00" name="4096" />
+      <value value="0x40" name="2048" />
+      <value value="0x80" name="256"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FGS" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRTGS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="GSSEC" value="0x06" >
+      <value value="0x00" name="High Security" />
+      <value value="0x02" name="High Security" />
+      <value value="0x04" name="Standard Security" />
+      <value value="0x06" name="Off" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FOSCSEL" wmask="0xFF" bvalue="0xA7" >
+    <mask name="FNOSC" value="0x07" >
+      <value value="0x00" name="EXTRC_F" />
+      <value value="0x01" name="INTRC_F_PLL" />
+      <value value="0x02" name="PRIM" />
+      <value value="0x03" name="PRIM_PLL" />
+      <value value="0x04" name="SECOND" />
+      <value value="0x05" name="EXTRC_LP" />
+      <value value="0x06" name="invalid" />
+      <value value="0x07" name="INTRC_F_POST" />
+    </mask>
+    <mask name="TEMP" value="0x20" >
+      <value value="0x00" name="On" />
+      <value value="0x20" name="Off" />
+    </mask>
+    <mask name="IESO" value="0x80" >
+      <value value="0x00" name="Off" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x8" name="FOSC" wmask="0xFF" bvalue="0xC7" >
+    <mask name="POSCMD" value="0x03" >
+      <value value="0x00" name="EC" />
+      <value value="0x01" name="XT" />
+      <value value="0x02" name="HS" />
+      <value value="0x03" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x04" >
+      <value value="0x00" name="IO" />
+      <value value="0x04" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0xC0" >
+      <value value="0x00" name="Switching on, monitor on" />
+      <value value="0x40" name="Switching on, monitor off" />
+      <value value="0x80" name="Switching off, monitor off" />
+      <value value="0xC0" name="Switching off, monitor off" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="FWDT" wmask="0xFF" bvalue="0xDF">
+    <mask name="WDTPOST" value="0x0F" >
+      <value value="0x00" name="1:1" />
+      <value value="0x01" name="1:2" />
+      <value value="0x02" name="1:4" />
+      <value value="0x03" name="1:8" />
+      <value value="0x04" name="1:16" />
+      <value value="0x05" name="1:32" />
+      <value value="0x06" name="1:64" />
+      <value value="0x07" name="1:128" />
+      <value value="0x08" name="1:256" />
+      <value value="0x09" name="1:512" />
+      <value value="0x0A" name="1:1024" />
+      <value value="0x0B" name="1:2048" />
+      <value value="0x0C" name="1:4096" />
+      <value value="0x0D" name="1:8192" />
+      <value value="0x0E" name="1:16384" />
+      <value value="0x0F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x10" >
+      <value value="0x00" name="1:32" />
+      <value value="0x10" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x80" >
+      <value value="0x00" name="Software" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="FPOR" wmask="0xFF" bvalue="0x07" >
+    <mask name="FPWRT" value="0x07" >
+      <value value="0x00" name="0" />
+      <value value="0x01" name="2" />
+      <value value="0x02" name="4" />
+      <value value="0x03" name="8" />
+      <value value="0x04" name="16" />
+      <value value="0x05" name="32" />
+      <value value="0x06" name="64" />
+      <value value="0x07" name="128" />
+    </mask>
+  </config>
+
+  <config offset="0xE" name="FICD" wmask="0xFF" bvalue="0xE3" >
+    <mask name="ICS" value="0x03" >
+      <value value="0x00" name="EMUC3, EMUD3" />
+      <value value="0x01" name="EMUC2, EMUD2" />
+      <value value="0x02" name="EMUC1, EMUD1" />
+      <value value="0x03" name="PGC/EMUC, PGD/EMUD" />
+    </mask>
+    <mask name="JTAGEN" value="0x20" >
+      <value value="0x00" name="Off" />
+      <value value="0x20" name="On" />
+    </mask>
+    <mask name="COE" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" />
+      <value value="0x80" name="Off" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="100" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24HJ64GP506.xml b/src/devices/pic/xml_data/24HJ64GP506.xml
new file mode 100644
index 0000000..372c767
--- /dev/null
+++ b/src/devices/pic/xml_data/24HJ64GP506.xml
@@ -0,0 +1,199 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24HJ64GP506" document="024682" status="IP" memory_technology="FLASH" architecture="24H" id="0x0049" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="40" vdd_min="3.0" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp" min="3.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="3.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000200" end="0x00ABFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000F" />
+  <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x800FFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FBS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTBS" value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="BSSIZ"  value="0x06" >
+      <value value="0x00" name="8192" />
+      <value value="0x02" name="4096" />
+      <value value="0x04" name="1024" />
+      <value value="0x06" name="0"  />
+    </mask>
+    <mask name="BSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RBSSIZ" value="0xC0" >
+      <value value="0x00" name="1024" />
+      <value value="0x40" name="256"  />
+      <value value="0x80" name="128"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FSS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTSS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="SSSIZ"  value="0x06" >
+      <value value="0x00" name="16384" />
+      <value value="0x02" name="8192"  />
+      <value value="0x04" name="4096"  />
+      <value value="0x06" name="0"   />
+    </mask>
+    <mask name="SSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RSSSIZ" value="0xC0" >
+      <value value="0x00" name="4096" />
+      <value value="0x40" name="2048" />
+      <value value="0x80" name="256"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FGS" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRTGS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="GSSEC" value="0x06" >
+      <value value="0x00" name="High Security" />
+      <value value="0x02" name="High Security" />
+      <value value="0x04" name="Standard Security" />
+      <value value="0x06" name="Off" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FOSCSEL" wmask="0xFF" bvalue="0xA7" >
+    <mask name="FNOSC" value="0x07" >
+      <value value="0x00" name="EXTRC_F" />
+      <value value="0x01" name="INTRC_F_PLL" />
+      <value value="0x02" name="PRIM" />
+      <value value="0x03" name="PRIM_PLL" />
+      <value value="0x04" name="SECOND" />
+      <value value="0x05" name="EXTRC_LP" />
+      <value value="0x06" name="invalid" />
+      <value value="0x07" name="INTRC_F_POST" />
+    </mask>
+    <mask name="TEMP" value="0x20" >
+      <value value="0x00" name="On" />
+      <value value="0x20" name="Off" />
+    </mask>
+    <mask name="IESO" value="0x80" >
+      <value value="0x00" name="Off" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x8" name="FOSC" wmask="0xFF" bvalue="0xC7" >
+    <mask name="POSCMD" value="0x03" >
+      <value value="0x00" name="EC" />
+      <value value="0x01" name="XT" />
+      <value value="0x02" name="HS" />
+      <value value="0x03" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x04" >
+      <value value="0x00" name="IO" />
+      <value value="0x04" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0xC0" >
+      <value value="0x00" name="Switching on, monitor on" />
+      <value value="0x40" name="Switching on, monitor off" />
+      <value value="0x80" name="Switching off, monitor off" />
+      <value value="0xC0" name="Switching off, monitor off" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="FWDT" wmask="0xFF" bvalue="0xDF">
+    <mask name="WDTPOST" value="0x0F" >
+      <value value="0x00" name="1:1" />
+      <value value="0x01" name="1:2" />
+      <value value="0x02" name="1:4" />
+      <value value="0x03" name="1:8" />
+      <value value="0x04" name="1:16" />
+      <value value="0x05" name="1:32" />
+      <value value="0x06" name="1:64" />
+      <value value="0x07" name="1:128" />
+      <value value="0x08" name="1:256" />
+      <value value="0x09" name="1:512" />
+      <value value="0x0A" name="1:1024" />
+      <value value="0x0B" name="1:2048" />
+      <value value="0x0C" name="1:4096" />
+      <value value="0x0D" name="1:8192" />
+      <value value="0x0E" name="1:16384" />
+      <value value="0x0F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x10" >
+      <value value="0x00" name="1:32" />
+      <value value="0x10" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x80" >
+      <value value="0x00" name="Software" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="FPOR" wmask="0xFF" bvalue="0x07" >
+    <mask name="FPWRT" value="0x07" >
+      <value value="0x00" name="0" />
+      <value value="0x01" name="2" />
+      <value value="0x02" name="4" />
+      <value value="0x03" name="8" />
+      <value value="0x04" name="16" />
+      <value value="0x05" name="32" />
+      <value value="0x06" name="64" />
+      <value value="0x07" name="128" />
+    </mask>
+  </config>
+
+  <config offset="0xE" name="FICD" wmask="0xFF" bvalue="0xE3" >
+    <mask name="ICS" value="0x03" >
+      <value value="0x00" name="EMUC3, EMUD3" />
+      <value value="0x01" name="EMUC2, EMUD2" />
+      <value value="0x02" name="EMUC1, EMUD1" />
+      <value value="0x03" name="PGC/EMUC, PGD/EMUD" />
+    </mask>
+    <mask name="JTAGEN" value="0x20" >
+      <value value="0x00" name="Off" />
+      <value value="0x20" name="On" />
+    </mask>
+    <mask name="COE" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" />
+      <value value="0x80" name="Off" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/24HJ64GP510.xml b/src/devices/pic/xml_data/24HJ64GP510.xml
new file mode 100644
index 0000000..8711793
--- /dev/null
+++ b/src/devices/pic/xml_data/24HJ64GP510.xml
@@ -0,0 +1,199 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                 *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="24HJ64GP510" document="024684" status="IP" memory_technology="FLASH" architecture="24H" id="0x004B" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="40" vdd_min="3.0" vdd_max="3.6" />
+  </frequency_range>
+
+  <voltages name="vpp" min="3.0" max="3.6" nominal="3.3" />
+  <voltages name="vdd_prog" min="3.0" max="3.6" nominal="3.3" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000200" end="0x00ABFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000F" />
+  <memory name="user_ids"          start="0xF80010" end="0xF80018" rmask="0xFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x800FFF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FBS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTBS" value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="BSSIZ"  value="0x06" >
+      <value value="0x00" name="8192" />
+      <value value="0x02" name="4096" />
+      <value value="0x04" name="1024" />
+      <value value="0x06" name="0"  />
+    </mask>
+    <mask name="BSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RBSSIZ" value="0xC0" >
+      <value value="0x00" name="1024" />
+      <value value="0x40" name="256"  />
+      <value value="0x80" name="128"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FSS" wmask="0xFF" bvalue="0xCF" >
+    <mask name="WRTSS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="SSSIZ"  value="0x06" >
+      <value value="0x00" name="16384" />
+      <value value="0x02" name="8192"  />
+      <value value="0x04" name="4096"  />
+      <value value="0x06" name="0"   />
+    </mask>
+    <mask name="SSSEC" value="0x08" >
+      <value value="0x00" name="High Security"     />
+      <value value="0x08" name="Standard Security" />
+    </mask>
+    <mask name="RSSSIZ" value="0xC0" >
+      <value value="0x00" name="4096" />
+      <value value="0x40" name="2048" />
+      <value value="0x80" name="256"  />
+      <value value="0xC0" name="0"    />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FGS" wmask="0xFF" bvalue="0x07" >
+    <mask name="WRTGS"  value="0x01" >
+      <value value="0x00" name="All"  />
+      <value value="0x01" name="Off" />
+    </mask>
+    <mask name="GSSEC" value="0x06" >
+      <value value="0x00" name="High Security" />
+      <value value="0x02" name="High Security" />
+      <value value="0x04" name="Standard Security" />
+      <value value="0x06" name="Off" />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FOSCSEL" wmask="0xFF" bvalue="0xA7" >
+    <mask name="FNOSC" value="0x07" >
+      <value value="0x00" name="EXTRC_F" />
+      <value value="0x01" name="INTRC_F_PLL" />
+      <value value="0x02" name="PRIM" />
+      <value value="0x03" name="PRIM_PLL" />
+      <value value="0x04" name="SECOND" />
+      <value value="0x05" name="EXTRC_LP" />
+      <value value="0x06" name="invalid" />
+      <value value="0x07" name="INTRC_F_POST" />
+    </mask>
+    <mask name="TEMP" value="0x20" >
+      <value value="0x00" name="On" />
+      <value value="0x20" name="Off" />
+    </mask>
+    <mask name="IESO" value="0x80" >
+      <value value="0x00" name="Off" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0x8" name="FOSC" wmask="0xFF" bvalue="0xC7" >
+    <mask name="POSCMD" value="0x03" >
+      <value value="0x00" name="EC" />
+      <value value="0x01" name="XT" />
+      <value value="0x02" name="HS" />
+      <value value="0x03" name="Off" />
+    </mask>
+    <mask name="OSCIOFNC" value="0x04" >
+      <value value="0x00" name="IO" />
+      <value value="0x04" name="Clock" />
+    </mask>
+    <mask name="FCKSM" value="0xC0" >
+      <value value="0x00" name="Switching on, monitor on" />
+      <value value="0x40" name="Switching on, monitor off" />
+      <value value="0x80" name="Switching off, monitor off" />
+      <value value="0xC0" name="Switching off, monitor off" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="FWDT" wmask="0xFF" bvalue="0xDF">
+    <mask name="WDTPOST" value="0x0F" >
+      <value value="0x00" name="1:1" />
+      <value value="0x01" name="1:2" />
+      <value value="0x02" name="1:4" />
+      <value value="0x03" name="1:8" />
+      <value value="0x04" name="1:16" />
+      <value value="0x05" name="1:32" />
+      <value value="0x06" name="1:64" />
+      <value value="0x07" name="1:128" />
+      <value value="0x08" name="1:256" />
+      <value value="0x09" name="1:512" />
+      <value value="0x0A" name="1:1024" />
+      <value value="0x0B" name="1:2048" />
+      <value value="0x0C" name="1:4096" />
+      <value value="0x0D" name="1:8192" />
+      <value value="0x0E" name="1:16384" />
+      <value value="0x0F" name="1:32768" />
+    </mask>
+    <mask name="WDTPRE" value="0x10" >
+      <value value="0x00" name="1:32" />
+      <value value="0x10" name="1:128" />
+    </mask>
+    <mask name="WINDIS" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="FWDTEN" value="0x80" >
+      <value value="0x00" name="Software" />
+      <value value="0x80" name="On" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="FPOR" wmask="0xFF" bvalue="0x07" >
+    <mask name="FPWRT" value="0x07" >
+      <value value="0x00" name="0" />
+      <value value="0x01" name="2" />
+      <value value="0x02" name="4" />
+      <value value="0x03" name="8" />
+      <value value="0x04" name="16" />
+      <value value="0x05" name="32" />
+      <value value="0x06" name="64" />
+      <value value="0x07" name="128" />
+    </mask>
+  </config>
+
+  <config offset="0xE" name="FICD" wmask="0xFF" bvalue="0xE3" >
+    <mask name="ICS" value="0x03" >
+      <value value="0x00" name="EMUC3, EMUD3" />
+      <value value="0x01" name="EMUC2, EMUD2" />
+      <value value="0x02" name="EMUC1, EMUD1" />
+      <value value="0x03" name="PGC/EMUC, PGD/EMUD" />
+    </mask>
+    <mask name="JTAGEN" value="0x20" >
+      <value value="0x00" name="Off" />
+      <value value="0x20" name="On" />
+    </mask>
+    <mask name="COE" value="0x40" >
+      <value value="0x00" name="On" />
+      <value value="0x40" name="Off" />
+    </mask>
+    <mask name="DEBUG" value="0x80" >
+      <value value="0x00" name="On" />
+      <value value="0x80" name="Off" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="100" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F1010.xml b/src/devices/pic/xml_data/30F1010.xml
new file mode 100644
index 0000000..1d59008
--- /dev/null
+++ b/src/devices/pic/xml_data/30F1010.xml
@@ -0,0 +1,221 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F1010" document="026448" status="IP" memory_technology="FLASH" architecture="30F" id="0x0404" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="20" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="20" end="30" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="15" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="15" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="5.5" nominal="5" />
+  <voltages name="vdd_prog"       min="3" max="5.5" nominal="5" />
+  <voltages name="vdd_prog_write" min="3" max="5.5" nominal="5" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x000FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000F" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+<config offset="0x0" name="FBS" wmask="0xFFFF" bvalue="0x000F" >
+  <mask name="WRTBS" value="0x0001" >
+    <value value="0x0000" name="All" />
+    <value value="0x0001" name="Off" />
+  </mask>
+  <mask name="BSSIZ"  value="0x0006" >
+    <value value="0x0000" name="0"  />
+    <value value="0x0002" name="invalid" />
+    <value value="0x0004" name="1024" />
+    <value value="0x0006" name="0"  />
+  </mask>
+  <mask name="BSSEC" value="0x0008" >
+    <value value="0x0000" name="High Security"     />
+    <value value="0x0008" name="Standard Security" />
+  </mask>
+</config>
+
+<config offset="0x2" name="reserved" wmask="0xFFFF" bvalue="0x0000" ></config>
+
+<config offset="0x4" name="FGS" wmask="0xFFFF" bvalue="0x0007" >
+  <mask name="WRTGS"  value="0x0001" >
+    <value value="0x0000" name="All"  />
+    <value value="0x0001" name="Off" />
+  </mask>
+  <mask name="GSSEC" value="0x0006" >
+    <value value="0x0000" name="High Security" />
+    <value value="0x0002" name="High Security" />
+    <value value="0x0004" name="Standard Security" />
+    <value value="0x0006" name="Off" />
+  </mask>
+</config>
+
+<config offset="0x6" name="FOSCSEL" wmask="0xFFFF" bvalue="0x0003" >
+  <mask name="FNOSC" value="0x0003" >
+    <value value="0x0000" name="INTRC_F" />
+    <value value="0x0001" name="INTRC_F_PLL" />
+    <value value="0x0002" name="PRIM" />
+    <value value="0x0003" name="PRIM_PLL" />
+  </mask>
+</config>
+
+<config offset="0x8" name="FOSC" wmask="0xFFFF" bvalue="0x00E7" >
+  <mask name="POSCMD" value="0x0003" >
+    <value value="0x0000" name="EC" />
+    <value value="0x0001" name="invalid" />
+    <value value="0x0002" name="HS" />
+    <value value="0x0003" name="Off" />
+  </mask>
+  <mask name="OSCIOFNC" value="0x0004" >
+    <value value="0x0000" name="IO" />
+    <value value="0x0004" name="Clock" />
+  </mask>
+  <mask name="FRANGE" value="0x0020" >
+    <value value="0x0000" name="Low range" />
+    <value value="0x0020" name="High range" />
+  </mask>
+  <mask name="FCKSM" value="0x00C0" >
+    <value value="0x0000" name="Switching on, monitor on" />
+    <value value="0x0040" name="Switching on, monitor off" />
+    <value value="0x0080" name="Switching off, monitor off" />
+    <value value="0x00C0" name="Switching off, monitor off" />
+  </mask>
+</config>
+
+<config offset="0xA" name="FWDT" wmask="0xFFFF" bvalue="0x00DF">
+  <mask name="WDTPOST" value="0x000F" >
+    <value value="0x0000" name="1:1" />
+    <value value="0x0001" name="1:2" />
+    <value value="0x0002" name="1:4" />
+    <value value="0x0003" name="1:8" />
+    <value value="0x0004" name="1:16" />
+    <value value="0x0005" name="1:32" />
+    <value value="0x0006" name="1:64" />
+    <value value="0x0007" name="1:128" />
+    <value value="0x0008" name="1:256" />
+    <value value="0x0009" name="1:512" />
+    <value value="0x000A" name="1:1024" />
+    <value value="0x000B" name="1:2048" />
+    <value value="0x000C" name="1:4096" />
+    <value value="0x000D" name="1:8192" />
+    <value value="0x000E" name="1:16384" />
+    <value value="0x000F" name="1:32768" />
+  </mask>
+  <mask name="WDTPRE" value="0x0010" >
+    <value value="0x0000" name="1:32" />
+    <value value="0x0010" name="1:128" />
+  </mask>
+  <mask name="WINDIS" value="0x0040" >
+    <value value="0x0000" name="On" />
+    <value value="0x0040" name="Off" />
+  </mask>
+  <mask name="FWDTEN" value="0x0080" >
+    <value value="0x0000" name="Software" />
+    <value value="0x0080" name="On" />
+  </mask>
+</config>
+
+<config offset="0xC" name="FPOR" wmask="0xFFFF" bvalue="0x0007" >
+  <mask name="FPWRT" value="0x0007" >
+    <value value="0x0000" name="0" />
+    <value value="0x0001" name="2" />
+    <value value="0x0002" name="4" />
+    <value value="0x0003" name="8" />
+    <value value="0x0004" name="16" />
+    <value value="0x0005" name="32" />
+    <value value="0x0006" name="64" />
+    <value value="0x0007" name="128" />
+  </mask>
+</config>
+
+<config offset="0xE" name="FICD" wmask="0xFFFF" bvalue="0x0083" >
+  <mask name="ICS" value="0x0003" >
+    <value value="0x0000" name="invalid" />
+    <value value="0x0001" name="EMUC2, EMUD2" />
+    <value value="0x0002" name="EMUC1, EMUD1" />
+    <value value="0x0003" name="PGC/EMUC, PGD/EMUD" />
+  </mask>
+  <mask name="DEBUG" value="0x0080" >
+    <value value="0x0000" name="On" />
+    <value value="0x0080" name="Off" />
+  </mask>
+</config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfns"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F2010.xml b/src/devices/pic/xml_data/30F2010.xml
new file mode 100644
index 0000000..f252785
--- /dev/null
+++ b/src/devices/pic/xml_data/30F2010.xml
@@ -0,0 +1,237 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F2010" document="010329" status="IP" memory_technology="FLASH" architecture="30F" id="0x0040" >
+
+<!--* Checksums ************************************************************-->
+<!--  <checksums>
+    <checksum protected="Off" bchecksum="0xD406" cchecksum="0xD208" />
+    <checksum protected="All" bchecksum="0x0404" cchecksum="0x0404" />
+  </checksums>
+-->
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="10" vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="20" end="30" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="15" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="15" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x001FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FFC00" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC30F" bvalue="0xC30F" cmask="0xC10F" >
+    <mask name="FPR"   value="0x000F" >
+      <value value="0x0000" name="XTL"          cname="XTL"        />
+      <value value="0x0001" name="XTL"          cname="XTL"        />
+      <value value="0x0002" name="HS"           cname="HS"         />
+      <value value="0x0003" name="HS"           cname="HS"         />
+      <value value="0x0004" name="XT"           cname="XT"         />
+      <value value="0x0005" name="XT4"          cname="XT_PLL4"    />
+      <value value="0x0006" name="XT8"          cname="XT_PLL8"    />
+      <value value="0x0007" name="XT16"         cname="XT_PLL16"   />
+      <value value="0x0008" name="EXTRC_IO"     cname="ERCIO"      />
+      <value value="0x0009" name="EXTRC_CLKOUT" cname="ERC"        />
+      <value value="0x000A" name="invalid" />
+      <value value="0x000B" name="EC_CLKOUT"    cname="EC"         />
+      <value value="0x000C" name="EC_IO"        cname="ECIO"       />
+      <value value="0x000D" name="EC4"          cname="EC_PLL4"  />
+      <value value="0x000E" name="EC8"          cname="EC_PLL8"  />
+      <value value="0x000F" name="EC16"         cname="EC_PLL16" />
+    </mask>
+    <mask name="FOS"   value="0x0300" >
+      <value value="0x0000" name="TMR1"     cname="LP"   />
+      <value value="0x0100" name="INTRC_F"  cname="FRC"  />
+      <value value="0x0200" name="INTRC_LP" cname="LPRC" />
+      <value value="0x0300" name="PRIM"     cname="_"    />
+    </mask>
+    <mask name="FCKSM" value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="default" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x87B3" >
+    <mask name="FPWRT"  value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"   value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN"  value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="LPOL"   value="0x0100" >
+      <value value="0x0000" name="low"  cname="PWMxL_ACT_LO" />
+      <value value="0x0100" name="high" cname="PWMxL_ACT_HI" />
+    </mask>
+    <mask name="HPOL"   value="0x0200" >
+      <value value="0x0000" name="low"  cname="PWMxH_ACT_LO" />
+      <value value="0x0200" name="high" cname="PWMxH_ACT_HI" />
+    </mask>
+    <mask name="PWMPIN" value="0x0400" >
+      <value value="0x0000" name="On"  cname="RST_PWMPIN" />
+      <value value="0x0400" name="Off" cname="RST_IOPIN"  />
+    </mask>
+    <mask name="MCLRE"  value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="RESERVED1" wmask="0x310F" bvalue="0x310F" />
+
+  <config offset="0x8" name="RESERVED2" wmask="0x330F" bvalue="0x330F" />
+
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0007" >
+    <mask name="GWRP" value="0x0001" >
+      <value value="0x0000" name="All" cname="0xFFFE" />
+      <value value="0x0001" name="Off" cname="_" />
+    </mask>
+    <mask name="GCP"  value="0x0002" >
+      <value value="0x0000" name="All" cname="CODE_PROT_ON"  />
+      <value value="0x0002" name="Off" cname="CODE_PROT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F2011.xml b/src/devices/pic/xml_data/30F2011.xml
new file mode 100644
index 0000000..a767855
--- /dev/null
+++ b/src/devices/pic/xml_data/30F2011.xml
@@ -0,0 +1,203 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F2011" document="010340" status="IP" memory_technology="FLASH" architecture="30F" id="0x0240" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="10" vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="20" end="30" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="15" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="15" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x001FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC71F" bvalue="0xC71F" >
+    <mask name="FOSFPR" value="0x071F" >
+      <value value="default" name="invalid" />
+      <value value="0x001F" name="TMR1"         cname="LP"        />
+      <value value="0x011F" name="INTRC_F"      cname="FRC"        />
+      <value value="0x021F" name="INTRC_LP"     cname="LPRC"       />
+      <value value="0x0701" name="FRC4"         cname="FRC_PLL4"   />
+      <value value="0x0703" name="FRC16"        cname="FRC_PLL16"  />
+      <value value="0x0705" name="XT4"          cname="XT_PLL4"    />
+      <value value="0x0706" name="XT8"          cname="XT_PLL8"    />
+      <value value="0x0707" name="XT16"         cname="XT_PLL16"   />
+      <value value="0x070A" name="FRC8"         cname="FRC_PLL8"   />
+      <value value="0x070D" name="EC4"          cname="ECIO_PLL4"  />
+      <value value="0x070E" name="EC8"          cname="ECIO_PLL8"  />
+      <value value="0x070F" name="EC16"         cname="ECIO_PLL16" />
+      <value value="0x0711" name="HS2_4"        cname="HS2_PLL4"   />
+      <value value="0x0712" name="HS2_8"        cname="HS2_PLL8"   />
+      <value value="0x0713" name="HS2_16"       cname="HS2_PLL16"  />
+      <value value="0x0715" name="HS3_4"        cname="HS3_PLL4"   />
+      <value value="0x0716" name="HS3_8"        cname="HS3_PLL8"   />
+      <value value="0x0717" name="HS3_16"       cname="HS3_PLL16"  />
+    </mask>
+    <mask name="FCKSM"  value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="default" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x80B3" >
+    <mask name="FPWRT" value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"  value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN" value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="MCLRE" value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="RESERVED1" wmask="0x310F" bvalue="0x0000" />
+
+  <config offset="0x8" name="RESERVED2" wmask="0x330F" bvalue="0x0000" />
+
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0003" >
+    <mask name="GWRP" value="0x0001" >
+      <value value="0x0000" name="All" cname="0xFFFE" />
+      <value value="0x0001" name="Off" cname="_" />
+    </mask>
+    <mask name="GCP"  value="0x0002" >
+      <value value="0x0000" name="All" cname="CODE_PROT_ON"  />
+      <value value="0x0002" name="Off" cname="CODE_PROT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F2012.xml b/src/devices/pic/xml_data/30F2012.xml
new file mode 100644
index 0000000..6da9eb7
--- /dev/null
+++ b/src/devices/pic/xml_data/30F2012.xml
@@ -0,0 +1,213 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F2012" document="010341" status="IP" memory_technology="FLASH" architecture="30F" id="0x0241" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="10" vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="20" end="30" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="15" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="15" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x001FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC71F" bvalue="0xC71F" >
+    <mask name="FOSFPR" value="0x071F" >
+      <value value="default" name="invalid" />
+      <value value="0x001F" name="TMR1"         cname="LP"        />
+      <value value="0x011F" name="INTRC_F"      cname="FRC"        />
+      <value value="0x021F" name="INTRC_LP"     cname="LPRC"       />
+      <value value="0x0701" name="FRC4"         cname="FRC_PLL4"   />
+      <value value="0x0703" name="FRC16"        cname="FRC_PLL16"  />
+      <value value="0x0705" name="XT4"          cname="XT_PLL4"    />
+      <value value="0x0706" name="XT8"          cname="XT_PLL8"    />
+      <value value="0x0707" name="XT16"         cname="XT_PLL16"   />
+      <value value="0x070A" name="FRC8"         cname="FRC_PLL8"   />
+      <value value="0x070D" name="EC4"          cname="ECIO_PLL4"  />
+      <value value="0x070E" name="EC8"          cname="ECIO_PLL8"  />
+      <value value="0x070F" name="EC16"         cname="ECIO_PLL16" />
+      <value value="0x0711" name="HS2_4"        cname="HS2_PLL4"   />
+      <value value="0x0712" name="HS2_8"        cname="HS2_PLL8"   />
+      <value value="0x0713" name="HS2_16"       cname="HS2_PLL16"  />
+      <value value="0x0715" name="HS3_4"        cname="HS3_PLL4"   />
+      <value value="0x0716" name="HS3_8"        cname="HS3_PLL8"   />
+      <value value="0x0717" name="HS3_16"       cname="HS3_PLL16"  />
+    </mask>
+    <mask name="FCKSM"  value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="default" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x80B3" cmask="0x87B3" >
+    <mask name="FPWRT" value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"  value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN" value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="MCLRE" value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="RESERVED1" wmask="0x310F" bvalue="0x0000" cmask="0x310F" />
+
+  <config offset="0x8" name="RESERVED2" wmask="0x330F" bvalue="0x0000" cmask="0x330F" />
+
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0003" cmask="0x0007" >
+    <mask name="GWRP" value="0x0001" >
+      <value value="0x0000" name="All" cname="0xFFFE" />
+      <value value="0x0001" name="Off" cname="_" />
+    </mask>
+    <mask name="GCP"  value="0x0002" >
+      <value value="0x0000" name="All" cname="CODE_PROT_ON"  />
+      <value value="0x0002" name="Off" cname="CODE_PROT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F2020.xml b/src/devices/pic/xml_data/30F2020.xml
new file mode 100644
index 0000000..3aa30e9
--- /dev/null
+++ b/src/devices/pic/xml_data/30F2020.xml
@@ -0,0 +1,221 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F2020" document="026339" status="IP" memory_technology="FLASH" architecture="30F" id="0x0400" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="20" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="20" end="30" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="15" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="15" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="5.5" nominal="5" />
+  <voltages name="vdd_prog"       min="3" max="5.5" nominal="5" />
+  <voltages name="vdd_prog_write" min="3" max="5.5" nominal="5" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x001FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000F" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+<config offset="0x0" name="FBS" wmask="0xFFFF" bvalue="0x000F" >
+  <mask name="WRTBS" value="0x0001" >
+    <value value="0x0000" name="All" />
+    <value value="0x0001" name="Off" />
+  </mask>
+  <mask name="BSSIZ"  value="0x0006" >
+    <value value="0x0000" name="0"  />
+    <value value="0x0002" name="4096" />
+    <value value="0x0004" name="1024" />
+    <value value="0x0006" name="0"  />
+  </mask>
+  <mask name="BSSEC" value="0x0008" >
+    <value value="0x0000" name="High Security"     />
+    <value value="0x0008" name="Standard Security" />
+  </mask>
+</config>
+
+<config offset="0x2" name="reserved" wmask="0xFFFF" bvalue="0x0000" ></config>
+
+<config offset="0x4" name="FGS" wmask="0xFFFF" bvalue="0x0007" >
+  <mask name="WRTGS"  value="0x0001" >
+    <value value="0x0000" name="All"  />
+    <value value="0x0001" name="Off" />
+  </mask>
+  <mask name="GSSEC" value="0x0006" >
+    <value value="0x0000" name="High Security" />
+    <value value="0x0002" name="High Security" />
+    <value value="0x0004" name="Standard Security" />
+    <value value="0x0006" name="Off" />
+  </mask>
+</config>
+
+<config offset="0x6" name="FOSCSEL" wmask="0xFFFF" bvalue="0x0003" >
+  <mask name="FNOSC" value="0x0003" >
+    <value value="0x0000" name="INTRC_F" />
+    <value value="0x0001" name="INTRC_F_PLL" />
+    <value value="0x0002" name="PRIM" />
+    <value value="0x0003" name="PRIM_PLL" />
+  </mask>
+</config>
+
+<config offset="0x8" name="FOSC" wmask="0xFFFF" bvalue="0x00E7" >
+  <mask name="POSCMD" value="0x0003" >
+    <value value="0x0000" name="EC" />
+    <value value="0x0001" name="invalid" />
+    <value value="0x0002" name="HS" />
+    <value value="0x0003" name="Off" />
+  </mask>
+  <mask name="OSCIOFNC" value="0x0004" >
+    <value value="0x0000" name="IO" />
+    <value value="0x0004" name="Clock" />
+  </mask>
+  <mask name="FRANGE" value="0x0020" >
+    <value value="0x0000" name="Low range" />
+    <value value="0x0020" name="High range" />
+  </mask>
+  <mask name="FCKSM" value="0x00C0" >
+    <value value="0x0000" name="Switching on, monitor on" />
+    <value value="0x0040" name="Switching on, monitor off" />
+    <value value="0x0080" name="Switching off, monitor off" />
+    <value value="0x00C0" name="Switching off, monitor off" />
+  </mask>
+</config>
+
+<config offset="0xA" name="FWDT" wmask="0xFFFF" bvalue="0x00DF">
+  <mask name="WDTPOST" value="0x000F" >
+    <value value="0x0000" name="1:1" />
+    <value value="0x0001" name="1:2" />
+    <value value="0x0002" name="1:4" />
+    <value value="0x0003" name="1:8" />
+    <value value="0x0004" name="1:16" />
+    <value value="0x0005" name="1:32" />
+    <value value="0x0006" name="1:64" />
+    <value value="0x0007" name="1:128" />
+    <value value="0x0008" name="1:256" />
+    <value value="0x0009" name="1:512" />
+    <value value="0x000A" name="1:1024" />
+    <value value="0x000B" name="1:2048" />
+    <value value="0x000C" name="1:4096" />
+    <value value="0x000D" name="1:8192" />
+    <value value="0x000E" name="1:16384" />
+    <value value="0x000F" name="1:32768" />
+  </mask>
+  <mask name="WDTPRE" value="0x0010" >
+    <value value="0x0000" name="1:32" />
+    <value value="0x0010" name="1:128" />
+  </mask>
+  <mask name="WINDIS" value="0x0040" >
+    <value value="0x0000" name="On" />
+    <value value="0x0040" name="Off" />
+  </mask>
+  <mask name="FWDTEN" value="0x0080" >
+    <value value="0x0000" name="Software" />
+    <value value="0x0080" name="On" />
+  </mask>
+</config>
+
+<config offset="0xC" name="FPOR" wmask="0xFFFF" bvalue="0x0007" >
+  <mask name="FPWRT" value="0x0007" >
+    <value value="0x0000" name="0" />
+    <value value="0x0001" name="2" />
+    <value value="0x0002" name="4" />
+    <value value="0x0003" name="8" />
+    <value value="0x0004" name="16" />
+    <value value="0x0005" name="32" />
+    <value value="0x0006" name="64" />
+    <value value="0x0007" name="128" />
+  </mask>
+</config>
+
+<config offset="0xE" name="FICD" wmask="0xFFFF" bvalue="0x0083" >
+  <mask name="ICS" value="0x0003" >
+    <value value="0x0000" name="invalid" />
+    <value value="0x0001" name="EMUC2, EMUD2" />
+    <value value="0x0002" name="EMUC1, EMUD1" />
+    <value value="0x0003" name="PGC/EMUC, PGD/EMUD" />
+  </mask>
+  <mask name="DEBUG" value="0x0080" >
+    <value value="0x0000" name="On" />
+    <value value="0x0080" name="Off" />
+  </mask>
+</config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfns"       nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F2023.xml b/src/devices/pic/xml_data/30F2023.xml
new file mode 100644
index 0000000..8241600
--- /dev/null
+++ b/src/devices/pic/xml_data/30F2023.xml
@@ -0,0 +1,162 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F2023" document="026341" status="IP" memory_technology="FLASH" architecture="30F" id="0x0403" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0" end="20" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="20" end="30" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="15" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="15" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="3" max="5.5" nominal="5" />
+  <voltages name="vdd_prog"       min="3" max="5.5" nominal="5" />
+  <voltages name="vdd_prog_write" min="3" max="5.5" nominal="5" />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x001FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000F" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+<config offset="0x0" name="FBS" wmask="0xFFFF" bvalue="0x000F" >
+  <mask name="WRTBS" value="0x0001" >
+    <value value="0x0000" name="All" />
+    <value value="0x0001" name="Off" />
+  </mask>
+  <mask name="BSSIZ"  value="0x0006" >
+    <value value="0x0000" name="0"  />
+    <value value="0x0002" name="4096" />
+    <value value="0x0004" name="1024" />
+    <value value="0x0006" name="0"  />
+  </mask>
+  <mask name="BSSEC" value="0x0008" >
+    <value value="0x0000" name="High Security"     />
+    <value value="0x0008" name="Standard Security" />
+  </mask>
+</config>
+
+<config offset="0x2" name="reserved" wmask="0xFFFF" bvalue="0x0000" ></config>
+
+<config offset="0x4" name="FGS" wmask="0xFFFF" bvalue="0x0007" >
+  <mask name="WRTGS"  value="0x0001" >
+    <value value="0x0000" name="All"  />
+    <value value="0x0001" name="Off" />
+  </mask>
+  <mask name="GSSEC" value="0x0006" >
+    <value value="0x0000" name="High Security" />
+    <value value="0x0002" name="High Security" />
+    <value value="0x0004" name="Standard Security" />
+    <value value="0x0006" name="Off" />
+  </mask>
+</config>
+
+<config offset="0x6" name="FOSCSEL" wmask="0xFFFF" bvalue="0x0003" >
+  <mask name="FNOSC" value="0x0003" >
+    <value value="0x0000" name="INTRC_F" />
+    <value value="0x0001" name="INTRC_F_PLL" />
+    <value value="0x0002" name="PRIM" />
+    <value value="0x0003" name="PRIM_PLL" />
+  </mask>
+</config>
+
+<config offset="0x8" name="FOSC" wmask="0xFFFF" bvalue="0x00E7" >
+  <mask name="POSCMD" value="0x0003" >
+    <value value="0x0000" name="EC" />
+    <value value="0x0001" name="invalid" />
+    <value value="0x0002" name="HS" />
+    <value value="0x0003" name="Off" />
+  </mask>
+  <mask name="OSCIOFNC" value="0x0004" >
+    <value value="0x0000" name="IO" />
+    <value value="0x0004" name="Clock" />
+  </mask>
+  <mask name="FRANGE" value="0x0020" >
+    <value value="0x0000" name="Low range" />
+    <value value="0x0020" name="High range" />
+  </mask>
+  <mask name="FCKSM" value="0x00C0" >
+    <value value="0x0000" name="Switching on, monitor on" />
+    <value value="0x0040" name="Switching on, monitor off" />
+    <value value="0x0080" name="Switching off, monitor off" />
+    <value value="0x00C0" name="Switching off, monitor off" />
+  </mask>
+</config>
+
+<config offset="0xA" name="FWDT" wmask="0xFFFF" bvalue="0x00DF">
+  <mask name="WDTPOST" value="0x000F" >
+    <value value="0x0000" name="1:1" />
+    <value value="0x0001" name="1:2" />
+    <value value="0x0002" name="1:4" />
+    <value value="0x0003" name="1:8" />
+    <value value="0x0004" name="1:16" />
+    <value value="0x0005" name="1:32" />
+    <value value="0x0006" name="1:64" />
+    <value value="0x0007" name="1:128" />
+    <value value="0x0008" name="1:256" />
+    <value value="0x0009" name="1:512" />
+    <value value="0x000A" name="1:1024" />
+    <value value="0x000B" name="1:2048" />
+    <value value="0x000C" name="1:4096" />
+    <value value="0x000D" name="1:8192" />
+    <value value="0x000E" name="1:16384" />
+    <value value="0x000F" name="1:32768" />
+  </mask>
+  <mask name="WDTPRE" value="0x0010" >
+    <value value="0x0000" name="1:32" />
+    <value value="0x0010" name="1:128" />
+  </mask>
+  <mask name="WINDIS" value="0x0040" >
+    <value value="0x0000" name="On" />
+    <value value="0x0040" name="Off" />
+  </mask>
+  <mask name="FWDTEN" value="0x0080" >
+    <value value="0x0000" name="Software" />
+    <value value="0x0080" name="On" />
+  </mask>
+</config>
+
+<config offset="0xC" name="FPOR" wmask="0xFFFF" bvalue="0x0007" >
+  <mask name="FPWRT" value="0x0007" >
+    <value value="0x0000" name="0" />
+    <value value="0x0001" name="2" />
+    <value value="0x0002" name="4" />
+    <value value="0x0003" name="8" />
+    <value value="0x0004" name="16" />
+    <value value="0x0005" name="32" />
+    <value value="0x0006" name="64" />
+    <value value="0x0007" name="128" />
+  </mask>
+</config>
+
+<config offset="0xE" name="FICD" wmask="0xFFFF" bvalue="0x0083" >
+  <mask name="ICS" value="0x0003" >
+    <value value="0x0000" name="invalid" />
+    <value value="0x0001" name="EMUC2, EMUD2" />
+    <value value="0x0002" name="EMUC1, EMUD1" />
+    <value value="0x0003" name="PGC/EMUC, PGD/EMUD" />
+  </mask>
+  <mask name="DEBUG" value="0x0080" >
+    <value value="0x0000" name="On" />
+    <value value="0x0080" name="Off" />
+  </mask>
+</config>
+
+<!--* Packages *************************************************************-->
+  <package types="qfn tqfp"       nb_pins="44" >
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F3010.xml b/src/devices/pic/xml_data/30F3010.xml
new file mode 100644
index 0000000..1041c86
--- /dev/null
+++ b/src/devices/pic/xml_data/30F3010.xml
@@ -0,0 +1,242 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F3010" document="010335" status="IP" memory_technology="FLASH" architecture="30F" id="0x01C0" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="10" vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="20" end="30" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="15" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="15" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x003FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FFC00" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC71F" bvalue="0xC71F" >
+    <mask name="FOSFPR" value="0x071F" >
+      <value value="default" name="invalid" />
+      <value value="0x001F" name="TMR1"         cname="LP"        />
+      <value value="0x011F" name="INTRC_F"      cname="FRC"        />
+      <value value="0x021F" name="INTRC_LP"     cname="LPRC"       />
+      <value value="0x0701" name="FRC4"         cname="FRC_PLL4"   />
+      <value value="0x0703" name="FRC16"        cname="FRC_PLL16"  />
+      <value value="0x0705" name="XT4"          cname="XT_PLL4"    />
+      <value value="0x0706" name="XT8"          cname="XT_PLL8"    />
+      <value value="0x0707" name="XT16"         cname="XT_PLL16"   />
+      <value value="0x070A" name="FRC8"         cname="FRC_PLL8"   />
+      <value value="0x070D" name="EC4"          cname="ECIO_PLL4"  />
+      <value value="0x070E" name="EC8"          cname="ECIO_PLL8"  />
+      <value value="0x070F" name="EC16"         cname="ECIO_PLL16" />
+      <value value="0x0711" name="HS2_4"        cname="HS2_PLL4"   />
+      <value value="0x0712" name="HS2_8"        cname="HS2_PLL8"   />
+      <value value="0x0713" name="HS2_16"       cname="HS2_PLL16"  />
+      <value value="0x0715" name="HS3_4"        cname="HS3_PLL4"   />
+      <value value="0x0716" name="HS3_8"        cname="HS3_PLL8"   />
+      <value value="0x0717" name="HS3_16"       cname="HS3_PLL16"  />
+    </mask>
+    <mask name="FCKSM"  value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="default" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x87B3" >
+    <mask name="FPWRT"  value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"   value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN"  value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="LPOL"   value="0x0100" >
+      <value value="0x0000" name="low"  cname="PWMxL_ACT_LO" />
+      <value value="0x0100" name="high" cname="PWMxL_ACT_HI" />
+    </mask>
+    <mask name="HPOL"   value="0x0200" >
+      <value value="0x0000" name="low"  cname="PWMxH_ACT_LO" />
+      <value value="0x0200" name="high" cname="PWMxH_ACT_HI" />
+    </mask>
+    <mask name="PWMPIN" value="0x0400" >
+      <value value="0x0000" name="On"  cname="RST_PWMPIN" />
+      <value value="0x0400" name="Off" cname="RST_IOPIN"  />
+    </mask>
+    <mask name="MCLRE"  value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="RESERVED1" wmask="0x310F" bvalue="0x0000" cmask="0x310F" />
+
+  <config offset="0x8" name="RESERVED2" wmask="0x330F" bvalue="0x0000" cmask="0x330F" />
+
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0003" cmask="0x0007" >
+    <mask name="GWRP" value="0x0001" >
+      <value value="0x0000" name="All" cname="0xFFFE" />
+      <value value="0x0001" name="Off" cname="_" />
+    </mask>
+    <mask name="GCP"  value="0x0002" >
+      <value value="0x0000" name="All" cname="CODE_PROT_ON"  />
+      <value value="0x0002" name="Off" cname="CODE_PROT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F3011.xml b/src/devices/pic/xml_data/30F3011.xml
new file mode 100644
index 0000000..b092d8b
--- /dev/null
+++ b/src/devices/pic/xml_data/30F3011.xml
@@ -0,0 +1,302 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F3011" document="010336" status="IP" memory_technology="FLASH" architecture="30F" id="0x01C1" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="10" vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="20" end="30" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="15" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="15" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x003FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FFC00" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC71F" bvalue="0xC71F" >
+    <mask name="FOSFPR" value="0x071F" >
+      <value value="default" name="invalid" />
+      <value value="0x001F" name="TMR1"         cname="LP"         />
+      <value value="0x011F" name="INTRC_F"      cname="FRC"        />
+      <value value="0x021F" name="INTRC_LP"     cname="LPRC"       />
+      <value value="0x0701" name="FRC4"         cname="FRC_PLL4"   />
+      <value value="0x0703" name="FRC16"        cname="FRC_PLL16"  />
+      <value value="0x0705" name="XT4"          cname="XT_PLL4"    />
+      <value value="0x0706" name="XT8"          cname="XT_PLL8"    />
+      <value value="0x0707" name="XT16"         cname="XT_PLL16"   />
+      <value value="0x070A" name="FRC8"         cname="FRC_PLL8"   />
+      <value value="0x070D" name="EC4"          cname="ECIO_PLL4"  />
+      <value value="0x070E" name="EC8"          cname="ECIO_PLL8"  />
+      <value value="0x070F" name="EC16"         cname="ECIO_PLL16" />
+      <value value="0x0711" name="HS2_4"        cname="HS2_PLL4"   />
+      <value value="0x0712" name="HS2_8"        cname="HS2_PLL8"   />
+      <value value="0x0713" name="HS2_16"       cname="HS2_PLL16"  />
+      <value value="0x0715" name="HS3_4"        cname="HS3_PLL4"   />
+      <value value="0x0716" name="HS3_8"        cname="HS3_PLL8"   />
+      <value value="0x0717" name="HS3_16"       cname="HS3_PLL16"  />
+    </mask>
+    <mask name="FCKSM"  value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="0x8000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+      <value value="0xC000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x87B3" >
+    <mask name="FPWRT"  value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"   value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN"  value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="LPOL"   value="0x0100" >
+      <value value="0x0000" name="low"  cname="PWMxL_ACT_LO" />
+      <value value="0x0100" name="high" cname="PWMxL_ACT_HI" />
+    </mask>
+    <mask name="HPOL"   value="0x0200" >
+      <value value="0x0000" name="low"  cname="PWMxH_ACT_LO" />
+      <value value="0x0200" name="high" cname="PWMxH_ACT_HI" />
+    </mask>
+    <mask name="PWMPIN" value="0x0400" >
+      <value value="0x0000" name="On"  cname="RST_PWMPIN" />
+      <value value="0x0400" name="Off" cname="RST_IOPIN"  />
+    </mask>
+    <mask name="MCLRE"  value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="RESERVED1" wmask="0x310F" bvalue="0x0000" cmask="0x310F" />
+
+  <config offset="0x8" name="RESERVED2" wmask="0x330F" bvalue="0x0000" cmask="0x330F" />
+
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0003" cmask="0x0007" >
+    <mask name="GWRP" value="0x0001" >
+      <value value="0x0000" name="All" cname="0xFFFE" />
+      <value value="0x0001" name="Off" cname="_" />
+    </mask>
+    <mask name="GCP"  value="0x0002" >
+      <value value="0x0000" name="All" cname="CODE_PROT_ON"  />
+      <value value="0x0002" name="Off" cname="CODE_PROT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F3012.xml b/src/devices/pic/xml_data/30F3012.xml
new file mode 100644
index 0000000..b87d96a
--- /dev/null
+++ b/src/devices/pic/xml_data/30F3012.xml
@@ -0,0 +1,220 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F3012" document="010342" status="IP" memory_technology="FLASH" architecture="30F" id="0x00C1" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="10" vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="20" end="30" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="15" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="15" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x003FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FFC00" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC71F" bvalue="0xC71F" >
+    <mask name="FOSFPR" value="0x071F" >
+      <value value="default" name="invalid" />
+      <value value="0x001F" name="TMR1"         cname="LP"         />
+      <value value="0x011F" name="INTRC_F"      cname="FRC"        />
+      <value value="0x021F" name="INTRC_LP"     cname="LPRC"       />
+      <value value="0x0701" name="FRC4"         cname="FRC_PLL4"   />
+      <value value="0x0703" name="FRC16"        cname="FRC_PLL16"  />
+      <value value="0x0705" name="XT4"          cname="XT_PLL4"    />
+      <value value="0x0706" name="XT8"          cname="XT_PLL8"    />
+      <value value="0x0707" name="XT16"         cname="XT_PLL16"   />
+      <value value="0x070A" name="FRC8"         cname="FRC_PLL8"   />
+      <value value="0x070D" name="EC4"          cname="ECIO_PLL4"  />
+      <value value="0x070E" name="EC8"          cname="ECIO_PLL8"  />
+      <value value="0x070F" name="EC16"         cname="ECIO_PLL16" />
+      <value value="0x0711" name="HS2_4"        cname="HS2_PLL4"   />
+      <value value="0x0712" name="HS2_8"        cname="HS2_PLL8"   />
+      <value value="0x0713" name="HS2_16"       cname="HS2_PLL16"  />
+      <value value="0x0715" name="HS3_4"        cname="HS3_PLL4"   />
+      <value value="0x0716" name="HS3_8"        cname="HS3_PLL8"   />
+      <value value="0x0717" name="HS3_16"       cname="HS3_PLL16"  />
+    </mask>
+    <mask name="FCKSM"  value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="default" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x80B3" cmask="0x87B3" >
+    <mask name="FPWRT" value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"  value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN" value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="MCLRE" value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="RESERVED1" wmask="0x310F" bvalue="0x0000" cmask="0x310F" />
+
+  <config offset="0x8" name="RESERVED2" wmask="0x330F" bvalue="0x0000" cmask="0x330F" />
+
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0003" cmask="0x0007" >
+    <mask name="GWRP" value="0x0001" >
+      <value value="0x0000" name="All" cname="0xFFFE" />
+      <value value="0x0001" name="Off" cname="_" />
+    </mask>
+    <mask name="GCP"  value="0x0002" >
+      <value value="0x0000" name="All" cname="CODE_PROT_ON"  />
+      <value value="0x0002" name="Off" cname="CODE_PROT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip soic" nb_pins="18" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F3013.xml b/src/devices/pic/xml_data/30F3013.xml
new file mode 100644
index 0000000..702e415
--- /dev/null
+++ b/src/devices/pic/xml_data/30F3013.xml
@@ -0,0 +1,230 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F3013" document="010343" status="IP" memory_technology="FLASH" architecture="30F" id="0x00C3" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="10" vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="20" end="30" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="15" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="15" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x003FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FFC00" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC71F" bvalue="0xC71F" >
+    <mask name="FOSFPR" value="0x071F" >
+      <value value="default" name="invalid" />
+      <value value="0x001F" name="TMR1"         cname="LP"         />
+      <value value="0x011F" name="INTRC_F"      cname="FRC"        />
+      <value value="0x021F" name="INTRC_LP"     cname="LPRC"       />
+      <value value="0x0701" name="FRC4"         cname="FRC_PLL4"   />
+      <value value="0x0703" name="FRC16"        cname="FRC_PLL16"  />
+      <value value="0x0705" name="XT4"          cname="XT_PLL4"    />
+      <value value="0x0706" name="XT8"          cname="XT_PLL8"    />
+      <value value="0x0707" name="XT16"         cname="XT_PLL16"   />
+      <value value="0x070A" name="FRC8"         cname="FRC_PLL8"   />
+      <value value="0x070D" name="EC4"          cname="ECIO_PLL4"  />
+      <value value="0x070E" name="EC8"          cname="ECIO_PLL8"  />
+      <value value="0x070F" name="EC16"         cname="ECIO_PLL16" />
+      <value value="0x0711" name="HS2_4"        cname="HS2_PLL4"   />
+      <value value="0x0712" name="HS2_8"        cname="HS2_PLL8"   />
+      <value value="0x0713" name="HS2_16"       cname="HS2_PLL16"  />
+      <value value="0x0715" name="HS3_4"        cname="HS3_PLL4"   />
+      <value value="0x0716" name="HS3_8"        cname="HS3_PLL8"   />
+      <value value="0x0717" name="HS3_16"       cname="HS3_PLL16"  />
+    </mask>
+    <mask name="FCKSM"  value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="default" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x80B3" cmask="0x87B3" >
+    <mask name="FPWRT" value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"  value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN" value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="MCLRE" value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="RESERVED1" wmask="0x310F" bvalue="0x0000" cmask="0x310F" />
+
+  <config offset="0x8" name="RESERVED2" wmask="0x330F" bvalue="0x0000" cmask="0x330F" />
+
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0003" cmask="0x0007" >
+    <mask name="GWRP" value="0x0001" >
+      <value value="0x0000" name="All" cname="0xFFFE" />
+      <value value="0x0001" name="Off" cname="_" />
+    </mask>
+    <mask name="GCP"  value="0x0002" >
+      <value value="0x0000" name="All" cname="CODE_PROT_ON"  />
+      <value value="0x0002" name="Off" cname="CODE_PROT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F3014.xml b/src/devices/pic/xml_data/30F3014.xml
new file mode 100644
index 0000000..13bd387
--- /dev/null
+++ b/src/devices/pic/xml_data/30F3014.xml
@@ -0,0 +1,289 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F3014" document="010344" status="IP" memory_technology="FLASH" architecture="30F" id="0x0160" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="10" vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="20" end="30" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="15" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="15" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x003FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FFC00" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC71F" bvalue="0xC71F" >
+    <mask name="FOSFPR" value="0x071F" >
+      <value value="default" name="invalid" />
+      <value value="0x001F" name="TMR1"         cname="LP"        />
+      <value value="0x011F" name="INTRC_F"      cname="FRC"        />
+      <value value="0x021F" name="INTRC_LP"     cname="LPRC"       />
+      <value value="0x0701" name="FRC4"         cname="FRC_PLL4"   />
+      <value value="0x0703" name="FRC16"        cname="FRC_PLL16"  />
+      <value value="0x0705" name="XT4"          cname="XT_PLL4"    />
+      <value value="0x0706" name="XT8"          cname="XT_PLL8"    />
+      <value value="0x0707" name="XT16"         cname="XT_PLL16"   />
+      <value value="0x070A" name="FRC8"         cname="FRC_PLL8"   />
+      <value value="0x070D" name="EC4"          cname="ECIO_PLL4"  />
+      <value value="0x070E" name="EC8"          cname="ECIO_PLL8"  />
+      <value value="0x070F" name="EC16"         cname="ECIO_PLL16" />
+      <value value="0x0711" name="HS2_4"        cname="HS2_PLL4"   />
+      <value value="0x0712" name="HS2_8"        cname="HS2_PLL8"   />
+      <value value="0x0713" name="HS2_16"       cname="HS2_PLL16"  />
+      <value value="0x0715" name="HS3_4"        cname="HS3_PLL4"   />
+      <value value="0x0716" name="HS3_8"        cname="HS3_PLL8"   />
+      <value value="0x0717" name="HS3_16"       cname="HS3_PLL16"  />
+    </mask>
+    <mask name="FCKSM"  value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="default" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x80B3" cmask="0x87B3" >
+    <mask name="FPWRT" value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"  value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN" value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="MCLRE" value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="RESERVED1" wmask="0x310F" bvalue="0x0000" cmask="0x310F" />
+
+  <config offset="0x8" name="RESERVED2" wmask="0x330F" bvalue="0x0000" cmask="0x330F" />
+
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0003" cmask="0x0007" >
+    <mask name="GWRP" value="0x0001" >
+      <value value="0x0000" name="All" cname="0xFFFE" />
+      <value value="0x0001" name="Off" cname="_" />
+    </mask>
+    <mask name="GCP"  value="0x0002" >
+      <value value="0x0000" name="All" cname="CODE_PROT_ON"  />
+      <value value="0x0002" name="Off" cname="CODE_PROT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F4011.xml b/src/devices/pic/xml_data/30F4011.xml
new file mode 100644
index 0000000..89791c2
--- /dev/null
+++ b/src/devices/pic/xml_data/30F4011.xml
@@ -0,0 +1,305 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F4011" document="010337" status="IP" memory_technology="FLASH" architecture="30F" id="0x0101" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="10" vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="20" end="30" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="15" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="15" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x007FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FFC00" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC30F" bvalue="0xC30F" cmask="0xC10F" >
+    <mask name="FPR"   value="0x000F" >
+      <value value="0x0000" name="XTL"          cname="XTL"      />
+      <value value="0x0001" name="XTL"          cname="XTL"      />
+      <value value="0x0002" name="HS"           cname="HS"       />
+      <value value="0x0003" name="HS"           cname="HS"       />
+      <value value="0x0004" name="XT"           cname="XTL"      />
+      <value value="0x0005" name="XT4"          cname="XT_PLL4"  />
+      <value value="0x0006" name="XT8"          cname="XT_PLL8"  />
+      <value value="0x0007" name="XT16"         cname="XT_PLL16" />
+      <value value="0x0008" name="EXTRC_IO"     cname="ERCIO"    />
+      <value value="0x0009" name="EXTRC_CLKOUT" cname="ERC"      />
+      <value value="0x000A" name="FRC8"         cname="FRC_PLL8" />
+      <value value="0x000B" name="EC_CLKOUT"    cname="EC"       />
+      <value value="0x000C" name="EC_IO"        cname="ECIO"     />
+      <value value="0x000D" name="EC4"          cname="EC_PLL4"  />
+      <value value="0x000E" name="EC8"          cname="EC_PLL8"  />
+      <value value="0x000F" name="EC16"         cname="EC_PLL16" />
+    </mask>
+    <mask name="FOS"   value="0x0300" >
+      <value value="0x0000" name="TMR1"     cname="EXT" />
+      <value value="0x0100" name="INTRC_F"  cname="FRC" />
+      <value value="0x0200" name="INTRC_LP" cname="LP"  />
+      <value value="0x0300" name="PRIM"     cname="_"    />
+    </mask>
+    <mask name="FCKSM" value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="0x8000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+      <value value="0xC000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x87B3" >
+    <mask name="FPWRT"  value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"   value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN"  value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="LPOL"   value="0x0100" >
+      <value value="0x0000" name="low"  cname="PWMxL_ACT_LO" />
+      <value value="0x0100" name="high" cname="PWMxL_ACT_HI" />
+    </mask>
+    <mask name="HPOL"   value="0x0200" >
+      <value value="0x0000" name="low"  cname="PWMxH_ACT_LO" />
+      <value value="0x0200" name="high" cname="PWMxH_ACT_HI" />
+    </mask>
+    <mask name="PWMPIN" value="0x0400" >
+      <value value="0x0000" name="On"  cname="RST_PWMPIN" />
+      <value value="0x0400" name="Off" cname="RST_IOPIN"  />
+    </mask>
+    <mask name="MCLRE"  value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="RESERVED1" wmask="0x310F" bvalue="0x0000" cmask="0x310F" />
+
+  <config offset="0x8" name="RESERVED2" wmask="0x330F" bvalue="0x0000" cmask="0x330F" />
+
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0003" cmask="0x0007" >
+    <mask name="GWRP" value="0x0001" >
+      <value value="0x0000" name="All" cname="0xFFFE" />
+      <value value="0x0001" name="Off" cname="_" />
+    </mask>
+    <mask name="GCP"  value="0x0002" >
+      <value value="0x0000" name="All" cname="CODE_PROT_ON"  />
+      <value value="0x0002" name="Off" cname="CODE_PROT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F4012.xml b/src/devices/pic/xml_data/30F4012.xml
new file mode 100644
index 0000000..e42b34c
--- /dev/null
+++ b/src/devices/pic/xml_data/30F4012.xml
@@ -0,0 +1,246 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F4012" document="010338" status="IP" memory_technology="FLASH" architecture="30F" id="0x0100" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="10" vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="20" end="30" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="15" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="15" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x007FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FFC00" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC30F" bvalue="0xC30F" cmask="0xC10F" >
+    <mask name="FPR"   value="0x000F" >
+      <value value="0x0000" name="XTL"          cname="XTL"      />
+      <value value="0x0001" name="XTL"          cname="XTL"      />
+      <value value="0x0002" name="HS"           cname="HS"       />
+      <value value="0x0003" name="HS"           cname="HS"       />
+      <value value="0x0004" name="XT"           cname="XTL"      />
+      <value value="0x0005" name="XT4"          cname="XT_PLL4"  />
+      <value value="0x0006" name="XT8"          cname="XT_PLL8"  />
+      <value value="0x0007" name="XT16"         cname="XT_PLL16" />
+      <value value="0x0008" name="EXTRC_IO"     cname="ERCIO"    />
+      <value value="0x0009" name="EXTRC_CLKOUT" cname="ERC"      />
+      <value value="0x000A" name="FRC8"         cname="FRC_PLL8" />
+      <value value="0x000B" name="EC_CLKOUT"    cname="EC"       />
+      <value value="0x000C" name="EC_IO"        cname="ECIO"     />
+      <value value="0x000D" name="EC4"          cname="EC_PLL4"  />
+      <value value="0x000E" name="EC8"          cname="EC_PLL8"  />
+      <value value="0x000F" name="EC16"         cname="EC_PLL16" />
+    </mask>
+    <mask name="FOS"   value="0x0300" >
+      <value value="0x0000" name="TMR1"     cname="EXT" />
+      <value value="0x0100" name="INTRC_F"  cname="FRC" />
+      <value value="0x0200" name="INTRC_LP" cname="LP"  />
+      <value value="0x0300" name="PRIM"     cname="_"    />
+    </mask>
+    <mask name="FCKSM" value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="0x8000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+      <value value="0xC000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x87B3" >
+    <mask name="FPWRT"  value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"   value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN"  value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="LPOL"   value="0x0100" >
+      <value value="0x0000" name="low"  cname="PWMxL_ACT_LO" />
+      <value value="0x0100" name="high" cname="PWMxL_ACT_HI" />
+    </mask>
+    <mask name="HPOL"   value="0x0200" >
+      <value value="0x0000" name="low"  cname="PWMxH_ACT_LO" />
+      <value value="0x0200" name="high" cname="PWMxH_ACT_HI" />
+    </mask>
+    <mask name="PWMPIN" value="0x0400" >
+      <value value="0x0000" name="On"  cname="RST_PWMPIN" />
+      <value value="0x0400" name="Off" cname="RST_IOPIN"  />
+    </mask>
+    <mask name="MCLRE"  value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="RESERVED1" wmask="0x310F" bvalue="0x0000" cmask="0x310F" />
+
+  <config offset="0x8" name="RESERVED2" wmask="0x330F" bvalue="0x0000" cmask="0x330F" />
+
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0003" cmask="0x0007" >
+    <mask name="GWRP" value="0x0001" >
+      <value value="0x0000" name="All" cname="0xFFFE" />
+      <value value="0x0001" name="Off" cname="_" />
+    </mask>
+    <mask name="GCP"  value="0x0002" >
+      <value value="0x0000" name="All" cname="CODE_PROT_ON"  />
+      <value value="0x0002" name="Off" cname="CODE_PROT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="sdip soic" nb_pins="28" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+  </package>
+
+  <package types="qfn"       nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F4013.xml b/src/devices/pic/xml_data/30F4013.xml
new file mode 100644
index 0000000..1732e6e
--- /dev/null
+++ b/src/devices/pic/xml_data/30F4013.xml
@@ -0,0 +1,290 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F4013" document="010345" status="IP" memory_technology="FLASH" architecture="30F" id="0x0141" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="10" vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="20" end="30" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="15" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="15" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x007FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FFC00" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC71F" bvalue="0xC71F" >
+    <mask name="FOSFPR" value="0x071F" >
+      <value value="default" name="invalid" />
+      <value value="0x001F" name="TMR1"         cname="LP"        />
+      <value value="0x011F" name="INTRC_F"      cname="FRC"        />
+      <value value="0x021F" name="INTRC_LP"     cname="LPRC"       />
+      <value value="0x0701" name="FRC4"         cname="FRC_PLL4"   />
+      <value value="0x0703" name="FRC16"        cname="FRC_PLL16"  />
+      <value value="0x0705" name="XT4"          cname="XT_PLL4"    />
+      <value value="0x0706" name="XT8"          cname="XT_PLL8"    />
+      <value value="0x0707" name="XT16"         cname="XT_PLL16"   />
+      <value value="0x070A" name="FRC8"         cname="FRC_PLL8"   />
+      <value value="0x070D" name="EC4"          cname="ECIO_PLL4"  />
+      <value value="0x070E" name="EC8"          cname="ECIO_PLL8"  />
+      <value value="0x070F" name="EC16"         cname="ECIO_PLL16" />
+      <value value="0x0711" name="HS2_4"        cname="HS2_PLL4"   />
+      <value value="0x0712" name="HS2_8"        cname="HS2_PLL8"   />
+      <value value="0x0713" name="HS2_16"       cname="HS2_PLL16"  />
+      <value value="0x0715" name="HS3_4"        cname="HS3_PLL4"   />
+      <value value="0x0716" name="HS3_8"        cname="HS3_PLL8"   />
+      <value value="0x0717" name="HS3_16"       cname="HS3_PLL16"  />
+    </mask>
+    <mask name="FCKSM"  value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="0x8000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+      <value value="0xC000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x80B3" cmask="0x87B3" >
+    <mask name="FPWRT" value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"  value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN" value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="MCLRE" value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="RESERVED1" wmask="0x310F" bvalue="0x0000" cmask="0x310F" />
+
+  <config offset="0x8" name="RESERVED2" wmask="0x330F" bvalue="0x0000" cmask="0x330F" />
+
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0003" cmask="0x0007" >
+    <mask name="GWRP" value="0x0001" >
+      <value value="0x0000" name="All" cname="0xFFFE" />
+      <value value="0x0001" name="Off" cname="_" />
+    </mask>
+    <mask name="GCP"  value="0x0002" >
+      <value value="0x0000" name="All" cname="CODE_PROT_ON"  />
+      <value value="0x0002" name="Off" cname="CODE_PROT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="pdip" nb_pins="40" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+  </package>
+
+  <package types="qfn"  nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+  <package types="tqfp" nb_pins="44" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F5011.xml b/src/devices/pic/xml_data/30F5011.xml
new file mode 100644
index 0000000..a1f311d
--- /dev/null
+++ b/src/devices/pic/xml_data/30F5011.xml
@@ -0,0 +1,276 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F5011" document="010346" status="IP" memory_technology="FLASH" architecture="30F" id="0x0080" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="7.5" vdd_min="2.5"  vdd_max="5.5" />
+    <frequency start="7.5" end="15"  vdd_min="3"    vdd_max="5.5" />
+    <frequency start="15"  end="30"  vdd_min="4.75" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="10" vdd_min="3"    vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.75" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x00AFFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FFC00" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC" wmask="0xC30F" bvalue="0xC30F" cmask="0xC10F" >
+    <mask name="FPR"   value="0x000F" >
+      <value value="0x0000" name="XTL"          cname="XTL"      />
+      <value value="0x0001" name="XTL"          cname="XTL"      />
+      <value value="0x0002" name="HS"           cname="HS"       />
+      <value value="0x0003" name="HS"           cname="HS"       />
+      <value value="0x0004" name="XT"           cname="XTL"      />
+      <value value="0x0005" name="XT4"          cname="XT_PLL4"  />
+      <value value="0x0006" name="XT8"          cname="XT_PLL8"  />
+      <value value="0x0007" name="XT16"         cname="XT_PLL16" />
+      <value value="0x0008" name="EXTRC_IO"     cname="ERCIO"    />
+      <value value="0x0009" name="EXTRC_CLKOUT" cname="ERC"      />
+      <value value="0x000A" name="FRC8"         cname="FRC_PLL8" />
+      <value value="0x000B" name="EC_CLKOUT"    cname="EC"       />
+      <value value="0x000C" name="EC_IO"        cname="ECIO"     />
+      <value value="0x000D" name="EC4"          cname="EC_PLL4"  />
+      <value value="0x000E" name="EC8"          cname="EC_PLL8"  />
+      <value value="0x000F" name="EC16"         cname="EC_PLL16" />
+    </mask>
+    <mask name="FOS"   value="0x0300" >
+      <value value="0x0000" name="TMR1"     cname="EXT" />
+      <value value="0x0100" name="INTRC_F"  cname="FRC" />
+      <value value="0x0200" name="INTRC_LP" cname="LP"  />
+      <value value="0x0300" name="PRIM"     cname="_"    />
+    </mask>
+    <mask name="FCKSM" value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="0x8000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+      <value value="0xC000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x80B3" cmask="0x87B3" >
+    <mask name="FPWRT" value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"  value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN" value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="MCLRE" value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FBS"       wmask="0x310F" bvalue="0x310F" >
+    <mask name="WRTBS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_BOOT_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_BOOT_OFF" />
+    </mask>
+    <mask name="BSSEC" value="0x0008" >
+      <value value="0x0000" name="High Security"     cname="" />
+      <value value="0x0008" name="Standard Security" cname="" />
+    </mask>
+    <mask name="BSSIZ"  value="0x0006" >
+      <value value="0x0000" name="4196" cname=""  />
+      <value value="0x0002" name="2048" cname="" />
+      <value value="0x0004" name="512"  cname="" />
+      <value value="0x0006" name="0"    cname="" />
+    </mask>
+    <mask name="EBSSIZ" value="0x0100" >
+      <value value="0x0000" name="128" cname="SMALL_BOOT_EEPROM" />
+      <value value="0x0100" name="0"   cname="NO_BOOT_EEPROM" />
+    </mask>
+    <mask name="RBSSIZ"  value="0x3000" >
+      <value value="0x0000" name="512" cname="LAR_BOOT_RAM"  />
+      <value value="0x1000" name="256" cname="MED_BOOT_RAM" />
+      <value value="0x2000" name="128" cname="SMALL_BOOT_RAM" />
+      <value value="0x3000" name="0"   cname="NO_BOOT_RAM" />
+    </mask>
+  </config>
+
+  <config offset="0x8" name="FSS"       wmask="0x330F" bvalue="0x330F" >
+    <mask name="WRTSS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_SEC_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_SEC_OFF" />
+    </mask>
+    <mask name="SSSEC"  value="0x0008" >
+      <value value="0x0000" name="High Security"     cname=""  />
+      <value value="0x0008" name="Standard Security" cname="" />
+    </mask>
+    <mask name="SSSIZ"  value="0x0006" >
+      <value value="0x0000" name="16384" cname=""  />
+      <value value="0x0002" name="8192"  cname="" />
+      <value value="0x0004" name="4096"  cname="" />
+      <value value="0x0006" name="0"     cname="" />
+    </mask>
+    <mask name="ESSSIZ" value="0x0300" >
+      <value value="0x0000" name="512" cname="LAR_SEC_EEPROM" />
+      <value value="0x0100" name="256" cname="MED_SEC_EEPROM" />
+      <value value="0x0200" name="128" cname="SMALL_SEC_EEPROM" />
+      <value value="0x0300" name="0"   cname="NO_SEC_EEPROM" />
+    </mask>
+    <mask name="RSSSIZ"  value="0x3000" >
+      <value value="0x0000" name="1024" cname="LAR_SEC_RAM"  />
+      <value value="0x1000" name="768" cname="MED_SEC_RAM" />
+      <value value="0x2000" name="256" cname="SMALL_SEC_RAM" />
+      <value value="0x3000" name="0"   cname="NO_SEC_RAM" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0007" >
+    <mask name="WRTGS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_GEN_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_GEN_OFF" />
+    </mask>
+    <mask name="GSSEC"  value="0x0006" >
+      <value value="default" name="High Security"     cname="HIGH_PROT"  />
+      <value value="0x0004" name="Standard Security" cname="STAND_PROT" />
+      <value value="0x0006" name="Off"               cname="GEN_PROT"  />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F5013.xml b/src/devices/pic/xml_data/30F5013.xml
new file mode 100644
index 0000000..debd97f
--- /dev/null
+++ b/src/devices/pic/xml_data/30F5013.xml
@@ -0,0 +1,292 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F5013" document="010347" status="IP" memory_technology="FLASH" architecture="30F" id="0x0081" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="7.5" vdd_min="2.5"  vdd_max="5.5" />
+    <frequency start="7.5" end="15"  vdd_min="3"    vdd_max="5.5" />
+    <frequency start="15"  end="30"  vdd_min="4.75" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="10" vdd_min="3"    vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.75" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x00AFFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FFC00" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC30F" bvalue="0xC30F" cmask="0xC10F" >
+    <mask name="FPR"   value="0x000F" >
+      <value value="0x0000" name="XTL"          cname="XTL"      />
+      <value value="0x0001" name="XTL"          cname="XTL"      />
+      <value value="0x0002" name="HS"           cname="HS"       />
+      <value value="0x0003" name="HS"           cname="HS"       />
+      <value value="0x0004" name="XT"           cname="XTL"      />
+      <value value="0x0005" name="XT4"          cname="XT_PLL4"  />
+      <value value="0x0006" name="XT8"          cname="XT_PLL8"  />
+      <value value="0x0007" name="XT16"         cname="XT_PLL16" />
+      <value value="0x0008" name="EXTRC_IO"     cname="ERCIO"    />
+      <value value="0x0009" name="EXTRC_CLKOUT" cname="ERC"      />
+      <value value="0x000A" name="FRC8"         cname="FRC_PLL8" />
+      <value value="0x000B" name="EC_CLKOUT"    cname="EC"       />
+      <value value="0x000C" name="EC_IO"        cname="ECIO"     />
+      <value value="0x000D" name="EC4"          cname="EC_PLL4"  />
+      <value value="0x000E" name="EC8"          cname="EC_PLL8"  />
+      <value value="0x000F" name="EC16"         cname="EC_PLL16" />
+    </mask>
+    <mask name="FOS"   value="0x0300" >
+      <value value="0x0000" name="TMR1"     cname="EXT" />
+      <value value="0x0100" name="INTRC_F"  cname="FRC" />
+      <value value="0x0200" name="INTRC_LP" cname="LP"  />
+      <value value="0x0300" name="PRIM"     cname="_"    />
+    </mask>
+    <mask name="FCKSM" value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="0x8000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+      <value value="0xC000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x80B3" cmask="0x87B3" >
+    <mask name="FPWRT" value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"  value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN" value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="MCLRE" value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FBS"       wmask="0x310F" bvalue="0x310F" >
+    <mask name="WRTBS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_BOOT_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_BOOT_OFF" />
+    </mask>
+    <mask name="BSSEC" value="0x0008" >
+      <value value="0x0000" name="High Security"     cname="" />
+      <value value="0x0008" name="Standard Security" cname="" />
+    </mask>
+    <mask name="BSSIZ"  value="0x0006" >
+      <value value="0x0000" name="4096" cname=""  />
+      <value value="0x0002" name="2048" cname="" />
+      <value value="0x0004" name="512" cname="" />
+      <value value="0x0006" name="0"    cname="" />
+    </mask>
+    <mask name="EBSSIZ" value="0x0100" >
+      <value value="0x0000" name="128" cname="SMALL_BOOT_EEPROM" />
+      <value value="0x0100" name="0"   cname="NO_BOOT_EEPROM" />
+    </mask>
+    <mask name="RBSSIZ"  value="0x3000" >
+      <value value="0x0000" name="512" cname="LAR_BOOT_RAM"  />
+      <value value="0x1000" name="256" cname="MED_BOOT_RAM" />
+      <value value="0x2000" name="128" cname="SMALL_BOOT_RAM" />
+      <value value="0x3000" name="0"   cname="NO_BOOT_RAM" />
+    </mask>
+  </config>
+
+  <config offset="0x8" name="FSS"       wmask="0x330F" bvalue="0x330F" >
+    <mask name="WRTSS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_SEC_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_SEC_OFF" />
+    </mask>
+    <mask name="SSSEC"  value="0x0008" >
+      <value value="0x0000" name="High Security"     cname=""  />
+      <value value="0x0008" name="Standard Security" cname="" />
+    </mask>
+    <mask name="SSSIZ"  value="0x0006" >
+      <value value="0x0000" name="16384" cname=""  />
+      <value value="0x0002" name="8192" cname="" />
+      <value value="0x0004" name="4096"  cname="" />
+      <value value="0x0006" name="0"     cname="" />
+    </mask>
+    <mask name="ESSSIZ" value="0x0300" >
+      <value value="0x0000" name="512" cname="LAR_SEC_EEPROM" />
+      <value value="0x0100" name="256" cname="MED_SEC_EEPROM" />
+      <value value="0x0200" name="128" cname="SMALL_SEC_EEPROM" />
+      <value value="0x0300" name="0"   cname="NO_SEC_EEPROM" />
+    </mask>
+    <mask name="RSSSIZ"  value="0x3000" >
+      <value value="0x0000" name="1024" cname="LAR_SEC_RAM"  />
+      <value value="0x1000" name="768" cname="MED_SEC_RAM" />
+      <value value="0x2000" name="256" cname="SMALL_SEC_RAM" />
+      <value value="0x3000" name="0"   cname="NO_SEC_RAM" />
+    </mask>
+  </config>
+
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0007" >
+    <mask name="WRTGS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_GEN_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_GEN_OFF" />
+    </mask>
+    <mask name="GSSEC"  value="0x0006" >
+      <value value="default" name="High Security"     cname="HIGH_PROT"  />
+      <value value="0x0004" name="Standard Security" cname="STAND_PROT" />
+      <value value="0x0006" name="Off"               cname="GEN_PROT"  />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F5015.xml b/src/devices/pic/xml_data/30F5015.xml
new file mode 100644
index 0000000..af7c20a
--- /dev/null
+++ b/src/devices/pic/xml_data/30F5015.xml
@@ -0,0 +1,232 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F5015" document="010339" status="IP" memory_technology="FLASH" architecture="30F" id="0x0200" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="10" vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="20" end="30" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="15" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="15" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x00AFFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FFC00" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC71F" bvalue="0xC71F" >
+    <mask name="FOSFPR" value="0x071F" >
+      <value value="default" name="invalid" />
+      <value value="0x001F" name="TMR1"         cname="LP"        />
+      <value value="0x011F" name="INTRC_F"      cname="FRC"        />
+      <value value="0x021F" name="INTRC_LP"     cname="LPRC"       />
+      <value value="0x0701" name="FRC4"         cname="FRC_PLL4"   />
+      <value value="0x0703" name="FRC16"        cname="FRC_PLL16"  />
+      <value value="0x0705" name="XT4"          cname="XT_PLL4"    />
+      <value value="0x0706" name="XT8"          cname="XT_PLL8"    />
+      <value value="0x0707" name="XT16"         cname="XT_PLL16"   />
+      <value value="0x070A" name="FRC8"         cname="FRC_PLL8"   />
+      <value value="0x070D" name="EC4"          cname="ECIO_PLL4"  />
+      <value value="0x070E" name="EC8"          cname="ECIO_PLL8"  />
+      <value value="0x070F" name="EC16"         cname="ECIO_PLL16" />
+      <value value="0x0711" name="HS2_4"        cname="HS2_PLL4"   />
+      <value value="0x0712" name="HS2_8"        cname="HS2_PLL8"   />
+      <value value="0x0713" name="HS2_16"       cname="HS2_PLL16"  />
+      <value value="0x0715" name="HS3_4"        cname="HS3_PLL4"   />
+      <value value="0x0716" name="HS3_8"        cname="HS3_PLL8"   />
+      <value value="0x0717" name="HS3_16"       cname="HS3_PLL16"  />
+    </mask>
+    <mask name="FCKSM"  value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="0x8000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+      <value value="0xC000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x87B3" >
+    <mask name="FPWRT"  value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"   value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN"  value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="LPOL"   value="0x0100" >
+      <value value="0x0000" name="low"  cname="PWMxL_ACT_LO" />
+      <value value="0x0100" name="high" cname="PWMxL_ACT_HI" />
+    </mask>
+    <mask name="HPOL"   value="0x0200" >
+      <value value="0x0000" name="low"  cname="PWMxH_ACT_LO" />
+      <value value="0x0200" name="high" cname="PWMxH_ACT_HI" />
+    </mask>
+    <mask name="PWMPIN" value="0x0400" >
+      <value value="0x0000" name="On"  cname="RST_PWMPIN" />
+      <value value="0x0400" name="Off" cname="RST_IOPIN"  />
+    </mask>
+    <mask name="MCLRE"  value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="RESERVED1" wmask="0x310F" bvalue="0x0000" cmask="0x310F" />
+
+  <config offset="0x8" name="RESERVED2" wmask="0x330F" bvalue="0x0000" cmask="0x330F" />
+
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0003" cmask="0x0007" >
+    <mask name="GWRP" value="0x0001" >
+      <value value="0x0000" name="All" cname="0xFFFE" />
+      <value value="0x0001" name="Off" cname="_" />
+    </mask>
+    <mask name="GCP"  value="0x0002" >
+      <value value="0x0000" name="All" cname="CODE_PROT_ON"  />
+      <value value="0x0002" name="Off" cname="CODE_PROT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F5016.xml b/src/devices/pic/xml_data/30F5016.xml
new file mode 100644
index 0000000..aa2e7e1
--- /dev/null
+++ b/src/devices/pic/xml_data/30F5016.xml
@@ -0,0 +1,248 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F5016" document="024210" status="IP" memory_technology="FLASH" architecture="30F" id="0x0201" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="10" vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="20" end="30" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="15" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="15" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x00AFFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FFC00" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC71F" bvalue="0xC71F" >
+    <mask name="FOSFPR" value="0x071F" >
+      <value value="default" name="invalid" />
+      <value value="0x001F" name="TMR1"         cname="LP"        />
+      <value value="0x011F" name="INTRC_F"      cname="FRC"        />
+      <value value="0x021F" name="INTRC_LP"     cname="LPRC"       />
+      <value value="0x0701" name="FRC4"         cname="FRC_PLL4"   />
+      <value value="0x0703" name="FRC16"        cname="FRC_PLL16"  />
+      <value value="0x0705" name="XT4"          cname="XT_PLL4"    />
+      <value value="0x0706" name="XT8"          cname="XT_PLL8"    />
+      <value value="0x0707" name="XT16"         cname="XT_PLL16"   />
+      <value value="0x070A" name="FRC8"         cname="FRC_PLL8"   />
+      <value value="0x070D" name="EC4"          cname="ECIO_PLL4"  />
+      <value value="0x070E" name="EC8"          cname="ECIO_PLL8"  />
+      <value value="0x070F" name="EC16"         cname="ECIO_PLL16" />
+      <value value="0x0711" name="HS2_4"        cname="HS2_PLL4"   />
+      <value value="0x0712" name="HS2_8"        cname="HS2_PLL8"   />
+      <value value="0x0713" name="HS2_16"       cname="HS2_PLL16"  />
+      <value value="0x0715" name="HS3_4"        cname="HS3_PLL4"   />
+      <value value="0x0716" name="HS3_8"        cname="HS3_PLL8"   />
+      <value value="0x0717" name="HS3_16"       cname="HS3_PLL16"  />
+    </mask>
+    <mask name="FCKSM"  value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="0x8000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+      <value value="0xC000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x87B3" >
+    <mask name="FPWRT"  value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"   value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN"  value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="LPOL"   value="0x0100" >
+      <value value="0x0000" name="low"  cname="PWMxL_ACT_LO" />
+      <value value="0x0100" name="high" cname="PWMxL_ACT_HI" />
+    </mask>
+    <mask name="HPOL"   value="0x0200" >
+      <value value="0x0000" name="low"  cname="PWMxH_ACT_LO" />
+      <value value="0x0200" name="high" cname="PWMxH_ACT_HI" />
+    </mask>
+    <mask name="PWMPIN" value="0x0400" >
+      <value value="0x0000" name="On"  cname="RST_PWMPIN" />
+      <value value="0x0400" name="Off" cname="RST_IOPIN"  />
+    </mask>
+    <mask name="MCLRE"  value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="RESERVED1" wmask="0x310F" bvalue="0x0000" cmask="0x310F" />
+
+  <config offset="0x8" name="RESERVED2" wmask="0x330F" bvalue="0x0000" cmask="0x330F" />
+
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0003" cmask="0x0007" >
+    <mask name="GWRP" value="0x0001" >
+      <value value="0x0000" name="All" cname="0xFFFE" />
+      <value value="0x0001" name="Off" cname="_" />
+    </mask>
+    <mask name="GCP"  value="0x0002" >
+      <value value="0x0000" name="All" cname="CODE_PROT_ON"  />
+      <value value="0x0002" name="Off" cname="CODE_PROT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F6010.xml b/src/devices/pic/xml_data/30F6010.xml
new file mode 100644
index 0000000..8b26c7c
--- /dev/null
+++ b/src/devices/pic/xml_data/30F6010.xml
@@ -0,0 +1,252 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F6010" document="010330" status="Mature" alternative="30F6010A" memory_technology="FLASH" architecture="30F" id="0x0188" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="7.5" vdd_min="2.5"  vdd_max="5.5" />
+    <frequency start="7.5" end="15"  vdd_min="3"    vdd_max="5.5" />
+    <frequency start="15"  end="30"  vdd_min="4.75" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="10" vdd_min="3"    vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.75" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x017FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FF000" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC30F" bvalue="0xC30F" cmask="0xC10F" >
+    <mask name="FPR"   value="0x000F" >
+      <value value="0x0000" name="XTL"          cname="XTL"        />
+      <value value="0x0001" name="XTL"          cname="XTL"        />
+      <value value="0x0002" name="HS"           cname="HS"         />
+      <value value="0x0003" name="HS"           cname="HS"         />
+      <value value="0x0004" name="XT"           cname="XT"         />
+      <value value="0x0005" name="XT4"          cname="XT_PLL4"    />
+      <value value="0x0006" name="XT8"          cname="XT_PLL8"    />
+      <value value="0x0007" name="XT16"         cname="XT_PLL16"   />
+      <value value="0x0008" name="EXTRC_IO"     cname="ERCIO"      />
+      <value value="0x0009" name="EXTRC_CLKOUT" cname="ERC"        />
+      <value value="0x000A" name="invalid" />
+      <value value="0x000B" name="EC_CLKOUT"    cname="EC"         />
+      <value value="0x000C" name="EC_IO"        cname="ECIO"       />
+      <value value="0x000D" name="EC4"          cname="ECIO_PLL4"  />
+      <value value="0x000E" name="EC8"          cname="ECIO_PLL8"  />
+      <value value="0x000F" name="EC16"         cname="ECIO_PLL16" />
+    </mask>
+    <mask name="FOS"   value="0x0300" >
+      <value value="0x0000" name="TMR1"     cname="EXT" />
+      <value value="0x0100" name="INTRC_F"  cname="FRC" />
+      <value value="0x0200" name="INTRC_LP" cname="LP"  />
+      <value value="0x0300" name="PRIM"     cname="_"    />
+    </mask>
+    <mask name="FCKSM" value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="0x8000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+      <value value="0xC000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x87B3" >
+    <mask name="FPWRT"  value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"   value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN"  value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="LPOL"   value="0x0100" >
+      <value value="0x0000" name="low"  cname="PWMxL_ACT_LO" />
+      <value value="0x0100" name="high" cname="PWMxL_ACT_HI" />
+    </mask>
+    <mask name="HPOL"   value="0x0200" >
+      <value value="0x0000" name="low"  cname="PWMxH_ACT_LO" />
+      <value value="0x0200" name="high" cname="PWMxH_ACT_HI" />
+    </mask>
+    <mask name="PWMPIN" value="0x0400" >
+      <value value="0x0000" name="On"  cname="RST_PWMPIN" />
+      <value value="0x0400" name="Off" cname="RST_IO"     />
+    </mask>
+    <mask name="MCLRE"  value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="RESERVED1" wmask="0x310F" bvalue="0x0000" cmask="0x310F" />
+
+  <config offset="0x8" name="RESERVED2" wmask="0x330F" bvalue="0x0000" cmask="0x330F" />
+
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0003" cmask="0x0007" >
+    <mask name="GWRP" value="0x0001" >
+      <value value="0x0000" name="All" cname="0xFFFE" />
+      <value value="0x0001" name="Off" cname="_" />
+    </mask>
+    <mask name="GCP"  value="0x0002" >
+      <value value="0x0000" name="All" cname="CODE_PROT_ON"  />
+      <value value="0x0002" name="Off" cname="CODE_PROT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F6010A.xml b/src/devices/pic/xml_data/30F6010A.xml
new file mode 100644
index 0000000..2f5e976
--- /dev/null
+++ b/src/devices/pic/xml_data/30F6010A.xml
@@ -0,0 +1,308 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F6010A" document="025842" status="IP" memory_technology="FLASH" architecture="30F" id="0x0281" >
+
+<!--* Checksums ************************************************************-->
+<!--  <checksums>
+    <checksum protected="Off"           bchecksum="0xC406" cchecksum="0xC208" />
+    <checksum protected="High Securiry" bchecksum="0x0404" cchecksum="0x0404" />
+  </checksums>
+-->
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="10" vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="20" end="30" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="15" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="15" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x017FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FF000" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC71F" bvalue="0xC71F" cmask="0xC10F">
+    <mask name="FOSFPR" value="0x071F" >
+      <value value="default" name="invalid" />
+      <value value="0x001F" name="TMR1"         cname="LP"        />
+      <value value="0x011F" name="INTRC_F"      cname="FRC"        />
+      <value value="0x021F" name="INTRC_LP"     cname="LPRC"       />
+      <value value="0x0701" name="FRC4"         cname="FRC_PLL4"   />
+      <value value="0x0703" name="FRC16"        cname="FRC_PLL16"  />
+      <value value="0x0705" name="XT4"          cname="XT_PLL4"    />
+      <value value="0x0706" name="XT8"          cname="XT_PLL8"    />
+      <value value="0x0707" name="XT16"         cname="XT_PLL16"   />
+      <value value="0x070A" name="FRC8"         cname="FRC_PLL8"   />
+      <value value="0x070D" name="EC4"          cname="ECIO_PLL4"  />
+      <value value="0x070E" name="EC8"          cname="ECIO_PLL8"  />
+      <value value="0x070F" name="EC16"         cname="ECIO_PLL16" />
+      <value value="0x0711" name="HS2_4"        cname="HS2_PLL4"   />
+      <value value="0x0712" name="HS2_8"        cname="HS2_PLL8"   />
+      <value value="0x0713" name="HS2_16"       cname="HS2_PLL16"  />
+      <value value="0x0715" name="HS3_4"        cname="HS3_PLL4"   />
+      <value value="0x0716" name="HS3_8"        cname="HS3_PLL8"   />
+      <value value="0x0717" name="HS3_16"       cname="HS3_PLL16"  />
+    </mask>
+    <mask name="FCKSM"  value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="0x8000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+      <value value="0xC000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x87B3" >
+    <mask name="FPWRT"  value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"   value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN"  value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="LPOL"   value="0x0100" >
+      <value value="0x0000" name="low"  cname="PWMxL_ACT_LO" />
+      <value value="0x0100" name="high" cname="PWMxL_ACT_HI" />
+    </mask>
+    <mask name="HPOL"   value="0x0200" >
+      <value value="0x0000" name="low"  cname="PWMxH_ACT_LO" />
+      <value value="0x0200" name="high" cname="PWMxH_ACT_HI" />
+    </mask>
+    <mask name="PWMPIN" value="0x0400" >
+      <value value="0x0000" name="On"  cname="RST_PWMPIN" />
+      <value value="0x0400" name="Off" cname="RST_IOPIN"  />
+    </mask>
+    <mask name="MCLRE"  value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FBS"       wmask="0x310F" bvalue="0x310F" >
+    <mask name="WRTBS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_BOOT_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_BOOT_OFF" />
+    </mask>
+    <mask name="BSSEC" value="0x0008" >
+      <value value="0x0000" name="High Security"     cname="" />
+      <value value="0x0008" name="Standard Security" cname="" />
+    </mask>
+    <mask name="BSSIZ"  value="0x0006" >
+      <value value="0x0000" name="4096" cname=""  />
+      <value value="0x0002" name="2048" cname="" />
+      <value value="0x0004" name="512"  cname="" />
+      <value value="0x0006" name="0"    cname="" />
+    </mask>
+    <mask name="EBSSIZ" value="0x0100" >
+      <value value="0x0000" name="256" cname="SMALL_BOOT_EEPROM" />
+      <value value="0x0100" name="0"   cname="NO_BOOT_EEPROM" />
+    </mask>
+    <mask name="RBSSIZ"  value="0x3000" >
+      <value value="0x0000" name="1024" cname="LAR_BOOT_RAM"  />
+      <value value="0x1000" name="256" cname="MED_BOOT_RAM" />
+      <value value="0x2000" name="128" cname="SMALL_BOOT_RAM" />
+      <value value="0x3000" name="0"   cname="NO_BOOT_RAM" />
+    </mask>
+  </config>
+  
+  <config offset="0x8" name="FSS"       wmask="0x330F" bvalue="0x330F" >
+    <mask name="WRTSS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_SEC_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_SEC_OFF" />
+    </mask>
+    <mask name="SSSEC"  value="0x0008" >
+      <value value="0x0000" name="High Security"     cname=""  />
+      <value value="0x0008" name="Standard Security" cname="" />
+    </mask>
+    <mask name="SSSIZ"  value="0x0006" >
+      <value value="0x0000" name="16384" cname=""  />
+      <value value="0x0002" name="8192"  cname="" />
+      <value value="0x0004" name="4096"  cname="" />
+      <value value="0x0006" name="0"     cname="" />
+    </mask>
+    <mask name="ESSSIZ" value="0x0300" >
+      <value value="0x0000" name="1024" cname="LAR_SEC_EEPROM" />
+      <value value="0x0100" name="512" cname="MED_SEC_EEPROM" />
+      <value value="0x0200" name="256" cname="SMALL_SEC_EEPROM" />
+      <value value="0x0300" name="0"   cname="NO_SEC_EEPROM" />
+    </mask>
+    <mask name="RSSSIZ"  value="0x3000" >
+      <value value="0x0000" name="4096" cname="LAR_SEC_RAM"  />
+      <value value="0x1000" name="2048" cname="MED_SEC_RAM" />
+      <value value="0x2000" name="256" cname="SMALL_SEC_RAM" />
+      <value value="0x3000" name="0"   cname="NO_SEC_RAM" />
+    </mask>
+  </config>
+  
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0007" >
+    <mask name="WRTGS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_GEN_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_GEN_OFF" />
+    </mask>
+    <mask name="GSSEC"  value="0x0006" >
+      <value value="default" name="High Security"     cname="HIGH_PROT"  />
+      <value value="0x0004" name="Standard Security" cname="STAND_PROT" />
+      <value value="0x0006" name="Off"               cname="GEN_PROT"  />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F6011.xml b/src/devices/pic/xml_data/30F6011.xml
new file mode 100644
index 0000000..60e6f5f
--- /dev/null
+++ b/src/devices/pic/xml_data/30F6011.xml
@@ -0,0 +1,224 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F6011" document="010331" status="Mature" alternative="30F6011A" memory_technology="FLASH" architecture="30F" id="0x0192" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="7.5" vdd_min="2.5"  vdd_max="5.5" />
+    <frequency start="7.5" end="15"  vdd_min="3"    vdd_max="5.5" />
+    <frequency start="15"  end="30"  vdd_min="4.75" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="10" vdd_min="3"    vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.75" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x015FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FF800" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x8005BF" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC30F" bvalue="0xC30F" cmask="0xC10F" >
+    <mask name="FPR"   value="0x000F" >
+      <value value="0x0000" name="XTL"          cname="XTL"        />
+      <value value="0x0001" name="XTL"          cname="XTL"        />
+      <value value="0x0002" name="HS"           cname="HS"         />
+      <value value="0x0003" name="HS"           cname="HS"         />
+      <value value="0x0004" name="XT"           cname="XT"         />
+      <value value="0x0005" name="XT4"          cname="XT_PLL4"    />
+      <value value="0x0006" name="XT8"          cname="XT_PLL8"    />
+      <value value="0x0007" name="XT16"         cname="XT_PLL16"   />
+      <value value="0x0008" name="EXTRC_IO"     cname="ERCIO"      />
+      <value value="0x0009" name="EXTRC_CLKOUT" cname="ERC"        />
+      <value value="0x000A" name="invalid" />
+      <value value="0x000B" name="EC_CLKOUT"    cname="EC"         />
+      <value value="0x000C" name="EC_IO"        cname="ECIO"       />
+      <value value="0x000D" name="EC4"          cname="ECIO_PLL4"  />
+      <value value="0x000E" name="EC8"          cname="ECIO_PLL8"  />
+      <value value="0x000F" name="EC16"         cname="ECIO_PLL16" />
+    </mask>
+    <mask name="FOS"   value="0x0300" >
+      <value value="0x0000" name="TMR1"     cname="EXT" />
+      <value value="0x0100" name="INTRC_F"  cname="FRC" />
+      <value value="0x0200" name="INTRC_LP" cname="LP"  />
+      <value value="0x0300" name="PRIM"     cname="_"    />
+    </mask>
+    <mask name="FCKSM" value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="0x8000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+      <value value="0xC000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x80B3" cmask="0x87B3" >
+    <mask name="FPWRT" value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"  value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN" value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="MCLRE" value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="RESERVED1" wmask="0x310F" bvalue="0x0000" cmask="0x310F" />
+
+  <config offset="0x8" name="RESERVED2" wmask="0x330F" bvalue="0x0000" cmask="0x330F" />
+
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0003" cmask="0x0007" >
+    <mask name="GWRP" value="0x0001" >
+      <value value="0x0000" name="All" cname="0xFFFE" />
+      <value value="0x0001" name="Off" cname="_" />
+    </mask>
+    <mask name="GCP"  value="0x0002" >
+      <value value="0x0000" name="All" cname="CODE_PROT_ON"  />
+      <value value="0x0002" name="Off" cname="CODE_PROT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F6011A.xml b/src/devices/pic/xml_data/30F6011A.xml
new file mode 100644
index 0000000..bb499b1
--- /dev/null
+++ b/src/devices/pic/xml_data/30F6011A.xml
@@ -0,0 +1,273 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F6011A" document="024762" status="IP" memory_technology="FLASH" architecture="30F" id="0x02C0" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="10" vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="20" end="30" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="15" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="15" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x015FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FF800" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC71F" bvalue="0xC71F" >
+    <mask name="FOSFPR" value="0x071F" >
+      <value value="default" name="invalid" />
+      <value value="0x001F" name="TMR1"         cname="LP"        />
+      <value value="0x011F" name="INTRC_F"      cname="FRC"        />
+      <value value="0x021F" name="INTRC_LP"     cname="LPRC"       />
+      <value value="0x0701" name="FRC4"         cname="FRC_PLL4"   />
+      <value value="0x0703" name="FRC16"        cname="FRC_PLL16"  />
+      <value value="0x0705" name="XT4"          cname="XT_PLL4"    />
+      <value value="0x0706" name="XT8"          cname="XT_PLL8"    />
+      <value value="0x0707" name="XT16"         cname="XT_PLL16"   />
+      <value value="0x070A" name="FRC8"         cname="FRC_PLL8"   />
+      <value value="0x070D" name="EC4"          cname="ECIO_PLL4"  />
+      <value value="0x070E" name="EC8"          cname="ECIO_PLL8"  />
+      <value value="0x070F" name="EC16"         cname="ECIO_PLL16" />
+      <value value="0x0711" name="HS2_4"        cname="HS2_PLL4"   />
+      <value value="0x0712" name="HS2_8"        cname="HS2_PLL8"   />
+      <value value="0x0713" name="HS2_16"       cname="HS2_PLL16"  />
+      <value value="0x0715" name="HS3_4"        cname="HS3_PLL4"   />
+      <value value="0x0716" name="HS3_8"        cname="HS3_PLL8"   />
+      <value value="0x0717" name="HS3_16"       cname="HS3_PLL16"  />
+    </mask>
+    <mask name="FCKSM"  value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="0x8000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+      <value value="0xC000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x80B3" cmask="0x87B3" >
+    <mask name="FPWRT" value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"  value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN" value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="MCLRE" value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FBS"       wmask="0x310F" bvalue="0x310F" >
+    <mask name="WRTBS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_BOOT_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_BOOT_OFF" />
+    </mask>
+    <mask name="BSSEC" value="0x0008" >
+      <value value="0x0000" name="High Security"     cname="" />
+      <value value="0x0008" name="Standard Security" cname="" />
+    </mask>
+    <mask name="BSSIZ"  value="0x0006" >
+      <value value="0x0000" name="4096" cname=""  />
+      <value value="0x0002" name="2048" cname="" />
+      <value value="0x0004" name="512"  cname="" />
+      <value value="0x0006" name="0"    cname="" />
+    </mask>
+    <mask name="EBSSIZ" value="0x0100" >
+      <value value="0x0000" name="256" cname="SMALL_BOOT_EEPROM" />
+      <value value="0x0100" name="0"   cname="NO_BOOT_EEPROM" />
+    </mask>
+    <mask name="RBSSIZ"  value="0x3000" >
+      <value value="0x0000" name="1024" cname="LAR_BOOT_RAM"  />
+      <value value="0x1000" name="256" cname="MED_BOOT_RAM" />
+      <value value="0x2000" name="128" cname="SMALL_BOOT_RAM" />
+      <value value="0x3000" name="0"   cname="NO_BOOT_RAM" />
+    </mask>
+  </config>
+  
+  <config offset="0x8" name="FSS"       wmask="0x330F" bvalue="0x330F" >
+    <mask name="WRTSS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_SEC_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_SEC_OFF" />
+    </mask>
+    <mask name="SSSEC"  value="0x0008" >
+      <value value="0x0000" name="High Security"     cname=""  />
+      <value value="0x0008" name="Standard Security" cname="" />
+    </mask>
+    <mask name="SSSIZ"  value="0x0006" >
+      <value value="0x0000" name="16384" cname=""  />
+      <value value="0x0002" name="8192"  cname="" />
+      <value value="0x0004" name="4096"  cname="" />
+      <value value="0x0006" name="0"     cname="" />
+    </mask>
+    <mask name="ESSSIZ" value="0x0300" >
+      <value value="0x0000" name="1024" cname="LAR_SEC_EEPROM" />
+      <value value="0x0100" name="512" cname="MED_SEC_EEPROM" />
+      <value value="0x0200" name="256" cname="SMALL_SEC_EEPROM" />
+      <value value="0x0300" name="0"   cname="NO_SEC_EEPROM" />
+    </mask>
+    <mask name="RSSSIZ"  value="0x3000" >
+      <value value="0x0000" name="4096" cname="LAR_SEC_RAM"  />
+      <value value="0x1000" name="2048" cname="MED_SEC_RAM" />
+      <value value="0x2000" name="256" cname="SMALL_SEC_RAM" />
+      <value value="0x3000" name="0"   cname="NO_SEC_RAM" />
+    </mask>
+  </config>
+  
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0007" >
+    <mask name="WRTGS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_GEN_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_GEN_OFF" />
+    </mask>
+    <mask name="GSSEC"  value="0x0006" >
+      <value value="default" name="High Security"     cname="HIGH_PROT"  />
+      <value value="0x0004" name="Standard Security" cname="STAND_PROT" />
+      <value value="0x0006" name="Off"               cname="GEN_PROT"  />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F6012.xml b/src/devices/pic/xml_data/30F6012.xml
new file mode 100644
index 0000000..e7c1797
--- /dev/null
+++ b/src/devices/pic/xml_data/30F6012.xml
@@ -0,0 +1,224 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F6012" document="010332" status="Mature" alternative="30F6012A" memory_technology="FLASH" architecture="30F" id="0x0193" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="7.5" vdd_min="2.5"  vdd_max="5.5" />
+    <frequency start="7.5" end="15"  vdd_min="3"    vdd_max="5.5" />
+    <frequency start="15"  end="30"  vdd_min="4.75" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="10" vdd_min="3"    vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.75" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x017FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FF000" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC30F" bvalue="0xC30F" cmask="0xC10F" >
+    <mask name="FPR"   value="0x000F" >
+      <value value="0x0000" name="XTL"          cname="XTL"        />
+      <value value="0x0001" name="XTL"          cname="XTL"        />
+      <value value="0x0002" name="HS"           cname="HS"         />
+      <value value="0x0003" name="HS"           cname="HS"         />
+      <value value="0x0004" name="XT"           cname="XT"         />
+      <value value="0x0005" name="XT4"          cname="XT_PLL4"    />
+      <value value="0x0006" name="XT8"          cname="XT_PLL8"    />
+      <value value="0x0007" name="XT16"         cname="XT_PLL16"   />
+      <value value="0x0008" name="EXTRC_IO"     cname="ERCIO"      />
+      <value value="0x0009" name="EXTRC_CLKOUT" cname="ERC"        />
+      <value value="0x000A" name="invalid" />
+      <value value="0x000B" name="EC_CLKOUT"    cname="EC"         />
+      <value value="0x000C" name="EC_IO"        cname="ECIO"       />
+      <value value="0x000D" name="EC4"          cname="ECIO_PLL4"  />
+      <value value="0x000E" name="EC8"          cname="ECIO_PLL8"  />
+      <value value="0x000F" name="EC16"         cname="ECIO_PLL16" />
+    </mask>
+    <mask name="FOS"   value="0x0300" >
+      <value value="0x0000" name="TMR1"     cname="EXT" />
+      <value value="0x0100" name="INTRC_F"  cname="FRC" />
+      <value value="0x0200" name="INTRC_LP" cname="LP"  />
+      <value value="0x0300" name="PRIM"     cname="_"    />
+    </mask>
+    <mask name="FCKSM" value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="0x8000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+      <value value="0xC000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x80B3" cmask="0x87B3" >
+    <mask name="FPWRT" value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"  value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN" value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="MCLRE" value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="RESERVED1" wmask="0x310F" bvalue="0x0000" cmask="0x310F" />
+
+  <config offset="0x8" name="RESERVED2" wmask="0x330F" bvalue="0x0000" cmask="0x330F" />
+
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0003" cmask="0x0007" >
+    <mask name="GWRP" value="0x0001" >
+      <value value="0x0000" name="All" cname="0xFFFE" />
+      <value value="0x0001" name="Off" cname="_" />
+    </mask>
+    <mask name="GCP"  value="0x0002" >
+      <value value="0x0000" name="All" cname="CODE_PROT_ON"  />
+      <value value="0x0002" name="Off" cname="CODE_PROT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F6012A.xml b/src/devices/pic/xml_data/30F6012A.xml
new file mode 100644
index 0000000..6dd84fb
--- /dev/null
+++ b/src/devices/pic/xml_data/30F6012A.xml
@@ -0,0 +1,273 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F6012A" document="024764" status="IP" memory_technology="FLASH" architecture="30F" id="0x02C2" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="10" vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="20" end="30" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="15" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="15" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x017FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FF000" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC71F" bvalue="0xC71F" >
+    <mask name="FOSFPR" value="0x071F" >
+      <value value="default" name="invalid" />
+      <value value="0x001F" name="TMR1"         cname="LP"        />
+      <value value="0x011F" name="INTRC_F"      cname="FRC"        />
+      <value value="0x021F" name="INTRC_LP"     cname="LPRC"       />
+      <value value="0x0701" name="FRC4"         cname="FRC_PLL4"   />
+      <value value="0x0703" name="FRC16"        cname="FRC_PLL16"  />
+      <value value="0x0705" name="XT4"          cname="XT_PLL4"    />
+      <value value="0x0706" name="XT8"          cname="XT_PLL8"    />
+      <value value="0x0707" name="XT16"         cname="XT_PLL16"   />
+      <value value="0x070A" name="FRC8"         cname="FRC_PLL8"   />
+      <value value="0x070D" name="EC4"          cname="ECIO_PLL4"  />
+      <value value="0x070E" name="EC8"          cname="ECIO_PLL8"  />
+      <value value="0x070F" name="EC16"         cname="ECIO_PLL16" />
+      <value value="0x0711" name="HS2_4"        cname="HS2_PLL4"   />
+      <value value="0x0712" name="HS2_8"        cname="HS2_PLL8"   />
+      <value value="0x0713" name="HS2_16"       cname="HS2_PLL16"  />
+      <value value="0x0715" name="HS3_4"        cname="HS3_PLL4"   />
+      <value value="0x0716" name="HS3_8"        cname="HS3_PLL8"   />
+      <value value="0x0717" name="HS3_16"       cname="HS3_PLL16"  />
+    </mask>
+    <mask name="FCKSM"  value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="0x8000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+      <value value="0xC000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x80B3" cmask="0x87B3" >
+    <mask name="FPWRT" value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"  value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN" value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="MCLRE" value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FBS"       wmask="0x310F" bvalue="0x310F" >
+    <mask name="WRTBS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_BOOT_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_BOOT_OFF" />
+    </mask>
+    <mask name="BSSEC" value="0x0008" >
+      <value value="0x0000" name="High Security"     cname="" />
+      <value value="0x0008" name="Standard Security" cname="" />
+    </mask>
+    <mask name="BSSIZ"  value="0x0006" >
+      <value value="0x0000" name="4096" cname=""  />
+      <value value="0x0002" name="2048" cname="" />
+      <value value="0x0004" name="512"  cname="" />
+      <value value="0x0006" name="0"    cname="" />
+    </mask>
+    <mask name="EBSSIZ" value="0x0100" >
+      <value value="0x0000" name="256" cname="SMALL_BOOT_EEPROM" />
+      <value value="0x0100" name="0"   cname="NO_BOOT_EEPROM" />
+    </mask>
+    <mask name="RBSSIZ"  value="0x3000" >
+      <value value="0x0000" name="1024" cname="LAR_BOOT_RAM"  />
+      <value value="0x1000" name="256" cname="MED_BOOT_RAM" />
+      <value value="0x2000" name="128" cname="SMALL_BOOT_RAM" />
+      <value value="0x3000" name="0"   cname="NO_BOOT_RAM" />
+    </mask>
+  </config>
+  
+  <config offset="0x8" name="FSS"       wmask="0x330F" bvalue="0x330F" >
+    <mask name="WRTSS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_SEC_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_SEC_OFF" />
+    </mask>
+    <mask name="SSSEC"  value="0x0008" >
+      <value value="0x0000" name="High Security"     cname=""  />
+      <value value="0x0008" name="Standard Security" cname="" />
+    </mask>
+    <mask name="SSSIZ"  value="0x0006" >
+      <value value="0x0000" name="16384" cname=""  />
+      <value value="0x0002" name="8192"  cname="" />
+      <value value="0x0004" name="4096"  cname="" />
+      <value value="0x0006" name="0"     cname="" />
+    </mask>
+    <mask name="ESSSIZ" value="0x0300" >
+      <value value="0x0000" name="1024" cname="LAR_SEC_EEPROM" />
+      <value value="0x0100" name="512" cname="MED_SEC_EEPROM" />
+      <value value="0x0200" name="256" cname="SMALL_SEC_EEPROM" />
+      <value value="0x0300" name="0"   cname="NO_SEC_EEPROM" />
+    </mask>
+    <mask name="RSSSIZ"  value="0x3000" >
+      <value value="0x0000" name="4096" cname="LAR_SEC_RAM"  />
+      <value value="0x1000" name="2048" cname="MED_SEC_RAM" />
+      <value value="0x2000" name="256" cname="SMALL_SEC_RAM" />
+      <value value="0x3000" name="0"   cname="NO_SEC_RAM" />
+    </mask>
+  </config>
+  
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0007" >
+    <mask name="WRTGS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_GEN_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_GEN_OFF" />
+    </mask>
+    <mask name="GSSEC"  value="0x0006" >
+      <value value="default" name="High Security"     cname="HIGH_PROT"  />
+      <value value="0x0004" name="Standard Security" cname="STAND_PROT" />
+      <value value="0x0006" name="Off"               cname="GEN_PROT"  />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F6013.xml b/src/devices/pic/xml_data/30F6013.xml
new file mode 100644
index 0000000..34b66cf
--- /dev/null
+++ b/src/devices/pic/xml_data/30F6013.xml
@@ -0,0 +1,240 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F6013" document="010333" status="Mature" alternative="30F6013A" memory_technology="FLASH" architecture="30F" id="0x0197" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="7.5" vdd_min="2.5"  vdd_max="5.5" />
+    <frequency start="7.5" end="15"  vdd_min="3"    vdd_max="5.5" />
+    <frequency start="15"  end="30"  vdd_min="4.75" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="10" vdd_min="3"    vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.75" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x015FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FF800" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC30F" bvalue="0xC30F" cmask="0xC10F" >
+    <mask name="FPR"   value="0x000F" >
+      <value value="0x0000" name="XTL"          cname="XTL"        />
+      <value value="0x0001" name="XTL"          cname="XTL"        />
+      <value value="0x0002" name="HS"           cname="HS"         />
+      <value value="0x0003" name="HS"           cname="HS"         />
+      <value value="0x0004" name="XT"           cname="XT"         />
+      <value value="0x0005" name="XT4"          cname="XT_PLL4"    />
+      <value value="0x0006" name="XT8"          cname="XT_PLL8"    />
+      <value value="0x0007" name="XT16"         cname="XT_PLL16"   />
+      <value value="0x0008" name="EXTRC_IO"     cname="ERCIO"      />
+      <value value="0x0009" name="EXTRC_CLKOUT" cname="ERC"        />
+      <value value="0x000A" name="invalid" />
+      <value value="0x000B" name="EC_CLKOUT"    cname="EC"         />
+      <value value="0x000C" name="EC_IO"        cname="ECIO"       />
+      <value value="0x000D" name="EC4"          cname="ECIO_PLL4"  />
+      <value value="0x000E" name="EC8"          cname="ECIO_PLL8"  />
+      <value value="0x000F" name="EC16"         cname="ECIO_PLL16" />
+    </mask>
+    <mask name="FOS"   value="0x0300" >
+      <value value="0x0000" name="TMR1"     cname="EXT" />
+      <value value="0x0100" name="INTRC_F"  cname="FRC" />
+      <value value="0x0200" name="INTRC_LP" cname="LP"  />
+      <value value="0x0300" name="PRIM"     cname="_"    />
+    </mask>
+    <mask name="FCKSM" value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="0x8000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+      <value value="0xC000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x80B3" cmask="0x87B3" >
+    <mask name="FPWRT" value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"  value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN" value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="MCLRE" value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="RESERVED1" wmask="0x310F" bvalue="0x0000" cmask="0x310F" />
+
+  <config offset="0x8" name="RESERVED2" wmask="0x330F" bvalue="0x0000" cmask="0x330F" />
+
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0003" cmask="0x0007" >
+    <mask name="GWRP" value="0x0001" >
+      <value value="0x0000" name="All" cname="0xFFFE" />
+      <value value="0x0001" name="Off" cname="_" />
+    </mask>
+    <mask name="GCP"  value="0x0002" >
+      <value value="0x0000" name="All" cname="CODE_PROT_ON"  />
+      <value value="0x0002" name="Off" cname="CODE_PROT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F6013A.xml b/src/devices/pic/xml_data/30F6013A.xml
new file mode 100644
index 0000000..e0a5758
--- /dev/null
+++ b/src/devices/pic/xml_data/30F6013A.xml
@@ -0,0 +1,289 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F6013A" document="024765" status="IP" memory_technology="FLASH" architecture="30F" id="0x02C1" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="10" vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="20" end="30" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="15" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="15" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x015FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FF800" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC71F" bvalue="0xC71F" >
+    <mask name="FOSFPR" value="0x071F" >
+      <value value="default" name="invalid" />
+      <value value="0x001F" name="TMR1"         cname="LP"        />
+      <value value="0x011F" name="INTRC_F"      cname="FRC"        />
+      <value value="0x021F" name="INTRC_LP"     cname="LPRC"       />
+      <value value="0x0701" name="FRC4"         cname="FRC_PLL4"   />
+      <value value="0x0703" name="FRC16"        cname="FRC_PLL16"  />
+      <value value="0x0705" name="XT4"          cname="XT_PLL4"    />
+      <value value="0x0706" name="XT8"          cname="XT_PLL8"    />
+      <value value="0x0707" name="XT16"         cname="XT_PLL16"   />
+      <value value="0x070A" name="FRC8"         cname="FRC_PLL8"   />
+      <value value="0x070D" name="EC4"          cname="ECIO_PLL4"  />
+      <value value="0x070E" name="EC8"          cname="ECIO_PLL8"  />
+      <value value="0x070F" name="EC16"         cname="ECIO_PLL16" />
+      <value value="0x0711" name="HS2_4"        cname="HS2_PLL4"   />
+      <value value="0x0712" name="HS2_8"        cname="HS2_PLL8"   />
+      <value value="0x0713" name="HS2_16"       cname="HS2_PLL16"  />
+      <value value="0x0715" name="HS3_4"        cname="HS3_PLL4"   />
+      <value value="0x0716" name="HS3_8"        cname="HS3_PLL8"   />
+      <value value="0x0717" name="HS3_16"       cname="HS3_PLL16"  />
+    </mask>
+    <mask name="FCKSM"  value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="0x8000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+      <value value="0xC000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x80B3" cmask="0x87B3" >
+    <mask name="FPWRT" value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"  value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN" value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="MCLRE" value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FBS"       wmask="0x310F" bvalue="0x310F" >
+    <mask name="WRTBS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_BOOT_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_BOOT_OFF" />
+    </mask>
+    <mask name="BSSEC" value="0x0008" >
+      <value value="0x0000" name="High Security"     cname="" />
+      <value value="0x0008" name="Standard Security" cname="" />
+    </mask>
+    <mask name="BSSIZ"  value="0x0006" >
+      <value value="0x0000" name="4096" cname=""  />
+      <value value="0x0002" name="2048" cname="" />
+      <value value="0x0004" name="512"  cname="" />
+      <value value="0x0006" name="0"    cname="" />
+    </mask>
+    <mask name="EBSSIZ" value="0x0100" >
+      <value value="0x0000" name="256" cname="SMALL_BOOT_EEPROM" />
+      <value value="0x0100" name="0"   cname="NO_BOOT_EEPROM" />
+    </mask>
+    <mask name="RBSSIZ"  value="0x3000" >
+      <value value="0x0000" name="1024" cname="LAR_BOOT_RAM"  />
+      <value value="0x1000" name="256" cname="MED_BOOT_RAM" />
+      <value value="0x2000" name="128" cname="SMALL_BOOT_RAM" />
+      <value value="0x3000" name="0"   cname="NO_BOOT_RAM" />
+    </mask>
+  </config>
+  
+  <config offset="0x8" name="FSS"       wmask="0x330F" bvalue="0x330F" >
+    <mask name="WRTSS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_SEC_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_SEC_OFF" />
+    </mask>
+    <mask name="SSSEC"  value="0x0008" >
+      <value value="0x0000" name="High Security"     cname=""  />
+      <value value="0x0008" name="Standard Security" cname="" />
+    </mask>
+    <mask name="SSSIZ"  value="0x0006" >
+      <value value="0x0000" name="16384" cname=""  />
+      <value value="0x0002" name="8192"  cname="" />
+      <value value="0x0004" name="4096"  cname="" />
+      <value value="0x0006" name="0"     cname="" />
+    </mask>
+    <mask name="ESSSIZ" value="0x0300" >
+      <value value="0x0000" name="1024" cname="LAR_SEC_EEPROM" />
+      <value value="0x0100" name="512" cname="MED_SEC_EEPROM" />
+      <value value="0x0200" name="256" cname="SMALL_SEC_EEPROM" />
+      <value value="0x0300" name="0"   cname="NO_SEC_EEPROM" />
+    </mask>
+    <mask name="RSSSIZ"  value="0x3000" >
+      <value value="0x0000" name="4096" cname="LAR_SEC_RAM"  />
+      <value value="0x1000" name="2048" cname="MED_SEC_RAM" />
+      <value value="0x2000" name="256" cname="SMALL_SEC_RAM" />
+      <value value="0x3000" name="0"   cname="NO_SEC_RAM" />
+    </mask>
+  </config>
+  
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0007" >
+    <mask name="WRTGS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_GEN_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_GEN_OFF" />
+    </mask>
+    <mask name="GSSEC"  value="0x0006" >
+      <value value="default" name="High Security"     cname="HIGH_PROT"  />
+      <value value="0x0004" name="Standard Security" cname="STAND_PROT" />
+      <value value="0x0006" name="Off"               cname="GEN_PROT"  />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F6014.xml b/src/devices/pic/xml_data/30F6014.xml
new file mode 100644
index 0000000..8cf7766
--- /dev/null
+++ b/src/devices/pic/xml_data/30F6014.xml
@@ -0,0 +1,240 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F6014" document="010334" status="Mature" alternative="30F6014A" memory_technology="FLASH" architecture="30F" id="0x0198" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"   end="7.5" vdd_min="2.5"  vdd_max="5.5" />
+    <frequency start="7.5" end="15"  vdd_min="3"    vdd_max="5.5" />
+    <frequency start="15"  end="30"  vdd_min="4.75" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="10" vdd_min="3"    vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="4.75" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"            min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog"       min="4.5" max="5.5"   nominal="5"  />
+  <voltages name="vdd_prog_write" min="2.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x017FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FF000" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC30F" bvalue="0xC30F" cmask="0xC10F" >
+    <mask name="FPR"   value="0x000F" >
+      <value value="0x0000" name="XTL"          cname="XTL"        />
+      <value value="0x0001" name="XTL"          cname="XTL"        />
+      <value value="0x0002" name="HS"           cname="HS"         />
+      <value value="0x0003" name="HS"           cname="HS"         />
+      <value value="0x0004" name="XT"           cname="XT"         />
+      <value value="0x0005" name="XT4"          cname="XT_PLL4"    />
+      <value value="0x0006" name="XT8"          cname="XT_PLL8"    />
+      <value value="0x0007" name="XT16"         cname="XT_PLL16"   />
+      <value value="0x0008" name="EXTRC_IO"     cname="ERCIO"      />
+      <value value="0x0009" name="EXTRC_CLKOUT" cname="ERC"        />
+      <value value="0x000A" name="invalid" />
+      <value value="0x000B" name="EC_CLKOUT"    cname="EC"         />
+      <value value="0x000C" name="EC_IO"        cname="ECIO"       />
+      <value value="0x000D" name="EC4"          cname="ECIO_PLL4"  />
+      <value value="0x000E" name="EC8"          cname="ECIO_PLL8"  />
+      <value value="0x000F" name="EC16"         cname="ECIO_PLL16" />
+    </mask>
+    <mask name="FOS"   value="0x0300" >
+      <value value="0x0000" name="TMR1"     cname="EXT" />
+      <value value="0x0100" name="INTRC_F"  cname="FRC" />
+      <value value="0x0200" name="INTRC_LP" cname="LP"  />
+      <value value="0x0300" name="PRIM"     cname="_"    />
+    </mask>
+    <mask name="FCKSM" value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="0x8000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+      <value value="0xC000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x80B3" cmask="0x87B3" >
+    <mask name="FPWRT" value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"  value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN" value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="MCLRE" value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="RESERVED1" wmask="0x310F" bvalue="0x0000" cmask="0x310F" />
+
+  <config offset="0x8" name="RESERVED2" wmask="0x330F" bvalue="0x0000" cmask="0x330F" />
+
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0003" cmask="0x0007" >
+    <mask name="GWRP" value="0x0001" >
+      <value value="0x0000" name="All" cname="0xFFFE" />
+      <value value="0x0001" name="Off" cname="_" />
+    </mask>
+    <mask name="GCP"  value="0x0002" >
+      <value value="0x0000" name="All" cname="CODE_PROT_ON"  />
+      <value value="0x0002" name="Off" cname="CODE_PROT_OFF" />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F6014A.xml b/src/devices/pic/xml_data/30F6014A.xml
new file mode 100644
index 0000000..c6a6efe
--- /dev/null
+++ b/src/devices/pic/xml_data/30F6014A.xml
@@ -0,0 +1,289 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F6014A" document="024766" status="IP" memory_technology="FLASH" architecture="30F" id="0x02C3" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="10" vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="20" end="30" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="15" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="15" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x017FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FF000" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC71F" bvalue="0xC71F" >
+    <mask name="FOSFPR" value="0x071F" >
+      <value value="default" name="invalid" />
+      <value value="0x001F" name="TMR1"         cname="LP"        />
+      <value value="0x011F" name="INTRC_F"      cname="FRC"        />
+      <value value="0x021F" name="INTRC_LP"     cname="LPRC"       />
+      <value value="0x0701" name="FRC4"         cname="FRC_PLL4"   />
+      <value value="0x0703" name="FRC16"        cname="FRC_PLL16"  />
+      <value value="0x0705" name="XT4"          cname="XT_PLL4"    />
+      <value value="0x0706" name="XT8"          cname="XT_PLL8"    />
+      <value value="0x0707" name="XT16"         cname="XT_PLL16"   />
+      <value value="0x070A" name="FRC8"         cname="FRC_PLL8"   />
+      <value value="0x070D" name="EC4"          cname="ECIO_PLL4"  />
+      <value value="0x070E" name="EC8"          cname="ECIO_PLL8"  />
+      <value value="0x070F" name="EC16"         cname="ECIO_PLL16" />
+      <value value="0x0711" name="HS2_4"        cname="HS2_PLL4"   />
+      <value value="0x0712" name="HS2_8"        cname="HS2_PLL8"   />
+      <value value="0x0713" name="HS2_16"       cname="HS2_PLL16"  />
+      <value value="0x0715" name="HS3_4"        cname="HS3_PLL4"   />
+      <value value="0x0716" name="HS3_8"        cname="HS3_PLL8"   />
+      <value value="0x0717" name="HS3_16"       cname="HS3_PLL16"  />
+    </mask>
+    <mask name="FCKSM"  value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="0x8000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+      <value value="0xC000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x80B3" cmask="0x87B3" >
+    <mask name="FPWRT" value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"  value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN" value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="MCLRE" value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FBS"       wmask="0x310F" bvalue="0x310F" >
+    <mask name="WRTBS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_BOOT_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_BOOT_OFF" />
+    </mask>
+    <mask name="BSSEC" value="0x0008" >
+      <value value="0x0000" name="High Security"     cname="" />
+      <value value="0x0008" name="Standard Security" cname="" />
+    </mask>
+    <mask name="BSSIZ"  value="0x0006" >
+      <value value="0x0000" name="4096" cname=""  />
+      <value value="0x0002" name="2048" cname="" />
+      <value value="0x0004" name="512"  cname="" />
+      <value value="0x0006" name="0"    cname="" />
+    </mask>
+    <mask name="EBSSIZ" value="0x0100" >
+      <value value="0x0000" name="256" cname="SMALL_BOOT_EEPROM" />
+      <value value="0x0100" name="0"   cname="NO_BOOT_EEPROM" />
+    </mask>
+    <mask name="RBSSIZ"  value="0x3000" >
+      <value value="0x0000" name="1024" cname="LAR_BOOT_RAM"  />
+      <value value="0x1000" name="256" cname="MED_BOOT_RAM" />
+      <value value="0x2000" name="128" cname="SMALL_BOOT_RAM" />
+      <value value="0x3000" name="0"   cname="NO_BOOT_RAM" />
+    </mask>
+  </config>
+  
+  <config offset="0x8" name="FSS"       wmask="0x330F" bvalue="0x330F" >
+    <mask name="WRTSS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_SEC_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_SEC_OFF" />
+    </mask>
+    <mask name="SSSEC"  value="0x0008" >
+      <value value="0x0000" name="High Security"     cname=""  />
+      <value value="0x0008" name="Standard Security" cname="" />
+    </mask>
+    <mask name="SSSIZ"  value="0x0006" >
+      <value value="0x0000" name="16384" cname=""  />
+      <value value="0x0002" name="8192"  cname="" />
+      <value value="0x0004" name="4096"  cname="" />
+      <value value="0x0006" name="0"     cname="" />
+    </mask>
+    <mask name="ESSSIZ" value="0x0300" >
+      <value value="0x0000" name="1024" cname="LAR_SEC_EEPROM" />
+      <value value="0x0100" name="512" cname="MED_SEC_EEPROM" />
+      <value value="0x0200" name="256" cname="SMALL_SEC_EEPROM" />
+      <value value="0x0300" name="0"   cname="NO_SEC_EEPROM" />
+    </mask>
+    <mask name="RSSSIZ"  value="0x3000" >
+      <value value="0x0000" name="4096" cname="LAR_SEC_RAM"  />
+      <value value="0x1000" name="2048" cname="MED_SEC_RAM" />
+      <value value="0x2000" name="256" cname="SMALL_SEC_RAM" />
+      <value value="0x3000" name="0"   cname="NO_SEC_RAM" />
+    </mask>
+  </config>
+  
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0007" >
+    <mask name="WRTGS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_GEN_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_GEN_OFF" />
+    </mask>
+    <mask name="GSSEC"  value="0x0006" >
+      <value value="default" name="High Security"     cname="HIGH_PROT"  />
+      <value value="0x0004" name="Standard Security" cname="STAND_PROT" />
+      <value value="0x0006" name="Off"               cname="GEN_PROT"  />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="80" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+    <pin index="65" name="" />
+    <pin index="66" name="" />
+    <pin index="67" name="" />
+    <pin index="68" name="" />
+    <pin index="69" name="" />
+    <pin index="70" name="" />
+    <pin index="71" name="" />
+    <pin index="72" name="" />
+    <pin index="73" name="" />
+    <pin index="74" name="" />
+    <pin index="75" name="" />
+    <pin index="76" name="" />
+    <pin index="77" name="" />
+    <pin index="78" name="" />
+    <pin index="79" name="" />
+    <pin index="80" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/30F6015.xml b/src/devices/pic/xml_data/30F6015.xml
new file mode 100644
index 0000000..784f38d
--- /dev/null
+++ b/src/devices/pic/xml_data/30F6015.xml
@@ -0,0 +1,285 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!--************************************************************************-->
+<!--* Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>            *-->
+<!--*                                                                      *-->
+<!--* This program is free software; you can redistribute it and/or modify *-->
+<!--* it under the terms of the GNU General Public License as published by *-->
+<!--* the Free Software Foundation; either version 2 of the License, or    *-->
+<!--* (at your option) any later version.                                  *-->
+<!--************************************************************************-->
+<device name="30F6015" document="025864" status="IP" memory_technology="FLASH" architecture="30F" id="0x0280" >
+
+<!--* Operating characteristics ********************************************-->
+  <frequency_range name="industrial" >
+    <frequency start="0"  end="10" vdd_min="2.5" vdd_max="5.5" />
+    <frequency start="10" end="20" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="20" end="30" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+  <frequency_range name="extended"   >
+    <frequency start="0"  end="15" vdd_min="3"   vdd_max="5.5" />
+    <frequency start="15" end="20" vdd_min="4.5" vdd_max="5.5" />
+  </frequency_range>
+
+  <voltages name="vpp"      min="9"   max="13.25" nominal="13" />
+  <voltages name="vdd_prog" min="4.5" max="5.5"   nominal="5"  />
+
+<!--* Memory ***************************************************************-->
+  <memory name="code"           start="0x000000" end="0x017FFF" />
+  <memory name="device_id"         start="0xFF0000" end="0xFF0004" />
+  <memory name="config"            start="0xF80000" end="0xF8000D" />
+  <memory name="eeprom"            start="0x7FF000" end="0x7FFFFF" />
+  <memory name="user_ids"          start="0x8005C0" end="0x8005FF" rmask="0xFFFFFF" />
+  <memory name="debug_vector"      start="0x800000" end="0x800007" />
+  <memory name="program_executive" start="0x800000" end="0x80053F" />
+
+<!--* Configuration bits ***************************************************-->
+  <config offset="0x0" name="FOSC"      wmask="0xC71F" bvalue="0xC71F" >
+    <mask name="FOSFPR" value="0x071F" >
+      <value value="default" name="invalid" />
+      <value value="0x001F" name="TMR1"         cname="LP"        />
+      <value value="0x011F" name="INTRC_F"      cname="FRC"        />
+      <value value="0x021F" name="INTRC_LP"     cname="LPRC"       />
+      <value value="0x0701" name="FRC4"         cname="FRC_PLL4"   />
+      <value value="0x0703" name="FRC16"        cname="FRC_PLL16"  />
+      <value value="0x0705" name="XT4"          cname="XT_PLL4"    />
+      <value value="0x0706" name="XT8"          cname="XT_PLL8"    />
+      <value value="0x0707" name="XT16"         cname="XT_PLL16"   />
+      <value value="0x070A" name="FRC8"         cname="FRC_PLL8"   />
+      <value value="0x070D" name="EC4"          cname="ECIO_PLL4"  />
+      <value value="0x070E" name="EC8"          cname="ECIO_PLL8"  />
+      <value value="0x070F" name="EC16"         cname="ECIO_PLL16" />
+      <value value="0x0711" name="HS2_4"        cname="HS2_PLL4"   />
+      <value value="0x0712" name="HS2_8"        cname="HS2_PLL8"   />
+      <value value="0x0713" name="HS2_16"       cname="HS2_PLL16"  />
+      <value value="0x0715" name="HS3_4"        cname="HS3_PLL4"   />
+      <value value="0x0716" name="HS3_8"        cname="HS3_PLL8"   />
+      <value value="0x0717" name="HS3_16"       cname="HS3_PLL16"  />
+    </mask>
+    <mask name="FCKSM"  value="0xC000" >
+      <value value="0x0000" name="Switching on, monitor on"   cname="CSW_FSCM_ON"     />
+      <value value="0x4000" name="Switching on, monitor off"  cname="CSW_ON_FSCM_OFF" />
+      <value value="0x8000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+      <value value="0xC000" name="Switching off, monitor off" cname="CSW_FSCM_OFF"    />
+    </mask>
+  </config>
+
+  <config offset="0x2" name="FWDT"      wmask="0x803F" bvalue="0x803F" >
+    <mask name="FWPSB"  value="0x000F" >
+      <value value="0x0000" name="1:1"  cname="WDTPSB_1"  />
+      <value value="0x0001" name="1:2"  cname="WDTPSB_2"  />
+      <value value="0x0002" name="1:3"  cname="WDTPSB_3"  />
+      <value value="0x0003" name="1:4"  cname="WDTPSB_4"  />
+      <value value="0x0004" name="1:5"  cname="WDTPSB_5"  />
+      <value value="0x0005" name="1:6"  cname="WDTPSB_6"  />
+      <value value="0x0006" name="1:7"  cname="WDTPSB_7"  />
+      <value value="0x0007" name="1:8"  cname="WDTPSB_8"  />
+      <value value="0x0008" name="1:9"  cname="WDTPSB_9"  />
+      <value value="0x0009" name="1:10" cname="WDTPSB_10" />
+      <value value="0x000A" name="1:11" cname="WDTPSB_11" />
+      <value value="0x000B" name="1:12" cname="WDTPSB_12" />
+      <value value="0x000C" name="1:13" cname="WDTPSB_13" />
+      <value value="0x000D" name="1:14" cname="WDTPSB_14" />
+      <value value="0x000E" name="1:15" cname="WDTPSB_15" />
+      <value value="0x000F" name="1:16" cname="WDTPSB_16" />
+    </mask>
+    <mask name="FWPSA"  value="0x0030" >
+      <value value="0x0000" name="1:1"   cname="WDTPSA_1"   />
+      <value value="0x0010" name="1:8"   cname="WDTPSA_8"   />
+      <value value="0x0020" name="1:64"  cname="WDTPSA_64"  />
+      <value value="0x0030" name="1:512" cname="WDTPSA_512" />
+    </mask>
+    <mask name="FWDTEN" value="0x8000" >
+      <value value="0x0000" name="Off" cname="WDT_OFF" />
+      <value value="0x8000" name="On"  cname="WDT_ON"  />
+    </mask>
+  </config>
+
+  <config offset="0x4" name="FBORPOR"   wmask="0x87B3" bvalue="0x87B3" >
+    <mask name="FPWRT"  value="0x0003" >
+      <value value="0x0000" name="0"  cname="PWRT_OFF" />
+      <value value="0x0001" name="4"  cname="PWRT_4"   />
+      <value value="0x0002" name="16" cname="PWRT_16"  />
+      <value value="0x0003" name="64" cname="PWRT_64"  />
+    </mask>
+    <mask name="BORV"   value="0x0030" >
+      <value value="0x0000" name="4.5" cname="BORV_45" />
+      <value value="0x0010" name="4.2" cname="BORV_42" />
+      <value value="0x0020" name="2.7" cname="BORV_27" />
+      <value value="0x0030" name="2.0" cname="BORV_20" />
+    </mask>
+    <mask name="BODEN"  value="0x0080" >
+      <value value="0x0000" name="Off" cname="PBOR_OFF" />
+      <value value="0x0080" name="On"  cname="PBOR_ON"  />
+    </mask>
+    <mask name="LPOL"   value="0x0100" >
+      <value value="0x0000" name="low"  cname="PWMxL_ACT_LO" />
+      <value value="0x0100" name="high" cname="PWMxL_ACT_HI" />
+    </mask>
+    <mask name="HPOL"   value="0x0200" >
+      <value value="0x0000" name="low"  cname="PWMxH_ACT_LO" />
+      <value value="0x0200" name="high" cname="PWMxH_ACT_HI" />
+    </mask>
+    <mask name="PWMPIN" value="0x0400" >
+      <value value="0x0000" name="On"  cname="RST_PWMPIN" />
+      <value value="0x0400" name="Off" cname="RST_IOPIN"  />
+    </mask>
+    <mask name="MCLRE"  value="0x8000" >
+      <value value="0x0000" name="Internal" cname="MCLR_DIS" />
+      <value value="0x8000" name="External" cname="MCLR_EN"  />
+    </mask>
+  </config>
+
+  <config offset="0x6" name="FBS"       wmask="0x310F" bvalue="0x310F" >
+    <mask name="WRTBS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_BOOT_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_BOOT_OFF" />
+    </mask>
+    <mask name="BSSEC" value="0x0008" >
+      <value value="0x0000" name="High Security"     cname="" />
+      <value value="0x0008" name="Standard Security" cname="" />
+    </mask>
+    <mask name="BSSIZ"  value="0x0006" >
+      <value value="0x0000" name="4096" cname=""  />
+      <value value="0x0002" name="2048" cname="" />
+      <value value="0x0004" name="512"  cname="" />
+      <value value="0x0006" name="0"    cname="" />
+    </mask>
+    <mask name="EBSSIZ" value="0x0100" >
+      <value value="0x0000" name="256" cname="SMALL_BOOT_EEPROM" />
+      <value value="0x0100" name="0"   cname="NO_BOOT_EEPROM" />
+    </mask>
+    <mask name="RBSSIZ"  value="0x3000" >
+      <value value="0x0000" name="1024" cname="LAR_BOOT_RAM"  />
+      <value value="0x1000" name="256" cname="MED_BOOT_RAM" />
+      <value value="0x2000" name="128" cname="SMALL_BOOT_RAM" />
+      <value value="0x3000" name="0"   cname="NO_BOOT_RAM" />
+    </mask>
+  </config>
+  
+  <config offset="0x8" name="FSS"       wmask="0x330F" bvalue="0x330F" >
+    <mask name="WRTSS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_SEC_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_SEC_OFF" />
+    </mask>
+    <mask name="SSSEC"  value="0x0008" >
+      <value value="0x0000" name="High Security"     cname=""  />
+      <value value="0x0008" name="Standard Security" cname="" />
+    </mask>
+    <mask name="SSSIZ"  value="0x0006" >
+      <value value="0x0000" name="16384" cname=""  />
+      <value value="0x0002" name="8192"  cname="" />
+      <value value="0x0004" name="4096"  cname="" />
+      <value value="0x0006" name="0"     cname="" />
+    </mask>
+    <mask name="ESSSIZ" value="0x0300" >
+      <value value="0x0000" name="1024" cname="LAR_SEC_EEPROM" />
+      <value value="0x0100" name="512" cname="MED_SEC_EEPROM" />
+      <value value="0x0200" name="256" cname="SMALL_SEC_EEPROM" />
+      <value value="0x0300" name="0"   cname="NO_SEC_EEPROM" />
+    </mask>
+    <mask name="RSSSIZ"  value="0x3000" >
+      <value value="0x0000" name="4096" cname="LAR_SEC_RAM"  />
+      <value value="0x1000" name="2048" cname="MED_SEC_RAM" />
+      <value value="0x2000" name="256" cname="SMALL_SEC_RAM" />
+      <value value="0x3000" name="0"   cname="NO_SEC_RAM" />
+    </mask>
+  </config>
+  
+  <config offset="0xA" name="FGS"       wmask="0x0007" bvalue="0x0007" >
+    <mask name="WRTGS" value="0x0001" >
+      <value value="0x0000" name="All" cname="WR_PROT_GEN_ON" />
+      <value value="0x0001" name="Off" cname="WR_PROT_GEN_OFF" />
+    </mask>
+    <mask name="GSSEC"  value="0x0006" >
+      <value value="default" name="High Security"     cname="HIGH_PROT"  />
+      <value value="0x0004" name="Standard Security" cname="STAND_PROT" />
+      <value value="0x0006" name="Off"               cname="GEN_PROT"  />
+    </mask>
+  </config>
+
+  <config offset="0xC" name="ICD"       wmask="0xC003" bvalue="0xC003" >
+    <mask name="ICS"   value="0x0003" >
+      <value value="0x0000" name="EMUC3, EMUD3"       cname="0xFFFC" />
+      <value value="0x0001" name="EMUC2, EMUD2"       cname="0xFFFD" />
+      <value value="0x0002" name="EMUC1, EMUD1"       cname="0xFFFE" />
+      <value value="0x0003" name="PGC/EMUC, PGD/EMUD" cname="_" />
+    </mask>
+    <mask name="COE"   value="0x4000" >
+      <value value="0x0000" name="On"  cname="0xBFFF" />
+      <value value="0x4000" name="Off" cname="_" />
+    </mask>
+    <mask name="DEBUG" value="0x8000" >
+      <value value="0x0000" name="On"  cname="0x7FFF" />
+      <value value="0x8000" name="Off" cname="_" />
+    </mask>
+  </config>
+
+<!--* Packages *************************************************************-->
+  <package types="tqfp" nb_pins="64" >
+    <pin index="1"  name="" />
+    <pin index="2"  name="" />
+    <pin index="3"  name="" />
+    <pin index="4"  name="" />
+    <pin index="5"  name="" />
+    <pin index="6"  name="" />
+    <pin index="7"  name="" />
+    <pin index="8"  name="" />
+    <pin index="9"  name="" />
+    <pin index="10" name="" />
+    <pin index="11" name="" />
+    <pin index="12" name="" />
+    <pin index="13" name="" />
+    <pin index="14" name="" />
+    <pin index="15" name="" />
+    <pin index="16" name="" />
+    <pin index="17" name="" />
+    <pin index="18" name="" />
+    <pin index="19" name="" />
+    <pin index="20" name="" />
+    <pin index="21" name="" />
+    <pin index="22" name="" />
+    <pin index="23" name="" />
+    <pin index="24" name="" />
+    <pin index="25" name="" />
+    <pin index="26" name="" />
+    <pin index="27" name="" />
+    <pin index="28" name="" />
+    <pin index="29" name="" />
+    <pin index="30" name="" />
+    <pin index="31" name="" />
+    <pin index="32" name="" />
+    <pin index="33" name="" />
+    <pin index="34" name="" />
+    <pin index="35" name="" />
+    <pin index="36" name="" />
+    <pin index="37" name="" />
+    <pin index="38" name="" />
+    <pin index="39" name="" />
+    <pin index="40" name="" />
+    <pin index="41" name="" />
+    <pin index="42" name="" />
+    <pin index="43" name="" />
+    <pin index="44" name="" />
+    <pin index="45" name="" />
+    <pin index="46" name="" />
+    <pin index="47" name="" />
+    <pin index="48" name="" />
+    <pin index="49" name="" />
+    <pin index="50" name="" />
+    <pin index="51" name="" />
+    <pin index="52" name="" />
+    <pin index="53" name="" />
+    <pin index="54" name="" />
+    <pin index="55" name="" />
+    <pin index="56" name="" />
+    <pin index="57" name="" />
+    <pin index="58" name="" />
+    <pin index="59" name="" />
+    <pin index="60" name="" />
+    <pin index="61" name="" />
+    <pin index="62" name="" />
+    <pin index="63" name="" />
+    <pin index="64" name="" />
+  </package>
+
+</device>
diff --git a/src/devices/pic/xml_data/Makefile.am b/src/devices/pic/xml_data/Makefile.am
new file mode 100644
index 0000000..43b13d4
--- /dev/null
+++ b/src/devices/pic/xml_data/Makefile.am
@@ -0,0 +1,12 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libpicxml.la
+libpicxml_la_SOURCES = pic_data.cpp
+libpicxml_la_DEPENDENCIES = pic_data.cpp
+
+include deps.mak
+noinst_DATA += registers/registers.xml registers/registers_missing.xml
+pic_data.cpp: ../xml/pic_xml_to_data $(noinst_DATA)
+	../xml/pic_xml_to_data
+CLEANFILES = pic_data.cpp
diff --git a/src/devices/pic/xml_data/deps.mak b/src/devices/pic/xml_data/deps.mak
new file mode 100644
index 0000000..ac8dcee
--- /dev/null
+++ b/src/devices/pic/xml_data/deps.mak
@@ -0,0 +1,43 @@
+noinst_DATA = \
+     10F200.xml 10F202.xml 10F204.xml 10F206.xml 10F220.xml 10F222.xml 12C508.xml 12C508A.xml 12C509.xml 12C509A.xml\
+     12C671.xml 12C672.xml 12CE518.xml 12CE519.xml 12CE673.xml 12CE674.xml 12CR509A.xml 12F508.xml 12F509.xml 12F510.xml\
+     12F519.xml 12F609.xml 12F615.xml 12F629.xml 12F635.xml 12F675.xml 12F683.xml 14000.xml 16C432.xml 16C433.xml\
+     16C505.xml 16C52.xml 16C54.xml 16C54A.xml 16C54B.xml 16C54C.xml 16C55.xml 16C554.xml 16C557.xml 16C558.xml\
+     16C55A.xml 16C56.xml 16C56A.xml 16C57.xml 16C57C.xml 16C58A.xml 16C58B.xml 16C61.xml 16C62.xml 16C620.xml\
+     16C620A.xml 16C621.xml 16C621A.xml 16C622.xml 16C622A.xml 16C62A.xml 16C62B.xml 16C63.xml 16C63A.xml 16C64.xml\
+     16C641.xml 16C642.xml 16C64A.xml 16C65.xml 16C65A.xml 16C65B.xml 16C66.xml 16C661.xml 16C662.xml 16C67.xml\
+     16C71.xml 16C710.xml 16C711.xml 16C712.xml 16C715.xml 16C716.xml 16C717.xml 16C72.xml 16C72A.xml 16C73.xml\
+     16C73A.xml 16C73B.xml 16C74.xml 16C745.xml 16C74A.xml 16C74B.xml 16C76.xml 16C765.xml 16C77.xml 16C770.xml\
+     16C771.xml 16C773.xml 16C774.xml 16C781.xml 16C782.xml 16C84.xml 16C923.xml 16C924.xml 16C925.xml 16C926.xml\
+     16CE623.xml 16CE624.xml 16CE625.xml 16CR54A.xml 16CR54B.xml 16CR54C.xml 16CR56A.xml 16CR57B.xml 16CR57C.xml 16CR58A.xml\
+     16CR58B.xml 16CR62.xml 16CR620A.xml 16CR63.xml 16CR64.xml 16CR65.xml 16CR72.xml 16CR73.xml 16CR74.xml 16CR76.xml\
+     16CR77.xml 16CR83.xml 16CR84.xml 16F505.xml 16F506.xml 16F54.xml 16F57.xml 16F59.xml 16F610.xml 16F616.xml\
+     16F627.xml 16F627A.xml 16F628.xml 16F628A.xml 16F630.xml 16F631.xml 16F636.xml 16F639.xml 16F648A.xml 16F676.xml\
+     16F677.xml 16F684.xml 16F685.xml 16F687.xml 16F688.xml 16F689.xml 16F690.xml 16F716.xml 16F72.xml 16F73.xml\
+     16F737.xml 16F74.xml 16F747.xml 16F76.xml 16F767.xml 16F77.xml 16F777.xml 16F785.xml 16F818.xml 16F819.xml\
+     16F83.xml 16F84.xml 16F84A.xml 16F87.xml 16F870.xml 16F871.xml 16F872.xml 16F873.xml 16F873A.xml 16F874.xml\
+     16F874A.xml 16F876.xml 16F876A.xml 16F877.xml 16F877A.xml 16F88.xml 16F882.xml 16F883.xml 16F884.xml 16F886.xml\
+     16F887.xml 16F913.xml 16F914.xml 16F916.xml 16F917.xml 16F946.xml 16HV540.xml 17C42.xml 17C42A.xml 17C43.xml\
+     17C44.xml 17C752.xml 17C756.xml 17C756A.xml 17C762.xml 17C766.xml 17CR42.xml 17CR43.xml 18C242.xml 18C252.xml\
+     18C442.xml 18C452.xml 18C601.xml 18C658.xml 18C801.xml 18C858.xml 18F1220.xml 18F1230.xml 18F1320.xml 18F1330.xml\
+     18F2220.xml 18F2221.xml 18F2320.xml 18F2321.xml 18F2331.xml 18F2410.xml 18F242.xml 18F2420.xml 18F2423.xml 18F2431.xml\
+     18F2439.xml 18F2450.xml 18F2455.xml 18F248.xml 18F2480.xml 18F24J10.xml 18F2510.xml 18F2515.xml 18F252.xml 18F2520.xml\
+     18F2523.xml 18F2525.xml 18F2539.xml 18F2550.xml 18F258.xml 18F2580.xml 18F2585.xml 18F25J10.xml 18F2610.xml 18F2620.xml\
+     18F2680.xml 18F2682.xml 18F2685.xml 18F4220.xml 18F4221.xml 18F4320.xml 18F4321.xml 18F4331.xml 18F4410.xml 18F442.xml\
+     18F4420.xml 18F4423.xml 18F4431.xml 18F4439.xml 18F4450.xml 18F4455.xml 18F448.xml 18F4480.xml 18F44J10.xml 18F4510.xml\
+     18F4515.xml 18F452.xml 18F4520.xml 18F4523.xml 18F4525.xml 18F4539.xml 18F4550.xml 18F458.xml 18F4580.xml 18F4585.xml\
+     18F45J10.xml 18F4610.xml 18F4620.xml 18F4680.xml 18F4682.xml 18F4685.xml 18F6310.xml 18F6390.xml 18F6393.xml 18F63J11.xml\
+     18F63J90.xml 18F6410.xml 18F6490.xml 18F6493.xml 18F64J11.xml 18F64J90.xml 18F6520.xml 18F6525.xml 18F6527.xml 18F6585.xml\
+     18F65J10.xml 18F65J11.xml 18F65J15.xml 18F65J50.xml 18F65J90.xml 18F6620.xml 18F6621.xml 18F6622.xml 18F6627.xml 18F6680.xml\
+     18F66J10.xml 18F66J11.xml 18F66J15.xml 18F66J16.xml 18F66J50.xml 18F66J55.xml 18F66J60.xml 18F66J65.xml 18F6720.xml 18F6722.xml\
+     18F67J10.xml 18F67J11.xml 18F67J50.xml 18F67J60.xml 18F8310.xml 18F8390.xml 18F8393.xml 18F83J11.xml 18F83J90.xml 18F8410.xml\
+     18F8490.xml 18F8493.xml 18F84J11.xml 18F84J90.xml 18F8520.xml 18F8525.xml 18F8527.xml 18F8585.xml 18F85J10.xml 18F85J11.xml\
+     18F85J15.xml 18F85J50.xml 18F85J90.xml 18F8620.xml 18F8621.xml 18F8622.xml 18F8627.xml 18F8680.xml 18F86J10.xml 18F86J11.xml\
+     18F86J15.xml 18F86J16.xml 18F86J50.xml 18F86J55.xml 18F86J60.xml 18F86J65.xml 18F8720.xml 18F8722.xml 18F87J10.xml 18F87J11.xml\
+     18F87J50.xml 18F87J60.xml 18F96J60.xml 18F96J65.xml 18F97J60.xml 24FJ128GA006.xml 24FJ128GA008.xml 24FJ128GA010.xml 24FJ64GA002.xml 24FJ64GA004.xml\
+     24FJ64GA006.xml 24FJ64GA008.xml 24FJ64GA010.xml 24FJ96GA006.xml 24FJ96GA008.xml 24FJ96GA010.xml 24HJ128GP206.xml 24HJ128GP210.xml 24HJ128GP306.xml 24HJ128GP310.xml\
+     24HJ128GP506.xml 24HJ128GP510.xml 24HJ12GP201.xml 24HJ12GP202.xml 24HJ16GP304.xml 24HJ256GP206.xml 24HJ256GP210.xml 24HJ256GP610.xml 24HJ32GP202.xml 24HJ32GP204.xml\
+     24HJ64GP206.xml 24HJ64GP210.xml 24HJ64GP506.xml 24HJ64GP510.xml 30F1010.xml 30F2010.xml 30F2011.xml 30F2012.xml 30F2020.xml 30F2023.xml\
+     30F3010.xml 30F3011.xml 30F3012.xml 30F3013.xml 30F3014.xml 30F4011.xml 30F4012.xml 30F4013.xml 30F5011.xml 30F5013.xml\
+     30F5015.xml 30F5016.xml 30F6010.xml 30F6010A.xml 30F6011.xml 30F6011A.xml 30F6012.xml 30F6012A.xml 30F6013.xml 30F6013A.xml\
+     30F6014.xml 30F6014A.xml 30F6015.xml
diff --git a/src/devices/pic/xml_data/pic.xsd b/src/devices/pic/xml_data/pic.xsd
new file mode 100644
index 0000000..f358f68
--- /dev/null
+++ b/src/devices/pic/xml_data/pic.xsd
@@ -0,0 +1,295 @@
+<?xml version="1.0"?>
+<xs:schema xmlns:xs="http://www.w3.org/2001/XMLSchema">
+
+<!-- simple types definition -->
+  <xs:simpleType name="hex">
+    <xs:restriction base="xs:string">
+      <xs:pattern value="0x[0-9A-F]+"/>
+    </xs:restriction>
+  </xs:simpleType>
+  <xs:simpleType name="hex4">
+    <xs:restriction base="hex">
+      <xs:length value="6"/>
+    </xs:restriction>
+  </xs:simpleType>
+
+  <xs:simpleType name="empty">
+    <xs:restriction base="xs:string">
+      <xs:length value="0"/>
+    </xs:restriction>
+  </xs:simpleType>
+
+  <xs:simpleType name="word">
+    <xs:restriction base="xs:string">
+      <xs:pattern value="[A-Za-z]+[A-Za-z0-9]*"/>
+    </xs:restriction>
+  </xs:simpleType>
+
+  <xs:simpleType name="status">
+    <xs:restriction base="xs:string">
+      <xs:enumeration value="EOL"/>
+      <xs:enumeration value="NR"/>
+      <xs:enumeration value="IP"/>
+      <xs:enumeration value="Future"/>
+      <xs:enumeration value="?"/>
+    </xs:restriction>
+  </xs:simpleType>
+
+  <xs:simpleType name="memory_technology">
+    <xs:restriction base="xs:string">
+      <xs:enumeration value="EE"/>
+      <xs:enumeration value="EEE"/>
+      <xs:enumeration value="EPROM"/>
+      <xs:enumeration value="ROM"/>
+    </xs:restriction>
+  </xs:simpleType>
+
+  <xs:simpleType name="architecture">
+    <xs:restriction base="xs:string">
+      <xs:enumeration value="10X"/>
+      <xs:enumeration value="16X"/>
+    </xs:restriction>
+  </xs:simpleType>
+
+  <xs:simpleType name="document_type">
+    <xs:restriction base="xs:string">
+      <xs:pattern value="[0-9]+"/>
+      <xs:pattern value="[?]"/>
+    </xs:restriction>
+  </xs:simpleType>
+  <xs:simpleType name="errata_type">
+    <xs:restriction base="xs:string">
+      <xs:pattern value="[0-9]+[a-z0-9]*"/>
+      <xs:pattern value="er[a-z0-9]+"/>
+    </xs:restriction>
+  </xs:simpleType>
+  <xs:simpleType name="erratas_type">
+    <xs:list itemType="errata_type"/>
+  </xs:simpleType>
+
+  <xs:simpleType name="checksum_type">
+    <xs:restriction base="xs:string">
+      <xs:enumeration value="XOR4"/>
+      <xs:enumeration value="XNOR7"/>
+    </xs:restriction>
+  </xs:simpleType>
+
+  <xs:simpleType name="frequency_type">
+    <xs:restriction base="xs:string">
+      <xs:enumeration value="commercial"/>
+      <xs:enumeration value="industrial"/>
+      <xs:enumeration value="extended"/>
+    </xs:restriction>
+  </xs:simpleType>
+  <xs:simpleType name="frequency_special">
+    <xs:restriction base="xs:string">
+      <xs:enumeration value="low power"/>
+      <xs:enumeration value="low voltage"/>
+    </xs:restriction>
+  </xs:simpleType>
+  <xs:simpleType name="frequency_value">
+    <xs:restriction base="xs:float">
+      <xs:minInclusive value="0.0"/>
+    </xs:restriction>
+  </xs:simpleType>
+
+  <xs:simpleType name="voltage_type">
+    <xs:restriction base="xs:string">
+      <xs:enumeration value="vpp"/>
+      <xs:enumeration value="vdd_prog"/>
+      <xs:enumeration value="vdd_prog_write"/>
+    </xs:restriction>
+  </xs:simpleType>
+  <xs:simpleType name="voltage_value">
+    <xs:restriction base="xs:float">
+      <xs:minExclusive value="0.0"/>
+    </xs:restriction>
+  </xs:simpleType>
+
+  <xs:simpleType name="memory_type">
+    <xs:restriction base="xs:string">
+      <xs:enumeration value="program"/>
+      <xs:enumeration value="eeprom"/>
+      <xs:enumeration value="calibration"/>
+      <xs:enumeration value="calibration_backup"/>
+      <xs:enumeration value="user_ids"/>
+      <xs:enumeration value="config"/>
+      <xs:enumeration value="device_id"/>
+      <xs:enumeration value="debug_vector"/>
+    </xs:restriction>
+  </xs:simpleType>
+  <xs:simpleType name="hexfile_offset_unknown">
+    <xs:restriction base="xs:string">
+      <xs:enumeration value="?"/>
+    </xs:restriction>
+  </xs:simpleType>
+  <xs:simpleType name="hexfile_offset">
+    <xs:union memberTypes="hex hexfile_offset_unknown"/>
+  </xs:simpleType>
+
+  <xs:simpleType name="value_default_value">
+    <xs:restriction base="xs:string">
+      <xs:enumeration value="default"/>
+    </xs:restriction>
+  </xs:simpleType>
+  <xs:simpleType name="value_value">
+    <xs:union memberTypes="hex value_default_value"/>
+  </xs:simpleType>
+  <xs:simpleType name="cname">
+    <xs:restriction base="xs:string">
+      <xs:pattern value="_[_0-9A-Za-z]+"/>
+    </xs:restriction>
+  </xs:simpleType>
+  <xs:simpleType name="cnames">
+    <xs:list itemType="cname"/>
+  </xs:simpleType>
+
+  <xs:simpleType name="pin_name">
+    <xs:restriction base="xs:string">
+      <xs:pattern value="[A-Z][A-Z0-9-+]*(/[A-Z][A-Z0-9-+]*)*"/>
+      <xs:pattern value="N/C"/>
+      <xs:pattern value=""/>
+    </xs:restriction>
+  </xs:simpleType>
+  <xs:simpleType name="pin_type">
+    <xs:restriction base="xs:string">
+      <xs:enumeration value="dfns"/>
+      <xs:enumeration value="mlf"/>
+      <xs:enumeration value="mqfp"/>
+      <xs:enumeration value="msop"/>
+      <xs:enumeration value="pdip"/>
+      <xs:enumeration value="plcc"/>
+      <xs:enumeration value="qfn"/>
+      <xs:enumeration value="sdip"/>
+      <xs:enumeration value="soic"/>
+      <xs:enumeration value="sot23"/>
+      <xs:enumeration value="spdip"/>
+      <xs:enumeration value="ssop"/>
+      <xs:enumeration value="tqfp"/>
+      <xs:enumeration value="tssop"/>
+    </xs:restriction>
+  </xs:simpleType>
+  <xs:simpleType name="pin_types">
+    <xs:list itemType="pin_type"/>
+  </xs:simpleType>
+
+<!-- complex types definition -->
+  <xs:complexType name="DocumentsType">
+    <xs:attribute name="webpage"       type="document_type" use="required"/>
+    <xs:attribute name="datasheet"     type="document_type" use="required"/>
+    <xs:attribute name="progsheet"     type="document_type" use="required"/>
+    <xs:attribute name="erratas"       type="erratas_type"  use="required"/>
+  </xs:complexType>
+
+  <xs:complexType name="ChecksumType">
+    <xs:attribute name="protected"       type="xs:string" />
+    <xs:attribute name="type"            type="checksum_type" />
+    <xs:attribute name="constant"        type="hex4" />
+    <xs:attribute name="block_protected" type="xs:nonNegativeInteger"/>
+    <xs:attribute name="bbsize"          type="xs:positiveInteger"/>
+    <xs:attribute name="mprotected"      type="word"/>
+    <xs:attribute name="bchecksum"       type="hex4" use="required"/>
+    <xs:attribute name="cchecksum"       type="hex4" use="required"/>
+  </xs:complexType>
+  <xs:complexType name="ChecksumsType">
+    <xs:sequence>
+      <xs:element name="checksum" type="ChecksumType" maxOccurs="unbounded"/>
+    </xs:sequence>
+  </xs:complexType>
+
+  <xs:complexType name="FrequencyType">
+    <xs:attribute name="start"       type="frequency_value" use="required"/>
+    <xs:attribute name="end"         type="frequency_value" use="required"/>
+    <xs:attribute name="vdd_min"     type="voltage_value"   use="required"/>
+    <xs:attribute name="vdd_min_end" type="voltage_value"                 />
+    <xs:attribute name="vdd_max"     type="voltage_value"   use="required"/>
+    <xs:attribute name="special"     type="xs:string"                     />
+    <xs:attribute name="osc"         type="xs:string"                     />
+  </xs:complexType>
+  <xs:complexType name="FrequencyRangeType">
+    <xs:sequence>
+      <xs:element name="frequency" type="FrequencyType" maxOccurs="unbounded"/>
+    </xs:sequence>
+    <xs:attribute name="name"    type="frequency_type"    use="required"/>
+    <xs:attribute name="special" type="frequency_special"               />
+  </xs:complexType>
+
+  <xs:complexType name="VoltagesType">
+    <xs:attribute name="name"    type="voltage_type"  use="required"/>
+    <xs:attribute name="min"     type="voltage_value" use="required"/>
+    <xs:attribute name="max"     type="voltage_value" use="required"/>
+    <xs:attribute name="nominal" type="voltage_value" use="required"/>
+  </xs:complexType>
+
+  <xs:complexType name="MemoryType">
+    <xs:attribute name="name"           type="memory_type"   use="required"/>
+    <xs:attribute name="start"          type="hex"           use="required"/>
+    <xs:attribute name="end"            type="hex"           use="required"/>
+    <xs:attribute name="cal_opmask"     type="hex"                         />
+    <xs:attribute name="cal_opcode"     type="hex"                         />
+    <xs:attribute name="rmask"          type="hex"                         />
+    <xs:attribute name="hexfile_offset" type="hexfile_offset"              />
+  </xs:complexType>
+
+  <xs:complexType name="ValueType">
+    <xs:attribute name="name"    type="xs:string"   use="required"/>
+    <xs:attribute name="value"   type="value_value" use="required"/>
+    <xs:attribute name="cname"   type="cnames"                    />
+    <xs:attribute name="ecnames" type="cnames"                    />
+  </xs:complexType>
+  <xs:complexType name="MaskType">
+    <xs:sequence>
+      <xs:element name="value" type="ValueType" maxOccurs="unbounded"/>
+    </xs:sequence>
+    <xs:attribute name="name"   type="word" use="required"/>
+    <xs:attribute name="value"  type="hex"  use="required"/>
+  </xs:complexType>
+  <xs:complexType name="ConfigType">
+    <xs:sequence>
+      <xs:element name="mask" type="MaskType" maxOccurs="unbounded"/>
+    </xs:sequence>
+    <xs:attribute name="name"    type="xs:string" use="required"/>
+    <xs:attribute name="offset"  type="hex"       use="required"/>
+    <xs:attribute name="wmask"   type="hex"       use="required"/>
+    <xs:attribute name="bvalue"  type="hex"       use="required"/>
+    <xs:attribute name="cmask"   type="hex"                     />
+    <xs:attribute name="pmask"   type="hex"                     />
+    <xs:attribute name="icnames" type="cnames"                  />
+  </xs:complexType>
+
+  <xs:complexType name="PinType">
+    <xs:attribute name="index" type="xs:positiveInteger" use="required"/>
+    <xs:attribute name="name"  type="pin_name"                         />
+  </xs:complexType>
+  <xs:complexType name="PackageType">
+    <xs:sequence>
+      <xs:element name="pin" type="PinType" maxOccurs="unbounded"/>
+    </xs:sequence>
+    <xs:attribute name="types"    type="pin_types"          use="required"/>
+    <xs:attribute name="nb_pins"  type="xs:positiveInteger" use="required"/>
+  </xs:complexType>
+
+<!-- document -->
+  <xs:complexType name="deviceType">
+    <xs:sequence>
+      <xs:element name="documents"       type="DocumentsType"      minOccurs="0"        />
+      <xs:element name="checksums"       type="ChecksumsType"      minOccurs="0"        />
+      <xs:element name="frequency_range" type="FrequencyRangeType" maxOccurs="unbounded"/>
+      <xs:element name="voltages"        type="VoltagesType"       maxOccurs="unbounded"/>
+      <xs:element name="memory"          type="MemoryType"         maxOccurs="unbounded"/>
+      <xs:element name="config"          type="ConfigType"         maxOccurs="unbounded"/>
+      <xs:element name="package"         type="PackageType"        maxOccurs="unbounded"/>
+    </xs:sequence>
+    <xs:attribute name="name"              type="xs:string"         use="required"/>
+    <xs:attribute name="alternative"       type="xs:string"                       />
+    <xs:attribute name="document"          type="document_type"                   />
+    <xs:attribute name="status"            type="status"            use="required"/>
+    <xs:attribute name="memory_technology" type="memory_technology" use="required"/>
+    <xs:attribute name="architecture"      type="architecture"      use="required"/>
+    <xs:attribute name="pc"                type="xs:positiveInteger"              />
+    <xs:attribute name="id"                type="hex4"                            />
+  </xs:complexType>
+
+  <xs:element name="device" type="deviceType"/>
+
+</xs:schema>
\ No newline at end of file
diff --git a/src/devices/pic/xml_data/registers/registers.xml b/src/devices/pic/xml_data/registers/registers.xml
new file mode 100644
index 0000000..d7c0884
--- /dev/null
+++ b/src/devices/pic/xml_data/registers/registers.xml
@@ -0,0 +1,57694 @@
+<!DOCTYPE piklab>
+<!--This file is generated. Do not edit.--><registers>
+  <device nb_banks="1" name="30F1010" >
+    <unused end="0x007F" start="0x0054" />
+    <unused end="0x0093" start="0x008A" />
+    <unused end="0x00A3" start="0x009A" />
+    <unused end="0x00B5" start="0x00B4" />
+    <unused end="0x00C3" start="0x00C2" />
+    <unused end="0x00C7" start="0x00C6" />
+    <unused end="0x00FF" start="0x00C8" />
+    <unused end="0x010B" start="0x0108" />
+    <unused end="0x010F" start="0x010E" />
+    <unused end="0x013F" start="0x0112" />
+    <unused end="0x017F" start="0x0140" />
+    <unused end="0x01AF" start="0x0186" />
+    <unused end="0x01BF" start="0x01B0" />
+    <unused end="0x0457" start="0x0430" />
+    <unused end="0x047F" start="0x0458" />
+    <unused end="0x023F" start="0x022A" />
+    <unused end="0x022B" start="0x0226" />
+    <unused end="0x023F" start="0x022C" />
+    <unused end="0x025F" start="0x0240" />
+    <unused end="0x027F" start="0x0260" />
+    <unused end="0x0304" start="0x0304" />
+    <unused end="0x031E" start="0x030E" />
+    <unused end="0x033E" start="0x0330" />
+    <unused end="0x02D1" start="0x02CC" />
+    <unused end="0x02E9" start="0x02E4" />
+    <unused end="0x02FF" start="0x02EA" />
+    <unused end="0x03BF" start="0x039C" />
+    <unused end="0x03FF" start="0x03C0" />
+    <unused end="0x04BF" start="0x0480" />
+    <unused end="0x04FF" start="0x04C8" />
+    <unused end="0x073F" start="0x0500" />
+    <unused end="0x074F" start="0x0744" />
+    <unused end="0x0755" start="0x0750" />
+    <unused end="0x075F" start="0x0756" />
+    <unused end="0x076F" start="0x0768" />
+    <unused end="0x0775" start="0x0774" />
+    <unused end="0x07FF" start="0x0776" />
+    <sfr address="0x0000" access="3333333333333333" name="WREG0" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0002" access="3333333333333333" name="WREG1" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0004" access="3333333333333333" name="WREG2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0006" access="3333333333333333" name="WREG3" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0008" access="3333333333333333" name="WREG4" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x000A" access="3333333333333333" name="WREG5" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x000C" access="3333333333333333" name="WREG6" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x000E" access="3333333333333333" name="WREG7" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0010" access="3333333333333333" name="WREG8" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0012" access="3333333333333333" name="WREG9" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0014" access="3333333333333333" name="WREG10" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0016" access="3333333333333333" name="WREG11" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0018" access="3333333333333333" name="WREG12" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x001A" access="3333333333333333" name="WREG13" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x001C" access="3333333333333333" name="WREG14" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x001E" access="3333333333333330" name="WREG15" mclr="1111211111111111" por="1111211111111111" />
+    <sfr address="0x0020" access="3333333333333331" name="SPLIM" mclr="1111111111111111" por="1111111111111111" />
+    <combined address="0x0022" size="5" name="ACCA" />
+    <sfr address="0x0022" access="3333333333333333" name="ACCAL" mclr="3333333333333333" por="0000000000000000" />
+    <sfr address="0x0024" access="3333333333333333" name="ACCAH" mclr="3333333333333333" por="0000000000000000" />
+    <sfr address="0x0026" access="1111111133333333" name="ACCAU" mclr="1111111133333333" por="1111111100000000" />
+    <combined address="0x0028" size="5" name="ACCB" />
+    <sfr address="0x0028" access="3333333333333333" name="ACCBL" mclr="3333333333333333" por="0000000000000000" />
+    <sfr address="0x002A" access="3333333333333333" name="ACCBH" mclr="3333333333333333" por="0000000000000000" />
+    <sfr address="0x002C" access="1111111133333333" name="ACCBU" mclr="1111111133333333" por="1111111100000000" />
+    <combined address="0x002E" size="3" name="PC" />
+    <sfr address="0x002E" access="1111111111111111" name="PCL" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0030" access="0000000001111111" name="PCH" mclr="0000000011111111" por="0000000011111111" />
+    <sfr address="0x0032" access="0000000033333333" name="TBLPAG" mclr="0000000011111111" por="0000000011111111" />
+    <sfr address="0x0034" access="0000000033333333" name="PSVPAG" mclr="0000000011111111" por="0000000011111111" />
+    <sfr address="0x0036" access="0033333333333333" name="RCOUNT" mclr="0033333333333333" por="0000000000000000" />
+    <sfr address="0x0038" access="0033333333333333" name="DCOUNT" mclr="0033333333333333" por="0000000000000000" />
+    <combined address="0x003A" size="3" name="DOSTART" />
+    <sfr address="0x003A" access="3333333333333331" name="DOSTARTL" mclr="3333333333333331" por="0000000000000001" />
+    <sfr address="0x003C" access="0000000003333333" name="DOSTARTH" mclr="0000000003333333" por="0000000000000000" />
+    <combined address="0x003E" size="3" name="DOEND" />
+    <sfr address="0x003E" access="3333333333333331" name="DOENDL" mclr="3333333333333331" por="0000000000000001" />
+    <sfr address="0x0040" access="0000000003333333" name="DOENDH" mclr="0000000003333333" por="0000000000000000" />
+    <sfr address="0x0042" access="1155151333313333" name="SR" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0044" access="0003211133335333" name="CORCON" mclr="0001111111211111" por="0001111111211111" />
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+    <sfr address="0x039A" access="1111111111111111" name="C1EC" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0740" access="3300000033333333" name="RCON" mclr="3300000023333333" por="1100000011111122" />
+    <sfr address="0x0742" access="0111033333105033" name="OSCCON" mclr="0555055511101011" por="0555055511101011" />
+    <sfr address="0x0744" access="0000000000333333" name="OSCTUN" mclr="0000000000333333" por="0000000000111111" />
+    <sfr address="0x0760" access="3330000003333333" name="NVMCON" mclr="1110000001111111" por="1110000001111111" />
+    <sfr address="0x0762" access="3333333333333333" name="NVMADR" mclr="1111111111111111" por="0000000000000000" />
+    <sfr address="0x0764" access="0000000033333333" name="NVMADRU" mclr="0000000011111111" por="0000000000000000" />
+    <sfr address="0x0766" access="0000000022222222" name="NVMKEY" mclr="0000000011111111" por="0000000011111111" />
+    <sfr address="0x0770" access="3333333033333333" name="PMD1" mclr="1111111011111111" por="1111111011111111" />
+    <sfr address="0x0772" access="3333333333333333" name="PMD2" mclr="1111111111111111" por="1111111111111111" />
+  </device>
+  <device nb_banks="1" name="10F200" >
+    <unused end="0x000F" start="0x0008" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33011333" name="STATUS" mclr="40044333" por="10022000" />
+    <sfr address="0x0004" access="11133333" name="FSR" mclr="22233333" por="22200000" />
+    <sfr address="0x0005" access="33333333" name="OSCCAL" mclr="33333333" por="22222221" />
+    <sfr address="0x0006" access="00001333" name="GPIO" mclr="00003333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="44444444" por="44444444" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="00003333" name="TRISIO" mclr="00002222" por="00002222" />
+    <sfr address="0x0005" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+  </device>
+  <device nb_banks="1" name="10F202" >
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33011333" name="STATUS" mclr="40044333" por="10022000" />
+    <sfr address="0x0004" access="11133333" name="FSR" mclr="22233333" por="22200000" />
+    <sfr address="0x0005" access="33333333" name="OSCCAL" mclr="33333333" por="22222221" />
+    <sfr address="0x0006" access="00001333" name="GPIO" mclr="00003333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="44444444" por="44444444" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="00003333" name="TRISIO" mclr="00002222" por="00002222" />
+    <sfr address="0x0005" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+  </device>
+  <device nb_banks="1" name="10F204" >
+    <unused end="0x000F" start="0x0008" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33011333" name="STATUS" mclr="44044333" por="11022000" />
+    <sfr address="0x0004" access="11133333" name="FSR" mclr="22233333" por="22200000" />
+    <sfr address="0x0005" access="33333333" name="OSCCAL" mclr="33333333" por="22222221" />
+    <sfr address="0x0006" access="00001333" name="GPIO" mclr="00003333" por="00000000" />
+    <sfr address="0x0007" access="13333333" name="CMCON0" mclr="33333333" por="22222222" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="44444444" por="44444444" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="00003333" name="TRISIO" mclr="00002222" por="00002222" />
+    <sfr address="0x0005" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+  </device>
+  <device nb_banks="1" name="10F206" >
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33011333" name="STATUS" mclr="44044333" por="11022000" />
+    <sfr address="0x0004" access="11133333" name="FSR" mclr="22233333" por="22200000" />
+    <sfr address="0x0005" access="33333333" name="OSCCAL" mclr="33333333" por="22222221" />
+    <sfr address="0x0006" access="00001333" name="GPIO" mclr="00003333" por="00000000" />
+    <sfr address="0x0007" access="13333333" name="CMCON0" mclr="22222222" por="22222222" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="44444444" por="44444444" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="00003333" name="TRISIO" mclr="00002222" por="00002222" />
+    <sfr address="0x0005" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+  </device>
+  <device nb_banks="1" name="10F220" >
+    <unused end="0x000F" start="0x0009" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33011333" name="STATUS" mclr="40044333" por="10022000" />
+    <sfr address="0x0004" access="11133333" name="FSR" mclr="22233333" por="22200000" />
+    <sfr address="0x0005" access="33333333" name="OSCCAL" mclr="22222221" por="22222221" />
+    <sfr address="0x0006" access="00001333" name="GPIO" mclr="00003333" por="00000000" />
+    <sfr address="0x0007" access="33003333" name="ADCON0" mclr="22002211" por="22002211" />
+    <sfr address="0x0008" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="44444444" por="44444444" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="00003333" name="TRISIO" mclr="00000222" por="00000222" />
+    <sfr address="0x0005" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+  </device>
+  <device nb_banks="1" name="10F222" >
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33011333" name="STATUS" mclr="40044333" por="10022000" />
+    <sfr address="0x0004" access="11133333" name="FSR" mclr="22233333" por="22200000" />
+    <sfr address="0x0005" access="33333333" name="OSCCAL" mclr="22222221" por="22222221" />
+    <sfr address="0x0006" access="00001333" name="GPIO" mclr="00003333" por="00000000" />
+    <sfr address="0x0007" access="33003333" name="ADCON0" mclr="22002211" por="22002211" />
+    <sfr address="0x0008" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="44444444" por="44444444" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="00003333" name="TRISIO" mclr="00000222" por="00000222" />
+    <sfr address="0x0005" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+  </device>
+  <device nb_banks="1" name="12C508" >
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="30311333" name="STATUS" mclr="40144333" por="10122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="22233333" por="22200000" />
+    <sfr address="0x0005" access="33330000" name="OSCCAL" mclr="33330000" por="12220000" />
+    <sfr address="0x0006" access="00331333" name="GPIO" mclr="00333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="44443333" por="44440000" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="00333333" name="TRIS" mclr="00222222" por="00222222" />
+    <sfr address="0x0005" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+  </device>
+  <device nb_banks="1" name="12C508A" >
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="41144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="22233333" por="22200000" />
+    <sfr address="0x0005" access="33333300" name="OSCCAL" mclr="33333300" por="21111100" />
+    <sfr address="0x0006" access="00331333" name="GPIO" mclr="00333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="44444433" por="44444400" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="00333333" name="TRIS" mclr="00222222" por="00222222" />
+    <sfr address="0x0005" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+  </device>
+  <device nb_banks="2" name="12C509" >
+    <mirror>
+      <range end="0x000F" start="0x0000" />
+      <range end="0x002F" start="0x0020" />
+    </mirror>
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="30311333" name="STATUS" mclr="40144333" por="10122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="22333333" por="22100000" />
+    <sfr address="0x0005" access="33330000" name="OSCCAL" mclr="33330000" por="12220000" />
+    <sfr address="0x0006" access="00331333" name="GPIO" mclr="00333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="44443333" por="44440000" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="00333333" name="TRIS" mclr="00222222" por="00222222" />
+    <sfr address="0x0005" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+  </device>
+  <device nb_banks="2" name="12C509A" >
+    <mirror>
+      <range end="0x000F" start="0x0000" />
+      <range end="0x002F" start="0x0020" />
+    </mirror>
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="41144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="22333333" por="22100000" />
+    <sfr address="0x0005" access="33333300" name="OSCCAL" mclr="33333300" por="21111100" />
+    <sfr address="0x0006" access="00331333" name="GPIO" mclr="00333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="44444433" por="44444400" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="00333333" name="TRIS" mclr="00222222" por="00222222" />
+    <sfr address="0x0005" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+  </device>
+  <device nb_banks="2" name="12C671" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0006" />
+    <unused end="0x001D" start="0x000D" />
+    <unused end="0x0089" start="0x0086" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x009E" start="0x0090" />
+    <unused end="0x00EF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00331333" name="GPIO" mclr="00333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03000000" name="PIR1" mclr="01000000" por="01000000" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33033303" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00331333" name="TRIS" mclr="00222222" por="00222222" />
+    <sfr address="0x008C" access="03000000" name="PIE1" mclr="01000000" por="01000000" />
+    <sfr address="0x008E" access="00000030" name="PCON" mclr="00000030" por="00000010" />
+    <sfr address="0x008F" access="33333300" name="OSCCAL" mclr="33333300" por="12221100" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+  </device>
+  <device nb_banks="2" name="12C672" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0006" />
+    <unused end="0x001D" start="0x000D" />
+    <unused end="0x0089" start="0x0086" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x009E" start="0x0090" />
+    <unused end="0x00EF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00331333" name="GPIO" mclr="00333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03000000" name="PIR1" mclr="01000000" por="01000000" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33033303" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00331333" name="TRIS" mclr="00222222" por="00222222" />
+    <sfr address="0x008C" access="03000000" name="PIE1" mclr="01000000" por="01000000" />
+    <sfr address="0x008E" access="00000030" name="PCON" mclr="00000030" por="00000010" />
+    <sfr address="0x008F" access="33333300" name="OSCCAL" mclr="33333300" por="12221100" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+  </device>
+  <device nb_banks="1" name="12CE518" >
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="41144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="22233333" por="22200000" />
+    <sfr address="0x0005" access="33333300" name="OSCCAL" mclr="33333300" por="21111100" />
+    <sfr address="0x0006" access="22331333" name="GPIO" mclr="22333333" por="22000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="44444433" por="44444400" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="00333333" name="TRIS" mclr="00222222" por="00222222" />
+    <sfr address="0x0005" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+  </device>
+  <device nb_banks="2" name="12CE519" >
+    <mirror>
+      <range end="0x000F" start="0x0000" />
+      <range end="0x002F" start="0x0020" />
+    </mirror>
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="41144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="22333333" por="22100000" />
+    <sfr address="0x0005" access="33333300" name="OSCCAL" mclr="33333300" por="21111100" />
+    <sfr address="0x0006" access="22331333" name="GPIO" mclr="22333333" por="22000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="44444433" por="44444400" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="00333333" name="TRIS" mclr="00222222" por="00222222" />
+    <sfr address="0x0005" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+  </device>
+  <device nb_banks="2" name="12CE673" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0006" />
+    <unused end="0x001D" start="0x000D" />
+    <unused end="0x0089" start="0x0086" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x009E" start="0x0090" />
+    <unused end="0x00EF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00331333" name="GPIO" mclr="22333333" por="22000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03000000" name="PIR1" mclr="01000000" por="01000000" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33033303" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00331333" name="TRIS" mclr="00222222" por="00222222" />
+    <sfr address="0x008C" access="03000000" name="PIE1" mclr="01000000" por="01000000" />
+    <sfr address="0x008E" access="00000030" name="PCON" mclr="00000030" por="00000010" />
+    <sfr address="0x008F" access="33333300" name="OSCCAL" mclr="33333300" por="12221100" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+  </device>
+  <device nb_banks="2" name="12CE674" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0006" />
+    <unused end="0x001D" start="0x000D" />
+    <unused end="0x0089" start="0x0086" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x009E" start="0x0090" />
+    <unused end="0x00EF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00331333" name="GPIO" mclr="22333333" por="22000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03000000" name="PIR1" mclr="01000000" por="01000000" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33033303" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00331333" name="TRIS" mclr="00222222" por="00222222" />
+    <sfr address="0x008C" access="03000000" name="PIE1" mclr="01000000" por="01000000" />
+    <sfr address="0x008E" access="00000030" name="PCON" mclr="00000030" por="00000010" />
+    <sfr address="0x008F" access="33333300" name="OSCCAL" mclr="33333300" por="12221100" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+  </device>
+  <device nb_banks="2" name="12CR509A" >
+    <mirror>
+      <range end="0x000F" start="0x0000" />
+      <range end="0x002F" start="0x0020" />
+    </mirror>
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="41144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="22333333" por="22100000" />
+    <sfr address="0x0005" access="33333300" name="OSCCAL" mclr="33333300" por="21111100" />
+    <sfr address="0x0006" access="00331333" name="GPIO" mclr="00333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="44444433" por="44444400" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="00333333" name="TRIS" mclr="00222222" por="00222222" />
+    <sfr address="0x0005" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+  </device>
+  <device nb_banks="1" name="12F508" >
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="30011333" name="STATUS" mclr="40044333" por="10022000" />
+    <sfr address="0x0004" access="11133333" name="FSR" mclr="22233333" por="22200000" />
+    <sfr address="0x0005" access="33333330" name="OSCCAL" mclr="33333330" por="00000000" />
+    <sfr address="0x0006" access="00331333" name="GPIO" mclr="00333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="44444444" por="44444444" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="00333333" name="TRISIO" mclr="00222222" por="00222222" />
+    <sfr address="0x0005" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+  </device>
+  <device nb_banks="2" name="12F509" >
+    <mirror>
+      <range end="0x000F" start="0x0000" />
+      <range end="0x002F" start="0x0020" />
+    </mirror>
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="30311333" name="STATUS" mclr="40144333" por="10122000" />
+    <sfr address="0x0004" access="11333333" name="FSR" mclr="22133333" por="22100000" />
+    <sfr address="0x0005" access="33333330" name="OSCCAL" mclr="33333330" por="00000000" />
+    <sfr address="0x0006" access="00331333" name="GPIO" mclr="00333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="44444444" por="44444444" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="00333333" name="TRISIO" mclr="00222222" por="00222222" />
+    <sfr address="0x0005" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+  </device>
+  <device nb_banks="2" name="12F510" >
+    <mirror>
+      <range end="0x000F" start="0x0000" />
+      <range end="0x002F" start="0x0020" />
+    </mirror>
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11122333" por="11122000" />
+    <sfr address="0x0004" access="11333333" name="FSR" mclr="22133333" por="22100000" />
+    <sfr address="0x0005" access="33333330" name="OSCCAL" mclr="22222220" por="22222220" />
+    <sfr address="0x0006" access="00331333" name="GPIO" mclr="00333333" por="00000000" />
+    <sfr address="0x0007" access="13333333" name="CM1CON0" mclr="22222222" por="22222222" />
+    <sfr address="0x0008" access="33333333" name="ADCON0" mclr="22222211" por="22222211" />
+    <sfr address="0x0009" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="44444444" por="44444444" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="00333333" name="TRISIO" mclr="00222222" por="00222222" />
+    <sfr address="0x0005" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+  </device>
+  <device nb_banks="4" name="12F615" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0005" start="0x0005" />
+      <range end="0x0105" start="0x0105" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x000C" start="0x000C" />
+      <range end="0x010C" start="0x010C" />
+    </mirror>
+    <mirror>
+      <range end="0x001A" start="0x000E" />
+      <range end="0x011A" start="0x010E" />
+    </mirror>
+    <mirror>
+      <range end="0x006F" start="0x001E" />
+      <range end="0x016F" start="0x011E" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0085" start="0x0085" />
+      <range end="0x0185" start="0x0185" />
+    </mirror>
+    <mirror>
+      <range end="0x0087" start="0x0087" />
+      <range end="0x0187" start="0x0187" />
+    </mirror>
+    <mirror>
+      <range end="0x008C" start="0x008C" />
+      <range end="0x018C" start="0x018C" />
+    </mirror>
+    <mirror>
+      <range end="0x0092" start="0x008E" />
+      <range end="0x0192" start="0x018E" />
+    </mirror>
+    <mirror>
+      <range end="0x0096" start="0x0095" />
+      <range end="0x0196" start="0x0195" />
+    </mirror>
+    <mirror>
+      <range end="0x00BF" start="0x009B" />
+      <range end="0x01BF" start="0x019B" />
+    </mirror>
+    <unused end="0x0006" start="0x0006" />
+    <unused end="0x0007" start="0x0007" />
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x0018" start="0x0018" />
+    <unused end="0x001B" start="0x001B" />
+    <unused end="0x001D" start="0x001D" />
+    <unused end="0x0086" start="0x0086" />
+    <unused end="0x0087" start="0x0087" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0091" start="0x0091" />
+    <unused end="0x0094" start="0x0094" />
+    <unused end="0x009A" start="0x0097" />
+    <unused end="0x009D" start="0x009B" />
+    <unused end="0x00EF" start="0x00C0" />
+    <unused end="0x0106" start="0x0106" />
+    <unused end="0x0107" start="0x0107" />
+    <unused end="0x0109" start="0x0108" />
+    <unused end="0x010D" start="0x010D" />
+    <unused end="0x011D" start="0x011B" />
+    <unused end="0x0186" start="0x0186" />
+    <unused end="0x0187" start="0x0187" />
+    <unused end="0x0189" start="0x0188" />
+    <unused end="0x018D" start="0x018D" />
+    <unused end="0x018F" start="0x018E" />
+    <unused end="0x0191" start="0x0191" />
+    <unused end="0x0194" start="0x0193" />
+    <unused end="0x0198" start="0x0197" />
+    <unused end="0x019B" start="0x019B" />
+    <unused end="0x01EF" start="0x01C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="GPIO" mclr="00333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111111" />
+    <sfr address="0x000C" access="03303033" name="PIR1" mclr="01101011" por="01101011" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="33333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="33333333" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0013" size="2" name="CCPR1" />
+    <sfr address="0x0013" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0015" access="30333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0016" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0017" access="33333333" name="ECCPAS" mclr="11111111" por="11111111" />
+    <sfr address="0x0019" access="30333333" name="VRCON" mclr="10111111" por="10111111" />
+    <sfr address="0x001A" access="31330303" name="CMCON0" mclr="11110101" por="11110101" />
+    <sfr address="0x001C" access="00033033" name="CMCON1" mclr="00011021" por="00011021" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33033333" name="ADCON0" mclr="11011111" por="11011111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISIO" mclr="00222222" por="00222222" />
+    <sfr address="0x008C" access="03303033" name="PIE1" mclr="01101011" por="01101011" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="00030033" name="APFCON" mclr="00010011" por="00010011" />
+    <sfr address="0x0095" access="00330333" name="WPU" mclr="00220222" por="00220222" />
+    <sfr address="0x0096" access="00333333" name="IOC" mclr="00111111" por="00111111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="03333333" name="ANSEL" mclr="01112222" por="01112222" />
+  </device>
+  <device nb_banks="2" name="12F629" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <mirror>
+      <range end="0x005F" start="0x0020" />
+      <range end="0x00DF" start="0x00A0" />
+    </mirror>
+    <unused end="0x0009" start="0x0006" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x0018" start="0x0011" />
+    <unused end="0x001F" start="0x001A" />
+    <unused end="0x007F" start="0x0060" />
+    <unused end="0x0089" start="0x0086" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x008F" start="0x008F" />
+    <unused end="0x0094" start="0x0091" />
+    <unused end="0x0098" start="0x0097" />
+    <unused end="0x009F" start="0x009E" />
+    <unused end="0x00FF" start="0x00E0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00331333" name="GPIO" mclr="00333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111111" />
+    <sfr address="0x000C" access="33003003" name="PIR1" mclr="11001001" por="11001001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="03333333" name="T1CON" mclr="03333333" por="01111111" />
+    <sfr address="0x0019" access="01033333" name="CMCON" mclr="01011111" por="01011111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00331333" name="TRISIO" mclr="00222222" por="00222222" />
+    <sfr address="0x008C" access="33003003" name="PIE1" mclr="11001001" por="11001001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000010" />
+    <sfr address="0x0090" access="33333300" name="OSCCAL" mclr="21111100" por="21111100" />
+    <sfr address="0x0095" access="00330333" name="WPU" mclr="00220222" por="00220222" />
+    <sfr address="0x0096" access="00333333" name="IOC" mclr="00111111" por="00111111" />
+    <sfr address="0x0099" access="30303333" name="VRCON" mclr="10101111" por="10101111" />
+    <sfr address="0x009A" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="03333333" name="EEADR" mclr="01111111" por="01111111" />
+    <sfr address="0x009C" access="00003399" name="EECON1" mclr="00004111" por="00000111" />
+    <sfr address="0x009D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="12F635" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0005" start="0x0005" />
+      <range end="0x0105" start="0x0105" />
+    </mirror>
+    <mirror>
+      <range end="0x000A" start="0x000A" />
+      <range end="0x010A" start="0x010A" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000B" />
+      <range end="0x008B" start="0x008B" />
+      <range end="0x010B" start="0x010B" />
+      <range end="0x018B" start="0x018B" />
+    </mirror>
+    <mirror>
+      <range end="0x008A" start="0x008A" />
+      <range end="0x018A" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0085" start="0x0085" />
+      <range end="0x0185" start="0x0185" />
+    </mirror>
+    <unused end="0x0009" start="0x0006" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x0017" start="0x0011" />
+    <unused end="0x003F" start="0x001B" />
+    <unused end="0x0089" start="0x0086" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0093" start="0x0091" />
+    <unused end="0x0098" start="0x0098" />
+    <unused end="0x00EF" start="0x009E" />
+    <unused end="0x0109" start="0x0106" />
+    <unused end="0x010F" start="0x010C" />
+    <unused end="0x016F" start="0x0115" />
+    <unused end="0x0189" start="0x0186" />
+    <unused end="0x01EF" start="0x018C" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00331333" name="GPIO" mclr="00333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111111" />
+    <sfr address="0x000C" access="33103303" name="PIR1" mclr="11101101" por="11101101" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="33333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0018" access="00033333" name="WDTCON" mclr="00012111" por="00012111" />
+    <sfr address="0x0019" access="01033333" name="CMCON0" mclr="01011111" por="01011111" />
+    <sfr address="0x001A" access="00000030" name="CMCON1" mclr="00000020" por="00000020" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00331333" name="TRISIO" mclr="00222222" por="00222222" />
+    <sfr address="0x008C" access="33303303" name="PIE1" mclr="11101101" por="11101101" />
+    <sfr address="0x008E" access="00333033" name="PCON" mclr="00131033" por="00121044" />
+    <sfr address="0x008F" access="03331113" name="OSCCON" mclr="02210111" por="02210111" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0094" access="00130333" name="LVDCON" mclr="00110111" por="00110111" />
+    <sfr address="0x0095" access="00330333" name="WPUDA" mclr="00220222" por="00220222" />
+    <sfr address="0x0096" access="00333333" name="IOCA" mclr="00111111" por="00111111" />
+    <sfr address="0x0097" access="00330333" name="WDA" mclr="00220222" por="00220222" />
+    <sfr address="0x0099" access="30303333" name="VRCON" mclr="10101111" por="10101111" />
+    <sfr address="0x009A" access="33333333" name="EEDAT" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x009C" access="00003399" name="EECON1" mclr="00004111" por="00000111" />
+    <sfr address="0x009D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0110" access="93000033" name="CRCON" mclr="11000011" por="11000011" />
+    <sfr address="0x0111" access="33333333" name="CRDAT0" mclr="11111111" por="11111111" />
+    <sfr address="0x0112" access="33333333" name="CRDAT1" mclr="11111111" por="11111111" />
+    <sfr address="0x0113" access="33333333" name="CRDAT2" mclr="11111111" por="11111111" />
+    <sfr address="0x0114" access="33333333" name="CRDAT3" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="2" name="12F675" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <mirror>
+      <range end="0x005F" start="0x0020" />
+      <range end="0x00DF" start="0x00A0" />
+    </mirror>
+    <unused end="0x0009" start="0x0006" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x0018" start="0x0011" />
+    <unused end="0x001D" start="0x001A" />
+    <unused end="0x007F" start="0x0060" />
+    <unused end="0x0089" start="0x0086" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x008F" start="0x008F" />
+    <unused end="0x0094" start="0x0091" />
+    <unused end="0x0098" start="0x0097" />
+    <unused end="0x00FF" start="0x00E0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00331333" name="GPIO" mclr="00333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111111" />
+    <sfr address="0x000C" access="33003003" name="PIR1" mclr="11001001" por="11001001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="03333333" name="T1CON" mclr="03333333" por="01111111" />
+    <sfr address="0x0019" access="01033333" name="CMCON" mclr="01011111" por="01011111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33003333" name="ADCON0" mclr="11001111" por="11001111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00331333" name="TRISIO" mclr="00222222" por="00222222" />
+    <sfr address="0x008C" access="33003003" name="PIE1" mclr="11001001" por="11001001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000010" />
+    <sfr address="0x0090" access="33333300" name="OSCCAL" mclr="21111100" por="21111100" />
+    <sfr address="0x0095" access="00330333" name="WPU" mclr="00220222" por="00220222" />
+    <sfr address="0x0096" access="00333333" name="IOC" mclr="00111111" por="00111111" />
+    <sfr address="0x0099" access="30303333" name="VRCON" mclr="10101111" por="10101111" />
+    <sfr address="0x009A" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="03333333" name="EEADR" mclr="01111111" por="01111111" />
+    <sfr address="0x009C" access="00003399" name="EECON1" mclr="00004111" por="00000111" />
+    <sfr address="0x009D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="03333333" name="ANSEL" mclr="01112222" por="01112222" />
+  </device>
+  <device nb_banks="2" name="12F683" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0006" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x0017" start="0x0016" />
+    <unused end="0x001D" start="0x001B" />
+    <unused end="0x0089" start="0x0086" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0091" start="0x0091" />
+    <unused end="0x0094" start="0x0093" />
+    <unused end="0x0098" start="0x0097" />
+    <unused end="0x00EF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00331333" name="GPIO" mclr="00333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111111" />
+    <sfr address="0x000C" access="33303333" name="PIR1" mclr="11101111" por="11101111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="33333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="33333333" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0013" size="2" name="CCPR1" />
+    <sfr address="0x0013" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0015" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="00033333" name="WDTCON" mclr="00012111" por="00012111" />
+    <sfr address="0x0019" access="01033333" name="CMCON0" mclr="01011111" por="01011111" />
+    <sfr address="0x001A" access="00000033" name="CMCON1" mclr="00000021" por="00000021" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33003333" name="ADCON0" mclr="11001111" por="11001111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00331333" name="TRISIO" mclr="00222222" por="00222222" />
+    <sfr address="0x008C" access="33303333" name="PIE1" mclr="11101111" por="11101111" />
+    <sfr address="0x008E" access="00330033" name="PCON" mclr="00130033" por="00120044" />
+    <sfr address="0x008F" access="03331113" name="OSCCON" mclr="02210111" por="02210111" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0095" access="00330333" name="WPU" mclr="00220222" por="00220222" />
+    <sfr address="0x0096" access="00333333" name="IOC" mclr="00111111" por="00111111" />
+    <sfr address="0x0099" access="30303333" name="VRCON" mclr="10101111" por="10101111" />
+    <sfr address="0x009A" access="33333333" name="EEDAT" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x009C" access="00003399" name="EECON1" mclr="00004111" por="00000111" />
+    <sfr address="0x009D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="03333333" name="ANSEL" mclr="01112222" por="01112222" />
+  </device>
+  <device nb_banks="2" name="16C432" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x001E" start="0x000D" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x008F" start="0x008F" />
+    <unused end="0x009E" start="0x0091" />
+    <unused end="0x00EF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033313" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03000000" name="PIR1" mclr="01000000" por="01000000" />
+    <sfr address="0x001F" access="11003333" name="CMCON" mclr="11001111" por="11001111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033313" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03000000" name="PIE1" mclr="01000000" por="01000000" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000034" por="00000010" />
+    <sfr address="0x0090" access="00000303" name="LININTF" mclr="00000202" por="00000202" />
+    <sfr address="0x009F" access="33303333" name="VRCON" mclr="11101111" por="11101111" />
+  </device>
+  <device nb_banks="2" name="16C433" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0006" />
+    <unused end="0x001D" start="0x000D" />
+    <unused end="0x0089" start="0x0086" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x009E" start="0x0090" />
+    <unused end="0x00EF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00331333" name="GPIO" mclr="22333333" por="22000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03000000" name="PIR1" mclr="01000000" por="01000000" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33033303" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00330333" name="TRIS" mclr="00222222" por="00222222" />
+    <sfr address="0x008C" access="03000000" name="PIE1" mclr="01000000" por="01000000" />
+    <sfr address="0x008E" access="00000030" name="PCON" mclr="00000030" por="00000010" />
+    <sfr address="0x008F" access="33333300" name="OSCCAL" mclr="33333300" por="12221100" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+  </device>
+  <device nb_banks="4" name="16C505" >
+    <mirror>
+      <range end="0x000F" start="0x0000" />
+      <range end="0x002F" start="0x0020" />
+      <range end="0x004F" start="0x0040" />
+      <range end="0x006F" start="0x0060" />
+    </mirror>
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="41144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="22333333" por="22100000" />
+    <sfr address="0x0005" access="33333300" name="OSCCAL" mclr="33333300" por="21111100" />
+    <sfr address="0x0006" access="00331333" name="PORTB" mclr="00333333" por="00000000" />
+    <sfr address="0x0007" access="00333333" name="PORTC" mclr="00333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="44444444" por="44444444" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="00333333" name="TRISB" mclr="00222222" por="00222222" />
+    <sfr address="0x0004" access="00333333" name="TRISC" mclr="00222222" por="00222222" />
+    <sfr address="0x0005" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+  </device>
+  <device nb_banks="1" name="16C54" >
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="22233333" por="22200000" />
+    <sfr address="0x0005" access="00013333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="00013333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0005" access="00333333" name="OPTION_REG" mclr="00222222" por="00222222" />
+  </device>
+  <device nb_banks="1" name="16C54C" >
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="22233333" por="22200000" />
+    <sfr address="0x0005" access="00013333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="00013333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0005" access="00333333" name="OPTION_REG" mclr="00222222" por="00222222" />
+  </device>
+  <device nb_banks="1" name="16C55" >
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="22233333" por="22200000" />
+    <sfr address="0x0005" access="00013333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="00013333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0004" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0005" access="00333333" name="OPTION_REG" mclr="00222222" por="00222222" />
+  </device>
+  <device nb_banks="2" name="16C554" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x001F" start="0x000C" />
+    <unused end="0x007F" start="0x0070" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x008D" start="0x008C" />
+    <unused end="0x00FF" start="0x008F" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="30333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008E" access="00000030" name="PCON" mclr="00000030" por="00000010" />
+  </device>
+  <device nb_banks="2" name="16C557" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x001F" start="0x000C" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x008D" start="0x008C" />
+    <unused end="0x009F" start="0x008F" />
+    <unused end="0x00FF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="30333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008E" access="00000030" name="PCON" mclr="00000030" por="00000010" />
+  </device>
+  <device nb_banks="2" name="16C558" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x001F" start="0x000C" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x008D" start="0x008C" />
+    <unused end="0x009F" start="0x008F" />
+    <unused end="0x00FF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="30333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008E" access="00000030" name="PCON" mclr="00000030" por="00000010" />
+  </device>
+  <device nb_banks="1" name="16C55A" >
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="22233333" por="22200000" />
+    <sfr address="0x0005" access="00013333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="00013333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0004" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0005" access="00333333" name="OPTION_REG" mclr="00222222" por="00222222" />
+  </device>
+  <device nb_banks="1" name="16C56" >
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="22233333" por="22200000" />
+    <sfr address="0x0005" access="00013333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="00013333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0005" access="00333333" name="OPTION_REG" mclr="00222222" por="00222222" />
+  </device>
+  <device nb_banks="1" name="16C56A" >
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="22233333" por="22200000" />
+    <sfr address="0x0005" access="00013333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="00013333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0005" access="00333333" name="OPTION_REG" mclr="00222222" por="00222222" />
+  </device>
+  <device nb_banks="4" name="16C57" >
+    <mirror>
+      <range end="0x000F" start="0x0000" />
+      <range end="0x002F" start="0x0020" />
+      <range end="0x004F" start="0x0040" />
+      <range end="0x006F" start="0x0060" />
+    </mirror>
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="23333333" por="20000000" />
+    <sfr address="0x0005" access="00013333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="00013333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0004" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0005" access="00333333" name="OPTION_REG" mclr="00222222" por="00222222" />
+  </device>
+  <device nb_banks="4" name="16C57C" >
+    <mirror>
+      <range end="0x000F" start="0x0000" />
+      <range end="0x002F" start="0x0020" />
+      <range end="0x004F" start="0x0040" />
+      <range end="0x006F" start="0x0060" />
+    </mirror>
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="23333333" por="20000000" />
+    <sfr address="0x0005" access="00013333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="00013333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0004" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0005" access="00333333" name="OPTION_REG" mclr="00222222" por="00222222" />
+  </device>
+  <device nb_banks="4" name="16C58A" >
+    <mirror>
+      <range end="0x000F" start="0x0000" />
+      <range end="0x002F" start="0x0020" />
+      <range end="0x004F" start="0x0040" />
+      <range end="0x006F" start="0x0060" />
+    </mirror>
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="23333333" por="20000000" />
+    <sfr address="0x0005" access="00013333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="00013333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0005" access="00333333" name="OPTION_REG" mclr="00222222" por="00222222" />
+  </device>
+  <device nb_banks="4" name="16C58B" >
+    <mirror>
+      <range end="0x000F" start="0x0000" />
+      <range end="0x002F" start="0x0020" />
+      <range end="0x004F" start="0x0040" />
+      <range end="0x006F" start="0x0060" />
+    </mirror>
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="23333333" por="20000000" />
+    <sfr address="0x0005" access="00013333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="00013333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0005" access="00333333" name="OPTION_REG" mclr="00222222" por="00222222" />
+  </device>
+  <device nb_banks="2" name="16C620" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x001E" start="0x000D" />
+    <unused end="0x007F" start="0x0070" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x009E" start="0x008F" />
+    <unused end="0x00FF" start="0x00A0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03000000" name="PIR1" mclr="01000000" por="01000000" />
+    <sfr address="0x001F" access="11003333" name="CMCON" mclr="11001111" por="11001111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03000000" name="PIE1" mclr="01000000" por="01000000" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000034" por="00000010" />
+    <sfr address="0x009F" access="33303333" name="VRCON" mclr="11101111" por="11101111" />
+  </device>
+  <device nb_banks="2" name="16C620A" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x001E" start="0x000D" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x009E" start="0x008F" />
+    <unused end="0x00EF" start="0x00A0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03000000" name="PIR1" mclr="01000000" por="01000000" />
+    <sfr address="0x001F" access="11003333" name="CMCON" mclr="11001111" por="11001111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03000000" name="PIE1" mclr="01000000" por="01000000" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000034" por="00000010" />
+    <sfr address="0x009F" access="33303333" name="VRCON" mclr="11101111" por="11101111" />
+  </device>
+  <device nb_banks="2" name="16C621" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x001E" start="0x000D" />
+    <unused end="0x007F" start="0x0070" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x009E" start="0x008F" />
+    <unused end="0x00FF" start="0x00A0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03000000" name="PIR1" mclr="01000000" por="01000000" />
+    <sfr address="0x001F" access="11003333" name="CMCON" mclr="11001111" por="11001111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03000000" name="PIE1" mclr="01000000" por="01000000" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000034" por="00000010" />
+    <sfr address="0x009F" access="33303333" name="VRCON" mclr="11101111" por="11101111" />
+  </device>
+  <device nb_banks="2" name="16C621A" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x001E" start="0x000D" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x009E" start="0x008F" />
+    <unused end="0x00EF" start="0x00A0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03000000" name="PIR1" mclr="01000000" por="01000000" />
+    <sfr address="0x001F" access="11003333" name="CMCON" mclr="11001111" por="11001111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03000000" name="PIE1" mclr="01000000" por="01000000" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000034" por="00000010" />
+    <sfr address="0x009F" access="33303333" name="VRCON" mclr="11101111" por="11101111" />
+  </device>
+  <device nb_banks="2" name="16C622" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x001E" start="0x000D" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x009E" start="0x008F" />
+    <unused end="0x00FF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03000000" name="PIR1" mclr="01000000" por="01000000" />
+    <sfr address="0x001F" access="11003333" name="CMCON" mclr="11001111" por="11001111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03000000" name="PIE1" mclr="01000000" por="01000000" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000034" por="00000010" />
+    <sfr address="0x009F" access="33303333" name="VRCON" mclr="11101111" por="11101111" />
+  </device>
+  <device nb_banks="2" name="16C622A" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x001E" start="0x000D" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x009E" start="0x008F" />
+    <unused end="0x00EF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03000000" name="PIR1" mclr="01000000" por="01000000" />
+    <sfr address="0x001F" access="11003333" name="CMCON" mclr="11001111" por="11001111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03000000" name="PIE1" mclr="01000000" por="01000000" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000034" por="00000010" />
+    <sfr address="0x009F" access="33303333" name="VRCON" mclr="11101111" por="11101111" />
+  </device>
+  <device nb_banks="2" name="16C62A" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x001F" start="0x0018" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x009F" start="0x0095" />
+    <unused end="0x00FF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="00003333" name="PIR1" mclr="11001111" por="11001111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="00003333" name="PIE1" mclr="11001111" por="11001111" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="00333333" name="SSPSTAT" mclr="00111111" por="00111111" />
+  </device>
+  <device nb_banks="2" name="16C62B" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x001F" start="0x0018" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x009F" start="0x0095" />
+    <unused end="0x00FF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="00003333" name="PIR1" mclr="00001111" por="00001111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="00003333" name="PIE1" mclr="00001111" por="00001111" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000034" por="00000014" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="2" name="16C63" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x001F" start="0x001E" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009F" start="0x009A" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="00113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x000D" access="00000003" name="PIR2" mclr="00000001" por="00000001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33330111" name="RCSTA" mclr="11110110" por="11110110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="00333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008D" access="00000003" name="PIE2" mclr="00000001" por="00000001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="00333333" name="SSPSTAT" mclr="00111111" por="00111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="2" name="16C63A" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009E" start="0x009A" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="00113333" name="PIR1" mclr="00111111" por="00111111" />
+    <sfr address="0x000D" access="00000003" name="PIR2" mclr="00000001" por="00000001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33330111" name="RCSTA" mclr="11110110" por="11110110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="00333333" name="PIE1" mclr="00111111" por="00111111" />
+    <sfr address="0x008D" access="00000003" name="PIE2" mclr="00000001" por="00000001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="00333333" name="SSPSTAT" mclr="00111111" por="00111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="2" name="16C642" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x001E" start="0x000D" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x009E" start="0x008F" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00031111" por="00001111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03000000" name="PIR1" mclr="01000000" por="01000000" />
+    <sfr address="0x001F" access="11003333" name="CMCON" mclr="11001111" por="11001111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03000000" name="PIE1" mclr="01000000" por="01000000" />
+    <sfr address="0x008E" access="10000333" name="PCON" mclr="30000333" por="30000444" />
+    <sfr address="0x009F" access="33303333" name="VRCON" mclr="11101111" por="11101111" />
+  </device>
+  <device nb_banks="2" name="16C64A" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x001F" start="0x0018" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x009F" start="0x0095" />
+    <unused end="0x00FF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33003333" name="PIR1" mclr="11001111" por="11001111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="11330333" name="TRISE" mclr="11110222" por="11110222" />
+    <sfr address="0x008C" access="33003333" name="PIE1" mclr="11001111" por="11001111" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="00333333" name="SSPSTAT" mclr="00111111" por="00111111" />
+  </device>
+  <device nb_banks="2" name="16C65A" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x001F" start="0x001E" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009F" start="0x009A" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x000D" access="00000003" name="PIR2" mclr="00000001" por="00000001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33330111" name="RCSTA" mclr="11110110" por="11110110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="11330333" name="TRISE" mclr="11110222" por="11110222" />
+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008D" access="00000003" name="PIE2" mclr="00000001" por="00000001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="00333333" name="SSPSTAT" mclr="00111111" por="00111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="2" name="16C65B" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009E" start="0x009A" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="30113333" name="PIR1" mclr="10111111" por="10111111" />
+    <sfr address="0x000D" access="00000003" name="PIR2" mclr="00000001" por="00000001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33330111" name="RCSTA" mclr="11110110" por="11110110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="11330333" name="TRISE" mclr="11110222" por="11110222" />
+    <sfr address="0x008C" access="30333333" name="PIE1" mclr="10111111" por="10111111" />
+    <sfr address="0x008D" access="00000003" name="PIE2" mclr="00000001" por="00000001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="00333333" name="SSPSTAT" mclr="00111111" por="00111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="4" name="16C66" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x001F" start="0x001E" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009F" start="0x009A" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x010F" start="0x010C" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x018F" start="0x018C" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="00113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x000D" access="00000003" name="PIR2" mclr="00000001" por="00000001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33330111" name="RCSTA" mclr="11110110" por="11110110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="00333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008D" access="00000003" name="PIE2" mclr="00000001" por="00000001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="2" name="16C662" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+    </mirror>
+    <unused end="0x001E" start="0x000D" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x009E" start="0x008F" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00031111" por="00001111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33000000" name="PIR1" mclr="11000000" por="11000000" />
+    <sfr address="0x001F" access="11003333" name="CMCON" mclr="11001111" por="11001111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="11330333" name="TRISE" mclr="11110222" por="11110222" />
+    <sfr address="0x008C" access="33000000" name="PIE1" mclr="11000000" por="11000000" />
+    <sfr address="0x008E" access="10000333" name="PCON" mclr="30000333" por="30000444" />
+    <sfr address="0x009F" access="33303333" name="VRCON" mclr="11101111" por="11101111" />
+  </device>
+  <device nb_banks="4" name="16C67" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x001F" start="0x001E" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009F" start="0x009A" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x010F" start="0x010C" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x018F" start="0x018C" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x000D" access="00000003" name="PIR2" mclr="00000001" por="00000001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33330111" name="RCSTA" mclr="11110110" por="11110110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="11330333" name="TRISE" mclr="11110222" por="11110222" />
+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008D" access="00000003" name="PIE2" mclr="00000001" por="00000001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="2" name="16C71" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x002F" start="0x0009" />
+      <range end="0x00AF" start="0x0089" />
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+    <unused end="0x0007" start="0x0007" />
+    <unused end="0x0087" start="0x0087" />
+    <unused end="0x007F" start="0x0030" />
+    <unused end="0x00FF" start="0x00B0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00031111" por="00001111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33033333" name="ADCON0" mclr="11011111" por="11011111" />
+    <sfr address="0x0009" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="00000033" name="ADCON1" mclr="00000011" por="00000011" />
+  </device>
+  <device nb_banks="2" name="16C710" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x002F" start="0x0009" />
+      <range end="0x00AF" start="0x0089" />
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+    <unused end="0x0007" start="0x0007" />
+    <unused end="0x007F" start="0x0030" />
+    <unused end="0x00FF" start="0x00B0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00031111" por="00001111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0009" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0088" access="00000033" name="ADCON1" mclr="00000011" por="00000011" />
+  </device>
+  <device nb_banks="2" name="16C711" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x004F" start="0x0009" />
+      <range end="0x00CF" start="0x0089" />
+    </mirror>
+    <unused end="0x0007" start="0x0007" />
+    <unused end="0x007F" start="0x0050" />
+    <unused end="0x00FF" start="0x00D0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00031111" por="00001111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0009" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0088" access="00000033" name="ADCON1" mclr="00000011" por="00000011" />
+  </device>
+  <device nb_banks="2" name="16C712" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
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+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x0014" start="0x0013" />
+    <unused end="0x001D" start="0x0018" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x009E" start="0x0093" />
+    <unused end="0x00FF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="00000303" name="DATACCP" mclr="00000303" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03000333" name="PIR1" mclr="01000111" por="01000111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="00000303" name="TRISCCP" mclr="00000202" por="00000202" />
+    <sfr address="0x008C" access="03000333" name="PIE1" mclr="01000111" por="01000111" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+  </device>
+  <device nb_banks="2" name="16C715" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
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+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x001D" start="0x000D" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x009E" start="0x008F" />
+    <unused end="0x00FF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00031111" por="00001111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03000000" name="PIR1" mclr="01000000" por="01000000" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03000000" name="PIE1" mclr="01000000" por="01000000" />
+    <sfr address="0x008E" access="10000333" name="PCON" mclr="30000333" por="30000444" />
+    <sfr address="0x009F" access="00000033" name="ADCON1" mclr="00000011" por="00000011" />
+  </device>
+  <device nb_banks="2" name="16C716" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
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+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x0014" start="0x0013" />
+    <unused end="0x001D" start="0x0018" />
+    <unused end="0x0089" start="0x0088" />
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+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x009E" start="0x0093" />
+    <unused end="0x00FF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="00000303" name="DATACCP" mclr="00000303" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03000333" name="PIR1" mclr="01000111" por="01000111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="00000303" name="TRISCCP" mclr="00000202" por="00000202" />
+    <sfr address="0x008C" access="03000333" name="PIE1" mclr="01000111" por="01000111" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+  </device>
+  <device nb_banks="4" name="16C717" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x001D" start="0x0018" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x0090" start="0x008F" />
+    <unused end="0x009A" start="0x0098" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x011F" start="0x0110" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x01EF" start="0x018D" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="33133333" name="PORTA" mclr="33331111" por="00001111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333322" por="00000022" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03003333" name="PIR1" mclr="01001111" por="01001111" />
+    <sfr address="0x000D" access="30003000" name="PIR2" mclr="10001000" por="10001000" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="33033333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03003333" name="PIE1" mclr="01001111" por="01001111" />
+    <sfr address="0x008D" access="30003000" name="PIE2" mclr="10001000" por="10001000" />
+    <sfr address="0x008E" access="00003033" name="PCON" mclr="00002033" por="00002044" />
+    <sfr address="0x0091" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0095" access="33333333" name="WPUB" mclr="22222222" por="22222222" />
+    <sfr address="0x0096" access="33333333" name="IOCB" mclr="22221111" por="22221111" />
+    <sfr address="0x0097" access="33333333" name="P1DEL" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="33330000" name="REFCON" mclr="11110000" por="11110000" />
+    <sfr address="0x009C" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x009D" access="00333333" name="ANSEL" mclr="00222222" por="00222222" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="33330000" name="ADCON1" mclr="11110000" por="11110000" />
+    <sfr address="0x010C" access="11111111" name="PMDATL" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="PMADRL" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00111111" name="PMDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00003333" name="PMADRH" mclr="00003333" por="00000000" />
+    <sfr address="0x018C" access="10000009" name="PMCON1" mclr="20000001" por="20000001" />
+  </device>
+  <device nb_banks="2" name="16C72" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x001D" start="0x0018" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x009E" start="0x0095" />
+    <unused end="0x00FF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03003333" name="PIR1" mclr="01001111" por="01001111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03003333" name="PIE1" mclr="01001111" por="01001111" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="00333333" name="SSPSTAT" mclr="00111111" por="00111111" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+  </device>
+  <device nb_banks="2" name="16C72A" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x001D" start="0x0018" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x009E" start="0x0095" />
+    <unused end="0x00FF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03003333" name="PIR1" mclr="01001111" por="01001111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03003333" name="PIE1" mclr="01001111" por="01001111" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000034" por="00000014" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+  </device>
+  <device nb_banks="2" name="16C73A" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009E" start="0x009A" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x000D" access="00000003" name="PIR2" mclr="00000001" por="00000001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33330111" name="RCSTA" mclr="11110110" por="11110110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x008D" access="00000003" name="PIE2" mclr="00000001" por="00000001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="00333333" name="SSPSTAT" mclr="00111111" por="00111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+  </device>
+  <device nb_banks="2" name="16C73B" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009E" start="0x009A" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x000D" access="00000003" name="PIR2" mclr="00000001" por="00000001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33330111" name="RCSTA" mclr="11110110" por="11110110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x008D" access="00000003" name="PIE2" mclr="00000001" por="00000001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="00333333" name="SSPSTAT" mclr="00111111" por="00111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+  </device>
+  <device nb_banks="4" name="16C745" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0014" start="0x0013" />
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0093" />
+    <unused end="0x009E" start="0x009A" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x011F" start="0x010C" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x018F" start="0x018C" />
+    <unused end="0x019F" start="0x019B" />
+    <unused end="0x01EF" start="0x01E0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33000333" name="PORTC" mclr="33000333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x000D" access="00000003" name="PIR2" mclr="00000001" por="00000001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33330111" name="RCSTA" mclr="11110110" por="11110110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33000333" name="TRISC" mclr="22000222" por="22000222" />
+    <sfr address="0x008C" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x008D" access="00000003" name="PIE2" mclr="00000001" por="00000001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+    <sfr address="0x0190" access="00555555" name="UIR" mclr="00111111" por="00111111" />
+    <sfr address="0x0191" access="00333333" name="UIE" mclr="00111111" por="00111111" />
+    <sfr address="0x0192" access="55555555" name="UEIR" mclr="11111111" por="11111111" />
+    <sfr address="0x0193" access="33333333" name="UEIE" mclr="11111111" por="11111111" />
+    <sfr address="0x0194" access="00011100" name="USTAT" mclr="00033300" por="00000000" />
+    <sfr address="0x0195" access="00153330" name="UCTRL" mclr="00044440" por="00011110" />
+    <sfr address="0x0196" access="03333333" name="UADDR" mclr="01111111" por="01111111" />
+    <sfr address="0x0197" access="33333333" name="USWSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0198" access="00003333" name="UEP0" mclr="00001111" por="00001111" />
+    <sfr address="0x0199" access="00003333" name="UEP1" mclr="00001111" por="00001111" />
+    <sfr address="0x019A" access="00003333" name="UEP2" mclr="00001111" por="00001111" />
+    <sfr address="0x01A0" access="33333300" name="BD0OST" mclr="33333333" por="00000000" />
+    <sfr address="0x01A1" access="00003333" name="BD0OBC" mclr="33333333" por="00000000" />
+    <sfr address="0x01A2" access="33333333" name="BD0OAL" mclr="33333333" por="00000000" />
+    <sfr address="0x01A4" access="33333300" name="BD0IST" mclr="33333333" por="00000000" />
+    <sfr address="0x01A5" access="00003333" name="BD0IBC" mclr="33333333" por="00000000" />
+    <sfr address="0x01A6" access="33333333" name="BD0IAL" mclr="33333333" por="00000000" />
+    <sfr address="0x01A8" access="33333300" name="BD1OST" mclr="33333333" por="00000000" />
+    <sfr address="0x01A9" access="00003333" name="BD1OBC" mclr="33333333" por="00000000" />
+    <sfr address="0x01AA" access="33333333" name="BD1OAL" mclr="33333333" por="00000000" />
+    <sfr address="0x01AC" access="33333300" name="BD1IST" mclr="33333333" por="00000000" />
+    <sfr address="0x01AD" access="00003333" name="BD1IBC" mclr="33333333" por="00000000" />
+    <sfr address="0x01AE" access="33333333" name="BD1IAL" mclr="33333333" por="00000000" />
+    <sfr address="0x01B0" access="33333300" name="BD2OST" mclr="33333333" por="00000000" />
+    <sfr address="0x01B1" access="00003333" name="BD2OBC" mclr="33333333" por="00000000" />
+    <sfr address="0x01B2" access="33333333" name="BD2OAL" mclr="33333333" por="00000000" />
+    <sfr address="0x01B4" access="33333300" name="BD2IST" mclr="33333333" por="00000000" />
+    <sfr address="0x01B5" access="00003333" name="BD2IBC" mclr="33333333" por="00000000" />
+    <sfr address="0x01B6" access="33333333" name="BD2IAL" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="2" name="16C74A" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009E" start="0x009A" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x000D" access="00000003" name="PIR2" mclr="00000001" por="00000001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33330111" name="RCSTA" mclr="11110110" por="11110110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="11330333" name="TRISE" mclr="11110222" por="11110222" />
+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008D" access="00000003" name="PIE2" mclr="00000001" por="00000001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="00333333" name="SSPSTAT" mclr="00111111" por="00111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+  </device>
+  <device nb_banks="2" name="16C74B" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009E" start="0x009A" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x000D" access="00000003" name="PIR2" mclr="00000001" por="00000001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33330111" name="RCSTA" mclr="11110110" por="11110110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="11330333" name="TRISE" mclr="11110222" por="11110222" />
+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008D" access="00000003" name="PIE2" mclr="00000001" por="00000001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="00333333" name="SSPSTAT" mclr="00111111" por="00111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+  </device>
+  <device nb_banks="4" name="16C76" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009E" start="0x009A" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x010F" start="0x010C" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x018F" start="0x018C" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x000D" access="00000003" name="PIR2" mclr="00000001" por="00000001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33330111" name="RCSTA" mclr="11110110" por="11110110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x008D" access="00000003" name="PIE2" mclr="00000001" por="00000001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+  </device>
+  <device nb_banks="4" name="16C765" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0014" start="0x0013" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0093" />
+    <unused end="0x009E" start="0x009A" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x011F" start="0x010C" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x018F" start="0x018C" />
+    <unused end="0x019F" start="0x019B" />
+    <unused end="0x01EF" start="0x01E0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33000333" name="PORTC" mclr="33000333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x000D" access="00000003" name="PIR2" mclr="00000001" por="00000001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33330111" name="RCSTA" mclr="11110110" por="11110110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33000333" name="TRISC" mclr="22000222" por="22000222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="11330333" name="TRISE" mclr="11110222" por="11110222" />
+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008D" access="00000003" name="PIE2" mclr="00000001" por="00000001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+    <sfr address="0x0190" access="00555555" name="UIR" mclr="00111111" por="00111111" />
+    <sfr address="0x0191" access="00333333" name="UIE" mclr="00111111" por="00111111" />
+    <sfr address="0x0192" access="55555555" name="UEIR" mclr="11111111" por="11111111" />
+    <sfr address="0x0193" access="33333333" name="UEIE" mclr="11111111" por="11111111" />
+    <sfr address="0x0194" access="00011100" name="USTAT" mclr="00033300" por="00000000" />
+    <sfr address="0x0195" access="00153330" name="UCTRL" mclr="00044440" por="00011110" />
+    <sfr address="0x0196" access="03333333" name="UADDR" mclr="01111111" por="01111111" />
+    <sfr address="0x0197" access="33333333" name="USWSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0198" access="00003333" name="UEP0" mclr="00001111" por="00001111" />
+    <sfr address="0x0199" access="00003333" name="UEP1" mclr="00001111" por="00001111" />
+    <sfr address="0x019A" access="00003333" name="UEP2" mclr="00001111" por="00001111" />
+    <sfr address="0x01A0" access="33333300" name="BD0OST" mclr="33333333" por="00000000" />
+    <sfr address="0x01A1" access="00003333" name="BD0OBC" mclr="33333333" por="00000000" />
+    <sfr address="0x01A2" access="33333333" name="BD0OAL" mclr="33333333" por="00000000" />
+    <sfr address="0x01A4" access="33333300" name="BD0IST" mclr="33333333" por="00000000" />
+    <sfr address="0x01A5" access="00003333" name="BD0IBC" mclr="33333333" por="00000000" />
+    <sfr address="0x01A6" access="33333333" name="BD0IAL" mclr="33333333" por="00000000" />
+    <sfr address="0x01A8" access="33333300" name="BD1OST" mclr="33333333" por="00000000" />
+    <sfr address="0x01A9" access="00003333" name="BD1OBC" mclr="33333333" por="00000000" />
+    <sfr address="0x01AA" access="33333333" name="BD1OAL" mclr="33333333" por="00000000" />
+    <sfr address="0x01AC" access="33333300" name="BD1IST" mclr="33333333" por="00000000" />
+    <sfr address="0x01AD" access="00003333" name="BD1IBC" mclr="33333333" por="00000000" />
+    <sfr address="0x01AE" access="33333333" name="BD1IAL" mclr="33333333" por="00000000" />
+    <sfr address="0x01B0" access="33333300" name="BD2OST" mclr="33333333" por="00000000" />
+    <sfr address="0x01B1" access="00003333" name="BD2OBC" mclr="33333333" por="00000000" />
+    <sfr address="0x01B2" access="33333333" name="BD2OAL" mclr="33333333" por="00000000" />
+    <sfr address="0x01B4" access="33333300" name="BD2IST" mclr="33333333" por="00000000" />
+    <sfr address="0x01B5" access="00003333" name="BD2IBC" mclr="33333333" por="00000000" />
+    <sfr address="0x01B6" access="33333333" name="BD2IAL" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16C77" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009E" start="0x009A" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x010F" start="0x010C" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x018F" start="0x018C" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x000D" access="00000003" name="PIR2" mclr="00000001" por="00000001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33330111" name="RCSTA" mclr="11110110" por="11110110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="11330333" name="TRISE" mclr="11110222" por="11110222" />
+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008D" access="00000003" name="PIE2" mclr="00000001" por="00000001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+  </device>
+  <device nb_banks="4" name="16C770" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x001D" start="0x0018" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x0090" start="0x008F" />
+    <unused end="0x009A" start="0x0098" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x011F" start="0x0110" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x01EF" start="0x018D" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="33133333" name="PORTA" mclr="33331111" por="00001111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333322" por="00000022" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03003333" name="PIR1" mclr="01001111" por="01001111" />
+    <sfr address="0x000D" access="30003000" name="PIR2" mclr="10001000" por="10001000" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="33033333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03003333" name="PIE1" mclr="01001111" por="01001111" />
+    <sfr address="0x008D" access="30003000" name="PIE2" mclr="10001000" por="10001000" />
+    <sfr address="0x008E" access="00003033" name="PCON" mclr="00002033" por="00002044" />
+    <sfr address="0x0091" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0095" access="33333333" name="WPUB" mclr="22222222" por="22222222" />
+    <sfr address="0x0096" access="33333333" name="IOCB" mclr="22221111" por="22221111" />
+    <sfr address="0x0097" access="33333333" name="P1DEL" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="33330000" name="REFCON" mclr="11110000" por="11110000" />
+    <sfr address="0x009C" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x009D" access="00333333" name="ANSEL" mclr="00222222" por="00222222" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="33330000" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x010C" access="11111111" name="PMDATL" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="PMADRL" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00111111" name="PMDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00003333" name="PMADRH" mclr="00003333" por="00000000" />
+    <sfr address="0x018C" access="10000009" name="PMCON1" mclr="20000001" por="20000001" />
+  </device>
+  <device nb_banks="4" name="16C771" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x001D" start="0x0018" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x0090" start="0x008F" />
+    <unused end="0x009A" start="0x0098" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x011F" start="0x0110" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x01EF" start="0x018D" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="33133333" name="PORTA" mclr="33331111" por="00001111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333322" por="00000022" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03003333" name="PIR1" mclr="01001111" por="01001111" />
+    <sfr address="0x000D" access="30003000" name="PIR2" mclr="10001000" por="10001000" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="33033333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03003333" name="PIE1" mclr="01001111" por="01001111" />
+    <sfr address="0x008D" access="30003000" name="PIE2" mclr="10001000" por="10001000" />
+    <sfr address="0x008E" access="00003033" name="PCON" mclr="00002033" por="00002044" />
+    <sfr address="0x0091" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0095" access="33333333" name="WPUB" mclr="22222222" por="22222222" />
+    <sfr address="0x0096" access="33333333" name="IOCB" mclr="22221111" por="22221111" />
+    <sfr address="0x0097" access="33333333" name="P1DEL" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="33330000" name="REFCON" mclr="11110000" por="11110000" />
+    <sfr address="0x009C" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x009D" access="00333333" name="ANSEL" mclr="00222222" por="00222222" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="33330000" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x010C" access="11111111" name="PMDATL" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="PMADRL" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00111111" name="PMDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00003333" name="PMADRH" mclr="00003333" por="00000000" />
+    <sfr address="0x018C" access="10000009" name="PMCON1" mclr="20000001" por="20000001" />
+  </device>
+  <device nb_banks="4" name="16C773" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x0090" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009A" start="0x009A" />
+    <unused end="0x009D" start="0x009D" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x011F" start="0x010C" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x01EF" start="0x018C" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00031111" por="00001111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33332233" por="00002200" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00000333" name="PORTE" mclr="00000111" por="00000111" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x000D" access="30003003" name="PIR2" mclr="10001001" por="10001001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="11330333" name="TRISE" mclr="11110222" por="11110222" />
+    <sfr address="0x008C" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x008D" access="30003003" name="PIE2" mclr="10001001" por="10001001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0091" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="33330000" name="REFCON" mclr="11110000" por="11110000" />
+    <sfr address="0x009C" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="33333333" name="ADCON1" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="4" name="16C774" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0090" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009A" start="0x009A" />
+    <unused end="0x009D" start="0x009D" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x011F" start="0x010C" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x01EF" start="0x018C" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33332233" por="00002200" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00000333" name="PORTE" mclr="00000111" por="00000111" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x000D" access="30003003" name="PIR2" mclr="10001001" por="10001001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="11330333" name="TRISE" mclr="11110222" por="11110222" />
+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008D" access="30003003" name="PIE2" mclr="10001001" por="10001001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0091" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="33330000" name="REFCON" mclr="11110000" por="11110000" />
+    <sfr address="0x009C" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="33333333" name="ADCON1" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="4" name="16C781" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x001D" start="0x0011" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0094" start="0x008F" />
+    <unused end="0x009A" start="0x0097" />
+    <unused end="0x009E" start="0x009E" />
+    <unused end="0x00EF" start="0x00C0" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x0118" start="0x0113" />
+    <unused end="0x011D" start="0x011D" />
+    <unused end="0x016F" start="0x0120" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x01EF" start="0x018D" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="33133311" name="PORTA" mclr="33331111" por="00001111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33331111" por="00001111" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33330003" name="PIR1" mclr="11110001" por="11110001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="03333333" name="T1CON" mclr="03333333" por="01111111" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="33133311" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="33330003" name="PIE1" mclr="11110001" por="11110001" />
+    <sfr address="0x008E" access="00033033" name="PCON" mclr="00012033" por="00012044" />
+    <sfr address="0x0095" access="33333333" name="WPUB" mclr="22222222" por="22222222" />
+    <sfr address="0x0096" access="33333333" name="IOCB" mclr="22221111" por="22221111" />
+    <sfr address="0x009B" access="00003300" name="REFCON" mclr="00001100" por="00001100" />
+    <sfr address="0x009C" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x009D" access="33333333" name="ANSEL" mclr="22222222" por="22222222" />
+    <sfr address="0x009F" access="00330000" name="ADCON1" mclr="00110000" por="00110000" />
+    <sfr address="0x010C" access="33333333" name="PMDATL" mclr="11111111" por="11111111" />
+    <sfr address="0x010D" access="33333333" name="PMADRL" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="PMDATH" mclr="00111111" por="00111111" />
+    <sfr address="0x010F" access="00033333" name="PMADRH" mclr="00000333" por="00000000" />
+    <sfr address="0x0110" access="91300000" name="CALCON" mclr="11100000" por="11100000" />
+    <sfr address="0x0111" access="33333333" name="PSMCCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0112" access="33303333" name="PSMCCON1" mclr="11101111" por="11101111" />
+    <sfr address="0x0119" access="31333333" name="CM1CON0" mclr="11111111" por="11111111" />
+    <sfr address="0x011A" access="31333333" name="CM2CON0" mclr="11111111" por="11111111" />
+    <sfr address="0x011B" access="11000003" name="CM2CON1" mclr="11000001" por="11000001" />
+    <sfr address="0x011C" access="33000003" name="OPACON" mclr="11000001" por="11000001" />
+    <sfr address="0x011E" access="33333333" name="DAC" mclr="11111111" por="11111111" />
+    <sfr address="0x011F" access="33000033" name="DACON0" mclr="11000011" por="11000011" />
+    <sfr address="0x018C" access="10000009" name="PMCON1" mclr="20000001" por="20000001" />
+  </device>
+  <device nb_banks="4" name="16C782" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x001D" start="0x0011" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0094" start="0x008F" />
+    <unused end="0x009A" start="0x0097" />
+    <unused end="0x009E" start="0x009E" />
+    <unused end="0x00EF" start="0x00C0" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x0118" start="0x0113" />
+    <unused end="0x011D" start="0x011D" />
+    <unused end="0x016F" start="0x0120" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x01EF" start="0x018D" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="33133311" name="PORTA" mclr="33331111" por="00001111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33331111" por="00001111" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33330003" name="PIR1" mclr="11110001" por="11110001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="03333333" name="T1CON" mclr="03333333" por="01111111" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="33133311" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="33330003" name="PIE1" mclr="11110001" por="11110001" />
+    <sfr address="0x008E" access="00033033" name="PCON" mclr="00012033" por="00012044" />
+    <sfr address="0x0095" access="33333333" name="WPUB" mclr="22222222" por="22222222" />
+    <sfr address="0x0096" access="33333333" name="IOCB" mclr="22221111" por="22221111" />
+    <sfr address="0x009B" access="00003300" name="REFCON" mclr="00001100" por="00001100" />
+    <sfr address="0x009C" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x009D" access="33333333" name="ANSEL" mclr="22222222" por="22222222" />
+    <sfr address="0x009F" access="00330000" name="ADCON1" mclr="00110000" por="00110000" />
+    <sfr address="0x010C" access="33333333" name="PMDATL" mclr="11111111" por="11111111" />
+    <sfr address="0x010D" access="33333333" name="PMADRL" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="PMDATH" mclr="00111111" por="00111111" />
+    <sfr address="0x010F" access="00033333" name="PMADRH" mclr="00000333" por="00000000" />
+    <sfr address="0x0110" access="91300000" name="CALCON" mclr="11100000" por="11100000" />
+    <sfr address="0x0111" access="33333333" name="PSMCCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0112" access="33303333" name="PSMCCON1" mclr="11101111" por="11101111" />
+    <sfr address="0x0119" access="31333333" name="CM1CON0" mclr="11111111" por="11111111" />
+    <sfr address="0x011A" access="31333333" name="CM2CON0" mclr="11111111" por="11111111" />
+    <sfr address="0x011B" access="11000003" name="CM2CON1" mclr="11000001" por="11000001" />
+    <sfr address="0x011C" access="33000003" name="OPACON" mclr="11000001" por="11000001" />
+    <sfr address="0x011E" access="33333333" name="DAC" mclr="11111111" por="11111111" />
+    <sfr address="0x011F" access="33000033" name="DACON0" mclr="11000011" por="11000011" />
+    <sfr address="0x018C" access="10000009" name="PMCON1" mclr="20000001" por="20000001" />
+  </device>
+  <device nb_banks="4" name="16C923" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x001F" start="0x0018" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x009F" start="0x0095" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0109" />
+    <unused end="0x010C" start="0x010C" />
+    <unused end="0x016F" start="0x0120" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0189" />
+    <unused end="0x01EF" start="0x018C" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="00333333" name="PORTC" mclr="00333333" por="00000000" />
+    <sfr address="0x0008" access="11133333" name="PORTD" mclr="11111111" por="11111111" />
+    <sfr address="0x0009" access="11111111" name="PORTE" mclr="11111111" por="11111111" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="30003333" name="PIR1" mclr="10001111" por="10001111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="00333333" name="TRISC" mclr="00222222" por="00222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="30003333" name="PIE1" mclr="10001111" por="10001111" />
+    <sfr address="0x008E" access="00000030" name="PCON" mclr="00000030" por="00000010" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0107" access="11111111" name="PORTF" mclr="11111111" por="11111111" />
+    <sfr address="0x0108" access="11111111" name="PORTG" mclr="11111111" por="11111111" />
+    <sfr address="0x010D" access="33333333" name="LCDSE" mclr="22222222" por="22222222" />
+    <sfr address="0x010E" access="00003333" name="LCDPS" mclr="00001111" por="00001111" />
+    <sfr address="0x010F" access="33033333" name="LCDCON" mclr="11011111" por="11011111" />
+    <sfr address="0x0110" access="33333333" name="LCDD00" mclr="33333333" por="00000000" />
+    <sfr address="0x0111" access="33333333" name="LCDD01" mclr="33333333" por="00000000" />
+    <sfr address="0x0112" access="33333333" name="LCDD02" mclr="33333333" por="00000000" />
+    <sfr address="0x0113" access="33333333" name="LCDD03" mclr="33333333" por="00000000" />
+    <sfr address="0x0114" access="33333333" name="LCDD04" mclr="33333333" por="00000000" />
+    <sfr address="0x0115" access="33333333" name="LCDD05" mclr="33333333" por="00000000" />
+    <sfr address="0x0116" access="33333333" name="LCDD06" mclr="33333333" por="00000000" />
+    <sfr address="0x0117" access="33333333" name="LCDD07" mclr="33333333" por="00000000" />
+    <sfr address="0x0118" access="33333333" name="LCDD08" mclr="33333333" por="00000000" />
+    <sfr address="0x0119" access="33333333" name="LCDD09" mclr="33333333" por="00000000" />
+    <sfr address="0x011A" access="33333333" name="LCDD10" mclr="33333333" por="00000000" />
+    <sfr address="0x011B" access="33333333" name="LCDD11" mclr="33333333" por="00000000" />
+    <sfr address="0x011C" access="33333333" name="LCDD12" mclr="33333333" por="00000000" />
+    <sfr address="0x011D" access="33333333" name="LCDD13" mclr="33333333" por="00000000" />
+    <sfr address="0x011E" access="33333333" name="LCDD14" mclr="33333333" por="00000000" />
+    <sfr address="0x011F" access="33333333" name="LCDD15" mclr="33333333" por="00000000" />
+    <sfr address="0x0187" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0188" access="33333333" name="TRISG" mclr="22222222" por="22222222" />
+  </device>
+  <device nb_banks="4" name="16C924" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x001D" start="0x0018" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x009E" start="0x0095" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0109" />
+    <unused end="0x010C" start="0x010C" />
+    <unused end="0x016F" start="0x0120" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0189" />
+    <unused end="0x01EF" start="0x018C" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="00333333" name="PORTC" mclr="00333333" por="00000000" />
+    <sfr address="0x0008" access="11133333" name="PORTD" mclr="11111111" por="11111111" />
+    <sfr address="0x0009" access="11111111" name="PORTE" mclr="11111111" por="11111111" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33003333" name="PIR1" mclr="11001111" por="11001111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="00333333" name="TRISC" mclr="00222222" por="00222222" />
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+  </device>
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+  </device>
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+  </device>
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+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x001E" start="0x000D" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x008F" start="0x008F" />
+    <unused end="0x009E" start="0x0091" />
+    <unused end="0x00EF" start="0x00A0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00031111" por="00001111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03000000" name="PIR1" mclr="01000000" por="01000000" />
+    <sfr address="0x001F" access="11003333" name="CMCON" mclr="11001111" por="11001111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03000000" name="PIE1" mclr="01000000" por="01000000" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000034" por="00000010" />
+    <sfr address="0x0090" access="00000333" name="EEINTF" mclr="00000222" por="00000222" />
+    <sfr address="0x009F" access="33303333" name="VRCON" mclr="11101111" por="11101111" />
+  </device>
+  <device nb_banks="2" name="16CE624" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x001E" start="0x000D" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x008F" start="0x008F" />
+    <unused end="0x009E" start="0x0091" />
+    <unused end="0x00EF" start="0x00A0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00031111" por="00001111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03000000" name="PIR1" mclr="01000000" por="01000000" />
+    <sfr address="0x001F" access="11003333" name="CMCON" mclr="11001111" por="11001111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03000000" name="PIE1" mclr="01000000" por="01000000" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000034" por="00000010" />
+    <sfr address="0x0090" access="00000333" name="EEINTF" mclr="00000222" por="00000222" />
+    <sfr address="0x009F" access="33303333" name="VRCON" mclr="11101111" por="11101111" />
+  </device>
+  <device nb_banks="2" name="16CE625" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x001E" start="0x000D" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x008F" start="0x008F" />
+    <unused end="0x009E" start="0x0091" />
+    <unused end="0x00EF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00031111" por="00001111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03000000" name="PIR1" mclr="01000000" por="01000000" />
+    <sfr address="0x001F" access="11003333" name="CMCON" mclr="11001111" por="11001111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03000000" name="PIE1" mclr="01000000" por="01000000" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000034" por="00000010" />
+    <sfr address="0x0090" access="00000333" name="EEINTF" mclr="00000222" por="00000222" />
+    <sfr address="0x009F" access="33303333" name="VRCON" mclr="11101111" por="11101111" />
+  </device>
+  <device nb_banks="1" name="16CR54A" >
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="22233333" por="22200000" />
+    <sfr address="0x0005" access="00013333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="00013333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0005" access="00333333" name="OPTION" mclr="00222222" por="00222222" />
+  </device>
+  <device nb_banks="1" name="16CR54C" >
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="22233333" por="22200000" />
+    <sfr address="0x0005" access="00013333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="00013333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0005" access="00333333" name="OPTION_REG" mclr="00222222" por="00222222" />
+  </device>
+  <device nb_banks="1" name="16CR56A" >
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="22233333" por="22200000" />
+    <sfr address="0x0005" access="00013333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="00013333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0005" access="00333333" name="OPTION_REG" mclr="00222222" por="00222222" />
+  </device>
+  <device nb_banks="4" name="16CR57C" >
+    <mirror>
+      <range end="0x000F" start="0x0000" />
+      <range end="0x002F" start="0x0020" />
+      <range end="0x004F" start="0x0040" />
+      <range end="0x006F" start="0x0060" />
+    </mirror>
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="23333333" por="20000000" />
+    <sfr address="0x0005" access="00013333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="00013333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0004" access="22222222" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0005" access="00333333" name="OPTION_REG" mclr="00222222" por="00222222" />
+  </device>
+  <device nb_banks="4" name="16CR58B" >
+    <mirror>
+      <range end="0x000F" start="0x0000" />
+      <range end="0x002F" start="0x0020" />
+      <range end="0x004F" start="0x0040" />
+      <range end="0x006F" start="0x0060" />
+    </mirror>
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="23333333" por="20000000" />
+    <sfr address="0x0005" access="00013333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="00013333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0005" access="00333333" name="OPTION_REG" mclr="00222222" por="00222222" />
+  </device>
+  <device nb_banks="2" name="16CR62" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x001F" start="0x0018" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x009F" start="0x0095" />
+    <unused end="0x00FF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33003333" name="PIR1" mclr="11001111" por="11001111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="33003333" name="PIE1" mclr="11001111" por="11001111" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="00333333" name="SSPSTAT" mclr="00111111" por="00111111" />
+  </device>
+  <device nb_banks="2" name="16CR620A" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x001E" start="0x000D" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x009E" start="0x008F" />
+    <unused end="0x00EF" start="0x00A0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03000000" name="PIR1" mclr="01000000" por="01000000" />
+    <sfr address="0x001F" access="11003333" name="CMCON" mclr="11001111" por="11001111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03000000" name="PIE1" mclr="01000000" por="01000000" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000034" por="00000010" />
+    <sfr address="0x009F" access="33303333" name="VRCON" mclr="11101111" por="11101111" />
+  </device>
+  <device nb_banks="2" name="16CR63" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x001F" start="0x001E" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009F" start="0x009A" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="00113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x000D" access="00000003" name="PIR2" mclr="00000001" por="00000001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33330111" name="RCSTA" mclr="11110110" por="11110110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="00333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008D" access="00000003" name="PIE2" mclr="00000001" por="00000001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="00333333" name="SSPSTAT" mclr="00111111" por="00111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="2" name="16CR64" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x001F" start="0x0018" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x009F" start="0x0095" />
+    <unused end="0x00FF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33003333" name="PIR1" mclr="11001111" por="11001111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="11330333" name="TRISE" mclr="11110222" por="11110222" />
+    <sfr address="0x008C" access="33003333" name="PIE1" mclr="11001111" por="11001111" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="00333333" name="SSPSTAT" mclr="00111111" por="00111111" />
+  </device>
+  <device nb_banks="2" name="16CR65" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x001F" start="0x001E" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009F" start="0x009A" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x000D" access="00000003" name="PIR2" mclr="00000001" por="00000001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33330111" name="RCSTA" mclr="11110110" por="11110110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="11330333" name="TRISE" mclr="11110222" por="11110222" />
+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008D" access="00000003" name="PIE2" mclr="00000001" por="00000001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="00333333" name="SSPSTAT" mclr="00111111" por="00111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="2" name="16CR72" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x001D" start="0x0018" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x009E" start="0x0095" />
+    <unused end="0x00FF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03003333" name="PIR1" mclr="01001111" por="01001111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03003333" name="PIE1" mclr="01001111" por="01001111" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+  </device>
+  <device nb_banks="2" name="16CR83" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x002F" start="0x000A" />
+      <range end="0x00AF" start="0x008A" />
+    </mirror>
+    <unused end="0x0007" start="0x0007" />
+    <unused end="0x007F" start="0x0030" />
+    <unused end="0x0087" start="0x0087" />
+    <unused end="0x00FF" start="0x00B0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="00033399" name="EECON1" mclr="00014111" por="00010111" />
+    <sfr address="0x0089" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="2" name="16CR84" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x004F" start="0x000A" />
+      <range end="0x00CF" start="0x008A" />
+    </mirror>
+    <unused end="0x0007" start="0x0007" />
+    <unused end="0x007F" start="0x0050" />
+    <unused end="0x0087" start="0x0087" />
+    <unused end="0x00FF" start="0x00D0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="00033399" name="EECON1" mclr="00014111" por="00010111" />
+    <sfr address="0x0089" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F505" >
+    <mirror>
+      <range end="0x000F" start="0x0000" />
+      <range end="0x002F" start="0x0020" />
+      <range end="0x004F" start="0x0040" />
+      <range end="0x006F" start="0x0060" />
+    </mirror>
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="31311333" name="STATUS" mclr="40144333" por="10122000" />
+    <sfr address="0x0004" access="13333333" name="FSR" mclr="22133333" por="22100000" />
+    <sfr address="0x0005" access="33333330" name="OSCCAL" mclr="33333330" por="00000000" />
+    <sfr address="0x0006" access="00331333" name="PORTB" mclr="00333333" por="00000000" />
+    <sfr address="0x0007" access="00333333" name="PORTC" mclr="00333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="44444444" por="44444444" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="00333333" name="TRISB" mclr="00222222" por="00222222" />
+    <sfr address="0x0004" access="00333333" name="TRISC" mclr="00222222" por="00222222" />
+    <sfr address="0x0005" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+  </device>
+  <device nb_banks="4" name="16F506" >
+    <mirror>
+      <range end="0x000F" start="0x0000" />
+      <range end="0x002F" start="0x0020" />
+      <range end="0x004F" start="0x0040" />
+      <range end="0x006F" start="0x0060" />
+    </mirror>
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11122333" por="11122000" />
+    <sfr address="0x0004" access="13333333" name="FSR" mclr="21133333" por="21100000" />
+    <sfr address="0x0005" access="33333330" name="OSCCAL" mclr="22222220" por="22222220" />
+    <sfr address="0x0006" access="00331333" name="PORTB" mclr="00333333" por="00000000" />
+    <sfr address="0x0007" access="00333333" name="PORTC" mclr="00333333" por="00000000" />
+    <sfr address="0x0008" access="13333333" name="CM1CON0" mclr="22222222" por="22222222" />
+    <sfr address="0x0009" access="33333333" name="ADCON0" mclr="22222211" por="22222211" />
+    <sfr address="0x000A" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x000B" access="13333333" name="CM2CON0" mclr="22222222" por="22222222" />
+    <sfr address="0x000C" access="33303333" name="VRCON" mclr="11101111" por="11101111" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0004" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0005" access="00333333" name="OPTION_REG" mclr="00222222" por="00222222" />
+  </device>
+  <device nb_banks="1" name="16F54" >
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="11133333" name="FSR" mclr="22233333" por="22200000" />
+    <sfr address="0x0005" access="00013333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="00013333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0003" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0005" access="00333333" name="OPTION_REG" mclr="00222222" por="00222222" />
+  </device>
+  <device nb_banks="4" name="16F57" >
+    <mirror>
+      <range end="0x000F" start="0x0000" />
+      <range end="0x002F" start="0x0020" />
+      <range end="0x004F" start="0x0040" />
+      <range end="0x006F" start="0x0060" />
+    </mirror>
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="13333333" name="FSR" mclr="23333333" por="20000000" />
+    <sfr address="0x0005" access="00013333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="00013333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0003" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0004" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0005" access="00333333" name="OPTION_REG" mclr="00222222" por="00222222" />
+  </device>
+  <device nb_banks="8" name="16F59" >
+    <mirror>
+      <range end="0x000F" start="0x0000" />
+      <range end="0x002F" start="0x0020" />
+      <range end="0x004F" start="0x0040" />
+      <range end="0x006F" start="0x0060" />
+      <range end="0x008F" start="0x0080" />
+      <range end="0x00AF" start="0x00A0" />
+      <range end="0x00CF" start="0x00C0" />
+      <range end="0x00EF" start="0x00E0" />
+    </mirror>
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11122333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00013333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="33330000" name="PORTE" mclr="33330000" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="00013333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0003" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0004" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0005" access="00333333" name="OPTION_REG" mclr="00222222" por="00222222" />
+    <sfr address="0x0007" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0008" access="33330000" name="TRISE" mclr="22220000" por="22220000" />
+  </device>
+  <device nb_banks="4" name="16F616" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0005" start="0x0005" />
+      <range end="0x0105" start="0x0105" />
+    </mirror>
+    <mirror>
+      <range end="0x0007" start="0x0007" />
+      <range end="0x0107" start="0x0107" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x000C" start="0x000C" />
+      <range end="0x010C" start="0x010C" />
+    </mirror>
+    <mirror>
+      <range end="0x001A" start="0x000E" />
+      <range end="0x011A" start="0x010E" />
+    </mirror>
+    <mirror>
+      <range end="0x006F" start="0x001E" />
+      <range end="0x016F" start="0x011E" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0085" start="0x0085" />
+      <range end="0x0185" start="0x0185" />
+    </mirror>
+    <mirror>
+      <range end="0x0087" start="0x0087" />
+      <range end="0x0187" start="0x0187" />
+    </mirror>
+    <mirror>
+      <range end="0x008C" start="0x008C" />
+      <range end="0x018C" start="0x018C" />
+    </mirror>
+    <mirror>
+      <range end="0x0092" start="0x008E" />
+      <range end="0x0192" start="0x018E" />
+    </mirror>
+    <mirror>
+      <range end="0x0096" start="0x0095" />
+      <range end="0x0196" start="0x0195" />
+    </mirror>
+    <mirror>
+      <range end="0x00BF" start="0x0099" />
+      <range end="0x01BF" start="0x0199" />
+    </mirror>
+    <unused end="0x0006" start="0x0006" />
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x0018" start="0x0018" />
+    <unused end="0x001D" start="0x001D" />
+    <unused end="0x0086" start="0x0086" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0094" start="0x0093" />
+    <unused end="0x0098" start="0x0097" />
+    <unused end="0x009D" start="0x009B" />
+    <unused end="0x00EF" start="0x00C0" />
+    <unused end="0x0106" start="0x0106" />
+    <unused end="0x0109" start="0x0108" />
+    <unused end="0x010D" start="0x010D" />
+    <unused end="0x011D" start="0x011B" />
+    <unused end="0x0186" start="0x0186" />
+    <unused end="0x0189" start="0x0188" />
+    <unused end="0x018D" start="0x018D" />
+    <unused end="0x018F" start="0x018E" />
+    <unused end="0x0194" start="0x0193" />
+    <unused end="0x0198" start="0x0197" />
+    <unused end="0x01EF" start="0x01C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0007" access="00333333" name="PORTC" mclr="00333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111111" />
+    <sfr address="0x000C" access="33333333" name="PIR1" mclr="11111111" por="11111111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="33333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="33333333" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0013" size="2" name="CCPR1" />
+    <sfr address="0x0013" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0015" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0016" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0017" access="33333333" name="ECCPAS" mclr="11111111" por="11111111" />
+    <sfr address="0x0019" access="33333333" name="VRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="31330333" name="CM1CON0" mclr="11110111" por="11110111" />
+    <sfr address="0x001B" access="31330333" name="CM2CON0" mclr="11110111" por="11110111" />
+    <sfr address="0x001C" access="11033333" name="CM2CON1" mclr="11011121" por="11011121" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0087" access="00333333" name="TRISC" mclr="00222222" por="00222222" />
+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0091" access="33333333" name="ANSEL" mclr="22222222" por="22222222" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0095" access="00330333" name="WPUA" mclr="00220222" por="00220222" />
+    <sfr address="0x0096" access="00333333" name="IOCA" mclr="00111111" por="00111111" />
+    <sfr address="0x0099" access="33333303" name="SRCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x009A" access="33000000" name="SRCON1" mclr="22000000" por="22000000" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="03330000" name="ADCON1" mclr="01110000" por="01110000" />
+  </device>
+  <device nb_banks="4" name="16F627" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x0014" start="0x0013" />
+    <unused end="0x001E" start="0x001B" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0093" />
+    <unused end="0x009E" start="0x009E" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x011F" start="0x010C" />
+    <unused end="0x016F" start="0x0150" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x01EF" start="0x018C" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="33133333" name="PORTA" mclr="00031111" por="00001111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33110333" name="PIR1" mclr="11110111" por="11110111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001F" access="11333333" name="CMCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="33133333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="33330333" name="PIE1" mclr="11110111" por="11110111" />
+    <sfr address="0x008E" access="00003033" name="PCON" mclr="00002034" por="00002010" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009A" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x009B" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x009C" access="00003399" name="EECON1" mclr="00004111" por="00000111" />
+    <sfr address="0x009D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x009F" access="33303333" name="VRCON" mclr="11101111" por="11101111" />
+  </device>
+  <device nb_banks="4" name="16F627A" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x0014" start="0x0013" />
+    <unused end="0x001E" start="0x001B" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0093" />
+    <unused end="0x009E" start="0x009E" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x011F" start="0x010C" />
+    <unused end="0x016F" start="0x0150" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x01EF" start="0x018C" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="33133333" name="PORTA" mclr="00001111" por="00001111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33110333" name="PIR1" mclr="11110111" por="11110111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001F" access="11333333" name="CMCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="33133333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="33330333" name="PIE1" mclr="11110111" por="11110111" />
+    <sfr address="0x008E" access="00003033" name="PCON" mclr="00002034" por="00002010" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009A" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x009B" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x009C" access="00003399" name="EECON1" mclr="00004111" por="00000111" />
+    <sfr address="0x009D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x009F" access="33303333" name="VRCON" mclr="11101111" por="11101111" />
+  </device>
+  <device nb_banks="4" name="16F628" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x0014" start="0x0013" />
+    <unused end="0x001E" start="0x001B" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0093" />
+    <unused end="0x009E" start="0x009E" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x011F" start="0x010C" />
+    <unused end="0x016F" start="0x0150" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x01EF" start="0x018C" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="33133333" name="PORTA" mclr="00031111" por="00001111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33110333" name="PIR1" mclr="11110111" por="11110111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001F" access="11333333" name="CMCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="33133333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="33330333" name="PIE1" mclr="11110111" por="11110111" />
+    <sfr address="0x008E" access="00003033" name="PCON" mclr="00002034" por="00002010" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009A" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x009B" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x009C" access="00003399" name="EECON1" mclr="00004111" por="00000111" />
+    <sfr address="0x009D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x009F" access="33303333" name="VRCON" mclr="11101111" por="11101111" />
+  </device>
+  <device nb_banks="4" name="16F628A" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x0014" start="0x0013" />
+    <unused end="0x001E" start="0x001B" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0093" />
+    <unused end="0x009E" start="0x009E" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x011F" start="0x010C" />
+    <unused end="0x016F" start="0x0150" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x01EF" start="0x018C" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="33133333" name="PORTA" mclr="00001111" por="00001111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33110333" name="PIR1" mclr="11110111" por="11110111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001F" access="11333333" name="CMCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="33133333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="33330333" name="PIE1" mclr="11110111" por="11110111" />
+    <sfr address="0x008E" access="00003033" name="PCON" mclr="00002034" por="00002010" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009A" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x009B" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x009C" access="00003399" name="EECON1" mclr="00004111" por="00000111" />
+    <sfr address="0x009D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x009F" access="33303333" name="VRCON" mclr="11101111" por="11101111" />
+  </device>
+  <device nb_banks="2" name="16F630" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <mirror>
+      <range end="0x005F" start="0x0020" />
+      <range end="0x00DF" start="0x00A0" />
+    </mirror>
+    <unused end="0x0006" start="0x0006" />
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x0018" start="0x0011" />
+    <unused end="0x001F" start="0x001A" />
+    <unused end="0x007F" start="0x0060" />
+    <unused end="0x0086" start="0x0086" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x008F" start="0x008F" />
+    <unused end="0x0094" start="0x0091" />
+    <unused end="0x0098" start="0x0097" />
+    <unused end="0x009F" start="0x009E" />
+    <unused end="0x00FF" start="0x00E0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0007" access="00333333" name="PORTC" mclr="00333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111111" />
+    <sfr address="0x000C" access="33003003" name="PIR1" mclr="11001001" por="11001001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="03333333" name="T1CON" mclr="03333333" por="01111111" />
+    <sfr address="0x0019" access="01033333" name="CMCON" mclr="01011111" por="01011111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00331333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0087" access="00333333" name="TRISC" mclr="00222222" por="00222222" />
+    <sfr address="0x008C" access="33003003" name="PIE1" mclr="11001001" por="11001001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000010" />
+    <sfr address="0x0090" access="33333300" name="OSCCAL" mclr="21111100" por="21111100" />
+    <sfr address="0x0095" access="00330333" name="WPUA" mclr="00220222" por="00220222" />
+    <sfr address="0x0096" access="00333333" name="IOCA" mclr="00111111" por="00111111" />
+    <sfr address="0x0099" access="30303333" name="VRCON" mclr="10101111" por="10101111" />
+    <sfr address="0x009A" access="33333333" name="EEDAT" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="03333333" name="EEADR" mclr="01111111" por="01111111" />
+    <sfr address="0x009C" access="00003399" name="EECON1" mclr="00004111" por="00000111" />
+    <sfr address="0x009D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F631" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0007" start="0x0005" />
+      <range end="0x0107" start="0x0105" />
+    </mirror>
+    <mirror>
+      <range end="0x0087" start="0x0085" />
+      <range end="0x0187" start="0x0185" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x003F" start="0x0011" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x0094" start="0x0091" />
+    <unused end="0x00EF" start="0x0098" />
+    <unused end="0x0109" start="0x0108" />
+    <unused end="0x0114" start="0x010E" />
+    <unused end="0x0117" start="0x0117" />
+    <unused end="0x016F" start="0x011C" />
+    <unused end="0x0189" start="0x0188" />
+    <unused end="0x019D" start="0x018E" />
+    <unused end="0x01EF" start="0x019F" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00331333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0006" access="33330000" name="PORTB" mclr="33330000" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111111" />
+    <sfr address="0x000C" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x000D" access="33330000" name="PIR2" mclr="11110000" por="11110000" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="33333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00331333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33330000" name="TRISB" mclr="22220000" por="22220000" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x008D" access="33330000" name="PIE2" mclr="11110000" por="11110000" />
+    <sfr address="0x008E" access="00330033" name="PCON" mclr="00130033" por="00120044" />
+    <sfr address="0x008F" access="03331113" name="OSCCON" mclr="02210111" por="02210111" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0095" access="00330333" name="WPUA" mclr="00220222" por="00220222" />
+    <sfr address="0x0096" access="00333333" name="IOCA" mclr="00111111" por="00111111" />
+    <sfr address="0x0097" access="00033333" name="WDTCON" mclr="00012111" por="00012111" />
+    <sfr address="0x010C" access="33333333" name="EEDAT" mclr="11111111" por="11111111" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0115" access="33330000" name="WPUB" mclr="22220000" por="22220000" />
+    <sfr address="0x0116" access="33330000" name="IOCB" mclr="11110000" por="11110000" />
+    <sfr address="0x0118" access="33333333" name="VRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0119" access="31333333" name="CM1CON0" mclr="11111111" por="11111111" />
+    <sfr address="0x011A" access="31333333" name="CM2CON0" mclr="11111121" por="11111121" />
+    <sfr address="0x011B" access="11000033" name="CM2CON1" mclr="11000021" por="11000021" />
+    <sfr address="0x018C" access="10003399" name="EECON1" mclr="30004111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x019E" access="33333300" name="SRCON" mclr="11111100" por="11111100" />
+  </device>
+  <device nb_banks="4" name="16F636" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0005" start="0x0005" />
+      <range end="0x0105" start="0x0105" />
+    </mirror>
+    <mirror>
+      <range end="0x0007" start="0x0007" />
+      <range end="0x0107" start="0x0107" />
+    </mirror>
+    <mirror>
+      <range end="0x000A" start="0x000A" />
+      <range end="0x010A" start="0x010A" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000B" />
+      <range end="0x008B" start="0x008B" />
+      <range end="0x010B" start="0x010B" />
+      <range end="0x018B" start="0x018B" />
+    </mirror>
+    <mirror>
+      <range end="0x008A" start="0x008A" />
+      <range end="0x018A" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0085" start="0x0085" />
+      <range end="0x0185" start="0x0185" />
+    </mirror>
+    <mirror>
+      <range end="0x0087" start="0x0087" />
+      <range end="0x0187" start="0x0187" />
+    </mirror>
+    <unused end="0x0006" start="0x0006" />
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x0017" start="0x0011" />
+    <unused end="0x001F" start="0x001B" />
+    <unused end="0x0086" start="0x0086" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0093" start="0x0091" />
+    <unused end="0x0098" start="0x0098" />
+    <unused end="0x009F" start="0x009E" />
+    <unused end="0x00EF" start="0x00C0" />
+    <unused end="0x0106" start="0x0106" />
+    <unused end="0x0109" start="0x0108" />
+    <unused end="0x010F" start="0x010C" />
+    <unused end="0x016F" start="0x0115" />
+    <unused end="0x0186" start="0x0186" />
+    <unused end="0x0189" start="0x0188" />
+    <unused end="0x01EF" start="0x018C" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00331333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0007" access="00333333" name="PORTC" mclr="00333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111111" />
+    <sfr address="0x000C" access="33133303" name="PIR1" mclr="11111101" por="11111101" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="33333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0018" access="00033333" name="WDTCON" mclr="00012111" por="00012111" />
+    <sfr address="0x0019" access="11333333" name="CMCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="00000033" name="CMCON1" mclr="00000021" por="00000021" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00331333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0087" access="00333333" name="TRISC" mclr="00222222" por="00222222" />
+    <sfr address="0x008C" access="33333303" name="PIE1" mclr="11111101" por="11111101" />
+    <sfr address="0x008E" access="00333033" name="PCON" mclr="00131033" por="00121044" />
+    <sfr address="0x008F" access="03331113" name="OSCCON" mclr="02210111" por="02210111" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0094" access="00130333" name="LVDCON" mclr="00110111" por="00110111" />
+    <sfr address="0x0095" access="00330333" name="WPUDA" mclr="00220222" por="00220222" />
+    <sfr address="0x0096" access="00333333" name="IOCA" mclr="00111111" por="00111111" />
+    <sfr address="0x0097" access="00330333" name="WDA" mclr="00220222" por="00220222" />
+    <sfr address="0x0099" access="30303333" name="VRCON" mclr="10101111" por="10101111" />
+    <sfr address="0x009A" access="33333333" name="EEDAT" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x009C" access="00003399" name="EECON1" mclr="00004111" por="00000111" />
+    <sfr address="0x009D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0110" access="93000033" name="CRCON" mclr="11000011" por="11000011" />
+    <sfr address="0x0111" access="33333333" name="CRDAT0" mclr="11111111" por="11111111" />
+    <sfr address="0x0112" access="33333333" name="CRDAT1" mclr="11111111" por="11111111" />
+    <sfr address="0x0113" access="33333333" name="CRDAT2" mclr="11111111" por="11111111" />
+    <sfr address="0x0114" access="33333333" name="CRDAT3" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="4" name="16F639" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0005" start="0x0005" />
+      <range end="0x0105" start="0x0105" />
+    </mirror>
+    <mirror>
+      <range end="0x0007" start="0x0007" />
+      <range end="0x0107" start="0x0107" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x000C" start="0x000C" />
+      <range end="0x010C" start="0x010C" />
+    </mirror>
+    <mirror>
+      <range end="0x000F" start="0x000E" />
+      <range end="0x010F" start="0x010E" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0085" start="0x0085" />
+      <range end="0x0185" start="0x0185" />
+    </mirror>
+    <mirror>
+      <range end="0x0087" start="0x0087" />
+      <range end="0x0187" start="0x0187" />
+    </mirror>
+    <mirror>
+      <range end="0x008C" start="0x008C" />
+      <range end="0x018C" start="0x018C" />
+    </mirror>
+    <mirror>
+      <range end="0x0090" start="0x008E" />
+      <range end="0x0190" start="0x018E" />
+    </mirror>
+    <mirror>
+      <range end="0x0097" start="0x0094" />
+      <range end="0x0197" start="0x0194" />
+    </mirror>
+    <mirror>
+      <range end="0x009D" start="0x0099" />
+      <range end="0x019D" start="0x0199" />
+    </mirror>
+    <mirror>
+      <range end="0x00BF" start="0x00A0" />
+      <range end="0x01BF" start="0x01A0" />
+    </mirror>
+    <unused end="0x0006" start="0x0006" />
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x0017" start="0x0011" />
+    <unused end="0x001F" start="0x001B" />
+    <unused end="0x0086" start="0x0086" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0093" start="0x0091" />
+    <unused end="0x0098" start="0x0098" />
+    <unused end="0x009F" start="0x009E" />
+    <unused end="0x00EF" start="0x00C0" />
+    <unused end="0x0106" start="0x0106" />
+    <unused end="0x0109" start="0x0108" />
+    <unused end="0x010D" start="0x010D" />
+    <unused end="0x016F" start="0x0115" />
+    <unused end="0x0186" start="0x0186" />
+    <unused end="0x0189" start="0x0188" />
+    <unused end="0x018D" start="0x018D" />
+    <unused end="0x0193" start="0x0191" />
+    <unused end="0x0198" start="0x0198" />
+    <unused end="0x019F" start="0x019E" />
+    <unused end="0x01EF" start="0x01C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="31311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00331333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0007" access="00333333" name="PORTC" mclr="00333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111111" />
+    <sfr address="0x000C" access="33133303" name="PIR1" mclr="11111101" por="11111101" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="33333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0018" access="00033333" name="WDTCON" mclr="00012111" por="00012111" />
+    <sfr address="0x0019" access="11333333" name="CMCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="00000033" name="CMCON1" mclr="00000021" por="00000021" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00331333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0087" access="00333333" name="TRISC" mclr="00222222" por="00222222" />
+    <sfr address="0x008C" access="33333303" name="PIE1" mclr="11111101" por="11111101" />
+    <sfr address="0x008E" access="00333033" name="PCON" mclr="00131033" por="00121044" />
+    <sfr address="0x008F" access="03331113" name="OSCCON" mclr="02210111" por="02210111" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0094" access="31300333" name="LVDCON" mclr="11100111" por="11100111" />
+    <sfr address="0x0095" access="00330333" name="WPUDA" mclr="00220222" por="00220222" />
+    <sfr address="0x0096" access="00333333" name="IOCA" mclr="00111111" por="00111111" />
+    <sfr address="0x0097" access="00330333" name="WDA" mclr="00220222" por="00220222" />
+    <sfr address="0x0099" access="30303333" name="VRCON" mclr="10101111" por="10101111" />
+    <sfr address="0x009A" access="33333333" name="EEDAT" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x009C" access="00003399" name="EECON1" mclr="00004111" por="00000111" />
+    <sfr address="0x009D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0110" access="93000033" name="CRCON" mclr="11000011" por="11000011" />
+    <sfr address="0x0111" access="33333333" name="CRDAT0" mclr="11111111" por="11111111" />
+    <sfr address="0x0112" access="33333333" name="CRDAT1" mclr="11111111" por="11111111" />
+    <sfr address="0x0113" access="33333333" name="CRDAT2" mclr="11111111" por="11111111" />
+    <sfr address="0x0114" access="33333333" name="CRDAT3" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="4" name="16F648A" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x0014" start="0x0013" />
+    <unused end="0x001E" start="0x001B" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0093" />
+    <unused end="0x009E" start="0x009E" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x011F" start="0x010C" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x01EF" start="0x018C" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="33133333" name="PORTA" mclr="00001111" por="00001111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33110333" name="PIR1" mclr="11110111" por="11110111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001F" access="11333333" name="CMCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="33133333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="33330333" name="PIE1" mclr="11110111" por="11110111" />
+    <sfr address="0x008E" access="00003033" name="PCON" mclr="00002034" por="00002010" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009A" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x009B" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x009C" access="00003399" name="EECON1" mclr="00004111" por="00000111" />
+    <sfr address="0x009D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x009F" access="33303333" name="VRCON" mclr="11101111" por="11101111" />
+  </device>
+  <device nb_banks="2" name="16F676" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <mirror>
+      <range end="0x005F" start="0x0020" />
+      <range end="0x00DF" start="0x00A0" />
+    </mirror>
+    <unused end="0x0006" start="0x0006" />
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x0018" start="0x0011" />
+    <unused end="0x001D" start="0x001A" />
+    <unused end="0x007F" start="0x0060" />
+    <unused end="0x0086" start="0x0086" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x008F" start="0x008F" />
+    <unused end="0x0094" start="0x0092" />
+    <unused end="0x0098" start="0x0097" />
+    <unused end="0x00FF" start="0x00E0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0007" access="00333333" name="PORTC" mclr="00333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111111" />
+    <sfr address="0x000C" access="33003003" name="PIR1" mclr="11001001" por="11001001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="03333333" name="T1CON" mclr="03333333" por="01111111" />
+    <sfr address="0x0019" access="01033333" name="CMCON" mclr="01011111" por="01011111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33033333" name="ADCON0" mclr="11011111" por="11011111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00331333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0087" access="00333333" name="TRISC" mclr="00222222" por="00222222" />
+    <sfr address="0x008C" access="33003003" name="PIE1" mclr="11001001" por="11001001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000010" />
+    <sfr address="0x0090" access="33333300" name="OSCCAL" mclr="21111100" por="21111100" />
+    <sfr address="0x0091" access="33333333" name="ANSEL" mclr="22222222" por="22222222" />
+    <sfr address="0x0095" access="00330333" name="WPUA" mclr="00220222" por="00220222" />
+    <sfr address="0x0096" access="00333333" name="IOCA" mclr="00111111" por="00111111" />
+    <sfr address="0x0099" access="30303333" name="VRCON" mclr="10101111" por="10101111" />
+    <sfr address="0x009A" access="33333333" name="EEDAT" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="03333333" name="EEADR" mclr="01111111" por="01111111" />
+    <sfr address="0x009C" access="00003399" name="EECON1" mclr="00004111" por="00000111" />
+    <sfr address="0x009D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="03330000" name="ADCON1" mclr="01110000" por="01110000" />
+  </device>
+  <device nb_banks="4" name="16F677" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0007" start="0x0005" />
+      <range end="0x0107" start="0x0105" />
+    </mirror>
+    <mirror>
+      <range end="0x0087" start="0x0085" />
+      <range end="0x0187" start="0x0185" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x0012" start="0x0011" />
+    <unused end="0x001D" start="0x0015" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x0092" start="0x0091" />
+    <unused end="0x009D" start="0x0098" />
+    <unused end="0x00EF" start="0x00C0" />
+    <unused end="0x0109" start="0x0108" />
+    <unused end="0x0114" start="0x010E" />
+    <unused end="0x0117" start="0x0117" />
+    <unused end="0x011D" start="0x011C" />
+    <unused end="0x016F" start="0x0120" />
+    <unused end="0x0189" start="0x0188" />
+    <unused end="0x018D" start="0x018E" />
+    <unused end="0x01EF" start="0x019F" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00331333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0006" access="33330000" name="PORTB" mclr="33330000" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111111" />
+    <sfr address="0x000C" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x000D" access="33330000" name="PIR2" mclr="11110000" por="11110000" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="33333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00331333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33330000" name="TRISB" mclr="22220000" por="22220000" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x008D" access="33330000" name="PIE2" mclr="11110000" por="11110000" />
+    <sfr address="0x008E" access="00330033" name="PCON" mclr="00130033" por="00120044" />
+    <sfr address="0x008F" access="03331113" name="OSCCON" mclr="02210111" por="02210111" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0095" access="00330333" name="WPUA" mclr="00220222" por="00220222" />
+    <sfr address="0x0096" access="00333333" name="IOCA" mclr="00111111" por="00111111" />
+    <sfr address="0x0097" access="00033333" name="WDTCON" mclr="00012111" por="00012111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="03330000" name="ADCON1" mclr="01110000" por="01110000" />
+    <sfr address="0x010C" access="33333333" name="EEDAT" mclr="11111111" por="11111111" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0115" access="33330000" name="WPUB" mclr="22220000" por="22220000" />
+    <sfr address="0x0116" access="33330000" name="IOCB" mclr="11110000" por="11110000" />
+    <sfr address="0x0118" access="33333333" name="VRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0119" access="31333333" name="CM1CON0" mclr="11111111" por="11111111" />
+    <sfr address="0x011A" access="31333333" name="CM2CON0" mclr="11111121" por="11111121" />
+    <sfr address="0x011B" access="11000033" name="CM2CON1" mclr="11000021" por="11000021" />
+    <sfr address="0x011E" access="33333333" name="ANSEL" mclr="22222222" por="22222222" />
+    <sfr address="0x011F" access="00003333" name="ANSELH" mclr="00002222" por="00002222" />
+    <sfr address="0x018C" access="10003399" name="EECON1" mclr="30004111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x019E" access="33333300" name="SRCON" mclr="11111100" por="11111100" />
+  </device>
+  <device nb_banks="2" name="16F684" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x0005" start="0x0005" />
+    </mirror>
+    <mirror>
+      <range end="0x0007" start="0x0007" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <mirror>
+      <range end="0x000C" start="0x000C" />
+    </mirror>
+    <mirror>
+      <range end="0x001A" start="0x000E" />
+    </mirror>
+    <mirror>
+      <range end="0x006F" start="0x001E" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+    </mirror>
+    <mirror>
+      <range end="0x0085" start="0x0085" />
+    </mirror>
+    <mirror>
+      <range end="0x0087" start="0x0087" />
+    </mirror>
+    <mirror>
+      <range end="0x008C" start="0x008C" />
+    </mirror>
+    <mirror>
+      <range end="0x0092" start="0x008E" />
+    </mirror>
+    <mirror>
+      <range end="0x0096" start="0x0095" />
+    </mirror>
+    <mirror>
+      <range end="0x00BF" start="0x0099" />
+    </mirror>
+    <unused end="0x0006" start="0x0006" />
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x001D" start="0x001B" />
+    <unused end="0x0086" start="0x0086" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0094" start="0x0093" />
+    <unused end="0x0098" start="0x0097" />
+    <unused end="0x00EF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0007" access="00333333" name="PORTC" mclr="00333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111111" />
+    <sfr address="0x000C" access="33333333" name="PIR1" mclr="11111111" por="11111111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="33333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="33333333" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0013" size="2" name="CCPR1" />
+    <sfr address="0x0013" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0015" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0016" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0017" access="33333333" name="ECCPAS" mclr="11111111" por="11111111" />
+    <sfr address="0x0018" access="00033333" name="WDTCON" mclr="00012111" por="00012111" />
+    <sfr address="0x0019" access="11333333" name="CMCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="00000033" name="CMCON1" mclr="00000021" por="00000021" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33033333" name="ADCON0" mclr="11011111" por="11011111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0087" access="00333333" name="TRISC" mclr="00222222" por="00222222" />
+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008E" access="00330033" name="PCON" mclr="00130033" por="00120044" />
+    <sfr address="0x008F" access="03331113" name="OSCCON" mclr="02210111" por="02210111" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0091" access="33333333" name="ANSEL" mclr="22222222" por="22222222" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0095" access="00330333" name="WPUA" mclr="00220222" por="00220222" />
+    <sfr address="0x0096" access="00333333" name="IOCA" mclr="00111111" por="00111111" />
+    <sfr address="0x0099" access="30303333" name="VRCON" mclr="10101111" por="10101111" />
+    <sfr address="0x009A" access="33333333" name="EEDAT" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x009C" access="00003399" name="EECON1" mclr="00004111" por="00000111" />
+    <sfr address="0x009D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="03330000" name="ADCON1" mclr="01110000" por="01110000" />
+  </device>
+  <device nb_banks="4" name="16F685" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0007" start="0x0005" />
+      <range end="0x0107" start="0x0105" />
+    </mirror>
+    <mirror>
+      <range end="0x0087" start="0x0085" />
+      <range end="0x0187" start="0x0185" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x0014" start="0x0013" />
+    <unused end="0x001B" start="0x0018" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x0091" start="0x0091" />
+    <unused end="0x0094" start="0x0093" />
+    <unused end="0x009D" start="0x0098" />
+    <unused end="0x0109" start="0x0108" />
+    <unused end="0x0114" start="0x0110" />
+    <unused end="0x0117" start="0x0117" />
+    <unused end="0x011D" start="0x011C" />
+    <unused end="0x0189" start="0x0188" />
+    <unused end="0x018F" start="0x018E" />
+    <unused end="0x019C" start="0x0190" />
+    <unused end="0x01EF" start="0x019F" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00331333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0006" access="33330000" name="PORTB" mclr="33330000" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111111" />
+    <sfr address="0x000C" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x000D" access="33330000" name="PIR2" mclr="11110000" por="11110000" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="33333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0015" size="2" name="CCPR" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x001C" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x001D" access="33333333" name="ECCPAS" mclr="11111111" por="11111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00331333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33330000" name="TRISB" mclr="22220000" por="22220000" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x008D" access="33330000" name="PIE2" mclr="11110000" por="11110000" />
+    <sfr address="0x008E" access="00330033" name="PCON" mclr="00130033" por="00120044" />
+    <sfr address="0x008F" access="03331113" name="OSCCON" mclr="02210111" por="02210111" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0095" access="00330333" name="WPUA" mclr="00220222" por="00220222" />
+    <sfr address="0x0096" access="00333333" name="IOCA" mclr="00111111" por="00111111" />
+    <sfr address="0x0097" access="00033333" name="WDTCON" mclr="00012111" por="00012111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="03330000" name="ADCON1" mclr="01110000" por="01110000" />
+    <sfr address="0x010C" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00111111" por="00111111" />
+    <sfr address="0x010F" access="00003333" name="EEADRH" mclr="00001111" por="00001111" />
+    <sfr address="0x0115" access="33330000" name="WPUB" mclr="22220000" por="22220000" />
+    <sfr address="0x0116" access="33330000" name="IOCB" mclr="11110000" por="11110000" />
+    <sfr address="0x0118" access="33333333" name="VRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0119" access="31333333" name="CM1CON0" mclr="11111111" por="11111111" />
+    <sfr address="0x011A" access="31333333" name="CM2CON0" mclr="11111111" por="11111111" />
+    <sfr address="0x011B" access="11000033" name="CM2CON1" mclr="11000021" por="11000021" />
+    <sfr address="0x011E" access="33333333" name="ANSEL" mclr="22222222" por="22222222" />
+    <sfr address="0x011F" access="00003333" name="ANSELH" mclr="00002222" por="00002222" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30004111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x019D" access="00033333" name="PSTRCON" mclr="00011112" por="00011112" />
+    <sfr address="0x019E" access="33333300" name="SRCON" mclr="11111100" por="11111100" />
+  </device>
+  <device nb_banks="4" name="16F687" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0007" start="0x0005" />
+      <range end="0x0107" start="0x0105" />
+    </mirror>
+    <mirror>
+      <range end="0x0087" start="0x0085" />
+      <range end="0x0187" start="0x0185" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x0012" start="0x0011" />
+    <unused end="0x0017" start="0x0015" />
+    <unused end="0x001D" start="0x001B" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x0092" start="0x0091" />
+    <unused end="0x009D" start="0x009C" />
+    <unused end="0x00EF" start="0x00C0" />
+    <unused end="0x0109" start="0x0108" />
+    <unused end="0x0114" start="0x0110" />
+    <unused end="0x0117" start="0x0117" />
+    <unused end="0x011D" start="0x011C" />
+    <unused end="0x016F" start="0x0120" />
+    <unused end="0x0189" start="0x0188" />
+    <unused end="0x018F" start="0x018E" />
+    <unused end="0x019D" start="0x0190" />
+    <unused end="0x01EF" start="0x019F" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00331333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0006" access="33330000" name="PORTB" mclr="33330000" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111111" />
+    <sfr address="0x000C" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x000D" access="33330000" name="PIR2" mclr="11110000" por="11110000" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="33333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="00000000" por="00000000" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="00000000" por="00000000" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00331333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33330000" name="TRISB" mclr="22220000" por="22220000" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x008D" access="33330000" name="PIE2" mclr="11110000" por="11110000" />
+    <sfr address="0x008E" access="00330033" name="PCON" mclr="00130033" por="00120044" />
+    <sfr address="0x008F" access="03331113" name="OSCCON" mclr="02210111" por="02210111" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0095" access="00330333" name="WPUA" mclr="00220222" por="00220222" />
+    <sfr address="0x0096" access="00333333" name="IOCA" mclr="00111111" por="00111111" />
+    <sfr address="0x0097" access="00033333" name="WDTCON" mclr="00012111" por="00012111" />
+    <sfr address="0x0098" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009A" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="21033033" name="BAUDCTL" mclr="12011011" por="12011011" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="03330000" name="ADCON1" mclr="01110000" por="01110000" />
+    <sfr address="0x010C" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00111111" por="00111111" />
+    <sfr address="0x0115" access="33330000" name="WPUB" mclr="22220000" por="22220000" />
+    <sfr address="0x0116" access="33330000" name="IOCB" mclr="11110000" por="11110000" />
+    <sfr address="0x0118" access="33333333" name="VRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0119" access="31333333" name="CM1CON0" mclr="11111111" por="11111111" />
+    <sfr address="0x011A" access="31333333" name="CM2CON0" mclr="11111111" por="11111111" />
+    <sfr address="0x011B" access="11000033" name="CM2CON1" mclr="11000021" por="11000021" />
+    <sfr address="0x011E" access="33333333" name="ANSEL" mclr="22222222" por="22222222" />
+    <sfr address="0x011F" access="00003333" name="ANSELH" mclr="00002222" por="00002222" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30004111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x019E" access="33333300" name="SRCON" mclr="11111100" por="11111100" />
+  </device>
+  <device nb_banks="4" name="16F688" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0005" start="0x0005" />
+      <range end="0x0105" start="0x0105" />
+    </mirror>
+    <mirror>
+      <range end="0x0007" start="0x0007" />
+      <range end="0x0107" start="0x0107" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0085" start="0x0085" />
+      <range end="0x0185" start="0x0185" />
+    </mirror>
+    <mirror>
+      <range end="0x0087" start="0x0087" />
+      <range end="0x0187" start="0x0187" />
+    </mirror>
+    <mirror>
+      <range end="0x008B" start="0x008A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0006" start="0x0006" />
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x001D" start="0x001B" />
+    <unused end="0x0086" start="0x0086" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0094" start="0x0092" />
+    <unused end="0x0106" start="0x0106" />
+    <unused end="0x0109" start="0x0108" />
+    <unused end="0x011F" start="0x010C" />
+    <unused end="0x0186" start="0x0186" />
+    <unused end="0x0189" start="0x0188" />
+    <unused end="0x01EF" start="0x018C" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0007" access="00333333" name="PORTC" mclr="00333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111111" />
+    <sfr address="0x000C" access="33133313" name="PIR1" mclr="11111111" por="11111111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="33333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0011" access="21033033" name="BAUDCTL" mclr="12011011" por="12011011" />
+    <sfr address="0x0012" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0013" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0014" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0015" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0016" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0017" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0018" access="00033333" name="WDTCON" mclr="00012111" por="00012111" />
+    <sfr address="0x0019" access="11333333" name="CMCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="00000033" name="CMCON1" mclr="00000021" por="00000021" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33033333" name="ADCON0" mclr="11011111" por="11011111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0087" access="00333333" name="TRISC" mclr="00222222" por="00222222" />
+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008E" access="00330033" name="PCON" mclr="00130033" por="00120044" />
+    <sfr address="0x008F" access="03331113" name="OSCCON" mclr="02210111" por="02210111" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0091" access="33333333" name="ANSEL" mclr="22222222" por="22222222" />
+    <sfr address="0x0095" access="00330333" name="WPUA" mclr="00220222" por="00220222" />
+    <sfr address="0x0096" access="00333333" name="IOCA" mclr="00111111" por="00111111" />
+    <sfr address="0x0097" access="00333333" name="EEDATH" mclr="00111111" por="00111111" />
+    <sfr address="0x0098" access="00003333" name="EEADRH" mclr="00001111" por="00001111" />
+    <sfr address="0x0099" access="30303333" name="VRCON" mclr="10101111" por="10101111" />
+    <sfr address="0x009A" access="33333333" name="EEDAT" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x009C" access="30003399" name="EECON1" mclr="00004111" por="00000111" />
+    <sfr address="0x009D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="03330000" name="ADCON1" mclr="01110000" por="01110000" />
+  </device>
+  <device nb_banks="4" name="16F689" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0007" start="0x0005" />
+      <range end="0x0107" start="0x0105" />
+    </mirror>
+    <mirror>
+      <range end="0x0087" start="0x0085" />
+      <range end="0x0187" start="0x0185" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x0012" start="0x0011" />
+    <unused end="0x0017" start="0x0015" />
+    <unused end="0x001D" start="0x001B" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x0092" start="0x0091" />
+    <unused end="0x009D" start="0x009C" />
+    <unused end="0x0109" start="0x0108" />
+    <unused end="0x0114" start="0x0110" />
+    <unused end="0x0117" start="0x0117" />
+    <unused end="0x011D" start="0x011C" />
+    <unused end="0x0189" start="0x0188" />
+    <unused end="0x018F" start="0x018E" />
+    <unused end="0x019D" start="0x0190" />
+    <unused end="0x01EF" start="0x019F" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00331333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0006" access="33330000" name="PORTB" mclr="33330000" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111111" />
+    <sfr address="0x000C" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x000D" access="33330000" name="PIR2" mclr="11110000" por="11110000" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="33333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="00000000" por="00000000" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="00000000" por="00000000" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00331333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33330000" name="TRISB" mclr="22220000" por="22220000" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x008D" access="33330000" name="PIE2" mclr="11110000" por="11110000" />
+    <sfr address="0x008E" access="00330033" name="PCON" mclr="00130033" por="00120044" />
+    <sfr address="0x008F" access="03331113" name="OSCCON" mclr="02210111" por="02210111" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0095" access="00330333" name="WPUA" mclr="00220222" por="00220222" />
+    <sfr address="0x0096" access="00333333" name="IOCA" mclr="00111111" por="00111111" />
+    <sfr address="0x0097" access="00033333" name="WDTCON" mclr="00012111" por="00012111" />
+    <sfr address="0x0098" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009A" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="21033033" name="BAUDCTL" mclr="12011011" por="12011011" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="03330000" name="ADCON1" mclr="01110000" por="01110000" />
+    <sfr address="0x010C" access="33333333" name="EEDAT" mclr="11111111" por="11111111" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00111111" por="00111111" />
+    <sfr address="0x010F" access="00003333" name="EEADRH" mclr="00001111" por="00001111" />
+    <sfr address="0x0115" access="33330000" name="WPUB" mclr="22220000" por="22220000" />
+    <sfr address="0x0116" access="33330000" name="IOCB" mclr="11110000" por="11110000" />
+    <sfr address="0x0118" access="33333333" name="VRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0119" access="31333333" name="CM1CON0" mclr="11111111" por="11111111" />
+    <sfr address="0x011A" access="31333333" name="CM2CON0" mclr="11111111" por="11111111" />
+    <sfr address="0x011B" access="11000033" name="CM2CON1" mclr="11000021" por="11000021" />
+    <sfr address="0x011E" access="33333333" name="ANSEL" mclr="22222222" por="22222222" />
+    <sfr address="0x011F" access="00003333" name="ANSELH" mclr="00002222" por="00002222" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30004111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x019E" access="33333300" name="SRCON" mclr="11111100" por="11111100" />
+  </device>
+  <device nb_banks="4" name="16F690" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0007" start="0x0005" />
+      <range end="0x0107" start="0x0105" />
+    </mirror>
+    <mirror>
+      <range end="0x0087" start="0x0085" />
+      <range end="0x0187" start="0x0185" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x001B" start="0x001B" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x0091" start="0x0091" />
+    <unused end="0x009D" start="0x009C" />
+    <unused end="0x0109" start="0x0108" />
+    <unused end="0x0114" start="0x0110" />
+    <unused end="0x0117" start="0x0117" />
+    <unused end="0x011D" start="0x011C" />
+    <unused end="0x0189" start="0x0188" />
+    <unused end="0x018F" start="0x018E" />
+    <unused end="0x019C" start="0x0190" />
+    <unused end="0x01EF" start="0x019F" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00331333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0006" access="33330000" name="PORTB" mclr="33330000" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111111" />
+    <sfr address="0x000C" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x000D" access="33330000" name="PIR2" mclr="11110000" por="11110000" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="33333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="00000000" por="00000000" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="00000000" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x001D" access="33333333" name="ECCPAS" mclr="11111111" por="11111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00331333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33330000" name="TRISB" mclr="22220000" por="22220000" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x008D" access="33330000" name="PIE2" mclr="11110000" por="11110000" />
+    <sfr address="0x008E" access="00330033" name="PCON" mclr="00130033" por="00120044" />
+    <sfr address="0x008F" access="03331113" name="OSCCON" mclr="02210111" por="02210111" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0095" access="00330333" name="WPUA" mclr="00220222" por="00220222" />
+    <sfr address="0x0096" access="00333333" name="IOCA" mclr="00111111" por="00111111" />
+    <sfr address="0x0097" access="00033333" name="WDTCON" mclr="00012111" por="00012111" />
+    <sfr address="0x0098" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009A" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="21033033" name="BAUDCTL" mclr="12011011" por="12011011" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="03330000" name="ADCON1" mclr="01110000" por="01110000" />
+    <sfr address="0x010C" access="33333333" name="EEDAT" mclr="11111111" por="11111111" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00111111" por="00111111" />
+    <sfr address="0x010F" access="00003333" name="EEADRH" mclr="00001111" por="00001111" />
+    <sfr address="0x0115" access="33330000" name="WPUB" mclr="22220000" por="22220000" />
+    <sfr address="0x0116" access="33330000" name="IOCB" mclr="11110000" por="11110000" />
+    <sfr address="0x0118" access="33333333" name="VRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0119" access="31333333" name="CM1CON0" mclr="11111111" por="11111111" />
+    <sfr address="0x011A" access="31333333" name="CM2CON0" mclr="11111111" por="11111111" />
+    <sfr address="0x011B" access="11000033" name="CM2CON1" mclr="11000021" por="11000021" />
+    <sfr address="0x011E" access="33333333" name="ANSEL" mclr="22222222" por="22222222" />
+    <sfr address="0x011F" access="00003333" name="ANSELH" mclr="00002222" por="00002222" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30004111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x019D" access="00033333" name="PSTRCON" mclr="00011112" por="00011112" />
+    <sfr address="0x019E" access="33333300" name="SRCON" mclr="11111100" por="11111100" />
+  </device>
+  <device nb_banks="2" name="16F716" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x0014" start="0x0013" />
+    <unused end="0x001D" start="0x001A" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x009E" start="0x0093" />
+    <unused end="0x00EF" start="0x00C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00031111" por="00001111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03000333" name="PIR1" mclr="01000111" por="01000111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0018" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0019" access="33033333" name="ECCPAS" mclr="11011111" por="11011111" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03000333" name="PIE1" mclr="01000111" por="01000111" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+  </device>
+  <device nb_banks="4" name="16F72" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0040" />
+      <range end="0x00FF" start="0x00C0" />
+      <range end="0x017F" start="0x0140" />
+      <range end="0x01FF" start="0x01C0" />
+    </mirror>
+    <mirror>
+      <range end="0x003F" start="0x0020" />
+      <range end="0x013F" start="0x0120" />
+    </mirror>
+    <mirror>
+      <range end="0x00BF" start="0x00A0" />
+      <range end="0x01BF" start="0x01A0" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x001D" start="0x0018" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x009E" start="0x0095" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x011F" start="0x0110" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x019F" start="0x018D" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03003333" name="PIR1" mclr="01001111" por="01001111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03003333" name="PIE1" mclr="01001111" por="01001111" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+    <sfr address="0x010C" access="33333333" name="PMDATL" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="PMADRL" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="PMDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00033333" name="PMADRH" mclr="00033333" por="00000000" />
+    <sfr address="0x018C" access="10000009" name="PMCON1" mclr="20000001" por="20000001" />
+  </device>
+  <device nb_banks="4" name="16F73" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0020" />
+      <range end="0x017F" start="0x0120" />
+    </mirror>
+    <mirror>
+      <range end="0x00FF" start="0x00A0" />
+      <range end="0x01FF" start="0x01A0" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009E" start="0x009A" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x011F" start="0x0110" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x019F" start="0x018D" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x000D" access="00000003" name="PIR2" mclr="00000001" por="00000001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33330111" name="RCSTA" mclr="11110110" por="11110110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x008D" access="00000003" name="PIE2" mclr="00000001" por="00000001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+    <sfr address="0x010C" access="33333333" name="PMDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="PMADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="PMDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00033333" name="PMADRH" mclr="00033333" por="00000000" />
+    <sfr address="0x018C" access="10000009" name="PMCON1" mclr="20000001" por="20000001" />
+  </device>
+  <device nb_banks="4" name="16F737" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0008" start="0x0008" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x009A" start="0x009A" />
+    <unused end="0x0108" start="0x0107" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x018F" start="0x018D" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33111111" por="00111111" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00001000" name="PORTE" mclr="00003000" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x000D" access="33303033" name="PIR2" mclr="11101011" por="11101011" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="03333333" name="T1CON" mclr="03333333" por="01111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x008D" access="33303033" name="PIE2" mclr="11101011" por="11101011" />
+    <sfr address="0x008E" access="00000333" name="PCON" mclr="00000333" por="00000244" />
+    <sfr address="0x008F" access="03331133" name="OSCCON" mclr="01112111" por="01112111" />
+    <sfr address="0x0090" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0091" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <combined address="0x0095" size="2" name="CCPR3" />
+    <sfr address="0x0095" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0096" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0097" access="00333333" name="CCP3CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="00333000" name="ADCON2" mclr="00111000" por="00111000" />
+    <sfr address="0x009C" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x009D" access="33303333" name="CVRCON" mclr="11101111" por="11101111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="33333333" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0105" access="00033333" name="WDTCON" mclr="00012111" por="00012111" />
+    <sfr address="0x0109" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x010C" access="33333333" name="PMDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="PMADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="PMDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00003333" name="PMADRH" mclr="00003333" por="00000000" />
+    <sfr address="0x018C" access="00000009" name="PMCON1" mclr="00000001" por="00000001" />
+  </device>
+  <device nb_banks="4" name="16F74" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0020" />
+      <range end="0x017F" start="0x0120" />
+    </mirror>
+    <mirror>
+      <range end="0x00FF" start="0x00A0" />
+      <range end="0x01FF" start="0x01A0" />
+    </mirror>
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009E" start="0x009A" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x011F" start="0x0110" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x019F" start="0x018D" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x000D" access="00000003" name="PIR2" mclr="00000001" por="00000001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33330111" name="RCSTA" mclr="11110110" por="11110110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="11330333" name="TRISE" mclr="11110222" por="11110222" />
+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008D" access="00000003" name="PIE2" mclr="00000001" por="00000001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+    <sfr address="0x010C" access="33333333" name="PMDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="PMADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="PMDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00033333" name="PMADRH" mclr="00033333" por="00000000" />
+    <sfr address="0x018C" access="10000009" name="PMCON1" mclr="20000001" por="20000001" />
+  </device>
+  <device nb_banks="4" name="16F747" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
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+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
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+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
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+    <unused end="0x0108" start="0x0107" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x018F" start="0x018D" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33111111" por="00111111" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00001333" name="PORTE" mclr="00003111" por="00000111" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x000D" access="33303033" name="PIR2" mclr="11101011" por="11101011" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="03333333" name="T1CON" mclr="03333333" por="01111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
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+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
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+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
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+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
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+    <sfr address="0x008E" access="00000333" name="PCON" mclr="00000333" por="00000244" />
+    <sfr address="0x008F" access="03331133" name="OSCCON" mclr="01112111" por="01112111" />
+    <sfr address="0x0090" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0091" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
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+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <combined address="0x0095" size="2" name="CCPR3" />
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+    <sfr address="0x0096" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0097" access="00333333" name="CCP3CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="00333000" name="ADCON2" mclr="00111000" por="00111000" />
+    <sfr address="0x009C" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x009D" access="33303333" name="CVRCON" mclr="11101111" por="11101111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="33333333" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0105" access="00033333" name="WDTCON" mclr="00012111" por="00012111" />
+    <sfr address="0x0109" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x010C" access="33333333" name="PMDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="PMADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="PMDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00003333" name="PMADRH" mclr="00003333" por="00000000" />
+    <sfr address="0x018C" access="00000009" name="PMCON1" mclr="00000001" por="00000001" />
+  </device>
+  <device nb_banks="4" name="16F76" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
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+      <range end="0x0181" start="0x0181" />
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+      <range end="0x0186" start="0x0186" />
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+      <range end="0x01FF" start="0x01F0" />
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+    <combined address="0x0015" size="2" name="CCPR1" />
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+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33330111" name="RCSTA" mclr="11110110" por="11110110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x008D" access="00000003" name="PIE2" mclr="00000001" por="00000001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+    <sfr address="0x010C" access="33333333" name="PMDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="PMADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="PMDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00033333" name="PMADRH" mclr="00033333" por="00000000" />
+    <sfr address="0x018C" access="10000009" name="PMCON1" mclr="20000001" por="20000001" />
+  </device>
+  <device nb_banks="4" name="16F767" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
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+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
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+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
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+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
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+    <mirror>
+      <range end="0x0006" start="0x0006" />
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+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
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+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
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+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33111111" por="00111111" />
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+    <sfr address="0x0009" access="00001000" name="PORTE" mclr="00003000" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x000D" access="33303033" name="PIR2" mclr="11101011" por="11101011" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="03333333" name="T1CON" mclr="03333333" por="01111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
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+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x008D" access="33303033" name="PIE2" mclr="11101011" por="11101011" />
+    <sfr address="0x008E" access="00000333" name="PCON" mclr="00000333" por="00000244" />
+    <sfr address="0x008F" access="03331133" name="OSCCON" mclr="01112111" por="01112111" />
+    <sfr address="0x0090" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0091" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <combined address="0x0095" size="2" name="CCPR3" />
+    <sfr address="0x0095" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0096" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0097" access="00333333" name="CCP3CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="00333000" name="ADCON2" mclr="00111000" por="00111000" />
+    <sfr address="0x009C" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x009D" access="33303333" name="CVRCON" mclr="11101111" por="11101111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="33333333" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0105" access="00033333" name="WDTCON" mclr="00012111" por="00012111" />
+    <sfr address="0x0109" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x010C" access="33333333" name="PMDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="PMADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="PMDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00003333" name="PMADRH" mclr="00003333" por="00000000" />
+    <sfr address="0x018C" access="00000009" name="PMCON1" mclr="00000001" por="00000001" />
+  </device>
+  <device nb_banks="4" name="16F77" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0091" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009E" start="0x009A" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x018F" start="0x018D" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x000D" access="00000003" name="PIR2" mclr="00000001" por="00000001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33330111" name="RCSTA" mclr="11110110" por="11110110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRES" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="11330333" name="TRISE" mclr="11110222" por="11110222" />
+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008D" access="00000003" name="PIE2" mclr="00000001" por="00000001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009F" access="00000333" name="ADCON1" mclr="00000111" por="00000111" />
+    <sfr address="0x010C" access="33333333" name="PMDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="PMADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="PMDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00033333" name="PMADRH" mclr="00033333" por="00000000" />
+    <sfr address="0x018C" access="10000009" name="PMCON1" mclr="20000001" por="20000001" />
+  </device>
+  <device nb_banks="4" name="16F777" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x009A" start="0x009A" />
+    <unused end="0x0108" start="0x0107" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x018F" start="0x018D" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33111111" por="00111111" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00001333" name="PORTE" mclr="00003111" por="00000111" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x000D" access="33303033" name="PIR2" mclr="11101011" por="11101011" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="03333333" name="T1CON" mclr="03333333" por="01111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="11331333" name="TRISE" mclr="11112222" por="11112222" />
+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008D" access="33303033" name="PIE2" mclr="11101011" por="11101011" />
+    <sfr address="0x008E" access="00000333" name="PCON" mclr="00000333" por="00000244" />
+    <sfr address="0x008F" access="03331133" name="OSCCON" mclr="01112111" por="01112111" />
+    <sfr address="0x0090" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0091" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <combined address="0x0095" size="2" name="CCPR3" />
+    <sfr address="0x0095" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0096" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0097" access="00333333" name="CCP3CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="00333000" name="ADCON2" mclr="00111000" por="00111000" />
+    <sfr address="0x009C" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x009D" access="33303333" name="CVRCON" mclr="11101111" por="11101111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="33333333" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0105" access="00033333" name="WDTCON" mclr="00012111" por="00012111" />
+    <sfr address="0x0109" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x010C" access="33333333" name="PMDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="PMADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="PMDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00003333" name="PMADRH" mclr="00003333" por="00000000" />
+    <sfr address="0x018C" access="00000009" name="PMCON1" mclr="00000001" por="00000001" />
+  </device>
+  <device nb_banks="4" name="16F785" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0007" start="0x0005" />
+      <range end="0x0107" start="0x0105" />
+    </mirror>
+    <mirror>
+      <range end="0x0087" start="0x0085" />
+      <range end="0x0187" start="0x0185" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x000D" start="0x000D" />
+    <unused end="0x0017" start="0x0016" />
+    <unused end="0x001D" start="0x0019" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x008D" start="0x008D" />
+    <unused end="0x0094" start="0x0094" />
+    <unused end="0x0097" start="0x0097" />
+    <unused end="0x00EF" start="0x00C0" />
+    <unused end="0x0109" start="0x0108" />
+    <unused end="0x010F" start="0x010C" />
+    <unused end="0x0118" start="0x0115" />
+    <unused end="0x016F" start="0x011E" />
+    <unused end="0x0189" start="0x0188" />
+    <unused end="0x018D" start="0x018C" />
+    <unused end="0x018F" start="0x018E" />
+    <unused end="0x01EF" start="0x0190" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00333333" por="00000000" />
+    <sfr address="0x0006" access="33330000" name="PORTB" mclr="33330000" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111111" />
+    <sfr address="0x000C" access="33333333" name="PIR1" mclr="11111111" por="11111111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="33333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="33333333" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0013" size="2" name="CCPR" />
+    <sfr address="0x0013" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0015" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="00033333" name="WDTCON" mclr="00012111" por="00012111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33330000" name="TRISB" mclr="22220000" por="22220000" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008E" access="00030033" name="PCON" mclr="00030033" por="00020044" />
+    <sfr address="0x008F" access="03331113" name="OSCCON" mclr="02210111" por="02210111" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0091" access="33333333" name="ANSEL0" mclr="22222222" por="22222222" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="00003333" name="ANSEL1" mclr="00002222" por="00002222" />
+    <sfr address="0x0095" access="00333333" name="WPUA" mclr="00220222" por="00220222" />
+    <sfr address="0x0096" access="00333333" name="IOCA" mclr="00111111" por="00111111" />
+    <sfr address="0x0098" access="00333330" name="REFCON" mclr="00111110" por="00111110" />
+    <sfr address="0x0099" access="33303333" name="VRCON" mclr="11101111" por="11101111" />
+    <sfr address="0x009A" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x009C" access="00003399" name="EECON1" mclr="00004111" por="00000111" />
+    <sfr address="0x009D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="03330000" name="ADCON1" mclr="01110000" por="01110000" />
+    <sfr address="0x0110" access="33333333" name="PWMCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0111" access="33333333" name="PWMCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0112" access="33333333" name="PWMCLK" mclr="11111111" por="11111111" />
+    <sfr address="0x0113" access="33333333" name="PWMPH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0114" access="33333333" name="PWMPH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0119" access="31333333" name="CM1CON0" mclr="11111111" por="11111111" />
+    <sfr address="0x011A" access="31333333" name="CM2CON0" mclr="11111111" por="11111111" />
+    <sfr address="0x011B" access="11000033" name="CM2CON1" mclr="11000021" por="11000021" />
+    <sfr address="0x011C" access="30000000" name="OPA1CON" mclr="10000000" por="10000000" />
+    <sfr address="0x011D" access="30000000" name="OPA2CON" mclr="10000000" por="10000000" />
+  </device>
+  <device nb_banks="4" name="16F818" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x003F" start="0x0020" />
+      <range end="0x013F" start="0x0120" />
+      <range end="0x01BF" start="0x01A0" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0040" />
+      <range end="0x00FF" start="0x00C0" />
+      <range end="0x017F" start="0x0140" />
+      <range end="0x01FF" start="0x01C0" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x001D" start="0x0018" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x0091" start="0x0091" />
+    <unused end="0x009D" start="0x0095" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x011F" start="0x0110" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x019F" start="0x018E" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="33133333" name="PORTA" mclr="33311111" por="00011111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03003333" name="PIR1" mclr="01001111" por="01001111" />
+    <sfr address="0x000D" access="00030000" name="PIR2" mclr="00010000" por="00010000" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="33133333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03003333" name="PIE1" mclr="01001111" por="01001111" />
+    <sfr address="0x008D" access="00030000" name="PIE2" mclr="00010000" por="00010000" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x008F" access="03330100" name="OSCCON" mclr="01110100" por="01110100" />
+    <sfr address="0x0090" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="33003333" name="ADCON1" mclr="11001111" por="11001111" />
+    <sfr address="0x010C" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00000333" name="EEADRH" mclr="00000333" por="00000000" />
+    <sfr address="0x018C" access="30033399" name="EECON1" mclr="30003111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F819" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x006F" start="0x0020" />
+      <range end="0x01EF" start="0x01A0" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x001D" start="0x0018" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x0091" start="0x0091" />
+    <unused end="0x009D" start="0x0095" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x011F" start="0x0110" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x019F" start="0x018E" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="33133333" name="PORTA" mclr="33311111" por="00011111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03003333" name="PIR1" mclr="01001111" por="01001111" />
+    <sfr address="0x000D" access="00030000" name="PIR2" mclr="00010000" por="00010000" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="33133333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03003333" name="PIE1" mclr="01001111" por="01001111" />
+    <sfr address="0x008D" access="00030000" name="PIE2" mclr="00010000" por="00010000" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x008F" access="03330100" name="OSCCON" mclr="01110100" por="01110100" />
+    <sfr address="0x0090" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="33003333" name="ADCON1" mclr="11001111" por="11001111" />
+    <sfr address="0x010C" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00000333" name="EEADRH" mclr="00000333" por="00000000" />
+    <sfr address="0x018C" access="30033399" name="EECON1" mclr="30003111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="2" name="16F83" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x002F" start="0x000A" />
+      <range end="0x00AF" start="0x008A" />
+    </mirror>
+    <unused end="0x0007" start="0x0007" />
+    <unused end="0x007F" start="0x0030" />
+    <unused end="0x0087" start="0x0087" />
+    <unused end="0x00FF" start="0x00B0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="00033399" name="EECON1" mclr="00014111" por="00010111" />
+    <sfr address="0x0089" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="2" name="16F84" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x004F" start="0x000A" />
+      <range end="0x00CF" start="0x008A" />
+    </mirror>
+    <unused end="0x0007" start="0x0007" />
+    <unused end="0x007F" start="0x0050" />
+    <unused end="0x0087" start="0x0087" />
+    <unused end="0x00FF" start="0x00D0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="00033399" name="EECON1" mclr="00014111" por="00010111" />
+    <sfr address="0x0089" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="2" name="16F84A" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x004F" start="0x000A" />
+      <range end="0x00CF" start="0x008A" />
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+    <unused end="0x007F" start="0x0050" />
+    <unused end="0x0087" start="0x0087" />
+    <unused end="0x00FF" start="0x00D0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="00033399" name="EECON1" mclr="00014111" por="00010111" />
+    <sfr address="0x0089" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F87" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
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+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x001F" start="0x001B" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x0091" start="0x0091" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009A" start="0x009A" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x018F" start="0x018E" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="33133333" name="PORTA" mclr="33331111" por="00001111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="00111333" name="PIR1" mclr="00111111" por="00111111" />
+    <sfr address="0x000D" access="33030000" name="PIR2" mclr="11010000" por="11010000" />
+    <combined address="0x000E" size="2" name="TMR1" />
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+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="01333333" name="T1CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="33133333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="00333333" name="PIE1" mclr="00111111" por="00111111" />
+    <sfr address="0x008D" access="33030000" name="PIE2" mclr="11010000" por="11010000" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x008F" access="03331133" name="OSCCON" mclr="00000000" por="01111111" />
+    <sfr address="0x0090" access="00333333" name="OSCTUNE" mclr="00000000" por="00111111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009C" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x009D" access="33303333" name="CVRCON" mclr="11101111" por="11101111" />
+    <sfr address="0x0105" access="00033333" name="WDTCON" mclr="00000000" por="00012111" />
+    <sfr address="0x010C" access="33333333" name="EEDATA" mclr="00000000" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="00000000" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00000000" por="00000000" />
+    <sfr address="0x010F" access="00003333" name="EEADRH" mclr="00000000" por="00000000" />
+    <sfr address="0x018C" access="30033399" name="EECON1" mclr="00000111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F870" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
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+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
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+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
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+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
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+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
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+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
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+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
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+      <range end="0x017F" start="0x0120" />
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+    <mirror>
+      <range end="0x00BF" start="0x00A0" />
+      <range end="0x01BF" start="0x01A0" />
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+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
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+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03110333" name="PIR1" mclr="01110111" por="01110111" />
+    <sfr address="0x000D" access="00030000" name="PIR2" mclr="00010000" por="00010000" />
+    <combined address="0x000E" size="2" name="TMR1" />
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+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
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+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
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+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03330333" name="PIE1" mclr="01110111" por="01110111" />
+    <sfr address="0x008D" access="00030000" name="PIE2" mclr="00010000" por="00010000" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="30003333" name="ADCON1" mclr="10001111" por="10001111" />
+    <sfr address="0x010C" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00033333" name="EEADRH" mclr="00033333" por="00000000" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30003111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F871" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
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+      <range end="0x0001" start="0x0001" />
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+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
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+      <range end="0x0104" start="0x0102" />
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+      <range end="0x0186" start="0x0186" />
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+      <range end="0x008B" start="0x008A" />
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+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33110333" name="PIR1" mclr="11110111" por="11110111" />
+    <sfr address="0x000D" access="00030000" name="PIR2" mclr="00010000" por="00010000" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="11330333" name="TRISE" mclr="11110222" por="11110222" />
+    <sfr address="0x008C" access="33330333" name="PIE1" mclr="11110111" por="11110111" />
+    <sfr address="0x008D" access="00030000" name="PIE2" mclr="00010000" por="00010000" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="30003333" name="ADCON1" mclr="10001111" por="10001111" />
+    <sfr address="0x010C" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00033333" name="EEADRH" mclr="00033333" por="00000000" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30003111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F872" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0020" />
+      <range end="0x017F" start="0x0120" />
+    </mirror>
+    <mirror>
+      <range end="0x00BF" start="0x00A0" />
+      <range end="0x01BF" start="0x01A0" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x001D" start="0x0018" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x0090" start="0x008F" />
+    <unused end="0x009D" start="0x0095" />
+    <unused end="0x00EF" start="0x00C0" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x011F" start="0x0110" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x019F" start="0x018E" />
+    <unused end="0x01EF" start="0x01C0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33333333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x000D" access="03033003" name="PIR2" mclr="01011001" por="01011001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008D" access="03033003" name="PIE2" mclr="01011001" por="01011001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0091" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="30003333" name="ADCON1" mclr="10001111" por="10001111" />
+    <sfr address="0x010C" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00033333" name="EEADRH" mclr="00033333" por="00000000" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30003111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F873" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0020" />
+      <range end="0x017F" start="0x0120" />
+    </mirror>
+    <mirror>
+      <range end="0x00FF" start="0x00A0" />
+      <range end="0x01FF" start="0x01A0" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x0090" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009D" start="0x009A" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x011F" start="0x0110" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x019F" start="0x018E" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x000D" access="03033003" name="PIR2" mclr="01011001" por="01011001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x008D" access="03033003" name="PIE2" mclr="01011001" por="01011001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0091" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="30003333" name="ADCON1" mclr="10001111" por="10001111" />
+    <sfr address="0x010C" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00033333" name="EEADRH" mclr="00033333" por="00000000" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30003111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F873A" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0020" />
+      <range end="0x017F" start="0x0120" />
+    </mirror>
+    <mirror>
+      <range end="0x00FF" start="0x00A0" />
+      <range end="0x01FF" start="0x01A0" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x0090" start="0x008F" />
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+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x019F" start="0x018E" />
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+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
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+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
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+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
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+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
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+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
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+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009C" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x009D" access="33303333" name="CVRCON" mclr="11101111" por="11101111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
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+    <sfr address="0x010C" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00003333" name="EEADRH" mclr="00003333" por="00000000" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30003111" por="00000111" />
+    <sfr address="0x018D" access="00000000" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F874" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
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+      <range end="0x0101" start="0x0101" />
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+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
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+      <range end="0x0184" start="0x0182" />
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+    <mirror>
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+    <mirror>
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+      <range end="0x0186" start="0x0186" />
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+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
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+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
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+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
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+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008D" access="03033003" name="PIE2" mclr="01011001" por="01011001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0091" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="30003333" name="ADCON1" mclr="10001111" por="10001111" />
+    <sfr address="0x010C" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00033333" name="EEADRH" mclr="00033333" por="00000000" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30003111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F874A" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
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+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
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+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
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+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
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+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
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+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
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+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009C" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x009D" access="33303333" name="CVRCON" mclr="11101111" por="11101111" />
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+    <sfr address="0x010C" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00003333" name="EEADRH" mclr="00003333" por="00000000" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30003111" por="00000111" />
+    <sfr address="0x018D" access="00000000" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F876" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x0090" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009D" start="0x009A" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x018F" start="0x018E" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x000D" access="03033003" name="PIR2" mclr="01011001" por="01011001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x008D" access="03033003" name="PIE2" mclr="01011001" por="01011001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0091" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="30003333" name="ADCON1" mclr="10001111" por="10001111" />
+    <sfr address="0x010C" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00033333" name="EEADRH" mclr="00033333" por="00000000" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30003111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F876A" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
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+    <unused end="0x0009" start="0x0008" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x0090" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009B" start="0x009A" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x018F" start="0x018E" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x000D" access="03033003" name="PIR2" mclr="01011001" por="01011001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x008D" access="03033003" name="PIE2" mclr="01011001" por="01011001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0091" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009C" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x009D" access="33303333" name="CVRCON" mclr="11101111" por="11101111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="33003333" name="ADCON1" mclr="11001111" por="11001111" />
+    <sfr address="0x010C" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00033333" name="EEADRH" mclr="00033333" por="00000000" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30003111" por="00000111" />
+    <sfr address="0x018D" access="00000000" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F877" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
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+    <unused end="0x0090" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009D" start="0x009A" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x018F" start="0x018E" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x000D" access="03033003" name="PIR2" mclr="01011001" por="01011001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="11330333" name="TRISE" mclr="11110222" por="11110222" />
+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008D" access="03033003" name="PIE2" mclr="01011001" por="01011001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0091" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="30003333" name="ADCON1" mclr="10001111" por="10001111" />
+    <sfr address="0x010C" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00033333" name="EEADRH" mclr="00033333" por="00000000" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30003111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F877A" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0090" start="0x008F" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009B" start="0x009A" />
+    <unused end="0x0105" start="0x0105" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x018F" start="0x018E" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x000D" access="03033003" name="PIR2" mclr="01011001" por="01011001" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="11330333" name="TRISE" mclr="11110222" por="11110222" />
+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008D" access="03033003" name="PIE2" mclr="01011001" por="01011001" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x0091" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009C" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x009D" access="33303333" name="CVRCON" mclr="11101111" por="11101111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="33003333" name="ADCON1" mclr="11001111" por="11001111" />
+    <sfr address="0x010C" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00033333" name="EEADRH" mclr="00033333" por="00000000" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30003111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F88" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x001D" start="0x001B" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x0091" start="0x0091" />
+    <unused end="0x0097" start="0x0095" />
+    <unused end="0x009A" start="0x009A" />
+    <unused end="0x0109" start="0x0107" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x018F" start="0x018E" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="33133333" name="PORTA" mclr="33311111" por="00011111" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="11333333" por="11000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03111333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x000D" access="33030000" name="PIR2" mclr="11010000" por="11010000" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="01333333" name="T1CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="33033333" name="TRISA" mclr="22022222" por="22022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x008D" access="33030000" name="PIE2" mclr="11010000" por="11010000" />
+    <sfr address="0x008E" access="00000033" name="PCON" mclr="00000033" por="00000044" />
+    <sfr address="0x008F" access="03331133" name="OSCCON" mclr="00000000" por="01111111" />
+    <sfr address="0x0090" access="00333333" name="OSCTUNE" mclr="00000000" por="00111111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="03333333" name="ANSEL" mclr="00000000" por="02222222" />
+    <sfr address="0x009C" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x009D" access="33303333" name="CVRCON" mclr="11101111" por="11101111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="33330000" name="ADCON1" mclr="00000000" por="11110000" />
+    <sfr address="0x0105" access="00033333" name="WDTCON" mclr="00000000" por="00012111" />
+    <sfr address="0x010C" access="33333333" name="EEDATA" mclr="00000000" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="00000000" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00000000" por="00000000" />
+    <sfr address="0x010F" access="00003333" name="EEADRH" mclr="00000000" por="00000000" />
+    <sfr address="0x018C" access="30033399" name="EECON1" mclr="00000111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F883" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0008" start="0x0008" />
+    <unused end="0x0088" start="0x0088" />
+    <unused end="0x011F" start="0x0110" />
+    <unused end="0x01EF" start="0x018E" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="33333333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00003000" name="PORTE" mclr="00003000" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x000D" access="33033003" name="PIR2" mclr="11111111" por="11111111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="00001000" name="TRISE" mclr="00002000" por="00002000" />
+    <sfr address="0x008C" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x008D" access="33333303" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x008E" access="00130033" name="PCON" mclr="00120033" por="00120044" />
+    <sfr address="0x008F" access="03331113" name="OSCCON" mclr="02210111" por="02210111" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0091" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0095" access="33333333" name="WPUB" mclr="22222222" por="22222222" />
+    <sfr address="0x0096" access="33333333" name="IOCB" mclr="11111111" por="11111111" />
+    <sfr address="0x0097" access="33333333" name="VRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009A" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x009C" access="33333333" name="ECCPAS" mclr="11111111" por="11111111" />
+    <sfr address="0x009D" access="00033333" name="PSTRCON" mclr="00011112" por="00011112" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="30330000" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0105" access="00033333" name="WDTCON" mclr="00022111" por="00022111" />
+    <sfr address="0x0107" access="31333033" name="CM1CON0" mclr="11110111" por="11110111" />
+    <sfr address="0x0108" access="31333033" name="CM2CON0" mclr="11110111" por="11110111" />
+    <sfr address="0x0109" access="11330033" name="CM2CON1" mclr="11111121" por="11111121" />
+    <sfr address="0x010C" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00033333" name="EEADRH" mclr="00033333" por="00000000" />
+    <sfr address="0x0185" access="33333303" name="SRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0187" access="21033033" name="BAUDCTL" mclr="12011011" por="12011011" />
+    <sfr address="0x0188" access="00033333" name="ANSEL" mclr="00022222" por="00022222" />
+    <sfr address="0x0189" access="00333333" name="ANSELH" mclr="00222222" por="00222222" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30003111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F884" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x011F" start="0x0110" />
+    <unused end="0x01EF" start="0x018E" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="33333333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00003333" name="PORTE" mclr="00003333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x000D" access="33033003" name="PIR2" mclr="11111111" por="11111111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="00001333" name="TRISE" mclr="00002222" por="00002222" />
+    <sfr address="0x008C" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x008D" access="33333303" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x008E" access="00130033" name="PCON" mclr="00120033" por="00120044" />
+    <sfr address="0x008F" access="03331113" name="OSCCON" mclr="02210111" por="02210111" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0091" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0095" access="33333333" name="WPUB" mclr="22222222" por="22222222" />
+    <sfr address="0x0096" access="33333333" name="IOCB" mclr="11111111" por="11111111" />
+    <sfr address="0x0097" access="33333333" name="VRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009A" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x009C" access="33333333" name="ECCPAS" mclr="11111111" por="11111111" />
+    <sfr address="0x009D" access="00033333" name="PSTRCON" mclr="00011112" por="00011112" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="30330000" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0105" access="00033333" name="WDTCON" mclr="00022111" por="00022111" />
+    <sfr address="0x0107" access="31333033" name="CM1CON0" mclr="11110111" por="11110111" />
+    <sfr address="0x0108" access="31333033" name="CM2CON0" mclr="11110111" por="11110111" />
+    <sfr address="0x0109" access="11330033" name="CM2CON1" mclr="11111121" por="11111121" />
+    <sfr address="0x010C" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00033333" name="EEADRH" mclr="00033333" por="00000000" />
+    <sfr address="0x0185" access="33333303" name="SRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0187" access="21033033" name="BAUDCTL" mclr="12011011" por="12011011" />
+    <sfr address="0x0188" access="33333333" name="ANSEL" mclr="22222222" por="22222222" />
+    <sfr address="0x0189" access="00333333" name="ANSELH" mclr="00222222" por="00222222" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30003111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F886" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0008" start="0x0008" />
+    <unused end="0x0088" start="0x0088" />
+    <unused end="0x018F" start="0x018E" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="33333333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00003000" name="PORTE" mclr="00003000" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x000D" access="33033003" name="PIR2" mclr="11111111" por="11111111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="00001000" name="TRISE" mclr="00002000" por="00002000" />
+    <sfr address="0x008C" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x008D" access="33333303" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x008E" access="00130033" name="PCON" mclr="00120033" por="00120044" />
+    <sfr address="0x008F" access="03331113" name="OSCCON" mclr="02210111" por="02210111" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0091" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0095" access="33333333" name="WPUB" mclr="22222222" por="22222222" />
+    <sfr address="0x0096" access="33333333" name="IOCB" mclr="11111111" por="11111111" />
+    <sfr address="0x0097" access="33333333" name="VRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009A" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x009C" access="33333333" name="ECCPAS" mclr="11111111" por="11111111" />
+    <sfr address="0x009D" access="00033333" name="PSTRCON" mclr="00011112" por="00011112" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="30330000" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0105" access="00033333" name="WDTCON" mclr="00022111" por="00022111" />
+    <sfr address="0x0107" access="31333033" name="CM1CON0" mclr="11110111" por="11110111" />
+    <sfr address="0x0108" access="31333033" name="CM2CON0" mclr="11110111" por="11110111" />
+    <sfr address="0x0109" access="11330033" name="CM2CON1" mclr="11111121" por="11111121" />
+    <sfr address="0x010C" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00033333" name="EEADRH" mclr="00033333" por="00000000" />
+    <sfr address="0x0185" access="33333303" name="SRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0187" access="21033033" name="BAUDCTL" mclr="12011011" por="12011011" />
+    <sfr address="0x0188" access="00033333" name="ANSEL" mclr="00022222" por="00022222" />
+    <sfr address="0x0189" access="00333333" name="ANSELH" mclr="00222222" por="00222222" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30003111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F887" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x018F" start="0x018E" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00333333" name="PORTA" mclr="33333333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00003333" name="PORTE" mclr="00003333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x000C" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x000D" access="33033003" name="PIR2" mclr="11111111" por="11111111" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="00333333" name="T1CON" mclr="00333333" por="00111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="00001333" name="TRISE" mclr="00002222" por="00002222" />
+    <sfr address="0x008C" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x008D" access="33333303" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x008E" access="00130033" name="PCON" mclr="00120033" por="00120044" />
+    <sfr address="0x008F" access="03331113" name="OSCCON" mclr="02210111" por="02210111" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0091" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0095" access="33333333" name="WPUB" mclr="22222222" por="22222222" />
+    <sfr address="0x0096" access="33333333" name="IOCB" mclr="11111111" por="11111111" />
+    <sfr address="0x0097" access="33333333" name="VRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009A" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x009B" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x009C" access="33333333" name="ECCPAS" mclr="11111111" por="11111111" />
+    <sfr address="0x009D" access="00033333" name="PSTRCON" mclr="00011112" por="00011112" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="30330000" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0105" access="00033333" name="WDTCON" mclr="00022111" por="00022111" />
+    <sfr address="0x0107" access="31333033" name="CM1CON0" mclr="11110111" por="11110111" />
+    <sfr address="0x0108" access="31333033" name="CM2CON0" mclr="11110111" por="11110111" />
+    <sfr address="0x0109" access="11330033" name="CM2CON1" mclr="11111121" por="11111121" />
+    <sfr address="0x010C" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x010D" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00333333" por="00000000" />
+    <sfr address="0x010F" access="00033333" name="EEADRH" mclr="00033333" por="00000000" />
+    <sfr address="0x0185" access="33333303" name="SRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0187" access="21033033" name="BAUDCTL" mclr="12011011" por="12011011" />
+    <sfr address="0x0188" access="33333333" name="ANSEL" mclr="22222222" por="22222222" />
+    <sfr address="0x0189" access="00333333" name="ANSELH" mclr="00222222" por="00222222" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30003111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F913" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0008" start="0x0008" />
+    <unused end="0x001D" start="0x001B" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x009B" start="0x009A" />
+    <unused end="0x0112" start="0x0112" />
+    <unused end="0x0115" start="0x0115" />
+    <unused end="0x0118" start="0x0118" />
+    <unused end="0x011B" start="0x011B" />
+    <unused end="0x011F" start="0x011E" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x018F" start="0x018E" />
+    <unused end="0x01EF" start="0x0190" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="33333333" name="PORTA" mclr="33333333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00001000" name="PORTE" mclr="00003000" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111110" por="11111110" />
+    <sfr address="0x000C" access="33111333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x000D" access="33330300" name="PIR2" mclr="11110100" por="11110100" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="33333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="00001000" name="TRISE" mclr="00002000" por="00002000" />
+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008D" access="33330300" name="PIE2" mclr="11110100" por="11110100" />
+    <sfr address="0x008E" access="00030033" name="PCON" mclr="00030033" por="00020044" />
+    <sfr address="0x008F" access="03331113" name="OSCCON" mclr="02210111" por="02210111" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0091" access="00033333" name="ANSEL" mclr="00022222" por="00022222" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0095" access="33333333" name="WPUB" mclr="22222222" por="22222222" />
+    <sfr address="0x0096" access="33330000" name="IOCB" mclr="11110000" por="11110000" />
+    <sfr address="0x0097" access="00000033" name="CMCON1" mclr="00000021" por="00000021" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009C" access="11333333" name="CMCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x009D" access="30303333" name="VRCON" mclr="10101111" por="10101111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="03330000" name="ADCON1" mclr="01110000" por="01110000" />
+    <sfr address="0x0105" access="00033333" name="WDTCON" mclr="00012111" por="00012111" />
+    <sfr address="0x0107" access="33533333" name="LCDCON" mclr="11121122" por="11121122" />
+    <sfr address="0x0108" access="31133333" name="LCDPS" mclr="11111111" por="11111111" />
+    <sfr address="0x0109" access="00130333" name="LVDCON" mclr="00110211" por="00110211" />
+    <sfr address="0x010C" access="33333333" name="EEDATL" mclr="33333333" por="11111111" />
+    <sfr address="0x010D" access="33333333" name="EEADRL" mclr="33333333" por="11111111" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00333333" por="00111111" />
+    <sfr address="0x010F" access="00033333" name="EEADRH" mclr="00033333" por="00011111" />
+    <sfr address="0x0110" access="33333333" name="LCDDATA0" mclr="33333333" por="00000000" />
+    <sfr address="0x0111" access="33333333" name="LCDDATA1" mclr="33333333" por="00000000" />
+    <sfr address="0x0113" access="33333333" name="LCDDATA3" mclr="33333333" por="00000000" />
+    <sfr address="0x0114" access="33333333" name="LCDDATA4" mclr="33333333" por="00000000" />
+    <sfr address="0x0116" access="33333333" name="LCDDATA6" mclr="33333333" por="00000000" />
+    <sfr address="0x0117" access="33333333" name="LCDDATA7" mclr="33333333" por="00000000" />
+    <sfr address="0x0119" access="33333333" name="LCDDATA9" mclr="33333333" por="00000000" />
+    <sfr address="0x011A" access="33333333" name="LCDDATA10" mclr="33333333" por="00000000" />
+    <sfr address="0x011C" access="33333333" name="LCDSE0" mclr="33333333" por="11111111" />
+    <sfr address="0x011D" access="33333333" name="LCDSE1" mclr="33333333" por="11111111" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30004111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F914" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x009B" start="0x009A" />
+    <unused end="0x011F" start="0x011F" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x018F" start="0x018E" />
+    <unused end="0x01EF" start="0x0190" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="33333333" name="PORTA" mclr="33333333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00001333" name="PORTE" mclr="00003333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111110" por="11111110" />
+    <sfr address="0x000C" access="33111333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x000D" access="33330303" name="PIR2" mclr="11110101" por="11110101" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="33333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="00001333" name="TRISE" mclr="00002222" por="00002222" />
+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008D" access="33330303" name="PIE2" mclr="11110101" por="11110101" />
+    <sfr address="0x008E" access="00030033" name="PCON" mclr="00030033" por="00020044" />
+    <sfr address="0x008F" access="03331113" name="OSCCON" mclr="02210111" por="02210111" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0091" access="33333333" name="ANSEL" mclr="22222222" por="22222222" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0095" access="33333333" name="WPUB" mclr="22222222" por="22222222" />
+    <sfr address="0x0096" access="33330000" name="IOCB" mclr="11110000" por="11110000" />
+    <sfr address="0x0097" access="00000033" name="CMCON1" mclr="00000021" por="00000021" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009C" access="11333333" name="CMCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x009D" access="30303333" name="VRCON" mclr="10101111" por="10101111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="03330000" name="ADCON1" mclr="01110000" por="01110000" />
+    <sfr address="0x0105" access="00033333" name="WDTCON" mclr="00012111" por="00012111" />
+    <sfr address="0x0107" access="33533333" name="LCDCON" mclr="11121122" por="11121122" />
+    <sfr address="0x0108" access="31133333" name="LCDPS" mclr="11111111" por="11111111" />
+    <sfr address="0x0109" access="00130333" name="LVDCON" mclr="00110211" por="00110211" />
+    <sfr address="0x010C" access="33333333" name="EEDATL" mclr="33333333" por="11111111" />
+    <sfr address="0x010D" access="33333333" name="EEADRL" mclr="33333333" por="11111111" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00333333" por="00111111" />
+    <sfr address="0x010F" access="00033333" name="EEADRH" mclr="00033333" por="00011111" />
+    <sfr address="0x0110" access="33333333" name="LCDDATA0" mclr="33333333" por="00000000" />
+    <sfr address="0x0111" access="33333333" name="LCDDATA1" mclr="33333333" por="00000000" />
+    <sfr address="0x0112" access="33333333" name="LCDDATA2" mclr="33333333" por="00000000" />
+    <sfr address="0x0113" access="33333333" name="LCDDATA3" mclr="33333333" por="00000000" />
+    <sfr address="0x0114" access="33333333" name="LCDDATA4" mclr="33333333" por="00000000" />
+    <sfr address="0x0115" access="33333333" name="LCDDATA5" mclr="33333333" por="00000000" />
+    <sfr address="0x0116" access="33333333" name="LCDDATA6" mclr="33333333" por="00000000" />
+    <sfr address="0x0117" access="33333333" name="LCDDATA7" mclr="33333333" por="00000000" />
+    <sfr address="0x0118" access="33333333" name="LCDDATA8" mclr="33333333" por="00000000" />
+    <sfr address="0x0119" access="33333333" name="LCDDATA9" mclr="33333333" por="00000000" />
+    <sfr address="0x011A" access="33333333" name="LCDDATA10" mclr="33333333" por="00000000" />
+    <sfr address="0x011B" access="33333333" name="LCDDATA11" mclr="33333333" por="00000000" />
+    <sfr address="0x011C" access="33333333" name="LCDSE0" mclr="33333333" por="11111111" />
+    <sfr address="0x011D" access="33333333" name="LCDSE1" mclr="33333333" por="11111111" />
+    <sfr address="0x011E" access="33333333" name="LCDSE2" mclr="33333333" por="11111111" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30004111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F916" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x0008" start="0x0008" />
+    <unused end="0x001D" start="0x001B" />
+    <unused end="0x0089" start="0x0088" />
+    <unused end="0x009B" start="0x009A" />
+    <unused end="0x0112" start="0x0112" />
+    <unused end="0x0115" start="0x0115" />
+    <unused end="0x0118" start="0x0118" />
+    <unused end="0x011B" start="0x011B" />
+    <unused end="0x011F" start="0x011E" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x018F" start="0x018E" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="33333333" name="PORTA" mclr="33333333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00001000" name="PORTE" mclr="00003000" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111110" por="11111110" />
+    <sfr address="0x000C" access="33111333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x000D" access="33330300" name="PIR2" mclr="11110100" por="11110100" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="33333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="00001000" name="TRISE" mclr="00002000" por="00002000" />
+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008D" access="33330300" name="PIE2" mclr="11110100" por="11110100" />
+    <sfr address="0x008E" access="00030033" name="PCON" mclr="00030033" por="00020044" />
+    <sfr address="0x008F" access="03331113" name="OSCCON" mclr="02210111" por="02210111" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0091" access="00033333" name="ANSEL" mclr="00022222" por="00022222" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0095" access="33333333" name="WPUB" mclr="22222222" por="22222222" />
+    <sfr address="0x0096" access="33330000" name="IOCB" mclr="11110000" por="11110000" />
+    <sfr address="0x0097" access="00000033" name="CMCON1" mclr="00000021" por="00000021" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009C" access="11333333" name="CMCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x009D" access="30303333" name="VRCON" mclr="10101111" por="10101111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="03330000" name="ADCON1" mclr="01110000" por="01110000" />
+    <sfr address="0x0105" access="00033333" name="WDTCON" mclr="00012111" por="00012111" />
+    <sfr address="0x0107" access="33533333" name="LCDCON" mclr="11121122" por="11121122" />
+    <sfr address="0x0108" access="31133333" name="LCDPS" mclr="11111111" por="11111111" />
+    <sfr address="0x0109" access="00130333" name="LVDCON" mclr="00110211" por="00110211" />
+    <sfr address="0x010C" access="33333333" name="EEDATL" mclr="33333333" por="11111111" />
+    <sfr address="0x010D" access="33333333" name="EEADRL" mclr="33333333" por="11111111" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00333333" por="00111111" />
+    <sfr address="0x010F" access="00033333" name="EEADRH" mclr="00033333" por="00011111" />
+    <sfr address="0x0110" access="33333333" name="LCDDATA0" mclr="33333333" por="00000000" />
+    <sfr address="0x0111" access="33333333" name="LCDDATA1" mclr="33333333" por="00000000" />
+    <sfr address="0x0113" access="33333333" name="LCDDATA3" mclr="33333333" por="00000000" />
+    <sfr address="0x0114" access="33333333" name="LCDDATA4" mclr="33333333" por="00000000" />
+    <sfr address="0x0116" access="33333333" name="LCDDATA6" mclr="33333333" por="00000000" />
+    <sfr address="0x0117" access="33333333" name="LCDDATA7" mclr="33333333" por="00000000" />
+    <sfr address="0x0119" access="33333333" name="LCDDATA9" mclr="33333333" por="00000000" />
+    <sfr address="0x011A" access="33333333" name="LCDDATA10" mclr="33333333" por="00000000" />
+    <sfr address="0x011C" access="33333333" name="LCDSE0" mclr="33333333" por="11111111" />
+    <sfr address="0x011D" access="33333333" name="LCDSE1" mclr="33333333" por="11111111" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30004111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F917" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x009B" start="0x009A" />
+    <unused end="0x011F" start="0x011F" />
+    <unused end="0x0185" start="0x0185" />
+    <unused end="0x0189" start="0x0187" />
+    <unused end="0x018F" start="0x018E" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="33333333" name="PORTA" mclr="33333333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="00001333" name="PORTE" mclr="00003333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111110" por="11111110" />
+    <sfr address="0x000C" access="33111333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x000D" access="33330303" name="PIR2" mclr="11110101" por="11110101" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="33333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="00001333" name="TRISE" mclr="00002222" por="00002222" />
+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008D" access="33330303" name="PIE2" mclr="11110101" por="11110101" />
+    <sfr address="0x008E" access="00030033" name="PCON" mclr="00030033" por="00020044" />
+    <sfr address="0x008F" access="03331113" name="OSCCON" mclr="02210111" por="02210111" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0091" access="33333333" name="ANSEL" mclr="22222222" por="22222222" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0095" access="33333333" name="WPUB" mclr="22222222" por="22222222" />
+    <sfr address="0x0096" access="33330000" name="IOCB" mclr="11110000" por="11110000" />
+    <sfr address="0x0097" access="00000033" name="CMCON1" mclr="00000021" por="00000021" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009C" access="11333333" name="CMCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x009D" access="30303333" name="VRCON" mclr="10101111" por="10101111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="03330000" name="ADCON1" mclr="01110000" por="01110000" />
+    <sfr address="0x0105" access="00033333" name="WDTCON" mclr="00012111" por="00012111" />
+    <sfr address="0x0107" access="33533333" name="LCDCON" mclr="11121122" por="11121122" />
+    <sfr address="0x0108" access="31133333" name="LCDPS" mclr="11111111" por="11111111" />
+    <sfr address="0x0109" access="00130333" name="LVDCON" mclr="00110211" por="00110211" />
+    <sfr address="0x010C" access="33333333" name="EEDATL" mclr="33333333" por="11111111" />
+    <sfr address="0x010D" access="33333333" name="EEADRL" mclr="33333333" por="11111111" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00333333" por="00111111" />
+    <sfr address="0x010F" access="00033333" name="EEADRH" mclr="00033333" por="00011111" />
+    <sfr address="0x0110" access="33333333" name="LCDDATA0" mclr="33333333" por="00000000" />
+    <sfr address="0x0111" access="33333333" name="LCDDATA1" mclr="33333333" por="00000000" />
+    <sfr address="0x0112" access="33333333" name="LCDDATA2" mclr="33333333" por="00000000" />
+    <sfr address="0x0113" access="33333333" name="LCDDATA3" mclr="33333333" por="00000000" />
+    <sfr address="0x0114" access="33333333" name="LCDDATA4" mclr="33333333" por="00000000" />
+    <sfr address="0x0115" access="33333333" name="LCDDATA5" mclr="33333333" por="00000000" />
+    <sfr address="0x0116" access="33333333" name="LCDDATA6" mclr="33333333" por="00000000" />
+    <sfr address="0x0117" access="33333333" name="LCDDATA7" mclr="33333333" por="00000000" />
+    <sfr address="0x0118" access="33333333" name="LCDDATA8" mclr="33333333" por="00000000" />
+    <sfr address="0x0119" access="33333333" name="LCDDATA9" mclr="33333333" por="00000000" />
+    <sfr address="0x011A" access="33333333" name="LCDDATA10" mclr="33333333" por="00000000" />
+    <sfr address="0x011B" access="33333333" name="LCDDATA11" mclr="33333333" por="00000000" />
+    <sfr address="0x011C" access="33333333" name="LCDSE0" mclr="33333333" por="11111111" />
+    <sfr address="0x011D" access="33333333" name="LCDSE1" mclr="33333333" por="11111111" />
+    <sfr address="0x011E" access="33333333" name="LCDSE2" mclr="33333333" por="11111111" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30004111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="4" name="16F946" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+      <range end="0x0100" start="0x0100" />
+      <range end="0x0180" start="0x0180" />
+    </mirror>
+    <mirror>
+      <range end="0x0001" start="0x0001" />
+      <range end="0x0101" start="0x0101" />
+    </mirror>
+    <mirror>
+      <range end="0x0081" start="0x0081" />
+      <range end="0x0181" start="0x0181" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+      <range end="0x0104" start="0x0102" />
+      <range end="0x0184" start="0x0182" />
+    </mirror>
+    <mirror>
+      <range end="0x0006" start="0x0006" />
+      <range end="0x0106" start="0x0106" />
+    </mirror>
+    <mirror>
+      <range end="0x0086" start="0x0086" />
+      <range end="0x0186" start="0x0186" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+      <range end="0x010B" start="0x010A" />
+      <range end="0x018B" start="0x018A" />
+    </mirror>
+    <mirror>
+      <range end="0x007F" start="0x0070" />
+      <range end="0x00FF" start="0x00F0" />
+      <range end="0x017F" start="0x0170" />
+      <range end="0x01FF" start="0x01F0" />
+    </mirror>
+    <unused end="0x009B" start="0x009A" />
+    <unused end="0x011F" start="0x011F" />
+    <unused end="0x018F" start="0x018E" />
+    <unused end="0x019F" start="0x019F" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="33333333" name="PORTA" mclr="33333333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0007" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0008" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0009" access="33331333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111110" por="11111110" />
+    <sfr address="0x000C" access="33111333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x000D" access="33330303" name="PIR2" mclr="11110101" por="11110101" />
+    <combined address="0x000E" size="2" name="TMR1" />
+    <sfr address="0x000E" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x000F" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0010" access="33333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0011" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0012" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0013" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0014" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0015" size="2" name="CCPR1" />
+    <sfr address="0x0015" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0016" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0018" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0019" access="33333333" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x001A" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <combined address="0x001B" size="2" name="CCPR2" />
+    <sfr address="0x001B" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x001C" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x001D" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x001E" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x001F" access="33333333" name="ADCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0087" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0088" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0089" access="33331333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x008C" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x008D" access="33330303" name="PIE2" mclr="11110101" por="11110101" />
+    <sfr address="0x008E" access="00030033" name="PCON" mclr="00030033" por="00020044" />
+    <sfr address="0x008F" access="03331113" name="OSCCON" mclr="02210111" por="02210111" />
+    <sfr address="0x0090" access="00033333" name="OSCTUNE" mclr="00033333" por="00011111" />
+    <sfr address="0x0091" access="33333333" name="ANSEL" mclr="22222222" por="22222222" />
+    <sfr address="0x0092" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0093" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0094" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0095" access="33333333" name="WPUB" mclr="22222222" por="22222222" />
+    <sfr address="0x0096" access="33330000" name="IOCB" mclr="11110000" por="11110000" />
+    <sfr address="0x0097" access="00000033" name="CMCON1" mclr="00000021" por="00000021" />
+    <sfr address="0x0098" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0099" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x009C" access="11333333" name="CMCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x009D" access="30303333" name="VRCON" mclr="10101111" por="10101111" />
+    <sfr address="0x009E" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x009F" access="03330000" name="ADCON1" mclr="01110000" por="01110000" />
+    <sfr address="0x0105" access="00033333" name="WDTCON" mclr="00012111" por="00012111" />
+    <sfr address="0x0107" access="33533333" name="LCDCON" mclr="11121122" por="11121122" />
+    <sfr address="0x0108" access="31133333" name="LCDPS" mclr="11111111" por="11111111" />
+    <sfr address="0x0109" access="00130333" name="LVDCON" mclr="00110211" por="00110211" />
+    <sfr address="0x010C" access="33333333" name="EEDATL" mclr="33333333" por="11111111" />
+    <sfr address="0x010D" access="33333333" name="EEADRL" mclr="33333333" por="11111111" />
+    <sfr address="0x010E" access="00333333" name="EEDATH" mclr="00333333" por="00111111" />
+    <sfr address="0x010F" access="00033333" name="EEADRH" mclr="00033333" por="00011111" />
+    <sfr address="0x0110" access="33333333" name="LCDDATA0" mclr="33333333" por="00000000" />
+    <sfr address="0x0111" access="33333333" name="LCDDATA1" mclr="33333333" por="00000000" />
+    <sfr address="0x0112" access="33333333" name="LCDDATA2" mclr="33333333" por="00000000" />
+    <sfr address="0x0113" access="33333333" name="LCDDATA3" mclr="33333333" por="00000000" />
+    <sfr address="0x0114" access="33333333" name="LCDDATA4" mclr="33333333" por="00000000" />
+    <sfr address="0x0115" access="33333333" name="LCDDATA5" mclr="33333333" por="00000000" />
+    <sfr address="0x0116" access="33333333" name="LCDDATA6" mclr="33333333" por="00000000" />
+    <sfr address="0x0117" access="33333333" name="LCDDATA7" mclr="33333333" por="00000000" />
+    <sfr address="0x0118" access="33333333" name="LCDDATA8" mclr="33333333" por="00000000" />
+    <sfr address="0x0119" access="33333333" name="LCDDATA9" mclr="33333333" por="00000000" />
+    <sfr address="0x011A" access="33333333" name="LCDDATA10" mclr="33333333" por="00000000" />
+    <sfr address="0x011B" access="33333333" name="LCDDATA11" mclr="33333333" por="00000000" />
+    <sfr address="0x011C" access="33333333" name="LCDSE0" mclr="33333333" por="11111111" />
+    <sfr address="0x011D" access="33333333" name="LCDSE1" mclr="33333333" por="11111111" />
+    <sfr address="0x011E" access="33333333" name="LCDSE2" mclr="33333333" por="11111111" />
+    <sfr address="0x0185" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0187" access="00333333" name="TRISG" mclr="11222222" por="11222222" />
+    <sfr address="0x0188" access="33333333" name="PORTF" mclr="33333333" por="00000000" />
+    <sfr address="0x0189" access="00333333" name="PORTG" mclr="00333333" por="00000000" />
+    <sfr address="0x018C" access="30003399" name="EECON1" mclr="30004111" por="00000111" />
+    <sfr address="0x018D" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0190" access="33333333" name="LCDDATA12" mclr="33333333" por="00000000" />
+    <sfr address="0x0191" access="33333333" name="LCDDATA13" mclr="33333333" por="00000000" />
+    <sfr address="0x0192" access="00000033" name="LCDDATA14" mclr="33333333" por="00000000" />
+    <sfr address="0x0193" access="33333333" name="LCDDATA15" mclr="33333333" por="00000000" />
+    <sfr address="0x0194" access="33333333" name="LCDDATA16" mclr="33333333" por="00000000" />
+    <sfr address="0x0195" access="00000033" name="LCDDATA17" mclr="33333333" por="00000000" />
+    <sfr address="0x0196" access="33333333" name="LCDDATA18" mclr="33333333" por="00000000" />
+    <sfr address="0x0197" access="33333333" name="LCDDATA19" mclr="33333333" por="00000000" />
+    <sfr address="0x0198" access="00000033" name="LCDDATA20" mclr="33333333" por="00000000" />
+    <sfr address="0x0199" access="33333333" name="LCDDATA21" mclr="33333333" por="00000000" />
+    <sfr address="0x019A" access="33333333" name="LCDDATA22" mclr="33333333" por="00000000" />
+    <sfr address="0x019B" access="00000033" name="LCDDATA23" mclr="33333333" por="00000000" />
+    <sfr address="0x019C" access="33333333" name="LCDSE3" mclr="33333333" por="11111111" />
+    <sfr address="0x019D" access="33333333" name="LCDSE4" mclr="33333333" por="11111111" />
+    <sfr address="0x019E" access="00000033" name="LCDSE5" mclr="33333333" por="11111111" />
+  </device>
+  <device nb_banks="1" name="16HV540" >
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="22222222" por="22222222" />
+    <sfr address="0x0003" access="33311333" name="STATUS" mclr="21144333" por="21122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="22233333" por="22200000" />
+    <sfr address="0x0005" access="00013333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0000" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="STKPTR" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="00013333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0003" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0005" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0006" access="00333333" name="OPTION2" mclr="00222222" por="00222222" />
+  </device>
+  <device nb_banks="4" name="17C42" >
+    <unused end="0x010F" start="0x0100" />
+    <unused end="0x01FF" start="0x0118" />
+    <unused end="0x020F" start="0x0200" />
+    <unused end="0x02FF" start="0x0218" />
+    <unused end="0x030F" start="0x0300" />
+    <unused end="0x03FF" start="0x0318" />
+    <sfr address="0x0000" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="FSR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33333333" name="PCLATH" mclr="33333333" por="11111111" />
+    <sfr address="0x0004" access="33333333" name="ALUSTA" mclr="22223333" por="22220000" />
+    <sfr address="0x0005" access="33333330" name="T0STA" mclr="11111110" por="11111110" />
+    <sfr address="0x0006" access="00131100" name="CPUSTA" mclr="00224400" por="00222200" />
+    <sfr address="0x0007" access="13333333" name="INTSTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0008" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0009" access="33333333" name="FSR1" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <combined address="0x000B" size="2" name="TMR0" />
+    <sfr address="0x000B" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x000C" access="33333333" name="TMR0H" mclr="33333333" por="00000000" />
+    <combined address="0x000D" size="2" name="TBLPTR" />
+    <sfr address="0x000D" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x000E" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x000F" access="33333333" name="BSR" mclr="11111111" por="11111111" />
+    <sfr address="0x0010" access="30333311" name="PORTA" mclr="10333333" por="10000000" />
+    <sfr address="0x0011" access="33333333" name="DDRB" mclr="22222222" por="22222222" />
+    <sfr address="0x0012" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0013" access="33330111" name="RCSTA" mclr="11110113" por="11110110" />
+    <sfr address="0x0014" access="11111111" name="RCREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0015" access="33330013" name="TXSTA" mclr="11110023" por="11110020" />
+    <sfr address="0x0016" access="33333333" name="TXREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="33333333" name="SPBRG" mclr="33333333" por="00000000" />
+    <sfr address="0x0110" access="33333333" name="DDRC" mclr="22222222" por="22222222" />
+    <sfr address="0x0111" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0112" access="33333333" name="DDRD" mclr="22222222" por="22222222" />
+    <sfr address="0x0113" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0114" access="00000333" name="DDRE" mclr="00000222" por="00000222" />
+    <sfr address="0x0115" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x0116" access="33333311" name="PIR" mclr="11111121" por="11111121" />
+    <sfr address="0x0117" access="33333333" name="PIE" mclr="11111111" por="11111111" />
+    <sfr address="0x0210" access="33333333" name="TMR1" mclr="33333333" por="00000000" />
+    <sfr address="0x0211" access="33333333" name="TMR2" mclr="33333333" por="00000000" />
+    <combined address="0x0212" size="2" name="TMR3" />
+    <sfr address="0x0212" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0213" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0214" access="33333333" name="PR1" mclr="33333333" por="00000000" />
+    <sfr address="0x0215" access="33333333" name="PR2" mclr="33333333" por="00000000" />
+    <combined address="0x0216" size="2" name="PR3" />
+    <sfr address="0x0216" access="33333333" name="PR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0217" access="33333333" name="PR3H" mclr="33333333" por="00000000" />
+    <combined address="0x0216" size="2" name="CA1" />
+    <sfr address="0x0216" access="11111111" name="CA1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0217" access="11111111" name="CA1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0310" access="33000000" name="PW1DCL" mclr="33000000" por="00000000" />
+    <sfr address="0x0311" access="33300000" name="PW2DCL" mclr="33100000" por="00100000" />
+    <sfr address="0x0312" access="33333333" name="PW1DCH" mclr="33333333" por="00000000" />
+    <sfr address="0x0313" access="33333333" name="PW2DCH" mclr="33333333" por="00000000" />
+    <combined address="0x0314" size="2" name="CA2" />
+    <sfr address="0x0314" access="11111111" name="CA2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0315" access="11111111" name="CA2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0316" access="33333333" name="TCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0317" access="11333333" name="TCON2" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="4" name="17C42A" >
+    <unused end="0x010F" start="0x0100" />
+    <unused end="0x011F" start="0x0118" />
+    <unused end="0x020F" start="0x0200" />
+    <unused end="0x02FF" start="0x0218" />
+    <unused end="0x030F" start="0x0300" />
+    <unused end="0x03FF" start="0x0318" />
+    <sfr address="0x0000" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="FSR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33333333" name="PCLATH" mclr="33333333" por="11111111" />
+    <sfr address="0x0004" access="33333333" name="ALUSTA" mclr="22223333" por="22220000" />
+    <sfr address="0x0005" access="33333330" name="T0STA" mclr="11111110" por="11111110" />
+    <sfr address="0x0006" access="00131100" name="CPUSTA" mclr="00224400" por="00222200" />
+    <sfr address="0x0007" access="13333333" name="INTSTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0008" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0009" access="33333333" name="FSR1" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <combined address="0x000B" size="2" name="TMR0" />
+    <sfr address="0x000B" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x000C" access="33333333" name="TMR0H" mclr="33333333" por="00000000" />
+    <combined address="0x000D" size="2" name="TBLPTR" />
+    <sfr address="0x000D" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x000E" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x000F" access="33333333" name="BSR" mclr="11111111" por="11111111" />
+    <sfr address="0x0010" access="30333311" name="PORTA" mclr="10333333" por="10000000" />
+    <sfr address="0x0011" access="33333333" name="DDRB" mclr="22222222" por="22222222" />
+    <sfr address="0x0012" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0013" access="33330111" name="RCSTA" mclr="11110113" por="11110110" />
+    <sfr address="0x0014" access="11111111" name="RCREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0015" access="33330013" name="TXSTA" mclr="11110023" por="11110020" />
+    <sfr address="0x0016" access="33333333" name="TXREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="33333333" name="SPBRG" mclr="33333333" por="00000000" />
+    <sfr address="0x0110" access="33333333" name="DDRC" mclr="22222222" por="22222222" />
+    <sfr address="0x0111" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0112" access="33333333" name="DDRD" mclr="22222222" por="22222222" />
+    <sfr address="0x0113" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0114" access="00000333" name="DDRE" mclr="00000222" por="00000222" />
+    <sfr address="0x0115" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x0116" access="33333311" name="PIR" mclr="11111121" por="11111121" />
+    <sfr address="0x0117" access="33333333" name="PIE" mclr="11111111" por="11111111" />
+    <sfr address="0x0210" access="33333333" name="TMR1" mclr="33333333" por="00000000" />
+    <sfr address="0x0211" access="33333333" name="TMR2" mclr="33333333" por="00000000" />
+    <combined address="0x0212" size="2" name="TMR3" />
+    <sfr address="0x0212" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0213" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0214" access="33333333" name="PR1" mclr="33333333" por="00000000" />
+    <sfr address="0x0215" access="33333333" name="PR2" mclr="33333333" por="00000000" />
+    <combined address="0x0216" size="2" name="PR3" />
+    <sfr address="0x0216" access="33333333" name="PR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0217" access="33333333" name="PR3H" mclr="33333333" por="00000000" />
+    <combined address="0x0216" size="2" name="CA1" />
+    <sfr address="0x0216" access="11111111" name="CA1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0217" access="11111111" name="CA1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0310" access="33000000" name="PW1DCL" mclr="33000000" por="00000000" />
+    <sfr address="0x0311" access="33300000" name="PW2DCL" mclr="33100000" por="00100000" />
+    <sfr address="0x0312" access="33333333" name="PW1DCH" mclr="33333333" por="00000000" />
+    <sfr address="0x0313" access="33333333" name="PW2DCH" mclr="33333333" por="00000000" />
+    <combined address="0x0314" size="2" name="CA2" />
+    <sfr address="0x0314" access="11111111" name="CA2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0315" access="11111111" name="CA2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0316" access="33333333" name="TCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0317" access="11333333" name="TCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0018" size="2" name="PROD" />
+    <sfr address="0x0018" access="11111111" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0019" access="11111111" name="PRODH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="4" name="17C43" >
+    <unused end="0x010F" start="0x0100" />
+    <unused end="0x011F" start="0x0118" />
+    <unused end="0x020F" start="0x0200" />
+    <unused end="0x02FF" start="0x0218" />
+    <unused end="0x030F" start="0x0300" />
+    <unused end="0x03FF" start="0x0318" />
+    <sfr address="0x0000" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="FSR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33333333" name="PCLATH" mclr="33333333" por="11111111" />
+    <sfr address="0x0004" access="33333333" name="ALUSTA" mclr="22223333" por="22220000" />
+    <sfr address="0x0005" access="33333330" name="T0STA" mclr="11111110" por="11111110" />
+    <sfr address="0x0006" access="00131100" name="CPUSTA" mclr="00224400" por="00222200" />
+    <sfr address="0x0007" access="13333333" name="INTSTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0008" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0009" access="33333333" name="FSR1" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <combined address="0x000B" size="2" name="TMR0" />
+    <sfr address="0x000B" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x000C" access="33333333" name="TMR0H" mclr="33333333" por="00000000" />
+    <combined address="0x000D" size="2" name="TBLPTR" />
+    <sfr address="0x000D" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x000E" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x000F" access="33333333" name="BSR" mclr="11111111" por="11111111" />
+    <sfr address="0x0010" access="30333311" name="PORTA" mclr="10333333" por="10000000" />
+    <sfr address="0x0011" access="33333333" name="DDRB" mclr="22222222" por="22222222" />
+    <sfr address="0x0012" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0013" access="33330111" name="RCSTA" mclr="11110113" por="11110110" />
+    <sfr address="0x0014" access="11111111" name="RCREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0015" access="33330013" name="TXSTA" mclr="11110023" por="11110020" />
+    <sfr address="0x0016" access="33333333" name="TXREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="33333333" name="SPBRG" mclr="33333333" por="00000000" />
+    <sfr address="0x0110" access="33333333" name="DDRC" mclr="22222222" por="22222222" />
+    <sfr address="0x0111" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0112" access="33333333" name="DDRD" mclr="22222222" por="22222222" />
+    <sfr address="0x0113" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0114" access="00000333" name="DDRE" mclr="00000222" por="00000222" />
+    <sfr address="0x0115" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x0116" access="33333311" name="PIR" mclr="11111121" por="11111121" />
+    <sfr address="0x0117" access="33333333" name="PIE" mclr="11111111" por="11111111" />
+    <sfr address="0x0210" access="33333333" name="TMR1" mclr="33333333" por="00000000" />
+    <sfr address="0x0211" access="33333333" name="TMR2" mclr="33333333" por="00000000" />
+    <combined address="0x0212" size="2" name="TMR3" />
+    <sfr address="0x0212" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0213" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0214" access="33333333" name="PR1" mclr="33333333" por="00000000" />
+    <sfr address="0x0215" access="33333333" name="PR2" mclr="33333333" por="00000000" />
+    <combined address="0x0216" size="2" name="PR3" />
+    <sfr address="0x0216" access="33333333" name="PR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0217" access="33333333" name="PR3H" mclr="33333333" por="00000000" />
+    <combined address="0x0216" size="2" name="CA1" />
+    <sfr address="0x0216" access="11111111" name="CA1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0217" access="11111111" name="CA1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0310" access="33000000" name="PW1DCL" mclr="33000000" por="00000000" />
+    <sfr address="0x0311" access="33300000" name="PW2DCL" mclr="33100000" por="00100000" />
+    <sfr address="0x0312" access="33333333" name="PW1DCH" mclr="33333333" por="00000000" />
+    <sfr address="0x0313" access="33333333" name="PW2DCH" mclr="33333333" por="00000000" />
+    <combined address="0x0314" size="2" name="CA2" />
+    <sfr address="0x0314" access="11111111" name="CA2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0315" access="11111111" name="CA2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0316" access="33333333" name="TCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0317" access="11333333" name="TCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0018" size="2" name="PROD" />
+    <sfr address="0x0018" access="11111111" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0019" access="11111111" name="PRODH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="4" name="17C44" >
+    <unused end="0x010F" start="0x0100" />
+    <unused end="0x011F" start="0x0118" />
+    <unused end="0x020F" start="0x0200" />
+    <unused end="0x02FF" start="0x0218" />
+    <unused end="0x030F" start="0x0300" />
+    <unused end="0x03FF" start="0x0318" />
+    <sfr address="0x0000" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="FSR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33333333" name="PCLATH" mclr="33333333" por="11111111" />
+    <sfr address="0x0004" access="33333333" name="ALUSTA" mclr="22223333" por="22220000" />
+    <sfr address="0x0005" access="33333330" name="T0STA" mclr="11111110" por="11111110" />
+    <sfr address="0x0006" access="00131100" name="CPUSTA" mclr="00224400" por="00222200" />
+    <sfr address="0x0007" access="13333333" name="INTSTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0008" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0009" access="33333333" name="FSR1" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <combined address="0x000B" size="2" name="TMR0" />
+    <sfr address="0x000B" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x000C" access="33333333" name="TMR0H" mclr="33333333" por="00000000" />
+    <combined address="0x000D" size="2" name="TBLPTR" />
+    <sfr address="0x000D" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x000E" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x000F" access="33333333" name="BSR" mclr="11111111" por="11111111" />
+    <sfr address="0x0010" access="30333311" name="PORTA" mclr="10333333" por="10000000" />
+    <sfr address="0x0011" access="33333333" name="DDRB" mclr="22222222" por="22222222" />
+    <sfr address="0x0012" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0013" access="33330111" name="RCSTA" mclr="11110113" por="11110110" />
+    <sfr address="0x0014" access="11111111" name="RCREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0015" access="33330013" name="TXSTA" mclr="11110023" por="11110020" />
+    <sfr address="0x0016" access="33333333" name="TXREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="33333333" name="SPBRG" mclr="33333333" por="00000000" />
+    <sfr address="0x0110" access="33333333" name="DDRC" mclr="22222222" por="22222222" />
+    <sfr address="0x0111" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0112" access="33333333" name="DDRD" mclr="22222222" por="22222222" />
+    <sfr address="0x0113" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0114" access="00000333" name="DDRE" mclr="00000222" por="00000222" />
+    <sfr address="0x0115" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x0116" access="33333311" name="PIR" mclr="11111121" por="11111121" />
+    <sfr address="0x0117" access="33333333" name="PIE" mclr="11111111" por="11111111" />
+    <sfr address="0x0210" access="33333333" name="TMR1" mclr="33333333" por="00000000" />
+    <sfr address="0x0211" access="33333333" name="TMR2" mclr="33333333" por="00000000" />
+    <combined address="0x0212" size="2" name="TMR3" />
+    <sfr address="0x0212" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0213" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0214" access="33333333" name="PR1" mclr="33333333" por="00000000" />
+    <sfr address="0x0215" access="33333333" name="PR2" mclr="33333333" por="00000000" />
+    <combined address="0x0216" size="2" name="PR3" />
+    <sfr address="0x0216" access="33333333" name="PR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0217" access="33333333" name="PR3H" mclr="33333333" por="00000000" />
+    <combined address="0x0216" size="2" name="CA1" />
+    <sfr address="0x0216" access="11111111" name="CA1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0217" access="11111111" name="CA1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0310" access="33000000" name="PW1DCL" mclr="33000000" por="00000000" />
+    <sfr address="0x0311" access="33300000" name="PW2DCL" mclr="33100000" por="00100000" />
+    <sfr address="0x0312" access="33333333" name="PW1DCH" mclr="33333333" por="00000000" />
+    <sfr address="0x0313" access="33333333" name="PW2DCH" mclr="33333333" por="00000000" />
+    <combined address="0x0314" size="2" name="CA2" />
+    <sfr address="0x0314" access="11111111" name="CA2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0315" access="11111111" name="CA2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0316" access="33333333" name="TCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0317" access="11333333" name="TCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0018" size="2" name="PROD" />
+    <sfr address="0x0018" access="11111111" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0019" access="11111111" name="PRODH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="8" name="17C752" >
+    <unused end="0x0412" start="0x0412" />
+    <unused end="0x0617" start="0x0615" />
+    <unused end="0x0717" start="0x0717" />
+    <unused end="0x010F" start="0x0100" />
+    <unused end="0x011F" start="0x0118" />
+    <unused end="0x020F" start="0x0200" />
+    <unused end="0x021F" start="0x0218" />
+    <unused end="0x030F" start="0x0300" />
+    <unused end="0x03FF" start="0x0318" />
+    <unused end="0x040F" start="0x0400" />
+    <unused end="0x04FF" start="0x0418" />
+    <unused end="0x050F" start="0x0500" />
+    <unused end="0x05FF" start="0x0518" />
+    <unused end="0x060F" start="0x0600" />
+    <unused end="0x06FF" start="0x0618" />
+    <unused end="0x070F" start="0x0700" />
+    <unused end="0x07FF" start="0x0718" />
+    <sfr address="0x0000" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="FSR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33333333" name="PCLATH" mclr="33333333" por="11111111" />
+    <sfr address="0x0004" access="33333333" name="ALUSTA" mclr="22223333" por="22220000" />
+    <sfr address="0x0005" access="33333330" name="T0STA" mclr="11111110" por="11111110" />
+    <sfr address="0x0006" access="00131133" name="CPUSTA" mclr="00224433" por="00222244" />
+    <sfr address="0x0007" access="13333333" name="INTSTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0008" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0009" access="33333333" name="FSR1" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <combined address="0x000B" size="2" name="TMR0" />
+    <sfr address="0x000B" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x000C" access="33333333" name="TMR0H" mclr="33333333" por="00000000" />
+    <combined address="0x000D" size="2" name="TBLPTR" />
+    <sfr address="0x000D" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x000E" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x000F" access="33333333" name="BSR" mclr="11111111" por="11111111" />
+    <sfr address="0x0010" access="30113311" name="PORTA" mclr="10332233" por="10002200" />
+    <sfr address="0x0011" access="33333333" name="DDRB" mclr="22222222" por="22222222" />
+    <sfr address="0x0012" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0013" access="33330111" name="RCSTA1" mclr="11110113" por="11110110" />
+    <sfr address="0x0014" access="11111111" name="RCREG1" mclr="33333333" por="00000000" />
+    <sfr address="0x0015" access="33330013" name="TXSTA1" mclr="11110023" por="11110020" />
+    <sfr address="0x0016" access="33333333" name="TXREG1" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0110" access="33333333" name="DDRC" mclr="22222222" por="22222222" />
+    <sfr address="0x0111" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0112" access="33333333" name="DDRD" mclr="22222222" por="22222222" />
+    <sfr address="0x0113" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0114" access="00003333" name="DDRE" mclr="00002222" por="00002222" />
+    <sfr address="0x0115" access="00003333" name="PORTE" mclr="00003333" por="00000000" />
+    <sfr address="0x0116" access="33333311" name="PIR1" mclr="31111121" por="01111121" />
+    <sfr address="0x0117" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0210" access="33333333" name="TMR1" mclr="33333333" por="00000000" />
+    <sfr address="0x0211" access="33333333" name="TMR2" mclr="33333333" por="00000000" />
+    <combined address="0x0212" size="2" name="TMR3" />
+    <sfr address="0x0212" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0213" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0214" access="33333333" name="PR1" mclr="33333333" por="00000000" />
+    <sfr address="0x0215" access="33333333" name="PR2" mclr="33333333" por="00000000" />
+    <combined address="0x0216" size="2" name="PR3" />
+    <sfr address="0x0216" access="33333333" name="PR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0217" access="33333333" name="PR3H" mclr="33333333" por="00000000" />
+    <combined address="0x0216" size="2" name="CA1" />
+    <sfr address="0x0216" access="11111111" name="CA1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0217" access="11111111" name="CA1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0310" access="33000000" name="PW1DCL" mclr="33000000" por="00000000" />
+    <sfr address="0x0311" access="33300000" name="PW2DCL" mclr="33100000" por="00100000" />
+    <sfr address="0x0312" access="33333333" name="PW1DCH" mclr="33333333" por="00000000" />
+    <sfr address="0x0313" access="33333333" name="PW2DCH" mclr="33333333" por="00000000" />
+    <combined address="0x0314" size="2" name="CA2" />
+    <sfr address="0x0314" access="11111111" name="CA2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0315" access="11111111" name="CA2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0316" access="33333333" name="TCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0317" access="11333333" name="TCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0410" access="33303311" name="PIR2" mclr="11101121" por="11101121" />
+    <sfr address="0x0411" access="33303333" name="PIE2" mclr="11101111" por="11101111" />
+    <sfr address="0x0413" access="33330111" name="RCSTA2" mclr="11110113" por="11110110" />
+    <sfr address="0x0414" access="11111111" name="RCREG2" mclr="33333333" por="00000000" />
+    <sfr address="0x0415" access="33330013" name="TXSTA2" mclr="11110023" por="11110020" />
+    <sfr address="0x0416" access="33333333" name="TXREG2" mclr="33333333" por="00000000" />
+    <sfr address="0x0417" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0510" access="33333333" name="DDRF" mclr="22222222" por="22222222" />
+    <sfr address="0x0511" access="33333333" name="PORTF" mclr="11111111" por="11111111" />
+    <sfr address="0x0512" access="33333333" name="DDRG" mclr="22222222" por="22222222" />
+    <sfr address="0x0513" access="33333333" name="PORTG" mclr="33331111" por="00001111" />
+    <sfr address="0x0514" access="33330303" name="ADCON0" mclr="11110101" por="11110101" />
+    <sfr address="0x0515" access="33303333" name="ADCON1" mclr="11101111" por="11101111" />
+    <combined address="0x0516" size="2" name="ADRES" />
+    <sfr address="0x0516" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0517" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0610" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0611" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0612" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0613" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0614" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <combined address="0x0710" size="2" name="PW3DC" />
+    <sfr address="0x0710" access="33333333" name="PW3DCL" mclr="33100000" por="00100000" />
+    <sfr address="0x0711" access="33333333" name="PW3DCH" mclr="33333333" por="00000000" />
+    <combined address="0x0712" size="2" name="CA3" />
+    <sfr address="0x0712" access="11111111" name="CA3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0713" access="11111111" name="CA3H" mclr="33333333" por="00000000" />
+    <combined address="0x0714" size="2" name="CA4" />
+    <sfr address="0x0714" access="11111111" name="CA4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0715" access="11111111" name="CA4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0716" access="01133333" name="TCON3" mclr="01111111" por="01111111" />
+    <combined address="0x0018" size="2" name="PROD" />
+    <sfr address="0x0018" access="11111111" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0019" access="11111111" name="PRODH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="8" name="17C756" >
+    <unused end="0x0412" start="0x0412" />
+    <unused end="0x0617" start="0x0615" />
+    <unused end="0x0717" start="0x0717" />
+    <unused end="0x010F" start="0x0100" />
+    <unused end="0x011F" start="0x0118" />
+    <unused end="0x020F" start="0x0200" />
+    <unused end="0x021F" start="0x0218" />
+    <unused end="0x030F" start="0x0300" />
+    <unused end="0x031F" start="0x0318" />
+    <unused end="0x040F" start="0x0400" />
+    <unused end="0x04FF" start="0x0418" />
+    <unused end="0x050F" start="0x0500" />
+    <unused end="0x05FF" start="0x0518" />
+    <unused end="0x060F" start="0x0600" />
+    <unused end="0x06FF" start="0x0618" />
+    <unused end="0x070F" start="0x0700" />
+    <unused end="0x07FF" start="0x0718" />
+    <sfr address="0x0000" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="FSR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33333333" name="PCLATH" mclr="33333333" por="11111111" />
+    <sfr address="0x0004" access="33333333" name="ALUSTA" mclr="22223333" por="22220000" />
+    <sfr address="0x0005" access="33333330" name="T0STA" mclr="11111110" por="11111110" />
+    <sfr address="0x0006" access="00131133" name="CPUSTA" mclr="00224433" por="00222244" />
+    <sfr address="0x0007" access="13333333" name="INTSTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0008" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0009" access="33333333" name="FSR1" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <combined address="0x000B" size="2" name="TMR0" />
+    <sfr address="0x000B" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x000C" access="33333333" name="TMR0H" mclr="33333333" por="00000000" />
+    <combined address="0x000D" size="2" name="TBLPTR" />
+    <sfr address="0x000D" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x000E" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x000F" access="33333333" name="BSR" mclr="11111111" por="11111111" />
+    <sfr address="0x0010" access="30113311" name="PORTA" mclr="10332233" por="10002200" />
+    <sfr address="0x0011" access="33333333" name="DDRB" mclr="22222222" por="22222222" />
+    <sfr address="0x0012" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0013" access="33330111" name="RCSTA1" mclr="11110113" por="11110110" />
+    <sfr address="0x0014" access="11111111" name="RCREG1" mclr="33333333" por="00000000" />
+    <sfr address="0x0015" access="33330013" name="TXSTA1" mclr="11110023" por="11110020" />
+    <sfr address="0x0016" access="33333333" name="TXREG1" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0110" access="33333333" name="DDRC" mclr="22222222" por="22222222" />
+    <sfr address="0x0111" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0112" access="33333333" name="DDRD" mclr="22222222" por="22222222" />
+    <sfr address="0x0113" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0114" access="00003333" name="DDRE" mclr="00002222" por="00002222" />
+    <sfr address="0x0115" access="00003333" name="PORTE" mclr="00003333" por="00000000" />
+    <sfr address="0x0116" access="33333311" name="PIR1" mclr="31111121" por="01111121" />
+    <sfr address="0x0117" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0210" access="33333333" name="TMR1" mclr="33333333" por="00000000" />
+    <sfr address="0x0211" access="33333333" name="TMR2" mclr="33333333" por="00000000" />
+    <combined address="0x0212" size="2" name="TMR3" />
+    <sfr address="0x0212" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0213" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0214" access="33333333" name="PR1" mclr="33333333" por="00000000" />
+    <sfr address="0x0215" access="33333333" name="PR2" mclr="33333333" por="00000000" />
+    <combined address="0x0216" size="2" name="PR3" />
+    <sfr address="0x0216" access="33333333" name="PR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0217" access="33333333" name="PR3H" mclr="33333333" por="00000000" />
+    <combined address="0x0216" size="2" name="CA1" />
+    <sfr address="0x0216" access="11111111" name="CA1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0217" access="11111111" name="CA1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0310" access="33000000" name="PW1DCL" mclr="33000000" por="00000000" />
+    <sfr address="0x0311" access="33300000" name="PW2DCL" mclr="33100000" por="00100000" />
+    <sfr address="0x0312" access="33333333" name="PW1DCH" mclr="33333333" por="00000000" />
+    <sfr address="0x0313" access="33333333" name="PW2DCH" mclr="33333333" por="00000000" />
+    <combined address="0x0314" size="2" name="CA2" />
+    <sfr address="0x0314" access="11111111" name="CA2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0315" access="11111111" name="CA2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0316" access="33333333" name="TCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0317" access="11333333" name="TCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0410" access="33303311" name="PIR2" mclr="11101121" por="11101121" />
+    <sfr address="0x0411" access="33303333" name="PIE2" mclr="11101111" por="11101111" />
+    <sfr address="0x0413" access="33330111" name="RCSTA2" mclr="11110113" por="11110110" />
+    <sfr address="0x0414" access="11111111" name="RCREG2" mclr="33333333" por="00000000" />
+    <sfr address="0x0415" access="33330013" name="TXSTA2" mclr="11110023" por="11110020" />
+    <sfr address="0x0416" access="33333333" name="TXREG2" mclr="33333333" por="00000000" />
+    <sfr address="0x0417" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0510" access="33333333" name="DDRF" mclr="22222222" por="22222222" />
+    <sfr address="0x0511" access="33333333" name="PORTF" mclr="11111111" por="11111111" />
+    <sfr address="0x0512" access="33333333" name="DDRG" mclr="22222222" por="22222222" />
+    <sfr address="0x0513" access="33333333" name="PORTG" mclr="33331111" por="00001111" />
+    <sfr address="0x0514" access="33330303" name="ADCON0" mclr="11110101" por="11110101" />
+    <sfr address="0x0515" access="33303333" name="ADCON1" mclr="11101111" por="11101111" />
+    <combined address="0x0516" size="2" name="ADRES" />
+    <sfr address="0x0516" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0517" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0610" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0611" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0612" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0613" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0614" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <combined address="0x0710" size="2" name="PW3DC" />
+    <sfr address="0x0710" access="33333333" name="PW3DCL" mclr="33100000" por="00100000" />
+    <sfr address="0x0711" access="33333333" name="PW3DCH" mclr="33333333" por="00000000" />
+    <combined address="0x0712" size="2" name="CA3" />
+    <sfr address="0x0712" access="11111111" name="CA3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0713" access="11111111" name="CA3H" mclr="33333333" por="00000000" />
+    <combined address="0x0714" size="2" name="CA4" />
+    <sfr address="0x0714" access="11111111" name="CA4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0715" access="11111111" name="CA4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0716" access="01133333" name="TCON3" mclr="01111111" por="01111111" />
+    <combined address="0x0018" size="2" name="PROD" />
+    <sfr address="0x0018" access="11111111" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0019" access="11111111" name="PRODH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="8" name="17C756A" >
+    <unused end="0x0412" start="0x0412" />
+    <unused end="0x0617" start="0x0615" />
+    <unused end="0x0717" start="0x0717" />
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+    <unused end="0x07FF" start="0x0718" />
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+    <sfr address="0x0001" access="33333333" name="FSR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33333333" name="PCLATH" mclr="33333333" por="11111111" />
+    <sfr address="0x0004" access="33333333" name="ALUSTA" mclr="22223333" por="22220000" />
+    <sfr address="0x0005" access="33333330" name="T0STA" mclr="11111110" por="11111110" />
+    <sfr address="0x0006" access="00131133" name="CPUSTA" mclr="00224433" por="00222244" />
+    <sfr address="0x0007" access="13333333" name="INTSTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0008" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0009" access="33333333" name="FSR1" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <combined address="0x000B" size="2" name="TMR0" />
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+    <sfr address="0x000C" access="33333333" name="TMR0H" mclr="33333333" por="00000000" />
+    <combined address="0x000D" size="2" name="TBLPTR" />
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+    <sfr address="0x000E" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x000F" access="33333333" name="BSR" mclr="11111111" por="11111111" />
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+    <sfr address="0x0012" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
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+    <sfr address="0x0014" access="11111111" name="RCREG1" mclr="33333333" por="00000000" />
+    <sfr address="0x0015" access="33330013" name="TXSTA1" mclr="11110023" por="11110020" />
+    <sfr address="0x0016" access="33333333" name="TXREG1" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0110" access="33333333" name="DDRC" mclr="22222222" por="22222222" />
+    <sfr address="0x0111" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
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+    <sfr address="0x0113" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
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+    <sfr address="0x0115" access="00003333" name="PORTE" mclr="00003333" por="00000000" />
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+    <sfr address="0x0211" access="33333333" name="TMR2" mclr="33333333" por="00000000" />
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+    <sfr address="0x0215" access="33333333" name="PR2" mclr="33333333" por="00000000" />
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+    <sfr address="0x0217" access="33333333" name="PR3H" mclr="33333333" por="00000000" />
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+    <sfr address="0x0313" access="33333333" name="PW2DCH" mclr="33333333" por="00000000" />
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+    <sfr address="0x0413" access="33330111" name="RCSTA2" mclr="11110113" por="11110110" />
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+    <sfr address="0x0416" access="33333333" name="TXREG2" mclr="33333333" por="00000000" />
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+    <sfr address="0x0511" access="33333333" name="PORTF" mclr="11111111" por="11111111" />
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+    <sfr address="0x0517" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
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+    <sfr address="0x0611" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0612" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0613" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0614" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <combined address="0x0710" size="2" name="PW3DC" />
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+    <sfr address="0x0711" access="33333333" name="PW3DCH" mclr="33333333" por="00000000" />
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+    <sfr address="0x0713" access="11111111" name="CA3H" mclr="33333333" por="00000000" />
+    <combined address="0x0714" size="2" name="CA4" />
+    <sfr address="0x0714" access="11111111" name="CA4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0715" access="11111111" name="CA4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0716" access="01133333" name="TCON3" mclr="01111111" por="01111111" />
+    <combined address="0x0018" size="2" name="PROD" />
+    <sfr address="0x0018" access="11111111" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0019" access="11111111" name="PRODH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="9" name="17C762" >
+    <unused end="0x0412" start="0x0412" />
+    <unused end="0x0617" start="0x0615" />
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+    <unused end="0x080F" start="0x0800" />
+    <unused end="0x08FF" start="0x0818" />
+    <sfr address="0x0000" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="FSR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33333333" name="PCLATH" mclr="33333333" por="11111111" />
+    <sfr address="0x0004" access="33333333" name="ALUSTA" mclr="22223333" por="22220000" />
+    <sfr address="0x0005" access="33333330" name="T0STA" mclr="11111110" por="11111110" />
+    <sfr address="0x0006" access="00131133" name="CPUSTA" mclr="00224433" por="00222244" />
+    <sfr address="0x0007" access="13333333" name="INTSTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0008" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0009" access="33333333" name="FSR1" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="33333333" name="WREG" mclr="33333333" por="00000000" />
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+    <sfr address="0x000C" access="33333333" name="TMR0H" mclr="33333333" por="00000000" />
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+    <sfr address="0x000E" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
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+    <sfr address="0x0012" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
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+    <sfr address="0x0014" access="11111111" name="RCREG1" mclr="33333333" por="00000000" />
+    <sfr address="0x0015" access="33330013" name="TXSTA1" mclr="11110023" por="11110020" />
+    <sfr address="0x0016" access="33333333" name="TXREG1" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0110" access="33333333" name="DDRC" mclr="22222222" por="22222222" />
+    <sfr address="0x0111" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
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+    <sfr address="0x0113" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0114" access="00003333" name="DDRE" mclr="00002222" por="00002222" />
+    <sfr address="0x0115" access="00003333" name="PORTE" mclr="00003333" por="00000000" />
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+    <sfr address="0x0117" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0210" access="33333333" name="TMR1" mclr="33333333" por="00000000" />
+    <sfr address="0x0211" access="33333333" name="TMR2" mclr="33333333" por="00000000" />
+    <combined address="0x0212" size="2" name="TMR3" />
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+    <sfr address="0x0217" access="33333333" name="PR3H" mclr="33333333" por="00000000" />
+    <combined address="0x0216" size="2" name="CA1" />
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+    <sfr address="0x0313" access="33333333" name="PW2DCH" mclr="33333333" por="00000000" />
+    <combined address="0x0314" size="2" name="CA2" />
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+    <sfr address="0x0315" access="11111111" name="CA2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0316" access="33333333" name="TCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0317" access="11333333" name="TCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0410" access="33303311" name="PIR2" mclr="11101121" por="11101121" />
+    <sfr address="0x0411" access="33303333" name="PIE2" mclr="11101111" por="11101111" />
+    <sfr address="0x0413" access="33330111" name="RCSTA2" mclr="11110113" por="11110110" />
+    <sfr address="0x0414" access="11111111" name="RCREG2" mclr="33333333" por="00000000" />
+    <sfr address="0x0415" access="33330013" name="TXSTA2" mclr="11110023" por="11110020" />
+    <sfr address="0x0416" access="33333333" name="TXREG2" mclr="33333333" por="00000000" />
+    <sfr address="0x0417" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0510" access="33333333" name="DDRF" mclr="22222222" por="22222222" />
+    <sfr address="0x0511" access="33333333" name="PORTF" mclr="11111111" por="11111111" />
+    <sfr address="0x0512" access="33333333" name="DDRG" mclr="22222222" por="22222222" />
+    <sfr address="0x0513" access="33333333" name="PORTG" mclr="33331111" por="00001111" />
+    <sfr address="0x0514" access="33330303" name="ADCON0" mclr="11110101" por="11110101" />
+    <sfr address="0x0515" access="33303333" name="ADCON1" mclr="11101111" por="11101111" />
+    <combined address="0x0516" size="2" name="ADRES" />
+    <sfr address="0x0516" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0517" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0610" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0611" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0612" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0613" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0614" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <combined address="0x0710" size="2" name="PW3DC" />
+    <sfr address="0x0710" access="33333333" name="PW3DCL" mclr="33100000" por="00100000" />
+    <sfr address="0x0711" access="33333333" name="PW3DCH" mclr="33333333" por="00000000" />
+    <combined address="0x0712" size="2" name="CA3" />
+    <sfr address="0x0712" access="11111111" name="CA3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0713" access="11111111" name="CA3H" mclr="33333333" por="00000000" />
+    <combined address="0x0714" size="2" name="CA4" />
+    <sfr address="0x0714" access="11111111" name="CA4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0715" access="11111111" name="CA4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0716" access="01133333" name="TCON3" mclr="01111111" por="01111111" />
+    <sfr address="0x0810" access="33333333" name="DDRH" mclr="22222222" por="22222222" />
+    <sfr address="0x0811" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0812" access="33333333" name="DDRJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0813" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <combined address="0x0018" size="2" name="PROD" />
+    <sfr address="0x0018" access="11111111" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0019" access="11111111" name="PRODH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="9" name="17C766" >
+    <unused end="0x0412" start="0x0412" />
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+    <unused end="0x080F" start="0x0800" />
+    <unused end="0x08FF" start="0x0818" />
+    <sfr address="0x0000" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="FSR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33333333" name="PCLATH" mclr="33333333" por="11111111" />
+    <sfr address="0x0004" access="33333333" name="ALUSTA" mclr="22223333" por="22220000" />
+    <sfr address="0x0005" access="33333330" name="T0STA" mclr="11111110" por="11111110" />
+    <sfr address="0x0006" access="00131133" name="CPUSTA" mclr="00224433" por="00222244" />
+    <sfr address="0x0007" access="13333333" name="INTSTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0008" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0009" access="33333333" name="FSR1" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <combined address="0x000B" size="2" name="TMR0" />
+    <sfr address="0x000B" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x000C" access="33333333" name="TMR0H" mclr="33333333" por="00000000" />
+    <combined address="0x000D" size="2" name="TBLPTR" />
+    <sfr address="0x000D" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x000E" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x000F" access="33333333" name="BSR" mclr="11111111" por="11111111" />
+    <sfr address="0x0010" access="30113311" name="PORTA" mclr="10332233" por="10002200" />
+    <sfr address="0x0011" access="33333333" name="DDRB" mclr="22222222" por="22222222" />
+    <sfr address="0x0012" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0013" access="33330111" name="RCSTA1" mclr="11110113" por="11110110" />
+    <sfr address="0x0014" access="11111111" name="RCREG1" mclr="33333333" por="00000000" />
+    <sfr address="0x0015" access="33330013" name="TXSTA1" mclr="11110023" por="11110020" />
+    <sfr address="0x0016" access="33333333" name="TXREG1" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0110" access="33333333" name="DDRC" mclr="22222222" por="22222222" />
+    <sfr address="0x0111" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0112" access="33333333" name="DDRD" mclr="22222222" por="22222222" />
+    <sfr address="0x0113" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0114" access="00003333" name="DDRE" mclr="00002222" por="00002222" />
+    <sfr address="0x0115" access="00003333" name="PORTE" mclr="00003333" por="00000000" />
+    <sfr address="0x0116" access="33333311" name="PIR1" mclr="31111121" por="01111121" />
+    <sfr address="0x0117" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0210" access="33333333" name="TMR1" mclr="33333333" por="00000000" />
+    <sfr address="0x0211" access="33333333" name="TMR2" mclr="33333333" por="00000000" />
+    <combined address="0x0212" size="2" name="TMR3" />
+    <sfr address="0x0212" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0213" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0214" access="33333333" name="PR1" mclr="33333333" por="00000000" />
+    <sfr address="0x0215" access="33333333" name="PR2" mclr="33333333" por="00000000" />
+    <combined address="0x0216" size="2" name="PR3" />
+    <sfr address="0x0216" access="33333333" name="PR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0217" access="33333333" name="PR3H" mclr="33333333" por="00000000" />
+    <combined address="0x0216" size="2" name="CA1" />
+    <sfr address="0x0216" access="11111111" name="CA1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0217" access="11111111" name="CA1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0310" access="33000000" name="PW1DCL" mclr="33000000" por="00000000" />
+    <sfr address="0x0311" access="33300000" name="PW2DCL" mclr="33100000" por="00100000" />
+    <sfr address="0x0312" access="33333333" name="PW1DCH" mclr="33333333" por="00000000" />
+    <sfr address="0x0313" access="33333333" name="PW2DCH" mclr="33333333" por="00000000" />
+    <combined address="0x0314" size="2" name="CA2" />
+    <sfr address="0x0314" access="11111111" name="CA2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0315" access="11111111" name="CA2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0316" access="33333333" name="TCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0317" access="11333333" name="TCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0410" access="33303311" name="PIR2" mclr="11101121" por="11101121" />
+    <sfr address="0x0411" access="33303333" name="PIE2" mclr="11101111" por="11101111" />
+    <sfr address="0x0413" access="33330111" name="RCSTA2" mclr="11110113" por="11110110" />
+    <sfr address="0x0414" access="11111111" name="RCREG2" mclr="33333333" por="00000000" />
+    <sfr address="0x0415" access="33330013" name="TXSTA2" mclr="11110023" por="11110020" />
+    <sfr address="0x0416" access="33333333" name="TXREG2" mclr="33333333" por="00000000" />
+    <sfr address="0x0417" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0510" access="33333333" name="DDRF" mclr="22222222" por="22222222" />
+    <sfr address="0x0511" access="33333333" name="PORTF" mclr="11111111" por="11111111" />
+    <sfr address="0x0512" access="33333333" name="DDRG" mclr="22222222" por="22222222" />
+    <sfr address="0x0513" access="33333333" name="PORTG" mclr="33331111" por="00001111" />
+    <sfr address="0x0514" access="33330303" name="ADCON0" mclr="11110101" por="11110101" />
+    <sfr address="0x0515" access="33303333" name="ADCON1" mclr="11101111" por="11101111" />
+    <combined address="0x0516" size="2" name="ADRES" />
+    <sfr address="0x0516" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0517" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0610" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0611" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0612" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0613" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0614" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <combined address="0x0710" size="2" name="PW3DC" />
+    <sfr address="0x0710" access="33333333" name="PW3DCL" mclr="33100000" por="00100000" />
+    <sfr address="0x0711" access="33333333" name="PW3DCH" mclr="33333333" por="00000000" />
+    <combined address="0x0712" size="2" name="CA3" />
+    <sfr address="0x0712" access="11111111" name="CA3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0713" access="11111111" name="CA3H" mclr="33333333" por="00000000" />
+    <combined address="0x0714" size="2" name="CA4" />
+    <sfr address="0x0714" access="11111111" name="CA4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0715" access="11111111" name="CA4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0716" access="01133333" name="TCON3" mclr="01111111" por="01111111" />
+    <sfr address="0x0810" access="33333333" name="DDRH" mclr="22222222" por="22222222" />
+    <sfr address="0x0811" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0812" access="33333333" name="DDRJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0813" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <combined address="0x0018" size="2" name="PROD" />
+    <sfr address="0x0018" access="11111111" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0019" access="11111111" name="PRODH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="4" name="17CR42" >
+    <unused end="0x010F" start="0x0100" />
+    <unused end="0x011F" start="0x0118" />
+    <unused end="0x020F" start="0x0200" />
+    <unused end="0x02FF" start="0x0218" />
+    <unused end="0x030F" start="0x0300" />
+    <unused end="0x03FF" start="0x0318" />
+    <sfr address="0x0000" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="FSR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33333333" name="PCLATH" mclr="33333333" por="11111111" />
+    <sfr address="0x0004" access="33333333" name="ALUSTA" mclr="22223333" por="22220000" />
+    <sfr address="0x0005" access="33333330" name="T0STA" mclr="11111110" por="11111110" />
+    <sfr address="0x0006" access="00131100" name="CPUSTA" mclr="00224400" por="00222200" />
+    <sfr address="0x0007" access="13333333" name="INTSTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0008" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0009" access="33333333" name="FSR1" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <combined address="0x000B" size="2" name="TMR0" />
+    <sfr address="0x000B" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x000C" access="33333333" name="TMR0H" mclr="33333333" por="00000000" />
+    <combined address="0x000D" size="2" name="TBLPTR" />
+    <sfr address="0x000D" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x000E" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x000F" access="33333333" name="BSR" mclr="11111111" por="11111111" />
+    <sfr address="0x0010" access="30333311" name="PORTA" mclr="10333333" por="10000000" />
+    <sfr address="0x0011" access="33333333" name="DDRB" mclr="22222222" por="22222222" />
+    <sfr address="0x0012" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0013" access="33330111" name="RCSTA" mclr="11110113" por="11110110" />
+    <sfr address="0x0014" access="11111111" name="RCREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0015" access="33330013" name="TXSTA" mclr="11110023" por="11110020" />
+    <sfr address="0x0016" access="33333333" name="TXREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="33333333" name="SPBRG" mclr="33333333" por="00000000" />
+    <sfr address="0x0110" access="33333333" name="DDRC" mclr="22222222" por="22222222" />
+    <sfr address="0x0111" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0112" access="33333333" name="DDRD" mclr="22222222" por="22222222" />
+    <sfr address="0x0113" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0114" access="00000333" name="DDRE" mclr="00000222" por="00000222" />
+    <sfr address="0x0115" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x0116" access="33333311" name="PIR" mclr="11111121" por="11111121" />
+    <sfr address="0x0117" access="33333333" name="PIE" mclr="11111111" por="11111111" />
+    <sfr address="0x0210" access="33333333" name="TMR1" mclr="33333333" por="00000000" />
+    <sfr address="0x0211" access="33333333" name="TMR2" mclr="33333333" por="00000000" />
+    <combined address="0x0212" size="2" name="TMR3" />
+    <sfr address="0x0212" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0213" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0214" access="33333333" name="PR1" mclr="33333333" por="00000000" />
+    <sfr address="0x0215" access="33333333" name="PR2" mclr="33333333" por="00000000" />
+    <combined address="0x0216" size="2" name="PR3" />
+    <sfr address="0x0216" access="33333333" name="PR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0217" access="33333333" name="PR3H" mclr="33333333" por="00000000" />
+    <combined address="0x0216" size="2" name="CA1" />
+    <sfr address="0x0216" access="11111111" name="CA1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0217" access="11111111" name="CA1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0310" access="33000000" name="PW1DCL" mclr="33000000" por="00000000" />
+    <sfr address="0x0311" access="33300000" name="PW2DCL" mclr="33100000" por="00100000" />
+    <sfr address="0x0312" access="33333333" name="PW1DCH" mclr="33333333" por="00000000" />
+    <sfr address="0x0313" access="33333333" name="PW2DCH" mclr="33333333" por="00000000" />
+    <combined address="0x0314" size="2" name="CA2" />
+    <sfr address="0x0314" access="11111111" name="CA2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0315" access="11111111" name="CA2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0316" access="33333333" name="TCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0317" access="11333333" name="TCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0018" size="2" name="PROD" />
+    <sfr address="0x0018" access="11111111" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0019" access="11111111" name="PRODH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="4" name="17CR43" >
+    <unused end="0x010F" start="0x0100" />
+    <unused end="0x011F" start="0x0118" />
+    <unused end="0x020F" start="0x0200" />
+    <unused end="0x02FF" start="0x0218" />
+    <unused end="0x030F" start="0x0300" />
+    <unused end="0x03FF" start="0x0318" />
+    <sfr address="0x0000" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="FSR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33333333" name="PCLATH" mclr="33333333" por="11111111" />
+    <sfr address="0x0004" access="33333333" name="ALUSTA" mclr="22223333" por="22220000" />
+    <sfr address="0x0005" access="33333330" name="T0STA" mclr="11111110" por="11111110" />
+    <sfr address="0x0006" access="00131100" name="CPUSTA" mclr="00224400" por="00222200" />
+    <sfr address="0x0007" access="13333333" name="INTSTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0008" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0009" access="33333333" name="FSR1" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <combined address="0x000B" size="2" name="TMR0" />
+    <sfr address="0x000B" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x000C" access="33333333" name="TMR0H" mclr="33333333" por="00000000" />
+    <combined address="0x000D" size="2" name="TBLPTR" />
+    <sfr address="0x000D" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x000E" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x000F" access="33333333" name="BSR" mclr="11111111" por="11111111" />
+    <sfr address="0x0010" access="30333311" name="PORTA" mclr="10333333" por="10000000" />
+    <sfr address="0x0011" access="33333333" name="DDRB" mclr="22222222" por="22222222" />
+    <sfr address="0x0012" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0013" access="33330111" name="RCSTA" mclr="11110113" por="11110110" />
+    <sfr address="0x0014" access="11111111" name="RCREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0015" access="33330013" name="TXSTA" mclr="11110023" por="11110020" />
+    <sfr address="0x0016" access="33333333" name="TXREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0017" access="33333333" name="SPBRG" mclr="33333333" por="00000000" />
+    <sfr address="0x0110" access="33333333" name="DDRC" mclr="22222222" por="22222222" />
+    <sfr address="0x0111" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0112" access="33333333" name="DDRD" mclr="22222222" por="22222222" />
+    <sfr address="0x0113" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0114" access="00000333" name="DDRE" mclr="00000222" por="00000222" />
+    <sfr address="0x0115" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x0116" access="33333311" name="PIR" mclr="11111121" por="11111121" />
+    <sfr address="0x0117" access="33333333" name="PIE" mclr="11111111" por="11111111" />
+    <sfr address="0x0210" access="33333333" name="TMR1" mclr="33333333" por="00000000" />
+    <sfr address="0x0211" access="33333333" name="TMR2" mclr="33333333" por="00000000" />
+    <combined address="0x0212" size="2" name="TMR3" />
+    <sfr address="0x0212" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0213" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0214" access="33333333" name="PR1" mclr="33333333" por="00000000" />
+    <sfr address="0x0215" access="33333333" name="PR2" mclr="33333333" por="00000000" />
+    <combined address="0x0216" size="2" name="PR3" />
+    <sfr address="0x0216" access="33333333" name="PR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0217" access="33333333" name="PR3H" mclr="33333333" por="00000000" />
+    <combined address="0x0216" size="2" name="CA1" />
+    <sfr address="0x0216" access="11111111" name="CA1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0217" access="11111111" name="CA1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0310" access="33000000" name="PW1DCL" mclr="33000000" por="00000000" />
+    <sfr address="0x0311" access="33300000" name="PW2DCL" mclr="33100000" por="00100000" />
+    <sfr address="0x0312" access="33333333" name="PW1DCH" mclr="33333333" por="00000000" />
+    <sfr address="0x0313" access="33333333" name="PW2DCH" mclr="33333333" por="00000000" />
+    <combined address="0x0314" size="2" name="CA2" />
+    <sfr address="0x0314" access="11111111" name="CA2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0315" access="11111111" name="CA2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0316" access="33333333" name="TCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0317" access="11333333" name="TCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0018" size="2" name="PROD" />
+    <sfr address="0x0018" access="11111111" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0019" access="11111111" name="PRODH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18C242" unused_bank_mask="0x7FFC" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F83" />
+    <unused end="0x0F91" start="0x0F8C" />
+    <unused end="0x0F9C" start="0x0F95" />
+    <unused end="0x0FAA" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB4" />
+    <unused end="0x0FC0" start="0x0FC0" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00000003" name="OSCCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="11024433" por="11022211" />
+    <sfr address="0x0FA2" access="00003333" name="IPR2" mclr="00002222" por="00002222" />
+    <sfr address="0x0FA1" access="00003333" name="PIR2" mclr="00001111" por="00001111" />
+    <sfr address="0x0FA0" access="00003333" name="PIE2" mclr="00001111" por="00001111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0FC1" access="33003333" name="ADCON1" mclr="11001111" por="11001111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30333333" name="T1CON" mclr="30333333" por="10111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18C252" unused_bank_mask="0x7FC0" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F83" />
+    <unused end="0x0F91" start="0x0F8C" />
+    <unused end="0x0F9C" start="0x0F95" />
+    <unused end="0x0FAA" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB4" />
+    <unused end="0x0FC0" start="0x0FC0" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00000003" name="OSCCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="11024433" por="11022211" />
+    <sfr address="0x0FA2" access="00003333" name="IPR2" mclr="00002222" por="00002222" />
+    <sfr address="0x0FA1" access="00003333" name="PIR2" mclr="00001111" por="00001111" />
+    <sfr address="0x0FA0" access="00003333" name="PIE2" mclr="00001111" por="00001111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0FC1" access="33003333" name="ADCON1" mclr="11001111" por="11001111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30333333" name="T1CON" mclr="30333333" por="10111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18C442" unused_bank_mask="0x7FFC" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9C" start="0x0F97" />
+    <unused end="0x0FAA" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB4" />
+    <unused end="0x0FC0" start="0x0FC0" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00000003" name="OSCCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="11024433" por="11022211" />
+    <sfr address="0x0FA2" access="00003333" name="IPR2" mclr="00002222" por="00002222" />
+    <sfr address="0x0FA1" access="00003333" name="PIR2" mclr="00001111" por="00001111" />
+    <sfr address="0x0FA0" access="00003333" name="PIE2" mclr="00001111" por="00001111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00000333" name="PORTE" mclr="00000111" por="00000111" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="11330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0FC1" access="33003333" name="ADCON1" mclr="11001111" por="11001111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30333333" name="T1CON" mclr="30333333" por="10111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18C452" unused_bank_mask="0x7FC0" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9C" start="0x0F97" />
+    <unused end="0x0FAA" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB4" />
+    <unused end="0x0FC0" start="0x0FC0" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00000003" name="OSCCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="11024433" por="11022211" />
+    <sfr address="0x0FA2" access="00003333" name="IPR2" mclr="00002222" por="00002222" />
+    <sfr address="0x0FA1" access="00003333" name="PIR2" mclr="00001111" por="00001111" />
+    <sfr address="0x0FA0" access="00003333" name="PIE2" mclr="00001111" por="00001111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00000333" name="PORTE" mclr="00000111" por="00000111" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="11330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0FC1" access="33003333" name="ADCON1" mclr="11001111" por="11001111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30333333" name="T1CON" mclr="30333333" por="10111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18C601" unused_bank_mask="0x7FC0" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0F9B" start="0x0F99" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FA8" />
+    <unused end="0x0FB5" start="0x0FB4" />
+    <unused end="0x0FB9" start="0x0FB6" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00003333" name="OSCCON" mclr="00003331" por="00001111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00003333" name="WDTCON" mclr="00000000" por="00001111" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10044433" por="10022211" />
+    <sfr address="0x0FA7" access="33333333" name="CSEL2" mclr="33333333" por="22222222" />
+    <sfr address="0x0FA6" access="33333333" name="CSELIO" mclr="33333333" por="22222222" />
+    <sfr address="0x0FA2" access="00003333" name="IPR2" mclr="00002222" por="00002222" />
+    <sfr address="0x0FA1" access="00003333" name="PIR2" mclr="00001111" por="00001111" />
+    <sfr address="0x0FA0" access="00003333" name="PIE2" mclr="00001111" por="00001111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9C" access="33330033" name="MEMCON" mclr="11110011" por="11110011" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="31111111" por="01111111" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00033333" name="PORTG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30000333" name="ADCON2" mclr="10000111" por="10000111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30333333" name="T1CON" mclr="30333333" por="10111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB0" access="00000022" name="PSPCON" mclr="00000011" por="00000011" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18C658" unused_bank_mask="0x7FC0" >
+    <unused end="0x0F2F" start="0x0F2F" />
+    <unused end="0x0F3F" start="0x0F3F" />
+    <unused end="0x0F4F" start="0x0F4F" />
+    <unused end="0x0F5F" start="0x0F5F" />
+    <unused end="0x0F7F" start="0x0F77" />
+    <unused end="0x0F9B" start="0x0F9B" />
+    <unused end="0x0FAA" start="0x0FA6" />
+    <unused end="0x0FB9" start="0x0FB6" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0F9A" start="0x0F99" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00000003" name="OSCCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="11044433" por="11022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33333333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="03003333" name="IPR2" mclr="02002222" por="02002222" />
+    <sfr address="0x0FA1" access="03003333" name="PIR2" mclr="01001111" por="01001111" />
+    <sfr address="0x0FA0" access="03003333" name="PIE2" mclr="01001111" por="01001111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="31111111" por="01111111" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00033333" name="PORTG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30000333" name="ADCON2" mclr="10000111" por="10000111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30333333" name="T1CON" mclr="30333333" por="10111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0F76" access="11111111" name="TXERRCNT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F75" access="11111111" name="RXERRCNT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F74" access="55111111" name="COMSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F73" access="33330000" name="CIOCON" mclr="21110000" por="21110000" />
+    <sfr address="0x0F72" access="03000333" name="BRGCON3" mclr="01000111" por="01000111" />
+    <sfr address="0x0F71" access="33333333" name="BRGCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F70" access="33333333" name="BRGCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333330" name="CANCON" mclr="33333330" por="00000000" />
+    <sfr address="0x0F6E" access="11101110" name="CANSTAT" mclr="33333330" por="00000000" />
+    <sfr address="0x0F6D" access="33333333" name="RXB0D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6C" access="33333333" name="RXB0D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6B" access="33333333" name="RXB0D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6A" access="33333333" name="RXB0D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0F69" access="33333333" name="RXB0D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0F68" access="33333333" name="RXB0D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="RXB0D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0F66" access="33333333" name="RXB0D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="03333333" name="RXB0DLC" mclr="13333333" por="10000000" />
+    <sfr address="0x0F64" access="33333333" name="RXB0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F63" access="33333333" name="RXB0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F62" access="33333033" name="RXB0SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0F61" access="33333333" name="RXB0SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F60" access="53301313" name="RXB0CON" mclr="11101111" por="11101111" />
+    <sfr address="0x0F5E" access="11101110" name="CANSTATRO0" mclr="33303330" por="00000000" />
+    <sfr address="0x0F5D" access="33333333" name="RXB1D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F5C" access="33333333" name="RXB1D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F5B" access="33333333" name="RXB1D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0F5A" access="33333333" name="RXB1D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0F59" access="33333333" name="RXB1D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0F58" access="33333333" name="RXB1D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0F57" access="33333333" name="RXB1D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0F56" access="33333333" name="RXB1D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0F55" access="03333333" name="RXB1DLC" mclr="13333333" por="10000000" />
+    <sfr address="0x0F54" access="33333333" name="RXB1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F53" access="33333333" name="RXB1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F52" access="33333033" name="RXB1SIDL" mclr="33333133" por="00000100" />
+    <sfr address="0x0F51" access="33333333" name="RXB1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F50" access="53301111" name="RXB1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F4E" access="11101110" name="CANSTATRO1" mclr="33303330" por="00000000" />
+    <sfr address="0x0F4D" access="33333333" name="TXB0D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F4C" access="33333333" name="TXB0D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F4B" access="33333333" name="TXB0D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0F4A" access="33333333" name="TXB0D4" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F48" access="33333333" name="TXB0D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0F47" access="33333333" name="TXB0D1" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F45" access="03003333" name="TXB0DLC" mclr="13113333" por="10110000" />
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+    <sfr address="0x0F42" access="33333333" name="TXB0SIDL" mclr="33313133" por="00010100" />
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+    <sfr address="0x0F40" access="01113033" name="TXB0CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F3E" access="11101110" name="CANSTATRO2" mclr="33303330" por="00000000" />
+    <sfr address="0x0F3D" access="33333333" name="TXB1D7" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F3A" access="33333333" name="TXB1D4" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F38" access="33333333" name="TXB1D2" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F34" access="33333333" name="TXB1EIDL" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F32" access="33333333" name="TXB1SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F31" access="33333333" name="TXB1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F30" access="01113033" name="TXB1CON" mclr="03333033" por="01111011" />
+    <sfr address="0x0F2E" access="11101110" name="CANSTATRO3" mclr="33303330" por="00000000" />
+    <sfr address="0x0F2D" access="33333333" name="TXB2D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F2C" access="33333333" name="TXB2D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F2B" access="33333333" name="TXB2D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0F2A" access="33333333" name="TXB2D4" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F1F" access="33333333" name="RXM1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F1E" access="33333333" name="RXM1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F1D" access="33300033" name="RXM1SIDL" mclr="33300033" por="00000000" />
+    <sfr address="0x0F1C" access="33333333" name="RXM1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F1B" access="33333333" name="RXM0EIDL" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F19" access="33300033" name="RXM0SIDL" mclr="33300033" por="00000000" />
+    <sfr address="0x0F18" access="33333333" name="RXM0SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F17" access="33333333" name="RXF5EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F16" access="33333333" name="RXF5EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F15" access="33303033" name="RXF5SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F14" access="33333333" name="RXF5SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F13" access="33333333" name="RXF4EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F12" access="33333333" name="RXF4EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F11" access="33303033" name="RXF4SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F10" access="33333333" name="RXF4SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0F" access="33333333" name="RXF3EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0E" access="33333333" name="RXF3EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0D" access="33303033" name="RXF3SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F0C" access="33333333" name="RXF3SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0B" access="33333333" name="RXF2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0A" access="33333333" name="RXF2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F09" access="33303033" name="RXF2SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F08" access="33333333" name="RXF2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F07" access="33333333" name="RXF1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F06" access="33333333" name="RXF1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F05" access="33303033" name="RXF1SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F04" access="33333333" name="RXF1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F03" access="33333333" name="RXF0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F02" access="33333333" name="RXF0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F01" access="33303033" name="RXF0SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F00" access="33333333" name="RXF0SIDH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18C801" unused_bank_mask="0x7FC0" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F9B" start="0x0F9B" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FA8" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
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+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
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+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00003333" name="OSCCON" mclr="00003331" por="00001111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00003333" name="WDTCON" mclr="00000000" por="00001111" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10044433" por="10022211" />
+    <sfr address="0x0FA7" access="33333333" name="CSEL2" mclr="33333333" por="22222222" />
+    <sfr address="0x0FA6" access="33333333" name="CSELIO" mclr="33333333" por="22222222" />
+    <sfr address="0x0FA2" access="00003333" name="IPR2" mclr="00002222" por="00002222" />
+    <sfr address="0x0FA1" access="00003333" name="PIR2" mclr="00001111" por="00001111" />
+    <sfr address="0x0FA0" access="00003333" name="PIE2" mclr="00001111" por="00001111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9C" access="33330033" name="MEMCON" mclr="11110011" por="11110011" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="31111111" por="01111111" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00033333" name="PORTG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="11113333" por="11110000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30000333" name="ADCON2" mclr="10000111" por="10000111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30333333" name="T1CON" mclr="30333333" por="10111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB0" access="00000022" name="PSPCON" mclr="00000011" por="00000011" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18C858" unused_bank_mask="0x7FC0" >
+    <unused end="0x0F2F" start="0x0F2F" />
+    <unused end="0x0F3F" start="0x0F3F" />
+    <unused end="0x0F4F" start="0x0F4F" />
+    <unused end="0x0F5F" start="0x0F5F" />
+    <unused end="0x0F7C" start="0x0F77" />
+    <unused end="0x0F9B" start="0x0F9B" />
+    <unused end="0x0FAA" start="0x0FA6" />
+    <unused end="0x0FB9" start="0x0FB6" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00000003" name="OSCCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="11044433" por="11022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33333333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="03003333" name="IPR2" mclr="02002222" por="02002222" />
+    <sfr address="0x0FA1" access="03003333" name="PIR2" mclr="01001111" por="01001111" />
+    <sfr address="0x0FA0" access="03003333" name="PIE2" mclr="01001111" por="01001111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="31111111" por="01111111" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00033333" name="PORTG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="11113333" por="11110000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7D" access="33333333" name="PORTK" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7F" access="33333333" name="TRISK" mclr="22222222" por="22222222" />
+    <sfr address="0x0F7E" access="33333333" name="LATK" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30000333" name="ADCON2" mclr="10000111" por="10000111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30333333" name="T1CON" mclr="30333333" por="10111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0F76" access="11111111" name="TXERRCNT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F75" access="11111111" name="RXERRCNT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F74" access="55111111" name="COMSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F73" access="33330000" name="CIOCON" mclr="21110000" por="21110000" />
+    <sfr address="0x0F72" access="03000333" name="BRGCON3" mclr="01000111" por="01000111" />
+    <sfr address="0x0F71" access="33333333" name="BRGCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F70" access="33333333" name="BRGCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333330" name="CANCON" mclr="33333330" por="00000000" />
+    <sfr address="0x0F6E" access="11101110" name="CANSTAT" mclr="33333330" por="00000000" />
+    <sfr address="0x0F6D" access="33333333" name="RXB0D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6C" access="33333333" name="RXB0D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6B" access="33333333" name="RXB0D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6A" access="33333333" name="RXB0D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0F69" access="33333333" name="RXB0D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0F68" access="33333333" name="RXB0D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="RXB0D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0F66" access="33333333" name="RXB0D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="03333333" name="RXB0DLC" mclr="13333333" por="10000000" />
+    <sfr address="0x0F64" access="33333333" name="RXB0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F63" access="33333333" name="RXB0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F62" access="33333033" name="RXB0SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0F61" access="33333333" name="RXB0SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F60" access="53301313" name="RXB0CON" mclr="11101111" por="11101111" />
+    <sfr address="0x0F5E" access="11101110" name="CANSTATRO0" mclr="33303330" por="00000000" />
+    <sfr address="0x0F5D" access="33333333" name="RXB1D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F5C" access="33333333" name="RXB1D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F5B" access="33333333" name="RXB1D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0F5A" access="33333333" name="RXB1D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0F59" access="33333333" name="RXB1D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0F58" access="33333333" name="RXB1D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0F57" access="33333333" name="RXB1D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0F56" access="33333333" name="RXB1D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0F55" access="03333333" name="RXB1DLC" mclr="13333333" por="10000000" />
+    <sfr address="0x0F54" access="33333333" name="RXB1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F53" access="33333333" name="RXB1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F52" access="33333033" name="RXB1SIDL" mclr="33333133" por="00000100" />
+    <sfr address="0x0F51" access="33333333" name="RXB1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F50" access="53301111" name="RXB1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F4E" access="11101110" name="CANSTATRO1" mclr="33303330" por="00000000" />
+    <sfr address="0x0F4D" access="33333333" name="TXB0D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F4C" access="33333333" name="TXB0D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F4B" access="33333333" name="TXB0D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0F4A" access="33333333" name="TXB0D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0F49" access="33333333" name="TXB0D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0F48" access="33333333" name="TXB0D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0F47" access="33333333" name="TXB0D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0F46" access="33333333" name="TXB0D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0F45" access="03003333" name="TXB0DLC" mclr="13113333" por="10110000" />
+    <sfr address="0x0F44" access="33333333" name="TXB0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F43" access="33333333" name="TXB0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F42" access="33333333" name="TXB0SIDL" mclr="33313133" por="00010100" />
+    <sfr address="0x0F41" access="33333333" name="TXB0SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F40" access="01113033" name="TXB0CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F3E" access="11101110" name="CANSTATRO2" mclr="33303330" por="00000000" />
+    <sfr address="0x0F3D" access="33333333" name="TXB1D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F3C" access="33333333" name="TXB1D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F3B" access="33333333" name="TXB1D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0F3A" access="33333333" name="TXB1D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0F39" access="33333333" name="TXB1D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0F38" access="33333333" name="TXB1D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0F37" access="33333333" name="TXB1D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0F36" access="33333333" name="TXB1D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0F35" access="03003333" name="TXB1DLC" mclr="03003333" por="00000000" />
+    <sfr address="0x0F34" access="33333333" name="TXB1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F33" access="33333333" name="TXB1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F32" access="33333333" name="TXB1SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F31" access="33333333" name="TXB1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F30" access="01113033" name="TXB1CON" mclr="03333033" por="01111011" />
+    <sfr address="0x0F2E" access="11101110" name="CANSTATRO3" mclr="33303330" por="00000000" />
+    <sfr address="0x0F2D" access="33333333" name="TXB2D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F2C" access="33333333" name="TXB2D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F2B" access="33333333" name="TXB2D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0F2A" access="33333333" name="TXB2D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0F29" access="33333333" name="TXB2D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0F28" access="33333333" name="TXB2D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0F27" access="33333333" name="TXB2D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0F26" access="33333333" name="TXB2D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0F25" access="03003333" name="TXB2DLC" mclr="03003333" por="00000000" />
+    <sfr address="0x0F24" access="33333333" name="TXB2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F23" access="33333333" name="TXB2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F22" access="33333333" name="TXB2SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F21" access="33333333" name="TXB2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F20" access="01113033" name="TXB2CON" mclr="01111011" por="01111011" />
+    <sfr address="0x0F1F" access="33333333" name="RXM1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F1E" access="33333333" name="RXM1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F1D" access="33300033" name="RXM1SIDL" mclr="33300033" por="00000000" />
+    <sfr address="0x0F1C" access="33333333" name="RXM1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F1B" access="33333333" name="RXM0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F1A" access="33333333" name="RXM0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F19" access="33300033" name="RXM0SIDL" mclr="33300033" por="00000000" />
+    <sfr address="0x0F18" access="33333333" name="RXM0SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F17" access="33333333" name="RXF5EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F16" access="33333333" name="RXF5EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F15" access="33303033" name="RXF5SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F14" access="33333333" name="RXF5SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F13" access="33333333" name="RXF4EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F12" access="33333333" name="RXF4EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F11" access="33303033" name="RXF4SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F10" access="33333333" name="RXF4SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0F" access="33333333" name="RXF3EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0E" access="33333333" name="RXF3EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0D" access="33303033" name="RXF3SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F0C" access="33333333" name="RXF3SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0B" access="33333333" name="RXF2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0A" access="33333333" name="RXF2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F09" access="33303033" name="RXF2SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F08" access="33333333" name="RXF2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F07" access="33333333" name="RXF1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F06" access="33333333" name="RXF1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F05" access="33303033" name="RXF1SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F04" access="33333333" name="RXF1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F03" access="33333333" name="RXF0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F02" access="33333333" name="RXF0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F01" access="33303033" name="RXF0SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F00" access="33333333" name="RXF0SIDH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F1220" unused_bank_mask="0x7FFE" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F82" />
+    <unused end="0x0F91" start="0x0F8B" />
+    <unused end="0x0F9A" start="0x0F94" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FB5" start="0x0FB4" />
+    <unused end="0x0FBC" start="0x0FB8" />
+    <unused end="0x0FC9" start="0x0FC5" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="11111141" por="11114111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA2" access="30030330" name="IPR2" mclr="20020220" por="20020220" />
+    <sfr address="0x0FA1" access="30030330" name="PIR2" mclr="10010110" por="10010110" />
+    <sfr address="0x0FA0" access="30030330" name="PIE2" mclr="10010110" por="10010110" />
+    <sfr address="0x0F9F" access="03330333" name="IPR1" mclr="02220222" por="02220222" />
+    <sfr address="0x0F9E" access="03110333" name="PIR1" mclr="01110111" por="01110111" />
+    <sfr address="0x0F9D" access="03330333" name="PIE1" mclr="01110111" por="01110111" />
+    <sfr address="0x0F9B" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0F80" access="33133333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33033333" name="LATA" mclr="33033333" por="00000000" />
+    <sfr address="0x0F92" access="33033333" name="TRISA" mclr="22022222" por="22022222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33033333" name="ADCON0" mclr="11011111" por="11011111" />
+    <sfr address="0x0FC1" access="03333333" name="ADCON1" mclr="01111111" por="01111111" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCPAS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0FAA" access="01033033" name="BAUDCTL" mclr="02021011" por="02021011" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F1230" unused_bank_mask="0x7FFE" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0FBF" start="0x0FBA" />
+    <unused end="0x0FCC" start="0x0FC5" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="12114111" por="12114111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FB8" access="33033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB5" access="30333333" name="CVRCON" mclr="20222222" por="20222222" />
+    <sfr address="0x0FB4" access="33300333" name="CMCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA5" access="00030000" name="IPR3" mclr="00020000" por="00020000" />
+    <sfr address="0x0FA4" access="00030000" name="PIR3" mclr="00010000" por="00010000" />
+    <sfr address="0x0FA3" access="00030000" name="PIE3" mclr="00010000" por="00010000" />
+    <sfr address="0x0FA2" access="30030300" name="IPR2" mclr="20020200" por="20020200" />
+    <sfr address="0x0FA1" access="30030330" name="PIR2" mclr="10010110" por="10010110" />
+    <sfr address="0x0FA0" access="30030330" name="PIE2" mclr="10010110" por="10010110" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="12222222" por="12222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9A" access="33333333" name="PTCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0F99" access="33000000" name="PTCON1" mclr="11000000" por="11000000" />
+    <sfr address="0x0F98" access="33333333" name="PTMRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F97" access="00003333" name="PTMRH" mclr="00001111" por="00001111" />
+    <sfr address="0x0F96" access="33333333" name="PTPERL" mclr="22222222" por="22222222" />
+    <sfr address="0x0F95" access="00003333" name="PTPERH" mclr="00002222" por="00002222" />
+    <sfr address="0x0F91" access="33333333" name="PDC0L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F90" access="00333333" name="PDC0H" mclr="00111111" por="00111111" />
+    <sfr address="0x0F8F" access="33333333" name="PDC1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F8E" access="00333333" name="PDC1H" mclr="00111111" por="00111111" />
+    <sfr address="0x0F8D" access="33333333" name="PDC2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F8C" access="00333333" name="PDC2H" mclr="00111111" por="00111111" />
+    <sfr address="0x0F8B" access="30000333" name="FLTCONFIG" mclr="10000111" por="10000111" />
+    <sfr address="0x0F88" access="33333333" name="SEVTCMPL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F87" access="00003333" name="SEVTCMPH" mclr="00001111" por="00001111" />
+    <sfr address="0x0F86" access="03330333" name="PWMCON0" mclr="02110111" por="02110111" />
+    <sfr address="0x0F85" access="33333033" name="PWMCON1" mclr="11111011" por="11111011" />
+    <sfr address="0x0F84" access="33333333" name="DTCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F83" access="00333333" name="OVDCOND" mclr="00222222" por="00222222" />
+    <sfr address="0x0F82" access="00333333" name="OVDCONS" mclr="00111111" por="00111111" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33133333" name="PORTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0F89" access="33033333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33033333" name="TRISA" mclr="22022222" por="22022222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="30003333" name="ADCON0" mclr="10001111" por="10001111" />
+    <sfr address="0x0FC1" access="00033333" name="ADCON1" mclr="11112222" por="11112222" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F1320" unused_bank_mask="0x7FFE" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F82" />
+    <unused end="0x0F91" start="0x0F8B" />
+    <unused end="0x0F9A" start="0x0F94" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FB5" start="0x0FB4" />
+    <unused end="0x0FBC" start="0x0FB8" />
+    <unused end="0x0FC9" start="0x0FC5" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="11111141" por="11114111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA2" access="30030330" name="IPR2" mclr="20020220" por="20020220" />
+    <sfr address="0x0FA1" access="30030330" name="PIR2" mclr="10010110" por="10010110" />
+    <sfr address="0x0FA0" access="30030330" name="PIE2" mclr="10010110" por="10010110" />
+    <sfr address="0x0F9F" access="03330333" name="IPR1" mclr="02220222" por="02220222" />
+    <sfr address="0x0F9E" access="03110333" name="PIR1" mclr="01110111" por="01110111" />
+    <sfr address="0x0F9D" access="03330333" name="PIE1" mclr="01110111" por="01110111" />
+    <sfr address="0x0F9B" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0F80" access="33133333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33033333" name="LATA" mclr="33033333" por="00000000" />
+    <sfr address="0x0F92" access="33033333" name="TRISA" mclr="22022222" por="22022222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33033333" name="ADCON0" mclr="11011111" por="11011111" />
+    <sfr address="0x0FC1" access="03333333" name="ADCON1" mclr="01111111" por="01111111" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCPAS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0FAA" access="01033033" name="BAUDCTL" mclr="02021011" por="02021011" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F1330" unused_bank_mask="0x7FFE" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0FBF" start="0x0FBA" />
+    <unused end="0x0FCC" start="0x0FC5" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="12114111" por="12114111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FB8" access="33033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB5" access="30333333" name="CVRCON" mclr="20222222" por="20222222" />
+    <sfr address="0x0FB4" access="33300333" name="CMCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA5" access="00030000" name="IPR3" mclr="00020000" por="00020000" />
+    <sfr address="0x0FA4" access="00030000" name="PIR3" mclr="00010000" por="00010000" />
+    <sfr address="0x0FA3" access="00030000" name="PIE3" mclr="00010000" por="00010000" />
+    <sfr address="0x0FA2" access="30030300" name="IPR2" mclr="20020200" por="20020200" />
+    <sfr address="0x0FA1" access="30030330" name="PIR2" mclr="10010110" por="10010110" />
+    <sfr address="0x0FA0" access="30030330" name="PIE2" mclr="10010110" por="10010110" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="12222222" por="12222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9A" access="33333333" name="PTCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0F99" access="33000000" name="PTCON1" mclr="11000000" por="11000000" />
+    <sfr address="0x0F98" access="33333333" name="PTMRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F97" access="00003333" name="PTMRH" mclr="00001111" por="00001111" />
+    <sfr address="0x0F96" access="33333333" name="PTPERL" mclr="22222222" por="22222222" />
+    <sfr address="0x0F95" access="00003333" name="PTPERH" mclr="00002222" por="00002222" />
+    <sfr address="0x0F91" access="33333333" name="PDC0L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F90" access="00333333" name="PDC0H" mclr="00111111" por="00111111" />
+    <sfr address="0x0F8F" access="33333333" name="PDC1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F8E" access="00333333" name="PDC1H" mclr="00111111" por="00111111" />
+    <sfr address="0x0F8D" access="33333333" name="PDC2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F8C" access="00333333" name="PDC2H" mclr="00111111" por="00111111" />
+    <sfr address="0x0F8B" access="30000333" name="FLTCONFIG" mclr="10000111" por="10000111" />
+    <sfr address="0x0F88" access="33333333" name="SEVTCMPL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F87" access="00003333" name="SEVTCMPH" mclr="00001111" por="00001111" />
+    <sfr address="0x0F86" access="03330333" name="PWMCON0" mclr="02110111" por="02110111" />
+    <sfr address="0x0F85" access="33333033" name="PWMCON1" mclr="11111011" por="11111011" />
+    <sfr address="0x0F84" access="33333333" name="DTCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F83" access="00333333" name="OVDCOND" mclr="00222222" por="00222222" />
+    <sfr address="0x0F82" access="00333333" name="OVDCONS" mclr="00111111" por="00111111" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33133333" name="PORTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0F89" access="33033333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33033333" name="TRISA" mclr="22022222" por="22022222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="30003333" name="ADCON0" mclr="10001111" por="10001111" />
+    <sfr address="0x0FC1" access="00033333" name="ADCON1" mclr="11112222" por="11112222" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F2220" unused_bank_mask="0x7FFC" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F83" start="0x0F83" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8C" />
+    <unused end="0x0F9A" start="0x0F95" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB6" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="11111141" por="11114111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9B" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33303333" name="CVRCON" mclr="11101111" por="11101111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F2221" unused_bank_mask="0x7FFC" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="11111141" por="11114111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9B" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FB6" access="33333300" name="ECCPAS1" mclr="11111100" por="11111100" />
+    <sfr address="0x0FB7" access="30000000" name="ECCP1DEL" mclr="10000000" por="10000000" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33303333" name="CVRCON" mclr="11101111" por="11101111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0FB8" access="31333033" name="BAUDCON" mclr="12111011" por="12111011" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F2320" unused_bank_mask="0x7FFC" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F83" start="0x0F83" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8C" />
+    <unused end="0x0F9A" start="0x0F95" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB6" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="11111141" por="11114111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9B" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33303333" name="CVRCON" mclr="11101111" por="11101111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F2321" unused_bank_mask="0x7FFC" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="11111141" por="11114111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9B" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FB6" access="33333300" name="ECCPAS1" mclr="11111100" por="11111100" />
+    <sfr address="0x0FB7" access="30000000" name="ECCP1DEL" mclr="10000000" por="10000000" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33303333" name="CVRCON" mclr="11101111" por="11101111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0FB8" access="31333033" name="BAUDCON" mclr="12111011" por="12111011" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F2331" unused_bank_mask="0x7FF8" >
+    <unused end="0x0F5F" start="0x0F00" />
+    <unused end="0x0F86" start="0x0F84" />
+    <unused end="0x0F8F" start="0x0F8E" />
+    <unused end="0x0F98" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FB5" start="0x0FB1" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FC5" start="0x0FC5" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="11111113" name="WDTCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10044433" por="10022244" />
+    <sfr address="0x0FA5" access="00033333" name="IPR3" mclr="00022222" por="00022222" />
+    <sfr address="0x0FA4" access="00033333" name="PIR3" mclr="00011111" por="00011111" />
+    <sfr address="0x0FA3" access="00033333" name="PIE3" mclr="00011111" por="00011111" />
+    <sfr address="0x0FA2" access="30030303" name="IPR2" mclr="20020202" por="20020202" />
+    <sfr address="0x0FA1" access="30030303" name="PIR2" mclr="10010101" por="10010101" />
+    <sfr address="0x0FA0" access="30030303" name="PIE2" mclr="10010101" por="10010101" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9B" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33111111" por="00111111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="33031111" name="ADCON1" mclr="11011111" por="11011111" />
+    <sfr address="0x0FC0" access="33333333" name="ADCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9A" access="33033333" name="ADCON3" mclr="11011111" por="11011111" />
+    <sfr address="0x0F99" access="33333333" name="ADCHS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB8" access="00033333" name="ANSEL0" mclr="00022222" por="00022222" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="33331133" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB7" access="33333333" name="T5CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F90" size="2" name="PR5" />
+    <sfr address="0x0F91" access="33333333" name="PR5H" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="PR5L" mclr="22222222" por="22222222" />
+    <combined address="0x0F87" size="2" name="TMR5" />
+    <sfr address="0x0F88" access="33333333" name="TMR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="TMR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0FAA" access="01033033" name="BAUDCTL" mclr="02021011" por="02021011" />
+    <sfr address="0x0F7F" access="33333333" name="PTCON0" mclr="33333333" por="11111111" />
+    <sfr address="0x0F7E" access="31000000" name="PTCON1" mclr="11000000" por="11000000" />
+    <sfr address="0x0F7D" access="33333333" name="PTMRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F7C" access="00003333" name="PTMRH" mclr="00001111" por="00001111" />
+    <sfr address="0x0F7B" access="33333333" name="PTPERL" mclr="22222222" por="22222222" />
+    <sfr address="0x0F7A" access="00003333" name="PTPERH" mclr="00002222" por="00002222" />
+    <sfr address="0x0F79" access="33333333" name="PDC0L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F78" access="00333333" name="PDC0H" mclr="00111111" por="00111111" />
+    <sfr address="0x0F77" access="33333333" name="PDC1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F76" access="00333333" name="PDC1H" mclr="00111111" por="00111111" />
+    <sfr address="0x0F75" access="33333333" name="PDC2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F74" access="00333333" name="PDC2H" mclr="00111111" por="00111111" />
+    <sfr address="0x0F73" access="33333333" name="PDC3L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F72" access="00333333" name="PDC3H" mclr="00111111" por="00111111" />
+    <sfr address="0x0F71" access="33333333" name="SEVTCMPL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F70" access="00003333" name="SEVTCMPH" mclr="00001111" por="00001111" />
+    <sfr address="0x0F6F" access="03333333" name="PWMCON0" mclr="02121111" por="02121111" />
+    <sfr address="0x0F6E" access="33333033" name="PWMCON1" mclr="11111011" por="11111011" />
+    <sfr address="0x0F6D" access="33333333" name="DTCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="03333333" name="FLTCONFIG" mclr="01111111" por="01111111" />
+    <sfr address="0x0F6B" access="33333333" name="OVDCOND" mclr="22222222" por="22222222" />
+    <sfr address="0x0F6A" access="33333333" name="OVDCONS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="03303333" name="CAP1CON" mclr="02101111" por="02101111" />
+    <sfr address="0x0F62" access="03303333" name="CAP2CON" mclr="02101111" por="02101111" />
+    <sfr address="0x0F61" access="03303333" name="CAP3CON" mclr="02101111" por="02101111" />
+    <sfr address="0x0FB6" access="30333333" name="QEICON" mclr="10111111" por="10111111" />
+    <sfr address="0x0F60" access="03333333" name="DFLTCON" mclr="01111111" por="01111111" />
+    <sfr address="0x0F69" access="33333333" name="CAP1BUFH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F69" access="33333333" name="VELRH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F68" access="33333333" name="CAP1BUFL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F68" access="33333333" name="VELRL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="CAP2BUFH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="POSCNTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F66" access="33333333" name="CAP2BUFL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F66" access="33333333" name="POSCNTL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="CAP3BUFH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="MAXCNTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F64" access="33333333" name="CAP3BUFL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F64" access="33333333" name="MAXCNTL" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F2410" unused_bank_mask="0x7FF8" >
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="01110100" por="01110100" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001000" name="PORTE" mclr="00000000" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FB6" access="33333300" name="ECCP1AS" mclr="11111100" por="11111100" />
+    <sfr address="0x0FB7" access="30000000" name="PWM1CON" mclr="10000000" por="10000000" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F242" unused_bank_mask="0x7FF8" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F83" />
+    <unused end="0x0F91" start="0x0F8C" />
+    <unused end="0x0F9C" start="0x0F95" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB4" />
+    <unused end="0x0FC0" start="0x0FC0" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00000003" name="OSCCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10044433" por="10042211" />
+    <sfr address="0x0FA2" access="00033333" name="IPR2" mclr="00022222" por="00022222" />
+    <sfr address="0x0FA1" access="00033333" name="PIR2" mclr="00011111" por="00011111" />
+    <sfr address="0x0FA0" access="00033333" name="PIE2" mclr="00011111" por="00011111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0FC1" access="33003333" name="ADCON1" mclr="11001111" por="11001111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30333333" name="T1CON" mclr="30333333" por="10111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F2420" unused_bank_mask="0x7FF8" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0FD3" access="33330100" name="OSCCON" mclr="11110100" por="12110100" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001000" name="PORTE" mclr="00000000" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FB6" access="33333300" name="ECCP1AS" mclr="11111100" por="11111100" />
+    <sfr address="0x0FB7" access="30000000" name="PWM1CON" mclr="10000000" por="10000000" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F2423" unused_bank_mask="0x7FF8" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="03330303" name="INTCON2" mclr="02220202" por="02220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="01110100" por="01110100" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001000" name="PORTE" mclr="00000000" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FB6" access="33333300" name="ECCP1AS" mclr="11111100" por="11111100" />
+    <sfr address="0x0FB7" access="30000000" name="PWM1CON" mclr="10000000" por="10000000" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F2431" unused_bank_mask="0x7FF8" >
+    <unused end="0x0F5F" start="0x0F00" />
+    <unused end="0x0F86" start="0x0F84" />
+    <unused end="0x0F8F" start="0x0F8E" />
+    <unused end="0x0F98" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FB5" start="0x0FB1" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FC5" start="0x0FC5" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="11111113" name="WDTCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10044433" por="10022244" />
+    <sfr address="0x0FA5" access="00033333" name="IPR3" mclr="00022222" por="00022222" />
+    <sfr address="0x0FA4" access="00033333" name="PIR3" mclr="00011111" por="00011111" />
+    <sfr address="0x0FA3" access="00033333" name="PIE3" mclr="00011111" por="00011111" />
+    <sfr address="0x0FA2" access="30030303" name="IPR2" mclr="20020202" por="20020202" />
+    <sfr address="0x0FA1" access="30030303" name="PIR2" mclr="10010101" por="10010101" />
+    <sfr address="0x0FA0" access="30030303" name="PIE2" mclr="10010101" por="10010101" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9B" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33111111" por="00111111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="33031111" name="ADCON1" mclr="11011111" por="11011111" />
+    <sfr address="0x0FC0" access="33333333" name="ADCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9A" access="33033333" name="ADCON3" mclr="11011111" por="11011111" />
+    <sfr address="0x0F99" access="33333333" name="ADCHS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB8" access="00033333" name="ANSEL0" mclr="00022222" por="00022222" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="33331133" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB7" access="33333333" name="T5CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F90" size="2" name="PR5" />
+    <sfr address="0x0F91" access="33333333" name="PR5H" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="PR5L" mclr="22222222" por="22222222" />
+    <combined address="0x0F87" size="2" name="TMR5" />
+    <sfr address="0x0F88" access="33333333" name="TMR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="TMR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0FAA" access="01033033" name="BAUDCTL" mclr="02021011" por="02021011" />
+    <sfr address="0x0F7F" access="33333333" name="PTCON0" mclr="33333333" por="11111111" />
+    <sfr address="0x0F7E" access="31000000" name="PTCON1" mclr="11000000" por="11000000" />
+    <sfr address="0x0F7D" access="33333333" name="PTMRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F7C" access="00003333" name="PTMRH" mclr="00001111" por="00001111" />
+    <sfr address="0x0F7B" access="33333333" name="PTPERL" mclr="22222222" por="22222222" />
+    <sfr address="0x0F7A" access="00003333" name="PTPERH" mclr="00002222" por="00002222" />
+    <sfr address="0x0F79" access="33333333" name="PDC0L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F78" access="00333333" name="PDC0H" mclr="00111111" por="00111111" />
+    <sfr address="0x0F77" access="33333333" name="PDC1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F76" access="00333333" name="PDC1H" mclr="00111111" por="00111111" />
+    <sfr address="0x0F75" access="33333333" name="PDC2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F74" access="00333333" name="PDC2H" mclr="00111111" por="00111111" />
+    <sfr address="0x0F73" access="33333333" name="PDC3L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F72" access="00333333" name="PDC3H" mclr="00111111" por="00111111" />
+    <sfr address="0x0F71" access="33333333" name="SEVTCMPL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F70" access="00003333" name="SEVTCMPH" mclr="00001111" por="00001111" />
+    <sfr address="0x0F6F" access="03333333" name="PWMCON0" mclr="02121111" por="02121111" />
+    <sfr address="0x0F6E" access="33333033" name="PWMCON1" mclr="11111011" por="11111011" />
+    <sfr address="0x0F6D" access="33333333" name="DTCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="03333333" name="FLTCONFIG" mclr="01111111" por="01111111" />
+    <sfr address="0x0F6B" access="33333333" name="OVDCOND" mclr="22222222" por="22222222" />
+    <sfr address="0x0F6A" access="33333333" name="OVDCONS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="03303333" name="CAP1CON" mclr="02101111" por="02101111" />
+    <sfr address="0x0F62" access="03303333" name="CAP2CON" mclr="02101111" por="02101111" />
+    <sfr address="0x0F61" access="03303333" name="CAP3CON" mclr="02101111" por="02101111" />
+    <sfr address="0x0FB6" access="30333333" name="QEICON" mclr="10111111" por="10111111" />
+    <sfr address="0x0F60" access="03333333" name="DFLTCON" mclr="01111111" por="01111111" />
+    <sfr address="0x0F69" access="33333333" name="CAP1BUFH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F69" access="33333333" name="VELRH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F68" access="33333333" name="CAP1BUFL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F68" access="33333333" name="VELRL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="CAP2BUFH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="POSCNTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F66" access="33333333" name="CAP2BUFL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F66" access="33333333" name="POSCNTL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="CAP3BUFH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="MAXCNTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F64" access="33333333" name="CAP3BUFL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F64" access="33333333" name="MAXCNTL" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F2439" unused_bank_mask="0x7FF8" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F83" />
+    <unused end="0x0F91" start="0x0F8C" />
+    <unused end="0x0F9C" start="0x0F95" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB4" />
+    <unused end="0x0FC0" start="0x0FC0" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00000003" name="OSCCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA2" access="00033330" name="IPR2" mclr="00022220" por="00022220" />
+    <sfr address="0x0FA1" access="00033330" name="PIR2" mclr="00011110" por="00011110" />
+    <sfr address="0x0FA0" access="00033330" name="PIE2" mclr="00011110" por="00011110" />
+    <sfr address="0x0F9F" access="03333033" name="IPR1" mclr="02222022" por="02222022" />
+    <sfr address="0x0F9E" access="03113033" name="PIR1" mclr="01111011" por="01111011" />
+    <sfr address="0x0F9D" access="03333033" name="PIE1" mclr="01111011" por="01111011" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0FC1" access="33003333" name="ADCON1" mclr="11001111" por="11001111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30330333" name="T1CON" mclr="30330333" por="10110111" />
+    <sfr address="0x0FCC" access="11111111" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="11111111" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="11111111" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="30330333" name="T3CON" mclr="30330333" por="10110111" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F2450" unused_bank_mask="0x7FEC" >
+    <unused end="0x0F5F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F83" />
+    <unused end="0x0F91" start="0x0F8C" />
+    <unused end="0x0F9C" start="0x0F95" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FA8" />
+    <unused end="0x0FB5" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FC5" start="0x0FC9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="03330303" name="INTCON2" mclr="02220202" por="02220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="30300300" name="IPR2" mclr="20200200" por="20200200" />
+    <sfr address="0x0FA1" access="30300300" name="PIR2" mclr="10100100" por="10100100" />
+    <sfr address="0x0FA0" access="30300300" name="PIE2" mclr="10100100" por="10100100" />
+    <sfr address="0x0F9F" access="03330333" name="IPR1" mclr="02220222" por="02220222" />
+    <sfr address="0x0F9E" access="03110333" name="PIR1" mclr="01110111" por="01110111" />
+    <sfr address="0x0F9D" access="03330333" name="PIE1" mclr="01110111" por="01110111" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="01110100" por="01110100" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON1" mclr="12111011" por="12011011" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7F" access="00033333" name="UEP15" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7E" access="00033333" name="UEP14" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7D" access="00033333" name="UEP13" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7C" access="00033333" name="UEP12" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7B" access="00033333" name="UEP11" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7A" access="00033333" name="UEP10" mclr="00011111" por="00011111" />
+    <sfr address="0x0F79" access="00033333" name="UEP9" mclr="00011111" por="00011111" />
+    <sfr address="0x0F78" access="00033333" name="UEP8" mclr="00011111" por="00011111" />
+    <sfr address="0x0F77" access="00033333" name="UEP7" mclr="00011111" por="00011111" />
+    <sfr address="0x0F76" access="00033333" name="UEP6" mclr="00011111" por="00011111" />
+    <sfr address="0x0F75" access="00033333" name="UEP5" mclr="00011111" por="00011111" />
+    <sfr address="0x0F74" access="00033333" name="UEP4" mclr="00011111" por="00011111" />
+    <sfr address="0x0F73" access="00033333" name="UEP3" mclr="00011111" por="00011111" />
+    <sfr address="0x0F72" access="00033333" name="UEP2" mclr="00011111" por="00011111" />
+    <sfr address="0x0F71" access="00033333" name="UEP1" mclr="00011111" por="00011111" />
+    <sfr address="0x0F70" access="00033333" name="UEP0" mclr="00011111" por="00011111" />
+    <sfr address="0x0F6F" access="33033333" name="UCFG" mclr="11011111" por="11011111" />
+    <sfr address="0x0F6E" access="03333333" name="UADDR" mclr="01111111" por="01111111" />
+    <sfr address="0x0F6D" access="03153330" name="UCON" mclr="01011110" por="01011110" />
+    <sfr address="0x0F6C" access="01111110" name="USTAT" mclr="00000000" por="00000000" />
+    <sfr address="0x0F6B" access="30033333" name="UEIE" mclr="10011111" por="10011111" />
+    <sfr address="0x0F6A" access="50055555" name="UEIR" mclr="10011111" por="10011111" />
+    <sfr address="0x0F69" access="03333333" name="UIE" mclr="01111111" por="01111111" />
+    <sfr address="0x0F68" access="03333313" name="UIR" mclr="01111111" por="01111111" />
+    <combined address="0x0F66" size="2" name="UFRM" />
+    <sfr address="0x0F67" access="00000111" name="UFRMH" mclr="00000000" por="00000000" />
+    <sfr address="0x0F66" access="11111111" name="UFRML" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="03033390" name="EECON1" mclr="03013110" por="00010110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F2455" unused_bank_mask="0x7F00" >
+    <unused end="0x0F5F" start="0x0F00" />
+    <unused end="0x0F61" start="0x0F60" />
+    <unused end="0x0F83" start="0x0F83" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F8D" start="0x0F8C" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F96" start="0x0F95" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="30133333" name="HLVDCON" mclr="10111212" por="10111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33333333" name="IPR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA1" access="33333333" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33333333" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0FD3" access="33333133" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="30033333" name="OSCTUNE" mclr="10011111" por="10011111" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33330333" name="PORTC" mclr="33330333" por="00000000" />
+    <sfr address="0x0F8B" access="33000333" name="LATC" mclr="33000333" por="00000000" />
+    <sfr address="0x0F94" access="33000333" name="TRISC" mclr="22000222" por="22000222" />
+    <sfr address="0x0F84" access="00001000" name="PORTE" mclr="00000000" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FB6" access="33333300" name="ECCP1AS" mclr="11111100" por="11111100" />
+    <sfr address="0x0FB7" access="30000000" name="ECCP1DEL" mclr="10000000" por="10000000" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F65" access="00000333" name="SPPCON" mclr="00000111" por="00000111" />
+    <sfr address="0x0F64" access="33033333" name="SPPEPS" mclr="11011111" por="11011111" />
+    <sfr address="0x0F63" access="33333333" name="SPPCFG" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="SPPDATA" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7F" access="00033333" name="UEP15" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7E" access="00033333" name="UEP14" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7D" access="00033333" name="UEP13" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7C" access="00033333" name="UEP12" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7B" access="00033333" name="UEP11" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7A" access="00033333" name="UEP10" mclr="00011111" por="00011111" />
+    <sfr address="0x0F79" access="00033333" name="UEP9" mclr="00011111" por="00011111" />
+    <sfr address="0x0F78" access="00033333" name="UEP8" mclr="00011111" por="00011111" />
+    <sfr address="0x0F77" access="00033333" name="UEP7" mclr="00011111" por="00011111" />
+    <sfr address="0x0F76" access="00033333" name="UEP6" mclr="00011111" por="00011111" />
+    <sfr address="0x0F75" access="00033333" name="UEP5" mclr="00011111" por="00011111" />
+    <sfr address="0x0F74" access="00033333" name="UEP4" mclr="00011111" por="00011111" />
+    <sfr address="0x0F73" access="00033333" name="UEP3" mclr="00011111" por="00011111" />
+    <sfr address="0x0F72" access="00033333" name="UEP2" mclr="00011111" por="00011111" />
+    <sfr address="0x0F71" access="00033333" name="UEP1" mclr="00011111" por="00011111" />
+    <sfr address="0x0F70" access="00033333" name="UEP0" mclr="00011111" por="00011111" />
+    <sfr address="0x0F6F" access="33033333" name="UCFG" mclr="11011111" por="11011111" />
+    <sfr address="0x0F6E" access="03333333" name="UADDR" mclr="01111111" por="01111111" />
+    <sfr address="0x0F6D" access="03153330" name="UCON" mclr="01011110" por="01011110" />
+    <sfr address="0x0F6C" access="01111110" name="USTAT" mclr="00000000" por="00000000" />
+    <sfr address="0x0F6B" access="30033333" name="UEIE" mclr="10011111" por="10011111" />
+    <sfr address="0x0F6A" access="50055555" name="UEIR" mclr="10011111" por="10011111" />
+    <sfr address="0x0F69" access="03333333" name="UIE" mclr="01111111" por="01111111" />
+    <sfr address="0x0F68" access="03333313" name="UIR" mclr="01111111" por="01111111" />
+    <combined address="0x0F66" size="2" name="UFRM" />
+    <sfr address="0x0F67" access="00000111" name="UFRMH" mclr="00000000" por="00000000" />
+    <sfr address="0x0F66" access="11111111" name="UFRML" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F248" unused_bank_mask="0x7FF8" >
+    <mirror>
+      <range end="0x0F2E" start="0x0F2E" />
+      <range end="0x0F3E" start="0x0F3E" />
+      <range end="0x0F4E" start="0x0F4E" />
+      <range end="0x0F5E" start="0x0F5E" />
+    </mirror>
+    <unused end="0x0F2F" start="0x0F2F" />
+    <unused end="0x0F3F" start="0x0F3F" />
+    <unused end="0x0F4F" start="0x0F4F" />
+    <unused end="0x0F5F" start="0x0F5F" />
+    <unused end="0x0F7F" start="0x0F77" />
+    <unused end="0x0F88" start="0x0F83" />
+    <unused end="0x0F91" start="0x0F8C" />
+    <unused end="0x0F9C" start="0x0F95" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FBC" start="0x0FB4" />
+    <unused end="0x0FC0" start="0x0FC0" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00000003" name="OSCCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33333333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="03033333" name="IPR2" mclr="02022222" por="02022222" />
+    <sfr address="0x0FA1" access="03033333" name="PIR2" mclr="01011111" por="01011111" />
+    <sfr address="0x0FA0" access="03033333" name="PIE2" mclr="01011111" por="01011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0FC1" access="33003333" name="ADCON1" mclr="11001111" por="11001111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30333333" name="T1CON" mclr="30333333" por="10111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0F76" access="11111111" name="TXERRCNT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F75" access="11111111" name="RXERRCNT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F74" access="55111111" name="COMSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F73" access="00330000" name="CIOCON" mclr="00110000" por="00110000" />
+    <sfr address="0x0F72" access="03000333" name="BRGCON3" mclr="01000111" por="01000111" />
+    <sfr address="0x0F71" access="33333333" name="BRGCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F70" access="33333333" name="BRGCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333330" name="CANCON" mclr="21111110" por="21111110" />
+    <sfr address="0x0F6E" access="11101110" name="CANSTAT" mclr="21101110" por="21101110" />
+    <sfr address="0x0F6D" access="33333333" name="RXB0D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6C" access="33333333" name="RXB0D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6B" access="33333333" name="RXB0D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6A" access="33333333" name="RXB0D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0F69" access="33333333" name="RXB0D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0F68" access="33333333" name="RXB0D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="RXB0D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0F66" access="33333333" name="RXB0D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="03333333" name="RXB0DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0F64" access="33333333" name="RXB0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F63" access="33333333" name="RXB0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F62" access="33333033" name="RXB0SIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F61" access="33333333" name="RXB0SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F60" access="53301313" name="RXB0CON" mclr="11101111" por="11101111" />
+    <sfr address="0x0F5E" access="11101110" name="CANSTATRO1" mclr="00000000" por="00000000" />
+    <sfr address="0x0F5D" access="33333333" name="RXB1D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F5C" access="33333333" name="RXB1D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F5B" access="33333333" name="RXB1D5" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F57" access="33333333" name="RXB1D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0F56" access="33333333" name="RXB1D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0F55" access="03333333" name="RXB1DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0F54" access="33333333" name="RXB1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F53" access="33333333" name="RXB1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F52" access="33333033" name="RXB1SIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F51" access="33333333" name="RXB1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F50" access="53301111" name="RXB1CON" mclr="11101111" por="11101111" />
+    <sfr address="0x0F4E" access="11101110" name="CANSTATRO2" mclr="33303330" por="00000000" />
+    <sfr address="0x0F4D" access="33333333" name="TXB0D7" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F4B" access="33333333" name="TXB0D5" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F11" access="33303033" name="RXF4SIDL" mclr="33303033" por="00000000" />
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+    <sfr address="0x0F0F" access="33333333" name="RXF3EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0E" access="33333333" name="RXF3EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0D" access="33303033" name="RXF3SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F0C" access="33333333" name="RXF3SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0B" access="33333333" name="RXF2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0A" access="33333333" name="RXF2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F09" access="33303033" name="RXF2SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F08" access="33333333" name="RXF2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F07" access="33333333" name="RXF1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F06" access="33333333" name="RXF1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F05" access="33303033" name="RXF1SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F04" access="33333333" name="RXF1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F03" access="33333333" name="RXF0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F02" access="33333333" name="RXF0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F01" access="33303033" name="RXF0SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F00" access="33333333" name="RXF0SIDH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F2480" unused_bank_mask="0x1FF8" >
+    <unused end="0x0D6F" start="0x0D6C" />
+    <unused end="0x0D7F" start="0x0D7C" />
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+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
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+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
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+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="33011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
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+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
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+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
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+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
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+    <sfr address="0x0E7B" access="33333333" name="RXB7D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E7A" access="33333333" name="RXB7D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E79" access="33333333" name="RXB7D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E78" access="33333333" name="RXB7D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E77" access="33333333" name="RXB7D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E76" access="33333333" name="RXB7D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E75" access="03333333" name="RXB7DLC" mclr="03333333" por="00000000" />
+    <combined address="0x0E73" size="2" name="RXB7EID" />
+    <sfr address="0x0E74" access="33333333" name="RXB7EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E73" access="33333333" name="RXB7EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E72" access="33303033" name="RXB7SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E71" access="33333333" name="RXB7SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E70" access="33333333" name="RXB7CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6D" access="33333333" name="RXB6D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6C" access="33333333" name="RXB6D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6B" access="33333333" name="RXB6D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6A" access="33333333" name="RXB6D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E69" access="33333333" name="RXB6D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E68" access="33333333" name="RXB6D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E67" access="33333333" name="RXB6D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E66" access="33333333" name="RXB6D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E65" access="03333333" name="RXB6DLC" mclr="03333333" por="00000000" />
+    <combined address="0x0E63" size="2" name="RXB6EID" />
+    <sfr address="0x0E64" access="33333333" name="RXB6EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E63" access="33333333" name="RXB6EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E62" access="33303033" name="RXB6SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E61" access="33333333" name="RXB6SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E60" access="33333333" name="RXB6CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5D" access="33333333" name="RXB5D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5C" access="33333333" name="RXB5D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5B" access="33333333" name="RXB5D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5A" access="33333333" name="RXB5D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E59" access="33333333" name="RXB5D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E58" access="33333333" name="RXB5D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E57" access="33333333" name="RXB5D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E56" access="33333333" name="RXB5D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E55" access="03333333" name="RXB5DLC" mclr="03333333" por="00000000" />
+    <combined address="0x0E53" size="2" name="RXB5EID" />
+    <sfr address="0x0E54" access="33333333" name="RXB5EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E53" access="33333333" name="RXB5EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E52" access="33303033" name="RXB5SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E51" access="33333333" name="RXB5SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E50" access="33333333" name="RXB5CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4D" access="33333333" name="RXB4D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4C" access="33333333" name="RXB4D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4B" access="33333333" name="RXB4D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4A" access="33333333" name="RXB4D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E49" access="33333333" name="RXB4D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E48" access="33333333" name="RXB4D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E47" access="33333333" name="RXB4D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E46" access="33333333" name="RXB4D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E45" access="03333333" name="RXB4DLC" mclr="03333333" por="00000000" />
+    <combined address="0x0E43" size="2" name="RXB4EID" />
+    <sfr address="0x0E44" access="33333333" name="RXB4EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E43" access="33333333" name="RXB4EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E42" access="33303033" name="RXB4SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E41" access="33333333" name="RXB4SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E40" access="33333333" name="RXB4CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3D" access="33333333" name="RXB3D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3C" access="33333333" name="RXB3D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3B" access="33333333" name="RXB3D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3A" access="33333333" name="RXB3D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E39" access="33333333" name="RXB3D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E38" access="33333333" name="RXB3D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E37" access="33333333" name="RXB3D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E36" access="33333333" name="RXB3D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E35" access="03333333" name="RXB3DLC" mclr="03333333" por="00000000" />
+    <combined address="0x0E33" size="2" name="RXB3EID" />
+    <sfr address="0x0E34" access="33333333" name="RXB3EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E33" access="33333333" name="RXB3EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E32" access="33303033" name="RXB3SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E31" access="33333333" name="RXB3SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E30" access="33333333" name="RXB3CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2D" access="33333333" name="RXB2D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2C" access="33333333" name="RXB2D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2B" access="33333333" name="RXB2D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2A" access="33333333" name="RXB2D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E29" access="33333333" name="RXB2D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E28" access="33333333" name="RXB2D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E27" access="33333333" name="RXB2D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E26" access="33333333" name="RXB2D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E25" access="03333333" name="RXB2DLC" mclr="03333333" por="00000000" />
+    <combined address="0x0E23" size="2" name="RXB2EID" />
+    <sfr address="0x0E24" access="33333333" name="RXB2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E23" access="33333333" name="RXB2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E22" access="33303033" name="RXB2SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E21" access="33333333" name="RXB2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E20" access="33333333" name="RXB2CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0DFC" access="00033300" name="TX_BUFINTEN" mclr="00033300" por="00000000" />
+    <sfr address="0x0DFA" access="33333333" name="BUF_INT_EN0" mclr="33333333" por="00000000" />
+    <sfr address="0x0DF8" access="33333300" name="RX_TX_SEL0" mclr="33333300" por="00000000" />
+    <sfr address="0x0DF3" access="33333333" name="MSK_SEL3" mclr="33333333" por="00000000" />
+    <sfr address="0x0DF2" access="33333333" name="MSK_SEL2" mclr="33333333" por="00000000" />
+    <sfr address="0x0DF1" access="33333333" name="MSK_SEL1" mclr="33333333" por="00000000" />
+    <sfr address="0x0DF0" access="33333333" name="MSK_SEL0" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE7" access="33333333" name="BUFPNT1514" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE6" access="33333333" name="BUFPNT1312" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE5" access="33333333" name="BUFPNT1110" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE4" access="33333333" name="BUFPNT98" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE3" access="33333333" name="BUFPNT76" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE2" access="33333333" name="BUFPNT54" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE1" access="33333333" name="BUFPNT32" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE0" access="33333333" name="BUFPNT10" mclr="33333333" por="00000000" />
+    <sfr address="0x0DD8" access="00033333" name="DEV_NET_CT" mclr="00033333" por="00000000" />
+    <sfr address="0x0DD5" access="33333333" name="FER1" mclr="33333333" por="00000000" />
+    <sfr address="0x0DD4" access="33333333" name="FER0" mclr="33333333" por="00000000" />
+    <combined address="0x0D92" size="2" name="RXF15EID" />
+    <sfr address="0x0D93" access="33333333" name="RXF15EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D92" access="33333333" name="RXF15EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D91" access="33303033" name="RXF15SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D90" access="33333333" name="RXF15SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D8A" size="2" name="RXF14EID" />
+    <sfr address="0x0D8B" access="33333333" name="RXF14EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8A" access="33333333" name="RXF14EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D89" access="33303033" name="RXF14SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D88" access="33333333" name="RXF14SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D86" size="2" name="RXF13EID" />
+    <sfr address="0x0D87" access="33333333" name="RXF13EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D86" access="33333333" name="RXF13EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D85" access="33303033" name="RXF13SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D84" access="33333333" name="RXF13SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D82" size="2" name="RXF12EID" />
+    <sfr address="0x0D83" access="33333333" name="RXF12EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D82" access="33333333" name="RXF12EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D81" access="33303033" name="RXF12SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D80" access="33333333" name="RXF12SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D7A" size="2" name="RXF11EID" />
+    <sfr address="0x0D7B" access="33333333" name="RXF11EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7A" access="33333333" name="RXF11EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D79" access="33303033" name="RXF11SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D78" access="33333333" name="RXF11SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D76" size="2" name="RXF10EID" />
+    <sfr address="0x0D77" access="33333333" name="RXF10EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D76" access="33333333" name="RXF10EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D75" access="33303033" name="RXF10SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D74" access="33333333" name="RXF10SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D72" size="2" name="RXF9EID" />
+    <sfr address="0x0D73" access="33333333" name="RXF9EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D72" access="33333333" name="RXF9EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D71" access="33303033" name="RXF9SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D70" access="33333333" name="RXF9SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D6A" size="2" name="RXF8EID" />
+    <sfr address="0x0D6B" access="33333333" name="RXF8EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6A" access="33333333" name="RXF8EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D69" access="33303033" name="RXF8SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D68" access="33333333" name="RXF8SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D66" size="2" name="RXF7EID" />
+    <sfr address="0x0D67" access="33333333" name="RXF7EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D66" access="33333333" name="RXF7EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D65" access="33303033" name="RXF7SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D64" access="33333333" name="RXF7SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D62" size="2" name="RXF6EID" />
+    <sfr address="0x0D63" access="33333333" name="RXF6EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D62" access="33333333" name="RXF6EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D61" access="33303033" name="RXF6SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D60" access="33333333" name="RXF6SIDH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F24J10" unused_bank_mask="0x7FF0" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FAA" start="0x0FA8" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="12034433" por="10022211" />
+    <sfr address="0x0FA5" access="03000000" name="IPR3" mclr="02000000" por="02000000" />
+    <sfr address="0x0FA4" access="03000000" name="PIR3" mclr="01000000" por="01000000" />
+    <sfr address="0x0FA3" access="03000000" name="PIE3" mclr="01000000" por="01000000" />
+    <sfr address="0x0FA2" access="33003333" name="IPR2" mclr="22002002" por="22002002" />
+    <sfr address="0x0FA1" access="33003333" name="PIR2" mclr="11001001" por="11001001" />
+    <sfr address="0x0FA0" access="33003333" name="PIE2" mclr="11001001" por="11001001" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0FD3" access="30003033" name="OSCCON" mclr="01110100" por="01110100" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="00303333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="00303333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="00303333" name="TRISA" mclr="00202222" por="00202222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FB6" access="33333300" name="ECCP1AS" mclr="11111100" por="11111100" />
+    <sfr address="0x0FB7" access="30000000" name="PWM1CON" mclr="10000000" por="10000000" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F2510" unused_bank_mask="0x7FC0" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F83" start="0x0F83" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F8D" start="0x0F8C" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F96" start="0x0F95" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FA9" start="0x0FA6" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33003333" name="IPR2" mclr="22002222" por="22002222" />
+    <sfr address="0x0FA1" access="33003333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33003333" name="PIE2" mclr="11001111" por="11001111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="01110100" por="01110100" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001000" name="PORTE" mclr="00000000" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FB6" access="33333300" name="ECCPAS1" mclr="11111100" por="11111100" />
+    <sfr address="0x0FB7" access="30000000" name="PWM1CON" mclr="10000000" por="10000000" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F2515" unused_bank_mask="0x0000" >
+    <unused end="0x0F83" start="0x0F83" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8C" />
+    <unused end="0x0F9A" start="0x0F95" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="01110100" por="01110100" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33003333" name="IPR2" mclr="22002222" por="22002222" />
+    <sfr address="0x0FA1" access="33003333" name="PIR2" mclr="11001111" por="11001111" />
+    <sfr address="0x0FA0" access="33003333" name="PIE2" mclr="11001111" por="11001111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9B" access="30033333" name="OSCTUNE" mclr="10011111" por="10011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001000" name="PORTE" mclr="00003000" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FB6" access="33333300" name="ECCPAS1" mclr="11111100" por="11111100" />
+    <sfr address="0x0FB7" access="30000000" name="PWM1CON" mclr="10000000" por="10000000" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F252" unused_bank_mask="0x7FC0" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F83" />
+    <unused end="0x0F91" start="0x0F8C" />
+    <unused end="0x0F9C" start="0x0F95" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB4" />
+    <unused end="0x0FC0" start="0x0FC0" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00000003" name="OSCCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10044433" por="10042211" />
+    <sfr address="0x0FA2" access="00033333" name="IPR2" mclr="00022222" por="00022222" />
+    <sfr address="0x0FA1" access="00033333" name="PIR2" mclr="00011111" por="00011111" />
+    <sfr address="0x0FA0" access="00033333" name="PIE2" mclr="00011111" por="00011111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0FC1" access="33003333" name="ADCON1" mclr="11001111" por="11001111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30333333" name="T1CON" mclr="30333333" por="10111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F2520" unused_bank_mask="0x7FC0" >
+    <unused end="0x0F83" start="0x0F83" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F8D" start="0x0F8C" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F96" start="0x0F95" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0FD3" access="33330100" name="OSCCON" mclr="11110100" por="12110100" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001000" name="PORTE" mclr="00000000" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FB6" access="33333300" name="ECCPAS1" mclr="11111100" por="11111100" />
+    <sfr address="0x0FB7" access="30000000" name="PWM1CON" mclr="10000000" por="10000000" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F2523" unused_bank_mask="0x7FC0" >
+    <unused end="0x0F83" start="0x0F83" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F8D" start="0x0F8C" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F96" start="0x0F95" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="03330303" name="INTCON2" mclr="02220202" por="02220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="01110100" por="01110100" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001000" name="PORTE" mclr="00000000" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FB6" access="33333300" name="ECCPAS1" mclr="11111100" por="11111100" />
+    <sfr address="0x0FB7" access="30000000" name="PWM1CON" mclr="10000000" por="10000000" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F2525" unused_bank_mask="0x0000" >
+    <unused end="0x0F83" start="0x0F83" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8C" />
+    <unused end="0x0F9A" start="0x0F95" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="12114111" por="12114111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="10011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001000" name="PORTE" mclr="00003000" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FB6" access="33333300" name="ECCPAS1" mclr="11111100" por="11111100" />
+    <sfr address="0x0FB7" access="30000000" name="PWM1CON" mclr="10000000" por="10000000" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FAA" access="00000033" name="EEADRH" mclr="00000011" por="00000011" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F2539" unused_bank_mask="0x7FC0" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F83" />
+    <unused end="0x0F91" start="0x0F8C" />
+    <unused end="0x0F9C" start="0x0F95" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB4" />
+    <unused end="0x0FC0" start="0x0FC0" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00000003" name="OSCCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA2" access="00033330" name="IPR2" mclr="00022220" por="00022220" />
+    <sfr address="0x0FA1" access="00033330" name="PIR2" mclr="00011110" por="00011110" />
+    <sfr address="0x0FA0" access="00033330" name="PIE2" mclr="00011110" por="00011110" />
+    <sfr address="0x0F9F" access="03333033" name="IPR1" mclr="02222022" por="02222022" />
+    <sfr address="0x0F9E" access="03113033" name="PIR1" mclr="01111011" por="01111011" />
+    <sfr address="0x0F9D" access="03333033" name="PIE1" mclr="01111011" por="01111011" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0FC1" access="33003333" name="ADCON1" mclr="11001111" por="11001111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30330333" name="T1CON" mclr="30330333" por="10110111" />
+    <sfr address="0x0FCC" access="11111111" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="11111111" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="11111111" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="30330333" name="T3CON" mclr="30330333" por="10110111" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F2550" unused_bank_mask="0x7F00" >
+    <unused end="0x0F5F" start="0x0F00" />
+    <unused end="0x0F61" start="0x0F60" />
+    <unused end="0x0F83" start="0x0F83" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F8D" start="0x0F8C" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F96" start="0x0F95" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="30133333" name="HLVDCON" mclr="10111212" por="10111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33333333" name="IPR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA1" access="33333333" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33333333" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0FD3" access="33333133" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="30033333" name="OSCTUNE" mclr="10011111" por="10011111" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33330333" name="PORTC" mclr="33330333" por="00000000" />
+    <sfr address="0x0F8B" access="33000333" name="LATC" mclr="33000333" por="00000000" />
+    <sfr address="0x0F94" access="33000333" name="TRISC" mclr="22000222" por="22000222" />
+    <sfr address="0x0F84" access="00001000" name="PORTE" mclr="00000000" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FB6" access="33333300" name="ECCP1AS" mclr="11111100" por="11111100" />
+    <sfr address="0x0FB7" access="30000000" name="ECCP1DEL" mclr="10000000" por="10000000" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F65" access="00000333" name="SPPCON" mclr="00000111" por="00000111" />
+    <sfr address="0x0F64" access="33033333" name="SPPEPS" mclr="11011111" por="11011111" />
+    <sfr address="0x0F63" access="33333333" name="SPPCFG" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="SPPDATA" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7F" access="00033333" name="UEP15" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7E" access="00033333" name="UEP14" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7D" access="00033333" name="UEP13" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7C" access="00033333" name="UEP12" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7B" access="00033333" name="UEP11" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7A" access="00033333" name="UEP10" mclr="00011111" por="00011111" />
+    <sfr address="0x0F79" access="00033333" name="UEP9" mclr="00011111" por="00011111" />
+    <sfr address="0x0F78" access="00033333" name="UEP8" mclr="00011111" por="00011111" />
+    <sfr address="0x0F77" access="00033333" name="UEP7" mclr="00011111" por="00011111" />
+    <sfr address="0x0F76" access="00033333" name="UEP6" mclr="00011111" por="00011111" />
+    <sfr address="0x0F75" access="00033333" name="UEP5" mclr="00011111" por="00011111" />
+    <sfr address="0x0F74" access="00033333" name="UEP4" mclr="00011111" por="00011111" />
+    <sfr address="0x0F73" access="00033333" name="UEP3" mclr="00011111" por="00011111" />
+    <sfr address="0x0F72" access="00033333" name="UEP2" mclr="00011111" por="00011111" />
+    <sfr address="0x0F71" access="00033333" name="UEP1" mclr="00011111" por="00011111" />
+    <sfr address="0x0F70" access="00033333" name="UEP0" mclr="00011111" por="00011111" />
+    <sfr address="0x0F6F" access="33033333" name="UCFG" mclr="11011111" por="11011111" />
+    <sfr address="0x0F6E" access="03333333" name="UADDR" mclr="01111111" por="01111111" />
+    <sfr address="0x0F6D" access="03153330" name="UCON" mclr="01011110" por="01011110" />
+    <sfr address="0x0F6C" access="01111110" name="USTAT" mclr="00000000" por="00000000" />
+    <sfr address="0x0F6B" access="30033333" name="UEIE" mclr="10011111" por="10011111" />
+    <sfr address="0x0F6A" access="50055555" name="UEIR" mclr="10011111" por="10011111" />
+    <sfr address="0x0F69" access="03333333" name="UIE" mclr="01111111" por="01111111" />
+    <sfr address="0x0F68" access="03333313" name="UIR" mclr="01111111" por="01111111" />
+    <combined address="0x0F66" size="2" name="UFRM" />
+    <sfr address="0x0F67" access="00000111" name="UFRMH" mclr="00000000" por="00000000" />
+    <sfr address="0x0F66" access="11111111" name="UFRML" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F258" unused_bank_mask="0x7FC0" >
+    <mirror>
+      <range end="0x0F2E" start="0x0F2E" />
+      <range end="0x0F3E" start="0x0F3E" />
+      <range end="0x0F4E" start="0x0F4E" />
+      <range end="0x0F5E" start="0x0F5E" />
+    </mirror>
+    <unused end="0x0F2F" start="0x0F2F" />
+    <unused end="0x0F3F" start="0x0F3F" />
+    <unused end="0x0F4F" start="0x0F4F" />
+    <unused end="0x0F5F" start="0x0F5F" />
+    <unused end="0x0F7F" start="0x0F77" />
+    <unused end="0x0F88" start="0x0F83" />
+    <unused end="0x0F91" start="0x0F8C" />
+    <unused end="0x0F9C" start="0x0F95" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FBC" start="0x0FB4" />
+    <unused end="0x0FC0" start="0x0FC0" />
+    <unused end="0x0FD4" start="0x0FD4" />
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+    <sfr address="0x0F0D" access="33303033" name="RXF3SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F0C" access="33333333" name="RXF3SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0B" access="33333333" name="RXF2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0A" access="33333333" name="RXF2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F09" access="33303033" name="RXF2SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F08" access="33333333" name="RXF2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F07" access="33333333" name="RXF1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F06" access="33333333" name="RXF1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F05" access="33303033" name="RXF1SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F04" access="33333333" name="RXF1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F03" access="33333333" name="RXF0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F02" access="33333333" name="RXF0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F01" access="33303033" name="RXF0SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F00" access="33333333" name="RXF0SIDH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F2580" unused_bank_mask="0x1FC0" >
+    <unused end="0x0D6F" start="0x0D6C" />
+    <unused end="0x0D7F" start="0x0D7C" />
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+    <unused end="0x0FD4" start="0x0FD4" />
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+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
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+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
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+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
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+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
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+    <sfr address="0x0F31" access="33333333" name="TXB1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F30" access="33333033" name="TXB1CON" mclr="33333033" por="00000000" />
+    <sfr address="0x0F2D" access="33333333" name="TXB2D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F2C" access="33333333" name="TXB2D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F2B" access="33333333" name="TXB2D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0F2A" access="33333333" name="TXB2D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0F29" access="33333333" name="TXB2D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0F28" access="33333333" name="TXB2D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0F27" access="33333333" name="TXB2D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0F26" access="33333333" name="TXB2D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0F25" access="03003333" name="TXB2DLC" mclr="03003333" por="00000000" />
+    <combined address="0x0F23" size="2" name="TXB2EID" />
+    <sfr address="0x0F24" access="33333333" name="TXB2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F23" access="33333333" name="TXB2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F22" access="33303033" name="TXB2SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F21" access="33333333" name="TXB2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F20" access="33333033" name="TXB2CON" mclr="33333033" por="00000000" />
+    <combined address="0x0F1E" size="2" name="RXM1EID" />
+    <sfr address="0x0F1F" access="33333333" name="RXM1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F1E" access="33333333" name="RXM1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F1D" access="33303033" name="RXM1SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F1C" access="33333333" name="RXM1SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0F1A" size="2" name="RXM0EID" />
+    <sfr address="0x0F1B" access="33333333" name="RXM0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F1A" access="33333333" name="RXM0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F19" access="33303033" name="RXM0SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F18" access="33333333" name="RXM0SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0F16" size="2" name="RXF5EID" />
+    <sfr address="0x0F17" access="33333333" name="RXF5EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F16" access="33333333" name="RXF5EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F15" access="33303033" name="RXF5SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F14" access="33333333" name="RXF5SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0F12" size="2" name="RXF4EID" />
+    <sfr address="0x0F13" access="33333333" name="RXF4EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F12" access="33333333" name="RXF4EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F11" access="33303033" name="RXF4SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F10" access="33333333" name="RXF4SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0F0E" size="2" name="RXF3EID" />
+    <sfr address="0x0F0F" access="33333333" name="RXF3EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0E" access="33333333" name="RXF3EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0D" access="33303033" name="RXF3SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F0C" access="33333333" name="RXF3SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0F0A" size="2" name="RXF2EID" />
+    <sfr address="0x0F0B" access="33333333" name="RXF2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0A" access="33333333" name="RXF2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F09" access="33303033" name="RXF2SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F08" access="33333333" name="RXF2SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0F06" size="2" name="RXF1EID" />
+    <sfr address="0x0F07" access="33333333" name="RXF1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F06" access="33333333" name="RXF1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F05" access="33303033" name="RXF1SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F04" access="33333333" name="RXF1SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0F02" size="2" name="RXF0EID" />
+    <sfr address="0x0F03" access="33333333" name="RXF0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F02" access="33333333" name="RXF0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F01" access="33303033" name="RXF0SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F00" access="33333333" name="RXF0SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E7D" access="33333333" name="RXB7D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E7C" access="33333333" name="RXB7D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E7B" access="33333333" name="RXB7D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E7A" access="33333333" name="RXB7D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E79" access="33333333" name="RXB7D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E78" access="33333333" name="RXB7D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E77" access="33333333" name="RXB7D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E76" access="33333333" name="RXB7D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E75" access="03333333" name="RXB7DLC" mclr="03333333" por="00000000" />
+    <combined address="0x0E73" size="2" name="RXB7EID" />
+    <sfr address="0x0E74" access="33333333" name="RXB7EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E73" access="33333333" name="RXB7EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E72" access="33303033" name="RXB7SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E71" access="33333333" name="RXB7SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E70" access="33333333" name="RXB7CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6D" access="33333333" name="RXB6D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6C" access="33333333" name="RXB6D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6B" access="33333333" name="RXB6D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6A" access="33333333" name="RXB6D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E69" access="33333333" name="RXB6D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E68" access="33333333" name="RXB6D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E67" access="33333333" name="RXB6D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E66" access="33333333" name="RXB6D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E65" access="03333333" name="RXB6DLC" mclr="03333333" por="00000000" />
+    <combined address="0x0E63" size="2" name="RXB6EID" />
+    <sfr address="0x0E64" access="33333333" name="RXB6EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E63" access="33333333" name="RXB6EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E62" access="33303033" name="RXB6SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E61" access="33333333" name="RXB6SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E60" access="33333333" name="RXB6CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5D" access="33333333" name="RXB5D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5C" access="33333333" name="RXB5D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5B" access="33333333" name="RXB5D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5A" access="33333333" name="RXB5D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E59" access="33333333" name="RXB5D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E58" access="33333333" name="RXB5D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E57" access="33333333" name="RXB5D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E56" access="33333333" name="RXB5D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E55" access="03333333" name="RXB5DLC" mclr="03333333" por="00000000" />
+    <combined address="0x0E53" size="2" name="RXB5EID" />
+    <sfr address="0x0E54" access="33333333" name="RXB5EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E53" access="33333333" name="RXB5EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E52" access="33303033" name="RXB5SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E51" access="33333333" name="RXB5SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E50" access="33333333" name="RXB5CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4D" access="33333333" name="RXB4D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4C" access="33333333" name="RXB4D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4B" access="33333333" name="RXB4D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4A" access="33333333" name="RXB4D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E49" access="33333333" name="RXB4D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E48" access="33333333" name="RXB4D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E47" access="33333333" name="RXB4D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E46" access="33333333" name="RXB4D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E45" access="03333333" name="RXB4DLC" mclr="03333333" por="00000000" />
+    <combined address="0x0E43" size="2" name="RXB4EID" />
+    <sfr address="0x0E44" access="33333333" name="RXB4EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E43" access="33333333" name="RXB4EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E42" access="33303033" name="RXB4SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E41" access="33333333" name="RXB4SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E40" access="33333333" name="RXB4CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3D" access="33333333" name="RXB3D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3C" access="33333333" name="RXB3D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3B" access="33333333" name="RXB3D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3A" access="33333333" name="RXB3D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E39" access="33333333" name="RXB3D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E38" access="33333333" name="RXB3D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E37" access="33333333" name="RXB3D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E36" access="33333333" name="RXB3D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E35" access="03333333" name="RXB3DLC" mclr="03333333" por="00000000" />
+    <combined address="0x0E33" size="2" name="RXB3EID" />
+    <sfr address="0x0E34" access="33333333" name="RXB3EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E33" access="33333333" name="RXB3EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E32" access="33303033" name="RXB3SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E31" access="33333333" name="RXB3SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E30" access="33333333" name="RXB3CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2D" access="33333333" name="RXB2D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2C" access="33333333" name="RXB2D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2B" access="33333333" name="RXB2D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2A" access="33333333" name="RXB2D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E29" access="33333333" name="RXB2D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E28" access="33333333" name="RXB2D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E27" access="33333333" name="RXB2D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E26" access="33333333" name="RXB2D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E25" access="03333333" name="RXB2DLC" mclr="03333333" por="00000000" />
+    <combined address="0x0E23" size="2" name="RXB2EID" />
+    <sfr address="0x0E24" access="33333333" name="RXB2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E23" access="33333333" name="RXB2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E22" access="33303033" name="RXB2SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E21" access="33333333" name="RXB2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E20" access="33333333" name="RXB2CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0DFC" access="00033300" name="TX_BUFINTEN" mclr="00033300" por="00000000" />
+    <sfr address="0x0DFA" access="33333333" name="BUF_INT_EN0" mclr="33333333" por="00000000" />
+    <sfr address="0x0DF8" access="33333300" name="RX_TX_SEL0" mclr="33333300" por="00000000" />
+    <sfr address="0x0DF3" access="33333333" name="MSK_SEL3" mclr="33333333" por="00000000" />
+    <sfr address="0x0DF2" access="33333333" name="MSK_SEL2" mclr="33333333" por="00000000" />
+    <sfr address="0x0DF1" access="33333333" name="MSK_SEL1" mclr="33333333" por="00000000" />
+    <sfr address="0x0DF0" access="33333333" name="MSK_SEL0" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE7" access="33333333" name="BUFPNT1514" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE6" access="33333333" name="BUFPNT1312" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE5" access="33333333" name="BUFPNT1110" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE4" access="33333333" name="BUFPNT98" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE3" access="33333333" name="BUFPNT76" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE2" access="33333333" name="BUFPNT54" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE1" access="33333333" name="BUFPNT32" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE0" access="33333333" name="BUFPNT10" mclr="33333333" por="00000000" />
+    <sfr address="0x0DD8" access="00033333" name="DEV_NET_CT" mclr="00033333" por="00000000" />
+    <sfr address="0x0DD5" access="33333333" name="FER1" mclr="33333333" por="00000000" />
+    <sfr address="0x0DD4" access="33333333" name="FER0" mclr="33333333" por="00000000" />
+    <combined address="0x0D92" size="2" name="RXF15EID" />
+    <sfr address="0x0D93" access="33333333" name="RXF15EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D92" access="33333333" name="RXF15EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D91" access="33303033" name="RXF15SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D90" access="33333333" name="RXF15SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D8A" size="2" name="RXF14EID" />
+    <sfr address="0x0D8B" access="33333333" name="RXF14EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8A" access="33333333" name="RXF14EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D89" access="33303033" name="RXF14SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D88" access="33333333" name="RXF14SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D86" size="2" name="RXF13EID" />
+    <sfr address="0x0D87" access="33333333" name="RXF13EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D86" access="33333333" name="RXF13EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D85" access="33303033" name="RXF13SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D84" access="33333333" name="RXF13SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D82" size="2" name="RXF12EID" />
+    <sfr address="0x0D83" access="33333333" name="RXF12EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D82" access="33333333" name="RXF12EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D81" access="33303033" name="RXF12SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D80" access="33333333" name="RXF12SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D7A" size="2" name="RXF11EID" />
+    <sfr address="0x0D7B" access="33333333" name="RXF11EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7A" access="33333333" name="RXF11EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D79" access="33303033" name="RXF11SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D78" access="33333333" name="RXF11SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D76" size="2" name="RXF10EID" />
+    <sfr address="0x0D77" access="33333333" name="RXF10EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D76" access="33333333" name="RXF10EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D75" access="33303033" name="RXF10SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D74" access="33333333" name="RXF10SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D72" size="2" name="RXF9EID" />
+    <sfr address="0x0D73" access="33333333" name="RXF9EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D72" access="33333333" name="RXF9EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D71" access="33303033" name="RXF9SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D70" access="33333333" name="RXF9SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D6A" size="2" name="RXF8EID" />
+    <sfr address="0x0D6B" access="33333333" name="RXF8EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6A" access="33333333" name="RXF8EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D69" access="33303033" name="RXF8SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D68" access="33333333" name="RXF8SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D66" size="2" name="RXF7EID" />
+    <sfr address="0x0D67" access="33333333" name="RXF7EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D66" access="33333333" name="RXF7EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D65" access="33303033" name="RXF7SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D64" access="33333333" name="RXF7SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D62" size="2" name="RXF6EID" />
+    <sfr address="0x0D63" access="33333333" name="RXF6EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D62" access="33333333" name="RXF6EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D61" access="33303033" name="RXF6SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D60" access="33333333" name="RXF6SIDH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F2585" unused_bank_mask="0x0000" >
+    <unused end="0x0D59" start="0x0D00" />
+    <unused end="0x0D6F" start="0x0D6C" />
+    <unused end="0x0D7F" start="0x0D7C" />
+    <unused end="0x0D8F" start="0x0D8C" />
+    <unused end="0x0DD3" start="0x0D94" />
+    <unused end="0x0DD7" start="0x0DD6" />
+    <unused end="0x0DDF" start="0x0DD9" />
+    <unused end="0x0DEF" start="0x0DE8" />
+    <unused end="0x0DF7" start="0x0DF4" />
+    <unused end="0x0DF9" start="0x0DF9" />
+    <unused end="0x0DFB" start="0x0DFB" />
+    <unused end="0x0DFF" start="0x0DFD" />
+    <unused end="0x0E1F" start="0x0E00" />
+    <unused end="0x0EFF" start="0x0E80" />
+    <unused end="0x0F7F" start="0x0F78" />
+    <unused end="0x0F88" start="0x0F83" />
+    <unused end="0x0F91" start="0x0F8C" />
+    <unused end="0x0F9A" start="0x0F95" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB7" start="0x0FB6" />
+    <unused end="0x0FBC" start="0x0FBA" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
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+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
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+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="12113111" por="12113111" />
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+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
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+    <sfr address="0x0FA4" access="33333333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="30033333" name="IPR2" mclr="20022222" por="20022222" />
+    <sfr address="0x0FA1" access="30033333" name="PIR2" mclr="10011111" por="10011111" />
+    <sfr address="0x0FA0" access="30033333" name="PIE2" mclr="10011111" por="10011111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9B" access="30033333" name="OSCTUNE" mclr="10011111" por="10011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
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+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
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+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
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+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
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+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
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+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
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+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
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+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30330333" name="T1CON" mclr="30330333" por="10110111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
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+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
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+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0F77" access="33333333" name="ECANCON" mclr="11121111" por="11121111" />
+    <sfr address="0x0F76" access="11111111" name="TXERRCNT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F75" access="11111111" name="RXERRCNT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F74" access="55111111" name="COMSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F73" access="00330000" name="CIOCON" mclr="00110000" por="00110000" />
+    <sfr address="0x0F72" access="33000333" name="BRGCON3" mclr="11000111" por="11000111" />
+    <sfr address="0x0F71" access="33333333" name="BRGCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F70" access="33333333" name="BRGCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33393331" name="CANCON" mclr="21111111" por="21111111" />
+    <sfr address="0x0F6E" access="11111111" name="CANSTAT" mclr="21111111" por="21111111" />
+    <sfr address="0x0F6D" access="11111111" name="RXB0D7" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F6B" access="11111111" name="RXB0D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6A" access="11111111" name="RXB0D4" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F66" access="11111111" name="RXB0D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="01111111" name="RXB0DLC" mclr="13333333" por="10000000" />
+    <sfr address="0x0F64" access="11111111" name="RXB0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F63" access="11111111" name="RXB0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F62" access="11111011" name="RXB0SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0F61" access="11111111" name="RXB0SIDH" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F5F" access="33393331" name="CANCON_RO0" mclr="21111111" por="21111111" />
+    <sfr address="0x0F5E" access="11111111" name="CANSTAT_RO0" mclr="21111111" por="21111111" />
+    <sfr address="0x0F5D" access="11111111" name="RXB1D7" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F58" access="11111111" name="RXB1D2" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F56" access="11111111" name="RXB1D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0F55" access="01111111" name="RXB1DLC" mclr="13333333" por="10000000" />
+    <sfr address="0x0F54" access="11111111" name="RXB1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F53" access="11111111" name="RXB1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F52" access="11111011" name="RXB1SIDL" mclr="33333133" por="00000100" />
+    <sfr address="0x0F51" access="11111111" name="RXB1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F50" access="53311311" name="RXB1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F4F" access="33393331" name="CANCON_RO1" mclr="21111111" por="21111111" />
+    <sfr address="0x0F4E" access="11111111" name="CANSTAT_RO1" mclr="21111111" por="21111111" />
+    <sfr address="0x0F4D" access="33333333" name="TXB0D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F4C" access="33333333" name="TXB0D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F4B" access="33333333" name="TXB0D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0F4A" access="33333333" name="TXB0D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0F49" access="33333333" name="TXB0D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0F48" access="33333333" name="TXB0D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0F47" access="33333333" name="TXB0D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0F46" access="33333333" name="TXB0D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0F45" access="03003333" name="TXB0DLC" mclr="13113333" por="10110000" />
+    <sfr address="0x0F44" access="33333333" name="TXB0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F43" access="33333333" name="TXB0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F42" access="33303033" name="TXB0SIDL" mclr="33303033" por="00000000" />
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+    <sfr address="0x0F40" access="51113033" name="TXB0CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F3F" access="33393331" name="CANCON_RO2" mclr="21111111" por="21111111" />
+    <sfr address="0x0F3E" access="11111111" name="CANSTAT_RO2" mclr="21111111" por="21111111" />
+    <sfr address="0x0F3D" access="33333333" name="TXB1D7" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F3A" access="33333333" name="TXB1D4" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F36" access="33333333" name="TXB1D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0F35" access="03003333" name="TXB1DLC" mclr="03003333" por="00000000" />
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+    <sfr address="0x0F33" access="33333333" name="TXB1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F32" access="33303033" name="TXB1SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F31" access="33333333" name="TXB1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F30" access="51113033" name="TXB1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F2F" access="33393331" name="CANCON_RO3" mclr="21111111" por="21111111" />
+    <sfr address="0x0F2E" access="11111111" name="CANSTAT_RO3" mclr="21111111" por="21111111" />
+    <sfr address="0x0F2D" access="33333333" name="TXB2D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F2C" access="33333333" name="TXB2D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F2B" access="33333333" name="TXB2D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0F2A" access="33333333" name="TXB2D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0F29" access="33333333" name="TXB2D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0F28" access="33333333" name="TXB2D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0F27" access="33333333" name="TXB2D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0F26" access="33333333" name="TXB2D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0F25" access="03003333" name="TXB2DLC" mclr="03003333" por="00000000" />
+    <sfr address="0x0F24" access="33333333" name="TXB2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F23" access="33333333" name="TXB2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F22" access="33333333" name="TXB2SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F21" access="33333333" name="TXB2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F20" access="51113033" name="TXB2CON" mclr="11111011" por="11111011" />
+    <sfr address="0x0F1F" access="33333333" name="RXM1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F1E" access="33333333" name="RXM1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F1D" access="33303033" name="RXM1SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F1C" access="33333333" name="RXM1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F1B" access="33333333" name="RXM0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F1A" access="33333333" name="RXM0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F19" access="33303033" name="RXM0SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F18" access="33333333" name="RXM0SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F17" access="33333333" name="RXF5EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F16" access="33333333" name="RXF5EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F15" access="33303033" name="RXF5SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F14" access="33333333" name="RXF5SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F13" access="33333333" name="RXF4EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F12" access="33333333" name="RXF4EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F11" access="33303033" name="RXF4SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F10" access="33333333" name="RXF4SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0F" access="33333333" name="RXF3EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0E" access="33333333" name="RXF3EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0D" access="33303033" name="RXF3SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F0C" access="33333333" name="RXF3SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0B" access="33333333" name="RXF2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0A" access="33333333" name="RXF2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F09" access="33303033" name="RXF2SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F08" access="33333333" name="RXF2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F07" access="33333333" name="RXF1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F06" access="33333333" name="RXF1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F05" access="33303033" name="RXF1SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F04" access="33333333" name="RXF1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F03" access="33333333" name="RXF0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F02" access="33333333" name="RXF0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F01" access="33303033" name="RXF0SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F00" access="33333333" name="RXF0SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E7F" access="33393331" name="CANCON_RO4" mclr="21111111" por="21111111" />
+    <sfr address="0x0E7E" access="11111111" name="CANSTAT_RO4" mclr="21111111" por="21111111" />
+    <sfr address="0x0E7D" access="33333333" name="B5D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E7C" access="33333333" name="B5D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E7B" access="33333333" name="B5D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E7A" access="33333333" name="B5D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E79" access="33333333" name="B5D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E78" access="33333333" name="B5D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E77" access="33333333" name="B5D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E76" access="33333333" name="B5D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E75" access="03113333" name="B5DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E74" access="33333333" name="B5EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E73" access="33333333" name="B5EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E72" access="33333033" name="B5SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E71" access="33333333" name="B5SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E70" access="33113333" name="B5CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E6F" access="33393331" name="CANCON_RO5" mclr="21111111" por="21111111" />
+    <sfr address="0x0E6E" access="11111111" name="CANSTAT_RO5" mclr="21111111" por="21111111" />
+    <sfr address="0x0E6D" access="33333333" name="B4D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6C" access="33333333" name="B4D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6B" access="33333333" name="B4D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6A" access="33333333" name="B4D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E69" access="33333333" name="B4D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E68" access="33333333" name="B4D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E67" access="33333333" name="B4D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E66" access="33333333" name="B4D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E65" access="03113333" name="B4DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E64" access="33333333" name="B4EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E63" access="33333333" name="B4EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E62" access="33333033" name="B4SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E61" access="33333333" name="B4SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E60" access="33113333" name="B4CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E5F" access="33393331" name="CANCON_RO6" mclr="21111111" por="21111111" />
+    <sfr address="0x0E5E" access="11111111" name="CANSTAT_RO6" mclr="21111111" por="21111111" />
+    <sfr address="0x0E5D" access="33333333" name="B3D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5C" access="33333333" name="B3D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5B" access="33333333" name="B3D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5A" access="33333333" name="B3D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E59" access="33333333" name="B3D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E58" access="33333333" name="B3D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E57" access="33333333" name="B3D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E56" access="33333333" name="B3D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E55" access="03113333" name="B3DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E54" access="33333333" name="B3EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E53" access="33333333" name="B3EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E52" access="33333033" name="B3SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E51" access="33333333" name="B3SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E50" access="33113333" name="B3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E4F" access="33393331" name="CANCON_RO7" mclr="21111111" por="21111111" />
+    <sfr address="0x0E4E" access="11111111" name="CANSTAT_RO7" mclr="21111111" por="21111111" />
+    <sfr address="0x0E4D" access="33333333" name="B2D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4C" access="33333333" name="B2D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4B" access="33333333" name="B2D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4A" access="33333333" name="B2D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E49" access="33333333" name="B2D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E48" access="33333333" name="B2D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E47" access="33333333" name="B2D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E46" access="33333333" name="B2D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E45" access="03113333" name="B2DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E44" access="33333333" name="B2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E43" access="33333333" name="B2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E42" access="33333033" name="B2SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E41" access="33333333" name="B2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E40" access="33113333" name="B2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E3F" access="33393331" name="CANCON_RO8" mclr="21111111" por="21111111" />
+    <sfr address="0x0E3E" access="11111111" name="CANSTAT_RO8" mclr="21111111" por="21111111" />
+    <sfr address="0x0E3D" access="33333333" name="B1D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3C" access="33333333" name="B1D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3B" access="33333333" name="B1D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3A" access="33333333" name="B1D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E39" access="33333333" name="B1D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E38" access="33333333" name="B1D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E37" access="33333333" name="B1D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E36" access="33333333" name="B1D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E35" access="03113333" name="B1DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E34" access="33333333" name="B1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E33" access="33333333" name="B1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E32" access="33333033" name="B1SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E31" access="33333333" name="B1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E30" access="33113333" name="B1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E2F" access="33393331" name="CANCON_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2E" access="11111111" name="CANSTAT_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2D" access="33333333" name="B0D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2C" access="33333333" name="B0D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2B" access="33333333" name="B0D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2A" access="33333333" name="B0D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E29" access="33333333" name="B0D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E28" access="33333333" name="B0D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E27" access="33333333" name="B0D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E26" access="33333333" name="B0D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E25" access="03113333" name="B0DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E24" access="33333333" name="B0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E23" access="33333333" name="B0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E22" access="33333033" name="B0SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E21" access="33333333" name="B0SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E20" access="33113333" name="B0CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0DFC" access="00033300" name="TXBIE" mclr="00033300" por="00011100" />
+    <sfr address="0x0DFA" access="33333333" name="BIE0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF8" access="33333300" name="BSEL0" mclr="11111100" por="11111100" />
+    <sfr address="0x0DF3" access="33333333" name="MSEL3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF2" access="33333333" name="MSEL2" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF1" access="33333333" name="MSEL1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF0" access="33333333" name="MSEL0" mclr="12121111" por="12121111" />
+    <sfr address="0x0DE7" access="33333333" name="RXFBCON7" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE6" access="33333333" name="RXFBCON6" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE5" access="33333333" name="RXFBCON5" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE4" access="33333333" name="RXFBCON4" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE3" access="33333333" name="RXFBCON3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE2" access="33333333" name="RXFBCON2" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE1" access="33333333" name="RXFBCON1" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE0" access="33333333" name="RXFBCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD8" access="00033333" name="SDFLC" mclr="00011111" por="00011111" />
+    <sfr address="0x0DD5" access="33333333" name="RXFCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD4" access="33333333" name="RXFCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0D93" access="33333333" name="RXF15EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D92" access="33333333" name="RXF15EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D91" access="33303033" name="RXF15SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D90" access="33333333" name="RXF15SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8B" access="33333333" name="RXF14EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8A" access="33333333" name="RXF14EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D89" access="33303033" name="RXF14SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D88" access="33333333" name="RXF14SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D87" access="33333333" name="RXF13EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D86" access="33333333" name="RXF13EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D85" access="33303033" name="RXF13SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D84" access="33333333" name="RXF13SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D83" access="33333333" name="RXF12EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D82" access="33333333" name="RXF12EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D81" access="33303033" name="RXF12SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D80" access="33333333" name="RXF12SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7B" access="33333333" name="RXF11EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7A" access="33333333" name="RXF11EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D79" access="33303033" name="RXF11SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D78" access="33333333" name="RXF11SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D77" access="33333333" name="RXF10EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D76" access="33333333" name="RXF10EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D75" access="33303033" name="RXF10SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D74" access="33333333" name="RXF10SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D73" access="33333333" name="RXF9EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D72" access="33333333" name="RXF9EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D71" access="33303033" name="RXF9SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D70" access="33333333" name="RXF9SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6B" access="33333333" name="RXF8EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6A" access="33333333" name="RXF8EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D69" access="33303033" name="RXF8SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D68" access="33333333" name="RXF8SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D67" access="33333333" name="RXF7EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D66" access="33333333" name="RXF7EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D65" access="33303033" name="RXF7SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D64" access="33333333" name="RXF7SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D63" access="33333333" name="RXF6EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D62" access="33333333" name="RXF6EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D61" access="33303033" name="RXF6SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D60" access="33333333" name="RXF6SIDH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F25J10" unused_bank_mask="0x7FF0" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FAA" start="0x0FA8" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="12034433" por="10022211" />
+    <sfr address="0x0FA5" access="03000000" name="IPR3" mclr="02000000" por="02000000" />
+    <sfr address="0x0FA4" access="03000000" name="PIR3" mclr="01000000" por="01000000" />
+    <sfr address="0x0FA3" access="03000000" name="PIE3" mclr="01000000" por="01000000" />
+    <sfr address="0x0FA2" access="33003333" name="IPR2" mclr="22002002" por="22002002" />
+    <sfr address="0x0FA1" access="33003333" name="PIR2" mclr="11001001" por="11001001" />
+    <sfr address="0x0FA0" access="33003333" name="PIE2" mclr="11001001" por="11001001" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0FD3" access="30003033" name="OSCCON" mclr="01110100" por="01110100" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="00303333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="00303333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="00303333" name="TRISA" mclr="00202222" por="00202222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FB6" access="33333300" name="ECCP1AS" mclr="11111100" por="11111100" />
+    <sfr address="0x0FB7" access="30000000" name="PWM1CON" mclr="10000000" por="10000000" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F2610" unused_bank_mask="0x0000" >
+    <unused end="0x0F83" start="0x0F83" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8C" />
+    <unused end="0x0F9A" start="0x0F95" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="01110100" por="01110100" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33003333" name="IPR2" mclr="22002222" por="22002222" />
+    <sfr address="0x0FA1" access="33003333" name="PIR2" mclr="11001111" por="11001111" />
+    <sfr address="0x0FA0" access="33003333" name="PIE2" mclr="11001111" por="11001111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9B" access="30033333" name="OSCTUNE" mclr="10011111" por="10011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001000" name="PORTE" mclr="00003000" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FB6" access="33333300" name="ECCPAS1" mclr="11111100" por="11111100" />
+    <sfr address="0x0FB7" access="30000000" name="PWM1CON" mclr="10000000" por="10000000" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F2620" unused_bank_mask="0x0000" >
+    <unused end="0x0F83" start="0x0F83" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8C" />
+    <unused end="0x0F9A" start="0x0F95" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="12114111" por="12114111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="10011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001000" name="PORTE" mclr="00003000" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FB6" access="33333300" name="ECCPAS1" mclr="11111100" por="11111100" />
+    <sfr address="0x0FB7" access="30000000" name="PWM1CON" mclr="10000000" por="10000000" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FAA" access="00000033" name="EEADRH" mclr="00000011" por="00000011" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F2680" unused_bank_mask="0x0000" >
+    <unused end="0x0D59" start="0x0D00" />
+    <unused end="0x0D6F" start="0x0D6C" />
+    <unused end="0x0D7F" start="0x0D7C" />
+    <unused end="0x0D8F" start="0x0D8C" />
+    <unused end="0x0DD3" start="0x0D94" />
+    <unused end="0x0DD7" start="0x0DD6" />
+    <unused end="0x0DDF" start="0x0DD9" />
+    <unused end="0x0DEF" start="0x0DE8" />
+    <unused end="0x0DF7" start="0x0DF4" />
+    <unused end="0x0DF9" start="0x0DF9" />
+    <unused end="0x0DFB" start="0x0DFB" />
+    <unused end="0x0DFF" start="0x0DFD" />
+    <unused end="0x0E1F" start="0x0E00" />
+    <unused end="0x0EFF" start="0x0E80" />
+    <unused end="0x0F7F" start="0x0F78" />
+    <unused end="0x0F88" start="0x0F83" />
+    <unused end="0x0F91" start="0x0F8C" />
+    <unused end="0x0F9A" start="0x0F95" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB7" start="0x0FB6" />
+    <unused end="0x0FBC" start="0x0FBA" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
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+    <sfr address="0x0E71" access="33333333" name="B5SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E70" access="33113333" name="B5CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E6F" access="33393331" name="CANCON_RO5" mclr="21111111" por="21111111" />
+    <sfr address="0x0E6E" access="11111111" name="CANSTAT_RO5" mclr="21111111" por="21111111" />
+    <sfr address="0x0E6D" access="33333333" name="B4D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6C" access="33333333" name="B4D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6B" access="33333333" name="B4D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6A" access="33333333" name="B4D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E69" access="33333333" name="B4D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E68" access="33333333" name="B4D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E67" access="33333333" name="B4D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E66" access="33333333" name="B4D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E65" access="03113333" name="B4DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E64" access="33333333" name="B4EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E63" access="33333333" name="B4EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E62" access="33333033" name="B4SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E61" access="33333333" name="B4SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E60" access="33113333" name="B4CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E5F" access="33393331" name="CANCON_RO6" mclr="21111111" por="21111111" />
+    <sfr address="0x0E5E" access="11111111" name="CANSTAT_RO6" mclr="21111111" por="21111111" />
+    <sfr address="0x0E5D" access="33333333" name="B3D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5C" access="33333333" name="B3D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5B" access="33333333" name="B3D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5A" access="33333333" name="B3D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E59" access="33333333" name="B3D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E58" access="33333333" name="B3D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E57" access="33333333" name="B3D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E56" access="33333333" name="B3D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E55" access="03113333" name="B3DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E54" access="33333333" name="B3EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E53" access="33333333" name="B3EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E52" access="33333033" name="B3SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E51" access="33333333" name="B3SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E50" access="33113333" name="B3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E4F" access="33393331" name="CANCON_RO7" mclr="21111111" por="21111111" />
+    <sfr address="0x0E4E" access="11111111" name="CANSTAT_RO7" mclr="21111111" por="21111111" />
+    <sfr address="0x0E4D" access="33333333" name="B2D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4C" access="33333333" name="B2D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4B" access="33333333" name="B2D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4A" access="33333333" name="B2D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E49" access="33333333" name="B2D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E48" access="33333333" name="B2D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E47" access="33333333" name="B2D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E46" access="33333333" name="B2D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E45" access="03113333" name="B2DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E44" access="33333333" name="B2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E43" access="33333333" name="B2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E42" access="33333033" name="B2SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E41" access="33333333" name="B2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E40" access="33113333" name="B2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E3F" access="33393331" name="CANCON_RO8" mclr="21111111" por="21111111" />
+    <sfr address="0x0E3E" access="11111111" name="CANSTAT_RO8" mclr="21111111" por="21111111" />
+    <sfr address="0x0E3D" access="33333333" name="B1D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3C" access="33333333" name="B1D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3B" access="33333333" name="B1D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3A" access="33333333" name="B1D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E39" access="33333333" name="B1D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E38" access="33333333" name="B1D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E37" access="33333333" name="B1D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E36" access="33333333" name="B1D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E35" access="03113333" name="B1DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E34" access="33333333" name="B1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E33" access="33333333" name="B1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E32" access="33333033" name="B1SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E31" access="33333333" name="B1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E30" access="33113333" name="B1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E2F" access="33393331" name="CANCON_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2E" access="11111111" name="CANSTAT_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2D" access="33333333" name="B0D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2C" access="33333333" name="B0D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2B" access="33333333" name="B0D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2A" access="33333333" name="B0D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E29" access="33333333" name="B0D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E28" access="33333333" name="B0D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E27" access="33333333" name="B0D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E26" access="33333333" name="B0D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E25" access="03113333" name="B0DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E24" access="33333333" name="B0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E23" access="33333333" name="B0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E22" access="33333033" name="B0SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E21" access="33333333" name="B0SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E20" access="33113333" name="B0CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0DFC" access="00033300" name="TXBIE" mclr="00033300" por="00011100" />
+    <sfr address="0x0DFA" access="33333333" name="BIE0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF8" access="33333300" name="BSEL0" mclr="11111100" por="11111100" />
+    <sfr address="0x0DF3" access="33333333" name="MSEL3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF2" access="33333333" name="MSEL2" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF1" access="33333333" name="MSEL1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF0" access="33333333" name="MSEL0" mclr="12121111" por="12121111" />
+    <sfr address="0x0DE7" access="33333333" name="RXFBCON7" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE6" access="33333333" name="RXFBCON6" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE5" access="33333333" name="RXFBCON5" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE4" access="33333333" name="RXFBCON4" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE3" access="33333333" name="RXFBCON3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE2" access="33333333" name="RXFBCON2" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE1" access="33333333" name="RXFBCON1" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE0" access="33333333" name="RXFBCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD8" access="00033333" name="SDFLC" mclr="00011111" por="00011111" />
+    <sfr address="0x0DD5" access="33333333" name="RXFCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD4" access="33333333" name="RXFCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0D93" access="33333333" name="RXF15EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D92" access="33333333" name="RXF15EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D91" access="33303033" name="RXF15SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D90" access="33333333" name="RXF15SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8B" access="33333333" name="RXF14EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8A" access="33333333" name="RXF14EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D89" access="33303033" name="RXF14SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D88" access="33333333" name="RXF14SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D87" access="33333333" name="RXF13EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D86" access="33333333" name="RXF13EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D85" access="33303033" name="RXF13SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D84" access="33333333" name="RXF13SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D83" access="33333333" name="RXF12EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D82" access="33333333" name="RXF12EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D81" access="33303033" name="RXF12SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D80" access="33333333" name="RXF12SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7B" access="33333333" name="RXF11EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7A" access="33333333" name="RXF11EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D79" access="33303033" name="RXF11SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D78" access="33333333" name="RXF11SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D77" access="33333333" name="RXF10EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D76" access="33333333" name="RXF10EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D75" access="33303033" name="RXF10SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D74" access="33333333" name="RXF10SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D73" access="33333333" name="RXF9EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D72" access="33333333" name="RXF9EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D71" access="33303033" name="RXF9SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D70" access="33333333" name="RXF9SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6B" access="33333333" name="RXF8EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6A" access="33333333" name="RXF8EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D69" access="33303033" name="RXF8SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D68" access="33333333" name="RXF8SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D67" access="33333333" name="RXF7EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D66" access="33333333" name="RXF7EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D65" access="33303033" name="RXF7SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D64" access="33333333" name="RXF7SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D63" access="33333333" name="RXF6EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D62" access="33333333" name="RXF6EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D61" access="33303033" name="RXF6SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D60" access="33333333" name="RXF6SIDH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F2682" unused_bank_mask="0x0000" >
+    <unused end="0x0D59" start="0x0D00" />
+    <unused end="0x0D6F" start="0x0D6C" />
+    <unused end="0x0D7F" start="0x0D7C" />
+    <unused end="0x0D8F" start="0x0D8C" />
+    <unused end="0x0DD3" start="0x0D94" />
+    <unused end="0x0DD7" start="0x0DD6" />
+    <unused end="0x0DDF" start="0x0DD9" />
+    <unused end="0x0DEF" start="0x0DE8" />
+    <unused end="0x0DF7" start="0x0DF4" />
+    <unused end="0x0DF9" start="0x0DF9" />
+    <unused end="0x0DFB" start="0x0DFB" />
+    <unused end="0x0DFF" start="0x0DFD" />
+    <unused end="0x0E1F" start="0x0E00" />
+    <unused end="0x0EFF" start="0x0E80" />
+    <unused end="0x0F7F" start="0x0F78" />
+    <unused end="0x0F88" start="0x0F83" />
+    <unused end="0x0F91" start="0x0F8C" />
+    <unused end="0x0F9A" start="0x0F95" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB7" start="0x0FB6" />
+    <unused end="0x0FBC" start="0x0FBA" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="12113111" por="12113111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
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+    <sfr address="0x0E6D" access="33333333" name="B4D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6C" access="33333333" name="B4D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6B" access="33333333" name="B4D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6A" access="33333333" name="B4D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E69" access="33333333" name="B4D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E68" access="33333333" name="B4D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E67" access="33333333" name="B4D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E66" access="33333333" name="B4D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E65" access="03113333" name="B4DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E64" access="33333333" name="B4EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E63" access="33333333" name="B4EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E62" access="33333033" name="B4SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E61" access="33333333" name="B4SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E60" access="33113333" name="B4CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E5F" access="33393331" name="CANCON_RO6" mclr="21111111" por="21111111" />
+    <sfr address="0x0E5E" access="11111111" name="CANSTAT_RO6" mclr="21111111" por="21111111" />
+    <sfr address="0x0E5D" access="33333333" name="B3D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5C" access="33333333" name="B3D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5B" access="33333333" name="B3D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5A" access="33333333" name="B3D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E59" access="33333333" name="B3D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E58" access="33333333" name="B3D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E57" access="33333333" name="B3D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E56" access="33333333" name="B3D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E55" access="03113333" name="B3DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E54" access="33333333" name="B3EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E53" access="33333333" name="B3EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E52" access="33333033" name="B3SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E51" access="33333333" name="B3SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E50" access="33113333" name="B3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E4F" access="33393331" name="CANCON_RO7" mclr="21111111" por="21111111" />
+    <sfr address="0x0E4E" access="11111111" name="CANSTAT_RO7" mclr="21111111" por="21111111" />
+    <sfr address="0x0E4D" access="33333333" name="B2D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4C" access="33333333" name="B2D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4B" access="33333333" name="B2D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4A" access="33333333" name="B2D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E49" access="33333333" name="B2D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E48" access="33333333" name="B2D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E47" access="33333333" name="B2D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E46" access="33333333" name="B2D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E45" access="03113333" name="B2DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E44" access="33333333" name="B2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E43" access="33333333" name="B2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E42" access="33333033" name="B2SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E41" access="33333333" name="B2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E40" access="33113333" name="B2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E3F" access="33393331" name="CANCON_RO8" mclr="21111111" por="21111111" />
+    <sfr address="0x0E3E" access="11111111" name="CANSTAT_RO8" mclr="21111111" por="21111111" />
+    <sfr address="0x0E3D" access="33333333" name="B1D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3C" access="33333333" name="B1D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3B" access="33333333" name="B1D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3A" access="33333333" name="B1D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E39" access="33333333" name="B1D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E38" access="33333333" name="B1D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E37" access="33333333" name="B1D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E36" access="33333333" name="B1D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E35" access="03113333" name="B1DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E34" access="33333333" name="B1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E33" access="33333333" name="B1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E32" access="33333033" name="B1SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E31" access="33333333" name="B1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E30" access="33113333" name="B1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E2F" access="33393331" name="CANCON_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2E" access="11111111" name="CANSTAT_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2D" access="33333333" name="B0D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2C" access="33333333" name="B0D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2B" access="33333333" name="B0D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2A" access="33333333" name="B0D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E29" access="33333333" name="B0D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E28" access="33333333" name="B0D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E27" access="33333333" name="B0D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E26" access="33333333" name="B0D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E25" access="03113333" name="B0DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E24" access="33333333" name="B0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E23" access="33333333" name="B0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E22" access="33333033" name="B0SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E21" access="33333333" name="B0SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E20" access="33113333" name="B0CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0DFC" access="00033300" name="TXBIE" mclr="00033300" por="00011100" />
+    <sfr address="0x0DFA" access="33333333" name="BIE0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF8" access="33333300" name="BSEL0" mclr="11111100" por="11111100" />
+    <sfr address="0x0DF3" access="33333333" name="MSEL3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF2" access="33333333" name="MSEL2" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF1" access="33333333" name="MSEL1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF0" access="33333333" name="MSEL0" mclr="12121111" por="12121111" />
+    <sfr address="0x0DE7" access="33333333" name="RXFBCON7" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE6" access="33333333" name="RXFBCON6" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE5" access="33333333" name="RXFBCON5" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE4" access="33333333" name="RXFBCON4" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE3" access="33333333" name="RXFBCON3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE2" access="33333333" name="RXFBCON2" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE1" access="33333333" name="RXFBCON1" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE0" access="33333333" name="RXFBCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD8" access="00033333" name="SDFLC" mclr="00011111" por="00011111" />
+    <sfr address="0x0DD5" access="33333333" name="RXFCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD4" access="33333333" name="RXFCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0D93" access="33333333" name="RXF15EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D92" access="33333333" name="RXF15EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D91" access="33303033" name="RXF15SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D90" access="33333333" name="RXF15SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8B" access="33333333" name="RXF14EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8A" access="33333333" name="RXF14EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D89" access="33303033" name="RXF14SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D88" access="33333333" name="RXF14SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D87" access="33333333" name="RXF13EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D86" access="33333333" name="RXF13EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D85" access="33303033" name="RXF13SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D84" access="33333333" name="RXF13SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D83" access="33333333" name="RXF12EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D82" access="33333333" name="RXF12EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D81" access="33303033" name="RXF12SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D80" access="33333333" name="RXF12SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7B" access="33333333" name="RXF11EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7A" access="33333333" name="RXF11EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D79" access="33303033" name="RXF11SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D78" access="33333333" name="RXF11SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D77" access="33333333" name="RXF10EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D76" access="33333333" name="RXF10EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D75" access="33303033" name="RXF10SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D74" access="33333333" name="RXF10SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D73" access="33333333" name="RXF9EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D72" access="33333333" name="RXF9EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D71" access="33303033" name="RXF9SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D70" access="33333333" name="RXF9SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6B" access="33333333" name="RXF8EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6A" access="33333333" name="RXF8EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D69" access="33303033" name="RXF8SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D68" access="33333333" name="RXF8SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D67" access="33333333" name="RXF7EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D66" access="33333333" name="RXF7EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D65" access="33303033" name="RXF7SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D64" access="33333333" name="RXF7SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D63" access="33333333" name="RXF6EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D62" access="33333333" name="RXF6EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D61" access="33303033" name="RXF6SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D60" access="33333333" name="RXF6SIDH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F2685" unused_bank_mask="0x0000" >
+    <unused end="0x0D59" start="0x0D00" />
+    <unused end="0x0D6F" start="0x0D6C" />
+    <unused end="0x0D7F" start="0x0D7C" />
+    <unused end="0x0D8F" start="0x0D8C" />
+    <unused end="0x0DD3" start="0x0D94" />
+    <unused end="0x0DD7" start="0x0DD6" />
+    <unused end="0x0DDF" start="0x0DD9" />
+    <unused end="0x0DEF" start="0x0DE8" />
+    <unused end="0x0DF7" start="0x0DF4" />
+    <unused end="0x0DF9" start="0x0DF9" />
+    <unused end="0x0DFB" start="0x0DFB" />
+    <unused end="0x0DFF" start="0x0DFD" />
+    <unused end="0x0E1F" start="0x0E00" />
+    <unused end="0x0EFF" start="0x0E80" />
+    <unused end="0x0F7F" start="0x0F78" />
+    <unused end="0x0F88" start="0x0F83" />
+    <unused end="0x0F91" start="0x0F8C" />
+    <unused end="0x0F9A" start="0x0F95" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB7" start="0x0FB6" />
+    <unused end="0x0FBC" start="0x0FBA" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="12113111" por="12113111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33333333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
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+    <sfr address="0x0E69" access="33333333" name="B4D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E68" access="33333333" name="B4D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E67" access="33333333" name="B4D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E66" access="33333333" name="B4D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E65" access="03113333" name="B4DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E64" access="33333333" name="B4EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E63" access="33333333" name="B4EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E62" access="33333033" name="B4SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E61" access="33333333" name="B4SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E60" access="33113333" name="B4CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E5F" access="33393331" name="CANCON_RO6" mclr="21111111" por="21111111" />
+    <sfr address="0x0E5E" access="11111111" name="CANSTAT_RO6" mclr="21111111" por="21111111" />
+    <sfr address="0x0E5D" access="33333333" name="B3D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5C" access="33333333" name="B3D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5B" access="33333333" name="B3D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5A" access="33333333" name="B3D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E59" access="33333333" name="B3D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E58" access="33333333" name="B3D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E57" access="33333333" name="B3D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E56" access="33333333" name="B3D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E55" access="03113333" name="B3DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E54" access="33333333" name="B3EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E53" access="33333333" name="B3EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E52" access="33333033" name="B3SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E51" access="33333333" name="B3SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E50" access="33113333" name="B3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E4F" access="33393331" name="CANCON_RO7" mclr="21111111" por="21111111" />
+    <sfr address="0x0E4E" access="11111111" name="CANSTAT_RO7" mclr="21111111" por="21111111" />
+    <sfr address="0x0E4D" access="33333333" name="B2D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4C" access="33333333" name="B2D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4B" access="33333333" name="B2D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4A" access="33333333" name="B2D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E49" access="33333333" name="B2D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E48" access="33333333" name="B2D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E47" access="33333333" name="B2D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E46" access="33333333" name="B2D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E45" access="03113333" name="B2DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E44" access="33333333" name="B2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E43" access="33333333" name="B2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E42" access="33333033" name="B2SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E41" access="33333333" name="B2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E40" access="33113333" name="B2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E3F" access="33393331" name="CANCON_RO8" mclr="21111111" por="21111111" />
+    <sfr address="0x0E3E" access="11111111" name="CANSTAT_RO8" mclr="21111111" por="21111111" />
+    <sfr address="0x0E3D" access="33333333" name="B1D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3C" access="33333333" name="B1D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3B" access="33333333" name="B1D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3A" access="33333333" name="B1D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E39" access="33333333" name="B1D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E38" access="33333333" name="B1D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E37" access="33333333" name="B1D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E36" access="33333333" name="B1D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E35" access="03113333" name="B1DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E34" access="33333333" name="B1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E33" access="33333333" name="B1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E32" access="33333033" name="B1SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E31" access="33333333" name="B1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E30" access="33113333" name="B1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E2F" access="33393331" name="CANCON_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2E" access="11111111" name="CANSTAT_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2D" access="33333333" name="B0D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2C" access="33333333" name="B0D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2B" access="33333333" name="B0D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2A" access="33333333" name="B0D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E29" access="33333333" name="B0D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E28" access="33333333" name="B0D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E27" access="33333333" name="B0D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E26" access="33333333" name="B0D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E25" access="03113333" name="B0DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E24" access="33333333" name="B0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E23" access="33333333" name="B0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E22" access="33333033" name="B0SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E21" access="33333333" name="B0SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E20" access="33113333" name="B0CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0DFC" access="00033300" name="TXBIE" mclr="00033300" por="00011100" />
+    <sfr address="0x0DFA" access="33333333" name="BIE0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF8" access="33333300" name="BSEL0" mclr="11111100" por="11111100" />
+    <sfr address="0x0DF3" access="33333333" name="MSEL3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF2" access="33333333" name="MSEL2" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF1" access="33333333" name="MSEL1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF0" access="33333333" name="MSEL0" mclr="12121111" por="12121111" />
+    <sfr address="0x0DE7" access="33333333" name="RXFBCON7" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE6" access="33333333" name="RXFBCON6" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE5" access="33333333" name="RXFBCON5" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE4" access="33333333" name="RXFBCON4" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE3" access="33333333" name="RXFBCON3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE2" access="33333333" name="RXFBCON2" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE1" access="33333333" name="RXFBCON1" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE0" access="33333333" name="RXFBCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD8" access="00033333" name="SDFLC" mclr="00011111" por="00011111" />
+    <sfr address="0x0DD5" access="33333333" name="RXFCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD4" access="33333333" name="RXFCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0D93" access="33333333" name="RXF15EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D92" access="33333333" name="RXF15EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D91" access="33303033" name="RXF15SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D90" access="33333333" name="RXF15SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8B" access="33333333" name="RXF14EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8A" access="33333333" name="RXF14EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D89" access="33303033" name="RXF14SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D88" access="33333333" name="RXF14SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D87" access="33333333" name="RXF13EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D86" access="33333333" name="RXF13EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D85" access="33303033" name="RXF13SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D84" access="33333333" name="RXF13SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D83" access="33333333" name="RXF12EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D82" access="33333333" name="RXF12EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D81" access="33303033" name="RXF12SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D80" access="33333333" name="RXF12SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7B" access="33333333" name="RXF11EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7A" access="33333333" name="RXF11EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D79" access="33303033" name="RXF11SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D78" access="33333333" name="RXF11SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D77" access="33333333" name="RXF10EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D76" access="33333333" name="RXF10EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D75" access="33303033" name="RXF10SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D74" access="33333333" name="RXF10SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D73" access="33333333" name="RXF9EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D72" access="33333333" name="RXF9EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D71" access="33303033" name="RXF9SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D70" access="33333333" name="RXF9SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6B" access="33333333" name="RXF8EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6A" access="33333333" name="RXF8EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D69" access="33303033" name="RXF8SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D68" access="33333333" name="RXF8SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D67" access="33333333" name="RXF7EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D66" access="33333333" name="RXF7EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D65" access="33303033" name="RXF7SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D64" access="33333333" name="RXF7SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D63" access="33333333" name="RXF6EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D62" access="33333333" name="RXF6EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D61" access="33303033" name="RXF6SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D60" access="33333333" name="RXF6SIDH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F4220" unused_bank_mask="0x7FFC" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB8" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="11111141" por="11114111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9B" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCPAS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33303333" name="CVRCON" mclr="11101111" por="11101111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F4221" unused_bank_mask="0x7FFC" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="11111141" por="11114111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9B" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCPAS1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33303333" name="CVRCON" mclr="11101111" por="11101111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0FB8" access="31333033" name="BAUDCON" mclr="12111011" por="12111011" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F4320" unused_bank_mask="0x7FFC" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB8" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="11111141" por="11114111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9B" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCPAS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33303333" name="CVRCON" mclr="11101111" por="11101111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F4321" unused_bank_mask="0x7FFC" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="11114111" por="11114111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9B" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCPAS1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33303333" name="CVRCON" mclr="11101111" por="11101111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0FB8" access="31333033" name="BAUDCON" mclr="12111011" por="12111011" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F4331" unused_bank_mask="0x7FF8" >
+    <unused end="0x0F5F" start="0x0F00" />
+    <unused end="0x0F86" start="0x0F85" />
+    <unused end="0x0F8F" start="0x0F8E" />
+    <unused end="0x0F98" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FB5" start="0x0FB1" />
+    <unused end="0x0FC5" start="0x0FC5" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="11111113" name="WDTCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10044433" por="10022244" />
+    <sfr address="0x0FA5" access="00033333" name="IPR3" mclr="00022222" por="00022222" />
+    <sfr address="0x0FA4" access="00033333" name="PIR3" mclr="00011111" por="00011111" />
+    <sfr address="0x0FA3" access="00033333" name="PIE3" mclr="00011111" por="00011111" />
+    <sfr address="0x0FA2" access="30030303" name="IPR2" mclr="20020202" por="20020202" />
+    <sfr address="0x0FA1" access="30030303" name="PIR2" mclr="10010101" por="10010101" />
+    <sfr address="0x0FA0" access="30030303" name="PIE2" mclr="10010101" por="10010101" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9B" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33111111" por="00111111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001333" name="PORTE" mclr="00003111" por="00000111" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="00000333" name="TRISE" mclr="00000222" por="00000222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="33031111" name="ADCON1" mclr="11011111" por="11011111" />
+    <sfr address="0x0FC0" access="33333333" name="ADCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9A" access="33033333" name="ADCON3" mclr="11011111" por="11011111" />
+    <sfr address="0x0F99" access="33333333" name="ADCHS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB9" access="00000003" name="ANSEL1" mclr="00000002" por="00000002" />
+    <sfr address="0x0FB8" access="33333333" name="ANSEL0" mclr="22222222" por="22222222" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="33331133" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB7" access="33333333" name="T5CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F90" size="2" name="PR5" />
+    <sfr address="0x0F91" access="33333333" name="PR5H" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="PR5L" mclr="22222222" por="22222222" />
+    <combined address="0x0F87" size="2" name="TMR5" />
+    <sfr address="0x0F88" access="33333333" name="TMR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="TMR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0FAA" access="01033033" name="BAUDCTL" mclr="02021011" por="02021011" />
+    <sfr address="0x0F7F" access="33333333" name="PTCON0" mclr="33333333" por="11111111" />
+    <sfr address="0x0F7E" access="31000000" name="PTCON1" mclr="11000000" por="11000000" />
+    <sfr address="0x0F7D" access="33333333" name="PTMRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F7C" access="00003333" name="PTMRH" mclr="00001111" por="00001111" />
+    <sfr address="0x0F7B" access="33333333" name="PTPERL" mclr="22222222" por="22222222" />
+    <sfr address="0x0F7A" access="00003333" name="PTPERH" mclr="00002222" por="00002222" />
+    <sfr address="0x0F79" access="33333333" name="PDC0L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F78" access="00333333" name="PDC0H" mclr="00111111" por="00111111" />
+    <sfr address="0x0F77" access="33333333" name="PDC1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F76" access="00333333" name="PDC1H" mclr="00111111" por="00111111" />
+    <sfr address="0x0F75" access="33333333" name="PDC2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F74" access="00333333" name="PDC2H" mclr="00111111" por="00111111" />
+    <sfr address="0x0F73" access="33333333" name="PDC3L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F72" access="00333333" name="PDC3H" mclr="00111111" por="00111111" />
+    <sfr address="0x0F71" access="33333333" name="SEVTCMPL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F70" access="00003333" name="SEVTCMPH" mclr="00001111" por="00001111" />
+    <sfr address="0x0F6F" access="03333333" name="PWMCON0" mclr="02121111" por="02121111" />
+    <sfr address="0x0F6E" access="33333033" name="PWMCON1" mclr="11111011" por="11111011" />
+    <sfr address="0x0F6D" access="33333333" name="DTCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="03333333" name="FLTCONFIG" mclr="01111111" por="01111111" />
+    <sfr address="0x0F6B" access="33333333" name="OVDCOND" mclr="22222222" por="22222222" />
+    <sfr address="0x0F6A" access="33333333" name="OVDCONS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="03303333" name="CAP1CON" mclr="02101111" por="02101111" />
+    <sfr address="0x0F62" access="03303333" name="CAP2CON" mclr="02101111" por="02101111" />
+    <sfr address="0x0F61" access="03303333" name="CAP3CON" mclr="02101111" por="02101111" />
+    <sfr address="0x0FB6" access="30333333" name="QEICON" mclr="10111111" por="10111111" />
+    <sfr address="0x0F60" access="03333333" name="DFLTCON" mclr="01111111" por="01111111" />
+    <sfr address="0x0F69" access="33333333" name="CAP1BUFH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F69" access="33333333" name="VELRH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F68" access="33333333" name="CAP1BUFL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F68" access="33333333" name="VELRL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="CAP2BUFH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="POSCNTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F66" access="33333333" name="CAP2BUFL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F66" access="33333333" name="POSCNTL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="CAP3BUFH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="MAXCNTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F64" access="33333333" name="CAP3BUFL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F64" access="33333333" name="MAXCNTL" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F4410" unused_bank_mask="0x7FF8" >
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="01110100" por="01110100" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F442" unused_bank_mask="0x7FF8" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9C" start="0x0F97" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB4" />
+    <unused end="0x0FC0" start="0x0FC0" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00000003" name="OSCCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10044433" por="10042211" />
+    <sfr address="0x0FA2" access="00033333" name="IPR2" mclr="00022222" por="00022222" />
+    <sfr address="0x0FA1" access="00033333" name="PIR2" mclr="00011111" por="00011111" />
+    <sfr address="0x0FA0" access="00033333" name="PIE2" mclr="00011111" por="00011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0FC1" access="33003333" name="ADCON1" mclr="11001111" por="11001111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30333333" name="T1CON" mclr="30333333" por="10111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F4420" unused_bank_mask="0x7FF8" >
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD3" access="33330100" name="OSCCON" mclr="11110100" por="12110100" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
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+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F4423" unused_bank_mask="0x7FF8" >
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
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+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
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+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
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+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="03330303" name="INTCON2" mclr="02220202" por="02220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
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+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
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+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
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+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="01110100" por="01110100" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
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+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F4431" unused_bank_mask="0x7FF8" >
+    <unused end="0x0F5F" start="0x0F00" />
+    <unused end="0x0F86" start="0x0F85" />
+    <unused end="0x0F8F" start="0x0F8E" />
+    <unused end="0x0F98" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FB5" start="0x0FB1" />
+    <unused end="0x0FC5" start="0x0FC5" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="11111113" name="WDTCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10044433" por="10022244" />
+    <sfr address="0x0FA5" access="00033333" name="IPR3" mclr="00022222" por="00022222" />
+    <sfr address="0x0FA4" access="00033333" name="PIR3" mclr="00011111" por="00011111" />
+    <sfr address="0x0FA3" access="00033333" name="PIE3" mclr="00011111" por="00011111" />
+    <sfr address="0x0FA2" access="30030303" name="IPR2" mclr="20020202" por="20020202" />
+    <sfr address="0x0FA1" access="30030303" name="PIR2" mclr="10010101" por="10010101" />
+    <sfr address="0x0FA0" access="30030303" name="PIE2" mclr="10010101" por="10010101" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9B" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33111111" por="00111111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001333" name="PORTE" mclr="00003111" por="00000111" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="00000333" name="TRISE" mclr="00000222" por="00000222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="33031111" name="ADCON1" mclr="11011111" por="11011111" />
+    <sfr address="0x0FC0" access="33333333" name="ADCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9A" access="33033333" name="ADCON3" mclr="11011111" por="11011111" />
+    <sfr address="0x0F99" access="33333333" name="ADCHS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB9" access="00000003" name="ANSEL1" mclr="00000002" por="00000002" />
+    <sfr address="0x0FB8" access="33333333" name="ANSEL0" mclr="22222222" por="22222222" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="33331133" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB7" access="33333333" name="T5CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F90" size="2" name="PR5" />
+    <sfr address="0x0F91" access="33333333" name="PR5H" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="PR5L" mclr="22222222" por="22222222" />
+    <combined address="0x0F87" size="2" name="TMR5" />
+    <sfr address="0x0F88" access="33333333" name="TMR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="TMR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="33333333" por="00000000" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0FAA" access="01033033" name="BAUDCTL" mclr="02021011" por="02021011" />
+    <sfr address="0x0F7F" access="33333333" name="PTCON0" mclr="33333333" por="11111111" />
+    <sfr address="0x0F7E" access="31000000" name="PTCON1" mclr="11000000" por="11000000" />
+    <sfr address="0x0F7D" access="33333333" name="PTMRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F7C" access="00003333" name="PTMRH" mclr="00001111" por="00001111" />
+    <sfr address="0x0F7B" access="33333333" name="PTPERL" mclr="22222222" por="22222222" />
+    <sfr address="0x0F7A" access="00003333" name="PTPERH" mclr="00002222" por="00002222" />
+    <sfr address="0x0F79" access="33333333" name="PDC0L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F78" access="00333333" name="PDC0H" mclr="00111111" por="00111111" />
+    <sfr address="0x0F77" access="33333333" name="PDC1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F76" access="00333333" name="PDC1H" mclr="00111111" por="00111111" />
+    <sfr address="0x0F75" access="33333333" name="PDC2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F74" access="00333333" name="PDC2H" mclr="00111111" por="00111111" />
+    <sfr address="0x0F73" access="33333333" name="PDC3L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F72" access="00333333" name="PDC3H" mclr="00111111" por="00111111" />
+    <sfr address="0x0F71" access="33333333" name="SEVTCMPL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F70" access="00003333" name="SEVTCMPH" mclr="00001111" por="00001111" />
+    <sfr address="0x0F6F" access="03333333" name="PWMCON0" mclr="02121111" por="02121111" />
+    <sfr address="0x0F6E" access="33333033" name="PWMCON1" mclr="11111011" por="11111011" />
+    <sfr address="0x0F6D" access="33333333" name="DTCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="03333333" name="FLTCONFIG" mclr="01111111" por="01111111" />
+    <sfr address="0x0F6B" access="33333333" name="OVDCOND" mclr="22222222" por="22222222" />
+    <sfr address="0x0F6A" access="33333333" name="OVDCONS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="03303333" name="CAP1CON" mclr="02101111" por="02101111" />
+    <sfr address="0x0F62" access="03303333" name="CAP2CON" mclr="02101111" por="02101111" />
+    <sfr address="0x0F61" access="03303333" name="CAP3CON" mclr="02101111" por="02101111" />
+    <sfr address="0x0FB6" access="30333333" name="QEICON" mclr="10111111" por="10111111" />
+    <sfr address="0x0F60" access="03333333" name="DFLTCON" mclr="01111111" por="01111111" />
+    <sfr address="0x0F69" access="33333333" name="CAP1BUFH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F69" access="33333333" name="VELRH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F68" access="33333333" name="CAP1BUFL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F68" access="33333333" name="VELRL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="CAP2BUFH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="POSCNTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F66" access="33333333" name="CAP2BUFL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F66" access="33333333" name="POSCNTL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="CAP3BUFH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="MAXCNTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F64" access="33333333" name="CAP3BUFL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F64" access="33333333" name="MAXCNTL" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F4439" unused_bank_mask="0x7FF8" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9C" start="0x0F97" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB4" />
+    <unused end="0x0FC0" start="0x0FC0" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00000003" name="OSCCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA2" access="00033330" name="IPR2" mclr="00022220" por="00022220" />
+    <sfr address="0x0FA1" access="00033330" name="PIR2" mclr="00011110" por="00011110" />
+    <sfr address="0x0FA0" access="00033330" name="PIE2" mclr="00011110" por="00011110" />
+    <sfr address="0x0F9F" access="33333033" name="IPR1" mclr="22222022" por="22222022" />
+    <sfr address="0x0F9E" access="33113033" name="PIR1" mclr="11111011" por="11111011" />
+    <sfr address="0x0F9D" access="33333033" name="PIE1" mclr="11111011" por="11111011" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0FC1" access="33003333" name="ADCON1" mclr="11001111" por="11001111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30330333" name="T1CON" mclr="30330333" por="10110111" />
+    <sfr address="0x0FCC" access="11111111" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="11111111" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="11111111" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="30330333" name="T3CON" mclr="30330333" por="10110111" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F4450" unused_bank_mask="0x7FEC" >
+    <unused end="0x0F5F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9C" start="0x0F97" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FA8" />
+    <unused end="0x0FB5" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FC5" start="0x0FC9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="03330303" name="INTCON2" mclr="02220202" por="02220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
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+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="30300300" name="IPR2" mclr="20200200" por="20200200" />
+    <sfr address="0x0FA1" access="30300300" name="PIR2" mclr="10100100" por="10100100" />
+    <sfr address="0x0FA0" access="30300300" name="PIE2" mclr="10100100" por="10100100" />
+    <sfr address="0x0F9F" access="03330333" name="IPR1" mclr="02220222" por="02220222" />
+    <sfr address="0x0F9E" access="03110333" name="PIR1" mclr="01110111" por="01110111" />
+    <sfr address="0x0F9D" access="03330333" name="PIE1" mclr="01110111" por="01110111" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="01110100" por="01110100" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON1" mclr="12111011" por="12011011" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7F" access="00033333" name="UEP15" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7E" access="00033333" name="UEP14" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7D" access="00033333" name="UEP13" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7C" access="00033333" name="UEP12" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7B" access="00033333" name="UEP11" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7A" access="00033333" name="UEP10" mclr="00011111" por="00011111" />
+    <sfr address="0x0F79" access="00033333" name="UEP9" mclr="00011111" por="00011111" />
+    <sfr address="0x0F78" access="00033333" name="UEP8" mclr="00011111" por="00011111" />
+    <sfr address="0x0F77" access="00033333" name="UEP7" mclr="00011111" por="00011111" />
+    <sfr address="0x0F76" access="00033333" name="UEP6" mclr="00011111" por="00011111" />
+    <sfr address="0x0F75" access="00033333" name="UEP5" mclr="00011111" por="00011111" />
+    <sfr address="0x0F74" access="00033333" name="UEP4" mclr="00011111" por="00011111" />
+    <sfr address="0x0F73" access="00033333" name="UEP3" mclr="00011111" por="00011111" />
+    <sfr address="0x0F72" access="00033333" name="UEP2" mclr="00011111" por="00011111" />
+    <sfr address="0x0F71" access="00033333" name="UEP1" mclr="00011111" por="00011111" />
+    <sfr address="0x0F70" access="00033333" name="UEP0" mclr="00011111" por="00011111" />
+    <sfr address="0x0F6F" access="33033333" name="UCFG" mclr="11011111" por="11011111" />
+    <sfr address="0x0F6E" access="03333333" name="UADDR" mclr="01111111" por="01111111" />
+    <sfr address="0x0F6D" access="03153330" name="UCON" mclr="01011110" por="01011110" />
+    <sfr address="0x0F6C" access="01111110" name="USTAT" mclr="00000000" por="00000000" />
+    <sfr address="0x0F6B" access="30033333" name="UEIE" mclr="10011111" por="10011111" />
+    <sfr address="0x0F6A" access="50055555" name="UEIR" mclr="10011111" por="10011111" />
+    <sfr address="0x0F69" access="03333333" name="UIE" mclr="01111111" por="01111111" />
+    <sfr address="0x0F68" access="03333313" name="UIR" mclr="01111111" por="01111111" />
+    <combined address="0x0F66" size="2" name="UFRM" />
+    <sfr address="0x0F67" access="00000111" name="UFRMH" mclr="00000000" por="00000000" />
+    <sfr address="0x0F66" access="11111111" name="UFRML" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="03033390" name="EECON1" mclr="03013110" por="00010110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F4455" unused_bank_mask="0x7F00" >
+    <unused end="0x0F5F" start="0x0F00" />
+    <unused end="0x0F61" start="0x0F60" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="30133333" name="HLVDCON" mclr="10111212" por="10111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33333333" name="IPR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA1" access="33333333" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33333333" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD3" access="33333133" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="30033333" name="OSCTUNE" mclr="10011111" por="10011111" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33330333" name="PORTC" mclr="33330333" por="00000000" />
+    <sfr address="0x0F8B" access="33000333" name="LATC" mclr="33000333" por="00000000" />
+    <sfr address="0x0F94" access="33000333" name="TRISC" mclr="22000222" por="22000222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="30001333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="00000333" name="TRISE" mclr="00000222" por="00000222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="ECCP1DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F65" access="00000033" name="SPPCON" mclr="00000011" por="00000011" />
+    <sfr address="0x0F64" access="33033333" name="SPPEPS" mclr="11011111" por="11011111" />
+    <sfr address="0x0F63" access="33333333" name="SPPCFG" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="SPPDATA" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7F" access="00033333" name="UEP15" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7E" access="00033333" name="UEP14" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7D" access="00033333" name="UEP13" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7C" access="00033333" name="UEP12" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7B" access="00033333" name="UEP11" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7A" access="00033333" name="UEP10" mclr="00011111" por="00011111" />
+    <sfr address="0x0F79" access="00033333" name="UEP9" mclr="00011111" por="00011111" />
+    <sfr address="0x0F78" access="00033333" name="UEP8" mclr="00011111" por="00011111" />
+    <sfr address="0x0F77" access="00033333" name="UEP7" mclr="00011111" por="00011111" />
+    <sfr address="0x0F76" access="00033333" name="UEP6" mclr="00011111" por="00011111" />
+    <sfr address="0x0F75" access="00033333" name="UEP5" mclr="00011111" por="00011111" />
+    <sfr address="0x0F74" access="00033333" name="UEP4" mclr="00011111" por="00011111" />
+    <sfr address="0x0F73" access="00033333" name="UEP3" mclr="00011111" por="00011111" />
+    <sfr address="0x0F72" access="00033333" name="UEP2" mclr="00011111" por="00011111" />
+    <sfr address="0x0F71" access="00033333" name="UEP1" mclr="00011111" por="00011111" />
+    <sfr address="0x0F70" access="00033333" name="UEP0" mclr="00011111" por="00011111" />
+    <sfr address="0x0F6F" access="33033333" name="UCFG" mclr="11011111" por="11011111" />
+    <sfr address="0x0F6E" access="03333333" name="UADDR" mclr="01111111" por="01111111" />
+    <sfr address="0x0F6D" access="03153330" name="UCON" mclr="01011110" por="01011110" />
+    <sfr address="0x0F6C" access="01111110" name="USTAT" mclr="00000000" por="00000000" />
+    <sfr address="0x0F6B" access="30033333" name="UEIE" mclr="10011111" por="10011111" />
+    <sfr address="0x0F6A" access="50055555" name="UEIR" mclr="10011111" por="10011111" />
+    <sfr address="0x0F69" access="03333333" name="UIE" mclr="01111111" por="01111111" />
+    <sfr address="0x0F68" access="03333313" name="UIR" mclr="01111111" por="01111111" />
+    <combined address="0x0F66" size="2" name="UFRM" />
+    <sfr address="0x0F67" access="00000111" name="UFRMH" mclr="00000000" por="00000000" />
+    <sfr address="0x0F66" access="11111111" name="UFRML" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F448" unused_bank_mask="0x7FF8" >
+    <mirror>
+      <range end="0x0F2E" start="0x0F2E" />
+      <range end="0x0F3E" start="0x0F3E" />
+      <range end="0x0F4E" start="0x0F4E" />
+      <range end="0x0F5E" start="0x0F5E" />
+    </mirror>
+    <unused end="0x0F2F" start="0x0F2F" />
+    <unused end="0x0F3F" start="0x0F3F" />
+    <unused end="0x0F4F" start="0x0F4F" />
+    <unused end="0x0F5F" start="0x0F5F" />
+    <unused end="0x0F7F" start="0x0F77" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9C" start="0x0F97" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB9" start="0x0FB8" />
+    <unused end="0x0FC0" start="0x0FC0" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
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+    <sfr address="0x0F0D" access="33303033" name="RXF3SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F0C" access="33333333" name="RXF3SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0B" access="33333333" name="RXF2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0A" access="33333333" name="RXF2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F09" access="33303033" name="RXF2SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F08" access="33333333" name="RXF2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F07" access="33333333" name="RXF1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F06" access="33333333" name="RXF1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F05" access="33303033" name="RXF1SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F04" access="33333333" name="RXF1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F03" access="33333333" name="RXF0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F02" access="33333333" name="RXF0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F01" access="33303033" name="RXF0SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F00" access="33333333" name="RXF0SIDH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F4480" unused_bank_mask="0x1FF8" >
+    <unused end="0x0D6F" start="0x0D6C" />
+    <unused end="0x0D7F" start="0x0D7C" />
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+    <unused end="0x0FD4" start="0x0FD4" />
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+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
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+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
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+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
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+    <sfr address="0x0F3C" access="33333333" name="TXB1D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F3B" access="33333333" name="TXB1D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0F3A" access="33333333" name="TXB1D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0F39" access="33333333" name="TXB1D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0F38" access="33333333" name="TXB1D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0F37" access="33333333" name="TXB1D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0F36" access="33333333" name="TXB1D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0F35" access="03003333" name="TXB1DLC" mclr="03003333" por="00000000" />
+    <combined address="0x0F33" size="2" name="TXB1EID" />
+    <sfr address="0x0F34" access="33333333" name="TXB1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F33" access="33333333" name="TXB1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F32" access="33303033" name="TXB1SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F31" access="33333333" name="TXB1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F30" access="33333033" name="TXB1CON" mclr="33333033" por="00000000" />
+    <sfr address="0x0F2D" access="33333333" name="TXB2D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F2C" access="33333333" name="TXB2D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F2B" access="33333333" name="TXB2D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0F2A" access="33333333" name="TXB2D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0F29" access="33333333" name="TXB2D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0F28" access="33333333" name="TXB2D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0F27" access="33333333" name="TXB2D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0F26" access="33333333" name="TXB2D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0F25" access="03003333" name="TXB2DLC" mclr="03003333" por="00000000" />
+    <combined address="0x0F23" size="2" name="TXB2EID" />
+    <sfr address="0x0F24" access="33333333" name="TXB2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F23" access="33333333" name="TXB2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F22" access="33303033" name="TXB2SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F21" access="33333333" name="TXB2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F20" access="33333033" name="TXB2CON" mclr="33333033" por="00000000" />
+    <combined address="0x0F1E" size="2" name="RXM1EID" />
+    <sfr address="0x0F1F" access="33333333" name="RXM1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F1E" access="33333333" name="RXM1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F1D" access="33303033" name="RXM1SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F1C" access="33333333" name="RXM1SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0F1A" size="2" name="RXM0EID" />
+    <sfr address="0x0F1B" access="33333333" name="RXM0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F1A" access="33333333" name="RXM0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F19" access="33303033" name="RXM0SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F18" access="33333333" name="RXM0SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0F16" size="2" name="RXF5EID" />
+    <sfr address="0x0F17" access="33333333" name="RXF5EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F16" access="33333333" name="RXF5EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F15" access="33303033" name="RXF5SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F14" access="33333333" name="RXF5SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0F12" size="2" name="RXF4EID" />
+    <sfr address="0x0F13" access="33333333" name="RXF4EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F12" access="33333333" name="RXF4EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F11" access="33303033" name="RXF4SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F10" access="33333333" name="RXF4SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0F0E" size="2" name="RXF3EID" />
+    <sfr address="0x0F0F" access="33333333" name="RXF3EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0E" access="33333333" name="RXF3EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0D" access="33303033" name="RXF3SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F0C" access="33333333" name="RXF3SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0F0A" size="2" name="RXF2EID" />
+    <sfr address="0x0F0B" access="33333333" name="RXF2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0A" access="33333333" name="RXF2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F09" access="33303033" name="RXF2SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F08" access="33333333" name="RXF2SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0F06" size="2" name="RXF1EID" />
+    <sfr address="0x0F07" access="33333333" name="RXF1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F06" access="33333333" name="RXF1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F05" access="33303033" name="RXF1SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F04" access="33333333" name="RXF1SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0F02" size="2" name="RXF0EID" />
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+    <sfr address="0x0F02" access="33333333" name="RXF0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F01" access="33303033" name="RXF0SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F00" access="33333333" name="RXF0SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E7D" access="33333333" name="RXB7D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E7C" access="33333333" name="RXB7D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E7B" access="33333333" name="RXB7D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E7A" access="33333333" name="RXB7D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E79" access="33333333" name="RXB7D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E78" access="33333333" name="RXB7D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E77" access="33333333" name="RXB7D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E76" access="33333333" name="RXB7D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E75" access="03333333" name="RXB7DLC" mclr="03333333" por="00000000" />
+    <combined address="0x0E73" size="2" name="RXB7EID" />
+    <sfr address="0x0E74" access="33333333" name="RXB7EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E73" access="33333333" name="RXB7EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E72" access="33303033" name="RXB7SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E71" access="33333333" name="RXB7SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E70" access="33333333" name="RXB7CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6D" access="33333333" name="RXB6D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6C" access="33333333" name="RXB6D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6B" access="33333333" name="RXB6D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6A" access="33333333" name="RXB6D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E69" access="33333333" name="RXB6D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E68" access="33333333" name="RXB6D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E67" access="33333333" name="RXB6D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E66" access="33333333" name="RXB6D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E65" access="03333333" name="RXB6DLC" mclr="03333333" por="00000000" />
+    <combined address="0x0E63" size="2" name="RXB6EID" />
+    <sfr address="0x0E64" access="33333333" name="RXB6EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E63" access="33333333" name="RXB6EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E62" access="33303033" name="RXB6SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E61" access="33333333" name="RXB6SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E60" access="33333333" name="RXB6CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5D" access="33333333" name="RXB5D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5C" access="33333333" name="RXB5D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5B" access="33333333" name="RXB5D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5A" access="33333333" name="RXB5D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E59" access="33333333" name="RXB5D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E58" access="33333333" name="RXB5D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E57" access="33333333" name="RXB5D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E56" access="33333333" name="RXB5D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E55" access="03333333" name="RXB5DLC" mclr="03333333" por="00000000" />
+    <combined address="0x0E53" size="2" name="RXB5EID" />
+    <sfr address="0x0E54" access="33333333" name="RXB5EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E53" access="33333333" name="RXB5EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E52" access="33303033" name="RXB5SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E51" access="33333333" name="RXB5SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E50" access="33333333" name="RXB5CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4D" access="33333333" name="RXB4D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4C" access="33333333" name="RXB4D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4B" access="33333333" name="RXB4D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4A" access="33333333" name="RXB4D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E49" access="33333333" name="RXB4D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E48" access="33333333" name="RXB4D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E47" access="33333333" name="RXB4D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E46" access="33333333" name="RXB4D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E45" access="03333333" name="RXB4DLC" mclr="03333333" por="00000000" />
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+    <sfr address="0x0E44" access="33333333" name="RXB4EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E43" access="33333333" name="RXB4EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E42" access="33303033" name="RXB4SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E41" access="33333333" name="RXB4SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E40" access="33333333" name="RXB4CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3D" access="33333333" name="RXB3D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3C" access="33333333" name="RXB3D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3B" access="33333333" name="RXB3D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3A" access="33333333" name="RXB3D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E39" access="33333333" name="RXB3D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E38" access="33333333" name="RXB3D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E37" access="33333333" name="RXB3D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E36" access="33333333" name="RXB3D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E35" access="03333333" name="RXB3DLC" mclr="03333333" por="00000000" />
+    <combined address="0x0E33" size="2" name="RXB3EID" />
+    <sfr address="0x0E34" access="33333333" name="RXB3EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E33" access="33333333" name="RXB3EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E32" access="33303033" name="RXB3SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E31" access="33333333" name="RXB3SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E30" access="33333333" name="RXB3CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2D" access="33333333" name="RXB2D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2C" access="33333333" name="RXB2D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2B" access="33333333" name="RXB2D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2A" access="33333333" name="RXB2D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E29" access="33333333" name="RXB2D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E28" access="33333333" name="RXB2D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E27" access="33333333" name="RXB2D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E26" access="33333333" name="RXB2D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E25" access="03333333" name="RXB2DLC" mclr="03333333" por="00000000" />
+    <combined address="0x0E23" size="2" name="RXB2EID" />
+    <sfr address="0x0E24" access="33333333" name="RXB2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E23" access="33333333" name="RXB2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E22" access="33303033" name="RXB2SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E21" access="33333333" name="RXB2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E20" access="33333333" name="RXB2CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0DFC" access="00033300" name="TX_BUFINTEN" mclr="00033300" por="00000000" />
+    <sfr address="0x0DFA" access="33333333" name="BUF_INT_EN0" mclr="33333333" por="00000000" />
+    <sfr address="0x0DF8" access="33333300" name="RX_TX_SEL0" mclr="33333300" por="00000000" />
+    <sfr address="0x0DF3" access="33333333" name="MSK_SEL3" mclr="33333333" por="00000000" />
+    <sfr address="0x0DF2" access="33333333" name="MSK_SEL2" mclr="33333333" por="00000000" />
+    <sfr address="0x0DF1" access="33333333" name="MSK_SEL1" mclr="33333333" por="00000000" />
+    <sfr address="0x0DF0" access="33333333" name="MSK_SEL0" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE7" access="33333333" name="BUFPNT1514" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE6" access="33333333" name="BUFPNT1312" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE5" access="33333333" name="BUFPNT1110" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE4" access="33333333" name="BUFPNT98" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE3" access="33333333" name="BUFPNT76" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE2" access="33333333" name="BUFPNT54" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE1" access="33333333" name="BUFPNT32" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE0" access="33333333" name="BUFPNT10" mclr="33333333" por="00000000" />
+    <sfr address="0x0DD8" access="00033333" name="DEV_NET_CT" mclr="00033333" por="00000000" />
+    <sfr address="0x0DD5" access="33333333" name="FER1" mclr="33333333" por="00000000" />
+    <sfr address="0x0DD4" access="33333333" name="FER0" mclr="33333333" por="00000000" />
+    <combined address="0x0D92" size="2" name="RXF15EID" />
+    <sfr address="0x0D93" access="33333333" name="RXF15EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D92" access="33333333" name="RXF15EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D91" access="33303033" name="RXF15SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D90" access="33333333" name="RXF15SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D8A" size="2" name="RXF14EID" />
+    <sfr address="0x0D8B" access="33333333" name="RXF14EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8A" access="33333333" name="RXF14EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D89" access="33303033" name="RXF14SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D88" access="33333333" name="RXF14SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D86" size="2" name="RXF13EID" />
+    <sfr address="0x0D87" access="33333333" name="RXF13EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D86" access="33333333" name="RXF13EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D85" access="33303033" name="RXF13SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D84" access="33333333" name="RXF13SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D82" size="2" name="RXF12EID" />
+    <sfr address="0x0D83" access="33333333" name="RXF12EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D82" access="33333333" name="RXF12EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D81" access="33303033" name="RXF12SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D80" access="33333333" name="RXF12SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D7A" size="2" name="RXF11EID" />
+    <sfr address="0x0D7B" access="33333333" name="RXF11EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7A" access="33333333" name="RXF11EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D79" access="33303033" name="RXF11SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D78" access="33333333" name="RXF11SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D76" size="2" name="RXF10EID" />
+    <sfr address="0x0D77" access="33333333" name="RXF10EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D76" access="33333333" name="RXF10EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D75" access="33303033" name="RXF10SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D74" access="33333333" name="RXF10SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D72" size="2" name="RXF9EID" />
+    <sfr address="0x0D73" access="33333333" name="RXF9EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D72" access="33333333" name="RXF9EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D71" access="33303033" name="RXF9SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D70" access="33333333" name="RXF9SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D6A" size="2" name="RXF8EID" />
+    <sfr address="0x0D6B" access="33333333" name="RXF8EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6A" access="33333333" name="RXF8EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D69" access="33303033" name="RXF8SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D68" access="33333333" name="RXF8SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D66" size="2" name="RXF7EID" />
+    <sfr address="0x0D67" access="33333333" name="RXF7EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D66" access="33333333" name="RXF7EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D65" access="33303033" name="RXF7SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D64" access="33333333" name="RXF7SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D62" size="2" name="RXF6EID" />
+    <sfr address="0x0D63" access="33333333" name="RXF6EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D62" access="33333333" name="RXF6EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D61" access="33303033" name="RXF6SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D60" access="33333333" name="RXF6SIDH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F44J10" unused_bank_mask="0x7FF0" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F91" start="0x0F8F" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FAA" start="0x0FA8" />
+    <unused end="0x0FB3" start="0x0FB1" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="12034433" por="10022211" />
+    <sfr address="0x0FA5" access="33000000" name="IPR3" mclr="22000000" por="22000000" />
+    <sfr address="0x0FA4" access="33000000" name="PIR3" mclr="11000000" por="11000000" />
+    <sfr address="0x0FA3" access="33000000" name="PIE3" mclr="11000000" por="11000000" />
+    <sfr address="0x0FA2" access="33003333" name="IPR2" mclr="22002002" por="22002002" />
+    <sfr address="0x0FA1" access="33003333" name="PIR2" mclr="11001001" por="11001001" />
+    <sfr address="0x0FA0" access="33003333" name="PIE2" mclr="11001001" por="11001001" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD3" access="30003033" name="OSCCON" mclr="01110100" por="01110100" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="00303333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="00303333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="00303333" name="TRISA" mclr="00202222" por="00202222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00000333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F8E" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F87" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F86" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F85" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F4510" unused_bank_mask="0x7FC0" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FA9" start="0x0FA6" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33003333" name="IPR2" mclr="22002222" por="22002222" />
+    <sfr address="0x0FA1" access="33003333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33003333" name="PIE2" mclr="11001111" por="11001111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="01110100" por="01110100" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCPAS1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F4515" unused_bank_mask="0x0000" >
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="01110100" por="01110100" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33003333" name="IPR2" mclr="22002222" por="22002222" />
+    <sfr address="0x0FA1" access="33003333" name="PIR2" mclr="11001111" por="11001111" />
+    <sfr address="0x0FA0" access="33003333" name="PIE2" mclr="11001111" por="11001111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9B" access="30033333" name="OSCTUNE" mclr="10011111" por="10011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="ECCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="ECCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="ECCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCPAS1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F452" unused_bank_mask="0x7FC0" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9C" start="0x0F97" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB4" />
+    <unused end="0x0FC0" start="0x0FC0" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00000003" name="OSCCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10044433" por="10042211" />
+    <sfr address="0x0FA2" access="00033333" name="IPR2" mclr="00022222" por="00022222" />
+    <sfr address="0x0FA1" access="00033333" name="PIR2" mclr="00011111" por="00011111" />
+    <sfr address="0x0FA0" access="00033333" name="PIE2" mclr="00011111" por="00011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0FC1" access="33003333" name="ADCON1" mclr="11001111" por="11001111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30333333" name="T1CON" mclr="30333333" por="10111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F4520" unused_bank_mask="0x7FC0" >
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD3" access="33330100" name="OSCCON" mclr="11110100" por="12110100" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCPAS1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F4523" unused_bank_mask="0x7FC0" >
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="03330303" name="INTCON2" mclr="02220202" por="02220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="01110100" por="01110100" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCPAS1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F4525" unused_bank_mask="0x0000" >
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="12114111" por="12114111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="10011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="ECCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="ECCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="ECCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCPAS1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FAA" access="00000033" name="EEADRH" mclr="00000011" por="00000011" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F4539" unused_bank_mask="0x7FC0" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9C" start="0x0F97" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB4" />
+    <unused end="0x0FC0" start="0x0FC0" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00000003" name="OSCCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA2" access="00033330" name="IPR2" mclr="00022220" por="00022220" />
+    <sfr address="0x0FA1" access="00033330" name="PIR2" mclr="00011110" por="00011110" />
+    <sfr address="0x0FA0" access="00033330" name="PIE2" mclr="00011110" por="00011110" />
+    <sfr address="0x0F9F" access="33333033" name="IPR1" mclr="22222022" por="22222022" />
+    <sfr address="0x0F9E" access="33113033" name="PIR1" mclr="11111011" por="11111011" />
+    <sfr address="0x0F9D" access="33333033" name="PIE1" mclr="11111011" por="11111011" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0FC1" access="33003333" name="ADCON1" mclr="11001111" por="11001111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30330333" name="T1CON" mclr="30330333" por="10110111" />
+    <sfr address="0x0FCC" access="11111111" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="11111111" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="11111111" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="30330333" name="T3CON" mclr="30330333" por="10110111" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F4550" unused_bank_mask="0x7F00" >
+    <unused end="0x0F5F" start="0x0F00" />
+    <unused end="0x0F61" start="0x0F60" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="30133333" name="HLVDCON" mclr="10111212" por="10111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33333333" name="IPR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA1" access="33333333" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33333333" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD3" access="33333133" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="30033333" name="OSCTUNE" mclr="10011111" por="10011111" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33330333" name="PORTC" mclr="33330333" por="00000000" />
+    <sfr address="0x0F8B" access="33000333" name="LATC" mclr="33000333" por="00000000" />
+    <sfr address="0x0F94" access="33000333" name="TRISC" mclr="22000222" por="22000222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="30001333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="00000333" name="TRISE" mclr="00000222" por="00000222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="ECCP1DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F65" access="00000033" name="SPPCON" mclr="00000011" por="00000011" />
+    <sfr address="0x0F64" access="33033333" name="SPPEPS" mclr="11011111" por="11011111" />
+    <sfr address="0x0F63" access="33333333" name="SPPCFG" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="SPPDATA" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7F" access="00033333" name="UEP15" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7E" access="00033333" name="UEP14" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7D" access="00033333" name="UEP13" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7C" access="00033333" name="UEP12" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7B" access="00033333" name="UEP11" mclr="00011111" por="00011111" />
+    <sfr address="0x0F7A" access="00033333" name="UEP10" mclr="00011111" por="00011111" />
+    <sfr address="0x0F79" access="00033333" name="UEP9" mclr="00011111" por="00011111" />
+    <sfr address="0x0F78" access="00033333" name="UEP8" mclr="00011111" por="00011111" />
+    <sfr address="0x0F77" access="00033333" name="UEP7" mclr="00011111" por="00011111" />
+    <sfr address="0x0F76" access="00033333" name="UEP6" mclr="00011111" por="00011111" />
+    <sfr address="0x0F75" access="00033333" name="UEP5" mclr="00011111" por="00011111" />
+    <sfr address="0x0F74" access="00033333" name="UEP4" mclr="00011111" por="00011111" />
+    <sfr address="0x0F73" access="00033333" name="UEP3" mclr="00011111" por="00011111" />
+    <sfr address="0x0F72" access="00033333" name="UEP2" mclr="00011111" por="00011111" />
+    <sfr address="0x0F71" access="00033333" name="UEP1" mclr="00011111" por="00011111" />
+    <sfr address="0x0F70" access="00033333" name="UEP0" mclr="00011111" por="00011111" />
+    <sfr address="0x0F6F" access="33033333" name="UCFG" mclr="11011111" por="11011111" />
+    <sfr address="0x0F6E" access="03333333" name="UADDR" mclr="01111111" por="01111111" />
+    <sfr address="0x0F6D" access="03153330" name="UCON" mclr="01011110" por="01011110" />
+    <sfr address="0x0F6C" access="01111110" name="USTAT" mclr="00000000" por="00000000" />
+    <sfr address="0x0F6B" access="30033333" name="UEIE" mclr="10011111" por="10011111" />
+    <sfr address="0x0F6A" access="50055555" name="UEIR" mclr="10011111" por="10011111" />
+    <sfr address="0x0F69" access="03333333" name="UIE" mclr="01111111" por="01111111" />
+    <sfr address="0x0F68" access="03333313" name="UIR" mclr="01111111" por="01111111" />
+    <combined address="0x0F66" size="2" name="UFRM" />
+    <sfr address="0x0F67" access="00000111" name="UFRMH" mclr="00000000" por="00000000" />
+    <sfr address="0x0F66" access="11111111" name="UFRML" mclr="00000000" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F458" unused_bank_mask="0x7FC0" >
+    <mirror>
+      <range end="0x0F2E" start="0x0F2E" />
+      <range end="0x0F3E" start="0x0F3E" />
+      <range end="0x0F4E" start="0x0F4E" />
+      <range end="0x0F5E" start="0x0F5E" />
+    </mirror>
+    <unused end="0x0F2F" start="0x0F2F" />
+    <unused end="0x0F3F" start="0x0F3F" />
+    <unused end="0x0F4F" start="0x0F4F" />
+    <unused end="0x0F5F" start="0x0F5F" />
+    <unused end="0x0F7F" start="0x0F77" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9C" start="0x0F97" />
+    <unused end="0x0FAA" start="0x0FAA" />
+    <unused end="0x0FB9" start="0x0FB8" />
+    <unused end="0x0FC0" start="0x0FC0" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00000003" name="OSCCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33333333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="03033333" name="IPR2" mclr="02022222" por="02022222" />
+    <sfr address="0x0FA1" access="03033333" name="PIR2" mclr="01011111" por="01011111" />
+    <sfr address="0x0FA0" access="03033333" name="PIE2" mclr="01011111" por="01011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00000333" name="PORTE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="00000333" name="TRISE" mclr="00000222" por="00000222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333303" name="ADCON0" mclr="11111101" por="11111101" />
+    <sfr address="0x0FC1" access="33003333" name="ADCON1" mclr="11001111" por="11001111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="ECCPR1" />
+    <sfr address="0x0FBC" access="33333333" name="ECCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="ECCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="ECCP1DEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCPAS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30333333" name="T1CON" mclr="30333333" por="10111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+    <sfr address="0x0F76" access="11111111" name="TXERRCNT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F75" access="11111111" name="RXERRCNT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F74" access="55111111" name="COMSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F73" access="00330000" name="CIOCON" mclr="00110000" por="00110000" />
+    <sfr address="0x0F72" access="03000333" name="BRGCON3" mclr="01000111" por="01000111" />
+    <sfr address="0x0F71" access="33333333" name="BRGCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F70" access="33333333" name="BRGCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333330" name="CANCON" mclr="21111110" por="21111110" />
+    <sfr address="0x0F6E" access="11101110" name="CANSTAT" mclr="21101110" por="21101110" />
+    <sfr address="0x0F6D" access="33333333" name="RXB0D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6C" access="33333333" name="RXB0D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6B" access="33333333" name="RXB0D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6A" access="33333333" name="RXB0D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0F69" access="33333333" name="RXB0D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0F68" access="33333333" name="RXB0D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="RXB0D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0F66" access="33333333" name="RXB0D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="03333333" name="RXB0DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0F64" access="33333333" name="RXB0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F63" access="33333333" name="RXB0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F62" access="33333033" name="RXB0SIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F61" access="33333333" name="RXB0SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F60" access="53301313" name="RXB0CON" mclr="11101111" por="11101111" />
+    <sfr address="0x0F5E" access="11101110" name="CANSTATRO1" mclr="00000000" por="00000000" />
+    <sfr address="0x0F5D" access="33333333" name="RXB1D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F5C" access="33333333" name="RXB1D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F5B" access="33333333" name="RXB1D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0F5A" access="33333333" name="RXB1D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0F59" access="33333333" name="RXB1D3" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F56" access="33333333" name="RXB1D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0F55" access="03333333" name="RXB1DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0F54" access="33333333" name="RXB1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F53" access="33333333" name="RXB1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F52" access="33333033" name="RXB1SIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F51" access="33333333" name="RXB1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F50" access="53301111" name="RXB1CON" mclr="11101111" por="11101111" />
+    <sfr address="0x0F4E" access="11101110" name="CANSTATRO2" mclr="33303330" por="00000000" />
+    <sfr address="0x0F4D" access="33333333" name="TXB0D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F4C" access="33333333" name="TXB0D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F4B" access="33333333" name="TXB0D5" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F48" access="33333333" name="TXB0D2" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F42" access="33333333" name="TXB0SIDL" mclr="33303033" por="00000000" />
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+    <sfr address="0x0F3E" access="11101110" name="CANSTATRO3" mclr="33303330" por="00000000" />
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+    <sfr address="0x0F10" access="33333333" name="RXF4SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0F" access="33333333" name="RXF3EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0E" access="33333333" name="RXF3EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0D" access="33303033" name="RXF3SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F0C" access="33333333" name="RXF3SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0B" access="33333333" name="RXF2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0F0A" access="33333333" name="RXF2EIDH" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F07" access="33333333" name="RXF1EIDL" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F05" access="33303033" name="RXF1SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0F04" access="33333333" name="RXF1SIDH" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F02" access="33333333" name="RXF0EIDH" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F00" access="33333333" name="RXF0SIDH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F4580" unused_bank_mask="0x1FC0" >
+    <unused end="0x0D6F" start="0x0D6C" />
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+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
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+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
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+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
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+    <sfr address="0x0E70" access="33333333" name="RXB7CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6D" access="33333333" name="RXB6D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6C" access="33333333" name="RXB6D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6B" access="33333333" name="RXB6D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6A" access="33333333" name="RXB6D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E69" access="33333333" name="RXB6D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E68" access="33333333" name="RXB6D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E67" access="33333333" name="RXB6D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E66" access="33333333" name="RXB6D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E65" access="03333333" name="RXB6DLC" mclr="03333333" por="00000000" />
+    <combined address="0x0E63" size="2" name="RXB6EID" />
+    <sfr address="0x0E64" access="33333333" name="RXB6EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E63" access="33333333" name="RXB6EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E62" access="33303033" name="RXB6SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E61" access="33333333" name="RXB6SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E60" access="33333333" name="RXB6CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5D" access="33333333" name="RXB5D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5C" access="33333333" name="RXB5D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5B" access="33333333" name="RXB5D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5A" access="33333333" name="RXB5D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E59" access="33333333" name="RXB5D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E58" access="33333333" name="RXB5D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E57" access="33333333" name="RXB5D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E56" access="33333333" name="RXB5D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E55" access="03333333" name="RXB5DLC" mclr="03333333" por="00000000" />
+    <combined address="0x0E53" size="2" name="RXB5EID" />
+    <sfr address="0x0E54" access="33333333" name="RXB5EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E53" access="33333333" name="RXB5EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E52" access="33303033" name="RXB5SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E51" access="33333333" name="RXB5SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E50" access="33333333" name="RXB5CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4D" access="33333333" name="RXB4D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4C" access="33333333" name="RXB4D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4B" access="33333333" name="RXB4D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4A" access="33333333" name="RXB4D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E49" access="33333333" name="RXB4D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E48" access="33333333" name="RXB4D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E47" access="33333333" name="RXB4D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E46" access="33333333" name="RXB4D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E45" access="03333333" name="RXB4DLC" mclr="03333333" por="00000000" />
+    <combined address="0x0E43" size="2" name="RXB4EID" />
+    <sfr address="0x0E44" access="33333333" name="RXB4EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E43" access="33333333" name="RXB4EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E42" access="33303033" name="RXB4SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E41" access="33333333" name="RXB4SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E40" access="33333333" name="RXB4CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3D" access="33333333" name="RXB3D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3C" access="33333333" name="RXB3D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3B" access="33333333" name="RXB3D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3A" access="33333333" name="RXB3D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E39" access="33333333" name="RXB3D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E38" access="33333333" name="RXB3D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E37" access="33333333" name="RXB3D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E36" access="33333333" name="RXB3D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E35" access="03333333" name="RXB3DLC" mclr="03333333" por="00000000" />
+    <combined address="0x0E33" size="2" name="RXB3EID" />
+    <sfr address="0x0E34" access="33333333" name="RXB3EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E33" access="33333333" name="RXB3EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E32" access="33303033" name="RXB3SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E31" access="33333333" name="RXB3SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E30" access="33333333" name="RXB3CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2D" access="33333333" name="RXB2D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2C" access="33333333" name="RXB2D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2B" access="33333333" name="RXB2D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2A" access="33333333" name="RXB2D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E29" access="33333333" name="RXB2D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E28" access="33333333" name="RXB2D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E27" access="33333333" name="RXB2D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E26" access="33333333" name="RXB2D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E25" access="03333333" name="RXB2DLC" mclr="03333333" por="00000000" />
+    <combined address="0x0E23" size="2" name="RXB2EID" />
+    <sfr address="0x0E24" access="33333333" name="RXB2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E23" access="33333333" name="RXB2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E22" access="33303033" name="RXB2SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E21" access="33333333" name="RXB2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E20" access="33333333" name="RXB2CON" mclr="33333333" por="00000000" />
+    <sfr address="0x0DFC" access="00033300" name="TX_BUFINTEN" mclr="00033300" por="00000000" />
+    <sfr address="0x0DFA" access="33333333" name="BUF_INT_EN0" mclr="33333333" por="00000000" />
+    <sfr address="0x0DF8" access="33333300" name="RX_TX_SEL0" mclr="33333300" por="00000000" />
+    <sfr address="0x0DF3" access="33333333" name="MSK_SEL3" mclr="33333333" por="00000000" />
+    <sfr address="0x0DF2" access="33333333" name="MSK_SEL2" mclr="33333333" por="00000000" />
+    <sfr address="0x0DF1" access="33333333" name="MSK_SEL1" mclr="33333333" por="00000000" />
+    <sfr address="0x0DF0" access="33333333" name="MSK_SEL0" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE7" access="33333333" name="BUFPNT1514" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE6" access="33333333" name="BUFPNT1312" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE5" access="33333333" name="BUFPNT1110" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE4" access="33333333" name="BUFPNT98" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE3" access="33333333" name="BUFPNT76" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE2" access="33333333" name="BUFPNT54" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE1" access="33333333" name="BUFPNT32" mclr="33333333" por="00000000" />
+    <sfr address="0x0DE0" access="33333333" name="BUFPNT10" mclr="33333333" por="00000000" />
+    <sfr address="0x0DD8" access="00033333" name="DEV_NET_CT" mclr="00033333" por="00000000" />
+    <sfr address="0x0DD5" access="33333333" name="FER1" mclr="33333333" por="00000000" />
+    <sfr address="0x0DD4" access="33333333" name="FER0" mclr="33333333" por="00000000" />
+    <combined address="0x0D92" size="2" name="RXF15EID" />
+    <sfr address="0x0D93" access="33333333" name="RXF15EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D92" access="33333333" name="RXF15EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D91" access="33303033" name="RXF15SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D90" access="33333333" name="RXF15SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D8A" size="2" name="RXF14EID" />
+    <sfr address="0x0D8B" access="33333333" name="RXF14EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8A" access="33333333" name="RXF14EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D89" access="33303033" name="RXF14SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D88" access="33333333" name="RXF14SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D86" size="2" name="RXF13EID" />
+    <sfr address="0x0D87" access="33333333" name="RXF13EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D86" access="33333333" name="RXF13EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D85" access="33303033" name="RXF13SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D84" access="33333333" name="RXF13SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D82" size="2" name="RXF12EID" />
+    <sfr address="0x0D83" access="33333333" name="RXF12EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D82" access="33333333" name="RXF12EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D81" access="33303033" name="RXF12SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D80" access="33333333" name="RXF12SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D7A" size="2" name="RXF11EID" />
+    <sfr address="0x0D7B" access="33333333" name="RXF11EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7A" access="33333333" name="RXF11EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D79" access="33303033" name="RXF11SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D78" access="33333333" name="RXF11SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D76" size="2" name="RXF10EID" />
+    <sfr address="0x0D77" access="33333333" name="RXF10EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D76" access="33333333" name="RXF10EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D75" access="33303033" name="RXF10SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D74" access="33333333" name="RXF10SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D72" size="2" name="RXF9EID" />
+    <sfr address="0x0D73" access="33333333" name="RXF9EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D72" access="33333333" name="RXF9EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D71" access="33303033" name="RXF9SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D70" access="33333333" name="RXF9SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D6A" size="2" name="RXF8EID" />
+    <sfr address="0x0D6B" access="33333333" name="RXF8EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6A" access="33333333" name="RXF8EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D69" access="33303033" name="RXF8SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D68" access="33333333" name="RXF8SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D66" size="2" name="RXF7EID" />
+    <sfr address="0x0D67" access="33333333" name="RXF7EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D66" access="33333333" name="RXF7EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D65" access="33303033" name="RXF7SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D64" access="33333333" name="RXF7SIDH" mclr="33333333" por="00000000" />
+    <combined address="0x0D62" size="2" name="RXF6EID" />
+    <sfr address="0x0D63" access="33333333" name="RXF6EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D62" access="33333333" name="RXF6EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D61" access="33303033" name="RXF6SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D60" access="33333333" name="RXF6SIDH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F4585" unused_bank_mask="0x0000" >
+    <unused end="0x0D59" start="0x0D00" />
+    <unused end="0x0D6F" start="0x0D6C" />
+    <unused end="0x0D7F" start="0x0D7C" />
+    <unused end="0x0D8F" start="0x0D8C" />
+    <unused end="0x0DD3" start="0x0D94" />
+    <unused end="0x0DD7" start="0x0DD6" />
+    <unused end="0x0DDF" start="0x0DD9" />
+    <unused end="0x0DEF" start="0x0DE8" />
+    <unused end="0x0DF7" start="0x0DF4" />
+    <unused end="0x0DF9" start="0x0DF9" />
+    <unused end="0x0DFB" start="0x0DFB" />
+    <unused end="0x0DFF" start="0x0DFD" />
+    <unused end="0x0E1F" start="0x0E00" />
+    <unused end="0x0EFF" start="0x0E80" />
+    <unused end="0x0F7F" start="0x0F78" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="12113111" por="12113111" />
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+    <sfr address="0x0E79" access="33333333" name="B5D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E78" access="33333333" name="B5D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E77" access="33333333" name="B5D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E76" access="33333333" name="B5D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E75" access="03113333" name="B5DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E74" access="33333333" name="B5EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E73" access="33333333" name="B5EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E72" access="33333033" name="B5SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E71" access="33333333" name="B5SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E70" access="33113333" name="B5CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E6F" access="33393331" name="CANCON_RO5" mclr="21111111" por="21111111" />
+    <sfr address="0x0E6E" access="11111111" name="CANSTAT_RO5" mclr="21111111" por="21111111" />
+    <sfr address="0x0E6D" access="33333333" name="B4D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6C" access="33333333" name="B4D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6B" access="33333333" name="B4D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E6A" access="33333333" name="B4D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E69" access="33333333" name="B4D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E68" access="33333333" name="B4D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E67" access="33333333" name="B4D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E66" access="33333333" name="B4D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E65" access="03113333" name="B4DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E64" access="33333333" name="B4EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E63" access="33333333" name="B4EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E62" access="33333033" name="B4SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E61" access="33333333" name="B4SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E60" access="33113333" name="B4CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E5F" access="33393331" name="CANCON_RO6" mclr="21111111" por="21111111" />
+    <sfr address="0x0E5E" access="11111111" name="CANSTAT_RO6" mclr="21111111" por="21111111" />
+    <sfr address="0x0E5D" access="33333333" name="B3D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5C" access="33333333" name="B3D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5B" access="33333333" name="B3D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5A" access="33333333" name="B3D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E59" access="33333333" name="B3D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E58" access="33333333" name="B3D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E57" access="33333333" name="B3D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E56" access="33333333" name="B3D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E55" access="03113333" name="B3DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E54" access="33333333" name="B3EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E53" access="33333333" name="B3EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E52" access="33333033" name="B3SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E51" access="33333333" name="B3SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E50" access="33113333" name="B3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E4F" access="33393331" name="CANCON_RO7" mclr="21111111" por="21111111" />
+    <sfr address="0x0E4E" access="11111111" name="CANSTAT_RO7" mclr="21111111" por="21111111" />
+    <sfr address="0x0E4D" access="33333333" name="B2D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4C" access="33333333" name="B2D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4B" access="33333333" name="B2D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4A" access="33333333" name="B2D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E49" access="33333333" name="B2D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E48" access="33333333" name="B2D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E47" access="33333333" name="B2D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E46" access="33333333" name="B2D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E45" access="03113333" name="B2DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E44" access="33333333" name="B2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E43" access="33333333" name="B2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E42" access="33333033" name="B2SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E41" access="33333333" name="B2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E40" access="33113333" name="B2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E3F" access="33393331" name="CANCON_RO8" mclr="21111111" por="21111111" />
+    <sfr address="0x0E3E" access="11111111" name="CANSTAT_RO8" mclr="21111111" por="21111111" />
+    <sfr address="0x0E3D" access="33333333" name="B1D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3C" access="33333333" name="B1D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3B" access="33333333" name="B1D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3A" access="33333333" name="B1D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E39" access="33333333" name="B1D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E38" access="33333333" name="B1D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E37" access="33333333" name="B1D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E36" access="33333333" name="B1D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E35" access="03113333" name="B1DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E34" access="33333333" name="B1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E33" access="33333333" name="B1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E32" access="33333033" name="B1SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E31" access="33333333" name="B1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E30" access="33113333" name="B1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E2F" access="33393331" name="CANCON_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2E" access="11111111" name="CANSTAT_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2D" access="33333333" name="B0D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2C" access="33333333" name="B0D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2B" access="33333333" name="B0D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2A" access="33333333" name="B0D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E29" access="33333333" name="B0D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E28" access="33333333" name="B0D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E27" access="33333333" name="B0D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E26" access="33333333" name="B0D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E25" access="03113333" name="B0DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E24" access="33333333" name="B0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E23" access="33333333" name="B0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E22" access="33333033" name="B0SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E21" access="33333333" name="B0SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E20" access="33113333" name="B0CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0DFC" access="00033300" name="TXBIE" mclr="00033300" por="00011100" />
+    <sfr address="0x0DFA" access="33333333" name="BIE0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF8" access="33333300" name="BSEL0" mclr="11111100" por="11111100" />
+    <sfr address="0x0DF3" access="33333333" name="MSEL3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF2" access="33333333" name="MSEL2" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF1" access="33333333" name="MSEL1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF0" access="33333333" name="MSEL0" mclr="12121111" por="12121111" />
+    <sfr address="0x0DE7" access="33333333" name="RXFBCON7" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE6" access="33333333" name="RXFBCON6" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE5" access="33333333" name="RXFBCON5" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE4" access="33333333" name="RXFBCON4" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE3" access="33333333" name="RXFBCON3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE2" access="33333333" name="RXFBCON2" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE1" access="33333333" name="RXFBCON1" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE0" access="33333333" name="RXFBCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD8" access="00033333" name="SDFLC" mclr="00011111" por="00011111" />
+    <sfr address="0x0DD5" access="33333333" name="RXFCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD4" access="33333333" name="RXFCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0D93" access="33333333" name="RXF15EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D92" access="33333333" name="RXF15EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D91" access="33303033" name="RXF15SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D90" access="33333333" name="RXF15SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8B" access="33333333" name="RXF14EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8A" access="33333333" name="RXF14EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D89" access="33303033" name="RXF14SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D88" access="33333333" name="RXF14SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D87" access="33333333" name="RXF13EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D86" access="33333333" name="RXF13EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D85" access="33303033" name="RXF13SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D84" access="33333333" name="RXF13SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D83" access="33333333" name="RXF12EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D82" access="33333333" name="RXF12EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D81" access="33303033" name="RXF12SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D80" access="33333333" name="RXF12SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7B" access="33333333" name="RXF11EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7A" access="33333333" name="RXF11EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D79" access="33303033" name="RXF11SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D78" access="33333333" name="RXF11SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D77" access="33333333" name="RXF10EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D76" access="33333333" name="RXF10EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D75" access="33303033" name="RXF10SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D74" access="33333333" name="RXF10SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D73" access="33333333" name="RXF9EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D72" access="33333333" name="RXF9EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D71" access="33303033" name="RXF9SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D70" access="33333333" name="RXF9SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6B" access="33333333" name="RXF8EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6A" access="33333333" name="RXF8EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D69" access="33303033" name="RXF8SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D68" access="33333333" name="RXF8SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D67" access="33333333" name="RXF7EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D66" access="33333333" name="RXF7EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D65" access="33303033" name="RXF7SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D64" access="33333333" name="RXF7SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D63" access="33333333" name="RXF6EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D62" access="33333333" name="RXF6EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D61" access="33303033" name="RXF6SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D60" access="33333333" name="RXF6SIDH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F45J10" unused_bank_mask="0x7FF0" >
+    <unused end="0x0F7F" start="0x0F00" />
+    <unused end="0x0F91" start="0x0F8F" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FAA" start="0x0FA8" />
+    <unused end="0x0FB3" start="0x0FB1" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="12034433" por="10022211" />
+    <sfr address="0x0FA5" access="33000000" name="IPR3" mclr="22000000" por="22000000" />
+    <sfr address="0x0FA4" access="33000000" name="PIR3" mclr="11000000" por="11000000" />
+    <sfr address="0x0FA3" access="33000000" name="PIE3" mclr="11000000" por="11000000" />
+    <sfr address="0x0FA2" access="33003333" name="IPR2" mclr="22002002" por="22002002" />
+    <sfr address="0x0FA1" access="33003333" name="PIR2" mclr="11001001" por="11001001" />
+    <sfr address="0x0FA0" access="33003333" name="PIE2" mclr="11001001" por="11001001" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD3" access="30003033" name="OSCCON" mclr="01110100" por="01110100" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="00303333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="00303333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="00303333" name="TRISA" mclr="00202222" por="00202222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00000333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F8E" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F87" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F86" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F85" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F4610" unused_bank_mask="0x0000" >
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="01110100" por="01110100" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33003333" name="IPR2" mclr="22002222" por="22002222" />
+    <sfr address="0x0FA1" access="33003333" name="PIR2" mclr="11001111" por="11001111" />
+    <sfr address="0x0FA0" access="33003333" name="PIE2" mclr="11001111" por="11001111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9B" access="30033333" name="OSCTUNE" mclr="10011111" por="10011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="ECCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="ECCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="ECCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCPAS1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x80" name="18F4620" unused_bank_mask="0x0000" >
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FA5" start="0x0FA3" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="12114111" por="12114111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="10011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="ECCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="ECCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="ECCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCPAS1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FAA" access="00000033" name="EEADRH" mclr="00000011" por="00000011" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FB8" access="51033033" name="BAUDCON" mclr="12011011" por="12011011" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRGH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F4680" unused_bank_mask="0x0000" >
+    <unused end="0x0D59" start="0x0D00" />
+    <unused end="0x0D6F" start="0x0D6C" />
+    <unused end="0x0D7F" start="0x0D7C" />
+    <unused end="0x0D8F" start="0x0D8C" />
+    <unused end="0x0DD3" start="0x0D94" />
+    <unused end="0x0DD7" start="0x0DD6" />
+    <unused end="0x0DDF" start="0x0DD9" />
+    <unused end="0x0DEF" start="0x0DE8" />
+    <unused end="0x0DF7" start="0x0DF4" />
+    <unused end="0x0DF9" start="0x0DF9" />
+    <unused end="0x0DFB" start="0x0DFB" />
+    <unused end="0x0DFF" start="0x0DFD" />
+    <unused end="0x0E1F" start="0x0E00" />
+    <unused end="0x0EFF" start="0x0E80" />
+    <unused end="0x0F7F" start="0x0F78" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
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+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="12113111" por="12113111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33333333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9B" access="30033333" name="OSCTUNE" mclr="10011111" por="10011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="ECCPR1" />
+    <sfr address="0x0FBC" access="33333333" name="ECCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="ECCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
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+    <sfr address="0x0E51" access="33333333" name="B3SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E50" access="33113333" name="B3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E4F" access="33393331" name="CANCON_RO7" mclr="21111111" por="21111111" />
+    <sfr address="0x0E4E" access="11111111" name="CANSTAT_RO7" mclr="21111111" por="21111111" />
+    <sfr address="0x0E4D" access="33333333" name="B2D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4C" access="33333333" name="B2D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4B" access="33333333" name="B2D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4A" access="33333333" name="B2D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E49" access="33333333" name="B2D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E48" access="33333333" name="B2D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E47" access="33333333" name="B2D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E46" access="33333333" name="B2D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E45" access="03113333" name="B2DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E44" access="33333333" name="B2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E43" access="33333333" name="B2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E42" access="33333033" name="B2SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E41" access="33333333" name="B2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E40" access="33113333" name="B2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E3F" access="33393331" name="CANCON_RO8" mclr="21111111" por="21111111" />
+    <sfr address="0x0E3E" access="11111111" name="CANSTAT_RO8" mclr="21111111" por="21111111" />
+    <sfr address="0x0E3D" access="33333333" name="B1D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3C" access="33333333" name="B1D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3B" access="33333333" name="B1D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3A" access="33333333" name="B1D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E39" access="33333333" name="B1D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E38" access="33333333" name="B1D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E37" access="33333333" name="B1D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E36" access="33333333" name="B1D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E35" access="03113333" name="B1DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E34" access="33333333" name="B1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E33" access="33333333" name="B1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E32" access="33333033" name="B1SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E31" access="33333333" name="B1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E30" access="33113333" name="B1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E2F" access="33393331" name="CANCON_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2E" access="11111111" name="CANSTAT_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2D" access="33333333" name="B0D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2C" access="33333333" name="B0D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2B" access="33333333" name="B0D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2A" access="33333333" name="B0D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E29" access="33333333" name="B0D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E28" access="33333333" name="B0D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E27" access="33333333" name="B0D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E26" access="33333333" name="B0D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E25" access="03113333" name="B0DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E24" access="33333333" name="B0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E23" access="33333333" name="B0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E22" access="33333033" name="B0SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E21" access="33333333" name="B0SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E20" access="33113333" name="B0CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0DFC" access="00033300" name="TXBIE" mclr="00033300" por="00011100" />
+    <sfr address="0x0DFA" access="33333333" name="BIE0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF8" access="33333300" name="BSEL0" mclr="11111100" por="11111100" />
+    <sfr address="0x0DF3" access="33333333" name="MSEL3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF2" access="33333333" name="MSEL2" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF1" access="33333333" name="MSEL1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF0" access="33333333" name="MSEL0" mclr="12121111" por="12121111" />
+    <sfr address="0x0DE7" access="33333333" name="RXFBCON7" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE6" access="33333333" name="RXFBCON6" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE5" access="33333333" name="RXFBCON5" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE4" access="33333333" name="RXFBCON4" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE3" access="33333333" name="RXFBCON3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE2" access="33333333" name="RXFBCON2" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE1" access="33333333" name="RXFBCON1" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE0" access="33333333" name="RXFBCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD8" access="00033333" name="SDFLC" mclr="00011111" por="00011111" />
+    <sfr address="0x0DD5" access="33333333" name="RXFCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD4" access="33333333" name="RXFCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0D93" access="33333333" name="RXF15EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D92" access="33333333" name="RXF15EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D91" access="33303033" name="RXF15SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D90" access="33333333" name="RXF15SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8B" access="33333333" name="RXF14EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8A" access="33333333" name="RXF14EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D89" access="33303033" name="RXF14SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D88" access="33333333" name="RXF14SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D87" access="33333333" name="RXF13EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D86" access="33333333" name="RXF13EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D85" access="33303033" name="RXF13SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D84" access="33333333" name="RXF13SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D83" access="33333333" name="RXF12EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D82" access="33333333" name="RXF12EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D81" access="33303033" name="RXF12SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D80" access="33333333" name="RXF12SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7B" access="33333333" name="RXF11EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7A" access="33333333" name="RXF11EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D79" access="33303033" name="RXF11SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D78" access="33333333" name="RXF11SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D77" access="33333333" name="RXF10EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D76" access="33333333" name="RXF10EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D75" access="33303033" name="RXF10SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D74" access="33333333" name="RXF10SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D73" access="33333333" name="RXF9EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D72" access="33333333" name="RXF9EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D71" access="33303033" name="RXF9SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D70" access="33333333" name="RXF9SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6B" access="33333333" name="RXF8EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6A" access="33333333" name="RXF8EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D69" access="33303033" name="RXF8SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D68" access="33333333" name="RXF8SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D67" access="33333333" name="RXF7EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D66" access="33333333" name="RXF7EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D65" access="33303033" name="RXF7SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D64" access="33333333" name="RXF7SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D63" access="33333333" name="RXF6EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D62" access="33333333" name="RXF6EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D61" access="33303033" name="RXF6SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D60" access="33333333" name="RXF6SIDH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F4682" unused_bank_mask="0x0000" >
+    <unused end="0x0D59" start="0x0D00" />
+    <unused end="0x0D6F" start="0x0D6C" />
+    <unused end="0x0D7F" start="0x0D7C" />
+    <unused end="0x0D8F" start="0x0D8C" />
+    <unused end="0x0DD3" start="0x0D94" />
+    <unused end="0x0DD7" start="0x0DD6" />
+    <unused end="0x0DDF" start="0x0DD9" />
+    <unused end="0x0DEF" start="0x0DE8" />
+    <unused end="0x0DF7" start="0x0DF4" />
+    <unused end="0x0DF9" start="0x0DF9" />
+    <unused end="0x0DFB" start="0x0DFB" />
+    <unused end="0x0DFF" start="0x0DFD" />
+    <unused end="0x0E1F" start="0x0E00" />
+    <unused end="0x0EFF" start="0x0E80" />
+    <unused end="0x0F7F" start="0x0F78" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="12113111" por="12113111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33333333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9B" access="30033333" name="OSCTUNE" mclr="10011111" por="10011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
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+    <sfr address="0x0E56" access="33333333" name="B3D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E55" access="03113333" name="B3DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E54" access="33333333" name="B3EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E53" access="33333333" name="B3EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E52" access="33333033" name="B3SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E51" access="33333333" name="B3SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E50" access="33113333" name="B3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E4F" access="33393331" name="CANCON_RO7" mclr="21111111" por="21111111" />
+    <sfr address="0x0E4E" access="11111111" name="CANSTAT_RO7" mclr="21111111" por="21111111" />
+    <sfr address="0x0E4D" access="33333333" name="B2D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4C" access="33333333" name="B2D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4B" access="33333333" name="B2D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4A" access="33333333" name="B2D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E49" access="33333333" name="B2D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E48" access="33333333" name="B2D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E47" access="33333333" name="B2D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E46" access="33333333" name="B2D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E45" access="03113333" name="B2DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E44" access="33333333" name="B2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E43" access="33333333" name="B2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E42" access="33333033" name="B2SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E41" access="33333333" name="B2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E40" access="33113333" name="B2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E3F" access="33393331" name="CANCON_RO8" mclr="21111111" por="21111111" />
+    <sfr address="0x0E3E" access="11111111" name="CANSTAT_RO8" mclr="21111111" por="21111111" />
+    <sfr address="0x0E3D" access="33333333" name="B1D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3C" access="33333333" name="B1D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3B" access="33333333" name="B1D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3A" access="33333333" name="B1D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E39" access="33333333" name="B1D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E38" access="33333333" name="B1D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E37" access="33333333" name="B1D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E36" access="33333333" name="B1D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E35" access="03113333" name="B1DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E34" access="33333333" name="B1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E33" access="33333333" name="B1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E32" access="33333033" name="B1SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E31" access="33333333" name="B1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E30" access="33113333" name="B1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E2F" access="33393331" name="CANCON_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2E" access="11111111" name="CANSTAT_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2D" access="33333333" name="B0D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2C" access="33333333" name="B0D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2B" access="33333333" name="B0D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2A" access="33333333" name="B0D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E29" access="33333333" name="B0D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E28" access="33333333" name="B0D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E27" access="33333333" name="B0D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E26" access="33333333" name="B0D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E25" access="03113333" name="B0DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E24" access="33333333" name="B0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E23" access="33333333" name="B0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E22" access="33333033" name="B0SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E21" access="33333333" name="B0SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E20" access="33113333" name="B0CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0DFC" access="00033300" name="TXBIE" mclr="00033300" por="00011100" />
+    <sfr address="0x0DFA" access="33333333" name="BIE0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF8" access="33333300" name="BSEL0" mclr="11111100" por="11111100" />
+    <sfr address="0x0DF3" access="33333333" name="MSEL3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF2" access="33333333" name="MSEL2" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF1" access="33333333" name="MSEL1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF0" access="33333333" name="MSEL0" mclr="12121111" por="12121111" />
+    <sfr address="0x0DE7" access="33333333" name="RXFBCON7" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE6" access="33333333" name="RXFBCON6" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE5" access="33333333" name="RXFBCON5" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE4" access="33333333" name="RXFBCON4" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE3" access="33333333" name="RXFBCON3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE2" access="33333333" name="RXFBCON2" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE1" access="33333333" name="RXFBCON1" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE0" access="33333333" name="RXFBCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD8" access="00033333" name="SDFLC" mclr="00011111" por="00011111" />
+    <sfr address="0x0DD5" access="33333333" name="RXFCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD4" access="33333333" name="RXFCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0D93" access="33333333" name="RXF15EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D92" access="33333333" name="RXF15EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D91" access="33303033" name="RXF15SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D90" access="33333333" name="RXF15SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8B" access="33333333" name="RXF14EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8A" access="33333333" name="RXF14EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D89" access="33303033" name="RXF14SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D88" access="33333333" name="RXF14SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D87" access="33333333" name="RXF13EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D86" access="33333333" name="RXF13EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D85" access="33303033" name="RXF13SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D84" access="33333333" name="RXF13SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D83" access="33333333" name="RXF12EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D82" access="33333333" name="RXF12EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D81" access="33303033" name="RXF12SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D80" access="33333333" name="RXF12SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7B" access="33333333" name="RXF11EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7A" access="33333333" name="RXF11EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D79" access="33303033" name="RXF11SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D78" access="33333333" name="RXF11SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D77" access="33333333" name="RXF10EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D76" access="33333333" name="RXF10EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D75" access="33303033" name="RXF10SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D74" access="33333333" name="RXF10SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D73" access="33333333" name="RXF9EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D72" access="33333333" name="RXF9EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D71" access="33303033" name="RXF9SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D70" access="33333333" name="RXF9SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6B" access="33333333" name="RXF8EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6A" access="33333333" name="RXF8EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D69" access="33303033" name="RXF8SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D68" access="33333333" name="RXF8SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D67" access="33333333" name="RXF7EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D66" access="33333333" name="RXF7EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D65" access="33303033" name="RXF7SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D64" access="33333333" name="RXF7SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D63" access="33333333" name="RXF6EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D62" access="33333333" name="RXF6EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D61" access="33303033" name="RXF6SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D60" access="33333333" name="RXF6SIDH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F4685" unused_bank_mask="0x0000" >
+    <unused end="0x0D59" start="0x0D00" />
+    <unused end="0x0D6F" start="0x0D6C" />
+    <unused end="0x0D7F" start="0x0D7C" />
+    <unused end="0x0D8F" start="0x0D8C" />
+    <unused end="0x0DD3" start="0x0D94" />
+    <unused end="0x0DD7" start="0x0DD6" />
+    <unused end="0x0DDF" start="0x0DD9" />
+    <unused end="0x0DEF" start="0x0DE8" />
+    <unused end="0x0DF7" start="0x0DF4" />
+    <unused end="0x0DF9" start="0x0DF9" />
+    <unused end="0x0DFB" start="0x0DFB" />
+    <unused end="0x0DFF" start="0x0DFD" />
+    <unused end="0x0E1F" start="0x0E00" />
+    <unused end="0x0EFF" start="0x0E80" />
+    <unused end="0x0F7F" start="0x0F78" />
+    <unused end="0x0F88" start="0x0F85" />
+    <unused end="0x0F91" start="0x0F8E" />
+    <unused end="0x0F9A" start="0x0F97" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB9" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33330303" name="INTCON2" mclr="22220202" por="22220202" />
+    <sfr address="0x0FF0" access="33033033" name="INTCON3" mclr="22011011" por="22011011" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="33331133" name="OSCCON" mclr="12113111" por="12113111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33333333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9B" access="30033333" name="OSCTUNE" mclr="10011111" por="10011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="00001333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="00000333" name="LATE" mclr="00000333" por="00000000" />
+    <sfr address="0x0F96" access="33330333" name="TRISE" mclr="11110222" por="11110222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
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+    <sfr address="0x0E5E" access="11111111" name="CANSTAT_RO6" mclr="21111111" por="21111111" />
+    <sfr address="0x0E5D" access="33333333" name="B3D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5C" access="33333333" name="B3D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5B" access="33333333" name="B3D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5A" access="33333333" name="B3D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E59" access="33333333" name="B3D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E58" access="33333333" name="B3D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E57" access="33333333" name="B3D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E56" access="33333333" name="B3D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E55" access="03113333" name="B3DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E54" access="33333333" name="B3EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E53" access="33333333" name="B3EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E52" access="33333033" name="B3SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E51" access="33333333" name="B3SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E50" access="33113333" name="B3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E4F" access="33393331" name="CANCON_RO7" mclr="21111111" por="21111111" />
+    <sfr address="0x0E4E" access="11111111" name="CANSTAT_RO7" mclr="21111111" por="21111111" />
+    <sfr address="0x0E4D" access="33333333" name="B2D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4C" access="33333333" name="B2D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4B" access="33333333" name="B2D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4A" access="33333333" name="B2D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E49" access="33333333" name="B2D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E48" access="33333333" name="B2D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E47" access="33333333" name="B2D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E46" access="33333333" name="B2D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E45" access="03113333" name="B2DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E44" access="33333333" name="B2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E43" access="33333333" name="B2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E42" access="33333033" name="B2SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E41" access="33333333" name="B2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E40" access="33113333" name="B2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E3F" access="33393331" name="CANCON_RO8" mclr="21111111" por="21111111" />
+    <sfr address="0x0E3E" access="11111111" name="CANSTAT_RO8" mclr="21111111" por="21111111" />
+    <sfr address="0x0E3D" access="33333333" name="B1D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3C" access="33333333" name="B1D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3B" access="33333333" name="B1D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3A" access="33333333" name="B1D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E39" access="33333333" name="B1D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E38" access="33333333" name="B1D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E37" access="33333333" name="B1D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E36" access="33333333" name="B1D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E35" access="03113333" name="B1DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E34" access="33333333" name="B1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E33" access="33333333" name="B1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E32" access="33333033" name="B1SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E31" access="33333333" name="B1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E30" access="33113333" name="B1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E2F" access="33393331" name="CANCON_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2E" access="11111111" name="CANSTAT_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2D" access="33333333" name="B0D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2C" access="33333333" name="B0D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2B" access="33333333" name="B0D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2A" access="33333333" name="B0D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E29" access="33333333" name="B0D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E28" access="33333333" name="B0D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E27" access="33333333" name="B0D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E26" access="33333333" name="B0D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E25" access="03113333" name="B0DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E24" access="33333333" name="B0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E23" access="33333333" name="B0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E22" access="33333033" name="B0SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E21" access="33333333" name="B0SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E20" access="33113333" name="B0CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0DFC" access="00033300" name="TXBIE" mclr="00033300" por="00011100" />
+    <sfr address="0x0DFA" access="33333333" name="BIE0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF8" access="33333300" name="BSEL0" mclr="11111100" por="11111100" />
+    <sfr address="0x0DF3" access="33333333" name="MSEL3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF2" access="33333333" name="MSEL2" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF1" access="33333333" name="MSEL1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF0" access="33333333" name="MSEL0" mclr="12121111" por="12121111" />
+    <sfr address="0x0DE7" access="33333333" name="RXFBCON7" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE6" access="33333333" name="RXFBCON6" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE5" access="33333333" name="RXFBCON5" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE4" access="33333333" name="RXFBCON4" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE3" access="33333333" name="RXFBCON3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE2" access="33333333" name="RXFBCON2" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE1" access="33333333" name="RXFBCON1" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE0" access="33333333" name="RXFBCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD8" access="00033333" name="SDFLC" mclr="00011111" por="00011111" />
+    <sfr address="0x0DD5" access="33333333" name="RXFCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD4" access="33333333" name="RXFCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0D93" access="33333333" name="RXF15EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D92" access="33333333" name="RXF15EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D91" access="33303033" name="RXF15SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D90" access="33333333" name="RXF15SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8B" access="33333333" name="RXF14EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8A" access="33333333" name="RXF14EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D89" access="33303033" name="RXF14SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D88" access="33333333" name="RXF14SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D87" access="33333333" name="RXF13EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D86" access="33333333" name="RXF13EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D85" access="33303033" name="RXF13SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D84" access="33333333" name="RXF13SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D83" access="33333333" name="RXF12EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D82" access="33333333" name="RXF12EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D81" access="33303033" name="RXF12SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D80" access="33333333" name="RXF12SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7B" access="33333333" name="RXF11EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7A" access="33333333" name="RXF11EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D79" access="33303033" name="RXF11SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D78" access="33333333" name="RXF11SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D77" access="33333333" name="RXF10EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D76" access="33333333" name="RXF10EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D75" access="33303033" name="RXF10SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D74" access="33333333" name="RXF10SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D73" access="33333333" name="RXF9EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D72" access="33333333" name="RXF9EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D71" access="33303033" name="RXF9SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D70" access="33333333" name="RXF9SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6B" access="33333333" name="RXF8EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6A" access="33333333" name="RXF8EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D69" access="33303033" name="RXF8SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D68" access="33333333" name="RXF8SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D67" access="33333333" name="RXF7EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D66" access="33333333" name="RXF7EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D65" access="33303033" name="RXF7SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D64" access="33333333" name="RXF7SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D63" access="33333333" name="RXF6EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D62" access="33333333" name="RXF6EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D61" access="33303033" name="RXF6SIDL" mclr="33303033" por="00000000" />
+    <sfr address="0x0D60" access="33333333" name="RXF6SIDH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F6310" unused_bank_mask="0x7FF8" >
+    <unused end="0x0F6A" start="0x0F40" />
+    <unused end="0x0F7C" start="0x0F70" />
+    <unused end="0x0F7D" start="0x0F7D" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0F9A" start="0x0F99" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FAA" start="0x0FA6" />
+    <unused end="0x0FB6" start="0x0FB6" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="HLVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA5" access="00330003" name="IPR3" mclr="00220002" por="00220002" />
+    <sfr address="0x0FA4" access="00110003" name="PIR3" mclr="00110001" por="00110001" />
+    <sfr address="0x0FA3" access="00330003" name="PIE3" mclr="00110001" por="00110001" />
+    <sfr address="0x0FA2" access="33003333" name="IPR2" mclr="22002222" por="22002222" />
+    <sfr address="0x0FA1" access="33003333" name="PIR2" mclr="11001111" por="11001111" />
+    <sfr address="0x0FA0" access="33003333" name="PIE2" mclr="11001111" por="11001111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD3" access="33333133" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="31111111" por="01111111" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00133333" name="PORTG" mclr="00333333" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="00333333" name="CCP3CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="31033033" name="BAUDCON1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F6390" unused_bank_mask="0x7FF8" >
+    <unused end="0x0F57" start="0x0F40" />
+    <unused end="0x0F5F" start="0x0F5E" />
+    <unused end="0x0F7D" start="0x0F7D" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0F9A" start="0x0F99" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FAA" start="0x0FA6" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB6" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="HLVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA5" access="03330000" name="IPR3" mclr="02220000" por="02220000" />
+    <sfr address="0x0FA4" access="03110000" name="PIR3" mclr="01110000" por="01110000" />
+    <sfr address="0x0FA3" access="03330000" name="PIE3" mclr="01110000" por="01110000" />
+    <sfr address="0x0FA2" access="33003333" name="IPR2" mclr="22002222" por="22002222" />
+    <sfr address="0x0FA1" access="33003333" name="PIR2" mclr="11001111" por="11001111" />
+    <sfr address="0x0FA0" access="33003333" name="PIE2" mclr="11001111" por="11001111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0FD3" access="33333133" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33330000" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33330000" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33330000" name="TRISE" mclr="22220000" por="22220000" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="31111111" por="01111111" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00133333" name="PORTG" mclr="00333333" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="31033033" name="BAUDCON1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="33333333" name="LCDD23" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7B" access="33333333" name="LCDD22" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7A" access="33333333" name="LCDD21" mclr="33333333" por="00000000" />
+    <sfr address="0x0F79" access="33333333" name="LCDD20" mclr="33333333" por="00000000" />
+    <sfr address="0x0F78" access="33333333" name="LCDD19" mclr="33333333" por="00000000" />
+    <sfr address="0x0F77" access="33333333" name="LCDD18" mclr="33333333" por="00000000" />
+    <sfr address="0x0F76" access="33333333" name="LCDD17" mclr="33333333" por="00000000" />
+    <sfr address="0x0F75" access="33333333" name="LCDD16" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="LCDD15" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="33333333" name="LCDD14" mclr="33333333" por="00000000" />
+    <sfr address="0x0F72" access="33333333" name="LCDD13" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="LCDD12" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="33333333" name="LCDD11" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6A" access="33333333" name="LCDD10" mclr="33333333" por="00000000" />
+    <sfr address="0x0F69" access="33333333" name="LCDD9" mclr="33333333" por="00000000" />
+    <sfr address="0x0F68" access="33333333" name="LCDD8" mclr="33333333" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="LCDD7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F66" access="33333333" name="LCDD6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="LCDD5" mclr="33333333" por="00000000" />
+    <sfr address="0x0F64" access="33333333" name="LCDD4" mclr="33333333" por="00000000" />
+    <sfr address="0x0F63" access="33333333" name="LCDD3" mclr="33333333" por="00000000" />
+    <sfr address="0x0F62" access="33333333" name="LCDD2" mclr="33333333" por="00000000" />
+    <sfr address="0x0F61" access="33333333" name="LCDD1" mclr="33333333" por="00000000" />
+    <sfr address="0x0F60" access="33333333" name="LCDD0" mclr="33333333" por="00000000" />
+    <sfr address="0x0F5D" access="33333333" name="LCDSE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5C" access="33333333" name="LCDSE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5B" access="33333333" name="LCDSE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5A" access="33333333" name="LCDSE0" mclr="11111111" por="11111111" />
+    <sfr address="0x0F59" access="33303333" name="LCDCON" mclr="11101111" por="11101111" />
+    <sfr address="0x0F58" access="33333333" name="LCDPS" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F63J11" unused_bank_mask="0x7FF0" >
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F9A" start="0x0F99" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0FBF" start="0x0F6B" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="03333333" name="INTCON2" mclr="02222222" por="02222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="03333333" name="VREG_CNTL" mclr="01222111" por="01222111" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="00330330" name="IPR3" mclr="10221221" por="10221221" />
+    <sfr address="0x0FA4" access="00330330" name="PIR3" mclr="10111111" por="10111111" />
+    <sfr address="0x0FA3" access="00330330" name="PIE3" mclr="10111111" por="10111111" />
+    <sfr address="0x0FA2" access="33003330" name="IPR2" mclr="22112221" por="22112221" />
+    <sfr address="0x0FA1" access="33003330" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33003330" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="33333033" name="IPR1" mclr="22222122" por="22222122" />
+    <sfr address="0x0F9E" access="33113033" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333033" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="02110100" por="02110100" />
+    <sfr address="0x0F9B" access="30333333" name="OSCTUNE" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <sfr address="0x0F68" access="00333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="CCPR1L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F6A" access="33333333" name="CCPR1H" mclr="00000000" por="00000000" />
+    <sfr address="0x0F65" access="00333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="CCPR2L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="CCPR2H" mclr="00000000" por="00000000" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB0" access="11330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F64" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F60" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F63J90" unused_bank_mask="0x7FF0" >
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F9A" start="0x0F99" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="03333333" name="INTCON2" mclr="02222222" por="02222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="03333333" name="VREG_CNTL" mclr="01222111" por="01222111" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="03330330" name="IPR3" mclr="12221221" por="12221221" />
+    <sfr address="0x0FA4" access="03330330" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="03330330" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33003330" name="IPR2" mclr="22112221" por="22112221" />
+    <sfr address="0x0FA1" access="33003330" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33003330" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="03333033" name="IPR1" mclr="02222122" por="02222122" />
+    <sfr address="0x0F9E" access="03113033" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333033" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="02110100" por="02110100" />
+    <sfr address="0x0F9B" access="30333333" name="OSCTUNE" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <sfr address="0x0F68" access="00333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="CCPR1L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F6A" access="33333333" name="CCPR1H" mclr="00000000" por="00000000" />
+    <sfr address="0x0F65" access="00333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="CCPR2L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="CCPR2H" mclr="00000000" por="00000000" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F64" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F60" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+    <sfr address="0x0FBF" access="33333333" name="LCDD4" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="LCDD3" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="LCDD2" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBC" access="33333333" name="LCDD1" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="LCDD0" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="LCDSE5" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB9" access="33333333" name="LCDSE4" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB8" access="33333333" name="LCDSE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="LCDSE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="LCDSE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="33333333" name="LCDPS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA9" access="33333333" name="LCDSE0" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33303333" name="LCDCON" mclr="11101111" por="11101111" />
+    <sfr address="0x0F7D" access="33333333" name="LCDD23" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7C" access="33333333" name="LCDD22" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7B" access="33333333" name="LCDD21" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7A" access="33333333" name="LCDD20" mclr="33333333" por="00000000" />
+    <sfr address="0x0F79" access="33333333" name="LCDD19" mclr="33333333" por="00000000" />
+    <sfr address="0x0F78" access="33333333" name="LCDD18" mclr="33333333" por="00000000" />
+    <sfr address="0x0F77" access="33333333" name="LCDD17" mclr="33333333" por="00000000" />
+    <sfr address="0x0F76" access="33333333" name="LCDD16" mclr="33333333" por="00000000" />
+    <sfr address="0x0F75" access="33333333" name="LCDD15" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="LCDD14" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="33333333" name="LCDD13" mclr="33333333" por="00000000" />
+    <sfr address="0x0F72" access="33333333" name="LCDD12" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="LCDD11" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="33333333" name="LCDD10" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6F" access="33333333" name="LCDD9" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6E" access="33333333" name="LCDD8" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6D" access="33333333" name="LCDD7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6C" access="33333333" name="LCDD6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6B" access="33333333" name="LCDD5" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F6410" unused_bank_mask="0x7FF8" >
+    <unused end="0x0F6A" start="0x0F00" />
+    <unused end="0x0F7C" start="0x0F70" />
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+    <unused end="0x0F9A" start="0x0F99" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FAA" start="0x0FA6" />
+    <unused end="0x0FB6" start="0x0FB6" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
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+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
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+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
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+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="HLVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA5" access="00330003" name="IPR3" mclr="00220002" por="00220002" />
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+    <sfr address="0x0FA3" access="00330003" name="PIE3" mclr="00110001" por="00110001" />
+    <sfr address="0x0FA2" access="33003333" name="IPR2" mclr="22002222" por="22002222" />
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+    <sfr address="0x0FA0" access="33003333" name="PIE2" mclr="11001111" por="11001111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD3" access="33333133" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="31111111" por="01111111" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00133333" name="PORTG" mclr="00333333" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
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+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="00333333" name="CCP3CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
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+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="31033033" name="BAUDCON1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F6490" unused_bank_mask="0x7FF8" >
+    <unused end="0x0F57" start="0x0F40" />
+    <unused end="0x0F5F" start="0x0F5E" />
+    <unused end="0x0F7D" start="0x0F7D" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0F9A" start="0x0F99" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FAA" start="0x0FA6" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB6" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="HLVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA5" access="03330000" name="IPR3" mclr="02220000" por="02220000" />
+    <sfr address="0x0FA4" access="03110000" name="PIR3" mclr="01110000" por="01110000" />
+    <sfr address="0x0FA3" access="03330000" name="PIE3" mclr="01110000" por="01110000" />
+    <sfr address="0x0FA2" access="33003333" name="IPR2" mclr="22002222" por="22002222" />
+    <sfr address="0x0FA1" access="33003333" name="PIR2" mclr="11001111" por="11001111" />
+    <sfr address="0x0FA0" access="33003333" name="PIE2" mclr="11001111" por="11001111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0FD3" access="33333133" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33330000" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33330000" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33330000" name="TRISE" mclr="22220000" por="22220000" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="31111111" por="01111111" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00133333" name="PORTG" mclr="00333333" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="31033033" name="BAUDCON1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="33333333" name="LCDD23" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7B" access="33333333" name="LCDD22" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7A" access="33333333" name="LCDD21" mclr="33333333" por="00000000" />
+    <sfr address="0x0F79" access="33333333" name="LCDD20" mclr="33333333" por="00000000" />
+    <sfr address="0x0F78" access="33333333" name="LCDD19" mclr="33333333" por="00000000" />
+    <sfr address="0x0F77" access="33333333" name="LCDD18" mclr="33333333" por="00000000" />
+    <sfr address="0x0F76" access="33333333" name="LCDD17" mclr="33333333" por="00000000" />
+    <sfr address="0x0F75" access="33333333" name="LCDD16" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="LCDD15" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="33333333" name="LCDD14" mclr="33333333" por="00000000" />
+    <sfr address="0x0F72" access="33333333" name="LCDD13" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="LCDD12" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="33333333" name="LCDD11" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6A" access="33333333" name="LCDD10" mclr="33333333" por="00000000" />
+    <sfr address="0x0F69" access="33333333" name="LCDD9" mclr="33333333" por="00000000" />
+    <sfr address="0x0F68" access="33333333" name="LCDD8" mclr="33333333" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="LCDD7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F66" access="33333333" name="LCDD6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="LCDD5" mclr="33333333" por="00000000" />
+    <sfr address="0x0F64" access="33333333" name="LCDD4" mclr="33333333" por="00000000" />
+    <sfr address="0x0F63" access="33333333" name="LCDD3" mclr="33333333" por="00000000" />
+    <sfr address="0x0F62" access="33333333" name="LCDD2" mclr="33333333" por="00000000" />
+    <sfr address="0x0F61" access="33333333" name="LCDD1" mclr="33333333" por="00000000" />
+    <sfr address="0x0F60" access="33333333" name="LCDD0" mclr="33333333" por="00000000" />
+    <sfr address="0x0F5D" access="33333333" name="LCDSE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5C" access="33333333" name="LCDSE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5B" access="33333333" name="LCDSE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5A" access="33333333" name="LCDSE0" mclr="11111111" por="11111111" />
+    <sfr address="0x0F59" access="33303333" name="LCDCON" mclr="11101111" por="11101111" />
+    <sfr address="0x0F58" access="33333333" name="LCDPS" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F64J11" unused_bank_mask="0x7FF0" >
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F9A" start="0x0F99" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0FBF" start="0x0F6B" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="03333333" name="INTCON2" mclr="02222222" por="02222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="03333333" name="VREG_CNTL" mclr="01222111" por="01222111" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="00330330" name="IPR3" mclr="10221221" por="10221221" />
+    <sfr address="0x0FA4" access="00330330" name="PIR3" mclr="10111111" por="10111111" />
+    <sfr address="0x0FA3" access="00330330" name="PIE3" mclr="10111111" por="10111111" />
+    <sfr address="0x0FA2" access="33003330" name="IPR2" mclr="22112221" por="22112221" />
+    <sfr address="0x0FA1" access="33003330" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33003330" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="33333033" name="IPR1" mclr="22222122" por="22222122" />
+    <sfr address="0x0F9E" access="33113033" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333033" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="02110100" por="02110100" />
+    <sfr address="0x0F9B" access="30333333" name="OSCTUNE" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <sfr address="0x0F68" access="00333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="CCPR1L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F6A" access="33333333" name="CCPR1H" mclr="00000000" por="00000000" />
+    <sfr address="0x0F65" access="00333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="CCPR2L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="CCPR2H" mclr="00000000" por="00000000" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB0" access="11330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F64" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F60" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F64J90" unused_bank_mask="0x7FF0" >
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F9A" start="0x0F99" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="03333333" name="INTCON2" mclr="02222222" por="02222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="03333333" name="VREG_CNTL" mclr="01222111" por="01222111" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="03330330" name="IPR3" mclr="12221221" por="12221221" />
+    <sfr address="0x0FA4" access="03330330" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="03330330" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33003330" name="IPR2" mclr="22112221" por="22112221" />
+    <sfr address="0x0FA1" access="33003330" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33003330" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="03333033" name="IPR1" mclr="02222122" por="02222122" />
+    <sfr address="0x0F9E" access="03113033" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333033" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="02110100" por="02110100" />
+    <sfr address="0x0F9B" access="30333333" name="OSCTUNE" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <sfr address="0x0F68" access="00333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="CCPR1L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F6A" access="33333333" name="CCPR1H" mclr="00000000" por="00000000" />
+    <sfr address="0x0F65" access="00333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="CCPR2L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="CCPR2H" mclr="00000000" por="00000000" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F64" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F60" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+    <sfr address="0x0FBF" access="33333333" name="LCDD4" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="LCDD3" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="LCDD2" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBC" access="33333333" name="LCDD1" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="LCDD0" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="LCDSE5" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB9" access="33333333" name="LCDSE4" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB8" access="33333333" name="LCDSE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="LCDSE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="LCDSE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="33333333" name="LCDPS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA9" access="33333333" name="LCDSE0" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33303333" name="LCDCON" mclr="11101111" por="11101111" />
+    <sfr address="0x0F7D" access="33333333" name="LCDD23" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7C" access="33333333" name="LCDD22" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7B" access="33333333" name="LCDD21" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7A" access="33333333" name="LCDD20" mclr="33333333" por="00000000" />
+    <sfr address="0x0F79" access="33333333" name="LCDD19" mclr="33333333" por="00000000" />
+    <sfr address="0x0F78" access="33333333" name="LCDD18" mclr="33333333" por="00000000" />
+    <sfr address="0x0F77" access="33333333" name="LCDD17" mclr="33333333" por="00000000" />
+    <sfr address="0x0F76" access="33333333" name="LCDD16" mclr="33333333" por="00000000" />
+    <sfr address="0x0F75" access="33333333" name="LCDD15" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="LCDD14" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="33333333" name="LCDD13" mclr="33333333" por="00000000" />
+    <sfr address="0x0F72" access="33333333" name="LCDD12" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="LCDD11" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="33333333" name="LCDD10" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6F" access="33333333" name="LCDD9" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6E" access="33333333" name="LCDD8" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6D" access="33333333" name="LCDD7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6C" access="33333333" name="LCDD6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6B" access="33333333" name="LCDD5" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F6520" unused_bank_mask="0x7F00" >
+    <unused end="0x0F6A" start="0x0F00" />
+    <unused end="0x0F7F" start="0x0F79" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0F9A" start="0x0F99" />
+    <unused end="0x0F9B" start="0x0F9B" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FB6" start="0x0FB6" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
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+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
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+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
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+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
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+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00000003" name="OSCCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="00333333" name="IPR3" mclr="00222222" por="00222222" />
+    <sfr address="0x0FA4" access="00113333" name="PIR3" mclr="00111111" por="00111111" />
+    <sfr address="0x0FA3" access="00333333" name="PIE3" mclr="00111111" por="00111111" />
+    <sfr address="0x0FA2" access="03033333" name="IPR2" mclr="02022222" por="02022222" />
+    <sfr address="0x0FA1" access="03033333" name="PIR2" mclr="01011111" por="01011111" />
+    <sfr address="0x0FA0" access="03033333" name="PIE2" mclr="01011111" por="01011111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
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+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30000333" name="ADCON2" mclr="10000111" por="10000111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="00333333" name="CCP3CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
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+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
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+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
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+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30333333" name="T1CON" mclr="30333333" por="10111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="00000033" name="EEADRH" mclr="00000011" por="00000011" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F6525" unused_bank_mask="0x0000" >
+    <unused end="0x0F66" start="0x0F00" />
+    <unused end="0x0F7B" start="0x0F7A" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0F9C" start="0x0F99" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00003333" name="OSCCON" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10044433" por="10022211" />
+    <sfr address="0x0FA5" access="00333333" name="IPR3" mclr="00222222" por="00222222" />
+    <sfr address="0x0FA4" access="00113333" name="PIR3" mclr="00111111" por="00111111" />
+    <sfr address="0x0FA3" access="00333333" name="PIE3" mclr="00111111" por="00111111" />
+    <sfr address="0x0FA2" access="03033333" name="IPR2" mclr="02022222" por="02022222" />
+    <sfr address="0x0FA1" access="03033333" name="PIR2" mclr="01011111" por="01011111" />
+    <sfr address="0x0FA0" access="03033333" name="PIE2" mclr="01011111" por="01011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="31111111" por="01111111" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00133333" name="PORTG" mclr="00333333" por="00000000" />
+    <sfr address="0x0F98" access="00133333" name="TRISG" mclr="00222222" por="00222222" />
+    <sfr address="0x0F8F" access="00133333" name="LATG" mclr="00333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="ECCP2DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="ECCP3DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33303333" name="CVRCON" mclr="11101111" por="11101111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FAA" access="00000033" name="EEADRH" mclr="00000011" por="00000011" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0F7E" access="01033033" name="BAUDCON1" mclr="02021011" por="02021011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="01033033" name="BAUDCON2" mclr="02021011" por="02021011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F6527" unused_bank_mask="0x0000" >
+    <unused end="0x0F61" start="0x0F60" />
+    <unused end="0x0F7B" start="0x0F7A" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0F9A" start="0x0F99" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="11222222" por="11222222" />
+    <sfr address="0x0FA4" access="33113333" name="PIR3" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="33333133" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00133333" name="PORTG" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00000000" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="ECCP1DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="ECCP2DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="ECCP3DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F64" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FAA" access="00000033" name="EEADRH" mclr="00000011" por="00000011" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33333399" name="EECON1" mclr="33313111" por="00010111" />
+    <sfr address="0x0F7E" access="01033033" name="BAUDCTL1" mclr="02011011" por="02011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="01033033" name="BAUDCTL2" mclr="02011011" por="02011011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33333313" name="TXSTA2" mclr="11111121" por="11111121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F6585" unused_bank_mask="0x0000" >
+    <unused end="0x0D5F" start="0x0D00" />
+    <unused end="0x0D6F" start="0x0D6C" />
+    <unused end="0x0D7F" start="0x0D7C" />
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+    <unused end="0x0DD3" start="0x0D94" />
+    <unused end="0x0DD7" start="0x0DD6" />
+    <unused end="0x0DDF" start="0x0DD9" />
+    <unused end="0x0DEF" start="0x0DE8" />
+    <unused end="0x0DF7" start="0x0DF4" />
+    <unused end="0x0DF9" start="0x0DF9" />
+    <unused end="0x0DFB" start="0x0DFB" />
+    <unused end="0x0E1F" start="0x0DFD" />
+    <unused end="0x0EFF" start="0x0E80" />
+    <unused end="0x0F78" start="0x0F78" />
+    <unused end="0x0F7D" start="0x0F7A" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0F9C" start="0x0F99" />
+    <unused end="0x0FB9" start="0x0FB7" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
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+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00001133" name="OSCCON" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33333333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="03033333" name="IPR2" mclr="02022222" por="02022222" />
+    <sfr address="0x0FA1" access="03033333" name="PIR2" mclr="01011111" por="01011111" />
+    <sfr address="0x0FA0" access="03033333" name="PIE2" mclr="01011111" por="01011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
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+    <sfr address="0x0E66" access="33333333" name="B4D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E65" access="03113333" name="B4DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E64" access="33333333" name="B4EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E63" access="33333333" name="B4EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E62" access="33333033" name="B4SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E61" access="33333333" name="B4SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E60" access="33113333" name="B4CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E5F" access="33393331" name="CANCON_RO6" mclr="21111111" por="21111111" />
+    <sfr address="0x0E5E" access="11111111" name="CANSTAT_RO6" mclr="21111111" por="21111111" />
+    <sfr address="0x0E5D" access="33333333" name="B3D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5C" access="33333333" name="B3D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5B" access="33333333" name="B3D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5A" access="33333333" name="B3D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E59" access="33333333" name="B3D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E58" access="33333333" name="B3D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E57" access="33333333" name="B3D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E56" access="33333333" name="B3D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E55" access="03113333" name="B3DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E54" access="33333333" name="B3EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E53" access="33333333" name="B3EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E52" access="33333033" name="B3SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E51" access="33333333" name="B3SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E50" access="33113333" name="B3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E4F" access="33393331" name="CANCON_RO7" mclr="21111111" por="21111111" />
+    <sfr address="0x0E4E" access="11111111" name="CANSTAT_RO7" mclr="21111111" por="21111111" />
+    <sfr address="0x0E4D" access="33333333" name="B2D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4C" access="33333333" name="B2D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4B" access="33333333" name="B2D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4A" access="33333333" name="B2D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E49" access="33333333" name="B2D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E48" access="33333333" name="B2D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E47" access="33333333" name="B2D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E46" access="33333333" name="B2D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E45" access="03113333" name="B2DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E44" access="33333333" name="B2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E43" access="33333333" name="B2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E42" access="33333033" name="B2SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E41" access="33333333" name="B2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E40" access="33113333" name="B2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E3F" access="33393331" name="CANCON_RO8" mclr="21111111" por="21111111" />
+    <sfr address="0x0E3E" access="11111111" name="CANSTAT_RO8" mclr="21111111" por="21111111" />
+    <sfr address="0x0E3D" access="33333333" name="B1D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3C" access="33333333" name="B1D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3B" access="33333333" name="B1D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3A" access="33333333" name="B1D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E39" access="33333333" name="B1D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E38" access="33333333" name="B1D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E37" access="33333333" name="B1D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E36" access="33333333" name="B1D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E35" access="03113333" name="B1DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E34" access="33333333" name="B1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E33" access="33333333" name="B1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E32" access="33333033" name="B1SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E31" access="33333333" name="B1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E30" access="33113333" name="B1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E2F" access="33393331" name="CANCON_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2E" access="11111111" name="CANSTAT_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2D" access="33333333" name="B0D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2C" access="33333333" name="B0D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2B" access="33333333" name="B0D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2A" access="33333333" name="B0D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E29" access="33333333" name="B0D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E28" access="33333333" name="B0D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E27" access="33333333" name="B0D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E26" access="33333333" name="B0D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E25" access="03113333" name="B0DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E24" access="33333333" name="B0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E23" access="33333333" name="B0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E22" access="33333033" name="B0SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E21" access="33333333" name="B0SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E20" access="33113333" name="B0CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0DFC" access="00033300" name="TXBIE" mclr="00033300" por="00011100" />
+    <sfr address="0x0DFA" access="33333333" name="BIE0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF8" access="33333300" name="BSEL0" mclr="11111100" por="11111100" />
+    <sfr address="0x0DF3" access="33333333" name="MSEL3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF2" access="33333333" name="MSEL2" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF1" access="33333333" name="MSEL1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF0" access="33333333" name="MSEL0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE7" access="33333333" name="RXFBCON7" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE6" access="33333333" name="RXFBCON6" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE5" access="33333333" name="RXFBCON5" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE4" access="33333333" name="RXFBCON4" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE3" access="33333333" name="RXFBCON3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE2" access="33333333" name="RXFBCON2" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE1" access="33333333" name="RXFBCON1" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE0" access="33333333" name="RXFBCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD8" access="00033333" name="SDFLC" mclr="00011111" por="00011111" />
+    <sfr address="0x0DD5" access="33333333" name="RXFCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD4" access="33333333" name="RXFCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0D93" access="33333333" name="RXF15EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D92" access="33333333" name="RXF15EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D91" access="33333033" name="RXF15SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D90" access="33333333" name="RXF15SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8B" access="33333333" name="RXF14EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8A" access="33333333" name="RXF14EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D89" access="33333033" name="RXF14SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D88" access="33333333" name="RXF14SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D87" access="33333333" name="RXF13EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D86" access="33333333" name="RXF13EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D85" access="33333033" name="RXF13SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D84" access="33333333" name="RXF13SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D83" access="33333333" name="RXF12EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D82" access="33333333" name="RXF12EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D81" access="33333033" name="RXF12SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D80" access="33333333" name="RXF12SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7B" access="33333333" name="RXF11EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7A" access="33333333" name="RXF11EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D79" access="33333033" name="RXF11SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D78" access="33333333" name="RXF11SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D77" access="33333333" name="RXF10EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D76" access="33333333" name="RXF10EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D75" access="33333033" name="RXF10SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D74" access="33333333" name="RXF10SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D73" access="33333333" name="RXF9EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D72" access="33333333" name="RXF9EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D71" access="33333033" name="RXF9SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D70" access="33333333" name="RXF9SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6B" access="33333333" name="RXF8EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6A" access="33333333" name="RXF8EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D69" access="33333033" name="RXF8SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D68" access="33333333" name="RXF8SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D67" access="33333333" name="RXF7EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D66" access="33333333" name="RXF7EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D65" access="33333033" name="RXF7SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D64" access="33333333" name="RXF7SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D63" access="33333333" name="RXF6EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D62" access="33333333" name="RXF6EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D61" access="33333033" name="RXF6SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D60" access="33333333" name="RXF6SIDH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F65J10" unused_bank_mask="0x7F00" >
+    <unused end="0x0F5F" start="0x0F00" />
+    <unused end="0x0F61" start="0x0F60" />
+    <unused end="0x0F7B" start="0x0F7A" />
+    <unused end="0x0FAA" start="0x0FA8" />
+    <unused end="0x0FD2" start="0x0FD2" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0F9A" start="0x0F99" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33003033" name="IPR2" mclr="22002022" por="22002022" />
+    <sfr address="0x0FA1" access="33003033" name="PIR2" mclr="11001011" por="11001011" />
+    <sfr address="0x0FA0" access="33003033" name="PIE2" mclr="11001011" por="11001011" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="30003033" name="OSCCON" mclr="10001011" por="10001011" />
+    <sfr address="0x0F9B" access="03000000" name="OSCTUNE" mclr="01000000" por="01000000" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F64" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0FB0" access="11330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="51033033" name="BAUDCON1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51033033" name="BAUDCON2" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F65J11" unused_bank_mask="0x7F00" >
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F9A" start="0x0F99" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0FBF" start="0x0F6B" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="03333333" name="INTCON2" mclr="02222222" por="02222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="03333333" name="VREG_CNTL" mclr="01222111" por="01222111" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="00330330" name="IPR3" mclr="10221221" por="10221221" />
+    <sfr address="0x0FA4" access="00330330" name="PIR3" mclr="10111111" por="10111111" />
+    <sfr address="0x0FA3" access="00330330" name="PIE3" mclr="10111111" por="10111111" />
+    <sfr address="0x0FA2" access="33003330" name="IPR2" mclr="22112221" por="22112221" />
+    <sfr address="0x0FA1" access="33003330" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33003330" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="33333033" name="IPR1" mclr="22222122" por="22222122" />
+    <sfr address="0x0F9E" access="33113033" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333033" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="02110100" por="02110100" />
+    <sfr address="0x0F9B" access="30333333" name="OSCTUNE" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <sfr address="0x0F68" access="00333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="CCPR1L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F6A" access="33333333" name="CCPR1H" mclr="00000000" por="00000000" />
+    <sfr address="0x0F65" access="00333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="CCPR2L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="CCPR2H" mclr="00000000" por="00000000" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB0" access="11330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F64" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F60" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F65J15" unused_bank_mask="0x7F00" >
+    <unused end="0x0F5F" start="0x0F00" />
+    <unused end="0x0F61" start="0x0F60" />
+    <unused end="0x0F7B" start="0x0F7A" />
+    <unused end="0x0FAA" start="0x0FA8" />
+    <unused end="0x0FD2" start="0x0FD2" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0F9A" start="0x0F99" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33003033" name="IPR2" mclr="22002022" por="22002022" />
+    <sfr address="0x0FA1" access="33003033" name="PIR2" mclr="11001011" por="11001011" />
+    <sfr address="0x0FA0" access="33003033" name="PIE2" mclr="11001011" por="11001011" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="30003033" name="OSCCON" mclr="10001011" por="10001011" />
+    <sfr address="0x0F9B" access="03000000" name="OSCTUNE" mclr="01000000" por="01000000" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F64" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0FB0" access="11330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="51033033" name="BAUDCON1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51033033" name="BAUDCON2" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F65J50" unused_bank_mask="0x0000" >
+    <unused end="0x0F59" start="0x0F40" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD0" access="30333333" name="RCON" mclr="10334433" por="10222211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33333333" name="IPR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA1" access="33333333" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33333333" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC0" access="30030003" name="WDTCON" mclr="10010001" por="10010001" />
+    <sfr address="0x0FD4" access="33333333" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33333333" name="OSCTUNE" mclr="11111111" por="11111111" />
+    <sfr address="0x0001" access="30333333" name="REFOCON" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333300" name="PORTF" mclr="31111100" por="01111100" />
+    <sfr address="0x0F8E" access="33333300" name="LATF" mclr="33333300" por="00000000" />
+    <sfr address="0x0F97" access="33333300" name="TRISF" mclr="22222200" por="22222200" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333333" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="00003300" name="ANCON1" mclr="00001100" por="00001100" />
+    <sfr address="0x0FC1" access="33333333" name="ADCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="30033333" name="ANCON2" mclr="10011111" por="10011111" />
+    <sfr address="0x0FBF" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBE" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBC" size="2" name="CCPR1" />
+    <sfr address="0x0FBD" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB9" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB7" size="2" name="CCPR2" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB2" size="2" name="CCPR3" />
+    <sfr address="0x0FB3" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0004" access="00033333" name="ODCON1" mclr="00011111" por="00011111" />
+    <sfr address="0x0005" access="00000033" name="ODCON2" mclr="00000011" por="00000011" />
+    <sfr address="0x0006" access="00000033" name="ODCON3" mclr="00000011" por="00000011" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6E" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6B" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0F7A" size="2" name="TMR3" />
+    <sfr address="0x0F7B" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7A" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F79" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0F69" access="33333333" name="PMPADDRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="PMPADDRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PMPDATA1H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="PMPDATA1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F65" access="30333333" name="PMPCONH" mclr="10111111" por="10111111" />
+    <sfr address="0x0F64" access="33333333" name="PMPCONL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="13333333" name="PMPMODEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="PMPMODEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33333333" name="PMPDATAOUT2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F60" access="33333333" name="PMPDATAOUT2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5F" access="33333333" name="PMPDATA2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5E" access="33333333" name="PMPDATA2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5D" access="33333333" name="PMPPEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5C" access="33333333" name="PMPPEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5B" access="19001111" name="PMPSTATH" mclr="11001111" por="11001111" />
+    <sfr address="0x0F5A" access="19001111" name="PMPSTATL" mclr="21002222" por="21002222" />
+    <sfr address="0x0009" access="00000003" name="PADCFG1" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD3" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD2" access="33333333" name="CM1CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0FD1" access="33333333" name="CM2CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0F6A" access="00000011" name="CMSTAT" mclr="00000022" por="00000022" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAC" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51333033" name="BAUDCTL2" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAB" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA9" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333313" name="TXSTA2" mclr="11111121" por="11111121" />
+    <sfr address="0x0F9C" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F65J90" unused_bank_mask="0x7F00" >
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F9A" start="0x0F99" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="03333333" name="INTCON2" mclr="02222222" por="02222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="03333333" name="VREG_CNTL" mclr="01222111" por="01222111" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="03330330" name="IPR3" mclr="12221221" por="12221221" />
+    <sfr address="0x0FA4" access="03330330" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="03330330" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33003330" name="IPR2" mclr="22112221" por="22112221" />
+    <sfr address="0x0FA1" access="33003330" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33003330" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="03333033" name="IPR1" mclr="02222122" por="02222122" />
+    <sfr address="0x0F9E" access="03113033" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333033" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="02110100" por="02110100" />
+    <sfr address="0x0F9B" access="30333333" name="OSCTUNE" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <sfr address="0x0F68" access="00333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="CCPR1L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F6A" access="33333333" name="CCPR1H" mclr="00000000" por="00000000" />
+    <sfr address="0x0F65" access="00333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="CCPR2L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="CCPR2H" mclr="00000000" por="00000000" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F64" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F60" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+    <sfr address="0x0FBF" access="33333333" name="LCDD4" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="LCDD3" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="LCDD2" mclr="33333333" por="00000000" />
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+    <sfr address="0x0FBA" access="33333333" name="LCDSE5" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB9" access="33333333" name="LCDSE4" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB8" access="33333333" name="LCDSE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="LCDSE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="LCDSE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="33333333" name="LCDPS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA9" access="33333333" name="LCDSE0" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33303333" name="LCDCON" mclr="11101111" por="11101111" />
+    <sfr address="0x0F7D" access="33333333" name="LCDD23" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7C" access="33333333" name="LCDD22" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7B" access="33333333" name="LCDD21" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7A" access="33333333" name="LCDD20" mclr="33333333" por="00000000" />
+    <sfr address="0x0F79" access="33333333" name="LCDD19" mclr="33333333" por="00000000" />
+    <sfr address="0x0F78" access="33333333" name="LCDD18" mclr="33333333" por="00000000" />
+    <sfr address="0x0F77" access="33333333" name="LCDD17" mclr="33333333" por="00000000" />
+    <sfr address="0x0F76" access="33333333" name="LCDD16" mclr="33333333" por="00000000" />
+    <sfr address="0x0F75" access="33333333" name="LCDD15" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="LCDD14" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="33333333" name="LCDD13" mclr="33333333" por="00000000" />
+    <sfr address="0x0F72" access="33333333" name="LCDD12" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="LCDD11" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="33333333" name="LCDD10" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6F" access="33333333" name="LCDD9" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6E" access="33333333" name="LCDD8" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6D" access="33333333" name="LCDD7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6C" access="33333333" name="LCDD6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6B" access="33333333" name="LCDD5" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F6620" unused_bank_mask="0x0000" >
+    <unused end="0x0F6A" start="0x0F00" />
+    <unused end="0x0F7F" start="0x0F79" />
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+    <unused end="0x0F9A" start="0x0F99" />
+    <unused end="0x0F9B" start="0x0F9B" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FB6" start="0x0FB6" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
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+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
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+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
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+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
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+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00000003" name="OSCCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="00333333" name="IPR3" mclr="00222222" por="00222222" />
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+    <sfr address="0x0FA3" access="00333333" name="PIE3" mclr="00111111" por="00111111" />
+    <sfr address="0x0FA2" access="03033333" name="IPR2" mclr="02022222" por="02022222" />
+    <sfr address="0x0FA1" access="03033333" name="PIR2" mclr="01011111" por="01011111" />
+    <sfr address="0x0FA0" access="03033333" name="PIE2" mclr="01011111" por="01011111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
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+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
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+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30000333" name="ADCON2" mclr="10000111" por="10000111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
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+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
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+    <sfr address="0x0FB7" access="00333333" name="CCP3CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
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+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30333333" name="T1CON" mclr="30333333" por="10111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="00000033" name="EEADRH" mclr="00000011" por="00000011" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F6621" unused_bank_mask="0x0000" >
+    <unused end="0x0F66" start="0x0F00" />
+    <unused end="0x0F7B" start="0x0F7A" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0F9C" start="0x0F99" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00003333" name="OSCCON" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10044433" por="10022211" />
+    <sfr address="0x0FA5" access="00333333" name="IPR3" mclr="00222222" por="00222222" />
+    <sfr address="0x0FA4" access="00113333" name="PIR3" mclr="00111111" por="00111111" />
+    <sfr address="0x0FA3" access="00333333" name="PIE3" mclr="00111111" por="00111111" />
+    <sfr address="0x0FA2" access="03033333" name="IPR2" mclr="02022222" por="02022222" />
+    <sfr address="0x0FA1" access="03033333" name="PIR2" mclr="01011111" por="01011111" />
+    <sfr address="0x0FA0" access="03033333" name="PIE2" mclr="01011111" por="01011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="31111111" por="01111111" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00133333" name="PORTG" mclr="00333333" por="00000000" />
+    <sfr address="0x0F98" access="00133333" name="TRISG" mclr="00222222" por="00222222" />
+    <sfr address="0x0F8F" access="00133333" name="LATG" mclr="00333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="ECCP2DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="ECCP3DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33303333" name="CVRCON" mclr="11101111" por="11101111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FAA" access="00000033" name="EEADRH" mclr="00000011" por="00000011" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0F7E" access="01033033" name="BAUDCON1" mclr="02021011" por="02021011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="01033033" name="BAUDCON2" mclr="02021011" por="02021011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F6622" unused_bank_mask="0x0000" >
+    <unused end="0x0F61" start="0x0F60" />
+    <unused end="0x0F7B" start="0x0F7A" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0F9A" start="0x0F99" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="11222222" por="11222222" />
+    <sfr address="0x0FA4" access="33113333" name="PIR3" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="33333133" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00133333" name="PORTG" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00000000" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="ECCP1DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="ECCP2DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="ECCP3DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F64" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FAA" access="00000033" name="EEADRH" mclr="00000011" por="00000011" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33333399" name="EECON1" mclr="33313111" por="00010111" />
+    <sfr address="0x0F7E" access="01033033" name="BAUDCTL1" mclr="02011011" por="02011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="01033033" name="BAUDCTL2" mclr="02011011" por="02011011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33333313" name="TXSTA2" mclr="11111121" por="11111121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F6627" unused_bank_mask="0x0000" >
+    <unused end="0x0F61" start="0x0F60" />
+    <unused end="0x0F7B" start="0x0F7A" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0F9A" start="0x0F99" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="11222222" por="11222222" />
+    <sfr address="0x0FA4" access="33113333" name="PIR3" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="33333133" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00133333" name="PORTG" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00000000" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="ECCP1DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="ECCP2DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="ECCP3DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F64" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FAA" access="00000033" name="EEADRH" mclr="00000011" por="00000011" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33333399" name="EECON1" mclr="33313111" por="00010111" />
+    <sfr address="0x0F7E" access="01033033" name="BAUDCTL1" mclr="02011011" por="02011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="01033033" name="BAUDCTL2" mclr="02011011" por="02011011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33333313" name="TXSTA2" mclr="11111121" por="11111121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F6680" unused_bank_mask="0x0000" >
+    <unused end="0x0D5F" start="0x0D00" />
+    <unused end="0x0D6F" start="0x0D6C" />
+    <unused end="0x0D7F" start="0x0D7C" />
+    <unused end="0x0D8F" start="0x0D8C" />
+    <unused end="0x0DD3" start="0x0D94" />
+    <unused end="0x0DD7" start="0x0DD6" />
+    <unused end="0x0DDF" start="0x0DD9" />
+    <unused end="0x0DEF" start="0x0DE8" />
+    <unused end="0x0DF7" start="0x0DF4" />
+    <unused end="0x0DF9" start="0x0DF9" />
+    <unused end="0x0DFB" start="0x0DFB" />
+    <unused end="0x0E1F" start="0x0DFD" />
+    <unused end="0x0EFF" start="0x0E80" />
+    <unused end="0x0F78" start="0x0F78" />
+    <unused end="0x0F7D" start="0x0F7A" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0F9C" start="0x0F99" />
+    <unused end="0x0FB9" start="0x0FB7" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00001133" name="OSCCON" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33333333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="03033333" name="IPR2" mclr="02022222" por="02022222" />
+    <sfr address="0x0FA1" access="03033333" name="PIR2" mclr="01011111" por="01011111" />
+    <sfr address="0x0FA0" access="03033333" name="PIE2" mclr="01011111" por="01011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="31111111" por="01111111" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00133333" name="PORTG" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00000000" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
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+    <sfr address="0x0E5F" access="33393331" name="CANCON_RO6" mclr="21111111" por="21111111" />
+    <sfr address="0x0E5E" access="11111111" name="CANSTAT_RO6" mclr="21111111" por="21111111" />
+    <sfr address="0x0E5D" access="33333333" name="B3D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5C" access="33333333" name="B3D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5B" access="33333333" name="B3D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5A" access="33333333" name="B3D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E59" access="33333333" name="B3D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E58" access="33333333" name="B3D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E57" access="33333333" name="B3D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E56" access="33333333" name="B3D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E55" access="03113333" name="B3DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E54" access="33333333" name="B3EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E53" access="33333333" name="B3EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E52" access="33333033" name="B3SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E51" access="33333333" name="B3SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E50" access="33113333" name="B3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E4F" access="33393331" name="CANCON_RO7" mclr="21111111" por="21111111" />
+    <sfr address="0x0E4E" access="11111111" name="CANSTAT_RO7" mclr="21111111" por="21111111" />
+    <sfr address="0x0E4D" access="33333333" name="B2D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4C" access="33333333" name="B2D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4B" access="33333333" name="B2D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4A" access="33333333" name="B2D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E49" access="33333333" name="B2D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E48" access="33333333" name="B2D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E47" access="33333333" name="B2D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E46" access="33333333" name="B2D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E45" access="03113333" name="B2DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E44" access="33333333" name="B2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E43" access="33333333" name="B2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E42" access="33333033" name="B2SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E41" access="33333333" name="B2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E40" access="33113333" name="B2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E3F" access="33393331" name="CANCON_RO8" mclr="21111111" por="21111111" />
+    <sfr address="0x0E3E" access="11111111" name="CANSTAT_RO8" mclr="21111111" por="21111111" />
+    <sfr address="0x0E3D" access="33333333" name="B1D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3C" access="33333333" name="B1D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3B" access="33333333" name="B1D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3A" access="33333333" name="B1D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E39" access="33333333" name="B1D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E38" access="33333333" name="B1D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E37" access="33333333" name="B1D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E36" access="33333333" name="B1D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E35" access="03113333" name="B1DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E34" access="33333333" name="B1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E33" access="33333333" name="B1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E32" access="33333033" name="B1SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E31" access="33333333" name="B1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E30" access="33113333" name="B1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E2F" access="33393331" name="CANCON_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2E" access="11111111" name="CANSTAT_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2D" access="33333333" name="B0D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2C" access="33333333" name="B0D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2B" access="33333333" name="B0D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2A" access="33333333" name="B0D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E29" access="33333333" name="B0D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E28" access="33333333" name="B0D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E27" access="33333333" name="B0D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E26" access="33333333" name="B0D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E25" access="03113333" name="B0DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E24" access="33333333" name="B0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E23" access="33333333" name="B0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E22" access="33333033" name="B0SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E21" access="33333333" name="B0SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E20" access="33113333" name="B0CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0DFC" access="00033300" name="TXBIE" mclr="00033300" por="00011100" />
+    <sfr address="0x0DFA" access="33333333" name="BIE0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF8" access="33333300" name="BSEL0" mclr="11111100" por="11111100" />
+    <sfr address="0x0DF3" access="33333333" name="MSEL3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF2" access="33333333" name="MSEL2" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF1" access="33333333" name="MSEL1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF0" access="33333333" name="MSEL0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE7" access="33333333" name="RXFBCON7" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE6" access="33333333" name="RXFBCON6" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE5" access="33333333" name="RXFBCON5" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE4" access="33333333" name="RXFBCON4" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE3" access="33333333" name="RXFBCON3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE2" access="33333333" name="RXFBCON2" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE1" access="33333333" name="RXFBCON1" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE0" access="33333333" name="RXFBCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD8" access="00033333" name="SDFLC" mclr="00011111" por="00011111" />
+    <sfr address="0x0DD5" access="33333333" name="RXFCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD4" access="33333333" name="RXFCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0D93" access="33333333" name="RXF15EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D92" access="33333333" name="RXF15EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D91" access="33333033" name="RXF15SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D90" access="33333333" name="RXF15SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8B" access="33333333" name="RXF14EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8A" access="33333333" name="RXF14EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D89" access="33333033" name="RXF14SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D88" access="33333333" name="RXF14SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D87" access="33333333" name="RXF13EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D86" access="33333333" name="RXF13EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D85" access="33333033" name="RXF13SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D84" access="33333333" name="RXF13SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D83" access="33333333" name="RXF12EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D82" access="33333333" name="RXF12EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D81" access="33333033" name="RXF12SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D80" access="33333333" name="RXF12SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7B" access="33333333" name="RXF11EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7A" access="33333333" name="RXF11EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D79" access="33333033" name="RXF11SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D78" access="33333333" name="RXF11SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D77" access="33333333" name="RXF10EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D76" access="33333333" name="RXF10EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D75" access="33333033" name="RXF10SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D74" access="33333333" name="RXF10SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D73" access="33333333" name="RXF9EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D72" access="33333333" name="RXF9EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D71" access="33333033" name="RXF9SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D70" access="33333333" name="RXF9SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6B" access="33333333" name="RXF8EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6A" access="33333333" name="RXF8EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D69" access="33333033" name="RXF8SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D68" access="33333333" name="RXF8SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D67" access="33333333" name="RXF7EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D66" access="33333333" name="RXF7EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D65" access="33333033" name="RXF7SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D64" access="33333333" name="RXF7SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D63" access="33333333" name="RXF6EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D62" access="33333333" name="RXF6EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D61" access="33333033" name="RXF6SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D60" access="33333333" name="RXF6SIDH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F66J10" unused_bank_mask="0x7F00" >
+    <unused end="0x0F5F" start="0x0F00" />
+    <unused end="0x0F61" start="0x0F60" />
+    <unused end="0x0F7B" start="0x0F7A" />
+    <unused end="0x0FAA" start="0x0FA8" />
+    <unused end="0x0FD2" start="0x0FD2" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0F9A" start="0x0F99" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33003033" name="IPR2" mclr="22002022" por="22002022" />
+    <sfr address="0x0FA1" access="33003033" name="PIR2" mclr="11001011" por="11001011" />
+    <sfr address="0x0FA0" access="33003033" name="PIE2" mclr="11001011" por="11001011" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="30003033" name="OSCCON" mclr="10001011" por="10001011" />
+    <sfr address="0x0F9B" access="03000000" name="OSCTUNE" mclr="01000000" por="01000000" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F64" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0FB0" access="11330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="51033033" name="BAUDCON1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51033033" name="BAUDCON2" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F66J11" unused_bank_mask="0x0000" >
+    <unused end="0x0F59" start="0x0F40" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
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+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD0" access="30333333" name="RCON" mclr="10334433" por="10222211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33333333" name="IPR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA1" access="33333333" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33333333" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0000" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FC0" access="30030003" name="WDTCON" mclr="10010001" por="10010001" />
+    <sfr address="0x0FD4" access="33333333" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33333333" name="OSCTUNE" mclr="11111111" por="11111111" />
+    <sfr address="0x0001" access="30333333" name="REFOCON" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333333" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="00003333" name="ANCON1" mclr="00001111" por="00001111" />
+    <sfr address="0x0FC1" access="33333333" name="ADCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33033333" name="ANCON2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FBF" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBE" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBC" size="2" name="CCPR1" />
+    <sfr address="0x0FBD" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB9" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB7" size="2" name="CCPR2" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB2" size="2" name="CCPR3" />
+    <sfr address="0x0FB3" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0004" access="00033333" name="ODCON1" mclr="00011111" por="00011111" />
+    <sfr address="0x0005" access="00000033" name="ODCON2" mclr="00000011" por="00000011" />
+    <sfr address="0x0006" access="00000033" name="ODCON3" mclr="00000011" por="00000011" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6E" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6B" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0F7A" size="2" name="TMR3" />
+    <sfr address="0x0F7B" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7A" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F79" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0F69" access="33333333" name="PMPADDRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="PMPADDRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PMPDATA1H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="PMPDATA1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F65" access="30333333" name="PMPCONH" mclr="10111111" por="10111111" />
+    <sfr address="0x0F64" access="33333333" name="PMPCONL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="13333333" name="PMPMODEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="PMPMODEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33333333" name="PMPDATAOUT2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F60" access="33333333" name="PMPDATAOUT2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5F" access="33333333" name="PMPDATA2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5E" access="33333333" name="PMPDATA2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5D" access="33333333" name="PMPPEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5C" access="33333333" name="PMPPEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5B" access="19001111" name="PMPSTATH" mclr="11001111" por="11001111" />
+    <sfr address="0x0F5A" access="19001111" name="PMPSTATL" mclr="21002222" por="21002222" />
+    <sfr address="0x0009" access="00000003" name="PADCFG1" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD3" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD2" access="33333333" name="CM1CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0FD1" access="33333333" name="CM2CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0F6A" access="00000011" name="CMSTAT" mclr="00000022" por="00000022" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAC" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51333033" name="BAUDCTL2" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAB" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA9" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333313" name="TXSTA2" mclr="11111121" por="11111121" />
+    <sfr address="0x0F9C" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F66J15" unused_bank_mask="0x0000" >
+    <unused end="0x0F61" start="0x0F60" />
+    <unused end="0x0F7B" start="0x0F7A" />
+    <unused end="0x0FAA" start="0x0FA8" />
+    <unused end="0x0FD2" start="0x0FD2" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0F9A" start="0x0F99" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33003033" name="IPR2" mclr="22002022" por="22002022" />
+    <sfr address="0x0FA1" access="33003033" name="PIR2" mclr="11001011" por="11001011" />
+    <sfr address="0x0FA0" access="33003033" name="PIE2" mclr="11001011" por="11001011" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="30003033" name="OSCCON" mclr="10001011" por="10001011" />
+    <sfr address="0x0F9B" access="03000000" name="OSCTUNE" mclr="01000000" por="01000000" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F64" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0FB0" access="11330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="51033033" name="BAUDCON1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51033033" name="BAUDCON2" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F66J16" unused_bank_mask="0x0000" >
+    <unused end="0x0F59" start="0x0F40" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD0" access="30333333" name="RCON" mclr="10334433" por="10222211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33333333" name="IPR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA1" access="33333333" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33333333" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0000" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FC0" access="30030003" name="WDTCON" mclr="10010001" por="10010001" />
+    <sfr address="0x0FD4" access="33333333" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33333333" name="OSCTUNE" mclr="11111111" por="11111111" />
+    <sfr address="0x0001" access="30333333" name="REFOCON" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333333" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="00003333" name="ANCON1" mclr="00001111" por="00001111" />
+    <sfr address="0x0FC1" access="33333333" name="ADCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33033333" name="ANCON2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FBF" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBE" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBC" size="2" name="CCPR1" />
+    <sfr address="0x0FBD" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB9" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB7" size="2" name="CCPR2" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB2" size="2" name="CCPR3" />
+    <sfr address="0x0FB3" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0004" access="00033333" name="ODCON1" mclr="00011111" por="00011111" />
+    <sfr address="0x0005" access="00000033" name="ODCON2" mclr="00000011" por="00000011" />
+    <sfr address="0x0006" access="00000033" name="ODCON3" mclr="00000011" por="00000011" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6E" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6B" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0F7A" size="2" name="TMR3" />
+    <sfr address="0x0F7B" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7A" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F79" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0F69" access="33333333" name="PMPADDRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="PMPADDRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PMPDATA1H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="PMPDATA1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F65" access="30333333" name="PMPCONH" mclr="10111111" por="10111111" />
+    <sfr address="0x0F64" access="33333333" name="PMPCONL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="13333333" name="PMPMODEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="PMPMODEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33333333" name="PMPDATAOUT2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F60" access="33333333" name="PMPDATAOUT2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5F" access="33333333" name="PMPDATA2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5E" access="33333333" name="PMPDATA2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5D" access="33333333" name="PMPPEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5C" access="33333333" name="PMPPEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5B" access="19001111" name="PMPSTATH" mclr="11001111" por="11001111" />
+    <sfr address="0x0F5A" access="19001111" name="PMPSTATL" mclr="21002222" por="21002222" />
+    <sfr address="0x0009" access="00000003" name="PADCFG1" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD3" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD2" access="33333333" name="CM1CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0FD1" access="33333333" name="CM2CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0F6A" access="00000011" name="CMSTAT" mclr="00000022" por="00000022" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAC" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51333033" name="BAUDCTL2" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAB" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA9" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333313" name="TXSTA2" mclr="11111121" por="11111121" />
+    <sfr address="0x0F9C" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F66J50" unused_bank_mask="0x0000" >
+    <unused end="0x0F59" start="0x0F40" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD0" access="30333333" name="RCON" mclr="10334433" por="10222211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33333333" name="IPR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA1" access="33333333" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33333333" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0000" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FC0" access="30030003" name="WDTCON" mclr="10010001" por="10010001" />
+    <sfr address="0x0FD4" access="33333333" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33333333" name="OSCTUNE" mclr="11111111" por="11111111" />
+    <sfr address="0x0001" access="30333333" name="REFOCON" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333300" name="PORTF" mclr="31111100" por="01111100" />
+    <sfr address="0x0F8E" access="33333300" name="LATF" mclr="33333300" por="00000000" />
+    <sfr address="0x0F97" access="33333300" name="TRISF" mclr="22222200" por="22222200" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333333" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="33333300" name="ANCON1" mclr="11111100" por="11111100" />
+    <sfr address="0x0FC1" access="33333333" name="ADCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="30033333" name="ANCON2" mclr="10011111" por="10011111" />
+    <sfr address="0x0FBF" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBE" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBC" size="2" name="CCPR1" />
+    <sfr address="0x0FBD" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB9" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB7" size="2" name="CCPR2" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB2" size="2" name="CCPR3" />
+    <sfr address="0x0FB3" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0004" access="00033333" name="ODCON1" mclr="00011111" por="00011111" />
+    <sfr address="0x0005" access="00000033" name="ODCON2" mclr="00000011" por="00000011" />
+    <sfr address="0x0006" access="00000033" name="ODCON3" mclr="00000011" por="00000011" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6E" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6B" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0F7A" size="2" name="TMR3" />
+    <sfr address="0x0F7B" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7A" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F79" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0F69" access="33333333" name="PMPADDRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="PMPADDRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PMPDATA1H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="PMPDATA1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F65" access="30333333" name="PMPCONH" mclr="10111111" por="10111111" />
+    <sfr address="0x0F64" access="33333333" name="PMPCONL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="13333333" name="PMPMODEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="PMPMODEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33333333" name="PMPDATAOUT2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F60" access="33333333" name="PMPDATAOUT2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5F" access="33333333" name="PMPDATA2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5E" access="33333333" name="PMPDATA2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5D" access="33333333" name="PMPPEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5C" access="33333333" name="PMPPEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5B" access="19001111" name="PMPSTATH" mclr="11001111" por="11001111" />
+    <sfr address="0x0F5A" access="19001111" name="PMPSTATL" mclr="21002222" por="21002222" />
+    <sfr address="0x0009" access="00000003" name="PADCFG1" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD3" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD2" access="33333333" name="CM1CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0FD1" access="33333333" name="CM2CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0F6A" access="00000011" name="CMSTAT" mclr="00000022" por="00000022" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAC" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51333033" name="BAUDCTL2" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAB" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA9" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333313" name="TXSTA2" mclr="11111121" por="11111121" />
+    <sfr address="0x0F9C" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F66J55" unused_bank_mask="0x0000" >
+    <unused end="0x0F59" start="0x0F40" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD0" access="30333333" name="RCON" mclr="10334433" por="10222211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33333333" name="IPR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA1" access="33333333" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33333333" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0000" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FC0" access="30030003" name="WDTCON" mclr="10010001" por="10010001" />
+    <sfr address="0x0FD4" access="33333333" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33333333" name="OSCTUNE" mclr="11111111" por="11111111" />
+    <sfr address="0x0001" access="30333333" name="REFOCON" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333300" name="PORTF" mclr="31111100" por="01111100" />
+    <sfr address="0x0F8E" access="33333300" name="LATF" mclr="33333300" por="00000000" />
+    <sfr address="0x0F97" access="33333300" name="TRISF" mclr="22222200" por="22222200" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333333" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="33333300" name="ANCON1" mclr="11111100" por="11111100" />
+    <sfr address="0x0FC1" access="33333333" name="ADCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="30033333" name="ANCON2" mclr="10011111" por="10011111" />
+    <sfr address="0x0FBF" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBE" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBC" size="2" name="CCPR1" />
+    <sfr address="0x0FBD" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB9" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB7" size="2" name="CCPR2" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB2" size="2" name="CCPR3" />
+    <sfr address="0x0FB3" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0004" access="00033333" name="ODCON1" mclr="00011111" por="00011111" />
+    <sfr address="0x0005" access="00000033" name="ODCON2" mclr="00000011" por="00000011" />
+    <sfr address="0x0006" access="00000033" name="ODCON3" mclr="00000011" por="00000011" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6E" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6B" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0F7A" size="2" name="TMR3" />
+    <sfr address="0x0F7B" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7A" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F79" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0F69" access="33333333" name="PMPADDRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="PMPADDRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PMPDATA1H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="PMPDATA1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F65" access="30333333" name="PMPCONH" mclr="10111111" por="10111111" />
+    <sfr address="0x0F64" access="33333333" name="PMPCONL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="13333333" name="PMPMODEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="PMPMODEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33333333" name="PMPDATAOUT2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F60" access="33333333" name="PMPDATAOUT2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5F" access="33333333" name="PMPDATA2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5E" access="33333333" name="PMPDATA2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5D" access="33333333" name="PMPPEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5C" access="33333333" name="PMPPEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5B" access="19001111" name="PMPSTATH" mclr="11001111" por="11001111" />
+    <sfr address="0x0F5A" access="19001111" name="PMPSTATL" mclr="21002222" por="21002222" />
+    <sfr address="0x0009" access="00000003" name="PADCFG1" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD3" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD2" access="33333333" name="CM1CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0FD1" access="33333333" name="CM2CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0F6A" access="00000011" name="CMSTAT" mclr="00000022" por="00000022" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAC" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51333033" name="BAUDCTL2" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAB" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA9" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333313" name="TXSTA2" mclr="11111121" por="11111121" />
+    <sfr address="0x0F9C" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F66J60" unused_bank_mask="0x0000" >
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0FAA" start="0x0FA8" />
+    <unused end="0x0EFF" start="0x0EFF" />
+    <unused end="0x0EFC" start="0x0EFC" />
+    <unused end="0x0EFA" start="0x0EF8" />
+    <unused end="0x0EE1" start="0x0EDA" />
+    <unused end="0x0ED7" start="0x0ED6" />
+    <unused end="0x0ED3" start="0x0ED2" />
+    <unused end="0x0EBF" start="0x0EBA" />
+    <unused end="0x0EB5" start="0x0EB5" />
+    <unused end="0x0EB3" start="0x0EB3" />
+    <unused end="0x0EB0" start="0x0EAC" />
+    <unused end="0x0EA5" start="0x0EA5" />
+    <unused end="0x0EA1" start="0x0EA1" />
+    <unused end="0x0E9F" start="0x0E9A" />
+    <unused end="0x0E96" start="0x0E8B" />
+    <unused end="0x0E89" start="0x0E86" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F9A" start="0x0F99" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0F66" start="0x0F62" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0F7D" start="0x0F7C" />
+    <unused end="0x0F6F" start="0x0F6B" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0FA5" access="03003333" name="IPR3" mclr="02002222" por="02002222" />
+    <sfr address="0x0FA4" access="03003333" name="PIR3" mclr="01001111" por="01001111" />
+    <sfr address="0x0FA3" access="03003333" name="PIE3" mclr="01001111" por="01001111" />
+    <sfr address="0x0FA2" access="33333033" name="IPR2" mclr="22222022" por="22222022" />
+    <sfr address="0x0FA1" access="33333033" name="PIR2" mclr="11111011" por="11111011" />
+    <sfr address="0x0FA0" access="33333033" name="PIE2" mclr="11111011" por="11111011" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="30003033" name="OSCCON" mclr="10001011" por="10001011" />
+    <sfr address="0x0F9B" access="33330000" name="OSCTUNE" mclr="11111111" por="11111111" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="00000333" name="PORTD" mclr="00000333" por="00000000" />
+    <sfr address="0x0F8C" access="00000333" name="LATD" mclr="00000333" por="00000000" />
+    <sfr address="0x0F95" access="00000333" name="TRISD" mclr="00000222" por="00000222" />
+    <sfr address="0x0F84" access="00333333" name="PORTE" mclr="00333333" por="00000000" />
+    <sfr address="0x0F8D" access="00333333" name="LATE" mclr="00333333" por="00000000" />
+    <sfr address="0x0F96" access="00333333" name="TRISE" mclr="00222222" por="00222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="11111110" por="11111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="00030000" name="PORTG" mclr="00030000" por="00000000" />
+    <sfr address="0x0F98" access="00030000" name="TRISG" mclr="00020000" por="00020000" />
+    <sfr address="0x0F8F" access="00030000" name="LATG" mclr="00030000" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="ECCP1DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="ECCP2DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="ECCP3DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
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+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F7E" access="01033033" name="BAUDCON1" mclr="02011011" por="02011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0FD2" access="33333300" name="ECON1" mclr="11111100" por="11111100" />
+    <sfr address="0x0F7B" access="00033333" name="ERDPTH" mclr="33311212" por="00011212" />
+    <sfr address="0x0F7A" access="33333333" name="ERDPTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="00000000" name="EDATA" mclr="00000000" por="00000000" />
+    <sfr address="0x0F60" access="01515055" name="EIR" mclr="01111011" por="01111011" />
+    <sfr address="0x0EFE" access="33300000" name="ECON2" mclr="21100000" por="21100000" />
+    <sfr address="0x0EFD" access="05050153" name="ESTAT" mclr="01010111" por="01010111" />
+    <sfr address="0x0EFB" access="03333033" name="EIE" mclr="01111011" por="01111011" />
+    <sfr address="0x0EF7" access="11111111" name="EDMASCH" mclr="11111111" por="11111111" />
+    <sfr address="0x0EF6" access="11111111" name="EDMASCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EF5" access="00033333" name="EDMADSTH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EF4" access="33333333" name="EDMADSTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EF3" access="00033333" name="EDMANDH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EF2" access="33333333" name="EDMANDL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EF1" access="00033333" name="EDMASTH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EF0" access="33333333" name="EDMASTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EEF" access="00033333" name="ERXWRPTH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EEE" access="33333333" name="ERXWRPTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EED" access="00033333" name="ERXRDPTH" mclr="00011212" por="00011212" />
+    <sfr address="0x0EEC" access="33333333" name="ERXRDPTL" mclr="22222121" por="22222121" />
+    <sfr address="0x0EEB" access="00033333" name="ERXNDH" mclr="00022222" por="00022222" />
+    <sfr address="0x0EEA" access="33333333" name="ERXNDL" mclr="22222222" por="22222222" />
+    <sfr address="0x0EE9" access="00033333" name="ERXSTH" mclr="00011212" por="00011212" />
+    <sfr address="0x0EE8" access="33333333" name="ERXSTL" mclr="22222121" por="22222121" />
+    <sfr address="0x0EE7" access="00033333" name="ETXNDH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EE6" access="33333333" name="ETXNDL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EE5" access="00033333" name="ETXSTH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EE4" access="33333333" name="ETXSTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EE3" access="00033333" name="EWRPTH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EE2" access="33333333" name="EWRPTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0ED9" access="11111111" name="EPKTCNT" mclr="11111111" por="11111111" />
+    <sfr address="0x0ED8" access="33333333" name="ERXFCON" mclr="21211112" por="21211112" />
+    <sfr address="0x0ED5" access="00033333" name="EPMOH" mclr="00011111" por="00011111" />
+    <sfr address="0x0ED4" access="33333333" name="EPMOL" mclr="11111111" por="11111111" />
+    <sfr address="0x0ED1" access="33333333" name="EPMCSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0ED0" access="33333333" name="EPMCSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECF" access="33333333" name="EPMM7" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECE" access="33333333" name="EPMM6" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECD" access="33333333" name="EPMM5" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECC" access="33333333" name="EPMM4" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECB" access="33333333" name="EPMM3" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECA" access="33333333" name="EPMM2" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC9" access="33333333" name="EPMM1" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC8" access="33333333" name="EPMM0" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC7" access="33333333" name="EHT7" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC6" access="33333333" name="EHT6" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC5" access="33333333" name="EHT5" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC4" access="33333333" name="EHT4" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC3" access="33333333" name="EHT3" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC2" access="33333333" name="EHT2" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC1" access="33333333" name="EHT1" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC0" access="33333333" name="EHT0" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB9" access="11111111" name="MIRDH" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB8" access="11111111" name="MIRDL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB7" access="22222222" name="MIWDH" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB6" access="22222222" name="MIWDL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB4" access="00033333" name="MIREGADR" mclr="00011111" por="00011111" />
+    <sfr address="0x0EB2" access="00000033" name="MICMD" mclr="00000011" por="00000011" />
+    <sfr address="0x0EB1" access="30000000" name="MICON" mclr="10000000" por="10000000" />
+    <sfr address="0x0EAB" access="33333333" name="MAMXFLH" mclr="11111221" por="11111221" />
+    <sfr address="0x0EAA" access="33333333" name="MAMXFLL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EA9" access="00333333" name="MACLCON2" mclr="00221222" por="00221222" />
+    <sfr address="0x0EA8" access="00003333" name="MACLCON1" mclr="00002222" por="00002222" />
+    <sfr address="0x0EA7" access="03333333" name="MAIPGH" mclr="01111111" por="01111111" />
+    <sfr address="0x0EA6" access="03333333" name="MAIPGL" mclr="01111111" por="01111111" />
+    <sfr address="0x0EA4" access="03333333" name="MABBIPG" mclr="01111111" por="01111111" />
+    <sfr address="0x0EA3" access="03330000" name="MACON4" mclr="01110011" por="01110011" />
+    <sfr address="0x0EA2" access="33333333" name="MACON3" mclr="11111111" por="11111111" />
+    <sfr address="0x0EA0" access="00003333" name="MACON1" mclr="00011111" por="00011111" />
+    <sfr address="0x0E99" access="33333333" name="EPAUSH" mclr="11121111" por="11121111" />
+    <sfr address="0x0E98" access="33333333" name="EPAUSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0E97" access="00000133" name="EFLOCON" mclr="00000111" por="00000111" />
+    <sfr address="0x0E8A" access="00001111" name="MISTAT" mclr="00001111" por="00001111" />
+    <sfr address="0x0E85" access="33333333" name="MAADR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0E84" access="33333333" name="MAADR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0E83" access="33333333" name="MAADR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0E82" access="33333333" name="MAADR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0E81" access="33333333" name="MAADR6" mclr="11111111" por="11111111" />
+    <sfr address="0x0E80" access="33333333" name="MAADR5" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F66J65" unused_bank_mask="0x0000" >
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0FAA" start="0x0FA8" />
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+    <unused end="0x0EB3" start="0x0EB3" />
+    <unused end="0x0EB0" start="0x0EAC" />
+    <unused end="0x0EA5" start="0x0EA5" />
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+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F9A" start="0x0F99" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0F66" start="0x0F62" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0F7D" start="0x0F7C" />
+    <unused end="0x0F6F" start="0x0F6B" />
+    <combined address="0x0FFD" size="3" name="TOS" />
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+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
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+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
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+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
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+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
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+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
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+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
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+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0FA5" access="03003333" name="IPR3" mclr="02002222" por="02002222" />
+    <sfr address="0x0FA4" access="03003333" name="PIR3" mclr="01001111" por="01001111" />
+    <sfr address="0x0FA3" access="03003333" name="PIE3" mclr="01001111" por="01001111" />
+    <sfr address="0x0FA2" access="33333033" name="IPR2" mclr="22222022" por="22222022" />
+    <sfr address="0x0FA1" access="33333033" name="PIR2" mclr="11111011" por="11111011" />
+    <sfr address="0x0FA0" access="33333033" name="PIE2" mclr="11111011" por="11111011" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
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+    <sfr address="0x0F9B" access="33330000" name="OSCTUNE" mclr="11111111" por="11111111" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F83" access="00000333" name="PORTD" mclr="00000333" por="00000000" />
+    <sfr address="0x0F8C" access="00000333" name="LATD" mclr="00000333" por="00000000" />
+    <sfr address="0x0F95" access="00000333" name="TRISD" mclr="00000222" por="00000222" />
+    <sfr address="0x0F84" access="00333333" name="PORTE" mclr="00333333" por="00000000" />
+    <sfr address="0x0F8D" access="00333333" name="LATE" mclr="00333333" por="00000000" />
+    <sfr address="0x0F96" access="00333333" name="TRISE" mclr="00222222" por="00222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="11111110" por="11111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="00030000" name="PORTG" mclr="00030000" por="00000000" />
+    <sfr address="0x0F98" access="00030000" name="TRISG" mclr="00020000" por="00020000" />
+    <sfr address="0x0F8F" access="00030000" name="LATG" mclr="00030000" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="ECCP1DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="ECCP2DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
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+    <sfr address="0x0FB7" access="33333333" name="CCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="ECCP3DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
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+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
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+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
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+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F7E" access="01033033" name="BAUDCON1" mclr="02011011" por="02011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0FD2" access="33333300" name="ECON1" mclr="11111100" por="11111100" />
+    <sfr address="0x0F7B" access="00033333" name="ERDPTH" mclr="33311212" por="00011212" />
+    <sfr address="0x0F7A" access="33333333" name="ERDPTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="00000000" name="EDATA" mclr="00000000" por="00000000" />
+    <sfr address="0x0F60" access="01515055" name="EIR" mclr="01111011" por="01111011" />
+    <sfr address="0x0EFE" access="33300000" name="ECON2" mclr="21100000" por="21100000" />
+    <sfr address="0x0EFD" access="05050153" name="ESTAT" mclr="01010111" por="01010111" />
+    <sfr address="0x0EFB" access="03333033" name="EIE" mclr="01111011" por="01111011" />
+    <sfr address="0x0EF7" access="11111111" name="EDMASCH" mclr="11111111" por="11111111" />
+    <sfr address="0x0EF6" access="11111111" name="EDMASCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EF5" access="00033333" name="EDMADSTH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EF4" access="33333333" name="EDMADSTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EF3" access="00033333" name="EDMANDH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EF2" access="33333333" name="EDMANDL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EF1" access="00033333" name="EDMASTH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EF0" access="33333333" name="EDMASTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EEF" access="00033333" name="ERXWRPTH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EEE" access="33333333" name="ERXWRPTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EED" access="00033333" name="ERXRDPTH" mclr="00011212" por="00011212" />
+    <sfr address="0x0EEC" access="33333333" name="ERXRDPTL" mclr="22222121" por="22222121" />
+    <sfr address="0x0EEB" access="00033333" name="ERXNDH" mclr="00022222" por="00022222" />
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+    <sfr address="0x0EE9" access="00033333" name="ERXSTH" mclr="00011212" por="00011212" />
+    <sfr address="0x0EE8" access="33333333" name="ERXSTL" mclr="22222121" por="22222121" />
+    <sfr address="0x0EE7" access="00033333" name="ETXNDH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EE6" access="33333333" name="ETXNDL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EE5" access="00033333" name="ETXSTH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EE4" access="33333333" name="ETXSTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EE3" access="00033333" name="EWRPTH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EE2" access="33333333" name="EWRPTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0ED9" access="11111111" name="EPKTCNT" mclr="11111111" por="11111111" />
+    <sfr address="0x0ED8" access="33333333" name="ERXFCON" mclr="21211112" por="21211112" />
+    <sfr address="0x0ED5" access="00033333" name="EPMOH" mclr="00011111" por="00011111" />
+    <sfr address="0x0ED4" access="33333333" name="EPMOL" mclr="11111111" por="11111111" />
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+    <sfr address="0x0ED0" access="33333333" name="EPMCSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECF" access="33333333" name="EPMM7" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECE" access="33333333" name="EPMM6" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECD" access="33333333" name="EPMM5" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECC" access="33333333" name="EPMM4" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECB" access="33333333" name="EPMM3" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECA" access="33333333" name="EPMM2" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC9" access="33333333" name="EPMM1" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC8" access="33333333" name="EPMM0" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC7" access="33333333" name="EHT7" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC6" access="33333333" name="EHT6" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC5" access="33333333" name="EHT5" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC4" access="33333333" name="EHT4" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC3" access="33333333" name="EHT3" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC2" access="33333333" name="EHT2" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC1" access="33333333" name="EHT1" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC0" access="33333333" name="EHT0" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB9" access="11111111" name="MIRDH" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB8" access="11111111" name="MIRDL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB7" access="22222222" name="MIWDH" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB6" access="22222222" name="MIWDL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB4" access="00033333" name="MIREGADR" mclr="00011111" por="00011111" />
+    <sfr address="0x0EB2" access="00000033" name="MICMD" mclr="00000011" por="00000011" />
+    <sfr address="0x0EB1" access="30000000" name="MICON" mclr="10000000" por="10000000" />
+    <sfr address="0x0EAB" access="33333333" name="MAMXFLH" mclr="11111221" por="11111221" />
+    <sfr address="0x0EAA" access="33333333" name="MAMXFLL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EA9" access="00333333" name="MACLCON2" mclr="00221222" por="00221222" />
+    <sfr address="0x0EA8" access="00003333" name="MACLCON1" mclr="00002222" por="00002222" />
+    <sfr address="0x0EA7" access="03333333" name="MAIPGH" mclr="01111111" por="01111111" />
+    <sfr address="0x0EA6" access="03333333" name="MAIPGL" mclr="01111111" por="01111111" />
+    <sfr address="0x0EA4" access="03333333" name="MABBIPG" mclr="01111111" por="01111111" />
+    <sfr address="0x0EA3" access="03330000" name="MACON4" mclr="01110011" por="01110011" />
+    <sfr address="0x0EA2" access="33333333" name="MACON3" mclr="11111111" por="11111111" />
+    <sfr address="0x0EA0" access="00003333" name="MACON1" mclr="00011111" por="00011111" />
+    <sfr address="0x0E99" access="33333333" name="EPAUSH" mclr="11121111" por="11121111" />
+    <sfr address="0x0E98" access="33333333" name="EPAUSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0E97" access="00000133" name="EFLOCON" mclr="00000111" por="00000111" />
+    <sfr address="0x0E8A" access="00001111" name="MISTAT" mclr="00001111" por="00001111" />
+    <sfr address="0x0E85" access="33333333" name="MAADR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0E84" access="33333333" name="MAADR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0E83" access="33333333" name="MAADR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0E82" access="33333333" name="MAADR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0E81" access="33333333" name="MAADR6" mclr="11111111" por="11111111" />
+    <sfr address="0x0E80" access="33333333" name="MAADR5" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F6720" unused_bank_mask="0x0000" >
+    <unused end="0x0F6A" start="0x0F00" />
+    <unused end="0x0F7F" start="0x0F79" />
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+    <unused end="0x0F9A" start="0x0F99" />
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+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FB6" start="0x0FB6" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
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+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00000003" name="OSCCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="00333333" name="IPR3" mclr="00222222" por="00222222" />
+    <sfr address="0x0FA4" access="00113333" name="PIR3" mclr="00111111" por="00111111" />
+    <sfr address="0x0FA3" access="00333333" name="PIE3" mclr="00111111" por="00111111" />
+    <sfr address="0x0FA2" access="03033333" name="IPR2" mclr="02022222" por="02022222" />
+    <sfr address="0x0FA1" access="03033333" name="PIR2" mclr="01011111" por="01011111" />
+    <sfr address="0x0FA0" access="03033333" name="PIE2" mclr="01011111" por="01011111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="31111111" por="01111111" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00033333" name="PORTG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30000333" name="ADCON2" mclr="10000111" por="10000111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="00333333" name="CCP3CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
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+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30333333" name="T1CON" mclr="30333333" por="10111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="00000033" name="EEADRH" mclr="00000011" por="00000011" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F6722" unused_bank_mask="0x0000" >
+    <unused end="0x0F61" start="0x0F60" />
+    <unused end="0x0F7B" start="0x0F7A" />
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+    <unused end="0x0F9A" start="0x0F99" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
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+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
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+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="11222222" por="11222222" />
+    <sfr address="0x0FA4" access="33113333" name="PIR3" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11011111" por="11011111" />
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+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="33333133" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00133333" name="PORTG" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00000000" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="ECCP1DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="ECCP2DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="ECCP3DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F64" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FAA" access="00000033" name="EEADRH" mclr="00000011" por="00000011" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33333399" name="EECON1" mclr="33313111" por="00010111" />
+    <sfr address="0x0F7E" access="01033033" name="BAUDCTL1" mclr="02011011" por="02011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="01033033" name="BAUDCTL2" mclr="02011011" por="02011011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33333313" name="TXSTA2" mclr="11111121" por="11111121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F67J10" unused_bank_mask="0x0000" >
+    <unused end="0x0F61" start="0x0F60" />
+    <unused end="0x0F7B" start="0x0F7A" />
+    <unused end="0x0F88" start="0x0F87" />
+    <unused end="0x0F91" start="0x0F90" />
+    <unused end="0x0F9A" start="0x0F99" />
+    <unused end="0x0FAA" start="0x0FA8" />
+    <unused end="0x0FD2" start="0x0FD2" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33003033" name="IPR2" mclr="22002022" por="22002022" />
+    <sfr address="0x0FA1" access="33003033" name="PIR2" mclr="11001011" por="11001011" />
+    <sfr address="0x0FA0" access="33003033" name="PIE2" mclr="11001011" por="11001011" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="30003033" name="OSCCON" mclr="10001011" por="10001011" />
+    <sfr address="0x0F9B" access="03000000" name="OSCTUNE" mclr="01000000" por="01000000" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F64" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0FB0" access="11330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="51033033" name="BAUDCON1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51033033" name="BAUDCON2" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F67J11" unused_bank_mask="0x0000" >
+    <unused end="0x0F59" start="0x0F40" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD0" access="30333333" name="RCON" mclr="10334433" por="10222211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33333333" name="IPR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA1" access="33333333" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33333333" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0000" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FC0" access="30030003" name="WDTCON" mclr="10010001" por="10010001" />
+    <sfr address="0x0FD4" access="33333333" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33333333" name="OSCTUNE" mclr="11111111" por="11111111" />
+    <sfr address="0x0001" access="30333333" name="REFOCON" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333333" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="00003333" name="ANCON1" mclr="00001111" por="00001111" />
+    <sfr address="0x0FC1" access="33333333" name="ADCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33033333" name="ANCON2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FBF" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBE" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBC" size="2" name="CCPR1" />
+    <sfr address="0x0FBD" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB9" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB7" size="2" name="CCPR2" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB2" size="2" name="CCPR3" />
+    <sfr address="0x0FB3" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0004" access="00033333" name="ODCON1" mclr="00011111" por="00011111" />
+    <sfr address="0x0005" access="00000033" name="ODCON2" mclr="00000011" por="00000011" />
+    <sfr address="0x0006" access="00000033" name="ODCON3" mclr="00000011" por="00000011" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6E" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6B" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0F7A" size="2" name="TMR3" />
+    <sfr address="0x0F7B" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7A" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F79" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0F69" access="33333333" name="PMPADDRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="PMPADDRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PMPDATA1H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="PMPDATA1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F65" access="30333333" name="PMPCONH" mclr="10111111" por="10111111" />
+    <sfr address="0x0F64" access="33333333" name="PMPCONL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="13333333" name="PMPMODEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="PMPMODEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33333333" name="PMPDATAOUT2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F60" access="33333333" name="PMPDATAOUT2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5F" access="33333333" name="PMPDATA2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5E" access="33333333" name="PMPDATA2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5D" access="33333333" name="PMPPEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5C" access="33333333" name="PMPPEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5B" access="19001111" name="PMPSTATH" mclr="11001111" por="11001111" />
+    <sfr address="0x0F5A" access="19001111" name="PMPSTATL" mclr="21002222" por="21002222" />
+    <sfr address="0x0009" access="00000003" name="PADCFG1" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD3" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD2" access="33333333" name="CM1CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0FD1" access="33333333" name="CM2CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0F6A" access="00000011" name="CMSTAT" mclr="00000022" por="00000022" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAC" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51333033" name="BAUDCTL2" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAB" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA9" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333313" name="TXSTA2" mclr="11111121" por="11111121" />
+    <sfr address="0x0F9C" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F67J50" unused_bank_mask="0x0000" >
+    <unused end="0x0F59" start="0x0F40" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD0" access="30333333" name="RCON" mclr="10334433" por="10222211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33333333" name="IPR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA1" access="33333333" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33333333" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0000" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FC0" access="30030003" name="WDTCON" mclr="10010001" por="10010001" />
+    <sfr address="0x0FD4" access="33333333" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33333333" name="OSCTUNE" mclr="11111111" por="11111111" />
+    <sfr address="0x0001" access="30333333" name="REFOCON" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333300" name="PORTF" mclr="31111100" por="01111100" />
+    <sfr address="0x0F8E" access="33333300" name="LATF" mclr="33333300" por="00000000" />
+    <sfr address="0x0F97" access="33333300" name="TRISF" mclr="22222200" por="22222200" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333333" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="33333300" name="ANCON1" mclr="11111100" por="11111100" />
+    <sfr address="0x0FC1" access="33333333" name="ADCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="30033333" name="ANCON2" mclr="10011111" por="10011111" />
+    <sfr address="0x0FBF" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBE" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBC" size="2" name="CCPR1" />
+    <sfr address="0x0FBD" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB9" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB7" size="2" name="CCPR2" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB2" size="2" name="CCPR3" />
+    <sfr address="0x0FB3" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0004" access="00033333" name="ODCON1" mclr="00011111" por="00011111" />
+    <sfr address="0x0005" access="00000033" name="ODCON2" mclr="00000011" por="00000011" />
+    <sfr address="0x0006" access="00000033" name="ODCON3" mclr="00000011" por="00000011" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6E" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6B" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0F7A" size="2" name="TMR3" />
+    <sfr address="0x0F7B" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7A" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F79" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0F69" access="33333333" name="PMPADDRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="PMPADDRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PMPDATA1H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="PMPDATA1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F65" access="30333333" name="PMPCONH" mclr="10111111" por="10111111" />
+    <sfr address="0x0F64" access="33333333" name="PMPCONL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="13333333" name="PMPMODEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="PMPMODEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33333333" name="PMPDATAOUT2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F60" access="33333333" name="PMPDATAOUT2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5F" access="33333333" name="PMPDATA2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5E" access="33333333" name="PMPDATA2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5D" access="33333333" name="PMPPEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5C" access="33333333" name="PMPPEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5B" access="19001111" name="PMPSTATH" mclr="11001111" por="11001111" />
+    <sfr address="0x0F5A" access="19001111" name="PMPSTATL" mclr="21002222" por="21002222" />
+    <sfr address="0x0009" access="00000003" name="PADCFG1" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD3" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD2" access="33333333" name="CM1CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0FD1" access="33333333" name="CM2CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0F6A" access="00000011" name="CMSTAT" mclr="00000022" por="00000022" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAC" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51333033" name="BAUDCTL2" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAB" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA9" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333313" name="TXSTA2" mclr="11111121" por="11111121" />
+    <sfr address="0x0F9C" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F67J60" unused_bank_mask="0x0000" >
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0FAA" start="0x0FA8" />
+    <unused end="0x0EFF" start="0x0EFF" />
+    <unused end="0x0EFC" start="0x0EFC" />
+    <unused end="0x0EFA" start="0x0EF8" />
+    <unused end="0x0EE1" start="0x0EDA" />
+    <unused end="0x0ED7" start="0x0ED6" />
+    <unused end="0x0ED3" start="0x0ED2" />
+    <unused end="0x0EBF" start="0x0EBA" />
+    <unused end="0x0EB5" start="0x0EB5" />
+    <unused end="0x0EB3" start="0x0EB3" />
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+    <sfr address="0x0EB4" access="00033333" name="MIREGADR" mclr="00011111" por="00011111" />
+    <sfr address="0x0EB2" access="00000033" name="MICMD" mclr="00000011" por="00000011" />
+    <sfr address="0x0EB1" access="30000000" name="MICON" mclr="10000000" por="10000000" />
+    <sfr address="0x0EAB" access="33333333" name="MAMXFLH" mclr="11111221" por="11111221" />
+    <sfr address="0x0EAA" access="33333333" name="MAMXFLL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EA9" access="00333333" name="MACLCON2" mclr="00221222" por="00221222" />
+    <sfr address="0x0EA8" access="00003333" name="MACLCON1" mclr="00002222" por="00002222" />
+    <sfr address="0x0EA7" access="03333333" name="MAIPGH" mclr="01111111" por="01111111" />
+    <sfr address="0x0EA6" access="03333333" name="MAIPGL" mclr="01111111" por="01111111" />
+    <sfr address="0x0EA4" access="03333333" name="MABBIPG" mclr="01111111" por="01111111" />
+    <sfr address="0x0EA3" access="03330000" name="MACON4" mclr="01110011" por="01110011" />
+    <sfr address="0x0EA2" access="33333333" name="MACON3" mclr="11111111" por="11111111" />
+    <sfr address="0x0EA0" access="00003333" name="MACON1" mclr="00011111" por="00011111" />
+    <sfr address="0x0E99" access="33333333" name="EPAUSH" mclr="11121111" por="11121111" />
+    <sfr address="0x0E98" access="33333333" name="EPAUSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0E97" access="00000133" name="EFLOCON" mclr="00000111" por="00000111" />
+    <sfr address="0x0E8A" access="00001111" name="MISTAT" mclr="00001111" por="00001111" />
+    <sfr address="0x0E85" access="33333333" name="MAADR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0E84" access="33333333" name="MAADR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0E83" access="33333333" name="MAADR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0E82" access="33333333" name="MAADR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0E81" access="33333333" name="MAADR6" mclr="11111111" por="11111111" />
+    <sfr address="0x0E80" access="33333333" name="MAADR5" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x40" name="18F8310" unused_bank_mask="0x7FF8" >
+    <unused end="0x0F57" start="0x0F00" />
+    <unused end="0x0F7C" start="0x0F70" />
+    <unused end="0x0F7D" start="0x0F7D" />
+    <unused end="0x0FAA" start="0x0FA6" />
+    <unused end="0x0FB6" start="0x0FB6" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="HLVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA5" access="00330003" name="IPR3" mclr="00220002" por="00220002" />
+    <sfr address="0x0FA4" access="00110003" name="PIR3" mclr="00110001" por="00110001" />
+    <sfr address="0x0FA3" access="00330003" name="PIE3" mclr="00110001" por="00110001" />
+    <sfr address="0x0FA2" access="33003333" name="IPR2" mclr="22002222" por="22002222" />
+    <sfr address="0x0FA1" access="33003333" name="PIR2" mclr="11001111" por="11001111" />
+    <sfr address="0x0FA0" access="33003333" name="PIE2" mclr="11001111" por="11001111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="33333133" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="31111111" por="01111111" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00133333" name="PORTG" mclr="00333333" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="11113333" por="11110000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="00333333" name="CCP3CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="31033033" name="BAUDCON1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F8390" unused_bank_mask="0x7FF8" >
+    <unused end="0x0F57" start="0x0F40" />
+    <unused end="0x0F7D" start="0x0F7D" />
+    <unused end="0x0FAA" start="0x0FA6" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB6" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="HLVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA5" access="03330000" name="IPR3" mclr="02220000" por="02220000" />
+    <sfr address="0x0FA4" access="03110000" name="PIR3" mclr="01110000" por="01110000" />
+    <sfr address="0x0FA3" access="03330000" name="PIE3" mclr="01110000" por="01110000" />
+    <sfr address="0x0FA2" access="33003333" name="IPR2" mclr="22002222" por="22002222" />
+    <sfr address="0x0FA1" access="33003333" name="PIR2" mclr="11001111" por="11001111" />
+    <sfr address="0x0FA0" access="33003333" name="PIE2" mclr="11001111" por="11001111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="33333133" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
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+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="11113333" por="11110000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
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+    <combined address="0x0FC3" size="2" name="ADRES" />
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+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="11111111" por="11111111" />
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+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
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+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
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+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
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+    <combined address="0x0FCE" size="2" name="TMR1" />
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+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
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+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
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+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
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+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
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+    <sfr address="0x0F5F" access="33333333" name="LCDSE5" mclr="11111111" por="11111111" />
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+    <sfr address="0x0F5C" access="33333333" name="LCDSE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5B" access="33333333" name="LCDSE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5A" access="33333333" name="LCDSE0" mclr="11111111" por="11111111" />
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+    <sfr address="0x0F58" access="33333333" name="LCDPS" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F83J11" unused_bank_mask="0x7FF0" >
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0FBF" start="0x0F6B" />
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+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
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+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
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+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
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+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <sfr address="0x0F68" access="00333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="CCPR1L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F6A" access="33333333" name="CCPR1H" mclr="00000000" por="00000000" />
+    <sfr address="0x0F65" access="00333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="CCPR2L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="CCPR2H" mclr="00000000" por="00000000" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB0" access="11330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F64" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F60" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F83J90" unused_bank_mask="0x7FF0" >
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="03333333" name="INTCON2" mclr="02222222" por="02222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="03333333" name="VREG_CNTL" mclr="01222111" por="01222111" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="03330330" name="IPR3" mclr="12221221" por="12221221" />
+    <sfr address="0x0FA4" access="03330330" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="03330330" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33003330" name="IPR2" mclr="22112221" por="22112221" />
+    <sfr address="0x0FA1" access="33003330" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33003330" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="03333033" name="IPR1" mclr="02222122" por="02222122" />
+    <sfr address="0x0F9E" access="03113033" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333033" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="02110100" por="02110100" />
+    <sfr address="0x0F9B" access="30333333" name="OSCTUNE" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <sfr address="0x0F68" access="00333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="CCPR1L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F6A" access="33333333" name="CCPR1H" mclr="00000000" por="00000000" />
+    <sfr address="0x0F65" access="00333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="CCPR2L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="CCPR2H" mclr="00000000" por="00000000" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F64" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F60" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+    <sfr address="0x0FBF" access="33333333" name="LCDD4" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="LCDD3" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="LCDD2" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBC" access="33333333" name="LCDD1" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="LCDD0" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="LCDSE5" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB9" access="33333333" name="LCDSE4" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB8" access="33333333" name="LCDSE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="LCDSE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="LCDSE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="33333333" name="LCDPS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA9" access="33333333" name="LCDSE0" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33303333" name="LCDCON" mclr="11101111" por="11101111" />
+    <sfr address="0x0F7D" access="33333333" name="LCDD23" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7C" access="33333333" name="LCDD22" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7B" access="33333333" name="LCDD21" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7A" access="33333333" name="LCDD20" mclr="33333333" por="00000000" />
+    <sfr address="0x0F79" access="33333333" name="LCDD19" mclr="33333333" por="00000000" />
+    <sfr address="0x0F78" access="33333333" name="LCDD18" mclr="33333333" por="00000000" />
+    <sfr address="0x0F77" access="33333333" name="LCDD17" mclr="33333333" por="00000000" />
+    <sfr address="0x0F76" access="33333333" name="LCDD16" mclr="33333333" por="00000000" />
+    <sfr address="0x0F75" access="33333333" name="LCDD15" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="LCDD14" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="33333333" name="LCDD13" mclr="33333333" por="00000000" />
+    <sfr address="0x0F72" access="33333333" name="LCDD12" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="LCDD11" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="33333333" name="LCDD10" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6F" access="33333333" name="LCDD9" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6E" access="33333333" name="LCDD8" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6D" access="33333333" name="LCDD7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6C" access="33333333" name="LCDD6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6B" access="33333333" name="LCDD5" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F8410" unused_bank_mask="0x7FF8" >
+    <unused end="0x0F6A" start="0x0F00" />
+    <unused end="0x0F7C" start="0x0F70" />
+    <unused end="0x0F7D" start="0x0F7D" />
+    <unused end="0x0FAA" start="0x0FA6" />
+    <unused end="0x0FB6" start="0x0FB6" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="HLVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA5" access="00330003" name="IPR3" mclr="00220002" por="00220002" />
+    <sfr address="0x0FA4" access="00110003" name="PIR3" mclr="00110001" por="00110001" />
+    <sfr address="0x0FA3" access="00330003" name="PIE3" mclr="00110001" por="00110001" />
+    <sfr address="0x0FA2" access="33003333" name="IPR2" mclr="22002222" por="22002222" />
+    <sfr address="0x0FA1" access="33003333" name="PIR2" mclr="11001111" por="11001111" />
+    <sfr address="0x0FA0" access="33003333" name="PIE2" mclr="11001111" por="11001111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="33333133" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="31111111" por="01111111" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00133333" name="PORTG" mclr="00333333" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="11113333" por="11110000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="00333333" name="CCP3CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="31033033" name="BAUDCON1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F8490" unused_bank_mask="0x7FF8" >
+    <unused end="0x0F57" start="0x0F40" />
+    <unused end="0x0F7D" start="0x0F7D" />
+    <unused end="0x0FAA" start="0x0FA6" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <unused end="0x0FB9" start="0x0FB6" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="HLVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA5" access="03330000" name="IPR3" mclr="02220000" por="02220000" />
+    <sfr address="0x0FA4" access="03110000" name="PIR3" mclr="01110000" por="01110000" />
+    <sfr address="0x0FA3" access="03330000" name="PIE3" mclr="01110000" por="01110000" />
+    <sfr address="0x0FA2" access="33003333" name="IPR2" mclr="22002222" por="22002222" />
+    <sfr address="0x0FA1" access="33003333" name="PIR2" mclr="11001111" por="11001111" />
+    <sfr address="0x0FA0" access="33003333" name="PIE2" mclr="11001111" por="11001111" />
+    <sfr address="0x0F9F" access="03333333" name="IPR1" mclr="02222222" por="02222222" />
+    <sfr address="0x0F9E" access="03113333" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333333" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="33333133" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="00333333" name="OSCTUNE" mclr="00111111" por="00111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33330000" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33330000" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33330000" name="TRISE" mclr="22220000" por="22220000" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="31111111" por="01111111" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00133333" name="PORTG" mclr="00333333" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="11113333" por="11110000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="31033033" name="BAUDCON1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="33333333" name="LCDD23" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7B" access="33333333" name="LCDD22" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F74" access="33333333" name="LCDD15" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F72" access="33333333" name="LCDD13" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F70" access="33333333" name="LCDD11" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F69" access="33333333" name="LCDD9" mclr="33333333" por="00000000" />
+    <sfr address="0x0F68" access="33333333" name="LCDD8" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F66" access="33333333" name="LCDD6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="LCDD5" mclr="33333333" por="00000000" />
+    <sfr address="0x0F64" access="33333333" name="LCDD4" mclr="33333333" por="00000000" />
+    <sfr address="0x0F63" access="33333333" name="LCDD3" mclr="33333333" por="00000000" />
+    <sfr address="0x0F62" access="33333333" name="LCDD2" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F60" access="33333333" name="LCDD0" mclr="33333333" por="00000000" />
+    <sfr address="0x0F5F" access="33333333" name="LCDSE5" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5E" access="33333333" name="LCDSE4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5D" access="33333333" name="LCDSE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5C" access="33333333" name="LCDSE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5B" access="33333333" name="LCDSE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5A" access="33333333" name="LCDSE0" mclr="11111111" por="11111111" />
+    <sfr address="0x0F59" access="33303333" name="LCDCON" mclr="11101111" por="11101111" />
+    <sfr address="0x0F58" access="33333333" name="LCDPS" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F84J11" unused_bank_mask="0x7FF0" >
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0FBF" start="0x0F6B" />
+    <combined address="0x0FFD" size="3" name="TOS" />
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+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
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+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
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+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
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+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
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+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
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+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="03333333" name="VREG_CNTL" mclr="01222111" por="01222111" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
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+    <sfr address="0x0FA2" access="33003330" name="IPR2" mclr="22112221" por="22112221" />
+    <sfr address="0x0FA1" access="33003330" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33003330" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="33333033" name="IPR1" mclr="22222122" por="22222122" />
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+    <sfr address="0x0F9D" access="33333033" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="02110100" por="02110100" />
+    <sfr address="0x0F9B" access="30333333" name="OSCTUNE" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
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+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
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+    <combined address="0x0FC3" size="2" name="ADRES" />
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+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <sfr address="0x0F68" access="00333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="CCPR1L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F6A" access="33333333" name="CCPR1H" mclr="00000000" por="00000000" />
+    <sfr address="0x0F65" access="00333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="CCPR2L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="CCPR2H" mclr="00000000" por="00000000" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB0" access="11330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F64" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F60" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F84J90" unused_bank_mask="0x7FF0" >
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="03333333" name="INTCON2" mclr="02222222" por="02222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="03333333" name="VREG_CNTL" mclr="01222111" por="01222111" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="03330330" name="IPR3" mclr="12221221" por="12221221" />
+    <sfr address="0x0FA4" access="03330330" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="03330330" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33003330" name="IPR2" mclr="22112221" por="22112221" />
+    <sfr address="0x0FA1" access="33003330" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33003330" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="03333033" name="IPR1" mclr="02222122" por="02222122" />
+    <sfr address="0x0F9E" access="03113033" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333033" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="02110100" por="02110100" />
+    <sfr address="0x0F9B" access="30333333" name="OSCTUNE" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <sfr address="0x0F68" access="00333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="CCPR1L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F6A" access="33333333" name="CCPR1H" mclr="00000000" por="00000000" />
+    <sfr address="0x0F65" access="00333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="CCPR2L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="CCPR2H" mclr="00000000" por="00000000" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F64" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F60" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+    <sfr address="0x0FBF" access="33333333" name="LCDD4" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="LCDD3" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="LCDD2" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBC" access="33333333" name="LCDD1" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="LCDD0" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="LCDSE5" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB9" access="33333333" name="LCDSE4" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB8" access="33333333" name="LCDSE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="LCDSE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="LCDSE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="33333333" name="LCDPS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA9" access="33333333" name="LCDSE0" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33303333" name="LCDCON" mclr="11101111" por="11101111" />
+    <sfr address="0x0F7D" access="33333333" name="LCDD23" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7C" access="33333333" name="LCDD22" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7B" access="33333333" name="LCDD21" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7A" access="33333333" name="LCDD20" mclr="33333333" por="00000000" />
+    <sfr address="0x0F79" access="33333333" name="LCDD19" mclr="33333333" por="00000000" />
+    <sfr address="0x0F78" access="33333333" name="LCDD18" mclr="33333333" por="00000000" />
+    <sfr address="0x0F77" access="33333333" name="LCDD17" mclr="33333333" por="00000000" />
+    <sfr address="0x0F76" access="33333333" name="LCDD16" mclr="33333333" por="00000000" />
+    <sfr address="0x0F75" access="33333333" name="LCDD15" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="LCDD14" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="33333333" name="LCDD13" mclr="33333333" por="00000000" />
+    <sfr address="0x0F72" access="33333333" name="LCDD12" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="LCDD11" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="33333333" name="LCDD10" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6F" access="33333333" name="LCDD9" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6E" access="33333333" name="LCDD8" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6D" access="33333333" name="LCDD7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6C" access="33333333" name="LCDD6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6B" access="33333333" name="LCDD5" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F8520" unused_bank_mask="0x7F00" >
+    <unused end="0x0F6A" start="0x0F00" />
+    <unused end="0x0F7F" start="0x0F79" />
+    <unused end="0x0F9B" start="0x0F9B" />
+    <unused end="0x0FB6" start="0x0FB6" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00000003" name="OSCCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="00333333" name="IPR3" mclr="00222222" por="00222222" />
+    <sfr address="0x0FA4" access="00113333" name="PIR3" mclr="00111111" por="00111111" />
+    <sfr address="0x0FA3" access="00333333" name="PIE3" mclr="00111111" por="00111111" />
+    <sfr address="0x0FA2" access="03033333" name="IPR2" mclr="02022222" por="02022222" />
+    <sfr address="0x0FA1" access="03033333" name="PIR2" mclr="01011111" por="01011111" />
+    <sfr address="0x0FA0" access="03033333" name="PIE2" mclr="01011111" por="01011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="31111111" por="01111111" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00033333" name="PORTG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30000333" name="ADCON2" mclr="10000111" por="10000111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="00333333" name="CCP3CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30333333" name="T1CON" mclr="30333333" por="10111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="00000033" name="EEADRH" mclr="00000011" por="00000011" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F8525" unused_bank_mask="0x0000" >
+    <unused end="0x0F66" start="0x0F00" />
+    <unused end="0x0F7B" start="0x0F7A" />
+    <unused end="0x0F9B" start="0x0F9B" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00003333" name="OSCCON" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10044433" por="10022211" />
+    <sfr address="0x0FA5" access="00333333" name="IPR3" mclr="00222222" por="00222222" />
+    <sfr address="0x0FA4" access="00113333" name="PIR3" mclr="00111111" por="00111111" />
+    <sfr address="0x0FA3" access="00333333" name="PIE3" mclr="00111111" por="00111111" />
+    <sfr address="0x0FA2" access="03033333" name="IPR2" mclr="02022222" por="02022222" />
+    <sfr address="0x0FA1" access="03033333" name="PIR2" mclr="01011111" por="01011111" />
+    <sfr address="0x0FA0" access="03033333" name="PIE2" mclr="01011111" por="01011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="31111111" por="01111111" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00133333" name="PORTG" mclr="00333333" por="00000000" />
+    <sfr address="0x0F98" access="00133333" name="TRISG" mclr="00222222" por="00222222" />
+    <sfr address="0x0F8F" access="00133333" name="LATG" mclr="00333333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="11113333" por="11110000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="ECCP2DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="ECCP3DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33303333" name="CVRCON" mclr="11101111" por="11101111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FAA" access="00000033" name="EEADRH" mclr="00000011" por="00000011" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0F7E" access="01033033" name="BAUDCON1" mclr="02021011" por="02021011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="01033033" name="BAUDCON2" mclr="02021011" por="02021011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F8527" unused_bank_mask="0x0000" >
+    <unused end="0x0F61" start="0x0F60" />
+    <unused end="0x0F7B" start="0x0F7A" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="11222222" por="11222222" />
+    <sfr address="0x0FA4" access="33113333" name="PIR3" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="33333133" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00133333" name="PORTG" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00000000" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="00000000" por="00000000" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="00000000" por="00000000" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="ECCP1DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="ECCP2DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="ECCP3DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F64" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FAA" access="00000033" name="EEADRH" mclr="00000011" por="00000011" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33333399" name="EECON1" mclr="33313111" por="00010111" />
+    <sfr address="0x0F7E" access="01033033" name="BAUDCTL1" mclr="02011011" por="02011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="01033033" name="BAUDCTL2" mclr="02011011" por="02011011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33333313" name="TXSTA2" mclr="11111121" por="11111121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F8585" unused_bank_mask="0x0000" >
+    <unused end="0x0D5F" start="0x0D00" />
+    <unused end="0x0D6F" start="0x0D6C" />
+    <unused end="0x0D7F" start="0x0D7C" />
+    <unused end="0x0D8F" start="0x0D8C" />
+    <unused end="0x0DD3" start="0x0D94" />
+    <unused end="0x0DD7" start="0x0DD6" />
+    <unused end="0x0DDF" start="0x0DD9" />
+    <unused end="0x0DEF" start="0x0DE8" />
+    <unused end="0x0DF7" start="0x0DF4" />
+    <unused end="0x0DF9" start="0x0DF9" />
+    <unused end="0x0DFB" start="0x0DFB" />
+    <unused end="0x0E1F" start="0x0DFD" />
+    <unused end="0x0EFF" start="0x0E80" />
+    <unused end="0x0F78" start="0x0F78" />
+    <unused end="0x0F7D" start="0x0F7A" />
+    <unused end="0x0F9B" start="0x0F9B" />
+    <unused end="0x0FB9" start="0x0FB7" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00001133" name="OSCCON" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33333333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="03033333" name="IPR2" mclr="02022222" por="02022222" />
+    <sfr address="0x0FA1" access="03033333" name="PIR2" mclr="01011111" por="01011111" />
+    <sfr address="0x0FA0" access="03033333" name="PIE2" mclr="01011111" por="01011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="31111111" por="01111111" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00133333" name="PORTG" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00000000" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="11113333" por="11110000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="ECCP1DEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCPAS1" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30333333" name="T1CON" mclr="30333333" por="10111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FAA" access="00000033" name="EEADRH" mclr="00000011" por="00000011" />
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+    <sfr address="0x0E3B" access="33333333" name="B1D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3A" access="33333333" name="B1D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E39" access="33333333" name="B1D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E38" access="33333333" name="B1D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E37" access="33333333" name="B1D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E36" access="33333333" name="B1D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E35" access="03113333" name="B1DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E34" access="33333333" name="B1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E33" access="33333333" name="B1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E32" access="33333033" name="B1SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E31" access="33333333" name="B1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E30" access="33113333" name="B1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E2F" access="33393331" name="CANCON_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2E" access="11111111" name="CANSTAT_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2D" access="33333333" name="B0D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2C" access="33333333" name="B0D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2B" access="33333333" name="B0D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2A" access="33333333" name="B0D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E29" access="33333333" name="B0D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E28" access="33333333" name="B0D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E27" access="33333333" name="B0D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E26" access="33333333" name="B0D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E25" access="03113333" name="B0DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E24" access="33333333" name="B0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E23" access="33333333" name="B0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E22" access="33333033" name="B0SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E21" access="33333333" name="B0SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E20" access="33113333" name="B0CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0DFC" access="00033300" name="TXBIE" mclr="00033300" por="00011100" />
+    <sfr address="0x0DFA" access="33333333" name="BIE0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF8" access="33333300" name="BSEL0" mclr="11111100" por="11111100" />
+    <sfr address="0x0DF3" access="33333333" name="MSEL3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF2" access="33333333" name="MSEL2" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF1" access="33333333" name="MSEL1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF0" access="33333333" name="MSEL0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE7" access="33333333" name="RXFBCON7" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE6" access="33333333" name="RXFBCON6" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE5" access="33333333" name="RXFBCON5" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE4" access="33333333" name="RXFBCON4" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE3" access="33333333" name="RXFBCON3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE2" access="33333333" name="RXFBCON2" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE1" access="33333333" name="RXFBCON1" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE0" access="33333333" name="RXFBCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD8" access="00033333" name="SDFLC" mclr="00011111" por="00011111" />
+    <sfr address="0x0DD5" access="33333333" name="RXFCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD4" access="33333333" name="RXFCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0D93" access="33333333" name="RXF15EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D92" access="33333333" name="RXF15EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D91" access="33333033" name="RXF15SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D90" access="33333333" name="RXF15SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8B" access="33333333" name="RXF14EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8A" access="33333333" name="RXF14EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D89" access="33333033" name="RXF14SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D88" access="33333333" name="RXF14SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D87" access="33333333" name="RXF13EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D86" access="33333333" name="RXF13EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D85" access="33333033" name="RXF13SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D84" access="33333333" name="RXF13SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D83" access="33333333" name="RXF12EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D82" access="33333333" name="RXF12EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D81" access="33333033" name="RXF12SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D80" access="33333333" name="RXF12SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7B" access="33333333" name="RXF11EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7A" access="33333333" name="RXF11EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D79" access="33333033" name="RXF11SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D78" access="33333333" name="RXF11SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D77" access="33333333" name="RXF10EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D76" access="33333333" name="RXF10EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D75" access="33333033" name="RXF10SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D74" access="33333333" name="RXF10SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D73" access="33333333" name="RXF9EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D72" access="33333333" name="RXF9EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D71" access="33333033" name="RXF9SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D70" access="33333333" name="RXF9SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6B" access="33333333" name="RXF8EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6A" access="33333333" name="RXF8EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D69" access="33333033" name="RXF8SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D68" access="33333333" name="RXF8SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D67" access="33333333" name="RXF7EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D66" access="33333333" name="RXF7EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D65" access="33333033" name="RXF7SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D64" access="33333333" name="RXF7SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D63" access="33333333" name="RXF6EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D62" access="33333333" name="RXF6EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D61" access="33333033" name="RXF6SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D60" access="33333333" name="RXF6SIDH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F85J10" unused_bank_mask="0x7F00" >
+    <unused end="0x0F5F" start="0x0F00" />
+    <unused end="0x0F61" start="0x0F60" />
+    <unused end="0x0F7B" start="0x0F7A" />
+    <unused end="0x0FAA" start="0x0FA8" />
+    <unused end="0x0FD2" start="0x0FD2" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33003033" name="IPR2" mclr="22002022" por="22002022" />
+    <sfr address="0x0FA1" access="33003033" name="PIR2" mclr="11001011" por="11001011" />
+    <sfr address="0x0FA0" access="33003033" name="PIE2" mclr="11001011" por="11001011" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="30003033" name="OSCCON" mclr="10001011" por="10001011" />
+    <sfr address="0x0F9B" access="03000000" name="OSCTUNE" mclr="01000000" por="01000000" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F64" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0FB0" access="11330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="51033033" name="BAUDCON1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51033033" name="BAUDCON2" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F85J11" unused_bank_mask="0x7F00" >
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0FBF" start="0x0F6B" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="03333333" name="INTCON2" mclr="02222222" por="02222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="03333333" name="VREG_CNTL" mclr="01222111" por="01222111" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="00330330" name="IPR3" mclr="10221221" por="10221221" />
+    <sfr address="0x0FA4" access="00330330" name="PIR3" mclr="10111111" por="10111111" />
+    <sfr address="0x0FA3" access="00330330" name="PIE3" mclr="10111111" por="10111111" />
+    <sfr address="0x0FA2" access="33003330" name="IPR2" mclr="22112221" por="22112221" />
+    <sfr address="0x0FA1" access="33003330" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33003330" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="33333033" name="IPR1" mclr="22222122" por="22222122" />
+    <sfr address="0x0F9E" access="33113033" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333033" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="02110100" por="02110100" />
+    <sfr address="0x0F9B" access="30333333" name="OSCTUNE" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <sfr address="0x0F68" access="00333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="CCPR1L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F6A" access="33333333" name="CCPR1H" mclr="00000000" por="00000000" />
+    <sfr address="0x0F65" access="00333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="CCPR2L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="CCPR2H" mclr="00000000" por="00000000" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB0" access="11330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F64" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F60" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F85J15" unused_bank_mask="0x7F00" >
+    <unused end="0x0F5F" start="0x0F00" />
+    <unused end="0x0F61" start="0x0F60" />
+    <unused end="0x0F7B" start="0x0F7A" />
+    <unused end="0x0FAA" start="0x0FA8" />
+    <unused end="0x0FD2" start="0x0FD2" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33003033" name="IPR2" mclr="22002022" por="22002022" />
+    <sfr address="0x0FA1" access="33003033" name="PIR2" mclr="11001011" por="11001011" />
+    <sfr address="0x0FA0" access="33003033" name="PIE2" mclr="11001011" por="11001011" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="30003033" name="OSCCON" mclr="10001011" por="10001011" />
+    <sfr address="0x0F9B" access="03000000" name="OSCTUNE" mclr="01000000" por="01000000" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
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+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
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+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
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+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
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+    <sfr address="0x0FBD" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
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+    <sfr address="0x0FB7" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
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+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
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+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
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+    <sfr address="0x0F62" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
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+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
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+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0FB0" access="11330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="51033033" name="BAUDCON1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51033033" name="BAUDCON2" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F85J50" unused_bank_mask="0x0000" >
+    <unused end="0x0F59" start="0x0F40" />
+    <combined address="0x0FFD" size="3" name="TOS" />
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+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
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+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
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+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
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+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
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+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
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+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
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+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
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+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
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+    <sfr address="0x0FA0" access="33333333" name="PIE2" mclr="11111111" por="11111111" />
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+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0000" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FC0" access="30030003" name="WDTCON" mclr="10010001" por="10010001" />
+    <sfr address="0x0FD4" access="33333333" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33333333" name="OSCTUNE" mclr="11111111" por="11111111" />
+    <sfr address="0x0001" access="30333333" name="REFOCON" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333300" name="PORTF" mclr="31111100" por="01111100" />
+    <sfr address="0x0F8E" access="33333300" name="LATF" mclr="33333300" por="00000000" />
+    <sfr address="0x0F97" access="33333300" name="TRISF" mclr="22222200" por="22222200" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333333" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="33333300" name="ANCON1" mclr="11111100" por="11111100" />
+    <sfr address="0x0FC1" access="33333333" name="ADCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="30033333" name="ANCON2" mclr="10011111" por="10011111" />
+    <sfr address="0x0FBF" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBE" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBC" size="2" name="CCPR1" />
+    <sfr address="0x0FBD" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB9" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB7" size="2" name="CCPR2" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB2" size="2" name="CCPR3" />
+    <sfr address="0x0FB3" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0004" access="00033333" name="ODCON1" mclr="00011111" por="00011111" />
+    <sfr address="0x0005" access="00000033" name="ODCON2" mclr="00000011" por="00000011" />
+    <sfr address="0x0006" access="00000033" name="ODCON3" mclr="00000011" por="00000011" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6E" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6B" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0F7A" size="2" name="TMR3" />
+    <sfr address="0x0F7B" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7A" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F79" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0F69" access="33333333" name="PMPADDRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="PMPADDRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PMPDATA1H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="PMPDATA1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F65" access="30333333" name="PMPCONH" mclr="10111111" por="10111111" />
+    <sfr address="0x0F64" access="33333333" name="PMPCONL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="13333333" name="PMPMODEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="PMPMODEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33333333" name="PMPDATAOUT2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F60" access="33333333" name="PMPDATAOUT2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5F" access="33333333" name="PMPDATA2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5E" access="33333333" name="PMPDATA2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5D" access="33333333" name="PMPPEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5C" access="33333333" name="PMPPEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5B" access="19001111" name="PMPSTATH" mclr="11001111" por="11001111" />
+    <sfr address="0x0F5A" access="19001111" name="PMPSTATL" mclr="21002222" por="21002222" />
+    <sfr address="0x0009" access="00000003" name="PADCFG1" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD3" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD2" access="33333333" name="CM1CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0FD1" access="33333333" name="CM2CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0F6A" access="00000011" name="CMSTAT" mclr="00000022" por="00000022" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAC" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51333033" name="BAUDCTL2" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAB" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA9" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333313" name="TXSTA2" mclr="11111121" por="11111121" />
+    <sfr address="0x0F9C" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F85J90" unused_bank_mask="0x7F00" >
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="03333333" name="INTCON2" mclr="02222222" por="02222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="03333333" name="LCDREG" mclr="01222111" por="01222111" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="00010110" por="00010110" />
+    <sfr address="0x0FA5" access="03330330" name="IPR3" mclr="12221221" por="12221221" />
+    <sfr address="0x0FA4" access="03330330" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="03330330" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33003330" name="IPR2" mclr="22112221" por="22112221" />
+    <sfr address="0x0FA1" access="33003330" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33003330" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="03333033" name="IPR1" mclr="02222122" por="02222122" />
+    <sfr address="0x0F9E" access="03113033" name="PIR1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9D" access="03333033" name="PIE1" mclr="01111111" por="01111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="03330100" name="OSCCON" mclr="02110100" por="02110100" />
+    <sfr address="0x0F9B" access="30333333" name="OSCTUNE" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="11111111" por="11111111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <sfr address="0x0F68" access="00333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="CCPR1L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F6A" access="33333333" name="CCPR1H" mclr="00000000" por="00000000" />
+    <sfr address="0x0F65" access="00333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="CCPR2L" mclr="00000000" por="00000000" />
+    <sfr address="0x0F67" access="33333333" name="CCPR2H" mclr="00000000" por="00000000" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F64" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F60" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+    <sfr address="0x0FBF" access="33333333" name="LCDDATA4" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="LCDDATA3" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="LCDDATA2" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBC" access="33333333" name="LCDDATA1" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="LCDDATA0" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="LCDSE5" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB9" access="33333333" name="LCDSE4" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB8" access="33333333" name="LCDSE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB7" access="33333333" name="LCDSE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="LCDSE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="33333333" name="LCDPS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA9" access="33333333" name="LCDSE0" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33303333" name="LCDCON" mclr="11101111" por="11101111" />
+    <sfr address="0x0F7D" access="33333333" name="LCDDATA23" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7C" access="33333333" name="LCDDATA22" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7B" access="33333333" name="LCDDATA21" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7A" access="33333333" name="LCDDATA20" mclr="33333333" por="00000000" />
+    <sfr address="0x0F79" access="33333333" name="LCDDATA19" mclr="33333333" por="00000000" />
+    <sfr address="0x0F78" access="33333333" name="LCDDATA18" mclr="33333333" por="00000000" />
+    <sfr address="0x0F77" access="33333333" name="LCDDATA17" mclr="33333333" por="00000000" />
+    <sfr address="0x0F76" access="33333333" name="LCDDATA16" mclr="33333333" por="00000000" />
+    <sfr address="0x0F75" access="33333333" name="LCDDATA15" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="LCDDATA14" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="33333333" name="LCDDATA13" mclr="33333333" por="00000000" />
+    <sfr address="0x0F72" access="33333333" name="LCDDATA12" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="LCDDATA11" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="33333333" name="LCDDATA10" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6F" access="33333333" name="LCDDATA9" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6E" access="33333333" name="LCDDATA8" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6D" access="33333333" name="LCDDATA7" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6C" access="33333333" name="LCDDATA6" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6B" access="33333333" name="LCDDATA5" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F8620" unused_bank_mask="0x0000" >
+    <unused end="0x0F6A" start="0x0F00" />
+    <unused end="0x0F7F" start="0x0F79" />
+    <unused end="0x0F9B" start="0x0F9B" />
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+    <unused end="0x0FD4" start="0x0FD4" />
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+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
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+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
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+    <sfr address="0x0FA0" access="03033333" name="PIE2" mclr="01011111" por="01011111" />
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+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
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+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
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+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
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+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
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+    <combined address="0x0FBE" size="2" name="CCPR1" />
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+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
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+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
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+    <sfr address="0x0FB7" access="00333333" name="CCP3CON" mclr="00111111" por="00111111" />
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+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
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+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
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+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30333333" name="T1CON" mclr="30333333" por="10111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="00000033" name="EEADRH" mclr="00000011" por="00000011" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F8621" unused_bank_mask="0x0000" >
+    <unused end="0x0F66" start="0x0F00" />
+    <unused end="0x0F7B" start="0x0F7A" />
+    <unused end="0x0F9B" start="0x0F9B" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00003333" name="OSCCON" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10044433" por="10022211" />
+    <sfr address="0x0FA5" access="00333333" name="IPR3" mclr="00222222" por="00222222" />
+    <sfr address="0x0FA4" access="00113333" name="PIR3" mclr="00111111" por="00111111" />
+    <sfr address="0x0FA3" access="00333333" name="PIE3" mclr="00111111" por="00111111" />
+    <sfr address="0x0FA2" access="03033333" name="IPR2" mclr="02022222" por="02022222" />
+    <sfr address="0x0FA1" access="03033333" name="PIR2" mclr="01011111" por="01011111" />
+    <sfr address="0x0FA0" access="03033333" name="PIE2" mclr="01011111" por="01011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="31111111" por="01111111" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00133333" name="PORTG" mclr="00333333" por="00000000" />
+    <sfr address="0x0F98" access="00133333" name="TRISG" mclr="00222222" por="00222222" />
+    <sfr address="0x0F8F" access="00133333" name="LATG" mclr="00333333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="11113333" por="11110000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="ECCP2DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="ECCP3DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33303333" name="CVRCON" mclr="11101111" por="11101111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FAA" access="00000033" name="EEADRH" mclr="00000011" por="00000011" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0F7E" access="01033033" name="BAUDCON1" mclr="02021011" por="02021011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="01033033" name="BAUDCON2" mclr="02021011" por="02021011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F8622" unused_bank_mask="0x0000" >
+    <unused end="0x0F61" start="0x0F60" />
+    <unused end="0x0F7B" start="0x0F7A" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33113333" name="PIR3" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="33333133" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00133333" name="PORTG" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00000000" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="00000000" por="00000000" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="00000000" por="00000000" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="ECCP1DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="ECCP2DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="ECCP3DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F64" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FAA" access="00000033" name="EEADRH" mclr="00000011" por="00000011" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33313111" por="00010111" />
+    <sfr address="0x0F7E" access="01033033" name="BAUDCTL1" mclr="02011011" por="02011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="01033033" name="BAUDCTL2" mclr="02011011" por="02011011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33333313" name="TXSTA2" mclr="11111121" por="11111121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F8627" unused_bank_mask="0x0000" >
+    <unused end="0x0F61" start="0x0F60" />
+    <unused end="0x0F7B" start="0x0F7A" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
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+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="11222222" por="11222222" />
+    <sfr address="0x0FA4" access="33113333" name="PIR3" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="33333133" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
+    <sfr address="0x0F80" access="33333333" name="PORTA" mclr="33131111" por="00101111" />
+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00133333" name="PORTG" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00000000" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="00000000" por="00000000" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="00000000" por="00000000" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="ECCP1DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="ECCP2DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="ECCP3DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F64" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="31333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0FAA" access="00000033" name="EEADRH" mclr="00000011" por="00000011" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33333399" name="EECON1" mclr="33313111" por="00010111" />
+    <sfr address="0x0F7E" access="01033033" name="BAUDCTL1" mclr="02011011" por="02011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="01033033" name="BAUDCTL2" mclr="02011011" por="02011011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33333313" name="TXSTA2" mclr="11111121" por="11111121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F8680" unused_bank_mask="0x0000" >
+    <unused end="0x0D5F" start="0x0D00" />
+    <unused end="0x0D6F" start="0x0D6C" />
+    <unused end="0x0D7F" start="0x0D7C" />
+    <unused end="0x0D8F" start="0x0D8C" />
+    <unused end="0x0DD3" start="0x0D94" />
+    <unused end="0x0DD7" start="0x0DD6" />
+    <unused end="0x0DDF" start="0x0DD9" />
+    <unused end="0x0DEF" start="0x0DE8" />
+    <unused end="0x0DF7" start="0x0DF4" />
+    <unused end="0x0DF9" start="0x0DF9" />
+    <unused end="0x0DFB" start="0x0DFB" />
+    <unused end="0x0E1F" start="0x0DFD" />
+    <unused end="0x0EFF" start="0x0E80" />
+    <unused end="0x0F78" start="0x0F78" />
+    <unused end="0x0F7D" start="0x0F7A" />
+    <unused end="0x0F9B" start="0x0F9B" />
+    <unused end="0x0FB9" start="0x0FB7" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00001133" name="OSCCON" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33333333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="03033333" name="IPR2" mclr="02022222" por="02022222" />
+    <sfr address="0x0FA1" access="03033333" name="PIR2" mclr="01011111" por="01011111" />
+    <sfr address="0x0FA0" access="03033333" name="PIE2" mclr="01011111" por="01011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="31111111" por="01111111" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00133333" name="PORTG" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00000000" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="11113333" por="11110000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
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+    <sfr address="0x0E60" access="33113333" name="B4CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E5F" access="33393331" name="CANCON_RO6" mclr="21111111" por="21111111" />
+    <sfr address="0x0E5E" access="11111111" name="CANSTAT_RO6" mclr="21111111" por="21111111" />
+    <sfr address="0x0E5D" access="33333333" name="B3D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5C" access="33333333" name="B3D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5B" access="33333333" name="B3D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E5A" access="33333333" name="B3D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E59" access="33333333" name="B3D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E58" access="33333333" name="B3D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E57" access="33333333" name="B3D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E56" access="33333333" name="B3D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E55" access="03113333" name="B3DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E54" access="33333333" name="B3EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E53" access="33333333" name="B3EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E52" access="33333033" name="B3SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E51" access="33333333" name="B3SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E50" access="33113333" name="B3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E4F" access="33393331" name="CANCON_RO7" mclr="21111111" por="21111111" />
+    <sfr address="0x0E4E" access="11111111" name="CANSTAT_RO7" mclr="21111111" por="21111111" />
+    <sfr address="0x0E4D" access="33333333" name="B2D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4C" access="33333333" name="B2D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4B" access="33333333" name="B2D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E4A" access="33333333" name="B2D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E49" access="33333333" name="B2D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E48" access="33333333" name="B2D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E47" access="33333333" name="B2D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E46" access="33333333" name="B2D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E45" access="03113333" name="B2DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E44" access="33333333" name="B2EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E43" access="33333333" name="B2EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E42" access="33333033" name="B2SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E41" access="33333333" name="B2SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E40" access="33113333" name="B2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E3F" access="33393331" name="CANCON_RO8" mclr="21111111" por="21111111" />
+    <sfr address="0x0E3E" access="11111111" name="CANSTAT_RO8" mclr="21111111" por="21111111" />
+    <sfr address="0x0E3D" access="33333333" name="B1D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3C" access="33333333" name="B1D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3B" access="33333333" name="B1D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E3A" access="33333333" name="B1D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E39" access="33333333" name="B1D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E38" access="33333333" name="B1D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E37" access="33333333" name="B1D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E36" access="33333333" name="B1D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E35" access="03113333" name="B1DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E34" access="33333333" name="B1EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E33" access="33333333" name="B1EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E32" access="33333033" name="B1SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E31" access="33333333" name="B1SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E30" access="33113333" name="B1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0E2F" access="33393331" name="CANCON_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2E" access="11111111" name="CANSTAT_RO9" mclr="21111111" por="21111111" />
+    <sfr address="0x0E2D" access="33333333" name="B0D7" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2C" access="33333333" name="B0D6" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2B" access="33333333" name="B0D5" mclr="33333333" por="00000000" />
+    <sfr address="0x0E2A" access="33333333" name="B0D4" mclr="33333333" por="00000000" />
+    <sfr address="0x0E29" access="33333333" name="B0D3" mclr="33333333" por="00000000" />
+    <sfr address="0x0E28" access="33333333" name="B0D2" mclr="33333333" por="00000000" />
+    <sfr address="0x0E27" access="33333333" name="B0D1" mclr="33333333" por="00000000" />
+    <sfr address="0x0E26" access="33333333" name="B0D0" mclr="33333333" por="00000000" />
+    <sfr address="0x0E25" access="03113333" name="B0DLC" mclr="03333333" por="00000000" />
+    <sfr address="0x0E24" access="33333333" name="B0EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0E23" access="33333333" name="B0EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E22" access="33333033" name="B0SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0E21" access="33333333" name="B0SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0E20" access="33113333" name="B0CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0DFC" access="00033300" name="TXBIE" mclr="00033300" por="00011100" />
+    <sfr address="0x0DFA" access="33333333" name="BIE0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF8" access="33333300" name="BSEL0" mclr="11111100" por="11111100" />
+    <sfr address="0x0DF3" access="33333333" name="MSEL3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF2" access="33333333" name="MSEL2" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF1" access="33333333" name="MSEL1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DF0" access="33333333" name="MSEL0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE7" access="33333333" name="RXFBCON7" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE6" access="33333333" name="RXFBCON6" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE5" access="33333333" name="RXFBCON5" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE4" access="33333333" name="RXFBCON4" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE3" access="33333333" name="RXFBCON3" mclr="11111111" por="11111111" />
+    <sfr address="0x0DE2" access="33333333" name="RXFBCON2" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE1" access="33333333" name="RXFBCON1" mclr="11121112" por="11121112" />
+    <sfr address="0x0DE0" access="33333333" name="RXFBCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD8" access="00033333" name="SDFLC" mclr="00011111" por="00011111" />
+    <sfr address="0x0DD5" access="33333333" name="RXFCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0DD4" access="33333333" name="RXFCON0" mclr="11111111" por="11111111" />
+    <sfr address="0x0D93" access="33333333" name="RXF15EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D92" access="33333333" name="RXF15EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D91" access="33333033" name="RXF15SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D90" access="33333333" name="RXF15SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8B" access="33333333" name="RXF14EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D8A" access="33333333" name="RXF14EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D89" access="33333033" name="RXF14SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D88" access="33333333" name="RXF14SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D87" access="33333333" name="RXF13EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D86" access="33333333" name="RXF13EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D85" access="33333033" name="RXF13SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D84" access="33333333" name="RXF13SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D83" access="33333333" name="RXF12EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D82" access="33333333" name="RXF12EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D81" access="33333033" name="RXF12SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D80" access="33333333" name="RXF12SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7B" access="33333333" name="RXF11EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D7A" access="33333333" name="RXF11EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D79" access="33333033" name="RXF11SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D78" access="33333333" name="RXF11SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D77" access="33333333" name="RXF10EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D76" access="33333333" name="RXF10EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D75" access="33333033" name="RXF10SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D74" access="33333333" name="RXF10SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D73" access="33333333" name="RXF9EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D72" access="33333333" name="RXF9EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D71" access="33333033" name="RXF9SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D70" access="33333333" name="RXF9SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6B" access="33333333" name="RXF8EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D6A" access="33333333" name="RXF8EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D69" access="33333033" name="RXF8SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D68" access="33333333" name="RXF8SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D67" access="33333333" name="RXF7EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D66" access="33333333" name="RXF7EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D65" access="33333033" name="RXF7SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D64" access="33333333" name="RXF7SIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D63" access="33333333" name="RXF6EIDL" mclr="33333333" por="00000000" />
+    <sfr address="0x0D62" access="33333333" name="RXF6EIDH" mclr="33333333" por="00000000" />
+    <sfr address="0x0D61" access="33333033" name="RXF6SIDL" mclr="33333033" por="00000000" />
+    <sfr address="0x0D60" access="33333333" name="RXF6SIDH" mclr="33333333" por="00000000" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F86J10" unused_bank_mask="0x7F00" >
+    <unused end="0x0F5F" start="0x0F00" />
+    <unused end="0x0F61" start="0x0F60" />
+    <unused end="0x0F7B" start="0x0F7A" />
+    <unused end="0x0FAA" start="0x0FA8" />
+    <unused end="0x0FD2" start="0x0FD2" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33003033" name="IPR2" mclr="22002022" por="22002022" />
+    <sfr address="0x0FA1" access="33003033" name="PIR2" mclr="11001011" por="11001011" />
+    <sfr address="0x0FA0" access="33003033" name="PIE2" mclr="11001011" por="11001011" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="30003033" name="OSCCON" mclr="10001011" por="10001011" />
+    <sfr address="0x0F9B" access="03000000" name="OSCTUNE" mclr="01000000" por="01000000" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F64" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0FB0" access="11330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="51033033" name="BAUDCON1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51033033" name="BAUDCON2" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F86J11" unused_bank_mask="0x0000" >
+    <unused end="0x0F59" start="0x0F40" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
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+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
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+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD0" access="30333333" name="RCON" mclr="10334433" por="10222211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33333333" name="IPR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA1" access="33333333" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33333333" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0000" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FC0" access="30030003" name="WDTCON" mclr="10010001" por="10010001" />
+    <sfr address="0x0FD4" access="33333333" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33333333" name="OSCTUNE" mclr="11111111" por="11111111" />
+    <sfr address="0x0001" access="30333333" name="REFOCON" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333333" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="33333333" name="ANCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC1" access="33333333" name="ADCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33033333" name="ANCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBF" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBE" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBC" size="2" name="CCPR1" />
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+    <sfr address="0x0FBC" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB9" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB7" size="2" name="CCPR2" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB2" size="2" name="CCPR3" />
+    <sfr address="0x0FB3" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0004" access="00033333" name="ODCON1" mclr="00011111" por="00011111" />
+    <sfr address="0x0005" access="00000033" name="ODCON2" mclr="00000011" por="00000011" />
+    <sfr address="0x0006" access="00000033" name="ODCON3" mclr="00000011" por="00000011" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6E" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6B" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0F7A" size="2" name="TMR3" />
+    <sfr address="0x0F7B" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7A" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F79" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0F69" access="33333333" name="PMPADDRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="PMPADDRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PMPDATA1H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="PMPDATA1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F65" access="30333333" name="PMPCONH" mclr="10111111" por="10111111" />
+    <sfr address="0x0F64" access="33333333" name="PMPCONL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="13333333" name="PMPMODEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="PMPMODEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33333333" name="PMPDATAOUT2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F60" access="33333333" name="PMPDATAOUT2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5F" access="33333333" name="PMPDATA2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5E" access="33333333" name="PMPDATA2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5D" access="33333333" name="PMPPEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5C" access="33333333" name="PMPPEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5B" access="19001111" name="PMPSTATH" mclr="11001111" por="11001111" />
+    <sfr address="0x0F5A" access="19001111" name="PMPSTATL" mclr="21002222" por="21002222" />
+    <sfr address="0x0009" access="00000003" name="PADCFG1" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD3" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD2" access="33333333" name="CM1CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0FD1" access="33333333" name="CM2CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0F6A" access="00000011" name="CMSTAT" mclr="00000022" por="00000022" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAC" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51333033" name="BAUDCTL2" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAB" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA9" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333313" name="TXSTA2" mclr="11111121" por="11111121" />
+    <sfr address="0x0F9C" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F86J15" unused_bank_mask="0x0000" >
+    <unused end="0x0F61" start="0x0F60" />
+    <unused end="0x0F7B" start="0x0F7A" />
+    <unused end="0x0FAA" start="0x0FA8" />
+    <unused end="0x0FD2" start="0x0FD2" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33003033" name="IPR2" mclr="22002022" por="22002022" />
+    <sfr address="0x0FA1" access="33003033" name="PIR2" mclr="11001011" por="11001011" />
+    <sfr address="0x0FA0" access="33003033" name="PIE2" mclr="11001011" por="11001011" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="30003033" name="OSCCON" mclr="10001011" por="10001011" />
+    <sfr address="0x0F9B" access="03000000" name="OSCTUNE" mclr="01000000" por="01000000" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F64" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0FB0" access="11330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="51033033" name="BAUDCON1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51033033" name="BAUDCON2" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F86J16" unused_bank_mask="0x0000" >
+    <unused end="0x0F59" start="0x0F40" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD0" access="30333333" name="RCON" mclr="10334433" por="10222211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33333333" name="IPR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA1" access="33333333" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33333333" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0000" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FC0" access="30030003" name="WDTCON" mclr="10010001" por="10010001" />
+    <sfr address="0x0FD4" access="33333333" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33333333" name="OSCTUNE" mclr="11111111" por="11111111" />
+    <sfr address="0x0001" access="30333333" name="REFOCON" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333333" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="33333333" name="ANCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC1" access="33333333" name="ADCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33033333" name="ANCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBF" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBE" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBC" size="2" name="CCPR1" />
+    <sfr address="0x0FBD" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB9" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB7" size="2" name="CCPR2" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB2" size="2" name="CCPR3" />
+    <sfr address="0x0FB3" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0004" access="00033333" name="ODCON1" mclr="00011111" por="00011111" />
+    <sfr address="0x0005" access="00000033" name="ODCON2" mclr="00000011" por="00000011" />
+    <sfr address="0x0006" access="00000033" name="ODCON3" mclr="00000011" por="00000011" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6E" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6B" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0F7A" size="2" name="TMR3" />
+    <sfr address="0x0F7B" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7A" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F79" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0F69" access="33333333" name="PMPADDRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="PMPADDRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PMPDATA1H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="PMPDATA1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F65" access="30333333" name="PMPCONH" mclr="10111111" por="10111111" />
+    <sfr address="0x0F64" access="33333333" name="PMPCONL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="13333333" name="PMPMODEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="PMPMODEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33333333" name="PMPDATAOUT2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F60" access="33333333" name="PMPDATAOUT2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5F" access="33333333" name="PMPDATA2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5E" access="33333333" name="PMPDATA2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5D" access="33333333" name="PMPPEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5C" access="33333333" name="PMPPEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5B" access="19001111" name="PMPSTATH" mclr="11001111" por="11001111" />
+    <sfr address="0x0F5A" access="19001111" name="PMPSTATL" mclr="21002222" por="21002222" />
+    <sfr address="0x0009" access="00000003" name="PADCFG1" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD3" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD2" access="33333333" name="CM1CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0FD1" access="33333333" name="CM2CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0F6A" access="00000011" name="CMSTAT" mclr="00000022" por="00000022" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAC" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51333033" name="BAUDCTL2" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAB" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA9" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333313" name="TXSTA2" mclr="11111121" por="11111121" />
+    <sfr address="0x0F9C" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F86J50" unused_bank_mask="0x0000" >
+    <unused end="0x0F59" start="0x0F40" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD0" access="30333333" name="RCON" mclr="10334433" por="10222211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33333333" name="IPR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA1" access="33333333" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33333333" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0000" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FC0" access="30030003" name="WDTCON" mclr="10010001" por="10010001" />
+    <sfr address="0x0FD4" access="33333333" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33333333" name="OSCTUNE" mclr="11111111" por="11111111" />
+    <sfr address="0x0001" access="30333333" name="REFOCON" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333300" name="PORTF" mclr="31111100" por="01111100" />
+    <sfr address="0x0F8E" access="33333300" name="LATF" mclr="33333300" por="00000000" />
+    <sfr address="0x0F97" access="33333300" name="TRISF" mclr="22222200" por="22222200" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333333" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="33333300" name="ANCON1" mclr="11111100" por="11111100" />
+    <sfr address="0x0FC1" access="33333333" name="ADCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="30033333" name="ANCON2" mclr="10011111" por="10011111" />
+    <sfr address="0x0FBF" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBE" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBC" size="2" name="CCPR1" />
+    <sfr address="0x0FBD" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB9" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB7" size="2" name="CCPR2" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB2" size="2" name="CCPR3" />
+    <sfr address="0x0FB3" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0004" access="00033333" name="ODCON1" mclr="00011111" por="00011111" />
+    <sfr address="0x0005" access="00000033" name="ODCON2" mclr="00000011" por="00000011" />
+    <sfr address="0x0006" access="00000033" name="ODCON3" mclr="00000011" por="00000011" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6E" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6B" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0F7A" size="2" name="TMR3" />
+    <sfr address="0x0F7B" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7A" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F79" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0F69" access="33333333" name="PMPADDRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="PMPADDRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PMPDATA1H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="PMPDATA1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F65" access="30333333" name="PMPCONH" mclr="10111111" por="10111111" />
+    <sfr address="0x0F64" access="33333333" name="PMPCONL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="13333333" name="PMPMODEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="PMPMODEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33333333" name="PMPDATAOUT2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F60" access="33333333" name="PMPDATAOUT2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5F" access="33333333" name="PMPDATA2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5E" access="33333333" name="PMPDATA2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5D" access="33333333" name="PMPPEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5C" access="33333333" name="PMPPEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5B" access="19001111" name="PMPSTATH" mclr="11001111" por="11001111" />
+    <sfr address="0x0F5A" access="19001111" name="PMPSTATL" mclr="21002222" por="21002222" />
+    <sfr address="0x0009" access="00000003" name="PADCFG1" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD3" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD2" access="33333333" name="CM1CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0FD1" access="33333333" name="CM2CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0F6A" access="00000011" name="CMSTAT" mclr="00000022" por="00000022" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAC" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51333033" name="BAUDCTL2" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAB" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA9" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333313" name="TXSTA2" mclr="11111121" por="11111121" />
+    <sfr address="0x0F9C" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F86J55" unused_bank_mask="0x0000" >
+    <unused end="0x0F59" start="0x0F40" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD0" access="30333333" name="RCON" mclr="10334433" por="10222211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33333333" name="IPR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA1" access="33333333" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33333333" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0000" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FC0" access="30030003" name="WDTCON" mclr="10010001" por="10010001" />
+    <sfr address="0x0FD4" access="33333333" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33333333" name="OSCTUNE" mclr="11111111" por="11111111" />
+    <sfr address="0x0001" access="30333333" name="REFOCON" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333300" name="PORTF" mclr="31111100" por="01111100" />
+    <sfr address="0x0F8E" access="33333300" name="LATF" mclr="33333300" por="00000000" />
+    <sfr address="0x0F97" access="33333300" name="TRISF" mclr="22222200" por="22222200" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333333" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="33333300" name="ANCON1" mclr="11111100" por="11111100" />
+    <sfr address="0x0FC1" access="33333333" name="ADCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="30033333" name="ANCON2" mclr="10011111" por="10011111" />
+    <sfr address="0x0FBF" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBE" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBC" size="2" name="CCPR1" />
+    <sfr address="0x0FBD" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB9" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB7" size="2" name="CCPR2" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB2" size="2" name="CCPR3" />
+    <sfr address="0x0FB3" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0004" access="00033333" name="ODCON1" mclr="00011111" por="00011111" />
+    <sfr address="0x0005" access="00000033" name="ODCON2" mclr="00000011" por="00000011" />
+    <sfr address="0x0006" access="00000033" name="ODCON3" mclr="00000011" por="00000011" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6E" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6B" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0F7A" size="2" name="TMR3" />
+    <sfr address="0x0F7B" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7A" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F79" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0F69" access="33333333" name="PMPADDRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="PMPADDRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PMPDATA1H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="PMPDATA1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F65" access="30333333" name="PMPCONH" mclr="10111111" por="10111111" />
+    <sfr address="0x0F64" access="33333333" name="PMPCONL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="13333333" name="PMPMODEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="PMPMODEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33333333" name="PMPDATAOUT2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F60" access="33333333" name="PMPDATAOUT2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5F" access="33333333" name="PMPDATA2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5E" access="33333333" name="PMPDATA2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5D" access="33333333" name="PMPPEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5C" access="33333333" name="PMPPEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5B" access="19001111" name="PMPSTATH" mclr="11001111" por="11001111" />
+    <sfr address="0x0F5A" access="19001111" name="PMPSTATL" mclr="21002222" por="21002222" />
+    <sfr address="0x0009" access="00000003" name="PADCFG1" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD3" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD2" access="33333333" name="CM1CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0FD1" access="33333333" name="CM2CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0F6A" access="00000011" name="CMSTAT" mclr="00000022" por="00000022" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAC" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51333033" name="BAUDCTL2" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAB" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA9" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333313" name="TXSTA2" mclr="11111121" por="11111121" />
+    <sfr address="0x0F9C" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F86J60" unused_bank_mask="0x0000" >
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0FAA" start="0x0FA8" />
+    <unused end="0x0EFF" start="0x0EFF" />
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+    <unused end="0x0EFA" start="0x0EF8" />
+    <unused end="0x0EE1" start="0x0EDA" />
+    <unused end="0x0ED7" start="0x0ED6" />
+    <unused end="0x0ED3" start="0x0ED2" />
+    <unused end="0x0EBF" start="0x0EBA" />
+    <unused end="0x0EB5" start="0x0EB5" />
+    <unused end="0x0EB3" start="0x0EB3" />
+    <unused end="0x0EB0" start="0x0EAC" />
+    <unused end="0x0EA5" start="0x0EA5" />
+    <unused end="0x0EA1" start="0x0EA1" />
+    <unused end="0x0E9F" start="0x0E9A" />
+    <unused end="0x0E96" start="0x0E8B" />
+    <unused end="0x0E89" start="0x0E86" />
+    <unused end="0x0F66" start="0x0F62" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FA2" access="33333033" name="IPR2" mclr="22222022" por="22222022" />
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+    <sfr address="0x0F9B" access="33330000" name="OSCTUNE" mclr="11111111" por="11111111" />
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+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F91" access="00330000" name="LATJ" mclr="00330000" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
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+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
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+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="ECCP1DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="ECCP2DEL" mclr="11111111" por="11111111" />
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+    <sfr address="0x0FB7" access="33333333" name="CCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="ECCP3DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
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+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
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+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
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+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
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+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
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+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
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+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F7E" access="01033033" name="BAUDCON1" mclr="02011011" por="02011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
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+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
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+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+    <sfr address="0x0FD2" access="33333300" name="ECON1" mclr="11111100" por="11111100" />
+    <sfr address="0x0F7B" access="00033333" name="ERDPTH" mclr="33311212" por="00011212" />
+    <sfr address="0x0F7A" access="33333333" name="ERDPTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="00000000" name="EDATA" mclr="00000000" por="00000000" />
+    <sfr address="0x0F60" access="01515055" name="EIR" mclr="01111011" por="01111011" />
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+    <sfr address="0x0EFB" access="03333033" name="EIE" mclr="01111011" por="01111011" />
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+    <sfr address="0x0EF5" access="00033333" name="EDMADSTH" mclr="00011111" por="00011111" />
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+    <sfr address="0x0EF2" access="33333333" name="EDMANDL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EF1" access="00033333" name="EDMASTH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EF0" access="33333333" name="EDMASTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EEF" access="00033333" name="ERXWRPTH" mclr="00011111" por="00011111" />
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+    <sfr address="0x0EEC" access="33333333" name="ERXRDPTL" mclr="22222121" por="22222121" />
+    <sfr address="0x0EEB" access="00033333" name="ERXNDH" mclr="00022222" por="00022222" />
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+    <sfr address="0x0EE8" access="33333333" name="ERXSTL" mclr="22222121" por="22222121" />
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+    <sfr address="0x0EE6" access="33333333" name="ETXNDL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EE5" access="00033333" name="ETXSTH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EE4" access="33333333" name="ETXSTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EE3" access="00033333" name="EWRPTH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EE2" access="33333333" name="EWRPTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0ED9" access="11111111" name="EPKTCNT" mclr="11111111" por="11111111" />
+    <sfr address="0x0ED8" access="33333333" name="ERXFCON" mclr="21211112" por="21211112" />
+    <sfr address="0x0ED5" access="00033333" name="EPMOH" mclr="00011111" por="00011111" />
+    <sfr address="0x0ED4" access="33333333" name="EPMOL" mclr="11111111" por="11111111" />
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+    <sfr address="0x0ED0" access="33333333" name="EPMCSL" mclr="11111111" por="11111111" />
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+    <sfr address="0x0ECD" access="33333333" name="EPMM5" mclr="11111111" por="11111111" />
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+    <sfr address="0x0ECA" access="33333333" name="EPMM2" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC9" access="33333333" name="EPMM1" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC8" access="33333333" name="EPMM0" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC7" access="33333333" name="EHT7" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC6" access="33333333" name="EHT6" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC5" access="33333333" name="EHT5" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC4" access="33333333" name="EHT4" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC3" access="33333333" name="EHT3" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC2" access="33333333" name="EHT2" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC1" access="33333333" name="EHT1" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC0" access="33333333" name="EHT0" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB9" access="11111111" name="MIRDH" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB8" access="11111111" name="MIRDL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB7" access="22222222" name="MIWDH" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB6" access="22222222" name="MIWDL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB4" access="00033333" name="MIREGADR" mclr="00011111" por="00011111" />
+    <sfr address="0x0EB2" access="00000033" name="MICMD" mclr="00000011" por="00000011" />
+    <sfr address="0x0EB1" access="30000000" name="MICON" mclr="10000000" por="10000000" />
+    <sfr address="0x0EAB" access="33333333" name="MAMXFLH" mclr="11111221" por="11111221" />
+    <sfr address="0x0EAA" access="33333333" name="MAMXFLL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EA9" access="00333333" name="MACLCON2" mclr="00221222" por="00221222" />
+    <sfr address="0x0EA8" access="00003333" name="MACLCON1" mclr="00002222" por="00002222" />
+    <sfr address="0x0EA7" access="03333333" name="MAIPGH" mclr="01111111" por="01111111" />
+    <sfr address="0x0EA6" access="03333333" name="MAIPGL" mclr="01111111" por="01111111" />
+    <sfr address="0x0EA4" access="03333333" name="MABBIPG" mclr="01111111" por="01111111" />
+    <sfr address="0x0EA3" access="03330000" name="MACON4" mclr="01110011" por="01110011" />
+    <sfr address="0x0EA2" access="33333333" name="MACON3" mclr="11111111" por="11111111" />
+    <sfr address="0x0EA0" access="00003333" name="MACON1" mclr="00011111" por="00011111" />
+    <sfr address="0x0E99" access="33333333" name="EPAUSH" mclr="11121111" por="11121111" />
+    <sfr address="0x0E98" access="33333333" name="EPAUSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0E97" access="00000133" name="EFLOCON" mclr="00000111" por="00000111" />
+    <sfr address="0x0E8A" access="00001111" name="MISTAT" mclr="00001111" por="00001111" />
+    <sfr address="0x0E85" access="33333333" name="MAADR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0E84" access="33333333" name="MAADR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0E83" access="33333333" name="MAADR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0E82" access="33333333" name="MAADR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0E81" access="33333333" name="MAADR6" mclr="11111111" por="11111111" />
+    <sfr address="0x0E80" access="33333333" name="MAADR5" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F86J65" unused_bank_mask="0x0000" >
+    <unused end="0x0FD4" start="0x0FD4" />
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+    <sfr address="0x0EC9" access="33333333" name="EPMM1" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC8" access="33333333" name="EPMM0" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC7" access="33333333" name="EHT7" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC6" access="33333333" name="EHT6" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC5" access="33333333" name="EHT5" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC4" access="33333333" name="EHT4" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC3" access="33333333" name="EHT3" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC2" access="33333333" name="EHT2" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC1" access="33333333" name="EHT1" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC0" access="33333333" name="EHT0" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB9" access="11111111" name="MIRDH" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB8" access="11111111" name="MIRDL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB7" access="22222222" name="MIWDH" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB6" access="22222222" name="MIWDL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB4" access="00033333" name="MIREGADR" mclr="00011111" por="00011111" />
+    <sfr address="0x0EB2" access="00000033" name="MICMD" mclr="00000011" por="00000011" />
+    <sfr address="0x0EB1" access="30000000" name="MICON" mclr="10000000" por="10000000" />
+    <sfr address="0x0EAB" access="33333333" name="MAMXFLH" mclr="11111221" por="11111221" />
+    <sfr address="0x0EAA" access="33333333" name="MAMXFLL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EA9" access="00333333" name="MACLCON2" mclr="00221222" por="00221222" />
+    <sfr address="0x0EA8" access="00003333" name="MACLCON1" mclr="00002222" por="00002222" />
+    <sfr address="0x0EA7" access="03333333" name="MAIPGH" mclr="01111111" por="01111111" />
+    <sfr address="0x0EA6" access="03333333" name="MAIPGL" mclr="01111111" por="01111111" />
+    <sfr address="0x0EA4" access="03333333" name="MABBIPG" mclr="01111111" por="01111111" />
+    <sfr address="0x0EA3" access="03330000" name="MACON4" mclr="01110011" por="01110011" />
+    <sfr address="0x0EA2" access="33333333" name="MACON3" mclr="11111111" por="11111111" />
+    <sfr address="0x0EA0" access="00003333" name="MACON1" mclr="00011111" por="00011111" />
+    <sfr address="0x0E99" access="33333333" name="EPAUSH" mclr="11121111" por="11121111" />
+    <sfr address="0x0E98" access="33333333" name="EPAUSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0E97" access="00000133" name="EFLOCON" mclr="00000111" por="00000111" />
+    <sfr address="0x0E8A" access="00001111" name="MISTAT" mclr="00001111" por="00001111" />
+    <sfr address="0x0E85" access="33333333" name="MAADR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0E84" access="33333333" name="MAADR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0E83" access="33333333" name="MAADR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0E82" access="33333333" name="MAADR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0E81" access="33333333" name="MAADR6" mclr="11111111" por="11111111" />
+    <sfr address="0x0E80" access="33333333" name="MAADR5" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F8720" unused_bank_mask="0x0000" >
+    <unused end="0x0F6A" start="0x0F00" />
+    <unused end="0x0F7F" start="0x0F79" />
+    <unused end="0x0F9B" start="0x0F9B" />
+    <unused end="0x0FB6" start="0x0FB6" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD3" access="00000003" name="OSCCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA5" access="00333333" name="IPR3" mclr="00222222" por="00222222" />
+    <sfr address="0x0FA4" access="00113333" name="PIR3" mclr="00111111" por="00111111" />
+    <sfr address="0x0FA3" access="00333333" name="PIE3" mclr="00111111" por="00111111" />
+    <sfr address="0x0FA2" access="03033333" name="IPR2" mclr="02022222" por="02022222" />
+    <sfr address="0x0FA1" access="03033333" name="PIR2" mclr="01011111" por="01011111" />
+    <sfr address="0x0FA0" access="03033333" name="PIE2" mclr="01011111" por="01011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0F80" access="03333333" name="PORTA" mclr="03131111" por="00101111" />
+    <sfr address="0x0F89" access="03333333" name="LATA" mclr="03333333" por="00000000" />
+    <sfr address="0x0F92" access="03333333" name="TRISA" mclr="02222222" por="02222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="31111111" por="01111111" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="00033333" name="PORTG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30000333" name="ADCON2" mclr="10000111" por="10000111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="00333333" name="CCP1CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="00333333" name="CCP2CON" mclr="00111111" por="00111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="00333333" name="CCP3CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSPBUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSPADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSPSTAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSPCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSPCON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="30333333" name="T1CON" mclr="30333333" por="10111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="00000033" name="EEADRH" mclr="00000011" por="00000011" />
+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33013111" por="00010111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F8722" unused_bank_mask="0x0000" >
+    <unused end="0x0F61" start="0x0F60" />
+    <unused end="0x0F7B" start="0x0F7A" />
+    <unused end="0x0F9C" start="0x0F9C" />
+    <unused end="0x0FD4" start="0x0FD4" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD2" access="00133333" name="LVDCON" mclr="00111212" por="00111212" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="33033333" name="RCON" mclr="12034433" por="12022211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33113333" name="PIR3" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA2" access="33033333" name="IPR2" mclr="22022222" por="22022222" />
+    <sfr address="0x0FA1" access="33033333" name="PIR2" mclr="11011111" por="11011111" />
+    <sfr address="0x0FA0" access="33033333" name="PIE2" mclr="11011111" por="11011111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="33333133" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33033333" name="OSCTUNE" mclr="11011111" por="11011111" />
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+    <sfr address="0x0F89" access="33333333" name="LATA" mclr="33333333" por="00000000" />
+    <sfr address="0x0F92" access="33333333" name="TRISA" mclr="22222222" por="22222222" />
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+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F86" access="00133333" name="PORTG" mclr="00000000" por="00000000" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00000000" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="00000000" por="00000000" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FB0" access="33330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
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+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="ECCP1DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="ECCP2DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
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+    <sfr address="0x0FB7" access="33333333" name="CCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="ECCP3DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
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+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
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+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
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+    <sfr address="0x0F65" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F64" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
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+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
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+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
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+    <sfr address="0x0FA9" access="33333333" name="EEADR" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333333" name="EEDATA" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="33033399" name="EECON1" mclr="33313111" por="00010111" />
+    <sfr address="0x0F7E" access="01033033" name="BAUDCON1" mclr="02011011" por="02011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="01033033" name="BAUDCON2" mclr="02011011" por="02011011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33333313" name="TXSTA2" mclr="11111121" por="11111121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F87J10" unused_bank_mask="0x0000" >
+    <unused end="0x0F61" start="0x0F60" />
+    <unused end="0x0F7B" start="0x0F7A" />
+    <unused end="0x0FAA" start="0x0FA8" />
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+    <unused end="0x0FD4" start="0x0FD4" />
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+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
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+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
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+    <sfr address="0x0FA1" access="33003033" name="PIR2" mclr="11001011" por="11001011" />
+    <sfr address="0x0FA0" access="33003033" name="PIE2" mclr="11001011" por="11001011" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="30003033" name="OSCCON" mclr="10001011" por="10001011" />
+    <sfr address="0x0F9B" access="03000000" name="OSCTUNE" mclr="01000000" por="01000000" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F64" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0FB0" access="11330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111222" por="11111222" />
+    <sfr address="0x0F7E" access="51033033" name="BAUDCON1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51033033" name="BAUDCON2" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F87J11" unused_bank_mask="0x0000" >
+    <unused end="0x0F59" start="0x0F40" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
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+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD0" access="30333333" name="RCON" mclr="10334433" por="10222211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33333333" name="IPR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA1" access="33333333" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33333333" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0000" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FC0" access="30030003" name="WDTCON" mclr="10010001" por="10010001" />
+    <sfr address="0x0FD4" access="33333333" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33333333" name="OSCTUNE" mclr="11111111" por="11111111" />
+    <sfr address="0x0001" access="30333333" name="REFOCON" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="31111110" por="01111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333333" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="33033333" name="ANCON1" mclr="11011111" por="11011111" />
+    <sfr address="0x0FC1" access="33333333" name="ADCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="33333333" name="ANCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBF" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBE" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBC" size="2" name="CCPR1" />
+    <sfr address="0x0FBD" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB9" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB7" size="2" name="CCPR2" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB2" size="2" name="CCPR3" />
+    <sfr address="0x0FB3" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0004" access="00033333" name="ODCON1" mclr="00011111" por="00011111" />
+    <sfr address="0x0005" access="00000033" name="ODCON2" mclr="00000011" por="00000011" />
+    <sfr address="0x0006" access="00000033" name="ODCON3" mclr="00000011" por="00000011" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6E" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6B" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0F7A" size="2" name="TMR3" />
+    <sfr address="0x0F7B" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7A" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F79" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0F69" access="33333333" name="PMPADDRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="PMPADDRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PMPDATA1H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="PMPDATA1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F65" access="30333333" name="PMPCONH" mclr="10111111" por="10111111" />
+    <sfr address="0x0F64" access="33333333" name="PMPCONL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="13333333" name="PMPMODEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="PMPMODEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33333333" name="PMPDATAOUT2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F60" access="33333333" name="PMPDATAOUT2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5F" access="33333333" name="PMPDATA2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5E" access="33333333" name="PMPDATA2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5D" access="33333333" name="PMPPEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5C" access="33333333" name="PMPPEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5B" access="19001111" name="PMPSTATH" mclr="11001111" por="11001111" />
+    <sfr address="0x0F5A" access="19001111" name="PMPSTATL" mclr="21002222" por="21002222" />
+    <sfr address="0x0009" access="00000003" name="PADCFG1" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD3" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD2" access="33333333" name="CM1CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0FD1" access="33333333" name="CM2CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0F6A" access="00000011" name="CMSTAT" mclr="00000022" por="00000022" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAC" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51333033" name="BAUDCTL2" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAB" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA9" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333313" name="TXSTA2" mclr="11111121" por="11111121" />
+    <sfr address="0x0F9C" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F87J50" unused_bank_mask="0x0000" >
+    <unused end="0x0F59" start="0x0F40" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD0" access="30333333" name="RCON" mclr="10334433" por="10222211" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33333333" name="IPR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA1" access="33333333" name="PIR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA0" access="33333333" name="PIE2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0000" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FC0" access="30030003" name="WDTCON" mclr="10010001" por="10010001" />
+    <sfr address="0x0FD4" access="33333333" name="OSCCON" mclr="12111111" por="12111111" />
+    <sfr address="0x0F9B" access="33333333" name="OSCTUNE" mclr="11111111" por="11111111" />
+    <sfr address="0x0001" access="30333333" name="REFOCON" mclr="10111111" por="10111111" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333300" name="PORTF" mclr="31111100" por="01111100" />
+    <sfr address="0x0F8E" access="33333300" name="LATF" mclr="33333300" por="00000000" />
+    <sfr address="0x0F97" access="33333300" name="TRISF" mclr="22222200" por="22222200" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="22233333" por="22200000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="33333333" name="ADCON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0002" access="33333300" name="ANCON1" mclr="11111100" por="11111100" />
+    <sfr address="0x0FC1" access="33333333" name="ADCON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="30033333" name="ANCON2" mclr="10011111" por="10011111" />
+    <sfr address="0x0FBF" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBE" access="33333333" name="PWM1CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FBC" size="2" name="CCPR1" />
+    <sfr address="0x0FBD" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="ECCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FBA" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB9" access="33333333" name="PWM2CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB7" size="2" name="CCPR2" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB5" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="33333333" name="PWM3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0FB2" size="2" name="CCPR3" />
+    <sfr address="0x0FB3" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="ECCP3CON" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0004" access="00033333" name="ODCON1" mclr="00011111" por="00011111" />
+    <sfr address="0x0005" access="00000033" name="ODCON2" mclr="00000011" por="00000011" />
+    <sfr address="0x0006" access="00000033" name="ODCON3" mclr="00000011" por="00000011" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F6E" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6B" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0F7A" size="2" name="TMR3" />
+    <sfr address="0x0F7B" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F7A" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F79" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0F69" access="33333333" name="PMPADDRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="PMPADDRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="PMPDATA1H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="PMPDATA1L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F65" access="30333333" name="PMPCONH" mclr="10111111" por="10111111" />
+    <sfr address="0x0F64" access="33333333" name="PMPCONL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="13333333" name="PMPMODEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="PMPMODEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="33333333" name="PMPDATAOUT2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F60" access="33333333" name="PMPDATAOUT2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5F" access="33333333" name="PMPDATA2H" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5E" access="33333333" name="PMPDATA2L" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5D" access="33333333" name="PMPPEH" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5C" access="33333333" name="PMPPEL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F5B" access="19001111" name="PMPSTATH" mclr="11001111" por="11001111" />
+    <sfr address="0x0F5A" access="19001111" name="PMPSTATL" mclr="21002222" por="21002222" />
+    <sfr address="0x0009" access="00000003" name="PADCFG1" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD3" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD2" access="33333333" name="CM1CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0FD1" access="33333333" name="CM2CON1" mclr="11122222" por="11122222" />
+    <sfr address="0x0F6A" access="00000011" name="CMSTAT" mclr="00000022" por="00000022" />
+    <sfr address="0x0F7E" access="51333033" name="BAUDCTL1" mclr="12011011" por="12011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB0" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="33333313" name="TXSTA1" mclr="11111121" por="11111121" />
+    <sfr address="0x0FAC" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="51333033" name="BAUDCTL2" mclr="12111011" por="12111011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAB" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAA" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA9" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA8" access="33333313" name="TXSTA2" mclr="11111121" por="11111121" />
+    <sfr address="0x0F9C" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F87J60" unused_bank_mask="0x0000" >
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0FAA" start="0x0FA8" />
+    <unused end="0x0EFF" start="0x0EFF" />
+    <unused end="0x0EFC" start="0x0EFC" />
+    <unused end="0x0EFA" start="0x0EF8" />
+    <unused end="0x0EE1" start="0x0EDA" />
+    <unused end="0x0ED7" start="0x0ED6" />
+    <unused end="0x0ED3" start="0x0ED2" />
+    <unused end="0x0EBF" start="0x0EBA" />
+    <unused end="0x0EB5" start="0x0EB5" />
+    <unused end="0x0EB3" start="0x0EB3" />
+    <unused end="0x0EB0" start="0x0EAC" />
+    <unused end="0x0EA5" start="0x0EA5" />
+    <unused end="0x0EA1" start="0x0EA1" />
+    <unused end="0x0E9F" start="0x0E9A" />
+    <unused end="0x0E96" start="0x0E8B" />
+    <unused end="0x0E89" start="0x0E86" />
+    <unused end="0x0F66" start="0x0F62" />
+    <unused end="0x0FB0" start="0x0FB0" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0FA5" access="03333333" name="IPR3" mclr="02222222" por="02222222" />
+    <sfr address="0x0FA4" access="03133333" name="PIR3" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA3" access="03333333" name="PIE3" mclr="01111111" por="01111111" />
+    <sfr address="0x0FA2" access="33333033" name="IPR2" mclr="22222022" por="22222022" />
+    <sfr address="0x0FA1" access="33333033" name="PIR2" mclr="11111011" por="11111011" />
+    <sfr address="0x0FA0" access="33333033" name="PIE2" mclr="11111011" por="11111011" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="30003033" name="OSCCON" mclr="10001011" por="10001011" />
+    <sfr address="0x0F9B" access="33330000" name="OSCTUNE" mclr="11111111" por="11111111" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="00000333" name="PORTD" mclr="00000333" por="00000000" />
+    <sfr address="0x0F8C" access="00000333" name="LATD" mclr="00000333" por="00000000" />
+    <sfr address="0x0F95" access="00000333" name="TRISD" mclr="00000222" por="00000222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333330" name="PORTF" mclr="11111110" por="11111110" />
+    <sfr address="0x0F8E" access="33333330" name="LATF" mclr="33333330" por="00000000" />
+    <sfr address="0x0F97" access="33333330" name="TRISF" mclr="22222220" por="22222220" />
+    <sfr address="0x0F86" access="00033333" name="PORTG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F98" access="00033333" name="TRISG" mclr="00022222" por="00022222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="00033333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="00330000" name="PORTJ" mclr="00330000" por="00000000" />
+    <sfr address="0x0F9A" access="00330000" name="TRISJ" mclr="00220000" por="00220000" />
+    <sfr address="0x0F91" access="00330000" name="LATJ" mclr="00330000" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="ECCP1DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="ECCP2DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="ECCP3DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F7E" access="01033033" name="BAUDCON1" mclr="02011011" por="02011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="01033033" name="BAUDCON2" mclr="02011011" por="02011011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+    <sfr address="0x0FD2" access="33333300" name="ECON1" mclr="11111100" por="11111100" />
+    <sfr address="0x0F7B" access="00033333" name="ERDPTH" mclr="33311212" por="00011212" />
+    <sfr address="0x0F7A" access="33333333" name="ERDPTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="00000000" name="EDATA" mclr="00000000" por="00000000" />
+    <sfr address="0x0F60" access="01515055" name="EIR" mclr="01111011" por="01111011" />
+    <sfr address="0x0EFE" access="33300000" name="ECON2" mclr="21100000" por="21100000" />
+    <sfr address="0x0EFD" access="05050153" name="ESTAT" mclr="01010111" por="01010111" />
+    <sfr address="0x0EFB" access="03333033" name="EIE" mclr="01111011" por="01111011" />
+    <sfr address="0x0EF7" access="11111111" name="EDMASCH" mclr="11111111" por="11111111" />
+    <sfr address="0x0EF6" access="11111111" name="EDMASCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EF5" access="00033333" name="EDMADSTH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EF4" access="33333333" name="EDMADSTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EF3" access="00033333" name="EDMANDH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EF2" access="33333333" name="EDMANDL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EF1" access="00033333" name="EDMASTH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EF0" access="33333333" name="EDMASTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EEF" access="00033333" name="ERXWRPTH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EEE" access="33333333" name="ERXWRPTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EED" access="00033333" name="ERXRDPTH" mclr="00011212" por="00011212" />
+    <sfr address="0x0EEC" access="33333333" name="ERXRDPTL" mclr="22222121" por="22222121" />
+    <sfr address="0x0EEB" access="00033333" name="ERXNDH" mclr="00022222" por="00022222" />
+    <sfr address="0x0EEA" access="33333333" name="ERXNDL" mclr="22222222" por="22222222" />
+    <sfr address="0x0EE9" access="00033333" name="ERXSTH" mclr="00011212" por="00011212" />
+    <sfr address="0x0EE8" access="33333333" name="ERXSTL" mclr="22222121" por="22222121" />
+    <sfr address="0x0EE7" access="00033333" name="ETXNDH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EE6" access="33333333" name="ETXNDL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EE5" access="00033333" name="ETXSTH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EE4" access="33333333" name="ETXSTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EE3" access="00033333" name="EWRPTH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EE2" access="33333333" name="EWRPTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0ED9" access="11111111" name="EPKTCNT" mclr="11111111" por="11111111" />
+    <sfr address="0x0ED8" access="33333333" name="ERXFCON" mclr="21211112" por="21211112" />
+    <sfr address="0x0ED5" access="00033333" name="EPMOH" mclr="00011111" por="00011111" />
+    <sfr address="0x0ED4" access="33333333" name="EPMOL" mclr="11111111" por="11111111" />
+    <sfr address="0x0ED1" access="33333333" name="EPMCSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0ED0" access="33333333" name="EPMCSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECF" access="33333333" name="EPMM7" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECE" access="33333333" name="EPMM6" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECD" access="33333333" name="EPMM5" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECC" access="33333333" name="EPMM4" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECB" access="33333333" name="EPMM3" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECA" access="33333333" name="EPMM2" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC9" access="33333333" name="EPMM1" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC8" access="33333333" name="EPMM0" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC7" access="33333333" name="EHT7" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC6" access="33333333" name="EHT6" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC5" access="33333333" name="EHT5" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC4" access="33333333" name="EHT4" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC3" access="33333333" name="EHT3" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC2" access="33333333" name="EHT2" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC1" access="33333333" name="EHT1" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC0" access="33333333" name="EHT0" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB9" access="11111111" name="MIRDH" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB8" access="11111111" name="MIRDL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB7" access="22222222" name="MIWDH" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB6" access="22222222" name="MIWDL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB4" access="00033333" name="MIREGADR" mclr="00011111" por="00011111" />
+    <sfr address="0x0EB2" access="00000033" name="MICMD" mclr="00000011" por="00000011" />
+    <sfr address="0x0EB1" access="30000000" name="MICON" mclr="10000000" por="10000000" />
+    <sfr address="0x0EAB" access="33333333" name="MAMXFLH" mclr="11111221" por="11111221" />
+    <sfr address="0x0EAA" access="33333333" name="MAMXFLL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EA9" access="00333333" name="MACLCON2" mclr="00221222" por="00221222" />
+    <sfr address="0x0EA8" access="00003333" name="MACLCON1" mclr="00002222" por="00002222" />
+    <sfr address="0x0EA7" access="03333333" name="MAIPGH" mclr="01111111" por="01111111" />
+    <sfr address="0x0EA6" access="03333333" name="MAIPGL" mclr="01111111" por="01111111" />
+    <sfr address="0x0EA4" access="03333333" name="MABBIPG" mclr="01111111" por="01111111" />
+    <sfr address="0x0EA3" access="03330000" name="MACON4" mclr="01110011" por="01110011" />
+    <sfr address="0x0EA2" access="33333333" name="MACON3" mclr="11111111" por="11111111" />
+    <sfr address="0x0EA0" access="00003333" name="MACON1" mclr="00011111" por="00011111" />
+    <sfr address="0x0E99" access="33333333" name="EPAUSH" mclr="11121111" por="11121111" />
+    <sfr address="0x0E98" access="33333333" name="EPAUSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0E97" access="00000133" name="EFLOCON" mclr="00000111" por="00000111" />
+    <sfr address="0x0E8A" access="00001111" name="MISTAT" mclr="00001111" por="00001111" />
+    <sfr address="0x0E85" access="33333333" name="MAADR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0E84" access="33333333" name="MAADR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0E83" access="33333333" name="MAADR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0E82" access="33333333" name="MAADR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0E81" access="33333333" name="MAADR6" mclr="11111111" por="11111111" />
+    <sfr address="0x0E80" access="33333333" name="MAADR5" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F96J60" unused_bank_mask="0x0000" >
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0FAA" start="0x0FA8" />
+    <unused end="0x0EFF" start="0x0EFF" />
+    <unused end="0x0EFC" start="0x0EFC" />
+    <unused end="0x0EFA" start="0x0EF8" />
+    <unused end="0x0EE1" start="0x0EDA" />
+    <unused end="0x0ED7" start="0x0ED6" />
+    <unused end="0x0ED3" start="0x0ED2" />
+    <unused end="0x0EBF" start="0x0EBA" />
+    <unused end="0x0EB5" start="0x0EB5" />
+    <unused end="0x0EB3" start="0x0EB3" />
+    <unused end="0x0EB0" start="0x0EAC" />
+    <unused end="0x0EA5" start="0x0EA5" />
+    <unused end="0x0EA1" start="0x0EA1" />
+    <unused end="0x0E9F" start="0x0E9A" />
+    <unused end="0x0E96" start="0x0E8B" />
+    <unused end="0x0E89" start="0x0E86" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FA6" access="00033390" name="EECON1" mclr="11110111" por="11110111" />
+    <sfr address="0x0FA5" access="33333333" name="IPR3" mclr="22222222" por="22222222" />
+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA2" access="33333033" name="IPR2" mclr="22222022" por="22222022" />
+    <sfr address="0x0FA1" access="33333033" name="PIR2" mclr="11111011" por="11111011" />
+    <sfr address="0x0FA0" access="33333033" name="PIE2" mclr="11111011" por="11111011" />
+    <sfr address="0x0F9F" access="33333333" name="IPR1" mclr="22222222" por="22222222" />
+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9C" access="30330033" name="MEMCON" mclr="10110011" por="10110011" />
+    <sfr address="0x0FD3" access="30003033" name="OSCCON" mclr="10001011" por="10001011" />
+    <sfr address="0x0F9B" access="33330000" name="OSCTUNE" mclr="11111111" por="11111111" />
+    <sfr address="0x0F80" access="00333333" name="PORTA" mclr="00131111" por="00101111" />
+    <sfr address="0x0F89" access="00333333" name="LATA" mclr="00333333" por="00000000" />
+    <sfr address="0x0F92" access="00333333" name="TRISA" mclr="00222222" por="00222222" />
+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F93" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F94" access="33333333" name="TRISC" mclr="22222222" por="22222222" />
+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F95" access="33333333" name="TRISD" mclr="22222222" por="22222222" />
+    <sfr address="0x0F84" access="33333333" name="PORTE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
+    <sfr address="0x0F96" access="33333333" name="TRISE" mclr="22222222" por="22222222" />
+    <sfr address="0x0F85" access="33333333" name="PORTF" mclr="11111111" por="11111111" />
+    <sfr address="0x0F8E" access="33333333" name="LATF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F97" access="33333333" name="TRISF" mclr="22222222" por="22222222" />
+    <sfr address="0x0F86" access="33333333" name="PORTG" mclr="33333333" por="00000000" />
+    <sfr address="0x0F98" access="33333333" name="TRISG" mclr="22222222" por="22222222" />
+    <sfr address="0x0F8F" access="00033333" name="LATG" mclr="33333333" por="00000000" />
+    <sfr address="0x0F87" access="33333333" name="PORTH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F99" access="33333333" name="TRISH" mclr="22222222" por="22222222" />
+    <sfr address="0x0F90" access="33333333" name="LATH" mclr="33333333" por="00000000" />
+    <sfr address="0x0F88" access="33333333" name="PORTJ" mclr="33333333" por="00000000" />
+    <sfr address="0x0F9A" access="33333333" name="TRISJ" mclr="22222222" por="22222222" />
+    <sfr address="0x0F91" access="33333333" name="LATJ" mclr="33333333" por="00000000" />
+    <combined address="0x0FC3" size="2" name="ADRES" />
+    <sfr address="0x0FC4" access="33333333" name="ADRESH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC3" access="33333333" name="ADRESL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC2" access="00333333" name="ADCON0" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC1" access="00333333" name="ADCON1" mclr="00111111" por="00114444" />
+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
+    <sfr address="0x0FBF" access="33333333" name="CCPR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBE" access="33333333" name="CCPR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="ECCP1DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBB" access="33333333" name="CCPR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FBA" access="33333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="ECCP2DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
+    <sfr address="0x0FB9" access="33333333" name="CCPR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB8" access="33333333" name="CCPR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB7" access="33333333" name="CCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F69" access="33333333" name="ECCP3DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0F74" size="2" name="CCPR4" />
+    <sfr address="0x0F75" access="33333333" name="CCPR4H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
+    <combined address="0x0F71" size="2" name="CCPR5" />
+    <sfr address="0x0F72" access="33333333" name="CCPR5H" mclr="33333333" por="00000000" />
+    <sfr address="0x0F71" access="33333333" name="CCPR5L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F70" access="00333333" name="CCP5CON" mclr="00111111" por="00111111" />
+    <sfr address="0x0FC9" access="33333333" name="SSP1BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0FC8" access="33333333" name="SSP1ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC7" access="33333333" name="SSP1STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC6" access="33333333" name="SSP1CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FC5" access="33333333" name="SSP1CON2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F66" access="33333333" name="SSP2BUF" mclr="33333333" por="00000000" />
+    <sfr address="0x0F65" access="33333333" name="SSP2ADD" mclr="11111111" por="11111111" />
+    <sfr address="0x0F64" access="33333333" name="SSP2STAT" mclr="11111111" por="11111111" />
+    <sfr address="0x0F63" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F62" access="33333333" name="SSP2CON2" mclr="11111111" por="11111111" />
+    <combined address="0x0FD6" size="2" name="TMR0" />
+    <sfr address="0x0FD7" access="33333333" name="TMR0H" mclr="11111111" por="11111111" />
+    <sfr address="0x0FD6" access="33333333" name="TMR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD5" access="33333333" name="T0CON" mclr="22222222" por="22222222" />
+    <combined address="0x0FCE" size="2" name="TMR1" />
+    <sfr address="0x0FCF" access="33333333" name="TMR1H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCE" access="33333333" name="TMR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FCD" access="31333333" name="T1CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FCA" access="03333333" name="T2CON" mclr="01111111" por="01111111" />
+    <combined address="0x0FB2" size="2" name="TMR3" />
+    <sfr address="0x0FB3" access="33333333" name="TMR3H" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB2" access="33333333" name="TMR3L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FB1" access="33333333" name="T3CON" mclr="33333333" por="11111111" />
+    <sfr address="0x0F78" access="33333333" name="TMR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0F77" access="33333333" name="PR4" mclr="22222222" por="22222222" />
+    <sfr address="0x0F76" access="03333333" name="T4CON" mclr="01111111" por="01111111" />
+    <sfr address="0x0FB0" access="11330000" name="PSPCON" mclr="11110000" por="11110000" />
+    <sfr address="0x0FB5" access="33333333" name="CVRCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB4" access="11333333" name="CMCON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F7E" access="01033033" name="BAUDCON1" mclr="02011011" por="02011011" />
+    <sfr address="0x0F7F" access="33333333" name="SPBRGH1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAF" access="33333333" name="SPBRG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAE" access="11111111" name="RCREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAD" access="22222222" name="TXREG1" mclr="11111111" por="11111111" />
+    <sfr address="0x0FAC" access="33330313" name="TXSTA1" mclr="11110121" por="11110121" />
+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
+    <sfr address="0x0F7C" access="01033033" name="BAUDCON2" mclr="02011011" por="02011011" />
+    <sfr address="0x0F7D" access="33333333" name="SPBRGH2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6F" access="33333333" name="SPBRG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6E" access="11111111" name="RCREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
+    <sfr address="0x0F6B" access="33333111" name="RCSTA2" mclr="11111110" por="11111110" />
+    <sfr address="0x0FD2" access="33333300" name="ECON1" mclr="11111100" por="11111100" />
+    <sfr address="0x0F7B" access="00033333" name="ERDPTH" mclr="33311212" por="00011212" />
+    <sfr address="0x0F7A" access="33333333" name="ERDPTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0F61" access="00000000" name="EDATA" mclr="00000000" por="00000000" />
+    <sfr address="0x0F60" access="01515055" name="EIR" mclr="01111011" por="01111011" />
+    <sfr address="0x0EFE" access="33300000" name="ECON2" mclr="21100000" por="21100000" />
+    <sfr address="0x0EFD" access="05050153" name="ESTAT" mclr="01010111" por="01010111" />
+    <sfr address="0x0EFB" access="03333033" name="EIE" mclr="01111011" por="01111011" />
+    <sfr address="0x0EF7" access="11111111" name="EDMASCH" mclr="11111111" por="11111111" />
+    <sfr address="0x0EF6" access="11111111" name="EDMASCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EF5" access="00033333" name="EDMADSTH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EF4" access="33333333" name="EDMADSTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EF3" access="00033333" name="EDMANDH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EF2" access="33333333" name="EDMANDL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EF1" access="00033333" name="EDMASTH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EF0" access="33333333" name="EDMASTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EEF" access="00033333" name="ERXWRPTH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EEE" access="33333333" name="ERXWRPTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EED" access="00033333" name="ERXRDPTH" mclr="00011212" por="00011212" />
+    <sfr address="0x0EEC" access="33333333" name="ERXRDPTL" mclr="22222121" por="22222121" />
+    <sfr address="0x0EEB" access="00033333" name="ERXNDH" mclr="00022222" por="00022222" />
+    <sfr address="0x0EEA" access="33333333" name="ERXNDL" mclr="22222222" por="22222222" />
+    <sfr address="0x0EE9" access="00033333" name="ERXSTH" mclr="00011212" por="00011212" />
+    <sfr address="0x0EE8" access="33333333" name="ERXSTL" mclr="22222121" por="22222121" />
+    <sfr address="0x0EE7" access="00033333" name="ETXNDH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EE6" access="33333333" name="ETXNDL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EE5" access="00033333" name="ETXSTH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EE4" access="33333333" name="ETXSTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EE3" access="00033333" name="EWRPTH" mclr="00011111" por="00011111" />
+    <sfr address="0x0EE2" access="33333333" name="EWRPTL" mclr="11111111" por="11111111" />
+    <sfr address="0x0ED9" access="11111111" name="EPKTCNT" mclr="11111111" por="11111111" />
+    <sfr address="0x0ED8" access="33333333" name="ERXFCON" mclr="21211112" por="21211112" />
+    <sfr address="0x0ED5" access="00033333" name="EPMOH" mclr="00011111" por="00011111" />
+    <sfr address="0x0ED4" access="33333333" name="EPMOL" mclr="11111111" por="11111111" />
+    <sfr address="0x0ED1" access="33333333" name="EPMCSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0ED0" access="33333333" name="EPMCSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECF" access="33333333" name="EPMM7" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECE" access="33333333" name="EPMM6" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECD" access="33333333" name="EPMM5" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECC" access="33333333" name="EPMM4" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECB" access="33333333" name="EPMM3" mclr="11111111" por="11111111" />
+    <sfr address="0x0ECA" access="33333333" name="EPMM2" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC9" access="33333333" name="EPMM1" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC8" access="33333333" name="EPMM0" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC7" access="33333333" name="EHT7" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC6" access="33333333" name="EHT6" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC5" access="33333333" name="EHT5" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC4" access="33333333" name="EHT4" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC3" access="33333333" name="EHT3" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC2" access="33333333" name="EHT2" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC1" access="33333333" name="EHT1" mclr="11111111" por="11111111" />
+    <sfr address="0x0EC0" access="33333333" name="EHT0" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB9" access="11111111" name="MIRDH" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB8" access="11111111" name="MIRDL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB7" access="22222222" name="MIWDH" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB6" access="22222222" name="MIWDL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB4" access="00033333" name="MIREGADR" mclr="00011111" por="00011111" />
+    <sfr address="0x0EB2" access="00000033" name="MICMD" mclr="00000011" por="00000011" />
+    <sfr address="0x0EB1" access="30000000" name="MICON" mclr="10000000" por="10000000" />
+    <sfr address="0x0EAB" access="33333333" name="MAMXFLH" mclr="11111221" por="11111221" />
+    <sfr address="0x0EAA" access="33333333" name="MAMXFLL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EA9" access="00333333" name="MACLCON2" mclr="00221222" por="00221222" />
+    <sfr address="0x0EA8" access="00003333" name="MACLCON1" mclr="00002222" por="00002222" />
+    <sfr address="0x0EA7" access="03333333" name="MAIPGH" mclr="01111111" por="01111111" />
+    <sfr address="0x0EA6" access="03333333" name="MAIPGL" mclr="01111111" por="01111111" />
+    <sfr address="0x0EA4" access="03333333" name="MABBIPG" mclr="01111111" por="01111111" />
+    <sfr address="0x0EA3" access="03330000" name="MACON4" mclr="01110011" por="01110011" />
+    <sfr address="0x0EA2" access="33333333" name="MACON3" mclr="11111111" por="11111111" />
+    <sfr address="0x0EA0" access="00003333" name="MACON1" mclr="00011111" por="00011111" />
+    <sfr address="0x0E99" access="33333333" name="EPAUSH" mclr="11121111" por="11121111" />
+    <sfr address="0x0E98" access="33333333" name="EPAUSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0E97" access="00000133" name="EFLOCON" mclr="00000111" por="00000111" />
+    <sfr address="0x0E8A" access="00001111" name="MISTAT" mclr="00001111" por="00001111" />
+    <sfr address="0x0E85" access="33333333" name="MAADR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0E84" access="33333333" name="MAADR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0E83" access="33333333" name="MAADR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0E82" access="33333333" name="MAADR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0E81" access="33333333" name="MAADR6" mclr="11111111" por="11111111" />
+    <sfr address="0x0E80" access="33333333" name="MAADR5" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F96J65" unused_bank_mask="0x0000" >
+    <unused end="0x0FD4" start="0x0FD4" />
+    <unused end="0x0FAA" start="0x0FA8" />
+    <unused end="0x0EFF" start="0x0EFF" />
+    <unused end="0x0EFC" start="0x0EFC" />
+    <unused end="0x0EFA" start="0x0EF8" />
+    <unused end="0x0EE1" start="0x0EDA" />
+    <unused end="0x0ED7" start="0x0ED6" />
+    <unused end="0x0ED3" start="0x0ED2" />
+    <unused end="0x0EBF" start="0x0EBA" />
+    <unused end="0x0EB5" start="0x0EB5" />
+    <unused end="0x0EB3" start="0x0EB3" />
+    <unused end="0x0EB0" start="0x0EAC" />
+    <unused end="0x0EA5" start="0x0EA5" />
+    <unused end="0x0EA1" start="0x0EA1" />
+    <unused end="0x0E9F" start="0x0E9A" />
+    <unused end="0x0E96" start="0x0E8B" />
+    <unused end="0x0E89" start="0x0E86" />
+    <combined address="0x0FFD" size="3" name="TOS" />
+    <sfr address="0x0FFF" access="00033333" name="TOSU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFE" access="33333333" name="TOSH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFD" access="33333333" name="TOSL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FFC" access="55033333" name="STKPTR" mclr="11011111" por="11011111" />
+    <combined address="0x0FF9" size="3" name="PCLAT" />
+    <sfr address="0x0FFB" access="00033333" name="PCLATU" mclr="00011111" por="00011111" />
+    <sfr address="0x0FFA" access="33333333" name="PCLATH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF9" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <combined address="0x0FF6" size="3" name="TBLPTR" />
+    <sfr address="0x0FF8" access="00333333" name="TBLPTRU" mclr="00111111" por="00111111" />
+    <sfr address="0x0FF7" access="33333333" name="TBLPTRH" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF6" access="33333333" name="TBLPTRL" mclr="11111111" por="11111111" />
+    <sfr address="0x0FF5" access="33333333" name="TABLAT" mclr="11111111" por="11111111" />
+    <combined address="0x0FF3" size="2" name="PROD" />
+    <sfr address="0x0FF4" access="33333333" name="PRODH" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF3" access="33333333" name="PRODL" mclr="33333333" por="00000000" />
+    <sfr address="0x0FF2" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0FF1" access="33333333" name="INTCON2" mclr="22222222" por="22222222" />
+    <sfr address="0x0FF0" access="33333333" name="INTCON3" mclr="22111111" por="22111111" />
+    <sfr address="0x0FEF" access="00000000" name="INDF0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEE" access="00000000" name="POSTINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FED" access="00000000" name="POSTDEC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEC" access="00000000" name="PREINC0" mclr="00000000" por="00000000" />
+    <sfr address="0x0FEB" access="00000000" name="PLUSW0" mclr="00000000" por="00000000" />
+    <combined address="0x0FE9" size="2" name="FSR0" />
+    <sfr address="0x0FEA" access="00003333" name="FSR0H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE9" access="33333333" name="FSR0L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE8" access="33333333" name="WREG" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE7" access="00000000" name="INDF1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE6" access="00000000" name="POSTINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE5" access="00000000" name="POSTDEC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE4" access="00000000" name="PREINC1" mclr="00000000" por="00000000" />
+    <sfr address="0x0FE3" access="00000000" name="PLUSW1" mclr="00000000" por="00000000" />
+    <combined address="0x0FE1" size="2" name="FSR1" />
+    <sfr address="0x0FE2" access="00003333" name="FSR1H" mclr="00003333" por="00001111" />
+    <sfr address="0x0FE1" access="33333333" name="FSR1L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FE0" access="00003333" name="BSR" mclr="00001111" por="00001111" />
+    <sfr address="0x0FDF" access="00000000" name="INDF2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDE" access="00000000" name="POSTINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDD" access="00000000" name="POSTDEC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDC" access="00000000" name="PREINC2" mclr="00000000" por="00000000" />
+    <sfr address="0x0FDB" access="00000000" name="PLUSW2" mclr="00000000" por="00000000" />
+    <combined address="0x0FD9" size="2" name="FSR2" />
+    <sfr address="0x0FDA" access="00003333" name="FSR2H" mclr="00001111" por="00001111" />
+    <sfr address="0x0FD9" access="33333333" name="FSR2L" mclr="33333333" por="00000000" />
+    <sfr address="0x0FD8" access="00033333" name="STATUS" mclr="00033333" por="00000000" />
+    <sfr address="0x0FD1" access="00000003" name="WDTCON" mclr="00000001" por="00000001" />
+    <sfr address="0x0FD0" access="30033333" name="RCON" mclr="10034433" por="10022211" />
+    <sfr address="0x0FA7" access="22222222" name="EECON2" mclr="00000000" por="00000000" />
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+    <sfr address="0x0FA4" access="33133333" name="PIR3" mclr="11111111" por="11111111" />
+    <sfr address="0x0FA3" access="33333333" name="PIE3" mclr="11111111" por="11111111" />
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+    <sfr address="0x0FA1" access="33333033" name="PIR2" mclr="11111011" por="11111011" />
+    <sfr address="0x0FA0" access="33333033" name="PIE2" mclr="11111011" por="11111011" />
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+    <sfr address="0x0F9E" access="33113333" name="PIR1" mclr="11111111" por="11111111" />
+    <sfr address="0x0F9D" access="33333333" name="PIE1" mclr="11111111" por="11111111" />
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+    <sfr address="0x0F9B" access="33330000" name="OSCTUNE" mclr="11111111" por="11111111" />
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+    <sfr address="0x0F81" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F8A" access="33333333" name="LATB" mclr="33333333" por="00000000" />
+    <sfr address="0x0F82" access="33333333" name="PORTC" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8B" access="33333333" name="LATC" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F83" access="33333333" name="PORTD" mclr="33333333" por="00000000" />
+    <sfr address="0x0F8C" access="33333333" name="LATD" mclr="33333333" por="00000000" />
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+    <sfr address="0x0F8D" access="33333333" name="LATE" mclr="33333333" por="00000000" />
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+    <sfr address="0x0FC0" access="30333333" name="ADCON2" mclr="10111111" por="10111111" />
+    <combined address="0x0FBE" size="2" name="CCPR1" />
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+    <sfr address="0x0FBD" access="33333333" name="CCP1CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0FB6" access="33333333" name="ECCP1AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F79" access="33333333" name="ECCP1DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FBB" size="2" name="CCPR2" />
+    <sfr address="0x0FBC" access="33333333" name="CCPR2H" mclr="33333333" por="00000000" />
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+    <sfr address="0x0FBA" access="33333333" name="CCP2CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F68" access="33333333" name="ECCP2AS" mclr="11111111" por="11111111" />
+    <sfr address="0x0F67" access="33333333" name="ECCP2DEL" mclr="11111111" por="11111111" />
+    <combined address="0x0FB8" size="2" name="CCPR3" />
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+    <sfr address="0x0FB7" access="33333333" name="CCP3CON" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6A" access="33333333" name="ECCP3AS" mclr="11111111" por="11111111" />
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+    <sfr address="0x0F74" access="33333333" name="CCPR4L" mclr="33333333" por="00000000" />
+    <sfr address="0x0F73" access="00333333" name="CCP4CON" mclr="00111111" por="00111111" />
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+    <sfr address="0x0F63" access="33333333" name="SSP2CON1" mclr="11111111" por="11111111" />
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+    <sfr address="0x0FCC" access="33333333" name="TMR2" mclr="11111111" por="11111111" />
+    <sfr address="0x0FCB" access="33333333" name="PR2" mclr="22222222" por="22222222" />
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+    <sfr address="0x0FAB" access="33333111" name="RCSTA1" mclr="11111110" por="11111110" />
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+    <sfr address="0x0F6D" access="22222222" name="TXREG2" mclr="11111111" por="11111111" />
+    <sfr address="0x0F6C" access="33330313" name="TXSTA2" mclr="11110121" por="11110121" />
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+    <sfr address="0x0EEC" access="33333333" name="ERXRDPTL" mclr="22222121" por="22222121" />
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+    <sfr address="0x0EC3" access="33333333" name="EHT3" mclr="11111111" por="11111111" />
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+    <sfr address="0x0EB8" access="11111111" name="MIRDL" mclr="11111111" por="11111111" />
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+    <sfr address="0x0EB6" access="22222222" name="MIWDL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EB4" access="00033333" name="MIREGADR" mclr="00011111" por="00011111" />
+    <sfr address="0x0EB2" access="00000033" name="MICMD" mclr="00000011" por="00000011" />
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+    <sfr address="0x0EAB" access="33333333" name="MAMXFLH" mclr="11111221" por="11111221" />
+    <sfr address="0x0EAA" access="33333333" name="MAMXFLL" mclr="11111111" por="11111111" />
+    <sfr address="0x0EA9" access="00333333" name="MACLCON2" mclr="00221222" por="00221222" />
+    <sfr address="0x0EA8" access="00003333" name="MACLCON1" mclr="00002222" por="00002222" />
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+    <sfr address="0x0EA4" access="03333333" name="MABBIPG" mclr="01111111" por="01111111" />
+    <sfr address="0x0EA3" access="03330000" name="MACON4" mclr="01110011" por="01110011" />
+    <sfr address="0x0EA2" access="33333333" name="MACON3" mclr="11111111" por="11111111" />
+    <sfr address="0x0EA0" access="00003333" name="MACON1" mclr="00011111" por="00011111" />
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+    <sfr address="0x0E97" access="00000133" name="EFLOCON" mclr="00000111" por="00000111" />
+    <sfr address="0x0E8A" access="00001111" name="MISTAT" mclr="00001111" por="00001111" />
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+    <sfr address="0x0E83" access="33333333" name="MAADR4" mclr="11111111" por="11111111" />
+    <sfr address="0x0E82" access="33333333" name="MAADR3" mclr="11111111" por="11111111" />
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+    <sfr address="0x0E80" access="33333333" name="MAADR5" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="16" access_bank_split_offset="0x60" name="18F97J60" unused_bank_mask="0x0000" >
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+    <sfr address="0x0E80" access="33333333" name="MAADR5" mclr="11111111" por="11111111" />
+  </device>
+  <device nb_banks="1" name="24FJ128GA006" >
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+  </device>
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+    <sfr address="0x02D6" access="0000333333333333" name="LATD" mclr="0000333333333333" por="0000111111111111" />
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+    <sfr address="0x039E" access="3333333333333333" name="DMA2STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03A0" access="3333333333333333" name="DMA2PAD" mclr="1111111111111111" por="1111111111111111" />
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+    <sfr address="0x03B0" access="3333300000330033" name="DMA4CON" mclr="1111100000110011" por="1111100000110011" />
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+    <sfr address="0x03B4" access="3333333333333333" name="DMA4STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03B6" access="3333333333333333" name="DMA4STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03B8" access="3333333333333333" name="DMA4PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03BA" access="0000003333333333" name="DMA4CNT" mclr="1111111111111111" por="1111111111111111" />
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+    <sfr address="0x03C0" access="3333333333333333" name="DMA5STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C2" access="3333333333333333" name="DMA5STB" mclr="1111111111111111" por="1111111111111111" />
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+    <sfr address="0x03CE" access="3333333333333333" name="DMA6STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D0" access="3333333333333333" name="DMA6PAD" mclr="1111111111111111" por="1111111111111111" />
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+    <sfr address="0x03D4" access="3333300000330033" name="DMA7CON" mclr="1111100000110011" por="1111100000110011" />
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+    <sfr address="0x03DA" access="3333333333333333" name="DMA7STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DC" access="3333333333333333" name="DMA7PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DE" access="0000003333333333" name="DMA7CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03E0" access="1111111111111111" name="DMACS0" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03E2" access="0000111111111111" name="DMACS1" mclr="0000111111111111" por="0000111111111111" />
+    <sfr address="0x03E4" access="1111111111111111" name="DSADR" mclr="1111111111111111" por="1111111111111111" />
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+    <sfr address="0x0602" access="3333333333333333" name="PMPMODE" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0604" access="3333333333333333" name="PMPADDR" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0606" access="3333333333333333" name="PMPDATA1" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0608" access="3333333333333333" name="PMPDATA2" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x060A" access="3333333333333333" name="PMPPE1" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x060C" access="3333333333333333" name="PMPPE2" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0620" access="3333333333333333" name="ALRMVAL" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0622" access="3333333333333333" name="ALRMCFG" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0624" access="3333333333333333" name="RTCVAL" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0626" access="3333333333333333" name="RTCCFG" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0630" access="3033333333333333" name="CMCON" mclr="3033333333333333" por="1011111111111111" />
+    <sfr address="0x0632" access="0000000033333333" name="CVRCON" mclr="0000000033333333" por="0000000011111111" />
+    <sfr address="0x0740" access="3300000033333333" name="RCON" mclr="3300000033333333" por="1100000011111122" />
+    <sfr address="0x0742" access="0333033330303033" name="OSCCON" mclr="0555055510001111" por="0555055510001111" />
+    <sfr address="0x0744" access="3333333333333333" name="CLKDIV" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0746" access="0000000333333333" name="PLLFBD" mclr="0000000333333333" por="0000000111111111" />
+    <sfr address="0x0748" access="0000000000333333" name="OSCTRIM" mclr="0000000000333333" por="0000000000111111" />
+    <sfr address="0x0760" access="9330000003003333" name="NVMCON" mclr="1110000001001111" por="1110000001001111" />
+    <sfr address="0x0766" access="0000000022222222" name="NVMKEY" mclr="0000000011111111" por="0000000011111111" />
+    <sfr address="0x0770" access="3333300333333003" name="PMD1" mclr="1111100111111001" por="1111100111111111" />
+    <sfr address="0x0772" access="3333333333333333" name="PMD2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0774" access="0000033300000030" name="PMD3" mclr="0000011100000010" por="0000011100000010" />
+  </device>
+  <device nb_banks="1" name="24HJ128GP210" >
+    <unused end="0x002D" start="0x0022" />
+    <unused end="0x0041" start="0x0038" />
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+  </device>
+  <device nb_banks="1" name="24HJ128GP306" >
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+    <sfr address="0x03BE" access="9000000003333333" name="DMA5REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03C0" access="3333333333333333" name="DMA5STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C2" access="3333333333333333" name="DMA5STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C4" access="3333333333333333" name="DMA5PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C6" access="0000003333333333" name="DMA5CNT" mclr="1111111111111111" por="1111111111111111" />
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+    <sfr address="0x03CA" access="9000000003333333" name="DMA6REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03CC" access="3333333333333333" name="DMA6STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03CE" access="3333333333333333" name="DMA6STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D0" access="3333333333333333" name="DMA6PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D2" access="0000003333333333" name="DMA6CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D4" access="3333300000330033" name="DMA7CON" mclr="1111100000110011" por="1111100000110011" />
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+    <sfr address="0x03DA" access="3333333333333333" name="DMA7STB" mclr="1111111111111111" por="1111111111111111" />
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+    <sfr address="0x03DE" access="0000003333333333" name="DMA7CNT" mclr="1111111111111111" por="1111111111111111" />
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+  </device>
+  <device nb_banks="1" name="24HJ128GP310" >
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+    <sfr address="0x01A2" access="0030000000013333" name="OC6CON" mclr="0010000000011111" por="0010000000011111" />
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+    <sfr address="0x01A6" access="3333333333333333" name="OC7R" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x01A8" access="0030000000013333" name="OC7CON" mclr="0010000000011111" por="0010000000011111" />
+    <sfr address="0x01AA" access="3333333333333333" name="OC8RS" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x01AC" access="3333333333333333" name="OC8R" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x01AE" access="0030000000013333" name="OC8CON" mclr="0010000000011111" por="0010000000011111" />
+    <sfr address="0x0200" access="0000000011111111" name="I2C1RCV" mclr="0000000011111111" por="0000000011111111" />
+    <sfr address="0x0202" access="0000000022222222" name="I2C1TRN" mclr="0000000022222222" por="0000000022222222" />
+    <sfr address="0x0204" access="0000000333333333" name="I2C1BRG" mclr="0000000111111111" por="0000000111111111" />
+    <sfr address="0x0206" access="3033303333333333" name="I2C1CON" mclr="1012101111111111" por="1012101111111111" />
+    <sfr address="0x0208" access="1100011155155111" name="I2C1STAT" mclr="1100011111111111" por="1100011111111111" />
+    <sfr address="0x020A" access="0000003333333333" name="I2C1ADD" mclr="0000001111111111" por="0000001111111111" />
+    <sfr address="0x020C" access="0000003333333333" name="I2C1MSK" mclr="0000001111111111" por="0000001111111111" />
+    <sfr address="0x0210" access="0000000011111111" name="I2C2RCV" mclr="0000000011111111" por="0000000011111111" />
+    <sfr address="0x0212" access="0000000022222222" name="I2C2TRN" mclr="0000000022222222" por="0000000022222222" />
+    <sfr address="0x0214" access="0000000333333333" name="I2C2BRG" mclr="0000000111111111" por="0000000111111111" />
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+    <sfr address="0x021A" access="0000003333333333" name="I2C2ADD" mclr="0000001111111111" por="0000001111111111" />
+    <sfr address="0x021C" access="0000003333333333" name="I2C2MSK" mclr="0000001111111111" por="0000001111111111" />
+    <sfr address="0x0220" access="3033303333333333" name="U1MODE" mclr="1011101111111111" por="1011101111111111" />
+    <sfr address="0x0222" access="3330331133311151" name="U1STA" mclr="1110111211121111" por="1110111211121111" />
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+    <sfr address="0x0226" access="0000000111111111" name="U1RXREG" mclr="0000000111111111" por="0000000111111111" />
+    <sfr address="0x0228" access="3333333333333333" name="U1BRG" mclr="1111111111111111" por="1111111111111111" />
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+    <sfr address="0x0234" access="0000000222222222" name="U2TXREG" mclr="0000000111111111" por="0000000000000000" />
+    <sfr address="0x0236" access="0000000111111111" name="U2RXREG" mclr="0000000111111111" por="0000000111111111" />
+    <sfr address="0x0238" access="3333333333333333" name="U2BRG" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0240" access="3030033305000011" name="SPI1STAT" mclr="1010011101000011" por="1010011101000011" />
+    <sfr address="0x0242" access="0003333333333333" name="SPI1CON1" mclr="0001111111111111" por="0001111111111111" />
+    <sfr address="0x0244" access="3330000000000033" name="SPI1CON2" mclr="1110000000000011" por="1110000000000011" />
+    <sfr address="0x0248" access="3333333333333333" name="SPI1BUF" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0260" access="3030033305000011" name="SPI2STAT" mclr="1010011101000011" por="1010011101000011" />
+    <sfr address="0x0262" access="0003333333333333" name="SPI2CON1" mclr="0001111111111111" por="0001111111111111" />
+    <sfr address="0x0264" access="3330000000000033" name="SPI2CON2" mclr="1110000000000011" por="1110000000000011" />
+    <sfr address="0x0268" access="3333333333333333" name="SPI2BUF" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x02C0" access="3333033033333333" name="TRISA" mclr="2222022022222222" por="2222022022222222" />
+    <sfr address="0x02C2" access="3333033033333333" name="PORTA" mclr="3333033033333333" por="0000000000000000" />
+    <sfr address="0x02C4" access="3333033033333333" name="LATA" mclr="3333033033333333" por="1111011011111111" />
+    <sfr address="0x06C0" access="3333000000333333" name="ODCA" mclr="3333000000333333" por="1111000000111111" />
+    <sfr address="0x02C6" access="3333333333333333" name="TRISB" mclr="2222222222222222" por="2222222222222222" />
+    <sfr address="0x02C8" access="3333333333333333" name="PORTB" mclr="3333333333333333" por="0000000000000000" />
+    <sfr address="0x02CA" access="3333333333333333" name="LATB" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x02CC" access="3333000000033330" name="TRISC" mclr="2222000000022220" por="2222000000022220" />
+    <sfr address="0x02CE" access="3333000000033330" name="PORTC" mclr="3333000000033330" por="0000000000000000" />
+    <sfr address="0x02D0" access="3333000000033330" name="LATC" mclr="3333000000033330" por="1111000000011110" />
+    <sfr address="0x02D2" access="3333333333333333" name="TRISD" mclr="2222222222222222" por="2222222222222222" />
+    <sfr address="0x02D4" access="3333333333333333" name="PORTD" mclr="3333333333333333" por="0000000000000000" />
+    <sfr address="0x02D6" access="3333333333333333" name="LATD" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x06D2" access="3333333333333333" name="ODCD" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x02D8" access="0000000033333333" name="TRISE" mclr="0000000022222222" por="0000000022222222" />
+    <sfr address="0x02DA" access="0000000033333333" name="PORTE" mclr="0000000033333333" por="0000000000000000" />
+    <sfr address="0x02DC" access="0000000033333333" name="LATE" mclr="0000000033333333" por="0000000011111111" />
+    <sfr address="0x02DE" access="0033000333333333" name="TRISF" mclr="0022000222222222" por="0022000222222222" />
+    <sfr address="0x02E0" access="0033000333333333" name="PORTF" mclr="0033000333333333" por="0000000000000000" />
+    <sfr address="0x02E2" access="0033000333333333" name="LATF" mclr="0033000333333333" por="0011000111111111" />
+    <sfr address="0x06DE" access="0033000333333333" name="ODCF" mclr="0033000333333333" por="0011000111111111" />
+    <sfr address="0x02E4" access="3333003333003333" name="TRISG" mclr="2222002222002222" por="2222002222002222" />
+    <sfr address="0x02E6" access="3333003333003333" name="PORTG" mclr="3333003333003333" por="0000000000000000" />
+    <sfr address="0x02E8" access="3333003333003333" name="LATG" mclr="3333003333003333" por="1111001111001111" />
+    <sfr address="0x0300" access="0000111111111111" name="AD1BUF0" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0302" access="0000111111111111" name="AD1BUF1" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0304" access="0000111111111111" name="AD1BUF2" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0306" access="0000111111111111" name="AD1BUF3" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0308" access="0000111111111111" name="AD1BUF4" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x030A" access="0000111111111111" name="AD1BUF5" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x030C" access="0000111111111111" name="AD1BUF6" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x030E" access="0000111111111111" name="AD1BUF7" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0310" access="0000111111111111" name="AD1BUF8" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0312" access="0000111111111111" name="AD1BUF9" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0314" access="0000111111111111" name="AD1BUFA" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0316" access="0000111111111111" name="AD1BUFB" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0318" access="0000111111111111" name="AD1BUFC" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x031A" access="0000111111111111" name="AD1BUFD" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x031C" access="0000111111111111" name="AD1BUFE" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x031E" access="0000111111111111" name="AD1BUFF" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0320" access="3030003333303335" name="AD1CON1" mclr="1010001111100111" por="1010001111100111" />
+    <sfr address="0x0322" access="3333033310333333" name="AD1CON2" mclr="1111011110111111" por="1111011110111111" />
+    <sfr address="0x0324" access="0003333330333333" name="AD1CON3" mclr="0001111110111111" por="0001111110111111" />
+    <sfr address="0x0332" access="0000000000000333" name="AD1CON4" mclr="0000000000000111" por="0000000000000111" />
+    <sfr address="0x0326" access="0000033300000333" name="AD1CHS123" mclr="0000011100000111" por="0000011100000111" />
+    <sfr address="0x0328" access="3000333330003333" name="AD1CHS0" mclr="1000111110001111" por="1000111110001111" />
+    <sfr address="0x032C" access="3333333333333333" name="AD1PCFGL" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0330" access="3333333333333333" name="AD1CSSL" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x032A" access="3333333333333333" name="AD1PCFGH" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x032E" access="3333333333333333" name="AD1CSSH" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0380" access="3333300000330033" name="DMA0CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x0382" access="9000000003333333" name="DMA0REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x0384" access="3333333333333333" name="DMA0STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0386" access="3333333333333333" name="DMA0STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0388" access="3333333333333333" name="DMA0PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x038A" access="0000003333333333" name="DMA0CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x038C" access="3333300000330033" name="DMA1CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x038E" access="9000000003333333" name="DMA1REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x0390" access="3333333333333333" name="DMA1STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0392" access="3333333333333333" name="DMA1STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0394" access="3333333333333333" name="DMA1PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0396" access="0000003333333333" name="DMA1CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0398" access="3333300000330033" name="DMA2CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x039A" access="9000000003333333" name="DMA2REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x039C" access="3333333333333333" name="DMA2STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x039E" access="3333333333333333" name="DMA2STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03A0" access="3333333333333333" name="DMA2PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03A2" access="0000003333333333" name="DMA2CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03A4" access="3333300000330033" name="DMA3CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03A6" access="9000000003333333" name="DMA3REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03A8" access="3333333333333333" name="DMA3STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03AA" access="3333333333333333" name="DMA3STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03AC" access="3333333333333333" name="DMA3PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03AE" access="0000003333333333" name="DMA3CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03B0" access="3333300000330033" name="DMA4CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03B2" access="9000000003333333" name="DMA4REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03B4" access="3333333333333333" name="DMA4STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03B6" access="3333333333333333" name="DMA4STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03B8" access="3333333333333333" name="DMA4PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03BA" access="0000003333333333" name="DMA4CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03BC" access="3333300000330033" name="DMA5CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03BE" access="9000000003333333" name="DMA5REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03C0" access="3333333333333333" name="DMA5STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C2" access="3333333333333333" name="DMA5STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C4" access="3333333333333333" name="DMA5PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C6" access="0000003333333333" name="DMA5CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C8" access="3333300000330033" name="DMA6CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03CA" access="9000000003333333" name="DMA6REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03CC" access="3333333333333333" name="DMA6STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03CE" access="3333333333333333" name="DMA6STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D0" access="3333333333333333" name="DMA6PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D2" access="0000003333333333" name="DMA6CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D4" access="3333300000330033" name="DMA7CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03D6" access="9000000003333333" name="DMA7REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03D8" access="3333333333333333" name="DMA7STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DA" access="3333333333333333" name="DMA7STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DC" access="3333333333333333" name="DMA7PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DE" access="0000003333333333" name="DMA7CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03E0" access="1111111111111111" name="DMACS0" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03E2" access="0000111111111111" name="DMACS1" mclr="0000111111111111" por="0000111111111111" />
+    <sfr address="0x03E4" access="1111111111111111" name="DSADR" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0600" access="3033333333333333" name="PMPCON" mclr="1011111111111111" por="1011111111111111" />
+    <sfr address="0x0602" access="3333333333333333" name="PMPMODE" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0604" access="3333333333333333" name="PMPADDR" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0606" access="3333333333333333" name="PMPDATA1" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0608" access="3333333333333333" name="PMPDATA2" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x060A" access="3333333333333333" name="PMPPE1" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x060C" access="3333333333333333" name="PMPPE2" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0620" access="3333333333333333" name="ALRMVAL" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0622" access="3333333333333333" name="ALRMCFG" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0624" access="3333333333333333" name="RTCVAL" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0626" access="3333333333333333" name="RTCCFG" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0630" access="3033333333333333" name="CMCON" mclr="3033333333333333" por="1011111111111111" />
+    <sfr address="0x0632" access="0000000033333333" name="CVRCON" mclr="0000000033333333" por="0000000011111111" />
+    <sfr address="0x0740" access="3300000033333333" name="RCON" mclr="3300000033333333" por="1100000011111122" />
+    <sfr address="0x0742" access="0333033330303033" name="OSCCON" mclr="0555055510001111" por="0555055510001111" />
+    <sfr address="0x0744" access="3333333333333333" name="CLKDIV" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0746" access="0000000333333333" name="PLLFBD" mclr="0000000333333333" por="0000000111111111" />
+    <sfr address="0x0748" access="0000000000333333" name="OSCTRIM" mclr="0000000000333333" por="0000000000111111" />
+    <sfr address="0x0760" access="9330000003003333" name="NVMCON" mclr="1110000001001111" por="1110000001001111" />
+    <sfr address="0x0766" access="0000000022222222" name="NVMKEY" mclr="0000000011111111" por="0000000011111111" />
+    <sfr address="0x0770" access="3333300333333003" name="PMD1" mclr="1111100111111001" por="1111100111111111" />
+    <sfr address="0x0772" access="3333333333333333" name="PMD2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0774" access="0000033300000030" name="PMD3" mclr="0000011100000010" por="0000011100000010" />
+  </device>
+  <device nb_banks="1" name="24HJ128GP506" >
+    <unused end="0x002D" start="0x0022" />
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+    <sfr address="0x0312" access="0000111111111111" name="AD1BUF9" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0314" access="0000111111111111" name="AD1BUFA" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0316" access="0000111111111111" name="AD1BUFB" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0318" access="0000111111111111" name="AD1BUFC" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x031A" access="0000111111111111" name="AD1BUFD" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x031C" access="0000111111111111" name="AD1BUFE" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x031E" access="0000111111111111" name="AD1BUFF" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0320" access="3030003333303335" name="AD1CON1" mclr="1010001111100111" por="1010001111100111" />
+    <sfr address="0x0322" access="3333033310333333" name="AD1CON2" mclr="1111011110111111" por="1111011110111111" />
+    <sfr address="0x0324" access="0003333330333333" name="AD1CON3" mclr="0001111110111111" por="0001111110111111" />
+    <sfr address="0x0332" access="0000000000000333" name="AD1CON4" mclr="0000000000000111" por="0000000000000111" />
+    <sfr address="0x0326" access="0000033300000333" name="AD1CHS123" mclr="0000011100000111" por="0000011100000111" />
+    <sfr address="0x0328" access="3000333330003333" name="AD1CHS0" mclr="1000111110001111" por="1000111110001111" />
+    <sfr address="0x032C" access="3333333333333333" name="AD1PCFGL" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0330" access="3333333333333333" name="AD1CSSL" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x032A" access="0000000000000033" name="AD1PCFGH" mclr="0000000000000011" por="0000000000000011" />
+    <sfr address="0x032E" access="0000000000000033" name="AD1CSSH" mclr="0000000000000011" por="0000000000000011" />
+    <sfr address="0x0380" access="3333300000330033" name="DMA0CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x0382" access="9000000003333333" name="DMA0REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x0384" access="3333333333333333" name="DMA0STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0386" access="3333333333333333" name="DMA0STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0388" access="3333333333333333" name="DMA0PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x038A" access="0000003333333333" name="DMA0CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x038C" access="3333300000330033" name="DMA1CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x038E" access="9000000003333333" name="DMA1REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x0390" access="3333333333333333" name="DMA1STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0392" access="3333333333333333" name="DMA1STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0394" access="3333333333333333" name="DMA1PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0396" access="0000003333333333" name="DMA1CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0398" access="3333300000330033" name="DMA2CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x039A" access="9000000003333333" name="DMA2REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x039C" access="3333333333333333" name="DMA2STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x039E" access="3333333333333333" name="DMA2STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03A0" access="3333333333333333" name="DMA2PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03A2" access="0000003333333333" name="DMA2CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03A4" access="3333300000330033" name="DMA3CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03A6" access="9000000003333333" name="DMA3REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03A8" access="3333333333333333" name="DMA3STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03AA" access="3333333333333333" name="DMA3STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03AC" access="3333333333333333" name="DMA3PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03AE" access="0000003333333333" name="DMA3CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03B0" access="3333300000330033" name="DMA4CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03B2" access="9000000003333333" name="DMA4REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03B4" access="3333333333333333" name="DMA4STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03B6" access="3333333333333333" name="DMA4STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03B8" access="3333333333333333" name="DMA4PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03BA" access="0000003333333333" name="DMA4CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03BC" access="3333300000330033" name="DMA5CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03BE" access="9000000003333333" name="DMA5REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03C0" access="3333333333333333" name="DMA5STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C2" access="3333333333333333" name="DMA5STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C4" access="3333333333333333" name="DMA5PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C6" access="0000003333333333" name="DMA5CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C8" access="3333300000330033" name="DMA6CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03CA" access="9000000003333333" name="DMA6REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03CC" access="3333333333333333" name="DMA6STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03CE" access="3333333333333333" name="DMA6STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D0" access="3333333333333333" name="DMA6PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D2" access="0000003333333333" name="DMA6CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D4" access="3333300000330033" name="DMA7CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03D6" access="9000000003333333" name="DMA7REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03D8" access="3333333333333333" name="DMA7STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DA" access="3333333333333333" name="DMA7STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DC" access="3333333333333333" name="DMA7PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DE" access="0000003333333333" name="DMA7CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03E0" access="1111111111111111" name="DMACS0" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03E2" access="0000111111111111" name="DMACS1" mclr="0000111111111111" por="0000111111111111" />
+    <sfr address="0x03E4" access="1111111111111111" name="DSADR" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0600" access="3033333333333333" name="PMPCON" mclr="1011111111111111" por="1011111111111111" />
+    <sfr address="0x0602" access="3333333333333333" name="PMPMODE" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0604" access="3333333333333333" name="PMPADDR" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0606" access="3333333333333333" name="PMPDATA1" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0608" access="3333333333333333" name="PMPDATA2" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x060A" access="3333333333333333" name="PMPPE1" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x060C" access="3333333333333333" name="PMPPE2" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0620" access="3333333333333333" name="ALRMVAL" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0622" access="3333333333333333" name="ALRMCFG" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0624" access="3333333333333333" name="RTCVAL" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0626" access="3333333333333333" name="RTCCFG" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0630" access="3033333333333333" name="CMCON" mclr="3033333333333333" por="1011111111111111" />
+    <sfr address="0x0632" access="0000000033333333" name="CVRCON" mclr="0000000033333333" por="0000000011111111" />
+    <sfr address="0x0740" access="3300000033333333" name="RCON" mclr="3300000033333333" por="1100000011111122" />
+    <sfr address="0x0742" access="0333033330303033" name="OSCCON" mclr="0555055510001111" por="0555055510001111" />
+    <sfr address="0x0744" access="3333333333333333" name="CLKDIV" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0746" access="0000000333333333" name="PLLFBD" mclr="0000000333333333" por="0000000111111111" />
+    <sfr address="0x0748" access="0000000000333333" name="OSCTRIM" mclr="0000000000333333" por="0000000000111111" />
+    <sfr address="0x0760" access="9330000003003333" name="NVMCON" mclr="1110000001001111" por="1110000001001111" />
+    <sfr address="0x0766" access="0000000022222222" name="NVMKEY" mclr="0000000011111111" por="0000000011111111" />
+    <sfr address="0x0770" access="3333300333333033" name="PMD1" mclr="1111100111111011" por="1111100111111111" />
+    <sfr address="0x0772" access="3333333333333333" name="PMD2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0774" access="0000033300000000" name="PMD3" mclr="0000011100000000" por="0000011100000000" />
+  </device>
+  <device nb_banks="1" name="24HJ128GP510" >
+    <unused end="0x002D" start="0x0022" />
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+    <sfr address="0x0000" access="3333333333333333" name="WREG0" mclr="1111111111111111" por="1111111111111111" />
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+    <sfr address="0x0020" access="3333333333333331" name="SPLIM" mclr="1111111111111111" por="1111111111111111" />
+    <combined address="0x002E" size="3" name="PC" />
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+    <sfr address="0x03E0" access="1111111111111111" name="DMACS0" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03E2" access="0000111111111111" name="DMACS1" mclr="0000111111111111" por="0000111111111111" />
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+    <sfr address="0x0602" access="3333333333333333" name="PMPMODE" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0604" access="3333333333333333" name="PMPADDR" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0606" access="3333333333333333" name="PMPDATA1" mclr="3333333333333333" por="1111111111111111" />
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+    <sfr address="0x0624" access="3333333333333333" name="RTCVAL" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0626" access="3333333333333333" name="RTCCFG" mclr="3333333333333333" por="1111111111111111" />
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+    <sfr address="0x047E" access="3333333333333333" name="C1RXF15EID" mclr="0000000000000000" por="0000000000000000" />
+  </device>
+  <device nb_banks="1" name="24HJ12GP201" >
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+    <sfr address="0x0226" access="0000000111111111" name="U1RXREG" mclr="0000000111111111" por="0000000111111111" />
+    <sfr address="0x0228" access="3333333333333333" name="U1BRG" mclr="1111111111111111" por="1111111111111111" />
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+    <sfr address="0x0234" access="0000000222222222" name="U2TXREG" mclr="0000000111111111" por="0000000000000000" />
+    <sfr address="0x0236" access="0000000111111111" name="U2RXREG" mclr="0000000111111111" por="0000000111111111" />
+    <sfr address="0x0238" access="3333333333333333" name="U2BRG" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0240" access="3030033305000011" name="SPI1STAT" mclr="1010011101000011" por="1010011101000011" />
+    <sfr address="0x0242" access="0003333333333333" name="SPI1CON1" mclr="0001111111111111" por="0001111111111111" />
+    <sfr address="0x0244" access="3330000000000033" name="SPI1CON2" mclr="1110000000000011" por="1110000000000011" />
+    <sfr address="0x0248" access="3333333333333333" name="SPI1BUF" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0260" access="3030033305000011" name="SPI2STAT" mclr="1010011101000011" por="1010011101000011" />
+    <sfr address="0x0262" access="0003333333333333" name="SPI2CON1" mclr="0001111111111111" por="0001111111111111" />
+    <sfr address="0x0264" access="3330000000000033" name="SPI2CON2" mclr="1110000000000011" por="1110000000000011" />
+    <sfr address="0x0268" access="3333333333333333" name="SPI2BUF" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x02C6" access="3333333333333333" name="TRISB" mclr="2222222222222222" por="2222222222222222" />
+    <sfr address="0x02C8" access="3333333333333333" name="PORTB" mclr="3333333333333333" por="0000000000000000" />
+    <sfr address="0x02CA" access="3333333333333333" name="LATB" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x02CC" access="3333000000000330" name="TRISC" mclr="2222000000000220" por="2222000000000220" />
+    <sfr address="0x02CE" access="3333000000000330" name="PORTC" mclr="3333000000000330" por="0000000000000000" />
+    <sfr address="0x02D0" access="3333000000000330" name="LATC" mclr="3333000000000330" por="1111000000000110" />
+    <sfr address="0x02D2" access="0000333333333333" name="TRISD" mclr="0000222222222222" por="0000222222222222" />
+    <sfr address="0x02D4" access="0000333333333333" name="PORTD" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x02D6" access="0000333333333333" name="LATD" mclr="0000333333333333" por="0000111111111111" />
+    <sfr address="0x06D2" access="0000333333333333" name="ODCD" mclr="0000333333333333" por="0000111111111111" />
+    <sfr address="0x02DE" access="0000000003333333" name="TRISF" mclr="0000000002222222" por="0000000002222222" />
+    <sfr address="0x02E0" access="0000000003333333" name="PORTF" mclr="0000000003333333" por="0000000000000000" />
+    <sfr address="0x02E2" access="0000000003333333" name="LATF" mclr="0000000003333333" por="0000000001111111" />
+    <sfr address="0x06DE" access="0000000003333333" name="ODCF" mclr="0000000003333333" por="0000000001111111" />
+    <sfr address="0x02E4" access="3333003333003333" name="TRISG" mclr="2222002222002222" por="2222002222002222" />
+    <sfr address="0x02E6" access="3333003333003333" name="PORTG" mclr="3333003333003333" por="0000000000000000" />
+    <sfr address="0x02E8" access="3333003333003333" name="LATG" mclr="3333003333003333" por="1111001111001111" />
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+    <sfr address="0x0302" access="0000111111111111" name="AD1BUF1" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0304" access="0000111111111111" name="AD1BUF2" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0306" access="0000111111111111" name="AD1BUF3" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0308" access="0000111111111111" name="AD1BUF4" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x030A" access="0000111111111111" name="AD1BUF5" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x030C" access="0000111111111111" name="AD1BUF6" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x030E" access="0000111111111111" name="AD1BUF7" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0310" access="0000111111111111" name="AD1BUF8" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0312" access="0000111111111111" name="AD1BUF9" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0314" access="0000111111111111" name="AD1BUFA" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0316" access="0000111111111111" name="AD1BUFB" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0318" access="0000111111111111" name="AD1BUFC" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x031A" access="0000111111111111" name="AD1BUFD" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x031C" access="0000111111111111" name="AD1BUFE" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x031E" access="0000111111111111" name="AD1BUFF" mclr="0000333333333333" por="0000000000000000" />
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+    <sfr address="0x0326" access="0000033300000333" name="AD1CHS123" mclr="0000011100000111" por="0000011100000111" />
+    <sfr address="0x0328" access="3000333330003333" name="AD1CHS0" mclr="1000111110001111" por="1000111110001111" />
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+    <sfr address="0x0330" access="3333333333333333" name="AD1CSSL" mclr="1111111111111111" por="1111111111111111" />
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+    <sfr address="0x032E" access="0000000000000033" name="AD1CSSH" mclr="0000000000000011" por="0000000000000011" />
+    <sfr address="0x0380" access="3333300000330033" name="DMA0CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x0382" access="9000000003333333" name="DMA0REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x0384" access="3333333333333333" name="DMA0STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0386" access="3333333333333333" name="DMA0STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0388" access="3333333333333333" name="DMA0PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x038A" access="0000003333333333" name="DMA0CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x038C" access="3333300000330033" name="DMA1CON" mclr="1111100000110011" por="1111100000110011" />
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+    <sfr address="0x0390" access="3333333333333333" name="DMA1STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0392" access="3333333333333333" name="DMA1STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0394" access="3333333333333333" name="DMA1PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0396" access="0000003333333333" name="DMA1CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0398" access="3333300000330033" name="DMA2CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x039A" access="9000000003333333" name="DMA2REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x039C" access="3333333333333333" name="DMA2STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x039E" access="3333333333333333" name="DMA2STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03A0" access="3333333333333333" name="DMA2PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03A2" access="0000003333333333" name="DMA2CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03A4" access="3333300000330033" name="DMA3CON" mclr="1111100000110011" por="1111100000110011" />
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+    <sfr address="0x03A8" access="3333333333333333" name="DMA3STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03AA" access="3333333333333333" name="DMA3STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03AC" access="3333333333333333" name="DMA3PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03AE" access="0000003333333333" name="DMA3CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03B0" access="3333300000330033" name="DMA4CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03B2" access="9000000003333333" name="DMA4REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03B4" access="3333333333333333" name="DMA4STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03B6" access="3333333333333333" name="DMA4STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03B8" access="3333333333333333" name="DMA4PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03BA" access="0000003333333333" name="DMA4CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03BC" access="3333300000330033" name="DMA5CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03BE" access="9000000003333333" name="DMA5REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03C0" access="3333333333333333" name="DMA5STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C2" access="3333333333333333" name="DMA5STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C4" access="3333333333333333" name="DMA5PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C6" access="0000003333333333" name="DMA5CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C8" access="3333300000330033" name="DMA6CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03CA" access="9000000003333333" name="DMA6REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03CC" access="3333333333333333" name="DMA6STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03CE" access="3333333333333333" name="DMA6STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D0" access="3333333333333333" name="DMA6PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D2" access="0000003333333333" name="DMA6CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D4" access="3333300000330033" name="DMA7CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03D6" access="9000000003333333" name="DMA7REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03D8" access="3333333333333333" name="DMA7STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DA" access="3333333333333333" name="DMA7STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DC" access="3333333333333333" name="DMA7PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DE" access="0000003333333333" name="DMA7CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03E0" access="1111111111111111" name="DMACS0" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03E2" access="0000111111111111" name="DMACS1" mclr="0000111111111111" por="0000111111111111" />
+    <sfr address="0x03E4" access="1111111111111111" name="DSADR" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0600" access="3033333333333333" name="PMPCON" mclr="1011111111111111" por="1011111111111111" />
+    <sfr address="0x0602" access="3333333333333333" name="PMPMODE" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0604" access="3333333333333333" name="PMPADDR" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0606" access="3333333333333333" name="PMPDATA1" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0608" access="3333333333333333" name="PMPDATA2" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x060A" access="3333333333333333" name="PMPPE1" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x060C" access="3333333333333333" name="PMPPE2" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0620" access="3333333333333333" name="ALRMVAL" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0622" access="3333333333333333" name="ALRMCFG" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0624" access="3333333333333333" name="RTCVAL" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0626" access="3333333333333333" name="RTCCFG" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0630" access="3033333333333333" name="CMCON" mclr="3033333333333333" por="1011111111111111" />
+    <sfr address="0x0632" access="0000000033333333" name="CVRCON" mclr="0000000033333333" por="0000000011111111" />
+    <sfr address="0x0740" access="3300000033333333" name="RCON" mclr="3300000033333333" por="1100000011111122" />
+    <sfr address="0x0742" access="0333033330303033" name="OSCCON" mclr="0555055510001111" por="0555055510001111" />
+    <sfr address="0x0744" access="3333333333333333" name="CLKDIV" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0746" access="0000000333333333" name="PLLFBD" mclr="0000000333333333" por="0000000111111111" />
+    <sfr address="0x0748" access="0000000000333333" name="OSCTRIM" mclr="0000000000333333" por="0000000000111111" />
+    <sfr address="0x0760" access="9330000003003333" name="NVMCON" mclr="1110000001001111" por="1110000001001111" />
+    <sfr address="0x0766" access="0000000022222222" name="NVMKEY" mclr="0000000011111111" por="0000000011111111" />
+    <sfr address="0x0770" access="3333300333333003" name="PMD1" mclr="1111100111111001" por="1111100111111111" />
+    <sfr address="0x0772" access="3333333333333333" name="PMD2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0774" access="0000033300000030" name="PMD3" mclr="0000011100000010" por="0000011100000010" />
+  </device>
+  <device nb_banks="1" name="24HJ256GP210" >
+    <unused end="0x002D" start="0x0022" />
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+    <sfr address="0x038C" access="3333300000330033" name="DMA1CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x038E" access="9000000003333333" name="DMA1REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x0390" access="3333333333333333" name="DMA1STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0392" access="3333333333333333" name="DMA1STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0394" access="3333333333333333" name="DMA1PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0396" access="0000003333333333" name="DMA1CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0398" access="3333300000330033" name="DMA2CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x039A" access="9000000003333333" name="DMA2REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x039C" access="3333333333333333" name="DMA2STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x039E" access="3333333333333333" name="DMA2STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03A0" access="3333333333333333" name="DMA2PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03A2" access="0000003333333333" name="DMA2CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03A4" access="3333300000330033" name="DMA3CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03A6" access="9000000003333333" name="DMA3REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03A8" access="3333333333333333" name="DMA3STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03AA" access="3333333333333333" name="DMA3STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03AC" access="3333333333333333" name="DMA3PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03AE" access="0000003333333333" name="DMA3CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03B0" access="3333300000330033" name="DMA4CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03B2" access="9000000003333333" name="DMA4REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03B4" access="3333333333333333" name="DMA4STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03B6" access="3333333333333333" name="DMA4STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03B8" access="3333333333333333" name="DMA4PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03BA" access="0000003333333333" name="DMA4CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03BC" access="3333300000330033" name="DMA5CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03BE" access="9000000003333333" name="DMA5REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03C0" access="3333333333333333" name="DMA5STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C2" access="3333333333333333" name="DMA5STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C4" access="3333333333333333" name="DMA5PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C6" access="0000003333333333" name="DMA5CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C8" access="3333300000330033" name="DMA6CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03CA" access="9000000003333333" name="DMA6REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03CC" access="3333333333333333" name="DMA6STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03CE" access="3333333333333333" name="DMA6STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D0" access="3333333333333333" name="DMA6PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D2" access="0000003333333333" name="DMA6CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D4" access="3333300000330033" name="DMA7CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03D6" access="9000000003333333" name="DMA7REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03D8" access="3333333333333333" name="DMA7STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DA" access="3333333333333333" name="DMA7STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DC" access="3333333333333333" name="DMA7PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DE" access="0000003333333333" name="DMA7CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03E0" access="1111111111111111" name="DMACS0" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03E2" access="0000111111111111" name="DMACS1" mclr="0000111111111111" por="0000111111111111" />
+    <sfr address="0x03E4" access="1111111111111111" name="DSADR" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0600" access="3033333333333333" name="PMPCON" mclr="1011111111111111" por="1011111111111111" />
+    <sfr address="0x0602" access="3333333333333333" name="PMPMODE" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0604" access="3333333333333333" name="PMPADDR" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0606" access="3333333333333333" name="PMPDATA1" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0608" access="3333333333333333" name="PMPDATA2" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x060A" access="3333333333333333" name="PMPPE1" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x060C" access="3333333333333333" name="PMPPE2" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0620" access="3333333333333333" name="ALRMVAL" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0622" access="3333333333333333" name="ALRMCFG" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0624" access="3333333333333333" name="RTCVAL" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0626" access="3333333333333333" name="RTCCFG" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0630" access="3033333333333333" name="CMCON" mclr="3033333333333333" por="1011111111111111" />
+    <sfr address="0x0632" access="0000000033333333" name="CVRCON" mclr="0000000033333333" por="0000000011111111" />
+    <sfr address="0x0740" access="3300000033333333" name="RCON" mclr="3300000033333333" por="1100000011111122" />
+    <sfr address="0x0742" access="0333033330303033" name="OSCCON" mclr="0555055510001111" por="0555055510001111" />
+    <sfr address="0x0744" access="3333333333333333" name="CLKDIV" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0746" access="0000000333333333" name="PLLFBD" mclr="0000000333333333" por="0000000111111111" />
+    <sfr address="0x0748" access="0000000000333333" name="OSCTRIM" mclr="0000000000333333" por="0000000000111111" />
+    <sfr address="0x0760" access="9330000003003333" name="NVMCON" mclr="1110000001001111" por="1110000001001111" />
+    <sfr address="0x0766" access="0000000022222222" name="NVMKEY" mclr="0000000011111111" por="0000000011111111" />
+    <sfr address="0x0770" access="3333300333333003" name="PMD1" mclr="1111100111111001" por="1111100111111111" />
+    <sfr address="0x0772" access="3333333333333333" name="PMD2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0774" access="0000033300000030" name="PMD3" mclr="0000011100000010" por="0000011100000010" />
+  </device>
+  <device nb_banks="1" name="24HJ256GP610" >
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+    <sfr address="0x03D6" access="9000000003333333" name="DMA7REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03D8" access="3333333333333333" name="DMA7STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DA" access="3333333333333333" name="DMA7STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DC" access="3333333333333333" name="DMA7PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DE" access="0000003333333333" name="DMA7CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03E0" access="1111111111111111" name="DMACS0" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03E2" access="0000111111111111" name="DMACS1" mclr="0000111111111111" por="0000111111111111" />
+    <sfr address="0x03E4" access="1111111111111111" name="DSADR" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0600" access="3033333333333333" name="PMPCON" mclr="1011111111111111" por="1011111111111111" />
+    <sfr address="0x0602" access="3333333333333333" name="PMPMODE" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0604" access="3333333333333333" name="PMPADDR" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0606" access="3333333333333333" name="PMPDATA1" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0608" access="3333333333333333" name="PMPDATA2" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x060A" access="3333333333333333" name="PMPPE1" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x060C" access="3333333333333333" name="PMPPE2" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0620" access="3333333333333333" name="ALRMVAL" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0622" access="3333333333333333" name="ALRMCFG" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0624" access="3333333333333333" name="RTCVAL" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0626" access="3333333333333333" name="RTCCFG" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0630" access="3033333333333333" name="CMCON" mclr="3033333333333333" por="1011111111111111" />
+    <sfr address="0x0632" access="0000000033333333" name="CVRCON" mclr="0000000033333333" por="0000000011111111" />
+    <sfr address="0x0740" access="3300000033333333" name="RCON" mclr="3300000033333333" por="1100000011111122" />
+    <sfr address="0x0742" access="0333033330303033" name="OSCCON" mclr="0555055510001111" por="0555055510001111" />
+    <sfr address="0x0744" access="3333333333333333" name="CLKDIV" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0746" access="0000000333333333" name="PLLFBD" mclr="0000000333333333" por="0000000111111111" />
+    <sfr address="0x0748" access="0000000000333333" name="OSCTRIM" mclr="0000000000333333" por="0000000000111111" />
+    <sfr address="0x0760" access="9330000003003333" name="NVMCON" mclr="1110000001001111" por="1110000001001111" />
+    <sfr address="0x0766" access="0000000022222222" name="NVMKEY" mclr="0000000011111111" por="0000000011111111" />
+    <sfr address="0x0770" access="3333300333333333" name="PMD1" mclr="1111100111111111" por="1111100111111111" />
+    <sfr address="0x0772" access="3333333333333333" name="PMD2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0774" access="0000033300000033" name="PMD3" mclr="0000011100000011" por="0000011100000011" />
+    <sfr address="0x0400" access="0033333311103003" name="C1CTRL1" mclr="1111121121111111" por="1111121121111111" />
+    <sfr address="0x0402" access="0000000000011111" name="C1CTRL2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0404" access="0001111101111111" name="C1VEC" mclr="1111111112111111" por="1111111112111111" />
+    <sfr address="0x0406" access="3330000000033333" name="C1FCTRL" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0408" access="0011111100111111" name="C1FIFO" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x040A" access="0011111155505555" name="C1INTF" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x040C" access="0000000033333333" name="C1INTE" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0410" access="0000000033333333" name="C1CFG1" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0412" access="0300033333333333" name="C1CFG2" mclr="1011100000000000" por="1011100000000000" />
+    <sfr address="0x0414" access="3333333333333333" name="C1FEN1" mclr="1111111111222222" por="1111111111222222" />
+    <sfr address="0x0418" access="3333333333333333" name="C1FMSKSEL1" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x041A" access="3333333333333333" name="C1FMSKSEL2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0420" access="5555555555555555" name="C1RXFUL1" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0422" access="5555555555555555" name="C1RXFUL2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0424" access="3333333333333333" name="C1BUFPNT3" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0426" access="3333333333333333" name="C1BUFPNT4" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0428" access="5555555555555555" name="C1RXOVF1" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x042A" access="5555555555555555" name="C1RXOVF2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0430" access="3111333331113333" name="C1TR01CON" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0432" access="3111333331113333" name="C1TR23CON" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0434" access="3111333331113333" name="C1TR45CON" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0436" access="3111333331113333" name="C1TR67CON" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0438" access="3333333333303033" name="C1RXM2SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x043A" access="3333333333333333" name="C1RXM2EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0440" access="3333333333303033" name="C1RXF0SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0442" access="3333333333333333" name="C1RXF0EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0444" access="3333333333303033" name="C1RXF1SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0446" access="3333333333333333" name="C1RXF1EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0448" access="3333333333303033" name="C1RXF2SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x044A" access="3333333333333333" name="C1RXF2EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x044C" access="3333333333303033" name="C1RXF3SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x044E" access="3333333333333333" name="C1RXF3EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0450" access="3333333333303033" name="C1RXF4SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0452" access="3333333333333333" name="C1RXF4EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0454" access="3333333333303033" name="C1RXF5SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0456" access="3333333333333333" name="C1RXF5EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0458" access="3333333333303033" name="C1RXF6SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x045A" access="3333333333333333" name="C1RXF6EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x045C" access="3333333333303033" name="C1RXF7SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x045E" access="3333333333333333" name="C1RXF7EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0460" access="3333333333303033" name="C1RXF8SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0462" access="3333333333333333" name="C1RXF8EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0464" access="3333333333303033" name="C1RXF9SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0466" access="3333333333333333" name="C1RXF9EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0468" access="3333333333303033" name="C1RXF10SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x046A" access="3333333333333333" name="C1RXF10EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x046C" access="3333333333303033" name="C1RXF11SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x046E" access="3333333333333333" name="C1RXF11EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0470" access="3333333333303033" name="C1RXF12SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0472" access="3333333333333333" name="C1RXF12EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0474" access="3333333333303033" name="C1RXF13SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0476" access="3333333333333333" name="C1RXF13EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0478" access="3333333333303033" name="C1RXF14SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x047A" access="3333333333333333" name="C1RXF14EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x047C" access="3333333333303033" name="C1RXF15SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x047E" access="3333333333333333" name="C1RXF15EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0500" access="0033333311103003" name="C2CTRL1" mclr="1111121121111111" por="1111121121111111" />
+    <sfr address="0x0502" access="0000000000011111" name="C2CTRL2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0504" access="0001111101111111" name="C2VEC" mclr="1111111112111111" por="1111111112111111" />
+    <sfr address="0x0506" access="3330000000033333" name="C2FCTRL" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0508" access="0011111100111111" name="C2FIFO" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x050A" access="0011111155505555" name="C2INTF" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x050C" access="0000000033333333" name="C2INTE" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0510" access="0000000033333333" name="C2CFG1" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0512" access="0300033333333333" name="C2CFG2" mclr="1011100000000000" por="1011100000000000" />
+    <sfr address="0x0514" access="3333333333333333" name="C2FEN1" mclr="1111111111222222" por="1111111111222222" />
+    <sfr address="0x0518" access="3333333333333333" name="C2FMSKSEL1" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x051A" access="3333333333333333" name="C2FMSKSEL2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0520" access="5555555555555555" name="C2RXFUL1" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0522" access="5555555555555555" name="C2RXFUL2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0524" access="3333333333333333" name="C2BUFPNT3" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0526" access="3333333333333333" name="C2BUFPNT4" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0528" access="5555555555555555" name="C2RXOVF1" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x052A" access="5555555555555555" name="C2RXOVF2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0530" access="3111333331113333" name="C2TR01CON" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0532" access="3111333331113333" name="C2TR23CON" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0534" access="3111333331113333" name="C2TR45CON" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0536" access="3111333331113333" name="C2TR67CON" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0538" access="3333333333303033" name="C2RXM2SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x053A" access="3333333333333333" name="C2RXM2EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0540" access="3333333333303033" name="C2RXF0SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0542" access="3333333333333333" name="C2RXF0EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0544" access="3333333333303033" name="C2RXF1SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0546" access="3333333333333333" name="C2RXF1EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0548" access="3333333333303033" name="C2RXF2SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x054A" access="3333333333333333" name="C2RXF2EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x054C" access="3333333333303033" name="C2RXF3SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x054E" access="3333333333333333" name="C2RXF3EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0550" access="3333333333303033" name="C2RXF4SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0552" access="3333333333333333" name="C2RXF4EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0554" access="3333333333303033" name="C2RXF5SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0556" access="3333333333333333" name="C2RXF5EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0558" access="3333333333303033" name="C2RXF6SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x055A" access="3333333333333333" name="C2RXF6EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x055C" access="3333333333303033" name="C2RXF7SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x055E" access="3333333333333333" name="C2RXF7EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0560" access="3333333333303033" name="C2RXF8SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0562" access="3333333333333333" name="C2RXF8EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0564" access="3333333333303033" name="C2RXF9SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0566" access="3333333333333333" name="C2RXF9EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0568" access="3333333333303033" name="C2RXF10SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x056A" access="3333333333333333" name="C2RXF10EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x056C" access="3333333333303033" name="C2RXF11SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x056E" access="3333333333333333" name="C2RXF11EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0570" access="3333333333303033" name="C2RXF12SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0572" access="3333333333333333" name="C2RXF12EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0574" access="3333333333303033" name="C2RXF13SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0576" access="3333333333333333" name="C2RXF13EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0578" access="3333333333303033" name="C2RXF14SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x057A" access="3333333333333333" name="C2RXF14EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x057C" access="3333333333303033" name="C2RXF15SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x057E" access="3333333333333333" name="C2RXF15EID" mclr="0000000000000000" por="0000000000000000" />
+  </device>
+  <device nb_banks="1" name="24HJ64GP206" >
+    <unused end="0x002D" start="0x0022" />
+    <unused end="0x0041" start="0x0038" />
+    <unused end="0x0051" start="0x0046" />
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+    <unused end="0x0247" start="0x0246" />
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+    <unused end="0x02C5" start="0x02C0" />
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+    <unused end="0x05FF" start="0x0500" />
+    <sfr address="0x0000" access="3333333333333333" name="WREG0" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0002" access="3333333333333333" name="WREG1" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0004" access="3333333333333333" name="WREG2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0006" access="3333333333333333" name="WREG3" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0008" access="3333333333333333" name="WREG4" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x000A" access="3333333333333333" name="WREG5" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x000C" access="3333333333333333" name="WREG6" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x000E" access="3333333333333333" name="WREG7" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0010" access="3333333333333333" name="WREG8" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0012" access="3333333333333333" name="WREG9" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0014" access="3333333333333333" name="WREG10" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0016" access="3333333333333333" name="WREG11" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0018" access="3333333333333333" name="WREG12" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x001A" access="3333333333333333" name="WREG13" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x001C" access="3333333333333333" name="WREG14" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x001E" access="3333333333333330" name="WREG15" mclr="1111211111111111" por="1111211111111111" />
+    <sfr address="0x0020" access="3333333333333331" name="SPLIM" mclr="1111111111111111" por="1111111111111111" />
+    <combined address="0x002E" size="3" name="PC" />
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+    <sfr address="0x038E" access="9000000003333333" name="DMA1REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x0390" access="3333333333333333" name="DMA1STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0392" access="3333333333333333" name="DMA1STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0394" access="3333333333333333" name="DMA1PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0396" access="0000003333333333" name="DMA1CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0398" access="3333300000330033" name="DMA2CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x039A" access="9000000003333333" name="DMA2REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x039C" access="3333333333333333" name="DMA2STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x039E" access="3333333333333333" name="DMA2STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03A0" access="3333333333333333" name="DMA2PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03A2" access="0000003333333333" name="DMA2CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03A4" access="3333300000330033" name="DMA3CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03A6" access="9000000003333333" name="DMA3REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03A8" access="3333333333333333" name="DMA3STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03AA" access="3333333333333333" name="DMA3STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03AC" access="3333333333333333" name="DMA3PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03AE" access="0000003333333333" name="DMA3CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03B0" access="3333300000330033" name="DMA4CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03B2" access="9000000003333333" name="DMA4REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03B4" access="3333333333333333" name="DMA4STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03B6" access="3333333333333333" name="DMA4STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03B8" access="3333333333333333" name="DMA4PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03BA" access="0000003333333333" name="DMA4CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03BC" access="3333300000330033" name="DMA5CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03BE" access="9000000003333333" name="DMA5REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03C0" access="3333333333333333" name="DMA5STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C2" access="3333333333333333" name="DMA5STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C4" access="3333333333333333" name="DMA5PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C6" access="0000003333333333" name="DMA5CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C8" access="3333300000330033" name="DMA6CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03CA" access="9000000003333333" name="DMA6REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03CC" access="3333333333333333" name="DMA6STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03CE" access="3333333333333333" name="DMA6STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D0" access="3333333333333333" name="DMA6PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D2" access="0000003333333333" name="DMA6CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D4" access="3333300000330033" name="DMA7CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03D6" access="9000000003333333" name="DMA7REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03D8" access="3333333333333333" name="DMA7STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DA" access="3333333333333333" name="DMA7STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DC" access="3333333333333333" name="DMA7PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DE" access="0000003333333333" name="DMA7CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03E0" access="1111111111111111" name="DMACS0" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03E2" access="0000111111111111" name="DMACS1" mclr="0000111111111111" por="0000111111111111" />
+    <sfr address="0x03E4" access="1111111111111111" name="DSADR" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0600" access="3033333333333333" name="PMPCON" mclr="1011111111111111" por="1011111111111111" />
+    <sfr address="0x0602" access="3333333333333333" name="PMPMODE" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0604" access="3333333333333333" name="PMPADDR" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0606" access="3333333333333333" name="PMPDATA1" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0608" access="3333333333333333" name="PMPDATA2" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x060A" access="3333333333333333" name="PMPPE1" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x060C" access="3333333333333333" name="PMPPE2" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0620" access="3333333333333333" name="ALRMVAL" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0622" access="3333333333333333" name="ALRMCFG" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0624" access="3333333333333333" name="RTCVAL" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0626" access="3333333333333333" name="RTCCFG" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0630" access="3033333333333333" name="CMCON" mclr="3033333333333333" por="1011111111111111" />
+    <sfr address="0x0632" access="0000000033333333" name="CVRCON" mclr="0000000033333333" por="0000000011111111" />
+    <sfr address="0x0740" access="3300000033333333" name="RCON" mclr="3300000033333333" por="1100000011111122" />
+    <sfr address="0x0742" access="0333033330303033" name="OSCCON" mclr="0555055510001111" por="0555055510001111" />
+    <sfr address="0x0744" access="3333333333333333" name="CLKDIV" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0746" access="0000000333333333" name="PLLFBD" mclr="0000000333333333" por="0000000111111111" />
+    <sfr address="0x0748" access="0000000000333333" name="OSCTRIM" mclr="0000000000333333" por="0000000000111111" />
+    <sfr address="0x0760" access="9330000003003333" name="NVMCON" mclr="1110000001001111" por="1110000001001111" />
+    <sfr address="0x0766" access="0000000022222222" name="NVMKEY" mclr="0000000011111111" por="0000000011111111" />
+    <sfr address="0x0770" access="3333300333333003" name="PMD1" mclr="1111100111111001" por="1111100111111111" />
+    <sfr address="0x0772" access="3333333333333333" name="PMD2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0774" access="0000033300000000" name="PMD3" mclr="0000011100000000" por="0000011100000000" />
+  </device>
+  <device nb_banks="1" name="24HJ64GP210" >
+    <unused end="0x002D" start="0x0022" />
+    <unused end="0x0041" start="0x0038" />
+    <unused end="0x0051" start="0x0046" />
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+    <unused end="0x05FF" start="0x0500" />
+    <sfr address="0x0000" access="3333333333333333" name="WREG0" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0002" access="3333333333333333" name="WREG1" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0004" access="3333333333333333" name="WREG2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0006" access="3333333333333333" name="WREG3" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0008" access="3333333333333333" name="WREG4" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x000A" access="3333333333333333" name="WREG5" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x000C" access="3333333333333333" name="WREG6" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x000E" access="3333333333333333" name="WREG7" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0010" access="3333333333333333" name="WREG8" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0012" access="3333333333333333" name="WREG9" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0014" access="3333333333333333" name="WREG10" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0016" access="3333333333333333" name="WREG11" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0018" access="3333333333333333" name="WREG12" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x001A" access="3333333333333333" name="WREG13" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x001C" access="3333333333333333" name="WREG14" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x001E" access="3333333333333330" name="WREG15" mclr="1111211111111111" por="1111211111111111" />
+    <sfr address="0x0020" access="3333333333333331" name="SPLIM" mclr="1111111111111111" por="1111111111111111" />
+    <combined address="0x002E" size="3" name="PC" />
+    <sfr address="0x002E" access="1111111111111111" name="PCL" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0030" access="0000000001111111" name="PCH" mclr="0000000001111111" por="0000000001111111" />
+    <sfr address="0x0032" access="0000000033333333" name="TBLPAG" mclr="0000000011111111" por="0000000011111111" />
+    <sfr address="0x0034" access="0000000033333333" name="PSVPAG" mclr="0000000011111111" por="0000000011111111" />
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+    <sfr address="0x0042" access="0000000333313333" name="SR" mclr="0000000111111111" por="0000000111111111" />
+    <sfr address="0x0044" access="0000000000005300" name="CORCON" mclr="0000000000001100" por="0000000000001100" />
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+    <sfr address="0x0244" access="3330000000000033" name="SPI1CON2" mclr="1110000000000011" por="1110000000000011" />
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+    <sfr address="0x0262" access="0003333333333333" name="SPI2CON1" mclr="0001111111111111" por="0001111111111111" />
+    <sfr address="0x0264" access="3330000000000033" name="SPI2CON2" mclr="1110000000000011" por="1110000000000011" />
+    <sfr address="0x0268" access="3333333333333333" name="SPI2BUF" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x02C0" access="3333033033333333" name="TRISA" mclr="2222022022222222" por="2222022022222222" />
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+    <sfr address="0x02C8" access="3333333333333333" name="PORTB" mclr="3333333333333333" por="0000000000000000" />
+    <sfr address="0x02CA" access="3333333333333333" name="LATB" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x02CC" access="3333000000033330" name="TRISC" mclr="2222000000022220" por="2222000000022220" />
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+    <sfr address="0x02D0" access="3333000000033330" name="LATC" mclr="3333000000033330" por="1111000000011110" />
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+    <sfr address="0x02D4" access="3333333333333333" name="PORTD" mclr="3333333333333333" por="0000000000000000" />
+    <sfr address="0x02D6" access="3333333333333333" name="LATD" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x06D2" access="3333333333333333" name="ODCD" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x02D8" access="0000000033333333" name="TRISE" mclr="0000000022222222" por="0000000022222222" />
+    <sfr address="0x02DA" access="0000000033333333" name="PORTE" mclr="0000000033333333" por="0000000000000000" />
+    <sfr address="0x02DC" access="0000000033333333" name="LATE" mclr="0000000033333333" por="0000000011111111" />
+    <sfr address="0x02DE" access="0033000333333333" name="TRISF" mclr="0022000222222222" por="0022000222222222" />
+    <sfr address="0x02E0" access="0033000333333333" name="PORTF" mclr="0033000333333333" por="0000000000000000" />
+    <sfr address="0x02E2" access="0033000333333333" name="LATF" mclr="0033000333333333" por="0011000111111111" />
+    <sfr address="0x06DE" access="0033000333333333" name="ODCF" mclr="0033000333333333" por="0011000111111111" />
+    <sfr address="0x02E4" access="3333003333003333" name="TRISG" mclr="2222002222002222" por="2222002222002222" />
+    <sfr address="0x02E6" access="3333003333003333" name="PORTG" mclr="3333003333003333" por="0000000000000000" />
+    <sfr address="0x02E8" access="3333003333003333" name="LATG" mclr="3333003333003333" por="1111001111001111" />
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+    <sfr address="0x0302" access="0000111111111111" name="AD1BUF1" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0304" access="0000111111111111" name="AD1BUF2" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0306" access="0000111111111111" name="AD1BUF3" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0308" access="0000111111111111" name="AD1BUF4" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x030A" access="0000111111111111" name="AD1BUF5" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x030C" access="0000111111111111" name="AD1BUF6" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x030E" access="0000111111111111" name="AD1BUF7" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0310" access="0000111111111111" name="AD1BUF8" mclr="0000333333333333" por="0000000000000000" />
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+    <sfr address="0x0314" access="0000111111111111" name="AD1BUFA" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0316" access="0000111111111111" name="AD1BUFB" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0318" access="0000111111111111" name="AD1BUFC" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x031A" access="0000111111111111" name="AD1BUFD" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x031C" access="0000111111111111" name="AD1BUFE" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x031E" access="0000111111111111" name="AD1BUFF" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0320" access="3030003333303335" name="AD1CON1" mclr="1010001111100111" por="1010001111100111" />
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+    <sfr address="0x0326" access="0000033300000333" name="AD1CHS123" mclr="0000011100000111" por="0000011100000111" />
+    <sfr address="0x0328" access="3000333330003333" name="AD1CHS0" mclr="1000111110001111" por="1000111110001111" />
+    <sfr address="0x032C" access="3333333333333333" name="AD1PCFGL" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0330" access="3333333333333333" name="AD1CSSL" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x032A" access="3333333333333333" name="AD1PCFGH" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x032E" access="3333333333333333" name="AD1CSSH" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0380" access="3333300000330033" name="DMA0CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x0382" access="9000000003333333" name="DMA0REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x0384" access="3333333333333333" name="DMA0STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0386" access="3333333333333333" name="DMA0STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0388" access="3333333333333333" name="DMA0PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x038A" access="0000003333333333" name="DMA0CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x038C" access="3333300000330033" name="DMA1CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x038E" access="9000000003333333" name="DMA1REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x0390" access="3333333333333333" name="DMA1STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0392" access="3333333333333333" name="DMA1STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0394" access="3333333333333333" name="DMA1PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0396" access="0000003333333333" name="DMA1CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0398" access="3333300000330033" name="DMA2CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x039A" access="9000000003333333" name="DMA2REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x039C" access="3333333333333333" name="DMA2STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x039E" access="3333333333333333" name="DMA2STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03A0" access="3333333333333333" name="DMA2PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03A2" access="0000003333333333" name="DMA2CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03A4" access="3333300000330033" name="DMA3CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03A6" access="9000000003333333" name="DMA3REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03A8" access="3333333333333333" name="DMA3STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03AA" access="3333333333333333" name="DMA3STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03AC" access="3333333333333333" name="DMA3PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03AE" access="0000003333333333" name="DMA3CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03B0" access="3333300000330033" name="DMA4CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03B2" access="9000000003333333" name="DMA4REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03B4" access="3333333333333333" name="DMA4STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03B6" access="3333333333333333" name="DMA4STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03B8" access="3333333333333333" name="DMA4PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03BA" access="0000003333333333" name="DMA4CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03BC" access="3333300000330033" name="DMA5CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03BE" access="9000000003333333" name="DMA5REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03C0" access="3333333333333333" name="DMA5STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C2" access="3333333333333333" name="DMA5STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C4" access="3333333333333333" name="DMA5PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C6" access="0000003333333333" name="DMA5CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C8" access="3333300000330033" name="DMA6CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03CA" access="9000000003333333" name="DMA6REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03CC" access="3333333333333333" name="DMA6STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03CE" access="3333333333333333" name="DMA6STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D0" access="3333333333333333" name="DMA6PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D2" access="0000003333333333" name="DMA6CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D4" access="3333300000330033" name="DMA7CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03D6" access="9000000003333333" name="DMA7REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03D8" access="3333333333333333" name="DMA7STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DA" access="3333333333333333" name="DMA7STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DC" access="3333333333333333" name="DMA7PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DE" access="0000003333333333" name="DMA7CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03E0" access="1111111111111111" name="DMACS0" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03E2" access="0000111111111111" name="DMACS1" mclr="0000111111111111" por="0000111111111111" />
+    <sfr address="0x03E4" access="1111111111111111" name="DSADR" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0600" access="3033333333333333" name="PMPCON" mclr="1011111111111111" por="1011111111111111" />
+    <sfr address="0x0602" access="3333333333333333" name="PMPMODE" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0604" access="3333333333333333" name="PMPADDR" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0606" access="3333333333333333" name="PMPDATA1" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0608" access="3333333333333333" name="PMPDATA2" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x060A" access="3333333333333333" name="PMPPE1" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x060C" access="3333333333333333" name="PMPPE2" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0620" access="3333333333333333" name="ALRMVAL" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0622" access="3333333333333333" name="ALRMCFG" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0624" access="3333333333333333" name="RTCVAL" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0626" access="3333333333333333" name="RTCCFG" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0630" access="3033333333333333" name="CMCON" mclr="3033333333333333" por="1011111111111111" />
+    <sfr address="0x0632" access="0000000033333333" name="CVRCON" mclr="0000000033333333" por="0000000011111111" />
+    <sfr address="0x0740" access="3300000033333333" name="RCON" mclr="3300000033333333" por="1100000011111122" />
+    <sfr address="0x0742" access="0333033330303033" name="OSCCON" mclr="0555055510001111" por="0555055510001111" />
+    <sfr address="0x0744" access="3333333333333333" name="CLKDIV" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0746" access="0000000333333333" name="PLLFBD" mclr="0000000333333333" por="0000000111111111" />
+    <sfr address="0x0748" access="0000000000333333" name="OSCTRIM" mclr="0000000000333333" por="0000000000111111" />
+    <sfr address="0x0760" access="9330000003003333" name="NVMCON" mclr="1110000001001111" por="1110000001001111" />
+    <sfr address="0x0766" access="0000000022222222" name="NVMKEY" mclr="0000000011111111" por="0000000011111111" />
+    <sfr address="0x0770" access="3333300333333003" name="PMD1" mclr="1111100111111001" por="1111100111111111" />
+    <sfr address="0x0772" access="3333333333333333" name="PMD2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0774" access="0000033300000030" name="PMD3" mclr="0000011100000010" por="0000011100000010" />
+  </device>
+  <device nb_banks="1" name="24HJ64GP506" >
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+  </device>
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+    <sfr address="0x02DC" access="0000000033333333" name="LATE" mclr="0000000033333333" por="0000000011111111" />
+    <sfr address="0x02DE" access="0033000333333333" name="TRISF" mclr="0022000222222222" por="0022000222222222" />
+    <sfr address="0x02E0" access="0033000333333333" name="PORTF" mclr="0033000333333333" por="0000000000000000" />
+    <sfr address="0x02E2" access="0033000333333333" name="LATF" mclr="0033000333333333" por="0011000111111111" />
+    <sfr address="0x06DE" access="0033000333333333" name="ODCF" mclr="0033000333333333" por="0011000111111111" />
+    <sfr address="0x02E4" access="3333003333003333" name="TRISG" mclr="2222002222002222" por="2222002222002222" />
+    <sfr address="0x02E6" access="3333003333003333" name="PORTG" mclr="3333003333003333" por="0000000000000000" />
+    <sfr address="0x02E8" access="3333003333003333" name="LATG" mclr="3333003333003333" por="1111001111001111" />
+    <sfr address="0x0300" access="0000111111111111" name="AD1BUF0" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0302" access="0000111111111111" name="AD1BUF1" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0304" access="0000111111111111" name="AD1BUF2" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0306" access="0000111111111111" name="AD1BUF3" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0308" access="0000111111111111" name="AD1BUF4" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x030A" access="0000111111111111" name="AD1BUF5" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x030C" access="0000111111111111" name="AD1BUF6" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x030E" access="0000111111111111" name="AD1BUF7" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0310" access="0000111111111111" name="AD1BUF8" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0312" access="0000111111111111" name="AD1BUF9" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0314" access="0000111111111111" name="AD1BUFA" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0316" access="0000111111111111" name="AD1BUFB" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0318" access="0000111111111111" name="AD1BUFC" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x031A" access="0000111111111111" name="AD1BUFD" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x031C" access="0000111111111111" name="AD1BUFE" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x031E" access="0000111111111111" name="AD1BUFF" mclr="0000333333333333" por="0000000000000000" />
+    <sfr address="0x0320" access="3030003333303335" name="AD1CON1" mclr="1010001111100111" por="1010001111100111" />
+    <sfr address="0x0322" access="3333033310333333" name="AD1CON2" mclr="1111011110111111" por="1111011110111111" />
+    <sfr address="0x0324" access="0003333330333333" name="AD1CON3" mclr="0001111110111111" por="0001111110111111" />
+    <sfr address="0x0332" access="0000000000000333" name="AD1CON4" mclr="0000000000000111" por="0000000000000111" />
+    <sfr address="0x0326" access="0000033300000333" name="AD1CHS123" mclr="0000011100000111" por="0000011100000111" />
+    <sfr address="0x0328" access="3000333330003333" name="AD1CHS0" mclr="1000111110001111" por="1000111110001111" />
+    <sfr address="0x032C" access="3333333333333333" name="AD1PCFGL" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0330" access="3333333333333333" name="AD1CSSL" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x032A" access="3333333333333333" name="AD1PCFGH" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x032E" access="3333333333333333" name="AD1CSSH" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0380" access="3333300000330033" name="DMA0CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x0382" access="9000000003333333" name="DMA0REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x0384" access="3333333333333333" name="DMA0STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0386" access="3333333333333333" name="DMA0STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0388" access="3333333333333333" name="DMA0PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x038A" access="0000003333333333" name="DMA0CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x038C" access="3333300000330033" name="DMA1CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x038E" access="9000000003333333" name="DMA1REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x0390" access="3333333333333333" name="DMA1STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0392" access="3333333333333333" name="DMA1STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0394" access="3333333333333333" name="DMA1PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0396" access="0000003333333333" name="DMA1CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0398" access="3333300000330033" name="DMA2CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x039A" access="9000000003333333" name="DMA2REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x039C" access="3333333333333333" name="DMA2STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x039E" access="3333333333333333" name="DMA2STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03A0" access="3333333333333333" name="DMA2PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03A2" access="0000003333333333" name="DMA2CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03A4" access="3333300000330033" name="DMA3CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03A6" access="9000000003333333" name="DMA3REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03A8" access="3333333333333333" name="DMA3STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03AA" access="3333333333333333" name="DMA3STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03AC" access="3333333333333333" name="DMA3PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03AE" access="0000003333333333" name="DMA3CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03B0" access="3333300000330033" name="DMA4CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03B2" access="9000000003333333" name="DMA4REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03B4" access="3333333333333333" name="DMA4STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03B6" access="3333333333333333" name="DMA4STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03B8" access="3333333333333333" name="DMA4PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03BA" access="0000003333333333" name="DMA4CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03BC" access="3333300000330033" name="DMA5CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03BE" access="9000000003333333" name="DMA5REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03C0" access="3333333333333333" name="DMA5STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C2" access="3333333333333333" name="DMA5STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C4" access="3333333333333333" name="DMA5PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C6" access="0000003333333333" name="DMA5CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03C8" access="3333300000330033" name="DMA6CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03CA" access="9000000003333333" name="DMA6REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03CC" access="3333333333333333" name="DMA6STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03CE" access="3333333333333333" name="DMA6STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D0" access="3333333333333333" name="DMA6PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D2" access="0000003333333333" name="DMA6CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03D4" access="3333300000330033" name="DMA7CON" mclr="1111100000110011" por="1111100000110011" />
+    <sfr address="0x03D6" access="9000000003333333" name="DMA7REQ" mclr="1000000002222222" por="1000000002222222" />
+    <sfr address="0x03D8" access="3333333333333333" name="DMA7STA" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DA" access="3333333333333333" name="DMA7STB" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DC" access="3333333333333333" name="DMA7PAD" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03DE" access="0000003333333333" name="DMA7CNT" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03E0" access="1111111111111111" name="DMACS0" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x03E2" access="0000111111111111" name="DMACS1" mclr="0000111111111111" por="0000111111111111" />
+    <sfr address="0x03E4" access="1111111111111111" name="DSADR" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0600" access="3033333333333333" name="PMPCON" mclr="1011111111111111" por="1011111111111111" />
+    <sfr address="0x0602" access="3333333333333333" name="PMPMODE" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0604" access="3333333333333333" name="PMPADDR" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0606" access="3333333333333333" name="PMPDATA1" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0608" access="3333333333333333" name="PMPDATA2" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x060A" access="3333333333333333" name="PMPPE1" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x060C" access="3333333333333333" name="PMPPE2" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0620" access="3333333333333333" name="ALRMVAL" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0622" access="3333333333333333" name="ALRMCFG" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0624" access="3333333333333333" name="RTCVAL" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0626" access="3333333333333333" name="RTCCFG" mclr="3333333333333333" por="1111111111111111" />
+    <sfr address="0x0630" access="3033333333333333" name="CMCON" mclr="3033333333333333" por="1011111111111111" />
+    <sfr address="0x0632" access="0000000033333333" name="CVRCON" mclr="0000000033333333" por="0000000011111111" />
+    <sfr address="0x0740" access="3300000033333333" name="RCON" mclr="3300000033333333" por="1100000011111122" />
+    <sfr address="0x0742" access="0333033330303033" name="OSCCON" mclr="0555055510001111" por="0555055510001111" />
+    <sfr address="0x0744" access="3333333333333333" name="CLKDIV" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0746" access="0000000333333333" name="PLLFBD" mclr="0000000333333333" por="0000000111111111" />
+    <sfr address="0x0748" access="0000000000333333" name="OSCTRIM" mclr="0000000000333333" por="0000000000111111" />
+    <sfr address="0x0760" access="9330000003003333" name="NVMCON" mclr="1110000001001111" por="1110000001001111" />
+    <sfr address="0x0766" access="0000000022222222" name="NVMKEY" mclr="0000000011111111" por="0000000011111111" />
+    <sfr address="0x0770" access="3333300333333033" name="PMD1" mclr="1111100111111011" por="1111100111111111" />
+    <sfr address="0x0772" access="3333333333333333" name="PMD2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0774" access="0000033300000000" name="PMD3" mclr="0000011100000000" por="0000011100000000" />
+    <sfr address="0x0400" access="0033333311103003" name="C1CTRL1" mclr="1111121121111111" por="1111121121111111" />
+    <sfr address="0x0402" access="0000000000011111" name="C1CTRL2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0404" access="0001111101111111" name="C1VEC" mclr="1111111112111111" por="1111111112111111" />
+    <sfr address="0x0406" access="3330000000033333" name="C1FCTRL" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0408" access="0011111100111111" name="C1FIFO" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x040A" access="0011111155505555" name="C1INTF" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x040C" access="0000000033333333" name="C1INTE" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0410" access="0000000033333333" name="C1CFG1" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0412" access="0300033333333333" name="C1CFG2" mclr="1011100000000000" por="1011100000000000" />
+    <sfr address="0x0414" access="3333333333333333" name="C1FEN1" mclr="1111111111222222" por="1111111111222222" />
+    <sfr address="0x0418" access="3333333333333333" name="C1FMSKSEL1" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x041A" access="3333333333333333" name="C1FMSKSEL2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0420" access="5555555555555555" name="C1RXFUL1" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0422" access="5555555555555555" name="C1RXFUL2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0424" access="3333333333333333" name="C1BUFPNT3" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0426" access="3333333333333333" name="C1BUFPNT4" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0428" access="5555555555555555" name="C1RXOVF1" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x042A" access="5555555555555555" name="C1RXOVF2" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0430" access="3111333331113333" name="C1TR01CON" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0432" access="3111333331113333" name="C1TR23CON" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0434" access="3111333331113333" name="C1TR45CON" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0436" access="3111333331113333" name="C1TR67CON" mclr="1111111111111111" por="1111111111111111" />
+    <sfr address="0x0438" access="3333333333303033" name="C1RXM2SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x043A" access="3333333333333333" name="C1RXM2EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0440" access="3333333333303033" name="C1RXF0SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0442" access="3333333333333333" name="C1RXF0EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0444" access="3333333333303033" name="C1RXF1SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0446" access="3333333333333333" name="C1RXF1EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0448" access="3333333333303033" name="C1RXF2SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x044A" access="3333333333333333" name="C1RXF2EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x044C" access="3333333333303033" name="C1RXF3SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x044E" access="3333333333333333" name="C1RXF3EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0450" access="3333333333303033" name="C1RXF4SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0452" access="3333333333333333" name="C1RXF4EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0454" access="3333333333303033" name="C1RXF5SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0456" access="3333333333333333" name="C1RXF5EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0458" access="3333333333303033" name="C1RXF6SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x045A" access="3333333333333333" name="C1RXF6EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x045C" access="3333333333303033" name="C1RXF7SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x045E" access="3333333333333333" name="C1RXF7EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0460" access="3333333333303033" name="C1RXF8SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0462" access="3333333333333333" name="C1RXF8EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0464" access="3333333333303033" name="C1RXF9SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0466" access="3333333333333333" name="C1RXF9EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0468" access="3333333333303033" name="C1RXF10SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x046A" access="3333333333333333" name="C1RXF10EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x046C" access="3333333333303033" name="C1RXF11SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x046E" access="3333333333333333" name="C1RXF11EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0470" access="3333333333303033" name="C1RXF12SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0472" access="3333333333333333" name="C1RXF12EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0474" access="3333333333303033" name="C1RXF13SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x0476" access="3333333333333333" name="C1RXF13EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x0478" access="3333333333303033" name="C1RXF14SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x047A" access="3333333333333333" name="C1RXF14EID" mclr="0000000000000000" por="0000000000000000" />
+    <sfr address="0x047C" access="3333333333303033" name="C1RXF15SID" mclr="0000000000010100" por="0000000000010100" />
+    <sfr address="0x047E" access="3333333333333333" name="C1RXF15EID" mclr="0000000000000000" por="0000000000000000" />
+  </device>
+</registers>
diff --git a/src/devices/pic/xml_data/registers/registers_missing.xml b/src/devices/pic/xml_data/registers/registers_missing.xml
new file mode 100644
index 0000000..b6e3173
--- /dev/null
+++ b/src/devices/pic/xml_data/registers/registers_missing.xml
@@ -0,0 +1,59 @@
+<!-- ************************************************************************* -->
+<!-- * Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  * -->
+<!-- *                                                                       * -->
+<!-- * This program is free software; you can redistribute it and/or modify  * -->
+<!-- * it under the terms of the GNU General Public License as published by  * -->
+<!-- * the Free Software Foundation; either version 2 of the License, or     * -->
+<!-- * (at your option) any later version.                                   * -->
+<!-- *************************************************************************/-->
+<!DOCTYPE piklab>
+<registers>
+  <device name="16C52"   same_as="16C54" />
+  <device name="16C54A"  same_as="16C54" />
+  <device name="16C54B"  same_as="16C54" />
+  <device name="16CR54B" same_as="16C54" />
+  <device name="16CR57B" same_as="16C57" />
+  <device name="16CR58A" same_as="16C58A" />
+  <device nb_banks="2" name="16C61" >
+    <mirror>
+      <range end="0x0000" start="0x0000" />
+      <range end="0x0080" start="0x0080" />
+    </mirror>
+    <mirror>
+      <range end="0x0004" start="0x0002" />
+      <range end="0x0084" start="0x0082" />
+    </mirror>
+    <mirror>
+      <range end="0x000B" start="0x000A" />
+      <range end="0x008B" start="0x008A" />
+    </mirror>
+    <unused end="0x0009" start="0x0007" />
+    <unused end="0x007F" start="0x0030" />
+    <unused end="0x0089" start="0x0087" />
+    <unused end="0x00FF" start="0x00B0" />
+    <sfr address="0x0000" access="00000000" name="INDF" mclr="00000000" por="00000000" />
+    <sfr address="0x0001" access="33333333" name="TMR0" mclr="33333333" por="00000000" />
+    <sfr address="0x0002" access="33333333" name="PCL" mclr="11111111" por="11111111" />
+    <sfr address="0x0003" access="11311333" name="STATUS" mclr="11144333" por="11122000" />
+    <sfr address="0x0004" access="33333333" name="FSR" mclr="33333333" por="00000000" />
+    <sfr address="0x0005" access="00033333" name="PORTA" mclr="00033333" por="00000000" />
+    <sfr address="0x0006" access="33333333" name="PORTB" mclr="33333333" por="00000000" />
+    <sfr address="0x000A" access="00033333" name="PCLATH" mclr="00011111" por="00011111" />
+    <sfr address="0x000B" access="33333333" name="INTCON" mclr="11111113" por="11111110" />
+    <sfr address="0x0081" access="33333333" name="OPTION_REG" mclr="22222222" por="22222222" />
+    <sfr address="0x0085" access="00033333" name="TRISA" mclr="00022222" por="00022222" />
+    <sfr address="0x0086" access="33333333" name="TRISB" mclr="22222222" por="22222222" />
+  </device>
+  <device name="16C62"  same_as="16C62A" />
+  <device name="16C64"  same_as="16C64A" />
+  <device name="16C65"  same_as="16C65A" />
+  <device name="16C73"  same_as="16C73A" />
+  <device name="16CR73" same_as="16F73"  />
+  <device name="16C74"  same_as="16C74A" />
+  <device name="16CR74" same_as="16F74"  />
+  <device name="16CR76" same_as="16F76"  />
+  <device name="16CR77" same_as="16F77"  />
+  <device name="16C84"  same_as="16CR84" />
+  <device name="12HV615"  same_as="12F615" />
+  <device name="16HV615"  same_as="16F615" />
+</registers>
diff --git a/src/devices/pic/xml_data/validate.sh b/src/devices/pic/xml_data/validate.sh
new file mode 100755
index 0000000..20dbe5e
--- /dev/null
+++ b/src/devices/pic/xml_data/validate.sh
@@ -0,0 +1,5 @@
+cd validate
+make
+cd ..
+validate/validate $1
+
diff --git a/src/devices/pic/xml_data/validate/Makefile b/src/devices/pic/xml_data/validate/Makefile
new file mode 100644
index 0000000..d235259
--- /dev/null
+++ b/src/devices/pic/xml_data/validate/Makefile
@@ -0,0 +1,4 @@
+all: validate
+
+validate: validate.cpp
+	g++ -o validate -lxerces-c validate.cpp
diff --git a/src/devices/pic/xml_data/validate/validate.cpp b/src/devices/pic/xml_data/validate/validate.cpp
new file mode 100644
index 0000000..7e733b0
--- /dev/null
+++ b/src/devices/pic/xml_data/validate/validate.cpp
@@ -0,0 +1,72 @@
+// Necessary includes. We refer to these as "common includes" 
+// in the following examples.
+#include <xercesc/sax2/XMLReaderFactory.hpp>
+#include <xercesc/sax2/SAX2XMLReader.hpp>
+#include <xercesc/sax2/DefaultHandler.hpp>
+
+// Handy definitions of constants.
+#include <xercesc/util/XMLUni.hpp>
+
+#include <iostream>
+
+using namespace std;
+XERCES_CPP_NAMESPACE_USE
+
+class Handler : public DefaultHandler
+{
+public:
+  virtual void  error (const SAXParseException &exc) {
+    char* message = XMLString::transcode(exc.getMessage());
+    cout << "Exception: " << message << "\n";
+    XMLString::release(&message);
+  }
+  virtual void fatalError (const SAXParseException &exc) {
+    char* message = XMLString::transcode(exc.getMessage());
+    cout << "Exception: " << message << "\n";
+    XMLString::release(&message);
+  }
+};
+
+int main(int argc, char* argv[])
+{
+XMLPlatformUtils::Initialize();
+
+// Create a SAX2 parser object.
+SAX2XMLReader* parser = XMLReaderFactory::createXMLReader();
+
+// Set the appropriate features on the parser.
+// Enable namespaces, schema validation, and the checking 
+// of all Schema constraints.
+// We refer to these as "common features" in following examples.
+parser->setFeature(XMLUni::fgSAX2CoreNameSpaces, true);
+parser->setFeature(XMLUni::fgSAX2CoreValidation, true);
+parser->setFeature(XMLUni::fgXercesDynamic, false);
+parser->setFeature(XMLUni::fgXercesSchema, true);
+parser->setFeature(XMLUni::fgXercesSchemaFullChecking, true);
+//parser->setProperty(XMLUni::fgXercesSchemaExternalNoNameSpaceSchemaLocation, (void *)"pic.xsd");
+
+// Set appropriate ContentHandler, ErrorHandler, and EntityResolver.
+// These will be referred to as "common handlers" in subsequent examples.
+
+// You will use a default handler provided by Xerces-C++ (no op action).
+// Users should write their own handlers and install them.
+Handler handler;
+parser->setContentHandler(&handler);
+
+// The object parser calls when it detects violations of the schema.
+parser->setErrorHandler(&handler);
+
+// The object parser calls to find the schema and 
+// resolve schema imports/includes.
+parser->setEntityResolver(&handler);
+
+// Parse the XML document.
+// Document content sent to registered ContentHandler instance.
+if ( argc==1 ) { printf("Needs one argument\n"); return -1; }
+parser->parse(argv[1]);
+
+// Delete the parser instance.
+delete parser;
+
+return 0;
+}
diff --git a/src/devices/pic/xml_data/xml_data.pro b/src/devices/pic/xml_data/xml_data.pro
new file mode 100644
index 0000000..086bf53
--- /dev/null
+++ b/src/devices/pic/xml_data/xml_data.pro
@@ -0,0 +1,5 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = picxml
+SOURCES += pic_data.cpp
diff --git a/src/libgui/Makefile.am b/src/libgui/Makefile.am
new file mode 100644
index 0000000..b12fc23
--- /dev/null
+++ b/src/libgui/Makefile.am
@@ -0,0 +1,12 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libgui.la
+libgui_la_LDFLAGS = $(all_libraries)
+libgui_la_SOURCES = editor.cpp device_gui.cpp toplevel.cpp object_view.cpp \
+	config_gen.cpp register_view.cpp device_editor.cpp watch_view.cpp project.cpp \
+	project_editor.cpp project_manager.cpp hex_editor.cpp global_config.cpp config_center.cpp \
+	editor_manager.cpp new_dialogs.cpp text_editor.cpp log_view.cpp gui_prog_manager.cpp \
+	gui_debug_manager.cpp breakpoint_view.cpp likeback.cpp main_global.cpp console.cpp \
+	project_wizard.cpp toplevel_ui.cpp project_manager_ui.cpp
+
diff --git a/src/libgui/breakpoint_view.cpp b/src/libgui/breakpoint_view.cpp
new file mode 100644
index 0000000..6f49aac
--- /dev/null
+++ b/src/libgui/breakpoint_view.cpp
@@ -0,0 +1,94 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "breakpoint_view.h"
+
+#include <qlayout.h>
+#include <klocale.h>
+#include <qpopupmenu.h>
+
+#include "main_global.h"
+#include "editor_manager.h"
+#include "coff/base/text_coff.h"
+#include "gui_debug_manager.h"
+
+//----------------------------------------------------------------------------
+void Breakpoint::updateActions(const Data *data)
+{
+  bool hasBreakpoint = (data ? Breakpoint::list().contains(*data) : false);
+  Main::action("toggle_breakpoint")->setText(hasBreakpoint ? i18n("Remove breakpoint") : i18n("Set breakpoint"));
+  Main::action("toggle_breakpoint")->setEnabled(data);
+  bool isActive = (hasBreakpoint ? Breakpoint::list().state(*data)==Breakpoint::Active : false);
+  Main::action("enable_breakpoint")->setText(!isActive ? i18n("Enable breakpoint") : i18n("Disable breakpoint"));
+  Main::action("enable_breakpoint")->setEnabled(Debugger::manager->coff() && hasBreakpoint);
+}
+
+//----------------------------------------------------------------------------
+Breakpoint::ListViewItem::ListViewItem(ListView *parent, const Data &data)
+  : KListViewItem(parent), _data(data)
+{}
+
+//----------------------------------------------------------------------------
+Breakpoint::View::View(QWidget *parent)
+  : QWidget(parent, "breakpoints_view"), GenericView(Breakpoint::list()),
+    _currentData(0)
+{
+  QVBoxLayout *top = new QVBoxLayout(this);
+  _listview = new ListView(this);
+  connect(_listview, SIGNAL(clicked(QListViewItem *)), SLOT(itemClicked(QListViewItem *)));
+  connect(_listview, SIGNAL(contextMenuRequested(QListViewItem *, const QPoint &, int)),
+          SLOT(contextMenu(QListViewItem *, const QPoint &, int)));
+  _listview->setAllColumnsShowFocus(true);
+  _listview->addColumn(i18n("Status"));
+  _listview->addColumn(i18n("Location"));
+  _listview->addColumn(i18n("Address"));
+  top->addWidget(_listview);
+}
+
+void Breakpoint::View::updateView()
+{
+  // #### flickering...
+  _listview->clear();
+  for (uint i=0; i<Breakpoint::list().count(); i++) {
+    const Data &data = Breakpoint::list().data(i);
+    KListViewItem *item = new ListViewItem(_listview, data);
+    item->setPixmap(0, TextEditor::pixmap(Debugger::manager->breakpointType(data)));
+    item->setText(1, data.url.filename() + ":" + QString::number(data.line));
+    Address address = Breakpoint::list().address(data);
+    if ( address.isValid() ) item->setText(2, toHexLabelAbs(address));
+    else if ( Debugger::manager->coff() ) item->setText(2, i18n("Non-code breakpoint"));
+    else item->setText(2, "---");
+  }
+}
+
+void Breakpoint::View::itemClicked(QListViewItem *item)
+{
+  if ( item==0 ) return;
+  const Data &data = static_cast<ListViewItem *>(item)->data();
+  Address address = Breakpoint::list().address(data);
+  TextEditor *editor = ::qt_cast<TextEditor *>(Main::currentEditor());
+  const Coff::TextObject *coff = Debugger::manager->coff();
+  int line = -1;
+  if ( coff && editor && editor->fileType()==PURL::Coff && address.isValid() )
+    line = coff->lineForAddress(editor->url(), address);
+  if ( line==-1 ) {
+    editor = ::qt_cast<TextEditor *>(Main::editorManager().openEditor(data.url));
+    line = data.line;
+  }
+  if ( editor==0 ) return;
+  editor->show();
+  editor->setCursor(line, 0);
+}
+
+void Breakpoint::View::contextMenu(QListViewItem *item, const QPoint &pos, int)
+{
+  _currentData = (item ? &static_cast<ListViewItem *>(item)->data() : 0);
+  updateActions(_currentData);
+  Main::popup("breakpoint_context_menu").exec(pos);
+  _currentData = 0;
+}
diff --git a/src/libgui/breakpoint_view.h b/src/libgui/breakpoint_view.h
new file mode 100644
index 0000000..984a7ed
--- /dev/null
+++ b/src/libgui/breakpoint_view.h
@@ -0,0 +1,48 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef BREAKPOINT_VIEW_H
+#define BREAKPOINT_VIEW_H
+
+#include "progs/manager/breakpoint.h"
+#include "common/gui/list_view.h"
+
+namespace Breakpoint
+{
+//----------------------------------------------------------------------------
+class ListViewItem : public KListViewItem
+{
+public:
+  ListViewItem(ListView *parent, const Data &data);
+  const Data &data() const { return _data; }
+
+private:
+  Data _data;
+};
+
+//----------------------------------------------------------------------------
+class View : public QWidget, public GenericView
+{
+Q_OBJECT
+public:
+  View(QWidget *parent);
+  virtual void updateView();
+  const Data *currentData() const { return _currentData; }
+
+private slots:
+  void itemClicked(QListViewItem *item);
+  void contextMenu(QListViewItem *item, const QPoint &pos, int col);
+
+private:
+  ListView   *_listview;
+  const Data *_currentData;
+};
+
+} // namespace
+
+#endif
diff --git a/src/libgui/config_center.cpp b/src/libgui/config_center.cpp
new file mode 100644
index 0000000..530cbbf
--- /dev/null
+++ b/src/libgui/config_center.cpp
@@ -0,0 +1,132 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2004 Alain Gibaud <alain.gibaud@free.fr>                *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "config_center.h"
+
+#include <qlabel.h>
+#include <qlayout.h>
+#include <qtooltip.h>
+#include <qgroupbox.h>
+#include <qtabwidget.h>
+#include <qtimer.h>
+#include <kiconloader.h>
+#include <klocale.h>
+#include <klistview.h>
+
+#include "global_config.h"
+#include "device_gui.h"
+#include "tools/list/tools_config_widget.h"
+#include "progs/gui/prog_config_center.h"
+#include "progs/gui/debug_config_center.h"
+#include "tools/list/compile_config.h"
+
+//----------------------------------------------------------------------------
+GlobalConfigWidget::GlobalConfigWidget()
+{
+  uint row = numRows();
+  _showDebug = new KeyComboBox<Log::DebugLevel>(this);
+  FOR_EACH(Log::DebugLevel, level) _showDebug->appendItem(level, level.label());
+  addWidget(_showDebug->widget(), row,row, 0,0);
+  row++;
+}
+
+void GlobalConfigWidget::loadConfig()
+{
+  BaseGlobalConfigWidget::loadConfig();
+  _showDebug->setCurrentItem(GlobalConfig::debugLevel());
+}
+
+void GlobalConfigWidget::saveConfig()
+{
+  BaseGlobalConfigWidget::saveConfig();
+  GlobalConfig::writeDebugLevel(_showDebug->currentItem());
+}
+
+QPixmap GlobalConfigWidget::pixmap() const
+{
+  KIconLoader loader;
+  return loader.loadIcon("configure", KIcon::Toolbar, KIcon::SizeMedium);
+}
+
+//----------------------------------------------------------------------------
+StandaloneConfigWidget::StandaloneConfigWidget()
+  : ConfigWidget(0)
+{
+  uint row = 0;
+
+  QLabel *label = new QLabel(i18n("Device:"), this);
+  addWidget(label, row,row, 0,0);
+  _device = new DeviceChooser::Button(true, this);
+  addWidget(_device, row,row, 1,1);
+  row++;
+
+  _tools = new ToolsConfigWidget(0, this);
+  addWidget(_tools, row,row, 0,2);
+  row++;
+
+  setColStretch(2, 1);
+}
+
+void StandaloneConfigWidget::loadConfig()
+{
+  _device->setDevice(Compile::Config::device(0));
+  _tools->loadConfig();
+}
+
+void StandaloneConfigWidget::saveConfig()
+{
+  Compile::Config::setDevice(0, _device->device());
+  _tools->saveConfig();
+}
+
+QPixmap StandaloneConfigWidget::pixmap() const
+{
+  KIconLoader loader;
+  return loader.loadIcon("configure", KIcon::Toolbar, KIcon::SizeMedium);
+}
+
+//----------------------------------------------------------------------------
+ConfigWidget *ConfigCenter::factory(Type type)
+{
+  switch (type) {
+    case General:      return new GlobalConfigWidget;
+    case ProgSelect:   return new Programmer::SelectConfigWidget;
+    case ProgOptions:  return new Programmer::OptionsConfigWidget;
+    case DebugOptions: return new Debugger::OptionsConfigWidget;
+    case Standalone:   return new StandaloneConfigWidget;
+    case Nb_Types:     break;
+  }
+  Q_ASSERT(false);
+  return 0;
+}
+
+ConfigCenter::ConfigCenter(Type showType, QWidget *parent)
+  : Dialog(IconList, i18n("Configure Piklab"), Ok|Cancel, Cancel, parent, "configure_piklab_dialog", true, false)
+{
+  for (uint i=0; i<Nb_Types; i++) {
+    _configWidgets[i] = factory(Type(i));
+    _configWidgets[i]->loadConfig();
+    _pages[i] = addPage(_configWidgets[i]->title(), _configWidgets[i]->header(), _configWidgets[i]->pixmap());
+    QVBoxLayout *vbox = new QVBoxLayout(_pages[i]);
+    _configWidgets[i]->reparent(_pages[i], QPoint(0,0));
+    vbox->addWidget(_configWidgets[i]);
+  }
+  showPage(showType);
+}
+
+void ConfigCenter::slotApply()
+{
+  for (uint i=0; i<Nb_Types; i++) _configWidgets[i]->saveConfig();
+}
+
+void ConfigCenter::slotOk()
+{
+  slotApply();
+  accept();
+}
diff --git a/src/libgui/config_center.h b/src/libgui/config_center.h
new file mode 100644
index 0000000..1e543b7
--- /dev/null
+++ b/src/libgui/config_center.h
@@ -0,0 +1,85 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2004 Alain Gibaud <alain.gibaud@free.fr>                *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef CONFIG_CENTER_H
+#define CONFIG_CENTER_H
+
+#include <qcheckbox.h>
+#include <qlineedit.h>
+#include <qwidgetstack.h>
+
+#include "common/gui/key_gui.h"
+#include "common/gui/dialog.h"
+#include "progs/gui/prog_config_widget.h"
+#include "global_config.h"
+namespace DeviceChooser { class Button; }
+class SelectDirectoryWidget;
+class ToolsConfigWidget;
+
+//----------------------------------------------------------------------------
+BEGIN_DECLARE_CONFIG_WIDGET(BaseGlobalConfig, BaseGlobalConfigWidget)
+END_DECLARE_CONFIG_WIDGET
+
+class GlobalConfigWidget : public BaseGlobalConfigWidget
+{
+Q_OBJECT
+public:
+  GlobalConfigWidget();
+  virtual QString title() const { return i18n("General"); }
+  virtual QString header() const { return i18n("General Configuration"); }
+  virtual QPixmap pixmap() const;
+  virtual void loadConfig();
+
+public slots:
+  virtual void saveConfig();
+
+private:
+  KeyComboBox<Log::DebugLevel> *_showDebug;
+};
+
+//----------------------------------------------------------------------------
+class StandaloneConfigWidget : public ConfigWidget
+{
+  Q_OBJECT
+public:
+  StandaloneConfigWidget();
+  virtual void loadConfig();
+  virtual QString title() const { return i18n("Standalone File"); }
+  virtual QString header() const { return i18n("Standalone File Compilation"); }
+  virtual QPixmap pixmap() const;
+
+public slots:
+  virtual void saveConfig();
+
+private:
+  DeviceChooser::Button *_device;
+  ToolsConfigWidget     *_tools;
+};
+
+//----------------------------------------------------------------------------
+class ConfigCenter : public Dialog
+{
+Q_OBJECT
+public:
+  enum Type { General = 0, ProgSelect, ProgOptions, DebugOptions,
+              Standalone, Nb_Types };
+  ConfigCenter(Type showType, QWidget *parent);
+
+public slots:
+  virtual void slotOk();
+  virtual void slotApply();
+
+private:
+  QWidget      *_pages[Nb_Types];
+  ConfigWidget *_configWidgets[Nb_Types];
+
+  static ConfigWidget *factory(Type type);
+};
+
+#endif
diff --git a/src/libgui/config_gen.cpp b/src/libgui/config_gen.cpp
new file mode 100644
index 0000000..036e62e
--- /dev/null
+++ b/src/libgui/config_gen.cpp
@@ -0,0 +1,189 @@
+/***************************************************************************
+ *   Copyright (C) 2006-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "config_gen.h"
+
+#include <qlayout.h>
+#include <qlabel.h>
+#include <klocale.h>
+
+#include "device_gui.h"
+#include "devices/base/generic_memory.h"
+#include "devices/gui/hex_view.h"
+#include "devices/gui/memory_editor.h"
+#include "devices/base/device_group.h"
+#include "devices/gui/device_group_ui.h"
+#include "devices/list/device_list.h"
+#include "text_editor.h"
+#include "tools/list/tool_list.h"
+
+//-----------------------------------------------------------------------------
+GeneratorDialog::GeneratorDialog(const QString &title, QWidget *parent, const char *name)
+  : Dialog(parent, name, true, title, Close|User1, Close, false, QSize(400, 300))
+{
+  QVBoxLayout *top = new QVBoxLayout(mainWidget(), 10, 10);
+
+  QHBoxLayout *hbox = new QHBoxLayout(top);
+  QLabel *label = new QLabel(i18n("Device:"), mainWidget());
+  hbox->addWidget(label);
+  _deviceChooser = new DeviceChooser::Button(false, mainWidget());
+  connect(_deviceChooser, SIGNAL(changed()), SLOT(reset()));
+  hbox->addWidget(_deviceChooser);
+  hbox->addSpacing(20);
+
+  label = new QLabel(i18n("Toolchain:"), mainWidget());
+  hbox->addWidget(label);
+  _configType = new KeyComboBox<QString>(mainWidget());
+  Tool::Lister::ConstIterator it;
+  for (it=Tool::lister().begin(); it!=Tool::lister().end(); ++it)
+    _configType->appendItem(it.key(), it.data()->label());
+  connect(_configType->widget(), SIGNAL(activated(int)), SLOT(typeChanged()));
+  hbox->addWidget(_configType->widget());
+
+  label = new QLabel(i18n("Tool Type:"), mainWidget());
+  hbox->addWidget(label);
+  _toolType = new KeyComboBox<PURL::ToolType>(mainWidget());
+  FOR_EACH(PURL::ToolType, type) _toolType->appendItem(type, type.label());
+  _toolType->fixMinimumWidth();
+  connect(_toolType->widget(), SIGNAL(activated(int)), SLOT(compute()));
+  hbox->addWidget(_toolType->widget());
+  hbox->addStretch(1);
+
+  _hbox = new QHBoxLayout(top);
+
+  _text = new SimpleTextEditor(false, PURL::Nb_FileTypes, mainWidget());
+  _text->setReadOnly(true);
+  top->addWidget(_text);
+
+  _warning = new QLabel(mainWidget());
+  top->addWidget(_warning);
+
+  setButtonText(User1, i18n("Copy to clipboard"));
+}
+
+void GeneratorDialog::set(const Device::Data *data, const Tool::Group &group, PURL::ToolType stype)
+{
+  QString device;
+  if ( data==0 ) {
+    QValueVector<QString> devices = group.supportedDevices();
+    if ( devices.isEmpty() ) return;
+    device = devices[0];
+  } else device = data->name();
+  _deviceChooser->setDevice(device);
+  _configType->setCurrentItem(group.name());
+  setToolType(stype);
+  reset();
+}
+
+void GeneratorDialog::typeChanged()
+{
+  setToolType(PURL::ToolType::Nb_Types);
+  compute();
+}
+
+void GeneratorDialog::setToolType(PURL::ToolType stype)
+{
+  const Tool::Group *group = Tool::lister().group(_configType->currentItem());
+  _toolType->clear();
+  FOR_EACH(PURL::ToolType, type)
+    if ( group->implementationType(type)!=PURL::Nb_FileTypes ) _toolType->appendItem(type, type.label());
+  _toolType->setCurrentItem(stype);
+  _toolType->widget()->setEnabled( _toolType->count()>=2 );
+}
+
+PURL::ToolType GeneratorDialog::toolType() const
+{
+  return _toolType->currentItem();
+}
+
+void GeneratorDialog::compute()
+{
+  const Tool::Group *group = Tool::lister().group(_configType->currentItem());
+  _warning->hide();
+  if ( group->isSupported(_deviceChooser->device()) ) {
+    const Tool::SourceGenerator *generator = group->sourceGenerator();
+    if ( generator==0 ) {
+      _text->setFileType(PURL::Nb_FileTypes);
+      _text->setText(i18n("Generation is not supported yet for the selected toolchain or device."));
+    } else {
+      bool ok = true;
+      PURL::FileType type = group->implementationType(toolType());
+      SourceLine::List lines = generateLines(ok);
+      if ( ok && lines.isEmpty() ) {
+        _text->setFileType(PURL::Nb_FileTypes);
+        _text->setText(i18n("This toolchain does not need explicit config bits."));
+      } else {
+        _text->setFileType(type);
+        _text->setText(SourceLine::text(type.data().sourceFamily, lines, 4));
+      }
+      if ( !ok ) {
+        _warning->show();
+        _warning->setText(i18n("Generation is only partially supported for this device."));
+      }
+    }
+  } else {
+   _text->setFileType(PURL::Nb_FileTypes);
+    if ( group->supportedDevices().isEmpty() ) _text->setText(i18n("Could not detect supported devices for selected toolchain. Please check installation."));
+    else _text->setText(i18n("Device not supported by the selected toolchain."));
+  }
+}
+
+void GeneratorDialog::slotUser1()
+{
+  _text->selectAll();
+  _text->copy();
+  _text->deselect();
+}
+
+//-----------------------------------------------------------------------------
+ConfigGenerator::ConfigGenerator(QWidget *parent)
+  : GeneratorDialog(i18n("Config Generator"), parent, "config_generator"), _memory(0), _configEditor(0)
+{}
+
+ConfigGenerator::~ConfigGenerator()
+{
+  delete _memory;
+}
+
+void ConfigGenerator::reset()
+{
+  delete _memory;
+  const Device::Data *data = Device::lister().data(_deviceChooser->device());
+  _memory = data->group().createMemory(*data);
+  delete _configEditor;
+  _configEditor = Device::groupui(*data).createConfigEditor(*_memory, mainWidget());
+  if (_configEditor) {
+    _configEditor->show();
+    connect(_configEditor, SIGNAL(modified()), SLOT(compute()));
+    _configEditor->updateDisplay();
+    _hbox->addWidget(_configEditor);
+  }
+  compute();
+}
+
+SourceLine::List ConfigGenerator::generateLines(bool &ok) const
+{
+  const Tool::Group *group = Tool::lister().group(_configType->currentItem());
+  const Tool::SourceGenerator *generator = group->sourceGenerator();
+  Q_ASSERT(generator);
+  return generator->configLines(toolType(), *_memory, ok);
+}
+
+//-----------------------------------------------------------------------------
+TemplateGenerator::TemplateGenerator(QWidget *parent)
+  : GeneratorDialog(i18n("Template Generator"), parent, "template_generator")
+{}
+
+SourceLine::List TemplateGenerator::generateLines(bool &ok) const
+{
+  const Tool::Group *group = Tool::lister().group(_configType->currentItem());
+  const Tool::SourceGenerator *generator = group->sourceGenerator();
+  Q_ASSERT(generator);
+  const Device::Data *data = Device::lister().data(_deviceChooser->device());
+  return generator->templateSourceFile(toolType(), *data, ok);
+}
diff --git a/src/libgui/config_gen.h b/src/libgui/config_gen.h
new file mode 100644
index 0000000..fa9fd56
--- /dev/null
+++ b/src/libgui/config_gen.h
@@ -0,0 +1,82 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef CONFIG_GEN_H
+#define CONFIG_GEN_H
+
+class QHBoxLayout;
+class QLabel;
+
+#include "common/gui/dialog.h"
+#include "tools/base/tool_group.h"
+#include "common/gui/key_gui.h"
+namespace DeviceChooser { class Button; }
+namespace Device {
+  class Memory;
+  class MemoryEditor;
+}
+class SimpleTextEditor;
+
+//-----------------------------------------------------------------------------
+class GeneratorDialog : public Dialog
+{
+Q_OBJECT
+public:
+  GeneratorDialog(const QString &title, QWidget *parent, const char *name);
+  void set(const Device::Data *data, const Tool::Group &group, PURL::ToolType stype);
+
+protected slots:
+  void typeChanged();
+  virtual void reset() { compute(); }
+  virtual void compute();
+  virtual void slotUser1();
+
+protected:
+  QHBoxLayout       *_hbox;
+  DeviceChooser::Button *_deviceChooser;
+  KeyComboBox<QString> *_configType;
+  KeyComboBox<PURL::ToolType> *_toolType;
+  SimpleTextEditor  *_text;
+  QLabel            *_warning;
+
+  PURL::ToolType toolType() const;
+  void setToolType(PURL::ToolType stype);
+  virtual SourceLine::List generateLines(bool &ok) const = 0;
+};
+
+//-----------------------------------------------------------------------------
+class ConfigGenerator : public GeneratorDialog
+{
+Q_OBJECT
+public:
+  ConfigGenerator(QWidget *parent);
+  virtual ~ConfigGenerator();
+
+private slots:
+  virtual void reset();
+
+private:
+  Device::Memory       *_memory;
+  Device::MemoryEditor *_configEditor;
+
+  void setToolType(PURL::ToolType stype);
+  virtual SourceLine::List generateLines(bool &ok) const;
+};
+
+//-----------------------------------------------------------------------------
+class TemplateGenerator : public GeneratorDialog
+{
+Q_OBJECT
+public:
+  TemplateGenerator(QWidget *parent);
+
+private:
+  virtual SourceLine::List generateLines(bool &ok) const;
+};
+
+#endif
diff --git a/src/libgui/console.cpp b/src/libgui/console.cpp
new file mode 100644
index 0000000..99c996c
--- /dev/null
+++ b/src/libgui/console.cpp
@@ -0,0 +1,42 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "console.h"
+
+#include <qlayout.h>
+#include <qlabel.h>
+#include <qdir.h>
+#include <klibloader.h>
+#include <klocale.h>
+#include <kparts/part.h>
+#include <kde_terminal_interface.h>
+
+ConsoleView::ConsoleView(QWidget *parent)
+  : QWidget(parent, "console_view"), _initialized(false)
+{}
+
+void ConsoleView::showEvent(QShowEvent *e)
+{
+  if ( !_initialized ) {
+    _initialized = true;
+    KLibFactory *factory = KLibLoader::self()->factory("libkonsolepart");
+    QVBoxLayout *top = new QVBoxLayout(this, 0, 10);
+    if ( factory==0 ) {
+      QLabel *label = new QLabel(i18n("Could not find \"konsolepart\"; please install kdebase."), this);
+      label->show();
+      top->addWidget(label);
+      return;
+    } else {
+      QWidget *pwidget = static_cast<KParts::Part *>(factory->create(this, "konsole"))->widget();
+      pwidget->show();
+      top->addWidget(pwidget);
+      setFocusProxy(pwidget);
+    }
+  }
+  QWidget::showEvent(e);
+}
diff --git a/src/libgui/console.h b/src/libgui/console.h
new file mode 100644
index 0000000..e073754
--- /dev/null
+++ b/src/libgui/console.h
@@ -0,0 +1,27 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef CONSOLE_H
+#define CONSOLE_H
+
+#include <qwidget.h>
+
+class ConsoleView : public QWidget
+{
+Q_OBJECT
+public:
+  ConsoleView(QWidget *parent);
+
+protected:
+  virtual void showEvent(QShowEvent *e);
+
+private:
+  bool _initialized;
+};
+
+#endif
diff --git a/src/libgui/device_editor.cpp b/src/libgui/device_editor.cpp
new file mode 100644
index 0000000..7a2a3c6
--- /dev/null
+++ b/src/libgui/device_editor.cpp
@@ -0,0 +1,141 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "device_editor.h"
+
+#include <qscrollview.h>
+#include <qregexp.h>
+
+#include "devices/list/device_list.h"
+#include "toplevel.h"
+#include "gui_debug_manager.h"
+#include "project_manager.h"
+#include "common/global/pfile.h"
+#include "main_global.h"
+
+DeviceEditor::DeviceEditor(const QString &title, const QString &tag, QWidget *parent, const char *name)
+  : Editor(title, tag, parent, name), _view(0)
+{
+  init();
+}
+
+DeviceEditor::DeviceEditor(QWidget *parent, const char *name)
+  : Editor(parent, name), _view(0)
+{
+  init();
+}
+
+void DeviceEditor::init()
+{
+  QHBoxLayout *hbox = new QHBoxLayout(this, 0);
+  QScrollView *sview = new QScrollView(this, "scroll_view");
+  sview->setResizePolicy(QScrollView::AutoOneFit);
+  hbox->addWidget(sview);
+  _widget = new QWidget(sview->viewport(), "main_scroll_widget");
+  sview->addChild(_widget);
+  _top = new QVBoxLayout(_widget, 0, 0);
+  _labelDevice = new QLabel(_widget);
+  _labelDevice->setMargin(10);
+  _labelDevice->setTextFormat(RichText);
+  _top->addWidget(_labelDevice);
+  _labelWarning = new QLabel(_widget);
+  _labelWarning->setMargin(10);
+  _labelWarning->setTextFormat(RichText);
+  _top->addWidget(_labelWarning);
+  _vbox = new QVBoxLayout(_top);
+
+  connect(&Main::toplevel(), SIGNAL(stateChanged()), SLOT(updateDevice()));
+}
+
+void DeviceEditor::setDevice(bool force)
+{
+  if ( Main::device()==Device::AUTO_DATA.name ) {
+    PURL::Url url = Main::projectManager().projectUrl();
+    QString name = guessDeviceFromFile(url);
+    if ( !force && name==_device ) return;
+    _device = name;
+    if ( name==Device::AUTO_DATA.name )
+      _labelDevice->setText(i18n("The target device is not configured and cannot be guessed from source file. "
+                                 "The source file either cannot be found or does not contain any processor directive."));
+    else _labelDevice->setText(i18n("Device guessed from file: %1").arg(name));
+    _labelDevice->show();
+  } else {
+    if ( !force && Main::device()==_device ) return;
+    _device = Main::device();
+    _labelDevice->hide();
+  }
+  if ( _view && isModified() ) {
+    if ( MessageBox::questionYesNo(i18n("File %1 not saved.").arg(filename()), KStdGuiItem::save(), KStdGuiItem::discard()) )
+      Editor::save();
+  }
+  _labelWarning->hide();
+  const Device::Data *data = Device::lister().data(_device);
+  delete _view;
+  _view = createView(data, _widget);
+  if (_view) {
+    _view->show();
+    _vbox->addWidget(_view);
+    updateGeometry();
+  }
+  setModified(false);
+  emit guiChanged();
+}
+
+PURL::Url DeviceEditor::findAsmFile(const PURL::Url &url)
+{
+  if ( url.isEmpty() ) return PURL::Url();
+  PURL::SourceFamily family = url.fileType().data().sourceFamily;
+  if ( family.data().toolType==PURL::ToolType::Assembler ) return url;
+  FOR_EACH(PURL::FileType, i) {
+    PURL::SourceFamily source = i.data().sourceFamily;
+    if ( source.data().toolType!=PURL::ToolType::Assembler ) continue;
+    for (uint k=0; i.data().extensions[k]; k++) {
+      PURL::Url src = url.toExtension(i.data().extensions[k]);
+      if ( PURL::findExistingUrl(src) ) return src;
+    }
+  }
+  return PURL::Url();
+}
+
+QString DeviceEditor::guessDeviceFromFile(const PURL::Url &url)
+{
+  PURL::Url src = findAsmFile(url);
+  if ( src.isEmpty() ) return Device::AUTO_DATA.name;
+  Log::StringView sview;
+  PURL::File file(src, sview);
+  if ( !file.openForRead() ) return Device::AUTO_DATA.name;
+
+  QString device;
+  //   QRegExp re1("^[ \\t]+(?:PROCESSOR|processor)[ \\t]+((?:p|sx|P|SX)[a-z0-9A-Z]+)" ) ;
+  QRegExp re1("^[ \\t]+(?:PROCESSOR|processor)[ \\t]+([a-z0-9A-Z]+)" ) ;
+  QRegExp re2("^[ \\t]+(?:LIST|list)[ \\t]+" ) ;
+  for (;;) {
+    QString line = file.readLine();
+    if ( line.isNull() ) break;
+    // search PROCESSOR directive
+    if ( re1.search(line, 0)!=-1 ) {
+      device = re1.cap(1);
+      break;
+    }
+    // search LIST p=... directive
+    int k = re2.search(line,0);
+    if ( k!=-1 ) {
+      //QRegExp re3("(?:p|P)[ \\t]*=[ \\t]*((?:p|sx|P|SX)[a-z0-9A-Z]+)") ;
+      QRegExp re3("(?:p|P)[ \\t]*=[ \\t]*([a-z0-9A-Z]+)") ;
+      if ( re3.search(line, k+5)!=-1 ) {
+        device = re3.cap(1);
+        break;
+      }
+    }
+  }
+  device = device.upper();
+  if( device[0]=='P') return device.mid(1);
+  if ( Device::lister().data(device)==0 ) return Device::AUTO_DATA.name;
+  return device;
+}
diff --git a/src/libgui/device_editor.h b/src/libgui/device_editor.h
new file mode 100644
index 0000000..8b7cab7
--- /dev/null
+++ b/src/libgui/device_editor.h
@@ -0,0 +1,47 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DEVICE_EDITOR_H
+#define DEVICE_EDITOR_H
+
+#include "editor.h"
+namespace Device { class Data; }
+
+class DeviceEditor : public Editor
+{
+Q_OBJECT
+public:
+  DeviceEditor(const QString &title, const QString &tag, QWidget *parent, const char *name);
+  DeviceEditor(QWidget *parent, const char *name);
+  virtual PURL::FileType fileType() const { return PURL::Nb_FileTypes; }
+  virtual PURL::Url url() const { return PURL::Url(); }
+  virtual void setDevice(bool force = false);
+  static QString guessDeviceFromFile(const PURL::Url &url);
+  virtual bool save(const PURL::Url &) { return false; }
+  virtual bool open(const PURL::Url &) { return true; }
+  virtual QValueList<uint> bookmarkLines() const { return QValueList<uint>(); }
+  virtual void setBookmarkLines(const QValueList<uint> &) {}
+
+public slots:
+  virtual void statusChanged() { emit statusTextChanged("  "); }
+
+protected:
+  QString      _device;
+  QWidget     *_widget, *_view;
+  QVBoxLayout *_top, *_vbox;
+  QLabel      *_labelDevice, *_labelWarning;
+
+  void init();
+  virtual QWidget *createView(const Device::Data *data, QWidget *parent) = 0;
+  static PURL::Url findAsmFile(const PURL::Url &url);
+
+private slots:
+  void updateDevice() { setDevice(); }
+};
+
+#endif
diff --git a/src/libgui/device_gui.cpp b/src/libgui/device_gui.cpp
new file mode 100644
index 0000000..8183725
--- /dev/null
+++ b/src/libgui/device_gui.cpp
@@ -0,0 +1,463 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "device_gui.h"
+
+#include <qlayout.h>
+#include <qpainter.h>
+#include <qcombobox.h>
+#include <qlabel.h>
+#include <qcheckbox.h>
+#include <qsplitter.h>
+#include <kiconloader.h>
+#include <kpushbutton.h>
+#include <klistview.h>
+#include <klocale.h>
+
+#include "devices/list/device_list.h"
+#include "devices/base/device_group.h"
+#include "devices/gui/device_group_ui.h"
+#include "progs/list/prog_list.h"
+#include "tools/list/device_info.h"
+#include "tools/list/tool_list.h"
+
+namespace DeviceChooser
+{
+//-----------------------------------------------------------------------------
+void DeviceChooser::Config::writeProgrammerGroup(const Programmer::Group *group)
+{
+  writeEntry("programmer", group ? group->name() : QString::null);
+}
+const Programmer::Group *DeviceChooser::Config::programmerGroup()
+{
+  QString name = readEntry("programmer", QString::null);
+  return Programmer::lister().group(name);
+}
+
+void DeviceChooser::Config::writeToolGroup(const Tool::Group *group)
+{
+  writeEntry("tool", group ? group->name() : QString::null);
+}
+const Tool::Group *DeviceChooser::Config::toolGroup()
+{
+  QString name = readEntry("tool", QString::null);
+  return Tool::lister().group(name);
+}
+
+//-----------------------------------------------------------------------------
+class ListItem : public KListViewItem
+{
+public:
+  ListItem(KListView *list, const QString &name, bool selectable, bool isDevice)
+    : KListViewItem(list, name), _device(isDevice) {
+    setSelectable(selectable);
+  }
+  ListItem(KListViewItem *item, const QString &name)
+    : KListViewItem(item, name), _device(true) {}
+
+  bool isDevice() const { return _device; }
+  virtual void paintCell(QPainter *p, const QColorGroup &cg, int column, int width, int align) {
+    QColorGroup ncg = cg;
+    if (_device) {
+      const Device::Data *device = Device::lister().data(text(0));
+      Q_ASSERT(device);
+      ncg.setColor(QColorGroup::Text, Device::statusColor(device->status()));
+    }
+    KListViewItem::paintCell(p, ncg, column, width, align);
+  }
+
+private:
+  bool _device;
+};
+
+} // namespace
+
+//-----------------------------------------------------------------------------
+const DeviceChooser::ListType::Data DeviceChooser::ListType::DATA[Nb_Types] = {
+  { "family_tree", I18N_NOOP("Family Tree") },
+  { "flat",        I18N_NOOP("Flat List")   }
+};
+
+DeviceChooser::Dialog::Dialog(const QString &device, Type type, QWidget *parent)
+  : ::Dialog(parent, "device_chooser_dialog", true, i18n("Select a device"),
+             Ok|Close, Close, false, QSize(400, 300)), _withAuto(type==ChooseWithAuto)
+{
+  setButtonOK(KGuiItem(i18n( "&Select"), "button_ok"));
+  QVBoxLayout *top = new QVBoxLayout(mainWidget(), 0, 10);
+
+  // view
+  QHBoxLayout *hbox = new QHBoxLayout(top, 10);
+  QVBoxLayout *vbox = new QVBoxLayout(hbox);
+  _listTypeCombo = new EnumComboBox<ListType>("list_type", mainWidget());
+  connect(_listTypeCombo->combo(), SIGNAL(activated(int)), SLOT(updateList()));
+  vbox->addWidget(_listTypeCombo->combo());
+  QPushButton *button = new KPushButton(KGuiItem(i18n("Reset Filters"), "reload"), mainWidget());
+  connect(button, SIGNAL(clicked()), SLOT(resetFilters()));
+  vbox->addWidget(button);
+  vbox->addStretch(1);
+
+  // filters
+  QFrame *frame = new QFrame(mainWidget());
+  frame->setFrameStyle(QFrame::Panel | QFrame::Raised);
+  frame->setMargin(5);
+  hbox->addWidget(frame);
+  hbox = new QHBoxLayout(frame, 10, 10);
+  QLabel *label = new QLabel(i18n("Filters:"), frame);
+  hbox->addWidget(label);
+  vbox = new QVBoxLayout(hbox);
+
+  QHBoxLayout *shbox = new QHBoxLayout(vbox);
+
+  // programmer filter
+  _programmerCombo = new KeyComboBox<QString>(frame);
+  _programmerCombo->appendItem("<all>", i18n("<Programmer>"));
+  Programmer::Lister::ConstIterator pit;
+  for (pit=Programmer::lister().begin(); pit!=Programmer::lister().end(); ++pit)
+    _programmerCombo->appendItem(pit.key(), pit.data()->label());
+  Config config;
+  const Programmer::Group *pgroup = config.programmerGroup();
+  if (pgroup) _programmerCombo->setCurrentItem(pgroup->name());
+  connect(_programmerCombo->widget(), SIGNAL(activated(int)), SLOT(updateList()));
+  shbox->addWidget(_programmerCombo->widget());
+
+  // tool filter
+  _toolCombo = new KeyComboBox<QString>(frame);
+  _toolCombo->appendItem("<all>", i18n("<Toolchain>"));
+  Tool::Lister::ConstIterator tit;
+  for (tit=Tool::lister().begin(); tit!=Tool::lister().end(); ++tit) {
+    if ( tit.data()->isCustom() ) continue;
+    _toolCombo->appendItem(tit.key(), tit.data()->label());
+  }
+  const Tool::Group *tgroup = config.toolGroup();
+  if (tgroup) _toolCombo->setCurrentItem(tgroup->name());
+  connect(_toolCombo->widget(), SIGNAL(activated(int)), SLOT(updateList()));
+  shbox->addWidget(_toolCombo->widget());
+
+  // memory filter
+  _memoryCombo = new EnumComboBox<Device::MemoryTechnology>(i18n("<Memory Type>"), "memory_technology", frame);
+  connect(_memoryCombo->combo(), SIGNAL(activated(int)), SLOT(updateList()));
+  shbox->addWidget(_memoryCombo->combo());
+
+  shbox->addStretch(1);
+  shbox = new QHBoxLayout(vbox);
+
+  // status filter
+  _statusCombo = new EnumComboBox<Device::Status>(i18n("<Status>"), "status", frame);
+  connect(_statusCombo->combo(), SIGNAL(activated(int)), SLOT(updateList()));
+  shbox->addWidget(_statusCombo->combo());
+
+  // features filter
+  _featureCombo = new EnumComboBox<Pic::Feature>(i18n("<Feature>"), "feature", frame);
+  connect(_featureCombo->combo(), SIGNAL(activated(int)), SLOT(updateList()));
+  shbox->addWidget(_featureCombo->combo());
+
+  shbox->addStretch(1);
+
+  // list view
+  QValueList<int> widths;
+  widths += 80;
+  widths += 500;
+  Splitter *splitter = new Splitter(widths, Horizontal, mainWidget(), "device_shooser_splitter");
+  top->addWidget(splitter, 1);
+  _listView = new KListView(splitter);
+  connect(_listView, SIGNAL(currentChanged(QListViewItem *)),
+          SLOT(currentChanged(QListViewItem *)));
+  connect(_listView, SIGNAL(doubleClicked(QListViewItem *, const QPoint &, int)),
+          SLOT(listDoubleClicked(QListViewItem *)));
+  _listView->setAllColumnsShowFocus(true);
+  _listView->setRootIsDecorated(true);
+  _listView->setSorting(-1);
+  _listView->addColumn(i18n("Device"));
+  _listView->setResizeMode(QListView::LastColumn);
+
+  // device view
+  _deviceView = new View(splitter);
+  connect(_deviceView, SIGNAL(deviceChanged(const QString &)),
+          SLOT(deviceChange(const QString &)));
+
+  updateList(device);
+}
+
+DeviceChooser::Dialog::~Dialog()
+{
+  Config config;
+  config.writeProgrammerGroup(programmerGroup());
+  config.writeToolGroup(toolGroup());
+  _listTypeCombo->writeConfig();
+  _memoryCombo->writeConfig();
+  _statusCombo->writeConfig();
+  _featureCombo->writeConfig();
+}
+
+QString DeviceChooser::Dialog::device() const
+{
+  QListViewItem *item = _listView->selectedItem();
+  if ( item==0 || !static_cast<ListItem *>(item)->isDevice() ) return Device::AUTO_DATA.name;
+  return item->text(0);
+}
+
+void DeviceChooser::Dialog::listDoubleClicked(QListViewItem *item)
+{
+  if ( item==0 ) return;
+  if ( !static_cast<ListItem *>(item)->isDevice() ) item->setOpen(!item->isOpen());
+  else accept();
+}
+
+void DeviceChooser::Dialog::currentChanged(QListViewItem *item)
+{
+  if ( item==0 || !static_cast<ListItem *>(item)->isDevice() ) _deviceView->clear();
+  else _deviceView->setDevice(item->text(0), false);
+}
+
+void DeviceChooser::Dialog::deviceChange(const QString &name)
+{
+  QListViewItemIterator it(_listView);
+  for (; it.current(); ++it)
+    if ( it.current()->text(0)==name ) {
+      _listView->setSelected(it.current(), true);
+      _listView->ensureItemVisible(it.current());
+      break;
+    }
+}
+
+void DeviceChooser::Dialog::resetFilters()
+{
+  _programmerCombo->setCurrentItem("<all>");
+  _toolCombo->setCurrentItem("<all>");
+  _memoryCombo->reset();
+  _statusCombo->reset();
+  _featureCombo->reset();
+  updateList();
+}
+
+void DeviceChooser::Dialog::updateList()
+{
+  QListViewItem *item = _listView->selectedItem();
+  QString device = (item ? item->text(0) : QString::null);
+  _listView->clear();
+  updateList(device);
+}
+
+const Programmer::Group *DeviceChooser::Dialog::programmerGroup() const
+{
+  return Programmer::lister().group(_programmerCombo->currentItem());
+}
+
+const Tool::Group *DeviceChooser::Dialog::toolGroup() const
+{
+  return Tool::lister().group(_toolCombo->currentItem());
+}
+
+void DeviceChooser::Dialog::updateList(const QString &device)
+{
+  QValueVector<QString> list = Device::lister().supportedDevices();
+  QMap<QString, KListViewItem *> groups;
+  QListViewItem *selected = 0;
+  const Programmer::Group *pgroup = programmerGroup();
+  if ( pgroup && pgroup->supportedDevices().isEmpty() && pgroup->isSoftware() ) {
+    _deviceView->setText(i18n("Could not detect supported devices for \"%1\". Please check installation.").arg(pgroup->label()));
+    return;
+  }
+  const Tool::Group *tgroup = toolGroup();
+  if ( tgroup && tgroup->supportedDevices().isEmpty() ) {
+    _deviceView->setText(i18n("Could not detect supported devices for toolchain \"%1\". Please check installation.").arg(tgroup->label()));
+    return;
+  }
+  for (int i=list.count()-1; i>=0; i--) {
+    if ( pgroup && !pgroup->isSupported(list[i]) ) continue;
+    if ( tgroup && !tgroup->isSupported(list[i]) ) continue;
+    const Device::Data *data = Device::lister().data(list[i]);
+    Q_ASSERT(data);
+    if ( _memoryCombo->value()!=Device::MemoryTechnology::Nb_Types && data->memoryTechnology()!=_memoryCombo->value() ) continue;
+    if ( _statusCombo->value()!=Device::Status::Nb_Types && data->status()!=_statusCombo->value() ) continue;
+    if ( _featureCombo->value()!=Pic::Feature::Nb_Types ) {
+      if ( data->group().name()!="pic" ) continue;
+      if ( !static_cast<const Pic::Data *>(data)->hasFeature(_featureCombo->value()) ) continue;
+    }
+    KListViewItem *item = 0;
+    switch (_listTypeCombo->value().type()) {
+      case ListType::FamilyTree: {
+        QString gname = data->listViewGroup();
+        if ( !groups.contains(gname) )
+          groups[gname] = new ListItem(_listView, gname, false, false);
+        item = new ListItem(groups[gname], list[i]);
+        break;
+      }
+      case ListType::Flat:
+        item = new ListItem(_listView, list[i], true, true);
+        break;
+      case ListType::Nb_Types: Q_ASSERT(false); break;
+    }
+    if ( device==list[i] ) selected = item;
+  }
+  if (_withAuto) (void)new ListItem(_listView, i18n(Device::AUTO_DATA.label), true, false);
+  if ( selected==0 ) selected = _listView->firstChild();
+  if (selected) {
+    _listView->setSelected(selected, true);
+    _listView->ensureItemVisible(selected);
+    currentChanged(selected);
+  }
+}
+
+//-----------------------------------------------------------------------------
+DeviceChooser::ComboBox::ComboBox(bool withAuto, QWidget *parent)
+  : QComboBox(parent, "device_chooser_combo"), _withAuto(withAuto)
+{
+  if (withAuto) insertItem(i18n(Device::AUTO_DATA.label));
+  Device::Lister::ConstIterator it;
+  for (it=Device::lister().begin(); it!=Device::lister().end(); ++it) {
+    QValueVector<QString> devices = it.data()->supportedDevices();
+    qHeapSort(devices);
+    for (uint k=0; k<devices.count(); k++) insertItem(devices[k]);
+  }
+}
+
+void DeviceChooser::ComboBox::setDevice(const QString &device, const Device::Data *data)
+{
+  QString text = device;
+  if ( device.isEmpty() || device==Device::AUTO_DATA.name ) {
+    if (_withAuto) text = QString::null;
+    else text = Device::lister().supportedDevices()[0];
+  }
+  if ( text.isEmpty() ) {
+    if (data) changeItem(data->name() + " " + i18n(Device::AUTO_DATA.label), 0);
+    else changeItem(i18n(Device::AUTO_DATA.label), 0);
+    setCurrentItem(0);
+  } else setCurrentText(text);
+}
+
+QString DeviceChooser::ComboBox::device() const
+{
+  if ( _withAuto && currentItem()==0 ) return Device::AUTO_DATA.name;
+  return currentText();
+}
+
+//-----------------------------------------------------------------------------
+DeviceChooser::Button::Button(bool withAuto, QWidget *parent)
+  : QWidget(parent, "device_chooser_button")
+{
+  QHBoxLayout *hbox = new QHBoxLayout(this, 0, 10);
+  _combo = new ComboBox(withAuto, this);
+  connect(_combo, SIGNAL(activated(int)), SIGNAL(changed()));
+  hbox->addWidget(_combo);
+  KIconLoader loader;
+  QIconSet iconset = loader.loadIcon("fileopen", KIcon::Toolbar);
+  KPushButton *button = new KPushButton(iconset, QString::null, this);
+  connect(button, SIGNAL(clicked()), SLOT(chooseDevice()));
+  hbox->addWidget(button);
+}
+
+void DeviceChooser::Button::chooseDevice()
+{
+  Dialog dialog(_combo->device(), (_combo->withAuto() ? ChooseWithAuto : Choose), this);
+  if ( !dialog.exec() || dialog.device().isEmpty() ) return;
+  _combo->setDevice(dialog.device());
+  emit changed();
+}
+
+//-----------------------------------------------------------------------------
+DeviceChooser::Browser::Browser(QWidget *parent)
+ : KTextBrowser(parent, "device_browser")
+{}
+
+PURL::Url findDocumentUrl(const QString &prefix, const QString &baseName)
+{
+  PURL::Url previous = KURL::fromPathOrURL(prefix + baseName + ".pdf");
+  bool previousExists = previous.exists();
+  for (uint i=0; i<26; i++) {
+    PURL::Url url = KURL::fromPathOrURL(prefix + baseName + QChar('a' + i) + ".pdf");
+    bool exists = url.exists();
+    if ( !exists && previousExists ) return previous;
+    previous = url;
+    previousExists = exists;
+  }
+  return previous;
+}
+
+void DeviceChooser::Browser::setSource(const QString &name)
+{
+  ::BusyCursor bc;
+  if ( name.startsWith("device://") ) emit deviceChanged(name.mid(9));
+  else if ( name.startsWith("document://") ) {
+    QString prefix = "http://ww1.microchip.com/downloads/en/DeviceDoc/";
+    PURL::Url url = findDocumentUrl(prefix, name.mid(11, name.length()-11-1));
+    KTextBrowser::setSource(url.kurl().htmlURL());
+  }
+  else KTextBrowser::setSource(name);
+}
+
+//-----------------------------------------------------------------------------
+DeviceChooser::View::View(QWidget *parent)
+  : TabWidget(parent, "device_view")
+{
+  // Information
+  _info = new Browser(this);
+  _info->setMimeSourceFactory(&_msf);
+  insertTab(_info, i18n("Information"));
+  connect(_info, SIGNAL(deviceChanged(const QString &)),
+          SIGNAL(deviceChanged(const QString &)));
+
+  // Memory Map
+  _memory = new Browser(this);
+  _memory->setMimeSourceFactory(&_msf);
+  insertTab(_memory, i18n("Memory Map"));
+
+  // Voltage-Frequency Graphs
+  _vfg = new Browser(this);
+  _vfg->setMimeSourceFactory(&_msf);
+  insertTab(_vfg, i18n("Voltage-Frequency Graphs"));
+
+  // Pin Diagrams
+  _pins = new Browser(this);
+  _pins->setMimeSourceFactory(&_msf);
+  insertTab(_pins, i18n("Pin Diagrams"));
+}
+
+void DeviceChooser::View::setDevice(const QString &name, bool cannotChangeDevice)
+{
+  const Device::Data *data = Device::lister().data(name);
+  if ( data==0 ) return;
+  QString doc = htmlInfo(*data, (cannotChangeDevice ? QString::null : "device:%1"), Device::documentHtml(*data));
+  doc += Device::supportedHtmlInfo(*data);
+  _info->setText("<html><body>" + doc + "</body></html>");
+  doc = htmlVoltageFrequencyGraphs(*data, QString::null, &_msf);
+  QPixmap pix = data->group().memoryGraph(*data);
+  QString label = data->name() + "_memory_map.png";
+  _msf.setPixmap(label, pix);
+  _memory->setText("<html><body><img src=\"" + label + "\" /></body></html>");
+  _vfg->setText("<html><body>" + doc + "</body></html>");
+  doc = htmlPinDiagrams(*data, QString::null, &_msf);
+  _pins->setText("<html><body>" + doc + "</body></html>");
+}
+
+void DeviceChooser::View::setText(const QString &text)
+{
+  _info->setText(text);
+  _vfg->setText(text);
+  _pins->setText(text);
+}
+
+void DeviceChooser::View::clear()
+{
+  _info->clear();
+  _vfg->clear();
+  _pins->clear();
+}
+
+//-----------------------------------------------------------------------------
+DeviceChooser::Editor::Editor(const QString &title, const QString &tag, QWidget *widget)
+  : DeviceEditor(title, tag, widget, "device_view_editor")
+{}
+
+QWidget *DeviceChooser::Editor::createView(const Device::Data *, QWidget *parent)
+{
+  DeviceChooser::View *view = new DeviceChooser::View(parent);
+  connect(view, SIGNAL(deviceChanged(const QString &)), SIGNAL(deviceChanged(const QString &)));
+  view->setDevice(_device, true);
+  return view;
+}
diff --git a/src/libgui/device_gui.h b/src/libgui/device_gui.h
new file mode 100644
index 0000000..a10c58a
--- /dev/null
+++ b/src/libgui/device_gui.h
@@ -0,0 +1,205 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DEVICE_GUI_H
+#define DEVICE_GUI_H
+
+#include <qpushbutton.h>
+#include <qlayout.h>
+#include <qcombobox.h>
+class QListViewItem;
+class QCheckBox;
+#include <ktextbrowser.h>
+class KListView;
+
+#include "common/gui/key_gui.h"
+#include "common/gui/dialog.h"
+#include "device_editor.h"
+#include "devices/pic/base/pic.h"
+namespace Programmer { class Group; }
+namespace Tool { class Group; }
+
+namespace DeviceChooser
+{
+
+enum Type { Choose, ChooseWithAuto };
+class View;
+
+BEGIN_DECLARE_ENUM(ListType)
+  FamilyTree = 0, Flat
+END_DECLARE_ENUM_STD(ListType)
+
+//-----------------------------------------------------------------------------
+class Config : public GenericConfig
+{
+public:
+  Config() : GenericConfig("device_chooser") {}
+  const Programmer::Group *programmerGroup();
+  void writeProgrammerGroup(const Programmer::Group *group);
+  const Tool::Group *toolGroup();
+  void writeToolGroup(const Tool::Group *group);
+};
+
+//-----------------------------------------------------------------------------
+template <typename Enum>
+class EnumComboBox
+{
+public:
+  EnumComboBox(const QString &key, QWidget *parent) : _key(key) {
+    _combo = new QComboBox(parent);
+    for (Enum type; type<Enum::Nb_Types; ++type) _combo->insertItem(type.label());
+    Config config;
+    Enum type = config.readEnumEntry(key, Enum(Enum::Nb_Types));
+    if ( type!=Enum::Nb_Types ) _combo->setCurrentItem(type.type());
+  }
+  EnumComboBox(const QString &emptyLabel, const QString &key, QWidget *parent) : _key(key) {
+    _combo = new QComboBox(parent);
+    _combo->insertItem(emptyLabel);
+    for (Enum type; type<Enum::Nb_Types; ++type) _combo->insertItem(type.label());
+    Config config;
+    Enum type = config.readEnumEntry(key, Enum(Enum::Nb_Types));
+    if ( type!=Enum::Nb_Types ) _combo->setCurrentItem(type.type()+1);
+  }
+  QComboBox *combo() { return _combo; }
+  Enum value() const {
+    if ( _combo->count()==Enum::Nb_Types ) return typename Enum::Type(_combo->currentItem());
+    if ( _combo->currentItem()==0 ) return Enum::Nb_Types;
+    return typename Enum::Type(_combo->currentItem()-1);
+  }
+  void reset() { _combo->setCurrentItem(0); }
+  void writeConfig() {
+    Config config;
+    config.writeEnumEntry(_key, value());
+  }
+
+private:
+  QString    _key;
+  QComboBox *_combo;
+};
+
+//-----------------------------------------------------------------------------
+class Dialog : public ::Dialog
+{
+Q_OBJECT
+public:
+  Dialog(const QString &device, Type type, QWidget *parent);
+  virtual ~Dialog();
+
+  QString device() const;
+
+private slots:
+  void listDoubleClicked(QListViewItem *item);
+  void currentChanged(QListViewItem *item);
+  void deviceChange(const QString &device);
+  void updateList();
+  void resetFilters();
+
+private:
+  bool _withAuto;
+  KeyComboBox<QString> *_programmerCombo, *_toolCombo;
+  EnumComboBox<ListType>                 *_listTypeCombo;
+  EnumComboBox<Device::MemoryTechnology> *_memoryCombo;
+  EnumComboBox<Device::Status>           *_statusCombo;
+  EnumComboBox<Pic::Feature>             *_featureCombo;
+  KListView   *_listView;
+  View        *_deviceView;
+
+  void updateList(const QString &device);
+  const Programmer::Group *programmerGroup() const;
+  const Tool::Group *toolGroup() const;
+};
+
+//-----------------------------------------------------------------------------
+class ComboBox : public QComboBox
+{
+Q_OBJECT
+public:
+  ComboBox(bool withAuto, QWidget *parent);
+  void setDevice(const QString &device, const Device::Data *data = 0);
+  QString device() const;
+  bool withAuto() const { return _withAuto; }
+
+private:
+  bool _withAuto;
+};
+
+//-----------------------------------------------------------------------------
+class Button : public QWidget
+{
+Q_OBJECT
+public:
+  Button(bool withAuto, QWidget *parent);
+  void setDevice(const QString &device) { _combo->setDevice(device); }
+  QString device() const { return _combo->device(); }
+
+signals:
+  void changed();
+
+private slots:
+  void chooseDevice();
+
+private:
+  ComboBox *_combo;
+};
+
+//-----------------------------------------------------------------------------
+class Browser : public KTextBrowser
+{
+Q_OBJECT
+public:
+  Browser(QWidget *parent);
+
+signals:
+  void deviceChanged(const QString &device);
+
+public slots:
+  virtual void setSource(const QString &name);
+};
+
+//-----------------------------------------------------------------------------
+class View : public TabWidget
+{
+Q_OBJECT
+public:
+  View(QWidget *parent);
+  void clear();
+  void setText(const QString &text);
+  void setDevice(const QString &name, bool cannotChangeDevice);
+
+signals:
+  void deviceChanged(const QString &device);
+
+private:
+  QMimeSourceFactory _msf;
+  Browser *_info, *_memory, *_vfg, *_pins;
+};
+
+//-----------------------------------------------------------------------------
+class Editor : public DeviceEditor
+{
+Q_OBJECT
+public:
+  Editor(const QString &title, const QString &tag, QWidget *parent);
+  virtual bool isModified() const { return false; }
+  virtual bool isReadOnly() const { return true; }
+  virtual void addGui() {}
+  virtual void removeGui() {}
+  virtual void setFocus() {}
+
+signals:
+  void deviceChanged(const QString &device);
+
+private:
+  virtual QWidget *createView(const Device::Data *data, QWidget *parent);
+  virtual void setModifiedInternal(bool) {}
+  virtual void setReadOnlyInternal(bool) {}
+};
+
+} // namespace
+
+#endif
diff --git a/src/libgui/editor.cpp b/src/libgui/editor.cpp
new file mode 100644
index 0000000..c64d98f
--- /dev/null
+++ b/src/libgui/editor.cpp
@@ -0,0 +1,91 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "editor.h"
+
+#include <klocale.h>
+
+#include "common/gui/purl_gui.h"
+#include "common/gui/misc_gui.h"
+
+Editor::Editor(const QString &title, const QString &tag, QWidget *parent, const char *name)
+  : QWidget(parent, name), _title(title), _tag(tag)
+{}
+
+Editor::Editor(QWidget *parent, const char *name)
+  : QWidget(parent, name)
+{}
+
+QSizePolicy Editor::sizePolicy() const
+{
+  return QSizePolicy(QSizePolicy::Expanding, QSizePolicy::Expanding);
+}
+
+void Editor::setModified(bool m)
+{
+  setModifiedInternal(m);
+  if (m) emit modified();
+}
+
+void Editor::setReadOnly(bool ro)
+{
+  setReadOnlyInternal(ro);
+  emit guiChanged();
+}
+
+bool Editor::save()
+{
+  if ( url().isEmpty() ) return saveAs();
+  if ( !save(url()) ) return false;
+  setModified(false);
+  emit guiChanged();
+  return true;
+}
+
+bool Editor::saveAs()
+{
+  QString filter = PURL::filter(fileType());
+  PURL::Url purl = PURL::getSaveUrl(":save_file_as", filter, this, i18n("Save File"), PURL::AskOverwrite);
+  if ( purl.isEmpty() ) return false;
+  if ( !save(purl) ) return false;
+  setModified(false);
+  emit guiChanged();
+  return true;
+}
+
+bool Editor::slotLoad()
+{
+  bool readOnly = isReadOnly();
+  if ( !open(url()) ) return false;
+  setModified(false);
+  setReadOnly(readOnly);
+  statusChanged();
+  emit guiChanged();
+  return true;
+}
+
+QString Editor::filename() const
+{
+  return (url().isEmpty() ? "<" + _title + ">" : "\"" + url().filepath() + "\"");
+}
+
+bool Editor::checkSaved()
+{
+  if ( !isModified() ) return true;
+  MessageBox::Result res = MessageBox::questionYesNoCancel(i18n("File %1 not saved.").arg(filename()),
+                                                           KStdGuiItem::save(), KStdGuiItem::discard());
+  if ( res==MessageBox::Cancel ) return false;
+  if ( res==MessageBox::Yes ) save();
+  return true;
+}
+
+bool Editor::reload()
+{
+  if ( !checkSaved() ) return false;
+  return slotLoad();
+}
diff --git a/src/libgui/editor.h b/src/libgui/editor.h
new file mode 100644
index 0000000..9247c80
--- /dev/null
+++ b/src/libgui/editor.h
@@ -0,0 +1,68 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef EDITOR_H
+#define EDITOR_H
+
+#include <qlabel.h>
+#include <qlayout.h>
+#include <qvaluevector.h>
+#include "common/common/qflags.h"
+#include <kstdaction.h>
+class KPopupMenu;
+
+#include "common/global/purl.h"
+
+class Editor : public QWidget
+{
+Q_OBJECT
+public:
+  Editor(const QString &title, const QString &tag, QWidget *parent, const char *name);
+  Editor(QWidget *parent, const char *name);
+  virtual QSizePolicy sizePolicy() const;
+  virtual PURL::FileType fileType() const = 0;
+  virtual bool isModified() const = 0;
+  void setModified(bool modified);
+  virtual PURL::Url url() const = 0;
+  QString name() const { return _title; }
+  QString tag() const { return _tag; }
+  void setReadOnly(bool readOnly);
+  virtual bool isReadOnly() const = 0;
+  bool checkSaved();
+  bool reload();
+  virtual void setFocus() = 0;
+  virtual bool open(const PURL::Url &url) = 0;
+  virtual bool save(const PURL::Url &url) = 0;
+  virtual void addGui() = 0;
+  virtual void removeGui() = 0;
+  virtual QValueList<uint> bookmarkLines() const = 0;
+  virtual void setBookmarkLines(const QValueList<uint> &lines) = 0;
+
+public slots:
+  bool slotLoad();
+  bool save();
+  bool saveAs();
+  void toggleReadOnly() { setReadOnly(!isReadOnly()); }
+  virtual void statusChanged() = 0;
+
+signals:
+  void modified();
+  void guiChanged();
+  void statusTextChanged(const QString &text);
+  void dropEventPass(QDropEvent *e);
+
+protected:
+  QString filename() const;
+  virtual void setModifiedInternal(bool modified) = 0;
+  virtual void setReadOnlyInternal(bool readOnly) = 0;
+
+private:
+  QString _title, _tag;
+};
+
+#endif
diff --git a/src/libgui/editor_manager.cpp b/src/libgui/editor_manager.cpp
new file mode 100644
index 0000000..2a42554
--- /dev/null
+++ b/src/libgui/editor_manager.cpp
@@ -0,0 +1,506 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "editor_manager.h"
+
+#include <qiconset.h>
+#include <qdragobject.h>
+#include <qpainter.h>
+
+#include <klocale.h>
+#include <kiconloader.h>
+#include <kpopupmenu.h>
+#include <kaction.h>
+
+#include "text_editor.h"
+#include "hex_editor.h"
+#include "object_view.h"
+#include "new_dialogs.h"
+#include "main_global.h"
+#include "gui_debug_manager.h"
+#include "common/gui/purl_gui.h"
+#include "device_gui.h"
+#include "register_view.h"
+#include "device_editor.h"
+#include "project_manager.h"
+#include "global_config.h"
+#include "project.h"
+
+//-----------------------------------------------------------------------------
+SwitchToDialog::SwitchToDialog(const QStringList &names, QWidget *parent)
+  : Dialog(parent, "switch_to_dialog", true, i18n("Switch to editor"), Ok | Cancel, Ok, false)
+{
+  QVBoxLayout *top = new QVBoxLayout(mainWidget(), 10, 10);
+  _edit = new KLineEdit(mainWidget());
+  _edit->setCompletedItems(names);
+  top->addWidget(_edit);
+}
+
+//-----------------------------------------------------------------------------
+void EditorTabBar::paintLabel(QPainter *p, const QRect &br, QTab *t, bool has_focus) const
+{
+  QFont f = p->font();
+  f.setItalic(_readOnly[t]);
+  p->setFont(f);
+  QTabBar::paintLabel(p, br, t, has_focus);
+}
+
+//-----------------------------------------------------------------------------
+QString EditorHistory::goBack()
+{
+  if ( !hasBack() ) return QString::null;
+  _current--;
+  return _names[_current];
+}
+
+QString EditorHistory::goForward()
+{
+  if ( !hasForward() ) return QString::null;
+  _current++;
+  return _names[_current];
+}
+
+void EditorHistory::add(const QString &name)
+{
+  if ( _names.count()!=0 ) {
+    _current = QMIN(_current, _names.count()-1);
+    if ( _names[_current]==name ) return;
+    if ( _current!=0 && _names[_current-1]==name ) {
+      _current--;
+      return;
+    }
+    _current++;
+    if ( _current<_names.count() && _names[_current]==name ) return;
+  }
+  _names.resize(_current+1);
+  _names[_current] = name;
+}
+
+void EditorHistory::closedLast()
+{
+  if ( _names.count()==0 ) return;
+  _names.resize(_current);
+  if ( _current!=0 ) _current--;
+}
+
+//-----------------------------------------------------------------------------
+const char * const EditorManager::EDITOR_TAGS[Nb_EditorTypes] = { "device", "registers" };
+
+EditorManager::EditorManager(QWidget *parent)
+  : TabWidget(parent, "editor_manager"), _current(0)
+{
+  setTabBar(new EditorTabBar(this));
+  connect(this, SIGNAL(currentChanged(QWidget *)), SLOT(showEditor(QWidget *)));
+  setHoverCloseButton(readConfigEntry(BaseGlobalConfig::ShowTabCloseButton).toBool());
+  setHoverCloseButtonDelayed(false);
+}
+
+bool EditorManager::openFile(const PURL::Url &url)
+{
+  if ( url.isEmpty() ) return false;
+  Editor *e = findEditor(url);
+  if (e) { // document already loaded
+    if ( !MessageBox::askContinue(i18n("File \"%1\" already loaded. Reload?").arg(url.kurl().prettyURL()),
+                                 i18n("Warning"), i18n("Reload")) ) return true;
+    if ( !e->slotLoad() ) {
+      closeEditor(e, false);
+      return false;
+    }
+    return true;
+  }
+  if ( !openEditor(url) ) {
+    static_cast< KRecentFilesAction *>(Main::action("file_open_recent"))->removeURL(url.kurl());
+    return false;
+  }
+  static_cast<KRecentFilesAction *>(Main::action("file_open_recent"))->addURL(url.kurl());
+  return true;
+}
+
+void EditorManager::connectEditor(Editor *editor)
+{
+    disconnectEditor(currentEditor());
+    if ( editor==0 ) return;
+    editor->addGui();
+    connect(editor, SIGNAL(modified()), SLOT(modifiedSlot()));
+    connect(editor, SIGNAL(guiChanged()), SIGNAL(guiChanged()));
+    connect(editor, SIGNAL(dropEventPass(QDropEvent *)), SLOT(slotDropEvent(QDropEvent *)));
+    connect(editor, SIGNAL(statusTextChanged(const QString &)), SIGNAL(statusChanged(const QString &)));
+}
+
+void EditorManager::modifiedSlot()
+{
+  emit modified(currentEditor()->url());
+}
+
+void EditorManager::disconnectEditor(Editor *editor)
+{
+  if ( editor==0 ) return;
+  editor->disconnect(this);
+  editor->removeGui();
+}
+
+QString EditorManager::title(const Editor &e) const
+{
+  return (e.url().isEmpty() ? "<" + e.name() + ">" : e.url().filename());
+}
+
+void EditorManager::updateTitles()
+{
+  KIconLoader loader;
+  QPixmap def = loader.loadIcon("piklab", KIcon::Small);
+  QPixmap modified = loader.loadIcon("filesave", KIcon::Small);
+  QPixmap chip = loader.loadIcon("piklab_chip", KIcon::Small);
+  QValueList<Editor *>::iterator it = _editors.begin();
+  for (; it!=_editors.end(); ++it) {
+    static_cast<EditorTabBar *>(tabBar())->setReadOnly(indexOf(*it), (*it)->isReadOnly());
+    QPixmap pixmap;
+    if ( (*it)->isModified() ) pixmap = modified;
+    else if ( ::qt_cast< ::DeviceEditor *>(*it)==0 ) pixmap = PURL::icon((*it)->fileType());
+    else pixmap = chip;
+    changeTab(*it, pixmap.isNull() ? def : pixmap, title(**it));
+  }
+}
+
+bool EditorManager::closeCurrentEditor()
+{
+  if ( !closeEditor(_current, true) ) return false;
+  emit guiChanged();
+  return true;
+}
+
+bool EditorManager::closeAllEditors()
+{
+  if ( currentEditor()==0 ) return true;
+  while ( currentEditor() )
+    if ( !closeEditor(currentEditor(), true) ) break;
+  emit guiChanged();
+  return ( currentEditor()==0 );
+}
+
+bool EditorManager::closeAllOtherEditors()
+{
+  if ( nbEditors()==1 ) return true;
+  QValueList<Editor *> list = _editors;
+  list.remove(currentEditor());
+  QValueList<Editor *>::iterator it = list.begin();
+  bool ok = true;
+  for (; it!=list.end(); ++it) {
+    if ( !closeEditor(*it, true) ) {
+      ok = false;
+      break;
+    }
+  }
+  emit guiChanged();
+  return ok;
+}
+
+bool EditorManager::closeEditor(const PURL::Url &url)
+{
+  Editor *e = findEditor(url);
+  if ( e==0 ) return true;
+  if ( !closeEditor(e, true) ) return false;
+  emit guiChanged();
+  return true;
+}
+
+void EditorManager::closeRequest(int i)
+{
+  closeEditor(static_cast<Editor *>(page(i)), true);
+  emit guiChanged();
+}
+
+bool EditorManager::closeEditor(Editor *e, bool ask)
+{
+  if ( e==0 ) return true;
+  if ( ask && !e->checkSaved() ) return false;
+  removePage(e);
+  _editors.remove(e);
+  Editor *g = static_cast<Editor *>(currentPage());
+  changeToEditor(g);
+  saveBookmarks(*e);
+  delete e;
+  return true;
+}
+
+void EditorManager::saveBookmarks(const Editor &e)
+{
+  if ( Main::project()==0 ) return;
+  QValueList<uint> lines = e.bookmarkLines();
+  Main::project()->setBookmarkLines(e.url(), lines);
+}
+
+void EditorManager::restoreBookmarks(Editor &e)
+{
+  if ( Main::project()==0 ) return;
+  QValueList<uint> lines = Main::project()->bookmarkLines(e.url());
+  e.setBookmarkLines(lines);
+}
+
+void EditorManager::showEditor(Editor *e)
+{
+  changeToEditor(e);
+  emit guiChanged();
+}
+
+void EditorManager::changeToEditor(Editor *e)
+{
+  if ( e==_current ) return;
+  connectEditor(e);
+  _current = e;
+  if (e) {
+    showPage(e);
+    e->clearFocus();   // force a got focus signal
+    e->setFocus();
+    e->statusChanged();
+    _history.add(name(*e));
+  } else {
+    emit statusChanged(QString::null);
+    _history.closedLast();
+  }
+}
+
+Editor *EditorManager::findEditor(const QString &tag)
+{
+  QValueList<Editor *>::iterator it = _editors.begin();
+  for (; it!=_editors.end(); ++it) if ( (*it)->tag()==tag ) return *it;
+  return 0;
+}
+
+Editor *EditorManager::findEditor(const PURL::Url &url)
+{
+  QValueList<Editor *>::iterator it = _editors.begin();
+  for (; it!=_editors.end(); ++it) if ( (*it)->url()==url ) return *it;
+  return 0;
+}
+
+Editor *EditorManager::createEditor(PURL::FileType type, const PURL::Url &url)
+{
+  Editor *e = findEditor(url);
+  if (e) closeEditor(e, false);
+  switch (type.type()) {
+    case PURL::Hex:
+      e = new HexEditor(this);
+      break;
+    case PURL::CSource:
+    case PURL::CppSource:
+    case PURL::CHeader:
+    case PURL::AsmGPAsm:
+    case PURL::AsmPIC30:
+    case PURL::AsmPICC:
+    case PURL::Inc:
+    case PURL::JalSource:
+    case PURL::BasicSource:
+      e = new TextEditor(true, this);
+      break;
+    case PURL::Lkr:
+    case PURL::Gld:
+    case PURL::Map:
+    case PURL::Lst:
+    case PURL::Cod:
+    case PURL::Unknown:
+      e = new TextEditor(false, this);
+      break;
+    case PURL::Coff:
+      if ( Main::project()==0 ) {
+        if ( Main::deviceData()==0 ) return 0;
+        e = new Coff::CoffEditor(url, *Main::deviceData(), this);
+      } else {
+        if ( Debugger::manager->coff()==0 ) return 0;
+        e = new Coff::CoffEditor(*Debugger::manager->coff(), this);
+      }
+      static_cast<Coff::CoffEditor *>(e)->setView(&Main::compileLog());
+      break;
+    case PURL::Object:
+      e = new Coff::ObjectEditor(url, this);
+      static_cast<Coff::ObjectEditor *>(e)->setView(&Main::compileLog());
+      break;
+    case PURL::Library:
+      e = new Coff::LibraryEditor(url, this);
+      static_cast<Coff::LibraryEditor *>(e)->setView(&Main::compileLog());
+      break;
+    case PURL::Elf:
+    case PURL::Project:
+    case PURL::PikdevProject:
+    case PURL::Nb_FileTypes: break;
+  }
+  return e;
+}
+
+void EditorManager::addEditor(Editor *e)
+{
+  QValueList<Editor *>::iterator it = _editors.begin();
+  for (; it!=_editors.end(); ++it) if ( *it==e ) return;
+  _editors.append(e);
+  addTab(e, QString::null);
+  setTabEnabled(e, true);
+  restoreBookmarks(*e);
+  showEditor(e);
+}
+
+void EditorManager::slotDropEvent(QDropEvent *event)
+{
+  QStringList urls;
+  if ( !QUriDrag::decodeLocalFiles(event, urls)) return;
+  QStringList::const_iterator it = urls.begin();
+  for(; it!=urls.end(); ++it) openEditor(PURL::Url::fromPathOrUrl(*it));
+}
+
+Editor *EditorManager::openEditor(const PURL::Url &url)
+{
+  Editor *e = findEditor(url);
+  if ( e==0 ) {
+    e = createEditor(url.fileType(), url);
+    if ( e==0 ) return 0;
+    if ( !e->open(url) ) {
+      closeEditor(e, false);
+      return 0;
+    }
+    addEditor(e);
+  } else showEditor(e);
+  return e;
+}
+
+void EditorManager::saveAllFiles()
+{
+  QValueList<Editor *>::iterator it = _editors.begin();
+  for (; it!=_editors.end(); ++it) {
+    if ( !(*it)->isModified() ) continue;
+    (*it)->save();
+  }
+  emit guiChanged();
+}
+
+PURL::UrlList EditorManager::files() const
+{
+  PURL::UrlList names;
+  QValueList<Editor *>::const_iterator it = _editors.begin();
+  for(; it!=_editors.end(); ++it) {
+    if ( (*it)->url().isEmpty() ) continue;
+    names.push_back((*it)->url());
+  }
+  return names;
+}
+
+void EditorManager::contextMenu(int i, const QPoint &p)
+{
+  Editor *editor = static_cast<Editor *>(page(i));
+  if ( editor==0 ) return;
+
+  KIconLoader loader;
+  QPixmap closeIcon = loader.loadIcon("fileclose", KIcon::Small);
+  QPixmap saveIcon = loader.loadIcon("filesave", KIcon::Small);
+  QPixmap saveAsIcon = loader.loadIcon("filesaveas", KIcon::Small);
+  QPixmap reloadIcon = loader.loadIcon("reload", KIcon::Small);
+  KPopupMenu *popup = new KPopupMenu;
+  popup->insertTitle(title(*editor));
+  popup->insertItem(closeIcon, i18n("Close"), 1);
+  if ( nbEditors()>1 ) popup->insertItem(i18n("Close All Others"), 2);
+  if ( editor->isModified() ) popup->insertItem(saveIcon, i18n("Save"), 3);
+  popup->insertItem(saveAsIcon, i18n("Save As..."), 4);
+  if ( !editor->url().isEmpty() ) popup->insertItem(reloadIcon, i18n("Reload"), 5);
+  switch (popup->exec(p)) {
+    case 1: closeEditor(editor, true); break;
+    case 2: closeAllOtherEditors(); break;
+    case 3: editor->save(); break;
+    case 4: editor->saveAs(); break;
+    case 5: editor->reload(); break;
+  }
+  emit guiChanged();
+  delete popup;
+}
+
+void EditorManager::switchHeaderImplementation()
+{
+  if ( currentEditor()==0 ) return;
+  PURL::Url url = currentEditor()->url();
+  PURL::FileType type = url.fileType();
+  PURL::SourceFamily source = type.data().sourceFamily;
+  if ( type.data().group==PURL::Source ) type = source.data().headerType;
+  else {
+    Q_ASSERT( type.data().group==PURL::Source );
+    type = Main::toolGroup().implementationType(source.data().toolType);
+  }
+  if ( type==PURL::Nb_FileTypes ) return;
+  url = url.toFileType(type);
+  if ( !url.exists() ) return;
+  openEditor(url);
+}
+
+void EditorManager::switchToEditor()
+{
+  QStringList names;
+  for (uint i=0; i<_editors.count(); i++) names.append(title(*_editors[i]));
+  SwitchToDialog dialog(names, this);
+  if ( dialog.exec()!=QDialog::Accepted ) return;
+  for (uint i=0; i<names.count(); i++) {
+    if ( dialog.name()!=names[i] && dialog.name()!=QString("%1").arg(i+1) ) continue;
+    showEditor(_editors[i]);
+    return;
+  }
+}
+
+QString EditorManager::name(const Editor &e) const
+{
+  return (!e.name().isEmpty() ? e.name() : e.url().filepath());
+}
+
+void EditorManager::goBack()
+{
+  Q_ASSERT( _history.hasBack() );
+  QString s = _history.goBack();
+  for (uint i=0; i<_editors.count(); i++)
+    if ( s==name(*_editors[i]) ) showEditor(_editors[i]);
+}
+
+void EditorManager::goForward()
+{
+  Q_ASSERT( _history.hasForward() );
+  QString s = _history.goForward();
+  for (uint i=0; i<_editors.count(); i++)
+    if ( s==name(*_editors[i]) ) showEditor(_editors[i]);
+}
+
+Editor *EditorManager::openEditor(EditorType type)
+{
+  bool created = false;
+  Editor *e = 0;
+  QString tag = EDITOR_TAGS[type];
+  switch (type) {
+  case DeviceEditor: {
+    e = findEditor(tag);
+    if ( e==0 ) {
+      e = new DeviceChooser::Editor(i18n("Device"), tag, this);
+      static_cast<DeviceChooser::Editor *>(e)->setDevice(false);
+      static_cast<DeviceChooser::Editor *>(e)->setDevice(true); // #### needed to fix GUI glitch ???
+      created = true;
+    }
+    break;
+  }
+  case RegisterEditor: {
+    e = findEditor(tag);
+    if ( e==0 ) {
+      ::BusyCursor bc;
+      e = new Register::MainView(i18n("Registers"), tag);
+      static_cast<Debugger::GuiManager *>(Debugger::manager)->addRegisterView(*static_cast<Register::MainView *>(e));
+      created = true;
+    }
+    break;
+  }
+  case Nb_EditorTypes: Q_ASSERT(false); break;
+  }
+  if ( e==0 ) return 0;
+  if (created) {
+    if ( !e->slotLoad() ) {
+      delete e;
+      return 0;
+    }
+    addEditor(e);
+  } else showEditor(e);
+  return e;
+}
diff --git a/src/libgui/editor_manager.h b/src/libgui/editor_manager.h
new file mode 100644
index 0000000..0d180b9
--- /dev/null
+++ b/src/libgui/editor_manager.h
@@ -0,0 +1,128 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef EDITOR_MANAGER_H
+#define EDITOR_MANAGER_H
+
+class QEvent;
+#include <ktabbar.h>
+#include <ktabwidget.h>
+#include <klineedit.h>
+
+#include "text_editor.h"
+#include "common/gui/misc_gui.h"
+#include "common/gui/dialog.h"
+
+//-----------------------------------------------------------------------------
+class SwitchToDialog : public Dialog
+{
+Q_OBJECT
+public:
+  SwitchToDialog(const QStringList &names, QWidget *parent);
+  QString name() const { return _edit->text(); }
+
+private:
+  KLineEdit *_edit;
+};
+
+//-----------------------------------------------------------------------------
+class EditorTabBar : public TabBar
+{
+Q_OBJECT
+public:
+  EditorTabBar(QWidget *parent) : TabBar(parent, "editor_tab_bar") {}
+  void setReadOnly(uint index, bool readOnly) { _readOnly[tabAt(index)] = readOnly; }
+
+private:
+  QMap<QTab *, bool> _readOnly;
+  virtual void paintLabel(QPainter *p, const QRect &br, QTab *t, bool has_focus) const;
+};
+
+//-----------------------------------------------------------------------------
+class EditorHistory
+{
+public:
+  EditorHistory() : _current(0) {}
+  bool hasBack() const { return _current!=0; }
+  bool hasForward() const { return (_current+1)<_names.count(); }
+  void add(const QString &name);
+  void closedLast();
+  QString goBack();
+  QString goForward();
+
+private:
+  uint _current;
+  QValueVector<QString> _names;
+};
+
+//-----------------------------------------------------------------------------
+class EditorManager : public TabWidget
+{
+Q_OBJECT
+public:
+  EditorManager(QWidget *parent);
+
+  PURL::UrlList files() const;
+  QValueList<Editor *> &editors() { return _editors; }
+  uint nbEditors() const { return _editors.count(); }
+  Editor *createEditor(PURL::FileType type, const PURL::Url &url);
+  void addEditor(Editor *e);
+  Editor *currentEditor() const { return _current; }
+  Editor *findEditor(const PURL::Url &file);
+  Editor *findEditor(const QString &tag);
+  void showEditor(Editor *e);
+  bool closeEditor(const PURL::Url &url);
+  bool closeEditor(Editor *e, bool ask);
+  bool openFile(const PURL::Url &url);
+  Editor *openEditor(const PURL::Url &url);
+  void connectEditor(Editor *editor);
+  void disconnectEditor(Editor *editor);
+  const EditorHistory &history() const { return _history; }
+  enum EditorType { DeviceEditor = 0, RegisterEditor, Nb_EditorTypes };
+  Editor *openEditor(EditorType type);
+
+public slots:
+  void updateTitles();
+  void slotDropEvent(QDropEvent *e);
+  void saveAllFiles();
+  bool closeCurrentEditor();
+  bool closeAllEditors();
+  bool closeAllOtherEditors();
+  void switchHeaderImplementation();
+  void switchToEditor();
+  void goBack();
+  void goForward();
+
+signals:
+  void modified(const PURL::Url &url);
+  void guiChanged();
+  void statusChanged(const QString &);
+
+private:
+  void changeToEditor(Editor *e);
+  void enableActions(bool enable);
+  QString title(const Editor &e) const;
+  QString name(const Editor &e) const;
+  virtual void contextMenu(int i, const QPoint &p);
+  void saveBookmarks(const Editor &e);
+  void restoreBookmarks(Editor &e);
+
+private slots:
+  void showEditor(QWidget *w) { showEditor(static_cast<Editor *>(w)); }
+  void closeRequest(int i);
+  void modifiedSlot();
+
+private:
+  Editor *_current;
+  QValueList<Editor *> _editors;
+  EditorHistory _history;
+  static const char * const EDITOR_TAGS[Nb_EditorTypes];
+};
+
+#endif
diff --git a/src/libgui/global_config.cpp b/src/libgui/global_config.cpp
new file mode 100644
index 0000000..8424450
--- /dev/null
+++ b/src/libgui/global_config.cpp
@@ -0,0 +1,106 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "global_config.h"
+
+#include <kapplication.h>
+#include <kconfig.h>
+#include <klocale.h>
+
+#include "progs/list/prog_list.h"
+#include "tools/list/tool_list.h"
+
+const BaseGlobalConfig::Data BaseGlobalConfig::DATA[Nb_Types] = {
+  { "auto_rebuild_modified", I18N_NOOP("Automatically rebuild project before programming if it is modified."), QVariant(true, 0) },
+  { "program_after_build", I18N_NOOP("Program device after successful build."), QVariant(false, 0) },
+  { "user_id_set_to_checksum", I18N_NOOP("Set User Ids to unprotected checksum (if User Ids are empty)."), QVariant(false, 0) },
+  { "show_tab_close_buttons", I18N_NOOP("Show close buttons on tabs (need restart to take effect)."), QVariant(true, 0) }
+};
+
+PURL::Url GlobalConfig::openedProject()
+{
+  GenericConfig config(QString::null);
+  return PURL::Url::fromPathOrUrl(config.readEntry("project", QString::null));
+}
+void GlobalConfig::writeOpenedProject(const PURL::Url &p)
+{
+  GenericConfig config(QString::null);
+  config.writeEntry("project", p.filepath());
+}
+
+PURL::UrlList GlobalConfig::openedFiles()
+{
+  GenericConfig config(QString::null);
+  PURL::UrlList files;
+  uint i = 0;
+  for (;;) {
+    QString file = config.readEntry(QString("file%1").arg(i), QString::null);
+    if ( file.isEmpty() ) break;
+    files += PURL::Url::fromPathOrUrl(file);
+    i++;
+  }
+  return files;
+}
+void GlobalConfig::writeOpenedFiles(const PURL::UrlList &files)
+{
+  GenericConfig config(QString::null);
+  for (uint i=0; i<=files.count(); i++) {
+    QString s = (i==files.count() ? QString::null : files[i].filepath());
+    config.writeEntry(QString("file%1").arg(i), s);
+  }
+}
+
+void GlobalConfig::writeProgrammerGroup(const Programmer::Group &group)
+{
+  GenericConfig config(QString::null);
+  config.writeEntry("programmer", group.name());
+}
+const Programmer::Group &GlobalConfig::programmerGroup()
+{
+  GenericConfig config(QString::null);
+  QString s = config.readEntry("programmer");
+  const Programmer::Group *group = Programmer::lister().group(s);
+  if ( group==0 ) return *Programmer::lister().begin().data();
+  return *group;
+}
+
+void GlobalConfig::writeDebugLevel(Log::DebugLevel level)
+{
+  GenericConfig config(QString::null);
+  config.writeEnumEntry<Log::DebugLevel>("log_debug_level", level);
+}
+Log::DebugLevel GlobalConfig::debugLevel()
+{
+  GenericConfig config(QString::null);
+  return config.readEnumEntry<Log::DebugLevel>("log_debug_level", Log::DebugLevel::Normal);
+}
+
+void GlobalConfig::writeLogOutputType(Log::OutputType type)
+{
+  GenericConfig config(QString::null);
+  config.writeEntry("log_output_type", type);
+}
+Log::OutputType GlobalConfig::logOutputType()
+{
+  GenericConfig config(QString::null);
+  uint output = config.readUIntEntry("log_output_type", Log::GuiOnly);
+  if ( output>=Log::Nb_OutputTypes ) return Log::GuiOnly;
+  return Log::OutputType(output);
+}
+
+void GlobalConfig::writeShowLineNumbers(bool show)
+{
+  GenericConfig config(QString::null);
+  config.writeEntry("show_line_numbers", show);
+}
+bool GlobalConfig::showLineNumbers()
+{
+  GenericConfig config(QString::null);
+  return config.readBoolEntry("show_line_numbers", false);
+}
diff --git a/src/libgui/global_config.h b/src/libgui/global_config.h
new file mode 100644
index 0000000..8e5cfaa
--- /dev/null
+++ b/src/libgui/global_config.h
@@ -0,0 +1,39 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef GLOBAL_CONFIG_H
+#define GLOBAL_CONFIG_H
+
+#include "progs/base/generic_prog.h"
+#include "common/global/purl.h"
+#include "tools/base/tool_group.h"
+#include "log_view.h"
+
+BEGIN_DECLARE_CONFIG(BaseGlobalConfig)
+  AutoRebuildModified, ProgramAfterBuild, UserIdSetToChecksum,
+  ShowTabCloseButton
+END_DECLARE_CONFIG(BaseGlobalConfig, "")
+
+namespace GlobalConfig
+{
+extern PURL::Url openedProject();
+extern void writeOpenedProject(const PURL::Url &p);
+extern PURL::UrlList openedFiles();
+extern void writeOpenedFiles(const PURL::UrlList &files);
+extern void writeProgrammerGroup(const Programmer::Group &group);
+extern const Programmer::Group &programmerGroup();
+extern void writeDebugLevel(Log::DebugLevel level);
+extern Log::DebugLevel debugLevel();
+extern void writeLogOutputType(Log::OutputType type);
+extern Log::OutputType logOutputType();
+extern void writeShowLineNumbers(bool show);
+extern bool showLineNumbers();
+} // namespace
+
+#endif
diff --git a/src/libgui/gui_debug_manager.cpp b/src/libgui/gui_debug_manager.cpp
new file mode 100644
index 0000000..adda68a
--- /dev/null
+++ b/src/libgui/gui_debug_manager.cpp
@@ -0,0 +1,249 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "gui_debug_manager.h"
+
+#include "toplevel.h"
+#include "text_editor.h"
+#include "project.h"
+#include "tools/list/compile_config.h"
+#include "register_view.h"
+#include "watch_view.h"
+#include "project_manager.h"
+#include "editor_manager.h"
+#include "main_global.h"
+#include "coff/base/text_coff.h"
+#include "progs/base/generic_prog.h"
+#include "gui_prog_manager.h"
+#include "breakpoint_view.h"
+#include "progs/base/prog_group.h"
+
+bool Debugger::GuiManager::addEditor(Editor &editor)
+{
+  if ( _editors.find(&editor)!=_editors.end() ) return false;
+  connect(&editor, SIGNAL(destroyed()), SLOT(editorDestroyed()));
+  _editors.append(&editor);
+  return true;
+}
+
+void Debugger::GuiManager::addRegisterView(Register::MainView &view)
+{
+  if ( !addEditor(view) ) return;
+  updateRegisters();
+}
+
+void Debugger::GuiManager::addTextEditor(TextEditor &editor)
+{
+  if ( !addEditor(editor) ) return;
+  updateView(false);
+}
+
+void Debugger::GuiManager::clearEditors()
+{
+  QValueList<Editor *>::iterator it = _editors.begin();
+  for (; it!=_editors.end(); ++it) (*it)->disconnect(this);
+  _editors.clear();
+}
+
+void Debugger::GuiManager::editorDestroyed()
+{
+  QValueList<Editor *>::iterator it = _editors.begin();
+  for (; it!=_editors.end(); ++it) {
+    if ( (*it)!=sender() ) continue;
+    _editors.remove(it);
+    break;
+  }
+}
+
+void Debugger::GuiManager::updateDevice()
+{
+  Manager::updateDevice();
+  Main::watchView().init(false);
+}
+
+PURL::Url Debugger::GuiManager::coffUrl() const
+{
+  return Main::projectManager().projectUrl().toFileType(PURL::Coff);
+}
+
+bool Debugger::GuiManager::internalInit()
+{
+  if ( !Manager::internalInit() ) return false;
+  if ( !Main::projectManager().contains(coffUrl()) )
+    Main::projectManager().addExternalFile(coffUrl(), ProjectManager::Generated);
+  Main::watchView().init(true);
+  if ( registerView() ) registerView()->view()->updateView();
+  return true;
+}
+
+bool Debugger::GuiManager::checkState(bool &first)
+{
+  if ( !Debugger::Manager::checkState(first) ) return false;
+  if ( first && !Main::toolGroup().generateDebugInformation(Main::device()) )
+    MessageBox::information(i18n("The toolchain in use does not generate all necessary debugging information with the selected device. This may reduce debugging capabilities."), Log::Show, "doesnt_generate_debug_information");
+  return true;
+}
+
+Breakpoint::Data Debugger::GuiManager::currentBreakpointData()
+{
+  const Breakpoint::Data *data = Main::breakpointsView().currentData();
+  if (data) return *data;
+  TextEditor *editor = ::qt_cast<TextEditor *>(Main::currentEditor());
+  Q_ASSERT(editor);
+  return Breakpoint::Data(editor->url(), editor->cursorLine());
+}
+
+void Debugger::GuiManager::toggleBreakpoint()
+{
+  if ( !Main::programmerGroup().isDebugger() ) {
+    MessageBox::sorry(i18n("You cannot set breakpoints when a debugger is not selected."), Log::Show);
+    return;
+  }
+  Breakpoint::Data data = currentBreakpointData();
+  if ( Breakpoint::list().contains(data) ) {
+    Breakpoint::list().remove(data);
+    return;
+  }
+  Address address;
+  if ( !checkBreakpoint(data, false, address) ) return;
+  Breakpoint::list().append(data);
+  Breakpoint::list().setAddress(data, address);
+  if (_coff) toggleEnableBreakpoint();
+}
+
+void Debugger::GuiManager::toggleEnableBreakpoint()
+{
+  Q_ASSERT(_coff);
+  Breakpoint::Data data = currentBreakpointData();
+  bool isActive = ( Breakpoint::list().state(data)==Breakpoint::Active );
+  if ( !Breakpoint::list().address(data).isValid() ) {
+    if ( !isActive ) MessageBox::sorry(i18n("Breakpoint at non-code line cannot be activated."), Log::Show);
+  } else {
+    if ( !isActive ) {
+      freeActiveBreakpoint();
+      Breakpoint::list().setState(data, Breakpoint::Active);
+    } else Breakpoint::list().setState(data, Breakpoint::Disabled);
+  }
+}
+
+void Debugger::GuiManager::updateEditorMarks(TextEditor &editor) const
+{
+  editor.clearBreakpointMarks();
+  // update breakpoints
+  bool reached = false;
+  for (uint i=0; i<Breakpoint::list().count(); i++) {
+    const Breakpoint::Data &data = Breakpoint::list().data(i);
+    int line = -1;
+    Address address = Breakpoint::list().address(data);
+    if ( _coff && address.isValid() ) line = _coff->lineForAddress(editor.url(), address);
+    else if ( data.url==editor.url() ) line = data.line;
+    Breakpoint::MarkType type = breakpointType(data);
+    if ( line!=-1 ) editor.setMark(line, type);
+    if ( type==Breakpoint::BreakpointReached ) reached = true;
+  }
+  // update pc
+  if ( _coff && programmer() && programmer()->isActive() && pc().isInitialized() && !reached
+        && _currentSourceLines.contains(editor.url()) ) {
+    int pcline = _currentSourceLines[editor.url()];
+    if ( programmer()->state()==Programmer::Halted ) editor.setMark(pcline, Breakpoint::ProgramCounterActive);
+    else editor.setMark(pcline, Breakpoint::ProgramCounterDisabled);
+  }
+}
+
+void Debugger::GuiManager::clear()
+{
+  Manager::clear();
+  Main::watchView().init(true);
+}
+
+bool Debugger::GuiManager::update(bool gotoPC)
+{
+  bool on = (programmer() ? programmer()->isTargetPowerOn() : false);
+  static_cast<KToggleAction *>(Main::action("prog_power"))->setChecked(on);
+  return Manager::update(gotoPC);
+}
+
+bool Debugger::GuiManager::checkIfContinueStepping(bool &continueStepping)
+{
+  if ( Main::toolGroup().generateDebugInformation(Main::device()) )
+    return Debugger::Manager::checkIfContinueStepping(continueStepping);
+  if ( !update(false) ) return false;
+  continueStepping = false;
+  return true;
+}
+
+void Debugger::GuiManager::updateView(bool gotoPC)
+{
+  Main::breakpointsView().updateView();
+  bool currentHasPC = false;
+  QValueList<Editor *>::iterator ite;
+  for (ite=_editors.begin(); ite!=_editors.end(); ++ite) {
+    TextEditor *e = ::qt_cast<TextEditor *>(*ite);
+    if ( e==0 ) continue;
+    updateEditorMarks(*e);
+    if ( !_currentSourceLines.contains(e->url()) ) continue;
+    if (gotoPC) e->setCursor(_currentSourceLines[e->url()], 0);
+    if ( e==Main::currentEditor() ) currentHasPC = true;
+  }
+  if ( programmer()==0 || programmer()->state()!=Programmer::Halted || !pc().isInitialized() || currentHasPC ) return;
+  // 1: look at files inside project and not generated
+  // 2: look at files inside project
+  // 3: look at existing files
+  for (uint i=0; i<3; i++) {
+    QMap<PURL::Url, uint>::const_iterator it;
+    for (it=_currentSourceLines.begin(); it!=_currentSourceLines.end(); ++it) {
+      switch (i) {
+        case 0: if ( !Main::projectManager().contains(it.key()) || Main::projectManager().isExternalFile(it.key()) ) continue; break;
+        case 1: if ( !Main::projectManager().contains(it.key()) ) continue; break;
+        case 2: if ( !it.key().exists() ) continue; break;
+      }
+      TextEditor *e = ::qt_cast<TextEditor *>(Main::editorManager().findEditor(it.key()));
+      if ( e==0 ) {
+        if (gotoPC) e = ::qt_cast<TextEditor *>(Main::editorManager().openEditor(it.key()));
+        if ( e==0 ) continue;
+      }
+      updateEditorMarks(*e);
+      if (gotoPC) {
+        e->setCursor(_currentSourceLines[e->url()], 0);
+        Main::editorManager().showEditor(e);
+      }
+      return;
+    }
+  }
+}
+
+Register::MainView *Debugger::GuiManager::registerView() const
+{
+  QValueList<Editor *>::const_iterator it = _editors.begin();
+  for (; it!=_editors.end(); ++it) {
+    Register::MainView *rv = ::qt_cast<Register::MainView *>(*it);
+    if (rv) return rv;
+  }
+  return 0;
+}
+
+bool Debugger::GuiManager::isProjectSource(const PURL::Url &url) const
+{
+  return ( Main::projectManager().contains(url) && !Main::projectManager().isExternalFile(url) );
+}
+
+void Debugger::GuiManager::showDisassemblyLocation()
+{
+  TextEditor *editor = ::qt_cast<TextEditor *>(Main::currentEditor());
+  Q_ASSERT(editor);
+  Q_ASSERT(_coff);
+  QValueVector<Address> addresses = _coff->addresses(editor->url(), editor->cursorLine());
+  if ( addresses.isEmpty() ) {
+    MessageBox::sorry(i18n("Cannot show disassembly location for non-code line."), Log::Show);
+    return;
+  }
+  int line = _coff->lineForAddress(_coff->url(), addresses[0]);
+  if ( line==-1 ) return; // possible ?
+  TextEditor *e = ::qt_cast<TextEditor *>(Main::editorManager().openEditor(_coff->url()));
+  if (e) e->setCursor(line, 0);
+}
diff --git a/src/libgui/gui_debug_manager.h b/src/libgui/gui_debug_manager.h
new file mode 100644
index 0000000..661f86a
--- /dev/null
+++ b/src/libgui/gui_debug_manager.h
@@ -0,0 +1,61 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef GUI_DEBUG_MANAGER_H
+#define GUI_DEBUG_MANAGER_H
+
+#include "progs/manager/debug_manager.h"
+#include "text_editor.h"
+#include "main_global.h"
+#include "tools/list/compile_process.h"
+namespace Register { class MainView; }
+
+namespace Debugger
+{
+class GuiManager : public Manager
+{
+Q_OBJECT
+public:
+  GuiManager() {}
+  virtual void updateDevice();
+  void addTextEditor(TextEditor &editor);
+  void addRegisterView(Register::MainView &view);
+  void clearEditors();
+  virtual void clear();
+
+public slots:
+  virtual bool update(bool gotoPC);
+  void toggleBreakpoint();
+  void toggleEnableBreakpoint();
+  void showPC() { updateView(true); }
+  void showDisassemblyLocation();
+
+private slots:
+  void editorDestroyed();
+
+private:
+  QValueList<Editor *> _editors;
+
+  static Breakpoint::Data currentBreakpointData();
+  void updateEditorMarks(TextEditor &editor) const; // return PC line
+  Register::MainView *registerView() const;
+  bool addEditor(Editor &editor);
+  virtual bool internalInit();
+  virtual bool checkState(bool &first);
+  virtual const Programmer::Group *programmerGroup() const { return &Main::programmerGroup(); }
+  virtual const Device::Data *deviceData() const { return Main::deviceData(); }
+  virtual PURL::Url coffUrl() const;
+  virtual Log::View *compileView() { return &Main::compileLog(); }
+  virtual void updateView(bool gotoPC);
+  virtual bool isProjectSource(const PURL::Url &url) const;
+  virtual bool checkIfContinueStepping(bool &continueStepping);
+};
+
+} // namespace
+
+#endif
diff --git a/src/libgui/gui_prog_manager.cpp b/src/libgui/gui_prog_manager.cpp
new file mode 100644
index 0000000..ea22d7e
--- /dev/null
+++ b/src/libgui/gui_prog_manager.cpp
@@ -0,0 +1,72 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "gui_prog_manager.h"
+
+#include <kaction.h>
+
+#include "progs/base/generic_prog.h"
+#include "progs/base/prog_group.h"
+#include "progs/base/prog_config.h"
+#include "progs/base/hardware_config.h"
+#include "progs/base/generic_debug.h"
+#include "progs/gui/prog_group_ui.h"
+#include "toplevel.h"
+#include "project.h"
+#include "project_manager.h"
+#include "progs/manager/debug_manager.h"
+
+//----------------------------------------------------------------------------
+bool Programmer::GuiManager::internalInitProgramming(bool debugging)
+{
+  if ( !Manager::internalInitProgramming(debugging) ) return false;
+  if ( !debugging && _programmer->isActive() ) {
+    if ( group().isDebugger() && !askContinue(i18n("The selected operation will stop the debugging session. Continue anyway?")) ) return false;
+    if ( !halt() ) return false;
+  }
+  if ( debugging && !_programmer->isActive() ) {
+    if ( ::Debugger::manager->coff()==0 && !::Debugger::manager->init() ) {
+      sorry(i18n("Cannot start debugging without a COFF file. Please compile the project."));
+      return false;
+    }
+    if ( !group().isSoftware() ) {
+      if ( !askContinue(i18n("The device memory is in an unknown state. You may want to reprogram the device. Continue anyway?")) )
+        return false;
+    }
+  }
+  return true;
+}
+
+void Programmer::GuiManager::toggleDevicePower()
+{
+  bool on = static_cast<KToggleAction *>(Main::action("prog_power"))->isChecked();
+  setDevicePower(on);
+}
+
+void Programmer::GuiManager::showAdvancedDialog()
+{
+  const ::Programmer::GroupUI *groupui = static_cast<const ::Programmer::GroupUI *>(group().gui());
+  const Device::Data *data = Main::deviceData();
+  if ( data && !group().isSupported(data->name()) ) data = 0;
+  createProgrammer(data);
+  ::Programmer::AdvancedDialog *dialog = groupui->createAdvancedDialog(*_programmer, &Main::toplevel());
+  Q_ASSERT(dialog);
+  dialog->updateDisplay();
+  dialog->exec();
+  delete dialog;
+}
+
+void Programmer::GuiManager::createProgrammer(const Device::Data *data)
+{
+  HardwareDescription hd;
+  hd.port = GroupConfig::portDescription(group());
+  ::Hardware::Config *hconfig = group().hardwareConfig();
+  if (hconfig) hd.name = hconfig->currentHardware(hd.port.type);
+  delete hconfig;
+  Manager::createProgrammer(data, hd);
+}
diff --git a/src/libgui/gui_prog_manager.h b/src/libgui/gui_prog_manager.h
new file mode 100644
index 0000000..b19186e
--- /dev/null
+++ b/src/libgui/gui_prog_manager.h
@@ -0,0 +1,37 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef GUI_PROG_MANAGER_H
+#define GUI_PROG_MANAGER_H
+
+#include "progs/manager/prog_manager.h"
+#include "libgui/main_global.h"
+
+namespace Programmer
+{
+class GuiManager : public Manager
+{
+Q_OBJECT
+public:
+  GuiManager(QObject *parent) : Manager(parent) {}
+  virtual void createProgrammer(const Device::Data *data);
+  virtual void setState(State state) { Main::setState(state==Idle ? Main::Idle : Main::Programming); }
+
+public slots:
+  void toggleDevicePower();
+  void showAdvancedDialog();
+
+private:
+  virtual const Group &group() const { return Main::programmerGroup(); }
+  virtual bool internalInitProgramming(bool debugging);
+  virtual const Device::Data *device() const { return Main::deviceData(); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/libgui/hex_editor.cpp b/src/libgui/hex_editor.cpp
new file mode 100644
index 0000000..48ad7e8
--- /dev/null
+++ b/src/libgui/hex_editor.cpp
@@ -0,0 +1,192 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003 Alain Gibaud <alain.gibaud@free.fr>                *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "hex_editor.h"
+
+#include <qgroupbox.h>
+#include <qhgroupbox.h>
+#include <qregexp.h>
+#include <qlayout.h>
+#include <qscrollview.h>
+#include <qstringlist.h>
+#include <qlabel.h>
+#include <qtimer.h>
+
+#include <klocale.h>
+#include <ktempfile.h>
+
+#include "devices/base/device_group.h"
+#include "devices/gui/device_group_ui.h"
+#include "devices/gui/hex_view.h"
+#include "toplevel.h"
+#include "common/global/pfile.h"
+#include "main_global.h"
+
+//-----------------------------------------------------------------------------
+HexEditorPart::HexEditorPart(HexEditor *editor)
+ : KParts::ReadWritePart(editor, "hex_editor_part")
+{
+  setXMLFile("hexeditorpartui.rc");
+
+  (void)KStdAction::save(editor, SLOT(save()), actionCollection());
+  (void)KStdAction::saveAs(editor, SLOT(saveAs()), actionCollection());
+  (void)new KToggleAction(i18n("Read Only Mode"), 0, 0, editor, SLOT(toggleReadOnly()), actionCollection(), "tools_toggle_write_lock");
+}
+
+void HexEditorPart::setReadWrite(bool rw)
+{
+  KParts::ReadWritePart::setReadWrite(rw);
+  static_cast<KToggleAction *>(action("tools_toggle_write_lock"))->setChecked(!rw);
+}
+
+//-----------------------------------------------------------------------------
+HexEditor::HexEditor(const QString &name, QWidget *parent)
+  : DeviceEditor(name, QString::null, parent, "hex_editor")
+{
+  init();
+}
+
+HexEditor::HexEditor(QWidget *parent)
+  : DeviceEditor(parent, "hex_editor")
+{
+  init();
+}
+
+void HexEditor::init()
+{
+  _modified = false;
+  _memory = 0;
+  _originalMemory = 0;
+  _top->addStretch(1);
+  _part = new HexEditorPart(this);
+  setReadOnly(false);
+}
+
+void HexEditor::clear()
+{
+  delete _memory;
+  _memory = 0;
+  delete _originalMemory;
+  _originalMemory = 0;
+}
+
+QWidget *HexEditor::createView(const Device::Data *data, QWidget *parent)
+{
+  clear();
+  if (data) {
+    _originalMemory = data->group().createMemory(*data);
+    _memory = data->group().createMemory(*data);
+  }
+  if ( data==0 ) return new QWidget(parent);
+  Device::HexView *hv = Device::groupui(*data).createHexView(*this, parent);
+  connect(hv, SIGNAL(modified()), SLOT(slotModified()));
+  _dirty = true;
+  QTimer::singleShot(0, this, SLOT(simpleLoad()));
+  return hv;
+}
+
+bool HexEditor::simpleLoad()
+{
+  if ( !_dirty ) return true;
+  _dirty = false;
+  if (_memory) {
+    QStringList warnings;
+    if ( _memory->fromHexBuffer(_hexBuffer, warnings)!=Device::Memory::NoWarning ) {
+      _labelWarning->setText(i18n("<b>Warning:</b> hex file seems to be incompatible with the selected device %1:<br>%2")
+                             .arg(_memory->device().name()).arg(warnings.join("<br>")));
+      _labelWarning->show();
+    } else _labelWarning->hide();
+    display();
+  }
+  return true;
+}
+
+void HexEditor::setReadOnlyInternal(bool readOnly)
+{
+  _part->setReadWrite(!readOnly);
+  if (_memory) static_cast<Device::HexView *>(_view)->setReadOnly(readOnly);
+}
+
+void HexEditor::addGui()
+{
+  Main::toplevel().guiFactory()->addClient(_part);
+}
+
+void HexEditor::removeGui()
+{
+  Main::toplevel().guiFactory()->removeClient(_part);
+}
+
+bool HexEditor::open(const PURL::Url &url)
+{
+  _url = url;
+  PURL::File file(url, Main::compileLog());
+  if ( !file.openForRead() ) return false;
+  QStringList errors;
+  if ( !_hexBuffer.load(file.stream(), errors) ) {
+    MessageBox::detailedSorry(i18n("Error(s) reading hex file."), errors.join("\n"), Log::Show);
+    return false;
+  }
+  _dirty = true;
+  return simpleLoad();
+}
+
+bool HexEditor::save(const PURL::Url &url)
+{
+  return save(url, i18n("File URL: \"%1\".").arg(url.pretty()));
+}
+
+bool HexEditor::save(const PURL::Url &url, const QString &fileErrorString)
+{
+  PURL::File file(url, Main::compileLog());
+  if ( !file.openForWrite() ) return false;
+  if ( !_memory->save(file.stream(), HexBuffer::IHX32) ) {
+    MessageBox::detailedSorry(i18n("Error while writing file \"%1\".").arg(url.pretty()), fileErrorString, Log::Show);
+    return false;
+  }
+  _originalMemory->copyFrom(*_memory);
+  _url = url;
+  return file.close();
+}
+
+void HexEditor::display()
+{
+  _modified = false;
+  if (_memory) {
+    _originalMemory->copyFrom(*_memory);
+    static_cast<Device::HexView *>(_view)->display(_memory);
+    static_cast<Device::HexView *>(_view)->setReadOnly(isReadOnly());
+    static_cast<Device::HexView *>(_view)->updateDisplay();
+  }
+  statusChanged();
+}
+
+void HexEditor::memoryRead()
+{
+  display();
+  emit guiChanged();
+}
+
+void HexEditor::slotModified()
+{
+  static_cast<Device::HexView *>(_view)->updateDisplay();
+  _modified = true;
+  statusChanged();
+  emit guiChanged();
+}
+
+void HexEditor::statusChanged()
+{
+  QString s;
+  if (_memory) {
+    BitValue cs = static_cast<Device::HexView *>(_view)->checksum();
+    s = i18n("Checksum: %1").arg(toHexLabel(cs, 4));
+  }
+  emit statusTextChanged(s);
+}
diff --git a/src/libgui/hex_editor.h b/src/libgui/hex_editor.h
new file mode 100644
index 0000000..86b7f2c
--- /dev/null
+++ b/src/libgui/hex_editor.h
@@ -0,0 +1,83 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003 Alain Gibaud <alain.gibaud@free.fr>                *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef HEX_EDITOR_H
+#define HEX_EDITOR_H
+
+#include <kparts/part.h>
+
+#include "device_editor.h"
+#include "devices/base/hex_buffer.h"
+#include "devices/base/generic_memory.h"
+
+//-----------------------------------------------------------------------------
+class HexEditor;
+
+class HexEditorPart : public KParts::ReadWritePart
+{
+Q_OBJECT
+public:
+  HexEditorPart(HexEditor *editor);
+  virtual void setReadWrite(bool readWrite);
+
+private:
+  virtual bool openFile() { return true; }
+  virtual bool saveFile() { return true; }
+};
+
+//-----------------------------------------------------------------------------
+class HexEditor : public DeviceEditor
+{
+Q_OBJECT
+public:
+  HexEditor(const QString &name, QWidget *parent);
+  HexEditor(QWidget *parent);
+  virtual bool isModified() const { return _modified; }
+  virtual bool isReadOnly() const { return !_part->isReadWrite(); }
+  virtual ~HexEditor() { clear(); }
+  virtual PURL::FileType fileType() const { return PURL::Hex; }
+  virtual PURL::Url url() const { return _url; }
+  virtual bool save(const PURL::Url &url);
+  virtual bool open(const PURL::Url &url);
+  Device::Memory *memory() { return _memory; }
+  const Device::Memory *memory() const { return _memory; }
+  const Device::Memory *originalMemory() const { return _originalMemory; }
+  void memoryRead();
+  virtual void addGui();
+  virtual void removeGui();
+  virtual void setFocus() {}
+  virtual QValueList<uint> bookmarkLines() const { return QValueList<uint>(); }
+  virtual void setBookmarkLines(const QValueList<uint> &) {}
+
+public slots:
+  virtual void statusChanged();
+
+private slots:
+  void slotModified();
+  bool simpleLoad();
+
+private:
+  Device::Memory *_originalMemory, *_memory;
+  HexBuffer       _hexBuffer;
+  bool            _modified, _dirty;
+  HexEditorPart  *_part;
+  PURL::Url       _url;
+
+  virtual void dropEvent(QDropEvent *e) { emit dropEventPass(e); }
+  bool save(const PURL::Url &url, const QString &fileErrorString);
+  bool verifyDeviceType();
+  virtual QWidget *createView(const Device::Data *data, QWidget *parent);
+  virtual void setModifiedInternal(bool modified) { _modified = modified; }
+  virtual void setReadOnlyInternal(bool readOnly);
+  void display();
+  void init();
+  void clear();
+};
+
+#endif
diff --git a/src/libgui/likeback.cpp b/src/libgui/likeback.cpp
new file mode 100644
index 0000000..eac86ff
--- /dev/null
+++ b/src/libgui/likeback.cpp
@@ -0,0 +1,668 @@
+/***************************************************************************
+ *   Copyright (C) 2006 by S�bastien Laot                                 *
+ *   slaout@linux62.org                                                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.             *
+ ***************************************************************************/
+
+#include <kapplication.h>
+#include <kaboutdata.h>
+#include <kconfig.h>
+#include <kiconloader.h>
+#include <kaboutdata.h>
+#include <klocale.h>
+#include <kdebug.h>
+#include <kmessagebox.h>
+#include <qlayout.h>
+#include <qtoolbutton.h>
+#include <qpushbutton.h>
+#include <qpopupmenu.h>
+#include <qtextedit.h>
+#include <qlayout.h>
+#include <qlabel.h>
+#include <kdialogbase.h>
+#include <qhttp.h>
+#include <kurl.h>
+#include <kinputdialog.h>
+#include <qvalidator.h>
+#include <kdebug.h>
+#include <kprocess.h>
+#include "netwm.h"
+
+#include <pwd.h>
+
+#include <iostream>
+
+#include "likeback.h"
+
+#include <krun.h>
+#include "common/global/about.h"
+
+LikeBack::LikeBack(Button buttons)
+ : QWidget( 0, "LikeBack", Qt::WX11BypassWM | Qt::WStyle_NoBorder | Qt::WNoAutoErase | Qt::WStyle_StaysOnTop | Qt::WStyle_NoBorder | Qt::Qt::WGroupLeader)
+ , m_buttons(buttons)
+{
+        QHBoxLayout *layout = new QHBoxLayout(this);
+
+        QIconSet likeIconSet      = kapp->iconLoader()->loadIconSet("likeback_like",      KIcon::Small);
+        QIconSet dislikeIconSet   = kapp->iconLoader()->loadIconSet("likeback_dislike",   KIcon::Small);
+        QIconSet bugIconSet       = kapp->iconLoader()->loadIconSet("likeback_bug",       KIcon::Small);
+//        QIconSet configureIconSet = kapp->iconLoader()->loadIconSet("configure",          KIcon::Small);
+
+        QToolButton *m_likeButton = new QToolButton(this, "ilike");
+        m_likeButton->setIconSet(likeIconSet);
+        m_likeButton->setTextLabel(i18n("I Like..."));
+        m_likeButton->setAutoRaise(true);
+        connect( m_likeButton, SIGNAL(clicked()), this, SLOT(iLike()) );
+        layout->add(m_likeButton);
+
+        QToolButton *m_dislikeButton = new QToolButton(this, "idonotlike");
+        m_dislikeButton->setIconSet(dislikeIconSet);
+        m_dislikeButton->setTextLabel(i18n("I Do not Like..."));
+        m_dislikeButton->setAutoRaise(true);
+        connect( m_dislikeButton, SIGNAL(clicked()), this, SLOT(iDoNotLike()) );
+        layout->add(m_dislikeButton);
+
+        QToolButton *m_bugButton = new QToolButton(this, "ifoundabug");
+        m_bugButton->setIconSet(bugIconSet);
+        m_bugButton->setTextLabel(i18n("I Found a Bug..."));
+        m_bugButton->setAutoRaise(true);
+        connect( m_bugButton, SIGNAL(clicked()), this, SLOT(iFoundABug()) );
+        layout->add(m_bugButton);
+
+        m_configureButton = new QToolButton(this, "configure");
+        QIconSet helpIconSet = kapp->iconLoader()->loadIconSet("help", KIcon::Small);
+        m_configureButton->setIconSet(helpIconSet);
+        m_configureButton->setTextLabel(i18n("Configure..."));
+        m_configureButton->setAutoRaise(true);
+        connect( m_likeButton, SIGNAL(clicked()), this, SLOT(configure()) );
+        layout->add(m_configureButton);
+
+        QPopupMenu *configureMenu = new QPopupMenu(this);
+        configureMenu->insertItem(helpIconSet, i18n("What's &This?"), this , SLOT(showWhatsThisMessage()) );
+        QIconSet changeEmailIconSet = kapp->iconLoader()->loadIconSet("mail_generic", KIcon::Small);
+        configureMenu->insertItem(changeEmailIconSet, i18n("&Configure Email Address..."), this , SLOT(askEMail()) );
+//        QIconSet dontHelpIconSet = kapp->iconLoader()->loadIconSet("stop", KIcon::Small);
+//        configureMenu->insertItem( dontHelpIconSet, i18n("&Do not Help Anymore"), this , SLOT(doNotHelpAnymore()) );
+        m_configureButton->setPopup(configureMenu);
+        connect( m_configureButton, SIGNAL(pressed()), this, SLOT(openConfigurePopup()) );
+
+        if (!emailAddressAlreadyProvided())
+                //beginFetchingEmail(); // Begin before showing the message, so we have time!
+                endFetchingEmailFrom();
+
+//        static const char *messageShown = "LikeBack_starting_information";
+//        if (KMessageBox::shouldBeShownContinue(messageShown)) {
+//                showInformationMessage();
+//                KMessageBox::saveDontShowAgainContinue(messageShown);
+//        }
+
+        resize(sizeHint());
+
+        connect( &m_timer, SIGNAL(timeout()), this, SLOT(autoMove()) );
+        m_timer.start(10);
+
+        s_instance = this;
+}
+
+LikeBack::~LikeBack()
+{
+}
+
+void LikeBack::openConfigurePopup()
+{
+        m_configureButton->openPopup();
+}
+
+void LikeBack::doNotHelpAnymore()
+{
+        disable();
+        int result = KMessageBox::questionYesNo(
+                        kapp->activeWindow(),
+                        i18n("Are you sure you do not want to participate anymore in the application enhancing program?"),
+                        i18n("Do not Help Anymore"));
+        if (result == KMessageBox::No) {
+                enable();
+                return;
+        }
+
+        s_config->setGroup("LikeBack");
+        s_config->writeEntry("userWantToParticipateForVersion_" + s_about->version(), false);
+        deleteLater();
+}
+
+void LikeBack::showWhatsThisMessage()
+{
+        disable();
+        showInformationMessage();
+        enable();
+}
+
+bool LikeBack::userWantToParticipate()
+{
+        if (!kapp)
+                return true;
+
+        s_config->setGroup("LikeBack");
+        return s_config->readBoolEntry("userWantToParticipateForVersion_" + s_about->version(), true);
+}
+
+// TODO: Only show relevant buttons!
+
+void LikeBack::showInformationMessage()
+{
+        QPixmap likeIcon    = kapp->iconLoader()->loadIcon("likeback_like",    KIcon::Small);
+        QPixmap dislikeIcon = kapp->iconLoader()->loadIcon("likeback_dislike", KIcon::Small);
+        QPixmap bugIcon     = kapp->iconLoader()->loadIcon("likeback_bug", KIcon::Small);
+        QMimeSourceFactory::defaultFactory()->setPixmap("likeback_icon_like",    likeIcon);
+        QMimeSourceFactory::defaultFactory()->setPixmap("likeback_icon_dislike", dislikeIcon);
+        QMimeSourceFactory::defaultFactory()->setPixmap("likeback_icon_bug",     bugIcon);
+        KMessageBox::information(0,
+                "<p><b>" + i18n("This is a quick feedback system for %1.").arg(s_about->programName()) + "</b></p>"
+                "<p>" + i18n("To help us improve it, your comments are important.") + "</p>"
+                "<p>" + i18n("Each time you have a great or frustrating experience, "
+                             "please click the appropriate hand below the window title-bar, "
+                             "briefly describe what you like or dislike and click Send.") + "</p>"
+                "<p><b>" + i18n("Icons description:") + "</b><table>"
+                "<tr><td><nobr><img source=\"likeback_icon_like\">: " + i18n("Send a comment about what you like.") + "</nobr></td></tr>"
+                "<tr><td><nobr><img source=\"likeback_icon_dislike\">: " + i18n("Send a comment about what you don't like.") + "</nobr></td></tr>"
+                "<tr><td><nobr><img source=\"likeback_icon_bug\">: " + i18n("Report a bug.") + "</nobr></td></tr>"
+                "</table></p>",
+                i18n("Help Improve the Application"));
+        QMimeSourceFactory::defaultFactory()->setData("likeback_icon_like", 0L);
+        QMimeSourceFactory::defaultFactory()->setData("likeback_icon_dislike", 0L);
+        QMimeSourceFactory::defaultFactory()->setData("likeback_icon_bug", 0L);
+}
+
+QString                 LikeBack::s_customLanguageMessage = QString();
+bool                    LikeBack::s_allowFeatureWishes    = false;
+LikeBack::WindowListing LikeBack::s_windowListing         = LikeBack::NoListing;
+QString                 LikeBack::s_hostName              = QString();
+QString                 LikeBack::s_remotePath            = QString();
+Q_UINT16                LikeBack::s_hostPort              = 16;
+int                     LikeBack::s_disabledCount         = 0;
+LikeBack*               LikeBack::s_instance              = 0;
+KConfig*                LikeBack::s_config                = 0;
+KAboutData*             LikeBack::s_about                 = 0;
+
+LikeBack* LikeBack::instance()
+{
+        return s_instance;
+}
+
+QString LikeBack::customLanguageMessage()
+{
+        return s_customLanguageMessage;
+}
+
+QString LikeBack::hostName()
+{
+        return s_hostName;
+}
+
+QString LikeBack::remotePath()
+{
+        return s_remotePath;
+}
+
+Q_UINT16 LikeBack::hostPort()
+{
+        return s_hostPort;
+}
+
+KAboutData* LikeBack::about()
+{
+        return s_about;
+}
+
+void LikeBack::disable()
+{
+        s_disabledCount++;
+}
+
+void LikeBack::enable()
+{
+        s_disabledCount--;
+        if (s_disabledCount < 0)
+                std::cerr << "===== LikeBack ===== Enabled too many times (less than how many times it was disabled)" << std::endl;
+}
+
+bool LikeBack::enabled()
+{
+        return s_disabledCount == 0;
+}
+
+void LikeBack::setServer(QString hostName, QString remotePath, Q_UINT16 hostPort)
+{
+        s_hostName   = hostName;
+        s_remotePath = remotePath;
+        s_hostPort   = hostPort;
+}
+
+void LikeBack::setWindowNamesListing(WindowListing windowListing)
+{
+        s_windowListing = windowListing;
+}
+
+void LikeBack::setCustomLanguageMessage(const QString &message)
+{
+        s_customLanguageMessage = message;
+}
+
+void LikeBack::setAllowFeatureWishes(bool allow)
+{
+        s_allowFeatureWishes = allow;
+}
+
+bool LikeBack::allowFeatureWishes()
+{
+        return s_allowFeatureWishes;
+}
+
+void LikeBack::autoMove()
+{
+        static QWidget *lastWindow = 0;
+
+        QWidget *window = kapp->activeWindow();
+        // When a Kicker applet has the focus, like the Commandline QLineEdit,
+        // the systemtray icon indicates to be the current window and the LikeBack is shown next to the system tray icon.
+        // It's obviously bad ;-) :
+        bool shouldShow = false;//(enabled() && window && window->inherits("KMainWindow") );
+	if (shouldShow) {
+                //move(window->x() + window->width() - 100 - width(), window->y());
+                //move(window->x() + window->width() - 100 - width(), window->mapToGlobal(QPoint(0, 0)).y() - height());
+                move(window->mapToGlobal(QPoint(0, 0)).x() + window->width() - width(), window->mapToGlobal(QPoint(0, 0)).y() + 1);
+
+                if (window != lastWindow && s_windowListing != NoListing)
+//                        if (qstricmp(window->name(), "") == 0 || qstricmp(window->name(), "unnamed") == 0) ;
+//                                std::cout << "===== LikeBack ===== UNNAMED ACTIVE WINDOW OF TYPE " << window->className() << " ======" << activeWindowPath() << std::endl;
+//                        else if (s_windowListing == AllWindows) ;
+//                                std::cout << "LikeBack: Active Window: " << activeWindowPath() << std::endl;
+                lastWindow = window;
+        }
+        if (shouldShow && !isShown()) {
+                show();
+        } else if (!shouldShow && isShown())
+                hide();
+}
+
+void LikeBack::iLike()
+{
+        showDialog(ILike);
+}
+
+void LikeBack::iDoNotLike()
+{
+        showDialog(IDoNotLike);
+}
+
+void LikeBack::iFoundABug()
+{
+        (void)new KRun(Piklab::URLS[Piklab::BugReport], kapp->mainWidget());
+    //    showDialog(IFoundABug);
+}
+
+void LikeBack::configure()
+{
+}
+
+QString LikeBack::activeWindowPath()
+{
+        QStringList windowNames;
+        QWidget *window = kapp->activeWindow();
+        while (window) {
+                QString name = window->name();
+                if (name == "unnamed")
+                        name += QString(":") + window->className();
+                windowNames.append(name);
+                window = dynamic_cast<QWidget*>(window->parent());
+        }
+
+        QString windowName;
+        for (int i = ((int)windowNames.count()) - 1; i >= 0; i--) {
+                if (windowName.isEmpty())
+                        windowName = windowNames[i];
+                else
+                        windowName += QString("~~") + windowNames[i];
+        }
+
+        return windowName;
+}
+
+void LikeBack::showDialog(Button button)
+{
+        LikeBackDialog dialog(button, activeWindowPath(), "");
+        disable();
+        hide();
+        kapp->processEvents();
+        dialog.exec();
+        enable();
+}
+
+bool LikeBack::emailAddressAlreadyProvided()
+{
+        return s_config->readBoolEntry("emailAlreadyAsked", false);
+}
+
+QString LikeBack::emailAddress()
+{
+        if (!emailAddressAlreadyProvided())
+                instance()->askEMail();
+
+        return s_config->readEntry("emailAddress", "");
+}
+
+void LikeBack::setEmailAddress(const QString &address)
+{
+        s_config->setGroup("LikeBack");
+        s_config->writeEntry("emailAddress",      address);
+        s_config->writeEntry("emailAlreadyAsked", true);
+}
+
+void LikeBack::askEMail()
+{
+        s_config->setGroup("LikeBack");
+
+        QString currentEMailAddress = s_config->readEntry("emailAddress", "");
+        if (!emailAddressAlreadyProvided() && !instance()->m_fetchedEmail.isEmpty())
+                currentEMailAddress = instance()->m_fetchedEmail;
+
+        bool ok;
+
+        QString mailExpString = "[\\w-\\.]+@[\\w-\\.]+\\.[\\w]+";
+        //QString namedMailExpString = "[.]*[ \\t]+<" + mailExpString + ">";
+        //QRegExp mailExp("^(|" + mailExpString + "|" + namedMailExpString + ")$");
+        QRegExp mailExp("^(|" + mailExpString + ")$");
+        QRegExpValidator emailValidator(mailExp, this);
+
+        disable();
+        QString email = KInputDialog::getText(
+                        i18n("Set Email Address"),
+                        "<p><b>" + i18n("Please provide your email address.") + "</b></p>" +
+                        "<p>" + i18n("It will only be used to contact you back if more information is needed about your comments, how to reproduce the bugs you report, send bug corrections for you to test...") + "</p>" +
+                        "<p>" + i18n("The email address is optional. If you do not provide any, your comments will be sent anonymously. Just click OK in that case.") + "</p>" +
+                        "<p>" + i18n("You can change or remove your email address whenever you want. For that, use the little arrow icon at the top-right corner of a window.") + "</p>" +
+                        "<p>" + i18n("Your email address (keep empty to post comments anonymously):"),
+                        currentEMailAddress, &ok, kapp->activeWindow(), /*name=*/(const char*)0, &emailValidator);
+        enable();
+
+        if (ok)
+                setEmailAddress(email);
+}
+
+// FIXME: Should be moved to KAboutData? Cigogne will also need it.
+bool LikeBack::isDevelopmentVersion(const QString &version)
+{
+        QString theVersion = (version.isEmpty() ? s_about->version() : version);
+
+        return theVersion.find("alpha", /*index=*/0, /*caseSensitive=*/false) != -1 ||
+               theVersion.find("beta",  /*index=*/0, /*caseSensitive=*/false) != -1 ||
+               theVersion.find("rc",    /*index=*/0, /*caseSensitive=*/false) != -1 ||
+               theVersion.find("svn",   /*index=*/0, /*caseSensitive=*/false) != -1 ||
+               theVersion.find("cvs",   /*index=*/0, /*caseSensitive=*/false) != -1;
+}
+
+void LikeBack::init(KConfig* config, KAboutData* about, Button buttons)
+{
+        s_config = config;
+        s_about = about;
+        init(isDevelopmentVersion(), buttons);
+}
+
+void LikeBack::init(Button buttons)
+{
+        init(isDevelopmentVersion(), buttons);
+}
+
+void LikeBack::init(bool isDevelopmentVersion, Button buttons)
+{
+        if (s_config == 0)
+                s_config = kapp->config();
+        if (s_about == 0)
+                s_about = (KAboutData*) kapp->aboutData();
+
+        if (LikeBack::userWantToParticipate() && isDevelopmentVersion)
+                new LikeBack(buttons);
+}
+
+
+
+
+
+
+
+/**
+ * Code from KBugReport::slotConfigureEmail() in kdeui/kbugreport.cpp:
+ */
+/*void LikeBack::beginFetchingEmail()
+{
+        if (m_process)
+                return;
+        m_process = new KProcess();
+        *m_process << QString::fromLatin1("kcmshell") << QString::fromLatin1("kcm_useraccount");
+        connect( m_process, SIGNAL(processExited(KProcess*)), SLOT(endFetchingEmailFrom()) );
+        if (!m_process->start()) {
+                kdDebug() << "Couldn't start kcmshell.." << endl;
+                delete m_process;
+                m_process = 0;
+                return;
+        }
+//      m_configureEmail->setEnabled(false);
+}*/
+
+/**
+ * Code from KBugReport::slotSetFrom() in kdeui/kbugreport.cpp:
+ */
+void LikeBack::endFetchingEmailFrom()
+{
+//      delete m_process;
+//      m_process = 0;
+//      m_configureEmail->setEnabled(true);
+
+        // ### KDE4: why oh why is KEmailSettings in kio?
+        KConfig emailConf( QString::fromLatin1("emaildefaults") );
+
+        // find out the default profile
+        emailConf.setGroup(QString::fromLatin1("Defaults"));
+        QString profile = QString::fromLatin1("PROFILE_");
+        profile += emailConf.readEntry(QString::fromLatin1("Profile"), QString::fromLatin1("Default"));
+
+        emailConf.setGroup(profile);
+        QString fromaddr = emailConf.readEntry(QString::fromLatin1("EmailAddress"));
+        if (fromaddr.isEmpty()) {
+                struct passwd *p;
+                p = getpwuid(getuid());
+                m_fetchedEmail = QString::fromLatin1(p->pw_name);
+        } else {
+                QString name = emailConf.readEntry(QString::fromLatin1("FullName"));
+                if (!name.isEmpty())
+                        m_fetchedEmail = /*name + QString::fromLatin1(" <") +*/ fromaddr /*+ QString::fromLatin1(">")*/;
+        }
+//      m_from->setText( fromaddr );
+}
+
+
+
+
+
+
+
+/** class LikeBackDialog: */
+
+LikeBackDialog::LikeBackDialog(LikeBack::Button reason, QString windowName, QString context)
+ : KDialog(kapp->activeWindow(), "_likeback_feedback_window_")
+ , m_reason(reason)
+ , m_windowName(windowName)
+ , m_context(context)
+{
+        setModal(true);
+        QVBoxLayout *mainLayout = new QVBoxLayout(this);
+
+        QWidget *coloredWidget = new QWidget(this);
+        QLabel  *explainings = new QLabel(this);
+        QHBoxLayout *explainingLayout = new QHBoxLayout((QWidget*)0, KDialogBase::marginHint());
+        explainingLayout->addWidget(explainings);
+        mainLayout->addWidget(coloredWidget);
+
+        QColor  color;
+        QColor  lineColor;
+        QPixmap icon;
+        QString title;
+        QString please;
+        switch (reason) {
+                case LikeBack::ILike:
+                        color     = QColor("#DFFFDF");
+                        lineColor = Qt::green;
+                        icon      = kapp->iconLoader()->loadIcon("likeback_like",    KIcon::Small);
+                        title     = i18n("I like...");
+                        please    = i18n("Please briefly describe what you like.");
+                        break;
+                case LikeBack::IDoNotLike:
+                        color     = QColor("#FFDFDF");
+                        lineColor = Qt::red;
+                        icon      = kapp->iconLoader()->loadIcon("likeback_dislike", KIcon::Small);
+                        title     = i18n("I do not like...");
+                        please    = i18n("Please briefly describe what you do not like.");
+                        break;
+                case LikeBack::IFoundABug:
+                        color     = QColor("#C0C0C0");
+                        lineColor = Qt::black;
+                        icon      = kapp->iconLoader()->loadIcon("bug",              KIcon::Small);
+                        title     = i18n("I found a bug...");
+                        please    = i18n("Please briefly describe the bug you encountered.");
+                        break;
+                case LikeBack::Configure:
+                case LikeBack::AllButtons:
+                        return;
+        }
+
+        QWidget *line = new QWidget(this);
+        line->setPaletteBackgroundColor(lineColor);
+        line->setFixedHeight(1);
+        mainLayout->addWidget(line);
+        mainLayout->addLayout(explainingLayout);
+
+        QHBoxLayout *titleLayout = new QHBoxLayout(0);
+        coloredWidget->setPaletteBackgroundColor(color);
+        QLabel *iconLabel = new QLabel(coloredWidget);
+        iconLabel->setPixmap(icon);
+        QLabel *titleLabel = new QLabel(title, coloredWidget);
+        QFont font = titleLabel->font();
+        font.setBold(true);
+        titleLabel->setFont(font);
+        titleLabel->setPaletteForegroundColor(Qt::black);
+        titleLayout->addWidget(iconLabel);
+        titleLayout->addSpacing(4);
+        titleLayout->addWidget(titleLabel);
+        titleLayout->addStretch();
+
+        QVBoxLayout *coloredWidgetLayout = new QVBoxLayout(coloredWidget);
+        coloredWidgetLayout->setMargin(KDialogBase::marginHint());
+        coloredWidgetLayout->setSpacing(KDialogBase::spacingHint());
+        coloredWidgetLayout->addLayout(titleLayout);
+
+        QHBoxLayout *commentLayout = new QHBoxLayout((QWidget*)0);
+        commentLayout->setMargin(0);
+        commentLayout->setSpacing(KDialogBase::spacingHint());
+        m_comment = new QTextEdit(coloredWidget);
+        QIconSet sendIconSet = kapp->iconLoader()->loadIconSet("mail_send", KIcon::Toolbar);
+        m_sendButton = new QPushButton(sendIconSet, i18n("Send"), coloredWidget);
+        m_sendButton->setSizePolicy(QSizePolicy::Fixed, QSizePolicy::Expanding);
+        m_sendButton->setEnabled(false);
+        connect( m_sendButton, SIGNAL(clicked()),     this, SLOT(send())           );
+        connect( m_comment,    SIGNAL(textChanged()), this, SLOT(commentChanged()) );
+        commentLayout->addWidget(m_comment);
+        commentLayout->addWidget(m_sendButton);
+        coloredWidgetLayout->addLayout(commentLayout);
+
+        explainings->setText(
+                        "<p>" + please + " " +
+                        (LikeBack::customLanguageMessage().isEmpty() ?
+                                i18n("Only english language is accepted.") :
+                                LikeBack::customLanguageMessage()
+                        )  + " " +
+                        (reason == LikeBack::ILike || reason == LikeBack::IDoNotLike ?
+                                i18n("Note that to improve this application, it's important to tell us the things you like as much as the things you dislike.") + " " :
+                                ""
+                        ) +
+                        (LikeBack::allowFeatureWishes() ?
+                                "" :
+                                i18n("Do not ask for features: your wishes will be ignored.")
+                        ) + "</p>"
+        );
+
+        resize(kapp->desktop()->width() / 2, kapp->desktop()->height() / 3);
+
+        setCaption(kapp->makeStdCaption(i18n("Send a Comment")));
+        //      setMinimumSize(mainLayout->sizeHint()); // FIXME: Doesn't work!
+}
+
+LikeBackDialog::~LikeBackDialog()
+{
+}
+
+QHttp *http ;
+
+void LikeBackDialog::send()
+{
+        QString emailAddress = LikeBack::instance()->emailAddress();
+
+        QString type = (m_reason == LikeBack::ILike ? "Like" : (m_reason == LikeBack::IDoNotLike ? "Dislike" : "Bug"));
+        QString data =
+                        "protocol=" + KURL::encode_string("1.0")                         + "&" +
+                        "type="     + KURL::encode_string(type)                          + "&" +
+                        "version="  + KURL::encode_string(LikeBack::about()->version())  + "&" +
+                        "locale="   + KURL::encode_string(KGlobal::locale()->language()) + "&" +
+                        "window="   + KURL::encode_string(m_windowName)                  + "&" +
+                        "context="  + KURL::encode_string(m_context)                     + "&" +
+                        "comment="  + KURL::encode_string(m_comment->text())             + "&" +
+                        "email="    + KURL::encode_string(emailAddress);
+        //QByteArray *data = new QByteArray();
+        /*QHttp **/http = new QHttp(LikeBack::hostName(), LikeBack::hostPort());
+
+//        std::cout << "http://" << LikeBack::hostName() << ":" << LikeBack::hostPort() << LikeBack::remotePath() << std::endl;
+//        std::cout << data << std::endl;
+        connect( http, SIGNAL(requestFinished(int, bool)), this, SLOT(requestFinished(int, bool)) );
+//      http->post(LikeBack::remotePath(), data.utf8());
+
+        QHttpRequestHeader header("POST", LikeBack::remotePath());
+        header.setValue("Host", LikeBack::hostName());
+        header.setValue("Content-Type", "application/x-www-form-urlencoded");
+        http->setHost(LikeBack::hostName());
+        http->request(header, data.utf8());
+
+
+        m_comment->setEnabled(false);
+}
+
+void LikeBackDialog::requestFinished(int /*id*/, bool error)
+{
+        // TODO: Save to file if error (connection not present at the moment)
+        m_comment->setEnabled(true);
+        LikeBack::disable();
+        if (error) {
+                KMessageBox::error(this, i18n("<p>Error while trying to send the report.</p><p>Please retry later.</p>"), i18n("Transfer Error"));
+        } else {
+                KMessageBox::information(this, i18n("<p>Your comment has been sent successfully. It will help improve the application.</p><p>Thanks for your time.</p>") /*+ QString(http->readAll())*/, i18n("Comment Sent"));
+                close();
+        }
+        LikeBack::enable();
+}
+
+void LikeBackDialog::commentChanged()
+{
+        m_sendButton->setEnabled(!m_comment->text().isEmpty());
+}
diff --git a/src/libgui/likeback.h b/src/libgui/likeback.h
new file mode 100644
index 0000000..70a68dd
--- /dev/null
+++ b/src/libgui/likeback.h
@@ -0,0 +1,120 @@
+/***************************************************************************
+ *   Copyright (C) 2006 by S�bastien Laot                                 *
+ *   slaout@linux62.org                                                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.             *
+ ***************************************************************************/
+#ifndef LIKEBACK_H
+#define LIKEBACK_H
+
+#include <kdialog.h>
+#include <qtimer.h>
+
+class QTextEdit;
+class QToolButton;
+class QPushButton;
+class KProcess;
+class KConfig;
+class KAboutData;
+
+/**
+  * @author S�astien Laot <slaout@linux62.org>
+  */
+class LikeBack : public QWidget
+{
+  Q_OBJECT
+  public:
+        enum Button { ILike = 0x01, IDoNotLike = 0x02, IFoundABug = 0x04, Configure = 0x10,
+                      AllButtons = ILike | IDoNotLike | IFoundABug | Configure };
+        enum WindowListing { NoListing, WarnUnnamedWindows, AllWindows };
+        LikeBack(Button buttons = AllButtons);
+        ~LikeBack();
+        static void showInformationMessage();
+        static LikeBack* instance();
+        static QString customLanguageMessage();
+        static bool allowFeatureWishes();
+        static QString  hostName();
+        static QString  remotePath();
+        static Q_UINT16 hostPort();
+        static void setServer(QString hostName, QString remotePath, Q_UINT16 hostPort = 80);
+        static void setWindowNamesListing(WindowListing windowListing);
+        static void setCustomLanguageMessage(const QString &message);
+        static void setAllowFeatureWishes(bool allow);
+        static bool enabled();
+        static void disable();
+        static void enable();
+        static bool userWantToParticipate(); /// << @Returns true if the user have not disabled LikeBack for this version
+        static bool emailAddressAlreadyProvided();
+        static QString emailAddress(); /// << @Returns the email user address, or ask it to the user if he haven't provided or ignored it
+        static void setEmailAddress(const QString &address); /// << Calling emailAddress() will ask it to the user the first time
+        static bool isDevelopmentVersion(const QString &version = QString::null); /// << @Returns true if version is an alpha/beta/rc/svn/cvs version. Use kapp->aboutData()->version is @p version is empty
+        static void init(Button buttons = AllButtons); /// << Initialize the LikeBack system: enable it if the application version is a development one.
+        static void init(bool isDevelopmentVersion, Button buttons = AllButtons);  /// << Initialize the LikeBack system: enable it if @p isDevelopmentVersion is true.
+        static void init(KConfig* config, KAboutData* about, Button buttons = AllButtons);
+        static QString activeWindowPath();
+        static KAboutData* about();
+  public slots:
+        void iLike();
+        void iDoNotLike();
+        void iFoundABug();
+        void configure();
+
+  private slots:
+        void autoMove();
+        void showDialog(Button button);
+        void openConfigurePopup();
+        void doNotHelpAnymore();
+        void showWhatsThisMessage();
+        void askEMail();
+//      void beginFetchingEmail();
+        void endFetchingEmailFrom(); // static QString fetchingEmail();
+  private:
+        QTimer       m_timer;
+        Button       m_buttons;
+        QToolButton *m_configureButton;
+        QString      m_fetchedEmail;
+        KProcess    *m_process;
+        static QString        s_hostName;
+        static QString        s_remotePath;
+        static Q_UINT16       s_hostPort;
+        static QString        s_customLanguageMessage;
+        static bool           s_allowFeatureWishes;
+        static WindowListing  s_windowListing;
+        static LikeBack      *s_instance;
+        static int            s_disabledCount;
+        static KConfig       *s_config;
+        static KAboutData    *s_about;
+};
+
+class LikeBackDialog : public KDialog
+{
+  Q_OBJECT
+  public:
+        LikeBackDialog(LikeBack::Button reason, QString windowName, QString context);
+        ~LikeBackDialog();
+  private:
+        LikeBack::Button  m_reason;
+        QTextEdit        *m_comment;
+        QPushButton      *m_sendButton;
+        QString           m_windowName;
+        QString           m_context;
+  private slots:
+        void send();
+        void requestFinished(int id, bool error);
+        void commentChanged();
+};
+
+#endif // LIKEBACK_H
diff --git a/src/libgui/log_view.cpp b/src/libgui/log_view.cpp
new file mode 100644
index 0000000..158c281
--- /dev/null
+++ b/src/libgui/log_view.cpp
@@ -0,0 +1,135 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "log_view.h"
+
+#include <qpopupmenu.h>
+#include <qeventloop.h>
+#include <qapplication.h>
+#include <kiconloader.h>
+
+#include "global_config.h"
+#include "common/gui/purl_gui.h"
+#include "common/gui/misc_gui.h"
+
+Log::Widget::Widget(QWidget *parent, const char *name)
+  : QTextEdit(parent, name)
+{
+  setTextFormat(LogText);
+  setMinimumWidth(300);
+}
+
+void Log::Widget::updateDebugLevel()
+{
+  setDebugLevel(GlobalConfig::debugLevel());
+}
+
+void Log::Widget::logExtra(const QString &text)
+{
+  _text += text;
+  if ( GlobalConfig::logOutputType()==GuiConsole ) fprintf(stdout, "%s", text.latin1());
+}
+
+void Log::Widget::doLog(LineType type, const QString &text, Action action)
+{
+  doLog(text, type.data().color, type.data().bold, action);
+}
+
+void Log::Widget::doLog(DebugLevel level, const QString &text, Action action)
+{
+  doLog(text, level.data().color, false, action);
+}
+
+void Log::Widget::doLog(const QString &text, const QString &color, bool bold, Action action)
+{
+  logExtra(text + "\n");
+  QString s = QString("<font color=%1>").arg(color);
+  if (bold) s += "<b>";
+  s += escapeXml(text);
+  if (bold) s += "</b>";
+  s += "</font>";
+  QTextEdit::append(s);
+  updateContents(); // #### fix bug in Qt (display is messed up)
+  ensureVisible(0, contentsHeight());
+  if ( action==Immediate)
+    QApplication::eventLoop()->processEvents(QEventLoop::ExcludeUserInput);
+}
+
+void Log::Widget::appendToLastLine(const QString &text)
+{
+  logExtra(text);
+  uint p = paragraphs() - 1;
+  insertAt(escapeXml(text), p, paragraphLength(p));
+  updateContents(); // #### fix bug in Qt (display is messed up)
+  ensureVisible(0, contentsHeight());
+  // immediately visible...
+  QApplication::eventLoop()->processEvents(QEventLoop::ExcludeUserInput);
+}
+
+QPopupMenu *Log::Widget::createPopupMenu(const QPoint &pos)
+{
+  updateDebugLevel();
+  _popup = QTextEdit::createPopupMenu(pos);
+  KIconLoader loader;
+  QIconSet iset = loader.loadIconSet("filesave", KIcon::Small, 0);
+  _popup->insertItem(iset, "Save As...", this, SLOT(saveAs()));
+  iset = loader.loadIconSet("fileclose", KIcon::Small, 0);
+  _popup->insertItem(iset, "Clear", this, SLOT(clear()));
+  _popup->insertSeparator();
+  FOR_EACH(DebugLevel, level) {
+    _id[level.type()] = _popup->insertItem(level.label());
+    _popup->setItemChecked(_id[level.type()], _debugLevel==level);
+  }
+  _popup->insertSeparator();
+  int id = _popup->insertItem(i18n("Output in console"), this, SLOT(toggleConsoleOutput()));
+  _popup->setItemChecked(id, GlobalConfig::logOutputType()==GuiConsole);
+  connect(_popup, SIGNAL(activated(int)), SLOT(toggleVisible(int)));
+  return _popup;
+}
+
+void Log::Widget::toggleVisible(int id)
+{
+  FOR_EACH(DebugLevel, level) {
+    if ( _id[level.type()]==id ) {
+      _debugLevel = level;
+      GlobalConfig::writeDebugLevel(level);
+      break;
+    }
+  }
+}
+
+void Log::Widget::toggleConsoleOutput()
+{
+  GlobalConfig::writeLogOutputType(GlobalConfig::logOutputType()==GuiOnly ? GuiConsole : GuiOnly);
+}
+
+void Log::Widget::sorry(const QString &message, const QString &details)
+{
+  logExtra(message + " [" + details + "]\n");
+  MessageBox::detailedSorry(message, details, Log::Show);
+}
+
+bool Log::Widget::askContinue(const QString &message)
+{
+  bool ok = MessageBox::askContinue(message);
+  logExtra(message + " [" + (ok ? "continue" : "cancel") + "]\n");
+  return ok;
+}
+
+void Log::Widget::clear()
+{
+  QTextEdit::clear();
+  _text = QString::null;
+}
+
+void Log::Widget::saveAs()
+{
+  PURL::Url url = PURL::getSaveUrl(":save_log", "text/x-log", this, i18n("Save log to file"), PURL::AskOverwrite);
+  if ( url.isEmpty() ) return;
+  url.write(_text, *this);
+}
diff --git a/src/libgui/log_view.h b/src/libgui/log_view.h
new file mode 100644
index 0000000..c84849e
--- /dev/null
+++ b/src/libgui/log_view.h
@@ -0,0 +1,51 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef LOG_VIEW_H
+#define LOG_VIEW_H
+
+#include <qtextedit.h>
+#include "common/global/log.h"
+
+namespace Log
+{
+enum OutputType { GuiOnly = 0, GuiConsole, Nb_OutputTypes };
+
+class Widget : public QTextEdit, public View
+{
+  Q_OBJECT
+public:
+  Widget(QWidget *parent = 0, const char *name = 0);
+  virtual void appendToLastLine(const QString &text);
+  virtual void clear();
+  virtual void sorry(const QString &message, const QString &details);
+  virtual bool askContinue(const QString &message);
+
+protected:
+  QPopupMenu *createPopupMenu(const QPoint &pos);
+
+private slots:
+  void toggleVisible(int i);
+  void toggleConsoleOutput();
+  void saveAs();
+
+private:
+  int         _id[DebugLevel::Nb_Types];
+  QPopupMenu *_popup;
+  QString     _text;
+
+  virtual void updateDebugLevel();
+  virtual void doLog(LineType type, const QString &text, Action action = Immediate);
+  virtual void doLog(DebugLevel level, const QString &text, Action action = Immediate);
+  void doLog(const QString &text, const QString &color, bool bold, Action action = Immediate);
+  void logExtra(const QString &text);
+};
+
+} // namespace
+
+#endif
diff --git a/src/libgui/main_global.cpp b/src/libgui/main_global.cpp
new file mode 100644
index 0000000..8741a44
--- /dev/null
+++ b/src/libgui/main_global.cpp
@@ -0,0 +1,81 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "main_global.h"
+
+#include <qpopupmenu.h>
+
+#include "toplevel.h"
+#include "common/global/about.h"
+#include "global_config.h"
+#include "devices/list/device_list.h"
+#include "project_manager.h"
+#include "editor_manager.h"
+#include "tools/list/compile_config.h"
+#include "gui_prog_manager.h"
+#include "device_editor.h"
+
+Main::State Main::_state = Main::Idle;
+MainWindow *Main::_toplevel = 0;
+EditorManager *Main::_editorManager = 0;
+ProjectManager::View *Main::_projectManager = 0;
+Breakpoint::View *Main::_breakpointsView = 0;
+Register::WatchView *Main::_watchView = 0;
+Compile::LogWidget *Main::_compileLog = 0;
+Compile::Manager *Main::_compileManager = 0;
+ConsoleView *Main::_consoleView = 0;
+
+void Main::setState(State state)
+{
+  _state = state;
+  _toplevel->updateGUI();
+}
+
+Programmer::Base *Main::programmer()
+{
+  return Programmer::manager->programmer();
+}
+
+const Programmer::Group &Main::programmerGroup()
+{
+  return GlobalConfig::programmerGroup();
+}
+
+Programmer::State Main::programmerState()
+{
+  return (programmer() ? programmer()->state() : Programmer::NotConnected);
+}
+
+KAction *Main::action(const char* name)
+{
+  return _toplevel->KMainWindow::action(name);
+}
+KAction *Main::action(KStdAction::StdAction action)
+{
+  return _toplevel->KMainWindow::action(KStdAction::name(action));
+}
+
+QPopupMenu &Main::popup(const char *name)
+{
+  QPopupMenu *popup = static_cast<QPopupMenu *>(_toplevel->factory()->container(name, _toplevel));
+  Q_ASSERT(popup);
+  return *popup;
+}
+
+const Device::Data *Main::deviceData()
+{
+  QString name = device();
+  if ( name==Device::AUTO_DATA.name )
+    name = DeviceEditor::guessDeviceFromFile(_projectManager->projectUrl());
+  return Device::lister().data(name);
+}
+
+Editor *Main::currentEditor() { return _editorManager->currentEditor(); }
+Project *Main::project() { return _projectManager->project(); }
+QString Main::device() { return Compile::Config::device(project()); }
+const Tool::Group &Main::toolGroup() { return Compile::Config::toolGroup(project()); }
diff --git a/src/libgui/main_global.h b/src/libgui/main_global.h
new file mode 100644
index 0000000..020253e
--- /dev/null
+++ b/src/libgui/main_global.h
@@ -0,0 +1,70 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef MAIN_GLOBAL_H
+#define MAIN_GLOBAL_H
+
+#include <qstring.h>
+#include <qpopupmenu.h>
+#include <kstdaction.h>
+
+#include "progs/base/generic_prog.h"
+
+class EditorManager;
+namespace ProjectManager { class View; }
+class Editor;
+class Project;
+namespace Compile { class LogWidget; class Manager; }
+namespace Register { class List; class WatchView; }
+namespace Breakpoint { class View; }
+class MainWindow;
+namespace Programmer { class Group; class Base; }
+namespace Device { class Data; }
+namespace Tool { class Group; }
+class ConsoleView;
+
+class Main
+{
+public:
+  enum State { Idle, Compiling, Programming, Closing };
+  static void setState(State state);
+  static State state() { return _state; }
+
+  static MainWindow &toplevel() { return *_toplevel; }
+  static const Programmer::Group &programmerGroup();
+  static Programmer::Base *programmer();
+  static Programmer::State programmerState();
+  static KAction *action(const char *name);
+  static KAction *action(KStdAction::StdAction action);
+  static QPopupMenu &popup(const char *name);
+  static EditorManager &editorManager() { return *_editorManager; }
+  static Editor *currentEditor();
+  static QString device();
+  static const Device::Data *deviceData();
+  static Breakpoint::View &breakpointsView() { return *_breakpointsView; }
+  static ProjectManager::View &projectManager() { return *_projectManager; }
+  static Project *project();
+  static Register::WatchView &watchView() { return *_watchView; }
+  static Compile::LogWidget &compileLog() { return *_compileLog; }
+  static const Tool::Group &toolGroup();
+
+private:
+  static State                 _state;
+  static MainWindow           *_toplevel;
+  static EditorManager        *_editorManager;
+  static ProjectManager::View *_projectManager;
+  static Breakpoint::View     *_breakpointsView;
+  static Register::WatchView  *_watchView;
+  static Compile::LogWidget   *_compileLog;
+  static Compile::Manager     *_compileManager;
+  static ConsoleView          *_consoleView;
+
+  friend class MainWindow;
+};
+
+#endif
diff --git a/src/libgui/new_dialogs.cpp b/src/libgui/new_dialogs.cpp
new file mode 100644
index 0000000..d26c15c
--- /dev/null
+++ b/src/libgui/new_dialogs.cpp
@@ -0,0 +1,83 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "new_dialogs.h"
+
+#include <klocale.h>
+#include <kiconloader.h>
+#include <kpushbutton.h>
+
+#include "common/gui/purl_gui.h"
+#include "project.h"
+
+//----------------------------------------------------------------------------
+NewDialog::NewDialog(const QString &caption, QWidget *parent)
+  : Dialog(parent, "new_dialog", true, caption, Ok|Cancel, Ok, false)
+{
+  _top = new QGridLayout(mainWidget(), 0, 0, 10, 10);
+  _top->setColStretch(2, 1);
+
+  _fLabel = new QLabel(mainWidget());
+  _top->addWidget(_fLabel, 0, 0);
+  _filename = new QLineEdit(mainWidget());
+  connect(_filename, SIGNAL(textChanged(const QString &)), SLOT(changed()));
+  _top->addMultiCellWidget(_filename, 0,0, 1,3);
+
+  QLabel *label= new QLabel(i18n("Location:"), mainWidget());
+  _top->addWidget(label, 1, 0);
+  _dir = new QLineEdit(mainWidget());
+  connect(_dir, SIGNAL(textChanged(const QString &)), SLOT(changed()));
+  _top->addMultiCellWidget(_dir, 1,1, 1,2);
+  KIconLoader loader;
+  QIconSet iconset = loader.loadIcon("fileopen", KIcon::Toolbar);
+  KPushButton *button = new KPushButton(iconset, QString::null, mainWidget());
+  connect(button, SIGNAL(clicked()), SLOT(browse()));
+  _top->addWidget(button, 1, 3);
+
+  _filename->setFocus();
+  enableButtonOK(false);
+}
+
+void NewDialog::changed()
+{
+  enableButtonOK(!_filename->text().isEmpty() && !_dir->text().isEmpty());
+}
+
+void NewDialog::browse()
+{
+  PURL::Directory dir = PURL::getExistingDirectory(startDir(), this, QString::null);
+  if ( dir.isEmpty() ) return;
+  _dir->setText(dir.path());
+}
+
+//----------------------------------------------------------------------------
+NewFileDialog::NewFileDialog(Project *project, QWidget *parent)
+  : NewDialog(i18n("Create New File"), parent), _project(project)
+{
+  _fLabel->setText(i18n("File Name:"));
+
+  if (project) {
+    _add = new QCheckBox(i18n("Add to project"), mainWidget());
+    _add->setChecked(project);
+    _top->addMultiCellWidget(_add, 2,2, 1,2);
+    _top->setRowStretch(3, 1);
+    _dir->setText(project->directory().path());
+  }
+}
+
+QString NewFileDialog::startDir() const
+{
+  if (_project) return _project->directory().path();
+  return ":new_file";
+}
+
+PURL::Url NewFileDialog::url() const
+{
+  return PURL::Url(PURL::Directory(_dir->text()), _filename->text());
+}
diff --git a/src/libgui/new_dialogs.h b/src/libgui/new_dialogs.h
new file mode 100644
index 0000000..26e3cf7
--- /dev/null
+++ b/src/libgui/new_dialogs.h
@@ -0,0 +1,59 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef NEW_DIALOGS_H
+#define NEW_DIALOGS_H
+
+#include <qlineedit.h>
+#include <qcheckbox.h>
+#include <qcombobox.h>
+#include <qlabel.h>
+#include <qlayout.h>
+#include <kcombobox.h>
+
+#include "common/global/purl.h"
+#include "common/gui/dialog.h"
+class Project;
+
+//----------------------------------------------------------------------------
+class NewDialog : public Dialog
+{
+Q_OBJECT
+public:
+  NewDialog(const QString &caption, QWidget *parent);
+
+protected:
+  QGridLayout *_top;
+  QLabel      *_fLabel;
+  QLineEdit   *_filename, *_dir;
+
+  virtual QString startDir() const = 0;
+
+private slots:
+  void changed();
+  void browse();
+};
+
+//----------------------------------------------------------------------------
+class NewFileDialog : public NewDialog
+{
+Q_OBJECT
+public:
+  NewFileDialog(Project *project, QWidget *parent);
+  PURL::Url url() const;
+  bool addToProject() const { return (_project ? _add->isChecked() : false); }
+
+private:
+  Project   *_project;
+  QCheckBox *_add;
+
+  virtual QString startDir() const;
+};
+
+#endif
diff --git a/src/libgui/object_view.cpp b/src/libgui/object_view.cpp
new file mode 100644
index 0000000..91625fb
--- /dev/null
+++ b/src/libgui/object_view.cpp
@@ -0,0 +1,145 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "object_view.h"
+
+#include <klocale.h>
+
+#include "devices/base/device_group.h"
+#include "devices/pic/pic/pic_memory.h"
+#include "tools/gputils/gputils.h"
+#include "hex_editor.h"
+#include "coff/base/text_coff.h"
+#include "coff/base/coff_archive.h"
+#include "main_global.h"
+#include "tools/list/compile_process.h"
+#include "coff/base/disassembler.h"
+#include "common/gui/misc_gui.h"
+
+//-----------------------------------------------------------------------------
+Coff::BaseEditor::BaseEditor(const PURL::Url &source, const Device::Data *data, QWidget *parent)
+  : SimpleTextEditor(true, parent), _source(source), _ok(false), _created(0), _device(data)
+{
+  setReadOnly(true);
+  _view->setDynWordWrap(false);
+  setView(&Main::compileLog());
+}
+
+Coff::BaseEditor::~BaseEditor()
+{
+  delete _created;
+}
+
+//-----------------------------------------------------------------------------
+Coff::CoffEditor::CoffEditor(const PURL::Url &source, const Device::Data &data, QWidget *parent)
+  : BaseEditor(source, &data, parent), _provided(0)
+{}
+
+Coff::CoffEditor::CoffEditor(const TextObject &object, QWidget *parent)
+  : BaseEditor(PURL::Url(), object.device(), parent), _provided(&object)
+{}
+
+bool Coff::CoffEditor::open(const PURL::Url &url)
+{
+  _url = url;
+  if (_provided) return setText(_provided->disassembly());
+  if ( _created==0 ) {
+    _created = new TextObject(_device, _source);
+    _ok = _created->parse(*this);
+  }
+  return setText(static_cast<Coff::TextObject *>(_created)->disassembly());
+}
+
+//-----------------------------------------------------------------------------
+Coff::ObjectEditor::ObjectEditor(const PURL::Url &source, QWidget *parent)
+  : BaseEditor(source, 0, parent)
+{}
+
+bool Coff::ObjectEditor::open(const PURL::Url &url)
+{
+  _url = url;
+  if ( _created==0 ) {
+    _created = new TextObject(0, _source);
+    _ok = _created->parse(*this);
+  }
+  if ( !_ok ) return setText(i18n("Error parsing object:\n") + error());
+  QString s = coff()->information().text() + "\n";
+  return setText(s);
+}
+
+//-----------------------------------------------------------------------------
+Coff::LibraryEditor::LibraryEditor(const PURL::Url &source, QWidget *parent)
+  : BaseEditor(source, 0, parent)
+{}
+
+bool Coff::LibraryEditor::open(const PURL::Url &url)
+{
+  _url = url;
+  if ( _created==0 ) {
+    _created = new Archive(_source);
+    _ok = _created->parse(*this);
+  }
+  if ( !_ok ) return setText(i18n("Error parsing library:\n") + error());
+  QString s = coff()->information().text() + "\n";
+  if ( coff()->members().count()!=0 ) s += coff()->membersInformation().text() + "\n";
+  if ( coff()->symbols().count()!=0 ) s += coff()->symbolsInformation().text() + "\n";
+  return setText(s);
+}
+
+//-----------------------------------------------------------------------------
+DisassemblyEditor::DisassemblyEditor(const PURL::Url &source, const Device::Data &data, QWidget *parent)
+  : SimpleTextEditor(true, parent), _source(source), _device(data), _editor(0)
+{
+  setReadOnly(true);
+  _view->setDynWordWrap(false);
+  setView(&Main::compileLog());
+}
+
+DisassemblyEditor::DisassemblyEditor(const HexEditor &e, const Device::Data &data, QWidget *parent)
+  : SimpleTextEditor(true, parent), _device(data), _editor(&e)
+{
+  setReadOnly(true);
+  _view->setDynWordWrap(false);
+  setView(&Main::compileLog());
+}
+
+bool DisassemblyEditor::open(const PURL::Url &url)
+{
+  _url = url;
+  if ( Main::toolGroup().name()!="sdcc" && Main::toolGroup().name()!="gputils" ) {
+    MessageBox::sorry(i18n("Disassembly not supported for the selected toolchain."), Log::Show);
+    return false;
+  }
+  Pic::Architecture arch = (_device.group().name()=="pic" ? static_cast<const Pic::Data &>(_device).architecture() : Pic::Architecture(Pic::Architecture::Nb_Types));
+  if ( arch==Pic::Architecture::Nb_Types ) {
+    MessageBox::sorry(i18n("Disassembly not supported for the selected device."), Log::Show);
+    return false;
+  }
+
+  Device::Memory *memory = 0;
+  if ( _editor==0 ) {
+    log(Log::LineType::Information, i18n("Disassembling hex file: %1").arg(_source.pretty()));
+    PURL::File file(_source, Main::compileLog());
+    if ( !file.openForRead() ) return false;
+    memory = _device.group().createMemory(_device);
+    QStringList errors, warnings;
+    Device::Memory::WarningTypes warningTypes;
+    if ( !memory->load(file.stream(), errors, warningTypes, warnings) ) {
+      delete memory;
+      log(Log::LineType::Error, errors[0]);
+      return false;
+    }
+    for (uint i=0; i<warnings.count(); i++) log(Log::LineType::Warning, warnings[i]);
+  } else {
+    log(Log::LineType::Information, i18n("Disassembling content of hex file editor."));
+    memory = const_cast<Device::Memory *>(_editor->memory());
+  }
+  SourceLine::List list = GPUtils::disassemble(static_cast<const Pic::Memory &>(*memory));
+  if ( _editor==0 ) delete memory;
+  return setText(SourceLine::text(PURL::SourceFamily::Asm, list, 4));
+}
diff --git a/src/libgui/object_view.h b/src/libgui/object_view.h
new file mode 100644
index 0000000..358101b
--- /dev/null
+++ b/src/libgui/object_view.h
@@ -0,0 +1,99 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef OBJECT_VIEW_H
+#define OBJECT_VIEW_H
+
+#include "text_editor.h"
+#include "coff/base/coff_archive.h"
+#include "coff/base/coff_object.h"
+namespace Device { class Data; }
+class HexEditor;
+
+namespace Coff
+{
+class Base;
+class TextObject;
+
+//-----------------------------------------------------------------------------
+class BaseEditor : public SimpleTextEditor, public Log::Base
+{
+Q_OBJECT
+public:
+  BaseEditor(const PURL::Url &source, const Device::Data *data, QWidget *parent);
+  virtual ~BaseEditor();
+  virtual PURL::Url url() const { return _url; }
+
+protected:
+  PURL::Url           _source, _url;
+  bool                _ok;
+  Coff::Base         *_created;
+  const Device::Data *_device;
+};
+
+//-----------------------------------------------------------------------------
+class CoffEditor : public BaseEditor
+{
+Q_OBJECT
+public:
+  CoffEditor(const PURL::Url &source, const Device::Data &data, QWidget *parent);
+  CoffEditor(const TextObject &object, QWidget *parent);
+  virtual PURL::FileType fileType() const { return PURL::Coff; }
+  virtual bool open(const PURL::Url &url);
+
+private:
+  const TextObject *_provided;
+};
+
+//-----------------------------------------------------------------------------
+class ObjectEditor : public BaseEditor
+{
+Q_OBJECT
+public:
+  ObjectEditor(const PURL::Url &source, QWidget *parent);
+  virtual PURL::FileType fileType() const { return PURL::Unknown; }
+  virtual bool open(const PURL::Url &url);
+
+private:
+  const Coff::Object *coff() const { return static_cast<const Coff::Object *>(_created); }
+};
+
+//-----------------------------------------------------------------------------
+class LibraryEditor : public BaseEditor
+{
+Q_OBJECT
+public:
+  LibraryEditor(const PURL::Url &source, QWidget *parent);
+  virtual PURL::FileType fileType() const { return PURL::Unknown; }
+  virtual bool open(const PURL::Url &url);
+
+private:
+  const Coff::Archive *coff() const { return static_cast<const Coff::Archive *>(_created); }
+};
+
+} // namespace
+
+//-----------------------------------------------------------------------------
+class DisassemblyEditor : public SimpleTextEditor, public Log::Base
+{
+Q_OBJECT
+public:
+  DisassemblyEditor(const PURL::Url &hexUrl, const Device::Data &data, QWidget *parent);
+  DisassemblyEditor(const HexEditor &e, const Device::Data &data, QWidget *parent);
+  virtual PURL::FileType fileType() const { return PURL::AsmGPAsm; }
+  virtual bool open(const PURL::Url &url);
+  virtual PURL::Url url() const { return _url; }
+
+private:
+  PURL::Url           _source, _url;
+  const Device::Data &_device;
+  const HexEditor    *_editor;
+};
+
+
+#endif
diff --git a/src/libgui/project.cpp b/src/libgui/project.cpp
new file mode 100644
index 0000000..dcf34c3
--- /dev/null
+++ b/src/libgui/project.cpp
@@ -0,0 +1,226 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003 Alain Gibaud <alain.gibaud@free.fr>                *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "project.h"
+
+#include <ksimpleconfig.h>
+
+#include "devices/list/device_list.h"
+#include "progs/base/prog_group.h"
+#include "global_config.h"
+#include "tools/gputils/gputils_config.h"
+
+bool Project::load(QString &error)
+{
+  if ( _url.fileType()==PURL::Project ) return XmlDataFile::load(error);
+
+  if ( !_url.exists() ) {
+    error = i18n("Project file %1 does not exist.").arg(_url.pretty());
+    return false;
+  }
+  PURL::Url tmp = _url;
+  _url = _url.toFileType(PURL::Project);
+  if ( _url.exists() && XmlDataFile::load(error) ) return true;
+  KConfig *config = new KSimpleConfig(tmp.filepath(), false);
+
+  config->setGroup("Files");
+  QStringList list = config->readListEntry("inputFiles");
+  QStringList::const_iterator it = list.begin();
+  for (; it!=list.end(); ++it) addFile(PURL::Url(directory(), *it));
+
+  config->setGroup("General");
+  setVersion(config->readEntry("version", "0.1"));
+  setDescription(config->readEntry("description", QString::null));
+
+  config->setGroup("Assembler");
+  QString device = config->readEntry("target-device");
+  if ( device=="*" ) device = GlobalConfig::programmerGroup().supportedDevices()[0]; // compatibility
+  Compile::Config::setDevice(this, Device::lister().checkName(device));
+  GPUtils::Config *gconfig = new GPUtils::Config(this);
+  gconfig->setGPAsmWarningLevel(QMIN(config->readUnsignedNumEntry("warn-level", 0), uint(GPUtils::Config::Nb_WarningLevels)));
+  gconfig->setRawIncludeDirs(Tool::Category::Assembler, config->readEntry("include-dir", QString::null));
+  gconfig->setRawCustomOptions(Tool::Category::Assembler, config->readEntry("other-options", QString::null));
+
+  config->setGroup("Linker") ;
+  QString hexFormatString = config->readEntry("hex-format", HexBuffer::FORMATS[HexBuffer::IHX32]);
+  for (uint i=0; i<HexBuffer::Nb_Formats; i++)
+    if ( hexFormatString==HexBuffer::FORMATS[i] ) gconfig->setHexFormat(HexBuffer::Format(i));
+  gconfig->setRawIncludeDirs(Tool::Category::Linker, config->readEntry("objs-libs-dir", QString::null));
+  gconfig->setRawCustomOptions(Tool::Category::Linker, config->readEntry("other-options", QString::null));
+
+  delete gconfig;
+  delete config;
+  return true;
+}
+
+PURL::UrlList Project::openedFiles() const
+{
+  PURL::UrlList files;
+  QStringList list = listValues("general", "opened_files", QStringList());
+  QStringList::const_iterator it = list.begin();
+  for (; it!=list.end(); ++it) {
+    if ( PURL::Url::fromPathOrUrl(*it).isRelative() ) files += PURL::Url(directory(), *it);
+    else files += PURL::Url::fromPathOrUrl(*it);
+  }
+  return files;
+}
+void Project::setOpenedFiles(const PURL::UrlList &list)
+{
+  clearList("general", "opened_files");
+  PURL::UrlList::const_iterator it = list.begin();
+  for (; it!=list.end(); ++it)
+    appendListValue("general", "opened_files", (*it).relativeTo(directory()));
+}
+
+PURL::UrlList Project::absoluteFiles() const
+{
+  PURL::UrlList abs;
+  QStringList files = listValues("general", "files", QStringList());
+  QStringList::const_iterator it = files.begin();
+  for (; it!=files.end(); ++it) abs += PURL::Url::fromPathOrUrl(*it).toAbsolute(directory());
+  return abs;
+}
+void Project::addFile(const PURL::Url &url)
+{
+  appendListValue("general", "files", url.relativeTo(directory()));
+}
+void Project::removeFile(const PURL::Url &url)
+{
+  removeListValue("general", "files", url.relativeTo(directory()));
+}
+void Project::clearFiles()
+{
+  clearList("general", "files");
+}
+
+QString Project::toSourceObject(const PURL::Url &url, const QString &extension, bool forWindows) const
+{
+  PURL::Url tmp;
+  if ( extension.isEmpty() ) tmp = url.toFileType(PURL::Object);
+  else tmp = url.toExtension(extension);
+  return tmp.relativeTo(directory(), forWindows ? PURL::WindowsSeparator : PURL::UnixSeparator);
+}
+
+QStringList Project::objectsForLinker(const QString &extension, bool forWindows) const
+{
+  QStringList objs;
+  // objects files corresponding to src files
+  PURL::UrlList files = absoluteFiles();
+  PURL::UrlList::const_iterator it;
+  for (it=files.begin(); it!=files.end(); ++it)
+    if ( (*it).data().group==PURL::Source ) objs += toSourceObject(*it, extension, forWindows);
+  // objects
+  for (it=files.begin(); it!=files.end(); ++it)
+    if ( (*it).fileType()==PURL::Object ) objs += (*it).relativeTo(directory(), forWindows ? PURL::WindowsSeparator : PURL::UnixSeparator);
+  return objs;
+}
+
+QStringList Project::librariesForLinker(const QString &prefix, bool forWindows) const
+{
+  QStringList libs;
+  PURL::UrlList files = absoluteFiles();
+  PURL::UrlList::const_iterator it;
+  for (it=files.begin(); it!=files.end(); ++it)
+    if ( (*it).fileType()==PURL::Library ) libs += prefix + (*it).relativeTo(directory(), forWindows ? PURL::WindowsSeparator : PURL::UnixSeparator);
+  return libs;
+}
+
+QString Project::version() const
+{
+  return Compile::Config::globalValue(this, "version", "0.1");
+}
+void Project::setVersion(const QString &version)
+{
+  Compile::Config::setGlobalValue(this, "version", version);
+}
+
+Tool::OutputType Project::outputType() const
+{
+  return Tool::OutputType::fromKey(Compile::Config::globalValue(this, "output_type", Tool::OutputType(Tool::OutputType::Executable).key()));
+}
+void Project::setOutputType(Tool::OutputType type)
+{
+  Compile::Config::setGlobalValue(this, "output_type", type.key());
+}
+
+QString Project::description() const
+{
+  return Compile::Config::globalValue(this, "description", QString::null);
+}
+void Project::setDescription(const QString &description)
+{
+  Compile::Config::setGlobalValue(this, "description", description);
+}
+
+PURL::Url Project::customLinkerScript() const
+{
+  QString s = Compile::Config::globalValue(this, "custom_linker_script", QString::null);
+  return PURL::Url::fromPathOrUrl(s);
+}
+void Project::setCustomLinkerScript(const PURL::Url &url)
+{
+  Compile::Config::setGlobalValue(this, "custom_linker_script", url.filepath());
+}
+
+QValueList<Register::TypeData> Project::watchedRegisters() const
+{
+  QValueList<Register::TypeData> watched;
+  QStringList list = listValues("general", "watched_registers", QStringList());
+  QStringList::const_iterator it;
+  for (it=list.begin(); it!=list.end(); ++it) {
+    Register::TypeData rtd = Register::TypeData::fromString(*it);
+    if ( rtd.type()!=Register::Invalid ) watched.append(rtd);
+  }
+  return watched;
+}
+void Project::setWatchedRegisters(const QValueList<Register::TypeData> &watched)
+{
+  clearList("general", "watched_registers");
+  QValueList<Register::TypeData>::const_iterator it;
+  for (it=watched.begin(); it!=watched.end(); ++it)
+    appendListValue("general", "watched_registers", (*it).toString());
+}
+
+QValueList<uint> Project::bookmarkLines(const PURL::Url &url) const
+{
+  QValueList<uint> lines;
+  QStringList list = listValues("editors", "bookmarks", QStringList());
+  QStringList::const_iterator it;
+  for (it=list.begin(); it!=list.end(); ++it) {
+    QStringList slist = QStringList::split(",", *it);
+    QStringList::const_iterator sit = slist.begin();
+    if ( sit==slist.end() || (*sit)!=url.kurl().url() ) continue;
+    for (; sit!=slist.end(); ++sit) {
+      bool ok;
+      uint line = (*sit).toUInt(&ok);
+      if (!ok) continue;
+      lines.append(line);
+    }
+    break;
+  }
+  return lines;
+}
+void Project::setBookmarkLines(const PURL::Url &url, const QValueList<uint> &lines)
+{
+  QStringList list = listValues("editors", "bookmarks", QStringList());
+  QStringList nlist;
+  QStringList::const_iterator it;
+  for (it=list.begin(); it!=list.end(); ++it) {
+    QStringList slist = QStringList::split(",", *it);
+    QStringList::const_iterator sit = slist.begin();
+    if ( sit!=slist.end() && slist.count()>1 && (*sit)!=url.kurl().url() ) nlist += *it;
+  }
+  if ( lines.count()!=0 ) {
+    QStringList slist = url.kurl().url();
+    QValueList<uint>::const_iterator lit;
+    for (lit=lines.begin(); lit!=lines.end(); ++lit) slist += QString::number(*lit);
+    nlist += slist.join(",");
+  }
+  setListValues("editors", "bookmarks", nlist);
+}
diff --git a/src/libgui/project.h b/src/libgui/project.h
new file mode 100644
index 0000000..0dfdeab
--- /dev/null
+++ b/src/libgui/project.h
@@ -0,0 +1,49 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2003 Alain Gibaud <alain.gibaud@free.fr>                *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PROJECT_H
+#define PROJECT_H
+
+#include "devices/base/register.h"
+#include "common/global/xml_data_file.h"
+#include "tools/base/generic_tool.h"
+
+class Project : public XmlDataFile
+{
+public:
+  Project(const PURL::Url &url) : XmlDataFile(url, "piklab") {}
+  virtual bool load(QString &error);
+
+  PURL::Directory directory() const { return url().directory(); }
+  QString name() const { return url().basename(); }
+  PURL::UrlList absoluteFiles() const;
+  QString version() const;
+  QString description() const;
+  Tool::OutputType outputType() const;
+  PURL::UrlList openedFiles() const;
+  PURL::Url customLinkerScript() const;
+  QValueList<Register::TypeData> watchedRegisters() const;
+  QString toSourceObject(const PURL::Url &url, const QString &extension, bool forWindows) const;
+  QStringList objectsForLinker(const QString &extension, bool forWindows) const;
+  QStringList librariesForLinker(const QString &prefix, bool forWindows) const;
+  QValueList<uint> bookmarkLines(const PURL::Url &url) const; // absolute filepath
+
+  void removeFile(const PURL::Url &url); // take absolute filepath (but inside project dir)
+  void addFile(const PURL::Url &url); // take absolute filePath (but inside project dir)
+  void clearFiles();
+  void setVersion(const QString &version);
+  void setDescription(const QString &description);
+  void setOutputType(Tool::OutputType type);
+  void setOpenedFiles(const PURL::UrlList &list);
+  void setCustomLinkerScript(const PURL::Url &url);
+  void setWatchedRegisters(const QValueList<Register::TypeData> &watched);
+  void setBookmarkLines(const PURL::Url &url, const QValueList<uint> &lines); // absolute filepath
+};
+
+#endif
diff --git a/src/libgui/project_editor.cpp b/src/libgui/project_editor.cpp
new file mode 100644
index 0000000..4b86429
--- /dev/null
+++ b/src/libgui/project_editor.cpp
@@ -0,0 +1,72 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003 Alain Gibaud <alain.gibaud@free.fr>                *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "project_editor.h"
+
+#include <qlabel.h>
+#include <qlayout.h>
+#include <klocale.h>
+
+#include "project.h"
+#include "tools/list/compile_config.h"
+#include "device_gui.h"
+
+ProjectEditor::ProjectEditor(Project &project, QWidget *parent)
+  : Dialog(parent, "project_options", true, i18n("Project Options"), Ok|Cancel, Ok, false),
+    _project(project)
+{
+   QVBoxLayout *top = new QVBoxLayout(mainWidget(), 0, 10);
+  TabWidget *tabWidget = new TabWidget(mainWidget());
+  top->addWidget(tabWidget);
+
+// global
+  QWidget *tab = new QWidget(tabWidget);
+  tabWidget->addTab(tab, i18n("General"));
+  QGridLayout *grid = new QGridLayout(tab, 0, 0, 10, 10);
+  QLabel *label = new QLabel(i18n("Name:"), tab);
+  grid->addWidget(label, 0, 0);
+  label = new QLabel(project.name(), tab);
+  grid->addWidget(label, 0, 1);
+  label = new QLabel(i18n("Description:"), tab);
+  grid->addWidget(label, 1, 0);
+  _description = new QTextEdit(tab);
+  _description->setText(_project.description());
+  grid->addMultiCellWidget(_description, 1,1, 1,2);
+  label = new QLabel(i18n("Version:"), tab);
+  grid->addWidget(label, 2, 0);
+  _version = new QLineEdit(tab);
+  _version->setText(_project.version());
+  grid->addWidget(_version, 2, 1);
+  label = new QLabel(i18n("Device:"), tab);
+  grid->addWidget(label, 3, 0);
+  _device = new DeviceChooser::Button(false, tab);
+  _device->setDevice(Compile::Config::device(&_project));
+  grid->addWidget(_device, 3, 1);
+  grid->setRowStretch(4, 1);
+  grid->setColStretch(2, 1);
+
+// toochain
+  tab = new QWidget(tabWidget);
+  tabWidget->addTab(tab, i18n("Toochain"));
+  grid = new QGridLayout(tab, 0, 0, 10, 10);
+  _tools = new ToolsConfigWidget(&project, tab);
+  _tools->loadConfig();
+  grid->addMultiCellWidget(_tools, 0,0, 0,2);
+  grid->setRowStretch(1, 1);
+  grid->setColStretch(2, 1);
+}
+
+void ProjectEditor::slotOk()
+{
+  _project.setDescription(_description->text());
+  _project.setVersion(_version->text());
+  Compile::Config::setDevice(&_project, _device->device());
+  _tools->saveConfig();
+  accept();
+}
diff --git a/src/libgui/project_editor.h b/src/libgui/project_editor.h
new file mode 100644
index 0000000..5e83fe2
--- /dev/null
+++ b/src/libgui/project_editor.h
@@ -0,0 +1,47 @@
+/***************************************************************************
+                          ProjectEditorWid.cpp  -  description
+                             -------------------
+    begin                : lun d�c 8 2003
+    copyright            : (C) 2003 by Alain Gibaud
+    email                : alain.gibaud@univ-valenciennes.fr
+ ***************************************************************************/
+
+/***************************************************************************
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ ***************************************************************************/
+#ifndef PROJECT_EDITOR_H
+#define PROJECT_EDITOR_H
+
+#include <qtextedit.h>
+#include <qlineedit.h>
+#include <qcombobox.h>
+#include <qwidgetstack.h>
+
+#include "tools/list/tools_config_widget.h"
+#include "common/gui/misc_gui.h"
+class Project;
+namespace DeviceChooser { class Button; }
+
+class ProjectEditor : public Dialog
+{
+Q_OBJECT
+public:
+  ProjectEditor(Project &project, QWidget *parent);
+
+private slots:
+  virtual void slotOk();
+
+private:
+  Project &_project;
+  QTextEdit *_description;
+  QLineEdit *_version;
+  DeviceChooser::Button *_device;
+  ToolsConfigWidget *_tools;
+};
+
+#endif
diff --git a/src/libgui/project_manager.cpp b/src/libgui/project_manager.cpp
new file mode 100644
index 0000000..dcc4941
--- /dev/null
+++ b/src/libgui/project_manager.cpp
@@ -0,0 +1,651 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003 Alain Gibaud <alain.gibaud@free.fr>                *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "project_manager.h"
+
+#include <qdragobject.h>
+#include <qpainter.h>
+#include <qstyle.h>
+#include <qtimer.h>
+#include <qheader.h>
+
+#include <klocale.h>
+#include <kiconloader.h>
+#include <kaction.h>
+#include <kapplication.h>
+
+#include "project.h"
+#include "project_wizard.h"
+#include "project_editor.h"
+#include "toplevel.h"
+#include "editor_manager.h"
+#include "object_view.h"
+#include "devices/list/device_list.h"
+#include "tools/list/compile_config.h"
+#include "register_view.h"
+#include "hex_editor.h"
+#include "main_global.h"
+#include "common/gui/purl_gui.h"
+#include "device_gui.h"
+
+//----------------------------------------------------------------------------
+ProjectManager::View::View(QWidget *parent)
+  : ListView(parent, "project_manager"), _project(0), _modified(false)
+{
+  connect(this, SIGNAL(mouseButtonClicked(int, QListViewItem *, const QPoint &, int)),
+          SLOT(clicked(int, QListViewItem *, const QPoint &, int)));
+  connect(this, SIGNAL(contextMenuRequested(QListViewItem *, const QPoint &, int)),
+          SLOT(contextMenu(QListViewItem *, const QPoint &, int)));
+  connect(this, SIGNAL(itemRenamed(QListViewItem *, int, const QString &)),
+          SLOT(renamed(QListViewItem *, int, const QString &)));
+  connect(this, SIGNAL(moved()), SLOT(filesReordered()));
+
+  header()->hide();
+  setSorting(-1);
+  addColumn(QString::null, 170);
+  setFullWidth(true);
+  setRootIsDecorated(false);
+  setAcceptDrops(true);
+  setDragEnabled(true);
+  setDropVisualizer(true);
+  QTimer::singleShot(0, this, SLOT(init()));;
+}
+
+ProjectManager::View::~View()
+{
+  delete _project;
+}
+
+void ProjectManager::View::init()
+{
+  clear();
+  _rootItem  = new RootItem(this);
+  setCurrentItem(_rootItem);
+  KListViewItem *item = new RegisterItem(headerItem(DeviceGroup));
+  ensureItemVisible(item);
+  _deviceItem = new DeviceItem(headerItem(DeviceGroup));
+  ensureItemVisible(_deviceItem);
+  _linkerScriptItem = 0;
+  (void)headerItem(SourceGroup);
+}
+
+ProjectManager::HeaderItem *ProjectManager::View::findHeaderItem(Group group) const
+{
+  QListViewItemIterator it(const_cast<View *>(this));
+  for(; it.current(); ++it) {
+    if ( it.current()->rtti()!=HeaderRtti ) continue;
+    HeaderItem *hi = static_cast<HeaderItem *>(it.current());
+    if ( hi->group()==group ) return hi;
+  }
+  return 0;
+}
+
+ProjectManager::HeaderItem *ProjectManager::View::headerItem(Group group)
+{
+  HeaderItem *item = findHeaderItem(group);
+  if (item) return item;
+  item = new HeaderItem(_rootItem, group);
+  // reorder groups...
+  HeaderItem *items[Nb_Groups];
+  for (uint i=0; i<Nb_Groups; i++) {
+    items[i] = findHeaderItem(Group(i));
+    if (items[i]) _rootItem->takeItem(items[i]);
+  }
+  for (int i=Nb_Groups-1; i>=0; i--) {
+    if ( items[i]==0 ) continue;
+    _rootItem->insertItem(items[i]);
+  }
+  return item;
+}
+
+ProjectManager::FileItem *ProjectManager::View::findFileItem(const PURL::Url &url) const
+{
+  QListViewItemIterator it(const_cast<View *>(this));
+  for(; it.current(); ++it) {
+    if ( it.current()->rtti()!=FileRtti ) continue;
+    FileItem *fi = static_cast<FileItem *>(it.current());
+    if ( fi->url()==url ) return fi;
+  }
+  return 0;
+}
+
+ProjectManager::FileItem *ProjectManager::View::findFileItem(PURL::FileType type) const
+{
+  QListViewItemIterator it(const_cast<View *>(this));
+  for(; it.current(); ++it) {
+    if ( it.current()->rtti()!=FileRtti ) continue;
+    FileItem *fi = static_cast<FileItem *>(it.current());
+    if ( fi->ftype()==type ) return fi;
+  }
+  return 0;
+}
+
+QListViewItem *ProjectManager::View::findItem(const QString &tag) const
+{
+  QListViewItemIterator it(const_cast<View *>(this));
+  for(; it.current(); ++it) {
+    switch (Rtti(it.current()->rtti())) {
+      case RootRtti:
+      case FileRtti:
+      case LinkerScriptRtti:
+      case DeviceRtti: continue;
+      case HeaderRtti:
+      case RegisterRtti: break;
+    }
+    if ( it.current()->text(0)==tag ) return it.current();
+  }
+  return 0;
+}
+
+void ProjectManager::View::select(const Editor *e)
+{
+  QListViewItem *item = 0;
+  if ( e->url().isEmpty() ) item = findItem(e->tag());
+  else item = findFileItem(e->url());
+  if (item) setSelected(item, true);
+  else clearSelection();
+}
+
+void ProjectManager::View::contextMenu(QListViewItem *item, const QPoint &p, int)
+{
+  if ( item==0 ) return;
+
+  PopupMenu pop;
+  Group group = Nb_Groups;
+  if ( item->rtti()==HeaderRtti) group = static_cast<const HeaderItem *>(item)->group();
+
+  if ( item->rtti()==LinkerScriptRtti || group==LinkerScriptGroup ) {
+    if ( _project==0 || Main::toolGroup().linkerScriptType()==PURL::Nb_FileTypes ) return;
+    pop.insertTitle(i18n("Linker Script"));
+    pop.insertItem("piklab_addfile", i18n("Set Custom..."));
+    if ( !_project->customLinkerScript().isEmpty() ) pop.insertItem("editdelete", i18n("Set Default"));
+    switch( pop.exec(p) ) {
+      case 1: {
+        PURL::Url url = PURL::getOpenUrl(":custom_linker_script", PURL::filter(Main::toolGroup().linkerScriptType()), this, i18n("Select Linker Script"));
+        if ( !url.isEmpty() ) _project->setCustomLinkerScript(url);
+        break;
+      }
+      case 2: _project->setCustomLinkerScript(PURL::Url()); break;
+    }
+    _linkerScriptItem->init();
+  } else if ( item->rtti()==RootRtti ) {
+    RootItem *ri = static_cast<RootItem *>(item);
+    if ( _project==0 ) {
+      if ( ri->url().isEmpty() ) {
+        pop.insertItem("piklab_createproject", i18n("New Project..."), &Main::toplevel(), SLOT(newProject()));
+        pop.insertItem("piklab_openproject", i18n("Open Project..."), &Main::toplevel(), SLOT(openProject()));
+        pop.exec(p);
+      } else {
+        pop.insertTitle(i18n("Standalone File"));
+        pop.insertItem("configure", i18n("Configure..."));
+        if ( pop.exec(p)==1 ) Main::toplevel().configure(ConfigCenter::Standalone);
+      }
+    } else {
+      pop.insertTitle(i18n("Project"));
+      pop.insertItem("configure", i18n("Options..."), &Main::toplevel(), SLOT(configureProject()));
+      pop.insertItem("find", i18n("Find Files..."),   &Main::toplevel(), SLOT(runKfind()));
+      pop.insertSeparator();
+      pop.insertItem("piklab_compile", i18n("Build Project"), &Main::toplevel(), SLOT(buildProject()));
+      pop.insertItem("trashcan_empty", i18n("Clean Project"), &Main::toplevel(), SLOT(cleanBuild()));
+      pop.insertSeparator();
+      pop.insertItem("filenew", i18n("New Source File..."), &Main::toplevel(), SLOT(newSourceFile()));
+      pop.insertItem("piklab_addfile", i18n("Add Source Files..."), this, SLOT(insertSourceFiles()));
+      pop.insertItem("piklab_addfile", i18n("Add Object Files..."), this, SLOT(insertObjectFiles()));
+      if ( Main::currentEditor() ) pop.insertItem("piklab_addcurrentfile", i18n("Add Current File"), this, SLOT(insertCurrentFile()));
+      pop.exec(p);
+    }
+  } else if ( item->rtti()==FileRtti ) {
+    if ( _project==0 ) return;
+    FileItem *fi = static_cast<FileItem *>(item);
+    if ( isExternalFile(fi->url()) ) return;
+    pop.insertTitle(item->text(0));
+    pop.insertItem("editdelete", i18n("Remove From Project"));
+    if ( pop.exec(p)==1 ) removeFile(fi->url());
+  } else if ( item->rtti()==HeaderRtti ) {
+    if ( _project==0 ) return;
+    if ( group==LinkerObjectGroup ) {
+      pop.insertTitle(i18n("Objects"));
+      pop.insertItem("piklab_addfile", i18n("Add Object Files..."), this, SLOT(insertObjectFiles()));
+      pop.exec(p);
+    } else if ( group==SourceGroup || group==HeaderGroup ) {
+      pop.insertTitle(i18n("Sources"));
+      pop.insertItem("filenew", i18n("New File..."), &Main::toplevel(), SLOT(newSourceFile()));
+      pop.insertItem("piklab_addfile", i18n("Add Source Files..."), this, SLOT(insertSourceFiles()));
+      pop.exec(p);
+    } else if ( group==DeviceGroup ) {
+      pop.insertItem("filenew", i18n("Select Device..."), &Main::toplevel(), SLOT(showDeviceInfo()));
+      pop.exec(p);
+    }
+  }
+}
+
+void ProjectManager::View::closeProject()
+{
+  if ( _project==0 && projectUrl().isEmpty() ) return;
+  if (_project) {
+    // save opened files
+    PURL::UrlList files = Main::editorManager().files();
+    PURL::UrlList::const_iterator it = files.begin();
+    PURL::UrlList opened;
+    for (; it!=files.end(); ++it) {
+      if ( !isExternalFile(*it) ) opened += *it;
+      Main::editorManager().closeEditor(*it);
+    }
+    _project->setOpenedFiles(opened);
+    // save watched registers
+    _project->setWatchedRegisters(Register::list().watched());
+    QString error;
+    if ( !_project->save(error) )
+      MessageBox::detailedSorry(i18n("Could not save project file \"%1\".").arg(_project->url().pretty()), error, Log::Show);
+    delete _project;
+    _project = 0;
+  }
+  _modified = false;
+  init();
+}
+
+void ProjectManager::View::addExternalFiles()
+{
+  const QMap<PURL::Url, FileOrigin> &ext = projectData().externals;
+  QMap<PURL::Url, FileOrigin>::const_iterator it;
+  for (it=ext.begin(); it!=ext.end(); ++it) {
+    if ( !it.key().exists() ) continue;
+    addFile(it.key(), it.key().fileType(), it.data());
+  }
+}
+
+void ProjectManager::View::setStandalone(const PURL::Url &url, PURL::FileType type)
+{
+  if ( projectUrl()==url ) return;
+  closeProject();
+  _rootItem->set(url, true);
+  addFile(url, type, Intrinsic);
+  _standaloneData[url].type = type;
+  addExternalFiles();
+}
+
+PURL::Url ProjectManager::View::standaloneGenerator(const PURL::Url &url, PURL::FileType &type) const
+{
+  QMap<PURL::Url, ProjectData>::const_iterator it;
+  for (it=_standaloneData.begin(); it!=_standaloneData.end(); ++it) {
+    if ( !it.data().externals.contains(url) ) continue;
+    if ( !it.key().exists() ) continue;
+    type = it.data().type;
+    return it.key();
+  }
+  type = PURL::Nb_FileTypes;
+  return url;
+}
+
+void ProjectManager::View::insertSourceFiles()
+{
+  Q_ASSERT(_project);
+  PURL::UrlList list = PURL::getOpenUrls(":<sources>", PURL::sourceFilter(PURL::CompleteFilter), this, i18n("Select Source File"));
+  if ( list.isEmpty() ) return;
+  PURL::UrlList::const_iterator it;
+  for (it=list.begin(); it!=list.end(); ++it) insertFile(*it);
+}
+
+void ProjectManager::View::insertObjectFiles()
+{
+  Q_ASSERT(_project);
+  PURL::UrlList list = PURL::getOpenUrls(":<objects>", PURL::objectFilter(PURL::CompleteFilter), this, i18n("Select Object File"));
+  if ( list.isEmpty() ) return;
+  PURL::UrlList::const_iterator it;
+  for (it=list.begin(); it!=list.end(); ++it) insertFile(*it);
+}
+
+void ProjectManager::View::insertFile(const PURL::Url &url)
+{
+  if ( !url.exists() ) {
+    MessageBox::detailedSorry(i18n("Could not find file."), i18n("File: %1").arg(url.pretty()), Log::Show);
+    return;
+  }
+  PURL::Url purl = url;
+  MessageBox::Result copy = MessageBox::No;
+  if ( !url.isInto(_project->directory()) ) {
+    copy = MessageBox::questionYesNoCancel(i18n("File \"%1\" is not inside the project directory. Do you want to copy the file to your project directory?").arg(url.pretty()),
+                                          i18n("Copy and Add"), i18n("Add only"));
+    if ( copy==MessageBox::Cancel ) return;
+    if ( copy==MessageBox::Yes ) purl = PURL::Url(_project->directory(), url.filename());
+  }
+  if ( _project->absoluteFiles().contains(purl) ) {
+    MessageBox::detailedSorry(i18n("File is already in the project."), i18n("File: %1").arg(purl.pretty()), Log::Show);
+    return;
+  }
+  if ( copy==MessageBox::Yes ) {
+    Log::StringView sview;
+    if ( !url.copyTo(purl, sview) ) {
+      MessageBox::detailedSorry(i18n("Copying file to project directory failed."), i18n("File: %1\n").arg(url.pretty()) + sview.string(), Log::Show);
+      return;
+    }
+  }
+  _project->addFile(purl);
+  addFile(purl, purl.fileType(), Intrinsic);
+}
+
+bool ProjectManager::View::openProject()
+{
+  PURL::Url url = PURL::getOpenUrl(":open_project", PURL::projectFilter(PURL::CompleteFilter), this, i18n("Select Project file"));
+  return openProject(url);
+}
+
+void ProjectManager::View::addExternalFile(const PURL::Url &url, FileOrigin origin)
+{
+  Q_ASSERT( origin!=Intrinsic );
+  addFile(url, url.fileType(), origin);
+}
+
+const ProjectManager::View::ProjectData &ProjectManager::View::projectData() const
+{
+  if ( _project==0 ) return _standaloneData[projectUrl()];
+  return _projectData;
+}
+
+ProjectManager::View::ProjectData &ProjectManager::View::projectData()
+{
+  if ( _project==0 ) return _standaloneData[projectUrl()];
+  return _projectData;
+}
+
+void ProjectManager::View::addFile(const PURL::Url &url, PURL::FileType type, FileOrigin origin)
+{
+  if ( contains(url) ) return;
+  QMap<PURL::Url, FileOrigin> &ext = projectData().externals;
+  if ( type.data().group==PURL::LinkerScript && _linkerScriptItem ) {
+    _linkerScriptItem->set(url);
+    ext[url] = Included;
+    return;
+  }
+  PURL::FileProperties properties = type.data().properties;
+  Group grp = Nb_Groups;
+  switch (origin) {
+    case Intrinsic: grp = group(type); break;
+    case Generated: grp = GeneratedGroup; break;
+    case Included:  grp = IncludedGroup; break;
+  }
+  HeaderItem *hitem = headerItem(grp);
+  QListViewItem *item = new FileItem(hitem, type, url, origin!=Intrinsic);
+  item->moveItem(hitem->lastChild());
+  ensureItemVisible(item);
+  if ( origin!=Intrinsic ) ext[url] = origin;
+  if ( type==PURL::Hex && _project==0 ) {
+    QString extension = PURL::extension(PURL::AsmGPAsm);
+    PURL::Url durl = PURL::Url::fromPathOrUrl("<" + (url.isEmpty() ? i18n("Disassembly") : url.appendExtension(extension).filename()) + ">");
+    if ( findFileItem(durl)==0 ) {
+      (void)new FileItem(headerItem(ViewGroup), PURL::Coff, durl, true);
+      ext[durl] = Generated;
+    }
+  }
+  if ( _project && origin==Intrinsic ) _modified = true;
+}
+
+void ProjectManager::View::removeExternalFiles()
+{
+  QMap<PURL::Url, FileOrigin> &ext = projectData().externals;
+  QMap<PURL::Url, FileOrigin>::const_iterator it;
+  for (it=ext.begin(); it!=ext.end(); ++it) {
+    Main::editorManager().closeEditor(it.key());
+    removeFile(it.key());
+  }
+  ext.clear();
+  if (_linkerScriptItem) _linkerScriptItem->init();
+}
+
+void ProjectManager::View::removeFile(const PURL::Url &url)
+{
+  if ( _project && !isExternalFile(url) ) _project->removeFile(url);
+  FileItem *item = findFileItem(url);
+  if ( item==0 ) return;
+  HeaderItem *group = static_cast<HeaderItem *>(item->parent());
+  delete item;
+  if ( group->childCount()==0 ) delete group;
+  _modified = true;
+  emit guiChanged();
+}
+
+void ProjectManager::View::clicked(int button, QListViewItem *item, const QPoint &, int)
+{
+  if ( item==0 ) return;
+  if ( button!=LeftButton ) return;
+  const Device::Data *data = Main::deviceData();
+  Rtti rtti = Rtti(item->rtti());
+  if ( data==0 && rtti!=DeviceRtti && rtti!=RootRtti ) {
+    MessageBox::sorry(i18n("Cannot open without device specified."), Log::Show);
+    return;
+  }
+  Editor *e = 0;
+  ::BusyCursor bc;
+  switch (rtti) {
+    case RootRtti:
+      Main::toplevel().configureProject();
+      break;
+    case HeaderRtti: {
+      if ( static_cast<HeaderItem *>(item)->group()!=DeviceGroup ) break;
+      e = Main::editorManager().openEditor(EditorManager::DeviceEditor);
+      break;
+    }
+    case RegisterRtti:
+      e = Main::editorManager().openEditor(EditorManager::RegisterEditor);
+      break;
+    case DeviceRtti: return;
+    case LinkerScriptRtti: {
+      PURL::Url url = Main::projectManager().linkerScriptUrl();
+      if ( url.isEmpty() ) break;
+      e = Main::editorManager().findEditor(url);
+      if ( e==0 ) {
+        e = Main::editorManager().createEditor(url.fileType(), url);
+        if ( !e->open(url) ) {
+	  delete e;
+	  break;
+	}
+        if ( e && isExternalFile(url) ) e->setReadOnly(true);
+        Main::editorManager().addEditor(e);
+      } else Main::editorManager().showEditor(e);
+      break;
+    }
+    case FileRtti: {
+      FileItem *fi = static_cast<FileItem *>(item);
+      if ( !(fi->ftype().data().properties & PURL::Editable) ) break;
+      e = Main::editorManager().findEditor(fi->url());
+      if ( e==0 ) {
+        if ( fi->ftype()==PURL::Coff && _project==0 && !fi->url().exists() ) {
+          PURL::Url url = findFileItem(PURL::Hex)->url();
+          if ( url.isEmpty() ) {
+            HexEditor *he = ::qt_cast<HexEditor *>(Main::currentEditor());
+            if ( he==0 ) break;
+            e = new DisassemblyEditor(*he, *data, this);
+          } else e = new DisassemblyEditor(url, *data, this);
+          addExternalFile(fi->url(), Generated);
+        } else e = Main::editorManager().createEditor(fi->url().fileType(), fi->url());
+        if ( e==0 ) break; 
+        if ( !e->open(fi->url()) ) {
+	  delete e;
+	  break;
+	}
+        if ( isExternalFile(fi->url()) ) e->setReadOnly(true);
+        Main::editorManager().addEditor(e);
+      } else Main::editorManager().showEditor(e);
+      break;
+    }
+  }
+  cancelRenaming();
+  emit guiChanged();
+}
+
+void ProjectManager::View::insertCurrentFile()
+{
+  insertFile(Main::editorManager().currentEditor()->url());
+}
+
+bool ProjectManager::View::editProject()
+{
+  ProjectEditor dialog(*_project, this);
+  if ( dialog.exec()!=QDialog::Accepted ) return false;
+  _modified = true;
+  if (_linkerScriptItem) _linkerScriptItem->init();
+  return true;
+}
+
+bool ProjectManager::View::newProject()
+{
+  ProjectWizard wizard(this);
+  if ( wizard.exec()==QDialog::Rejected ) return false;
+  closeProject();
+  QString error;
+  if ( !wizard.project()->save(error) ) {
+    MessageBox::detailedSorry(i18n("Failed to create new project file"), error, Log::Show);
+    return false;
+  }
+  openProject(wizard.url());
+  return true;
+}
+
+void ProjectManager::View::setProject(Project *project)
+{
+  closeProject();
+  Main::editorManager().closeAllEditors();
+  _project = project;
+  _rootItem->set(project->url(), false);
+  if ( project && Main::toolGroup().linkerScriptType()!=PURL::Nb_FileTypes ) {
+    _linkerScriptItem = new LinkerScriptItem(headerItem(LinkerScriptGroup));
+    ensureItemVisible(_linkerScriptItem);
+  }
+}
+
+bool ProjectManager::View::openProject(const PURL::Url &url)
+{
+  if ( url.isEmpty() ) return false;
+  bool reload = ( _project && _project->url()==url );
+  if ( reload && !MessageBox::askContinue(i18n("Project already loaded. Reload?"), i18n("Reload")) ) return false;
+  static_cast< KRecentFilesAction *>(Main::action("project_open_recent"))->removeURL(url.kurl());
+  Project *p = new Project(url);
+  QString error;
+  if ( !p->load(error) ) {
+    MessageBox::detailedSorry(i18n("Could not open project file."), error, Log::Show);
+    delete p;
+    return false;
+  }
+  setProject(p);
+  PURL::UrlList files = _project->absoluteFiles();
+  PURL::UrlList::const_iterator it;
+  for(it=files.begin(); it!=files.end(); ++it) addFile(*it, (*it).fileType(), Intrinsic);
+  _projectData.type = PURL::Project;
+  _projectData.externals.clear();
+  static_cast<KRecentFilesAction *>(Main::action("project_open_recent"))->addURL(url.kurl());
+  files = _project->openedFiles();
+  for(it = files.begin(); it!=files.end(); ++it) Main::editorManager().openFile(*it);
+  Register::list().init();
+  QValueList<Register::TypeData> watched = _project->watchedRegisters();
+  QValueList<Register::TypeData>::const_iterator wit;
+  for (wit=watched.begin(); wit!=watched.end(); ++wit) Register::list().setWatched(*wit, true);
+  return true;
+}
+
+bool ProjectManager::View::isExternalFile(const PURL::Url &url) const
+{
+  if ( projectUrl().isEmpty() ) return false;
+  return projectData().externals.contains(url);
+}
+
+void ProjectManager::View::modified(const PURL::Url &url)
+{
+  FileItem *item = findFileItem(url);
+  if ( item && !isExternalFile(url) ) _modified = true;
+}
+
+void ProjectManager::View::renamed(QListViewItem *item, int, const QString &text)
+{
+  Q_ASSERT ( item->rtti()==DeviceRtti );
+  Main::toplevel().setDevice(text);
+}
+
+void ProjectManager::View::updateGUI()
+{
+  _deviceItem->updateText();
+}
+
+QDragObject *ProjectManager::View::dragObject()
+{
+  if ( currentItem()==0 || currentItem()->rtti()!=FileRtti ) return 0;
+  const FileItem *item = static_cast<const FileItem *>(currentItem());
+  const HeaderItem *hitem = static_cast<const HeaderItem *>(item->parent());
+  if ( hitem->group()!=SourceGroup ) return 0;
+  QStrList uris;
+  uris.append(QUriDrag::localFileToUri(item->url().filepath()));
+  return new QUriDrag(uris, viewport());
+}
+
+bool ProjectManager::View::acceptDrag(QDropEvent* e) const
+{
+  if ( e->source()!=viewport() ) return false;
+  const QListViewItem *item = itemAt(e->pos());
+  if ( item==0 || item->rtti()!=FileRtti ) return false;
+  const HeaderItem *hitem = static_cast<const HeaderItem *>(item->parent());
+  return ( hitem->group()==SourceGroup );
+}
+
+void ProjectManager::View::filesReordered()
+{
+  if ( _project==0 ) return;
+  _project->clearFiles();
+  QListViewItem *item = headerItem(SourceGroup)->firstChild();
+  for (;item; item=item->nextSibling())
+    _project->addFile(static_cast<FileItem *>(item)->url());
+}
+
+QString ProjectManager::View::tooltip(QListViewItem *item, int) const
+{
+  switch (Rtti(item->rtti())) {
+    case RootRtti:
+    case FileRtti:
+    case LinkerScriptRtti: return static_cast<const UrlItem *>(item)->url().filepath();
+    case DeviceRtti:
+    case RegisterRtti:
+    case HeaderRtti: break;
+  }
+  return QString::null;
+}
+
+PURL::Url ProjectManager::View::linkerScriptUrl() const
+{
+  QListViewItemIterator it(const_cast<View *>(this));
+  for(; it.current(); ++it) {
+    if ( it.current()->rtti()!=LinkerScriptRtti ) continue;
+    return static_cast<LinkerScriptItem *>(it.current())->url();
+  }
+  return PURL::Url();
+}
+
+bool ProjectManager::View::needsRecompile() const
+{
+  // ### this could be perfected...
+  PURL::Url output = projectUrl().toFileType(PURL::Hex);
+  QDateTime outputLastModified;
+  if ( !output.exists(&outputLastModified) ) return true;
+  PURL::UrlList files;
+  if ( Main::project() ) files = Main::project()->absoluteFiles();
+  else files.append(projectUrl());
+  PURL::UrlList::const_iterator it;
+  for (it=files.begin(); it!=files.end(); ++it) {
+    QDateTime lastModified;
+    if ( !(*it).exists(&lastModified) ) continue;
+    if ( lastModified>outputLastModified ) return true;
+  }
+  return false;
+}
+
+PURL::Url ProjectManager::View::selectedUrl() const
+{
+  QListViewItem *item = currentItem();
+  if ( item==0 ) return PURL::Url();
+  Rtti rtti = Rtti(item->rtti());
+  if ( rtti!=FileRtti ) return PURL::Url();
+  return static_cast<FileItem *>(item)->url();
+}
diff --git a/src/libgui/project_manager.h b/src/libgui/project_manager.h
new file mode 100644
index 0000000..2939f33
--- /dev/null
+++ b/src/libgui/project_manager.h
@@ -0,0 +1,106 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003 Alain Gibaud <alain.gibaud@free.fr>                *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PROJECT_MANAGER_H
+#define PROJECT_MANAGER_H
+
+#include "common/global/purl.h"
+#include "common/gui/misc_gui.h"
+#include "common/gui/list_view.h"
+#include "project_manager_ui.h"
+class Project;
+class Editor;
+namespace Coff { class SectionParser; }
+
+namespace ProjectManager
+{
+
+class View : public ListView
+{
+Q_OBJECT
+public:
+  View(QWidget *parent);
+  virtual ~View();
+
+  bool editProject();
+  bool newProject();
+  bool openProject();
+  bool openProject(const PURL::Url &url);
+  void closeProject();
+  Project *project() const { return _project; }
+
+  void setStandalone(const PURL::Url &url, PURL::FileType type);
+  PURL::Url projectUrl() const { return _rootItem->url(); }
+  PURL::Url standaloneGenerator(const PURL::Url &url, PURL::FileType &type) const;
+  PURL::Url linkerScriptUrl() const;
+  PURL::Url selectedUrl() const;
+  void removeFile(const PURL::Url &url);
+  void select(const Editor *e);
+  void insertFile(const PURL::Url &url);
+  bool contains(const PURL::Url &url) const { return findFileItem(url); }
+  void addExternalFile(const PURL::Url &url, FileOrigin fileOrigin);
+  bool isExternalFile(const PURL::Url &url) const;
+  void removeExternalFiles();
+
+  bool isModified() const { return _modified; }
+  void setModified(bool modified) { _modified = modified; }
+  bool needsRecompile() const;
+
+public slots:
+  void insertSourceFiles();
+  void insertObjectFiles();
+  void insertCurrentFile();
+  void updateGUI();
+
+private slots:
+  void init();
+  void contextMenu(QListViewItem *item, const QPoint &pos, int column);
+  void clicked(int button, QListViewItem *item, const QPoint &pos, int column);
+  void renamed(QListViewItem *item, int column, const QString &text);
+  void modified(const PURL::Url &url);
+  void filesReordered();
+
+signals:
+  void guiChanged();
+
+private:
+  Project          *_project;
+  RootItem         *_rootItem;
+  DeviceItem       *_deviceItem;
+  LinkerScriptItem *_linkerScriptItem;
+  class ProjectData {
+  public:
+    PURL::FileType type;
+    QMap<PURL::Url, FileOrigin> externals;
+  };
+  QMap<PURL::Url, ProjectData> _standaloneData;
+  ProjectData _projectData;
+  bool _modified;
+
+  HeaderItem *findHeaderItem(Group group) const;
+  HeaderItem *headerItem(Group group);
+  FileItem *findFileItem(const PURL::Url &url) const;
+  FileItem *findFileItem(PURL::FileType type) const;
+  QListViewItem *findItem(const QString &name) const;
+  virtual QDragObject *dragObject();
+  virtual bool acceptDrag(QDropEvent* e) const;
+  virtual QString tooltip(QListViewItem *item, int col) const;
+  void addExternalFiles();
+  void rightClicked(QListViewItem *item, const QPoint &pos);
+  void leftClicked(QListViewItem *item);
+  void addFile(const PURL::Url &url, PURL::FileType type, FileOrigin origin);
+  void setProject(Project *project);
+  void initListView();
+  ProjectData &projectData();
+  const ProjectData &projectData() const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/libgui/project_manager_ui.cpp b/src/libgui/project_manager_ui.cpp
new file mode 100644
index 0000000..235d360
--- /dev/null
+++ b/src/libgui/project_manager_ui.cpp
@@ -0,0 +1,185 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003 Alain Gibaud <alain.gibaud@free.fr>                *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "project_manager_ui.h"
+
+#include <qpainter.h>
+#include <kiconloader.h>
+
+#include "project.h"
+#include "devices/list/device_list.h"
+#include "main_global.h"
+#include "common/gui/purl_gui.h"
+#include "device_gui.h"
+
+//----------------------------------------------------------------------------
+void PopupMenu::insertItem(const QString &icon, const QString &label, QObject *receiver, const char *slot)
+{
+  KIconLoader loader;
+  QPixmap pixmap = loader.loadIcon(icon, KIcon::Small);
+  if (receiver) KPopupMenu::insertItem(pixmap, label, receiver, slot, 0, _index);
+  else KPopupMenu::insertItem(pixmap, label, _index);
+  _index++;
+}
+
+//----------------------------------------------------------------------------
+const char *ProjectManager::HeaderItem::GROUP_LABELS[Nb_Groups] = {
+  I18N_NOOP("Device"), I18N_NOOP("Headers"), I18N_NOOP("Linker Script"),
+  I18N_NOOP("Sources"), I18N_NOOP("Objects"), I18N_NOOP("Views"),
+  I18N_NOOP("Generated"), I18N_NOOP("Included")
+};
+
+ProjectManager::Group ProjectManager::group(PURL::FileType type)
+{
+  switch (type.data().group) {
+    case PURL::Source: return SourceGroup;
+    case PURL::Header: return HeaderGroup;
+    case PURL::LinkerScript: return LinkerScriptGroup;
+    case PURL::LinkerObject: return LinkerObjectGroup;
+    case PURL::Nb_FileGroups: break;
+  }
+  return ViewGroup;
+}
+
+ProjectManager::RootItem::RootItem(KListView *listview)
+  : UrlItem(listview)
+{
+  setSelectable(false);
+  setPixmap(0, PURL::icon(PURL::Project));
+  set(PURL::Url(), true);
+}
+
+void ProjectManager::RootItem::set(const PURL::Url &url, bool standalone)
+{
+  _url = url;
+  _standalone = standalone;
+  if ( _url.isEmpty() ) setText(0, i18n("<no project>"));
+  else if (_standalone) setText(0, i18n("Standalone File"));
+  else setText(0, _url.basename());
+}
+
+ProjectManager::HeaderItem::HeaderItem(RootItem *item, Group group)
+  : KListViewItem(item), _group(group)
+{
+  if ( group!=DeviceGroup) setSelectable(false);
+  setText(0, i18n(GROUP_LABELS[group]));
+}
+
+QListViewItem *ProjectManager::HeaderItem::lastChild() const
+{
+  QListViewItem *item = firstChild();
+  if ( item==0 ) return 0;
+  for (;;) {
+    if ( item->nextSibling()==0 ) break;
+    item = item->nextSibling();
+  }
+  return item;
+}
+
+ProjectManager::FileItem::FileItem(HeaderItem *item, PURL::FileType ftype,
+                                   const PURL::Url &url, bool external)
+  : UrlItem(item), _ftype(ftype), _external(external)
+{
+  setPixmap(0, PURL::icon(ftype));
+  set(url);
+}
+
+void ProjectManager::FileItem::set(const PURL::Url &url)
+{
+  _url = url;
+  switch (_ftype.type()) {
+    case PURL::Hex:  setText(0, i18n("Hex File")); break;
+    case PURL::Coff: setText(0, i18n("Disassembly Listing")); break;
+    case PURL::Lst:  setText(0, i18n("List")); break;
+    case PURL::Map:  setText(0, i18n("Memory Map")); break;
+    case PURL::Project:
+    case PURL::Nb_FileTypes: Q_ASSERT(false); break;
+    default: {
+      QString s = url.filename();
+      if ( _external && group(_ftype)==LinkerScriptGroup )
+        s += i18n(" (default)");
+      setText(0, s); break;
+    }
+  }
+}
+
+void ProjectManager::FileItem::paintCell(QPainter *p, const QColorGroup &cg,
+                                         int column, int width, int align)
+{
+  QFont f = p->font();
+  f.setItalic(group(_ftype)!=ViewGroup && _external);
+  p->setFont(f);
+  KListViewItem::paintCell(p, cg, column, width, align);
+}
+
+ProjectManager::RegisterItem::RegisterItem(HeaderItem *item)
+  : KListViewItem(item)
+{
+  KIconLoader loader;
+  QPixmap chip = loader.loadIcon("piklab_chip", KIcon::Small);
+  setPixmap(0, chip);
+  setText(0, i18n("Registers"));
+}
+
+ProjectManager::DeviceItem::DeviceItem(HeaderItem *item)
+  : EditListViewItem(item)
+{}
+
+QWidget *ProjectManager::DeviceItem::editWidgetFactory(int) const
+{
+  QComboBox *combo = new DeviceChooser::ComboBox(Main::project()==0, 0);
+  QString device = Main::device();
+  if ( device!=Device::AUTO_DATA.name ) combo->setCurrentText(device);
+  QObject::connect(combo, SIGNAL(activated(int)), listView(), SLOT(finishRenaming()));
+  return combo;
+}
+
+void ProjectManager::DeviceItem::updateText()
+{
+  QString device = Main::device();
+  if ( device==Device::AUTO_DATA.name ) {
+    const Device::Data *data = Main::deviceData();
+    if (data) device = data->name() + " " + i18n(Device::AUTO_DATA.label);
+    else device = i18n(Device::AUTO_DATA.label);
+  }
+  setText(0, device);
+}
+
+ProjectManager::LinkerScriptItem::LinkerScriptItem(HeaderItem *item)
+  : UrlItem(item)
+{
+  init();
+}
+
+void ProjectManager::LinkerScriptItem::init()
+{
+  _url = PURL::Url();
+  PURL::Url lkr;
+  if ( Main::project() ) lkr = Main::project()->customLinkerScript();
+  setText(0, lkr.isEmpty() ? i18n("<default>") : lkr.filename());
+  setPixmap(0, lkr.isEmpty() ? QPixmap() : PURL::icon(PURL::Lkr));
+}
+
+void ProjectManager::LinkerScriptItem::set(const PURL::Url &url)
+{
+  _url = url;
+  QString s = url.filename();
+  PURL::Url lkr;
+  if ( Main::project() ) lkr = Main::project()->customLinkerScript();
+  if ( lkr.isEmpty() ) s += i18n(" (default)");
+  setText(0, s);
+  setPixmap(0, PURL::icon(PURL::Lkr));
+}
+
+PURL::Url ProjectManager::LinkerScriptItem::url() const
+{
+  if ( !_url.isEmpty() ) return _url;
+  if ( Main::project() ) return Main::project()->customLinkerScript();
+  return PURL::Url();
+}
diff --git a/src/libgui/project_manager_ui.h b/src/libgui/project_manager_ui.h
new file mode 100644
index 0000000..012eb64
--- /dev/null
+++ b/src/libgui/project_manager_ui.h
@@ -0,0 +1,121 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003 Alain Gibaud <alain.gibaud@free.fr>                *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PROJECT_MANAGER_UI_H
+#define PROJECT_MANAGER_UI_H
+
+#include <kpopupmenu.h>
+
+#include "common/global/purl.h"
+#include "common/gui/misc_gui.h"
+#include "common/gui/list_view.h"
+
+//-----------------------------------------------------------------------------
+class PopupMenu : public KPopupMenu
+{
+Q_OBJECT
+public:
+  PopupMenu() : _index(1) {}
+  void insertItem(const QString &icon, const QString &label, QObject *receiver = 0, const char *slot = 0);
+
+private:
+  uint _index; 
+};
+
+//-----------------------------------------------------------------------------
+namespace ProjectManager
+{
+  enum Rtti { RootRtti = 1000, HeaderRtti, FileRtti, DeviceRtti, RegisterRtti, LinkerScriptRtti };
+  enum Group { DeviceGroup = 0, HeaderGroup, LinkerScriptGroup, SourceGroup,
+               LinkerObjectGroup, ViewGroup, GeneratedGroup, IncludedGroup, Nb_Groups };
+  extern Group group(PURL::FileType type);
+  enum FileOrigin { Intrinsic, Generated, Included };
+
+class UrlItem : public KListViewItem
+{
+public:
+  UrlItem(KListView *listview) : KListViewItem(listview) {}
+  UrlItem(KListViewItem *item) : KListViewItem(item) {}
+  virtual PURL::Url url() const { return _url; }
+
+protected:
+  PURL::Url _url;
+};
+
+class RootItem : public UrlItem
+{
+public:
+  RootItem(KListView *listview);
+  void set(const PURL::Url &url, bool standAlone);
+  virtual int rtti() const { return RootRtti; }
+
+private:
+  bool _standalone;
+};
+
+class HeaderItem : public KListViewItem
+{
+public:
+  HeaderItem(RootItem *item, Group group);
+  virtual int rtti() const { return HeaderRtti; }
+  Group group() const { return _group; }
+  QListViewItem *lastChild() const;
+
+private:
+  static const char *GROUP_LABELS[Nb_Groups];
+  Group _group;
+};
+
+class FileItem : public UrlItem
+{
+public:
+  FileItem(HeaderItem *item, PURL::FileType type, const PURL::Url &url, bool external);
+  virtual int rtti() const { return FileRtti; }
+  PURL::FileType ftype() const { return _ftype; }
+
+private:
+  PURL::FileType _ftype;
+  bool           _external;
+
+  void set(const PURL::Url &url);
+  virtual void paintCell(QPainter *p, const QColorGroup &cg, int column, int width, int align);
+};
+
+class RegisterItem : public KListViewItem
+{
+public:
+  RegisterItem(HeaderItem *item);
+  virtual int rtti() const { return RegisterRtti; }
+};
+
+class DeviceItem : public EditListViewItem
+{
+public:
+  DeviceItem(HeaderItem *item);
+  void updateText();
+  virtual int rtti() const { return DeviceRtti; }
+
+private:
+  virtual QWidget *editWidgetFactory(int) const;
+  virtual bool alwaysAcceptEdit(int) const { return true; }
+};
+
+class LinkerScriptItem : public UrlItem
+{
+public:
+  LinkerScriptItem(HeaderItem *item);
+  void set(const PURL::Url &url);
+  virtual PURL::Url url() const;
+  void init();
+  virtual int rtti() const { return LinkerScriptRtti; }
+};
+
+} // namespace
+
+#endif
diff --git a/src/libgui/project_wizard.cpp b/src/libgui/project_wizard.cpp
new file mode 100644
index 0000000..b4d26df
--- /dev/null
+++ b/src/libgui/project_wizard.cpp
@@ -0,0 +1,283 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "project_wizard.h"
+
+#include <qheader.h>
+#include <qvbuttongroup.h>
+#include <qradiobutton.h>
+#include <qstyle.h>
+#include <kfiledialog.h>
+#include <kiconloader.h>
+
+#include "common/gui/purl_gui.h"
+#include "device_gui.h"
+#include "tools/list/tool_list.h"
+#include "tools/list/compile_config.h"
+#include "main_global.h"
+#include "project.h"
+#include "tools/list/compile_process.h"
+#include "common/gui/editlistbox.h"
+#include "devices/list/device_list.h"
+
+//-----------------------------------------------------------------------------
+FileListItem::FileListItem(KListView *view)
+  : KListViewItem(view), _group(0), _copy(true)
+{
+  KIconLoader loader;
+  _pixmap = loader.loadIcon("button_ok", KIcon::Small);
+}
+
+void FileListItem::toggle()
+{
+  _copy = !_copy;
+  repaint();
+}
+
+PURL::FileGroup FileListItem::fileGroup() const
+{
+  if ( _group==0 ) return PURL::Nb_FileGroups;
+  PURL::Url url = PURL::Url::fromPathOrUrl(text(1));
+  switch (url.data().group) {
+  case PURL::Source: {
+    FOR_EACH(PURL::ToolType, type)
+      if ( _group->implementationType(type)==url.fileType() ) return PURL::Source;
+    break;
+  }
+  case PURL::Header: return PURL::Header;
+  case PURL::LinkerScript: {
+    if ( _group->linkerScriptType()==url.fileType() ) return PURL::LinkerScript;
+    break;
+  }
+  case PURL::LinkerObject: return PURL::LinkerObject;
+  case PURL::Nb_FileGroups: break;
+  }
+  return PURL::Nb_FileGroups;
+}
+
+const QPixmap *FileListItem::pixmap(int column) const
+{
+
+  if ( column==0 && _copy ) return &_pixmap;
+  return KListViewItem::pixmap(column);
+}
+
+//-----------------------------------------------------------------------------
+FileListBox::FileListBox(QWidget *parent)
+  : EditListBox(2, 0, 0, parent, "file_list_box")
+{
+  _listView->header()->show();
+  _listView->header()->setClickEnabled(false);
+  _listView->header()->setResizeEnabled(false);
+  _listView->header()->setMovingEnabled(false);
+  _listView->setColumnText(0, i18n("Copy"));
+  int spacing = style().pixelMetric(QStyle::PM_HeaderMargin);
+  QFontMetrics fm(font());
+  _listView->header()->resizeSection(0, fm.width(i18n("Copy")) + 2*spacing); // hack
+  _listView->setColumnText(1, i18n("Filename"));
+  _listView->setAllColumnsShowFocus(true);
+  connect(_listView, SIGNAL(clicked(QListViewItem *, const QPoint &, int)), SLOT(clicked(QListViewItem *, const QPoint &, int)));
+}
+
+void FileListBox::addItem()
+{
+  PURL::UrlList urls = PURL::getOpenUrls(_directory.path(), QString::null, this, i18n("Select Files"));
+  PURL::UrlList::const_iterator it;
+  for (it=urls.begin(); it!=urls.end(); ++it) EditListBox::addItem((*it).pretty());
+}
+
+QListViewItem *FileListBox::createItem()
+{
+  return new FileListItem(_listView);
+}
+
+void FileListBox::clicked(QListViewItem *item, const QPoint &, int column)
+{
+  if ( item==0 || column!=0 ) return;
+  static_cast<FileListItem *>(item)->toggle();
+}
+
+void FileListBox::setToolGroup(const Tool::Group &group)
+{
+  QListViewItem *item = _listView->firstChild();
+  for (; item; item = item->nextSibling()) static_cast<FileListItem *>(item)->setToolGroup(group);
+}
+
+//-----------------------------------------------------------------------------
+ProjectWizard::ProjectWizard(QWidget *parent)
+  : KWizard(parent, "project_wizard"), _project(0)
+{
+  // first page
+  _first = new QWidget(this);
+  addPage(_first, i18n("New Project: Basic Settings"));
+  setHelpEnabled(_first, false);
+  QGridLayout *grid = new QGridLayout(_first, 1, 1, 10, 10);
+  QLabel *label = new QLabel(i18n("Name:"), _first);
+  grid->addWidget(label, 0, 0);
+  _name = new KLineEdit(_first);
+  _name->setFocus();
+  grid->addMultiCellWidget(_name, 0,0, 1,2);
+  label = new QLabel(i18n("Directory:"), _first);
+  grid->addWidget(label, 1, 0);
+  _directory = new PURL::DirectoryWidget(":new_project", _first);
+  grid->addMultiCellWidget(_directory, 1,1, 1,2);
+  label = new QLabel(i18n("Device:"), _first);
+  grid->addWidget(label, 2, 0);
+  _device = new DeviceChooser::Button(false, _first);
+  _device->setDevice(Main::device());
+  grid->addWidget(_device, 2, 1);
+  label = new QLabel(i18n("Toolchain:"), _first);
+  grid->addWidget(label, 3, 0);
+  _toolchain = new KeyComboBox<QString>(_first);
+  Tool::Lister::ConstIterator it;
+  for (it=Tool::lister().begin(); it!=Tool::lister().end(); ++it)
+    _toolchain->appendItem(it.key(), it.data()->label());
+  _toolchain->setCurrentItem(Main::toolGroup().name());
+  grid->addWidget(_toolchain->widget(), 3, 1);
+  grid->setColStretch(2, 1);
+  grid->setRowStretch(4, 1);
+
+  // second page
+  _second = new QWidget(this);
+  addPage(_second, i18n("New Project: Source Files"));
+  grid = new QGridLayout(_second, 1, 1, 10, 10);
+  _bgroup = new QVButtonGroup(i18n("Add Source Files"), _second);
+  _templateButton = new QRadioButton(i18n("Create template source file."), _bgroup);
+  _addButton = new QRadioButton(i18n("Add existing files."), _bgroup);
+  (void)new QRadioButton(i18n("Do not add files now."), _bgroup);
+  connect(_bgroup, SIGNAL(clicked(int)), SLOT(buttonClicked(int)));
+  grid->addWidget(_bgroup, 0, 0);
+
+  // third page
+  _third = new QWidget(this);
+  addPage(_third, i18n("New Project: Add Files"));
+  setHelpEnabled(_third, false);
+  setFinishEnabled(_third, true);
+  grid = new QGridLayout(_third, 1, 1, 10, 10);
+  _files = new FileListBox(_third);
+  grid->addWidget(_files, 0, 0);
+}
+
+void ProjectWizard::next()
+{
+  if ( currentPage()==_first ) {
+    QString name = _name->text().stripWhiteSpace();
+    if ( name.isEmpty() ) {
+      MessageBox::sorry(i18n("Project name is empty."), Log::Show);
+      return;
+    }
+    PURL::Directory directory = _directory->directory();
+    if ( directory.isEmpty() ) {
+      MessageBox::sorry(i18n("Directory is empty."), Log::Show);
+      return;
+    }
+    Log::StringView sview;
+    if ( !directory.exists() ) {
+      if ( !MessageBox::askContinue(i18n("Directory does not exists. Create it?")) ) return;
+      if ( !_directory->directory().create(sview) ) {
+        MessageBox::detailedSorry(i18n("Error creating directory."), sview.string(), Log::Show);
+        return;
+      }
+    } else if ( url().exists() ) {
+      if ( !MessageBox::askContinue(i18n("Project \"%1\"already exists. Overwrite it?").arg(url().filename())) ) return;
+    }
+    if ( !toolchain().check(device(), &Main::compileLog()) ) return;
+    _files->setDirectory(_directory->directory());
+    _files->setToolGroup(toolchain());
+    if ( toolchain().name()=="custom" ) {
+      _templateButton->hide();
+      _addButton->setChecked(true);
+    } else {
+      _templateButton->show();
+      _templateButton->setChecked(true);
+    }
+    buttonClicked(0);
+  }
+  if ( currentPage()==_third ) {
+    uint nb = 0;
+    for (uint i=0; i<_files->count(); i++)
+      if ( static_cast<const FileListItem *>(_files->item(i))->fileGroup()==PURL::Source ) nb++;
+    if ( toolchain().compileType()==Tool::SingleFile && nb>1 ) {
+      if ( !MessageBox::askContinue(i18n("The selected toolchain can only compile a single source file and you have selected %1 source files. Continue anyway? ").arg(nb)) ) return;
+    }
+  }
+  KWizard::next();
+}
+
+void ProjectWizard::done(int r)
+{
+  if ( r==Accepted ) {
+    PURL::UrlList files;
+    _project = new Project(url());
+    Compile::Config::setDevice(_project, device());
+    Compile::Config::setToolGroup(_project, toolchain());
+    Compile::Config::setCustomCommands(_project, Compile::Config::customCommands(0));
+
+    if ( _bgroup->selectedId()==0 ) {
+      PURL::ToolType ttype = PURL::ToolType::Compiler;
+      PURL::FileType ftype = PURL::Nb_FileTypes;
+      FOR_EACH(PURL::ToolType, i) {
+        PURL::FileType type = toolchain().implementationType(i);
+        if ( type==PURL::Nb_FileTypes ) continue;
+        ftype = type;
+        ttype = i;
+      }
+      Q_ASSERT( ftype!=PURL::Nb_FileTypes );
+      PURL::Url turl = url().toFileType(ftype);
+      QString text;
+      const Tool::SourceGenerator *generator = toolchain().sourceGenerator();
+      if ( generator==0 ) text = i18n("Template source file generation not implemented yet for this toolchain...");
+      else {
+        bool ok = true;
+        const Device::Data *data = Device::lister().data(device());
+        SourceLine::List lines;
+        SourceLine::List list = generator->templateSourceFile(ttype, *data, ok);
+        if ( !ok ) lines.appendTitle(i18n("Template source file generation only partially implemented."));
+        lines += list;
+        text = SourceLine::text(ftype.data().sourceFamily, lines, 4);
+      }
+      Log::StringView sview;
+      if ( turl.write(text, sview) ) files += turl;
+      else MessageBox::detailedSorry(i18n("Error creating template file."), i18n("File: %1\n").arg(turl.pretty()) + sview.string(), Log::Show);
+      _project->setOpenedFiles(files);
+    } else {
+      Log::StringView sview;
+      for (uint i=0; i<_files->count(); i++) {
+        PURL::Url furl = PURL::Url::fromPathOrUrl(_files->text(i));
+        if ( static_cast<const FileListItem *>(_files->item(i))->copy() ) {
+          PURL::Url to(url().directory(), furl.filename());
+          if ( furl==to || furl.copyTo(to, sview) ) files += to;
+        } else files += furl;
+      }
+    }
+    PURL::UrlList::const_iterator it;
+    for (it=files.begin(); it!=files.end(); ++it) _project->addFile(*it);
+  }
+  KWizard::done(r);
+}
+
+PURL::Url ProjectWizard::url() const
+{
+  return PURL::Url(PURL::Directory(_directory->directory()), _name->text(), PURL::Project);
+}
+
+const Tool::Group &ProjectWizard::toolchain() const
+{
+  return *Tool::lister().group(_toolchain->currentItem());
+}
+
+QString ProjectWizard::device() const
+{
+  return _device->device();
+}
+
+void ProjectWizard::buttonClicked(int id)
+{
+  setNextEnabled(_second, id==1);
+  setFinishEnabled(_second, id!=1);
+}
diff --git a/src/libgui/project_wizard.h b/src/libgui/project_wizard.h
new file mode 100644
index 0000000..312ef01
--- /dev/null
+++ b/src/libgui/project_wizard.h
@@ -0,0 +1,91 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PROJECT_WIZARD_H
+#define PROJECT_WIZARD_H
+
+#include <qbuttongroup.h>
+#include <qradiobutton.h>
+#include <kwizard.h>
+#include <klineedit.h>
+#include <kcombobox.h>
+
+#include "common/global/purl.h"
+#include "common/gui/editlistbox.h"
+#include "common/gui/key_gui.h"
+namespace PURL { class DirectoryWidget; }
+namespace DeviceChooser { class Button; }
+namespace Tool { class Group; }
+class Project;
+
+//-----------------------------------------------------------------------------
+class FileListItem : public KListViewItem
+{
+public:
+  FileListItem(KListView *view);
+  void setToolGroup(const Tool::Group &group) { _group = &group; }
+  bool copy() const { return _copy; }
+  void toggle();
+  PURL::FileGroup fileGroup() const;
+  virtual const QPixmap *pixmap(int column) const;
+
+private:
+  const Tool::Group *_group;
+  QPixmap _pixmap;
+  bool    _copy;
+};
+
+class FileListBox : public EditListBox
+{
+Q_OBJECT
+public:
+  FileListBox(QWidget *parent);
+  void setDirectory(const PURL::Directory &directory) { _directory = directory; }
+  void setToolGroup(const Tool::Group &group);
+
+protected slots:
+  virtual void addItem();
+  virtual void clicked(QListViewItem *item, const QPoint &point, int column);
+
+private:
+  PURL::Directory _directory;
+
+  virtual uint textColumn() const { return 1; }
+  virtual QListViewItem *createItem();
+};
+
+//-----------------------------------------------------------------------------
+class ProjectWizard : public KWizard
+{
+Q_OBJECT
+public:
+  ProjectWizard(QWidget *parent);
+  PURL::Url url() const;
+  Project *project() const { return _project; }
+
+protected slots:
+  void buttonClicked(int id);
+  virtual void next();
+  virtual void done(int r);
+
+private:
+  QWidget   *_first, *_second, *_third;
+  KLineEdit *_name;
+  PURL::DirectoryWidget *_directory;
+  DeviceChooser::Button *_device;
+  KeyComboBox<QString> *_toolchain;
+  QButtonGroup  *_bgroup;
+  QRadioButton  *_templateButton, *_addButton;
+  FileListBox   *_files;
+  Project       *_project;
+
+  QString device() const;
+  const Tool::Group &toolchain() const;
+};
+
+#endif
diff --git a/src/libgui/register_view.cpp b/src/libgui/register_view.cpp
new file mode 100644
index 0000000..3c244e8
--- /dev/null
+++ b/src/libgui/register_view.cpp
@@ -0,0 +1,51 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "register_view.h"
+
+#include <qlayout.h>
+#include <qlabel.h>
+#include <qpushbutton.h>
+#include <qcheckbox.h>
+#include <klocale.h>
+
+#include "devices/base/device_group.h"
+#include "devices/gui/device_group_ui.h"
+#include "progs/base/prog_group.h"
+#include "common/gui/misc_gui.h"
+#include "main_global.h"
+#include "editor_manager.h"
+#include "gui_debug_manager.h"
+
+//-----------------------------------------------------------------------------
+Register::MainView::MainView(const QString &title, const QString &tag, QWidget *parent)
+  : DeviceEditor(title, tag, parent, "register_view"), _debugging(false)
+{}
+
+void Register::MainView::setDevice(bool force)
+{
+  bool oldDebugging = _debugging;
+  _debugging = Main::programmerGroup().isDebugger();
+  DeviceEditor::setDevice(force || oldDebugging!=_debugging);
+}
+
+QWidget *Register::MainView::createView(const Device::Data *data, QWidget *parent)
+{
+  if ( data==0 ) return new QWidget(parent);
+  Register::View *view = Device::groupui(*data).createRegisterView(parent);
+  if (view) view->updateView();
+  else {
+    QWidget *w = new QWidget(parent);
+    QVBoxLayout *vbox = new QVBoxLayout(w, 10, 10);
+    QLabel *label = new QLabel(i18n("The selected device has no register."), w);
+    vbox->addWidget(label);
+    vbox->addStretch(1);
+    return w;
+  }
+  return view;
+}
diff --git a/src/libgui/register_view.h b/src/libgui/register_view.h
new file mode 100644
index 0000000..7d12f0d
--- /dev/null
+++ b/src/libgui/register_view.h
@@ -0,0 +1,42 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef REGISTER_EDITOR_H
+#define REGISTER_EDITOR_H
+
+#include "device_editor.h"
+#include "devices/gui/register_view.h"
+
+namespace Register
+{
+class View;
+
+//-----------------------------------------------------------------------------
+class MainView : public DeviceEditor
+{
+Q_OBJECT
+public:
+  MainView(const QString &title, const QString &tag, QWidget *parent = 0);
+  virtual bool isModified() const { return false; }
+  virtual bool isReadOnly() const { return true; }
+  virtual void addGui() {}
+  virtual void removeGui() {}
+  virtual void setFocus() {}
+  virtual void setDevice(bool force = false);
+  Register::View *view() { return static_cast<Register::View *>(_view); }
+
+private:
+  bool _debugging;
+  virtual QWidget *createView(const Device::Data *, QWidget *parent);
+  virtual void setModifiedInternal(bool) {}
+  virtual void setReadOnlyInternal(bool) {}
+};
+
+} // namespace
+
+#endif
diff --git a/src/libgui/text_editor.cpp b/src/libgui/text_editor.cpp
new file mode 100644
index 0000000..aecbc99
--- /dev/null
+++ b/src/libgui/text_editor.cpp
@@ -0,0 +1,346 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "text_editor.h"
+
+#include <qfile.h>
+#include <qtextedit.h>
+#include <qlayout.h>
+
+#include <klibloader.h>
+#include <kpopupmenu.h>
+#include <kiconloader.h>
+#include <kfiledialog.h>
+#include <klocale.h>
+#include <kapplication.h>
+#include <ktexteditor/markinterface.h>
+
+#include "main_global.h"
+#include "gui_debug_manager.h"
+#include "editor_manager.h"
+#include "global_config.h"
+#include "toplevel.h"
+
+//-----------------------------------------------------------------------------
+const TextEditor::MarkTypeData TextEditor::MARK_TYPE_DATA[Breakpoint::Nb_MarkTypes] = {
+  { KTextEditor::MarkInterface::Execution,          "piklab_program_counter"          },
+  { KTextEditor::MarkInterface::markType08,         "piklab_program_counter_disabled" },
+  { KTextEditor::MarkInterface::BreakpointActive,   "piklab_breakpoint_active"        },
+  { KTextEditor::MarkInterface::BreakpointDisabled, "piklab_breakpoint_disabled"      },
+  { KTextEditor::MarkInterface::BreakpointReached,  "piklab_breakpoint_reached"       },
+  { KTextEditor::MarkInterface::Error,              "piklab_breakpoint_invalid"       }
+};
+
+QPixmap TextEditor::pixmap(Breakpoint::MarkType type)
+{
+  return SmallIcon(MARK_TYPE_DATA[type].pixmap);
+}
+
+TextEditor::TextEditor(bool withDebugger, QWidget *parent, const char *name)
+  : Editor(parent, name), _view(0)
+{
+  KLibFactory *factory = KLibLoader::self()->factory("libkatepart");
+  if ( factory==0 ) qFatal("Could not find katepart");
+  _document = static_cast<Kate::Document *>(factory->create(this, "kate", "KTextEditor::Document"));
+  _oldModified = _document->isModified();
+  _oldReadOnly = !_document->isReadWrite();
+
+  QVBoxLayout *top = new QVBoxLayout(this, 0, 10);
+  _split = new QSplitter(this);
+  _split->setFrameStyle(QFrame::TabWidgetPanel |  QFrame::Sunken);
+  top->addWidget(_split);
+
+  connect(_document, SIGNAL(hlChanged()), SLOT(highlightChanged()));
+  setAcceptDrops(true);
+  addView();
+
+  for (uint i=0; i<Breakpoint::Nb_MarkTypes; i++)
+    _document->setPixmap(KTextEditor::MarkInterface::MarkTypes(MARK_TYPE_DATA[i].type), pixmap(Breakpoint::MarkType(i)));
+
+  if (withDebugger) QTimer::singleShot(0, this, SLOT(addToDebugManager()));
+}
+
+bool TextEditor::open(const PURL::Url &url)
+{
+  setReadOnly(url.fileType().data().properties & PURL::ReadOnly);
+  if ( !_document->openURL(url.kurl()) ) return false;
+  _view->setEol(url.isDosFile() ? Dos : Unix);
+  highlightChanged();
+  return true;
+}
+
+void TextEditor::addToDebugManager()
+{
+  static_cast<Debugger::GuiManager *>(Debugger::manager)->addTextEditor(*this);
+}
+
+bool TextEditor::eventFilter(QObject *, QEvent *e)
+{
+  if ( e->type()==QEvent::KeyPress ) {
+    if ( static_cast<QKeyEvent *>(e)->key()==Key_Escape ) return true;
+  }
+  return false;
+}
+
+void TextEditor::addView()
+{
+    KTextEditor::View *v = _document->createView(_split);
+    if ( _view==0 ) _view = static_cast<Kate::View *>(v);
+    Q_ASSERT(v);
+    connect(v, SIGNAL(gotFocus(Kate::View *)), SLOT(gotFocus(Kate::View *)));
+    connect(v, SIGNAL(cursorPositionChanged()), SLOT(statusChanged()));
+    connect(v, SIGNAL(dropEventPass(QDropEvent *)), SIGNAL(dropEventPass(QDropEvent *)));
+    connect(v, SIGNAL(newStatus()), SLOT(statusChanged()));
+    v->show();
+    v->setFocus();
+    v->child(0, "KateViewInternal")->installEventFilter(this);
+    KTextEditor::PopupMenuInterface *pmi = KTextEditor::popupMenuInterface(v);
+    pmi->installPopup(&Main::popup("ktexteditor_popup"));
+
+    // dispatch available space between views
+    QValueList<int> list = _split->sizes();
+    QValueList<int>::Iterator it;
+    int sum = 0;
+    for (it = list.begin(); it!= list.end(); ++it) sum += *it;
+    sum /= list.size();
+    for (it = list.begin(); it!=list.end(); ++it) *it = sum;
+    _split->setSizes(list);
+
+    emit guiChanged();
+}
+
+void TextEditor::gotFocus(Kate::View *v)
+{
+  _view = v;
+  setFocusProxy(v);
+  statusChanged();
+  emit guiChanged();
+}
+
+void TextEditor::addGui()
+{
+  Main::toplevel().guiFactory()->addClient(_view);
+}
+
+void TextEditor::removeGui()
+{
+  Main::toplevel().guiFactory()->removeClient(_view);
+}
+
+void TextEditor::removeCurrentView()
+{
+  delete _view;
+  _view = static_cast<Kate::View *>(_document->views().last());
+  _document->views().last()->setFocus();
+  emit guiChanged();
+}
+
+bool TextEditor::isReadOnly() const
+{
+  return !_document->isReadWrite();
+}
+
+void TextEditor::setReadOnlyInternal(bool ro)
+{
+  _oldReadOnly = ro;
+  _document->setReadWrite(!ro);
+}
+
+bool TextEditor::isModified() const
+{
+  return _document->isModified();
+}
+
+void TextEditor::setModifiedInternal(bool m)
+{
+  _oldModified = m;
+  _document->setModified(m);
+}
+
+void TextEditor::statusChanged()
+{
+  uint line, col;
+  _view->cursorPosition(&line, &col) ;
+  QString text = i18n("Line: %1  Col: %2").arg(line+1).arg(col+1);
+  if( isReadOnly() ) text += "  " + i18n("R/O");
+  emit statusTextChanged(" " + text + " ");
+  if ( isReadOnly()!=_oldReadOnly || isModified()!=_oldModified ) emit guiChanged();
+  if ( isModified()!=_oldModified ) emit modified();
+  _oldModified = isModified();
+  _oldReadOnly = isReadOnly();
+  Breakpoint::Data data(url(), line);
+  Breakpoint::updateActions(&data);
+}
+
+uint TextEditor::highlightMode(const QString &name) const
+{
+  uint mode = 0;
+  for (; mode<_document->hlModeCount(); mode++)
+    if ( _document->hlModeName(mode)==name ) break;
+  return mode;
+}
+
+void TextEditor::highlightChanged()
+{
+  if ( fileType()==PURL::Nb_FileTypes ) return;
+  // managed by hand because of collisions with file extensions
+  // used by other languages/softwares like other ASM and also PHP...
+  const char *name = fileType().data().highlightModeName;
+  if ( name==0 ) return;
+  uint mode = highlightMode(name);
+  if ( mode>=_document->hlModeCount() || _document->hlMode()==mode ) return;
+  _document->setHlMode(mode);
+}
+
+uint TextEditor::cursorLine() const
+{
+  uint line;
+  _view->cursorPosition(&line, 0);
+  return line;
+}
+
+void TextEditor::setMark(uint line, Breakpoint::MarkType type)
+{
+  _view->setIconBorder(true);
+  _document->setMark(line, MARK_TYPE_DATA[type].type);
+}
+
+void TextEditor::clearMarks(uint type)
+{
+ QPtrList<KTextEditor::Mark> marks = _document->marks();
+  QPtrListIterator<KTextEditor::Mark> it(marks);
+  for (; it.current(); ++it)
+    if ( it.current()->type==type ) _document->removeMark(it.current()->line, it.current()->type);
+}
+
+void TextEditor::clearBreakpointMarks()
+{
+  for (uint i=0; i<Breakpoint::Nb_MarkTypes; i++) clearMarks(MARK_TYPE_DATA[i].type);
+}
+
+QValueList<uint> TextEditor::bookmarkLines() const
+{
+  QValueList<uint> lines;
+  QPtrList<KTextEditor::Mark> marks = _document->marks();
+  QPtrListIterator<KTextEditor::Mark> it(marks);
+  for (; it.current(); ++it)
+    if ( it.current()->type==KTextEditor::MarkInterface::Bookmark ) lines.append(it.current()->line);
+  return lines;
+}
+
+void TextEditor::setBookmarkLines(const QValueList<uint> &lines)
+{
+  clearMarks(KTextEditor::MarkInterface::Bookmark);
+  QValueList<uint>::const_iterator it;
+  for (it=lines.begin(); it!=lines.end(); ++it)
+    _document->setMark(*it, KTextEditor::MarkInterface::Bookmark);
+}
+
+
+#if 0
+void TextEditor::slotChangedText()
+{
+    //This slot runs the instrucion set help bar,
+    // finds the current command word and compares it to the set of instrucions
+    //Found in the descript Qstringlist.
+
+
+    QString currentword;
+    QString testval;
+
+    Kate::View *v =  currentView();
+    currentword = v->currentTextLine();
+    //prepare the string for compareing
+    currentword = currentword.simplifyWhiteSpace();
+    currentword = currentword.upper();
+
+    for ( QStringList::Iterator it = descript.begin(); it != descript.end(); ++it )
+    {
+        testval = *it;
+        if(testval.startsWith(currentword.left(5)))
+        {
+            //if (testval.left(5) == currentword.left(5) ) {
+            lab_curword->setText(*it);
+        }
+        //      else {
+        //              lab_curword->setText("Pic Instruction Help");
+        //      }
+    }
+
+
+}
+#endif
+#if 0
+void TextEditor::populateList()
+{
+    //Populate the qstringlist with the pic instruction set, and the text to go along with them
+
+    descript    += "CLRF  : Clear F     OPERANDS: f";
+    descript    += "ADDWF : Add W to F  OPERANDS: f,d";
+    descript    += "ANDWF : AND W with F OPERANDS: f,d";
+    descript    += "CLRW  : Clear W     OPERANDS: NONE";
+    descript    += "COMF  : Complement F OPERANDS: f,d";
+    descript    += "DECF  : Decrement  F OPERANDS: f,d";
+    descript    += "DECSSZ: Decrement F, Skip 0 OPERANDS: f,d";
+    descript    += "INCF  : Increment F  OPERANDS: f,d";
+    descript    += "INCFSZ: Increment F, Skip 0 OPERANDS: f,d";
+    descript    += "IORWF : Inclusive OR W with F OPERANDS: f,d";
+    descript    += "MOVF  : Move F,  OPERANDS: f,d";
+    descript    += "MOVWF : Move W to F OPERANDS: f,d";
+    descript    += "NOP   : No Operation OPERANDS: NONE";
+    descript    += "RLF   : Rotate Left F through Carry OPERANDS: f,d";
+    descript    += "RRF   : Rotate Right F through Carry OPERANDS: f,d";
+    descript    += "SUBWF : Subtract W from F OPERANDS: f,d";
+    descript    += "SWAPF : Swap Nibbles in F OPERANDS: f,d";
+    descript    += "XORWF : Exclusive OR W with F OPERANDS: f,s";
+    descript    += "BCF   : Bit Clear F OPERANDS: f,b";
+    descript    += "BSF   : Bit Set F   OPERANDS: f,b";
+    descript    += "BTFSC : Bit Test F, Skip if Clear OPERANDS: f,b";
+    descript    += "BTFSS : Bit Test F, Skip if Set   OPERANDS: f,b";
+    descript    += "ADDLW : Add Literal and W OPERANDS: k";
+    descript    += "ANDLW : And Literal and W OPERANDS: k";
+    descript    += "CLRWDT: Clear Watchdog Timer OPERANDS: NONE";
+    descript    += "CALL  : Call Subroutine OPERANDS: k";
+    descript    += "GOTO  : Goto address OPERANDS: k";
+    descript    += "IORLW : Inclusive OR literal with W OPERANDS: k";
+    descript    += "MOVLW : Move Literal with W  OPERANDS: k";
+    descript    += "RETFIE: Return From Interrupt OPERANDS: NONE";
+    descript    += "RETLW : Return with Literal in W OPERANDS: k";
+    descript    += "RETURN: Return from subroutine OPERANDS: NONE";
+    descript    += "SLEEP : Go into Standby Mode OPERANDS: NONE";
+    descript    += "SUBLW : Subtract W from Literal OPERANDS: k";
+    descript    += "XORLW : Exclusive OR Literal with W OPERANDS: k";
+
+}
+#endif
+
+//-----------------------------------------------------------------------------
+SimpleTextEditor::SimpleTextEditor(bool withDebugger, PURL::FileType type, QWidget *parent, const char *name)
+  : TextEditor(withDebugger, parent, name), _type(type), _file(_sview)
+{}
+
+SimpleTextEditor::SimpleTextEditor(bool withDebugger, QWidget *parent, const char *name)
+  : TextEditor(withDebugger, parent, name), _type(PURL::Nb_FileTypes), _file(_sview)
+{}
+
+bool SimpleTextEditor::open(const PURL::Url &url)
+{
+  _type = url.fileType();
+  return TextEditor::open(url);
+}
+
+bool SimpleTextEditor::setText(const QString &text)
+{
+  _file.openForWrite();
+  _file.appendText(text);
+  _file.close();
+  if ( !_document->openURL(_file.url().kurl()) ) return false;
+  highlightChanged();
+  return true;
+}
diff --git a/src/libgui/text_editor.h b/src/libgui/text_editor.h
new file mode 100644
index 0000000..9c5a994
--- /dev/null
+++ b/src/libgui/text_editor.h
@@ -0,0 +1,103 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef TEXT_EDITOR_H
+#define TEXT_EDITOR_H
+
+#include <qsplitter.h>
+#include <qstringlist.h>
+class QSplitter;
+
+#include <kate/view.h>
+#include <kate/document.h>
+
+#include "common/gui/pfile_ext.h"
+#include "editor.h"
+#include "progs/manager/breakpoint.h"
+
+//-----------------------------------------------------------------------------
+class TextEditor : public Editor
+{
+Q_OBJECT
+public:
+  TextEditor(bool withDebugger, QWidget *parent, const char *name = 0);
+  virtual PURL::FileType fileType() const { return url().fileType(); }
+  virtual PURL::Url url() const { return _document->url(); }
+  virtual bool isModified() const;
+  virtual bool isReadOnly() const;
+  virtual void addGui();
+  virtual void removeGui();
+  virtual void setFocus() { _view->setFocus(); }
+  static QPixmap pixmap(Breakpoint::MarkType type);
+  void setMark(uint line, Breakpoint::MarkType type);
+  void clearBreakpointMarks();
+  void setCursor(uint line, uint column) { _view->setCursorPosition(line, column); }
+  uint cursorLine() const;
+  virtual bool open(const PURL::Url &url);
+  virtual bool save(const PURL::Url &url) { return _document->saveAs(url.kurl()); }
+  virtual bool eventFilter(QObject *o, QEvent *e);
+  virtual QValueList<uint> bookmarkLines() const;
+  virtual void setBookmarkLines(const QValueList<uint> &lines);
+
+public slots:
+  void addView();
+  void removeCurrentView();
+  void gotFocus(Kate::View *);
+  void highlightChanged();
+  virtual void statusChanged();
+  void selectAll() { _document->selectAll(); }
+  void deselect() { _document->clearSelection(); }
+  void copy() { _view->copy(); }
+
+protected:
+  enum EolType { Dos = 1, Unix = 0, Mac = 2 };
+  Kate::Document *_document;
+  Kate::View     *_view;
+
+private slots:
+  void addToDebugManager();
+
+private:
+  QSplitter *_split;
+  bool       _oldModified, _oldReadOnly;
+  struct MarkTypeData {
+    uint type;
+    const char *pixmap;
+  };
+  static const MarkTypeData MARK_TYPE_DATA[Breakpoint::Nb_MarkTypes];
+
+private:
+  virtual void setModifiedInternal(bool modified);
+  virtual void setReadOnlyInternal(bool readOnly);
+  uint highlightMode(const QString &name) const;
+  void clearMarks(uint type);
+};
+
+//-----------------------------------------------------------------------------
+class SimpleTextEditor : public TextEditor
+{
+Q_OBJECT
+public:
+  SimpleTextEditor(bool withDebugger, PURL::FileType type, QWidget *parent, const char *name = 0);
+  SimpleTextEditor(bool withDebugger, QWidget *parent, const char *name = 0);
+  void setFileType(PURL::FileType type) { _type = type; }
+  virtual PURL::FileType fileType() const { return _type; }
+  bool setText(const QString &text);
+  virtual bool open(const PURL::Url &url);
+
+protected:
+  virtual bool load() { return false; }
+
+private:
+  Log::StringView _sview;
+  PURL::FileType  _type;
+  PURL::TempFile  _file;
+};
+
+#endif
diff --git a/src/libgui/toplevel.cpp b/src/libgui/toplevel.cpp
new file mode 100644
index 0000000..c757ace
--- /dev/null
+++ b/src/libgui/toplevel.cpp
@@ -0,0 +1,993 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "toplevel.h"
+
+#include <qpixmap.h>
+#include <qiconset.h>
+#include <qlayout.h>
+#include <qsplitter.h>
+#include <qstringlist.h>
+#include <qtimer.h>
+#include <qprogressbar.h>
+#include <qeventloop.h>
+#include <qapplication.h>
+#include <qtooltip.h>
+
+#include <kstatusbar.h>
+#include <klocale.h>
+#include <kedittoolbar.h>
+#include <kapplication.h>
+#include <kconfig.h>
+#include <kaction.h>
+#include <kcmdlineargs.h>
+#include <kio/observer.h>
+#include <kiconloader.h>
+#include <kpopupmenu.h>
+#include <khelpmenu.h>
+#include <kmenubar.h>
+
+#include "gui_debug_manager.h"
+#include "hex_editor.h"
+#include "project_manager.h"
+#include "project.h"
+#include "global_config.h"
+#include "editor.h"
+#include "device_gui.h"
+#include "text_editor.h"
+#include "new_dialogs.h"
+#include "common/global/process.h"
+#include "common/gui/misc_gui.h"
+#include "common/gui/purl_gui.h"
+#include "devices/list/device_list.h"
+#include "progs/base/prog_config.h"
+#include "progs/list/prog_list.h"
+#include "progs/gui/prog_group_ui.h"
+#include "editor_manager.h"
+#include "tools/list/compile_manager.h"
+#include "object_view.h"
+#include "config_gen.h"
+#include "tools/list/compile_config.h"
+#include "watch_view.h"
+#include "coff/base/text_coff.h"
+#include "tools/list/tool_list.h"
+#include "breakpoint_view.h"
+#include "main_global.h"
+#include "gui_prog_manager.h"
+#include "devices/gui/register_view.h"
+#include "likeback.h"
+#include "console.h"
+#include "devices/base/device_group.h"
+#include "tools/gui/toolchain_config_center.h"
+#include "global_config.h"
+
+//----------------------------------------------------------------------------
+KDockWidget *MainWindow::createDock(const QString &name, const QPixmap &icon,
+                                    const QString &title, const DockPosition &position)
+{
+  KDockWidget *dock = createDockWidget(name, icon, 0, title);
+  dock->setDockSite(KDockWidget::DockCenter);
+  DockData ddata;
+  ddata.title = title;
+  ddata.position = position;
+  ddata.dock = dock;
+  ddata.action = new ViewMenuAction(dock);
+  connect(ddata.action, SIGNAL(activated(QWidget *)), SLOT(toggleToolView(QWidget *)));
+  _docks += ddata;
+  initDockPosition(ddata);
+  return dock;
+}
+
+MainWindow::MainWindow()
+  : _configGenerator(0), _pikloopsProcess(0), _kfindProcess(0), _forceProgramAfterBuild(false)
+{
+  Q_ASSERT( Main::_toplevel==0 );
+  Main::_toplevel = this;
+
+// status bar
+    _actionStatus = new QLabel(statusBar());
+    statusBar()->addWidget(_actionStatus);
+    _actionProgress = new QProgressBar(statusBar());
+    statusBar()->addWidget(_actionProgress);
+    _debugStatus = new QLabel(statusBar());
+    statusBar()->addWidget(_debugStatus, 0, true);
+    _editorStatus = new QLabel(statusBar());
+    statusBar()->addWidget(_editorStatus, 0, true);
+    _programmerStatus = new ProgrammerStatusWidget(statusBar());
+    connect(_programmerStatus, SIGNAL(configure()), SLOT(configureProgrammer()));
+    connect(_programmerStatus, SIGNAL(selected(const Programmer::Group &)), SLOT(selectProgrammer(const Programmer::Group &)));
+    statusBar()->addWidget(_programmerStatus->widget(), 0, true);
+    _toolStatus = new ToolStatusWidget(statusBar());
+    connect(_toolStatus, SIGNAL(configureToolchain()), SLOT(configureToolchains()));
+    connect(_toolStatus, SIGNAL(configure()), SLOT(configureProject()));
+    connect(_toolStatus, SIGNAL(selected(const Tool::Group &)), SLOT(selectTool(const Tool::Group &)));
+    statusBar()->addWidget(_toolStatus->widget(), 0, true);
+
+// interface
+    _mainDock = createDockWidget("main_dock_widget", QPixmap());
+    _mainDock->setDockSite(KDockWidget::DockCorner);
+    _mainDock->setEnableDocking(KDockWidget::DockNone);
+    setView(_mainDock);
+    setMainDockWidget(_mainDock);
+
+    KIconLoader loader;
+    KDockWidget *dock = createDock("project_manager_dock_widget", PURL::icon(PURL::Project),
+                                   i18n("Project Manager"), DockPosition(KDockWidget::DockLeft, 20));
+    Main::_projectManager = new ProjectManager::View(dock);
+    connect(Main::_projectManager, SIGNAL(guiChanged()), SLOT(updateGUI()));
+    dock->setWidget(Main::_projectManager);
+
+    dock = createDock("watch_view_dock_widget", loader.loadIcon("viewmag", KIcon::Small),
+                      i18n("Watch View"), DockPosition("project_manager_dock_widget"));
+    Main::_watchView = new Register::WatchView(dock);
+    dock->setWidget(Main::_watchView);
+
+    Main::_editorManager = new EditorManager(_mainDock);
+    _mainDock->setWidget(Main::_editorManager);
+    connect(Main::_editorManager, SIGNAL(guiChanged()), SLOT(updateGUI()));
+    connect(Main::_editorManager, SIGNAL(modified(const PURL::Url &)), Main::_projectManager, SLOT(modified(const PURL::Url &)));
+    connect(Main::_editorManager, SIGNAL(statusChanged(const QString &)), _editorStatus, SLOT(setText(const QString &)));
+
+    dock = createDock("compile_log_dock_widget", loader.loadIcon("piklab_compile", KIcon::Small),
+                      i18n("Compile Log"), DockPosition(KDockWidget::DockBottom, 80));
+    Main::_compileLog = new Compile::LogWidget(dock);
+    Main::_compileLog->setFocusPolicy(NoFocus);
+    dock->setWidget(Main::_compileLog);
+
+    dock = createDock("program_log_dock_widget", loader.loadIcon("piklab_burnchip", KIcon::Small),
+                      i18n("Program Log"), DockPosition("compile_log_dock_widget"));
+    _programLog = new Log::Widget(dock, "program_log");
+    _programLog->setFocusPolicy(NoFocus);
+    dock->setWidget(_programLog);
+
+    dock = createDock("breakpoints_dock_widget", loader.loadIcon("piklab_breakpoint_active", KIcon::Small),
+                      i18n("Breakpoints"), DockPosition("compile_log_dock_widget"));
+    Main::_breakpointsView = new Breakpoint::View(dock);
+    Main::_breakpointsView->setFocusPolicy(NoFocus);
+    dock->setWidget(Main::_breakpointsView);
+
+    dock = createDock("console_dock_widget", loader.loadIcon("konsole", KIcon::Small),
+                      i18n("Konsole"), DockPosition("compile_log_dock_widget"));
+    Main::_consoleView = new ConsoleView(dock);
+    dock->setWidget(Main::_consoleView);
+
+// managers
+    Programmer::manager = new Programmer::GuiManager(this);
+    Programmer::manager->setView(_programLog);
+    connect(Programmer::manager, SIGNAL(actionMessage(const QString &)), _actionStatus, SLOT(setText(const QString &)));
+    connect(Programmer::manager, SIGNAL(showProgress(bool)), SLOT(showProgress(bool)));
+    connect(Programmer::manager, SIGNAL(setTotalProgress(uint)), SLOT(setTotalProgress(uint)));
+    connect(Programmer::manager, SIGNAL(setProgress(uint)), SLOT(setProgress(uint)));
+
+    Debugger::manager = new Debugger::GuiManager;
+    connect(Debugger::manager, SIGNAL(targetStateChanged()), SLOT(updateGUI()));
+    connect(Debugger::manager, SIGNAL(statusChanged(const QString &)), _debugStatus, SLOT(setText(const QString &)));
+    connect(Debugger::manager, SIGNAL(actionMessage(const QString &)), _actionStatus, SLOT(setText(const QString &)));
+
+    Main::_compileManager = new Compile::Manager(this);
+    Main::_compileManager->setView(Main::_compileLog);
+    connect(Main::_compileManager, SIGNAL(success()), SLOT(compileSuccess()));
+    connect(Main::_compileManager, SIGNAL(failure()), SLOT(compileFailure()));
+    connect(Main::_compileManager, SIGNAL(updateFile(const Compile::FileData &)),
+            SLOT(updateFile(const Compile::FileData &)));
+
+// actions
+    // file actions
+    KAction *a = KStdAction::openNew(this, SLOT(newSourceFile()), actionCollection());
+    a->setText(i18n("&New Source File..."));
+    (void)new KAction(i18n("New hex File..."), "filenew", 0, this, SLOT(newHexFile()),
+                      actionCollection(), "file_new_hex");
+    KStdAction::open(this, SLOT(openFile()), actionCollection());
+    KRecentFilesAction *recent = KStdAction::openRecent(this, SLOT(openRecentFile(const KURL &)), actionCollection());
+    recent->setMaxItems(20);
+    recent->loadEntries(kapp->config(), "recent-files");
+    (void)new KAction(i18n("Save All"), 0, 0, Main::_editorManager, SLOT(saveAllFiles()),
+                      actionCollection(), "file_save_all");
+    KStdAction::close(Main::_editorManager, SLOT(closeCurrentEditor()), actionCollection());
+    (void)new KAction(i18n("C&lose All"), 0, 0, Main::_editorManager, SLOT(closeAllEditors()),
+                      actionCollection(), "file_close_all");
+    (void)new KAction(i18n("Close All Others"), 0, 0, Main::_editorManager, SLOT(closeAllOtherEditors()),
+                      actionCollection(), "file_closeother");
+    KStdAction::quit(this, SLOT(close()), actionCollection());
+
+    // edit actions
+
+    // view actions
+    (void)new KAction(i18n("Back"), "back", Qt::ALT + Qt::Key_Left,
+                      Main::_editorManager, SLOT(goBack()), actionCollection(), "history_back");
+    (void)new KAction(i18n("Forward"), "forward", Qt::ALT + Qt::Key_Right,
+                      Main::_editorManager, SLOT(goForward()), actionCollection(), "history_forward");
+    (void)new KAction(i18n("Switch to..."), 0, Qt::CTRL + Qt::Key_Slash,
+                      Main::_editorManager, SLOT(switchToEditor()), actionCollection(), "file_switchto");
+    (void)new KAction(i18n("Switch Header/Implementation"), 0, Qt::SHIFT + Qt::Key_F12,
+                      Main::_editorManager, SLOT(switchHeaderImplementation()), actionCollection(), "view_switch_source");
+    (void)new KAction(QString::null, 0, 0,
+                      Debugger::manager, SLOT(toggleBreakpoint()), actionCollection(), "toggle_breakpoint");
+    (void)new KAction(QString::null, 0, 0,
+                      Debugger::manager, SLOT(toggleEnableBreakpoint()), actionCollection(), "enable_breakpoint");
+    (void)new KAction(i18n("Show disassembly location"), 0, 0,
+                      Debugger::manager, SLOT(showDisassemblyLocation()), actionCollection(), "show_disassembly_location");
+    KActionMenu *toolViewsMenu = new KActionMenu( i18n("Tool Views"), 0, "view_tool_views");
+    connect(toolViewsMenu->popupMenu(), SIGNAL(aboutToShow()), SLOT(updateToolViewsActions()));
+    actionCollection()->insert(toolViewsMenu);
+    a = new KAction(i18n("&Reset Layout"), 0, 0, this, SLOT(resetDockLayout()), actionCollection(), "view_reset_layout");
+    toolViewsMenu->insert(a);
+    toolViewsMenu->popupMenu()->insertSeparator();
+    QValueList<DockData>::iterator it;
+    for(it=_docks.begin(); it!=_docks.end(); ++it) toolViewsMenu->insert((*it).action);
+
+    // project actions
+    (void)new KAction(i18n("New Project..."), "piklab_createproject", 0,
+                      this, SLOT(newProject()), actionCollection(), "project_new");
+    (void)new KAction(i18n("Open Project..."), "piklab_openproject", 0,
+                      this , SLOT(openProject()), actionCollection(), "project_open");
+    recent = new KRecentFilesAction(i18n("Open Recent Project"), 0,
+                      this, SLOT(openRecentProject(const KURL &)), actionCollection(), "project_open_recent");
+    recent->setMaxItems(20);
+    recent->loadEntries(kapp->config(), "recent-projects");
+    (void)new KAction(i18n("Project Options..."), "configure", 0,
+                      this, SLOT(configureProject()), actionCollection(), "project_options");
+    (void)new KAction(i18n("Close Project"), "fileclose", 0,
+                      this, SLOT(closeProject()), actionCollection(), "project_close");
+    (void)new KAction(i18n("Add Source File..."), "piklab_addfile", 0,
+                      Main::_projectManager, SLOT(insertSourceFiles()), actionCollection(), "project_add_source_file");
+    (void)new KAction(i18n("Add Object File..."), "piklab_addfile", 0,
+                      Main::_projectManager, SLOT(insertObjectFiles()), actionCollection(), "project_add_object_file");
+    (void)new KAction(i18n("Add Current File"), "piklab_addcurrentfile", 0,
+                      Main::_projectManager, SLOT(insertCurrentFile()), actionCollection(), "project_add_current_file");
+
+    // build actions
+    (void)new KAction(i18n("&Build Project"), "piklab_compile", Qt::Key_F8,
+                      this, SLOT(buildProject()), actionCollection(), "build_build_project");
+    (void)new KAction(i18n("&Compile File"), 0, Qt::SHIFT + Qt::Key_F8,
+                      this, SLOT(compileFile()), actionCollection(), "build_compile_file");
+    (void)new KAction(i18n("Clean"), "trashcan_empty", 0,
+                      this, SLOT(cleanBuild()), actionCollection(), "build_clean");
+    (void)new KAction(i18n("Stop"), "stop", 0,
+                      this, SLOT(stopBuild()), actionCollection(), "build_stop");
+
+    // programmer actions
+    (void)new KAction(i18n("&Connect"), "connect_creating", 0,
+                      Programmer::manager, SLOT(connectDevice()), actionCollection(), "prog_connect");
+    (void)new KToggleAction(i18n("Device Power"), "piklab_power", 0,
+                            Programmer::manager, SLOT(toggleDevicePower()), actionCollection(), "prog_power");
+    (void)new KAction(i18n("&Disconnect"), "connect_no", 0,
+                      Programmer::manager, SLOT(disconnectDevice()), actionCollection(), "prog_disconnect");
+    (void)new KAction(i18n("&Program"), "piklab_burnchip", Qt::SHIFT + Qt::Key_F5,
+                      this , SLOT(program()), actionCollection(), "prog_program");
+    (void)new KAction(i18n("&Verify"), "piklab_verifychip", Qt::SHIFT + Qt::Key_F6,
+                      this , SLOT(verify()), actionCollection(), "prog_verify");
+    (void)new KAction(i18n("&Read"), "piklab_readchip", Qt::SHIFT + Qt::Key_F7,
+                      this , SLOT(read()), actionCollection(), "prog_read");
+    (void)new KAction(i18n("&Erase"), "piklab_erasechip", 0,
+                      this, SLOT(erase()), actionCollection(), "prog_erase");
+    (void)new KAction(i18n("&Blank Check"), "piklab_blankcheck", 0,
+                      this, SLOT(blankCheck()), actionCollection(), "prog_blank_check");
+    (void)new KAction(i18n("&Run"), "launch", Qt::SHIFT + Qt::Key_F9,
+                      Programmer::manager, SLOT(run()), actionCollection(), "prog_run");
+    (void)new KAction(i18n("&Stop"), "piklab_stop", 0,
+                      Programmer::manager, SLOT(halt()), actionCollection(), "prog_stop");
+    (void)new KAction(i18n("R&estart"), "piklab_restart", 0,
+                      Programmer::manager, SLOT(restart()), actionCollection(), "prog_restart");
+    (void)new KAction(i18n("&Advanced..."), 0, 0,
+                      Programmer::manager , SLOT(showAdvancedDialog()), actionCollection(), "prog_advanced");
+    (void)new KAction(i18n("Settings..."), "configure", 0,
+                      this , SLOT(showProgrammerSettings()), actionCollection(), "prog_settings");
+
+    // debugger actions
+    (void)new KAction(i18n("&Start"), "launch", Qt::SHIFT + Qt::Key_F9,
+                      Programmer::manager, SLOT(restart()), actionCollection(), "debug_start");
+    (void)new KAction(i18n("&Run"), "piklab_run", Qt::SHIFT + Qt::Key_F9,
+                      Programmer::manager, SLOT(run()), actionCollection(), "debug_run");
+    (void)new KAction(i18n("&Step"), "piklab_debug_step", 0,
+                      Programmer::manager, SLOT(step()), actionCollection(), "debug_next");
+    //(void)new KAction(i18n("Step &In"), "piklab_debug_stepin",
+    //             0, this, SLOT(debugStepIn()), actionCollection(), "debug_step_in");
+    //(void)new KAction(i18n("Step &Out"), "piklab_debug_stepout",
+    //             0, this, SLOT(debugStepOut()), actionCollection(), "debug_step_out");
+    (void)new KAction(i18n("&Break<Translators: it is the verb>", "&Halt"), "piklab_debughalt", 0,
+                      Programmer::manager, SLOT(halt()), actionCollection(), "debug_halt");
+    (void)new KAction(i18n("&Disconnect/Stop"), "piklab_stop", 0,
+                      Programmer::manager, SLOT(disconnectDevice()), actionCollection(), "debug_stop");
+    (void)new KAction(i18n("R&eset"), "piklab_restart", 0,
+                      Programmer::manager, SLOT(restart()), actionCollection(), "debug_reset");
+    (void)new KAction(i18n("Show Program Counter"), "piklab_program_counter", 0,
+                      Debugger::manager, SLOT(showPC()), actionCollection(), "debug_show_pc");
+    (void)new KAction(i18n("Clear All Breakpoints"), "remove", 0,
+                      Debugger::manager, SLOT(clearBreakpoints()), actionCollection(), "debug_clear_breakpoints");
+    (void)new KAction(i18n("Settings..."), "configure", 0,
+                      this , SLOT(showDebuggerSettings()), actionCollection(), "debug_settings");
+
+    // tools
+    (void)new KAction(i18n("&Pikloops..."), 0, 0,
+                      this , SLOT(runPikloops()), actionCollection(), "tools_pikloops");
+    (void)new KAction(i18n("&Find Files..."), "find", 0,
+                      this , SLOT(runKfind()), actionCollection(), "tools_kfind");
+    (void)new KAction(i18n("&Device Information..."), "info", 0,
+                      this , SLOT(showDeviceInfo()), actionCollection(), "tools_device_information");
+    (void)new KAction(i18n("&Config Generator..."), 0, 0,
+                      this , SLOT(configGenerator()), actionCollection(), "tools_config_generator");
+    (void)new KAction(i18n("&Template Generator..."), 0, 0,
+                      this , SLOT(templateGenerator()), actionCollection(), "tools_template_generator");
+
+    // settings actions
+    (void)new KAction(i18n("Configure Toolchains..."), 0, 0,
+                      this, SLOT(configureToolchains()), actionCollection(), "options_configure_toolchains");
+    (void)KStdAction::preferences(this, SLOT(configure()), actionCollection());
+
+    // help
+    (void)new KAction(i18n("Report Bug..."), "likeback_bug", 0,
+                      LikeBack::instance(), SLOT(iFoundABug()), actionCollection(), "help_report_bug_piklab");
+
+    setupGUI();
+    readDockConfig();
+
+    // LikeBack buttons
+    menuBar()->insertItem(new QLabel(menuBar())); // #### first widget is put left-most...
+    MenuBarButton *button = new MenuBarButton("likeback_like", menuBar());
+    QToolTip::add(button, i18n("I like..."));
+    connect(button, SIGNAL(clicked()), LikeBack::instance(), SLOT(iLike()));
+    menuBar()->insertItem(button);
+    button = new MenuBarButton("likeback_dislike", menuBar());
+    QToolTip::add(button, i18n("I do not like..."));
+    connect(button, SIGNAL(clicked()), LikeBack::instance(), SLOT(iDoNotLike()));
+    menuBar()->insertItem(button);
+    button = new MenuBarButton("likeback_bug", menuBar());
+    QToolTip::add(button, i18n("I found a bug..."));
+    connect(button, SIGNAL(clicked()), LikeBack::instance(), SLOT(iFoundABug()));
+    menuBar()->insertItem(button);
+    button = new MenuBarButton("configure", menuBar());
+    QToolTip::add(button, i18n("Configure email..."));
+    connect(button, SIGNAL(clicked()), LikeBack::instance(), SLOT(askEMail()));
+    menuBar()->insertItem(button);
+    button = new MenuBarButton("help", menuBar());
+    connect(button, SIGNAL(clicked()), LikeBack::instance(), SLOT(showWhatsThisMessage()));
+    menuBar()->insertItem(button);
+
+    QTimer::singleShot(0, this, SLOT(initialLoading()));
+}
+
+MainWindow::~MainWindow()
+{}
+
+void MainWindow::readDockConfig()
+{
+  KDockMainWindow::readDockConfig(kapp->config(), "dock_config");
+
+  // if there is a new dock: it is not displayed by default...
+  QMap<QString, QString> entries = kapp->config()->entryMap("dock_config");
+  QValueList<DockData>::iterator it;
+  for(it=_docks.begin(); it!=_docks.end(); ++it) {
+    QMap<QString, QString>::const_iterator eit;
+    for(eit=entries.begin(); eit!=entries.end(); ++eit)
+      if ( eit.key().startsWith((*it).dock->name()) ) break;
+    if ( eit==entries.end() ) initDockPosition(*it);
+  }
+
+  // readDockConfig also restore the names/tooltips: what if a new version of the application changes these names...
+  for(it=_docks.begin(); it!=_docks.end(); ++it) (*it).dock->setTabPageLabel((*it).title);
+  QApplication::postEvent(this, new QEvent(QEvent::CaptionChange));
+}
+
+void MainWindow::initialLoading()
+{
+  ::BusyCursor bc;
+  KCmdLineArgs *args = KCmdLineArgs::parsedArgs();
+  if ( args->count()!=0 ) { // opened urls provided on the command line
+    for (int i = 0; i<args->count(); i++) {
+      PURL::Url url(args->url(i));
+      if ( url.fileType()==PURL::Project ) {
+        if ( Main::_projectManager->project()==0 ) Main::_projectManager->openProject(url);
+      } else Main::_editorManager->openEditor(url);
+    }
+  } else { // otherwise reopen last project/files
+    Main::_projectManager->openProject(GlobalConfig::openedProject());
+    PURL::UrlList files = GlobalConfig::openedFiles();
+    PURL::UrlList::const_iterator it = files.begin();
+    for (; it!=files.end(); ++it) Main::_editorManager->openEditor(*it);
+  }
+  updateGUI();
+}
+
+void MainWindow::openRecentFile(const KURL &kurl)
+{
+  Main::_editorManager->openFile(PURL::Url(kurl));
+}
+
+void MainWindow::configureToolbar()
+{
+  saveMainWindowSettings(KGlobal::config(), "MainWindow");
+  KEditToolbar dlg(actionCollection());
+  connect(&dlg, SIGNAL(newToolbarConfig()), SLOT(applyToolbarSettings()));
+  dlg.exec();
+}
+
+void MainWindow::applyToolbarSettings()
+{
+  createGUI();
+  applyMainWindowSettings(KGlobal::config(), "MainWindow");
+}
+
+void MainWindow::configure(ConfigCenter::Type showType)
+{
+  stopOperations();
+  ConfigCenter dialog(showType, this);
+  dialog.exec();
+  Programmer::manager->clear();
+  updateGUI();
+  Debugger::manager->update(true);
+}
+
+void MainWindow::configureToolchains()
+{
+  stopOperations();
+  ToolchainsConfigCenter dialog(Main::toolGroup(), this);
+  dialog.exec();
+  Programmer::manager->clear();
+  updateGUI();
+  Debugger::manager->update(true);
+}
+
+void MainWindow::selectProgrammer(const Programmer::Group &group)
+{
+  if ( group.name()==Main::programmerGroup().name() ) return;
+  bool debugInitialized = Debugger::manager->coff();
+  stopOperations();
+  GlobalConfig::writeProgrammerGroup(group);
+  Programmer::manager->clear();
+  updateGUI();
+  if (debugInitialized) Debugger::manager->init();
+  else Debugger::manager->update(true);
+}
+
+void MainWindow::selectTool(const Tool::Group &group)
+{
+  if ( group.name()==Compile::Config::toolGroup(Main::project()).name() ) return;
+  bool debugInitialized = Debugger::manager->coff();
+  stopOperations();
+  Compile::Config::setToolGroup(Main::project(), group);
+  updateGUI();
+  if (debugInitialized) Debugger::manager->init();
+  else Debugger::manager->update(true);
+}
+
+void MainWindow::setDevice(const QString &device)
+{
+  if ( device==i18n(Device::AUTO_DATA.label) ) Compile::Config::setDevice(Main::project(), Device::AUTO_DATA.name);
+  else Compile::Config::setDevice(Main::project(), device);
+  updateGUI();
+}
+
+void MainWindow::showDeviceInfo()
+{
+  DeviceChooser::Dialog d(Main::device(), (Main::project() ? DeviceChooser::Choose : DeviceChooser::ChooseWithAuto), this);
+  if ( d.exec() ) {
+    setDevice(d.device());
+    updateGUI();
+  }
+}
+
+void MainWindow::configGenerator()
+{
+  PURL::FileType ftype = (Main::currentEditor() ? Main::currentEditor()->fileType() : PURL::Nb_FileTypes);
+  PURL::SourceFamily family = (ftype!=PURL::Nb_FileTypes ? ftype.data().sourceFamily : PURL::SourceFamily(PURL::SourceFamily::Nb_Types));
+  PURL::ToolType type = (family!=PURL::SourceFamily::Nb_Types ? family.data().toolType : PURL::ToolType(PURL::ToolType::Assembler));
+  ConfigGenerator dialog(this);
+  dialog.set(Main::deviceData(), Main::toolGroup(), type);
+  dialog.exec();
+}
+
+void MainWindow::templateGenerator()
+{
+  PURL::FileType ftype = (Main::currentEditor() ? Main::currentEditor()->fileType() : PURL::Nb_FileTypes);
+  PURL::SourceFamily family = (ftype!=PURL::Nb_FileTypes ? ftype.data().sourceFamily : PURL::SourceFamily(PURL::SourceFamily::Nb_Types));
+  PURL::ToolType type = (family!=PURL::SourceFamily::Nb_Types ? family.data().toolType : PURL::ToolType(PURL::ToolType::Assembler));
+  TemplateGenerator dialog(this);
+  dialog.set(Main::deviceData(), Main::toolGroup(), type);
+  dialog.exec();
+}
+
+bool MainWindow::queryClose()
+{
+  if ( !stopOperations() ) return false;
+  Main::setState(Main::Closing);
+  // save list of opened editors
+  PURL::UrlList toSave;
+  const PURL::UrlList files = Main::_editorManager->files();
+  PURL::UrlList::const_iterator it;
+  for (it=files.begin(); it!=files.end(); ++it)
+    if ( !Main::_projectManager->isExternalFile(*it) ) toSave.append(*it);
+  GlobalConfig::writeOpenedFiles(toSave);
+  // close editors
+  if ( !Main::_editorManager->closeAllEditors() ) {
+    Main::setState(Main::Idle);
+    return false;
+  }
+  // save other settings
+  ::BusyCursor bc;
+  writeDockConfig(kapp->config(), "dock_config");
+  static_cast<KRecentFilesAction *>(Main::action("project_open_recent"))->saveEntries(kapp->config(), "recent-projects");
+  static_cast<KRecentFilesAction *>(Main::action("file_open_recent"))->saveEntries(kapp->config(), "recent-files");
+  GlobalConfig::writeOpenedProject(Main::project() ? Main::project()->url() : PURL::Url());
+  if ( Main::project() ) Main::_projectManager->closeProject();
+  return true;
+}
+
+void MainWindow::newSourceFile()
+{
+  NewFileDialog dialog(Main::project(), this);
+  if ( dialog.exec()!=QDialog::Accepted ) return;
+  if ( !dialog.url().exists() && !dialog.url().create(*Main::_compileLog) ) return;
+  Main::_editorManager->openEditor(dialog.url());
+  if ( dialog.addToProject() ) Main::_projectManager->insertFile(dialog.url());
+}
+
+void MainWindow::newHexFile()
+{
+  if ( Main::device()==Device::AUTO_DATA.name ) {
+    MessageBox::sorry(i18n("You need to specify a device to create a new hex file."), Log::Show);
+    return;
+  }
+  QString s;
+  for (uint i=0; true; i++) {
+    s = i18n("Hex") + (i==0 ? QString::null : QString::number(i));
+    if ( Main::_editorManager->findEditor(s)==0 ) break;
+  }
+  HexEditor *editor = new HexEditor(s, Main::_editorManager);
+  editor->memoryRead();
+  Main::_editorManager->addEditor(editor);
+}
+
+bool MainWindow::openFile()
+{
+  QString filter;
+  filter += PURL::sourceFilter(PURL::SimpleFilter);
+  filter += "\n" + PURL::filter(PURL::Hex);
+  filter += "\n" + PURL::projectFilter(PURL::SimpleFilter);
+  filter += "\n*|" + i18n("All Files");
+  PURL::Url url = PURL::getOpenUrl(":open_file", filter, this ,i18n("Open File"));
+  if ( url.fileType()==PURL::Project || url.fileType()==PURL::PikdevProject ) {
+    stopOperations();
+    if ( !Main::_projectManager->openProject(url) ) return false;
+    updateGUI();
+    return true;
+  }
+  return Main::_editorManager->openFile(url);
+}
+
+void MainWindow::updateGUI()
+{
+  bool idle = ( Main::_state==Main::Idle );
+  switch (Main::_state) {
+  case Main::Closing: return;
+  case Main::Idle:
+    showProgress(false);
+    break;
+  case Main::Compiling:
+    _actionStatus->setText(Main::_compileManager->label());
+    showProgress(true);
+    makeWidgetDockVisible(Main::_compileLog);
+    break;
+  case Main::Programming:
+    makeWidgetDockVisible(_programLog);
+    break;
+  }
+
+  // update editor actions
+  Main::_editorManager->updateTitles();
+  Main::action("file_save_all")->setEnabled(Main::currentEditor());
+  Main::action("file_close")->setEnabled(Main::currentEditor());
+  Main::action("file_close_all")->setEnabled(Main::currentEditor());
+  Main::action("file_closeother")->setEnabled(Main::_editorManager->nbEditors()>1);
+  Main::action("options_configure")->setEnabled(idle);
+  PURL::FileType currentType = (Main::currentEditor() ? Main::currentEditor()->fileType() : PURL::Nb_FileTypes);
+  bool isSource = (currentType==PURL::Nb_FileTypes ? false : currentType.data().group==PURL::Source);
+  bool isHeader = (currentType==PURL::Nb_FileTypes ? false : currentType.data().group==PURL::Header);
+  Main::action("view_switch_source")->setEnabled(isSource || isHeader);
+  Main::action("history_back")->setEnabled(Main::editorManager().history().hasBack());
+  Main::action("history_forward")->setEnabled(Main::editorManager().history().hasForward());
+  Main::action("show_disassembly_location")->setEnabled(Debugger::manager->coff()!=0 && (isSource || isHeader));
+
+  // update project
+  bool inProject = ( Main::currentEditor() && (currentType==PURL::Nb_FileTypes || Main::currentEditor()->url().isEmpty() || Main::_projectManager->contains(Main::currentEditor()->url())) );
+  if ( Main::project()==0 && !inProject ) {
+    if ( Main::currentEditor()==0 ) Main::_projectManager->closeProject();
+    else if ( isSource ) Main::_projectManager->setStandalone(Main::currentEditor()->url(), currentType);
+    else {
+      PURL::FileType type;
+      PURL::Url purl = Main::_projectManager->standaloneGenerator(Main::currentEditor()->url(), type);
+      if ( type!=PURL::Nb_FileTypes ) Main::_projectManager->setStandalone(purl, type);
+      else if ( currentType==PURL::Hex ) Main::_projectManager->setStandalone(purl, PURL::Hex);
+    }
+  }
+  if ( Main::currentEditor() ) Main::_projectManager->select(Main::currentEditor());
+
+  // update project actions
+  Main::action("project_new")->setEnabled(idle);
+  Main::action("project_open")->setEnabled(idle);
+  Main::action("project_close")->setEnabled(Main::project() && idle);
+  Main::action("project_options")->setEnabled(Main::project() && idle);
+  Main::action("project_add_source_file")->setEnabled(Main::project() && idle);
+  Main::action("project_add_object_file")->setEnabled(Main::project() && idle);
+  Main::action("project_add_current_file")->setEnabled(Main::project() && !inProject && idle && isSource);
+
+  // update build actions
+  static_cast<PopupButton *>(_toolStatus->widget())->setText(" " + Main::toolGroup().label() + " ");
+  bool hexProject = ( Main::_projectManager->projectUrl().fileType()==PURL::Hex );
+  bool customTool = Main::toolGroup().isCustom();
+  Main::action("build_build_project")->setEnabled((Main::project() || (inProject && !hexProject) ) && idle);
+  PURL::Url selected = Main::_projectManager->selectedUrl();
+  bool isSelectedSource = ( !selected.isEmpty() && selected.data().group==PURL::Source );
+  Main::action("build_compile_file")->setEnabled(!hexProject && (isSource || isSelectedSource) && idle && !customTool);
+  Main::action("build_clean")->setEnabled((Main::project() || inProject) && idle && !customTool);
+  Main::action("build_stop")->setEnabled(Main::_state==Main::Compiling);
+
+  // update programmer status
+  PortType ptype = Programmer::GroupConfig::portType(Main::programmerGroup());
+  static_cast<PopupButton *>(_programmerStatus->widget())->setText(" " + Main::programmerGroup().statusLabel(ptype) + " ");
+  QFont f = font();
+  bool supported = (Main::deviceData() ? Main::programmerGroup().isSupported(Main::deviceData()->name()) : false);
+  f.setItalic(!supported);
+  _programmerStatus->widget()->setFont(f);
+  bool isProgrammer = ( Main::programmerGroup().properties() & ::Programmer::Programmer );
+  PURL::Url purl = Main::_projectManager->projectUrl();
+  bool hasHex = ( currentType==PURL::Hex || Main::_projectManager->contains(purl.toFileType(PURL::Hex)) );
+  Main::action("prog_connect")->setEnabled(isProgrammer && idle);
+  Main::action("prog_read")->setEnabled(isProgrammer && idle);
+  Main::action("prog_program")->setEnabled(isProgrammer && hasHex && idle);
+  Main::action("prog_verify")->setEnabled(isProgrammer && hasHex && idle);
+  Main::action("prog_erase")->setEnabled(isProgrammer && idle);
+  Main::action("prog_blank_check")->setEnabled(isProgrammer && idle);
+  Programmer::State pstate = (Main::programmer() ? Main::programmer()->state() : Programmer::NotConnected);
+  static_cast<KToggleAction *>(Main::action("prog_power"))->setEnabled(isProgrammer && idle && pstate!=Programmer::NotConnected);
+  Main::action("prog_disconnect")->setEnabled(isProgrammer && idle && pstate!=Programmer::NotConnected);
+  bool isDebugger = ( Main::programmerGroup().properties() & ::Programmer::Debugger );
+  bool resetAvailable = ( Main::programmerGroup().properties() & Programmer::CanReleaseReset );
+  Main::action("prog_run")->setEnabled(idle && resetAvailable && !isDebugger && pstate!=Programmer::Running);
+  Main::action("prog_stop")->setEnabled(idle && !isDebugger && pstate==Programmer::Running);
+  Main::action("prog_restart")->setEnabled(idle && !isDebugger && pstate==Programmer::Running);
+  const Programmer::GroupUI *pgui = static_cast<const Programmer::GroupUI *>(Main::programmerGroup().gui());
+  Main::action("prog_advanced")->setEnabled(idle && pgui->hasAdvancedDialog());
+
+  // update debugger status
+  Debugger::manager->updateDevice();
+  Main::action("debug_start")->setEnabled(idle && isDebugger && pstate!=Programmer::Running && pstate!=Programmer::Halted);
+  Main::action("debug_run")->setEnabled(idle && isDebugger && pstate!=Programmer::Running && !Debugger::manager->isStepping() );
+  Main::action("debug_halt")->setEnabled(idle && isDebugger && (pstate==Programmer::Running || Debugger::manager->isStepping()) );
+  Main::action("debug_stop")->setEnabled(idle && isDebugger && (pstate==Programmer::Running || pstate==Programmer::Halted));
+  Main::action("debug_next")->setEnabled(idle && isDebugger && pstate!=Programmer::Running);
+  Main::action("debug_reset")->setEnabled(idle && isDebugger && (pstate==Programmer::Running || pstate==Programmer::Halted));
+  Main::action("debug_show_pc")->setEnabled(idle && isDebugger && Debugger::manager->coff()!=0 && Debugger::manager->pc().isInitialized() );
+
+  Main::_projectManager->updateGUI();
+
+  // caption
+  QString caption;
+  if ( Main::project() ) caption += Main::project()->name();
+  if ( Main::currentEditor() ) {
+    if ( Main::project() ) caption += " - ";
+    caption += Main::currentEditor()->url().filepath();
+  }
+  setCaption(KApplication::kApplication()->makeStdCaption(caption));
+
+  emit stateChanged();
+}
+
+void MainWindow::updateToolViewsActions()
+{
+  QValueList<DockData>::iterator it;
+  for(it=_docks.begin(); it!=_docks.end(); ++it) (*it).action->setChecked((*it).dock->mayBeHide());
+}
+
+void MainWindow::initDockPosition(const DockData &ddata)
+{
+  const DockPosition &pos = ddata.position;
+  ddata.dock->manualDock(manager()->getDockWidgetFromName(pos.parent), pos.pos, pos.space);
+}
+
+void MainWindow::resetDockLayout()
+{
+  QValueList<DockData>::iterator it;
+  for (it=_docks.begin(); it!=_docks.end(); ++it) initDockPosition(*it);
+}
+
+void MainWindow::toggleToolView(QWidget *widget)
+{
+  static_cast<KDockWidget *>(widget)->changeHideShowState();
+}
+
+void MainWindow::runKfind()
+{
+  if (_kfindProcess) return;
+  _kfindProcess = new ::Process::StringOutput;
+  QString path;
+  PURL::Url url = Main::projectManager().projectUrl();
+  if ( !url.isEmpty() ) path = url.path();
+  _kfindProcess->setup("kfind", path, false);
+  connect(_kfindProcess, SIGNAL(done(int)), SLOT(kfindDone()));
+  if ( !_kfindProcess->start(0) )
+    MessageBox::sorry(i18n("Could not run \"kfind\""), Log::Show);
+}
+
+void MainWindow::kfindDone()
+{
+  delete _kfindProcess;
+  _kfindProcess = 0;
+}
+
+void MainWindow::runPikloops()
+{
+  if (_pikloopsProcess) return;
+  _pikloopsProcess = new ::Process::StringOutput;
+  _pikloopsProcess->setup("pikloops", QStringList(), false);
+  connect(_pikloopsProcess, SIGNAL(done(int)), SLOT(pikloopsDone()));
+  if ( !_pikloopsProcess->start(0) )
+    MessageBox::detailedSorry(i18n("Could not run \"pikloops\""), i18n("The Pikloops utility (%1) is not installed in your system.").arg("http://pikloops.sourceforge.net"), Log::Show);
+}
+
+void MainWindow::pikloopsDone()
+{
+  delete _pikloopsProcess;
+  _pikloopsProcess = 0;
+}
+
+//-----------------------------------------------------------------------------
+void MainWindow::compileFile()
+{
+  Editor *e = Main::currentEditor();
+  if ( e && e->isModified() ) e->save(); // buffer is systematically saved
+  stopOperations();
+  Main::_compileLog->clear();
+  PURL::Url url = (e ? e->url() : Main::_projectManager->selectedUrl());
+  bool generated = (e ? Main::_projectManager->isExternalFile(url) : false);
+  if ( Main::project()==0 || !generated ) Main::_projectManager->removeExternalFiles();
+  url = (!generated ? url : Main::_projectManager->projectUrl());
+  if ( Main::_compileManager->compileFile(Compile::TodoItem(url, generated)) ) Main::setState(Main::Compiling);
+  else compileFailure();
+}
+
+void MainWindow::buildProject()
+{
+  if ( Main::project()==0 ) {
+    compileFile();
+    return;
+  }
+  // save modified buffers
+  PURL::UrlList files = Main::project()->absoluteFiles();
+  PURL::UrlList::const_iterator it;
+  for (it=files.begin(); it!=files.end(); ++it) {
+    // save modified editors
+    Editor *e = Main::_editorManager->findEditor(*it);
+    if ( e && e->isModified() ) e->save();
+  }
+  bool tmp = _forceProgramAfterBuild;
+  stopOperations();
+  _forceProgramAfterBuild = tmp;
+  Main::_compileLog->clear();
+  Main::_projectManager->removeExternalFiles();
+  Compile::LinkType ltype = (Main::programmerGroup().name()=="icd2_debugger" ? Compile::Icd2Linking : Compile::NormalLinking);
+  if ( Main::_compileManager->buildProject(ltype) ) Main::setState(Main::Compiling);
+  else compileFailure();
+}
+
+void MainWindow::compileFailure()
+{
+  _forceProgramAfterBuild = false;
+  Main::setState(Main::Idle);
+}
+
+void MainWindow::compileSuccess()
+{
+  if ( !Main::_compileManager->compileOnly() ) {
+    Main::_projectManager->setModified(false);
+    if ( Main::project()->outputType()==Tool::OutputType::Executable ) {
+      if ( Debugger::manager->init() ) {
+        const QStringList &included = Debugger::manager->coff()->filenames();
+        QStringList::const_iterator it;
+        for (it=included.begin(); it!=included.end(); ++it) {
+          PURL::Directory dir = (Main::project() ? Main::project()->directory() : Main::projectManager().projectUrl().directory());
+          PURL::Url url = PURL::Url::fromPathOrUrl(*it).toAbsolute(dir);
+          if ( !url.exists() ) continue;
+          Main::_projectManager->addExternalFile(url, ProjectManager::Included);
+        }
+      }
+      if ( _forceProgramAfterBuild || readConfigEntry(BaseGlobalConfig::ProgramAfterBuild).toBool() ) program();
+    }
+  }
+  _forceProgramAfterBuild = false;
+  Main::setState(Main::Idle);
+}
+
+void MainWindow::updateFile(const Compile::FileData &fdata)
+{
+  if ( fdata.actions & Compile::InProject ) {
+    if ( fdata.actions & Compile::Generated ) Main::_projectManager->addExternalFile(fdata.url, ProjectManager::Generated);
+    else if ( fdata.actions & Compile::Included ) Main::_projectManager->addExternalFile(fdata.url, ProjectManager::Included);
+    else Q_ASSERT(false);
+  }
+  if ( fdata.actions & Compile::Show ) {
+    Editor *e = Main::_editorManager->openEditor(fdata.url);
+    if (e) e->setReadOnly(true);
+  }
+}
+
+void MainWindow::cleanBuild()
+{
+  stopOperations();
+  Main::_compileLog->clear();
+  if ( Main::project() ) {
+    Compile::LinkType ltype = (Main::programmerGroup().name()=="icd2_debugger" ? Compile::Icd2Linking : Compile::NormalLinking);
+    Main::_compileManager->cleanProject(ltype);
+  } else {
+    PURL::FileType type;
+    PURL::Url url = Main::_projectManager->standaloneGenerator(Main::currentEditor()->url(), type);
+    Main::_compileManager->cleanFile(url);
+  }
+  Main::_projectManager->removeExternalFiles();
+}
+
+void MainWindow::stopBuild()
+{
+  Main::_compileManager->kill();
+}
+
+//-----------------------------------------------------------------------------
+void MainWindow::keyPressEvent(QKeyEvent *e)
+{
+  if ( e->key()==Key_Escape ) stopOperations();
+}
+
+bool MainWindow::stopOperations()
+{
+  if ( Main::_state==Main::Programming ) {
+    _programLog->log(Log::LineType::Warning, i18n("Programming in progress. Cannot be aborted."));
+    return false;
+  }
+  stopBuild();
+  Programmer::manager->stop();
+  Debugger::manager->clear();
+  return true;
+}
+
+void MainWindow::newProject()
+{
+  stopOperations();
+  Main::_projectManager->newProject();
+  updateGUI();
+  Main::_compileLog->clear();
+}
+
+void MainWindow::openProject()
+{
+  stopOperations();
+  Main::_projectManager->openProject();
+  updateGUI();
+  Main::_compileLog->clear();
+}
+
+void MainWindow::openRecentProject(const KURL &url)
+{
+  stopOperations();
+  Main::_projectManager->openProject(PURL::Url(url));
+  updateGUI();
+  Main::_compileLog->clear();
+}
+
+void MainWindow::configureProject()
+{
+  stopOperations();
+  if ( Main::project()==0 ) configure(ConfigCenter::Standalone);
+  else Main::_projectManager->editProject();
+  updateGUI();
+}
+
+void MainWindow::closeProject()
+{
+  stopOperations();
+  Main::_projectManager->closeProject();
+  updateGUI();
+  Main::_compileLog->clear();
+}
+
+//----------------------------------------------------------------------------
+HexEditor *MainWindow::getHexEditor()
+{
+  if ( Main::_projectManager->isModified() || Main::_projectManager->needsRecompile() ) {
+    MessageBox::Result res = MessageBox::Yes;
+    if ( !readConfigEntry(BaseGlobalConfig::AutoRebuildModified).toBool() ) {
+      res = MessageBox::questionYesNoCancel(i18n("The project hex file may not be up-to-date since some project files have been modified."),
+                                            i18n("Recompile First"), i18n("Continue Anyway"));
+      if ( res==MessageBox::Cancel ) return 0;
+    }
+    if ( res==MessageBox::Yes ) {
+      _forceProgramAfterBuild = true;
+      buildProject();
+      return 0;
+    }
+  }
+  if ( Main::currentEditor() && Main::currentEditor()->fileType()==PURL::Hex )
+    return static_cast<HexEditor *>(Main::currentEditor());
+  PURL::Url purl = Main::_projectManager->projectUrl();
+  HexEditor *editor = static_cast<HexEditor *>(Main::_editorManager->openEditor(purl.toFileType(PURL::Hex)));
+  if ( editor==0 ) return 0;
+  editor->setReadOnly(true);
+  return editor;
+}
+
+void MainWindow::erase()
+{
+  Programmer::manager->erase(Device::MemoryRange());
+}
+
+void MainWindow::blankCheck()
+{
+  Programmer::manager->blankCheck(Device::MemoryRange());
+}
+
+void MainWindow::program()
+{
+  HexEditor *editor = getHexEditor();
+  if ( editor==0 ) return;
+  if ( Main::programmerGroup().isDebugger() && !Main::_projectManager->contains(editor->url()) ) {
+    MessageBox::sorry(i18n("It is not possible to start a debugging session with an hex file not generated with the current project."), Log::Show);
+    return;
+  }
+  Programmer::manager->program(*editor->memory(), Device::MemoryRange());
+}
+
+void MainWindow::verify()
+{
+  HexEditor *editor = getHexEditor();
+  if ( editor==0 ) return;
+  Programmer::manager->verify(*editor->memory(), Device::MemoryRange());
+}
+
+void MainWindow::read()
+{
+  QString s = i18n("Read");
+  Editor *e = Main::_editorManager->findEditor(s);
+  if (e) Main::_editorManager->closeEditor(e, true);
+  HexEditor *editor = new HexEditor(s, Main::_editorManager);
+  editor->setDevice();
+  if ( Programmer::manager->read(*editor->memory(), Device::MemoryRange()) ) {
+    editor->memoryRead();
+    Main::_editorManager->addEditor(editor);
+  } else delete editor;
+}
+
+void MainWindow::showProgress(bool show)
+{
+  if (show) {
+    BusyCursor::start();
+    _actionStatus->show();
+    _actionProgress->show();
+  } else {
+    BusyCursor::stop();
+    _actionStatus->hide();
+    _actionProgress->hide();
+  }
+}
+
+void MainWindow::setTotalProgress(uint nb)
+{
+  //KIO::Job *job = new KIO::SimpleJob(KURL(), 0, 0, false);
+  //int id = Observer::self()->newJob(job, true);
+  //Observer::self()->slotTotalSize(job, total);
+  //Observer::self()->slotInfoMessage(job, "test");
+  //qDebug("set total steps: %i", total);
+  _actionProgress->setTotalSteps(nb);
+  _actionProgress->setProgress(0);
+  QApplication::eventLoop()->processEvents(QEventLoop::ExcludeUserInput); // #### DANGER !!!!
+}
+
+void MainWindow::setProgress(uint nb)
+{
+  _actionProgress->setProgress(nb);
+  QApplication::eventLoop()->processEvents(QEventLoop::ExcludeUserInput); // #### DANGER !!!!
+}
diff --git a/src/libgui/toplevel.h b/src/libgui/toplevel.h
new file mode 100644
index 0000000..11a4316
--- /dev/null
+++ b/src/libgui/toplevel.h
@@ -0,0 +1,132 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef TOPLEVEL_H
+#define TOPLEVEL_H
+
+#include <qlabel.h>
+#include <qprogressbar.h>
+#include <kdockwidget.h>
+
+#include "config_center.h"
+#include "tools/list/compile_process.h"
+#include "toplevel_ui.h"
+namespace Programmer { class Group; }
+namespace Tool { class Group; }
+class ConfigGenerator;
+class HexEditor;
+namespace Process { class Base; }
+
+class MainWindow : public KDockMainWindow
+{
+Q_OBJECT
+public:
+  MainWindow();
+  virtual ~MainWindow();
+  void setDevice(const QString &device);
+
+public slots:
+  void newSourceFile();
+  void newProject();
+  void openProject();
+  void buildProject();
+  void cleanBuild();
+  void configure(ConfigCenter::Type showType = ConfigCenter::General);
+  void configureProject();
+  void showDeviceInfo();
+  void runPikloops();
+  void runKfind();
+  void configGenerator();
+  void templateGenerator();
+  void updateGUI();
+
+private slots:
+  void newHexFile();
+  bool openFile();
+  void openRecentFile(const KURL &url);
+
+  void compileFile();
+  void compileSuccess();
+  void compileFailure();
+  void updateFile(const Compile::FileData &data);
+  void stopBuild();
+
+  void erase();
+  void blankCheck();
+  void program();
+  void verify();
+  void read();
+  void showProgress(bool show);
+  void setTotalProgress(uint nbSteps);
+  void setProgress(uint nbSteps);
+
+  void applyToolbarSettings();
+  void configureToolbar();
+  void configureToolchains();
+  void configureProgrammer() { configure(ConfigCenter::ProgSelect); }
+  void showProgrammerSettings() { configure(ConfigCenter::ProgOptions); }
+  void showDebuggerSettings() { configure(ConfigCenter::DebugOptions); }
+  void selectProgrammer(const Programmer::Group &group);
+  void selectTool(const Tool::Group &group);
+
+  void updateToolViewsActions();
+  void resetDockLayout();
+  void toggleToolView(QWidget *widget);
+
+  void pikloopsDone();
+  void kfindDone();
+
+  void openRecentProject(const KURL &url);
+  void closeProject();
+
+  void initialLoading();
+
+signals:
+  void stateChanged();
+
+private:
+  Log::Widget            *_programLog;
+  QLabel                 *_actionStatus, *_debugStatus, *_editorStatus;
+  ProgrammerStatusWidget *_programmerStatus;
+  ToolStatusWidget       *_toolStatus;
+  QProgressBar           *_actionProgress;
+  ConfigGenerator        *_configGenerator;
+  ::Process::Base        *_pikloopsProcess, *_kfindProcess;
+  bool _forceProgramAfterBuild;
+
+  class DockPosition {
+  public:
+    DockPosition() {}
+    DockPosition(const QString &pparent) : parent(pparent), pos(KDockWidget::DockCenter), space(0) {}
+    DockPosition(KDockWidget::DockPosition ppos, uint pspace) : parent("main_dock_widget"), pos(ppos), space(pspace) {}
+    QString parent;
+    KDockWidget::DockPosition pos;
+    uint space;
+  };
+  class DockData {
+  public:
+    ViewMenuAction *action;
+    KDockWidget    *dock;
+    QString         title;
+    DockPosition    position;
+  };
+  QValueList<DockData> _docks;
+  KDockWidget         *_mainDock;
+
+  HexEditor *getHexEditor();
+  virtual bool queryClose();
+  bool stopOperations();
+  void cleanBuild(bool singleFile);
+  virtual void keyPressEvent(QKeyEvent *e);
+  void readDockConfig();
+  KDockWidget *createDock(const QString &name, const QPixmap &icon, const QString &title, const DockPosition &position);
+  void initDockPosition(const DockData &ddata);
+};
+
+#endif
diff --git a/src/libgui/toplevel_ui.cpp b/src/libgui/toplevel_ui.cpp
new file mode 100644
index 0000000..5e8db32
--- /dev/null
+++ b/src/libgui/toplevel_ui.cpp
@@ -0,0 +1,79 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "toplevel_ui.h"
+
+#include <qstyle.h>
+#include <kiconloader.h>
+
+#include "progs/list/prog_list.h"
+#include "tools/list/tool_list.h"
+
+//----------------------------------------------------------------------------
+ProgrammerStatusWidget::ProgrammerStatusWidget(QWidget *parent)
+  : QObject(parent), KeyPopupButton<QString>(parent)
+{
+  connect(widget(), SIGNAL(activated(int)), SLOT(activatedSlot(int)));
+  widget()->appendAction(i18n("Configure..."), "configure", this, SIGNAL(configure()));
+  widget()->appendSeparator();
+  Programmer::Lister::ConstIterator it;
+  for (it=Programmer::lister().begin(); it!=Programmer::lister().end(); ++it)
+    appendItem(it.key(), it.data()->label());
+}
+
+void ProgrammerStatusWidget::activatedSlot(int id)
+{
+  emit selected(*Programmer::lister().group(key(id)));
+}
+
+//----------------------------------------------------------------------------
+ToolStatusWidget::ToolStatusWidget(QWidget *parent)
+  : QObject(parent), KeyPopupButton<QString>(parent)
+{
+  connect(widget(), SIGNAL(activated(int)), SLOT(activatedSlot(int)));
+  widget()->appendAction(i18n("Configure Toolchain..."), "configure", this, SIGNAL(configureToolchain()));
+  widget()->appendAction(i18n("Configure Compilation..."), "configure", this, SIGNAL(configure()));
+  widget()->appendSeparator();
+  Tool::Lister::ConstIterator it;
+  for (it=Tool::lister().begin(); it!=Tool::lister().end(); ++it)
+    appendItem(it.key(), it.data()->label());
+}
+
+void ToolStatusWidget::activatedSlot(int id)
+{
+  emit selected(*Tool::lister().group(key(id)));
+}
+
+//----------------------------------------------------------------------------
+ViewMenuAction::ViewMenuAction(KDockWidget *widget)
+  : KToggleAction(widget->tabPageLabel()), _widget(widget)
+{}
+
+void ViewMenuAction::slotActivated()
+{
+  KAction::slotActivated();
+  emit activated(_widget);
+}
+
+//----------------------------------------------------------------------------
+MenuBarButton::MenuBarButton(const QString &icon, QWidget *parent)
+  : QToolButton(parent, "menu_bar_button")
+{
+  QFontMetrics fm(font());
+  int h = fm.height() + 2*style().pixelMetric(QStyle::PM_DefaultFrameWidth, this);
+  setFixedHeight(h);
+  KIconLoader loader;
+  setIconSet(loader.loadIconSet(icon, KIcon::Small, fm.height()-2));
+  setUsesTextLabel(false);
+  setAutoRaise(true);
+}
+
+QSize MenuBarButton::sizeHint() const
+{
+  return QSize(QToolButton::sizeHint().width(), height());
+}
diff --git a/src/libgui/toplevel_ui.h b/src/libgui/toplevel_ui.h
new file mode 100644
index 0000000..8a5f631
--- /dev/null
+++ b/src/libgui/toplevel_ui.h
@@ -0,0 +1,77 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef TOPLEVEL_UI_H
+#define TOPLEVEL_UI_H
+
+#include <qtoolbutton.h>
+#include <kdockwidget.h>
+#include <kaction.h>
+
+#include "common/gui/key_gui.h"
+namespace Programmer { class Group; }
+namespace Tool { class Group; }
+
+//----------------------------------------------------------------------------
+class ProgrammerStatusWidget : public QObject, public KeyPopupButton<QString>
+{
+Q_OBJECT
+public:
+  ProgrammerStatusWidget(QWidget *parent);
+
+signals:
+  void configure();
+  void selected(const Programmer::Group &group);
+
+private slots:
+  void activatedSlot(int id);
+};
+
+//----------------------------------------------------------------------------
+class ToolStatusWidget : public QObject, public KeyPopupButton<QString>
+{
+Q_OBJECT
+public:
+  ToolStatusWidget(QWidget *parent);
+
+signals:
+  void configureToolchain();
+  void configure();
+  void selected(const Tool::Group &group);
+
+private slots:
+  void activatedSlot(int id);
+};
+
+//----------------------------------------------------------------------------
+class ViewMenuAction : public KToggleAction
+{
+Q_OBJECT
+public:
+  ViewMenuAction(KDockWidget *widget);
+
+signals:
+  void activated(QWidget *);
+
+private slots:
+  virtual void slotActivated();
+
+private:
+  KDockWidget *_widget;
+};
+
+//----------------------------------------------------------------------------
+class MenuBarButton : public QToolButton
+{
+Q_OBJECT
+public:
+  MenuBarButton(const QString &icon, QWidget *parent);
+  virtual QSize sizeHint() const;
+};
+
+#endif
diff --git a/src/libgui/watch_view.cpp b/src/libgui/watch_view.cpp
new file mode 100644
index 0000000..984dc7c
--- /dev/null
+++ b/src/libgui/watch_view.cpp
@@ -0,0 +1,225 @@
+/***************************************************************************
+ *   Copyright (C) 2006-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "watch_view.h"
+
+#include <qheader.h>
+#include <qcombobox.h>
+#include <kiconloader.h>
+
+#include "main_global.h"
+#include "register_view.h"
+#include "devices/base/device_group.h"
+#include "devices/gui/device_group_ui.h"
+#include "gui_debug_manager.h"
+#include "editor_manager.h"
+#include "common/gui/list_container.h"
+
+//-----------------------------------------------------------------------------
+Register::BaseListView::BaseListView(QWidget *parent)
+  : ListView(parent), _root(0)
+{
+  header()->hide();
+  setSorting(-1);
+  setFullWidth(true);
+  setRootIsDecorated(false);
+  setAllColumnsShowFocus(true);
+  connect(this, SIGNAL(mouseButtonClicked(int, QListViewItem *, const QPoint &, int)),
+          SLOT(itemClicked(int, QListViewItem *, const QPoint &, int)));
+  connect(this, SIGNAL(contextMenuRequested(QListViewItem *, const QPoint &, int)),
+          SLOT(contextMenu(QListViewItem *, const QPoint &, int)));
+}
+
+//-----------------------------------------------------------------------------
+Register::RegisterListView::RegisterListView(QWidget *parent)
+  : BaseListView(parent)
+{
+  addColumn(QString::null);
+}
+
+void Register::RegisterListView::init(const Device::Data *data)
+{
+  delete _root;
+  _root = new ListViewItemContainer(i18n("Registers"), this);
+  KIconLoader loader;
+  _root->setPixmap(0, loader.loadIcon("piklab_chip", KIcon::Small));
+  _root->setSelectable(false);
+  _root->setOpen(true);
+  if (data) Device::groupui(*data).fillWatchListContainer(_root, _ids);
+}
+
+void Register::RegisterListView::updateView()
+{
+  QListViewItemIterator it(_root);
+  for (; it.current(); ++it) {
+    int id = _root->id(it.current());
+    if ( id==-1 || _ids[id].type()==Invalid ) continue;
+    bool watched = Register::list().isWatched(_ids[id]);
+    static_cast<QCheckListItem *>(it.current())->setOn(watched);
+  }
+}
+
+void Register::RegisterListView::itemClicked(int button, QListViewItem *item, const QPoint &, int)
+{
+  if ( item==0 || button!=LeftButton ) return;
+  if ( item==firstChild() ) Main::editorManager().openEditor(EditorManager::RegisterEditor);
+  int id = _root->id(item);
+  if ( id==-1 || _ids[id].type()==Invalid ) return;
+  bool watched = Register::list().isWatched(_ids[id]);
+  static_cast<QCheckListItem *>(item)->setOn(!watched);
+  Debugger::manager->setRegisterWatched(_ids[id], !watched);
+}
+
+//-----------------------------------------------------------------------------
+Register::WatchedListView::WatchedListView(QWidget *parent)
+  : BaseListView(parent), _popup(0), _base(NumberBase::Hex)
+{
+  setSorting(0);
+  addColumn(QString::null);
+  addColumn(QString::null);
+  addColumn(QString::null);
+
+  _root = new ListViewItemContainer(i18n("Watched"), this);
+  KIconLoader loader;
+  _root->setPixmap(0, loader.loadIcon("viewmag", KIcon::Small));
+  _root->setSelectable(false);
+  _root->setOpen(true);
+}
+
+KPopupMenu *Register::WatchedListView::appendFormatMenu(KPopupMenu *parent, uint offset)
+{
+  KIconLoader loader;
+  QPixmap icon = loader.loadIcon("fonts", KIcon::Small);
+  KPopupMenu *popup = new KPopupMenu;
+  popup->insertTitle(i18n("Format"));
+  FOR_EACH(NumberBase, base) popup->insertItem(base.label(), offset + base.type());
+  parent->insertItem(icon, i18n("Format"), popup);
+  return popup;
+}
+
+void Register::WatchedListView::init(const Device::Data *data)
+{
+  delete _popup;
+  _popup = 0;
+  if ( data==0 ) return;
+  _popup = new PopupContainer(i18n("Watch Register"), this);
+  Device::groupui(*data).fillWatchListContainer(_popup, _ids);
+  _popup->insertSeparator();
+  _formatPopup = appendFormatMenu(_popup, _ids.count());
+  KIconLoader loader;
+  QPixmap icon = loader.loadIcon("cancel", KIcon::Small);
+  _popup->insertItem(icon, i18n("Clear"), Debugger::manager, SLOT(stopWatchAll()));
+}
+
+void Register::WatchedListView::updateView()
+{
+  // delete items not watched anymore
+  for (QListViewItem *item=_root->firstChild(); item;) {
+    ListViewItem *ritem = static_cast<ListViewItem *>(item);
+    item = item->nextSibling();
+    if ( !Register::list().isWatched(ritem->data()) ) delete ritem;
+  }
+  // add new items
+  bool added = false;
+  QValueList<Register::TypeData> watched = Register::list().watched();
+  QValueVector<ListViewItem *> items(watched.count());
+  for (uint k=0; k<watched.count(); k++) {
+    QListViewItem *item = _root->firstChild();
+    for (; item; item=item->nextSibling())
+      if ( static_cast<ListViewItem *>(item)->data()==watched[k] ) break;
+    if (item) {
+      items[k] = static_cast<ListViewItem *>(item);
+      items[k]->updateView();
+    } else {
+      items[k] = Device::groupui(*Main::deviceData()).createWatchItem(watched[k], _root);
+      items[k]->setBase(_base);
+      added = true;
+    }
+  }
+}
+
+QString Register::WatchedListView::tooltip(const QListViewItem &item, int col) const
+{
+  if ( item.rtti()==Register::PortBitRtti ) return static_cast<const PortBitListViewItem &>(item).tooltip(col);
+  if ( item.rtti()==Register::RegisterRtti ) return static_cast<const ListViewItem &>(item).tooltip(col);
+  return QString::null;
+}
+
+void Register::WatchedListView::itemClicked(int button, QListViewItem *item, const QPoint &, int col)
+{
+  if ( item==0 || button!=LeftButton ) return;
+  else if ( item->rtti()==RegisterRtti ) {
+    if ( col==2 && Main::programmerState()==Programmer::Halted ) static_cast<ListViewItem *>(item)->startRename();
+    else item->setOpen(!item->isOpen());
+  }
+}
+
+void Register::WatchedListView::contextMenu(QListViewItem *item, const QPoint &p, int)
+{
+  if ( item==0 ) return;
+  if ( item==firstChild() ) {
+    if ( _popup==0 ) return;
+    FOR_EACH(NumberBase, base) _formatPopup->setItemChecked(_ids.count()+base.type(), _base==base);
+    int res = _popup->exec(p);
+    if ( res<0 ) return;
+    if ( res<int(_ids.count()) ) Debugger::manager->setRegisterWatched(_ids[res], true);
+    else {
+      _base = NumberBase::Type(res-_ids.count());
+      for (QListViewItem *item=_root->firstChild(); item; item=item->nextSibling())
+        static_cast<ListViewItem *>(item)->setBase(_base);
+    }
+  } else {
+    if ( item->rtti()==Register::PortBitRtti ) return;
+    Register::ListViewItem *ritem = static_cast<ListViewItem *>(item);
+    KPopupMenu *pop = new KPopupMenu;
+    pop->insertTitle(ritem->label());
+    QPopupMenu *fpop = appendFormatMenu(pop, 0);
+    FOR_EACH(NumberBase, base) fpop->setItemChecked(base.type(), ritem->base()==base);
+    pop->insertSeparator();
+    KIconLoader loader;
+    QPixmap icon = loader.loadIcon("edit", KIcon::Small);
+    int editId = pop->insertItem(icon, i18n("Edit"));
+    pop->setItemEnabled(editId, Main::programmerState()==Programmer::Halted);
+    icon = loader.loadIcon("cancel", KIcon::Small);
+    int removeId = pop->insertItem(icon, i18n("Remove"));
+    int res = pop->exec(p);
+    if ( res==editId ) ritem->startRename();
+    else if ( res==removeId ) Debugger::manager->setRegisterWatched(ritem->data(), false);
+    else if ( res>=0 ) ritem->setBase(NumberBase::Type(res));
+    delete pop;
+  }
+}
+
+//-----------------------------------------------------------------------------
+Register::WatchView::WatchView(QWidget *parent)
+  : QWidget(parent, "watch_view"), GenericView(Register::list()), _data(0)
+{
+  QVBoxLayout *top = new QVBoxLayout(this);
+  QValueList<int> sizes;
+  sizes.append(50);
+  Splitter *splitter = new Splitter(sizes, Qt::Vertical, this, "watch_window_splitter");
+  top->addWidget(splitter);
+
+  _registerListView = new RegisterListView(splitter);
+  _watchedListView = new WatchedListView(splitter);
+}
+
+void Register::WatchView::init(bool force)
+{
+  if ( !force && _data==Main::deviceData() ) return;
+  _data = Main::deviceData();
+  _registerListView->init(_data);
+  _watchedListView->init(_data);
+  updateView();
+}
+
+void Register::WatchView::updateView()
+{
+  _registerListView->updateView();
+  _watchedListView->updateView();
+}
diff --git a/src/libgui/watch_view.h b/src/libgui/watch_view.h
new file mode 100644
index 0000000..a7ac24c
--- /dev/null
+++ b/src/libgui/watch_view.h
@@ -0,0 +1,94 @@
+/***************************************************************************
+ *   Copyright (C) 2006-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef WATCH_VIEW_H
+#define WATCH_VIEW_H
+
+#include "common/gui/list_container.h"
+#include "common/common/storage.h"
+#include "common/gui/list_view.h"
+#include "devices/base/register.h"
+namespace Device { class Data; }
+
+namespace Register
+{
+
+//-----------------------------------------------------------------------------
+class BaseListView : public ListView
+{
+Q_OBJECT
+public:
+  BaseListView(QWidget *parent);
+  virtual void init(const Device::Data *data) = 0;
+  virtual void updateView() = 0;
+
+private slots:
+  virtual void itemClicked(int button, QListViewItem *item, const QPoint &p, int col) = 0;
+  virtual void contextMenu(QListViewItem *item, const QPoint &p, int col) = 0;
+
+protected:
+  ListViewItemContainer *_root;
+  QValueVector<Register::TypeData> _ids;
+};
+
+//-----------------------------------------------------------------------------
+class RegisterListView : public BaseListView
+{
+Q_OBJECT
+public:
+  RegisterListView(QWidget *parent);
+  virtual void init(const Device::Data *data);
+  virtual void updateView();
+
+private slots:
+  virtual void itemClicked(int button, QListViewItem *item, const QPoint &p, int col);
+  virtual void contextMenu(QListViewItem *, const QPoint &, int) {}
+};
+
+//-----------------------------------------------------------------------------
+class WatchedListView : public BaseListView
+{
+Q_OBJECT
+public:
+  WatchedListView(QWidget *parent);
+  virtual QString tooltip(const QListViewItem &item, int col) const;
+  virtual void init(const Device::Data *data);
+  virtual void updateView();
+
+private slots:
+  virtual void itemClicked(int button, QListViewItem *item, const QPoint &p, int col);
+  virtual void contextMenu(QListViewItem *item, const QPoint &p, int col);
+
+private:
+  PopupContainer *_popup;
+  KPopupMenu *_formatPopup;
+  NumberBase _base;
+
+  static KPopupMenu *appendFormatMenu(KPopupMenu *parent, uint offset);
+};
+
+//-----------------------------------------------------------------------------
+class WatchView : public QWidget, public GenericView
+{
+Q_OBJECT
+public:
+  WatchView(QWidget *parent);
+  void init(bool force);
+
+public slots:
+  virtual void updateView();
+
+private:
+  WatchedListView *_watchedListView;
+  RegisterListView *_registerListView;
+  const Device::Data *_data;
+};
+
+} // namespace
+
+#endif
diff --git a/src/piklab-coff/Makefile.am b/src/piklab-coff/Makefile.am
new file mode 100644
index 0000000..5884f43
--- /dev/null
+++ b/src/piklab-coff/Makefile.am
@@ -0,0 +1,16 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+bin_PROGRAMS = piklab-coff
+OBJ = $(top_builddir)/src/common/cli/libcli.la \
+      $(top_builddir)/src/coff/base/libcoff.la \
+      $(top_builddir)/src/common/global/libglobal.la $(top_builddir)/src/devices/list/libdevicelistnoui.la \
+      $(top_builddir)/src/devices/pic/pic/libpic.la $(top_builddir)/src/devices/pic/base/libpicbase.la \
+      $(top_builddir)/src/devices/pic/xml_data/libpicxml.la \
+      $(top_builddir)/src/devices/mem24/mem24/libmem24.la $(top_builddir)/src/devices/mem24/base/libmem24base.la \
+      $(top_builddir)/src/devices/mem24/xml_data/libmem24xml.la \
+      $(top_builddir)/src/devices/base/libdevicebase.la $(top_builddir)/src/common/common/libcommon.la
+piklab_coff_DEPENDENCIES = $(OBJ)
+piklab_coff_LDADD = $(OBJ) $(LIB_KIO)
+piklab_coff_LDFLAGS = $(all_libraries) $(KDE_RPATH)
+piklab_coff_SOURCES = main.cpp
diff --git a/src/piklab-coff/main.cpp b/src/piklab-coff/main.cpp
new file mode 100644
index 0000000..bc24b53
--- /dev/null
+++ b/src/piklab-coff/main.cpp
@@ -0,0 +1,282 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "main.h"
+
+#include "common/global/pfile.h"
+#include "common/cli/cli_log.h"
+#include "devices/list/device_list.h"
+#include "devices/base/device_group.h"
+#include "common/global/about.h"
+#include "coff/base/text_coff.h"
+#include "coff/base/coff_archive.h"
+
+//-----------------------------------------------------------------------------
+const KCmdLineOptions OPTIONS[] = {
+  KCmdLineLastOption
+};
+
+const CLI::CommandData CLI::NORMAL_COMMAND_DATA[] = {
+  { "info",      NeedSource, I18N_NOOP("Return general informations.") },
+  { "variables", NeedSource, I18N_NOOP("Return informations about variables (for object).") },
+  { "symbols",   NeedSource, I18N_NOOP("Return informations about symbols.") },
+  { "sections",  NeedSource, I18N_NOOP("Return informations about sections (for object).") },
+  { "lines",     NeedSource, I18N_NOOP("Return informations about code lines (for object).") },
+  { "files",     NeedSource, I18N_NOOP("Return informations about files.") },
+  { 0, NoCommandProperty, 0 }
+};
+const CLI::CommandData CLI::INTERACTIVE_COMMAND_DATA[] = {
+  { 0, NoCommandProperty, 0 }
+};
+
+const CLI::PropertyData CLI::PROPERTY_DATA[] = {
+  { "device", "device <name>", "d", I18N_NOOP("Target device."), "device-list", I18N_NOOP("Return the list of supported devices.") },
+  { 0, 0, 0, 0, 0, 0 }
+};
+
+const KCmdLineOptions CLI::OPTIONS[] = {
+  KCmdLineLastOption
+};
+
+//-----------------------------------------------------------------------------
+CLI::Main::Main()
+ : MainBase(HasForce), _device(0)
+{}
+
+CLI::Main::~Main()
+{}
+
+CLI::ExitCode CLI::Main::prepareCommand(const QString &command)
+{
+  const CommandData *data = findCommandData(command);
+  CommandProperties properties = static_cast<CommandProperties>(data->properties);
+  int nbArgs = 0;
+  if ( properties & NeedSource ) nbArgs++;
+  if ( properties & NeedDestination ) nbArgs++;
+  if ( _args->count()<nbArgs ) return errorExit(i18n("Too few arguments."), ARG_ERROR);
+  if ( _args->count()>nbArgs ) return errorExit(i18n("Too many arguments."), ARG_ERROR);
+  uint argIndex = 0;
+  if ( properties & NeedSource ) {
+    _source = PURL::Url(_args->url(argIndex));
+    argIndex++;
+    PURL::File file(_source, *_view);
+    if ( !file.openForRead() ) return FILE_ERROR;
+  }
+  if ( properties & NeedDestination ) {
+    _dest = PURL::Url(_args->url(argIndex));
+    argIndex++;
+    if ( !_force && _dest.exists() ) return errorExit(i18n("Destination file already exists."), FILE_ERROR);
+  }
+  if ( _device==0 && (properties & NeedDevice) ) return errorExit(i18n("Device not specified."), ARG_ERROR);
+  return OK;
+}
+
+QString CLI::Main::prettyAuxSymbol(const Coff::AuxSymbol &aux)
+{
+  QString s = (aux.type()==Coff::AuxSymbolType::Nb_Types ? "?" : aux.type().label());
+  switch (aux.type().type()) {
+    case Coff::AuxSymbolType::Direct: break;
+    case Coff::AuxSymbolType::File: s += "=" + static_cast<const Coff::AuxSymbolFile &>(aux).filename(); break;
+    case Coff::AuxSymbolType::Identifier: s += "=" + static_cast<const Coff::AuxSymbolIdentifier &>(aux).string(); break;
+    case Coff::AuxSymbolType::Section: break;
+    case Coff::AuxSymbolType::Nb_Types: break;
+  }
+  return s;
+}
+
+QString CLI::Main::prettySymbol(const Coff::Symbol &sym)
+{
+  QStringList saux;
+  for (uint i=0; i<uint(sym.auxSymbols().count()); i++) saux += prettyAuxSymbol(*sym.auxSymbols()[i]);
+  QString s = (sym.auxSymbols().count()!=0 ? " aux=[" + saux.join(" ") + "]" : QString::null);
+  QStringList slist;
+  if ( sym.sectionType()!=Coff::SymbolSectionType::Nb_Types ) slist += QString("sectionType=\"%1\"").arg(sym.sectionType().label());
+  if ( sym.symbolClass()!=Coff::SymbolClass::Nb_Types ) slist += QString("class=\"%1\"").arg(sym.symbolClass().label());
+  if ( sym.type()!=Coff::SymbolType::Nb_Types ) {
+    slist += QString("type=\"%1\"").arg(sym.type().label());
+    if ( sym.derivedType()!=Coff::SymbolDerivedType::Nb_Types ) slist += QString("/\"%1\"").arg(sym.derivedType().label());
+  }
+  return slist.join(" ") + s;
+}
+
+CLI::ExitCode CLI::Main::executeCommandArchive(const QString &command, Log::KeyList &keys)
+{
+  Coff::Archive coff(_source);
+  if ( !coff.parse(*this) ) return ARG_ERROR;
+
+  if ( command=="info" ) {
+    keys = coff.information();
+    keys.setTitle(QString::null);
+    return OK;
+  }
+
+  if ( command=="symbols" ) {
+    keys = coff.symbolsInformation();
+    return OK;
+  }
+
+  if ( command=="files" ) {
+    keys = coff.membersInformation();
+    return OK;
+  }
+
+  return errorExit(i18n("Command not available for COFF of type Archive."), ARG_ERROR);
+}
+
+CLI::ExitCode CLI::Main::executeCommandObject(const QString &command, Log::KeyList &keys)
+{
+  Coff::TextObject coff(_device, _source);
+  if ( !coff.parse(*this) ) return ARG_ERROR;
+  Q_ASSERT( coff.device()==0 || coff.device()->group().name()=="pic" );
+  const Pic::Data *pdata = static_cast<const Pic::Data *>(coff.device());
+  uint nbCharsAddress = (pdata ? pdata->nbCharsAddress() : 8);
+
+  if ( command=="info" ) {
+    keys = coff.information();
+    keys.setTitle(QString::null);
+    return OK;
+  }
+
+  if ( command=="variables" ) {
+    keys.setTitle(i18n("Variables:"));
+    QMap<QString, Address>::const_iterator it;
+    for (it=coff.variables().begin(); it!=coff.variables().end(); ++it)
+      keys.append(it.key(), toHexLabelAbs(it.data()));
+    return OK;
+  }
+
+  if ( command=="symbols" ) {
+    keys.setTitle(i18n("Symbols:"));
+    for (uint i=0; i<coff.nbSymbols(); i++) {
+      if ( coff.symbol(i)==0 || coff.symbol(i)->isAuxSymbol() ) continue;
+      const Coff::Symbol &sym = static_cast<const Coff::Symbol &>(*coff.symbol(i));
+      keys.append(sym.name(), prettySymbol(sym));
+    }
+    return OK;
+  }
+
+  if ( command=="sections" ) {
+    keys.setTitle(i18n("Sections:"));
+    for (uint i=0; i<coff.nbSections(); i++) {
+      const Coff::Section *s = coff.Coff::Object::section(i);
+      keys.append(s->name(), i18n("type=\"%1\" address=%2 size=%3 flags=%4")
+        .arg(s->type()==Coff::SectionType::Nb_Types ? "?" : s->type().label())
+        .arg(toHexLabel(s->address(), nbCharsAddress)).arg(toHexLabel(s->size(), nbCharsAddress)).arg(toHexLabel(s->flags(), 8)));
+    }
+    return OK;
+  }
+
+  if ( command=="lines" ) {
+    keys.setTitle(i18n("Source Lines:"));
+    keys.append(i18n(" Filename:Line"), i18n("Address"));
+    for (uint i=0; i<coff.nbSections(); i++) {
+      const Coff::Section *s = coff.Coff::Object::section(i);
+      bool first = true;
+      for (uint k=0; k<uint(s->lines().count()); k++) {
+        if (first) {
+          first = false;
+          keys.append(i18n("section \"%1\":").arg(s->name()), QString::null);
+        }
+        const Coff::CodeLine *cl = s->lines()[k];
+        QString key = cl->filename() + ":"  + QString::number(cl->line());
+        if ( !cl->address().isValid() ) {
+          const Coff::Symbol &sym = *cl->symbol();
+          keys.append(key, i18n("symbol \"%1\"").arg(sym.name()) + prettySymbol(sym));
+        } else keys.append(key, toHexLabel(cl->address(), nbCharsAddress));
+      }
+    }
+    return OK;
+  }
+
+  if ( command=="files" ) {
+    keys.setTitle(i18n("Files:"));
+    QStringList::const_iterator it;
+    for (it=coff.filenames().begin(); it!=coff.filenames().end(); ++it)
+      keys.append(*it, QString::null);
+    return OK;
+  }
+
+  return errorExit(i18n("Command not available for COFF of type Object."), ARG_ERROR);
+}
+
+CLI::ExitCode CLI::Main::executeCommand(const QString &command)
+{
+  CoffType type = Coff::identify(_source, *this);
+  if ( type==CoffType::Nb_Types ) return ARG_ERROR;
+  Log::KeyList keys;
+  if ( command=="info" ) keys.append(i18n("COFF type:"), type.label());
+  ExitCode code = ARG_ERROR;
+  switch (type.type()) {
+    case CoffType::Archive: code = executeCommandArchive(command, keys); break;
+    case CoffType::Object: code = executeCommandObject(command, keys); break;
+    case CoffType::Nb_Types: Q_ASSERT(false); break;
+  }
+  if ( code==OK ) keys.display(*_view);
+  return code;
+}
+
+CLI::ExitCode CLI::Main::prepareRun(bool &interactive)
+{
+  interactive = false;
+  return OK;
+}
+
+CLI::ExitCode CLI::Main::executeSetCommand(const QString &property, const QString &value)
+{
+  if ( property=="device" || property=="processor" ) {
+    if ( value.isEmpty() ) {
+      _device = 0;
+      return OK;
+    }
+    QString s = value.upper();
+    _device = Device::lister().data(s);
+    if ( _device==0 ) return errorExit(i18n("Unknown device \"%1\".").arg(s), ARG_ERROR);
+    return OK;
+  }
+  return errorExit(i18n("Unknown property \"%1\".").arg(property), ARG_ERROR);
+}
+
+QString CLI::Main::executeGetCommand(const QString &property)
+{
+  if ( property=="device" || property=="processor" ) {
+    if ( _device==0 ) return i18n("<not set>");
+    return _device->name();
+  }
+  log(Log::LineType::SoftError, i18n("Unknown property \"%1\".").arg(property));
+  return QString::null;
+}
+
+CLI::ExitCode CLI::Main::list(const QString &command)
+{
+  if ( MainBase::list(command)==OK ) return OK;
+  if ( command=="device-list" ) return deviceList();
+  Q_ASSERT(false);
+  return OK;
+}
+
+CLI::ExitCode CLI::Main::deviceList()
+{
+  QValueVector<QString> devices;
+  log(Log::LineType::Normal, i18n("Supported devices:"));
+  devices = Device::lister().supportedDevices();
+  qHeapSort(devices);
+  QString s;
+  for (uint i=0; i<uint(devices.count()); i++) s += " " + devices[i];
+  log(Log::LineType::Normal, s + "\n");
+  return OK;
+}
+
+//-----------------------------------------------------------------------------
+int main(int argc, char **argv)
+{
+  CLI::Main main;
+  Piklab::AboutData *about = new Piklab::AboutData("piklab-coff", I18N_NOOP("Piklab COFF Utility"), I18N_NOOP("Command-line utility to view COFF files."));
+  CLI::OptionList list = main.optionList(I18N_NOOP("COFF filename."));
+  Piklab::init(about, argc, argv, false, list.ptr());
+  return main.doRun();
+}
diff --git a/src/piklab-coff/main.h b/src/piklab-coff/main.h
new file mode 100644
index 0000000..21ac319
--- /dev/null
+++ b/src/piklab-coff/main.h
@@ -0,0 +1,52 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef MAIN_H
+#define MAIN_H
+
+#include "common/global/pfile.h"
+#include "devices/base/hex_buffer.h"
+#include "common/cli/cli_main.h"
+namespace Device { class Data; class Memory; }
+namespace Coff { class Symbol; class AuxSymbol; }
+
+namespace CLI
+{
+//----------------------------------------------------------------------------
+enum CommandProperty { NoCommandProperty = 0, NeedSource = 1, NeedDestination = 2, NeedDevice = 4 };
+Q_DECLARE_FLAGS(CommandProperties, CommandProperty)
+Q_DECLARE_OPERATORS_FOR_FLAGS(CommandProperties)
+
+//----------------------------------------------------------------------------
+class Main : public MainBase
+{
+Q_OBJECT
+public:
+  Main();
+  virtual ~Main();
+
+private:
+  const Device::Data *_device;
+  PURL::Url           _source, _dest;
+
+  virtual ExitCode prepareCommand(const QString &command);
+  virtual ExitCode executeCommand(const QString &command);
+  virtual ExitCode prepareRun(bool &interactive);
+  virtual ExitCode executeSetCommand(const QString &property, const QString &value);
+  ExitCode executeCommandArchive(const QString &command, Log::KeyList &keys);
+  ExitCode executeCommandObject(const QString &command, Log::KeyList &keys);
+  virtual QString executeGetCommand(const QString &property);
+  virtual ExitCode list(const QString &listName);
+  ExitCode deviceList();
+  static QString prettyAuxSymbol(const Coff::AuxSymbol &aux);
+  static QString prettySymbol(const Coff::Symbol &sym);
+};
+
+} // namespace
+
+#endif
diff --git a/src/piklab-coff/piklab-coff.pro b/src/piklab-coff/piklab-coff.pro
new file mode 100644
index 0000000..901ed21
--- /dev/null
+++ b/src/piklab-coff/piklab-coff.pro
@@ -0,0 +1,15 @@
+STOPDIR = ../..
+include($${STOPDIR}/app.pro)
+
+TARGET   = piklab-coff
+HEADERS += main.h
+SOURCES += main.cpp
+LIBS    += ../coff/base/libcoff.a \
+           ../devices/list/libdevicelist.a \
+           ../devices/mem24/mem24/libmem24.a ../devices/mem24/xml_data/libmem24xml.a \
+           ../devices/mem24/base/libmem24base.a \
+           ../devices/pic/pic/libpic.a ../devices/pic/xml_data/libpicxml.a \
+           ../devices/pic/base/libpicbase.a \
+           ../devices/base/libdevicebase.a \
+           ../common/cli/libcli.a ../common/global/libglobal.a \
+           ../common/nokde/libnokde.a ../common/common/libcommon.a
diff --git a/src/piklab-hex/Makefile.am b/src/piklab-hex/Makefile.am
new file mode 100644
index 0000000..b7ccf7e
--- /dev/null
+++ b/src/piklab-hex/Makefile.am
@@ -0,0 +1,15 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+bin_PROGRAMS = piklab-hex
+OBJ =   $(top_builddir)/src/common/cli/libcli.la \
+        $(top_builddir)/src/common/global/libglobal.la $(top_builddir)/src/devices/list/libdevicelistnoui.la \
+	$(top_builddir)/src/devices/pic/pic/libpic.la $(top_builddir)/src/devices/pic/base/libpicbase.la \
+	$(top_builddir)/src/devices/pic/xml_data/libpicxml.la \
+	$(top_builddir)/src/devices/mem24/mem24/libmem24.la $(top_builddir)/src/devices/mem24/base/libmem24base.la \
+	$(top_builddir)/src/devices/mem24/xml_data/libmem24xml.la \
+	$(top_builddir)/src/devices/base/libdevicebase.la $(top_builddir)/src/common/common/libcommon.la
+piklab_hex_DEPENDENCIES = $(OBJ)
+piklab_hex_LDADD = $(OBJ) $(LIB_KIO)
+piklab_hex_LDFLAGS = $(all_libraries) $(KDE_RPATH)
+piklab_hex_SOURCES = main.cpp
diff --git a/src/piklab-hex/main.cpp b/src/piklab-hex/main.cpp
new file mode 100644
index 0000000..6323770
--- /dev/null
+++ b/src/piklab-hex/main.cpp
@@ -0,0 +1,291 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "main.h"
+
+#include "common/global/pfile.h"
+#include "common/cli/cli_log.h"
+#include "devices/list/device_list.h"
+#include "devices/pic/base/pic.h"
+#include "devices/pic/pic/pic_memory.h"
+#include "devices/base/device_group.h"
+#include "common/global/about.h"
+
+//-----------------------------------------------------------------------------
+const KCmdLineOptions OPTIONS[] = {
+  KCmdLineLastOption
+};
+
+const CLI::CommandData CLI::NORMAL_COMMAND_DATA[] = {
+  { "check",    NeedSource1 | NeedCorrectInput, I18N_NOOP("Check hex file for correctness (if a device is specified, check if hex file is compatible with it).") },
+  { "info",     NeedSource1 | NeedCorrectInput, I18N_NOOP("Return information about hex file.") },
+  { "fix",      NeedSource1 | NeedDestination,  I18N_NOOP("Clean hex file and fix errors (wrong CRC, truncated line, truncated file).") },
+  { "compare",  NeedSource1 | NeedSource2 | NeedCorrectInput, I18N_NOOP("Compare two hex files.") },
+  { "checksum", NeedSource1 | NeedCorrectInput | NeedDevice, I18N_NOOP("Return checksum.") },
+  { "create",   NeedDestination | NeedDevice, I18N_NOOP("Create an hex file for the specified device.") },
+  { 0, NoCommandProperty, 0 }
+};
+const CLI::CommandData CLI::INTERACTIVE_COMMAND_DATA[] = {
+  { 0, NoCommandProperty, 0 }
+};
+
+const CLI::PropertyData CLI::PROPERTY_DATA[] = {
+  { "device", "device <name>", "d", I18N_NOOP("Target device."), "device-list", I18N_NOOP("Return the list of supported devices.") },
+  { "fill",   "fill <value>",  0,   I18N_NOOP("Fill option."),   "fill-list",   I18N_NOOP("Return the list of supported fill options.") },
+  { 0, 0, 0, 0, 0, 0 }
+};
+
+const KCmdLineOptions CLI::OPTIONS[] = {
+  KCmdLineLastOption
+};
+
+const CLI::FillOptions CLI::FILL_OPTIONS[] = {
+  { "blank", I18N_NOOP("Fill with blank values (default).") },
+  { "zero",  I18N_NOOP("Fill with zeroes.") },
+  { "checksum_check", I18N_NOOP("Fill for checksum verification (cf datasheets).") },
+  { 0, 0 }
+};
+
+//-----------------------------------------------------------------------------
+CLI::Main::Main()
+ : MainBase(HasForce), _device(0), _memory(0)
+{}
+
+CLI::Main::~Main()
+{
+  delete _memory;
+}
+
+CLI::ExitCode CLI::Main::prepareCommand(const QString &command)
+{
+  const CommandData *data = findCommandData(command);
+  CommandProperties properties = static_cast<CommandProperties>(data->properties);
+  int nbArgs = 0;
+  if ( properties & NeedSource1 ) nbArgs++;
+  if ( properties & NeedSource2 ) nbArgs++;
+  if ( properties & NeedDestination ) nbArgs++;
+  if ( _args->count()<nbArgs ) return errorExit(i18n("Too few arguments."), ARG_ERROR);
+  if ( _args->count()>nbArgs ) return errorExit(i18n("Too many arguments."), ARG_ERROR);
+  uint argIndex = 0;
+  if ( properties & NeedSource1 ) {
+    PURL::Url url = PURL::Url(_args->url(argIndex));
+    argIndex++;
+    PURL::File file(url, *_view);
+    if ( !file.openForRead() ) return FILE_ERROR;
+    _errors = _source1.load(file.stream(), _format);
+    if ( (properties & NeedCorrectInput) && !_errors.isEmpty() ) {
+      QString s = (properties & NeedSource2 ? i18n("First hex file: ") : QString::null);
+      for (uint i=0; i<uint(_errors.count()); i++) log(Log::LineType::Error, s + _errors[i].message());
+      return EXEC_ERROR;
+    }
+  }
+  if ( properties & NeedSource2 ) {
+    PURL::Url url = PURL::Url(_args->url(argIndex));
+    argIndex++;
+    PURL::File file(url, *_view);
+    if ( !file.openForRead() ) return FILE_ERROR;
+    _errors = _source2.load(file.stream(), _format);
+    if ( (properties & NeedCorrectInput) && !_errors.isEmpty() ) {
+      QString s = (properties & NeedSource1 ? i18n("Second hex file: ") : QString::null);
+      for (uint i=0; i<uint(_errors.count()); i++) log(Log::LineType::Error, s + _errors[i].message());
+      return EXEC_ERROR;
+    }
+  }
+  if ( properties & NeedDestination ) {
+    _dest = PURL::Url(_args->url(argIndex));
+    argIndex++;
+    if ( !_force && _dest.exists() ) return errorExit(i18n("Destination file already exists."), FILE_ERROR);
+  }
+  if ( _device==0 && (properties & NeedDevice) ) return errorExit(i18n("Device not specified."), ARG_ERROR);
+  return OK;
+}
+
+CLI::ExitCode CLI::Main::executeCommand(const QString &command)
+{
+  if (_device) {
+    delete _memory;
+    _memory = _device->group().createMemory(*_device);
+  }
+  if ( command=="check" ) {
+    if ( _device==0 ) return okExit(i18n("Hex file is valid."));
+    QStringList warnings;
+    Device::Memory::WarningTypes wtypes = _memory->fromHexBuffer(_source1, warnings);
+    if ( wtypes==Device::Memory::NoWarning ) return okExit(i18n("Hex file is compatible with device \"%1\".").arg(_device->name()));
+    return errorExit(warnings.join("\n"), EXEC_ERROR);
+  }
+  if ( command=="info" ) {
+    Log::KeyList  keys;
+    keys.append(i18n("Format:"), HexBuffer::FORMATS[_format]);
+    uint nbWords = 0, start = 0, end = 0;
+    HexBuffer::const_iterator it;
+    for (it=_source1.begin(); it!=_source1.end(); ++it) {
+      if ( !it.data().isInitialized() ) continue;
+      nbWords++;
+      if ( nbWords==1 ) {
+        start = it.key();
+        end = it.key();
+      } else {
+        start = qMin(start, it.key());
+        end = qMax(end, it.key());
+      }
+    }
+    keys.append(i18n("No. of Words:"), toHexLabelAbs(nbWords));
+    if ( nbWords!=0 ) {
+      uint nbc = nbChars(NumberBase::Hex, end);
+      keys.append(i18n("Start:"), toHexLabel(start, nbc));
+      keys.append(i18n("End:"), toHexLabel(end, nbc));
+    }
+    keys.display(*_view);
+    return okExit(i18n("Hex file is valid."));
+  }
+  if ( command=="fix" ) {
+    for (uint i=0; i<uint(_errors.count()); i++)
+      if ( _errors[i].type==HexBuffer::UnrecognizedFormat ) return errorExit(i18n("Hex file cannot be fixed because the format was not recognized or is inconsistent."), EXEC_ERROR);
+    if ( _format==HexBuffer::Nb_Formats ) _format = HexBuffer::IHX32;
+    PURL::File dest(_dest, *_view);
+    if ( !dest.openForWrite() ) return FILE_ERROR;
+    _source1.savePartial(dest.stream(), _format);
+    _source1.saveEnd(dest.stream());
+    if ( !dest.close() ) return FILE_ERROR;
+    if ( _errors.isEmpty() ) return okExit(i18n("Hex file cleaned."));
+    return okExit(i18n("Hex file cleaned and fixed."));
+  }
+  if ( command=="compare" ) {
+    bool firstInSecond = true, secondInFirst = true;
+    HexBuffer::const_iterator it;
+    for (it=_source1.begin(); it!=_source1.end(); ++it) {
+      if ( it.data().maskWith(0xFFFF)==_source2[it.key()].maskWith(0xFFFF) ) continue;
+      firstInSecond = false;
+    }
+    for (it=_source2.begin(); it!=_source2.end(); ++it) {
+      if ( it.data().maskWith(0xFFFF)==_source1[it.key()].maskWith(0xFFFF) ) continue;
+      secondInFirst = false;
+    }
+    if ( firstInSecond && secondInFirst ) return okExit(i18n("The two hex files have the same content."));
+    if (firstInSecond) log(Log::LineType::Information, i18n("The first hex file is a subset of the second one."));
+    if (secondInFirst) log(Log::LineType::Information, i18n("The second hex file is a subset of the first one."));
+    return errorExit(i18n("The two hex files are different at address %1.").arg(toHexLabel(it.key(), 8)), EXEC_ERROR);
+  }
+  if ( command=="checksum" ) {
+    QStringList warnings;
+    Device::Memory::WarningTypes wtypes = _memory->fromHexBuffer(_source1, warnings);
+    for (uint i=0; i<uint(warnings.count()); i++) log(Log::LineType::Warning, warnings[i]);
+    log(Log::LineType::Warning, i18n("Checksum computation is experimental and is not always correct!")); // #### REMOVE ME
+    BitValue cs = _memory->checksum();
+    log(Log::LineType::Normal, i18n("Checksum: %1").arg(toHexLabel(cs, 4)));
+    if ( _device->group().name()=="pic" ) {
+      BitValue ucs = static_cast<Pic::Memory *>(_memory)->unprotectedChecksum();
+      if ( ucs!=cs ) log(Log::LineType::Information, i18n("Unprotected checksum: %1").arg(toHexLabel(ucs, 4)));
+    }
+    return OK;
+  }
+  if ( command=="create" ) {
+    if ( _fill.isEmpty() || _fill=="blank" ) ; // default
+    else if ( _fill=="zero" ) _memory->fill(0x0);
+    else if ( _fill=="checksum_check" ) {
+      if ( _device->group().name()=="pic" ) static_cast<Pic::Memory *>(_memory)->checksumCheckFill();
+    } else {
+      bool ok;
+      uint value = fromAnyLabel(_fill, &ok);
+      Q_ASSERT(ok);
+      _memory->fill(value);
+    }
+    PURL::File dest(_dest, *_view);
+    if ( !dest.openForWrite() ) return FILE_ERROR;
+    _memory->save(dest.stream(), HexBuffer::IHX32);
+    if ( !dest.close() ) return FILE_ERROR;
+    return okExit(i18n("File created."));
+  }
+  Q_ASSERT(false);
+  return ARG_ERROR;
+}
+
+CLI::ExitCode CLI::Main::prepareRun(bool &interactive)
+{
+  interactive = false;
+  return OK;
+}
+
+CLI::ExitCode CLI::Main::executeSetCommand(const QString &property, const QString &value)
+{
+  if ( property=="device" || property=="processor" ) {
+    if ( value.isEmpty() ) {
+      _device = 0;
+      return OK;
+    }
+    QString s = value.upper();
+    _device = Device::lister().data(s);
+    if ( _device==0 ) return errorExit(i18n("Unknown device \"%1\".").arg(s), ARG_ERROR);
+    return OK;
+  }
+  if ( property=="fill" ) {
+    _fill = value;
+    for (uint i=0; FILL_OPTIONS[i].name; i++)
+      if ( value==FILL_OPTIONS[i].name ) return OK;
+    bool ok;
+    (void)fromAnyLabel(value, &ok);
+    if ( !ok ) return errorExit(i18n("Number format not recognized."), ARG_ERROR);
+    return OK;
+  }
+  return errorExit(i18n("Unknown property \"%1\".").arg(property), ARG_ERROR);
+}
+
+QString CLI::Main::executeGetCommand(const QString &property)
+{
+  if ( property=="device" || property=="processor" ) {
+    if ( _device==0 ) return i18n("<not set>");
+    return _device->name();
+  }
+  if ( property=="fill" ) {
+    if ( _fill.isEmpty() ) return i18n("<not set>");
+    return _fill;
+  }
+  log(Log::LineType::SoftError, i18n("Unknown property \"%1\".").arg(property));
+  return QString::null;
+}
+
+CLI::ExitCode CLI::Main::list(const QString &command)
+{
+  if ( MainBase::list(command)==OK ) return OK;
+  if ( command=="device-list" ) return deviceList();
+  if ( command=="fill-list" ) return fillOptionList();
+  Q_ASSERT(false);
+  return OK;
+}
+
+CLI::ExitCode CLI::Main::deviceList()
+{
+  QValueVector<QString> devices;
+  log(Log::LineType::Normal, i18n("Supported devices:"));
+  devices = Device::lister().supportedDevices();
+  qHeapSort(devices);
+  QString s;
+  for (uint i=0; i<uint(devices.count()); i++) s += " " + devices[i];
+  log(Log::LineType::Normal, s + "\n");
+  return OK;
+}
+
+CLI::ExitCode CLI::Main::fillOptionList()
+{
+  Log::KeyList keys(i18n("Fill options:"));
+  for (uint i=0; FILL_OPTIONS[i].name; i++)
+    keys.append(FILL_OPTIONS[i].name, i18n(FILL_OPTIONS[i].description));
+  keys.append(i18n("<value>"), i18n("Fill with the specified numeric value."));
+  keys.display(*_view);
+  return OK;
+}
+
+//-----------------------------------------------------------------------------
+int main(int argc, char **argv)
+{
+  CLI::Main main;
+  Piklab::AboutData *about = new Piklab::AboutData("piklab-hex", I18N_NOOP("Piklab Hex Utility"), I18N_NOOP("Command-line utility to manipulate hex files."));
+  CLI::OptionList list = main.optionList(I18N_NOOP("Hex filename(s)."));
+  Piklab::init(about, argc, argv, false, list.ptr());
+  return main.doRun();
+}
diff --git a/src/piklab-hex/main.h b/src/piklab-hex/main.h
new file mode 100644
index 0000000..4689bff
--- /dev/null
+++ b/src/piklab-hex/main.h
@@ -0,0 +1,65 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef MAIN_H
+#define MAIN_H
+
+#include "common/global/pfile.h"
+#include "devices/base/hex_buffer.h"
+#include "common/cli/cli_main.h"
+
+namespace Device
+{
+  class Data;
+  class Memory;
+}
+
+namespace CLI
+{
+//----------------------------------------------------------------------------
+enum CommandProperty { NoCommandProperty = 0, NeedSource1 = 1, NeedDestination = 2,
+                       NeedSource2 = 4, NeedCorrectInput = 8, NeedDevice = 16 };
+Q_DECLARE_FLAGS(CommandProperties, CommandProperty)
+Q_DECLARE_OPERATORS_FOR_FLAGS(CommandProperties)
+
+//----------------------------------------------------------------------------
+struct FillOptions {
+  const char *name, *description;
+};
+extern const FillOptions FILL_OPTIONS[];
+
+//----------------------------------------------------------------------------
+class Main : public MainBase
+{
+Q_OBJECT
+public:
+  Main();
+  virtual ~Main();
+
+private:
+  PURL::Url _dest;
+  HexBuffer _source1, _source2;
+  HexBuffer::Format _format;
+  QValueList<HexBuffer::ErrorData> _errors;
+  const Device::Data *_device;
+  Device::Memory *_memory;
+  QString _fill;
+
+  virtual ExitCode prepareCommand(const QString &command);
+  virtual ExitCode executeCommand(const QString &command);
+  virtual ExitCode prepareRun(bool &interactive);
+  virtual ExitCode executeSetCommand(const QString &property, const QString &value);
+  virtual QString executeGetCommand(const QString &property);
+  virtual ExitCode list(const QString &listName);
+  ExitCode deviceList();
+  ExitCode fillOptionList();
+};
+
+} // namespace
+
+#endif
diff --git a/src/piklab-hex/piklab-hex.pro b/src/piklab-hex/piklab-hex.pro
new file mode 100644
index 0000000..29d882e
--- /dev/null
+++ b/src/piklab-hex/piklab-hex.pro
@@ -0,0 +1,14 @@
+STOPDIR = ../..
+include($${STOPDIR}/app.pro)
+
+TARGET   = piklab-hex
+HEADERS += main.h
+SOURCES += main.cpp
+LIBS    += ../devices/list/libdevicelist.a \
+           ../devices/mem24/mem24/libmem24.a ../devices/mem24/xml_data/libmem24xml.a \
+           ../devices/mem24/base/libmem24base.a \
+           ../devices/pic/pic/libpic.a ../devices/pic/xml_data/libpicxml.a \
+           ../devices/pic/base/libpicbase.a \
+           ../devices/base/libdevicebase.a \
+           ../common/cli/libcli.a ../common/global/libglobal.a \
+           ../common/nokde/libnokde.a ../common/common/libcommon.a
diff --git a/src/piklab-prog/Makefile.am b/src/piklab-prog/Makefile.am
new file mode 100644
index 0000000..fd53ef0
--- /dev/null
+++ b/src/piklab-prog/Makefile.am
@@ -0,0 +1,31 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+bin_PROGRAMS = piklab-prog
+OBJ =   $(top_builddir)/src/progs/list/libproglistnoui.la \
+	$(top_builddir)/src/progs/picdem_bootloader/base/libpicdembootloader.la \
+	$(top_builddir)/src/progs/pickit2_bootloader/base/libpickit2bootloader.la \
+	$(top_builddir)/src/progs/tbl_bootloader/base/libtblbootloader.la \
+	$(top_builddir)/src/progs/bootloader/base/libbootloader.la \
+	$(top_builddir)/src/progs/gpsim/base/libgpsim.la $(top_builddir)/src/progs/psp/base/libpsp.la \
+	$(top_builddir)/src/progs/pickit1/base/libpickit1.la \
+	$(top_builddir)/src/progs/pickit2v2/base/libpickit2v2.la $(top_builddir)/src/progs/pickit2/base/libpickit2.la \
+	$(top_builddir)/src/progs/icd1/base/libicd1.la $(top_builddir)/src/progs/icd2/base/libicd2.la \
+	$(top_builddir)/src/progs/icd2/icd2_data/libicd2data.la $(top_builddir)/src/progs/direct/base/libdirectprog.la \
+	$(top_builddir)/src/devices/mem24/prog/libmem24prog.la $(top_builddir)/src/devices/pic/prog/libpicprog.la \
+	$(top_builddir)/src/progs/manager/libprogmanager.la $(top_builddir)/src/progs/base/libprogbase.la \
+	\
+	$(top_builddir)/src/coff/base/libcoff.la $(top_builddir)/src/common/port/libport.la \
+	$(top_builddir)/src/common/cli/libcli.la $(top_builddir)/src/common/global/libglobal.la \
+	\
+	$(top_builddir)/src/devices/list/libdevicelistnoui.la \
+	$(top_builddir)/src/devices/pic/pic/libpic.la $(top_builddir)/src/devices/pic/base/libpicbase.la \
+	$(top_builddir)/src/devices/pic/xml_data/libpicxml.la \
+	$(top_builddir)/src/devices/mem24/mem24/libmem24.la $(top_builddir)/src/devices/mem24/base/libmem24base.la \
+	$(top_builddir)/src/devices/mem24/xml_data/libmem24xml.la \
+	$(top_builddir)/src/devices/base/libdevicebase.la \
+	$(top_builddir)/src/common/common/libcommon.la
+piklab_prog_DEPENDENCIES = $(OBJ)
+piklab_prog_LDADD = $(OBJ) $(LIB_KIO) $(LIBUSB_LIBS) $(LIBREADLINE_LIBS)
+piklab_prog_LDFLAGS = $(all_libraries) $(KDE_RPATH)
+piklab_prog_SOURCES = cmdline.cpp cli_prog_manager.cpp cli_debug_manager.cpp cli_interactive.cpp
diff --git a/src/piklab-prog/cli_debug_manager.cpp b/src/piklab-prog/cli_debug_manager.cpp
new file mode 100644
index 0000000..418bc06
--- /dev/null
+++ b/src/piklab-prog/cli_debug_manager.cpp
@@ -0,0 +1,18 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "cli_debug_manager.h"
+
+#include "progs/base/generic_prog.h"
+#include "progs/base/generic_debug.h"
+
+void Debugger::CliManager::updateView(bool)
+{
+  if ( Programmer::manager->programmer() && debugger() ) log(Log::LineType::Normal, debugger()->statusString());
+  // ### TODO: show current and next PC lines
+}
diff --git a/src/piklab-prog/cli_debug_manager.h b/src/piklab-prog/cli_debug_manager.h
new file mode 100644
index 0000000..8da14fa
--- /dev/null
+++ b/src/piklab-prog/cli_debug_manager.h
@@ -0,0 +1,34 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef CLI_DEBUG_MANAGER_H
+#define CLI_DEBUG_MANAGER_H
+
+#include "progs/manager/debug_manager.h"
+#include "cmdline.h"
+
+namespace Debugger
+{
+class CliManager : public Manager
+{
+Q_OBJECT
+public:
+  CliManager() {}
+  virtual PURL::Url coffUrl() const { return CLI::_coffUrl; }
+
+private:
+  virtual const Programmer::Group *programmerGroup() const { return CLI::_progGroup; }
+  virtual const Device::Data *deviceData() const { return CLI::_device; }
+  virtual Log::View *compileView() { return view(); }
+  virtual void updateView(bool gotoPC);
+  virtual bool isProjectSource(const PURL::Url &) const { return true; }
+};
+
+} // namespace
+
+#endif
diff --git a/src/piklab-prog/cli_interactive.cpp b/src/piklab-prog/cli_interactive.cpp
new file mode 100644
index 0000000..148ba62
--- /dev/null
+++ b/src/piklab-prog/cli_interactive.cpp
@@ -0,0 +1,347 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "cli_interactive.h"
+
+#if defined(HAVE_READLINE)
+#  include <readline/readline.h>
+#  include <readline/history.h>
+#else
+#  include <stdio.h>
+#endif
+#include <signal.h>
+#include <qtimer.h>
+#include <stdlib.h>
+
+#include "progs/base/generic_prog.h"
+#include "cmdline.h"
+#include "cli_prog_manager.h"
+#include "common/cli/cli_log.h"
+#include "devices/base/device_group.h"
+#include "devices/pic/base/pic_register.h"
+#include "devices/pic/prog/pic_prog.h"
+#include "coff/base/text_coff.h"
+#include "devices/pic/prog/pic_debug.h"
+
+//-----------------------------------------------------------------------------
+const CLI::CommandData CLI::INTERACTIVE_COMMAND_DATA[] = {
+  { "property-list",   NoCommandProperty, I18N_NOOP("Display the list of available properties.") },
+  { "register-list",   NoCommandProperty, I18N_NOOP("Display the list of registers.") },
+  { "variable-list",   NoCommandProperty, I18N_NOOP("Display the list of variables.") },
+  { "range-list",      NoCommandProperty, I18N_NOOP("Display the list of memory ranges.") },
+  { "help",            NoCommandProperty, I18N_NOOP("Display help.") },
+  { "quit",            NoCommandProperty, I18N_NOOP("Quit.") },
+  { "set",             NoCommandProperty, I18N_NOOP("Set property value: \"set <property> <value>\" or \"<property> <value>\".") },
+  { "unset",           NoCommandProperty, I18N_NOOP("Unset property value: \"unset <property>\".") },
+  { "get",             NoCommandProperty, I18N_NOOP("Get property value: \"get <property>\" or \"<property>\".") },
+  { "disconnect",      NeedProgrammer, I18N_NOOP("Disconnect programmer.") },
+  { "start",           NeedDevice | NeedProgrammer, I18N_NOOP("Start or restart debugging session.") },
+  { "step",            NeedDevice | NeedProgrammer, I18N_NOOP("Step one instruction.") },
+  { "x",               NeedDevice | NeedProgrammer, I18N_NOOP("Read or set a register or variable: \"x PORTB\" or \"x W 0x1A\".") },
+  { "break",           NeedDevice | NeedProgrammer, I18N_NOOP("Set a breakpoint \"break e 0x04\" or list all breakpoints \"break\".") },
+  { "clear",           NeedDevice | NeedProgrammer, I18N_NOOP("Clear a breakpoint \"clear 0\", \"clear e 0x04\", or clear all breakpoints \"clear all\".") },
+  { "raw-com",         NeedDevice | NeedProgrammer, I18N_NOOP("Write and read raw commands to port from given file.") },
+  { 0, NoCommandProperty, 0 }
+};
+
+const CLI::PropertyData CLI::PROPERTY_DATA[] = {
+  { "programmer",   "programmer <name>",  "p", I18N_NOOP("Programmer to use."), "programmer-list", I18N_NOOP("Return the list of supported programmers.") },
+  { "hardware",     "hardware <name>",    "h", I18N_NOOP("Programmer hardware configuration to use (for direct programmer)."), "hardware-list", I18N_NOOP("Return the list of supported programmer hardware configurations.") },
+  { "device",       "device <name>",      "d", I18N_NOOP("Target device."), "device-list", I18N_NOOP("Return the list of supported devices.") },
+  { "format",       "format <name>",      "f", I18N_NOOP("Hex output file format."), "format-list", I18N_NOOP("Return the list of supported hex file formats.") },
+  { "port",         "port <name>",        "t", I18N_NOOP("Programmer port (\"usb\" or device such as \"/dev/ttyS0\")"), "port-list", I18N_NOOP("Return the list of detected ports.") },
+  { "firmware-dir", "firmware-dir <dir>", 0,   I18N_NOOP("Firmware directory."), 0, 0 },
+  { "target-self-powered", "target-self-powered <true|false>", 0, I18N_NOOP("Set if target device is self-powered."), 0, 0 },
+  { "hex", 0, 0, I18N_NOOP("Hex file to be used for programming."), 0, 0 },
+  { "coff", 0, 0, I18N_NOOP("COFF file to be used for debugging."), 0, 0 },
+  { "processor",    0, 0, I18N_NOOP("Same as \"device\"."), 0, 0 },
+  { 0, 0, 0, 0, 0, 0 }
+};
+
+//-----------------------------------------------------------------------------
+void CLI::Interactive::signalHandler(int n)
+{
+  if ( n!=SIGINT ) return;
+  fprintf(stdout, "<CTRL C> Break\n");
+  fflush(stdout);
+  Programmer::Base *prog = Programmer::manager->programmer();
+  if ( prog && prog->state()==Programmer::Running ) Programmer::manager->halt();
+  _interactive->redisplayPrompt();
+}
+
+CLI::Interactive::Interactive(QObject *parent)
+  : QObject(parent, "interactive")
+{
+  setView(_view);
+  ::signal(SIGINT, signalHandler);
+#if defined(HAVE_READLINE)
+  using_history();
+#else
+  _stdin.open(IO_ReadOnly, stdin);
+#endif
+  QTimer::singleShot(0, this, SLOT(displayPrompt()));
+}
+
+void CLI::Interactive::redisplayPrompt()
+{
+#if defined(HAVE_READLINE)
+  rl_forced_update_display();
+#else
+  fprintf(stdout, "> ");
+  fflush(stdout);
+#endif
+}
+
+void CLI::Interactive::displayPrompt()
+{
+#if defined(HAVE_READLINE)
+  char *line = readline("> ");
+  _input = QString(line);
+  if ( !_input.isEmpty() ) add_history(line);
+  free(line);
+#else
+  fprintf(stdout, "> ");
+  fflush(stdout);
+  char buffer[1000];
+  _stdin.readLine(buffer, 1000);
+  _input = QString(buffer);
+#endif
+  lineRead();
+}
+
+CLI::ExitCode CLI::Interactive::processLine(const QString &s)
+{
+  QStringList words = QStringList::split(" ", s);
+  if ( words.count()==0 ) return ARG_ERROR;
+  if ( words[0]=="command-list" || words[0]=="property-list" || words[0]=="range-list"
+       || isPropertyList(words[0]) ) return static_cast<Main *>(_main)->list(words[0]);
+  if ( words[0]=="register-list" ) return registerList();
+  if ( words[0]=="variable-list" ) return variableList();
+  if ( isProperty(words[0]) ) {
+    if ( words.count()==1 ) words.prepend("get");
+    else if ( words.count()==2 ) words.prepend("set");
+    else return errorExit(i18n("This command takes no or one argument"), ARG_ERROR);
+  }
+  if ( findCommand(words[0])!=OK ) return ARG_ERROR;
+  const CommandData *data = findCommandData(words[0]);
+  if ( words[0]=="quit" ) return EXITING;
+  if ( words[0]=="set" ) {
+    if ( words.count()==2 ) return static_cast<Main *>(_main)->executeSetCommand(words[1], QString::null);
+    if ( words.count()!=3 ) return errorExit(i18n("This command takes two arguments."), ARG_ERROR);
+    return static_cast<Main *>(_main)->executeSetCommand(words[1], words[2]);
+  }
+  if ( words[0]=="unset" ) {
+    if ( words.count()!=2 ) return errorExit(i18n("This command takes one argument."), ARG_ERROR);
+    return static_cast<Main *>(_main)->executeSetCommand(words[1], QString::null);
+  }
+  if ( words[0]=="get" ) {
+    if ( words.count()!=2 ) return errorExit(i18n("This command takes one argument."), ARG_ERROR);
+    QString s = static_cast<Main *>(_main)->executeGetCommand(words[1]);
+    if ( !s.isEmpty() ) log(Log::LineType::Normal, words[1] + ": " + s);
+    return OK;
+  }
+  if ( words[0]=="help" ) return static_cast<Main *>(_main)->list("command-list");
+  if ( words[0]=="x" ) {
+    if ( words.count()!=2 && words.count()!=3 ) return errorExit(i18n("This command takes one or two argument."), ARG_ERROR);
+    return executeRegister(words[1], words.count()==3 ? words[2] : QString::null);
+  }
+  if ( words[0]=="break" ) {
+    if ( words.count()==3 ) {
+      if ( words[1]=="e" ) {
+        bool ok;
+        ulong address = fromAnyLabel(words[2], &ok);
+        if ( !ok ) return errorExit(i18n("Number format not recognized."), ARG_ERROR);
+        PURL::Url dummy;
+        Breakpoint::Data data(dummy, address);
+        if ( Breakpoint::list().contains(data) ) return okExit(i18n("Breakpoint already set at %1.").arg(toHexLabel(address, nbChars(NumberBase::Hex, address))));
+        Breakpoint::list().append(data);
+        Breakpoint::list().setAddress(data, address);
+        Breakpoint::list().setState(data, Breakpoint::Active);
+        return okExit(i18n("Breakpoint set at %1.").arg(toHexLabel(address, nbChars(NumberBase::Hex, address))));
+      }
+      return errorExit(i18n("The first argument should be \"e\"."), ARG_ERROR);
+    }
+    if ( words.count()==1 ) {
+      uint nb = Breakpoint::list().count();
+      if ( nb==0 ) return okExit(i18n("No breakpoint set."));
+      log(Log::LineType::Normal, i18n("Breakpoints:"));
+      uint nbc = 0;
+      if (_device) nbc = _device->nbCharsAddress();
+      else for (uint i=0; i<nb; i++) {
+        Address address = Breakpoint::list().address(Breakpoint::list().data(i));
+        nbc = QMAX(nbc, nbChars(NumberBase::Hex, address.toUInt()));
+      }
+      for (uint i=0; i<nb; i++) {
+        Address address = Breakpoint::list().address(Breakpoint::list().data(i));
+        log(Log::LineType::Normal, QString("  #%1: %2").arg(i).arg(toHexLabel(address, nbc)));
+      }
+      return OK;
+    }
+    if ( words.count()!=1 && words.count()!=3 ) return errorExit(i18n("This command takes no or two argument."), ARG_ERROR);
+    return errorExit(i18n("Arguments not recognized."), ARG_ERROR);
+  }
+  if ( words[0]=="clear" ) {
+    if ( words.count()!=2 ) return errorExit(i18n("This command takes one argument."), ARG_ERROR);
+    if ( words[1]=="all" ) {
+      Breakpoint::list().clear();
+      return okExit(i18n("All breakpoints removed."));
+    }
+    bool ok;
+    uint i = words[1].toUInt(&ok);
+    if ( !ok ) return errorExit(i18n("Argument should be breakpoint index."), ARG_ERROR);
+    if ( i>=Breakpoint::list().count() ) return errorExit(i18n("Breakpoint index too large."), ARG_ERROR);
+    Breakpoint::Data data = Breakpoint::list().data(i);
+    Address address = Breakpoint::list().address(data);
+    Breakpoint::list().remove(data);
+    return okExit(i18n("Breakpoint at %1 removed.").arg(toHexLabelAbs(address)));
+  }
+  if ( words[0]=="raw-com" ) {
+    if ( words.count()!=2 ) return errorExit(i18n("This command needs a commands filename."), ARG_ERROR);
+  } else if ( words[0]=="program" || words[0]=="read" || words[0]=="verify" || words[0]=="erase" || words[0]=="blank_check" ) {
+    uint hexi = 1;
+    if ( words.count()>=2 && words[1]=="-r" ) {
+      hexi = 3;
+      if ( words.count()==2 ) return errorExit(i18n("You need to specify the range."), ARG_ERROR);
+      ExitCode code = static_cast<Main *>(_main)->extractRange(words[2]);
+      if ( code!=OK ) return code;
+    }
+    if ( data->properties & (InputHex|OutputHex) ) {
+      if ( uint(words.count())>(hexi+1) ) return errorExit(i18n("Too many arguments."), ARG_ERROR);
+      if ( uint(words.count())==(hexi+1) )_hexUrl = PURL::Url(runDirectory(), words[hexi]);
+      if ( _hexUrl.isEmpty() ) return errorExit(i18n("This command needs an hex filename."), ARG_ERROR);
+    } else if ( uint(words.count())>hexi ) return errorExit(i18n("Too many arguments."), ARG_ERROR);
+  } else if ( words.count()!=1 ) return errorExit(i18n("This command takes no argument."), ARG_ERROR);
+
+  ExitCode code = static_cast<Main *>(_main)->prepareCommand(words[0]);
+  if ( code!=OK ) return code;
+  if ( words[0]=="raw-com" ) return executeRawCommands(words[1]);
+  return static_cast<Main *>(_main)->executeCommand(words[0]);
+}
+
+void CLI::Interactive::lineRead()
+{
+  QString s = _input.stripWhiteSpace();
+  _input = QString::null;
+  if ( processLine(s)==EXITING ) {
+#if QT_VERSION<0x040000
+    qApp->exit(OK);
+#else
+    QCoreApplication::exit(OK);
+#endif
+    return;
+  }
+  QTimer::singleShot(0, this, SLOT(displayPrompt()));
+}
+
+CLI::ExitCode CLI::Interactive::registerList()
+{
+  if ( _device==0 ) return errorExit(i18n("No device specified."), NOT_SUPPORTED_ERROR);
+  if ( _device->group().name()!="pic" ) return errorExit(i18n("No register."), NOT_SUPPORTED_ERROR);
+  const Pic::Data &data = static_cast<const Pic::Data &>(*_device);
+  const Coff::Object *coff = Debugger::manager->coff();
+  const Pic::RegistersData &rdata = data.registersData();
+  log(Log::LineType::Normal, i18n("Special Function Registers:"));
+  QValueVector<Pic::RegisterNameData> list = Pic::sfrList(data);
+  for (uint i=0; i<uint(list.count()); i++) log(Log::LineType::Normal, QString("  %1: %2").arg(toHexLabel(list[i].data().address(), rdata.nbCharsAddress())).arg(list[i].label()));
+  log(Log::LineType::Normal, i18n("General Purpose Registers:"));
+  list = Pic::gprList(data, coff);
+  for (uint i=0; i<uint(list.count()); i++) log(Log::LineType::Normal, QString("  %1: %2").arg(toHexLabel(list[i].data().address(), rdata.nbCharsAddress())).arg(list[i].label()));
+  return OK;
+}
+
+CLI::ExitCode CLI::Interactive::variableList()
+{
+  if ( _device==0 ) return errorExit(i18n("No device specified."), NOT_SUPPORTED_ERROR);
+  const Coff::Object *coff = Debugger::manager->coff();
+  if ( coff==0 ) return errorExit(i18n("No COFF file specified."), NOT_SUPPORTED_ERROR);
+  if ( _device->group().name()!="pic" ) return errorExit(i18n("No register."), NOT_SUPPORTED_ERROR);
+  const Pic::Data &data = static_cast<const Pic::Data &>(*_device);
+  const Pic::RegistersData &rdata = data.registersData();
+  QValueVector<Pic::RegisterNameData> list = Pic::variableList(data, *coff);
+  if ( list.count()==0 ) log(Log::LineType::Normal, i18n("No variable."));
+  for (uint i=0; i<uint(list.count()); i++) log(Log::LineType::Normal, QString("  %1: %2").arg(toHexLabel(list[i].data().address(), rdata.nbCharsAddress())).arg(list[i].label()));
+  return OK;
+}
+
+Address CLI::Interactive::findRegisterAddress(const QString &name)
+{
+  const Pic::Data &data = static_cast<const Pic::Data &>(*_device);
+  const Coff::Object *coff = Debugger::manager->coff();
+  const Pic::RegistersData &rdata = data.registersData();
+  bool ok;
+  Address address = fromAnyLabel(name, &ok);
+  if (ok) {
+    if ( address>rdata.addressFromIndex(rdata.nbRegisters()-1) ) return Address();
+    return address;
+  }
+  QValueVector<Pic::RegisterNameData> sfrs = Pic::sfrList(data);
+  for (uint i=0; i<uint(sfrs.count()); i++) if ( name.lower()==sfrs[i].label().lower() ) return sfrs[i].data().address();
+  if ( coff==0 ) return Address();
+  QMap<QString, Address> variables = coff->variables();
+  if ( variables.contains(name) ) return variables[name];
+  return Address();
+}
+
+CLI::ExitCode CLI::Interactive::executeRegister(const QString &name, const QString &value)
+{
+  if ( Debugger::manager->debugger()==0 ) return errorExit(i18n("You need to start the debugging session first (with \"start\")."), ARG_ERROR);
+  const Pic::Data &data = static_cast<const Pic::Data &>(*_device);
+  const Pic::RegistersData &rdata = data.registersData();
+  uint nbChars = rdata.nbChars();
+  bool ok;
+  ulong v = fromAnyLabel(value, &ok);
+  if ( !ok ) return errorExit(i18n("Number format not recognized."), ARG_ERROR);
+  if ( v>maxValue(NumberBase::Hex, nbChars) ) return errorExit(i18n("The given value is too large (max: %1).").arg(toHexLabel(maxValue(NumberBase::Hex, nbChars), nbChars)), ARG_ERROR);
+  Register::TypeData rtd;
+  if ( name.lower()=="w" || name.lower()=="wreg" )
+    rtd = static_cast<Debugger::PicBase *>(Debugger::manager->debugger())->deviceSpecific()->wregTypeData();
+  else if ( name.lower()=="pc" )
+    rtd = Debugger::manager->debugger()->pcTypeData();
+  else {
+    Address address = findRegisterAddress(name);
+    if ( !address.isValid() ) return errorExit(i18n("Unknown register or variable name."), ARG_ERROR);
+    rtd = Register::TypeData(address, rdata.nbChars());
+  }
+  if ( value.isEmpty() ) {
+    if ( !Debugger::manager->readRegister(rtd) ) return ARG_ERROR;
+    return okExit(i18n("%1 = %2").arg(name.upper()).arg(toHexLabel(Register::list().value(rtd), nbChars)));
+  }
+  return (Debugger::manager->writeRegister(rtd, v) ? OK : EXEC_ERROR);
+}
+
+CLI::ExitCode CLI::Interactive::executeRawCommands(const QString &filename)
+{
+  QFile file(filename);
+  if ( !file.open(IO_ReadOnly) ) return errorExit(i18n("Could not open filename \"%1\".").arg(filename), ARG_ERROR);
+  if ( Programmer::manager->programmer()==0 ) {
+    Programmer::manager->createProgrammer(_device);
+    if ( !Programmer::manager->programmer()->simpleConnectHardware() ) return EXEC_ERROR;
+  }
+  Programmer::Base *programmer = Programmer::manager->programmer();
+  for (;;) {
+    QString s;
+#if QT_VERSION<0x040000
+    if ( file.readLine(s, 1000)==-1 ) break;
+#else
+    char buffer[1000];
+    if ( file.readLine(buffer, 1000)==-1 ) break;
+    s += buffer;
+#endif
+    bool write = !s.startsWith(" ");
+    s = s.stripWhiteSpace();
+    if ( s.isEmpty() ) continue;
+    if (write) {
+      if ( !programmer->hardware()->rawWrite(s) ) return EXEC_ERROR;
+    } else {
+      QString rs;
+      if ( !programmer->hardware()->rawRead(s.length(), rs) ) return EXEC_ERROR;
+      if ( rs!=s ) log(Log::LineType::Warning, i18n("Read string is different than expected: %1 (%2).").arg(rs).arg(s));
+    }
+  }
+  return okExit(i18n("End of command file reached."));
+}
diff --git a/src/piklab-prog/cli_interactive.h b/src/piklab-prog/cli_interactive.h
new file mode 100644
index 0000000..fad6e9d
--- /dev/null
+++ b/src/piklab-prog/cli_interactive.h
@@ -0,0 +1,53 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef CLI_INTERACTIVE_H
+#define CLI_INTERACTIVE_H
+
+#include <qfile.h>
+#include "common/global/global.h"
+#include "common/cli/cli_global.h"
+#include "common/global/log.h"
+#include "common/common/bitvalue.h"
+
+namespace CLI
+{
+//----------------------------------------------------------------------------
+enum CommandProperty { NoCommandProperty = 0, NeedProgrammer = 1, InputHex = 2,
+                       OutputHex = 4, NeedDevice = 8 };
+Q_DECLARE_FLAGS(CommandProperties, CommandProperty)
+Q_DECLARE_OPERATORS_FOR_FLAGS(CommandProperties)
+
+//----------------------------------------------------------------------------
+class Interactive : public QObject, public Log::Base
+{
+Q_OBJECT
+public:
+  Interactive(QObject *parent);
+  void redisplayPrompt();
+
+private slots:
+  void displayPrompt();
+
+private:
+  QFile   _stdin;
+  QString _input;
+  void lineRead();
+  ExitCode processLine(const QString &s);
+  ExitCode executeRegister(const QString &name, const QString &value);
+  ExitCode registerList();
+  ExitCode variableList();
+  ExitCode executeRawCommands(const QString &filename);
+  Address findRegisterAddress(const QString &name);
+  ExitCode start();
+  static void signalHandler(int n);
+};
+
+} // namespace
+
+#endif
diff --git a/src/piklab-prog/cli_prog_manager.cpp b/src/piklab-prog/cli_prog_manager.cpp
new file mode 100644
index 0000000..472757a
--- /dev/null
+++ b/src/piklab-prog/cli_prog_manager.cpp
@@ -0,0 +1,65 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "cli_prog_manager.h"
+
+#include "progs/base/generic_prog.h"
+#include "progs/base/prog_group.h"
+#include "progs/base/prog_config.h"
+#include "progs/base/hardware_config.h"
+#include "progs/base/generic_debug.h"
+
+//----------------------------------------------------------------------------
+Port::Description Programmer::CliManager::portDescription() const
+{
+  Log::Base *log = const_cast<Log::Base *>(static_cast<const Log::Base *>(this));
+  if ( CLI::_port.isEmpty() ) {
+    log->log(Log::LineType::Information, i18n("Using port from configuration file."));
+    return Programmer::GroupConfig::portDescription(group());
+  }
+  if ( CLI::_port=="usb" ) return Port::Description(PortType::USB, QString::null);
+  PortType type = Port::findType(CLI::_port);
+  if ( type==PortType::Nb_Types ) {
+    log->log(Log::LineType::Warning, i18n("Could not find device \"%1\" as serial or parallel port. Will try to open as serial port.").arg(CLI::_port));
+    type = PortType::Serial;
+  }
+  return Port::Description(type, CLI::_port);
+}
+
+bool Programmer::CliManager::isTargetSelfPowered() const
+{
+  bool targetSelfPowered = ::Programmer::Manager::isTargetSelfPowered();
+  if ( !CLI::_targetSelfPowered.isEmpty() ) targetSelfPowered = ( CLI::_targetSelfPowered=="true" );
+  return targetSelfPowered;
+}
+
+void Programmer::CliManager::createProgrammer(const Device::Data *data)
+{
+  HardwareDescription hd;
+  hd.port = portDescription();
+  ::Hardware::Config *config = CLI::_progGroup->hardwareConfig();
+  if (config) {
+    if ( CLI::_hardware.isEmpty() ) hd.name = config->currentHardware(hd.port.type);
+    else hd.name = CLI::_hardware;
+  }
+  delete config;
+  Manager::createProgrammer(data, hd);
+  if ( !CLI::_firmwareDir.isEmpty() ) _programmer->setFirmwareDirectory(CLI::_firmwareDir.path());
+}
+
+bool Programmer::CliManager::internalInitProgramming(bool debugging)
+{
+  if ( !Manager::internalInitProgramming(debugging) ) return false;
+  if ( _programmer->isActive() ) {
+    if ( !halt() ) return false;
+  } else if (debugging) {
+    if ( ::Debugger::manager->coff()==0 && !::Debugger::manager->init() ) log(Log::LineType::Warning, i18n("Starting debug session without COFF file (no source file information)."));
+    if ( !group().isSoftware() ) log(Log::LineType::Warning, i18n("Starting debugging session with device memory in an unknown state. You may want to reprogram the device."));
+  }
+  return true;
+}
diff --git a/src/piklab-prog/cli_prog_manager.h b/src/piklab-prog/cli_prog_manager.h
new file mode 100644
index 0000000..27775a4
--- /dev/null
+++ b/src/piklab-prog/cli_prog_manager.h
@@ -0,0 +1,38 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef CLI_PROG_MANAGER_H
+#define CLI_PROG_MANAGER_H
+
+#include "progs/manager/prog_manager.h"
+#include "cli_debug_manager.h"
+#include "cmdline.h"
+
+namespace Programmer
+{
+class CliManager : public Manager
+{
+Q_OBJECT
+public:
+  CliManager(QObject *parent) : Manager(parent), _state(Idle) {}
+  Port::Description portDescription() const;
+  virtual void createProgrammer(const Device::Data *data);
+
+private:
+  State _state;
+
+  virtual const Group &group() const { return *CLI::_progGroup; }
+  virtual void setState(State state) { _state = state; }
+  virtual const Device::Data *device() const { return CLI::_device; }
+  virtual bool internalInitProgramming(bool debugging);
+  virtual bool isTargetSelfPowered() const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/piklab-prog/cli_purl.cpp b/src/piklab-prog/cli_purl.cpp
new file mode 100644
index 0000000..2cd38a5
--- /dev/null
+++ b/src/piklab-prog/cli_purl.cpp
@@ -0,0 +1,29 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "common/global/purl.h"
+
+#include <qfileinfo.h>
+#include <qdatetime.h>
+
+bool PURL::Base::probablyExists() const
+{
+  QFileInfo fi(_url.path());
+  return fi.exists();
+}
+
+bool PURL::Url::isDestinationUpToDate(FileType type) const
+{
+  if ( !(data().properties & Source) ) return true;
+  Url dest = toFileType(type);
+  QFileInfo sfi(_url.path());
+  if ( !sfi.exists() ) return true; // source does not exists
+  QFileInfo dfi(dest._url.path());
+  if ( !dfi.exists() ) return false; // destination does not exists
+  return sfi.lastModified()<dfi.lastModified();
+}
diff --git a/src/piklab-prog/cmdline.cpp b/src/piklab-prog/cmdline.cpp
new file mode 100644
index 0000000..2ec4530
--- /dev/null
+++ b/src/piklab-prog/cmdline.cpp
@@ -0,0 +1,457 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "cmdline.h"
+
+#if defined(HAVE_READLINE)
+#  include <readline/readline.h>
+#  include <readline/history.h>
+#else
+#  include <stdio.h>
+#endif
+#include <signal.h>
+#include <qtimer.h>
+
+#include "devices/list/device_list.h"
+#include "devices/base/device_group.h"
+#include "common/global/about.h"
+#include "progs/base/prog_config.h"
+#include "progs/base/hardware_config.h"
+#include "devices/pic/pic/pic_memory.h"
+#include "devices/pic/prog/pic_prog.h"
+#include "progs/list/prog_list.h"
+#include "common/cli/cli_log.h"
+#include "cli_prog_manager.h"
+#include "cli_debug_manager.h"
+
+//-----------------------------------------------------------------------------
+const CLI::CommandData CLI::NORMAL_COMMAND_DATA[] = {
+  { "connect",         NeedProgrammer | NeedDevice,
+    I18N_NOOP("Connect programmer.") },
+  { "run",             NeedProgrammer | NeedDevice,
+    I18N_NOOP("Run device (release reset).") },
+  { "stop",            NeedProgrammer | NeedDevice,
+    I18N_NOOP("Stop device (hold reset).") },
+  { "program",         NeedProgrammer | InputHex | NeedDevice,
+    I18N_NOOP("Program device memory: \"program <hexfilename>\".") },
+  { "verify",          NeedProgrammer | InputHex | NeedDevice,
+    I18N_NOOP("Verify device memory: \"verify <hexfilename>\".") },
+  { "read",            NeedProgrammer | OutputHex | NeedDevice,
+    I18N_NOOP("Read device memory: \"read <hexfilename>\".") },
+  { "erase",           NeedProgrammer | NeedDevice,
+    I18N_NOOP("Erase device memory.") },
+  { "blank_check",     NeedProgrammer | NeedDevice,
+    I18N_NOOP("Blank check device memory.") },
+  { "upload_firmware", NeedProgrammer | InputHex,
+    I18N_NOOP("Upload firmware to programmer: \"upload_firmware <hexfilename>\".") },
+  { 0, NoCommandProperty, 0 }
+};
+
+const KCmdLineOptions CLI::OPTIONS[] = {
+  { "r",              0, 0 },
+  { "range <name>",   I18N_NOOP("Memory range to operate on."), 0 },
+  { "range-list",     I18N_NOOP("Return the list of memory ranges."), 0 },
+  KCmdLineLastOption
+};
+
+//-----------------------------------------------------------------------------
+const Programmer::Group *CLI::_progGroup = 0;
+const Device::Data *CLI::_device = 0;
+HexBuffer::Format CLI::_format = HexBuffer::IHX32;
+QString CLI::_port, CLI::_targetSelfPowered, CLI::_hardware;
+PURL::Directory CLI::_firmwareDir;
+PURL::Url CLI::_hexUrl, CLI::_coffUrl;
+Device::Memory *CLI::_memory = 0;
+CLI::Interactive *CLI::_interactive = 0;
+
+//-----------------------------------------------------------------------------
+CLI::ExitCode CLI::Main::formatList()
+{
+  log(Log::LineType::Normal, i18n("Supported hex file formats:"));
+  for (uint i=0; i<HexBuffer::Nb_Formats; i++)
+    log(Log::LineType::Normal, QString(" ") + HexBuffer::FORMATS[i]);
+  return OK;
+}
+
+CLI::ExitCode CLI::Main::programmerList()
+{
+  log(Log::LineType::Normal, i18n("Supported programmers:"));
+  Programmer::Lister::ConstIterator it;
+  for (it=Programmer::lister().begin(); it!=Programmer::lister().end(); it++)
+    log(Log::LineType::Normal, " " + QString(it.data()->name()));
+  return OK;
+}
+
+CLI::ExitCode CLI::Main::hardwareList()
+{
+  log(Log::LineType::Normal, i18n("Supported hardware configuration for programmers:"));
+  Programmer::Lister::ConstIterator it;
+  for (it=Programmer::lister().begin(); it!=Programmer::lister().end(); it++) {
+    ::Hardware::Config *config = it.data()->hardwareConfig();
+    if ( config==0 ) continue;
+    FOR_EACH(PortType, type) {
+      if ( !it.data()->isPortSupported(type) ) continue;
+      log(Log::LineType::Normal, "-" + QString(it.data()->name()) + " [" + type.label() + "]:");
+      QStringList list = config->hardwareNames(type);
+      for (uint k=0; k<uint(list.count()); k++) log(Log::LineType::Normal, "  " + list[k]);
+    }
+    delete config;
+  }
+  return OK;
+}
+
+CLI::ExitCode CLI::Main::deviceList()
+{
+  QValueVector<QString> devices;
+  if ( _progGroup==0 ) {
+    log(Log::LineType::Normal, i18n("Supported devices:"));
+    devices = Programmer::lister().supportedDevices();
+  } else {
+    log(Log::LineType::Normal, i18n("Supported devices for \"%1\":").arg(_progGroup->label()));
+    devices = _progGroup->supportedDevices();
+  }
+  qHeapSort(devices);
+  QString s;
+  for (uint i=0; i<uint(devices.count()); i++) s += " " + devices[i];
+  log(Log::LineType::Normal, s + "\n");
+  return OK;
+}
+
+CLI::ExitCode CLI::Main::portList()
+{
+  if (_progGroup) log(Log::LineType::Normal, i18n("Detected ports supported by \"%1\":").arg(_progGroup->label()));
+  else log(Log::LineType::Normal, i18n("Detected ports:"));
+  FOR_EACH(PortType, type) {
+    if ( _progGroup && !_progGroup->isPortSupported(type) ) continue;
+    QString s = "- " + type.label() + ":";
+    if ( !Port::isAvailable(type) ) {
+      log(Log::LineType::Normal, s + i18n(" support disabled."));
+      continue;
+    }
+    QStringList list = Port::probedDeviceList(type);
+    if ( list.count()==0 ) log(Log::LineType::Normal, s + i18n(" no port detected."));
+    else {
+      log(Log::LineType::Normal, s);
+      for (uint k=0; k<uint(list.count()); k++) log(Log::LineType::Normal, "   " + list[k]);
+    }
+  }
+  return OK;
+}
+
+CLI::ExitCode CLI::Main::rangeList()
+{
+  log(Log::LineType::Normal, i18n("Memory ranges for PIC/dsPIC devices:"));
+  FOR_EACH(Pic::MemoryRangeType, type) log(Log::LineType::Normal, QString(" %1").arg(type.key()));
+  return OK;
+}
+
+CLI::ExitCode CLI::Main::prepareCommand(const QString &command)
+{
+  const CommandData *data = findCommandData(command);
+  CommandProperties properties = static_cast<CommandProperties>(data->properties);
+  if ( _device==0 && (properties & NeedDevice) ) return errorExit(i18n("Device not specified."), ARG_ERROR);
+  if ( _progGroup==0 && (properties & NeedProgrammer) ) return errorExit(i18n("Programmer not specified."), ARG_ERROR);
+
+  if ( (properties & InputHex) || (properties & OutputHex) ) {
+    if ( _hexUrl.isEmpty() ) return errorExit(i18n("Hex filename not specified."), ARG_ERROR);
+    //if ( !_filename.isLocalFile() ) return errorExit(i18n("Only local files are supported."), ARG_ERROR);
+    PURL::File file(_hexUrl, *_view);
+    delete _memory;
+    _memory = 0;
+    if ( properties & NeedDevice ) _memory = _device->group().createMemory(*_device);
+    if ( properties & InputHex ) {
+      if (_memory) {
+        if ( !file.openForRead() ) return FILE_ERROR;
+        QStringList errors, warnings;
+        Device::Memory::WarningTypes warningTypes;
+        if ( !_memory->load(file.stream(), errors, warningTypes, warnings) )
+          return errorExit(i18n("Could not load hex file \"%1\".").arg(errors[0]), FILE_ERROR);
+        if ( warningTypes!=Device::Memory::NoWarning )
+          log(Log::LineType::Warning, i18n("Hex file seems incompatible with device \"%1\".").arg(warnings.join(" ")));
+      }
+    } else if ( properties & OutputHex ) {
+      if ( !_force && _hexUrl.exists() ) return errorExit(i18n("Output hex filename already exists."), FILE_ERROR);
+    }
+  }
+
+  return OK;
+}
+
+CLI::Main::Main()
+  : MainBase(HasForce | HasInteractiveMode)
+{
+  _range = new Device::MemoryRange;
+  Programmer::manager = new Programmer::CliManager(this);
+  Programmer::manager->setView(_view);
+  Debugger::manager = new Debugger::CliManager;
+}
+
+CLI::Main::~Main()
+{
+  delete _range;
+}
+
+CLI::ExitCode CLI::Main::list(const QString &command)
+{
+  if ( MainBase::list(command)==OK ) return OK;
+  if ( command=="format-list" ) return formatList();
+  if ( command=="programmer-list" ) return programmerList();
+  if ( command=="hardware-list" ) return hardwareList();
+  if ( command=="port-list" ) return portList();
+  if ( command=="device-list" ) return deviceList();
+  if ( command=="range-list" ) return rangeList();
+  Q_ASSERT(false);
+  return OK;
+}
+
+CLI::ExitCode CLI::Main::prepareRun(bool &interactive)
+{
+  // argument
+  if ( _args->count()>1 ) return errorExit(i18n("Too many arguments."), ARG_ERROR);
+  if ( _args->count()==1 ) {
+    PURL::Url url(_args->url(0));
+    ExitCode code = OK;
+    if ( url.fileType()==PURL::Hex ) code = executeSetCommand("hex", url.filepath());
+    else if ( url.fileType()==PURL::Coff ) code = executeSetCommand("coff", url.filepath());
+    else return errorExit(i18n("Argument file type not recognized."), ARG_ERROR);
+    if ( code!=OK ) return code;
+  }
+
+  interactive = _args->isSet("cli");
+  if (interactive) {
+    _interactive = new Interactive(this);
+    log(Log::LineType::Normal, i18n("Interactive mode: type help for help"));
+    log(Log::LineType::Normal, QString::null);
+#if QT_VERSION<0x040000
+    return ExitCode(qApp->exec());
+#else
+    return ExitCode(QCoreApplication::exec());
+#endif
+  }
+
+  // range
+  if ( _args->isSet("range-list") ) return list("range-list");
+  ExitCode code = extractRange(_args->getOption("range"));
+  if ( code!=OK ) return code;
+
+  return OK;
+}
+
+CLI::ExitCode CLI::Main::extractRange(const QString &range)
+{
+  delete _range;
+  _range = 0;
+  if ( !range.isEmpty() ) {
+    if ( _device==0 ) return errorExit(i18n("Cannot specify range without specifying device."), ARG_ERROR);
+    if ( _device->group().name()=="pic" ) {
+      FOR_EACH(Pic::MemoryRangeType, type) {
+        if ( range!=type.key() ) continue;
+        if ( !static_cast<const Pic::Data *>(_device)->isReadable(type) ) return errorExit(i18n("Memory range not present on this device."), ARG_ERROR);
+        _range = new Pic::MemoryRange(type);
+        break;
+      }
+      if ( _range==0 ) return errorExit(i18n("Memory range not recognized."), ARG_ERROR);
+    } else return errorExit(i18n("Memory ranges are not supported for the specified device."), ARG_ERROR);
+  } else _range = new Device::MemoryRange;
+  return OK;
+}
+
+CLI::ExitCode CLI::Main::executeCommand(const QString &command)
+{
+  Programmer::Base *programmer = Programmer::manager->programmer();
+  if ( command=="connect" ) return (Programmer::manager->connectDevice() ? OK : EXEC_ERROR);
+  if ( command=="disconnect" ) {
+    if ( programmer==0 || programmer->state()==Programmer::NotConnected )
+      return okExit(i18n("Programmer is already disconnected."));
+    return (Programmer::manager->disconnectDevice() ? OK : EXEC_ERROR);
+  }
+  if ( command=="run" ) {
+    if ( programmer && programmer->state()==Programmer::Running ) return okExit(i18n("Programmer is already running."));
+    return (Programmer::manager->run() ? OK : EXEC_ERROR);
+  }
+  if ( command=="stop" ) {
+    if ( programmer && programmer->state()!=Programmer::Running ) return okExit(i18n("Programmer is already stopped."));
+    return (Programmer::manager->halt() ? OK : EXEC_ERROR);
+  }
+  if ( command=="step" ) {
+    if ( !_progGroup->isDebugger() ) return errorExit(i18n("Debugging is not supported for specified programmer."), NOT_SUPPORTED_ERROR);
+    if ( programmer && programmer->state()==Programmer::Running ) return (Programmer::manager->halt() ? OK : EXEC_ERROR);
+    return (Programmer::manager->step() ? OK : EXEC_ERROR);
+  }
+  if ( command=="start" ) {
+    if ( !_progGroup->isDebugger() ) return errorExit(i18n("Debugging is not supported for specified programmer."), NOT_SUPPORTED_ERROR);
+    return (Programmer::manager->restart() ? OK : EXEC_ERROR);
+  }
+  if ( command=="program" ) {
+    if ( _progGroup->isSoftware() ) return errorExit(i18n("Reading device memory not supported for specified programmer."), NOT_SUPPORTED_ERROR);
+    return (Programmer::manager->program(*_memory, *_range) ? OK : EXEC_ERROR);
+  }
+  if ( command=="verify" ) {
+    if ( _progGroup->isSoftware() )
+      return errorExit(i18n("Reading device memory not supported for specified programmer."), NOT_SUPPORTED_ERROR);
+    return (Programmer::manager->verify(*_memory, *_range) ? OK : EXEC_ERROR);
+  }
+  if ( command=="read" ) {
+    if ( _progGroup->isSoftware() )
+      return errorExit(i18n("Reading device memory not supported for specified programmer."), NOT_SUPPORTED_ERROR);
+    if ( !Programmer::manager->read(*_memory, *_range) ) return EXEC_ERROR;
+    PURL::File file(_hexUrl, *_view);
+    if ( !file.openForWrite() ) return FILE_ERROR;
+    if ( !_memory->save(file.stream(), _format) )
+      return errorExit(i18n("Error while writing file \"%1\".").arg(_hexUrl.pretty()), FILE_ERROR);
+    return OK;
+  }
+  if ( command=="erase" ) {
+    if ( _progGroup->isSoftware() )
+      return errorExit(i18n("Erasing device memory not supported for specified programmer."), NOT_SUPPORTED_ERROR);
+    return (Programmer::manager->erase(*_range) ? OK : EXEC_ERROR);
+  }
+  if ( command=="blank_check" ) {
+    if ( _progGroup->isSoftware() )
+      return errorExit(i18n("Blank-checking device memory not supported for specified programmer."), NOT_SUPPORTED_ERROR);
+    return (Programmer::manager->blankCheck(*_range) ? OK : EXEC_ERROR);
+  }
+  if ( command=="upload_firmware" ) {
+    if ( !(_progGroup->properties() & ::Programmer::CanUploadFirmware) )
+      return errorExit(i18n("Uploading firmware is not supported for the specified programmer."), NOT_SUPPORTED_ERROR);
+    if ( Programmer::manager->programmer()==0 ) Programmer::manager->createProgrammer(0); // no device specified
+    return (Programmer::manager->programmer()->uploadFirmware(_hexUrl) ? OK : EXEC_ERROR);
+  }
+  Q_ASSERT(false);
+  return EXEC_ERROR;
+}
+
+CLI::ExitCode CLI::Main::checkProgrammer()
+{
+  if ( _progGroup==0 ) return OK;
+  if ( _progGroup->isSoftware() && _progGroup->supportedDevices().isEmpty() )
+    return errorExit(i18n("Please check installation of selected software debugger."), NOT_SUPPORTED_ERROR);
+  if ( _device && !_progGroup->isSupported(_device->name()) )
+    return errorExit(i18n("The selected device \"%1\" is not supported by the selected programmer.").arg(_device->name()), NOT_SUPPORTED_ERROR);
+  if ( !_hardware.isEmpty() ) {
+    ::Hardware::Config *config = _progGroup->hardwareConfig();
+    Port::Description pd = static_cast<Programmer::CliManager *>(Programmer::manager)->portDescription();
+    bool ok = (config==0 || config->hardwareNames(pd.type).contains(_hardware));
+    delete config;
+    if ( !ok ) return errorExit(i18n("The selected programmer does not supported the specified hardware configuration (\"%1\").").arg(_hardware), NOT_SUPPORTED_ERROR);
+  }
+  return OK;
+}
+
+CLI::ExitCode CLI::Main::executeSetCommand(const QString &property, const QString &value)
+{
+  if ( property=="programmer" ) {
+    _progGroup = 0;
+    if ( value.isEmpty() ) return OK;
+    _progGroup = Programmer::lister().group(value.lower());
+    if (_progGroup) return checkProgrammer();
+    return errorExit(i18n("Unknown programmer \"%1\".").arg(value.lower()), ARG_ERROR);
+  }
+  if ( property=="hardware" ) { _hardware = value;  return OK; }
+  if ( property=="device" || property=="processor" ) {
+    if ( value.isEmpty() ) {
+      _device = 0;
+      return OK;
+    }
+    QString s = value.upper();
+    _device = Device::lister().data(s);
+    Debugger::manager->updateDevice();
+    if ( _device==0 ) return errorExit(i18n("Unknown device \"%1\".").arg(s), ARG_ERROR);
+    Debugger::manager->init();
+    return checkProgrammer();
+  }
+  if ( property=="format" ) {
+    if ( value.isEmpty() ) {
+      _format = HexBuffer::IHX32;
+      return OK;
+    }
+    QString s = value.lower();
+    for (uint i=0; i<HexBuffer::Nb_Formats; i++)
+      if ( s==HexBuffer::FORMATS[i] ) {
+        _format = HexBuffer::Format(i);
+        return OK;
+      }
+    return errorExit(i18n("Unknown hex file format \"%1\".").arg(s), ARG_ERROR);
+  }
+  if ( property=="port" ) { _port = value; return OK; }
+  if ( property=="firmware-dir" ) { _firmwareDir = value; return OK; }
+  if ( property=="target-self-powered" ) { _targetSelfPowered = value.lower(); return OK; }
+  if ( property=="hex" ) {
+    PURL::Url url = PURL::Url::fromPathOrUrl(value);
+    if ( url.isRelative() ) _hexUrl = PURL::Url(runDirectory(), value);
+    else _hexUrl = url;
+    return OK;
+  }
+  if ( property=="coff" ) {
+    PURL::Url url = PURL::Url::fromPathOrUrl(value);
+    if ( url.isRelative() ) _coffUrl = PURL::Url(runDirectory(), value);
+    else _coffUrl = url;
+    if ( _device && !Debugger::manager->init() ) return ARG_ERROR;
+    return OK;
+  }
+  return errorExit(i18n("Unknown property \"%1\"").arg(property), ARG_ERROR);
+}
+
+QString CLI::Main::executeGetCommand(const QString &property)
+{
+  if ( property=="programmer" ) {
+    if ( _progGroup==0 ) return i18n("<not set>");
+    return _progGroup->name();
+  }
+  if ( property=="hardware" ) {
+    if ( !_hardware.isEmpty() ) return _hardware;
+    if ( _progGroup==0 ) return i18n("<not set>");
+    Port::Description pd = static_cast<Programmer::CliManager *>(Programmer::manager)->portDescription();
+    ::Hardware::Config *config = _progGroup->hardwareConfig();
+    if (config) return config->currentHardware(pd.type) + " " + i18n("<from config>");
+    delete config;
+    return i18n("<not set>");
+  }
+  if ( property=="device" || property=="processor" ) {
+    if ( _device==0 ) return i18n("<not set>");
+    return _device->name();
+  }
+  if ( property=="format" ) return HexBuffer::FORMATS[_format];
+  if ( property=="port" ) {
+    if ( !_port.isEmpty() ) return _port;
+    if ( _progGroup==0 ) return i18n("<not set>");
+    Port::Description pd = Programmer::GroupConfig::portDescription(*_progGroup);
+    QString s = pd.type.key();
+    if (pd.type.data().withDevice) s += " (" + pd.device + ")";
+    return s + " " + i18n("<from config>");
+  }
+  if ( property=="firmware-dir" ) {
+    if ( !_firmwareDir.isEmpty() ) return _firmwareDir.pretty();
+    if ( _progGroup==0 ) return i18n("<not set>");
+    return Programmer::GroupConfig::firmwareDirectory(*_progGroup) + " " + i18n("<from config>");
+  }
+  if ( property=="target-self-powered" ) {
+    if ( !_targetSelfPowered.isEmpty() ) return _targetSelfPowered;
+    return QString(readConfigEntry(Programmer::Config::TargetSelfPowered).toBool() ? "true" : "false") + " " + i18n("<from config>");
+  }
+  if ( property=="hex" ) {
+    if ( !_hexUrl.isEmpty() ) return _hexUrl.pretty();
+    return i18n("<not set>");
+  }
+  if ( property=="coff" ) {
+    if ( !_coffUrl.isEmpty() ) return _coffUrl.pretty();
+    return i18n("<not set>");
+  }
+  log(Log::LineType::SoftError, i18n("Unknown property \"%1\"").arg(property));
+  return QString::null;
+}
+
+//-----------------------------------------------------------------------------
+int main(int argc, char **argv)
+{
+  CLI::Main main;
+  Piklab::AboutData *about = new Piklab::AboutData("piklab-prog", I18N_NOOP("Piklab Programmer Utility"), I18N_NOOP("Command-line programmer/debugger."));
+  CLI::OptionList list = main.optionList(I18N_NOOP("Hex filename for programming."));
+  Piklab::init(about, argc, argv, false, list.ptr());
+  return main.doRun();
+}
diff --git a/src/piklab-prog/cmdline.h b/src/piklab-prog/cmdline.h
new file mode 100644
index 0000000..03d4091
--- /dev/null
+++ b/src/piklab-prog/cmdline.h
@@ -0,0 +1,59 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef CMDLINE_H
+#define CMDLINE_H
+
+#include "common/cli/cli_main.h"
+#include "cli_interactive.h"
+#include "common/global/purl.h"
+#include "devices/base/hex_buffer.h"
+namespace Device { class Data; class Memory; class MemoryRange; }
+namespace Programmer { class Base; class Group; }
+
+namespace CLI
+{
+class Main : public MainBase
+{
+Q_OBJECT
+public:
+  Main();
+  virtual ~Main();
+  virtual ExitCode prepareRun(bool &interactive);
+  virtual ExitCode prepareCommand(const QString &command);
+  virtual ExitCode executeCommand(const QString &command);
+  virtual ExitCode executeSetCommand(const QString &property, const QString &value);
+  virtual QString executeGetCommand(const QString &property);
+  virtual ExitCode list(const QString &command);
+  ExitCode extractRange(const QString &range);
+
+private:
+  Device::MemoryRange *_range;
+
+  ExitCode formatList();
+  ExitCode programmerList();
+  ExitCode hardwareList();
+  ExitCode deviceList();
+  ExitCode portList();
+  ExitCode rangeList();
+  ExitCode checkProgrammer();
+};
+
+extern const Programmer::Group *_progGroup;
+extern QString _hardware;
+extern const Device::Data *_device;
+extern HexBuffer::Format _format;
+extern QString _port, _targetSelfPowered;
+extern PURL::Directory _firmwareDir;
+extern PURL::Url _hexUrl, _coffUrl;
+extern Device::Memory *_memory;
+extern Interactive *_interactive;
+
+} // namespace
+
+#endif
diff --git a/src/piklab-prog/piklab-prog.pro b/src/piklab-prog/piklab-prog.pro
new file mode 100644
index 0000000..bd70cb2
--- /dev/null
+++ b/src/piklab-prog/piklab-prog.pro
@@ -0,0 +1,32 @@
+STOPDIR = ../..
+include($${STOPDIR}/app.pro)
+
+TARGET   = piklab-prog
+HEADERS += cli_prog_manager.h cli_debug_manager.h cli_interactive.h cmdline.h
+SOURCES += cli_prog_manager.cpp cli_debug_manager.cpp cli_interactive.cpp cmdline.cpp
+LIBS    += ../progs/manager/libprogmanager.a ../progs/list/libprogslist.a \
+           ../progs/picdem_bootloader/base/libpicdem_bootloader.a ../progs/pickit2_bootloader/base/libpickit2_bootloader.a \
+           ../progs/tbl_bootloader/base/libtbl_bootloader.a ../progs/bootloader/base/libbootloader.a \
+           ../progs/pickit2v2/base/libpickit2v2.a \
+           ../progs/gpsim/base/libgpsim.a \
+           ../progs/psp/base/libpsp.a ../progs/pickit1/base/libpickit1.a \
+           ../progs/pickit2/base/libpickit2.a ../progs/icd1/base/libicd1.a \
+           ../progs/icd2/base/libicd2.a \
+           ../progs/icd2/icd2_data/libicd2data.a ../progs/direct/base/libdirectprog.a \
+           ../devices/pic/prog/libpicprog.a ../devices/mem24/prog/libmem24prog.a \
+           ../progs/base/libprogbase.a ../common/port/libport.a ../coff/base/libcoff.a \
+           ../devices/list/libdevicelist.a \
+           ../devices/mem24/mem24/libmem24.a ../devices/mem24/xml_data/libmem24xml.a \
+           ../devices/mem24/base/libmem24base.a \
+           ../devices/pic/pic/libpic.a ../devices/pic/xml_data/libpicxml.a \
+           ../devices/pic/base/libpicbase.a \
+           ../devices/base/libdevicebase.a \
+           ../common/cli/libcli.a ../common/global/libglobal.a \
+           ../common/nokde/libnokde.a ../common/common/libcommon.a
+contains(DEFINES, HAVE_USB) {
+  unix:LIBS += -lusb
+  win32:LIBS += $${LIBUSB_PATH}\lib\gcc\libusb.a
+}
+contains(DEFINES, HAVE_READLINE) {
+  unix:LIBS += -lhistory -lreadline -lcurses
+}
diff --git a/src/piklab-test/Makefile.am b/src/piklab-test/Makefile.am
new file mode 100644
index 0000000..7159e70
--- /dev/null
+++ b/src/piklab-test/Makefile.am
@@ -0,0 +1,3 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+SUBDIRS = base misc save_load_memory checksum generators
diff --git a/src/piklab-test/base/Makefile.am b/src/piklab-test/base/Makefile.am
new file mode 100644
index 0000000..da6c4ba
--- /dev/null
+++ b/src/piklab-test/base/Makefile.am
@@ -0,0 +1,5 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libtest.la
+libtest_la_SOURCES = main_test.cpp device_test.cpp generator_check.cpp
diff --git a/src/piklab-test/base/device_test.cpp b/src/piklab-test/base/device_test.cpp
new file mode 100644
index 0000000..9346a13
--- /dev/null
+++ b/src/piklab-test/base/device_test.cpp
@@ -0,0 +1,54 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "device_test.h"
+
+#include "devices/base/device_group.h"
+#include "devices/list/device_list.h"
+
+void DeviceTest::checkArguments()
+{
+  if ( _args->count()==1 ) {
+    _device = QString(_args->arg(0)).upper();
+    if ( !Device::lister().isSupported(_device) ) qFatal("Specified device \"%s\" not supported.", _device.latin1());
+    printf("Testing only %s\n", _device.latin1());
+  }
+}
+
+bool DeviceTest::execute()
+{
+  Device::Lister::ConstIterator it;
+  for (it=Device::lister().begin(); it!=Device::lister().end(); ++it) {
+    Group::Base::ConstIterator git;
+    for (git=it.data()->begin(); git!=it.data()->end(); ++git) {
+      const Device::Data &data = *git.data().data;
+      if ( !_device.isEmpty() && data.name()!=_device ) continue;
+      _message = data.name();
+      if ( skip(data) ) {
+        skipped();
+        printf("S");
+      } else {
+        if ( init(data) ) {
+          printf("*");
+          execute(data);
+        } else printf("S");
+        cleanup(data);
+      }
+      fflush(stdout);
+    }
+  }
+  return true;
+}
+
+Piklab::OptionList DeviceTest::optionList() const
+{
+  Piklab::OptionList optionList;
+  const KCmdLineOptions OPTION = { "+[device]", "Only check the specified device", 0 };
+  optionList.append(OPTION);
+  return optionList;
+}
diff --git a/src/piklab-test/base/device_test.h b/src/piklab-test/base/device_test.h
new file mode 100644
index 0000000..24447ed
--- /dev/null
+++ b/src/piklab-test/base/device_test.h
@@ -0,0 +1,32 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DEVICE_TEST_H
+#define DEVICE_TEST_H
+
+#include "piklab-test/base/main_test.h"
+namespace Device { class Data; }
+
+class DeviceTest : public Test
+{
+public:
+  virtual Piklab::OptionList optionList() const;
+
+protected:
+  virtual bool execute();
+  virtual bool skip(const Device::Data &) const { return false; }
+  virtual bool init(const Device::Data &) { return true; } // returns false if skipped or failed
+  virtual bool execute(const Device::Data &data) = 0; // returns false if skipped or failed
+  virtual void cleanup(const Device::Data &) {}
+  virtual void checkArguments();
+
+private:
+  QString _device;
+};
+
+#endif
diff --git a/src/piklab-test/base/generator_check.cpp b/src/piklab-test/base/generator_check.cpp
new file mode 100644
index 0000000..68ad2c5
--- /dev/null
+++ b/src/piklab-test/base/generator_check.cpp
@@ -0,0 +1,288 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "generator_check.h"
+
+#include "devices/base/device_group.h"
+#include "devices/pic/pic/pic_memory.h"
+#include "tools/gputils/gputils.h"
+#include "tools/gputils/gputils_generator.h"
+#include "tools/sdcc/sdcc.h"
+#include "tools/sdcc/sdcc_generator.h"
+#include "devices/list/device_list.h"
+
+//----------------------------------------------------------------------------
+GeneratorCheckHelper::GeneratorCheckHelper()
+  : _cprocess(0), _lprocess(0), _generator(0)
+{}
+
+GeneratorCheckHelper::~GeneratorCheckHelper()
+{
+  delete _generator;
+}
+
+void GeneratorCheckHelper::cleanup()
+{
+  delete _lprocess;
+  _lprocess = 0;
+  delete _cprocess;
+  _cprocess = 0;
+}
+
+//----------------------------------------------------------------------------
+GeneratorCheck::GeneratorCheck(GeneratorCheckHelper *helper)
+  : _helper(helper), _fdest(0), _fhex(0), _memory1(0)
+{
+  _view = new CLI::View;
+}
+
+GeneratorCheck::~GeneratorCheck()
+{
+  delete _view;
+  delete _helper;
+}
+
+void GeneratorCheck::runTest()
+{
+  _helper->initSupported();
+  DeviceTest::runTest();
+}
+
+bool GeneratorCheck::init(const Device::Data &data)
+{
+  PURL::Url dest(PURL::Directory::current(), "test.xxx");
+  dest = dest.toFileType(_helper->sourceFileType());
+  _fdest = new PURL::File(dest, *_view);
+  _helper->init(data);
+  PURL::Url hex(PURL::Directory::current(), "test.hex");
+  _fhex = new PURL::File(hex, *_view);
+  _memory1 = static_cast<Pic::Memory *>(data.group().createMemory(data));
+  return true;
+}
+
+bool GeneratorCheck::skip(const Device::Data &data) const
+{
+  return !_helper->isSupported(data);
+}
+
+void GeneratorCheck::cleanup(const Device::Data &)
+{
+  delete _memory1;
+  _memory1 = 0;
+  delete _fhex;
+  _fhex = 0;
+//  _fdest->remove();
+  delete _fdest;
+  _fdest = 0;
+  _helper->cleanup();
+}
+
+bool GeneratorCheck::execute(const Device::Data &data)
+{
+  // create asm file from template source code
+  if ( !_fdest->openForWrite() ) TEST_FAILED_RETURN("");
+  _fdest->appendText(_source);
+  _fdest->close();
+
+  // run compiler
+  Process::State state = Process::runSynchronously(*_helper->_cprocess, Process::Start, 2000); // 2s timeout
+  if ( state!=Process::Exited ) TEST_FAILED_RETURN("Error while running compilation")
+  if ( _helper->_cprocess->exitCode()!=0 ) TEST_FAILED_RETURN(QString("Error in compilation for %1:\n%2%3").arg(data.name()).arg(_helper->_cprocess->sout()+_helper->_cprocess->serr()).arg(QString::null))
+
+  // run linker
+  if (_helper->_lprocess) {
+    state = Process::runSynchronously(*_helper->_lprocess, Process::Start, 2000); // 2s timeout
+    if ( state!=Process::Exited ) TEST_FAILED_RETURN("Error while running linking")
+    if ( _helper->_lprocess->exitCode()!=0 ) TEST_FAILED_RETURN(QString("Error in linking for %1:\n%2%3").arg(data.name()).arg(_helper->_lprocess->sout()+_helper->_lprocess->serr()).arg(QString::null))
+  }
+
+  // load hex file
+  if ( !_fhex->openForRead() ) TEST_FAILED_RETURN("")
+  QStringList errors, warnings;
+  Device::Memory::WarningTypes warningTypes;
+  if ( !_memory1->load(_fhex->stream(), errors, warningTypes, warnings) ) TEST_FAILED_RETURN(QString("Error loading hex into memory: %1").arg(errors.join(" ")))
+  //if ( warningTypes!=Device::Memory::NoWarning ) TEST_FAILED(QString("Warning loading hex into memory: %1").arg(warnings.join(" ")))
+
+  TEST_PASSED
+  return true;
+}
+
+//----------------------------------------------------------------------------
+bool ConfigGeneratorCheck::init(const Device::Data &data)
+{
+  if ( !GeneratorCheck::init(data) ) return false;
+  _memory2 = static_cast<Pic::Memory *>(data.group().createMemory(data));
+  return true;
+}
+
+bool ConfigGeneratorCheck::execute(const Device::Data &data)
+{
+  // create configuration
+  const Pic::Config &config = static_cast<const Pic::Data &>(data).config();
+  for (uint l=0; ; l++) {
+    // set config bits
+    bool ok = false;
+    for (uint i=0; i<config._words.count(); i++) {
+      const Pic::Config::Word &cword = config._words[i];
+      for (uint k=0; k<cword.masks.count(); k++) {
+        const Pic::Config::Mask &cmask = cword.masks[k];
+        if ( l<cmask.values.count() ) {
+          ok = true;
+          if ( !cmask.values[l].name.isEmpty() ) _memory2->setConfigValue(cmask.name, cmask.values[l].name);
+        }
+      }
+    }
+    if ( !ok ) break;
+
+    // create source code
+    PURL::SourceFamily sfamily = _helper->sourceFileType().data().sourceFamily;
+    PURL::ToolType ttype = sfamily.data().toolType;
+    SourceLine::List lines = _helper->generator()->includeLines(ttype, data);
+    lines += _helper->generator()->configLines(ttype, *_memory2, ok);
+    lines += _helper->configEndLines();
+    _source = SourceLine::text(sfamily, lines, 2);
+    if (!ok) TEST_FAILED_RETURN("Config lines generation incomplete")
+
+    if ( !GeneratorCheck::execute(data) ) return false;
+
+    // check that config bits are the same
+    uint nbChars = static_cast<const Pic::Data &>(data).nbCharsWord(Pic::MemoryRangeType::Config);
+    for (uint i=0; i<config._words.count(); i++) {
+      const Pic::Config::Word &cword = config._words[i];
+      BitValue word1 = _memory1->word(Pic::MemoryRangeType::Config, i);
+      BitValue word2 = _memory2->word(Pic::MemoryRangeType::Config, i);
+      if ( word1==word2 ) continue;
+      for (uint k=0; k<cword.masks.count(); k++) {
+        const Pic::Config::Mask &cmask = cword.masks[k];
+        if ( cmask.value.isInside(cword.pmask) ) continue;
+        BitValue value1 = word1.maskWith(cmask.value);
+        BitValue value2 = word2.maskWith(cmask.value);
+        if ( value1==value2 ) continue;
+        QString name1, name2;
+        uint l1, l2;
+        for (uint l=0; l<cmask.values.count(); l++) {
+          const Pic::Config::Value &value = cmask.values[l];
+          if ( value.value==value1 ) { name1 = value.name; l1 = l; }
+          if ( value.value==value2 ) { name2 = value.name; l2 = l; }
+        }
+        if ( name1==name2 ) continue;
+        TEST_FAILED_RETURN(QString("Config bits are different in %1: set\"%2\"=(%3) != compiled=%4)")
+                           .arg(cmask.name).arg(cmask.values[l2].name)
+                           .arg(toHexLabel(word2.maskWith(cmask.value), nbChars)).arg(toHexLabel(word1.maskWith(cmask.value), nbChars)))
+      }
+    }
+  }
+
+  TEST_PASSED
+  return true;
+}
+
+void ConfigGeneratorCheck::cleanup(const Device::Data &data)
+{
+  GeneratorCheck::cleanup(data);
+  delete _memory2;
+  _memory2 = 0;
+}
+
+//----------------------------------------------------------------------------
+bool TemplateGeneratorCheck::init(const Device::Data &data)
+{
+  if ( !GeneratorCheck::init(data) ) return false;
+  bool ok;
+  PURL::SourceFamily sfamily = _helper->sourceFileType().data().sourceFamily;
+  PURL::ToolType ttype = sfamily.data().toolType;
+  SourceLine::List lines = _helper->generator()->templateSourceFile(ttype, data, ok);
+  _source = SourceLine::text(sfamily, lines, 2);
+  if (!ok) TEST_FAILED_RETURN(QString("Incomplete template generator for %1").arg(data.name()))
+  return true;
+}
+
+//----------------------------------------------------------------------------
+GPUtilsGeneratorCheckHelper::GPUtilsGeneratorCheckHelper()
+{
+  _generator = new GPUtils::SourceGenerator;
+}
+
+void GPUtilsGeneratorCheckHelper::initSupported()
+{
+  Process::StringOutput p;
+  QStringList options;
+  options += "-l";
+  p.setup("gpasm", options, false);
+  Process::runSynchronously(p, Process::Start, 2000); // 2s timeout
+  _supported = GPUtils::getSupportedDevices(p.sout());
+}
+
+bool GPUtilsGeneratorCheckHelper::init(const Device::Data &data)
+{
+  _cprocess = new Process::StringOutput;
+  QStringList options;
+  options = "-c";
+  options += "-p" + GPUtils::toDeviceName(data.name());
+  options += "test.asm";
+  _cprocess->setup("gpasm", options, false);
+  _lprocess = new Process::StringOutput;
+  options = "-o";
+  options += "test.hex";
+  options += "test.o";
+  _lprocess->setup("gplink", options, false);
+  return true;
+}
+
+SourceLine::List GPUtilsGeneratorCheckHelper::configEndLines() const
+{
+  SourceLine::List lines;
+  lines.appendIndentedCode("end");
+  return lines;
+}
+
+//----------------------------------------------------------------------------
+SDCCGeneratorCheckHelper::SDCCGeneratorCheckHelper()
+{
+  _generator = new SDCC::SourceGenerator;
+}
+
+void SDCCGeneratorCheckHelper::initSupported()
+{
+  PURL::Url url(PURL::Directory::current(), "test.c");
+  Log::StringView view;
+  PURL::File file(url, view);
+  if ( file.openForWrite() ) file.appendText("void main(void) {}\n");
+  file.close();
+  _supported.clear();
+  for (uint i=0; i<SDCC::Nb_Families; i++) {
+    Process::StringOutput p;
+    QStringList options;
+    options += QString("-m") + SDCC::FAMILY_DATA[i].name;
+    options += "-phelp";
+    options += "test.c";
+    p.setup("sdcc", options, false);
+    Process::runSynchronously(p, Process::Start, 2000); // 2s timeout
+    _supported += SDCC::getSupportedDevices(p.serr());
+  }
+}
+
+bool SDCCGeneratorCheckHelper::init(const Device::Data &data)
+{
+  _cprocess = new Process::StringOutput;
+  QStringList options;
+  options += QString("-m") + SDCC::FAMILY_DATA[SDCC::family(data.name())].name;
+  options += "-" + SDCC::toDeviceName(data.name());
+  options += "test.c";
+  options += "-I/usr/share/gputils/header";
+  options += "-Wl-otext.hex";
+  _cprocess->setup("sdcc", options, false);
+  return true;
+}
+
+SourceLine::List SDCCGeneratorCheckHelper::configEndLines() const
+{
+  SourceLine::List lines;
+  lines.appendIndentedCode("void main() {}");
+  return lines;
+}
diff --git a/src/piklab-test/base/generator_check.h b/src/piklab-test/base/generator_check.h
new file mode 100644
index 0000000..9ad426a
--- /dev/null
+++ b/src/piklab-test/base/generator_check.h
@@ -0,0 +1,102 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef GPUTILS_GENERATOR_CHECK_H
+#define GPUTILS_GENERATOR_CHECK_H
+
+#include "device_test.h"
+#include "common/cli/cli_log.h"
+#include "common/global/pfile.h"
+#include "coff/base/disassembler.h"
+#include "common/global/process.h"
+namespace Pic { class Memory; }
+
+//----------------------------------------------------------------------------
+class GeneratorCheckHelper
+{
+public:
+  GeneratorCheckHelper();
+  virtual ~GeneratorCheckHelper();
+  virtual void initSupported() = 0;
+  virtual bool init(const Device::Data &data) = 0;
+  void cleanup();
+  bool isSupported(const Device::Data &data) const { return _supported.contains(&data); }
+  virtual PURL::FileType sourceFileType() const = 0;
+  const Tool::SourceGenerator *generator() const { return _generator; }
+  virtual SourceLine::List configEndLines() const = 0;
+
+protected:
+  QValueList<const Device::Data *> _supported;
+  Process::StringOutput *_cprocess, *_lprocess;
+  Tool::SourceGenerator *_generator;
+
+  friend class GeneratorCheck;
+};
+
+class GeneratorCheck : public DeviceTest
+{
+public:
+  GeneratorCheck(GeneratorCheckHelper *helper);
+  virtual ~GeneratorCheck();
+  virtual bool skip(const Device::Data &data) const;
+  virtual void runTest();
+  virtual bool init(const Device::Data &data);
+  virtual bool execute(const Device::Data &data);
+  virtual void cleanup(const Device::Data &data);
+
+protected:
+  GeneratorCheckHelper *_helper;
+  CLI::View  *_view;
+  PURL::File *_fdest, *_fhex;
+  Pic::Memory *_memory1;
+  QString _source;
+};
+
+//----------------------------------------------------------------------------
+class ConfigGeneratorCheck : public GeneratorCheck
+{
+public:
+  ConfigGeneratorCheck(GeneratorCheckHelper *helper) : GeneratorCheck(helper), _memory2(0) {}
+  virtual bool init(const Device::Data &data);
+  virtual bool execute(const Device::Data &data);
+  virtual void cleanup(const Device::Data &data);
+
+private:
+  Pic::Memory *_memory2;
+};
+
+//----------------------------------------------------------------------------
+class TemplateGeneratorCheck : public GeneratorCheck
+{
+public:
+  TemplateGeneratorCheck(GeneratorCheckHelper *helper) : GeneratorCheck(helper) {}
+  virtual bool init(const Device::Data &data);
+};
+
+//----------------------------------------------------------------------------
+class GPUtilsGeneratorCheckHelper : public GeneratorCheckHelper
+{
+public:
+  GPUtilsGeneratorCheckHelper();
+  virtual void initSupported();
+  virtual bool init(const Device::Data &data);
+  virtual PURL::FileType sourceFileType() const { return PURL::AsmGPAsm; }
+  virtual SourceLine::List configEndLines() const;
+};
+
+//----------------------------------------------------------------------------
+class SDCCGeneratorCheckHelper : public GeneratorCheckHelper
+{
+public:
+  SDCCGeneratorCheckHelper();
+  virtual void initSupported();
+  virtual bool init(const Device::Data &data);
+  virtual PURL::FileType sourceFileType() const { return PURL::CSource; }
+  virtual SourceLine::List configEndLines() const;
+};
+#endif
diff --git a/src/piklab-test/base/main_test.cpp b/src/piklab-test/base/main_test.cpp
new file mode 100644
index 0000000..10d0414
--- /dev/null
+++ b/src/piklab-test/base/main_test.cpp
@@ -0,0 +1,32 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "main_test.h"
+
+//----------------------------------------------------------------------------
+Test::Test()
+  : _nbPassed(0), _nbFailed(0), _nbSkipped(0)
+{}
+
+void Test::runTest()
+{
+  _args = KCmdLineArgs::parsedArgs();
+  checkArguments();
+  fflush(stdout);
+  execute();
+  printf("\n");
+  printf("RESULTS: %i PASSED / %i FAILED / %i SKIPPED \n", _nbPassed, _nbFailed, _nbSkipped);
+}
+
+void Test::failed(const QString &message, const char *file, int line)
+{
+  _nbFailed++;
+  printf("\n");
+  if ( !_message.isEmpty() ) printf("[%s]", _message.latin1());
+  printf("FAILED in \"%s\" line #%i: %s\n", file, line, message.latin1());
+}
diff --git a/src/piklab-test/base/main_test.h b/src/piklab-test/base/main_test.h
new file mode 100644
index 0000000..601b779
--- /dev/null
+++ b/src/piklab-test/base/main_test.h
@@ -0,0 +1,51 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef MAIN_TEST_H
+#define MAIN_TEST_H
+
+#include "common/global/about.h"
+
+//----------------------------------------------------------------------------
+#define TEST_SKIPPED_RETURN { skipped(); return false; }
+#define TEST_FAILED_RETURN(message) { failed(message, __FILE__, __LINE__); return false; }
+#define TEST_FAILED(message) { failed(message, __FILE__, __LINE__); }
+#define TEST_PASSED { printf("."); fflush(stdout); passed(); }
+#define TEST_MAIN(Type)  \
+  int main(int argc, char **argv) \
+  { \
+  Type *check = new Type; \
+  Piklab::OptionList opt = check->optionList(); \
+  Piklab::init(new Piklab::AboutData("test", 0, 0), argc, argv, false, opt.ptr()); \
+  check->runTest(); \
+  return 0; \
+  }
+
+//----------------------------------------------------------------------------
+class Test
+{
+public:
+  Test();
+  virtual Piklab::OptionList optionList() const { return Piklab::OptionList(); }
+  virtual void runTest();
+
+protected:
+  KCmdLineArgs *_args;
+  QString       _message;
+
+  void passed() { _nbPassed++; }
+  void failed(const QString &message, const char *file, int line);
+  void skipped() { _nbSkipped++; }
+  virtual bool execute() = 0; // returns false if failed or skipped
+  virtual void checkArguments() {}
+
+private:
+  uint _nbPassed, _nbFailed, _nbSkipped;
+};
+
+#endif
diff --git a/src/piklab-test/checksum/Makefile.am b/src/piklab-test/checksum/Makefile.am
new file mode 100644
index 0000000..ed7535d
--- /dev/null
+++ b/src/piklab-test/checksum/Makefile.am
@@ -0,0 +1,18 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_PROGRAMS = checksum_check
+OBJ = $(top_builddir)/src/piklab-test/base/libtest.la \
+      $(top_builddir)/src/common/cli/libcli.la \
+      $(top_builddir)/src/tools/gputils/libgputils.la \
+      $(top_builddir)/src/coff/base/libcoff.la \
+      $(top_builddir)/src/common/global/libglobal.la $(top_builddir)/src/devices/list/libdevicelistnoui.la \
+      $(top_builddir)/src/devices/pic/pic/libpic.la $(top_builddir)/src/devices/pic/base/libpicbase.la \
+      $(top_builddir)/src/devices/pic/xml_data/libpicxml.la \
+      $(top_builddir)/src/devices/mem24/mem24/libmem24.la $(top_builddir)/src/devices/mem24/base/libmem24base.la \
+      $(top_builddir)/src/devices/mem24/xml_data/libmem24xml.la \
+      $(top_builddir)/src/devices/base/libdevicebase.la $(top_builddir)/src/common/common/libcommon.la
+checksum_check_DEPENDENCIES = $(OBJ)
+checksum_check_LDADD = $(OBJ) $(LIB_KIO)
+checksum_check_LDFLAGS = $(all_libraries) $(KDE_RPATH)
+checksum_check_SOURCES = checksum_check.cpp
diff --git a/src/piklab-test/checksum/checksum_check.cpp b/src/piklab-test/checksum/checksum_check.cpp
new file mode 100644
index 0000000..fdba104
--- /dev/null
+++ b/src/piklab-test/checksum/checksum_check.cpp
@@ -0,0 +1,116 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "checksum_check.h"
+
+#include "devices/base/device_group.h"
+
+//----------------------------------------------------------------------------
+bool ChecksumCheck::skip(const Device::Data &data) const
+{
+  return ( data.group().name()!="pic" );
+}
+
+bool ChecksumCheck::init(const Device::Data &data)
+{
+  _memory = static_cast<Pic::Memory *>(data.group().createMemory(data));
+  return true;
+}
+
+void ChecksumCheck::cleanup(const Device::Data &)
+{
+  delete _memory;
+  _memory = 0;
+}
+
+void ChecksumCheck::setProtection(const Pic::Data &data, const Pic::Checksum::Data &cdata,
+                                  const QString &maskName, const QString &valueName)
+{
+  const Pic::Protection &protection = data.config().protection();
+  if ( !maskName.isEmpty() && !valueName.isEmpty() ) _memory->setConfigValue(maskName, valueName);
+  if ( !valueName.isEmpty() ) _memory->setUserIdToUnprotectedChecksum();
+  for (uint i=0; i<cdata.protectedMaskNames.count(); i++) {
+    QString pmName = cdata.protectedMaskNames[i];
+    const Pic::Config::Mask *mask = data.config().findMask(pmName, 0);
+    for (int k=mask->values.count()-1; k>=0; k--) {
+      if ( mask->values[k].name.isEmpty() ) continue;
+      if ( protection.isNoneProtectedValueName(mask->values[k].name) ) continue;
+      _memory->setConfigValue(pmName, mask->values[k].name);
+      break;
+    }
+  }
+  if ( !cdata.bbsize.isEmpty() ) _memory->setConfigValue(protection.bootSizeMaskName(), cdata.bbsize);
+}
+
+bool ChecksumCheck::checkChecksum(BitValue checksum, const QString &label)
+{
+  BitValue c = _memory->checksum();
+  if ( c!=checksum ) TEST_FAILED_RETURN(QString("%1 %2/%3").arg(label).arg(toHexLabel(c, 4)).arg(toHexLabel(checksum, 4)))
+  return true;
+}
+
+void ChecksumCheck::checkChecksum(const Pic::Data &pdata, const QString &maskName, const QString &valueName, bool &ok)
+{
+  if ( !pdata.checksums().contains(valueName) ) {
+    const Pic::Config::Mask *mask = pdata.config().findMask(maskName);
+    QString label = valueName + (mask ? "/" + mask->name : QString::null);
+    printf("Missing checksum for \"%s\"", label.latin1());
+    return;
+  }
+  const Pic::Checksum::Data &cdata = pdata.checksums()[valueName];
+  _memory->clear();
+  setProtection(pdata, cdata, maskName, valueName);
+  if ( !checkChecksum(cdata.blankChecksum, maskName + ":" + valueName + "/" + "blank") ) ok = false;
+  _memory->checksumCheckFill();
+  setProtection(pdata, cdata, maskName, valueName);
+  if ( !checkChecksum(cdata.checkChecksum, maskName + ":" + valueName + "/" + "check") ) ok = false;
+}
+
+bool ChecksumCheck::execute(const Device::Data &data)
+{
+  const Pic::Data &pdata = static_cast<const Pic::Data &>(data);
+  if ( data.name()=="18C601" || data.name()=="18C801" ) TEST_PASSED;
+  if ( pdata.checksums().isEmpty() ) TEST_FAILED_RETURN("No checksum data");
+  bool ok = true;
+  const Pic::Protection &protection = pdata.config().protection();
+  switch ( protection.family() ) {
+    case Pic::Protection::NoProtection:
+      checkChecksum(pdata, QString::null, QString::null, ok);
+      break;
+    case Pic::Protection::BasicProtection: {
+      QString maskName = protection.maskName(Pic::Protection::ProgramProtected, Pic::MemoryRangeType::Code);
+      const Pic::Config::Mask *mask = pdata.config().findMask(maskName);
+      Q_ASSERT(mask);
+      for (uint i=0; i<mask->values.count(); i++) {
+        QString valueName = mask->values[i].name;
+        if ( valueName.isEmpty() ) continue; // invalid value
+        checkChecksum(pdata, maskName, valueName, ok);
+      }
+      break;
+    }
+    case Pic::Protection::CodeGuard:
+      checkChecksum(pdata, "GSSEC", "Off", ok);
+      checkChecksum(pdata, "GSSEC", "High Security", ok);
+      break;
+    case Pic::Protection::BlockProtection: {
+      const QMap<QString, Pic::Checksum::Data> &cmap = pdata.checksums();
+      QMap<QString, Pic::Checksum::Data>::const_iterator it;
+      for (it=cmap.begin(); it!=cmap.end(); ++it)
+        checkChecksum(pdata, QString::null, it.key(), ok);
+      break;
+    }
+    case Pic::Protection::Nb_Families: Q_ASSERT(false); break;
+  }
+
+  if ( !ok ) return false;
+  TEST_PASSED
+  return true;
+}
+
+//----------------------------------------------------------------------------
+TEST_MAIN(ChecksumCheck)
diff --git a/src/piklab-test/checksum/checksum_check.h b/src/piklab-test/checksum/checksum_check.h
new file mode 100644
index 0000000..6483984
--- /dev/null
+++ b/src/piklab-test/checksum/checksum_check.h
@@ -0,0 +1,35 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef CHECKSUM_CHECK_H
+#define CHECKSUM_CHECK_H
+
+#include "piklab-test/base/device_test.h"
+#include "common/cli/cli_log.h"
+#include "common/global/pfile.h"
+#include "devices/pic/pic/pic_memory.h"
+
+class ChecksumCheck : public DeviceTest
+{
+public:
+  ChecksumCheck() : _memory(0) {}
+  virtual bool skip(const Device::Data &data) const;
+  virtual bool init(const Device::Data &data);
+  virtual bool execute(const Device::Data &data);
+  virtual void cleanup(const Device::Data &data);
+
+private:
+  Pic::Memory *_memory;
+
+  void setProtection(const Pic::Data &data, const Pic::Checksum::Data &cdata,
+                     const QString &maskName, const QString &valueName);
+  bool checkChecksum(BitValue checksum, const QString &label);
+  void checkChecksum(const Pic::Data &data, const QString &maskName, const QString &valueName, bool &ok);
+};
+
+#endif
diff --git a/src/piklab-test/generators/Makefile.am b/src/piklab-test/generators/Makefile.am
new file mode 100644
index 0000000..209e3e3
--- /dev/null
+++ b/src/piklab-test/generators/Makefile.am
@@ -0,0 +1,31 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_PROGRAMS = gputils_config_generator_check gputils_template_generator_check \
+                  sdcc_config_generator_check
+
+OBJ = $(top_builddir)/src/piklab-test/base/libtest.la \
+      $(top_builddir)/src/common/cli/libcli.la \
+      $(top_builddir)/src/tools/sdcc/libsdcc.la $(top_builddir)/src/tools/gputils/libgputils.la \
+      $(top_builddir)/src/coff/base/libcoff.la \
+      $(top_builddir)/src/common/global/libglobal.la $(top_builddir)/src/devices/list/libdevicelistnoui.la \
+      $(top_builddir)/src/devices/pic/pic/libpic.la $(top_builddir)/src/devices/pic/base/libpicbase.la \
+      $(top_builddir)/src/devices/pic/xml_data/libpicxml.la \
+      $(top_builddir)/src/devices/mem24/mem24/libmem24.la $(top_builddir)/src/devices/mem24/base/libmem24base.la \
+      $(top_builddir)/src/devices/mem24/xml_data/libmem24xml.la \
+      $(top_builddir)/src/devices/base/libdevicebase.la $(top_builddir)/src/common/common/libcommon.la
+
+gputils_config_generator_check_DEPENDENCIES = $(OBJ)
+gputils_config_generator_check_LDADD = $(OBJ) $(LIB_KIO)
+gputils_config_generator_check_LDFLAGS = $(all_libraries) $(KDE_RPATH)
+gputils_config_generator_check_SOURCES = gputils_config_generator_check.cpp
+
+gputils_template_generator_check_DEPENDENCIES = $(OBJ)
+gputils_template_generator_check_LDADD = $(OBJ) $(LIB_KIO)
+gputils_template_generator_check_LDFLAGS = $(all_libraries) $(KDE_RPATH)
+gputils_template_generator_check_SOURCES = gputils_template_generator_check.cpp
+
+sdcc_config_generator_check_DEPENDENCIES = $(OBJ)
+sdcc_config_generator_check_LDADD = $(OBJ) $(LIB_KIO)
+sdcc_config_generator_check_LDFLAGS = $(all_libraries) $(KDE_RPATH)
+sdcc_config_generator_check_SOURCES = sdcc_config_generator_check.cpp
diff --git a/src/piklab-test/generators/gputils_config_generator_check.cpp b/src/piklab-test/generators/gputils_config_generator_check.cpp
new file mode 100644
index 0000000..89b2e2e
--- /dev/null
+++ b/src/piklab-test/generators/gputils_config_generator_check.cpp
@@ -0,0 +1,11 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "gputils_config_generator_check.h"
+
+TEST_MAIN(GPUtilsConfigGeneratorCheck)
diff --git a/src/piklab-test/generators/gputils_config_generator_check.h b/src/piklab-test/generators/gputils_config_generator_check.h
new file mode 100644
index 0000000..e330871
--- /dev/null
+++ b/src/piklab-test/generators/gputils_config_generator_check.h
@@ -0,0 +1,20 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef GPUTILS_CONFIG_GENERATOR_CHECK_H
+#define GPUTILS_CONFIG_GENERATOR_CHECK_H
+
+#include "piklab-test/base/generator_check.h"
+
+class GPUtilsConfigGeneratorCheck : public ConfigGeneratorCheck
+{
+public:
+  GPUtilsConfigGeneratorCheck() : ConfigGeneratorCheck(new GPUtilsGeneratorCheckHelper) {}
+};
+
+#endif
diff --git a/src/piklab-test/generators/gputils_template_generator_check.cpp b/src/piklab-test/generators/gputils_template_generator_check.cpp
new file mode 100644
index 0000000..fe5de54
--- /dev/null
+++ b/src/piklab-test/generators/gputils_template_generator_check.cpp
@@ -0,0 +1,11 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "gputils_template_generator_check.h"
+
+TEST_MAIN(GPUtilsTemplateGeneratorCheck)
diff --git a/src/piklab-test/generators/gputils_template_generator_check.h b/src/piklab-test/generators/gputils_template_generator_check.h
new file mode 100644
index 0000000..cc93eb8
--- /dev/null
+++ b/src/piklab-test/generators/gputils_template_generator_check.h
@@ -0,0 +1,20 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef GPUTILS_TEMPLATE_GENERATOR_CHECK_H
+#define GPUTILS_TEMPLATE_GENERATOR_CHECK_H
+
+#include "piklab-test/base/generator_check.h"
+
+class GPUtilsTemplateGeneratorCheck : public TemplateGeneratorCheck
+{
+public:
+  GPUtilsTemplateGeneratorCheck() : TemplateGeneratorCheck(new GPUtilsGeneratorCheckHelper) {}
+};
+
+#endif
diff --git a/src/piklab-test/generators/sdcc_config_generator_check.cpp b/src/piklab-test/generators/sdcc_config_generator_check.cpp
new file mode 100644
index 0000000..cad2f07
--- /dev/null
+++ b/src/piklab-test/generators/sdcc_config_generator_check.cpp
@@ -0,0 +1,11 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "sdcc_config_generator_check.h"
+
+TEST_MAIN(SDCCConfigGeneratorCheck)
diff --git a/src/piklab-test/generators/sdcc_config_generator_check.h b/src/piklab-test/generators/sdcc_config_generator_check.h
new file mode 100644
index 0000000..8438f0f
--- /dev/null
+++ b/src/piklab-test/generators/sdcc_config_generator_check.h
@@ -0,0 +1,20 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef SDCC_CONFIG_GENERATOR_CHECK_H
+#define SDCC_CONFIG_GENERATOR_CHECK_H
+
+#include "piklab-test/base/generator_check.h"
+
+class SDCCConfigGeneratorCheck : public ConfigGeneratorCheck
+{
+public:
+  SDCCConfigGeneratorCheck() : ConfigGeneratorCheck(new SDCCGeneratorCheckHelper) {}
+};
+
+#endif
diff --git a/src/piklab-test/misc/Makefile.am b/src/piklab-test/misc/Makefile.am
new file mode 100644
index 0000000..e21c3d1
--- /dev/null
+++ b/src/piklab-test/misc/Makefile.am
@@ -0,0 +1,10 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_PROGRAMS = misc_check
+OBJ = $(top_builddir)/src/piklab-test/base/libtest.la $(top_builddir)/src/common/cli/libcli.la \
+      $(top_builddir)/src/common/global/libglobal.la $(top_builddir)/src/common/common/libcommon.la
+misc_check_DEPENDENCIES = $(OBJ)
+misc_check_LDADD = $(OBJ) $(LIB_KIO)
+misc_check_LDFLAGS = $(all_libraries) $(KDE_RPATH)
+misc_check_SOURCES = misc_check.cpp
diff --git a/src/piklab-test/misc/misc_check.cpp b/src/piklab-test/misc/misc_check.cpp
new file mode 100644
index 0000000..3f14287
--- /dev/null
+++ b/src/piklab-test/misc/misc_check.cpp
@@ -0,0 +1,99 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "misc_check.h"
+
+#include "common/global/purl.h"
+
+//----------------------------------------------------------------------------
+bool MiscCheck::execute()
+{
+  {
+    PURL::Url url = PURL::Url::fromPathOrUrl(QString::null);
+    if ( !url.isEmpty() ) TEST_FAILED("isEmpty");
+    TEST_PASSED;
+  }
+  {
+    PURL::Url url = PURL::Url::fromPathOrUrl("");
+    if ( !url.isEmpty() ) TEST_FAILED("isEmpty");
+    TEST_PASSED;
+  }
+  {
+    PURL::Url url = PURL::Url::fromPathOrUrl("/");
+    if ( url.isEmpty() ) TEST_FAILED("isEmpty");
+    if ( url.isRelative() ) TEST_FAILED("isRelative");
+    if ( !url.isLocal() ) TEST_FAILED("isLocal");
+    if ( url.path()!="/" ) TEST_FAILED("");
+    if ( url.filepath()!="/" ) TEST_FAILED(url.filepath());
+    if ( url.unterminatedPath()!="/" ) TEST_FAILED("");
+    if ( !url.filename().isEmpty() ) TEST_FAILED(url.filename());
+    TEST_PASSED;
+  }
+  {
+    PURL::Url url = PURL::Url::fromPathOrUrl("test");
+    if ( url.isEmpty() ) TEST_FAILED("isEmpty");
+    if ( !url.isRelative() ) TEST_FAILED("isRelative");
+    if ( !url.isLocal() ) TEST_FAILED("isLocal");
+    if ( url.filename()!="test" ) TEST_FAILED(url.filename());
+    TEST_PASSED;
+  }
+  {
+    PURL::Url url = PURL::Url::fromPathOrUrl("/test");
+    if ( url.isEmpty() ) TEST_FAILED("isEmpty");
+    if ( url.isRelative() ) TEST_FAILED("isRelative");
+    if ( !url.isLocal() ) TEST_FAILED("isLocal");
+    if ( url.path()!="/" ) TEST_FAILED("");
+    if ( url.unterminatedPath()!="/" ) TEST_FAILED("");
+    if ( url.filepath()!="/test" ) TEST_FAILED(url.filepath());
+    if ( url.filename()!="test" ) TEST_FAILED(url.filename());
+    TEST_PASSED;
+  }
+  {
+    PURL::Url url = PURL::Url::fromPathOrUrl("/test/");
+    if ( url.isEmpty() ) TEST_FAILED("isEmpty");
+    if ( url.isRelative() ) TEST_FAILED("isRelative");
+    if ( !url.isLocal() ) TEST_FAILED("isLocal");
+    if ( url.path()!="/test/" ) TEST_FAILED("");
+    if ( url.unterminatedPath()!="/test" ) TEST_FAILED("");
+    if ( url.filepath()!="/test/" ) TEST_FAILED(url.filepath());
+    if ( !url.filename().isEmpty() ) TEST_FAILED(url.filename());
+    TEST_PASSED;
+  }
+  {
+    PURL::Url url = PURL::Url::fromPathOrUrl("c:/test");
+    if ( url.isEmpty() ) TEST_FAILED("isEmpty");
+    if ( url.isRelative() ) TEST_FAILED("isRelative");
+    if ( !url.isLocal() ) TEST_FAILED("isLocal");
+    PURL::Url url2 = PURL::Url::fromPathOrUrl("c:/");
+    if ( url.path()!=url2.path() ) TEST_FAILED(url.path());
+    if ( url==url2 ) TEST_FAILED(url.path());
+    if ( url.filename()!="test" ) TEST_FAILED(url.filename());
+    TEST_PASSED;
+  }
+  {
+    PURL::Url url = PURL::Url::fromPathOrUrl("d:/test/");
+    if ( url.isEmpty() ) TEST_FAILED("isEmpty");
+    if ( url.isRelative() ) TEST_FAILED("isRelative");
+    if ( !url.isLocal() ) TEST_FAILED("isLocal");
+    if ( !url.filename().isEmpty() ) TEST_FAILED(url.filename());
+    TEST_PASSED;
+  }
+  {
+    PURL::Url url(KURL::fromPathOrURL("http://test.net/test"));
+    if ( url.isEmpty() ) TEST_FAILED("isEmpty");
+    if ( url.isRelative() ) TEST_FAILED("isRelative");
+    if ( url.isLocal() ) TEST_FAILED("isLocal");
+    if ( url.filename()!="test" ) TEST_FAILED(url.filename());
+    TEST_PASSED;
+  }
+
+  return true;
+}
+
+//----------------------------------------------------------------------------
+TEST_MAIN(MiscCheck)
diff --git a/src/piklab-test/misc/misc_check.h b/src/piklab-test/misc/misc_check.h
new file mode 100644
index 0000000..a36b3cf
--- /dev/null
+++ b/src/piklab-test/misc/misc_check.h
@@ -0,0 +1,20 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef MISC_CHECK_H
+#define MISC_CHECK_H
+
+#include "piklab-test/base/main_test.h"
+
+class MiscCheck : public Test
+{
+protected:
+  virtual bool execute();
+};
+
+#endif
diff --git a/src/piklab-test/save_load_memory/Makefile.am b/src/piklab-test/save_load_memory/Makefile.am
new file mode 100644
index 0000000..da9365f
--- /dev/null
+++ b/src/piklab-test/save_load_memory/Makefile.am
@@ -0,0 +1,18 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_PROGRAMS = save_load_memory_check
+OBJ = $(top_builddir)/src/piklab-test/base/libtest.la \
+      $(top_builddir)/src/common/cli/libcli.la \
+      $(top_builddir)/src/tools/gputils/libgputils.la \
+      $(top_builddir)/src/coff/base/libcoff.la \
+      $(top_builddir)/src/common/global/libglobal.la $(top_builddir)/src/devices/list/libdevicelistnoui.la \
+      $(top_builddir)/src/devices/pic/pic/libpic.la $(top_builddir)/src/devices/pic/base/libpicbase.la \
+      $(top_builddir)/src/devices/pic/xml_data/libpicxml.la \
+      $(top_builddir)/src/devices/mem24/mem24/libmem24.la $(top_builddir)/src/devices/mem24/base/libmem24base.la \
+      $(top_builddir)/src/devices/mem24/xml_data/libmem24xml.la \
+      $(top_builddir)/src/devices/base/libdevicebase.la $(top_builddir)/src/common/common/libcommon.la
+save_load_memory_check_DEPENDENCIES = $(OBJ)
+save_load_memory_check_LDADD = $(OBJ) $(LIB_KIO)
+save_load_memory_check_LDFLAGS = $(all_libraries) $(KDE_RPATH)
+save_load_memory_check_SOURCES = save_load_memory_check.cpp
diff --git a/src/piklab-test/save_load_memory/save_load_memory_check.cpp b/src/piklab-test/save_load_memory/save_load_memory_check.cpp
new file mode 100644
index 0000000..22eb1ea
--- /dev/null
+++ b/src/piklab-test/save_load_memory/save_load_memory_check.cpp
@@ -0,0 +1,64 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "save_load_memory_check.h"
+
+#include "devices/base/generic_memory.h"
+#include "devices/base/device_group.h"
+
+//----------------------------------------------------------------------------
+SaveLoadMemoryCheck::SaveLoadMemoryCheck()
+  : _memory1(0), _memory2(0)
+{
+  _view = new CLI::View;
+  PURL::Url dest(PURL::Directory::current(), "test.hex");
+  _fdest = new PURL::File(dest, *_view);
+}
+
+SaveLoadMemoryCheck::~SaveLoadMemoryCheck()
+{
+  _fdest->remove();
+  delete _fdest;
+  delete _view;
+}
+
+bool SaveLoadMemoryCheck::init(const Device::Data &data)
+{
+  _memory1 = data.group().createMemory(data);
+  _memory2 = data.group().createMemory(data);
+  return true;
+}
+
+void SaveLoadMemoryCheck::cleanup(const Device::Data &)
+{
+  delete _memory1;
+  _memory1 = 0;
+  delete _memory2;
+  _memory2 = 0;
+}
+
+bool SaveLoadMemoryCheck::execute(const Device::Data &data)
+{
+  // create hex file from blank memory
+  if ( !_fdest->openForWrite() ) TEST_FAILED_RETURN("")
+  _memory1->save(_fdest->stream(), HexBuffer::IHX32);
+
+  // read hex file
+  if ( !_fdest->openForRead() ) TEST_FAILED_RETURN("")
+  QStringList errors, warnings;
+  Device::Memory::WarningTypes wtypes;
+  if ( !_memory2->load(_fdest->stream(), errors, wtypes, warnings) ) TEST_FAILED_RETURN(QString("Error loading hex file into memory %1").arg(data.name()))
+
+  // compare checksums
+  if ( _memory1->checksum()!=_memory2->checksum() ) TEST_FAILED_RETURN("Memory saved and loaded is different")
+  TEST_PASSED
+  return true;
+}
+
+//----------------------------------------------------------------------------
+TEST_MAIN(SaveLoadMemoryCheck)
diff --git a/src/piklab-test/save_load_memory/save_load_memory_check.h b/src/piklab-test/save_load_memory/save_load_memory_check.h
new file mode 100644
index 0000000..f342560
--- /dev/null
+++ b/src/piklab-test/save_load_memory/save_load_memory_check.h
@@ -0,0 +1,32 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef SAVE_LOAD_MEMORY_CHECK_H
+#define SAVE_LOAD_MEMORY_CHECK_H
+
+#include "piklab-test/base/device_test.h"
+#include "common/cli/cli_log.h"
+#include "common/global/pfile.h"
+namespace Device { class Memory; }
+
+class SaveLoadMemoryCheck : public DeviceTest
+{
+public:
+  SaveLoadMemoryCheck();
+  virtual ~SaveLoadMemoryCheck();
+  virtual bool init(const Device::Data &data);
+  virtual bool execute(const Device::Data &data);
+  virtual void cleanup(const Device::Data &data);
+
+private:
+  CLI::View  *_view;
+  PURL::File *_fdest;
+  Device::Memory *_memory1, *_memory2;
+};
+
+#endif
diff --git a/src/piklab/Makefile.am b/src/piklab/Makefile.am
new file mode 100644
index 0000000..4a40a10
--- /dev/null
+++ b/src/piklab/Makefile.am
@@ -0,0 +1,63 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+bin_PROGRAMS = piklab
+OBJS = $(top_builddir)/src/libgui/libgui.la \
+    \
+    $(top_builddir)/src/tools/list/libtoollist.la \
+	$(top_builddir)/src/tools/cc5x/gui/libcc5xui.la \
+	$(top_builddir)/src/tools/mpc/gui/libmpcui.la $(top_builddir)/src/tools/boost/gui/libboostui.la \
+	$(top_builddir)/src/tools/jalv2/gui/libjalv2ui.la $(top_builddir)/src/tools/ccsc/gui/libccscui.la \
+	$(top_builddir)/src/tools/c18/gui/libc18ui.la $(top_builddir)/src/tools/jal/gui/libjalui.la \
+	$(top_builddir)/src/tools/pic30/gui/libpic30ui.la $(top_builddir)/src/tools/picc/gui/libpiccui.la \
+	$(top_builddir)/src/tools/sdcc/gui/libsdccui.la $(top_builddir)/src/tools/gputils/gui/libgputilsui.la \
+	$(top_builddir)/src/tools/custom/libcustom.la \
+	$(top_builddir)/src/tools/cc5x/libcc5x.la \
+	$(top_builddir)/src/tools/mpc/libmpc.la $(top_builddir)/src/tools/boost/libboost.la \
+	$(top_builddir)/src/tools/jalv2/libjalv2.la $(top_builddir)/src/tools/ccsc/libccsc.la \
+	$(top_builddir)/src/tools/c18/libc18.la $(top_builddir)/src/tools/jal/libjal.la \
+	$(top_builddir)/src/tools/pic30/libpic30.la $(top_builddir)/src/tools/picc/libpicc.la \
+	$(top_builddir)/src/tools/sdcc/libsdcc.la $(top_builddir)/src/tools/gputils/libgputils.la \
+	$(top_builddir)/src/tools/gui/libtoolui.la $(top_builddir)/src/tools/base/libtoolbase.la \
+    \
+    $(top_builddir)/src/progs/list/libproglistui.la \
+	$(top_builddir)/src/progs/picdem_bootloader/gui/libpicdembootloaderui.la \
+	$(top_builddir)/src/progs/pickit2_bootloader/gui/libpickit2bootloaderui.la \
+	$(top_builddir)/src/progs/tbl_bootloader/gui/libtblbootloaderui.la \
+	$(top_builddir)/src/progs/bootloader/gui/libbootloaderui.la \
+	$(top_builddir)/src/progs/gpsim/gui/libgpsimui.la $(top_builddir)/src/progs/psp/gui/libpspui.la \
+	$(top_builddir)/src/progs/pickit2v2/gui/libpickit2v2ui.la \
+	$(top_builddir)/src/progs/pickit2/gui/libpickit2ui.la $(top_builddir)/src/progs/pickit1/gui/libpickit1ui.la \
+	$(top_builddir)/src/progs/icd1/gui/libicd1ui.la $(top_builddir)/src/progs/icd2/gui/libicd2ui.la \
+	$(top_builddir)/src/progs/direct/gui/libdirectui.la \
+    $(top_builddir)/src/progs/gui/libprogui.la \
+    \
+	$(top_builddir)/src/progs/picdem_bootloader/base/libpicdembootloader.la \
+	$(top_builddir)/src/progs/pickit2_bootloader/base/libpickit2bootloader.la \
+	$(top_builddir)/src/progs/tbl_bootloader/base/libtblbootloader.la \
+	$(top_builddir)/src/progs/bootloader/base/libbootloader.la \
+	$(top_builddir)/src/progs/gpsim/base/libgpsim.la $(top_builddir)/src/progs/psp/base/libpsp.la \
+	$(top_builddir)/src/progs/pickit2v2/base/libpickit2v2.la \
+	$(top_builddir)/src/progs/pickit1/base/libpickit1.la $(top_builddir)/src/progs/pickit2/base/libpickit2.la \
+	$(top_builddir)/src/progs/icd1/base/libicd1.la $(top_builddir)/src/progs/icd2/base/libicd2.la \
+	$(top_builddir)/src/progs/icd2/icd2_data/libicd2data.la $(top_builddir)/src/progs/direct/base/libdirectprog.la \
+	$(top_builddir)/src/progs/manager/libprogmanager.la \
+	$(top_builddir)/src/devices/pic/prog/libpicprog.la $(top_builddir)/src/devices/mem24/prog/libmem24prog.la \
+	$(top_builddir)/src/progs/base/libprogbase.la \
+	\
+	$(top_builddir)/src/coff/base/libcoff.la $(top_builddir)/src/common/port/libport.la \
+	$(top_builddir)/src/common/global/libglobal.la \
+    \
+    $(top_builddir)/src/devices/list/libdevicelistui.la \
+	$(top_builddir)/src/devices/mem24/gui/libmem24ui.la $(top_builddir)/src/devices/pic/gui/libpicui.la \
+	$(top_builddir)/src/devices/gui/libdeviceui.la $(top_builddir)/src/common/gui/libcommonui.la \
+    \
+	$(top_builddir)/src/devices/pic/pic/libpic.la $(top_builddir)/src/devices/pic/base/libpicbase.la \
+	$(top_builddir)/src/devices/pic/xml_data/libpicxml.la \
+	$(top_builddir)/src/devices/mem24/mem24/libmem24.la $(top_builddir)/src/devices/mem24/base/libmem24base.la \
+	$(top_builddir)/src/devices/mem24/xml_data/libmem24xml.la \
+	$(top_builddir)/src/devices/base/libdevicebase.la $(top_builddir)/src/common/common/libcommon.la
+piklab_LDADD = $(OBJS) -lktexteditor $(LIBUSB_LIBS) $(LIB_KHTML)
+piklab_DEPENDENCIES = $(OBJS)
+piklab_LDFLAGS = $(all_libraries) $(KDE_RPATH)
+piklab_SOURCES = main.cpp
diff --git a/src/piklab/main.cpp b/src/piklab/main.cpp
new file mode 100644
index 0000000..409be80
--- /dev/null
+++ b/src/piklab/main.cpp
@@ -0,0 +1,32 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+
+#include "libgui/toplevel.h"
+#include "common/global/about.h"
+#include "libgui/likeback.h"
+
+const KCmdLineOptions OPTIONS[] = {
+  { "+[file]", I18N_NOOP("Optional filenames to be opened upon startup."), 0 },
+  { 0, 0, 0}
+};
+
+int main(int argc, char **argv)
+{
+  Piklab::AboutData *about = new Piklab::AboutData("piklab", I18N_NOOP("Piklab"), I18N_NOOP( "Graphical development environment for applications based on PIC and dsPIC microcontrollers."));
+  Piklab::init(about, argc, argv, true, OPTIONS);
+  LikeBack::init(true);
+  LikeBack::setServer("piklab.sourceforge.net", "/likeback/send.php");
+  LikeBack::setAllowFeatureWishes(true);
+  if ( kapp->isRestored() ) RESTORE(MainWindow)
+  else {
+    MainWindow *wid = new MainWindow;
+    wid->show();
+  }
+  return kapp->exec();
+}
diff --git a/src/progs/Makefile.am b/src/progs/Makefile.am
new file mode 100644
index 0000000..634b7d1
--- /dev/null
+++ b/src/progs/Makefile.am
@@ -0,0 +1,2 @@
+SUBDIRS = base gui direct icd2 icd1 pickit2 pickit1 pickit2v2 psp gpsim \
+          bootloader picdem_bootloader tbl_bootloader pickit2_bootloader list manager
\ No newline at end of file
diff --git a/src/progs/base/Makefile.am b/src/progs/base/Makefile.am
new file mode 100644
index 0000000..c045428
--- /dev/null
+++ b/src/progs/base/Makefile.am
@@ -0,0 +1,10 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+
+libprogbase_la_LDFLAGS = $(all_libraries)
+noinst_LTLIBRARIES = libprogbase.la
+libprogbase_la_SOURCES = generic_prog.cpp prog_specific.cpp prog_config.cpp \
+		prog_group.cpp generic_debug.cpp hardware_config.cpp debug_config.cpp
+
+
diff --git a/src/progs/base/base.pro b/src/progs/base/base.pro
new file mode 100644
index 0000000..b2556e4
--- /dev/null
+++ b/src/progs/base/base.pro
@@ -0,0 +1,8 @@
+STOPDIR = ../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = progbase
+HEADERS += generic_prog.h generic_debug.h prog_config.h prog_group.h prog_specific.h \
+           hardware_config.h debug_config.h
+SOURCES += generic_prog.cpp generic_debug.cpp prog_config.cpp prog_group.cpp prog_specific.cpp \
+           hardware_config.cpp debug_config.cpp
diff --git a/src/progs/base/debug_config.cpp b/src/progs/base/debug_config.cpp
new file mode 100644
index 0000000..387941d
--- /dev/null
+++ b/src/progs/base/debug_config.cpp
@@ -0,0 +1,14 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "debug_config.h"
+
+const Debugger::Config::Data Debugger::Config::DATA[Nb_Types] = {
+  { "only_stop_on_source_line", I18N_NOOP("Only stop stepping on source line."), QVariant(true, 0) },
+  { "only_stop_on_project_source_line", I18N_NOOP("Only stop stepping on project source line."), QVariant(true, 0) }
+};
diff --git a/src/progs/base/debug_config.h b/src/progs/base/debug_config.h
new file mode 100644
index 0000000..acd7f09
--- /dev/null
+++ b/src/progs/base/debug_config.h
@@ -0,0 +1,24 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DEBUG_CONFIG_H
+#define DEBUG_CONFIG_H
+
+#include "common/global/generic_config.h"
+#include "common/common/key_enum.h"
+
+namespace Debugger
+{
+
+BEGIN_DECLARE_CONFIG(Config)
+  OnlyStopOnSourceLine, OnlyStopOnProjectSourceLine
+END_DECLARE_CONFIG(Config, "debugger")
+
+} // namespace
+
+#endif
diff --git a/src/progs/base/generic_debug.cpp b/src/progs/base/generic_debug.cpp
new file mode 100644
index 0000000..252d239
--- /dev/null
+++ b/src/progs/base/generic_debug.cpp
@@ -0,0 +1,111 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "generic_debug.h"
+
+#include "common/global/global.h"
+#include "generic_prog.h"
+#include "devices/base/register.h"
+#include "devices/base/device_group.h"
+#include "devices/pic/base/pic.h"
+
+//----------------------------------------------------------------------------
+Debugger::Base::Base(Programmer::Base &programmer)
+  : Log::Base(&programmer), _programmer(programmer), _deviceSpecific(0),
+    _specific(0), _inputType(PURL::Nb_FileTypes), _coff(0)
+{}
+
+void Debugger::Base::init(DeviceSpecific *deviceSpecific, Specific *specific)
+{
+  _deviceSpecific = deviceSpecific;
+  _specific = specific;
+}
+
+Debugger::Base::~Base()
+{
+  delete _deviceSpecific;
+  delete _specific;
+}
+
+const Device::Data *Debugger::Base::device() const
+{
+  return _programmer.device();
+}
+
+bool Debugger::Base::init()
+{
+  _programmer.setState(Programmer::Stopped);
+  log(Log::LineType::Information, i18n("Setting up debugging session."));
+  if ( !internalInit() ) {
+    log(Log::LineType::Error, i18n("Failed to initialize device for debugging."));
+    return false;
+  }
+  log(Log::LineType::Information, i18n("Ready to start debugging."));
+  _programmer.setState(Programmer::Halted);
+  return update();
+}
+
+bool Debugger::Base::update()
+{
+  if ( !updateState() ) return false;
+  if ( _programmer.state()==::Programmer::Halted ) return _deviceSpecific->updateStatus();
+  return true;
+}
+
+bool Debugger::Base::run()
+{
+  if ( !internalRun() ) return false;
+  _programmer.setState(::Programmer::Running);
+  return update();
+}
+
+bool Debugger::Base::step()
+{
+  if ( !internalStep() ) return false;
+  return update();
+}
+
+bool Debugger::Base::halt()
+{
+  bool success;
+  if ( !softHalt(success) ) return false;
+  if ( !success ) return hardHalt();
+  if ( !update() ) return false;
+  log(Log::LineType::Information, QString("Halted at %1").arg(toHexLabel(pc(), _programmer.device()->nbCharsAddress())));
+  _programmer.setState(::Programmer::Halted);
+  return true;
+}
+
+bool Debugger::Base::reset()
+{
+  if ( !internalReset() ) return false;
+  return update();
+}
+
+QString Debugger::Base::statusString() const
+{
+  if ( _programmer.state()!=::Programmer::Halted ) return QString::null;
+  return _deviceSpecific->statusString();
+}
+
+void Debugger::Base::setupInput(PURL::FileType type, const QString &directory, const QString &filename)
+{
+  _inputType = type;
+  _directory = directory;
+  _filename = filename;
+}
+
+BitValue Debugger::Base::pc() const
+{
+  return Register::list().value(pcTypeData());
+}
+
+Register::TypeData Debugger::Base::pcTypeData() const
+{
+  return Register::TypeData("PC", 2*device()->nbBytesAddress());
+}
diff --git a/src/progs/base/generic_debug.h b/src/progs/base/generic_debug.h
new file mode 100644
index 0000000..903d451
--- /dev/null
+++ b/src/progs/base/generic_debug.h
@@ -0,0 +1,90 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef GENERIC_DEBUG_H
+#define GENERIC_DEBUG_H
+
+#include "common/common/purl_base.h"
+#include "common/global/global.h"
+#include "common/global/log.h"
+#include "devices/base/register.h"
+namespace Programmer { class Base; }
+namespace Coff { class TextObject; }
+
+namespace Debugger
+{
+class DeviceSpecific;
+class Specific;
+
+//----------------------------------------------------------------------------
+class Base : public Log::Base
+{
+public:
+  Base(Programmer::Base &programmer);
+  virtual ~Base();
+  void init(DeviceSpecific *deviceSpecific, Specific *specific);
+  const Device::Data *device() const;
+  void setupInput(PURL::FileType type, const QString &directory, const QString &filename);
+  void setCoff(const Coff::TextObject *coff) { _coff = coff; }
+  QString directory() const { return _directory; }
+  bool init();
+  bool update();
+  bool reset();
+  bool run();
+  bool halt();
+  bool step();
+  QString statusString() const;
+  virtual bool setBreakpoints(const QValueList<Address> &addresses) = 0;
+  BitValue pc() const;
+  Register::TypeData pcTypeData() const;
+  virtual bool readRegister(const Register::TypeData &data, BitValue &value) = 0;
+  virtual bool writeRegister(const Register::TypeData &data, BitValue value) = 0;
+  virtual bool updatePortStatus(uint index, QMap<uint, Device::PortBitData> &bits) = 0;
+
+protected:
+  Programmer::Base &_programmer;
+  DeviceSpecific   *_deviceSpecific;
+  Specific         *_specific;
+  PURL::FileType    _inputType;
+  QString           _directory, _filename;
+  const Coff::TextObject *_coff;
+
+  virtual bool internalInit() = 0;
+  virtual bool internalRun() = 0;
+  virtual bool softHalt(bool &success) = 0;
+  virtual bool hardHalt() = 0;
+  virtual bool internalStep() = 0;
+  virtual bool internalReset() = 0;
+  virtual bool updateState() = 0;
+};
+
+//----------------------------------------------------------------------------
+class DeviceSpecific : public Log::Base
+{
+public:
+  DeviceSpecific(Debugger::Base &base) : Log::Base(base), _base(base) {}
+  virtual bool updateStatus() = 0;
+  virtual QString statusString() const = 0;
+
+protected:
+  Debugger::Base &_base;
+};
+
+//----------------------------------------------------------------------------
+class Specific : public Log::Base
+{
+public:
+  Specific(Debugger::Base &base) : Log::Base(base), _base(base) {}
+
+protected:
+  Debugger::Base &_base;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/base/generic_prog.cpp b/src/progs/base/generic_prog.cpp
new file mode 100644
index 0000000..6386eb2
--- /dev/null
+++ b/src/progs/base/generic_prog.cpp
@@ -0,0 +1,402 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "generic_prog.h"
+
+#include <qdir.h>
+
+#include "common/global/global.h"
+#include "prog_group.h"
+#include "prog_config.h"
+#include "devices/base/device_group.h"
+#include "generic_debug.h"
+#include "hardware_config.h"
+
+//-----------------------------------------------------------------------------
+const double Programmer::UNKNOWN_VOLTAGE = -1.0;
+
+const char * const Programmer::RESULT_TYPE_LABELS[Nb_ResultTypes+1] = {
+  I18N_NOOP("Pass"),
+  I18N_NOOP("Low"),
+  I18N_NOOP("High"),
+  I18N_NOOP("Fail"),
+  I18N_NOOP("---")
+};
+
+const Programmer::Task::Data Programmer::Task::DATA[Nb_Types] = {
+  { 0, I18N_NOOP("Reading...")        },
+  { 0, I18N_NOOP("Programming...")    },
+  { 0, I18N_NOOP("Verifying...")      },
+  { 0, I18N_NOOP("Erasing...")        },
+  { 0, I18N_NOOP("Blank Checking...") }
+};
+
+//-----------------------------------------------------------------------------
+Programmer::Base::Base(const Group &group, const Device::Data *device, const char *)
+  : _hardware(0), _specific(0), _device(device), _debugger(group.createDebugger(*this)),
+    _state(NotConnected), _targetPowerOn(false), _group(group)
+{}
+
+void Programmer::Base::init(bool targetSelfPowered, Hardware *hardware, DeviceSpecific *ds)
+{
+  clear();
+  _targetSelfPowered = targetSelfPowered;
+  _hardware = hardware;
+  _specific = ds;
+}
+
+Programmer::Base::~Base()
+{
+  delete _debugger;
+  delete _specific;
+  delete _hardware;
+}
+
+void Programmer::Base::clear()
+{
+  _firmwareVersion.clear();
+  _mode = NormalMode;
+  resetError();
+}
+
+bool Programmer::Base::simpleConnectHardware()
+{
+  Q_ASSERT(_hardware);
+  disconnectHardware();
+  clear();
+  if (_device) {
+    QString label = _group.label();
+    if ( group().isSoftware() )
+      log(Log::LineType::Information, i18n("Connecting %1 with device %2...").arg(label).arg(_device->name()));
+    else {
+      if ( !_hardware->name().isEmpty() ) label += "[" + _hardware->name() + "]";
+      Port::Description pd = _hardware->portDescription();
+      QString s = pd.type.label();
+      if (pd.type.data().withDevice) s += " (" + pd.device + ")";
+      log(Log::LineType::Information, i18n("Connecting %1 on %2 with device %3...").arg(label).arg(s).arg(_device->name()));
+    }
+  }
+  return _hardware->connectHardware();
+}
+
+bool Programmer::Base::connectHardware()
+{
+  _progressMonitor.insertTask(i18n("Connecting..."), 2);
+  log(Log::DebugLevel::Extra, "connect hardware");
+  if ( !simpleConnectHardware() ) return false;
+  _progressMonitor.addTaskProgress(1);
+  if ( !group().isSoftware() ) {
+    if ( !readFirmwareVersion() ) return false;
+    if ( _specific==0 ) return true;
+    if ( _mode==BootloadMode ) return true;
+    if ( !setupFirmware() ) return false;
+    if ( !checkFirmwareVersion() ) return false;
+    if ( !setTargetPowerOn(false) ) return false;
+    if ( !setTarget() ) return false;
+    log(Log::LineType::Information, i18n("  Set target self powered: %1").arg(_targetSelfPowered ? "true" : "false"));
+    if ( !setTargetPowerOn(!_targetSelfPowered) ) return false;
+    if ( !internalSetupHardware() ) return false;
+    if ( !readVoltages() ) return false;
+    if ( !selfTest(true) ) return false;
+  }
+  if ( hasError() ) return false;
+  log(Log::LineType::Information, i18n("Connected."));
+  _state = Stopped;
+  return true;
+}
+
+void Programmer::Base::disconnectHardware()
+{
+  _state = NotConnected;
+  log(Log::DebugLevel::Extra, "disconnect hardware");
+  clear();
+  _hardware->disconnectHardware();
+}
+
+PURL::Directory Programmer::Base::firmwareDirectory()
+{
+  if ( _firmwareDirectory.isEmpty() ) _firmwareDirectory = GroupConfig::firmwareDirectory(group());
+  PURL::Directory dir(_firmwareDirectory);
+  if ( !dir.exists() ) {
+    log(Log::LineType::Error, i18n("Firmware directory is not configured or does not exist."));
+    return PURL::Directory();
+  }
+  return dir;
+}
+
+bool Programmer::Base::checkFirmwareVersion()
+{
+  if ( _mode==BootloadMode ) log(Log::LineType::Information, i18n("Programmer is in bootload mode."));
+  if ( !_firmwareVersion.isValid() ) return true;
+  log(Log::LineType::Information, i18n("Firmware version is %1").arg(_firmwareVersion.pretty()));
+  VersionData vd = _firmwareVersion.toWithoutDot();
+  VersionData tmp = firmwareVersion(FirmwareVersionType::Max);
+  if ( tmp.isValid() && tmp.toWithoutDot()<vd ) {
+    VersionData mplab = mplabVersion(FirmwareVersionType::Max);
+    QString s = (mplab.isValid() ? " " + i18n("MPLAB %1").arg(mplab.prettyWithoutDot()) : QString::null);
+    log(Log::LineType::Warning, i18n("The firmware version (%1) is higher than the version tested with piklab (%2%3).\n"
+                                     "You may experience problems.").arg(_firmwareVersion.pretty()).arg(tmp.pretty()).arg(s));
+    return true;
+  }
+  tmp = firmwareVersion(FirmwareVersionType::Min);
+  if ( tmp.isValid() && vd<tmp.toWithoutDot() ) {
+    VersionData mplab = mplabVersion(FirmwareVersionType::Min);
+    QString s = (mplab.isValid() ? " " + i18n("MPLAB %1").arg(mplab.prettyWithoutDot()) : QString::null);
+    log(Log::LineType::Warning, i18n("The firmware version (%1) is lower than the version tested with piklab (%2%3).\n"
+                                     "You may experience problems.").arg(_firmwareVersion.pretty()).arg(tmp.pretty()).arg(s));
+    return true;
+  }
+  tmp = firmwareVersion(FirmwareVersionType::Recommended);
+  if ( tmp.isValid() && vd<tmp.toWithoutDot() ) {
+    VersionData mplab = mplabVersion(FirmwareVersionType::Recommended);
+    QString s = (mplab.isValid() ? " " + i18n("MPLAB %1").arg(mplab.prettyWithoutDot()) : QString::null);
+    log(Log::LineType::Warning, i18n("The firmware version (%1) is lower than the recommended version (%2%3).\n"
+                                     "It is recommended to upgrade the firmware.").arg(_firmwareVersion.pretty()).arg(tmp.pretty()).arg(s));
+    return true;
+  }
+  return true;
+}
+
+bool Programmer::Base::enterMode(Mode mode)
+{
+  log(Log::DebugLevel::Normal, mode==BootloadMode ? "  Enter bootload mode" : "  Enter normal mode");
+  if ( _mode==mode ) {
+    log(Log::DebugLevel::Normal, "  Already in requested mode.");
+    return true;
+  }
+  if ( !internalEnterMode(mode) ) return false;
+  return ( _mode==mode );
+}
+
+void Programmer::Base::log(Log::LineType type, const QString &message)
+{
+  if ( type==Log::LineType::Error ) _state = NotConnected;
+  Log::Base::log(type, message);
+}
+
+void Programmer::Base::log(Log::DebugLevel level, const QString &message)
+{
+  Log::Base::log(level, message);
+}
+
+bool Programmer::Base::setTargetPowerOn(bool on)
+{
+  _targetPowerOn = on;
+  return _specific->setTargetPowerOn(on);
+}
+
+void Programmer::Base::appendTask(Task task, const Device::MemoryRange *range)
+{
+  _progressMonitor.appendTask(task.label(), nbSteps(task, range));
+}
+
+bool Programmer::Base::connectDevice()
+{
+  _progressMonitor.clear();
+  bool ok = doConnectDevice();
+  endProgramming();
+  return ok;
+}
+
+bool Programmer::Base::doConnectDevice()
+{
+  if ( _state==NotConnected ) {
+    if ( !connectHardware() ) return false;
+    if ( !enterMode(NormalMode) ) return false;
+    if ( !verifyDeviceId() ) return false;
+  } else {
+    setTargetPowerOn(!_targetSelfPowered);
+  }
+  _state = Stopped;
+  return true;
+}
+
+bool Programmer::Base::run()
+{
+  emit actionMessage(i18n("Running..."));
+  _progressMonitor.clear();
+  if ( !doConnectDevice() ) return false;
+  log(Log::LineType::Information, i18n("Run..."));
+  internalRun();
+  return !hasError();
+}
+
+bool Programmer::Base::stop()
+{
+  emit actionMessage(i18n("Breaking..."));
+  return internalStop();
+}
+
+void Programmer::Base::endProgramming()
+{
+  if ( _state==Stopped && readConfigEntry(Config::PowerDownAfterProgramming).toBool() )
+    setTargetPowerOn(false);
+  if ( !(group().properties() & HasConnectedState) ) disconnectHardware();
+  _progressMonitor.clear();
+}
+
+bool Programmer::Base::uploadFirmware(const PURL::Url &url)
+{
+  _progressMonitor.clear();
+  log(Log::DebugLevel::Normal, QString("  Firmware file: %1").arg(url.pretty()));
+  Log::StringView sview;
+  PURL::File file(url, sview);
+  if ( !file.openForRead() ) {
+    log(Log::LineType::Error, i18n("Could not open firmware file \"%1\".").arg(url.pretty()));
+    return false;
+  }
+  bool ok  = doUploadFirmware(file);
+  _firmwareVersion.clear();
+  if (ok) ok = readFirmwareVersion();
+  endProgramming();
+  return ok;
+}
+
+bool Programmer::Base::doUploadFirmware(PURL::File &file)
+{
+  emit actionMessage(i18n("Uploading firmware..."));
+  return internalUploadFirmware(file);
+}
+
+//-----------------------------------------------------------------------------
+bool Programmer::Base::erase(const Device::MemoryRange &range)
+{
+  _progressMonitor.clear();
+  appendTask(Task::Erase, &range);
+  if ( readConfigEntry(Config::BlankCheckAfterErase).toBool() ) appendTask(Task::BlankCheck);
+  bool ok = doErase(range);
+  endProgramming();
+  return ok;
+}
+
+bool Programmer::Base::doErase(const Device::MemoryRange &range)
+{
+  if ( !checkErase() ) return false;
+  if ( !doConnectDevice() ) return false;
+  _progressMonitor.startNextTask();
+  log(Log::LineType::Information, i18n("Erasing..."));
+  if ( !internalErase(range) ) return false;
+  log(Log::LineType::Information, i18n("Erasing done"));
+  if ( readConfigEntry(Config::BlankCheckAfterErase).toBool() ) {
+    _progressMonitor.startNextTask();
+    log(Log::LineType::Information, i18n("Blank checking..."));
+    if ( !doVerify(BlankCheckVerify, range, 0) ) return false;
+    log(Log::LineType::Information, i18n("Blank checking done."));
+  }
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+bool Programmer::Base::checkCanRead()
+{
+  if ( !(group().properties() & CanReadMemory) ) {
+    log(Log::LineType::Error, i18n("The selected programmer cannot read device memory."));
+    return false;
+  }
+  return true;
+}
+
+bool Programmer::Base::read(Device::Memory &memory, const Device::MemoryRange &range)
+{
+  if ( !checkCanRead() ) return false;
+  _progressMonitor.clear();
+  appendTask(Task::Read, &range);
+  bool ok = doRead(memory, range);
+  endProgramming();
+  return ok;
+}
+
+bool Programmer::Base::doRead(Device::Memory &memory, const Device::MemoryRange &range)
+{
+  if ( !checkRead() ) return false;
+  if ( !doConnectDevice() ) return false;
+  _progressMonitor.startNextTask();
+  log(Log::LineType::Information, i18n("Reading device memory..."));
+  memory.clear();
+  if ( !internalRead(&memory, range, 0) ) return false;
+  log(Log::LineType::Information, i18n("Reading done."));
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+bool Programmer::Base::program(const Device::Memory &memory, const Device::MemoryRange &range)
+{
+  _progressMonitor.clear();
+  appendTask(Task::Write, &range);
+  bool ok = doProgram(memory, range);
+  endProgramming();
+  return ok;
+}
+
+bool Programmer::Base::doProgram(const Device::Memory &memory, const Device::MemoryRange &range)
+{
+  if ( !checkProgram(memory) ) return false;
+  if ( !doConnectDevice() ) return false;
+  _progressMonitor.startNextTask();
+  log(Log::LineType::Information, i18n("Programming device memory..."));
+  if ( !internalProgram(memory, range) ) return false;
+  log(Log::LineType::Information, i18n("Programming successful."));
+  if ( group().isDebugger() && !_debugger->init() ) return false;
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+bool Programmer::Base::verify(const Device::Memory &memory, const Device::MemoryRange &range)
+{
+  if ( !checkCanRead() ) return false;
+  _progressMonitor.clear();
+  appendTask(Task::Verify, &range);
+  bool ok = doVerify(memory, range);
+  endProgramming();
+  return ok;
+}
+
+bool Programmer::Base::doVerify(VerifyAction action, const Device::MemoryRange &range, const Device::Memory *memory)
+{
+  const Device::Memory *vmemory = memory;
+  if ( memory==0 ) {
+    Q_ASSERT( action & BlankCheckVerify );
+    vmemory = _device->group().createMemory(*_device);
+  }
+  VerifyData vdata(action, *vmemory);
+  bool ok = internalRead(0, range, &vdata);
+  if ( memory==0 ) delete vmemory;
+  return ok;
+}
+
+bool Programmer::Base::doVerify(const Device::Memory &memory, const Device::MemoryRange &range)
+{
+  if ( !checkRead() ) return false;
+  if ( !doConnectDevice() ) return false;
+  _progressMonitor.startNextTask();
+  log(Log::LineType::Information, i18n("Verifying..."));
+  if ( !doVerify(NormalVerify, range, &memory) ) return false;
+  log(Log::LineType::Information, i18n("Verifying successful."));
+  return true;
+}
+
+bool Programmer::Base::blankCheck(const Device::MemoryRange &range)
+{
+  if ( !checkCanRead() ) return false;
+  _progressMonitor.clear();
+  appendTask(Task::BlankCheck, &range);
+  bool ok = doBlankCheck(range);
+  endProgramming();
+  return ok;
+}
+
+bool Programmer::Base::doBlankCheck(const Device::MemoryRange &range)
+{
+  if ( !checkRead() ) return false;
+  if ( !doConnectDevice() ) return false;
+  _progressMonitor.startNextTask();
+  log(Log::LineType::Information, i18n("Blank checking..."));
+  if ( !doVerify(BlankCheckVerify, range, 0) ) return false;
+  log(Log::LineType::Information, i18n("Blank checking successful."));
+  return true;
+}
diff --git a/src/progs/base/generic_prog.h b/src/progs/base/generic_prog.h
new file mode 100644
index 0000000..3b4b219
--- /dev/null
+++ b/src/progs/base/generic_prog.h
@@ -0,0 +1,163 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef GENERIC_PROG_H
+#define GENERIC_PROG_H
+
+#include "common/global/log.h"
+#include "common/global/pfile.h"
+#include "common/common/version_data.h"
+#include "common/port/port_base.h"
+#include "common/global/progress_monitor.h"
+#include "devices/base/generic_device.h"
+#include "devices/base/generic_memory.h"
+#include "prog_specific.h"
+namespace Debugger { class Base; }
+namespace Device { class MemoryRange; }
+
+namespace Programmer
+{
+  enum Mode { NormalMode, BootloadMode };
+  enum State { NotConnected = 0, Stopped, Running, Halted };
+  class Hardware;
+  class Group;
+  class DeviceSpecific;
+  extern const double UNKNOWN_VOLTAGE;
+
+  enum VerifyAction { NormalVerify = 0, BlankCheckVerify = 1,
+                      IgnoreProtectedVerify = 2, OnlyProgrammedVerify = 4 };
+  Q_DECLARE_FLAGS(VerifyActions, VerifyAction)
+  Q_DECLARE_OPERATORS_FOR_FLAGS(VerifyActions)
+  class VerifyData {
+  public:
+    VerifyData(VerifyActions pactions, const Device::Memory &pmemory) : actions(pactions), memory(pmemory) {}
+    VerifyActions actions;
+    AddressRangeVector protectedRanges;
+    const Device::Memory &memory;
+  };
+
+  enum ResultType { Pass = 0, Low, High, Fail, Nb_ResultTypes };
+  extern const char * const RESULT_TYPE_LABELS[Nb_ResultTypes+1];
+
+  class HardwareDescription {
+  public:
+    Port::Description port;
+    QString name;
+  };
+
+  BEGIN_DECLARE_ENUM(Task)
+    Read = 0, Write, Verify, Erase, BlankCheck
+  END_DECLARE_ENUM_STD(Task)
+
+  BEGIN_DECLARE_ENUM(FirmwareVersionType)
+    Min, Max, Recommended
+  END_DECLARE_ENUM_NO_DATA(FirmwareVersionType)
+
+//-----------------------------------------------------------------------------
+class Base : public QObject, public Log::Base
+{
+Q_OBJECT
+public:
+  Base(const Group &group, const Device::Data *data, const char *name);
+  virtual ~Base();
+
+  virtual void log(Log::LineType type, const QString &message);
+  virtual void log(Log::DebugLevel level, const QString &message);
+  void init(bool targetSelfPowered, Hardware *hardware, DeviceSpecific *deviceSpecific);
+  const Device::Data *device() const { return _device; }
+  const Group &group() const { return _group; }
+  Hardware *hardware() { return _hardware; }
+  ProgressMonitor &progressMonitor() { return _progressMonitor; }
+  ::Debugger::Base *debugger() { return _debugger; }
+  virtual uint maxNbBreakpoints() const { return 1; }
+  virtual uint runUpdateWait() const { return 300; }
+
+  bool simpleConnectHardware();
+  bool connectHardware();
+  void disconnectHardware();
+  bool connectDevice();
+  bool setTargetPowerOn(bool on);
+  bool isTargetPowerOn() const { return _targetPowerOn; }
+  bool isTargetSelfPowered() const { return _targetSelfPowered; }
+  void setFirmwareDirectory(const PURL::Directory &dir) { _firmwareDirectory = dir; }
+  const VersionData &firmwareVersion() const { return _firmwareVersion; }
+  virtual bool readFirmwareVersion() { return true; }
+  bool uploadFirmware(const PURL::Url &url);
+  virtual bool readVoltages() { return true; }
+  virtual bool selfTest(bool ask) { Q_UNUSED(ask); return true; }
+  void appendTask(Task task, const Device::MemoryRange *range = 0);
+
+  bool erase(const Device::MemoryRange &range);
+  bool read(Device::Memory &memory, const Device::MemoryRange &range);
+  bool program(const Device::Memory &memory, const Device::MemoryRange &range);
+  bool verify(const Device::Memory &memory, const Device::MemoryRange &range);
+  bool blankCheck(const Device::MemoryRange &range);
+  bool run();
+  bool stop();
+  State state() const { return _state; }
+  void setState(State state) { _state = state; }
+  bool isConnected() const { return ( _state!=NotConnected ); }
+  bool isActive() const { return ( _state==Halted || _state==Running ); }
+  bool enterMode(Mode mode);
+  bool doConnectDevice();
+  virtual void clear();
+
+signals:
+  void actionMessage(const QString &message);
+
+protected:
+  Hardware           *_hardware;
+  DeviceSpecific     *_specific;
+  const Device::Data *_device;
+  ::Debugger::Base     *_debugger;
+  State               _state;
+  bool                _targetPowerOn;
+  const Group        &_group;
+  PURL::Directory     _firmwareDirectory;
+  VersionData         _firmwareVersion;
+  Mode                _mode;
+  bool                _targetSelfPowered;
+  ProgressMonitor     _progressMonitor;
+
+  PURL::Directory firmwareDirectory();
+  virtual bool setupFirmware() { return true; }
+  virtual VersionData firmwareVersion(FirmwareVersionType type) const { Q_UNUSED(type); return VersionData(); }
+  virtual VersionData mplabVersion(FirmwareVersionType type) const { Q_UNUSED(type); return VersionData(); }
+  virtual bool checkFirmwareVersion();
+  virtual bool setTarget() { return true; }
+  virtual bool internalSetupHardware() { return true; }
+  virtual bool verifyDeviceId() = 0;
+  virtual uint nbSteps(Task task, const Device::MemoryRange *range) const = 0;
+  virtual bool doUploadFirmware(PURL::File &);
+  virtual bool internalUploadFirmware(PURL::File &) { return false; }
+  virtual bool internalEnterMode(Mode) { return false; }
+
+  virtual bool checkErase() = 0;
+  virtual bool internalErase(const Device::MemoryRange &range) = 0;
+  bool checkCanRead();
+  virtual bool checkRead() = 0;
+  virtual bool internalRead(Device::Memory *memory, const Device::MemoryRange &range, const VerifyData *vdata) = 0;
+  virtual bool checkProgram(const Device::Memory &memory) = 0;
+  virtual bool internalProgram(const Device::Memory &memory, const Device::MemoryRange &range) = 0;
+  virtual bool internalRun() { return false; }
+  virtual bool internalStop() { return false; }
+
+  void endProgramming();
+  bool doErase(const Device::MemoryRange &range);
+  bool doRead(Device::Memory &memory, const Device::MemoryRange &range);
+  bool doVerify(const Device::Memory &memory, const Device::MemoryRange &range);
+  bool doVerify(VerifyAction action, const Device::MemoryRange &range, const Device::Memory *memory);
+  bool doBlankCheck(const Device::MemoryRange &range);
+  virtual bool doProgram(const Device::Memory &memory, const Device::MemoryRange &range);
+
+  friend class DeviceSpecific;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/base/hardware_config.cpp b/src/progs/base/hardware_config.cpp
new file mode 100644
index 0000000..5a3af7c
--- /dev/null
+++ b/src/progs/base/hardware_config.cpp
@@ -0,0 +1,97 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2005 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "hardware_config.h"
+
+//-----------------------------------------------------------------------------
+bool Hardware::Data::isEqual(const Data &data) const
+{
+  return ( data.portType==portType );
+}
+
+void Hardware::Data::readConfig(GenericConfig &config)
+{
+  portType = config.readEnumEntry<PortType>("port_type", PortType::Serial);
+}
+
+void Hardware::Data::writeConfig(GenericConfig &config) const
+{
+  config.writeEnumEntry<PortType>("port_type", portType);
+}
+
+//-----------------------------------------------------------------------------
+void Hardware::Config::writeCurrentHardware(PortType type, const QString &name)
+{
+  writeEntry(QString("current_hardware_") + type.key(), name);
+}
+
+QString Hardware::Config::currentHardware(PortType type)
+{
+  QStringList names = hardwareNames(type);
+  return readEntry(QString("current_hardware_") + type.key(), names[0]);
+}
+
+QString Hardware::Config::label(const QString &name) const
+{
+  const DataInfo *info = standardHardwareDataInfo(name);
+  if ( info==0 ) return QString::null;
+  return i18n(info->label);
+}
+
+QString Hardware::Config::comment(const QString &name) const
+{
+  const DataInfo *info = standardHardwareDataInfo(name);
+  if ( info==0 || info->comment==0 ) return QString::null;
+  return i18n(info->comment);
+}
+
+void Hardware::Config::writeCustomHardware(const QString& name, const Hardware::Data &hdata)
+{
+  Q_ASSERT( !isStandardHardware(name) );
+  QStringList customNames = readListEntry("custom_hardware_names", QStringList());
+  if ( !customNames.contains(name) ) {
+    customNames += name;
+    writeEntry("custom_hardware_names", customNames);
+  }
+  GenericConfig config(group() + "_custom_hardware_" + name);
+  hdata.writeConfig(config);
+}
+
+void Hardware::Config::deleteCustomHardware(const QString &name)
+{
+  Q_ASSERT( !isStandardHardware(name) );
+  QStringList customNames = readListEntry("custom_hardware_names", QStringList());
+  customNames.remove(name);
+  writeEntry("custom_hardware_names", customNames);
+  GenericConfig::deleteGroup(group() + "_custom_hardware_" + name);
+}
+
+Hardware::Data *Hardware::Config::hardwareData(const QString &name) const
+{
+  if ( isStandardHardware(name) ) return standardHardwareData(name);
+  Hardware::Data *hdata = createHardwareData();
+  hdata->name = name;
+  GenericConfig config(group() + "_custom_hardware_" + name);
+  hdata->readConfig(config);
+  return hdata;
+}
+
+QStringList Hardware::Config::hardwareNames(PortType type)
+{
+  QStringList names = standardHardwareNames(type);
+  QStringList customNames = readListEntry("custom_hardware_names", QStringList());
+  for (uint i=0; i<uint(customNames.count()); i++) {
+    if ( type!=PortType::Nb_Types ) {
+      Hardware::Data *hdata = hardwareData(customNames[i]);
+      if ( hdata->portType==type ) names += customNames[i];
+      delete hdata;
+    } else names += customNames[i];
+  }
+  return names;
+}
diff --git a/src/progs/base/hardware_config.h b/src/progs/base/hardware_config.h
new file mode 100644
index 0000000..5252ff3
--- /dev/null
+++ b/src/progs/base/hardware_config.h
@@ -0,0 +1,61 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2005 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef HARDWARE_CONFIG_H
+#define HARDWARE_CONFIG_H
+
+#include "common/global/generic_config.h"
+#include "common/port/port.h"
+
+namespace Hardware
+{
+//-----------------------------------------------------------------------------
+struct DataInfo
+{
+  const char *name, *label, *comment;
+};
+
+class Data
+{
+public:
+  Data() : portType(PortType::Nb_Types) {}
+  virtual ~Data() {}
+  virtual void readConfig(GenericConfig &config);
+  virtual void writeConfig(GenericConfig &config) const;
+  virtual bool isEqual(const Data &data) const;
+  PortType portType;
+  QString  name;
+};
+
+//-----------------------------------------------------------------------------
+class Config : public GenericConfig
+{
+public:
+  Config(const char *group) : GenericConfig(group) {}
+  virtual ~Config() {}
+  QStringList hardwareNames(PortType type);
+  bool isStandardHardware(const QString &name) const { return standardHardwareData(name); }
+  QString label(const QString &name) const;
+  QString comment(const QString &name) const;
+  void writeCustomHardware(const QString &name, const Hardware::Data &data);
+  QString currentHardware(PortType type);
+  void writeCurrentHardware(PortType type, const QString &name);
+  void deleteCustomHardware(const QString &name);
+  Hardware::Data *hardwareData(const QString& name) const;
+
+protected:
+  virtual QStringList standardHardwareNames(PortType type) const = 0;
+  virtual Hardware::Data *standardHardwareData(const QString &name) const = 0;
+  virtual const DataInfo *standardHardwareDataInfo(const QString &name) const = 0;
+  virtual Hardware::Data *createHardwareData() const = 0;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/base/prog_config.cpp b/src/progs/base/prog_config.cpp
new file mode 100644
index 0000000..8115ce7
--- /dev/null
+++ b/src/progs/base/prog_config.cpp
@@ -0,0 +1,78 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "prog_config.h"
+
+//----------------------------------------------------------------------------
+PortType Programmer::GroupConfig::portType(const Group &group)
+{
+  GenericConfig config(group.name());
+  PortType ctype = config.readEnumEntry<PortType>("port_group");
+  if ( group.isPortSupported(ctype) ) return ctype;
+  FOR_EACH(PortType, type) if ( group.isPortSupported(type) ) return type;
+  return PortType::Nb_Types;
+}
+void Programmer::GroupConfig::writePortType(const Group &group, PortType type)
+{
+  if ( type==PortType::Nb_Types ) return;
+  GenericConfig config(group.name());
+  config.writeEnumEntry<PortType>("port_group", type);
+}
+
+QString Programmer::GroupConfig::portDevice(const Group &group, PortType portType)
+{
+  GenericConfig config(group.name());
+  QString device = config.readEntry(QString(portType.key()) + "_port_device" , QString::null);
+  if ( device.isNull() ) {
+    QStringList list = Port::probedDeviceList(portType);
+    if ( list.isEmpty() ) return QString::null;
+    return list[0];
+  }
+  return device;
+}
+void Programmer::GroupConfig::writePortDevice(const Group &group, PortType type, const QString &device)
+{
+  if ( type==PortType::Nb_Types ) return;
+  GenericConfig config(group.name());
+  config.writeEntry(QString(type.key()) + "_port_device", device);
+}
+
+Port::Description Programmer::GroupConfig::portDescription(const Group &group)
+{
+  PortType type = portType(group);
+  return Port::Description(type, portDevice(group, type));
+}
+void Programmer::GroupConfig::writePortDescription(const Group &group, const Port::Description &dp)
+{
+  writePortType(group, dp.type);
+  writePortDevice(group, dp.type, dp.device);
+}
+
+QString Programmer::GroupConfig::firmwareDirectory(const Group &group)
+{
+  GenericConfig config(group.name());
+  return config.readEntry("firmware_directory", QString::null);
+}
+void Programmer::GroupConfig::writeFirmwareDirectory(const Group &group, const QString &path)
+{
+  GenericConfig config(group.name());
+  config.writeEntry("firmware_directory", path);
+}
+
+//----------------------------------------------------------------------------
+const Programmer::Config::Data Programmer::Config::DATA[Nb_Types] = {
+  { "only_program_non_mask", I18N_NOOP("Only program what is needed (faster)."), QVariant(true, 0) },
+  { "verify_after_program", I18N_NOOP("Verify device memory after programming."), QVariant(true, 0) },
+  { "only_verify_programmed", I18N_NOOP("Only verify programmed words in code memory (faster)."), QVariant(true, 0) },
+  { "power_down_after_programming", I18N_NOOP("Power down target after programming."), QVariant(true, 0) },
+  { "target_self_powered", I18N_NOOP("Target is self-powered (when possible)."), QVariant(true, 0) },
+  { "blank_check_after_erase", I18N_NOOP("Blank check after erase."), QVariant(false, 0) },
+  { "preserve_eeprom", I18N_NOOP("Preserve data EEPROM when programming."), QVariant(false, 0) },
+  { "program_eeprom", I18N_NOOP("Program data EEPROM."), QVariant(true, 0) },
+  { "run_after_program", I18N_NOOP("Run device after successful programming."), QVariant(false, 0) }
+};
diff --git a/src/progs/base/prog_config.h b/src/progs/base/prog_config.h
new file mode 100644
index 0000000..0c772c2
--- /dev/null
+++ b/src/progs/base/prog_config.h
@@ -0,0 +1,42 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PROGRAMMER_CONFIG_H
+#define PROGRAMMER_CONFIG_H
+
+#include "common/port/port.h"
+//#include "generic_prog.h"
+#include "prog_group.h"
+#include "common/global/generic_config.h"
+
+namespace Programmer
+{
+//----------------------------------------------------------------------------
+class GroupConfig
+{
+public:
+  static PortType portType(const Group &group);
+  static void writePortType(const Group &group, PortType type);
+  static QString portDevice(const Group &group, PortType type);
+  static void writePortDevice(const Group &group, PortType type, const QString &device);
+  static Port::Description portDescription(const Group &group);
+  static void writePortDescription(const Group &group, const Port::Description &pd);
+  static QString firmwareDirectory(const Group &group);
+  static void writeFirmwareDirectory(const Group &group, const QString &path);
+};
+
+//----------------------------------------------------------------------------
+BEGIN_DECLARE_CONFIG(Config)
+  OnlyProgramNonMask = 0, VerifyAfterProgram, OnlyVerifyProgrammed,
+  PowerDownAfterProgramming, TargetSelfPowered, BlankCheckAfterErase,
+  PreserveEeprom, ProgramEeprom, RunAfterProgram
+END_DECLARE_CONFIG(Config, "programmer")
+
+} // namespace
+
+#endif
diff --git a/src/progs/base/prog_group.cpp b/src/progs/base/prog_group.cpp
new file mode 100644
index 0000000..5801318
--- /dev/null
+++ b/src/progs/base/prog_group.cpp
@@ -0,0 +1,62 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "prog_group.h"
+
+#include "common/global/global.h"
+#include "generic_prog.h"
+#include "prog_config.h"
+#include "generic_debug.h"
+#include "devices/base/device_group.h"
+
+// order is important
+const PURL::FileType Programmer::INPUT_FILE_TYPE_DATA[Nb_InputFileTypes] = {
+  PURL::Coff, PURL::Cod, PURL::Hex
+};
+
+QString Programmer::Group::statusLabel(PortType type) const
+{
+  uint nb = 0;
+  FOR_EACH(PortType, ptype) if ( isPortSupported(ptype) ) nb++;
+  if ( nb<=0 ) return label();
+  return label() + " (" + type.label() + ")";
+}
+
+Programmer::Base *Programmer::Group::createProgrammer(bool targetSelfPowered, const Device::Data *data, const HardwareDescription &hd) const
+{
+  ::Programmer::Base *base = createBase(data);
+  Hardware *hardware = createHardware(*base, hd);
+  DeviceSpecific *ds = (data ? createDeviceSpecific(*base) : 0);
+  base->init(targetSelfPowered, hardware, ds);
+  return base;
+}
+
+Debugger::Base *Programmer::Group::createDebugger(::Programmer::Base &base) const
+{
+  ::Debugger::Base *dbase = createDebuggerBase(base);
+  if (dbase) {
+    ::Debugger::DeviceSpecific *dspecific = createDebuggerDeviceSpecific(*dbase);
+    ::Debugger::Specific *specific = createDebuggerSpecific(*dbase);
+    dbase->init(dspecific, specific);
+  }
+  return dbase;
+}
+
+bool Programmer::Group::checkConnection(const HardwareDescription &hd) const
+{
+  ::Programmer::Base *base = createProgrammer(false, 0, hd);
+  bool ok = base->simpleConnectHardware();
+  delete base;
+  return ok;
+}
+
+bool Programmer::Group::isSoftware() const
+{
+  FOR_EACH(PortType, type) if ( isPortSupported(type) ) return false;
+  return true;
+}
diff --git a/src/progs/base/prog_group.h b/src/progs/base/prog_group.h
new file mode 100644
index 0000000..07807fe
--- /dev/null
+++ b/src/progs/base/prog_group.h
@@ -0,0 +1,69 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PROG_GROUP_H
+#define PROG_GROUP_H
+
+class QWidget;
+#include "common/common/group.h"
+#include "common/port/port.h"
+#include "common/common/purl_base.h"
+#include "generic_prog.h"
+namespace Device { class Data; }
+namespace Debugger { class Base; class Specific; class DeviceSpecific; }
+namespace Hardware { class Config; }
+
+namespace Programmer
+{
+class Base;
+class Hardware;
+class DeviceSpecific;
+class ConfigWidget;
+
+enum Property { NoProperty = 0, Programmer = 1, Debugger = 2,
+                CanReleaseReset = 4, HasFirmware = 8, CanUploadFirmware = 16,
+                NeedDeviceSpecificFirmware = 32, HasSelfTest = 64,
+                CanReadMemory = 128, HasConnectedState = 256 };
+Q_DECLARE_FLAGS(Properties, Property)
+Q_DECLARE_OPERATORS_FOR_FLAGS(Properties)
+
+enum TargetPowerMode { TargetPowerModeFromConfig, TargetSelfPowered, TargetExternallyPowered };
+
+enum { Nb_InputFileTypes = 3 };
+extern const PURL::FileType INPUT_FILE_TYPE_DATA[Nb_InputFileTypes];
+
+class Group : public ::Group::Base
+{
+public:
+  virtual QString xmlName() const { return name(); }
+  virtual ::Hardware::Config *hardwareConfig() const { return 0; }
+  virtual Properties properties() const = 0;
+  virtual QString statusLabel(PortType type) const;
+  virtual bool canReadVoltages() const = 0;
+  virtual TargetPowerMode targetPowerMode() const = 0;
+  bool isDebugger() const { return ( properties() & Debugger ); }
+  bool isSoftware() const;
+  virtual bool isPortSupported(PortType type) const = 0;
+  virtual bool checkConnection(const HardwareDescription &hd) const;
+  ::Programmer::Base *createProgrammer(bool targetSelfPowered, const Device::Data *data, const HardwareDescription &hd) const;
+  ::Debugger::Base *createDebugger(::Programmer::Base &) const;
+  virtual uint maxNbBreakpoints(const Device::Data *) const { return 0; }
+  virtual bool isInputFileTypeSupported(PURL::FileType) const { return false; }
+  virtual ::Programmer::Base *createBase(const Device::Data *data) const = 0;
+
+protected:
+  virtual Hardware *createHardware(::Programmer::Base &base, const HardwareDescription &hd) const = 0;
+  virtual DeviceSpecific *createDeviceSpecific(::Programmer::Base &base) const = 0;
+  virtual ::Debugger::Base *createDebuggerBase(::Programmer::Base &) const { return 0; }
+  virtual ::Debugger::Specific *createDebuggerSpecific(::Debugger::Base &) const { return 0; }
+  virtual ::Debugger::DeviceSpecific *createDebuggerDeviceSpecific(::Debugger::Base &base) const = 0;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/base/prog_specific.cpp b/src/progs/base/prog_specific.cpp
new file mode 100644
index 0000000..a372e92
--- /dev/null
+++ b/src/progs/base/prog_specific.cpp
@@ -0,0 +1,51 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "prog_specific.h"
+
+#include "generic_prog.h"
+
+//-----------------------------------------------------------------------------
+Programmer::DeviceSpecific::DeviceSpecific(Programmer::Base &base)
+ : Log::Base(&base), _base(base)
+{}
+
+//-----------------------------------------------------------------------------
+Programmer::Hardware::Hardware(Programmer::Base &base, Port::Base *port, const QString &name)
+  : Log::Base(&base), _port(port), _name(name), _base(base)
+{}
+
+Programmer::Hardware::~Hardware()
+{
+  delete _port;
+}
+
+bool Programmer::Hardware::connectHardware()
+{
+  if (_port) _port->close();
+  return internalConnectHardware();
+}
+
+void Programmer::Hardware::disconnectHardware()
+{
+  if (_port) _port->close();
+  internalDisconnectHardware();
+}
+
+bool Programmer::Hardware::rawWrite(const QString &data)
+{
+  Q_ASSERT(_port);
+  QByteArray a = toAscii(data);
+  return _port->send(a.data(), a.count());
+}
+
+bool Programmer::Hardware::rawRead(uint size, QString &data)
+{
+  Q_ASSERT(_port);
+  return _port->receive(size, data);
+}
diff --git a/src/progs/base/prog_specific.h b/src/progs/base/prog_specific.h
new file mode 100644
index 0000000..1703bcb
--- /dev/null
+++ b/src/progs/base/prog_specific.h
@@ -0,0 +1,61 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PROG_SPECIFIC_H
+#define PROG_SPECIFIC_H
+
+#include <qfile.h>
+
+#include "common/global/log.h"
+#include "common/port/port_base.h"
+#include "common/global/progress_monitor.h"
+#include "hardware_config.h"
+
+namespace Programmer
+{
+class Base;
+
+//-----------------------------------------------------------------------------
+class DeviceSpecific : public Log::Base
+{
+public:
+  DeviceSpecific(::Programmer::Base &base);
+  virtual bool setTargetPowerOn(bool on) = 0;
+
+protected:
+  ::Programmer::Base &_base;
+
+  virtual bool setPowerOff() = 0;
+  virtual bool setPowerOn() = 0;
+};
+
+//-----------------------------------------------------------------------------
+class Hardware : public Log::Base
+{
+public:
+  Hardware(::Programmer::Base &base, Port::Base *port, const QString &name);
+  virtual ~Hardware();
+  Port::Description portDescription() const { return _port->description(); }
+  QString name() const { return _name; }
+  bool connectHardware();
+  bool rawWrite(const QString &data);
+  bool rawRead(uint size, QString &data);
+  void disconnectHardware();
+
+protected:
+  Port::Base *_port;
+  QString     _name;
+  ::Programmer::Base &_base;
+
+  virtual bool internalConnectHardware() = 0;
+  virtual void internalDisconnectHardware() {}
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/bootloader/Makefile.am b/src/progs/bootloader/Makefile.am
new file mode 100644
index 0000000..490a53d
--- /dev/null
+++ b/src/progs/bootloader/Makefile.am
@@ -0,0 +1,3 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+SUBDIRS = base gui
diff --git a/src/progs/bootloader/base/Makefile.am b/src/progs/bootloader/base/Makefile.am
new file mode 100644
index 0000000..7c7230d
--- /dev/null
+++ b/src/progs/bootloader/base/Makefile.am
@@ -0,0 +1,5 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libbootloader.la
+libbootloader_la_SOURCES = bootloader_prog.cpp bootloader.cpp
diff --git a/src/progs/bootloader/base/base.pro b/src/progs/bootloader/base/base.pro
new file mode 100644
index 0000000..f53b730
--- /dev/null
+++ b/src/progs/bootloader/base/base.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = bootloader
+HEADERS += bootloader.h bootloader_prog.h
+SOURCES += bootloader.cpp bootloader_prog.cpp
diff --git a/src/progs/bootloader/base/bootloader.cpp b/src/progs/bootloader/base/bootloader.cpp
new file mode 100644
index 0000000..a45a23f
--- /dev/null
+++ b/src/progs/bootloader/base/bootloader.cpp
@@ -0,0 +1,9 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "bootloader.h"
diff --git a/src/progs/bootloader/base/bootloader.h b/src/progs/bootloader/base/bootloader.h
new file mode 100644
index 0000000..08a0730
--- /dev/null
+++ b/src/progs/bootloader/base/bootloader.h
@@ -0,0 +1,42 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef BOOTLOADER_H
+#define BOOTLOADER_H
+
+#include "devices/pic/prog/pic_prog.h"
+
+namespace Bootloader
+{
+//-----------------------------------------------------------------------------
+class Hardware : public ::Programmer::PicHardware
+{
+public:
+  Hardware(::Programmer::Base &base, Port::Base *port) : ::Programmer::PicHardware(base, port, QString::null) {}
+  virtual bool write(Pic::MemoryRangeType type, const Device::Array &data) = 0;
+  virtual bool read(Pic::MemoryRangeType type, Device::Array &data, const ::Programmer::VerifyData *vdata) = 0;
+  virtual bool internalConnectHardware() = 0;
+  virtual bool openPort() { return _port->open(); }
+};
+
+//-----------------------------------------------------------------------------
+class DeviceSpecific : public ::Programmer::PicDeviceSpecific
+{
+public:
+  DeviceSpecific(::Programmer::Base &base) : ::Programmer::PicDeviceSpecific(base) {}
+  Hardware &hardware() { return static_cast<Hardware &>(*_base.hardware()); }
+  virtual bool setPowerOff() { return false; }
+  virtual bool setPowerOn() { return false; }
+  virtual bool setTargetPowerOn(bool) { return true; }
+  virtual bool doRead(Pic::MemoryRangeType type, Device::Array &data, const ::Programmer::VerifyData *vdata) { return hardware().read(type, data, vdata); }
+  virtual bool doWrite(Pic::MemoryRangeType type, const Device::Array &data, bool) { return hardware().write(type, data); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/bootloader/base/bootloader_prog.cpp b/src/progs/bootloader/base/bootloader_prog.cpp
new file mode 100644
index 0000000..61167f8
--- /dev/null
+++ b/src/progs/bootloader/base/bootloader_prog.cpp
@@ -0,0 +1,25 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "bootloader_prog.h"
+
+#include "progs/base/prog_config.h"
+
+//-----------------------------------------------------------------------------
+Bootloader::ProgrammerBase::ProgrammerBase(const Programmer::Group &group, const Pic::Data *data, const char *name)
+  : Programmer::PicBase(group, data, name)
+{}
+
+//-----------------------------------------------------------------------------
+bool Bootloader::Group::checkConnection(const ::Programmer::HardwareDescription &hd) const
+{
+  ::Programmer::Base *base = createProgrammer(false, 0, hd);
+  bool ok = static_cast<Hardware *>(base->hardware())->openPort();
+  delete base;
+  return ok;
+}
diff --git a/src/progs/bootloader/base/bootloader_prog.h b/src/progs/bootloader/base/bootloader_prog.h
new file mode 100644
index 0000000..7b9749e
--- /dev/null
+++ b/src/progs/bootloader/base/bootloader_prog.h
@@ -0,0 +1,37 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef BOOTLOADER_PROG_H
+#define BOOTLOADER_PROG_H
+
+#include "common/global/generic_config.h"
+#include "bootloader.h"
+
+namespace Bootloader
+{
+//-----------------------------------------------------------------------------
+class ProgrammerBase : public Programmer::PicBase
+{
+Q_OBJECT
+public:
+  ProgrammerBase(const Programmer::Group &group, const Pic::Data *data, const char *name);
+
+protected:
+  Hardware &hardware() { return static_cast<Hardware &>(*_hardware); }
+};
+
+//-----------------------------------------------------------------------------
+class Group : public ::Programmer::PicGroup
+{
+public:
+  virtual bool checkConnection(const ::Programmer::HardwareDescription &hd) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/bootloader/bootloader.pro b/src/progs/bootloader/bootloader.pro
new file mode 100644
index 0000000..fe430fe
--- /dev/null
+++ b/src/progs/bootloader/bootloader.pro
@@ -0,0 +1,2 @@
+TEMPLATE = subdirs
+SUBDIRS = base
diff --git a/src/progs/bootloader/gui/Makefile.am b/src/progs/bootloader/gui/Makefile.am
new file mode 100644
index 0000000..d52b42b
--- /dev/null
+++ b/src/progs/bootloader/gui/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libbootloaderui.la
+libbootloaderui_la_LDFLAGS = $(all_libraries)
+libbootloaderui_la_SOURCES = bootloader_ui.cpp
diff --git a/src/progs/bootloader/gui/bootloader_ui.cpp b/src/progs/bootloader/gui/bootloader_ui.cpp
new file mode 100644
index 0000000..df8595f
--- /dev/null
+++ b/src/progs/bootloader/gui/bootloader_ui.cpp
@@ -0,0 +1,9 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "bootloader_ui.h"
diff --git a/src/progs/bootloader/gui/bootloader_ui.h b/src/progs/bootloader/gui/bootloader_ui.h
new file mode 100644
index 0000000..386c412
--- /dev/null
+++ b/src/progs/bootloader/gui/bootloader_ui.h
@@ -0,0 +1,30 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef BOOTLOADER_UI_H
+#define BOOTLOADER_UI_H
+
+#include <qcheckbox.h>
+
+#include "progs/gui/prog_group_ui.h"
+#include "progs/gui/prog_config_widget.h"
+
+namespace Bootloader
+{
+
+//----------------------------------------------------------------------------
+class GroupUI : public ::Programmer::GroupUI
+{
+public:
+  virtual bool hasAdvancedDialog() const { return false; }
+  virtual ::Programmer::AdvancedDialog *createAdvancedDialog(::Programmer::Base &, QWidget *) const { return 0; }
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/direct/Makefile.am b/src/progs/direct/Makefile.am
new file mode 100644
index 0000000..fccf96d
--- /dev/null
+++ b/src/progs/direct/Makefile.am
@@ -0,0 +1,3 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+SUBDIRS = xml base gui
diff --git a/src/progs/direct/base/Makefile.am b/src/progs/direct/base/Makefile.am
new file mode 100644
index 0000000..99070fe
--- /dev/null
+++ b/src/progs/direct/base/Makefile.am
@@ -0,0 +1,13 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libdirectprog.la
+libdirectprog_la_SOURCES = direct_pic.cpp direct_baseline.cpp direct_16.cpp \
+	direct_16F.cpp direct_18.cpp direct_18F.cpp direct_prog.cpp direct_prog_config.cpp \
+	direct_data.cpp direct_mem24.cpp direct.cpp
+libdirectprog_la_DEPENDENCIES = direct_data.cpp
+
+noinst_DATA = direct.xml
+direct_data.cpp: ../xml/xml_direct_parser direct.xml
+	../xml/xml_direct_parser
+CLEANFILES = direct_data.cpp
diff --git a/src/progs/direct/base/base.pro b/src/progs/direct/base/base.pro
new file mode 100644
index 0000000..97253b4
--- /dev/null
+++ b/src/progs/direct/base/base.pro
@@ -0,0 +1,10 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = directprog
+HEADERS += direct.h direct_data.h direct_pic.h direct_mem24.h direct_prog.h \
+           direct_prog_config.h direct_baseline.h direct_16.h direct_16F.h \
+           direct_18.h direct_18F.h
+SOURCES += direct.cpp direct_data.cpp direct_pic.cpp direct_mem24.cpp direct_prog.cpp \
+           direct_prog_config.cpp direct_baseline.cpp direct_16.cpp direct_16F.cpp \
+           direct_18.cpp direct_18F.cpp
diff --git a/src/progs/direct/base/direct.cpp b/src/progs/direct/base/direct.cpp
new file mode 100644
index 0000000..fc53cf3
--- /dev/null
+++ b/src/progs/direct/base/direct.cpp
@@ -0,0 +1,394 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *   Copyright (C) Brian C. Lane                                           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "direct.h"
+
+#include <iostream>
+
+#include "common/port/parallel.h"
+#include "common/port/serial.h"
+#include "progs/base/generic_prog.h"
+#include "direct_prog_config.h"
+
+using namespace std;
+
+//-----------------------------------------------------------------------------
+const Direct::PinData Direct::PIN_DATA[Nb_PinTypes] = {
+  { I18N_NOOP("MCLR (Vpp)"),  "0 V", "13 V", "vpp",
+    I18N_NOOP("The VPP pin is used to select the high voltage programming mode."),
+    Port::Out, false, I18N_NOOP("Check this box to turn voltage on/off for this pin.") },
+  { I18N_NOOP("Power (Vdd)"), "0 V", "5 V",  "vdd",
+    I18N_NOOP("The VDD pin is used to apply 5V to the programmed device.\nMust be set to GND if your programmer doesn't control the VDD line."),
+    Port::Out, true,  I18N_NOOP("Check this box to turn voltage on/off for this pin.") },
+  { I18N_NOOP("Clock"),       "0 V", "5 V",  "clock",
+    I18N_NOOP("The CLOCK pin is used to synchronize serial data of the DATA IN and DATA OUT pins."),
+    Port::Out, false, I18N_NOOP("Check this box to turn voltage on/off for this pin.") },
+  { I18N_NOOP("Data Out"),    "0 V", "5 V",  "datao",
+    I18N_NOOP("The DATA OUT pin is used to send data to the programmed device."),
+    Port::Out, false, I18N_NOOP("Check this box to turn voltage on/off for this pin.") },
+  { I18N_NOOP("Data In"),     "0 V", "5 V",  "datai",
+    I18N_NOOP("The DATA IN pin is used to receive data from the programmed device."),
+    Port::In,  false, I18N_NOOP("This pin is driven by the programmed device.\nWithout device, it must follow the \"Data out\" pin (when powered on).") },
+  { I18N_NOOP("Data R/W"),    "Data in", "Data out", "drw",
+    I18N_NOOP("The DATA RW pin selects the direction of data buffer.\nMust be set to GND if your programmer does not use bi-directionnal buffer."),
+    Port::Out, true,  I18N_NOOP("Check this box to change DATA buffer direction.") }
+};
+
+//-----------------------------------------------------------------------------
+namespace Direct
+{
+class SerialPort : public Port::Serial
+{
+public:
+  SerialPort(const QString &device, Log::Base &base)
+    : Serial(device, NeedBreak, base) {}
+
+  bool open() {
+    if ( !Port::Serial::open() ) return false;
+    if ( !setMode(IgnoreBreak | IgnoreParity, ByteSize8 | EnableReceiver | IgnoreControlLines, S9600, 0) ) return false;
+    // set up lines for "idle state" ???
+    return true;
+  }
+};
+} // namespace
+
+//-----------------------------------------------------------------------------
+Direct::Hardware::Hardware(::Programmer::Base &base, Port::Base *port, const HardwareData &data)
+  : ::Programmer::PicHardware(base, port, data.name), _data(data.data)
+{}
+
+bool Direct::Hardware::internalConnectHardware()
+{
+  if ( !_port->open() ) return false;
+
+  // keep the safe state of rw (read)...
+  setPin(DataOut, Low);
+  setPin(Clock, Low);
+  setPin(Vpp, Off);
+  setPin(Vdd, Off);
+  setRead();
+
+  return true;
+}
+
+void Direct::Hardware::setPin(PinType type, bool on)
+{
+  int pin = _data.pins[type];
+  if ( isGroundPin(pin) ) return;
+  uint p = (pin<0 ? -pin : pin)-1;
+  //log(Log::DebugLevel::Extra, QString("Hardware::setPin %1 %2: %3 %4").arg(PIN_DATA[type].label).arg(pin).arg(on).arg(_data.clockDelay));
+  _port->setPinOn(p, on, (pin<0 ? Port::NegativeLogic : Port::PositiveLogic));
+  if ( type==Clock ) Port::usleep(_data.clockDelay);
+}
+
+bool Direct::Hardware::readBit()
+{
+  int pin = _data.pins[DataIn];
+  Q_ASSERT( pin!=0 );
+  uint p = (pin<0 ? -pin : pin)-1;
+  bool on;
+  _port->readPin(p, (pin<0 ? Port::NegativeLogic : Port::PositiveLogic), on);
+  //log(Log::DebugLevel::Extra, QString("Hardware::read DataIn %2: %3").arg(pin).arg(on));
+  return on;
+}
+
+uint Direct::Hardware::nbPins(Port::IODir dir) const
+{
+  return _port->pinData(dir).count();
+}
+
+QString Direct::Hardware::pinLabelForIndex(Port::IODir dir, uint i) const
+{
+  Port::PinData pd = _port->pinData(dir)[i];
+  return QString("%1 (%2)").arg(pd.pin+1).arg(pd.label);
+}
+
+Port::IODir Direct::Hardware::ioTypeForPin(int pin) const
+{
+  if ( isGroundPin(pin) ) return Port::NoIO;
+  uint p = (pin<0 ? -pin : pin)-1;
+  return _port->ioDir(p);
+}
+
+uint Direct::Hardware::pinForIndex(Port::IODir dir, uint i) const
+{
+  Q_ASSERT( i<=uint(_port->pinData(dir).count()) );
+  if ( i==uint(_port->pinData(dir).count()) ) return _port->groundPin()+1;
+  return _port->pinData(dir)[i].pin+1;
+}
+
+uint Direct::Hardware::indexForPin(Port::IODir dir, int pin) const
+{
+  QValueVector<Port::PinData> v = _port->pinData(dir);
+  Q_ASSERT( pin!=0 );
+  uint p = (pin<0 ? -pin : pin)-1;
+  for (uint i=0; i<uint(v.count()); i++)
+    if ( v[i].pin==p ) return i;
+  Q_ASSERT( isGroundPin(pin) );
+  return v.count();
+}
+
+bool Direct::Hardware::isGroundPin(int pin) const
+{
+  Q_ASSERT( pin!=0 );
+  uint p = (pin<0 ? -pin : pin)-1;
+  return _port->isGroundPin(p);
+}
+
+bool Direct::operator !=(const HData &d1, const HData &d2)
+{
+  for (uint i=0; i<Nb_PinTypes; i++)
+    if ( d1.pins[i]!=d2.pins[i] ) return true;
+  if ( d1.clockDelay!=d2.clockDelay ) return true;
+  return false;
+}
+
+//-----------------------------------------------------------------------------
+Direct::SerialHardware::SerialHardware(::Programmer::Base &base, const QString &portDevice, const HardwareData &data)
+  : Hardware(base, new SerialPort(portDevice, base), data)
+{}
+
+Direct::ParallelHardware::ParallelHardware(::Programmer::Base &base, const QString &portDevice, const HardwareData &data)
+  : Hardware(base, new Port::Parallel(portDevice, base), data)
+{}
+
+/*
+//-----------------------------------------------------------------------------
+int Direct::Hardware::hardware_test()
+{
+    char t[80] ;
+
+    cout << endl << "Please execute this Direct::Hardware test without any PIC"
+    " connected to your programmer" <<endl << endl ;
+
+    do
+    {
+        cout << "Ready for tests ? (y/n) " ;
+        cin >> t ;
+    } while(t[0] != 'y' && t[0] != 'n') ;
+    if( t[0] == 'n') return -1 ;
+
+
+    // stage 1 - hard initialization
+    // setpins("parallel","/dev/parport0", -5, -4, 3, 2, 10) ;
+
+    //Default RW line not used...
+    HData data = { { 3, 5, 7, 4, 8, 0 }, 0 };
+    Log::ConsoleView view;
+    Direct::Programmer programmer;
+    programmer.setView(&view);
+    SerialHardware hw(programmer, "/dev/ttyS0", data);
+    if ( !hw.connectHardware() ) {
+        cout << "Direct::Hardware initialization error" <<endl ;
+        return 1 ;
+    }
+
+
+    //++Mirko!!
+    //By Ciri 11/3/2004...
+    //From here to the end of function i haven't modified nothing...
+    //--Mirko!!
+
+    // stage 2 - all lines off
+    hw.setPin(Vpp, Off);
+    hw.setPin(Vdd, Off);
+    hw.setPin(Clock, Low);
+    hw.setPin(DataOut, Low);
+    cout << "All the following lines must be 0V : " << endl <<
+    "16F84 pin 13 (data out)"<<endl <<
+    "16F84 pin 12 (clock)"<<endl <<
+    "16F84 pin 14 (VDD=power)"<<endl <<
+    "16F84 pin 4  (VPP=prog)"<<endl ;
+    do
+    {
+        cout << "OK ? (y/n) " ;
+        cin >> t ;
+    } while(t[0] != 'y' && t[0] != 'n') ;
+
+    if( t[0] == 'n') return 2 ;
+
+    // stage 3 - data out check
+    hw.setPin(DataOut, High);
+    cout << "16F84 pin 13 (data out) must be 5V"<<endl ;
+    do
+    {
+        cout << "OK ? (y/n) " ;
+        cin >> t ;
+    } while(t[0] != 'y' && t[0] != 'n') ;
+    hw.setPin(DataOut, Low);
+
+    if( t[0] == 'n') return 3 ;
+
+    // stage 4 - clock check
+    hw.setPin(Clock, High);
+    cout << "16F84 pin 12 (clock) must be 5V"<<endl ;
+    do
+    {
+        cout << "OK ? (y/n) " ;
+        cin >> t ;
+    } while(t[0] != 'y' && t[0] != 'n') ;
+    hw.setPin(Clock, Low);
+
+    if( t[0] == 'n') return 4 ;
+
+    // stage 5 - VDD check
+    hw.setPin(Vdd, On);
+    cout << "16F84 pin 14 (power) must be 5V"<<endl ;
+    do
+    {
+        cout << "OK ? (y/n) " ;
+        cin >> t ;
+    } while(t[0] != 'y' && t[0] != 'n') ;
+    hw.setPin(Vdd, Off) ;
+
+    if( t[0] == 'n') return 5 ;
+
+    // stage 6 - VPP check
+    hw.setPin(Vpp, On);
+    cout << "16F84 pin 4 (VDD) must be between 13V and 14V"<<endl ;
+    do
+    {
+        cout << "OK ? (y/n) " ;
+        cin >> t ;
+    } while(t[0] != 'y' && t[0] != 'n') ;
+    hw.setPin(Vpp , Off);
+
+    if( t[0] == 'n') return 6 ;
+
+    // stage 7 - test input data
+    // set data out hi, because bi-directionnal
+    // on pin 13 uses the open collector capability of 7407
+    hw.setPin(DataOut, High);
+    int in = hw.readBit();
+    if( !in )
+    {
+        cout << "DataIn error (16F84 pin 13) : must be 5V and is not" << endl ;
+        return 7 ;
+    }
+    cout << "Please set 16F84 pin 13 (DataIn) low " <<
+    "(connect it to 16F84 pin 5 - GND)" << endl ;
+    do
+    {
+        cout << "Done ? (y/n) " ;
+        cin >> t ;
+    } while(t[0] != 'y' && t[0] != 'n') ;
+
+    in = hw.readBit();
+    if(in )
+    {
+        cout << "DataIn error (pin 13) : must be 0V and is not" << endl ;
+        return 7 ;
+    }
+
+    cout << "Congratulations! - Direct::Hardware is OK." <<endl ;
+    return 0 ;
+}
+
+// this is my specific speed test
+int Direct::Hardware::timing_test()
+{
+    char t[80] ;
+    int cmd ;
+    long loop = 50000000 ;
+
+    cout << endl << "Please execute this Direct::Hardware test without any PIC"
+    " connected to your programmer" <<endl << endl ;
+
+    do
+    {
+        cout << "Ready for tests ? (y/n) " ;
+        cin >> t ;
+    } while(t[0] != 'y' && t[0] != 'n') ;
+    if( t[0] == 'n') return -1 ;
+
+
+    // stage 1 - hard initialization
+    //Default Line RW not used...
+    HData data = { { -5, -4, 3, 2, 10, 25 }, 0 };
+    Log::ConsoleView view;
+    Log::Manager manager;
+    manager.setView(&view);
+    ParallelHardware hw("/dev/parport0", manager, data);
+    if ( !hw.connectHardware() ) {
+        cout << "Direct::Hardware initialization error" <<endl ;
+        return 1 ;
+    }
+
+    //++Mirko!!
+    //By Ciri 11/3/2004...
+    //From here to the end of function i have modified nothing...
+    //--Mirko!!
+
+    // stage 2 - all lines off
+    hw.setPin(Vpp, Off);
+    hw.setPin(Vdd, Off);
+    hw.setPin(Clock, Low);
+    hw.setPin(DataOut, Low);
+
+    // stage 3 - choose test
+    cout << "Remember : " << endl <<
+    "16F84 pin 5  is GND"<<endl <<
+    "16F84 pin 13 is data-out"<<endl <<
+    "16F84 pin 12 is clock"<<endl ;
+
+    cout << loop << " periods test .... " << endl ;
+
+    cout << "1 - Maximum speed clock " << endl <<
+    "2 - 100us half period "<<endl <<
+    "3 - load data 0x2AAA (programmer->chip)"<<endl <<
+    "4 - end"<<endl ;
+    do
+    {
+        cout << "CMD (1-4)>> " ;
+        cin >> cmd ;
+    } while(cmd < 1 || cmd > 4) ;
+
+    if(cmd == 4) return 2 ;
+    else if ( cmd == 1)
+    {
+        for(long j=0 ; j < loop ; ++j)
+        {
+            hw.setPin(Clock, Low);
+            hw.setPin(Clock, High);
+        }
+    }
+
+    else if ( cmd == 2)
+    {
+        for(long j=0 ; j < loop ; ++j)
+        {
+            hw.setPin(Clock, Low);
+            Port::usleep(100);
+            hw.setPin(Clock, High);
+            Port::usleep(100);
+        }
+    }
+
+    else if ( cmd == 3) {
+        for (long j=0; j<loop; ++j)
+        {
+            int d = 0x2AAA ;
+            d &= 0x3FFF ;               // mask unused msb
+            d <<= 1;                // insert start bit
+
+            for (uint x = 0; x<16; x++) {
+                hw.setPin(Clock, High);
+                if ( d & 0x01 ) hw.setPin(DataOut, High);
+                else hw.setPin(DataOut, Low);
+                hw.setPin(Clock, Low);
+                d >>= 1;
+            }
+            hw.setPin(DataOut, High);
+        }
+    }
+
+    return 0;
+}
+*/
diff --git a/src/progs/direct/base/direct.h b/src/progs/direct/base/direct.h
new file mode 100644
index 0000000..6a890b0
--- /dev/null
+++ b/src/progs/direct/base/direct.h
@@ -0,0 +1,90 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *   Copyright (C) Brian C. Lane                                           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DIRECT_H
+#define DIRECT_H
+
+#include "devices/pic/prog/pic_prog.h"
+
+namespace Direct
+{
+enum State { Low = 0, High = 1, Off = Low, On = High };
+enum PinType { Vpp = 0, Vdd, Clock, DataOut, DataIn, DataRW, Nb_PinTypes };
+struct PinData {
+  const char *label, *offLabel, *onLabel, *key, *comment;
+  Port::IODir dir;
+  bool canBeGround;
+  const char *testComment;
+};
+extern const PinData PIN_DATA[Nb_PinTypes];
+
+//-----------------------------------------------------------------------------
+class HardwareData;
+enum Type { Normal, EPEToolkitMK3 };
+struct HData
+{
+  int pins[Nb_PinTypes];
+  uint clockDelay;
+  Type type;
+};
+
+class Hardware : public ::Programmer::PicHardware
+{
+public:
+  static Hardware *create(Port::Base *port, const Device::Data &device, const HData &data);
+
+public:
+  Hardware(::Programmer::Base &base, Port::Base *port, const HardwareData &data);
+  bool readBit();
+  void setPin(PinType type, bool on);
+  void setRead() { setPin(DataRW, true); }
+  void setWrite() { setPin(DataRW, false); }
+
+  uint nbPins(Port::IODir dir) const;
+  QString pinLabelForIndex(Port::IODir dir, uint i) const;
+  Port::IODir ioTypeForPin(int pin) const;
+  uint pinForIndex(Port::IODir dir, uint i) const;
+  uint indexForPin(Port::IODir dir, int pin) const;
+  bool isGroundPin(int pin) const;
+  Type type() const { return _data.type; }
+
+  // hardware test --- please use it for a newly
+  // designed/constructed programmer board
+  // because pin assignation is hard coded in this
+  // routine, you might have to edit it. ++Gib:
+  //static int hardware_test();
+  // timing test --- please use it to ensure that
+  // the program meets the  timing specifications
+  //static int timing_test();
+
+private:
+  HData _data;
+
+  virtual bool internalConnectHardware();
+
+  friend class Programmer;
+};
+extern bool operator !=(const HData &d1, const HData &d2);
+
+class SerialHardware : public Hardware
+{
+public:
+  SerialHardware(::Programmer::Base &base, const QString &portDevice, const HardwareData &data);
+};
+
+class ParallelHardware : public Hardware
+{
+public:
+  ParallelHardware(::Programmer::Base &base, const QString &portDevice, const HardwareData &data);
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/direct/base/direct.xml b/src/progs/direct/base/direct.xml
new file mode 100644
index 0000000..4997450
--- /dev/null
+++ b/src/progs/direct/base/direct.xml
@@ -0,0 +1,291 @@
+<!-- ************************************************************************* -->
+<!-- * Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             * -->
+<!-- *                                                                       * -->
+<!-- * This program is free software; you can redistribute it and/or modify  * -->
+<!-- * it under the terms of the GNU General Public License as published by  * -->
+<!-- * the Free Software Foundation; either version 2 of the License, or     * -->
+<!-- * (at your option) any later version.                                   * -->
+<!-- *************************************************************************/-->
+<!DOCTYPE piklab>
+
+<type name="direct">
+  <device name="10F200"   family="10F2XX" support_type="tested" />
+  <device name="10F202"   family="10F2XX" support_type="tested" />
+  <device name="10F204"   family="10F2XX" support_type="tested" />
+  <device name="10F206"   family="10F2XX" support_type="tested" />
+  <device name="10F220"   family="10F2XX" />
+  <device name="10F222"   family="10F2XX" />
+  <device name="12F508"   family="10F2XX" support_type="tested" />
+  <device name="12F509"   family="10F2XX" support_type="tested" />
+  <device name="12F510"   family="10F2XX" support_type="tested" />
+
+  <device name="12C508"   family="12C5XX" />
+  <device name="12C508A"  family="12C5XX" />
+  <device name="12C509"   family="12C5XX" />
+  <device name="12C509A"  family="12C5XX" />
+  <device name="12CE518"  family="12C5XX" />
+  <device name="12CE519"  family="12C5XX" />
+  <device name="12CR509A" family="12C5XX" />
+
+  <device name="12C671"   family="12C67X" />
+  <device name="12C672"   family="12C67X" />
+  <device name="12CE673"  family="12C67X" />
+  <device name="12CE674"  family="12C67X" />
+
+  <device name="12F629"   family="12F675" />
+  <device name="12F675"   family="12F675" support_type="tested" />
+
+  <device name="12F635"   family="12F6XX_16F6XX" />
+  <device name="12F683"   family="12F6XX_16F6XX" />
+
+  <device name="14000"  family="12C67X" />
+
+  <device name="16C432"  family="12C67X" />
+  <device name="16C433"  family="12C67X" />
+
+  <device name="16C505"  family="12C5XX" />
+
+  <device name="16C554"  family="12C67X" />
+  <device name="16C557"  family="12C67X" />
+  <device name="16C558"  family="12C67X" />
+
+  <device name="16C52"    family="12C5XX" />
+  <device name="16C54"    family="12C5XX" />
+  <device name="16C54A"   family="12C5XX" />
+  <device name="16C54B"   family="12C5XX" />
+  <device name="16C54C"   family="12C5XX" />
+  <device name="16CR54A"  family="12C5XX" />
+  <device name="16CR54B"  family="12C5XX" />
+  <device name="16CR54C"  family="12C5XX" />
+  <device name="16C55"    family="12C5XX" />
+  <device name="16C55A"   family="12C5XX" />
+  <device name="16C56"    family="12C5XX" />
+  <device name="16C56A"   family="12C5XX" />
+  <device name="16CR56A"  family="12C5XX" />
+  <device name="16C57"    family="12C5XX" />
+  <device name="16C57C"   family="12C5XX" />
+  <device name="16CR57B"  family="12C5XX" />
+  <device name="16CR57C"  family="12C5XX" />
+  <device name="16C58A"   family="12C5XX" />
+  <device name="16C58B"   family="12C5XX" />
+  <device name="16CR58A"  family="12C5XX" />
+  <device name="16CR58B"  family="12C5XX" />
+
+  <device name="16C61"    family="12C67X" />
+  <device name="16C62"    family="12C67X" />
+  <device name="16C620"   family="12C67X" />
+  <device name="16C620A"  family="12C67X" />
+  <device name="16C621"   family="12C67X" />
+  <device name="16C621A"  family="12C67X" />
+  <device name="16C622"   family="12C67X" />
+  <device name="16C622A"  family="12C67X" />
+  <device name="16C62A"   family="12C67X" />
+  <device name="16C62B"   family="12C67X" />
+  <device name="16C63"    family="12C67X" />
+  <device name="16C63A"   family="12C67X" />
+  <device name="16C64"    family="12C67X" />
+  <device name="16C64A"   family="12C67X" />
+  <device name="16C65"    family="12C67X" />
+  <device name="16C65A"   family="12C67X" />
+  <device name="16C65B"   family="12C67X" />
+  <device name="16C66"    family="12C67X" />
+  <device name="16C67"    family="12C67X" />
+  <device name="16C71"    family="12C67X" />
+  <device name="16C710"   family="12C67X" />
+  <device name="16C711"   family="12C67X" />
+  <device name="16C712"   family="12C67X" />
+  <device name="16C715"   family="12C67X" />
+  <device name="16C716"   family="12C67X" />
+  <device name="16C72"    family="12C67X" />
+  <device name="16CR72"   family="12C67X" />
+  <device name="16C72A"   family="12C67X" />
+  <device name="16C73"    family="12C67X" />
+  <device name="16C73A"   family="12C67X" />
+  <device name="16C73B"   family="12C67X" />
+  <device name="16C74"    family="12C67X" />
+  <device name="16C745"   family="12C67X" />
+  <device name="16C74A"   family="12C67X" />
+  <device name="16C74B"   family="12C67X" />
+  <device name="16C76"    family="12C67X" />
+  <device name="16C765"   family="12C67X" />
+  <device name="16C77"    family="12C67X" />
+  <device name="16C773"   family="12C67X" />
+  <device name="16C774"   family="12C67X" />
+  <device name="16C923"   family="12C67X" />
+  <device name="16C924"   family="12C67X" />
+  <device name="16C925"   family="12C67X" />
+  <device name="16C926"   family="12C67X" />
+  <device name="16CE623"  family="12C67X" />
+  <device name="16CE624"  family="12C67X" />
+  <device name="16CE625"  family="12C67X" />
+  <device name="16CR62"   family="12C67X" />
+  <device name="16CR620A" family="12C67X" />
+  <device name="16CR63"   family="12C67X" />
+  <device name="16CR64"   family="12C67X" />
+  <device name="16CR65"   family="12C67X" />
+  <device name="16C642"   family="12C67X" />
+  <device name="16C662"   family="12C67X" />
+  <device name="16C717"   family="12C67X" />
+  <device name="16C770"   family="12C67X" />
+  <device name="16C771"   family="12C67X" />
+  <device name="16C781"   family="12C67X" />
+  <device name="16C782"   family="12C67X" />
+
+  <device name="16F54"    family="10F2XX" />
+  <device name="16F57"    family="16F57"  />
+  <device name="16F59"    family="16F57"  />
+  <device name="16F505"   family="10F2XX" />
+  <device name="16F506"   family="10F2XX" />
+
+  <device name="16C84"    family="16CR8X" />
+  <device name="16CR83"   family="16CR8X" />
+  <device name="16CR84"   family="16CR8X" />
+  <device name="16F627"   family="16F62X" />
+  <device name="16F627A"  family="16F62XA" />
+  <device name="16F628"   family="16F62X" />
+  <device name="16F628A"  family="16F62XA" />
+  <device name="16F630"   family="12F675" />
+
+  <device name="16F636"   family="12F6XX_16F6XX" />
+  <device name="16F639"   family="12F6XX_16F6XX" />
+  <device name="16F648A"  family="16F62XA" />
+  <device name="16F676"   family="12F675" />
+  <device name="16F684"   family="12F6XX_16F6XX" />
+  <device name="16F685"   family="12F6XX_16F6XX" />
+  <device name="16F687"   family="12F6XX_16F6XX" />
+  <device name="16F688"   family="12F6XX_16F6XX" />
+  <device name="16F689"   family="12F6XX_16F6XX" />
+  <device name="16F690"   family="12F6XX_16F6XX" />
+  <device name="16F716"   family="12C67X" />
+  <device name="16F73"    family="16F7X" />
+  <device name="16F74"    family="16F7X" />
+  <device name="16F76"    family="16F7X" />
+  <device name="16F77"    family="16F7X" />
+  <device name="16F737"   family="16F7X" support_type="tested" />
+  <device name="16F747"   family="16F7X" support_type="tested" />
+  <device name="16F767"   family="16F7X" support_type="tested" />
+  <device name="16F777"   family="16F7X" support_type="tested" />
+  <device name="16F785"   family="16F913" />
+  <device name="16F818"   family="16F81X" />
+  <device name="16F819"   family="16F81X" />
+  <device name="16F83"    family="16F8X" />
+  <device name="16F84"    family="16F8X" />
+  <device name="16F84A"   family="16F84A" />
+  <device name="16F87"    family="16F81X" />
+  <device name="16F870"   family="16F87X" />
+  <device name="16F871"   family="16F87X" support_type="tested" />
+  <device name="16F872"   family="16F87X" support_type="tested" />
+  <device name="16F873"   family="16F87X" support_type="tested" />
+  <device name="16F873A"  family="16F87XA" />
+  <device name="16F874"   family="16F87X" support_type="tested" />
+  <device name="16F874A"  family="16F87XA" />
+  <device name="16F876"   family="16F87X" support_type="tested" />
+  <device name="16F876A"  family="16F87XA" />
+  <device name="16F877"   family="16F87X" support_type="tested" />
+  <device name="16F877A"  family="16F87XA" />
+  <device name="16F88"    family="16F81X" />
+  <device name="16F913"    family="16F913" />
+  <device name="16F914"    family="16F913" />
+  <device name="16F916"    family="16F916" />
+  <device name="16F917"    family="16F916" />
+  <device name="16F946"    family="16F916" />
+
+  <device name="18F1220"  family="18F1220" support_type="tested" />
+  <device name="18F1320"  family="18F1220" support_type="tested" />
+  <device name="18F2220"  family="18F1220" support_type="tested" />
+  <device name="18F2320"  family="18F1220" support_type="tested" />
+  <device name="18F4220"  family="18F1220" support_type="tested" />
+  <device name="18F4320"  family="18F1220" support_type="tested" />
+
+  <device name="18F242"   family="18F242"  support_type="tested" />
+  <device name="18F248"   family="18F242"  support_type="tested" />
+  <device name="18F252"   family="18F242"  support_type="tested" />
+  <device name="18F258"   family="18F242"  support_type="tested" />
+  <device name="18F442"   family="18F242"  support_type="tested" />
+  <device name="18F448"   family="18F242"  support_type="tested" />
+  <device name="18F452"   family="18F242"  support_type="tested" />
+  <device name="18F458"   family="18F242"  support_type="tested" />
+
+  <device name="18F1230"  family="18F2221" />
+  <device name="18F1330"  family="18F2221" />
+  <device name="18F2221"  family="18F2221" />
+  <device name="18F2321"  family="18F2221" />
+  <device name="18F4221"  family="18F2221" />
+  <device name="18F4321"  family="18F2221" />
+  <device name="18F2410"  family="18F2221" />
+  <device name="18F2510"  family="18F2221" />
+  <device name="18F4410"  family="18F2221" />
+  <device name="18F4510"  family="18F2221" />
+  <device name="18F2420"  family="18F2221" />
+  <device name="18F2520"  family="18F2221" />
+  <device name="18F4420"  family="18F2221" />
+  <device name="18F4520"  family="18F2221" />
+  <device name="18F2480"  family="18F2221" />
+  <device name="18F2580"  family="18F2221" />
+  <device name="18F4480"  family="18F2221" />
+  <device name="18F4580"  family="18F2221" />
+  <device name="18F2455"  family="18F2221" support_type="tested" />
+  <device name="18F2450"  family="18F2221" />
+  <device name="18F2550"  family="18F2221" />
+  <device name="18F4455"  family="18F2221" />
+  <device name="18F4450"  family="18F2221" />
+  <device name="18F4550"  family="18F2221" support_type="tested" />
+  <device name="18F2515"  family="18F2221" />
+  <device name="18F2525"  family="18F2221" />
+  <device name="18F2610"  family="18F2221" />
+  <device name="18F2620"  family="18F2221" />
+  <device name="18F4515"  family="18F2221" />
+  <device name="18F4525"  family="18F2221" />
+  <device name="18F4610"  family="18F2221" />
+  <device name="18F4620"  family="18F2221" />
+  <device name="18F2585"  family="18F2221" />
+  <device name="18F2680"  family="18F2221" />
+  <device name="18F4585"  family="18F2221" />
+  <device name="18F4680"  family="18F2221" />
+  <device name="18F2682"  family="18F2221" />
+  <device name="18F4682"  family="18F2221" />
+  <device name="18F2685"  family="18F2221" />
+  <device name="18F4685"  family="18F2221" />
+
+  <device name="18F6525"  family="18F242"  />
+  <device name="18F6621"  family="18F242"  />
+  <device name="18F8525"  family="18F242"  />
+  <device name="18F8621"  family="18F242"  />
+  <device name="18F2331"  family="18F242"  />
+  <device name="18F2431"  family="18F242"  />
+  <device name="18F4331"  family="18F242"  />
+  <device name="18F4431"  family="18F242"  />
+  <device name="18F6585"  family="18F242"  />
+  <device name="18F6680"  family="18F242"  />
+  <device name="18F8585"  family="18F242"  />
+  <device name="18F8680"  family="18F242"  />
+  <device name="18F6520"  family="18F242"  />
+  <device name="18F6620"  family="18F242"  />
+  <device name="18F6720"  family="18F242"  />
+  <device name="18F8520"  family="18F242"  />
+  <device name="18F8620"  family="18F242"  />
+  <device name="18F8720"  family="18F242"  />
+
+  <device name="18F2439"  family="18F2439" />
+  <device name="18F4439"  family="18F2439" />
+  <device name="18F2539"  family="18F2539" />
+  <device name="18F4539"  family="18F2539" />
+
+  <device name="18F6310"  family="18F6310" />
+  <device name="18F6410"  family="18F6310" />
+  <device name="18F8310"  family="18F6310" />
+  <device name="18F8410"  family="18F6310" />
+  <device name="18F6390"  family="18F6310" />
+  <device name="18F6490"  family="18F6310" />
+  <device name="18F8390"  family="18F6310" />
+  <device name="18F8490"  family="18F6310" />
+
+  <device name="18F6527"  family="18F6527" />
+  <device name="18F6622"  family="18F6527" />
+  <device name="18F6627"  family="18F6527" />
+  <device name="18F6722"  family="18F6527" />
+  <device name="18F8527"  family="18F6527" />
+  <device name="18F8622"  family="18F6527" />
+  <device name="18F8627"  family="18F6527" />
+  <device name="18F8722"  family="18F6527" />
+</type>
diff --git a/src/progs/direct/base/direct_16.cpp b/src/progs/direct/base/direct_16.cpp
new file mode 100644
index 0000000..124b35e
--- /dev/null
+++ b/src/progs/direct/base/direct_16.cpp
@@ -0,0 +1,150 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2003-2005 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "direct_16.h"
+
+#include "common/global/global.h"
+
+//----------------------------------------------------------------------------
+void Direct::pic16::send_bits(BitValue d, uint nbb)
+{
+    hardware().setWrite();
+    for (uint x = nbb; x; --x) {
+        hardware().setPin(Clock, High);
+        if ( d.bit(0) ) hardware().setPin(DataOut, High);
+        else hardware().setPin(DataOut, Low);
+        Port::usleep(1+_clockDelay);
+        hardware().setPin(Clock, Low);
+        Port::usleep(1+_clockDelay);
+        d >>= 1;
+    }
+    hardware().setPin(DataOut, High);
+    hardware().setRead();
+}
+
+void Direct::pic16::send_word(BitValue d)
+{
+    hardware().setWrite();
+    d <<= 1;      // insert start bit
+    for (uint x = 0; x<16; x++) {
+        hardware().setPin(Clock, High);
+        if ( d.bit(0) ) hardware().setPin(DataOut, High);
+        else hardware().setPin(DataOut, Low);
+        Port::usleep(1+_clockDelay) ;  // needed for slow programmers/fast PCs
+        hardware().setPin(Clock, Low);
+        Port::usleep(1+_clockDelay) ;
+        d >>= 1;                     // Move the data over 1 bit
+    }
+    hardware().setPin(DataOut, High);  // Added for ITU-1 support
+    hardware().setRead();
+}
+
+// Read 14 bits of data from the PIC
+// clock idles low, change data. 1 start bit, 1 stop bit, data valid on falling edge.
+BitValue Direct::pic16::get_word()
+{
+    hardware().setRead();
+    BitValue ind = 0;
+    hardware().setPin(DataOut, High);
+    for (uint x = 16; x ; --x) {
+        hardware().setPin(Clock, High);
+        Port::usleep(1+_clockDelay);
+        if ( hardware().readBit() ) ind |= 0x8000;
+        else ind = ind.maskWith(0x7FFF);
+        ind >>= 1;
+        hardware().setPin(Clock, Low);
+        Port::usleep(1+_clockDelay);
+    }
+    return ind;
+}
+
+bool Direct::pic16::incrementPC(uint steps)
+{
+  for (uint i=0; i<steps; i++) pulseEngine("k6,");
+  return true;
+}
+
+BitValue Direct::pic16::readWord(Pic::MemoryRangeType type)
+{
+  if ( type==Pic::MemoryRangeType::Eeprom ) return pulseEngine("k5,r,");
+  return pulseEngine("k4,R,");
+}
+
+bool Direct::pic16::doRead(Pic::MemoryRangeType type, Device::Array &data, const ::Programmer::VerifyData *vdata)
+{
+  data.resize(device().nbWords(type));
+  gotoMemory(type);
+  uint nbWords = data.count();
+  bool only = false;
+  if (vdata) {
+    bool only = vdata->actions & ::Programmer::OnlyProgrammedVerify;
+    const Device::Array wdata = static_cast<const Pic::Memory &>(vdata->memory).arrayForWriting(type);
+    if (only) nbWords = findNonMaskEnd(type, wdata)+1;
+  }
+  BitValue mask = device().mask(type);
+  for (uint i = 0; i<nbWords; i++) {
+    if ( !only || data[i]!=mask || type!=Pic::MemoryRangeType::Code ) {
+      data[i] = readWord(type).maskWith(mask);
+      if ( vdata && !hardware().verifyWord(i, data[i], type, *vdata) ) return false;
+    }
+    incrementPC(1);
+  }
+  if ( type==Pic::MemoryRangeType::Code || type==Pic::MemoryRangeType::Eeprom )
+    _base.progressMonitor().addTaskProgress(data.count());
+  return true;
+}
+
+bool Direct::pic16::doWrite(Pic::MemoryRangeType type, const Device::Array &data, bool force)
+{
+  gotoMemory(type);
+  for (uint i = 0; i<data.count(); ) {
+    if ( !writeWords(type, data, i, force) ) {
+      log(Log::LineType::Error, i18n("Error programming %1 at %2.").arg(type.label()).arg(toHexLabel(i, 8)));
+      return false;
+    }
+  }
+  return true;
+}
+
+bool Direct::pic16::skipMaskWords(Pic::MemoryRangeType type, const Device::Array &data, uint &i, bool force)
+{
+  if (force) return false;
+  uint nb = (type==Pic::MemoryRangeType::Code ? nbWordsCodeProg() : 1);
+  for (uint k=0; k<nb; k++)
+    if ( data[i+k]!=device().mask(type) ) return false;
+  incrementPC(nb);
+  i += nb;
+  return true;
+}
+
+bool Direct::pic16::writeWords(Pic::MemoryRangeType type, const Device::Array &data, uint i)
+{
+  if ( type==Pic::MemoryRangeType::Eeprom) pulseEngine("k3,S,", data[i]);
+  else {
+    uint nb = (type==Pic::MemoryRangeType::Code ? nbWordsCodeProg() : 1);
+    for (uint k=0; k<nb; k++) {
+      if ( k!=0 ) incrementPC(1);
+      pulseEngine("k2,S,", data[i+k]);
+    }
+  }
+  startProg(type);
+  QString cmd = QString("w%1").arg(waitProgTime(type));
+  pulseEngine(cmd.latin1());
+  endProg(type);
+  return true;
+}
+
+bool Direct::pic16::writeWords(Pic::MemoryRangeType type, const Device::Array &data, uint &i, bool force)
+{
+  if ( skipMaskWords(type, data, i, force) ) return true;
+  if ( !writeWords(type, data, i) ) return false;
+  incrementPC(1);
+  i += (type==Pic::MemoryRangeType::Code ? nbWordsCodeProg() : 1);
+  return true;
+}
diff --git a/src/progs/direct/base/direct_16.h b/src/progs/direct/base/direct_16.h
new file mode 100644
index 0000000..683083e
--- /dev/null
+++ b/src/progs/direct/base/direct_16.h
@@ -0,0 +1,46 @@
+/***************************************************************************
+ *   Copyright (C) 2003-2005 Alain Gibaud <alain.gibaud@free.fr>           *
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DIRECT_16_H
+#define DIRECT_16_H
+
+#include "direct_pic.h"
+
+namespace Direct
+{
+//----------------------------------------------------------------------------
+class pic16 : public Pic8DeviceSpecific
+{
+public:
+  pic16(::Programmer::Base &base) : Pic8DeviceSpecific(base) {}
+  virtual BitValue get_word();
+  virtual BitValue get_byte() { return get_word().maskWith(0xFF); }
+  virtual void send_word(BitValue word);
+  virtual void send_bits(BitValue d, uint nbBits);
+  virtual void send_cmd(BitValue d) { send_bits(d, 6); }
+  virtual bool doRead(Pic::MemoryRangeType type, Device::Array &data, const ::Programmer::VerifyData *vdata);
+  virtual bool doWrite(Pic::MemoryRangeType type, const Device::Array &data, bool force);
+
+protected:
+  virtual bool setPowerOn() { return setPowerOnVddFirst(); }
+  virtual bool skipMaskWords(Pic::MemoryRangeType type, const Device::Array &data, uint &i, bool force);
+  virtual bool incrementPC(uint steps);
+  virtual bool gotoMemory(Pic::MemoryRangeType type) = 0;
+  virtual uint nbWordsCodeProg() const { return 1; }
+  virtual void startProg(Pic::MemoryRangeType) { pulseEngine("k8,"); }
+  virtual uint waitProgTime(Pic::MemoryRangeType type) const = 0;
+  virtual void endProg(Pic::MemoryRangeType) {}
+  virtual bool writeWords(Pic::MemoryRangeType type, const Device::Array &data, uint &i, bool force);
+  virtual bool writeWords(Pic::MemoryRangeType type, const Device::Array &data, uint i);
+  virtual BitValue readWord(Pic::MemoryRangeType type);
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/direct/base/direct_16F.cpp b/src/progs/direct/base/direct_16F.cpp
new file mode 100644
index 0000000..feeb185
--- /dev/null
+++ b/src/progs/direct/base/direct_16F.cpp
@@ -0,0 +1,275 @@
+/***************************************************************************
+ *   Copyright (C) 2003-2005 Alain Gibaud <alain.gibaud@free.fr>           *
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2004 Keith Baker <syzygy@pubnix.org>  [16F7X]           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "direct_16F.h"
+
+#include "common/global/global.h"
+
+//-----------------------------------------------------------------------------
+bool Direct::P16F::gotoTestMemory()
+{
+  pulseEngine("k0,S,", 0x3FFF); // PC set at 0x2000
+  return true;
+}
+
+bool Direct::P16F::gotoMemory(Pic::MemoryRangeType type)
+{
+  switch (type.type()) {
+    case Pic::MemoryRangeType::Code: return true;
+    case Pic::MemoryRangeType::Eeprom: return true;
+    case Pic::MemoryRangeType::UserId: return gotoTestMemory();
+    case Pic::MemoryRangeType::DeviceId: return (gotoTestMemory() && incrementPC(6));
+    case Pic::MemoryRangeType::Config: return (gotoTestMemory() && incrementPC(7));
+    case Pic::MemoryRangeType::Cal:
+      if ( device().range(type).start==device().range(Pic::MemoryRangeType::Code).end+1 )
+        return incrementPC(device().range(type).start.toUInt());
+      return (gotoTestMemory() && incrementPC(8));
+    case Pic::MemoryRangeType::CalBackup:
+    case Pic::MemoryRangeType::DebugVector:
+    case Pic::MemoryRangeType::HardwareStack:
+    case Pic::MemoryRangeType::ProgramExecutive:
+    case Pic::MemoryRangeType::Nb_Types: break;
+  }
+  Q_ASSERT(false);
+  return false;
+}
+
+//-----------------------------------------------------------------------------
+bool Direct::P16F8X::doEraseRange(Pic::MemoryRangeType type)
+{
+  if ( type==Pic::MemoryRangeType::Code ) {
+    pulseEngine("k2,S,k1,k7,k8,w10000,k1,k7", 0x3FFF); // bulk erase code
+    return true;
+  }
+  if ( type==Pic::MemoryRangeType::Eeprom ) {
+    pulseEngine("k3,S,k1,k7,k8,w10000,k1,k7", 0x3FFF); // bulk erase data
+    return true;
+  }
+  return false;
+}
+
+bool Direct::P16F8X::doErase(bool isProtected)
+{
+  if (isProtected) { // disable code protection + erase code and data
+    gotoMemory(Pic::MemoryRangeType::Config);
+    pulseEngine("k1,k7,k8,w10000,k1,k7");
+  } else {
+    doEraseRange(Pic::MemoryRangeType::Code);
+    doEraseRange(Pic::MemoryRangeType::Eeprom);
+  }
+  doEmulatedEraseRange(Pic::MemoryRangeType::UserId);
+  doEmulatedEraseRange(Pic::MemoryRangeType::Config);
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+uint Direct::P16F84A::waitProgTime(Pic::MemoryRangeType type) const
+{
+  if ( type==Pic::MemoryRangeType::Config || type==Pic::MemoryRangeType::UserId ) return 4000 + 4000; // prog +erase
+  return 4000;
+}
+
+void Direct::P16F84A::startProg(Pic::MemoryRangeType type)
+{
+  if ( type==Pic::MemoryRangeType::Code || type==Pic::MemoryRangeType::Eeprom ) pulseEngine("k24,");
+  else pulseEngine("k8,");
+}
+
+bool Direct::P16F84A::doEraseRange(Pic::MemoryRangeType type)
+{
+  if ( type==Pic::MemoryRangeType::Code ) {
+    pulseEngine("k2,S,k9,k8,w10000", 0x3FFF);  // bulk erase code
+    return true;
+  }
+  if ( type==Pic::MemoryRangeType::Eeprom ) {
+    pulseEngine("k3,S,k11,k8,w10000", 0x3FFF); // bulk erase data
+    return true;
+  }
+  return false;
+}
+
+bool Direct::P16F84A::doErase(bool isProtected)
+{
+  if (isProtected) { // disable code protection and erase
+    gotoMemory(Pic::MemoryRangeType::Config);
+    pulseEngine("k1,k7,k8,w10000,k1,k7");
+  } else {
+    doEraseRange(Pic::MemoryRangeType::Code);
+    doEraseRange(Pic::MemoryRangeType::Eeprom);
+  }
+  doEmulatedEraseRange(Pic::MemoryRangeType::UserId);
+  doEmulatedEraseRange(Pic::MemoryRangeType::Config);
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+uint Direct::P16F7X::waitProgTime(Pic::MemoryRangeType) const
+{
+  if ( device().name()=="16F72" ) return 3000;
+  return 1000;
+}
+
+bool Direct::P16F7X::doEraseRange(Pic::MemoryRangeType type)
+{
+  if ( type!=Pic::MemoryRangeType::Code ) return false;
+  Device::Array array;
+  if ( !doRead(Pic::MemoryRangeType::Config, array, 0) ) return false;
+  pulseEngine("k9w400000", 0x3FFF); // chip erase (should only need 30ms according to prog sheet)
+  return doWrite(Pic::MemoryRangeType::Config, array, true);
+}
+
+bool Direct::P16F7X::doErase(bool)
+{
+  pulseEngine("k9w400000", 0x3FFF); // chip erase (should only need 30ms according to prog sheet)
+  return doEmulatedEraseRange(Pic::MemoryRangeType::UserId);
+}
+
+//-----------------------------------------------------------------------------
+// 16F628 seems to have problems with the standard 16F84 bulk
+// erase when disabling code protection : the data memory is not set to 0xFF.
+// This code adds a erase/programming pass on the data memory
+bool Direct::P16F62X::doErase(bool isProtected)
+{
+  P16F84A::doErase(isProtected);
+  if (isProtected) return doEmulatedEraseRange(Pic::MemoryRangeType::Eeprom);
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+bool Direct::P16F81X::doEraseRange(Pic::MemoryRangeType type)
+{
+  if ( type==Pic::MemoryRangeType::Code ) {
+    pulseEngine("k9w2000"); // bulk erase code: 2ms
+    return true;
+  }
+  if ( type==Pic::MemoryRangeType::Eeprom ) {
+    pulseEngine("k11w2000"); // bulk erase data: 2ms
+    return true;
+  }
+  return false;
+}
+
+bool Direct::P16F81X::doErase(bool)
+{
+  pulseEngine("k31w8000"); // chip erase: 8ms
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+uint Direct::P12F675::waitProgTime(Pic::MemoryRangeType type) const
+{
+  if ( type==Pic::MemoryRangeType::Eeprom ) return 6000;
+  return 2500;
+}
+
+bool Direct::P12F675::doEraseRange(Pic::MemoryRangeType type)
+{
+  if ( type==Pic::MemoryRangeType::Code ) {
+    pulseEngine("k9,w9000");  // bulk erase code
+    return true;
+  }
+  if ( type==Pic::MemoryRangeType::Eeprom ) {
+    pulseEngine("k11,w9000"); // bulk erase data
+    return true;
+  }
+  return false;
+}
+
+bool Direct::P12F675::doErase(bool)
+{
+  pulseEngine("k0,S,", 0x3FFF);
+  doEraseRange(Pic::MemoryRangeType::Code);
+  doEraseRange(Pic::MemoryRangeType::Eeprom);
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+uint Direct::P16F62XA::waitProgTime(Pic::MemoryRangeType type) const
+{
+  if ( type==Pic::MemoryRangeType::Eeprom ) return 6000;
+  return 2500;
+}
+
+bool Direct::P16F62XA::doEraseRange(Pic::MemoryRangeType type)
+{
+  if ( type==Pic::MemoryRangeType::Code ) {
+    pulseEngine("k9,w12000");  // bulk erase code
+    return true;
+  }
+  if ( type==Pic::MemoryRangeType::Eeprom ) {
+    pulseEngine("k11,w12000"); // bulk erase data
+    return true;
+  }
+  return false;
+}
+
+bool Direct::P16F62XA::doErase(bool)
+{
+  pulseEngine("k0,S,w100", 0x3FFF);
+  doEraseRange(Pic::MemoryRangeType::Code);
+  doEraseRange(Pic::MemoryRangeType::Eeprom);
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+bool Direct::P16F87XA::doEraseRange(Pic::MemoryRangeType type)
+{
+  if ( type==Pic::MemoryRangeType::Code ) {
+    pulseEngine("k9,w8000");  // bulk erase code
+    return true;
+  }
+  if ( type==Pic::MemoryRangeType::Eeprom ) {
+    pulseEngine("k11,w8000"); // bulk erase data
+    return true;
+  }
+  return false;
+}
+
+bool Direct::P16F87XA::doErase(bool)
+{
+  // I use the command 31 twice because, sometimes, the prog
+  // memory is not totally erased. Not very elegant, but it works.
+  pulseEngine("k0,S,k31w8000,k31w8000", 0x3FFF);
+  return doEmulatedEraseRange(Pic::MemoryRangeType::UserId);
+}
+
+//-----------------------------------------------------------------------------
+bool Direct::P16F913::doEraseRange(Pic::MemoryRangeType type)
+{
+  if ( type==Pic::MemoryRangeType::Code ) {
+    pulseEngine("k9,w6000");  // bulk erase code
+    return true;
+  }
+  if ( type==Pic::MemoryRangeType::Eeprom ) {
+    pulseEngine("k11,w6000"); // bulk erase data
+    return true;
+  }
+  return false;
+}
+
+bool Direct::P16F913::doErase(bool)
+{
+  // flow chart of figure 3.21 of prog sheet
+  doEraseRange(Pic::MemoryRangeType::Code);
+  pulseEngine("k0,S,", 0x3FFF);
+  doEraseRange(Pic::MemoryRangeType::Code);
+  doEraseRange(Pic::MemoryRangeType::Eeprom);
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+bool Direct::P16F785::doErase(bool)
+{
+  // flow chart of figure 3.20 of prog sheet
+  pulseEngine("k0,S,", 0x3FFF);
+  doEraseRange(Pic::MemoryRangeType::Code);
+  doEraseRange(Pic::MemoryRangeType::Eeprom);
+  return true;
+}
diff --git a/src/progs/direct/base/direct_16F.h b/src/progs/direct/base/direct_16F.h
new file mode 100644
index 0000000..0b0fca8
--- /dev/null
+++ b/src/progs/direct/base/direct_16F.h
@@ -0,0 +1,162 @@
+/***************************************************************************
+ *   Copyright (C) 2003-2005 Alain Gibaud <alain.gibaud@free.fr>           *
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2004 Keith Baker <syzygy@pubnix.org>  [16F7X]           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DIRECT_16F_HH
+#define DIRECT_16F_HH
+
+#include "direct_16.h"
+
+namespace Direct
+{
+//-----------------------------------------------------------------------------
+class P16F : public pic16
+{
+public:
+  P16F(::Programmer::Base &base) : pic16(base) {}
+  bool gotoTestMemory();
+  virtual bool gotoMemory(Pic::MemoryRangeType type);
+};
+
+//-----------------------------------------------------------------------------
+class P16F8X : public P16F
+{
+public:
+  P16F8X(::Programmer::Base &base) : P16F(base) {}
+  virtual bool doErase(bool isProtected);
+  virtual bool doEraseRange(Pic::MemoryRangeType type);
+  virtual uint waitProgTime(Pic::MemoryRangeType) const { return 20000; }
+};
+
+//-----------------------------------------------------------------------------
+class P16CR8X : public P16F8X
+{
+public:
+  P16CR8X(::Programmer::Base &base) : P16F8X(base) {}
+  virtual bool doErase(bool) { return false; } // #### can't the eeprom be bulk erased ???
+  virtual bool doEraseRange(Pic::MemoryRangeType) { return false; }
+  // #### eeprom and config only can be programmed...
+};
+
+//-----------------------------------------------------------------------------
+class P16F84A : public P16F
+{
+public:
+  P16F84A(::Programmer::Base &base) : P16F(base) {}
+  virtual bool doEraseRange(Pic::MemoryRangeType type);
+  virtual bool doErase(bool isProtected);
+  virtual void startProg(Pic::MemoryRangeType type);
+  virtual uint waitProgTime(Pic::MemoryRangeType type) const;
+};
+
+typedef class P16F84A P16F87X;
+
+//-----------------------------------------------------------------------------
+class P16F7X : public P16F
+{
+public:
+  P16F7X(::Programmer::Base &base) : P16F(base) {}
+  virtual bool doEraseRange(Pic::MemoryRangeType type);
+  virtual bool doErase(bool isProtected);
+  uint nbWordsCodeProg() const { return 2; }
+  virtual uint waitProgTime(Pic::MemoryRangeType type) const;
+  virtual void endProg(Pic::MemoryRangeType) { pulseEngine("k14,"); }
+  virtual bool setPowerOn() { return setPowerOnVppFirst(); }
+};
+
+//-----------------------------------------------------------------------------
+class P16F62X : public P16F84A
+{
+public:
+  P16F62X(::Programmer::Base &base) : P16F84A(base) {}
+  virtual bool doErase(bool isProtected);
+  virtual uint waitProgTime(Pic::MemoryRangeType) const { return 8000; }
+  virtual bool setPowerOn() { return setPowerOnVppFirst(); }
+};
+
+//-----------------------------------------------------------------------------
+class P16F81X : public P16F
+{
+public:
+  P16F81X(::Programmer::Base &base) : P16F(base) {}
+  virtual bool doEraseRange(Pic::MemoryRangeType type);
+  virtual bool doErase(bool isProtected);
+  uint nbWordsCodeProg() const { return 4; }
+  virtual void startProg(Pic::MemoryRangeType) { pulseEngine("k24,"); }
+  virtual uint waitProgTime(Pic::MemoryRangeType) const { return 2000; }
+  virtual void endProg(Pic::MemoryRangeType) { pulseEngine("k23,"); }
+};
+
+//-----------------------------------------------------------------------------
+class P12F675 : public P16F
+{
+public:
+  P12F675(::Programmer::Base &base) : P16F(base) {}
+  virtual bool doEraseRange(Pic::MemoryRangeType type);
+  virtual bool doErase(bool isProtected);
+  virtual uint waitProgTime(Pic::MemoryRangeType type) const;
+  virtual bool setPowerOn() { return setPowerOnVppFirst(); }
+};
+
+//-----------------------------------------------------------------------------
+class P16F62XA : public P16F
+{
+public:
+  P16F62XA(::Programmer::Base &base) : P16F(base) {}
+  virtual bool doEraseRange(Pic::MemoryRangeType type);
+  virtual bool doErase(bool isProtected);
+  virtual uint waitProgTime(Pic::MemoryRangeType type) const;
+  virtual bool setPowerOn() { return setPowerOnVppFirst(); }
+};
+
+//-----------------------------------------------------------------------------
+class P16F87XA : public P16F
+{
+public:
+  P16F87XA(::Programmer::Base &base) : P16F(base) {}
+  virtual bool doEraseRange(Pic::MemoryRangeType type);
+  virtual bool doErase(bool isProtected);
+  virtual uint nbWordsCodeProg() const { return 8; }
+  virtual uint waitProgTime(Pic::MemoryRangeType) const { return 8000; }
+};
+
+//-----------------------------------------------------------------------------
+class P16F913 : public P16F
+{
+public:
+  P16F913(::Programmer::Base &base) : P16F(base) {}
+  virtual bool doEraseRange(Pic::MemoryRangeType type);
+  virtual bool doErase(bool isProtected);
+  virtual uint nbWordsCodeProg() const { return 4; }
+  virtual void startProg(Pic::MemoryRangeType) { pulseEngine("k24,"); }
+  virtual uint waitProgTime(Pic::MemoryRangeType) const { return 2500; }
+  virtual void endProg(Pic::MemoryRangeType) { pulseEngine("k10,w100"); }
+  virtual bool setPowerOn() { return setPowerOnVppFirst(); }
+};
+
+class P16F916 : public P16F913
+{
+public:
+  P16F916(::Programmer::Base &base) : P16F913(base) {}
+  virtual uint nbWordsCodeProg() const { return 8; }
+};
+
+typedef class P16F913 P12F6XX_16F6XX;
+
+class P16F785 : public P16F913
+{
+public:
+  P16F785(::Programmer::Base &base) : P16F913(base) {}
+  virtual bool doEraseRange(Pic::MemoryRangeType type);
+  virtual bool doErase(bool isProtected);
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/direct/base/direct_18.cpp b/src/progs/direct/base/direct_18.cpp
new file mode 100644
index 0000000..d512d32
--- /dev/null
+++ b/src/progs/direct/base/direct_18.cpp
@@ -0,0 +1,109 @@
+/***************************************************************************
+ *   Copyright (C) 2003-2005 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "direct_18.h"
+
+// Commands specific to 18F:
+// xhh = send a 8 bits constant (hh must be a 2 digits hex constant)
+// Xhhhh =  send a 16 bits constant (hhhh must be a 4 digits hex constant)
+bool Direct::P18::pulse(const char *&cmd, BitValue value, BitValue &res)
+{
+  switch (*cmd) {
+    case 'x': {
+      uint n;
+      sscanf(++cmd, "%02X", &n);
+      ++cmd;
+      log(Log::DebugLevel::Max, "SEND 1 byte constant : " + toHexLabel(n, 2));
+      send_bits(n, 8);
+      break;
+    }
+    case 'X': {
+      uint n;
+      sscanf(++cmd,"%04X", &n);
+      cmd += 3;
+      log(Log::DebugLevel::Max, "SEND 2 bytes constant : " + toHexLabel(n, 4));
+      send_bits(n, 16);
+      break;
+    }
+    default: return Pic8DeviceSpecific::pulse(cmd, value, res);
+  }
+  return true;
+}
+
+void Direct::P18::send_word(BitValue d)
+{
+    hardware().setWrite();
+    for (uint x = 0; x<16; x++) {
+        hardware().setPin(Clock, High);
+        if ( d.bit(0) ) hardware().setPin(DataOut, High);
+        else hardware().setPin(DataOut, Low);
+        Port::usleep(_clockDelay+5);
+        hardware().setPin(Clock, Low);
+        Port::usleep(_clockDelay+3);
+        d >>= 1;                    // Move the data over 1 bit
+    }
+    hardware().setPin(DataOut, High);
+    hardware().setRead();
+}
+
+BitValue Direct::P18::get_word()
+{
+    hardware().setRead();
+    BitValue ind = 0;
+    send_cmd(9);
+    hardware().setPin(DataOut, High);
+    for (uint x = 0; x<16; x++) {
+        hardware().setPin(Clock, High);
+        Port::usleep(_clockDelay+5);
+        if ( x>7 && hardware().readBit() ) ind |= (1 << x-8);
+        hardware().setPin(Clock, Low);
+        Port::usleep(_clockDelay+3);
+    }
+    send_cmd(9);
+    hardware().setPin(DataOut, High);
+    for (uint x = 0; x<16; x++) {
+        hardware().setPin(Clock, High);
+        Port::usleep(_clockDelay+5);
+        if ( x>7 && hardware().readBit() ) ind |= (1 << x);
+        hardware().setPin(Clock, Low);
+        Port::usleep(_clockDelay+3);
+    }
+    return ind;
+}
+
+BitValue Direct::P18::get_byte()
+{
+    hardware().setRead();
+    BitValue ind = 0;
+    send_cmd(2);
+    hardware().setPin(DataOut, High);
+    for (uint x = 0; x<16; x++) {
+        hardware().setPin(Clock, High);
+        Port::usleep(_clockDelay+5);
+        if ( x>7 && hardware().readBit() ) ind |= (1 << x-8);
+        hardware().setPin(Clock, Low);
+        Port::usleep(_clockDelay+3);
+    }
+    return ind;
+}
+
+void Direct::P18::send_bits(BitValue d, uint nbb)
+{
+    hardware().setWrite();
+    for (int x = nbb; x; --x) {
+        hardware().setPin(Clock, High);
+        if ( d.bit(0) ) hardware().setPin(DataOut, High);
+        else hardware().setPin(DataOut, Low);
+        Port::usleep(_clockDelay+5);
+        hardware().setPin(Clock, Low);
+        Port::usleep(_clockDelay+3);
+        d >>= 1;  // Move the data over 1 bit
+    }
+    hardware().setPin(DataOut, High);
+    hardware().setRead();
+}
diff --git a/src/progs/direct/base/direct_18.h b/src/progs/direct/base/direct_18.h
new file mode 100644
index 0000000..6c2b4f3
--- /dev/null
+++ b/src/progs/direct/base/direct_18.h
@@ -0,0 +1,34 @@
+/***************************************************************************
+ *   Copyright (C) 2003-2005 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DIRECT_18_HH
+#define DIRECT_18_HH
+
+#include "direct_pic.h"
+
+namespace Direct
+{
+
+class P18 : public Pic8DeviceSpecific
+{
+public:
+  P18(::Programmer::Base &base) : Pic8DeviceSpecific(base) {}
+  virtual bool setPowerOn() { return setPowerOnVddFirst(); }
+
+protected:
+  bool pulse(const char *&cmd, BitValue value, BitValue &res);
+  virtual void send_word(BitValue d);
+  virtual BitValue get_word();
+  virtual BitValue get_byte();
+  virtual void send_cmd(BitValue d) { send_bits(d, 4); }
+  virtual void send_bits(BitValue d, uint nbBits);
+};
+
+} //namespace
+
+#endif
diff --git a/src/progs/direct/base/direct_18F.cpp b/src/progs/direct/base/direct_18F.cpp
new file mode 100644
index 0000000..9860e63
--- /dev/null
+++ b/src/progs/direct/base/direct_18F.cpp
@@ -0,0 +1,318 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2003-2005 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "direct_18F.h"
+
+#include "direct_data.h"
+
+//-----------------------------------------------------------------------------
+bool Direct::P18F::skipMaskWords(Pic::MemoryRangeType type, const Device::Array &data,
+                                 uint &i, uint nb, bool forceProgram)
+{
+  if (forceProgram) return false;
+  for (uint k=0; k<nb; k++)
+    if ( data[i+k]!=device().mask(type) ) return false;
+  i += nb;
+  return true;
+}
+
+void Direct::P18F::program(Type type)
+{
+  QString cmd;
+  switch (type) {
+    case Code:
+      cmd = QString("d,C,c,C,c,C,c,Cw%1cw%2X0000,").arg(programHighTime(Code)).arg(programLowTime());
+      break;
+    case Erase:
+      pulseEngine("k0,X0000,"); // NOP
+      cmd = QString("k0;w%1;w%2;X0000").arg(programHighTime(type)).arg(programLowTime());
+      break;
+    case Eeprom:
+      for (;;) {
+        pulseEngine("k0,X50A6,");
+        pulseEngine("k0,X6EF5,");
+        pulseEngine("k0,X0000,"); // NOP
+        BitValue b = get_byte();
+        if ( !b.bit(1) ) break; // WR bit clear
+      }
+      cmd = QString("w%1").arg(programLowTime());
+      break;
+  }
+  pulseEngine(cmd);
+}
+
+void Direct::P18F::setCodePointer(uint address)
+{
+  pulseEngine("k0,S,k0,X6EF8,", 0x0E00 | ((address & 0xFF0000) >> 16));
+  pulseEngine("k0,S,k0,X6EF7,", 0x0E00 | ((address & 0x00FF00) >> 8));
+  pulseEngine("k0,S,k0,X6EF6,", 0x0E00 | (address & 0x0000FF));
+}
+
+void Direct::P18F::setPointer(Pic::MemoryRangeType type, uint offset)
+{
+  if ( type==Pic::MemoryRangeType::Eeprom ) {
+    pulseEngine("k0,S,k0,X6EA9,", 0x0E00 | (offset & 0x00FF));
+    pulseEngine("k0,S,k0,X6EAA,", 0x0E00 | ((offset & 0xFF00) >> 8));
+  } else setCodePointer(device().range(type).start.toUInt() + offset);
+}
+
+void Direct::P18F::directAccess(Pic::MemoryRangeType type)
+{
+  if ( type==Pic::MemoryRangeType::Code || type==Pic::MemoryRangeType::UserId || type==Pic::MemoryRangeType::Eeprom ) pulseEngine("k0,X9CA6"); // unset EECON1:CFGS
+  else pulseEngine("k0,X8CA6"); // set EECON1:CFGS
+  if ( type==Pic::MemoryRangeType::Eeprom ) pulseEngine("k0,X9EA6"); // unset EECON1::EEPGD
+  else pulseEngine("k0,X8EA6"); // set EECON1::EEPGD
+}
+
+bool Direct::P18F::doRead(Pic::MemoryRangeType type, Device::Array &data, const ::Programmer::VerifyData *vdata)
+{
+  data.resize(device().nbWords(type));
+  uint offset = 0;
+  uint nbWords = data.count();
+  if (vdata) {
+    if ( vdata->actions & ::Programmer::OnlyProgrammedVerify ) {
+      const Device::Array wdata = static_cast<const Pic::Memory &>(vdata->memory).arrayForWriting(type);
+      offset = findNonMaskStart(type, wdata);
+      nbWords = findNonMaskEnd(type, wdata)+1;
+    }
+  }
+  BitValue mask = device().mask(type);
+  //qDebug("read %s %i", Pic::MEMORY_RANGE_TYPE_DATA[type].label, device().nbWords(type));
+  //pulseEngine("w300000"); // what for ?
+  directAccess(type);
+  switch (type.type()) {
+    case Pic::MemoryRangeType::Eeprom:
+      for (uint i = 0; i<data.count(); i++) {
+        setPointer(type, i);
+        pulseEngine("k0,X80A6,k0,X50A8,k0,X6EF5,k0,X0000");
+        data[i] = pulseEngine("r").maskWith(mask);
+        if ( vdata && !hardware().verifyWord(offset+i, data[i], type, *vdata) ) return false;
+      }
+      _base.progressMonitor().addTaskProgress(data.count());
+      break;
+    case Pic::MemoryRangeType::Code:
+      setPointer(type, offset);
+      //pulseEngine("w1000"); ??
+      for (uint i=0; i<nbWords; i++) {
+        data[i] = pulseEngine("R").maskWith(mask);
+        if ( vdata && !hardware().verifyWord(offset+i, data[i], type, *vdata) ) return false;
+      }
+      _base.progressMonitor().addTaskProgress(data.count());
+      break;
+    case Pic::MemoryRangeType::UserId:
+    case Pic::MemoryRangeType::Config:
+    case Pic::MemoryRangeType::DeviceId:
+      setPointer(type, 0);
+      for (uint i = 0; i<data.count(); i+=2) {
+        BitValue w = pulseEngine("R");
+        data[i] = w.maskWith(mask);
+        if ( vdata && !hardware().verifyWord(offset+i, data[i], type, *vdata) ) return false;
+        data[i+1] = w >> 8;
+        if ( vdata && !hardware().verifyWord(offset+i+1, data[i+1], type, *vdata) ) return false;
+      }
+      break;
+    default: Q_ASSERT(false); break;
+  }
+  return true;
+}
+
+bool Direct::P18F::doWrite(Pic::MemoryRangeType type, const Device::Array &data, bool force)
+{
+  uint inc = device().addressIncrement(type);
+  //qDebug("write %s %i/%i %i", Pic::MEMORY_RANGE_TYPE_DATA[type].label, nbWords, data.count(), inc);
+  //pulseEngine("w300000"); ??
+  configureSinglePanel();
+  directAccess(type);
+  switch (type.type()) {
+    case Pic::MemoryRangeType::UserId: {
+      setPointer(type, 0);
+      Q_ASSERT( device().nbWords(Pic::MemoryRangeType::UserId)==8 );
+      uint i = 0;
+      for (uint k=0; k<4; k++) {
+        BitValue word = data[i] | data[i+1] << 8;
+        if ( (k+1)==4 ) pulseEngine("k15,S,", word);
+        else pulseEngine("k13,S,", word);
+        i += 2;
+      }
+      program(Code);
+      break;
+    }
+    case Pic::MemoryRangeType::Code: {
+      uint progWidth = device().nbWordsWriteAlignment(Pic::MemoryRangeType::Code);
+      for (uint i = 0; i<data.count(); ) {
+        if ( i!=0 && i%0x100==0 ) _base.progressMonitor().addTaskProgress(0x100);
+        if ( skipMaskWords(type, data, i, progWidth, force) ) continue;
+        setPointer(type, inc * i);
+        for (uint k=0; k<progWidth; k++) {
+          if ( (k+1)==progWidth ) pulseEngine("k15,S,", data[i]);
+          else pulseEngine("k13,S,", data[i]);
+          i++;
+        }
+        program(Code);
+      }
+      _base.progressMonitor().addTaskProgress(data.count()%0x100);
+      break;
+    }
+    case Pic::MemoryRangeType::Config:
+      pulseEngine("k0,XEF00,k0,XF800,"); // move PC somewhere else (0x100000)
+      for (uint i = 0; i<data.count(); i+=2) {
+        setPointer(type, inc * i);
+        BitValue w = data[i] | (data[i+1] << 8);
+        pulseEngine("k15,S,", w);
+        program(Code);
+        pulseEngine("k0,X2AF6,"); // increment address
+        pulseEngine("k15,S,", w);
+        program(Code);
+        pulseEngine("k0,X0000,"); // NOP: some devices need 4 NOPS here...
+        pulseEngine("k0,X0000,"); // NOP
+        pulseEngine("k0,X0000,"); // NOP
+        pulseEngine("k0,X0000,"); // NOP
+      }
+      break;
+    case Pic::MemoryRangeType::Eeprom:
+      for(uint i = 0; i<data.count(); ) {
+        if ( i!=0 && i%0x100==0 ) _base.progressMonitor().addTaskProgress(0x100);
+        if ( skipMaskWords(type, data, i, 1, force) ) continue;
+        setPointer(type, inc * i);
+        pulseEngine("k0,S,k0,X6EA8,", data[i] | 0x0E00); // load data
+        pulseEngine("k0,X84A6,"); // enable memory writes
+        unlockEeprom();
+        pulseEngine("k0,X82A6,"); // write
+        program(Eeprom);
+        pulseEngine("k0,X94A6,"); // disable writes
+        i++;
+      }
+      _base.progressMonitor().addTaskProgress(data.count()%0x100);
+      break;
+    default: Q_ASSERT(false); break;
+  }
+  return true;
+}
+
+void Direct::P18F::unlockEeprom()
+{
+  pulseEngine("k0,X0E55,k0,X6EA7,k0,X0EAA,k0,X6EA7,");
+}
+
+bool Direct::P18F::doEraseCommand(uint cmd1, uint cmd2)
+{
+  if ( cmd1!=0 ) {
+    setCodePointer(0x3C0005);
+    pulseEngine("k12;X" + toHex(cmd1, 4));
+  }
+  setCodePointer(0x3C0004);
+  pulseEngine("k12;X" + toHex(cmd2, 4));
+  program(Erase);
+  return true;
+}
+
+bool Direct::P18F::doEraseRange(Pic::MemoryRangeType type)
+{
+  if ( type==Pic::MemoryRangeType::Code ) {
+    doEraseCommand(0, 0x0083); // boot
+    for (uint i=0; i<device().config().protection().nbBlocks(); i++)
+      doEraseCommand(0, 0x0088 + i);
+    return true;
+  }
+  if ( type==Pic::MemoryRangeType::Eeprom ) return doEraseCommand(0, 0x0081);
+  return false;
+}
+
+bool Direct::P18F::doErase(bool)
+{
+  return doEraseCommand(0, 0x0080);
+}
+
+//-----------------------------------------------------------------------------
+void Direct::P18F1220::program(Type type)
+{
+  if ( type==Eeprom ) {
+    pulseEngine("k0,X0000,"); // NOP
+    QString cmd = QString("k0;w%1;w%2;X0000").arg(programHighTime(type)).arg(programLowTime());
+    pulseEngine(cmd);
+  } else P18F::program(type);
+}
+
+//-----------------------------------------------------------------------------
+void Direct::P18F242::configureSinglePanel()
+{
+  setCodePointer(0x3C0006);
+  pulseEngine("k12,X0000");
+}
+
+//-----------------------------------------------------------------------------
+bool Direct::P18F2539::doErase(bool)
+{
+  // apparently there is no chip erase...
+  return ( doEraseRange(Pic::MemoryRangeType::Code) && doEraseRange(Pic::MemoryRangeType::Eeprom) );
+}
+
+bool Direct::P18F2539::doEraseCommand(uint cmd1, uint cmd2)
+{
+  Q_ASSERT( cmd1==0 );
+  setCodePointer(0x3C0004);
+  pulseEngine("k0;X" + toHex(cmd2, 4)); // is that correct ??
+  program(Erase);
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+bool Direct::P18F2439::doEraseRange(Pic::MemoryRangeType type)
+{
+  if ( type==Pic::MemoryRangeType::Code ) {
+    configureSinglePanel();
+    directAccess(Pic::MemoryRangeType::Code);
+    for (uint i=0; i<40; i++) {
+      setCodePointer(0x200000 + 64*i);
+      pulseEngine("k0;X84A6;k0;X88A6"); // enable memory writes + setup erase
+      unlockEeprom();
+      pulseEngine("k0;X82A6"); // initiate erase
+      program(Erase);
+      pulseEngine("k0;X94A6"); // disable memory writes
+    }
+    return true;
+  }
+  return P18F2539::doEraseRange(type);
+}
+//-----------------------------------------------------------------------------
+bool Direct::P18F2221::doEraseRange(Pic::MemoryRangeType type)
+{
+  if ( type==Pic::MemoryRangeType::Code ) {
+    doEraseCommand(0, 0x8181); // boot
+    for (uint i=0; i<device().config().protection().nbBlocks(); i++) {
+      uint v = (1 << i);
+      doEraseCommand(v + v<<8, 0x8080);
+    }
+    return true;
+  }
+  if ( type==Pic::MemoryRangeType::Eeprom ) return doEraseCommand(0, 0x8484);
+  return false;
+}
+
+bool Direct::P18F2221::doErase(bool)
+{
+  return doEraseCommand(0x0F0F, 0x8787); // chip erase
+}
+
+//-----------------------------------------------------------------------------
+bool Direct::P18F6527::doErase(bool)
+{
+  return doEraseCommand(0xFFFF, 0x8787); // chip erase
+}
+
+//-----------------------------------------------------------------------------
+bool Direct::P18F6310::doErase(bool)
+{
+  setCodePointer(0x3C0005);
+  pulseEngine("k12,X010A");
+  setCodePointer(0x3C0004);
+  pulseEngine("k12,X018A");
+  program(Erase);
+  return true;
+}
diff --git a/src/progs/direct/base/direct_18F.h b/src/progs/direct/base/direct_18F.h
new file mode 100644
index 0000000..c3cbcf8
--- /dev/null
+++ b/src/progs/direct/base/direct_18F.h
@@ -0,0 +1,107 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2003-2005 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DIRECT_18F_H
+#define DIRECT_18F_H
+
+#include "direct_18.h"
+
+namespace Direct
+{
+//-----------------------------------------------------------------------------
+class P18F : public P18
+{
+public:
+  P18F(::Programmer::Base &base) : P18(base) {}
+  virtual bool doRead(Pic::MemoryRangeType type, Device::Array &data, const ::Programmer::VerifyData *vdata);
+  virtual bool doWrite(Pic::MemoryRangeType, const Device::Array &data, bool force);
+  virtual bool doEraseCommand(uint cmd1, uint cmd2);
+  virtual bool doEraseRange(Pic::MemoryRangeType type);
+  virtual bool doErase(bool isProtected);
+
+  bool skipMaskWords(Pic::MemoryRangeType type, const Device::Array &data,
+                     uint &i, uint nb, bool force);
+  void setPointer(Pic::MemoryRangeType type, uint offset);
+  void setCodePointer(uint address);
+  enum Type { Code, Eeprom, Erase };
+  virtual void program(Type type);
+  virtual uint programHighTime(Type type) const { return (type==Code ? 1000 : 5000); }
+  virtual uint programLowTime() { return 5; }
+  virtual void configureSinglePanel() {}
+  virtual void unlockEeprom();
+  virtual void directAccess(Pic::MemoryRangeType type);
+};
+
+//-----------------------------------------------------------------------------
+class P18F1220 : public P18F
+{
+public:
+  P18F1220(::Programmer::Base &base) : P18F(base) {}
+  virtual void program(Type type);
+};
+
+//-----------------------------------------------------------------------------
+class P18F242 : public P18F
+{
+public:
+  P18F242(::Programmer::Base &base) : P18F(base) {}
+  virtual void configureSinglePanel();
+};
+
+//-----------------------------------------------------------------------------
+class P18F2539 : public P18F242
+{
+public:
+  P18F2539(::Programmer::Base &base) : P18F242(base) {}
+  virtual bool doErase(bool isProtected);
+  virtual bool doEraseCommand(uint cmd1, uint cmd2);
+};
+
+//-----------------------------------------------------------------------------
+class P18F2439 : public P18F2539
+{
+public:
+  P18F2439(::Programmer::Base &base) : P18F2539(base) {}
+  virtual bool doEraseRange(Pic::MemoryRangeType type);
+};
+
+//-----------------------------------------------------------------------------
+class P18F2221 : public P18F
+{
+public:
+  P18F2221(::Programmer::Base &base) : P18F(base) {}
+  virtual bool doEraseRange(Pic::MemoryRangeType type);
+  virtual bool doErase(bool isProtected);
+  virtual uint programLowTime() { return 100; }
+  virtual void unlockEeprom() {}
+};
+
+//-----------------------------------------------------------------------------
+class P18F6527 : public P18F2221
+{
+public:
+  P18F6527(::Programmer::Base &base) : P18F2221(base) {}
+  virtual bool doErase(bool isProtected);
+};
+
+//-----------------------------------------------------------------------------
+class P18F6310 : public P18F
+{
+public:
+  P18F6310(::Programmer::Base &base) : P18F(base) {}
+  virtual bool canEraseRange(Pic::MemoryRangeType) const { return false; }
+  virtual uint programHighTime(Type type) const { return (type==Code ? 2000 : 30000); }
+  virtual uint programLowTime() { return 120; }
+  virtual bool doEraseRange(Pic::MemoryRangeType) { return false; }
+  virtual bool doErase(bool isProtected);
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/direct/base/direct_30.cpp b/src/progs/direct/base/direct_30.cpp
new file mode 100644
index 0000000..db3c7f4
--- /dev/null
+++ b/src/progs/direct/base/direct_30.cpp
@@ -0,0 +1,261 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "direct_30.h"
+
+const uint BULK_ERASE_SEQUENCE[] = { // for all dsPICs
+  0x000000, 0x000000, 0x040100, 0x000000, // step 1
+  Direct::Pic30::LoopStart + 2,
+    0x24008A, 0x883B0A,                     // step 2
+    0x200F80, 0x880190, 0x200067,           // step 3
+    0xBB0300,                               // step 4
+    0xBB1B86,                               // step 5
+    0x200558, 0x200AA9, 0x883B38, 0x883B39, // step 6
+    0xA8E761, 0x000000, 0x000000,           // step 7
+    Direct::Pic30::Pause + 2000000,
+    0xA9E761, 0x000000, 0x000000,
+  Direct::Pic30::LoopEnd,
+  0x2407FA, 0x883B0A,                     // step 9
+  0x200558, 0x883B38, 0x200AA9, 0x883B39, // step 10
+  0xA8E761, 0x000000, 0x000000,           // step 11
+  Direct::Pic30::Pause + 2000000,
+  0xA9E761, 0x000000, 0x000000,
+  Direct::Pic30::End
+};
+const uint READ_APPLICATION_ID_SEQUENCE[] = {
+  0x000000, 0x000000, 0x040100, 0x000000, // step 1
+  0x200800, 0x880190, 0x205FE0, 0x207841, // step 2
+  0xBA0890, 0x000000, 0x000000,
+  Direct::Pic30::RegisterOut, 0x000000,   // step 3
+  Direct::Pic30::End
+};
+const uint READ_CONFIG_SEQUENCE[] = {
+  0x000000, 0x000000, 0x040100, 0x000000, // step 1
+  0x200F80, 0x880190, 0xEB0300, 0xEB0380, // step 2
+  Direct::Pic30::LoopStart + 7,
+    0xBA0BB6, 0x000000, 0x000000, 0x883C20, 0x000000, // step 3
+    Direct::Pic30::RegisterOut, 0x000000,   // step 4
+    0x040100, 0x000000,                     // step 5
+  Direct::Pic30::LoopEnd,
+  Direct::Pic30::End
+};
+const uint WRITE_CONFIG_SEQUENCE[] = {
+  0x000000, 0x000000, 0x040100, 0x000000, // step 1
+  Direct::Pic30::FillAddressLow + 0x200007, // step 2
+  0x24008A, 0x883B0A,                     // step 3
+  0x200F80, 0x880190,                     // step 4
+  Direct::Pic30::FillData + 0x200000,     // step 5
+  //0xEB0300, ???
+  0xBB1B96, 0x000000, 0x000000,           // step 8
+  0x200558, 0x883B38, 0x200AA9, 0x883B39, // step 7
+  0xA8E761, 0x000000, 0x000000,           // step 8
+  Direct::Pic30::Pause + 2000000,
+  0xA9E761, 0x000000, 0x000000,
+  Direct::Pic30::End
+};
+const uint READ_DATA_SEQUENCE[] = {
+  0x000000, 0x000000, 0x040100, 0x000000, // step 1
+  0x2007F0, 0x880190, Direct::Pic30::FillAddressLow + 0x200006, // step 2
+  0xEB0380,                               // step 3
+  0xBA1BB6, 0x000000, 0x000000,
+  0xBA1BB6, 0x000000, 0x000000,
+  0xBA1BB6, 0x000000, 0x000000,
+  0xBA1BB6, 0x000000, 0x000000,
+  0x883C20, 0x000000, Direct::Pic30::RegisterOut, 0x000000, // step 4
+  0x883C21, 0x000000, Direct::Pic30::RegisterOut, 0x000000,
+  0x883C22, 0x000000, Direct::Pic30::RegisterOut, 0x000000,
+  0x883C23, 0x000000, Direct::Pic30::RegisterOut, 0x000000,
+  Direct::Pic30::End
+};
+const uint WRITE_DATA_SEQUENCE[] = {
+  0x000000, 0x000000, 0x040100, 0x000000, // step 1
+  0x24005A, 0x883B0A,                     // step 2
+  0x2007F0, 0x880190, Direct::Pic30::FillAddressLow + 0x200007, // step 3
+  Direct::Pic30::LoopStart + 4,
+    Direct::Pic30::FillData + 0x200000,   // step 4
+    Direct::Pic30::FillData + 0x200001,
+    Direct::Pic30::FillData + 0x200002,
+    Direct::Pic30::FillData + 0x200003,
+    0xEB0300, 0x000000,                   // step 5
+    0xBB1BB6, 0x000000, 0x000000,
+    0xBB1BB6, 0x000000, 0x000000,
+    0xBB1BB6, 0x000000, 0x000000,
+    0xBB1BB6, 0x000000, 0x000000,
+  Direct::Pic30::LoopEnd,
+  0x200558, 0x883B38, 0x200AA9, 0x883B39, // step 7
+  0xA8E761, 0x000000, 0x000000,           // step 8
+  Direct::Pic30::Pause + 2000000,
+  0xA9E761, 0x000000, 0x000000,
+  Direct::Pic30::End
+};
+const uint READ_CODE_SEQUENCE[] = {
+  0x000000, 0x000000, 0x040100, 0x000000, // step 1
+  Direct::Pic30::FillAddressHigh + 0x200000,     // step 2
+  0x880190, Direct::Pic30::FillAddressLow + 0x200006,
+  0xEB0380,                               // step 3
+  0xBA1B96, 0x000000, 0x000000, 0xBADBB6, 0x000000, 0x000000,
+  0xBADBD6, 0x000000, 0x000000, 0xBA1BB6, 0x000000, 0x000000,
+  0xBA1B96, 0x000000, 0x000000, 0xBADBB6, 0x000000, 0x000000,
+  0xBADBD6, 0x000000, 0x000000, 0xBA0BB6, 0x000000, 0x000000,
+  0x883C20, 0x000000, Direct::Pic30::RegisterOut, 0x000000, // step 4
+  0x883C21, 0x000000, Direct::Pic30::RegisterOut, 0x000000,
+  0x883C22, 0x000000, Direct::Pic30::RegisterOut, 0x000000,
+  0x883C23, 0x000000, Direct::Pic30::RegisterOut, 0x000000,
+  0x883C24, 0x000000, Direct::Pic30::RegisterOut, 0x000000,
+  0x883C25, 0x000000, Direct::Pic30::RegisterOut, 0x000000,
+  Direct::Pic30::End
+};
+const uint WRITE_CODE_SEQUENCE[] = {
+  0x000000, 0x000000, 0x040100, 0x000000, // step 1
+  0x24001A, 0x883B0A,                     // step 2
+  Direct::Pic30::FillAddressHigh + 0x200000, // step 3
+  0x880190, Direct::Pic30::FillAddressLow + 0x200007,
+  Direct::Pic30::LoopStart + 8,
+    Direct::Pic30::FillData + 0x200000,   // step 4
+    Direct::Pic30::FillData + 0x200001,
+    Direct::Pic30::FillData + 0x200002,
+    Direct::Pic30::FillData + 0x200003,
+    Direct::Pic30::FillData + 0x200004,
+    Direct::Pic30::FillData + 0x200005,
+    0xEB0300, 0x000000,                   // step 5
+    0xBB0BB6, 0x000000, 0x000000, 0xBBDBB6, 0x000000, 0x000000,
+    0xBBEBB6, 0x000000, 0x000000, 0xBB1BB6, 0x000000, 0x000000,
+    0xBB0BB6, 0x000000, 0x000000, 0xBBDBB6, 0x000000, 0x000000,
+    0xBBEBB6, 0x000000, 0x000000, 0xBB1BB6, 0x000000, 0x000000,
+  Direct::Pic30::LoopEnd,
+  0x200558, 0x883B38, 0x200AA9, 0x883B39, // step 7
+  0xA8E761, 0x000000, 0x000000, 0x000000, 0x000000, // step 8
+  Direct::Pic30::Pause + 2000000,
+  0xA9E761, 0x000000, 0x000000, 0x000000, 0x000000,
+  Direct::Pic30::End
+};
+
+bool Direct::Pic30::sendCommand(Command cmd)
+{
+  for (uint i=0; i<4; i++) {
+    hardware().setPin(DataOut, ((cmd>>i) & 1 ? High : Low));
+    hardware().setPin(Clock, High);
+    Port::nsleep(100);
+    hardware().setPin(Clock, Low);
+    Port::nsleep(100);
+  }
+  return true;
+}
+
+bool Direct::Pic30::executeSIX(uint opcode)
+{
+  if ( !sendCommand(SIX) ) return false;
+  for (uint i=0; i<24; i++) {
+    hardware().setPin(DataOut, ((opcode>>i) & 1 ? High : Low));
+    hardware().setPin(Clock, High);
+    Port::nsleep(100);
+    hardware().setPin(Clock, Low);
+    // seem to need this longer delay here -- maybe
+    // specific to my programmer hardware? #### from dspicprg
+    Port::nsleep(5000);
+  }
+  return true;
+}
+
+bool Direct::Pic30::executeREGOUT(uint &v)
+{
+  v = 0;
+  if ( !sendCommand(REGOUT) ) return false;
+  hardware().setPin(DataOut, High);
+  for (uint i=0; i<24; i++) {
+    hardware().setPin(Clock, High);
+    Port::nsleep(100);
+    hardware().setPin(Clock, Low);
+    // as above, need extra delay here, but even
+    // longer in this case -- maybe data line takes
+    // longer to settle when it is being driven by
+    // the PIC than by the programmer? #### from dspicprg
+    Port::nsleep(10000);
+    if ( i>=8 ) {
+      uint r = hardware().readBit();
+      v |= (r << (i-8));
+    }
+  }
+  return true;
+}
+
+bool Direct::Pic30::doStdpSequence(const uint *sequence, uint address, const char *outData, char *inData)
+{
+  uint loopStart = 0, loopCound = 0;
+  for (uint i=0; sequence[i]!=End; i++) {
+    uint opcode = (sequence[i] & OpcodeMask);
+    switch (Operation(sequence[i] & OperationMask)) {
+    case SendSix:
+      if ( !executeSIX(opcode) ) return false;
+      break;
+    case RegisterOut: {
+      uint v;
+      if ( !executeREGOUT(v) ) return false;
+      (*inData) = v & 0xFF;
+      inData++;
+      (*inData) = (v >> 8) & 0xFF;
+      inData++;
+      break;
+    }
+    case Pause:
+      Port::nsleep(opcode);
+      break;
+    case LoopStart:
+      loopCound = opcode;
+      loopStart = i;
+      break;
+    case LoopEnd:
+      loopCound--;
+      if (loopCound) i = loopStart;
+      break;
+    case FillData: {
+      uint v = *outData;
+      v <<= 4;
+      outData++;
+      v |= *outData;
+      outData++;
+      v <<= 4;
+      executeSIX(v | opcode);
+      break;
+    }
+    case FillAddressLow: {
+      uint v = address & 0xFFFF;
+      v <<= 4;
+      executeSIX(v | opcode);
+      break;
+    }
+    case FillAddressHigh: {
+      uint v = (address & 0xFF0000) >> 16;
+      v <<= 4;
+      executeSIX(v | opcode);
+      break;
+    }
+    case End: Q_ASSERT(false); break;
+    }
+  }
+  return true;
+}
+
+bool Direct::Pic30::doErase(bool)
+{
+  if ( !enterStdpMode() ) return false;
+  if ( !doStdpSequence(BULK_ERASE_SEQUENCE, 0, 0, 0) ) return false;
+  return exitStdpMode();
+}
+
+bool Direct::Pic30::doRead(Pic::MemoryRangeType type, Device::Array &data, const ::Programmer::VerifyData *data)
+{
+  // #### TODO
+  return false;
+}
+
+bool Direct::Pic30::doWrite(Pic::MemoryRangeType type, const Device::Array &data, bool force)
+{
+  // #### TODO
+  return false;
+}
diff --git a/src/progs/direct/base/direct_30.h b/src/progs/direct/base/direct_30.h
new file mode 100644
index 0000000..458496e
--- /dev/null
+++ b/src/progs/direct/base/direct_30.h
@@ -0,0 +1,44 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DIRECT_30_H
+#define DIRECT_30_H
+
+#include "direct_pic.h"
+
+namespace Direct
+{
+//----------------------------------------------------------------------------
+class Pic30 : public PicDeviceSpecific
+{
+public:
+  Pic30(::Programmer::Base &base) : PicDeviceSpecific(base) {}
+  virtual bool doErase(bool isProtected);
+  virtual bool doRead(Pic::MemoryRangeType type, Device::Array &data, const ::Programmer::VerifyData *data);
+  virtual bool doWrite(Pic::MemoryRangeType type, const Device::Array &data, bool force);
+  virtual bool setPowerOn() { return setPowerOnVddFirst(); }
+
+public:
+  enum Operation { SendSix        = 0x0000000, RegisterOut     = 0x1000000, Pause    = 0x2000000,
+                   LoopStart      = 0x3000000, LoopEnd         = 0x4000000, FillData = 0x5000000,
+                   FillAddressLow = 0x6000000, FillAddressHigh = 0x7000000, End      = 0x8000000 };
+  enum Mask { OperationMask = 0xF000000, OpcodeMask    = 0x0FFFFFF };
+
+private:
+  bool enterStdpMode() { return pulseEngine("cdB"); }
+  bool exitStdpMode() { return pulseEngine("cdb"); }
+  bool doStdpSequence(const uint *sequence, uint address, const char *outData, char *inData);
+  enum Command { SIX = 0x0, REGOUT = 0x1 };
+  bool sendCommand(Command command);
+  bool executeSIX(uint opcode);
+  bool executeREGOUT(uint &value);
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/direct/base/direct_baseline.cpp b/src/progs/direct/base/direct_baseline.cpp
new file mode 100644
index 0000000..996eb12
--- /dev/null
+++ b/src/progs/direct/base/direct_baseline.cpp
@@ -0,0 +1,88 @@
+/***************************************************************************
+ *   Copyright (C) 2003-2005 Alain Gibaud <alain.gibaud@free.fr>           *
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "direct_baseline.h"
+
+//----------------------------------------------------------------------------
+bool Direct::Baseline::gotoMemory(Pic::MemoryRangeType type)
+{
+  switch (type.type()) {
+    case Pic::MemoryRangeType::Config: return true;
+    case Pic::MemoryRangeType::Eeprom: return true;
+    case Pic::MemoryRangeType::Code:
+    case Pic::MemoryRangeType::Cal:
+    case Pic::MemoryRangeType::UserId:
+    case Pic::MemoryRangeType::CalBackup: return incrementPC(device().range(type).start.toUInt()+1);
+    case Pic::MemoryRangeType::DeviceId:
+    case Pic::MemoryRangeType::DebugVector:
+    case Pic::MemoryRangeType::HardwareStack:
+    case Pic::MemoryRangeType::ProgramExecutive:
+    case Pic::MemoryRangeType::Nb_Types: break;
+  }
+  Q_ASSERT(false);
+  return false;
+}
+
+//-----------------------------------------------------------------------------
+bool Direct::P12C5XX::writeWords(Pic::MemoryRangeType type, const Device::Array &data, uint i)
+{
+  BitValue word = data[i];
+  // config requires a total of 10ms Pulses == 100 x 100 us
+  uint total = (type==Pic::MemoryRangeType::Config ? 100 : 8);
+  uint n = 0;
+  for (; n<total; n++) {
+    pulseEngine("k2,S,k8,w100,k14,w5000", word);
+    if ( readWord(type)==word ) break;
+  }
+  if ( n==total ) return false;
+  if ( type!=Pic::MemoryRangeType::Config ) {
+    // 11 x (n+1) additionnal passes
+    for (uint k = 0; k<11*(n+1); k++)
+      pulseEngine("k2,S,k8,w100,k14,w5000", word);
+  }
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+bool Direct::P10F2XX::doEraseRange(Pic::MemoryRangeType type)
+{
+  Q_ASSERT( type==Pic::MemoryRangeType::Code );
+  Device::Array array;
+  if ( !doRead(Pic::MemoryRangeType::Config, array, 0) ) return false;
+  gotoMemory(Pic::MemoryRangeType::Config);
+  pulseEngine("k9,w10000"); // 10ms
+  return doWrite(Pic::MemoryRangeType::Config, array, true);
+}
+
+bool Direct::P10F2XX::doErase(bool)
+{
+  gotoMemory(Pic::MemoryRangeType::UserId);
+  pulseEngine("k9,w10000"); // 10ms
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+bool Direct::P12C67X::writeWords(Pic::MemoryRangeType type, const Device::Array &data, uint i)
+{
+  BitValue word = data[i];
+  // config requires a total of 10ms Pulses == 100 x 100 us
+  uint total = (type==Pic::MemoryRangeType::Config ? 100 : 25);
+  uint n = 0;
+  for (; n<total; n++) {
+    pulseEngine("k2,S,k8,w100,k14,w5000", word);
+    if ( readWord(type)==word ) break;
+  }
+  if ( n==total ) return false;
+  if ( type!=Pic::MemoryRangeType::Config ) {
+    // 3 x (n+1) additionnal passes
+    for (uint k = 0; k<3*(n+1); k++)
+      pulseEngine("k2,S,k8,w100,k14,w5000", word);
+  }
+  return true;
+}
diff --git a/src/progs/direct/base/direct_baseline.h b/src/progs/direct/base/direct_baseline.h
new file mode 100644
index 0000000..0987dea
--- /dev/null
+++ b/src/progs/direct/base/direct_baseline.h
@@ -0,0 +1,68 @@
+/***************************************************************************
+ *   Copyright (C) 2003-2005 Alain Gibaud <alain.gibaud@free.fr>           *
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DIRECT_BASELINE_HH
+#define DIRECT_BASELINE_HH
+
+#include "direct_16F.h"
+
+namespace Direct
+{
+//-----------------------------------------------------------------------------
+class Baseline : public pic16
+{
+public:
+  Baseline(::Programmer::Base &base) : pic16(base) {}
+  virtual bool gotoMemory(Pic::MemoryRangeType type);
+  virtual bool setPowerOn() { return setPowerOnVppFirst(); }
+};
+
+//-----------------------------------------------------------------------------
+class P12C5XX : public Baseline
+{
+public:
+  P12C5XX(::Programmer::Base &base) : Baseline(base) {}
+  virtual bool writeWords(Pic::MemoryRangeType type, const Device::Array &data, uint i);
+  virtual bool doEraseRange(Pic::MemoryRangeType) { return false; }
+  virtual bool doErase(bool) { return false; }
+  virtual uint waitProgTime(Pic::MemoryRangeType) const { return 0; } // unused
+};
+
+//-----------------------------------------------------------------------------
+class P10F2XX : public Baseline
+{
+public:
+  P10F2XX(::Programmer::Base &base) : Baseline(base) {}
+  virtual bool doEraseRange(Pic::MemoryRangeType type);
+  virtual bool doErase(bool);
+  virtual uint waitProgTime(Pic::MemoryRangeType) const { return 2000; }
+  virtual void endProg(Pic::MemoryRangeType) { pulseEngine("k14,w100"); }
+};
+
+class P16F57 : public P10F2XX
+{
+public:
+  P16F57(::Programmer::Base &base) : P10F2XX(base) {}
+  virtual uint nbWordsCodeProg() const { return 4; }
+};
+
+//-----------------------------------------------------------------------------
+class P12C67X : public P16F
+{
+public:
+  P12C67X(::Programmer::Base &base) : P16F(base) {}
+  virtual bool writeWords(Pic::MemoryRangeType type, const Device::Array &data, uint i);
+  virtual uint waitProgTime(Pic::MemoryRangeType) const { return 0; } // unused
+  virtual bool doEraseRange(Pic::MemoryRangeType) { return false; }
+  virtual bool doErase(bool) { return false; }
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/direct/base/direct_data.h b/src/progs/direct/base/direct_data.h
new file mode 100644
index 0000000..0b84084
--- /dev/null
+++ b/src/progs/direct/base/direct_data.h
@@ -0,0 +1,21 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DIRECT_DATA_H
+#define DIRECT_DATA_H
+
+namespace Direct
+{
+
+struct Data {
+};
+extern const Data &data(const QString &device);
+
+} // namespace
+
+#endif
diff --git a/src/progs/direct/base/direct_mem24.cpp b/src/progs/direct/base/direct_mem24.cpp
new file mode 100644
index 0000000..a719add
--- /dev/null
+++ b/src/progs/direct/base/direct_mem24.cpp
@@ -0,0 +1,207 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "direct_mem24.h"
+
+#include <qdatetime.h>
+
+#include "common/global/global.h"
+#include "common/common/misc.h"
+
+Direct::Mem24DeviceSpecific::Mem24DeviceSpecific(::Programmer::Base &base)
+  : ::Programmer::Mem24DeviceSpecific(base)
+{}
+
+bool Direct::Mem24DeviceSpecific::setPowerOn()
+{
+  hardware().setPin(Clock, Low);
+  hardware().setPin(DataOut, Low);
+  hardware().setPin(Vpp, Off);
+  if ( hardware().isGroundPin(Vdd) ) {
+    hardware().setPin(Clock, High);
+    Port::usleep(500000);
+  } else {
+    hardware().setPin(Vdd, On);
+    Port::usleep(10000);
+  }
+  return true;
+}
+
+bool Direct::Mem24DeviceSpecific::setPowerOff()
+{
+  hardware().setPin(Clock, Low);
+  hardware().setPin(DataOut, Low);
+  hardware().setPin(Vpp, Off);
+  hardware().setPin(Vdd, Off);
+  Port::usleep(10000);
+  return true;
+}
+
+bool Direct::Mem24DeviceSpecific::verifyPresence()
+{
+  if ( !start() ) return false;
+  bool acked;
+  if ( !writeByte(controlByte(0x0, Write), acked) ) return false;
+  if ( !acked ) {
+    log(Log::LineType::Error, i18n("Could not detect EEPROM"));
+    return false;
+  }
+  log(Log::LineType::Information, i18n("EEPROM detected"));
+  return stop();
+}
+
+uint Direct::Mem24DeviceSpecific::controlByte(uint address, Operation operation) const
+{
+  uint cbyte = (operation==Write ? 0xA0 : 0xA1);
+  uint bsize = device().nbBytes() / device().nbBlocks();
+  uint block = address / bsize;
+  uint nbb = nbBits(device().nbBlocks()-1);
+  for (uint i=0; i<nbb; i++)
+    if ( block & (1<<i) ) cbyte |= 1 << (4-nbb+i);
+  return cbyte;
+}
+
+bool Direct::Mem24DeviceSpecific::setAddress(uint address)
+{
+  log(Log::DebugLevel::Extra, QString("set address %1").arg(toHexLabel(address, nbChars(NumberBase::Hex, address))));
+  if ( !start() ) return false;
+  uint bsize = device().nbBytes() / device().nbBlocks();
+  uint block = address / bsize;
+  log(Log::DebugLevel::Extra, QString("  in block #%1/%2").arg(block).arg(device().nbBlocks()));
+  uint cbyte = controlByte(address, Write);
+  log(Log::DebugLevel::Max, QString("  control byte is %1").arg(toHexLabel(cbyte, 2)));
+  if ( !writeByteAck(cbyte) ) return false;
+  uint nb = nbBytes(bsize-1);
+  for (int i=nb-1; i>=0; i--) {
+    uint add = (address >> 8*i) & 0xFF;
+    log(Log::DebugLevel::Max, QString("  byte #%1: %2").arg(i).arg(toHexLabel(add, 2)));
+    if ( !writeByteAck(add) ) return false;
+  }
+  return true;
+}
+
+bool Direct::Mem24DeviceSpecific::doRead(Device::Array &data, const ::Programmer::VerifyData *vdata)
+{
+  // sequential read: all device memory
+  if ( !setAddress(0x0) ) return false;
+  if ( !start() ) return false;
+  if ( !writeByteAck(controlByte(0x0, Read)) ) return false;
+  data.resize(device().nbBytes());
+  for (uint i=0; i<data.count()-1; i++) data[i] = readByte(Low);
+  data[data.count()-1] = readByte(High);
+  if (vdata) {
+    for (uint i=0; i<data.count(); i++)
+      if ( !verifyByte(i, data[i], *vdata) ) return false;
+  }
+  return stop();
+}
+
+bool Direct::Mem24DeviceSpecific::doWrite(const Device::Array &data)
+{
+  QTime time;
+  // page by page (page_size==1: byte by byte)
+  uint nbPages = device().nbBytes() / device().nbBytesPage();
+  for (uint i=0; i<nbPages; i++) {
+    log(Log::DebugLevel::Extra, QString("write page #%1/%2").arg(i).arg(nbPages));
+    uint address = i * device().nbBytesPage();
+    // write bytes
+    if ( !setAddress(address) ) return false;
+    for (uint k=0; k<device().nbBytesPage(); k++)
+      if ( !writeByteAck(data[address+k]) ) return false;
+    if ( !stop() ) return false;
+    // poll
+    time.start();
+    for (;;) {
+      if ( !start() ) return false;
+      bool acked;
+      if ( !writeByte(controlByte(address, Write), acked) ) return false;
+      if (acked) break;
+      if ( time.elapsed()>200 ) { // 200 ms timeout
+        log(Log::LineType::Error, i18n("Timeout writing at address %1").arg(toHexLabel(address, nbChars(device().nbBytes()))));
+        return false;
+      }
+    }
+  }
+  return true;
+}
+
+void Direct::Mem24DeviceSpecific::set(State clock, State data)
+{
+  hardware().setPin(Clock, clock);
+  hardware().setPin(DataOut, data);
+  Port::usleep(5); // #### needed ?
+}
+
+void Direct::Mem24DeviceSpecific::setData(State data)
+{
+  set(Low, data);
+  set(High, data);
+  set(Low, data);
+}
+
+BitValue Direct::Mem24DeviceSpecific::readByte(State ack)
+{
+  hardware().setRead();
+  set(Low, High);
+  BitValue b = 0;
+  for (uint i=0; i<8; i++) {
+    set(High, High);
+    b <<= 1;
+    if ( hardware().readBit() ) b |= 0x1;
+    set(Low, High);
+  }
+  hardware().setWrite();
+  setData(ack);
+  return b;
+}
+
+bool Direct::Mem24DeviceSpecific::writeByteAck(BitValue value)
+{
+  bool acked;
+  if ( !writeByte(value, acked) ) return false;
+  if (!acked) {
+    log(Log::LineType::Error, i18n("Acknowledge bit incorrect"));
+    return false;
+  }
+  return true;
+}
+
+bool Direct::Mem24DeviceSpecific::writeByte(BitValue value, bool &acked)
+{
+  Q_ASSERT( value<=0xFF );
+  hardware().setWrite();
+  set(Low, Low);
+  for (int i=7; i>=0; i--) setData(value.bit(i) ? High : Low);
+  hardware().setRead();
+  set(Low, High);
+  set(High, High);
+  acked = !hardware().readBit();
+  hardware().setWrite();
+  set(Low, High);
+  return true;
+}
+
+bool Direct::Mem24DeviceSpecific::start()
+{
+  hardware().setWrite();
+  set(Low, High);
+  set(High, High);
+  set(High, Low);
+  set(Low, Low);
+  return true;
+}
+
+bool Direct::Mem24DeviceSpecific::stop()
+{
+  hardware().setWrite();
+  set(Low, Low);
+  set(High, Low);
+  set(High, High);
+  set(Low, High);
+  return true;
+}
diff --git a/src/progs/direct/base/direct_mem24.h b/src/progs/direct/base/direct_mem24.h
new file mode 100644
index 0000000..64f2a9d
--- /dev/null
+++ b/src/progs/direct/base/direct_mem24.h
@@ -0,0 +1,47 @@
+/***************************************************************************\
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DIRECT_MEM24_H
+#define DIRECT_MEM24_H
+
+#include "devices/mem24/prog/mem24_prog.h"
+#include "direct.h"
+
+namespace Direct
+{
+
+class Mem24DeviceSpecific : public ::Programmer::Mem24DeviceSpecific
+{
+public:
+  Mem24DeviceSpecific(::Programmer::Base &base);
+  virtual Hardware &hardware() { return static_cast<Hardware &>(*_base.hardware()); }
+  const Mem24::Data &device() const { return static_cast<const Mem24::Data &>(*::Programmer::DeviceSpecific::_base.device()); }
+  virtual bool init() { return true; }
+  virtual bool setPowerOff();
+  virtual bool setPowerOn();
+  virtual bool setTargetPowerOn(bool) { return true; }
+  virtual bool verifyPresence();
+
+private:
+  virtual bool doRead(Device::Array &data, const ::Programmer::VerifyData *vdata);
+  virtual bool doWrite(const Device::Array &data);
+  bool start();
+  bool stop();
+  BitValue readByte(State ack);
+  bool writeByte(BitValue value, bool &acked);
+  bool writeByteAck(BitValue value);
+  void set(State clock, State data);
+  void setData(State data);
+  enum Operation { Write, Read };
+  uint controlByte(uint address, Operation operation) const;
+  bool setAddress(uint address);
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/direct/base/direct_pic.cpp b/src/progs/direct/base/direct_pic.cpp
new file mode 100644
index 0000000..30e4722
--- /dev/null
+++ b/src/progs/direct/base/direct_pic.cpp
@@ -0,0 +1,187 @@
+/***************************************************************************
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "direct_pic.h"
+
+#include "common/common/misc.h"
+
+//-----------------------------------------------------------------------------
+Direct::PulseEngine::PulseEngine(::Programmer::Base &base)
+  : _pbase(base)
+{
+  _clockDelay = 0;
+}
+
+BitValue Direct::PulseEngine::pulseEngine(const QString &cmd, BitValue value)
+{
+  _pbase.log(Log::DebugLevel::Extra, QString("pulse engine: %1").arg(cmd));
+  QByteArray a = toAscii(cmd);
+  BitValue res = 0;
+  for (const char *ptr=a.data(); (ptr-a.data())<int(a.count()); ++ptr)
+    if ( !pulse(ptr, value, res) ) qFatal("pulse engine: invalid command '%c'", *ptr);
+  return res;
+}
+
+// Electric signals level commands:
+// UPPER case means signal High - lower case means Low
+//  Example: "cPCcp" means "clock-low, power on, clock high, clock low, power off".
+// c/C = clock
+// d/D = data
+// p/P = power (vdd)
+// Higher level commands:
+// wnnnnn = wait nnnnn microseconds (nnnnn is decimal)
+// , = a shorthand for w1
+// ; or space = NOP (can be used as separator - useful in debug mode)
+bool Direct::PulseEngine::pulse(const char * &cmd, BitValue, BitValue &)
+{
+  switch (*cmd) {
+    case ';':
+    case ' ':
+      _pbase.log(Log::DebugLevel::Max, "NOP");
+      break;
+    case 'c':
+      _pbase.log(Log::DebugLevel::Max, "CLOCK L");
+      hardware().setPin(Clock, Low);
+      break;
+    case 'C':
+      _pbase.log(Log::DebugLevel::Max, "CLOCK H");
+      hardware().setPin(Clock, High);
+      break;
+    case 'd':
+      _pbase.log(Log::DebugLevel::Max, "DATA L");
+      hardware().setPin(DataOut, Low);
+      break;
+    case 'D':
+      _pbase.log(Log::DebugLevel::Max, "DATA H");
+      hardware().setPin(DataOut, High);
+      break;
+    case 'p':
+      _pbase.log(Log::DebugLevel::Max, "VDD Off");
+      hardware().setPin(Vdd, Off);
+      Port::usleep(10000);
+      break;
+    case 'P':
+      _pbase.log(Log::DebugLevel::Max, "VDD On");
+      hardware().setPin(Vdd, On);
+      // wait 10ms for ALL devices because some programmers (or target board) have capacitors to charge
+      Port::usleep(10000);
+      break;
+    case 'w': {
+      uint n = 0;
+      for(; *(cmd+1) && isdigit((int)*(cmd+1)); ++cmd)
+        n = (n * 10) + *(cmd+1) - '0';
+      _pbase.log(Log::DebugLevel::Max, "WAIT " + QString::number(n) + " micro-sec.");
+      Port::usleep(n);
+      break;
+    }
+    case ',':
+      _pbase.log(Log::DebugLevel::Max, "WAIT 1 micro-sec");
+      Port::usleep(1);
+      break;
+    default: return false;
+  }
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+Direct::PicDeviceSpecific::PicDeviceSpecific(::Programmer::Base &base)
+  : ::Programmer::PicDeviceSpecific(base), PulseEngine(base)
+{}
+
+// Electric signals level commands:
+// UPPER case means signal High - lower case means Low
+// b/B = burn (vpp)
+bool Direct::PicDeviceSpecific::pulse(const char *&cmd, BitValue value, BitValue &res)
+{
+  switch (*cmd) {
+    case 'b':
+      log(Log::DebugLevel::Max, "VPP Off");
+      hardware().setPin(Vpp, Off);
+      Port::usleep(10); // 10us
+      break;
+    case 'B':
+      log(Log::DebugLevel::Max, "VPP On");
+      hardware().setPin(Vpp, On);
+      Port::usleep(100000); // 100ms
+      break;
+    default: return PulseEngine::pulse(cmd, value, res);
+  }
+  return true;
+}
+
+bool Direct::PicDeviceSpecific::setPowerOnVddFirst()
+{
+  setPowerOff();
+  switch (hardware().type()) {
+    case Normal:
+      if ( hardware().isGroundPin(Vdd) ) { // some programmer cannot change Vdd independently
+        pulseEngine("B");  // charge capacitor to have high Vdd
+        pulseEngine("bB"); // turn off Vpp briefly, Vpp on
+      } else pulseEngine("PB");
+      break;
+    case EPEToolkitMK3:
+      pulseEngine("B"); // put MCLR at 0V
+      pulseEngine("bP"); // put MCLR on multiplexer and turn multiplexer to 12V
+      break;
+  }
+  return true;
+}
+
+bool Direct::PicDeviceSpecific::setPowerOnVppFirst()
+{
+  setPowerOff();
+  pulseEngine("BP");
+  return true;
+}
+
+bool Direct::PicDeviceSpecific::setPowerOff()
+{
+  pulseEngine("cdpb"); // turn off Vpp after Vdd to prevent running device
+  pulseEngine("w50000"); // to be on the safe size with multiple on/off
+  return true;
+}
+
+bool Direct::PicDeviceSpecific::setTargetPowerOn(bool on)
+{
+  pulseEngine(on ? "P" : "p");
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+// Higher level commands:
+// S = send data word
+// R = read data word
+// r = read byte
+// knn = send 6 or 4 bits command nn to PIC (nn is decimal)
+bool Direct::Pic8DeviceSpecific::pulse(const char *&cmd, BitValue value, BitValue &res)
+{
+  switch (*cmd) {
+    case 'S':
+      log(Log::DebugLevel::Max, "SEND " + toHexLabel(value, 4));
+      send_word(value);
+      break;
+    case 'R':
+      log(Log::DebugLevel::Max, "Read Word");
+      res = get_word();
+      break;
+    case 'r':
+      log(Log::DebugLevel::Max, "Read Byte");
+      res = get_byte();
+      break;
+    case 'k': {
+      uint n = 0;
+      for(; *(cmd+1) && isdigit((int)*(cmd+1)); ++cmd)
+        n = (n * 10) + *(cmd+1) - '0';
+      log(Log::DebugLevel::Max, "SEND cmd " + QString::number(n));
+      send_cmd(n);
+      break;
+    }
+    default: return PicDeviceSpecific::pulse(cmd, value, res);
+  }
+  return true;
+}
diff --git a/src/progs/direct/base/direct_pic.h b/src/progs/direct/base/direct_pic.h
new file mode 100644
index 0000000..39cd97c
--- /dev/null
+++ b/src/progs/direct/base/direct_pic.h
@@ -0,0 +1,68 @@
+/***************************************************************************
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DIRECT_PIC_H
+#define DIRECT_PIC_H
+
+#include "devices/pic/pic/pic_memory.h"
+#include "direct.h"
+
+namespace Direct
+{
+//-----------------------------------------------------------------------------
+class PulseEngine
+{
+public:
+  PulseEngine(::Programmer::Base &base);
+  virtual ~PulseEngine() {}
+  BitValue pulseEngine(const QString &command, BitValue value = 0);
+
+protected:
+  ::Programmer::Base &_pbase;
+  uint _clockDelay; // additionnal delay for buggy hardware
+
+  virtual bool pulse(const char *&cmd, BitValue value, BitValue &res);
+  virtual Hardware &hardware() { return static_cast<Hardware &>(*_pbase.hardware()); }
+};
+
+//-----------------------------------------------------------------------------
+class PicDeviceSpecific : public ::Programmer::PicDeviceSpecific, public PulseEngine
+{
+public:
+  PicDeviceSpecific(::Programmer::Base &base);
+  virtual bool canEraseAll() const { return true; }
+  virtual bool canEraseRange(Pic::MemoryRangeType type) const { return ( type==Pic::MemoryRangeType::Code || type==Pic::MemoryRangeType::Eeprom ); }
+  virtual bool canReadRange(Pic::MemoryRangeType) const { return true; }
+  virtual bool canWriteRange(Pic::MemoryRangeType) const { return true; }
+  virtual bool setPowerOff();
+  virtual bool setTargetPowerOn(bool on);
+
+protected:
+  virtual bool pulse(const char *&cmd, BitValue value, BitValue &res);
+  bool setPowerOnVddFirst();
+  bool setPowerOnVppFirst();
+};
+
+//-----------------------------------------------------------------------------
+class Pic8DeviceSpecific : public PicDeviceSpecific
+{
+public:
+  Pic8DeviceSpecific(::Programmer::Base &base) : PicDeviceSpecific(base) {}
+
+protected:
+  virtual bool pulse(const char *&cmd, BitValue value, BitValue &res);
+  virtual void send_word(BitValue word) = 0;
+  virtual void send_bits(BitValue d, uint nbBits) = 0;
+  virtual void send_cmd(BitValue d) = 0;
+  virtual BitValue get_word() = 0;
+  virtual BitValue get_byte() = 0;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/direct/base/direct_prog.cpp b/src/progs/direct/base/direct_prog.cpp
new file mode 100644
index 0000000..3e4f168
--- /dev/null
+++ b/src/progs/direct/base/direct_prog.cpp
@@ -0,0 +1,62 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "direct_prog.h"
+
+#include "devices/base/device_group.h"
+#include "devices/list/device_list.h"
+#include "direct_prog_config.h"
+#include "direct_mem24.h"
+//#include "direct_30.h"
+
+Hardware::Config *Direct::DGroup::hardwareConfig() const
+{
+  return new Config;
+}
+
+void Direct::DGroup::initSupported()
+{
+  Group::initSupported();
+  //  const ::Group::Base *gpic = Device::lister().group("pic");
+  ::Group::Base::ConstIterator pit;
+  //  for (pit=gpic->begin(); pit!=gpics->end(); ++pit) {
+  //    ::Group::DeviceData data = pit.data();
+  //    if ( static_cast<const Pic::Data *>(data.data)->architecture()!=Pic::Architecture::P30X ) continue;
+  //    data.supportType = ::Group::Untested;
+  //    addDevice(data);
+  //  }
+  const ::Group::Base *gmem24 = Device::lister().group("mem24");
+  for (pit=gmem24->begin(); pit!=gmem24->end(); ++pit) addDevice(pit.key(), pit.data().data, pit.data().support);
+}
+
+::Programmer::Base *Direct::DGroup::createBase(const Device::Data *data) const
+{
+  if ( data==0 || data->group().name()=="pic" ) return new PicBase(*this, static_cast<const Pic::Data *>(data));
+  return new Mem24Base(*this, static_cast<const Mem24::Data *>(data));
+}
+
+::Programmer::Hardware *Direct::DGroup::createHardware(::Programmer::Base &base, const ::Programmer::HardwareDescription &hd) const
+{
+  Config config;
+  HardwareData *hdata = static_cast<HardwareData *>(config.hardwareData(hd.name));
+  Q_ASSERT( hdata->portType==hd.port.type );
+  ::Programmer::Hardware *hardware = 0;
+  if ( hd.port.type==PortType::Serial ) hardware = new SerialHardware(base, hd.port.device, *hdata);
+  else hardware = new ParallelHardware(base, hd.port.device, *hdata);
+  delete hdata;
+  return hardware;
+}
+
+::Programmer::DeviceSpecific *Direct::DGroup::createDeviceSpecific(::Programmer::Base &base) const
+{
+  if ( base.device()->group().name()=="pic" ) {
+    //    if ( static_cast<const Pic::Data *>(base.device())->architecture()==Pic::Architecture::P30X ) return new Pic30(base);
+    return Group::createDeviceSpecific(base);
+  }
+  return new Mem24DeviceSpecific(base);
+}
diff --git a/src/progs/direct/base/direct_prog.h b/src/progs/direct/base/direct_prog.h
new file mode 100644
index 0000000..34ca0b7
--- /dev/null
+++ b/src/progs/direct/base/direct_prog.h
@@ -0,0 +1,74 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DIRECT_PROG_H
+#define DIRECT_PROG_H
+
+#include "common/global/global.h"
+#include "progs/base/prog_group.h"
+#include "devices/pic/prog/pic_prog.h"
+#include "devices/mem24/prog/mem24_prog.h"
+#include "direct.h"
+
+namespace Direct
+{
+  extern bool isSupported(const QString &device);
+  class Hardware;
+
+//----------------------------------------------------------------------------
+class PicBase : public ::Programmer::PicBase
+{
+Q_OBJECT
+public:
+  PicBase(const ::Programmer::Group &group, const Pic::Data *data)
+    : ::Programmer::PicBase(group, data, "pic_direct_programmer") {}
+
+private:
+  Hardware &hardware() { return static_cast<Hardware &>(*_hardware); }
+};
+
+//----------------------------------------------------------------------------
+class Mem24Base : public ::Programmer::Mem24Base
+{
+Q_OBJECT
+public:
+  Mem24Base(const ::Programmer::Group &group, const Mem24::Data *data)
+    : ::Programmer::Mem24Base(group, data, "mem24_direct_programmer") {}
+
+private:
+  Hardware &hardware() { return static_cast<Hardware &>(*_hardware); }
+};
+
+//----------------------------------------------------------------------------
+class Group : public ::Programmer::PicGroup // methods defined in direct_data.cpp
+{
+protected:
+  virtual void initSupported();
+  virtual ::Programmer::DeviceSpecific *createDeviceSpecific(::Programmer::Base &base) const;
+};
+
+class DGroup : public Group
+{
+public:
+  virtual QString name() const { return "direct"; }
+  virtual QString label() const { return i18n("Direct Programmer"); }
+  virtual ::Hardware::Config *hardwareConfig() const;
+  virtual ::Programmer::Properties properties() const { return ::Programmer::Programmer | ::Programmer::CanReadMemory | ::Programmer::HasConnectedState; }
+  virtual ::Programmer::TargetPowerMode targetPowerMode() const { return ::Programmer::TargetExternallyPowered; }
+  virtual bool isPortSupported(PortType type) const { return ( type==PortType::Serial || type==PortType::Parallel ); }
+
+protected:
+  virtual void initSupported();
+  virtual ::Programmer::Base *createBase(const Device::Data *data) const;
+  virtual ::Programmer::Hardware *createHardware(::Programmer::Base &base, const ::Programmer::HardwareDescription &hd) const;
+  virtual ::Programmer::DeviceSpecific *createDeviceSpecific(::Programmer::Base &base) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/direct/base/direct_prog_config.cpp b/src/progs/direct/base/direct_prog_config.cpp
new file mode 100644
index 0000000..ffce899
--- /dev/null
+++ b/src/progs/direct/base/direct_prog_config.cpp
@@ -0,0 +1,145 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2005 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "direct_prog_config.h"
+
+//-----------------------------------------------------------------------------
+struct ConstHardwareData
+{
+  PortType portType;
+  Direct::HData data;
+};
+
+struct ConstStandardHardwareData
+{
+  ::Hardware::DataInfo info;
+  ConstHardwareData data;
+};
+
+const ConstStandardHardwareData STANDARD_HARDWARE_DATA[] = {
+  { { "Tait classic",           I18N_NOOP("Tait classic"),           0 },
+    { PortType::Parallel, { {  -5, -4,  3,  2, 10, 25 },  0, Direct::Normal } } },
+  { { "Tait 7405/7406",         I18N_NOOP("Tait 7405/7406"),         0 },
+    { PortType::Parallel, { {   5,  4, -3, -2,-10, 25 },  0, Direct::Normal } } },
+  { { "P16PRO40 classic",       I18N_NOOP("P16PRO40 classic"),       0 },
+    { PortType::Parallel, { {   5,  4, -3, -2,-10, 25 },  0, Direct::Normal } } },
+  { { "P16PRO40 7407",          I18N_NOOP("P16PRO40 7407"),          0 },
+    { PortType::Parallel, { {  -5, -4,  3,  2, 10, 25 },  0, Direct::Normal } } },
+  { { "P16PRO40-VPP40 classic", I18N_NOOP("P16PRO40-VPP40 classic"), 0 },
+    { PortType::Parallel, { {   6,  4, -3, -2,-10, 25 },  0, Direct::Normal } } },
+  { { "P16PRO40-VPP40 7407",    I18N_NOOP("P16PRO40-VPP40 7407"),    0 },
+    { PortType::Parallel, { {  -6, -4,  3,  2, 10, 25 },  0, Direct::Normal } } },
+  { { "EPIC+",                  I18N_NOOP("EPIC+"),
+    I18N_NOOP("You must disconnect 7407 pin 2") },
+    { PortType::Parallel, { {  -5, -4,  3,  2, 10, 25 },  0, Direct::Normal } } },
+  { { "JDM classic",            I18N_NOOP("JDM classic"),            0 },
+    { PortType::Serial,   { {   3,  5,  7,  4,  8,  5 },  0, Direct::Normal } } },
+  { { "JDM classic (delay 10)", I18N_NOOP("JDM classic (delay 10)"), 0 },
+    { PortType::Serial,   { {   3,  5,  7,  4,  8,  5 }, 10, Direct::Normal } } },
+  { { "JDM classic (delay 20)", I18N_NOOP("JDM classic (delay 20)"), 0 },
+    { PortType::Serial,   { {   3,  5,  7,  4,  8,  5 }, 20, Direct::Normal } } },
+  { { "PIC Elmer",              I18N_NOOP("PIC Elmer"),              0 },
+    { PortType::Serial,   { {  -3,  5, -7, -4, -8,  5 },  0, Direct::Normal } } },
+  { { "Velleman K8048",         I18N_NOOP("Velleman K8048"),         0 },
+    { PortType::Serial,   { {  -3,  5, -7, -4, -8,  5 },  0, Direct::Normal } } },
+  { { "HOODMICRO",              I18N_NOOP("HOODMICRO"),
+    I18N_NOOP("Webpage: <a href=\"htpp://k9spud.com/hoodmicro\">htpp://k9spud.com/hoodmicro</a>") },
+    { PortType::Serial,   { {   4,  5,  7,  3,  8,  5 },  0, Direct::Normal } } },
+
+  //Added by Mirko Panciri 10/03/2004...
+  //Visit http://www.pic-tools.com
+  //I have tested only the "Asix Piccolo" version...
+  //I think the lines is the same of "Asix Piccolo Grande"...
+  { { "Asix Piccolo",           I18N_NOOP("Asix Piccolo"),           0 },
+    { PortType::Parallel, { {  -6, -7, -5, -3,-10, -2 },  0, Direct::Normal } } },
+  { { "Asix Piccolo Grande",    I18N_NOOP("Asix Piccolo Grande"),    0 },
+    { PortType::Parallel, { {  -6, -7, -5, -3,-10, -2 },  0, Direct::Normal } } },
+
+  { { "Propic2 Vpp-1",          I18N_NOOP("Propic2 Vpp-1"),          0 },
+    { PortType::Parallel, { {  -5, -4,  3,  2, 10, 25 },  0, Direct::Normal } } },
+  { { "Propic2 Vpp-2",          I18N_NOOP("Propic2 Vpp-2"),          0 },
+    { PortType::Parallel, { {  -6, -4,  3,  2, 10, 25 },  0, Direct::Normal } } },
+  { { "Propic2 Vpp-3",          I18N_NOOP("Propic2 Vpp-3"),          0 },
+    { PortType::Parallel, { {  -7, -4,  3,  2, 10, 25 },  0, Direct::Normal } } },
+  { { "Myke's EL Cheapo",       I18N_NOOP("Myke's EL Cheapo"),       0 },
+    { PortType::Parallel, { {  16, 25, -1,-17, 13, 25 },  0, Direct::Normal } } },
+  { { "EL Cheapo classic",      I18N_NOOP("EL Cheapo classic"),      I18N_NOOP("Not tested.") },
+    { PortType::Parallel, { {  16, 25,  1, 17,-13, 25 },  0, Direct::Normal } } },
+  { { "Monty-Robot programmer", I18N_NOOP("Monty-Robot programmer"), 0 },
+    { PortType::Parallel, { {  -5,  4,  2,  3, 10, 25 },  0, Direct::Normal } } },
+  { { "EPE Toolkit mk3",        I18N_NOOP("EPE Toolkit mk3"),
+    I18N_NOOP("This programmer pulses MCLR from 5V to 0V and then 12V to enter programming mode. It uses a multiplexer to switch between 5V and 12V (Vdd is here the multiplexer pin).<p>Webpage: <a href=\"http://www.epemag.wimborne.co.uk/1001.htm\">http://www.epemag.wimborne.co.uk/1001.htm</a>") },
+    { PortType::Parallel, { {   5,  6,  3,  2, 10, 25 },  0, Direct::EPEToolkitMK3 } } },
+
+  { { "ETT High Vpp",        I18N_NOOP("ETT High Vpp"),               0 },
+    { PortType::Parallel, { {  -5, -4,  3,   2, 10, 25 },  0, Direct::Normal } } },
+  { { "ETT Low Vpp",        I18N_NOOP("ETT Low Vpp"),
+    I18N_NOOP("Compatible with ET-CAB10PIN V2 programmer shipped by Futurlec, with their PIC16F877 controler board.") },
+    { PortType::Parallel, { {   3,  5,  2,  -1, 10, 25 },  0, Direct::Normal } } },
+
+  { { 0, 0, 0 },
+    { PortType::Serial,   { {   0,  0,  0,  0,  0,  0 },  0, Direct::Normal } } }
+};
+
+//-----------------------------------------------------------------------------
+void Direct::HardwareData::readConfig(GenericConfig &config)
+{
+  ::Hardware::Data::readConfig(config);
+  for (uint i=0; i<Nb_PinTypes; i++) data.pins[i] = config.readIntEntry(PIN_DATA[i].key);
+  data.clockDelay = config.readIntEntry("clkdelay");
+}
+
+void Direct::HardwareData::writeConfig(GenericConfig &config) const
+{
+  ::Hardware::Data::writeConfig(config);
+  for (uint i=0; i<Nb_PinTypes; i++) config.writeEntry(PIN_DATA[i].key, data.pins[i]);
+  config.writeEntry("clkdelay", data.clockDelay);
+}
+
+bool Direct::HardwareData::isEqual(const ::Hardware::Data &cdata) const
+{
+  if ( !::Hardware::Data::isEqual(cdata) ) return false;
+  const HData &hdata = static_cast<const HardwareData &>(cdata).data;
+  if ( data.clockDelay!=hdata.clockDelay ) return false;
+  for (uint i=0; i<Nb_PinTypes; i++)
+    if ( data.pins[i]!=hdata.pins[i] ) return false;
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+QStringList Direct::Config::standardHardwareNames(PortType type) const
+{
+  QStringList names;
+  for (uint i=0; STANDARD_HARDWARE_DATA[i].info.name; i++)
+    if ( STANDARD_HARDWARE_DATA[i].data.portType==type ) names += STANDARD_HARDWARE_DATA[i].info.name;
+  return names;
+}
+
+const Hardware::DataInfo *Direct::Config::standardHardwareDataInfo(const QString &name) const
+{
+  for (uint i=0; STANDARD_HARDWARE_DATA[i].info.name; i++) {
+    const ConstStandardHardwareData &csdata = STANDARD_HARDWARE_DATA[i];
+    if ( csdata.info.name==name) return &csdata.info;
+  }
+  return 0;
+}
+
+Hardware::Data *Direct::Config::standardHardwareData(const QString &name) const
+{
+  for (uint i=0; STANDARD_HARDWARE_DATA[i].info.name; i++) {
+    const ConstStandardHardwareData &csdata = STANDARD_HARDWARE_DATA[i];
+    if ( csdata.info.name!=name) continue;
+    HardwareData *data = new HardwareData;
+    data->name = csdata.info.name;
+    data->portType = csdata.data.portType;
+    data->data = csdata.data.data;
+    return data;
+  }
+  return 0;
+}
diff --git a/src/progs/direct/base/direct_prog_config.h b/src/progs/direct/base/direct_prog_config.h
new file mode 100644
index 0000000..151b141
--- /dev/null
+++ b/src/progs/direct/base/direct_prog_config.h
@@ -0,0 +1,42 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2005 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DIRECT_PROG_CONFIG_H
+#define DIRECT_PROG_CONFIG_H
+
+#include "direct.h"
+#include "progs/base/hardware_config.h"
+
+namespace Direct
+{
+
+class HardwareData : public ::Hardware::Data
+{
+public:
+  virtual void readConfig(GenericConfig &config);
+  virtual void writeConfig(GenericConfig &config) const;
+  virtual bool isEqual(const ::Hardware::Data &data) const;
+  HData data;
+};
+
+class Config : public ::Hardware::Config
+{
+public:
+  Config() : ::Hardware::Config("direct_programmer") {}
+
+protected:
+  virtual QStringList standardHardwareNames(PortType type) const;
+  virtual const ::Hardware::DataInfo *standardHardwareDataInfo(const QString &name) const;
+  virtual ::Hardware::Data *standardHardwareData(const QString &name) const;
+  virtual ::Hardware::Data *createHardwareData() const { return new HardwareData; }
+};
+
+} //namespace
+
+#endif
diff --git a/src/progs/direct/direct.pro b/src/progs/direct/direct.pro
new file mode 100644
index 0000000..60ac0f5
--- /dev/null
+++ b/src/progs/direct/direct.pro
@@ -0,0 +1,2 @@
+TEMPLATE = subdirs
+SUBDIRS = xml base
diff --git a/src/progs/direct/gui/Makefile.am b/src/progs/direct/gui/Makefile.am
new file mode 100644
index 0000000..ec7e698
--- /dev/null
+++ b/src/progs/direct/gui/Makefile.am
@@ -0,0 +1,5 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+libdirectui_la_LDFLAGS = $(all_libraries)
+noinst_LTLIBRARIES = libdirectui.la
+libdirectui_la_SOURCES = direct_config_widget.cpp
diff --git a/src/progs/direct/gui/direct_config_widget.cpp b/src/progs/direct/gui/direct_config_widget.cpp
new file mode 100644
index 0000000..985cacd
--- /dev/null
+++ b/src/progs/direct/gui/direct_config_widget.cpp
@@ -0,0 +1,249 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "direct_config_widget.h"
+
+#include <qtooltip.h>
+#include <qcheckbox.h>
+#include <qtimer.h>
+#include <qpushbutton.h>
+
+#include "progs/direct/base/direct_prog_config.h"
+#include "progs/direct/base/direct_prog.h"
+
+//-----------------------------------------------------------------------------
+::Programmer::ConfigWidget *Direct::GroupUI::createConfigWidget(QWidget *parent) const
+{
+  return new ConfigWidget(static_cast<const ::Programmer::Group &>(group()), parent);
+}
+
+//-----------------------------------------------------------------------------
+const char * const INV_PIN_LABEL = I18N_NOOP("Check this option if your hardware uses negative logic for this pin.");
+const char * const DELAY_LABEL = I18N_NOOP("Some programming cards need low clock rate:\nadding delay to clock pulses might help.");
+
+Direct::HConfigWidget::HConfigWidget(::Programmer::Base &base, QWidget *parent, bool edit)
+  : ::Hardware::HConfigWidget(base, parent, edit)
+{
+  // pins assignment
+  QGroupBox *groupb = new QGroupBox(1, Horizontal, i18n("Pin assignment"), this);
+  _mainVBox->addWidget(groupb);
+  QWidget *w = new QWidget(groupb);
+  QGridLayout *grid = new QGridLayout(w, 1, 1, 0, 10);
+  if (edit) grid->setColStretch(5, 1);
+  for (uint i=0; i<Nb_PinTypes; i++) {
+    QLabel *label = new QLabel(i18n(PIN_DATA[i].label), w);
+    QToolTip::add(label, PIN_DATA[i].comment);
+    grid->addWidget(label, i, 0);
+    _combos[i] = new QComboBox(w);
+    _combos[i]->setEnabled(edit);
+    connect(_combos[i], SIGNAL(activated(int)), SLOT(slotPinChanged()));
+    QToolTip::add(_combos[i], PIN_DATA[i].comment);
+    grid->addWidget(_combos[i], i, 1);
+    _invcbs[i] = new QCheckBox(i18n("Inverted"), w);
+    _invcbs[i]->setEnabled(edit);
+    QToolTip::add(_invcbs[i], i18n(INV_PIN_LABEL));
+    grid->addWidget(_invcbs[i], i, 2);
+    if (edit) {
+      _testcbs[i] = new QCheckBox(i18n("on"), w);
+      QToolTip::add(_testcbs[i], PIN_DATA[i].testComment);
+      connect(_testcbs[i], SIGNAL(clicked()), SLOT(slotTestPin()));
+      grid->addWidget(_testcbs[i], i, 3);
+      _testLabels[i] = new QLabel(w);
+      QToolTip::add(_testcbs[i], PIN_DATA[i].testComment);
+      grid->addWidget(_testLabels[i], i, 4);
+      updateTestStatus(PinType(i), false);
+    } else {
+      _testcbs[i] = 0;
+      _testLabels[i] = 0;
+    }
+  }
+
+  QHBoxLayout *hbox = new QHBoxLayout(_mainVBox);
+  QLabel *label = new QLabel(i18n("Clock delay"), this);
+  QToolTip::add(label, i18n(DELAY_LABEL));
+  hbox->addWidget(label);
+  _delay = new KIntNumInput(0, Horizontal, this);
+  _delay->setRange(0, 50, 5);
+  _delay->setEnabled(edit);
+  QToolTip::add(_delay, i18n(DELAY_LABEL));
+  hbox->addWidget(_delay);
+
+  if (edit) {
+    _sendBitsButton = new QPushButton(i18n("Send 0xA55A"), this);
+    _sendBitsButton->setToggleButton(true);
+    connect(_sendBitsButton, SIGNAL(clicked()), SLOT(sendBits()));
+    QToolTip::add(_sendBitsButton, i18n("Continuously send 0xA55A on \"Data out\" pin."));
+    _editVBox->addWidget(_sendBitsButton);
+    _editVBox->addStretch(1);
+  } else _sendBitsButton = 0;
+
+  // timer for sending bits
+  _timerSendBits = new QTimer(this);
+  connect(_timerSendBits, SIGNAL(timeout()), SLOT(slotSendBits()));
+
+  // timer for automatically polling DataOut pin
+  _timerPollDataOut = new QTimer(this);
+  connect(_timerPollDataOut, SIGNAL(timeout()), SLOT(updateDataIn()));
+}
+
+void Direct::HConfigWidget::sendBits()
+{
+  if ( _timerSendBits->isActive() ) {
+    _sendBitsButton->setText(i18n("Send 0xA55A"));
+    _timerSendBits->stop();
+    updateTestPin(DataOut);
+  } else {
+    _sendBitsButton->setText(i18n("Stop"));
+    _timerSendBits->start(1);
+  }
+}
+
+uint Direct::HConfigWidget::pin(PinType ptype) const
+{
+  return static_cast<const Hardware *>(_hardware)->pinForIndex(PIN_DATA[ptype].dir, _combos[ptype]->currentItem());
+}
+
+void Direct::HConfigWidget::slotPinChanged()
+{
+  for (uint i = 0; i<Nb_PinTypes; i++) {
+    if ( sender()!=_combos[i] ) continue;
+    updatePin(PinType(i));
+  }
+}
+
+void Direct::HConfigWidget::updatePin(PinType ptype)
+{
+  bool ground = hardware()->isGroundPin(pin(ptype));
+  _invcbs[ptype]->setEnabled(_edit);
+  if (ground) _invcbs[ptype]->hide();
+  else _invcbs[ptype]->show();
+  if (_edit) {
+    _testcbs[ptype]->setEnabled(PIN_DATA[ptype].dir==Port::Out && _connected);
+    _testLabels[ptype]->setEnabled(_connected);
+    if (ground) {
+      _testcbs[ptype]->hide();
+      _testLabels[ptype]->hide();
+    } else {
+      _testcbs[ptype]->show();
+      _testLabels[ptype]->show();
+    }
+  }
+}
+
+void Direct::HConfigWidget::slotTestPin()
+{
+  for (uint i = 0; i<Nb_PinTypes; i++) {
+    if ( sender()!=_testcbs[i] ) continue;
+    updateTestPin(PinType(i));
+    break;
+  }
+}
+
+void Direct::HConfigWidget::updateTestPin(PinType ptype)
+{
+  Q_ASSERT( _connected && ptype!=DataIn );
+  bool on = _testcbs[ptype]->isChecked();
+  hardware()->setPin(ptype, on);
+  updateTestStatus(ptype, on);
+  if ( ptype==Vpp ) updateDataIn();
+}
+
+void Direct::HConfigWidget::updateTestStatus(PinType ptype, bool on)
+{
+  if (on) _testLabels[ptype]->setText(i18n(PIN_DATA[ptype].onLabel));
+  else _testLabels[ptype]->setText(i18n(PIN_DATA[ptype].offLabel));
+}
+
+void Direct::HConfigWidget::updateDataIn()
+{
+  bool on = hardware()->readBit();
+  updateTestStatus(DataIn, on);
+  _testcbs[DataIn]->setChecked(on);
+}
+
+void Direct::HConfigWidget::sendBits(uint d, int nbb)
+{
+  Q_ASSERT(_connected);
+  hardware()->setWrite();
+  for (; nbb; --nbb) {
+    hardware()->setPin(Clock, High);
+    if ( d & 0x01 ) hardware()->setPin(DataOut, High);
+    else hardware()->setPin(DataOut, Low);
+    hardware()->setPin(Clock, Low);
+    d >>= 1;       // Move the data over 1 bit
+  }
+  hardware()->setPin(DataOut, Low);
+  hardware()->setRead();
+}
+
+void Direct::HConfigWidget::slotSendBits()
+{
+    sendBits(0xA55A, 16);
+}
+
+bool Direct::HConfigWidget::set(const Port::Description &pd, const ::Hardware::Data &data)
+{
+  // connect port
+  _timerPollDataOut->stop();
+  if ( _timerSendBits->isActive() ) sendBits(); // stop
+  delete _hardware;
+  const HardwareData &hdata = static_cast<const HardwareData &>(data);
+  if ( pd.type==PortType::Serial ) _hardware = new SerialHardware(_base, pd.device, hdata);
+  else _hardware = new ParallelHardware(_base, pd.device, hdata);
+  bool ok = _hardware->connectHardware();
+  if ( !_edit) _hardware->disconnectHardware();
+  else _connected = ok;
+
+  // update GUI
+  if (_edit) {
+    for (uint i=0; i<Nb_PinTypes; i++) {
+      _testcbs[i]->setEnabled(_connected);
+      updateTestStatus(PinType(i), false);
+    }
+    if ( _connected ) _timerPollDataOut->start(100);
+    _sendBitsButton->setEnabled(_connected);
+  }
+
+  // update pins
+  for (uint i=0; i<Nb_PinTypes; i++) {
+    _combos[i]->clear();
+    Port::IODir dir = PIN_DATA[i].dir;
+    for (uint k=0; k<hardware()->nbPins(dir); k++)
+      _combos[i]->insertItem(hardware()->pinLabelForIndex(dir, k));
+    if (PIN_DATA[i].canBeGround) _combos[i]->insertItem("GND");
+    _combos[i]->setCurrentItem(hardware()->indexForPin(dir, hdata.data.pins[i]));
+    _invcbs[i]->setChecked(hdata.data.pins[i]<0);
+    updatePin(PinType(i));
+  }
+  _delay->setValue(hdata.data.clockDelay);
+
+  return ok;
+}
+
+Hardware::Data *Direct::HConfigWidget::data() const
+{
+  HardwareData *hdata = new HardwareData;
+  hdata->portType = _hardware->portDescription().type;
+  for (uint i=0; i<Nb_PinTypes; i++) {
+    hdata->data.pins[i] = pin(PinType(i));
+    if ( _invcbs[i]->isChecked() ) hdata->data.pins[i] = -hdata->data.pins[i];
+  }
+  hdata->data.clockDelay = _delay->value();
+  return hdata;
+}
+
+//-----------------------------------------------------------------------------
+Direct::ConfigWidget::ConfigWidget(const ::Programmer::Group &group, QWidget *parent)
+  : ::Hardware::ConfigWidget(new ::Direct::PicBase(group, 0), new Config, parent)
+{}
+
+Hardware::HConfigWidget *Direct::ConfigWidget::createHardwareConfigWidget(QWidget *parent, bool edit) const
+{
+  return new HConfigWidget(*_base, parent, edit);
+}
diff --git a/src/progs/direct/gui/direct_config_widget.h b/src/progs/direct/gui/direct_config_widget.h
new file mode 100644
index 0000000..4a5e4c6
--- /dev/null
+++ b/src/progs/direct/gui/direct_config_widget.h
@@ -0,0 +1,74 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DIRECT_CONFIG_WIDGET
+#define DIRECT_CONFIG_WIDGET
+
+#include <knuminput.h>
+
+#include "progs/gui/prog_group_ui.h"
+#include "progs/gui/hardware_config_widget.h"
+#include "progs/direct/base/direct.h"
+
+namespace Direct
+{
+//----------------------------------------------------------------------------
+class GroupUI : public ::Programmer::GroupUI
+{
+public:
+  virtual ::Programmer::ConfigWidget *createConfigWidget(QWidget *parent) const;
+  virtual bool hasAdvancedDialog() const { return false; }
+  virtual ::Programmer::AdvancedDialog *createAdvancedDialog(::Programmer::Base &, QWidget *) const { return 0; }
+};
+
+//-----------------------------------------------------------------------------
+class HConfigWidget : public ::Hardware::HConfigWidget
+{
+Q_OBJECT
+public:
+  HConfigWidget(::Programmer::Base &base, QWidget *parent, bool edit);
+  virtual bool set(const Port::Description &pd, const ::Hardware::Data &data);
+  virtual ::Hardware::Data *data() const;
+
+private slots:
+  void slotTestPin();
+  void slotPinChanged();
+  void updateDataIn();
+  void sendBits();
+  void slotSendBits();
+
+private:
+  QComboBox    *_combos[Nb_PinTypes];
+  QCheckBox    *_invcbs[Nb_PinTypes];
+  QCheckBox    *_testcbs[Nb_PinTypes];
+  QLabel       *_testLabels[Nb_PinTypes];
+  KIntNumInput *_delay;
+  QPushButton  *_sendBitsButton;
+  QTimer       *_timerSendBits, *_timerPollDataOut;
+
+  void sendBits(uint d, int nbb);
+  void updateTestPin(PinType ptype);
+  void updateTestStatus(PinType ptype, bool on);
+  uint pin(PinType ptype) const;
+  void updatePin(PinType ptype);
+  Hardware *hardware() { return static_cast<Hardware *>(_hardware); }
+};
+
+//-----------------------------------------------------------------------------
+class ConfigWidget : public ::Hardware::ConfigWidget
+{
+Q_OBJECT
+public:
+  ConfigWidget(const ::Programmer::Group &group, QWidget *parent);
+  virtual ::Hardware::HConfigWidget *createHardwareConfigWidget(QWidget *parent, bool edit) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/direct/xml/Makefile.am b/src/progs/direct/xml/Makefile.am
new file mode 100644
index 0000000..dd1f678
--- /dev/null
+++ b/src/progs/direct/xml/Makefile.am
@@ -0,0 +1,14 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_PROGRAMS = xml_direct_parser
+xml_direct_parser_SOURCES = xml_direct_parser.cpp
+OBJECTS = $(top_builddir)/src/devices/list/libdevicelistnoui.la \
+	$(top_builddir)/src/devices/pic/pic/libpic.la $(top_builddir)/src/devices/pic/base/libpicbase.la \
+	$(top_builddir)/src/devices/pic/xml_data/libpicxml.la \
+	$(top_builddir)/src/devices/mem24/mem24/libmem24.la $(top_builddir)/src/devices/mem24/base/libmem24base.la \
+	$(top_builddir)/src/devices/mem24/xml_data/libmem24xml.la \
+	$(top_builddir)/src/xml_to_data/libxmltodata.la $(top_builddir)/src/devices/base/libdevicebase.la \
+	$(top_builddir)/src/common/common/libcommon.la
+xml_direct_parser_DEPENDENCIES = $(OBJECTS)
+xml_direct_parser_LDADD = $(OBJECTS) $(LIB_KDECORE)
diff --git a/src/progs/direct/xml/xml.pro b/src/progs/direct/xml/xml.pro
new file mode 100644
index 0000000..740232e
--- /dev/null
+++ b/src/progs/direct/xml/xml.pro
@@ -0,0 +1,17 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/app.pro)
+
+TARGET   = xml_direct_parser
+SOURCES += xml_direct_parser.cpp
+LIBS    += ../../../devices/list/libdevicelist.a \
+           ../../../devices/mem24/mem24/libmem24.a ../../../devices/mem24/xml_data/libmem24xml.a \
+           ../../../devices/mem24/base/libmem24base.a \
+           ../../../devices/pic/pic/libpic.a ../../../devices/pic/xml_data/libpicxml.a \
+           ../../../devices/pic/base/libpicbase.a ../../../xml_to_data/libxmltodata.a \
+           ../../../devices/base/libdevicebase.a ../../../common/global/libglobal.a \
+           ../../../common/nokde/libnokde.a ../../../common/common/libcommon.a
+
+unix:QMAKE_POST_LINK = cd ../base && ../xml/xml_direct_parser
+unix:QMAKE_CLEAN += ../base/direct_data.cpp
+win32:QMAKE_POST_LINK = cd ..\base && ..\xml\xml_direct_parser.exe
+win32:QMAKE_CLEAN += ..\base\direct_data.cpp
diff --git a/src/progs/direct/xml/xml_direct_parser.cpp b/src/progs/direct/xml/xml_direct_parser.cpp
new file mode 100644
index 0000000..ee51674
--- /dev/null
+++ b/src/progs/direct/xml/xml_direct_parser.cpp
@@ -0,0 +1,60 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "xml_to_data/prog_xml_to_data.h"
+#include "devices/pic/base/pic.h"
+#include "progs/direct/base/direct_data.h"
+
+namespace Direct
+{
+class XmlToData : public ::Programmer::XmlToData<Data>
+{
+public:
+  XmlToData() : ::Programmer::XmlToData<Data>("direct", "Direct") {}
+
+private:
+  virtual void parseData(QDomElement element, Data &data);
+  virtual void includes(QTextStream &s) const;
+  virtual void outputFunctions(QTextStream &s) const;
+};
+
+void Direct::XmlToData::parseData(QDomElement element, Data &)
+{
+  QString s = element.attribute("pwidth");
+  const Device::Data *d = Device::lister().data(currentDevice());
+  if ( d==0 ) qFatal("Invalid device name");
+}
+
+void Direct::XmlToData::includes(QTextStream &s) const
+{
+  Programmer::XmlToData<Data>::includes(s);
+  s << "#include \"direct_baseline.h\"" << endl;
+  s << "#include \"direct_16F.h\"" << endl;
+  s << "#include \"direct_18F.h\"" << endl;
+}
+
+void Direct::XmlToData::outputFunctions(QTextStream &s) const
+{
+  Programmer::XmlToData<Data>::outputFunctions(s);
+  s << "::Programmer::DeviceSpecific *Direct::Group::createDeviceSpecific(::Programmer::Base &base) const" << endl;
+  s << "{" << endl;
+  s << "  uint i = family(static_cast<PicBase &>(base).device()->name());" << endl;
+  s << "  switch(i) {" << endl;
+  for (uint i=0; i<uint(families().count()); i++) {
+    s << "    case " + QString::number(i) + ": return new P" + families()[i] + "(base);" << endl;
+  }
+  s << "  }" << endl;
+  s << "  Q_ASSERT(false);" << endl;
+  s << "  return 0;" << endl;
+  s << "}" << endl;
+}
+
+} // namespace
+
+//-----------------------------------------------------------------------------
+XML_MAIN(Direct::XmlToData)
diff --git a/src/progs/gpsim/Makefile.am b/src/progs/gpsim/Makefile.am
new file mode 100644
index 0000000..490a53d
--- /dev/null
+++ b/src/progs/gpsim/Makefile.am
@@ -0,0 +1,3 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+SUBDIRS = base gui
diff --git a/src/progs/gpsim/base/Makefile.am b/src/progs/gpsim/base/Makefile.am
new file mode 100644
index 0000000..b008527
--- /dev/null
+++ b/src/progs/gpsim/base/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+libgpsim_la_LDFLAGS = $(all_libraries)
+noinst_LTLIBRARIES = libgpsim.la
+libgpsim_la_SOURCES = gpsim.cpp gpsim_debug.cpp
diff --git a/src/progs/gpsim/base/base.pro b/src/progs/gpsim/base/base.pro
new file mode 100644
index 0000000..4b05ac5
--- /dev/null
+++ b/src/progs/gpsim/base/base.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = gpsim
+HEADERS += gpsim.h gpsim_debug.h
+SOURCES += gpsim.cpp gpsim_debug.cpp
diff --git a/src/progs/gpsim/base/gpsim.cpp b/src/progs/gpsim/base/gpsim.cpp
new file mode 100644
index 0000000..e6c17bd
--- /dev/null
+++ b/src/progs/gpsim/base/gpsim.cpp
@@ -0,0 +1,155 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "gpsim.h"
+
+#include <qregexp.h>
+#include "progs/base/generic_prog.h"
+#include "progs/base/generic_debug.h"
+
+//-----------------------------------------------------------------------------
+GPSim::Process::Process(Log::Base *base)
+  : ::Process::LineOutput(0, "gpsim_process"), Log::Base(base), _ready(false)
+{
+  connect(this, SIGNAL(stdoutDataReceived()), SLOT(stdoutDataReceivedSlot()));
+}
+
+void GPSim::Process::stdoutDataReceivedSlot()
+{
+  if ( _stdout.startsWith("**gpsim> ") || _ready ) {
+    log(Log::DebugLevel::Extra, "received console prompt", Log::Delayed);
+    _ready = true;
+    emit requestSynchronousStop();
+  }
+}
+
+void GPSim::Process::addStdoutLine(const QString &line)
+{
+  log(Log::DebugLevel::Extra, "  " + line, Log::Delayed);
+  if ( line.startsWith("***ERROR:") ) {
+    log(Log::LineType::Error, line);
+    return;
+  }
+  QString s = line;
+  QString prompt = "**gpsim> ";
+  while ( s.startsWith(prompt) ) {
+    _ready = true;
+    s = s.mid(prompt.length());
+  }
+  s = s.stripWhiteSpace();
+  _stdoutLines += s;
+}
+
+//-----------------------------------------------------------------------------
+GPSim::ProcessManager::ProcessManager(Log::Base *base)
+  : Log::Base(base), _process(base)
+{}
+
+bool GPSim::ProcessManager::start()
+{
+  _process._ready = false;
+  _process.setup("gpsim", QStringList("-i"), false);
+  if ( !_process.start(0) ) {
+    log(Log::LineType::Error, i18n("Failed to start \"gpsim\"."));
+    return false;
+  }
+  return runSynchronously();
+}
+
+bool GPSim::ProcessManager::runSynchronously()
+{
+  ::Process::State state = ::Process::runSynchronously(_process, ::Process::NoRunAction, 5000);
+  if ( !_process.isRunning() ) {
+    log(Log::LineType::Error, i18n("\"gpsim\" unexpectedly exited."));
+    return false;
+  }
+  if ( state==::Process::Timedout ) {
+    log(Log::LineType::Error, i18n("Timeout waiting for \"gpsim\"."));
+    return false;
+  }
+  return true;
+}
+
+bool GPSim::ProcessManager::sendCommand(const QString &cmd, bool synchronous)
+{
+  _process._ready = false;
+  _process._stdoutLines.clear();
+  _process._stdout = QString::null;
+  _process.writeToStdin(cmd + '\n');
+  if (synchronous) return runSynchronously();
+  return true;
+}
+
+bool GPSim::ProcessManager::sendSignal(uint n, bool synchronous)
+{
+  _process._ready = false;
+  _process._stdoutLines.clear();
+  _process._stdout = QString::null;
+  if ( !_process.signal(n) ) {
+    log(Log::LineType::Error, i18n("Error send a signal to the subprocess."));
+    return false;
+  }
+  if (synchronous) return runSynchronously();
+  return true;
+}
+
+bool GPSim::ProcessManager::getVersion(VersionData &version)
+{
+  if ( !sendCommand("version", true) ) return false;
+  QRegExp reg("\\w*\\s*(\\d+\\.\\d+\\.\\d+).*");
+  if ( _process.sout().count()==0 || !reg.exactMatch(_process.sout()[0]) ) {
+    version = VersionData();
+    return true;
+  }
+  version = VersionData::fromString(reg.cap(1));
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+GPSim::Hardware::~Hardware()
+{
+  delete _manager;
+}
+
+bool GPSim::Hardware::internalConnectHardware()
+{
+  delete _manager;
+  _manager = new ProcessManager(this);
+  _manager->process().setWorkingDirectory(_base.debugger()->directory());
+  if ( !_manager->start() ) return false;
+  if ( !_manager->getVersion(_version) ) return false;
+  if ( !_version.isValid() ) {
+    log(Log::LineType::Error, i18n("Could not recognize gpsim version."));
+    return false;
+  }
+  return true;
+}
+
+void GPSim::Hardware::internalDisconnectHardware()
+{
+  delete _manager;
+  _manager = 0;
+}
+
+bool GPSim::Hardware::execute(const QString &command, bool synchronous, QStringList *output)
+{
+  log(Log::DebugLevel::Normal, QString("command: %1").arg(command));
+  if (output) output->clear();
+  if ( !_manager->sendCommand(command, synchronous) ) return false;
+  if (output) *output = _manager->process().sout();
+  return true;
+}
+
+bool GPSim::Hardware::signal(uint n, bool synchronous, QStringList *output)
+{
+  log(Log::DebugLevel::Normal, QString("signal: %1").arg(n));
+  if (output) output->clear();
+  if ( !_manager->sendSignal(n, synchronous) ) return false;
+  if (output) *output = _manager->process().sout();
+  return true;
+}
diff --git a/src/progs/gpsim/base/gpsim.h b/src/progs/gpsim/base/gpsim.h
new file mode 100644
index 0000000..ab004a3
--- /dev/null
+++ b/src/progs/gpsim/base/gpsim.h
@@ -0,0 +1,85 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef GPSIM_H
+#define GPSIM_H
+
+#include "common/common/version_data.h"
+#include "progs/base/prog_specific.h"
+#include "common/global/process.h"
+#include "common/global/purl.h"
+
+namespace GPSim
+{
+//-----------------------------------------------------------------------------
+class Process : public ::Process::LineOutput, public Log::Base
+{
+Q_OBJECT
+public:
+  Process(Log::Base *base);
+
+private slots:
+  void stdoutDataReceivedSlot();
+
+private:
+  bool _ready;
+
+  virtual void addStdoutLine(const QString &line);
+
+  friend class ProcessManager;
+};
+
+//-----------------------------------------------------------------------------
+class ProcessManager : public Log::Base
+{
+public:
+  ProcessManager(Log::Base *base);
+  Process &process() { return _process; }
+  bool isReady() const { return _process._ready; }
+  bool start();
+  bool runSynchronously();
+  bool sendCommand(const QString &cmd, bool synchronous);
+  bool sendSignal(uint n, bool synchronous);
+  bool getVersion(VersionData &version);
+
+private:
+  Process _process;
+};
+
+//-----------------------------------------------------------------------------
+class Hardware : public Programmer::Hardware
+{
+public:
+  Hardware(::Programmer::Base &base) : Programmer::Hardware(base, 0, QString::null), _manager(0) {}
+  virtual ~Hardware();
+  bool isReady() const { return _manager->isReady(); }
+  bool execute(const QString &command, bool synchronous, QStringList *output = 0);
+  bool signal(uint n, bool synchronous, QStringList *output = 0);
+  const VersionData &version() const { return _version; }
+
+private:
+  ProcessManager *_manager;
+  VersionData _version;
+
+  virtual bool internalConnectHardware();
+  virtual void internalDisconnectHardware();
+};
+
+//-----------------------------------------------------------------------------
+class DeviceSpecific : public ::Programmer::DeviceSpecific
+{
+public:
+  DeviceSpecific(::Programmer::Base &base) : ::Programmer::DeviceSpecific(base) {}
+  virtual bool setPowerOff() { return false; }
+  virtual bool setPowerOn() { return false; }
+  virtual bool setTargetPowerOn(bool) { return true; }
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/gpsim/base/gpsim_debug.cpp b/src/progs/gpsim/base/gpsim_debug.cpp
new file mode 100644
index 0000000..b2bcec5
--- /dev/null
+++ b/src/progs/gpsim/base/gpsim_debug.cpp
@@ -0,0 +1,282 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "gpsim_debug.h"
+
+#include <signal.h>
+#include <qregexp.h>
+
+#include "devices/list/device_list.h"
+#include "devices/pic/base/pic_register.h"
+#include "coff/base/text_coff.h"
+#include "progs/manager/debug_manager.h"
+
+//----------------------------------------------------------------------------
+GPSim::Debugger::Debugger(Programmer &programmer)
+  : ::Debugger::PicBase(programmer), _nbBreakpoints(0)
+{}
+
+bool GPSim::Debugger::internalInit()
+{
+  if ( !hardware()->execute("processor pic" + device()->name().lower(), true) ) return false;
+  if ( _inputType==PURL::Cod ) return hardware()->execute("load s " + _filename, true);
+  Q_ASSERT( _inputType==PURL::Hex );
+  return hardware()->execute("load h " + _filename, true);
+}
+
+bool GPSim::Debugger::internalRun()
+{
+  return hardware()->execute("run", false);
+}
+
+bool GPSim::Debugger::hardHalt()
+{
+  log(Log::LineType::Warning, i18n("Failed to halt target: kill process."));
+  _programmer.disconnectHardware();
+  return true;
+}
+
+bool GPSim::Debugger::softHalt(bool &success)
+{
+  success = hardware()->signal(SIGINT, true);
+  return true;
+}
+
+bool GPSim::Debugger::internalStep()
+{
+  return hardware()->execute("step", true);
+}
+
+bool GPSim::Debugger::setBreakpoints(const QValueList<Address> &list)
+{
+  for (uint i=0; i<_nbBreakpoints; i++)
+    if ( !hardware()->execute("clear " + QString::number(i), true) ) return false;
+  for (uint i=0; i<uint(list.count()); i++)
+    if ( !hardware()->execute("break e 0x" + toHex(list[i], nbChars(list[i].toUInt())), true) ) return false;
+  _nbBreakpoints = list.count();
+  return true;
+}
+
+bool GPSim::Debugger::internalReset()
+{
+  if ( _programmer.state()==::Programmer::Running && !halt() ) return false;
+  return hardware()->execute("reset", true);
+}
+
+bool GPSim::Debugger::updateState()
+{
+  if ( hardware()->isReady() ) _programmer.setState(::Programmer::Halted);
+  else _programmer.setState(::Programmer::Running);
+  return true;
+}
+
+bool GPSim::Debugger::findRegExp(const QStringList &lines, const QString &pattern,
+                                 const QString &label, QString &value) const
+{
+  QRegExp rexp(pattern);
+  uint i = 0;
+  for (; i<uint(lines.count()); i++) {
+    int offset = 0;
+    for (;;) {
+      offset = rexp.search(lines[i], offset, QRegExp::CaretAtOffset);
+      if ( offset==-1 || rexp.cap(1)==label ) break;
+      offset += rexp.cap(0).length();
+    }
+    if ( offset!=-1 ) break;
+  }
+  if ( i==uint(lines.count()) ) return false;
+  value = rexp.cap(2);
+  return true;
+}
+
+bool GPSim::Debugger::readWreg(BitValue &value)
+{
+  // #### only known for version 4 and 11
+  if ( hardware()->version()<=VersionData(0, 21, 7) || hardware()->version()>=VersionData(0, 22, 0) )
+    return getRegister("W", value);
+  QStringList lines;
+  if ( !hardware()->execute("dump s", true, &lines) ) return false;
+  QString w = (_coff->symbol("_WREG") ? "_WREG" : "W");
+  QString s;
+  if ( !findRegExp(lines, "^\\s*[0-9A-Fa-f]+\\s+(\\w+)\\s*=\\s*([0-9A-Fa-f]+)", w, s) ) {
+    log(Log::LineType::Error, i18n("Error reading register \"%1\"").arg(w));
+    return false;
+  }
+  value = fromHex(s, 0);
+  return true;
+}
+
+bool GPSim::Debugger::getRegister(const QString &name, BitValue &value)
+{
+  QStringList lines;
+  QRegExp r;
+  if ( hardware()->version()<VersionData(0, 22, 0) ) {
+    if ( !hardware()->execute("x " + name, true, &lines) ) return false;
+    r.setPattern("\\w+\\s*[][\\w]+\\s*=\\s*(?:0x|)([0-9A-Fa-f]+)(?:\\W.*|)");
+  } else {
+    if ( !hardware()->execute(name, true, &lines) ) return false;
+    r.setPattern("[^=]*=\\s*(?:0x|\\$)([0-9A-Fa-f]+)(?:\\W.*|)");
+  }
+  uint i = 0;
+  for (; i<uint(lines.count()); i++)
+    if ( r.exactMatch(lines[i]) ) break;
+  if ( i==uint(lines.count()) ) {
+    log(Log::LineType::Error, i18n("Error reading register \"%1\"").arg(name));
+    return false;
+  }
+  value = fromHex(r.cap(1), 0);
+  return true;
+}
+
+bool GPSim::Debugger::getRegister(Address address, BitValue &value)
+{
+  const Pic::RegistersData &rdata = device()->registersData();
+  QString name = toHex(address, rdata.nbCharsAddress());
+  if ( hardware()->version()<VersionData(0, 22, 0) ) return getRegister("0x" + name, value);
+  return getRegister(QString("ramData[$%1]").arg(name), value);
+}
+
+bool GPSim::Debugger::readRegister(const Register::TypeData &data, BitValue &value)
+{
+  if ( data.type()==Register::Special ) {
+    if ( data.name()=="WREG" ) return readWreg(value);
+    if ( data.name()=="PC" ) return getRegister("pc", value);
+    Q_ASSERT(false);
+    return true;
+  }
+  QString name = device()->registersData().sfrNames[data.address()];
+  if ( name=="WREG" ) return readWreg(value);
+  if ( !name.isEmpty() ) return getRegister(name.lower(), value);
+  return getRegister(data.address(), value);
+}
+
+bool GPSim::Debugger::setRegister(const QString &name, BitValue value)
+{
+  if ( hardware()->version()<VersionData(0, 22, 0) ) {
+    log(Log::LineType::Warning, i18n("Writing registers is not supported by this version of gpsim"));
+    return true;
+  }
+  const Pic::RegistersData &rdata = device()->registersData();
+  QString s = QString("%1 = %2").arg(name).arg(toHexLabel(value, rdata.nbChars()));
+  return hardware()->execute(s, true);
+}
+
+bool GPSim::Debugger::setRegister(Address address, BitValue value)
+{
+  const Pic::RegistersData &rdata = device()->registersData();
+  QString s = QString("ramData[$%1]").arg(toHex(address, rdata.nbCharsAddress()));
+  return setRegister(s, value);
+}
+
+bool GPSim::Debugger::writeRegister(const Register::TypeData &data, BitValue value)
+{
+  if ( data.type()==Register::Special ) {
+    if ( data.name()=="WREG" ) return writeWreg(value);
+    if ( data.name()=="PC" ) {
+      log(Log::LineType::Warning, i18n("Writing PC is not supported by gpsim"));
+      return true;
+    }
+    Q_ASSERT(false);
+    return false;
+  }
+  const Pic::RegistersData &rdata = device()->registersData();
+  QString name = rdata.sfrNames[data.address()];
+  if ( !name.isEmpty() ) return setRegister(name.lower(), value);
+  return setRegister(data.address(), value);
+}
+
+bool GPSim::Debugger::writeWreg(BitValue value)
+{
+  return setRegister("W", value);
+}
+
+bool GPSim::Debugger::updatePortStatus(uint index, QMap<uint, Device::PortBitData> &bits)
+{
+  for (uint i=0; i<Device::MAX_NB_PORT_BITS; i++) {
+    if ( !device()->registersData().hasPortBit(index, i) ) continue;
+    QString name = device()->registersData().portName(index).lower() + QString::number(i);
+    QStringList lines;
+    if ( !hardware()->execute("symbol " + name, true, &lines) ) return false;
+    QString pattern = "^(\\w+)=([^\\s])+\\s*", value;
+    if ( !findRegExp(lines, pattern, "bitState", value) || value.length()!=1 ) {
+      log(Log::LineType::Error, i18n("Error reading state of IO bit: %1").arg(name));
+      return false;
+    }
+    switch (value[0].latin1()) {
+      case 'H':
+      case '1': bits[i].state = Device::High; break;
+      case 'L':
+      case '0': bits[i].state = Device::Low; break;
+      case 'W': bits[i].state = Device::WeakPullUp; break;
+      case 'w': bits[i].state = Device::WeakPullDown; break;
+      case 'Z': bits[i].state = Device::HighImpedance; break;
+      case 'X': bits[i].state = Device::Unknown; break;
+      default:
+        bits[i].state = Device::Unknown;
+        log(Log::LineType::Warning, i18n("Unknown state for IO bit: %1 (%2)").arg(name).arg(value));
+        break;
+    }
+    if ( !findRegExp(lines, pattern, "Driving", value) || value.length()!=1 ) {
+      log(Log::LineType::Error, i18n("Error reading driving state of IO bit: %1").arg(name));
+      return false;
+    }
+    bits[i].driving = ( value[0]=='1' );
+    if (bits[i].driving) {
+      if ( !findRegExp(lines, pattern, "drivingState", value) || value.length()!=1 ) {
+        log(Log::LineType::Error, i18n("Error reading driving state of IO bit: %1").arg(name));
+        return false;
+      }
+      bits[i].drivingState = (value[0]=='0' ? Device::IoLow : Device::IoHigh);
+      bits[i].drivenState = Device::IoUnknown;
+    } else {
+      if ( !findRegExp(lines, pattern, "drivenState", value) || value.length()!=1 ) {
+        log(Log::LineType::Error, i18n("Error reading driven state of IO bit: %1").arg(name));
+        return false;
+      }
+      bits[i].drivenState = (value[0]=='0' ? Device::IoLow : Device::IoHigh);
+      bits[i].drivingState = Device::IoUnknown;
+    }
+  }
+  return true;
+}
+
+//----------------------------------------------------------------------------
+QString GPSim::Group::statusLabel() const
+{
+  return i18n("GPSim (4MHz)"); // #### FIXME: add config
+}
+
+void GPSim::Group::initSupported()
+{
+  ProcessManager manager(0);
+  if ( !manager.start() ) return;
+  VersionData version;
+  if ( !manager.getVersion(version) ) return;
+  bool oldGpsim = ( version<VersionData(0, 21, 11) );
+  if ( !manager.sendCommand("processor list", true) ) return;
+  QStringList devices = QStringList::split(" ", manager.process().sout().join(" "));
+  for (uint i=0; i<uint(devices.count()); i++) {
+    QString s = devices[i].upper();
+    if ( s.startsWith("PIC") ) s = s.mid(3);
+    const Pic::Data *data = static_cast<const Pic::Data *>(Device::lister().data(s));
+    if (data) {
+      if ( data->architecture()==Pic::Architecture::P18F && oldGpsim ) continue;
+      addDevice(data->name(), data, ::Group::Support::Tested);
+    }
+  }
+}
+
+Programmer::Hardware *GPSim::Group::createHardware(::Programmer::Base &base, const ::Programmer::HardwareDescription &) const
+{
+  return new Hardware(base);
+}
+
+Programmer::DeviceSpecific *GPSim::Group::createDeviceSpecific(::Programmer::Base &base) const
+{
+  return new DeviceSpecific(base);
+}
diff --git a/src/progs/gpsim/base/gpsim_debug.h b/src/progs/gpsim/base/gpsim_debug.h
new file mode 100644
index 0000000..ad838b2
--- /dev/null
+++ b/src/progs/gpsim/base/gpsim_debug.h
@@ -0,0 +1,95 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef GPSIM_DEBUG_H
+#define GPSIM_DEBUG_H
+
+#include "gpsim.h"
+#include "devices/pic/prog/pic_prog.h"
+#include "devices/pic/prog/pic_debug.h"
+
+namespace GPSim
+{
+//-----------------------------------------------------------------------------
+class Programmer : public ::Programmer::PicBase
+{
+Q_OBJECT
+public:
+  Programmer(const ::Programmer::Group &group, const Pic::Data *data)
+   : Programmer::PicBase(group, data, "gpsim_programmer") {}
+
+private:
+  virtual VersionData minVersion() const { return VersionData(0, 21, 0); }
+  virtual bool verifyDeviceId() { return true; }
+  virtual bool checkErase() { return false; }
+  virtual bool internalErase(const Device::MemoryRange &) { return false; }
+  virtual bool checkRead() { return false; }
+  virtual bool internalRead(Device::Memory &, const Device::MemoryRange &) { return false; }
+  virtual bool checkProgram(const Device::Memory &) { return false; }
+  virtual bool internalProgram(const Device::Memory &, const Device::MemoryRange &) { return false; }
+  virtual bool checkVerify() { return false; }
+  virtual bool internalVerify(const Device::Memory &, const Device::MemoryRange &, ::Programmer::VerifyActions) { return false; }
+};
+
+//-----------------------------------------------------------------------------
+class Debugger : public ::Debugger::PicBase
+{
+public:
+  Debugger(Programmer &programmer);
+  virtual bool setBreakpoints(const QValueList<Address> &list);
+  virtual bool readRegister(const Register::TypeData &data, BitValue &value);
+  virtual bool writeRegister(const Register::TypeData &data, BitValue value);
+  virtual bool updatePortStatus(uint index, QMap<uint, Device::PortBitData> &bits);
+
+private:
+  uint _nbBreakpoints;
+
+  bool findRegExp(const QStringList &lines, const QString &pattern,
+                  const QString &label, QString &value) const;
+  bool getRegister(const QString &name, BitValue &value);
+  bool setRegister(const QString &name, BitValue value);
+  bool getRegister(Address address, BitValue &value);
+  bool setRegister(Address address, BitValue value);
+  Hardware *hardware() { return static_cast<Hardware *>(_programmer.hardware()); }
+  const Pic::Data *device() const { return static_cast<const Pic::Data *>(_programmer.device()); }
+  virtual bool internalInit();
+  virtual bool updateState();
+  virtual bool internalRun();
+  virtual bool internalStep();
+  virtual bool softHalt(bool &success);
+  virtual bool hardHalt();
+  virtual bool internalReset();
+  bool readWreg(BitValue &value);
+  bool writeWreg(BitValue value);
+};
+
+//-----------------------------------------------------------------------------
+class Group : public ::Programmer::PicGroup
+{
+public:
+  virtual QString name() const { return "gpsim"; }
+  virtual QString label() const { return i18n("GPSim"); }
+  virtual QString statusLabel() const;
+  virtual ::Programmer::Properties properties() const { return ::Programmer::Debugger | ::Programmer::HasConnectedState; }
+  virtual ::Programmer::TargetPowerMode targetPowerMode() const { return ::Programmer::TargetSelfPowered; }
+  virtual bool isPortSupported(PortType) const { return false; }
+  virtual uint maxNbBreakpoints(const Device::Data *) const { return 100; }
+  virtual bool isInputFileTypeSupported(PURL::FileType type) const { return ( type==PURL::Cod || type==PURL::Hex ); }
+
+protected:
+  virtual void initSupported();
+  virtual ::Programmer::Base *createBase(const Device::Data *data) const { return new Programmer(*this, static_cast<const Pic::Data *>(data)); }
+  virtual ::Programmer::Hardware *createHardware(::Programmer::Base &base, const ::Programmer::HardwareDescription &hd) const;
+  virtual ::Programmer::DeviceSpecific *createDeviceSpecific(::Programmer::Base &base) const;
+  virtual ::Debugger::Base *createDebuggerBase(::Programmer::Base &base) const { return new Debugger(static_cast<Programmer &>(base)); }
+  virtual ::Debugger::Specific *createDebuggerSpecific(::Debugger::Base &) const { return 0; }
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/gpsim/gpsim.pro b/src/progs/gpsim/gpsim.pro
new file mode 100644
index 0000000..fe430fe
--- /dev/null
+++ b/src/progs/gpsim/gpsim.pro
@@ -0,0 +1,2 @@
+TEMPLATE = subdirs
+SUBDIRS = base
diff --git a/src/progs/gpsim/gui/Makefile.am b/src/progs/gpsim/gui/Makefile.am
new file mode 100644
index 0000000..d63f4a8
--- /dev/null
+++ b/src/progs/gpsim/gui/Makefile.am
@@ -0,0 +1,5 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+libgpsimui_la_LDFLAGS = $(all_libraries)
+noinst_LTLIBRARIES = libgpsimui.la
+libgpsimui_la_SOURCES = gpsim_group_ui.cpp
diff --git a/src/progs/gpsim/gui/gpsim_group_ui.cpp b/src/progs/gpsim/gui/gpsim_group_ui.cpp
new file mode 100644
index 0000000..3949b8e
--- /dev/null
+++ b/src/progs/gpsim/gui/gpsim_group_ui.cpp
@@ -0,0 +1,42 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "gpsim_group_ui.h"
+
+#include <qtimer.h>
+
+#include "progs/base/prog_group.h"
+#include "progs/gpsim/base/gpsim.h"
+
+//----------------------------------------------------------------------------
+GPSim::ConfigWidget::ConfigWidget(const ::Programmer::Group &group, QWidget *parent)
+  : ::Programmer::ConfigWidget(group, parent)
+{
+  uint row = numRows();
+  QLabel *label = new QLabel(i18n("Status:"), this);
+  addWidget(label, row,row, 0,0);
+  _status = new QLabel(this);
+  addWidget(_status, row,row, 1,1);
+
+  QTimer::singleShot(0, this, SLOT(updateStatus()));
+}
+
+void GPSim::ConfigWidget::updateStatus()
+{
+  VersionData version;
+  ProcessManager manager(0);
+  if ( !manager.start() ) _status->setText(i18n("Could not start \"gpsim\""));
+  else if ( !manager.getVersion(version) || !version.isValid() ) _status->setText(i18n("Could not detect \"gpsim\" version"));
+  else _status->setText(i18n("Found version \"%1\"").arg(version.pretty()));
+}
+
+//----------------------------------------------------------------------------
+::Programmer::ConfigWidget *GPSim::GroupUI::createConfigWidget(QWidget *parent) const
+{
+  return new ConfigWidget(static_cast<const ::Programmer::Group &>(group()), parent);
+}
diff --git a/src/progs/gpsim/gui/gpsim_group_ui.h b/src/progs/gpsim/gui/gpsim_group_ui.h
new file mode 100644
index 0000000..485aa69
--- /dev/null
+++ b/src/progs/gpsim/gui/gpsim_group_ui.h
@@ -0,0 +1,42 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef GPSIM_GROUP_UI_H
+#define GPSIM_GROUP_UI_H
+
+#include "progs/gui/prog_group_ui.h"
+#include "progs/gui/prog_config_widget.h"
+
+namespace GPSim
+{
+//----------------------------------------------------------------------------
+class ConfigWidget : public ::Programmer::ConfigWidget
+{
+Q_OBJECT
+public:
+  ConfigWidget(const ::Programmer::Group &group, QWidget *parent);
+
+private slots:
+  void updateStatus();
+
+private:
+  QLabel *_status;
+};
+
+//----------------------------------------------------------------------------
+class GroupUI : public ::Programmer::GroupUI
+{
+public:
+  virtual ::Programmer::ConfigWidget *createConfigWidget(QWidget *parent) const;
+  virtual bool hasAdvancedDialog() const { return false; }
+  virtual ::Programmer::AdvancedDialog *createAdvancedDialog(::Programmer::Base &, QWidget *) const { return 0; }
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/gui/Makefile.am b/src/progs/gui/Makefile.am
new file mode 100644
index 0000000..7b32635
--- /dev/null
+++ b/src/progs/gui/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+libprogui_la_LDFLAGS = $(all_libraries)
+noinst_LTLIBRARIES = libprogui.la
+libprogui_la_SOURCES = prog_config_widget.cpp prog_group_ui.cpp \
+		hardware_config_widget.cpp prog_config_center.cpp port_selector.cpp debug_config_center.cpp
diff --git a/src/progs/gui/debug_config_center.cpp b/src/progs/gui/debug_config_center.cpp
new file mode 100644
index 0000000..9286e3e
--- /dev/null
+++ b/src/progs/gui/debug_config_center.cpp
@@ -0,0 +1,17 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "debug_config_center.h"
+
+#include <kiconloader.h>
+
+QPixmap Debugger::OptionsConfigWidget::pixmap() const
+{
+  KIconLoader loader;
+  return loader.loadIcon("piklab_config_debugger", KIcon::Toolbar, KIcon::SizeMedium);
+}
diff --git a/src/progs/gui/debug_config_center.h b/src/progs/gui/debug_config_center.h
new file mode 100644
index 0000000..a8e496e
--- /dev/null
+++ b/src/progs/gui/debug_config_center.h
@@ -0,0 +1,28 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DEBUG_CONFIG_CENTER_H
+#define DEBUG_CONFIG_CENTER_H
+
+#include <qcheckbox.h>
+
+#include "common/gui/config_widget.h"
+#include "progs/base/debug_config.h"
+
+namespace Debugger
+{
+
+BEGIN_DECLARE_CONFIG_WIDGET(Config, OptionsConfigWidget)
+  virtual QString header() const { return i18n("Debugging Options"); }
+  virtual QString title() const { return i18n("Debugging Options"); }
+  virtual QPixmap pixmap() const;
+END_DECLARE_CONFIG_WIDGET
+
+} // namespace
+
+#endif
diff --git a/src/progs/gui/hardware_config_widget.cpp b/src/progs/gui/hardware_config_widget.cpp
new file mode 100644
index 0000000..8d82ddb
--- /dev/null
+++ b/src/progs/gui/hardware_config_widget.cpp
@@ -0,0 +1,204 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "hardware_config_widget.h"
+
+#include <qlabel.h>
+#include <kpushbutton.h>
+
+#include "progs/base/prog_config.h"
+#include "devices/base/device_group.h"
+#include "common/gui/misc_gui.h"
+
+//-----------------------------------------------------------------------------
+Hardware::HConfigWidget::HConfigWidget(::Programmer::Base &base, QWidget *parent, bool edit)
+  : QFrame(parent, "hardware_config_widget"), _edit(edit), _connected(false), _base(base)
+{
+  _hardware = 0;
+
+  QHBoxLayout *top = new QHBoxLayout(this, 0, 10);
+  _mainVBox = new QVBoxLayout(top);
+
+  if (edit) {
+    _editVBox = new QVBoxLayout(top);
+    top->setStretchFactor(_editVBox, 1);
+  } else _editVBox = 0;
+}
+
+//-----------------------------------------------------------------------------
+Hardware::EditDialog::EditDialog(ConfigWidget *cwidget, const QString &name, const Port::Description &pd, Data *data)
+  : KDialogBase(Plain, i18n("Edit and test hardware"), Ok|Cancel, Cancel, cwidget, "hardware_edit_dialog", true, true),
+    _cwidget(cwidget), _savedName(name), _oldData(data)
+{
+  setButtonOK(i18n("Save"));
+  setButtonCancel(i18n("Close"));
+
+  QGridLayout *grid = new QGridLayout(plainPage(), 1, 1, 0, 10);
+  grid->setColStretch(2, 1);
+
+  QLabel *label = new QLabel(i18n("Hardware name:"), plainPage());
+  grid->addWidget(label, 0, 0);
+  _name = new QLineEdit(name, plainPage());
+  grid->addWidget(_name, 0, 1);
+
+  label = new QLabel(i18n("%1 at %2:").arg(pd.type.label()).arg(pd.device), plainPage());
+  grid->addWidget(label, 1, 0);
+  label = new QLabel(plainPage());
+  grid->addWidget(label, 1, 1);
+
+  _hc = cwidget->createHardwareConfigWidget(plainPage(), true);
+  grid->addMultiCellWidget(_hc, 2,2, 0,2);
+
+  grid->setRowStretch(3, 1);
+
+  bool ok = _hc->set(pd, *data);
+  label->setText(ok ? i18n("Connected") : i18n("Not Connected"));
+}
+
+void Hardware::EditDialog::slotOk()
+{
+  if ( _name->text().isEmpty() ) {
+    MessageBox::sorry(i18n("Could not save configuration: hardware name is empty."), Log::Show);
+    return;
+  }
+  if ( _cwidget->_config->isStandardHardware(_name->text()) ) {
+    MessageBox::sorry(i18n("The hardware name is already used for a standard hardware."), Log::Show);
+    return;
+  }
+  QStringList names = _cwidget->_config->hardwareNames(PortType::Nb_Types); // all hardwares
+  if ( names.contains(_name->text()) ) {
+    if ( !MessageBox::askContinue(i18n("Do you want to overwrite this custom hardware \"%1\"?").arg(_name->text()),
+                                      KStdGuiItem::save()) ) return;
+  }
+  delete _oldData;
+  _oldData = _hc->data();
+  _cwidget->_config->writeCustomHardware(_name->text(), *_oldData);
+  _savedName = _name->text();
+  KDialogBase::accept();
+}
+
+void Hardware::EditDialog::slotCancel()
+{
+  Data *data = _hc->data();
+  bool equal = _oldData->isEqual(*data);
+  delete data;
+  if ( !equal && !MessageBox::askContinue(i18n("Closing will discard changes you have made. Close anyway?"), KStdGuiItem::close()) )
+    return;
+  KDialogBase::reject();
+}
+
+//-----------------------------------------------------------------------------
+Hardware::ConfigWidget::ConfigWidget(::Programmer::Base *base, Config *config, QWidget *parent)
+  : ::Programmer::ConfigWidget(base->group(), parent), _base(base), _config(config), _hc(0)
+{
+// programmer combo
+  uint row = numRows();
+  _configCombo = new QComboBox(this);
+  connect(_configCombo, SIGNAL(activated(int)), SLOT(configChanged(int)));
+  addWidget(_configCombo, row,row, 0,0);
+  row++;
+
+// hardware config
+  QHBoxLayout *hbox = new QHBoxLayout(10);
+  _hbox = new QHBoxLayout(10);
+  hbox->addLayout(_hbox);
+  addLayout(hbox, row,row, 0,1);
+  row++;
+
+// comment
+  _comment = new KTextBrowser(this);
+  addWidget(_comment, row,row, 0,1);
+  row++;
+
+// buttons
+  QVBoxLayout *vbox  = new QVBoxLayout(hbox);
+  _editButton = new KPushButton(this);
+  connect(_editButton, SIGNAL(clicked()), SLOT(editClicked()));
+  vbox->addWidget(_editButton);
+  _deleteButton = new KPushButton(i18n("Delete"), this);
+  connect(_deleteButton, SIGNAL(clicked()), SLOT(deleteClicked()));
+  vbox->addWidget(_deleteButton);
+  vbox->addStretch(1);
+}
+
+void Hardware::ConfigWidget::saveConfig()
+{
+  ::Programmer::ConfigWidget::saveConfig();
+  _config->writeCurrentHardware(_hc->portDescription().type, _names[_configCombo->currentItem()]);
+}
+
+void Hardware::ConfigWidget::configChanged(int i)
+{
+  set(_hc->portDescription(), i);
+}
+
+bool Hardware::ConfigWidget::set(const Port::Description &pd, uint i)
+{
+  Data *hd = _config->hardwareData(_names[i]);
+  if ( _hc==0 ) {
+    _hc = createHardwareConfigWidget(this, false);
+    _hc->show();
+    _hbox->addWidget(_hc);
+  }
+  bool ok = _hc->set(pd, *hd);
+  delete hd;
+  QString s = _config->comment(_names[i]);
+  if ( s.isEmpty() ) _comment->hide();
+  else {
+    _comment->setText(s);
+    _comment->show();
+  }
+  bool custom = !_config->isStandardHardware(_names[i]);
+  _editButton->setText(custom ? i18n("Edit/Test...") : i18n("New/Test..."));
+  _deleteButton->setEnabled(custom);
+  return ok;
+}
+
+bool Hardware::ConfigWidget::setPort(const ::Programmer::HardwareDescription &hd)
+{
+  updateList(hd.port.type);
+  int i = _names.findIndex(_config->currentHardware(hd.port.type));
+  if ( i!=-1 ) _configCombo->setCurrentItem(i);
+  return set(hd.port, _configCombo->currentItem());
+}
+
+void Hardware::ConfigWidget::updateList(PortType type)
+{
+  _configCombo->clear();
+  _names = _config->hardwareNames(type);
+  for (uint i=0; i<_names.count(); i++) {
+    bool standard = _config->isStandardHardware(_names[i]);
+    QString s = (standard ? _config->label(_names[i]) : i18n("%1 <custom>").arg(_names[i]));
+    _configCombo->insertItem(s);
+  }
+}
+
+void Hardware::ConfigWidget::editClicked()
+{
+  QString name = _names[_configCombo->currentItem()];
+  QString cname = (_config->isStandardHardware(name) ? QString::null : name);
+  Port::Description pd = _hc->portDescription();
+  EditDialog *hcd = new EditDialog(this, cname, pd, _hc->data());
+  int res = hcd->exec();
+  if ( res==QDialog::Rejected ) return;
+  updateList(pd.type);
+  int index = _names.findIndex(hcd->savedName());
+  _configCombo->setCurrentItem(index);
+  configChanged(_configCombo->currentItem());
+}
+
+void Hardware::ConfigWidget::deleteClicked()
+{
+  QString name = _names[_configCombo->currentItem()];
+  if ( !MessageBox::askContinue(i18n("Do you want to delete custom hardware \"%1\"?").arg(name),
+                                KStdGuiItem::del()) ) return;
+  _config->deleteCustomHardware(name);
+  updateList(_hc->portDescription().type);
+  configChanged(_configCombo->currentItem());
+}
diff --git a/src/progs/gui/hardware_config_widget.h b/src/progs/gui/hardware_config_widget.h
new file mode 100644
index 0000000..d373990
--- /dev/null
+++ b/src/progs/gui/hardware_config_widget.h
@@ -0,0 +1,102 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef HARDWARE_CONFIG_WIDGET
+#define HARDWARE_CONFIG_WIDGET
+
+#include <qlineedit.h>
+#include <qcombobox.h>
+#include <kdialogbase.h>
+#include <ktextbrowser.h>
+
+#include "progs/base/hardware_config.h"
+#include "progs/gui/prog_config_widget.h"
+#include "progs/base/generic_prog.h"
+#include "progs/base/prog_specific.h"
+
+namespace Hardware
+{
+
+//-----------------------------------------------------------------------------
+class HConfigWidget : public QFrame
+{
+Q_OBJECT
+public:
+  HConfigWidget(::Programmer::Base &base, QWidget *parent, bool edit);
+  virtual ~HConfigWidget() { delete _hardware; }
+  virtual bool set(const Port::Description &pd, const Data &data) = 0;
+  virtual Data *data() const = 0;
+  Port::Description portDescription() const { return _hardware->portDescription(); }
+
+protected:
+  ::Programmer::Hardware *_hardware;
+  QVBoxLayout *_mainVBox, *_editVBox;
+  bool _edit, _connected;
+  ::Programmer::Base &_base;
+};
+
+//-----------------------------------------------------------------------------
+class ConfigWidget;
+
+class EditDialog : public KDialogBase
+{
+Q_OBJECT
+public:
+  EditDialog(ConfigWidget *parent, const QString &name, const Port::Description &pd, Data *data);
+  QString savedName() const { return _savedName; }
+
+private slots:
+  virtual void slotOk();
+  virtual void slotCancel();
+
+private:
+  ConfigWidget  *_cwidget;
+  QString        _savedName;
+  Data          *_oldData;
+  HConfigWidget *_hc;
+  QLineEdit     *_name;
+};
+
+//-----------------------------------------------------------------------------
+class ConfigWidget : public ::Programmer::ConfigWidget
+{
+Q_OBJECT
+public:
+  ConfigWidget(::Programmer::Base *base, Config *config, QWidget *parent);
+  virtual ~ConfigWidget() { delete _base; }
+  virtual void saveConfig();
+  virtual bool setPort(const ::Programmer::HardwareDescription &hd);
+  virtual HConfigWidget *createHardwareConfigWidget(QWidget *parent, bool edit) const = 0;
+
+private slots:
+  void editClicked();
+  void deleteClicked();
+  void configChanged(int i);
+
+protected:
+  ::Programmer::Base *_base;
+
+private:
+  Config        *_config;
+  QStringList    _names;
+  HConfigWidget *_hc;
+  QPushButton   *_editButton, *_deleteButton;
+  QComboBox     *_configCombo;
+  KTextBrowser  *_comment;
+  QHBoxLayout   *_hbox;
+
+  void updateList(PortType type);
+  bool set(const Port::Description &pd, uint i);
+
+  friend class EditDialog;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/gui/port_selector.cpp b/src/progs/gui/port_selector.cpp
new file mode 100644
index 0000000..2aaaabf
--- /dev/null
+++ b/src/progs/gui/port_selector.cpp
@@ -0,0 +1,144 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "port_selector.h"
+
+#include <qtimer.h>
+#include <ktextbrowser.h>
+
+#include "common/port/serial.h"
+#include "common/port/parallel.h"
+#include "common/global/about.h"
+#include "common/gui/purl_gui.h"
+#include "progs/base/prog_config.h"
+
+const char * const PortSelector::LABELS[PortType::Nb_Types] = {
+  I18N_NOOP("Serial"), I18N_NOOP("Parallel"), I18N_NOOP("USB")
+};
+
+PortSelector::PortSelector(QWidget *parent)
+  : QFrame(parent, "port_selector"), _group(0), _main(0)
+{
+  _top = new QGridLayout(this, 1, 1, 0, 10);
+  _top->setRowStretch(1, 1);
+
+  _bgroup = new QButtonGroup;
+  connect(_bgroup, SIGNAL(clicked(int)), SIGNAL(changed()));
+}
+
+void PortSelector::setGroup(const Programmer::Group &group)
+{
+  _group = &group;
+  delete _main;
+  _main = new QWidget(this);
+  _top->addWidget(_main, 0, 0);
+  _grid = new QGridLayout(_main, 1, 1, 0, 10);
+  _grid->setColStretch(3, 1);
+  FOR_EACH(PortType, type) {
+    _combos[type.type()] = 0;
+    _status[type.type()] = 0;
+    if ( !group.isPortSupported(type) ) continue;
+    Port::Description pd(type, Programmer::GroupConfig::portDevice(group, type));
+    addPortType(pd);
+  }
+  _bgroup->setButton(Programmer::GroupConfig::portType(group).type());
+  _main->show();
+}
+
+void PortSelector::addPortType(const Port::Description &pd)
+{
+  QString noDeviceMessage, notAvailableMessage;
+  switch (pd.type.type()) {
+  case PortType::Serial:
+    noDeviceMessage = i18n("Your computer might not have any serial port.");
+    break;
+  case PortType::Parallel:
+    noDeviceMessage = i18n("Your computer might not have any parallel port "
+                           "or the /dev/parportX device has not been created.<br>"
+                           "Use \"mknod /dev/parport0 c 99 0\" to create it<br>"
+                           "and \"chmod a+rw /dev/parport0\" to make it RW enabled.");
+    notAvailableMessage = i18n("Piklab has been compiled without support for parallel port.");
+    break;
+  case PortType::USB:
+    notAvailableMessage = i18n("Piklab has been compiled without support for USB port.");
+    break;
+  case PortType::Nb_Types: Q_ASSERT(false); break;
+  }
+
+  QRadioButton *rb = new QRadioButton(i18n(LABELS[pd.type.type()]), _main);
+  _bgroup->insert(rb, pd.type.type());
+  if ( _bgroup->count()==1 ) _bgroup->setButton(pd.type.type());
+  _grid->addWidget(rb, 3*(_bgroup->count()-1), 0);
+  _status[pd.type.type()] = new QLabel(_main);
+  _grid->addWidget(_status[pd.type.type()], 3*(_bgroup->count()-1), 2);
+
+  QStringList list = Port::probedDeviceList(pd.type);
+  bool noDevice = ( list.isEmpty() && pd.type.data().withDevice );
+  bool notAvailable = !Port::isAvailable(pd.type);
+  rb->setEnabled(!notAvailable);
+  if ( noDevice || notAvailable ) {
+    KTextBrowser *comment = new KTextBrowser(_main);
+    QString text = (notAvailable ? notAvailableMessage : noDeviceMessage);
+    text += "<p>";
+    text += i18n("<a href=\"%1\">See Piklab homepage for help</a>.").arg(Piklab::URLS[Piklab::Support]);
+    comment->setText(text);
+    _grid->addMultiCellWidget(comment, 3*(_bgroup->count()-1)+1,3*(_bgroup->count()-1)+1, 0,3);
+  }
+
+  if (pd.type.data().withDevice) {
+    _combos[pd.type.type()] = new QComboBox(true, _main);
+    for (uint i=0; i<list.count(); i++) _combos[pd.type.type()]->insertItem(list[i]);
+    if ( !pd.device.isEmpty() && !list.contains(pd.device) ) _combos[pd.type.type()]->insertItem(pd.device);
+    _combos[pd.type.type()]->setCurrentText(pd.device);
+    connect(_combos[pd.type.type()], SIGNAL(activated(int)), SIGNAL(changed()));
+    connect(_combos[pd.type.type()], SIGNAL(textChanged(const QString &)), SLOT(textChanged()));
+    _grid->addWidget(_combos[pd.type.type()], 3*(_bgroup->count()-1), 1);
+  }
+}
+
+void PortSelector::setStatus(PortType ptype, const QString &message)
+{
+  _pending = false;
+  FOR_EACH(PortType, type) {
+    if ( _status[type.type()]==0 ) continue;
+    if ( type!=ptype ) _status[type.type()]->hide();
+    else {
+      _status[type.type()]->show();
+      _status[type.type()]->setText(message);
+    }
+  }
+}
+
+QString PortSelector::device(PortType type) const
+{
+  if ( type==PortType::Nb_Types || _combos[type.type()]==0 || !type.data().withDevice ) return QString::null;
+  return _combos[type.type()]->currentText();
+}
+
+void PortSelector::saveConfig()
+{
+  Programmer::GroupConfig::writePortType(*_group, type());
+  FOR_EACH(PortType, type) {
+    if ( !_group->isPortSupported(type) ) continue;
+    Programmer::GroupConfig::writePortDevice(*_group, type, device(type));
+  }
+}
+
+PortType PortSelector::type() const
+{
+  if ( _bgroup->count()==0 ) return PortType::Nb_Types;
+  return PortType::Type(_bgroup->selectedId());
+}
+
+void PortSelector::textChanged()
+{
+  if (_pending) return;
+  _status[type().type()]->hide();
+  _pending = true;
+  QTimer::singleShot(1000, this, SIGNAL(changed()));
+}
diff --git a/src/progs/gui/port_selector.h b/src/progs/gui/port_selector.h
new file mode 100644
index 0000000..6304d1a
--- /dev/null
+++ b/src/progs/gui/port_selector.h
@@ -0,0 +1,52 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PORT_SELECTOR_H
+#define PORT_SELECTOR_H
+
+#include <qradiobutton.h>
+#include <qcombobox.h>
+#include <qlayout.h>
+#include <qbuttongroup.h>
+#include <qlabel.h>
+
+#include "common/port/port.h"
+namespace Programmer { class Group; }
+
+class PortSelector : public QFrame
+{
+  Q_OBJECT
+public:
+  PortSelector(QWidget *parent);
+  void setGroup(const Programmer::Group &group);
+  Port::Description portDescription() const { return Port::Description(type(), device(type())); }
+  void saveConfig();
+  void setStatus(PortType type, const QString &message);
+
+signals:
+  void changed();
+
+private slots:
+  void textChanged();
+
+private:
+  const Programmer::Group *_group;
+  QGridLayout  *_top, *_grid;
+  QWidget      *_main;
+  QButtonGroup *_bgroup;
+  QComboBox    *_combos[PortType::Nb_Types];
+  QLabel       *_status[PortType::Nb_Types];
+  bool          _pending;
+  static const char * const LABELS[PortType::Nb_Types];
+
+  void addPortType(const Port::Description &pd);
+  PortType type() const;
+  QString device(PortType type) const;
+};
+
+#endif
diff --git a/src/progs/gui/prog_config_center.cpp b/src/progs/gui/prog_config_center.cpp
new file mode 100644
index 0000000..3210921
--- /dev/null
+++ b/src/progs/gui/prog_config_center.cpp
@@ -0,0 +1,122 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "prog_config_center.h"
+
+#include <qlayout.h>
+#include <qlabel.h>
+#include <qwidgetstack.h>
+#include <qcombobox.h>
+#include <qcheckbox.h>
+#include <qtimer.h>
+#include <qtabwidget.h>
+#include <kiconloader.h>
+
+#include "progs/list/prog_list.h"
+#include "prog_config_widget.h"
+#include "prog_group_ui.h"
+#include "libgui/global_config.h"
+#include "port_selector.h"
+#include "libgui/main_global.h"
+
+//----------------------------------------------------------------------------
+QPixmap Programmer::OptionsConfigWidget::pixmap() const
+{
+  KIconLoader loader;
+  return loader.loadIcon("piklab_config_programmer", KIcon::Toolbar, KIcon::SizeMedium);
+}
+
+//----------------------------------------------------------------------------
+Programmer::SelectConfigWidget::SelectConfigWidget()
+{
+  uint row = 0;
+
+// programmer type
+  QLabel *label = new QLabel(i18n("Programmer in use:"), this);
+  addWidget(label, row,row, 0,0);
+  _combo = new KeyComboBox<QString>(this);
+  connect(_combo->widget(), SIGNAL(activated(int)), SLOT(programmerChanged()));
+  addWidget(_combo->widget(), row,row, 1,1);
+  row++;
+
+// tab widget
+  _tabWidget = new QTabWidget(this);
+  addWidget(_tabWidget, row,row, 0,2);
+  row++;
+
+  // port selector
+  _portSelectorContainer = new Container;
+  _portSelectorContainer->setMargin(10);
+  _portSelector = new PortSelector(_portSelectorContainer);
+  connect(_portSelector, SIGNAL(changed()), SLOT(portChanged()));
+  _portSelectorContainer->addWidget(_portSelector, 0,0, 0,0);
+
+  // specific programmer config
+  _stack = new KeyWidgetStack<QString>(_tabWidget);
+  static_cast<QFrame *>(_stack->widget())->setMargin(10);
+  KIconLoader loader;
+  QPixmap icon = loader.loadIcon("configure", KIcon::Small);
+  _tabWidget->addTab(_stack->widget(), icon, i18n("Specific"));
+  ::Programmer::Lister::ConstIterator it;
+  for (it=::Programmer::lister().begin(); it!=::Programmer::lister().end(); ++it) {
+    _combo->appendItem(it.key(), it.data()->label());
+    ::Programmer::ConfigWidget *pcw = static_cast<const ::Programmer::GroupUI *>(it.data()->gui())->createConfigWidget(_stack->widget());
+    pcw->loadConfig();
+    _stack->appendItem(it.key(), pcw);
+  }
+
+  // init
+  _combo->setCurrentItem(GlobalConfig::programmerGroup().name());
+  _stack->setCurrentItem(GlobalConfig::programmerGroup().name());
+  QTimer::singleShot(0, this, SLOT(programmerChanged()));
+}
+
+void Programmer::SelectConfigWidget::portChanged()
+{
+  ::BusyCursor bc; // can take a few seconds to connect programmer...
+  HardwareDescription hd;
+  hd.port = _portSelector->portDescription();
+  ::Hardware::Config *config = Main::programmerGroup().hardwareConfig();
+  if (config) hd.name = config->currentHardware(hd.port.type);
+  delete config;
+  QWidget *w = _stack->item(_combo->currentItem());
+  bool ok = static_cast< ::Programmer::ConfigWidget *>(w)->setPort(hd);
+  _portSelector->setStatus(hd.port.type, ok ? i18n("Connection: Ok") : i18n("Connection: Error"));
+}
+
+QPixmap Programmer::SelectConfigWidget::pixmap() const
+{
+  KIconLoader loader;
+  return loader.loadIcon("piklab_config_programmer", KIcon::Toolbar, KIcon::SizeMedium);
+}
+
+void Programmer::SelectConfigWidget::saveConfig()
+{
+  _portSelector->saveConfig();
+  QString key = _combo->currentItem();
+  static_cast<ConfigWidget *>(_stack->item(key))->saveConfig();
+  GlobalConfig::writeProgrammerGroup(*::Programmer::lister().group(key));
+}
+
+void Programmer::SelectConfigWidget::programmerChanged()
+{
+  QString key = _combo->currentItem();
+  const ::Programmer::Group &group = *::Programmer::lister().group(key);
+  bool isHardware = !group.isSoftware();
+  bool hasTab = ( _tabWidget->indexOf(_portSelectorContainer)!=-1 );
+  if (isHardware) {
+    if ( !hasTab ) {
+      KIconLoader loader;
+      QPixmap icon = loader.loadIcon("connect_creating", KIcon::Small);
+      _tabWidget->insertTab(_portSelectorContainer, icon, i18n("Port Selection"), 0);
+    }
+  } else if (hasTab) _tabWidget->removePage(_portSelectorContainer);
+  _portSelector->setGroup(group);
+  _stack->setCurrentItem(key);
+  if (isHardware) QTimer::singleShot(0, this, SLOT(portChanged()));
+}
diff --git a/src/progs/gui/prog_config_center.h b/src/progs/gui/prog_config_center.h
new file mode 100644
index 0000000..ea5ee6d
--- /dev/null
+++ b/src/progs/gui/prog_config_center.h
@@ -0,0 +1,56 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PROG_CONFIG_CENTER_H
+#define PROG_CONFIG_CENTER_H
+
+#include <qcheckbox.h>
+
+#include "common/gui/config_widget.h"
+#include "common/gui/key_gui.h"
+#include "progs/base/prog_config.h"
+class Container;
+class PortSelector;
+
+namespace Programmer
+{
+BEGIN_DECLARE_CONFIG_WIDGET(Config, OptionsConfigWidget)
+  virtual QString header() const { return i18n("Programmer Options"); }
+  virtual QString title() const { return i18n("Programmer Options"); }
+  virtual QPixmap pixmap() const;
+END_DECLARE_CONFIG_WIDGET
+
+//----------------------------------------------------------------------------
+class SelectConfigWidget : public ::ConfigWidget
+{
+Q_OBJECT
+public:
+  SelectConfigWidget();
+  virtual void loadConfig() {}
+  virtual QString header() const { return i18n("Programmer Selection"); }
+  virtual QString title() const { return i18n("Programmer Selection"); }
+  virtual QPixmap pixmap() const;
+
+public slots:
+  virtual void saveConfig();
+
+private slots:
+  void programmerChanged();
+  void portChanged();
+
+private:
+  KeyComboBox<QString> *_combo;
+  PortSelector   *_portSelector;
+  KeyWidgetStack<QString> *_stack;
+  Container      *_portSelectorContainer;
+  QTabWidget     *_tabWidget;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/gui/prog_config_widget.cpp b/src/progs/gui/prog_config_widget.cpp
new file mode 100644
index 0000000..be767c2
--- /dev/null
+++ b/src/progs/gui/prog_config_widget.cpp
@@ -0,0 +1,46 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "prog_config_widget.h"
+
+#include <qlayout.h>
+#include <qlabel.h>
+#include <qcombobox.h>
+#include <qcheckbox.h>
+#include <kurlrequester.h>
+
+#include "progs/base/prog_config.h"
+#include "progs/base/prog_group.h"
+
+Programmer::ConfigWidget::ConfigWidget(const Group &group, QWidget *parent)
+  : ::ConfigWidget(parent), _group(group)
+{
+  if ( group.properties() & NeedDeviceSpecificFirmware ) {
+    uint row = numRows();
+    QLabel *label = new QLabel(i18n("Firmware directory:"), this);
+    addWidget(label, row,row, 0,0);
+    _firmwareDir = new KURLRequester(this);
+    _firmwareDir->setMode(KFile::Directory | KFile::ExistingOnly);
+    addWidget(_firmwareDir, row,row, 1,1);
+  } else _firmwareDir = 0;
+}
+
+void Programmer::ConfigWidget::loadConfig()
+{
+  if (_firmwareDir) _firmwareDir->setURL(GroupConfig::firmwareDirectory(_group));
+}
+
+void Programmer::ConfigWidget::saveConfig()
+{
+  if (_firmwareDir) GroupConfig::writeFirmwareDirectory(_group, _firmwareDir->url());
+}
+
+bool Programmer::ConfigWidget::setPort(const HardwareDescription &hd)
+{
+  return _group.checkConnection(hd);
+}
diff --git a/src/progs/gui/prog_config_widget.h b/src/progs/gui/prog_config_widget.h
new file mode 100644
index 0000000..d201cea
--- /dev/null
+++ b/src/progs/gui/prog_config_widget.h
@@ -0,0 +1,45 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PROG_CONFIG_WIDGET
+#define PROG_CONFIG_WIDGET
+
+class QCheckBox;
+class KURLRequester;
+
+#include "common/gui/config_widget.h"
+#include "common/port/port.h"
+
+namespace Programmer
+{
+class Group;
+class HardwareDescription;
+
+class ConfigWidget: public ::ConfigWidget
+{
+Q_OBJECT
+public:
+  ConfigWidget(const Group &group, QWidget *parent);
+  virtual void loadConfig();
+  const Group &group() const { return _group; }
+  virtual void saveConfig();
+  virtual bool setPort(const HardwareDescription &hd);
+
+signals:
+  void updatePortStatus(bool ok);
+
+protected:
+  const Group &_group;
+
+private:
+  KURLRequester *_firmwareDir;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/gui/prog_group_ui.cpp b/src/progs/gui/prog_group_ui.cpp
new file mode 100644
index 0000000..14cf7b0
--- /dev/null
+++ b/src/progs/gui/prog_group_ui.cpp
@@ -0,0 +1,182 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "prog_group_ui.h"
+
+#include <klocale.h>
+#include <kaction.h>
+#include <kiconloader.h>
+
+#include "common/common/misc.h"
+#include "common/global/purl.h"
+#include "common/gui/purl_gui.h"
+#include "progs/base/generic_prog.h"
+#include "progs/base/prog_group.h"
+#include "progs/base/prog_config.h"
+#include "libgui/main_global.h"
+#include "libgui/toplevel.h"
+#include "devices/base/device_group.h"
+#include "devices/pic/prog/pic_prog.h"
+
+//----------------------------------------------------------------------------
+Programmer::StandaloneMemoryCalibrationEditor::StandaloneMemoryCalibrationEditor(const Pic::Memory &memory, QWidget *parent)
+  : Pic::MemoryCalibrationEditor(0, const_cast<Pic::Memory &>(memory), parent)
+{}
+
+void Programmer::StandaloneMemoryCalibrationEditor::init(bool first)
+{
+  Pic::MemoryCalibrationEditor::init(first);
+  KAction *action = new KAction(i18n("Read"), "reload", 0, this, SIGNAL(updateCalibration()), Main::toplevel().actionCollection());
+  addAction(action);
+  action = new KAction(i18n("Regenerating..."), 0, 0, this, SIGNAL(regenerate()), Main::toplevel().actionCollection());
+  addAction(action);
+}
+
+//----------------------------------------------------------------------------
+Programmer::ButtonContainer::ButtonContainer(const QString &title,
+                                    QObject *receiver, const char *updateSlot, QWidget *parent)
+  : ::ButtonContainer(title, parent)
+{
+  if (receiver) button().appendAction(i18n("Read"), "reload", receiver, updateSlot);
+}
+
+//----------------------------------------------------------------------------
+Programmer::AdvancedDialog::AdvancedDialog(Base &base, QWidget *parent, const char *name)
+  : Dialog(IconList, i18n("Advanced Dialog"), Close, Close, parent, name, true, false),
+    _base(base), _calEditor(0)
+{
+  // programmer
+  KIconLoader loader;
+  QPixmap pixmap = loader.loadIcon("piklab_burnchip", KIcon::Toolbar, KIcon::SizeMedium);
+  QFrame *page = addPage(i18n("Programmer"), _base.group().label(), pixmap);
+  QVBoxLayout *vbox = new QVBoxLayout(page);
+  _programmerContainer = new Container(page);
+  vbox->addWidget(_programmerContainer);
+
+  Properties properties = _base.group().properties();
+  uint row = _programmerContainer->numRows();
+  if ( properties & HasFirmware ) {
+    _firmwareContainer = new ButtonContainer(i18n("Firmware"), this, SLOT(updateFirmware()), _programmerContainer);
+    _programmerContainer->addWidget(_firmwareContainer, row,row, 0,1);
+    if ( _base.group().properties() & CanUploadFirmware )
+      _firmwareContainer->button().appendAction(i18n("Uploading..."), "piklab_burnchip", this, SLOT(uploadFirmware()));
+    QLabel *label = new QLabel(i18n("Version:"), _firmwareContainer);
+    _firmwareContainer->addWidget(label, 1,1, 0,0);
+    _firmwareLabel = new QLabel(_firmwareContainer);
+    _firmwareContainer->addWidget(_firmwareLabel, 1,1, 1,1);
+    row++;
+  } else {
+    _firmwareContainer = 0;
+    _firmwareLabel = 0;
+  }
+
+  if ( _base.group().canReadVoltages() ) {
+    _voltagesContainer = new ButtonContainer(i18n("Voltages"), this, SLOT(updateVoltages()), _programmerContainer);
+    _programmerContainer->addWidget(_voltagesContainer, row,row, 0,1);
+    row++;
+  } else _voltagesContainer = 0;
+
+  if ( properties & HasSelfTest ) {
+    _selfTestContainer = new ButtonContainer(i18n("Self-test"), this, SLOT(updateSelfTest()), _programmerContainer);
+    _programmerContainer->addWidget(_selfTestContainer, row,row, 0,1);
+    row++;
+  } else _selfTestContainer = 0;
+
+  // calibration
+  pixmap = loader.loadIcon("configure", KIcon::Toolbar, KIcon::SizeMedium);
+  page = addPage(i18n("Calibration"), i18n("Calibration"), pixmap);
+  vbox = new QVBoxLayout(page);
+  _calibrationContainer = new Container(page);
+  vbox->addWidget(_calibrationContainer);
+  const Device::Data *data = Main::deviceData();
+  QString s;
+  if ( data==0 ) s = i18n("No device selected.");
+  else if ( data->group().name()!="pic" || !static_cast<const Pic::Data *>(data)->isReadable(Pic::MemoryRangeType::Cal) )
+    s = i18n("This device has no calibration information.");
+  else if ( !_base.group().isSupported(data->name()) ) s = i18n("The selected device is not supported by this programmer.");
+  else {
+    const ::Programmer::PicBase &pbase = static_cast<const ::Programmer::PicBase &>(_base);
+    _calEditor = new StandaloneMemoryCalibrationEditor(pbase.deviceMemory(), _calibrationContainer);
+    connect(_calEditor, SIGNAL(updateCalibration()), SLOT(updateCalibration()));
+    connect(_calEditor, SIGNAL(regenerate()), SLOT(regenerateCalibration()));
+    _calEditor->init(true);
+    _calEditor->setReadOnly(true);
+    _calibrationContainer->addWidget(_calEditor, 0,0, 0,0);
+  }
+  if ( !s.isEmpty() ) {
+    QLabel *label = new QLabel(s, _calibrationContainer);
+    _calibrationContainer->addWidget(label, 0,0, 0,0);
+  }
+}
+
+bool Programmer::AdvancedDialog::connectProgrammer()
+{
+  _base.disconnectHardware();
+  if ( !_base.connectHardware() ) {
+    MessageBox::sorry(i18n("Could not connect programmer."), Log::Show);
+    return false;
+  }
+  return true;
+}
+
+bool Programmer::AdvancedDialog::ensureConnected()
+{
+  if ( (_base.state()==NotConnected || _base.state()==Running) && !connectProgrammer() ) return false;
+  return _base.setTargetPowerOn(!readConfigEntry(Config::TargetSelfPowered).toBool());
+}
+
+void Programmer::AdvancedDialog::updateFirmware()
+{
+  ::BusyCursor bc;
+  if ( ensureConnected() ) _base.readFirmwareVersion();
+  updateDisplay();
+}
+
+void Programmer::AdvancedDialog::uploadFirmware()
+{
+  PURL::Url url = PURL::getOpenUrl(":open_firmware", PURL::filter(PURL::Hex), this ,i18n("Open Firmware"));
+  if ( url.isEmpty() ) return;
+  ::BusyCursor bc;
+  if ( !connectProgrammer() ) return;
+  if ( _base.uploadFirmware(url) )
+    MessageBox::information(i18n("Firmware uploaded successfully."), Log::Show);
+  else MessageBox::sorry(i18n("Error uploading firmware."), Log::Show);
+  updateFirmware();
+}
+
+void Programmer::AdvancedDialog::updateVoltages()
+{
+  ::BusyCursor bc;
+  if ( ensureConnected() ) _base.readVoltages();
+  updateDisplay();
+}
+
+void Programmer::AdvancedDialog::updateSelfTest()
+{
+  ::BusyCursor bc;
+  if ( ensureConnected() ) _base.selfTest(false);
+  updateDisplay();
+}
+
+void Programmer::AdvancedDialog::updateCalibration()
+{
+  ::BusyCursor bc;
+  if ( ensureConnected() ) static_cast< ::Programmer::PicBase &>(_base).readCalibration();
+  updateDisplay();
+}
+
+void Programmer::AdvancedDialog::regenerateCalibration()
+{
+  MessageBox::sorry(i18n("Oscillator calibration regeneration is not available with the selected programmer."), Log::Show);
+}
+
+void Programmer::AdvancedDialog::updateDisplay()
+{
+  if (_firmwareLabel) _firmwareLabel->setText(_base.firmwareVersion().pretty());
+  if (_calEditor) _calEditor->updateDisplay();
+}
diff --git a/src/progs/gui/prog_group_ui.h b/src/progs/gui/prog_group_ui.h
new file mode 100644
index 0000000..cd97834
--- /dev/null
+++ b/src/progs/gui/prog_group_ui.h
@@ -0,0 +1,89 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PROG_GROUP_UI_H
+#define PROG_GROUP_UI_H
+
+#include "common/gui/container.h"
+#include "common/gui/dialog.h"
+#include "progs/base/prog_group.h"
+#include "progs/base/generic_prog.h"
+#include "devices/pic/gui/pic_memory_editor.h"
+class Container;
+class PopupButton;
+
+namespace Programmer
+{
+class ConfigWidget;
+class Base;
+class Group;
+
+//----------------------------------------------------------------------------
+class StandaloneMemoryCalibrationEditor : public Pic::MemoryCalibrationEditor
+{
+Q_OBJECT
+public:
+  StandaloneMemoryCalibrationEditor(const Pic::Memory &memory, QWidget *parent);
+  virtual void init(bool first);
+  virtual bool hasAction(Device::Action) const { return false; }
+
+signals:
+  void updateCalibration();
+  void regenerate();
+};
+
+//----------------------------------------------------------------------------
+class ButtonContainer : public ::ButtonContainer
+{
+Q_OBJECT
+public:
+  ButtonContainer(const QString &title, QObject *receiver, const char *updateSlot, QWidget *parent);
+};
+
+//----------------------------------------------------------------------------
+class AdvancedDialog : public Dialog
+{
+Q_OBJECT
+public:
+  AdvancedDialog(Base &base, QWidget *parent, const char *name);
+  virtual void updateDisplay();
+
+protected:
+  Base      &_base;
+  Container *_programmerContainer, *_calibrationContainer;
+  ButtonContainer *_firmwareContainer, *_voltagesContainer, *_selfTestContainer;
+  Pic::MemoryCalibrationEditor *_calEditor;
+  bool connectProgrammer();
+  bool ensureConnected();
+
+protected slots:
+  void updateFirmware();
+  void uploadFirmware();
+  void updateVoltages();
+  void updateSelfTest();
+  void updateCalibration();
+  virtual void regenerateCalibration();
+
+private:
+  QLabel *_firmwareLabel;
+};
+
+//----------------------------------------------------------------------------
+class GroupUI : public ::Group::BaseGui
+{
+public:
+  virtual ::Programmer::ConfigWidget *createConfigWidget(QWidget *parent) const = 0;
+  virtual bool hasAdvancedDialog() const = 0;
+  virtual AdvancedDialog *createAdvancedDialog(Base &base, QWidget *parent) const = 0;
+};
+
+inline const ::Programmer::GroupUI &groupui(const ::Programmer::Base &base) { return static_cast<const ::Programmer::GroupUI &>(*base.group().gui()); }
+
+} // namespace
+
+#endif
diff --git a/src/progs/icd1/Makefile.am b/src/progs/icd1/Makefile.am
new file mode 100644
index 0000000..fccf96d
--- /dev/null
+++ b/src/progs/icd1/Makefile.am
@@ -0,0 +1,3 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+SUBDIRS = xml base gui
diff --git a/src/progs/icd1/base/Makefile.am b/src/progs/icd1/base/Makefile.am
new file mode 100644
index 0000000..3795dc5
--- /dev/null
+++ b/src/progs/icd1/base/Makefile.am
@@ -0,0 +1,11 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libicd1.la
+libicd1_la_SOURCES = icd1.cpp icd1_prog.cpp icd1_serial.cpp icd1_data.cpp
+libicd1_la_DEPENDENCIES = icd1_data.cpp
+
+noinst_DATA = icd1.xml
+icd1_data.cpp: ../xml/xml_icd1_parser icd1.xml
+	../xml/xml_icd1_parser
+CLEANFILES = icd1_data.cpp
diff --git a/src/progs/icd1/base/base.pro b/src/progs/icd1/base/base.pro
new file mode 100644
index 0000000..8ff4081
--- /dev/null
+++ b/src/progs/icd1/base/base.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = icd1
+HEADERS += icd1.h icd1_data.h icd1_prog.h icd1_serial.h
+SOURCES += icd1.cpp icd1_data.cpp icd1_prog.cpp icd1_serial.cpp
diff --git a/src/progs/icd1/base/icd1.cpp b/src/progs/icd1/base/icd1.cpp
new file mode 100644
index 0000000..8c2704a
--- /dev/null
+++ b/src/progs/icd1/base/icd1.cpp
@@ -0,0 +1,197 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2002-2003 Stephen Landamore <stephen@landamore.com>     *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "icd1.h"
+
+#include "common/global/global.h"
+#include "common/common/misc.h"
+#include "common/port/port_base.h"
+
+//-----------------------------------------------------------------------------
+Icd1::Hardware::Hardware(::Programmer::Base &base, const QString &portDevice)
+  : Icd::Hardware(base, new SerialPort(portDevice, base))
+{}
+
+bool Icd1::Hardware::internalConnect(const QString &mode)
+{
+  if ( !port()->open() ) return false;
+  if ( !port()->reset() ) return false;
+  if ( hasError() ) return false;
+  QByteArray a = toAscii(mode);
+  if ( !port()->send(a.data(), a.count()) ) return false;
+  QString s;
+  if ( !port()->receive(1, s) ) return false;
+  port()->setPinOn(Port::Serial::RTS, false, Port::PositiveLogic);
+  Port::msleep(1);
+  port()->setPinOn(Port::Serial::RTS, true, Port::PositiveLogic);
+  if ( s.upper()!=mode ) {
+    log(Log::LineType::Error, i18n("Failed to set port mode to '%1'.").arg(mode));
+    return false;
+  }
+  return true;
+}
+
+bool Icd1::Hardware::sendCommand(uint cmd, BitValue *res, uint timeout)
+{
+  if ( !port()->sendCommand(cmd) ) return false;
+  uchar byte;
+  if ( !port()->receiveByte((char &)byte, false, timeout) ) return false;
+  if (res) *res = byte << 8;
+  if ( !port()->receiveByte((char &)byte, true, timeout) ) return false;
+  if (res) *res += byte;
+  return true;
+}
+
+bool Icd1::Hardware::readBlockCommand(uint nbBytes)
+{
+  Q_ASSERT( nbBytes<=0xFF );
+  if ( !port()->sendCommand(0x7D00 + nbBytes) ) return false;
+  QByteArray a(nbBytes);
+  for (uint i=0; i<nbBytes; i++)
+    if ( !port()->receiveByte(*(a.data()+i), i!=0) ) return false;
+  _rx = QString(a);
+  return true;
+}
+
+bool Icd1::Hardware::setTarget()
+{
+  return sendCommand(0x6300 + data(_base.device()->name()).part);
+}
+
+bool Icd1::Hardware::getFirmwareVersion(VersionData &version)
+{
+  BitValue v1, v2;
+  if ( !sendCommand(0x7F00, &v1) || !sendCommand(0x7021, &v2) ) return false;
+  version = VersionData(v1.byte(1), v1.byte(0), v2.toUInt());
+  return true;
+}
+
+bool Icd1::Hardware::readVoltages(VoltagesData &voltages)
+{
+  if ( !sendCommand(0x7000) ) return false;
+  BitValue res;
+  if ( !sendCommand(0x701C, &res) ) return false;
+  voltages[Pic::TargetVdd].value = (2.050 / 256) * res.toUInt();  // voltage at AN0 pin
+  voltages[Pic::TargetVdd].value /= (4.7 / 14.7);        // voltage at Vcc
+  log(Log::DebugLevel::Max, QString("Vdd: %1 %2").arg(toHexLabel(res, 4)).arg(voltages[Pic::TargetVdd].value));
+  voltages[Pic::TargetVdd].error = false;
+  if ( !sendCommand(0x701D, &res) ) return false;
+  voltages[Pic::TargetVpp].value = (2.050 / 256) * res.byte(0);  // voltage at AN1 pin
+  voltages[Pic::TargetVpp].value /= (10.0 / 110.0);               // voltage at Vpp
+  log(Log::DebugLevel::Max, QString("Vpp: %1 %2").arg(toHexLabel(res, 4)).arg(voltages[Pic::TargetVpp].value));
+  voltages[Pic::TargetVpp].error = false;
+  return sendCommand(0x7001);
+}
+
+bool Icd1::Hardware::uploadFirmware(const Pic::Memory &memory)
+{
+  // #### TODO
+  return false;
+}
+
+bool Icd1::Hardware::setTargetReset(Pic::ResetMode mode)
+{
+  // #### TODO
+  return false;
+}
+
+bool Icd1::Hardware::selfTest()
+{
+  BitValue res;
+  if ( !sendCommand(0x700B, &res, 5000) ) return false;
+  if ( res!=0 ) {
+    log(Log::LineType::Warning, i18n("Self-test failed (returned value is %1)").arg(toLabel(res)));
+    return false;
+  }
+  return true;
+}
+
+bool Icd1::Hardware::gotoMemory(Pic::MemoryRangeType type, uint offset)
+{
+  if ( !sendCommand(0x7000) ) return false; // start sequence
+  uint cmd = (type==Pic::MemoryRangeType::Eeprom ? 0x7006 : 0x7005);
+  if ( !sendCommand(cmd) )  return false;
+  if ( type==Pic::MemoryRangeType::Config || type==Pic::MemoryRangeType::UserId || type==Pic::MemoryRangeType::DeviceId ) {
+    Q_ASSERT( offset==0 );
+    offset = device().range(type).start - Address(0x2000);
+    if ( !sendCommand(0xC000 + offset) )  return false;
+  } else if ( !sendCommand(0x2000 + offset) )  return false;
+  return true;
+}
+
+bool Icd1::Hardware::readMemory(Pic::MemoryRangeType type, uint wordOffset, Device::Array &data, const ::Programmer::VerifyData *vdata)
+{
+  if ( !gotoMemory(type, wordOffset) ) return false;
+  for (uint i=0; i<data.count(); i++) if ( !sendCommand(0x7002, &data[i]) ) return false;
+  if ( !sendCommand(0x7001) ) return false; // end sequence
+  if (vdata) {
+    for (uint i=0; i<data.count(); i++)
+      if ( !verifyWord(wordOffset+i, data[i], type, *vdata) ) return false;
+  }
+  return true;
+}
+
+bool Icd1::Hardware::writeMemory(Pic::MemoryRangeType type, uint wordOffset, const Device::Array &data)
+{
+  if ( !gotoMemory(type, wordOffset) ) return false;
+  for (uint i=0; i<data.count(); i++) if ( !sendCommand(0x8000 | data[i].toUInt()) ) return false;
+  if ( !sendCommand(0x7001) ) return false; // end sequence
+  return true;
+}
+
+bool Icd1::Hardware::eraseAll()
+{
+  BitValue res;
+  if ( !sendCommand(0x7000) ) return false; // enable Vpp
+  if ( !sendCommand(0x7007, &res) ) return false;
+  if ( !sendCommand(0x7001) ) return false; // disable Vpp
+  if ( res!=0x3FFF ) {
+    log(Log::LineType::Error, i18n("Erase failed (returned value is %1)").arg(toHexLabel(res, 4)));
+    return false;
+  }
+  return true;
+}
+
+bool Icd1::Hardware::haltRun()
+{
+  // #### TODO
+  return false;
+}
+
+bool Icd1::Hardware::step()
+{
+  // #### TODO
+  return false;
+}
+
+bool Icd1::Hardware::resumeRun()
+{
+  // #### TODO
+  return false;
+}
+
+bool Icd1::Hardware::writeRegister(Address address, BitValue value, uint nbBytes)
+{
+  Q_ASSERT( nbBytes==1 || nbBytes==2 );
+  // #### TODO
+  return false;
+}
+
+bool Icd1::Hardware::readRegister(Address address, BitValue &value, uint nbBytes)
+{
+  Q_ASSERT( nbBytes==1 || nbBytes==2 );
+  // #### TODO
+  return false;
+}
+
+BitValue Icd1::Hardware::getProgramCounter()
+{
+  // #### TODO
+  return 0;
+}
diff --git a/src/progs/icd1/base/icd1.h b/src/progs/icd1/base/icd1.h
new file mode 100644
index 0000000..d1ae1d0
--- /dev/null
+++ b/src/progs/icd1/base/icd1.h
@@ -0,0 +1,58 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2002-2003 Stephen Landamore <stephen@landamore.com>     *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef ICD1_H
+#define ICD1_H
+
+#include "progs/icd2/base/icd.h"
+#include "icd1_data.h"
+#include "icd1_serial.h"
+
+namespace Icd1
+{
+//-----------------------------------------------------------------------------
+class Hardware : public Icd::Hardware
+{
+public:
+  Hardware(::Programmer::Base &base, const QString &portDevice);
+  SerialPort *port() { return static_cast<SerialPort *>(_port); }
+  // initialization
+  virtual bool uploadFirmware(const Pic::Memory &memory);
+  virtual bool setTarget();
+
+// status
+  virtual bool getFirmwareVersion(VersionData &version);
+  virtual bool readVoltages(VoltagesData &voltages);
+  virtual bool setTargetReset(Pic::ResetMode mode);
+  bool selfTest();
+
+// programming
+  virtual bool readMemory(Pic::MemoryRangeType type, uint wordOffset, Device::Array &data, const ::Programmer::VerifyData *vdata);
+  virtual bool writeMemory(Pic::MemoryRangeType type, uint wordOffset, const Device::Array &data);
+  virtual bool eraseAll();
+
+// debugging
+  virtual bool readRegister(Address address, BitValue &value, uint nbBytes);
+  virtual bool writeRegister(Address address, BitValue value, uint nbBytes);
+  virtual bool resumeRun();
+  virtual bool step();
+  virtual bool haltRun();
+  virtual BitValue getProgramCounter();
+
+private:
+  virtual bool internalConnect(const QString &mode);
+  virtual QString receivedData() const { return _rx; }
+  bool sendCommand(uint cmd, BitValue *res = 0, uint timeout = Port::Serial::DEFAULT_TIMEOUT);
+  bool readBlockCommand(uint nbBytes);
+  bool gotoMemory(Pic::MemoryRangeType type, uint offset);
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/icd1/base/icd1.xml b/src/progs/icd1/base/icd1.xml
new file mode 100644
index 0000000..4be7e3e
--- /dev/null
+++ b/src/progs/icd1/base/icd1.xml
@@ -0,0 +1,25 @@
+<!-- ************************************************************************* -->
+<!-- * Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             * -->
+<!-- *                                                                       * -->
+<!-- * This program is free software; you can redistribute it and/or modify  * -->
+<!-- * it under the terms of the GNU General Public License as published by  * -->
+<!-- * the Free Software Foundation; either version 2 of the License, or     * -->
+<!-- * (at your option) any later version.                                   * -->
+<!-- *************************************************************************/-->
+<!DOCTYPE piklab>
+
+<type name="icd1">
+  <device name="16F870" family="0x02" />
+  <device name="16F871" family="0x02" />
+  <device name="16F872" family="0x02" />
+  <device name="16F873" family="0x01" />
+  <device name="16F874" family="0x01" />
+  <device name="16F876" family="0x00" />
+  <device name="16F877" family="0x00" />
+
+  <!-- not sure about these: only with newer firmware -->
+  <device name="16F873A" family="0x01" />
+  <device name="16F874A" family="0x01" />
+  <device name="16F876A" family="0x00" />
+  <device name="16F877A" family="0x00" />
+</type>
diff --git a/src/progs/icd1/base/icd1_data.h b/src/progs/icd1/base/icd1_data.h
new file mode 100644
index 0000000..4200578
--- /dev/null
+++ b/src/progs/icd1/base/icd1_data.h
@@ -0,0 +1,22 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef ICD1_DATA_H
+#define ICD1_DATA_H
+
+#include <qstring.h>
+
+namespace Icd1
+{
+  struct Data {
+    uchar part;
+  };
+  extern const Data &data(const QString &device);
+} // namespace
+
+#endif
diff --git a/src/progs/icd1/base/icd1_prog.cpp b/src/progs/icd1/base/icd1_prog.cpp
new file mode 100644
index 0000000..13d0d4c
--- /dev/null
+++ b/src/progs/icd1/base/icd1_prog.cpp
@@ -0,0 +1,51 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "icd1_prog.h"
+
+#include <qdir.h>
+
+#include "progs/base/prog_config.h"
+#include "devices/list/device_list.h"
+#include "icd1_serial.h"
+
+//-----------------------------------------------------------------------------
+void Icd1::ProgrammerBase::clear()
+{
+  Icd::ProgrammerBase::clear();
+  _selfTestResult = ::Programmer::Nb_ResultTypes;
+}
+
+bool Icd1::ProgrammerBase::selfTest(bool ask)
+{
+  log(Log::DebugLevel::Normal, "  Self-test");
+  _selfTestResult = (hardware().selfTest() ? ::Programmer::Pass : ::Programmer::Fail);
+  if ( _selfTestResult==::Programmer::Fail ) {
+    if ( ask && !askContinue(i18n("Self-test failed. Do you want to continue anyway?")) ) {
+      logUserAbort();
+      return false;
+    }
+  }
+  return true;
+}
+
+//----------------------------------------------------------------------------
+Programmer::Properties Icd1::Group::properties() const
+{
+   return ::Programmer::Programmer | ::Programmer::HasFirmware | ::Programmer::CanUploadFirmware | ::Programmer::HasSelfTest | ::Programmer::CanReadMemory | ::Programmer::HasConnectedState;
+}
+
+Programmer::Hardware *Icd1::Group::createHardware(::Programmer::Base &base, const ::Programmer::HardwareDescription &hd) const
+{
+  return new Hardware(base, hd.port.device);
+}
+
+Programmer::DeviceSpecific *Icd1::Group::createDeviceSpecific(::Programmer::Base &base) const
+{
+  return new Icd::DeviceSpecific(base);
+}
diff --git a/src/progs/icd1/base/icd1_prog.h b/src/progs/icd1/base/icd1_prog.h
new file mode 100644
index 0000000..721be49
--- /dev/null
+++ b/src/progs/icd1/base/icd1_prog.h
@@ -0,0 +1,60 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef ICD1_PROG_H
+#define ICD1_PROG_H
+
+#include "common/global/global.h"
+#include "progs/icd2/base/icd_prog.h"
+#include "icd1.h"
+#include "progs/base/prog_group.h"
+
+namespace Icd1
+{
+class Hardware;
+
+//-----------------------------------------------------------------------------
+class ProgrammerBase : public Icd::ProgrammerBase
+{
+Q_OBJECT
+public:
+  ProgrammerBase(const Programmer::Group &group, const Pic::Data *data)
+    : Icd::ProgrammerBase(group, data, "icd1_programmer_base") {}
+  virtual bool selfTest(bool ask);
+  ::Programmer::ResultType selfTestResult() const { return _selfTestResult; }
+
+protected:
+  Hardware &hardware() { return static_cast<Hardware &>(*_hardware); }
+  virtual void clear();
+
+private:
+  ::Programmer::ResultType _selfTestResult;
+};
+
+//-----------------------------------------------------------------------------
+class Group : public Icd::Group
+{
+public:
+  virtual QString name() const { return "icd1"; }
+  virtual QString label() const { return i18n("ICD1 Programmer"); }
+  virtual QString xmlName() const { return "icd1"; }
+  virtual ::Programmer::Properties properties() const;
+  virtual ::Programmer::TargetPowerMode targetPowerMode() const { return ::Programmer::TargetExternallyPowered; }
+  virtual bool isPortSupported(PortType type) const { return ( type==PortType::Serial ); }
+  virtual bool canReadVoltage(Pic::VoltageType type) const { return ( type==Pic::TargetVdd || type==Pic::TargetVpp ); }
+
+protected:
+  virtual void initSupported();
+  virtual ::Programmer::Base *createBase(const Device::Data *data) const { return new ProgrammerBase(*this, static_cast<const Pic::Data *>(data)); }
+  virtual ::Programmer::Hardware *createHardware(::Programmer::Base &base, const ::Programmer::HardwareDescription &hd) const;
+  virtual ::Programmer::DeviceSpecific *createDeviceSpecific(::Programmer::Base &base) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/icd1/base/icd1_serial.cpp b/src/progs/icd1/base/icd1_serial.cpp
new file mode 100644
index 0000000..a506fdb
--- /dev/null
+++ b/src/progs/icd1/base/icd1_serial.cpp
@@ -0,0 +1,76 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2002-2003 Stephen Landamore <stephen@landamore.com>     *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "icd1_serial.h"
+
+#include <qdatetime.h>
+#include "common/global/global.h"
+#include "common/common/misc.h"
+#include "common/common/number.h"
+
+//-----------------------------------------------------------------------------
+Icd1::SerialPort::SerialPort(const QString &device, Log::Base &log)
+  : Port::Serial(device, NeedDrain | NeedFlush, log)
+{}
+
+bool Icd1::SerialPort::open()
+{
+  if ( !Port::Serial::open() ) return false;
+  return setMode(NoInputFlag, ByteSize8 | IgnoreControlLines | EnableReceiver, S57600, 0);
+}
+
+bool Icd1::SerialPort::reset()
+{
+  // reset
+  setPinOn(RTS, false, Port::PositiveLogic);
+  setPinOn(DTR, false, Port::PositiveLogic);
+  Port::msleep(10);
+  // remove reset
+  setPinOn(RTS, true, Port::PositiveLogic);
+  setPinOn(DTR, true, Port::PositiveLogic);
+  Port::msleep(10);
+  return true;
+}
+
+bool Icd1::SerialPort::synchronize()
+{
+  if ( !setPinOn(RTS, false, Port::PositiveLogic) ) return false;
+  QTime time;
+  time.start();
+  for (;;) {
+    bool bit;
+    if ( !readPin(CTS, Port::PositiveLogic, bit) ) return false;
+    if ( !bit) break;
+    if ( uint(time.elapsed())>3000 ) { // 3 seconds
+      log(Log::LineType::Error, i18n("Timeout synchronizing."));
+      return false;
+    }
+  }
+  return setPinOn(RTS, true, Port::PositiveLogic);
+}
+
+bool Icd1::SerialPort::sendCommand(uint cmd)
+{
+  Q_ASSERT( cmd<=0xFFFF );
+  synchronize();
+  char c[7] = "$XXXX\r";
+  QString cs = toHex(cmd, 4);
+  log(Log::DebugLevel::Extra, QString("Send command: %1").arg(toPrintable(cs, PrintAlphaNum)));
+  c[1] = cs[0].latin1();
+  c[2] = cs[1].latin1();
+  c[3] = cs[2].latin1();
+  c[4] = cs[3].latin1();
+  return send(c, 7);
+}
+
+bool Icd1::SerialPort::receiveByte(char &byte, bool synchronizeBefore, uint timeout)
+{
+  if ( synchronizeBefore && !synchronize() ) return false;
+  return receiveChar(byte, timeout);
+}
diff --git a/src/progs/icd1/base/icd1_serial.h b/src/progs/icd1/base/icd1_serial.h
new file mode 100644
index 0000000..e8d03da
--- /dev/null
+++ b/src/progs/icd1/base/icd1_serial.h
@@ -0,0 +1,31 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2002-2003 Stephen Landamore <stephen@landamore.com>     *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef ICD1_SERIAL_H
+#define ICD1_SERIAL_H
+
+#include "common/port/serial.h"
+
+namespace Icd1
+{
+
+class SerialPort : public Port::Serial
+{
+public:
+  SerialPort(const QString &portDevice, Log::Base &log);
+  bool open();
+  bool reset();
+  bool synchronize();
+  bool sendCommand(uint cmd);
+  bool receiveByte(char &byte, bool synchronizeBefore, uint timeout = DEFAULT_TIMEOUT);
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/icd1/gui/Makefile.am b/src/progs/icd1/gui/Makefile.am
new file mode 100644
index 0000000..183aab9
--- /dev/null
+++ b/src/progs/icd1/gui/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+libicd1ui_la_LDFLAGS = $(all_libraries)
+noinst_LTLIBRARIES = libicd1ui.la
+
+libicd1ui_la_SOURCES = icd1_group_ui.cpp
diff --git a/src/progs/icd1/gui/icd1_group_ui.cpp b/src/progs/icd1/gui/icd1_group_ui.cpp
new file mode 100644
index 0000000..34f28d5
--- /dev/null
+++ b/src/progs/icd1/gui/icd1_group_ui.cpp
@@ -0,0 +1,41 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "icd1_group_ui.h"
+
+#include "progs/gui/prog_config_widget.h"
+#include "progs/base/prog_group.h"
+#include "progs/icd1/base/icd1_prog.h"
+
+//----------------------------------------------------------------------------
+Icd1::AdvancedDialog::AdvancedDialog(ProgrammerBase &base, QWidget *parent)
+  : ::Programmer::PicAdvancedDialog(base, parent, "icd1_advanced_dialog")
+{
+  uint row = _selfTestContainer->numRows();
+  QLabel *label = new QLabel(i18n("Result:"), _selfTestContainer);
+  _selfTestContainer->addWidget(label, row,row, 0,0);
+  _selfTestLabel = new QLabel(_selfTestContainer);
+  _selfTestContainer->addWidget(_selfTestLabel, row,row, 1,1);
+}
+
+void Icd1::AdvancedDialog::updateDisplay()
+{
+  ::Programmer::PicAdvancedDialog::updateDisplay();
+  _selfTestLabel->setText(i18n(::Programmer::RESULT_TYPE_LABELS[base().selfTestResult()]));
+}
+
+//----------------------------------------------------------------------------
+::Programmer::ConfigWidget *Icd1::GroupUI::createConfigWidget(QWidget *parent) const
+{
+  return new ::Programmer::ConfigWidget(static_cast<const Group &>(group()), parent);
+}
+
+::Programmer::AdvancedDialog *Icd1::GroupUI::createAdvancedDialog(::Programmer::Base &base, QWidget *parent) const
+{
+  return new AdvancedDialog(static_cast<ProgrammerBase &>(base), parent);
+}
diff --git a/src/progs/icd1/gui/icd1_group_ui.h b/src/progs/icd1/gui/icd1_group_ui.h
new file mode 100644
index 0000000..f60562a
--- /dev/null
+++ b/src/progs/icd1/gui/icd1_group_ui.h
@@ -0,0 +1,43 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef ICD1_GROUP_UI_H
+#define ICD1_GROUP_UI_H
+
+#include "devices/pic/gui/pic_prog_group_ui.h"
+#include "progs/icd1/base/icd1_prog.h"
+
+namespace Icd1
+{
+class Group;
+
+//----------------------------------------------------------------------------
+class AdvancedDialog : public ::Programmer::PicAdvancedDialog
+{
+Q_OBJECT
+public:
+  AdvancedDialog(ProgrammerBase &base, QWidget *parent);
+  virtual void updateDisplay();
+
+private:
+  QLabel *_selfTestLabel;
+  ProgrammerBase &base() { return static_cast<ProgrammerBase &>(_base); }
+};
+
+//----------------------------------------------------------------------------
+class GroupUI : public ::Programmer::GroupUI
+{
+public:
+  virtual ::Programmer::ConfigWidget *createConfigWidget(QWidget *parent) const;
+  virtual bool hasAdvancedDialog() const { return true; }
+  virtual ::Programmer::AdvancedDialog *createAdvancedDialog(::Programmer::Base &base, QWidget *parent) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/icd1/icd1.pro b/src/progs/icd1/icd1.pro
new file mode 100644
index 0000000..60ac0f5
--- /dev/null
+++ b/src/progs/icd1/icd1.pro
@@ -0,0 +1,2 @@
+TEMPLATE = subdirs
+SUBDIRS = xml base
diff --git a/src/progs/icd1/xml/Makefile.am b/src/progs/icd1/xml/Makefile.am
new file mode 100644
index 0000000..dab961c
--- /dev/null
+++ b/src/progs/icd1/xml/Makefile.am
@@ -0,0 +1,14 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_PROGRAMS = xml_icd1_parser
+xml_icd1_parser_SOURCES = xml_icd1_parser.cpp
+OBJECTS = $(top_builddir)/src/devices/list/libdevicelistnoui.la \
+	$(top_builddir)/src/devices/pic/pic/libpic.la $(top_builddir)/src/devices/pic/base/libpicbase.la \
+	$(top_builddir)/src/devices/pic/xml_data/libpicxml.la \
+	$(top_builddir)/src/devices/mem24/mem24/libmem24.la $(top_builddir)/src/devices/mem24/base/libmem24base.la \
+	$(top_builddir)/src/devices/mem24/xml_data/libmem24xml.la \
+	$(top_builddir)/src/xml_to_data/libxmltodata.la $(top_builddir)/src/devices/base/libdevicebase.la \
+	$(top_builddir)/src/common/common/libcommon.la
+xml_icd1_parser_DEPENDENCIES = $(OBJECTS)
+xml_icd1_parser_LDADD = $(OBJECTS) $(LIB_KDECORE)
diff --git a/src/progs/icd1/xml/xml.pro b/src/progs/icd1/xml/xml.pro
new file mode 100644
index 0000000..ebbde6c
--- /dev/null
+++ b/src/progs/icd1/xml/xml.pro
@@ -0,0 +1,18 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/app.pro)
+
+TARGET   = xml_icd1_parser
+SOURCES += xml_icd1_parser.cpp
+LIBS    += ../../../devices/list/libdevicelist.a \
+           ../../../devices/mem24/mem24/libmem24.a ../../../devices/mem24/xml_data/libmem24xml.a \
+           ../../../devices/mem24/base/libmem24base.a \
+           ../../../devices/pic/pic/libpic.a ../../../devices/pic/xml_data/libpicxml.a \
+           ../../../devices/pic/base/libpicbase.a ../../../xml_to_data/libxmltodata.a \
+           ../../../devices/base/libdevicebase.a ../../../common/global/libglobal.a \
+           ../../../common/nokde/libnokde.a ../../../common/common/libcommon.a
+
+unix:QMAKE_POST_LINK = cd ../base && ../xml/xml_icd1_parser
+unix:QMAKE_CLEAN += ../base/icd1_data.cpp
+win32:QMAKE_POST_LINK = cd ..\base && ..\xml\xml_icd1_parser.exe
+win32:QMAKE_CLEAN += ..\base\icd1_data.cpp
+
diff --git a/src/progs/icd1/xml/xml_icd1_parser.cpp b/src/progs/icd1/xml/xml_icd1_parser.cpp
new file mode 100644
index 0000000..e09f51c
--- /dev/null
+++ b/src/progs/icd1/xml/xml_icd1_parser.cpp
@@ -0,0 +1,41 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "xml_to_data/prog_xml_to_data.h"
+#include "progs/icd1/base/icd1_data.h"
+
+//-----------------------------------------------------------------------------
+namespace Icd1
+{
+
+class XmlToData : public Programmer::XmlToData<Data>
+{
+public:
+  XmlToData() : Programmer::XmlToData<Data>("icd1", "Icd1") {}
+
+private:
+  virtual void parseData(QDomElement element, Data &data);
+  virtual void outputData(const Data &data, QTextStream &s) const;
+};
+
+void Icd1::XmlToData::parseData(QDomElement element, Data &data)
+{
+  bool ok;
+  data.part = fromHexLabel(element.attribute("family"), 2, &ok);
+  if ( !ok ) qFatal("Missing or malformed family attribute");
+}
+
+void Icd1::XmlToData::outputData(const Data &data, QTextStream &s) const
+{
+  s << toHexLabel(data.part, 2);
+}
+
+} // namespace
+
+//-----------------------------------------------------------------------------
+XML_MAIN(Icd1::XmlToData)
diff --git a/src/progs/icd2/Makefile.am b/src/progs/icd2/Makefile.am
new file mode 100644
index 0000000..cde6042
--- /dev/null
+++ b/src/progs/icd2/Makefile.am
@@ -0,0 +1,3 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+SUBDIRS = icd2_data xml base gui
diff --git a/src/progs/icd2/base/Makefile.am b/src/progs/icd2/base/Makefile.am
new file mode 100644
index 0000000..9350219
--- /dev/null
+++ b/src/progs/icd2/base/Makefile.am
@@ -0,0 +1,13 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libicd2.la
+libicd2_la_SOURCES = microchip.cpp icd2.cpp icd2_prog.cpp icd2_serial.cpp \
+		icd2_usb.cpp icd2_usb_firmware.cpp icd2_data.cpp icd2_debug.cpp icd.cpp \
+		icd_prog.cpp icd2_debug_specific.cpp
+libicd2_la_DEPENDENCIES = icd2_data.cpp
+
+noinst_DATA = icd2.xml
+icd2_data.cpp: ../xml/xml_icd2_parser icd2.xml
+	../xml/xml_icd2_parser
+CLEANFILES = icd2_data.cpp
diff --git a/src/progs/icd2/base/base.pro b/src/progs/icd2/base/base.pro
new file mode 100644
index 0000000..6ca2f2d
--- /dev/null
+++ b/src/progs/icd2/base/base.pro
@@ -0,0 +1,8 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = icd2
+HEADERS += microchip.h icd.h icd_prog.h icd2.h icd2_data.h \
+           icd2_prog.h icd2_debug_specific.h icd2_debug.h icd2_serial.h icd2_usb.h
+SOURCES += microchip.cpp icd.cpp icd_prog.cpp icd2.cpp icd2_data.cpp \
+           icd2_prog.cpp icd2_debug_specific.cpp icd2_debug.cpp icd2_serial.cpp icd2_usb.cpp icd2_usb_firmware.cpp
diff --git a/src/progs/icd2/base/icd.cpp b/src/progs/icd2/base/icd.cpp
new file mode 100644
index 0000000..bfb1129
--- /dev/null
+++ b/src/progs/icd2/base/icd.cpp
@@ -0,0 +1,94 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2002-2003 Stephen Landamore <stephen@landamore.com>     *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "icd.h"
+
+#include "common/global/global.h"
+#include "common/common/misc.h"
+#include "common/port/port_base.h"
+
+//-----------------------------------------------------------------------------
+bool Icd::DeviceSpecific::doRead(Pic::MemoryRangeType type, Device::Array &data, const ::Programmer::VerifyData *vdata)
+{
+  data.resize(device().nbWords(type));
+  if ( vdata==0 ) return hardware().readMemory(type, 0, data, vdata);
+  bool only = ( vdata->actions & ::Programmer::OnlyProgrammedVerify );
+  const Device::Array tmp = static_cast<const Pic::Memory &>(vdata->memory).arrayForWriting(type);
+  uint wordOffset;
+  Device::Array pdata = prepareRange(type, tmp, !only, wordOffset);
+  return hardware().readMemory(type, wordOffset, pdata, vdata);
+}
+
+Device::Array Icd::DeviceSpecific::prepareRange(Pic::MemoryRangeType type, const Device::Array &data,
+                                                bool force, uint &wordOffset)
+{
+  if ( type!=Pic::MemoryRangeType::Code ) {
+    wordOffset = 0;
+    return data;
+  }
+  wordOffset = (force ? 0 : findNonMaskStart(type, data));
+  uint nbWords = 0;
+  if ( wordOffset!=data.count() ) {
+    uint end = (force ? data.count() : findNonMaskEnd(type, data));
+    nbWords = end - wordOffset + 1;
+    log(Log::DebugLevel::Normal, QString("    start=%1 nbWords=%2 total=%3 force=%4")
+      .arg(toHexLabel(wordOffset, device().nbCharsAddress())).arg(toHexLabel(nbWords, device().nbCharsAddress()))
+      .arg(toHexLabel(data.count(), device().nbCharsAddress())).arg(force ? "true" : "false"));
+  }
+  _base.progressMonitor().addTaskProgress(data.count()-nbWords);
+  return data.mid(wordOffset, nbWords);
+}
+
+bool Icd::DeviceSpecific::doWrite(Pic::MemoryRangeType type, const Device::Array &data, bool force)
+{
+  Q_ASSERT( data.count()==device().nbWords(type) );
+
+  uint nb = device().nbWordsWriteAlignment(Pic::MemoryRangeType::Code);
+  if ( device().architecture()==Pic::Architecture::P18J && type==Pic::MemoryRangeType::Config ) {
+    Q_ASSERT( data.count()%2==0 );
+    int delta = nb - data.count()/2; // config memory words contains 1 byte
+    Q_ASSERT( delta>=0 );
+    Device::Array rdata(delta);
+    uint wordOffset = device().nbWords(Pic::MemoryRangeType::Code) - delta;
+    if ( !hardware().readMemory(Pic::MemoryRangeType::Code, wordOffset, rdata, 0) ) return false;
+    Device::Array pdata(nb);
+    for (uint i=0; i<uint(delta); i++) pdata[i] = rdata[i];
+    for (uint i=delta; i<nb; i++) {
+      pdata[i] = data[2*(i-delta)];
+      pdata[i] |= data[2*(i-delta)+1] << 8;
+    }
+    return hardware().writeMemory(Pic::MemoryRangeType::Code, wordOffset, pdata);
+  }
+
+  uint wordOffset;
+  Device::Array pdata = prepareRange(type, data, force, wordOffset);
+  if ( device().architecture()==Pic::Architecture::P18J && type==Pic::MemoryRangeType::Code ) {
+    uint end = wordOffset + pdata.size();
+    if ( end>=device().nbWords(Pic::MemoryRangeType::Code) ) {
+      Device::Array rdata(device().nbWords(Pic::MemoryRangeType::Config));
+      if ( !hardware().readMemory(Pic::MemoryRangeType::Code, device().nbWords(Pic::MemoryRangeType::Code), rdata, 0) ) return false;
+      uint n = rdata.count() / 2;
+      for (uint i=0; i<n; i++) {
+        pdata[pdata.size() - n + i] = rdata[2*i];
+        pdata[pdata.size() - n + i] |= rdata[2*i+1] << 8;
+      }
+    }
+  }
+  return hardware().writeMemory(type, wordOffset, pdata);
+}
+
+bool Icd::DeviceSpecific::doErase(bool)
+{
+  if ( device().architecture()==Pic::Architecture::P18J ) { // ### also true for others ?
+    Device::Array data(device().nbWords(Pic::MemoryRangeType::Config));
+    for (uint i=0; i<data.size(); i++) data[i] = device().config()._words[i].wmask;
+    if ( !doWrite(Pic::MemoryRangeType::Config, data, true) ) return false;
+  }
+  return hardware().eraseAll();
+}
diff --git a/src/progs/icd2/base/icd.h b/src/progs/icd2/base/icd.h
new file mode 100644
index 0000000..9a65755
--- /dev/null
+++ b/src/progs/icd2/base/icd.h
@@ -0,0 +1,74 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2002-2003 Stephen Landamore <stephen@landamore.com>     *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef ICD_H
+#define ICD_H
+
+#include "microchip.h"
+#include "devices/pic/prog/pic_prog.h"
+#include "devices/pic/pic/pic_memory.h"
+
+namespace Icd
+{
+//-----------------------------------------------------------------------------
+class Hardware : public ::Programmer::PicHardware
+{
+public:
+  Hardware(::Programmer::Base &base, Port::Base *port) : ::Programmer::PicHardware(base, port, QString::null) {}
+// initialization
+  virtual bool uploadFirmware(const Pic::Memory &memory) = 0;
+  virtual bool setTarget() = 0;
+
+// status
+  virtual bool getFirmwareVersion(VersionData &version) = 0;
+  virtual bool setTargetPowerOn(bool) { return true; }
+
+// programming
+  virtual bool readMemory(Pic::MemoryRangeType type, uint wordOffset, Device::Array &data, const ::Programmer::VerifyData *vdata) = 0;
+  virtual bool writeMemory(Pic::MemoryRangeType type, uint wordOffset, const Device::Array &data) = 0;
+  virtual bool eraseAll() = 0;
+
+// debugging
+  virtual bool readRegister(Address address, BitValue &value, uint nbBytes) = 0;
+  virtual bool writeRegister(Address address, BitValue value, uint nbBytes) = 0;
+  virtual bool resumeRun() = 0;
+  virtual bool step() = 0;
+  virtual bool haltRun() = 0;
+  virtual BitValue getProgramCounter() = 0;
+
+protected:
+  QString _rx;
+  virtual bool internalConnect(const QString &mode) = 0;
+  virtual QString receivedData() const = 0;
+  virtual bool internalConnectHardware() { return internalConnect("U"); }
+};
+
+//-----------------------------------------------------------------------------
+class DeviceSpecific : public ::Programmer::PicDeviceSpecific
+{
+public:
+  DeviceSpecific(::Programmer::Base &base) : ::Programmer::PicDeviceSpecific(base) {}
+  virtual bool canEraseAll() const { return true; }
+  virtual bool canEraseRange(Pic::MemoryRangeType) const { return false; }
+  virtual bool canReadRange(Pic::MemoryRangeType) const { return true; }
+  virtual bool canWriteRange(Pic::MemoryRangeType) const { return true; }
+  Hardware &hardware() { return static_cast<Hardware &>(*_base.hardware()); }
+  virtual bool setPowerOff() { return false; }
+  virtual bool setPowerOn() { return false; }
+  virtual bool setTargetPowerOn(bool on) { return hardware().setTargetPowerOn(on); }
+  virtual bool doEraseRange(Pic::MemoryRangeType) { return false; }
+  virtual bool doErase(bool);
+  virtual bool doRead(Pic::MemoryRangeType type, Device::Array &data, const ::Programmer::VerifyData *vdata);
+  Device::Array prepareRange(Pic::MemoryRangeType type, const Device::Array &data, bool force, uint &wordOffset);
+  virtual bool doWrite(Pic::MemoryRangeType type, const Device::Array &data, bool force);
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/icd2/base/icd2.cpp b/src/progs/icd2/base/icd2.cpp
new file mode 100644
index 0000000..375fc60
--- /dev/null
+++ b/src/progs/icd2/base/icd2.cpp
@@ -0,0 +1,517 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2002-2003 Stephen Landamore <stephen@landamore.com>     *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "icd2.h"
+
+#include "common/global/global.h"
+#include "common/common/misc.h"
+#include "common/port/port_base.h"
+#include "icd2_data.h"
+#include "icd2_usb.h"
+
+//-----------------------------------------------------------------------------
+const uchar Icd2::TARGET_MODE_VALUES[Pic::Nb_TargetModes] = {
+  0x00, // stopped
+  0x01, // running
+  0x02  // in programming
+};
+
+const char * const Icd2::RESET_MODE_VALUES[Pic::Nb_ResetModes] = {
+  "00", // reset held
+  "01"  // reset released
+};
+
+//-----------------------------------------------------------------------------
+const Icd2::Hardware::VoltageTypeData Icd2::Hardware::VOLTAGE_TYPE_DATA[Pic::Nb_VoltageTypes] = {
+ { "37", 0.07988 }, // icd Vpp
+ { "34", 0.03908 }, // target Vdd
+ { "35", 0.07988 }, // target Vpp
+};
+
+const char * const Icd2::Hardware::WRITE_MODE_VALUES[Pic::Nb_WriteModes] = {
+  "00", // write only
+  "01"  // erase then write
+};
+
+const int Icd2::TestData::RESULT_TYPE_VALUES[::Programmer::Nb_ResultTypes+1] = {
+  0x00, // pass
+  0x01, // low
+  0x80, // high
+  -2,   // not used
+  -1
+};
+
+const char * const Icd2::TestData::VOLTAGE_LABELS[Nb_VoltageTypes] = {
+  I18N_NOOP("Target Vdd"), I18N_NOOP("Module Vpp"), I18N_NOOP("MCLR ground"),
+  I18N_NOOP("MCLR Vdd"), I18N_NOOP("MCLR Vpp")
+};
+
+Icd2::TestData::TestData()
+{
+  for (uint k=0; k<Nb_VoltageTypes; k++) _voltages[k] = -1;
+}
+
+Icd2::TestData::TestData(const QString &rx)
+{
+  for (uint k=0; k<Nb_VoltageTypes; k++)
+    _voltages[k] = fromHex(rx.mid(5 + 2*k, 2), 0);
+}
+
+bool Icd2::TestData::pass() const
+{
+  for (uint k=0; k<Nb_VoltageTypes; k++)
+    if ( _voltages[k]!=RESULT_TYPE_VALUES[::Programmer::Pass] ) return false;
+  return true;
+}
+
+QString Icd2::TestData::result(VoltageType type) const
+{
+  for (uint i=0; i<=(::Programmer::Nb_ResultTypes); i++)
+    if ( _voltages[type]==RESULT_TYPE_VALUES[i] ) return i18n(::Programmer::RESULT_TYPE_LABELS[i]);
+  return toHex(_voltages[type], 2);
+}
+
+QString Icd2::TestData::pretty(VoltageType type) const
+{
+  return i18n(VOLTAGE_LABELS[type]) + "=" + result(type);
+}
+
+//-----------------------------------------------------------------------------
+const char *Icd2::Hardware::readCommand(Pic::MemoryRangeType type) const
+{
+  switch (type.type()) {
+    case Pic::MemoryRangeType::Code:             return "47";
+    case Pic::MemoryRangeType::Eeprom:           return "48";
+    case Pic::MemoryRangeType::Config:
+      if ( device().architecture()==Pic::Architecture::P18J ) return "47";
+      return "49";
+    case Pic::MemoryRangeType::UserId:           return "4A";
+    case Pic::MemoryRangeType::DeviceId:
+      if ( device().architecture()==Pic::Architecture::P30F ) return "49";
+      return "4A";
+    case Pic::MemoryRangeType::Cal:
+    case Pic::MemoryRangeType::CalBackup:
+      if ( device().architecture()==Pic::Architecture::P16X ) return "49"; // ?
+      return "47"; // for baseline only ?
+    case Pic::MemoryRangeType::DebugVector:      return "40";
+    case Pic::MemoryRangeType::ProgramExecutive:
+    case Pic::MemoryRangeType::HardwareStack:
+    case Pic::MemoryRangeType::Nb_Types:    break;
+  }
+  Q_ASSERT(false);
+  return 0;
+}
+
+const char *Icd2::Hardware::writeCommand(Pic::MemoryRangeType type) const
+{
+  switch (type.type()) {
+    case Pic::MemoryRangeType::Code:             return "43";
+    case Pic::MemoryRangeType::Eeprom:           return "44";
+    case Pic::MemoryRangeType::Config:
+      if ( device().architecture()==Pic::Architecture::P18J ) return "43";
+      return "45";
+    case Pic::MemoryRangeType::UserId:           return "46";
+    case Pic::MemoryRangeType::DeviceId:         break;
+    case Pic::MemoryRangeType::Cal:
+    case Pic::MemoryRangeType::CalBackup:
+      if ( device().architecture()==Pic::Architecture::P16X ) return "45"; // ?
+      return "43"; // for baseline only ?
+    case Pic::MemoryRangeType::DebugVector:      return "41";
+    case Pic::MemoryRangeType::ProgramExecutive:
+    case Pic::MemoryRangeType::HardwareStack:
+    case Pic::MemoryRangeType::Nb_Types:    break;
+  }
+  Q_ASSERT(false);
+  return 0;
+}
+
+bool Icd2::Hardware::uploadFirmware(const Pic::Memory &memory)
+{
+  if ( !internalConnect("V") ) return false;
+  log(Log::LineType::Information, "  Uploading firmware to ICD2...");
+  uint start = 0x0004, size = 0x1BFB;
+  QString cmd = "10" + toHex(start, 4) + toHex(size, 4);
+  if ( !command(cmd, 0) ) return false;
+  uint nbBytesWord = memory.device().nbBytesWord(Pic::MemoryRangeType::Code); // should be 2 for 16F876
+  Device::Array data = memory.arrayForWriting(Pic::MemoryRangeType::Code);
+  if ( !writeBlock(nbBytesWord, data, start, size) ) return false;
+  if ( !receiveResponse(cmd, 0, false) ) return false;
+  if ( !internalConnect("U") ) return false;
+  return true;
+}
+
+bool Icd2::Hardware::setTarget()
+{
+  log(Log::DebugLevel::Normal, "  Set target");
+  // set target family
+  const Icd2::Data &d = data(device().name());
+  if ( !command(QString("2A") + toHex(d.famid, 2), 0) ) return false;
+  // set code range end
+  Address end = device().range(Pic::MemoryRangeType::Code).end;
+  if ( device().range(Pic::MemoryRangeType::Cal).start==end ) end += 1;
+  if ( !command("06" + toHex(end, 6), 0) ) return false;
+  return true;
+}
+
+bool Icd2::Hardware::setup()
+{
+  // ??
+  if ( device().architecture()==Pic::Architecture::P30F )
+    if ( !command("0900", 0) ) return false;
+
+  // ??
+  _port->send("$7F00\x0D", 6);
+  QString s;
+  if ( !_port->receive(2, s) ) return false;
+  if ( s!="02" ) {
+    log(Log::LineType::Error, i18n("Unexpected answer ($7F00) from ICD2 (%1).").arg(s));
+    return false;
+  }
+
+  // ??
+  if ( !command("08", 2) ) return false;
+  if ( _rx.mid(5, 2)!="00" ) {
+    log(Log::LineType::Error, i18n("Unexpected answer (08) from ICD2 (%1).").arg(_rx));
+    return false;
+  }
+
+  return !hasError();
+}
+
+bool Icd2::Hardware::sendCommand(const QString &s)
+{
+  //format: <LLXX....CC>
+  QString cs = s.upper();
+  QString tx = "<";
+  tx += toHex(cs.length() + 6, 2);
+  tx += cs;
+  uchar chk = tx[1].latin1() + tx[2].latin1();
+  for (uint i=0; i<uint(s.length()); i++) chk += cs[i].latin1();
+  tx += toHex(chk, 2);
+  tx += '>';
+  log(Log::DebugLevel::Extra, QString("send command: '%1'").arg(tx));
+  QByteArray a = toAscii(tx);
+  return _port->send(a.data(), a.count());
+}
+
+bool Icd2::Hardware::receiveResponse(const QString &command, uint responseSize, bool poll)
+{
+  // format: [LLXX...CC]
+  uint size = responseSize + 8;
+  if ( poll && _port->type()==PortType::USB ) {
+    if ( !static_cast<USBPort *>(_port)->poll(size, _rx) ) return false;
+  } else if ( !_port->receive(size, _rx, 180000) ) return false; // is 3 minutes enough ?? (we should really have an abort button here...)
+  log(Log::DebugLevel::Extra, QString("received answer: '%1'").arg(_rx));
+  if ( size!=fromHex(_rx.mid(1, 2), 0) ) {
+    log(Log::LineType::Error, i18n("Received length too short."));
+    return false;
+  }
+  if ( uint(_rx.length())!=size ) {
+    log(Log::LineType::Error, i18n("Received string too short."));
+    return false;
+  }
+  if ( _rx[0]!='[' || _rx[size-1]!=']' ) {
+    log(Log::LineType::Error, i18n("Malformed string received \"%1\"").arg(_rx));
+    return false;
+  }
+  if ( command.mid(0, 2)!=_rx.mid(3, 2) ) {
+    log(Log::LineType::Error, i18n("Wrong return value (\"%1\"; was expecting \"%2\")")
+             .arg(_rx.mid(3, 2)).arg(command.mid(0, 2)));
+    return false;
+  }
+  // verify the checksum
+  uchar chk = 0;
+  for (uint i=1; i<size-3; i++) chk += _rx[i].latin1();
+  if ( chk!=fromHex(_rx.mid(size-3, 2), 0) ) {
+    log(Log::LineType::Error, i18n("Bad checksum for received string"));
+    return false;
+  }
+  return true;
+}
+
+bool Icd2::Hardware::command(const QString &command, uint responseSize)
+{
+  if ( hasError() ) return false;
+  if ( !sendCommand(command) ) return false;
+  if ( !receiveResponse(command, responseSize, false) ) return false;
+  return true;
+}
+
+bool Icd2::Hardware::getFirmwareVersion(VersionData &version)
+{
+  if ( !command("01", 6) ) return false;
+  version = VersionData::fromHexString(_rx.mid(5, 6));
+  return true;
+}
+
+uint Icd2::Hardware::getFirmwareId()
+{
+  if ( !command("07", 2) ) return 0;
+  return fromHex(_rx.mid(5, 2), 0);
+}
+
+bool Icd2::Hardware::getDebugExecVersion(VersionData &version)
+{
+  if ( !command("04", 6) ) return false;
+  version = VersionData::fromHexString(_rx.mid(5, 6));
+  return true;
+}
+
+bool Icd2::Hardware::setTargetPowerOn(bool on)
+{
+  return command(QString("05") + (on ? "FF" : "00"), 0);
+}
+
+bool Icd2::Hardware::readVoltage(Pic::VoltageType type, double &value)
+{
+  if ( !command(VOLTAGE_TYPE_DATA[type].command, 2) ) return false;
+  value = VOLTAGE_TYPE_DATA[type].factor * fromHex(_rx.mid(5, 2), 0);
+  return true;
+}
+
+bool Icd2::Hardware::readVoltages(VoltagesData &voltages)
+{
+  for (uint i=0; i<Pic::Nb_VoltageTypes; i++) {
+    if ( !readVoltage(Pic::VoltageType(i), voltages[i].value) ) return false;
+    voltages[i].error = false;
+  }
+  return true;
+}
+
+bool Icd2::Hardware::getTargetMode(Pic::TargetMode &tmode)
+{
+  if ( !command("2C", 2) ) return false;
+  uchar mode = fromHex(_rx.mid(5, 2), 0);
+  for (uint i=0; i<Pic::Nb_TargetModes; i++) {
+    if ( mode!=TARGET_MODE_VALUES[i] ) continue;
+    tmode = Pic::TargetMode(i);
+    return true;
+  }
+  Q_ASSERT(false);
+  return false;
+}
+
+bool Icd2::Hardware::setTargetReset(Pic::ResetMode mode)
+{
+  return command(QString("33") + RESET_MODE_VALUES[mode], 0);
+}
+
+bool Icd2::Hardware::selfTest(TestData &test)
+{
+  if ( !command("02", 10) ) return false;
+  test = TestData(_rx);
+  return true;
+}
+
+bool Icd2::Hardware::readBlock(uint nbBytesWord, uint nbWords, Device::Array &data)
+{
+  //qDebug("readBlock %i %s", nbBytesWord, toHex(nbWords, 8).data());
+  // receive data
+  uint length = 2*nbBytesWord*nbWords+4;
+  QString s;
+  uint i = 0;
+  while ( i<length ) {
+    uint maxSize = (_port->type()==PortType::Serial ? 2*nbBytesWord : 0x100);
+    uint size = QMIN(maxSize, length-i);
+    QString tmp;
+    if ( _port->type()==PortType::USB ) {
+      if ( !static_cast<USBPort *>(_port)->dataReceive(size, tmp) ) return false;
+    } else if ( !_port->receive(size, tmp) ) return false;
+    s += tmp;
+    i += size;
+  }
+
+  // treat data
+  if ( s[0]!='{' || s[s.length()-1]!='}' ) {
+    log(Log::LineType::Error, i18n("Invalid begin or end character for read block."));
+    return false;
+  }
+  log(Log::DebugLevel::Max, "received: " + s);
+  data.resize(nbWords);
+  Q_UINT8 chk = 0;
+  for (uint i=0; i<nbWords; i++) {
+    QString ts = s.mid(1+2*nbBytesWord*i, 2*nbBytesWord);
+    //if ( i<10 ) qDebug("%i: %s", i, ts.data());
+    data[i] = 0;
+    for (int k=nbBytesWord-1; k>=0; k--) {
+      data[i] = data[i] << 8;
+      data[i] |= fromHex(ts.mid(2*k, 2), 0);
+      chk += ts[2*k].latin1() + ts[2*k+1].latin1();
+    }
+  }
+
+  QString cs = s.mid(s.length()-3, 2);
+  if ( chk!=fromHex(cs, 0) ) {
+    log(Log::LineType::Error, i18n("Bad checksum for read block: %1 (%2 expected).").arg(cs).arg(toHex(chk, 2)));
+    return false;
+  }
+  return true;
+}
+
+bool Icd2::Hardware::readMemory(Pic::MemoryRangeType type, uint wordOffset,
+                                Device::Array &data, const ::Programmer::VerifyData *vdata)
+{
+  const char *r = readCommand(type);
+  if ( r==0 ) return false;
+  uint nbBytesWord = device().nbBytesWord(type);
+  uint div = 2;
+  if ( type==Pic::MemoryRangeType::Eeprom || nbBytesWord>=2 ) div = 1;
+  uint inc = device().addressIncrement(type);
+  Address start = device().range(type).start; // address
+  uint todo = inc * data.count(); // address
+  uint offset = inc * wordOffset; // address
+  //qDebug("read size=%s div=%i nbBytes=%i", toHex(size, 8).data(), div, nbBytesWord);
+  data.resize(0);
+  do {
+    uint size = QMIN(todo, uint(0x1000)); // addresses
+    uint nb = size / inc; // word
+    //qDebug("read %s start=%s size=%s", Pic::MEMORY_RANGE_TYPE_DATA[type].label, toHex(start+offset, 8).data(), toHex(nb, 8).data());
+    QString cmd = r + toHex(start+offset, 8) + toHex(nb/div, 8);
+    if ( !command(cmd, 0) ) return false;
+    Device::Array pdata;
+    if ( !readBlock(nbBytesWord, nb, pdata) ) return false;
+    if ( !receiveResponse(cmd, 0, false) ) return false;
+    if (vdata) {
+      for (uint i=0; i<pdata.count(); i++)
+        if ( !verifyWord(wordOffset+data.count()+i, pdata[i], type, *vdata) ) return false;
+    }
+    data += pdata;
+    offset += size;
+    todo -= size;
+    if ( type==Pic::MemoryRangeType::Code || type==Pic::MemoryRangeType::Eeprom )
+      _base.progressMonitor().addTaskProgress(nb);
+  } while ( todo!=0 );
+  return true;
+}
+
+bool Icd2::Hardware::writeBlock(uint nbBytesWord, const Device::Array &data, uint wordIndex, uint nbWords)
+{
+  log(Log::DebugLevel::Extra, QString("writeBlock offset:%1 nbWords:%2 (size: %3)").arg(toHex(wordIndex, 8)).arg(toHex(nbWords, 8)).arg(toHex(data.size(), 8)));
+  Q_ASSERT( wordIndex+nbWords<=data.size() );
+  // prepare data
+  QString s = "{";
+  uchar chk = 0;
+  for (uint i=0; i<nbWords; i++) {
+    QString ts = toHex(data[wordIndex+i], 2*nbBytesWord);
+    for (int k=nbBytesWord-1; k>=0; k--) {
+      //if ( i<10 || i>=nbWords-10 ) qDebug("send: %i-%i %s", i, k, ts.mid(2*k, 2).data());
+      s += ts.mid(2*k, 2);
+      chk += ts[2*k].latin1() + ts[2*k+1].latin1();
+    }
+  }
+  s += toHex(chk, 2);
+  s += "}";
+  log(Log::DebugLevel::Max, "send: " + s);
+
+  // send data
+  uint i = 0;
+  while ( i<uint(s.length()) ) {
+    uint maxSize = (_port->description().type==PortType::Serial ? 2*nbBytesWord : 0x100);
+    if ( _port->description().type==PortType::Serial && i==0 ) maxSize = 1;
+    uint size = QMIN(maxSize, s.length()-i);
+    QByteArray a = toAscii(s);
+    if ( _port->type()==PortType::USB ) {
+      if ( !static_cast<USBPort *>(_port)->dataSend(a.data()+i, size) ) return false;
+    } else if ( !_port->send(a.data()+i, size) ) return false;
+    i += size;
+  }
+
+  //qDebug("done sending %i words (chk=%s)", nbWords, toHex(chk, 2).data());
+  return true;
+}
+
+bool Icd2::Hardware::writeMemory(Pic::MemoryRangeType type, uint wordOffset, const Device::Array &data)
+{
+  //qDebug("write memory: offset:%s nbWords:%s (size: %s)", toHex(wordOffset, 4).data(), toHex(nbWords, 4).data(), toHex(data.size(), 4).data());
+  const char *w = writeCommand(type);
+  if ( w==0 ) return true;
+  uint nbBytesWord = device().nbBytesWord(type);
+  uint div = 2;
+  if ( type==Pic::MemoryRangeType::Eeprom || nbBytesWord>=2 ) div = 1;
+  uint inc = device().addressIncrement(type);
+  Address start = device().range(type).start; // address
+  uint todo = inc * data.count(); // address
+  uint offset = inc * wordOffset; // address
+  uint index = 0;
+  //qDebug("write todo=%s div=%i nbBytes=%i dataSize=%i", toHex(todo, 8).data(), div, nbBytesWord, data.size());
+  do {
+    uint size = QMIN(todo, uint(0x1000)); // address
+    uint nb = size / inc; // word
+    //qDebug("write %s start=%s nbWords=%s", Pic::MEMORY_RANGE_TYPE_DATA[type].label, toHex(start+offset, 8).data(), toHex(nb, 8).data());
+    QString cmd = w + toHex(start+offset+index, 8) + toHex(nb/div, 8);
+    if ( !command(cmd, 0) ) return false;
+    if ( !writeBlock(nbBytesWord, data, index/inc, nb) ) return false;
+    if ( !receiveResponse(cmd, 0, false) ) return false;
+    index += size;
+    todo -= size;
+    if ( type==Pic::MemoryRangeType::Code || type==Pic::MemoryRangeType::Eeprom )
+      _base.progressMonitor().addTaskProgress(nb);
+  } while ( todo!=0 );
+  return true;
+}
+
+bool Icd2::Hardware::eraseAll()
+{
+  setTargetReset(Pic::ResetHeld);
+  if ( hasError() ) return false;
+  if ( !sendCommand("29") ) return false;
+  if ( !receiveResponse("29", 0, true) ) return false; // poll
+  return true;
+}
+
+bool Icd2::Hardware::haltRun()
+{
+  return command("2E", 0);
+}
+
+bool Icd2::Hardware::step()
+{
+  return command("2F", 0);
+}
+
+bool Icd2::Hardware::resumeRun()
+{
+  return command("30", 0);
+}
+
+bool Icd2::Hardware::setWriteMode(Pic::WriteMode mode)
+{
+  return command(QString("4B") + WRITE_MODE_VALUES[mode], 0);
+}
+
+bool Icd2::Hardware::writeRegister(Address address, BitValue value, uint nbBytes)
+{
+  QString cmd = "1B" + toHex(address, 8) + toHex(nbBytes, 8);
+  if ( !command(cmd, 0) ) return false;
+  Device::Array data(nbBytes);
+  for (uint i=0; i<nbBytes; i++) data[nbBytes-i-1] = value.byte(i);
+  if ( !writeBlock(1, data, 0, nbBytes) ) return false;
+  return receiveResponse(cmd, 0, false);
+}
+
+bool Icd2::Hardware::readRegister(Address address, BitValue &value, uint nbBytes)
+{
+  QString cmd = "1E" + toHex(address, 8) + toHex(nbBytes, 8);
+  if ( !command(cmd, 0) ) return false;
+  Device::Array data;
+  if ( !readBlock(1, nbBytes, data) ) return false;
+  if ( !receiveResponse(cmd, 0, false) ) return false;
+  value = 0;
+  for (uint i=0; i<nbBytes; i++) {
+    value <<= 8;
+    value += data[i];
+  }
+  return true;
+}
+
+BitValue Icd2::Hardware::getProgramCounter()
+{
+  if ( !command("3D", 8) ) return 0;
+  return fromHex(_rx.mid(5, 8), 0);
+}
diff --git a/src/progs/icd2/base/icd2.h b/src/progs/icd2/base/icd2.h
new file mode 100644
index 0000000..1c9c1b9
--- /dev/null
+++ b/src/progs/icd2/base/icd2.h
@@ -0,0 +1,95 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2002-2003 Stephen Landamore <stephen@landamore.com>     *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef ICD2_H
+#define ICD2_H
+
+#include "icd.h"
+
+namespace Icd2
+{
+//-----------------------------------------------------------------------------
+  extern const uchar TARGET_MODE_VALUES[Pic::Nb_TargetModes];
+  extern const char * const RESET_MODE_VALUES[Pic::Nb_ResetModes];
+
+  class TestData {
+  public:
+    TestData();
+    TestData(const QString &rx);
+    enum VoltageType { TargetVdd = 0, ModuleVpp, MclrGround, MclrVdd, MclrVpp,
+                       Nb_VoltageTypes };
+    bool pass() const;
+    QString result(VoltageType type) const;
+    QString pretty(VoltageType type) const;
+    static const char * const VOLTAGE_LABELS[Nb_VoltageTypes];
+
+  private:
+    int _voltages[Nb_VoltageTypes];
+    static const int RESULT_TYPE_VALUES[::Programmer::Nb_ResultTypes+1];
+  };
+
+//-----------------------------------------------------------------------------
+class Hardware : public Icd::Hardware
+{
+public:
+  Hardware(::Programmer::Base &base, Port::Base *port) : Icd::Hardware(base, port) {}
+  bool command(const QString &command, uint responseSize);
+
+// initialization
+  virtual bool uploadFirmware(const Pic::Memory &memory);
+  virtual bool setTarget();
+  bool setup();
+
+// status
+  virtual bool getFirmwareVersion(VersionData &version);
+  uint getFirmwareId();
+  bool getDebugExecVersion(VersionData &version);
+  virtual bool setTargetPowerOn(bool on);
+  virtual bool readVoltage(Pic::VoltageType type, double &value);
+  virtual bool readVoltages(VoltagesData &voltages);
+  virtual bool getTargetMode(Pic::TargetMode &mode);
+  virtual bool setTargetReset(Pic::ResetMode mode);
+  bool selfTest(TestData &test);
+
+// programming
+  virtual bool readMemory(Pic::MemoryRangeType type, uint wordOffset, Device::Array &data, const ::Programmer::VerifyData *vdata);
+  virtual bool writeMemory(Pic::MemoryRangeType type, uint wordOffset, const Device::Array &data);
+  virtual bool eraseAll();
+  bool setWriteMode(Pic::WriteMode mode);
+
+// debugging
+  virtual bool readRegister(Address address, BitValue &value, uint nbBytes);
+  virtual bool writeRegister(Address address, BitValue value, uint nbBytes);
+  virtual bool resumeRun();
+  virtual bool step();
+  virtual bool haltRun();
+  virtual BitValue getProgramCounter();
+
+protected:
+  virtual QString receivedData() const { return _rx.mid(5, _rx.length()-8); }
+
+private:
+  struct VoltageTypeData {
+    const char *command;
+    double factor;
+  };
+  static const VoltageTypeData VOLTAGE_TYPE_DATA[Pic::Nb_VoltageTypes];
+  static const char * const WRITE_MODE_VALUES[Pic::Nb_WriteModes];
+
+  bool sendCommand(const QString &command);
+  bool receiveResponse(const QString &command, uint responseSize, bool poll);
+  bool readBlock(uint nbBytesWord, uint nbWords, Device::Array &data);
+  bool writeBlock(uint nbBytesWord, const Device::Array &data, uint wordOffset, uint nbWords);
+  const char *readCommand(Pic::MemoryRangeType type) const;
+  const char *writeCommand(Pic::MemoryRangeType type) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/icd2/base/icd2.xml b/src/progs/icd2/base/icd2.xml
new file mode 100644
index 0000000..3c714b2
--- /dev/null
+++ b/src/progs/icd2/base/icd2.xml
@@ -0,0 +1,214 @@
+<!-- ************************************************************************* -->
+<!-- * Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             * -->
+<!-- *                                                                       * -->
+<!-- * it under the terms of the GNU General Public License as published by  * -->
+<!-- * This program is free software; you can redistribute it and/or modify  * -->
+<!-- * the Free Software Foundation; either version 2 of the License, or     * -->
+<!-- * (at your option) any later version.                                   * -->
+<!-- *************************************************************************/-->
+<!DOCTYPE piklab>
+
+<type name="icd2">
+  <device name="10F200" famid="0x12" family="10F2XX" support_type="tested" />
+  <device name="10F202" famid="0x12" family="10F2XX" support_type="tested" />
+  <device name="10F204" famid="0x12" family="10F2XX" support_type="tested" />
+  <device name="10F206" famid="0x12" family="10F2XX" support_type="tested" />
+  <device name="10F220" famid="0x12" family="10F2XX" />
+  <device name="10F222" famid="0x12" family="10F2XX" />
+
+  <device name="12F508" famid="0x11" family="16F5X"  support_type="tested" />
+  <device name="12F509" famid="0x11" family="16F5X"  support_type="tested" />
+  <device name="12F510" famid="0x11" family="16F5X"  support_type="tested" />
+  <device name="12F629" famid="0x05" family="12F629" support_type="tested" />
+  <device name="12F635" famid="0x0C" family="12F635" support_type="tested" />
+  <device name="12F675" famid="0x05" family="12F629" support_type="tested" />
+  <device name="12F683" famid="0x0C" family="12F635" support_type="tested" />
+
+  <device name="16F505" famid="0x10" family="16F5X"  />
+  <device name="16F506" famid="0x12" family="16F5X"  />
+  <device name="16F54"  famid="0x0E" family="16F5X"  support_type="tested" />
+  <device name="16F57"  famid="0x0F" family="16F5X"  support_type="tested" />
+  <device name="16F59"  famid="0x0F" family="16F5X"  support_type="tested" />
+  <device name="16F616" famid="0x1A" family="16F61X" />
+  <device name="16F627" famid="0x19" family="16F72"  />
+  <device name="16F628" famid="0x19" family="16F72"  />
+  <device name="16F627A" famid="0x09" family="16F648A" support_type="tested" />
+  <device name="16F628A" famid="0x09" family="16F648A" support_type="tested" />
+  <device name="16F630" famid="0x05" family="16F676" />
+  <device name="16F631" famid="0x0C" family="12F635" />
+  <device name="16F636" famid="0x0C" family="12F635" />
+  <device name="16F639" famid="0x0C" family="12F635" />
+  <device name="16F648A" famid="0x09" family="16F648A" support_type="tested" />
+  <device name="16F676" famid="0x05" family="16F676" />
+  <device name="16F677" famid="0x0C" family="16F677" />
+  <device name="16F684" famid="0x0C" family="16F684" support_type="tested" />
+  <device name="16F685" famid="0x0C" family="16F688" support_type="tested" />
+  <device name="16F687" famid="0x0C" family="16F688" support_type="tested" />
+  <device name="16F688" famid="0x0C" family="16F688" support_type="tested" />
+  <device name="16F689" famid="0x0C" family="16F688" support_type="tested" />
+  <device name="16F690" famid="0x0C" family="16F688" support_type="tested" />
+  <device name="16F716" famid="0x0B" family="16F716" />
+  <device name="16F72"  famid="0x21" family="16F72"  />
+  <device name="16F73"  famid="0x0A" family="16F7X"  />
+  <device name="16F74"  famid="0x0A" family="16F7X"  />
+  <device name="16F76"  famid="0x0A" family="16F7X"  />
+  <device name="16F77"  famid="0x0A" family="16F7X"  />
+  <device name="16F737" famid="0x0A" family="16F7X7" support_type="tested" />
+  <device name="16F747" famid="0x0A" family="16F7X7" support_type="tested" />
+  <device name="16F767" famid="0x0A" family="16F7X7" support_type="tested" />
+  <device name="16F777" famid="0x0A" family="16F7X7" support_type="tested" />
+  <device name="16F785" famid="0x15" family="16F785" />
+  <device name="16F818" famid="0x06" family="16F819" support_type="tested" />
+  <device name="16F819" famid="0x06" family="16F819" support_type="tested" />
+  <device name="16F84A" famid="0x20" family="16F72"  />
+  <device name="16F87"  famid="0x08" family="16F88"  support_type="tested" />
+  <device name="16F870" famid="0x03" family="16F872" />
+  <device name="16F871" famid="0x03" family="16F872" support_type="tested" debug_support_type="tested" />
+  <device name="16F872" famid="0x03" family="16F872" support_type="tested" />
+  <device name="16F873" famid="0x03" family="16F874" support_type="tested" />
+  <device name="16F873A" famid="0x04" family="16F874" />
+  <device name="16F874" famid="0x03" family="16F874" support_type="tested" />
+  <device name="16F874A" famid="0x04" family="16F874" />
+  <device name="16F876" famid="0x03" family="16F877" support_type="tested" />
+  <device name="16F876A" famid="0x04" family="16F877" />
+  <device name="16F877" famid="0x03" family="16F877" support_type="tested"  debug_support_type="tested" />
+  <device name="16F877A" famid="0x04" family="16F877" />
+  <device name="16F88"  famid="0x08" family="16F88"  support_type="tested" />
+  <device name="16F913" famid="0x14" family="16F916" />
+  <device name="16F914" famid="0x14" family="16F916" />
+  <device name="16F916" famid="0x14" family="16F916" />
+  <device name="16F917" famid="0x14" family="16F916" />
+  <device name="16F946" famid="0x14" family="16F916" />
+
+  <device name="18C601" famid="0x81" family="18CX01" />
+  <device name="18C801" famid="0x81" family="18CX01" />
+
+  <device name="18F242"  famid="0x82" family="18F_4"  support_type="tested" />
+  <device name="18F248"  famid="0x82" family="18F_4"  support_type="tested" />
+  <device name="18F252"  famid="0x82" family="18F_4"  support_type="tested" />
+  <device name="18F258"  famid="0x82" family="18F_4"  support_type="tested" />
+  <device name="18F442"  famid="0x82" family="18F_4"  support_type="tested" />
+  <device name="18F448"  famid="0x82" family="18F_4"  support_type="tested" />
+  <device name="18F452"  famid="0x82" family="18F_4"  support_type="tested" debug_support_type="tested" />
+  <device name="18F458"  famid="0x82" family="18F_4"  support_type="tested" debug_support_type="tested" />
+
+  <device name="18F1220" famid="0x83" family="18F_4" support_type="tested" />
+  <device name="18F1230" famid="0x8F" family="18F_5" />
+  <device name="18F1320" famid="0x83" family="18F_4" support_type="tested" />
+  <device name="18F1330" famid="0x8F" family="18F_5" />
+  <device name="18F2220" famid="0x83" family="18F_4" support_type="tested" />
+  <device name="18F2221" famid="0x8C" family="18F_5" />
+  <device name="18F2320" famid="0x83" family="18F_4" support_type="tested" />
+  <device name="18F2321" famid="0x8C" family="18F_5" />
+  <device name="18F2331" famid="0x87" family="18F_4" />
+  <device name="18F2410" famid="0x8C" family="18F_5" />
+  <device name="18F2420" famid="0x8C" family="18F_5" />
+  <device name="18F2423" famid="0x8B" family="18F_5" />
+  <device name="18F2431" famid="0x87" family="18F_4" />
+  <device name="18F2439" famid="0x85" family="18F_4" />
+  <device name="18F2450" famid="0x8C" family="18F_5" />
+  <device name="18F2455" famid="0x8B" family="18F_5" />
+  <device name="18F2480" famid="0x8C" family="18F_5" support_type="tested" />
+  <device name="18F2510" famid="0x88" family="18F_5" support_type="tested" />
+  <device name="18F2515" famid="0x88" family="18F_5" />
+  <device name="18F2520" famid="0x8C" family="18F_5" />
+  <device name="18F2523" famid="0x8B" family="18F_5" />
+  <device name="18F2525" famid="0x88" family="18F_5" />
+  <device name="18F2539" famid="0x85" family="18F_4" />
+  <device name="18F2550" famid="0x8B" family="18F_5" />
+  <device name="18F2580" famid="0x8C" family="18F_5" support_type="tested" />
+  <device name="18F2585" famid="0x88" family="18F_5" />
+  <device name="18F2610" famid="0x88" family="18F_5" />
+  <device name="18F2620" famid="0x88" family="18F_5" />
+  <device name="18F2680" famid="0x88" family="18F_5" />
+  <device name="18F2682" famid="0x90" family="18F_5" />
+  <device name="18F2685" famid="0x90" family="18F_5" />
+
+  <device name="18F4220" famid="0x83" family="18F_4" support_type="tested" />
+  <device name="18F4221" famid="0x8C" family="18F_5" />
+  <device name="18F4320" famid="0x83" family="18F_4" support_type="tested" />
+  <device name="18F4321" famid="0x8C" family="18F_5" />
+  <device name="18F4331" famid="0x87" family="18F_4" />
+  <device name="18F4410" famid="0x8C" family="18F_5" />
+  <device name="18F4420" famid="0x8C" family="18F_5" />
+  <device name="18F4423" famid="0x8B" family="18F_5" />
+  <device name="18F4431" famid="0x87" family="18F_4" />
+  <device name="18F4439" famid="0x85" family="18F_4" />
+  <device name="18F4450" famid="0x8C" family="18F_5" />
+  <device name="18F4455" famid="0x8B" family="18F_5" />
+  <device name="18F4480" famid="0x8C" family="18F_5" support_type="tested" />
+  <device name="18F4510" famid="0x88" family="18F_5" support_type="tested" />
+  <device name="18F4515" famid="0x88" family="18F_5" />
+  <device name="18F4520" famid="0x8C" family="18F_5" />
+  <device name="18F4523" famid="0x8B" family="18F_5" />
+  <device name="18F4525" famid="0x88" family="18F_5" />
+  <device name="18F4539" famid="0x85" family="18F_4" />
+  <device name="18F4550" famid="0x8B" family="18F_5" />
+  <device name="18F4580" famid="0x8C" family="18F_5" support_type="tested" />
+  <device name="18F4585" famid="0x88" family="18F_5" />
+  <device name="18F4610" famid="0x88" family="18F_5" />
+  <device name="18F4620" famid="0x88" family="18F_5" />
+  <device name="18F4680" famid="0x88" family="18F_5" />
+  <device name="18F4682" famid="0x90" family="18F_5" />
+  <device name="18F4685" famid="0x90" family="18F_5" />
+
+  <device name="18F6310" famid="0x8A" family="18F_4" />
+  <device name="18F6390" famid="0x8A" family="18F_4" />
+  <device name="18F6410" famid="0x8A" family="18F_5" />
+  <device name="18F6490" famid="0x8A" family="18F_5" />
+  <device name="18F6520" famid="0x84" family="18F_4" />
+  <device name="18F6525" famid="0x86" family="18F_4" />
+  <device name="18F6527" famid="0x8D" family="18F_5" />
+  <device name="18F6585" famid="0x86" family="18F_4" />
+  <device name="18F6620" famid="0x84" family="18F_4" />
+  <device name="18F6621" famid="0x86" family="18F_4" />
+  <device name="18F6622" famid="0x8D" family="18F_5" />
+  <device name="18F6627" famid="0x8D" family="18F_5" />
+  <device name="18F6680" famid="0x86" family="18F_4" />
+  <device name="18F6720" famid="0x84" family="18F_4" />
+  <device name="18F6722" famid="0x8D" family="18F_5" />
+
+  <device name="18F8310" famid="0x8A" family="18F_4" />
+  <device name="18F8390" famid="0x8A" family="18F_4" />
+  <device name="18F8410" famid="0x8A" family="18F_5" />
+  <device name="18F8490" famid="0x8A" family="18F_5" />
+  <device name="18F8520" famid="0x84" family="18F_4" />
+  <device name="18F8525" famid="0x86" family="18F_4" />
+  <device name="18F8527" famid="0x8D" family="18F_5" />
+  <device name="18F8585" famid="0x86" family="18F_4" />
+  <device name="18F8620" famid="0x84" family="18F_4" />
+  <device name="18F8621" famid="0x86" family="18F_4" />
+  <device name="18F8622" famid="0x8D" family="18F_5" />
+  <device name="18F8627" famid="0x8D" family="18F_5" />
+  <device name="18F8680" famid="0x86" family="18F_4" />
+  <device name="18F8720" famid="0x84" family="18F_4" />
+  <device name="18F8722" famid="0x8D" family="18F_5" />
+
+  <device name="18F24J10" famid="0x40" family="18F_J" />
+  <device name="18F66J60" famid="0x40" family="18F_J" support_type="tested" />
+
+  <device name="30F2010" famid="0xBB" family="30F" />
+  <device name="30F2011" famid="0xBB" family="30F" />
+  <device name="30F2012" famid="0xBB" family="30F" />
+  <device name="30F3010" famid="0xBB" family="30F" />
+  <device name="30F3011" famid="0xBB" family="30F" />
+  <device name="30F3012" famid="0xBB" family="30F" />
+  <device name="30F3013" famid="0xBB" family="30F" />
+  <device name="30F3014" famid="0xBB" family="30F" />
+  <device name="30F4011" famid="0xBB" family="30F" />
+  <device name="30F4012" famid="0xBB" family="30F" />
+  <device name="30F4013" famid="0xBB" family="30F" />
+  <device name="30F5011" famid="0xBB" family="30F" />
+  <device name="30F5013" famid="0xBB" family="30F" />
+  <device name="30F6010" famid="0xBB" family="30F" />
+  <device name="30F6011" famid="0xBB" family="30F" />
+  <device name="30F6012" famid="0xBB" family="30F" />
+  <device name="30F6013" famid="0xBB" family="30F" />
+  <device name="30F6014" famid="0xBB" family="30F" />
+  <device name="30F6015" famid="0xBB" family="30F" />
+  <device name="30F6010A" famid="0xBB" family="30F" />
+  <device name="30F6011A" famid="0xBB" family="30F" />
+  <device name="30F6012A" famid="0xBB" family="30F" />
+  <device name="30F6013A" famid="0xBB" family="30F" />
+  <device name="30F6014A" famid="0xBB" family="30F" />
+</type>
\ No newline at end of file
diff --git a/src/progs/icd2/base/icd2_data.h b/src/progs/icd2/base/icd2_data.h
new file mode 100644
index 0000000..ceda394
--- /dev/null
+++ b/src/progs/icd2/base/icd2_data.h
@@ -0,0 +1,42 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef ICD2_DATA_H
+#define ICD2_DATA_H
+
+#include "common/common/group.h"
+
+namespace Icd2
+{
+  struct Version {
+    uchar major, minor, dot;
+  };
+  enum { Nb_Firmwares = 15 };
+  struct FirmwareVersionData {
+    uchar mplabMajor, mplabMinor;
+    Version version[Nb_Firmwares];
+  };
+  extern const FirmwareVersionData MIN_VERSION_DATA;
+  extern const FirmwareVersionData MAX_VERSION_DATA;
+  struct FamilyData {
+    const char *name;
+    uchar efid;
+    const char *debugExec;
+    uint debugExecOffset;  // in the hex file
+    uint wreg, fsr, status;
+  };
+  extern const FamilyData FAMILY_DATA[];
+  struct Data {
+    uint famid;
+    ::Group::Support debugSupport;
+  };
+  extern const Data &data(const QString &device);
+  extern uint family(const QString &device);
+} // namespace
+
+#endif
diff --git a/src/progs/icd2/base/icd2_debug.cpp b/src/progs/icd2/base/icd2_debug.cpp
new file mode 100644
index 0000000..62f6404
--- /dev/null
+++ b/src/progs/icd2/base/icd2_debug.cpp
@@ -0,0 +1,348 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "icd2_debug.h"
+
+#include "common/global/pfile.h"
+#include "progs/base/prog_config.h"
+#include "devices/pic/base/pic_register.h"
+#include "devices/pic/pic/pic_group.h"
+#include "icd2_data.h"
+#include "icd2_debug_specific.h"
+
+//-----------------------------------------------------------------------------
+Icd2::DebuggerSpecific *Icd2::Debugger::specific() { return static_cast<Icd2::DebuggerSpecific *>(_specific); }
+
+bool Icd2::Debugger::waitForTargetMode(Pic::TargetMode mode)
+{
+  Pic::TargetMode rmode;
+  for (uint i=0; i<20; i++) {
+    if ( !programmer().getTargetMode(rmode) ) return false;
+    if ( rmode==mode ) return true;
+    Port::msleep(200);
+  }
+  log(Log::LineType::Error, QString("Timeout waiting for mode: %1 (target is in mode: %2).")
+                  .arg(i18n(Pic::TARGET_MODE_LABELS[mode])).arg(i18n(Pic::TARGET_MODE_LABELS[rmode])));
+  return false;
+}
+
+bool Icd2::Debugger::init(bool last)
+{
+  _initLast = last;
+  return ::Debugger::PicBase::init();
+}
+
+bool Icd2::Debugger::internalInit()
+{
+  return specific()->init(_initLast);
+}
+
+bool Icd2::Debugger::updateState()
+{
+  Pic::TargetMode mode;
+  if ( !programmer().getTargetMode(mode) ) return false;
+  switch (mode) {
+    case Pic::TargetStopped: _programmer.setState(::Programmer::Halted); break;
+    case Pic::TargetRunning: _programmer.setState(::Programmer::Running); break;
+    case Pic::TargetInProgramming: _programmer.setState(::Programmer::Stopped); break;
+    case Pic::Nb_TargetModes: Q_ASSERT(false); break;
+  }
+  return true;
+}
+
+bool Icd2::Debugger::setBreakpoints(const QValueList<Address> &addresses)
+{
+  if ( addresses.count()==0 ) return specific()->setBreakpoint(Address());
+  for (uint i=0; i<uint(addresses.count()); i++) {
+    log(Log::DebugLevel::Normal, QString("Set breakpoint at %1").arg(toHexLabel(addresses[i], device()->nbCharsAddress())));
+    if ( !specific()->setBreakpoint(addresses[i]) ) return false;
+  }
+  return true;
+}
+
+bool Icd2::Debugger::internalRun()
+{
+  return hardware()->resumeRun();
+}
+
+bool Icd2::Debugger::hardHalt()
+{
+  log(Log::LineType::Warning, i18n("Failed to halt target: try a reset."));
+  return reset();
+}
+
+bool Icd2::Debugger::softHalt(bool &success)
+{
+  if ( !hardware()->haltRun() ) return false;
+  success = waitForTargetMode(Pic::TargetStopped);
+  return true;
+}
+
+bool Icd2::Debugger::internalReset()
+{
+  return specific()->reset();
+}
+
+bool Icd2::Debugger::internalStep()
+{
+  return hardware()->step();
+}
+
+bool Icd2::Debugger::readRegister(const Register::TypeData &data, BitValue &value)
+{
+  if ( data.type()==Register::Special ) {
+    if ( data.name()=="WREG" ) return hardware()->readRegister(specific()->addressWREG(), value, 1);
+    if ( data.name()=="PC" ) { value = hardware()->getProgramCounter().maskWith(specific()->maskPC()); return !hasError(); }
+    Q_ASSERT(false);
+    return true;
+  }
+  QString name = device()->registersData().sfrNames[data.address()];
+  if ( name=="WREG" ) return hardware()->readRegister(specific()->addressWREG(), value, 1);
+  if ( name=="PCL" ) { value = hardware()->getProgramCounter().maskWith(specific()->maskPC()).byte(0); return !hasError(); }
+  if ( name=="PCLATH" ) { value = hardware()->getProgramCounter().maskWith(specific()->maskPC()).byte(1); return !hasError(); }
+  return hardware()->readRegister(specific()->addressRegister(data.address()), value, 1);
+}
+
+bool Icd2::Debugger::writeRegister(const Register::TypeData &data, BitValue value)
+{
+  if ( data.type()==Register::Special ) {
+    if ( data.name()=="WREG" ) return hardware()->writeRegister(specific()->addressWREG(), value, 1);
+    Q_ASSERT(false);
+    return true;
+  }
+  QString name = device()->registersData().sfrNames[data.address()];
+  if ( name=="WREG" ) return hardware()->writeRegister(specific()->addressWREG(), value, 1);
+  return hardware()->writeRegister(specific()->addressRegister(data.address()), value, 1);
+}
+
+//-----------------------------------------------------------------------------
+Icd2::DebugProgrammer::DebugProgrammer(const ::Programmer::Group &group, const Pic::Data *data)
+  : Icd2::ProgrammerBase(group, data, "icd2_programmer")
+{}
+
+void Icd2::DebugProgrammer::clear()
+{
+  Icd2::ProgrammerBase::clear();
+  _debugExecutiveVersion.clear();
+}
+
+bool Icd2::DebugProgrammer::internalSetupHardware()
+{
+  if ( _specific==0 ) return true;
+  const FamilyData &fdata = FAMILY_DATA[family(device()->name())];
+
+  // find debug executive file
+  PURL::Directory dir(::Programmer::GroupConfig::firmwareDirectory(group()));
+  if ( !dir.exists() ) {
+    log(Log::LineType::Error, i18n("Firmware directory not configured."));
+    return false;
+  }
+  uint reservedBank = 0;
+  QString filename;
+  if ( device()->is18Family() ) {
+    Debugger *debug = static_cast<Debugger *>(debugger());
+    reservedBank = static_cast<const P18FDebuggerSpecific *>(debug->specific())->reservedBank();
+    filename = QString("de18F_BANK%1.hex").arg(QString(toString(NumberBase::Dec, reservedBank, 2)));
+  } else filename = QString("de%1.hex").arg(fdata.debugExec);
+  PURL::Url url = dir.findMatchingFilename(filename);
+  log(Log::DebugLevel::Normal, QString("  Debug executive file: %1").arg(url.pretty()));
+  if ( !url.exists() ) {
+    log(Log::LineType::Error, i18n("Could not find debug executive file \"%1\".").arg(url.pretty()));
+    return false;
+  }
+  // upload hex file
+  Log::StringView sview;
+  PURL::File file(url, sview);
+  if ( !file.openForRead() ) {
+    log(Log::LineType::Error, i18n("Could not open firmware file \"%1\".").arg(url.pretty()));
+    return false;
+  }
+  QStringList errors;
+  HexBuffer hbuffer;
+  if ( !hbuffer.load(file.stream(), errors) ) {
+    log(Log::LineType::Error, i18n("Could not read debug executive file \"%1\": %2.").arg(url.pretty()).arg(errors[0]));
+    return false;
+  }
+  uint nbWords = device()->nbWords(Pic::MemoryRangeType::Code);
+  uint offset = nbWords - 0x100;
+  if ( fdata.debugExecOffset!=0 && fdata.debugExecOffset!=offset )
+    for (uint i=0; i<0x100; i++) hbuffer.insert(offset+i, hbuffer[fdata.debugExecOffset+i]);
+  Pic::Memory::WarningTypes warningTypes;
+  QStringList warnings;
+  QMap<uint, bool> inRange;
+  Pic::Memory memory(*device());
+  memory.fromHexBuffer(Pic::MemoryRangeType::Code, hbuffer, warningTypes, warnings, inRange);
+  _deArray = memory.arrayForWriting(Pic::MemoryRangeType::Code);
+  if ( device()->is18Family() ) {
+    // that's a bit ugly but it cannot be guessed for 18F2455 family...
+    uint size;
+    switch (reservedBank) {
+      case 0:  size = 0x0E0; break;
+      case 12:
+      case 14: size = 0x140; break;
+      default: size = 0x120; break;
+    }
+    _deStart = nbWords - size;
+    _deEnd = nbWords - 1;
+    for (uint i=0; i<size; i++) {
+      BitValue v = memory.word(Pic::MemoryRangeType::Code, i);
+      memory.setWord(Pic::MemoryRangeType::Code, i, BitValue());
+      memory.setWord(Pic::MemoryRangeType::Code, _deStart+i, v);
+    }
+    _deArray = memory.arrayForWriting(Pic::MemoryRangeType::Code);
+  } else {
+    _deStart = specific()->findNonMaskStart(Pic::MemoryRangeType::Code, _deArray);
+    _deEnd = specific()->findNonMaskEnd(Pic::MemoryRangeType::Code, _deArray);
+  }
+  log(Log::DebugLevel::Extra, QString("debug executive: \"%1\" %2:%3").arg(url.pretty()).arg(toHexLabel(_deStart, 4)).arg(toHexLabel(_deEnd, 4)));
+  return Icd2::ProgrammerBase::internalSetupHardware();
+}
+
+Pic::Memory Icd2::DebugProgrammer::toDebugMemory(const Pic::Memory &mem, bool withDebugExecutive)
+{
+  Pic::Memory memory = mem;
+  memory.setDebugOn(true);
+  if ( memory.hasWatchdogTimerOn() ) {
+    log(Log::LineType::Warning, i18n("Disabling watchdog timer for debugging"));
+    memory.setWatchdogTimerOn(false);
+  }
+  if ( memory.isProtected(Pic::Protection::ProgramProtected, Pic::MemoryRangeType::Code) ) {
+    log(Log::LineType::Warning, i18n("Disabling code program protection for debugging"));
+    memory.setProtection(false, Pic::Protection::ProgramProtected, Pic::MemoryRangeType::Code);
+  }
+  if ( memory.isProtected(Pic::Protection::WriteProtected, Pic::MemoryRangeType::Code) ) {
+    log(Log::LineType::Warning, i18n("Disabling code write protection for debugging"));
+    memory.setProtection(false, Pic::Protection::WriteProtected, Pic::MemoryRangeType::Code);
+  }
+  if ( memory.isProtected(Pic::Protection::ReadProtected, Pic::MemoryRangeType::Code) ) {
+    log(Log::LineType::Warning, i18n("Disabling code read protection for debugging"));
+    memory.setProtection(false, Pic::Protection::ReadProtected, Pic::MemoryRangeType::Code);
+  }
+  uint address = _deStart * device()->addressIncrement(Pic::MemoryRangeType::Code);
+  Device::Array data = device()->gotoInstruction(address, false);
+  for (uint i=0; i<data.count(); i++) memory.setWord(Pic::MemoryRangeType::DebugVector, i, data[i]);
+  if ( device()->is18Family() )
+    memory.setWord(Pic::MemoryRangeType::DebugVector, data.count(), 0xFF00); // ??
+  if (withDebugExecutive) {
+    bool ok = true;
+    for (uint i=_deStart; i<=_deEnd; i++) {
+      if ( memory.word(Pic::MemoryRangeType::Code, i).isInitialized() ) ok = false;
+      memory.setWord(Pic::MemoryRangeType::Code, i, _deArray[i]);
+    }
+    if ( !ok ) log(Log::LineType::Warning, i18n("Memory area for debug executive was not empty. Overwrite it and continue anyway..."));
+  }
+  return memory;
+}
+
+bool Icd2::DebugProgrammer::writeDebugExecutive()
+{
+  log(Log::LineType::Information, i18n("  Write debug executive"));
+  Device::Array data = _deArray.mid(_deStart, _deEnd - _deStart + 1);
+  if ( !hardware()->writeMemory(Pic::MemoryRangeType::Code, _deStart, data) ) return false;
+  log(Log::LineType::Information, i18n("  Verify debug executive"));
+  if ( !hardware()->readMemory(Pic::MemoryRangeType::Code, _deStart, data, 0) ) return false;
+  for (uint i=0; i<data.count(); i++) {
+    if ( _deArray[_deStart+i]==data[i] ) continue;
+    uint inc = device()->addressIncrement(Pic::MemoryRangeType::Code);
+    Address address = device()->range(Pic::MemoryRangeType::Code).start + inc * (_deStart + i);
+    log(Log::LineType::Error, i18n("Device memory doesn't match debug executive (at address %1: reading %2 and expecting %3).")
+                    .arg(toHexLabel(address, device()->nbCharsAddress()))
+                    .arg(toHexLabel(data[i], device()->nbCharsWord(Pic::MemoryRangeType::Code)))
+                    .arg(toHexLabel(_deArray[_deStart+i], device()->nbCharsWord(Pic::MemoryRangeType::Code))));
+    return false;
+  }
+  return true;
+}
+
+bool Icd2::DebugProgrammer::doProgram(const Device::Memory &memory, const Device::MemoryRange &range)
+{
+  if ( !checkProgram(memory) ) return false;
+  if ( !doConnectDevice() ) return false;
+  _progressMonitor.startNextTask();
+   // probably needed for all devices that don't have a "erase and write" mode
+  if ( range.all() && FAMILY_DATA[family(device()->name())].debugExec==QString("16F7X7") ) {
+     Pic::Memory dmemory(*device());
+     dmemory.setWord(Pic::MemoryRangeType::Code, 0, 0x0028);
+     dmemory.setWord(Pic::MemoryRangeType::Code, 1, 0x0030);
+     log(Log::LineType::Information, i18n("Programming device for debugging test..."));
+     if ( !internalProgram(dmemory, range) ) return false;
+     if ( !static_cast<Debugger *>(_debugger)->init(false) ) return false;
+     log(Log::LineType::Information, i18n("Debugging test successful"));
+  }
+  log(Log::LineType::Information, i18n("Programming device memory..."));
+  if ( !internalProgram(memory, range) ) return false;
+  log(Log::LineType::Information, i18n("Programming successful"));
+  return static_cast<Debugger *>(_debugger)->init(true);
+}
+
+bool Icd2::DebugProgrammer::programAll(const Pic::Memory &mem)
+{
+  Pic::Memory memory = toDebugMemory(mem, false);
+  if ( !programAndVerifyRange(Pic::MemoryRangeType::Code, memory) ) return false;
+  if ( !writeDebugExecutive() ) return false;
+  if ( !programAndVerifyRange(Pic::MemoryRangeType::DebugVector, memory) ) return false;
+  if ( !programAndVerifyRange(Pic::MemoryRangeType::Eeprom, memory) ) return false;
+  if ( !programAndVerifyRange(Pic::MemoryRangeType::UserId, memory) ) return false;
+  if ( device()->is18Family() ) {
+    if ( !hardware()->command("0C00", 0) ) return false; // #### ??
+    QString com = "42" + toHex(0xFB5, 8) + toHex(1, 8); // write RSBUG (?)
+    if ( !hardware()->command(com, 0) ) return false;
+    if ( !hardware()->command("0C01", 0) ) return false; // #### ??
+  }
+  if ( !programAndVerifyRange(Pic::MemoryRangeType::Config, memory) ) return false;
+  return true;
+}
+
+bool Icd2::DebugProgrammer::internalRead(Device::Memory *mem, const Device::MemoryRange &range, const ::Programmer::VerifyData *vd)
+{
+  if ( vd==0 || (vd->actions & ::Programmer::BlankCheckVerify) ) return Icd2::ProgrammerBase::internalRead(mem, range, vd);
+  Pic::Memory memory = toDebugMemory(static_cast<const Pic::Memory &>(vd->memory), true);
+  ::Programmer::VerifyData vdata(vd->actions, memory);
+  if ( !Icd2::ProgrammerBase::internalRead(0, range, &vdata) ) return false;
+  if ( range.all() && !readRange(Pic::MemoryRangeType::DebugVector, 0, &vdata) ) return false;
+  return true;
+}
+
+bool Icd2::DebugProgrammer::readDebugExecutiveVersion()
+{
+  if ( !hardware()->getDebugExecVersion(_debugExecutiveVersion) ) return false;
+  log(Log::LineType::Information, i18n("  Debug executive version: %1").arg(_debugExecutiveVersion.pretty()));
+  return true;
+}
+
+//----------------------------------------------------------------------------
+void Icd2::DebuggerGroup::addDevice(const QString &name, const Device::Data *ddata, ::Group::Support)
+{
+  if ( FAMILY_DATA[family(name)].debugExec==0 ) return;
+  Group::addDevice(name, ddata, data(name).debugSupport);
+}
+
+::Debugger::Specific *Icd2::DebuggerGroup::createDebuggerSpecific(::Debugger::Base &base) const
+{
+  const Pic::Data *data = static_cast< ::Debugger::PicBase &>(base).device();
+  if ( data==0 ) return 0;
+  QString debugExec = FAMILY_DATA[family(data->name())].debugExec;
+  switch (data->architecture().type()) {
+    case Pic::Architecture::P16X:
+      if ( debugExec=="16F872" ) return new P16F872DebuggerSpecific(base);
+      if ( debugExec=="16F7X7" ) return new P16F7X7DebuggerSpecific(base);
+      return new P16F87XDebuggerSpecific(base);
+    case Pic::Architecture::P17C:
+    case Pic::Architecture::P18C:
+    case Pic::Architecture::P18F:
+    case Pic::Architecture::P18J: return new P18FDebuggerSpecific(base);
+    case Pic::Architecture::P10X:
+    case Pic::Architecture::P24F:
+    case Pic::Architecture::P24H:
+    case Pic::Architecture::P30F:
+    case Pic::Architecture::P33F:
+    case Pic::Architecture::Nb_Types: break;
+  }
+  Q_ASSERT(false);
+  return 0;
+}
diff --git a/src/progs/icd2/base/icd2_debug.h b/src/progs/icd2/base/icd2_debug.h
new file mode 100644
index 0000000..bd2a6fe
--- /dev/null
+++ b/src/progs/icd2/base/icd2_debug.h
@@ -0,0 +1,89 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef ICD2_DEBUG_H
+#define ICD2_DEBUG_H
+
+#include "icd2_prog.h"
+#include "devices/pic/prog/pic_debug.h"
+
+namespace Icd2
+{
+class DebuggerSpecific;
+
+//-----------------------------------------------------------------------------
+class DebugProgrammer : public ProgrammerBase
+{
+Q_OBJECT
+public:
+  DebugProgrammer(const ::Programmer::Group &group, const Pic::Data *data);
+  bool readDebugExecutiveVersion();
+  const VersionData &debugExecutiveVersion() const { return _debugExecutiveVersion; }
+
+private:
+  VersionData   _debugExecutiveVersion;
+  Device::Array _deArray;
+  uint          _deStart, _deEnd;
+
+  virtual void clear();
+  virtual bool internalSetupHardware();
+  virtual bool doProgram(const Device::Memory &memory, const Device::MemoryRange &range);
+  virtual bool programAll(const Pic::Memory &memory);
+  virtual bool internalRead(Device::Memory *memory, const Device::MemoryRange &range, const ::Programmer::VerifyData *vdata);
+
+  bool getDebugExecutive();
+  bool writeDebugExecutive();
+  Pic::Memory toDebugMemory(const Pic::Memory &memory, bool withDebugExecutive);
+};
+
+//-----------------------------------------------------------------------------
+class Debugger : public ::Debugger::PicBase
+{
+public:
+  Debugger(DebugProgrammer &programmer) : ::Debugger::PicBase(programmer) {}
+  virtual bool setBreakpoints(const QValueList<Address> &addresses);
+  Hardware *hardware() { return static_cast<Hardware *>(_programmer.hardware()); }
+  DebugProgrammer &programmer() { return static_cast<DebugProgrammer &>(_programmer); }
+  DebuggerSpecific *specific();
+  bool waitForTargetMode(Pic::TargetMode mode);
+  virtual bool readRegister(const Register::TypeData &data, BitValue &value);
+  virtual bool writeRegister(const Register::TypeData &data, BitValue value);
+  bool init(bool last);
+
+protected:
+  virtual bool internalInit();
+  virtual bool internalRun();
+  virtual bool internalStep();
+  virtual bool softHalt(bool &success);
+  virtual bool hardHalt();
+  virtual bool internalReset();
+  virtual bool updateState();
+
+private:
+  bool _initLast;
+};
+
+//-----------------------------------------------------------------------------
+class DebuggerGroup : public Group
+{
+public:
+  virtual QString name() const { return "icd2_debugger"; }
+  virtual QString label() const { return i18n("ICD2 Debugger"); }
+  virtual ::Programmer::Properties properties() const { return Group::properties() | ::Programmer::Debugger; }
+  virtual uint maxNbBreakpoints(const Device::Data *) const { return 1; }
+
+protected:
+  virtual void addDevice(const QString &name, const Device::Data *data, ::Group::Support support);
+  virtual ::Programmer::Base *createBase(const Device::Data *data) const { return new DebugProgrammer(*this, static_cast<const Pic::Data *>(data)); }
+  virtual ::Debugger::Base *createDebuggerBase(::Programmer::Base &base) const { return new Debugger(static_cast<DebugProgrammer &>(base)); }
+  virtual ::Debugger::Specific *createDebuggerSpecific(::Debugger::Base &base) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/icd2/base/icd2_debug_specific.cpp b/src/progs/icd2/base/icd2_debug_specific.cpp
new file mode 100644
index 0000000..56cc178
--- /dev/null
+++ b/src/progs/icd2/base/icd2_debug_specific.cpp
@@ -0,0 +1,255 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "icd2_debug_specific.h"
+
+#include "devices/pic/base/pic_register.h"
+#include "icd2_data.h"
+
+//----------------------------------------------------------------------------
+Address Icd2::P16FDebuggerSpecific::addressWREG() const
+{
+  return FAMILY_DATA[family(device()->name())].wreg;
+}
+
+Address Icd2::P16FDebuggerSpecific::addressRegister(Address address) const
+{
+  QString name = device()->registersData().sfrNames[address];
+  if ( name=="FSR" ) return FAMILY_DATA[family(device()->name())].fsr;
+  if ( name=="STATUS" ) return FAMILY_DATA[family(device()->name())].status;
+  return address;
+}
+
+bool Icd2::P16FDebuggerSpecific::reset()
+{
+  if ( !hardware()->setTargetReset(Pic::ResetHeld) ) return false;
+  return init(true);
+}
+
+bool Icd2::P16FDebuggerSpecific::setBreakpoint(Address address)
+{
+  if ( !address.isValid() ) address = 0x1FFF; // outside memory range
+  BitValue value = address.toUInt() | 0x8000; // read-only INBUG bit
+  return hardware()->writeRegister(0x18E, value, 2);
+}
+
+bool Icd2::P16FDebuggerSpecific::readBreakpoint(BitValue &value)
+{
+  if ( !hardware()->readRegister(0x18E, value, 2) ) return false;
+  value = value.maskWith(0x1FFF);
+  return true;
+}
+
+bool Icd2::P16FDebuggerSpecific::beginInit(Device::Array *saved)
+{
+  if ( !hardware()->setTargetReset(Pic::ResetHeld) ) return false;
+  double vdd;
+  if ( !hardware()->readVoltage(Pic::TargetVdd, vdd) ) return false;
+  log(Log::DebugLevel::Normal, QString("  Target Vdd: %1 V").arg(vdd));
+
+  if (saved) {
+    saved->resize(1);
+    if ( !hardware()->readMemory(Pic::MemoryRangeType::Code, 0, *saved, 0) ) return false; // save first instruction
+    if ( (*saved)[0]!=device()->nopInstruction() ) log(Log::LineType::Warning, i18n("  According to ICD2 manual, instruction at address 0x0 should be \"nop\"."));
+  }
+
+  return true;
+}
+
+bool Icd2::P16FDebuggerSpecific::endInit(BitValue expectedPC)
+{
+  if ( !hardware()->setTargetReset(Pic::ResetReleased) ) return false;
+  if ( !base().waitForTargetMode(Pic::TargetStopped) ) return false;
+  BitValue value;
+  if ( !readBreakpoint(value) ) return false;
+  if ( value==expectedPC+1 ) {
+    // #### happen for some custom icd2 or sometimes when we had to force a halt (?)
+    expectedPC = expectedPC+1;
+    //log(Log::LineType::Information, i18n("Detected custom ICD2"));
+  }
+  if ( value!=expectedPC ) {
+    log(Log::LineType::Error, i18n("  PC is not at address %1 (%2)").arg(toHexLabel(expectedPC, 4)).arg(toHexLabel(value, 4)));
+    return false;
+  }
+  if ( !setBreakpoint(0x0000) ) return false;
+
+  if ( !base().update() ) return false;
+  if ( base().pc()!=expectedPC ) {
+    log(Log::LineType::Error, i18n("  PC is not at address %1 (%2)").arg(toHexLabel(expectedPC, 4)).arg(toHexLabel(base().pc(), 4)));
+    return false;
+  }
+  return true;
+}
+
+bool Icd2::P16F872DebuggerSpecific::init(bool)
+{
+  Device::Array saved;
+  if ( !beginInit(&saved) ) return false;
+
+  // this seems to be needed
+  if ( !hardware()->setTargetReset(Pic::ResetReleased) ) return false;
+  Pic::TargetMode mode;
+  if ( !programmer().getTargetMode(mode) ) return false;
+
+  if ( !hardware()->setTargetReset(Pic::ResetHeld) ) return false;
+  if ( !hardware()->setWriteMode(Pic::EraseWriteMode) ) return false;
+  log(Log::DebugLevel::Normal, "  Write \"goto 0x0\" at reset vector and run target.");
+  Device::Array data = device()->gotoInstruction(0x0000, false); // loop at reset vector
+  if ( !hardware()->writeMemory(Pic::MemoryRangeType::Code, 0, data) ) return false;
+  if ( !hardware()->setTargetReset(Pic::ResetReleased) ) return false; // run device
+  if ( !base().waitForTargetMode(Pic::TargetRunning) ) return false;
+  log(Log::DebugLevel::Normal, "  Try to halt target.");
+  if ( !hardware()->haltRun() ) return false;
+  if ( !base().waitForTargetMode(Pic::TargetStopped) ) return false;
+  if ( !programmer().readDebugExecutiveVersion() ) return false;
+  log(Log::DebugLevel::Normal, "  Set breakpoint at reset vector.");
+  if ( !setBreakpoint(0x0000) ) return false;
+  if ( !hardware()->setTargetReset(Pic::ResetHeld) ) return false;
+  if ( !base().waitForTargetMode(Pic::TargetInProgramming) ) return false;
+  log(Log::DebugLevel::Normal, "  Restore instruction at reset vector and run target.");
+  if ( !hardware()->writeMemory(Pic::MemoryRangeType::Code, 0, saved) ) return false; // restore instruction
+  if ( !hardware()->setWriteMode(Pic::WriteOnlyMode) ) return false;
+
+  return endInit(0x0001);
+}
+
+bool Icd2::P16F87XDebuggerSpecific::init(bool)
+{
+  Device::Array saved;
+  if ( !beginInit(&saved) ) return false;
+
+  if ( !hardware()->setTargetReset(Pic::ResetHeld) ) return false;
+  if ( !hardware()->setWriteMode(Pic::EraseWriteMode) ) return false;
+  log(Log::DebugLevel::Normal, "  Write \"goto 0x0\" at reset vector and run target.");
+  Device::Array data = device()->gotoInstruction(0x0000, false); // loop at reset vector
+  if ( !hardware()->writeMemory(Pic::MemoryRangeType::Code, 0, data) ) return false;
+  if ( !hardware()->setTargetReset(Pic::ResetReleased) ) return false; // run device
+  Pic::TargetMode mode;
+  if ( !programmer().getTargetMode(mode) ) return false;
+  if ( mode==Pic::TargetRunning && !hardware()->haltRun() ) return false;
+  if ( !base().waitForTargetMode(Pic::TargetStopped) ) return false;
+  if ( !programmer().readDebugExecutiveVersion() ) return false;
+  log(Log::DebugLevel::Normal, "  Set breakpoint at reset vector.");
+  if ( !setBreakpoint(0x0000) ) return false;
+  if ( !hardware()->setTargetReset(Pic::ResetHeld) ) return false;
+  if ( !base().waitForTargetMode(Pic::TargetInProgramming) ) return false;
+  log(Log::DebugLevel::Normal, "  Restore instruction at reset vector and run target.");
+  if ( !hardware()->writeMemory(Pic::MemoryRangeType::Code, 0, saved) ) return false; // restore instruction
+  if ( !hardware()->setWriteMode(Pic::WriteOnlyMode) ) return false;
+
+  return endInit(0x0001);
+}
+
+bool Icd2::P16F7X7DebuggerSpecific::init(bool last)
+{
+  Device::Array saved;
+  if ( !beginInit(last ? &saved : 0) ) return false;
+
+  log(Log::DebugLevel::Normal, "  Run target.");
+  if ( !hardware()->setTargetReset(Pic::ResetReleased) ) return false;
+  if ( !base().waitForTargetMode(Pic::TargetStopped) ) return false;
+  if ( !programmer().readDebugExecutiveVersion() ) return false;
+
+  BitValue value;
+  if ( !readBreakpoint(value) ) return false;
+  BitValue expectedPC = (last ? 0x0001 : 0x0000);
+  if ( value==expectedPC+1 ) {
+    expectedPC = expectedPC+1;
+    log(Log::DebugLevel::Normal, "Probably detected custom ICD2");
+  }
+  if ( value!=expectedPC )
+    log(Log::DebugLevel::Normal, i18n("  PC is not at address %1 (%2)").arg(toHexLabel(expectedPC, 4)).arg(toHexLabel(value, 4)));
+  if ( !setBreakpoint(0x0000) ) return false;
+
+  if ( !base().update() ) return false;
+  // #### not sure if there is a better way to get initial values (we are stopped here...)
+  Register::list().setValue(base().pcTypeData(), value);
+  Register::list().setValue(base().registerTypeData("STATUS"), 0x0);
+  Register::list().setValue(deviceSpecific()->wregTypeData(), 0x0);
+
+  return true;
+}
+
+//----------------------------------------------------------------------------
+Icd2::P18FDebuggerSpecific::P18FDebuggerSpecific(::Debugger::Base &base)
+  : DebuggerSpecific(base)
+{
+  const Pic::RegistersData &rdata = device()->registersData();
+  // find last used bank (but not #15)
+  _reservedBank = rdata.nbBanks - 1; // #14
+  for (uint i=1; i<rdata.nbBanks-1; i++) {
+    if ( rdata.isBankUsed(i) ) continue;
+    _reservedBank = i - 1;
+    break;
+  }
+  // check it's not a bank for CAN
+  for (; _reservedBank>0; _reservedBank--)
+    if ( !rdata.bankHasSfrs(_reservedBank) ) break;
+  // also take care of USB RAM
+  if ( (device()->architecture()==Pic::Architecture::P18F || device()->architecture()==Pic::Architecture::P18J)
+       && device()->hasFeature(Pic::Feature::USB) ) {
+    if ( _reservedBank==7 ) _reservedBank = 3; // 18F2455 family: 4 USB RAM banks
+    // 18F87J50 family ?
+  }
+}
+
+Address Icd2::P18FDebuggerSpecific::addressWREG()const
+{
+  return reservedRegisterOffset() | 0x0FF;
+}
+
+Address Icd2::P18FDebuggerSpecific::addressRegister(Address address) const
+{
+  QString name = device()->registersData().sfrNames[address];
+  if ( name=="PCLATU" ) return reservedRegisterOffset() | 0x0F4;
+  if ( name=="PCLATH" ) return reservedRegisterOffset() | 0x0F5;
+  if ( name=="FSR0H" ) return reservedRegisterOffset() | 0x0FB;
+  if ( name=="FSR0L" ) return reservedRegisterOffset() | 0x0FC;
+  if ( name=="BSR" ) return reservedRegisterOffset() | 0x0FD;
+  if ( name=="STATUS" ) return reservedRegisterOffset() | 0x0FE;
+  return address;
+}
+
+bool Icd2::P18FDebuggerSpecific::setBreakpoint(Address address)
+{
+  BitValue value = (address.isValid() ? address.toUInt() << 15 : 0x0FFFFF00); // ??
+  return hardware()->writeRegister(0xFB6, value, 4);
+}
+
+bool Icd2::P18FDebuggerSpecific::readBreakpoint(BitValue &value)
+{
+  if ( !hardware()->readRegister(0xFB6, value, 4) ) return false;
+  value >>= 15;
+  return true;
+}
+
+bool Icd2::P18FDebuggerSpecific::reset()
+{
+  if ( !hardware()->writeRegister(0xFB5, 0x00, 1) ) return false; // #### ??
+  if ( !hardware()->writeRegister(0xFB5, 0x01, 1) ) return false; // #### ??
+  if ( !hardware()->command("2D", 0) ) return false; // reset
+  if ( !hardware()->writeRegister(0xFB5, 0x00, 1) ) return false; // #### ??
+  if ( !base().update() ) return false;
+  BitValue expectedPC = 0x0000;
+  if ( base().pc()==0x0001) {
+    expectedPC = 0x0001;
+    log(Log::LineType::Information, i18n("Detected custom ICD2"));
+  }
+  if ( base().pc()!=expectedPC ) {
+    log(Log::LineType::Error, i18n("  PC is not at address %1 (%2)").arg(toHexLabel(expectedPC, 4)).arg(toHexLabel(base().pc(), 4)));
+    return false;
+  }
+  return true;
+}
+
+bool Icd2::P18FDebuggerSpecific::init(bool)
+{
+  if ( !hardware()->setTargetReset(Pic::ResetReleased) ) return false;
+  if ( !base().waitForTargetMode(Pic::TargetStopped) ) return false;
+  return reset();
+}
diff --git a/src/progs/icd2/base/icd2_debug_specific.h b/src/progs/icd2/base/icd2_debug_specific.h
new file mode 100644
index 0000000..d14887b
--- /dev/null
+++ b/src/progs/icd2/base/icd2_debug_specific.h
@@ -0,0 +1,98 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef ICD2_DEBUG_SPECIFIC_H
+#define ICD2_DEBUG_SPECIFIC_H
+
+#include "icd2_debug.h"
+
+namespace Icd2
+{
+//-----------------------------------------------------------------------------
+class DebuggerSpecific : public ::Debugger::Specific
+{
+public:
+  DebuggerSpecific(::Debugger::Base &base) : ::Debugger::Specific(base) {}
+  Debugger &base() { return static_cast<Debugger &>(_base); }
+  const Debugger &base() const { return static_cast<const Debugger &>(_base); }
+  const Pic::Data *device() const { return base().device(); }
+  Hardware *hardware() { return base().programmer().hardware(); }
+  DebugProgrammer &programmer() { return base().programmer(); }
+  ::Debugger::PicSpecific *deviceSpecific() { return base().deviceSpecific(); }
+  virtual Address addressWREG() const = 0;
+  virtual BitValue maskPC() const = 0;
+  virtual Address addressRegister(Address address) const = 0;
+  virtual bool setBreakpoint(Address address) = 0;
+  virtual bool readBreakpoint(BitValue &value) = 0;
+  virtual bool init(bool last) = 0;
+  virtual bool reset() = 0;
+};
+
+//-----------------------------------------------------------------------------
+class P16FDebuggerSpecific : public DebuggerSpecific
+{
+public:
+  P16FDebuggerSpecific(::Debugger::Base &base) : DebuggerSpecific(base) {}
+  virtual Address addressBreakpointRegister() const { return 0x18E; }
+  virtual BitValue writeMaskBreakpointRegister() const { return 0x8000; }
+  virtual BitValue readMaskBreakpointRegister() const { return 0x1FFF; }
+  virtual Address addressWREG() const;
+  virtual BitValue maskPC() const { return 0x1FFF; }
+  virtual Address addressRegister(Address address) const;
+  virtual bool setBreakpoint(Address address);
+  virtual bool readBreakpoint(BitValue &value);
+  virtual bool reset();
+
+protected:
+  bool beginInit(Device::Array *saved);
+  bool endInit(BitValue expectedPC);
+};
+
+class P16F872DebuggerSpecific : public P16FDebuggerSpecific
+{
+public:
+  P16F872DebuggerSpecific(::Debugger::Base &base) : P16FDebuggerSpecific(base) {}
+  virtual bool init(bool last);
+};
+
+class P16F87XDebuggerSpecific : public P16FDebuggerSpecific
+{
+public:
+  P16F87XDebuggerSpecific(::Debugger::Base &base) : P16FDebuggerSpecific(base) {}
+  virtual bool init(bool last);
+};
+
+class P16F7X7DebuggerSpecific : public P16FDebuggerSpecific
+{
+public:
+  P16F7X7DebuggerSpecific(::Debugger::Base &base) : P16FDebuggerSpecific(base) {}
+  virtual bool init(bool last);
+};
+
+//-----------------------------------------------------------------------------
+class P18FDebuggerSpecific : public DebuggerSpecific
+{
+public:
+  P18FDebuggerSpecific(::Debugger::Base &base);
+  virtual Address addressWREG() const;
+  virtual BitValue maskPC() const { return 0xFFFF; }
+  virtual Address addressRegister(Address address) const;
+  virtual bool setBreakpoint(Address address);
+  virtual bool readBreakpoint(BitValue &value);
+  virtual bool init(bool last);
+  virtual bool reset();
+  uint reservedBank() const { return _reservedBank; }
+
+private:
+  uint _reservedBank; // bank where are the debugging sfrs
+  uint reservedRegisterOffset() const { return reservedBank() << 8; }
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/icd2/base/icd2_prog.cpp b/src/progs/icd2/base/icd2_prog.cpp
new file mode 100644
index 0000000..7b2a59b
--- /dev/null
+++ b/src/progs/icd2/base/icd2_prog.cpp
@@ -0,0 +1,142 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "icd2_prog.h"
+
+#include "common/global/pfile.h"
+#include "progs/base/prog_config.h"
+#include "devices/list/device_list.h"
+#include "icd2_serial.h"
+#include "icd2_usb.h"
+#include "icd2_data.h"
+
+//-----------------------------------------------------------------------------
+void Icd2::ProgrammerBase::clear()
+{
+  Icd::ProgrammerBase::clear();
+  _firmwareId = 0;
+  _testData = TestData();
+}
+
+bool Icd2::ProgrammerBase::readFirmwareVersion()
+{
+  if ( !hardware()->setup() ) return false;
+  if ( !Icd::ProgrammerBase::readFirmwareVersion() ) return false;
+  _firmwareId = hardware()->getFirmwareId();
+  return !hasError();
+}
+
+bool Icd2::ProgrammerBase::internalSetupHardware()
+{
+  ::Programmer::Config config;
+  if ( !_targetSelfPowered && device()->architecture()==Pic::Architecture::P30F
+       && !askContinue(i18n("It is not recommended to power dsPICs from ICD. Continue anyway?")) ) {
+    logUserAbort();
+    return false;
+  }
+  return Icd::ProgrammerBase::internalSetupHardware();
+}
+
+bool Icd2::ProgrammerBase::selfTest(bool ask)
+{
+  log(Log::DebugLevel::Normal, "  Self-test");
+  if ( !hardware()->selfTest(_testData) ) return false;
+  if ( !_testData.pass() ) {
+    QString s;
+    for (uint i=0; i<TestData::Nb_VoltageTypes; i++) {
+      if ( i!=0 ) s += "; ";
+      s += _testData.pretty(TestData::VoltageType(i));
+    }
+    log(Log::LineType::Warning, i18n("Self-test failed: %1").arg(s));
+    if ( ask && !askContinue(i18n("Self-test failed (%1). Do you want to continue anyway?").arg(s)) ) {
+      logUserAbort();
+      return false;
+    }
+  }
+  return !hasError();
+}
+
+VersionData Icd2::ProgrammerBase::firmwareVersion(::Programmer::FirmwareVersionType type) const
+{
+  const FirmwareVersionData *vd = (type==::Programmer::FirmwareVersionType::Min ? &MIN_VERSION_DATA : &MAX_VERSION_DATA);
+  const Version &v = vd->version[_firmwareId-1];
+  return VersionData(v.major, v.minor, v.dot);
+}
+
+VersionData Icd2::ProgrammerBase::mplabVersion(::Programmer::FirmwareVersionType type) const
+{
+  const FirmwareVersionData *vd = (type==::Programmer::FirmwareVersionType::Min ? &MIN_VERSION_DATA : &MAX_VERSION_DATA);
+  return VersionData(vd->mplabMajor, vd->mplabMinor, 0);
+}
+
+bool Icd2::ProgrammerBase::setupFirmware()
+{
+  const FamilyData &fdata = FAMILY_DATA[family(device()->name())];
+  log(Log::DebugLevel::Normal, QString("  Firmware id is %1 and we want %2").arg(_firmwareId).arg(fdata.efid));
+  if ( fdata.efid==_firmwareId ) return true;
+  log(Log::LineType::Information, i18n("  Incorrect firmware loaded."));
+
+  // find firmware file
+  PURL::Directory dir = firmwareDirectory();
+  if ( dir.isEmpty() ) return false;
+  QString nameFilter = "ICD" + QString::number(fdata.efid).rightJustify(2, '0') + "??????.hex";
+  QStringList files = dir.files(nameFilter);
+  if ( files.isEmpty() ) {
+    log(Log::LineType::Error, i18n("Could not find firmware file \"%1\" in directory \"%2\".").arg(nameFilter).arg(dir.path()));
+    return false;
+  }
+
+  // upload hex file
+  PURL::Url url(dir, files[files.count()-1]);
+  log(Log::DebugLevel::Normal, QString("  Firmware file: %1").arg(url.pretty()));
+  Log::StringView sview;
+  PURL::File file(url, sview);
+  if ( !file.openForRead() ) {
+    log(Log::LineType::Error, i18n("Could not open firmware file \"%1\".").arg(url.pretty()));
+    return false;
+  }
+  if ( !doUploadFirmware(file) ) return false;
+
+  // check firmware
+  if ( !readFirmwareVersion() ) return false;
+  if ( fdata.efid!=_firmwareId ) {
+    log(Log::LineType::Error, i18n("Firmware still incorrect after uploading."));
+    return false;
+  }
+  log(Log::LineType::Information, i18n("  Firmware succesfully uploaded."));
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+Icd2::Programmer::Programmer(const ::Programmer::Group &group, const Pic::Data *data)
+  : Icd2::ProgrammerBase(group, data, "icd2_programmer")
+{}
+
+//----------------------------------------------------------------------------
+Programmer::Properties Icd2::Group::properties() const
+{
+   return ::Programmer::Programmer | ::Programmer::HasFirmware | ::Programmer::CanUploadFirmware
+     | ::Programmer::NeedDeviceSpecificFirmware | ::Programmer::CanReleaseReset
+     | ::Programmer::HasSelfTest | ::Programmer::CanReadMemory | ::Programmer::HasConnectedState;
+}
+
+bool Icd2::Group::canReadVoltage(Pic::VoltageType type) const
+{
+  return ( type==Pic::ProgrammerVpp || type==Pic::TargetVdd || type==Pic::TargetVpp );
+}
+
+Programmer::Hardware *Icd2::Group::createHardware(::Programmer::Base &base, const ::Programmer::HardwareDescription &hd) const
+{
+  if ( hd.port.type==PortType::Serial ) return new SerialHardware(base, hd.port.device);
+  return new USBHardware(base);
+}
+
+Programmer::DeviceSpecific *Icd2::Group::createDeviceSpecific(::Programmer::Base &base) const
+{
+  return new Icd::DeviceSpecific(base);
+}
diff --git a/src/progs/icd2/base/icd2_prog.h b/src/progs/icd2/base/icd2_prog.h
new file mode 100644
index 0000000..e8be727
--- /dev/null
+++ b/src/progs/icd2/base/icd2_prog.h
@@ -0,0 +1,84 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef ICD2_PROG_H
+#define ICD2_PROG_H
+
+#include "common/global/global.h"
+#include "icd_prog.h"
+#include "icd2.h"
+#include "progs/base/prog_group.h"
+
+namespace Icd2
+{
+class Hardware;
+
+//-----------------------------------------------------------------------------
+class ProgrammerBase : public Icd::ProgrammerBase
+{
+Q_OBJECT
+public:
+  ProgrammerBase(const Programmer::Group &group, const Pic::Data *data, const char *name)
+    : Icd::ProgrammerBase(group, data, name) {}
+  Hardware *hardware() { return static_cast<Hardware *>(_hardware); }
+  const TestData &testData() const { return _testData; }
+  virtual bool selfTest(bool ask);
+  virtual bool readFirmwareVersion();
+  uchar firmwareId() const { return _firmwareId; }
+  virtual bool setTarget() { return hardware()->setTarget(); }
+
+protected:
+  virtual void clear();
+  virtual bool setupFirmware();
+  virtual VersionData firmwareVersion(Programmer::FirmwareVersionType type) const;
+  virtual VersionData mplabVersion(Programmer::FirmwareVersionType type) const;
+  virtual bool internalSetupHardware();
+
+private:
+  uchar    _firmwareId;
+  TestData _testData;
+};
+
+//-----------------------------------------------------------------------------
+class Programmer : public ProgrammerBase
+{
+Q_OBJECT
+public:
+  Programmer(const ::Programmer::Group &group, const Pic::Data *data);
+};
+
+//-----------------------------------------------------------------------------
+class Group : public Icd::Group
+{
+public:
+  virtual QString xmlName() const { return "icd2"; }
+  virtual ::Programmer::Properties properties() const;
+  virtual ::Programmer::TargetPowerMode targetPowerMode() const { return ::Programmer::TargetPowerModeFromConfig; }
+  virtual bool isPortSupported(PortType type) const { return ( type==PortType::Serial || type==PortType::USB ); }
+  virtual bool canReadVoltage(Pic::VoltageType type) const;
+
+protected:
+  virtual void initSupported();
+  virtual ::Programmer::Hardware *createHardware(::Programmer::Base &base, const ::Programmer::HardwareDescription &hd) const;
+  virtual ::Programmer::DeviceSpecific *createDeviceSpecific(::Programmer::Base &base) const;
+};
+
+//-----------------------------------------------------------------------------
+class ProgrammerGroup : public Group
+{
+public:
+  virtual QString name() const { return "icd2"; }
+  virtual QString label() const { return i18n("ICD2 Programmer"); }
+
+protected:
+  virtual ::Programmer::Base *createBase(const Device::Data *data) const { return new Programmer(*this, static_cast<const Pic::Data *>(data)); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/icd2/base/icd2_serial.cpp b/src/progs/icd2/base/icd2_serial.cpp
new file mode 100644
index 0000000..1ab738c
--- /dev/null
+++ b/src/progs/icd2/base/icd2_serial.cpp
@@ -0,0 +1,66 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2002-2003 Stephen Landamore <stephen@landamore.com>     *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "icd2_serial.h"
+
+#include "common/global/global.h"
+#include "common/common/misc.h"
+
+//-----------------------------------------------------------------------------
+Icd2::SerialPort::SerialPort(const QString &device, Log::Base &log)
+  : Port::Serial(device, NeedDrain | NeedFlush, log)
+{}
+
+bool Icd2::SerialPort::open(Speed speed)
+{
+  if ( !Port::Serial::open() ) return false;
+  return setMode(NoInputFlag, ByteSize8 | EnableReceiver | HardwareFlowControl, speed, 0);
+}
+
+//-----------------------------------------------------------------------------
+Icd2::SerialHardware::SerialHardware(::Programmer::Base &base, const QString &portDevice)
+  : Hardware(base, new SerialPort(portDevice, base))
+{}
+
+bool Icd2::SerialHardware::internalConnect(const QString &mode)
+{
+  if ( !static_cast<SerialPort *>(_port)->open(Port::Serial::S19200) ) return false;
+  if ( !reset() ) return false;
+  if ( !_port->send("Z", 1) ) return false;
+  QString s;
+  if ( !_port->receive(4, s) ) return false;
+  if ( !reset() ) return false;
+  QByteArray a = toAscii(mode);
+  if ( !_port->send(a.data(), a.count()) ) return false;
+  if ( !_port->receive(1, s) ) return false;
+  if ( s.upper()!=mode ) {
+    log(Log::LineType::Error, i18n("Failed to set port mode to '%1'.").arg(mode));
+    return false;
+  }
+  //log(Log::Debug, "set fast speed");
+  //if ( !setFastSpeed() ) return false;
+  return true;
+}
+
+bool Icd2::SerialHardware::reset()
+{
+  static_cast<Port::Serial *>(_port)->setPinOn(Port::Serial::DTR, false, Port::PositiveLogic); // Trigger DTR to reset icd2
+  Port::msleep(10);
+  static_cast<Port::Serial *>(_port)->setPinOn(Port::Serial::DTR, true, Port::PositiveLogic); // remove reset
+  Port::msleep(10);
+  return true;
+}
+
+bool Icd2::SerialHardware::setFastSpeed()
+{
+  if ( !command("4D", 0) ) return false; // go faster
+  static_cast<SerialPort *>(_port)->open(Port::Serial::S57600);
+  Port::msleep(100); // ...we do need to delay here
+  return !hasError();
+}
diff --git a/src/progs/icd2/base/icd2_serial.h b/src/progs/icd2/base/icd2_serial.h
new file mode 100644
index 0000000..546e7b3
--- /dev/null
+++ b/src/progs/icd2/base/icd2_serial.h
@@ -0,0 +1,41 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2002-2003 Stephen Landamore <stephen@landamore.com>     *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef ICD2_SERIAL_H
+#define ICD2_SERIAL_H
+
+#include "icd2.h"
+#include "common/port/serial.h"
+
+namespace Icd2
+{
+
+//-----------------------------------------------------------------------------
+class SerialPort : public Port::Serial
+{
+public:
+  SerialPort(const QString &portDevice, Log::Base &log);
+  bool open(Speed speed);
+};
+
+//-----------------------------------------------------------------------------
+class SerialHardware : public Hardware
+{
+public:
+  SerialHardware(::Programmer::Base &base, const QString &portDevice);
+
+private:
+  bool setFastSpeed();
+  bool reset();
+  virtual bool internalConnect(const QString &mode);
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/icd2/base/icd2_usb.cpp b/src/progs/icd2/base/icd2_usb.cpp
new file mode 100644
index 0000000..945ef6f
--- /dev/null
+++ b/src/progs/icd2/base/icd2_usb.cpp
@@ -0,0 +1,174 @@
+/***************************************************************************
+ * Copyright (C) 2005 Lorenz M�senlechner & Matthias Kranz                 *
+ *                    <icd2linux@hcilab.org>                               *
+ * Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "icd2_usb.h"
+
+#include "microchip.h"
+#include "common/common/misc.h"
+
+//------------------------------------------------------------------------------
+const Icd2::USBPort::SequenceData Icd2::USBPort::SEQUENCE_DATA[Nb_SequenceTypes] = {
+  { 0x00 }, // receive
+  { 0x01 }, // send
+  { 0x02 }, // connect
+  { 0x00 }  // poll
+};
+
+Icd2::USBPort::USBPort(uint deviceId, Log::Base &log)
+  : Port::USB(log, Microchip::VENDOR_ID, deviceId, 1, 0), _dataSend(false)
+{}
+
+bool Icd2::USBPort::doSequence(SequenceType type, char *data, uint size)
+{
+  QByteArray tx(0x12);
+  for (uint i=0; i<uint(tx.count()); i++) tx[i] = 0x00;
+  tx[0x00] = SEQUENCE_DATA[type].type;
+  tx[0x01] = _seqnum;
+  tx[0x02] = size & 0xFF;
+  tx[0x03] = (size >> 8) & 0xFF;
+  tx[0x0A] = _ctype & 0xFF;
+  tx[0x0B] = (_ctype >> 8) & 0xFF;
+  if ( !write(0x01, tx.data(), tx.size()) ) return false;
+
+  switch (type) {
+    case Connect: break;
+    case Receive:
+      if ( !read(0x82, data, size, 0) ) return false;
+      break;
+    case Poll:
+      if ( !read(0x82, data, size, &_poll) ) return false;
+      break;
+    case Send:
+      if ( !write(0x01, data, size) ) return false;
+      break;
+    case Nb_SequenceTypes: Q_ASSERT(false); break;
+  }
+
+  QByteArray rx(0x08);
+  if ( !read(0x81, rx.data(), rx.size(), 0) ) return false;
+  //Q_ASSERT( rx[0]==tx[1] );
+
+  _seqnum++;
+  if ( _seqnum==0xFF ) _seqnum = 0xC0;
+  return true;
+}
+
+bool Icd2::USBPort::connectDevice(const QString &mode)
+{
+  _seqnum = 0xC1; // preset seqnum
+
+  _ctype = 0x00;
+  if ( !doSequence(Connect, 0, 0) ) return false;
+  if ( !send("Z", 1) ) return false;
+  QString s;
+  if ( !receive(4, s) ) return false;
+
+  _ctype = 0x00;
+  if ( !doSequence(Connect, 0, 0) ) return false;
+  for (uint i=0; true; i++) {
+    if ( i==10 ) {
+      log(Log::LineType::Error, i18n("Problem connecting ICD2: please try again after unplug-replug."));
+      return false;
+    }
+    _ctype = 0x02;
+    QByteArray a = toAscii(mode);
+    if ( !doSequence(Send, a.data(), a.count()) ) return false;
+    char c;
+    _ctype = 0x02;
+    if ( !doSequence(Receive, &c, 1) ) return false;
+    if ( c==mode.lower()[0] ) break;
+  }
+
+  return true;
+}
+
+bool Icd2::USBPort::internalReceive(uint size, char *data, uint)
+{
+  if (_dataSend) {
+    //_ctype = qMin(0x65, qRound(4.8 * size)); // timing ?? (1.6 for my ICD2)
+    _ctype = 0xC9;
+  } else _ctype = 0xC9;
+  bool ok = doSequence(Receive, data, size);
+  if (_dataSend) _dataSend = false;
+  return ok;
+}
+
+bool Icd2::USBPort::internalSend(const char *data, uint size, uint)
+{
+  if (_dataSend) {
+    //_ctype = qMin(0x65, qRound(4.8 * size)); // timing ?? (1.6 for my ICD2)
+    _ctype = 0xC9;
+  } else _ctype = 0xC9;
+  bool ok = doSequence(Send, (char *)data, size);
+  if (_dataSend) _dataSend = false;
+  return ok;
+}
+
+bool Icd2::USBPort::poll(uint size, QString &s)
+{
+  QMemArray<uchar> a;
+  if ( !poll(size, a) ) return false;
+  s.fill(0, size);
+  for (uint i=0; i<size; i++) s[i] = a[i];
+  return true;
+}
+
+bool Icd2::USBPort::poll(uint size, QMemArray<uchar> &a)
+{
+  a.resize(size);
+  for (;;) {
+    _ctype = 0x65;//0x01;
+    if ( !doSequence(Poll, (char *)a.data(), size) ) return false;
+    if (_poll) break;
+  }
+  //log(Log::DebugLevel::Max, QString("Receiced: \"%1\"").arg(toPrintable((const char *)a.data(), size)));
+  return true;
+}
+
+bool Icd2::USBPort::dataSend(const char *data, uint size)
+{
+  _dataSend = true;
+  return Port::USB::send(data, size);
+}
+
+bool Icd2::USBPort::dataReceive(uint size, QString &s)
+{
+  _dataSend = true;
+  return Port::USB::receive(size, s);
+}
+
+//------------------------------------------------------------------------------
+Icd2::USBHardware::USBHardware(::Programmer::Base &base)
+  : Hardware(base, new USBPort(ID_CLIENT, base))
+{}
+
+bool Icd2::USBHardware::internalConnect(const QString &mode)
+{
+  // load control messages for USB device if needed
+  log(Log::DebugLevel::Extra, QString("need firmware ? %1").arg(USBPort::findDevice(Microchip::VENDOR_ID, ID_FIRMWARE)!=0));
+  if ( Port::USB::findDevice(Microchip::VENDOR_ID, ID_FIRMWARE) ) {
+    USBPort port(ID_FIRMWARE, *this);
+    if ( !port.open() ) return false;
+    uint i = 0;
+    while ( CONTROL_MESSAGE_DATA[i].bytes!=0 ) {
+      if ( !port.sendControlMessage(CONTROL_MESSAGE_DATA[i]) ) return false;
+      i++;
+    }
+    port.close();
+    for (uint i=0; i<10; i++) {
+      log(Log::DebugLevel::Extra, QString("client here ? %1").arg(USBPort::findDevice(Microchip::VENDOR_ID, ID_CLIENT)!=0));
+      if ( Port::USB::findDevice(Microchip::VENDOR_ID, ID_CLIENT) ) break;
+      Port::msleep(1000);
+    }
+  }
+
+  if ( !_port->open() ) return false;
+  return static_cast<USBPort *>(_port)->connectDevice(mode);
+}
diff --git a/src/progs/icd2/base/icd2_usb.h b/src/progs/icd2/base/icd2_usb.h
new file mode 100644
index 0000000..c2677a6
--- /dev/null
+++ b/src/progs/icd2/base/icd2_usb.h
@@ -0,0 +1,63 @@
+/***************************************************************************
+ * Copyright (C) 2005 Lorenz M�senlechner & Matthias Kranz                 *
+ *                    <icd2linux@hcilab.org>                               *
+ * Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef ICD2_USB_H
+#define ICD2_USB_H
+
+#include "icd2.h"
+#include "common/port/usb_port.h"
+
+namespace Icd2
+{
+
+//-----------------------------------------------------------------------------
+class USBPort : public Port::USB
+{
+public:
+  USBPort(uint deviceId, Log::Base &log);
+  bool connectDevice(const QString &mode);
+  bool poll(uint size, QString &s);
+  bool poll(uint size, QMemArray<uchar> &data);
+  bool dataSend(const char *data, uint size);
+  bool dataReceive(uint size, QString &s);
+
+private:
+  uchar _seqnum;
+  bool  _poll;
+  uint  _ctype;
+  bool  _dataSend;
+
+  enum SequenceType { Receive = 0, Send, Connect, Poll, Nb_SequenceTypes };
+  struct SequenceData {
+    char type;
+  };
+  static const SequenceData SEQUENCE_DATA[Nb_SequenceTypes];
+  bool doSequence(SequenceType type, char *data, uint size);
+  virtual bool internalSend(const char *data, uint size, uint timeout = 0);
+  virtual bool internalReceive(uint size, char *data, uint timeout = 0);
+};
+
+//------------------------------------------------------------------------------
+class USBHardware : public Hardware
+{
+public:
+  USBHardware(::Programmer::Base &base);
+
+private:
+  static const Port::USB::ControlMessageData CONTROL_MESSAGE_DATA[];
+  enum { ID_FIRMWARE = 0x8000, // ICD2 id before usb firmware is transmitted
+         ID_CLIENT = 0x8001    // ICD2 id after firmware is transmitted
+  };
+  virtual bool internalConnect(const QString &mode);
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/icd2/base/icd2_usb_firmware.cpp b/src/progs/icd2/base/icd2_usb_firmware.cpp
new file mode 100644
index 0000000..c7947cf
--- /dev/null
+++ b/src/progs/icd2/base/icd2_usb_firmware.cpp
@@ -0,0 +1,613 @@
+/***************************************************************************
+ * Copyright (C) 2005 Lorenz M�senlechner & Matthias Kranz                 *
+ *                    <icd2linux@hcilab.org>                               *
+ * Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "icd2_usb.h"
+
+const Port::USB::ControlMessageData Icd2::USBHardware::CONTROL_MESSAGE_DATA[] = {
+{ 0x40, 0xA0, 0x7F92, "01" },
+{ 0x40, 0xA0, 0x146C, "C200907FA5E05418FF131313541F4450" },
+{ 0x40, 0xA0, 0x147C, "F51C139201D2E8907FAB74FFF0907FA9" },
+{ 0x40, 0xA0, 0x148C, "F0907FAAF05391EF907F95E044C0F090" },
+{ 0x40, 0xA0, 0x149C, "7FAFE04401F0907FAEE04405F0D2AF12" },
+{ 0x40, 0xA0, 0x14AC, "175F3000FD121100C20080F622" },
+{ 0x40, 0xA0, 0x1100, "907FE9E0245D600D1470030212442402" },
+{ 0x40, 0xA0, 0x1110, "600302124A907FEAE0750800F509A3E0" },
+{ 0x40, 0xA0, 0x1120, "FEE42509F509EE3508F508907FEEE075" },
+{ 0x40, 0xA0, 0x1130, "0A00F50BA3E0FEE4250BF50BEE350AF5" },
+{ 0x40, 0xA0, 0x1140, "0A907FE8E064C060030211D4E50B450A" },
+{ 0x40, 0xA0, 0x1150, "700302124AC3E50B9440E50A94005008" },
+{ 0x40, 0xA0, 0x1160, "850A0C850B0D8006750C00750D40907F" },
+{ 0x40, 0xA0, 0x1170, "E9E0B4A325AE0CAF0DAA08A9097B01C0" },
+{ 0x40, 0xA0, 0x1180, "03C002C0017A7F790078007C7FAD03D0" },
+{ 0x40, 0xA0, 0x1190, "01D002D003121356800FAF09AE08AD0D" },
+{ 0x40, 0xA0, 0x11A0, "7A7F79007B001215A4907FB5E50DF0E5" },
+{ 0x40, 0xA0, 0x11B0, "0D2509F509E50C3508F508C3E50B950D" },
+{ 0x40, 0xA0, 0x11C0, "F50BE50A950CF50A907FB4E020E20302" },
+{ 0x40, 0xA0, 0x11D0, "114C80F4907FE8E06440706EE50B450A" },
+{ 0x40, 0xA0, 0x11E0, "6068E4907FC5F0907FB4E020E3F9907F" },
+{ 0x40, 0xA0, 0x11F0, "C5E0750C00F50D907FE9E0B4A315AE0C" },
+{ 0x40, 0xA0, 0x1200, "AF0DA809AC087D017B017A7E79C01213" },
+{ 0x40, 0xA0, 0x1210, "56800FAF09AE08AD0D7A7F79007B0012" },
+{ 0x40, 0xA0, 0x1220, "14B9E50D2509F509E50C3508F508C3E5" },
+{ 0x40, 0xA0, 0x1230, "0B950DF50BE50A950CF50A907FB4E044" },
+{ 0x40, 0xA0, 0x1240, "02F08098907FEAE0F51C" },
+{ 0x40, 0xA0, 0x124A, "22" },
+{ 0x40, 0xA0, 0x1558, "AB07AA06AC05" },
+{ 0x40, 0xA0, 0x155E, "E4FD300111EAFFAE050DEE2400F582E4" },
+{ 0x40, 0xA0, 0x156E, "34E0F583EFF0EBAE050D74002EF582E4" },
+{ 0x40, 0xA0, 0x157E, "34E0F583EBF0AF050D74002FF582E434" },
+{ 0x40, 0xA0, 0x158E, "E0F583ECF0AF1C7AE07B001217207F0A" },
+{ 0x40, 0xA0, 0x159E, "7E0012173C" },
+{ 0x40, 0xA0, 0x15A3, "22" },
+{ 0x40, 0xA0, 0x14B9, "8E0E8F0F8D108A118B12" },
+{ 0x40, 0xA0, 0x14C3, "E4F513E513C395105020050FE50FAE0E" },
+{ 0x40, 0xA0, 0x14D3, "7002050E14FFE5122513F582E43511F5" },
+{ 0x40, 0xA0, 0x14E3, "83E0FD121558051380D9" },
+{ 0x40, 0xA0, 0x14ED, "22" },
+{ 0x40, 0xA0, 0x15A4, "8E0E8F0F8D108A118B12" },
+{ 0x40, 0xA0, 0x15AE, "E4FD300112E50EFFAE050DEE2403F582" },
+{ 0x40, 0xA0, 0x15BE, "E434E0F583EFF0E50FAE050D74032EF5" },
+{ 0x40, 0xA0, 0x15CE, "82E434E0F583E50FF0AF1C7AE07B0312" },
+{ 0x40, 0xA0, 0x15DE, "1720AF1CAD10AB12AA11121704" },
+{ 0x40, 0xA0, 0x15EB, "22" },
+{ 0x40, 0xA0, 0x166E, "C0E0C083C082C085C084C086758600D2" },
+{ 0x40, 0xA0, 0x167E, "005391EF907FAB7401F0D086D084D085" },
+{ 0x40, 0xA0, 0x168E, "D082D083D0E032" },
+{ 0x40, 0xA0, 0x1644, "C0E0C083C082C085C084C08675860090" },
+{ 0x40, 0xA0, 0x1654, "7FC4E4F05391EF907FAB7404F0D086D0" },
+{ 0x40, 0xA0, 0x1664, "84D085D082D083D0E032" },
+{ 0x40, 0xA0, 0x1695, "C0E0C083C082C085C084C08675860053" },
+{ 0x40, 0xA0, 0x16A5, "91EF907FAB7402F0D086D084D085D082" },
+{ 0x40, 0xA0, 0x16B5, "D083D0E032" },
+{ 0x40, 0xA0, 0x16BA, "C0E0C083C082C085C084C08675860053" },
+{ 0x40, 0xA0, 0x16CA, "91EF907FAB7410F0D086D084D085D082" },
+{ 0x40, 0xA0, 0x16DA, "D083D0E032" },
+{ 0x40, 0xA0, 0x14FF, "32" },
+{ 0x40, 0xA0, 0x16DF, "C0E0C083C082C085C084C08675860053" },
+{ 0x40, 0xA0, 0x16EF, "91EF907FAB7408F0D086D084D085D082" },
+{ 0x40, 0xA0, 0x16FF, "D083D0E032" },
+{ 0x40, 0xA0, 0x1767, "32" },
+{ 0x40, 0xA0, 0x1768, "32" },
+{ 0x40, 0xA0, 0x1769, "32" },
+{ 0x40, 0xA0, 0x176A, "32" },
+{ 0x40, 0xA0, 0x176B, "32" },
+{ 0x40, 0xA0, 0x176C, "32" },
+{ 0x40, 0xA0, 0x176D, "32" },
+{ 0x40, 0xA0, 0x176E, "32" },
+{ 0x40, 0xA0, 0x176F, "32" },
+{ 0x40, 0xA0, 0x1770, "32" },
+{ 0x40, 0xA0, 0x1771, "32" },
+{ 0x40, 0xA0, 0x1772, "32" },
+{ 0x40, 0xA0, 0x1773, "32" },
+{ 0x40, 0xA0, 0x1774, "32" },
+{ 0x40, 0xA0, 0x1775, "32" },
+{ 0x40, 0xA0, 0x1776, "32" },
+{ 0x40, 0xA0, 0x0043, "021500" },
+{ 0x40, 0xA0, 0x1500, "02166E0002169500021644000216DF00" },
+{ 0x40, 0xA0, 0x1510, "0216BA000214FF000217670002176800" },
+{ 0x40, 0xA0, 0x1520, "0217690002176A0002176B0002176C00" },
+{ 0x40, 0xA0, 0x1530, "02176D0002176E0002176F0002177000" },
+{ 0x40, 0xA0, 0x1540, "02177100021772000217730002177400" },
+{ 0x40, 0xA0, 0x1550, "0217750002177600" },
+{ 0x40, 0xA0, 0x173C, "8E148F15E5151515AE14700215144E60" },
+{ 0x40, 0xA0, 0x174C, "051214EE80EE22" },
+{ 0x40, 0xA0, 0x175F, "E4F51BD2E9D2AF22" },
+{ 0x40, 0xA0, 0x1619, "A907E51B7023907FA5E04480F0E925E0" },
+{ 0x40, 0xA0, 0x1629, "907FA6F08D16AF03A9077517018A1889" },
+{ 0x40, 0xA0, 0x1639, "19E4F51A751B01D322C322" },
+{ 0x40, 0xA0, 0x15EC, "A907E51B7025907FA5E04480F0E925E0" },
+{ 0x40, 0xA0, 0x15FC, "4401907FA6F08D16AF03A9077517018A" },
+{ 0x40, 0xA0, 0x160C, "188919E4F51A751B03D322C322" },
+{ 0x40, 0xA0, 0x004B, "02137F" },
+{ 0x40, 0xA0, 0x137F, "C0E0C083C082C085C084C086758600C0" },
+{ 0x40, 0xA0, 0x138F, "D075D000C000C001C002C003C006C007" },
+{ 0x40, 0xA0, 0x139F, "907FA5E030E206751B0602144E907FA5" },
+{ 0x40, 0xA0, 0x13AF, "E020E10CE51B64026006751B0702144E" },
+{ 0x40, 0xA0, 0x13BF, "AF1BEF24FE604814602C24FE60772404" },
+{ 0x40, 0xA0, 0x13CF, "600302144EAB17AA18A919AF1A051A8F" },
+{ 0x40, 0xA0, 0x13DF, "8275830012124B907FA6F0E51A651670" },
+{ 0x40, 0xA0, 0x13EF, "5E751B058059907FA6E0AB17AA18A919" },
+{ 0x40, 0xA0, 0x13FF, "AE1A8E82758300121278751B028040E5" },
+{ 0x40, 0xA0, 0x140F, "1624FEB51A07907FA5E04420F0E51614" },
+{ 0x40, 0xA0, 0x141F, "B51A0A907FA5E04440F0751B00907FA6" },
+{ 0x40, 0xA0, 0x142F, "E0AB17AA18A919AE1A8E827583001212" },
+{ 0x40, 0xA0, 0x143F, "78051A800A907FA5E04440F0751B0053" },
+{ 0x40, 0xA0, 0x144F, "91DFD007D006D003D002D001D000D0D0" },
+{ 0x40, 0xA0, 0x145F, "D086D084D085D082D083D0E032" },
+{ 0x40, 0xA0, 0x1704, "1215ECE51B24FA600E146006240770F3" },
+{ 0x40, 0xA0, 0x1714, "D322E4F51BD322E4F51BD322" },
+{ 0x40, 0xA0, 0x1720, "121619E51B24FA600E146006240770F3" },
+{ 0x40, 0xA0, 0x1730, "D322E4F51BD322E4F51BD322" },
+{ 0x40, 0xA0, 0x14EE, "7400F58690FDA57C05A3E582458370F9" },
+{ 0x40, 0xA0, 0x14FE, "22" },
+{ 0x40, 0xA0, 0x0000, "021753" },
+{ 0x40, 0xA0, 0x1753, "787FE4F6D8FD75812002146C" },
+{ 0x40, 0xA0, 0x124B, "BB010CE58229F582E5833AF583E02250" },
+{ 0x40, 0xA0, 0x125B, "06E92582F8E622BBFE06E92582F8E222" },
+{ 0x40, 0xA0, 0x126B, "E58229F582E5833AF583E49322" },
+{ 0x40, 0xA0, 0x1278, "F8BB010DE58229F582E5833AF583E8F0" },
+{ 0x40, 0xA0, 0x1288, "225006E92582C8F622BBFE05E92582C8" },
+{ 0x40, 0xA0, 0x1298, "F222" },
+{ 0x40, 0xA0, 0x129A, "E709F608DFFA8046E709F208DFFA803E" },
+{ 0x40, 0xA0, 0x12AA, "88828C83E709F0A3DFFA8032E309F608" },
+{ 0x40, 0xA0, 0x12BA, "DFFA806EE309F208DFFA806688828C83" },
+{ 0x40, 0xA0, 0x12CA, "E309F0A3DFFA805A89828A83E0A3F608" },
+{ 0x40, 0xA0, 0x12DA, "DFFA804E89828A83E0A3F208DFFA8042" },
+{ 0x40, 0xA0, 0x12EA, "80D280FA80C680D4805580F280298010" },
+{ 0x40, 0xA0, 0x12FA, "80A680EA809A80A880DA80E280CA8029" },
+{ 0x40, 0xA0, 0x130A, "88848C8589828A83E493A30586F0A305" },
+{ 0x40, 0xA0, 0x131A, "86DFF5DEF3800B89828A83E493A3F608" },
+{ 0x40, 0xA0, 0x132A, "DFF9ECFAA9F0EDFB2288848C8589828A" },
+{ 0x40, 0xA0, 0x133A, "83E0A30586F0A30586DFF6DEF480E389" },
+{ 0x40, 0xA0, 0x134A, "828A83E493A3F208DFF980D688F0ED24" },
+{ 0x40, 0xA0, 0x135A, "02B4040050CCF582EB2402B4040050C2" },
+{ 0x40, 0xA0, 0x136A, "23234582F582EF4E60B8EF60010EE582" },
+{ 0x40, 0xA0, 0x137A, "239012EA73" },
+{ 0x40, 0xA0, 0x7F92, "00" },
+{ 0x40, 0xA0, 0x7F92, "01" },
+{ 0x40, 0xA0, 0x0100, "907FE9E0700302029B14700302031724" },
+{ 0x40, 0xA0, 0x0110, "FE700302038E24FB7003020295147003" },
+{ 0x40, 0xA0, 0x0120, "02028F14700302028314700302028924" },
+{ 0x40, 0xA0, 0x0130, "0560030203E2120F7A40030203EE907F" },
+{ 0x40, 0xA0, 0x0140, "EBE024FE601914604724026003020279" },
+{ 0x40, 0xA0, 0x0150, "E50C907FD4F0E50D907FD5F00203EE90" },
+{ 0x40, 0xA0, 0x0160, "7FEAE0FF121710AA06A9077B018B498A" },
+{ 0x40, 0xA0, 0x0170, "4A894BEA49600FEE907FD4F0AF01EF90" },
+{ 0x40, 0xA0, 0x0180, "7FD5F00203EE907FB4E04401F00203EE" },
+{ 0x40, 0xA0, 0x0190, "907FEAE0FF1216E4AA06A9077B018B49" },
+{ 0x40, 0xA0, 0x01A0, "8A4A894BEA49700302026F" },
+{ 0x40, 0xA0, 0x01AB, "AB498B508A5189521217F4F553907FEE" },
+{ 0x40, 0xA0, 0x01BB, "E0FFE553D39F4003E0F553E553700302" },
+{ 0x40, 0xA0, 0x01CB, "0261754F00754E00754D00754C00E553" },
+{ 0x40, 0xA0, 0x01DB, "C394405004AF5380027F40E4FCFDFEAB" },
+{ 0x40, 0xA0, 0x01EB, "4FAA4EA94DA84CC31218625038E55225" },
+{ 0x40, 0xA0, 0x01FB, "4FF582E54E3551F583E0FF7400254FF5" },
+{ 0x40, 0xA0, 0x020B, "82E4347FF583EFF07A0079007800E54F" },
+{ 0x40, 0xA0, 0x021B, "2401F54FEA354EF54EE9354DF54DE835" },
+{ 0x40, 0xA0, 0x022B, "4CF54C80A9E553C394405004AF538002" },
+{ 0x40, 0xA0, 0x023B, "7F40907FB5EFF0E553C394405004AF53" },
+{ 0x40, 0xA0, 0x024B, "80027F40C3E5539FF553907FB4E020E2" },
+{ 0x40, 0xA0, 0x025B, "030201C680F4E4907FB5F0907FB47402" },
+{ 0x40, 0xA0, 0x026B, "F0" },
+{ 0x40, 0xA0, 0x026C, "0203EE907FB4E04401F00203EE907FB4" },
+{ 0x40, 0xA0, 0x027C, "E04401F00203EE120FA60203EE120F9A" },
+{ 0x40, 0xA0, 0x028C, "0203EE120F7C0203EE120F880203EE12" },
+{ 0x40, 0xA0, 0x029C, "0FB840030203EE907FE8E0247F602414" },
+{ 0x40, 0xA0, 0x02AC, "60312402705BA200E433FF25E0FFA202" },
+{ 0x40, 0xA0, 0x02BC, "E4334F907F00F0E4A3F0907FB57402F0" },
+{ 0x40, 0xA0, 0x02CC, "0203EEE4907F00F0A3F0907FB57402F0" },
+{ 0x40, 0xA0, 0x02DC, "0203EE907FECE0F45480FFC4540FFFE0" },
+{ 0x40, 0xA0, 0x02EC, "54072F25E024B4F582E4347FF583E054" },
+{ 0x40, 0xA0, 0x02FC, "01907F00F0E4A3F0907FB57402F00203" },
+{ 0x40, 0xA0, 0x030C, "EE907FB4E04401F00203EE120FBA4003" },
+{ 0x40, 0xA0, 0x031C, "0203EE907FE8E024FE601D2402600302" },
+{ 0x40, 0xA0, 0x032C, "03EE907FEAE0B40105C2000203EE907F" },
+{ 0x40, 0xA0, 0x033C, "B4E04401F00203EE907FEAE0703B907F" },
+{ 0x40, 0xA0, 0x034C, "ECE0F45480FFC4540FFFE054072F25E0" },
+{ 0x40, 0xA0, 0x035C, "24B4F582E4347FF583E4F0907FECE054" },
+{ 0x40, 0xA0, 0x036C, "80FF131313541FFFE054072F907FD7F0" },
+{ 0x40, 0xA0, 0x037C, "E4F550" },
+{ 0x40, 0xA0, 0x037F, "E04420F08069907FB4E04401F0806012" },
+{ 0x40, 0xA0, 0x038F, "0FBC505B907FE8E024FE60182402704F" },
+{ 0x40, 0xA0, 0x039F, "907FEAE0B40104D2008044907FB4E044" },
+{ 0x40, 0xA0, 0x03AF, "01F0803B907FEAE07020907FECE0F454" },
+{ 0x40, 0xA0, 0x03BF, "80FFC4540FFFE054072F25E024B4F582" },
+{ 0x40, 0xA0, 0x03CF, "E4347FF5837401F08015907FB4E04401" },
+{ 0x40, 0xA0, 0x03DF, "F0800C120FBE5007907FB4E04401F090" },
+{ 0x40, 0xA0, 0x03EF, "7FB4E04402F0" },
+{ 0x40, 0xA0, 0x03F5, "22" },
+{ 0x40, 0xA0, 0x0033, "0203F6" },
+{ 0x40, 0xA0, 0x03F6, "53D8EF32" },
+{ 0x40, 0xA0, 0x000B, "0203FA" },
+{ 0x40, 0xA0, 0x03FA, "C0E0C0D0C000C001C002C004C005C006" },
+{ 0x40, 0xA0, 0x040A, "C007C28C758AD1758C63D28CAF0BAE0A" },
+{ 0x40, 0xA0, 0x041A, "AD09AC087A0079007800EF2401F50BEA" },
+{ 0x40, 0xA0, 0x042A, "3EF50AE93DF509E83CF508D007D006D0" },
+{ 0x40, 0xA0, 0x043A, "05D004D002D001D000D0D0D0E032" },
+{ 0x40, 0xA0, 0x0448, "750B00750A00750900750800C28C5389" },
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+{ 0x40, 0xA0, 0x0FA6, "901A4FE0FF907F00EFF0907FB57401F0" },
+{ 0x40, 0xA0, 0x0FB6, "D322" },
+{ 0x40, 0xA0, 0x0FB8, "D322" },
+{ 0x40, 0xA0, 0x0FBA, "D322" },
+{ 0x40, 0xA0, 0x0FBC, "D322" },
+{ 0x40, 0xA0, 0x0FBE, "D322" },
+{ 0x40, 0xA0, 0x0FC0, "C0E0C083C082C085C084C086758600D2" },
+{ 0x40, 0xA0, 0x0FD0, "015391EF907FAB7401F0D086D084D085" },
+{ 0x40, 0xA0, 0x0FE0, "D082D083D0E032" },
+{ 0x40, 0xA0, 0x0FE7, "C0E0C083C082C085C084C08675860053" },
+{ 0x40, 0xA0, 0x0FF7, "91EF907FAB7404F0D086D084D085D082" },
+{ 0x40, 0xA0, 0x1007, "D083D0E032" },
+{ 0x40, 0xA0, 0x100C, "C0E0C083C082C085C084C08675860053" },
+{ 0x40, 0xA0, 0x101C, "91EF907FAB7402F0D086D084D085D082" },
+{ 0x40, 0xA0, 0x102C, "D083D0E032" },
+{ 0x40, 0xA0, 0x1031, "C0E0C083C082C085C084C08675860090" },
+{ 0x40, 0xA0, 0x1041, "7FC7E4F0907FC9E4F0907FCBE4F0907F" },
+{ 0x40, 0xA0, 0x1051, "CDE4F0907FCFE4F0907FD1E4F0907FD3" },
+{ 0x40, 0xA0, 0x1061, "E4F05391EF907FAB7410F0D086D084D0" },
+{ 0x40, 0xA0, 0x1071, "85D082D083D0E032" },
+{ 0x40, 0xA0, 0x1079, "C0E0C083C082C085C084C08675860053" },
+{ 0x40, 0xA0, 0x1089, "91EF907FAB7420F0D086D084D085D082" },
+{ 0x40, 0xA0, 0x1099, "D083D0E032" },
+{ 0x40, 0xA0, 0x109E, "C0E0C083C082C085C084C086758600D2" },
+{ 0x40, 0xA0, 0x10AE, "035391EF907FAB7408F0D086D084D085" },
+{ 0x40, 0xA0, 0x10BE, "D082D083D0E032" },
+{ 0x40, 0xA0, 0x10C5, "32" },
+{ 0x40, 0xA0, 0x10C6, "32" },
+{ 0x40, 0xA0, 0x10C7, "32" },
+{ 0x40, 0xA0, 0x10C8, "C0E0C0F0C083C082C085C084C0867586" },
+{ 0x40, 0xA0, 0x10D8, "00C0D0C000C001C002C003C004C005C0" },
+{ 0x40, 0xA0, 0x10E8, "06C007901B12E0FEA3E0FFEF8EF01218" },
+{ 0x40, 0xA0, 0x10F8, "CF11240000117C000111110002117C00" },
+{ 0x40, 0xA0, 0x1108, "03117C00040000117C907FC7E0FF7E00" },
+{ 0x40, 0xA0, 0x1118, "901B15EEF0A3EFF0805D8058907E40E0" },
+{ 0x40, 0xA0, 0x1128, "FFEFB44011907E42E0FF7E00901B10EE" },
+{ 0x40, 0xA0, 0x1138, "F0A3EFF0803E753300753400C3E53494" },
+{ 0x40, 0xA0, 0x1148, "12E533648094805026AF3474402FF582" },
+{ 0x40, 0xA0, 0x1158, "E4347EF583E0FFAE34743D2EF582E434" },
+{ 0x40, 0xA0, 0x1168, "1AF583EFF00534E5347002053380CD12" },
+{ 0x40, 0xA0, 0x1178, "0ECF80031207A65391EF907FAA7402F0" },
+{ 0x40, 0xA0, 0x1188, "D007D006D005D004D003D002D001D000" },
+{ 0x40, 0xA0, 0x1198, "D0D0D086D084D085D082D083D0F0D0E0" },
+{ 0x40, 0xA0, 0x11A8, "32" },
+{ 0x40, 0xA0, 0x11A9, "32" },
+{ 0x40, 0xA0, 0x11AA, "32" },
+{ 0x40, 0xA0, 0x11AB, "32" },
+{ 0x40, 0xA0, 0x11AC, "32" },
+{ 0x40, 0xA0, 0x11AD, "32" },
+{ 0x40, 0xA0, 0x11AE, "32" },
+{ 0x40, 0xA0, 0x11AF, "32" },
+{ 0x40, 0xA0, 0x11B0, "32" },
+{ 0x40, 0xA0, 0x11B1, "32" },
+{ 0x40, 0xA0, 0x11B2, "32" },
+{ 0x40, 0xA0, 0x11B3, "32" },
+{ 0x40, 0xA0, 0x11B4, "32" },
+{ 0x40, 0xA0, 0x12ED, "90784A7480F0C207120E6CC205120E61" },
+{ 0x40, 0xA0, 0x12FD, "907F9D74FFF0907F977447F0E4907F95" },
+{ 0x40, 0xA0, 0x130D, "F0907F9E74FBF0E4907F93F0907F9C74" },
+{ 0x40, 0xA0, 0x131D, "FFF0D2A0E4FFFE0FBF00010EBE92F8BF" },
+{ 0x40, 0xA0, 0x132D, "48F5C2A0D2A5D2A6D2A7D322" },
+{ 0x40, 0xA0, 0x1339, "D322" },
+{ 0x40, 0xA0, 0x133B, "D322" },
+{ 0x40, 0xA0, 0x133D, "8B498A4A894BE4F54CF54D1207898F51" },
+{ 0x40, 0xA0, 0x134D, "8E508D4F8C4E120789C3EF9551FFEE95" },
+{ 0x40, 0xA0, 0x135D, "50FEED954FFDEC954EFCAB38AA37A936" },
+{ 0x40, 0xA0, 0x136D, "A835C31218625008754C00754D028049" },
+{ 0x40, 0xA0, 0x137D, "30A2D3E4907F9DF0C2A5C2A7D2A7AB49" },
+{ 0x40, 0xA0, 0x138D, "AA4AA94B90000112180D30E717907F9A" },
+{ 0x40, 0xA0, 0x139D, "E0F552E92401F9E43AFA1217F4547F12" },
+{ 0x40, 0xA0, 0x13AD, "183A8097907F9AE0AB49AA4AA94B1218" },
+{ 0x40, 0xA0, 0x13BD, "3AD2A5907F9D74FFF0AE4CAF4D22" },
+{ 0x40, 0xA0, 0x13CB, "E4F54390000D12180DF53990000C1218" },
+{ 0x40, 0xA0, 0x13DB, "0DF53A90000B12180DF53B90000A1218" },
+{ 0x40, 0xA0, 0x13EB, "0DF53CAF3CAE3BAD3AAC398F388E378D" },
+{ 0x40, 0xA0, 0x13FB, "368C3590000512180DF5399000041218" },
+{ 0x40, 0xA0, 0x140B, "0DF53A90000312180DF53B9000021218" },
+{ 0x40, 0xA0, 0x141B, "0DF53C120E9B1207A6753D00753E017B" },
+{ 0x40, 0xA0, 0x142B, "FF7A13793DAF3CAE3BAD3AAC39E4901A" },
+{ 0x40, 0xA0, 0x143B, "26F0A3F0A3E53DF0A3E53EF0120A818F" },
+{ 0x40, 0xA0, 0x144B, "428E418D408C3FAB3CAA3BA93AA839C3" },
+{ 0x40, 0xA0, 0x145B, "1218626036754302854244AF42AE41AD" },
+{ 0x40, 0xA0, 0x146B, "40AC3F78081218738F45AF42AE41AD40" },
+{ 0x40, 0xA0, 0x147B, "AC3F78101218738F46AF42AE41AD40AC" },
+{ 0x40, 0xA0, 0x148B, "3F78181218738F47E4F5487B007A0079" },
+{ 0x40, 0xA0, 0x149B, "43120D59120E821207A67E007F0122" },
+{ 0x40, 0xA0, 0x14AA, "8B478A488949E4F54AF54B1207898F4F" },
+{ 0x40, 0xA0, 0x14BA, "8E4E8D4D8C4C120789C3EF954FFFEE95" },
+{ 0x40, 0xA0, 0x14CA, "4EFEED954DFDEC954CFCAB38AA37A936" },
+{ 0x40, 0xA0, 0x14DA, "A835C31218625008754A00754B018018" },
+{ 0x40, 0xA0, 0x14EA, "30A2D3C2A5C2A6AB47AA48A9491217F4" },
+{ 0x40, 0xA0, 0x14FA, "907F97F0D2A6D2A5AE4AAF4B22" },
+{ 0x40, 0xA0, 0x1507, "E4F53D90000D12180DF53990000C1218" },
+{ 0x40, 0xA0, 0x1517, "0DF53A90000B12180DF53B90000A1218" },
+{ 0x40, 0xA0, 0x1527, "0DF53CAF3CAE3BAD3AAC398F388E378D" },
+{ 0x40, 0xA0, 0x1537, "368C3590000512180DF5399000041218" },
+{ 0x40, 0xA0, 0x1547, "0DF53A90000312180DF53B9000021218" },
+{ 0x40, 0xA0, 0x1557, "0DF53C120EB51207A67BFF7A1479AAAF" },
+{ 0x40, 0xA0, 0x1567, "3CAE3BAD3AAC39E4901A07F0A3F0A3F0" },
+{ 0x40, 0xA0, 0x1577, "A304F01207D48F468E458D448C43AB3C" },
+{ 0x40, 0xA0, 0x1587, "AA3BA93AA839C31218626036753D0185" },
+{ 0x40, 0xA0, 0x1597, "463EAF46AE45AD44AC4378081218738F" },
+{ 0x40, 0xA0, 0x15A7, "3FAF46AE45AD44AC4378101218738F40" },
+{ 0x40, 0xA0, 0x15B7, "AF46AE45AD44AC4378181218738F41E4" },
+{ 0x40, 0xA0, 0x15C7, "F5427B007A00793D120D59120E821207" },
+{ 0x40, 0xA0, 0x15D7, "A67E007F0122" },
+{ 0x40, 0xA0, 0x15DD, "8B398A3A893B1212EDE4F53CFB7A0079" },
+{ 0x40, 0xA0, 0x15ED, "3C120D59120E821207A67E007F0122" },
+{ 0x40, 0xA0, 0x0043, "021600" },
+{ 0x40, 0xA0, 0x1600, "020FC00002100C00020FE70002109E00" },
+{ 0x40, 0xA0, 0x1610, "02103100021079000210C5000210C600" },
+{ 0x40, 0xA0, 0x1620, "0210C7000210C8000211A9000211AA00" },
+{ 0x40, 0xA0, 0x1630, "0211AB000211AC000211AD000211AE00" },
+{ 0x40, 0xA0, 0x1640, "0211AF000211B0000211B1000211B200" },
+{ 0x40, 0xA0, 0x1650, "0211B3000211B400" },
+{ 0x40, 0xA0, 0x1658, "907FD6E030E712E04401F07F147E0012" },
+{ 0x40, 0xA0, 0x1668, "1751907FD6E054FEF022" },
+{ 0x40, 0xA0, 0x1672, "907FD6E04480F0438701000000000022" },
+{ 0x40, 0xA0, 0x1693, "907FD6E04408F0" },
+{ 0x40, 0xA0, 0x169A, "E4F549" },
+{ 0x40, 0xA0, 0x169D, "E054FBF0" },
+{ 0x40, 0xA0, 0x16A1, "E4F549" },
+{ 0x40, 0xA0, 0x16A4, "E04408F0300B04E04402F07FDC7E0512" },
+{ 0x40, 0xA0, 0x16B4, "1751907F92E030E3077FDC7E05121751" },
+{ 0x40, 0xA0, 0x16C4, "907FAB74FFF0907FA9F0907FAAF05391" },
+{ 0x40, 0xA0, 0x16D4, "EF907FD6E054F7F0" },
+{ 0x40, 0xA0, 0x16DC, "E4F549" },
+{ 0x40, 0xA0, 0x16DF, "E04404F022" },
+{ 0x40, 0xA0, 0x16E4, "A907" },
+{ 0x40, 0xA0, 0x16E6, "AE10AF118F828E83A3E064037017AD01" },
+{ 0x40, 0xA0, 0x16F6, "19ED7001228F828E83E07C002FFDEC3E" },
+{ 0x40, 0xA0, 0x1706, "FEAF0580DF7E007F00" },
+{ 0x40, 0xA0, 0x170F, "22" },
+{ 0x40, 0xA0, 0x1710, "AD07" },
+{ 0x40, 0xA0, 0x1712, "E4FCAE0EAF0F8F828E83A3E06402702A" },
+{ 0x40, 0xA0, 0x1722, "AB040CEBB50501228F828E83A3A3E0FA" },
+{ 0x40, 0xA0, 0x1732, "A3E08A54F5556254E5546255E5556254" },
+{ 0x40, 0xA0, 0x1742, "2FFBE5543EFEAF0380CC7E007F00" },
+{ 0x40, 0xA0, 0x1750, "22" },
+{ 0x40, 0xA0, 0x1751, "8E4A8F4BE54B154BAE4A7002154A4E60" },
+{ 0x40, 0xA0, 0x1761, "0512168280EE22" },
+{ 0x40, 0xA0, 0x1682, "7400F58690FDA57C05A3E582458370F9" },
+{ 0x40, 0xA0, 0x1692, "22" },
+{ 0x40, 0xA0, 0x0000, "021768" },
+{ 0x40, 0xA0, 0x1768, "787FE4F6D8FD7581550217AF" },
+{ 0x40, 0xA0, 0x17F4, "BB010689828A83E0225002E722BBFE02" },
+{ 0x40, 0xA0, 0x1804, "E32289828A83E49322" },
+{ 0x40, 0xA0, 0x180D, "BB010CE58229F582E5833AF583E02250" },
+{ 0x40, 0xA0, 0x181D, "06E92582F8E622BBFE06E92582F8E222" },
+{ 0x40, 0xA0, 0x182D, "E58229F582E5833AF583E49322" },
+{ 0x40, 0xA0, 0x183A, "BB010689828A83F0225002F722BBFE01" },
+{ 0x40, 0xA0, 0x184A, "F322" },
+{ 0x40, 0xA0, 0x184C, "C5F0F8A3E028F0C5F0F8E58215827002" },
+{ 0x40, 0xA0, 0x185C, "1583E038F022" },
+{ 0x40, 0xA0, 0x1862, "EB9FF5F0EA9E42F0E99D42F0E89C45F0" },
+{ 0x40, 0xA0, 0x1872, "22" },
+{ 0x40, 0xA0, 0x1873, "E8600FECC313FCED13FDEE13FEEF13FF" },
+{ 0x40, 0xA0, 0x1883, "D8F122" },
+{ 0x40, 0xA0, 0x1886, "ECF0A3EDF0A3EEF0A3EFF022" },
+{ 0x40, 0xA0, 0x1892, "A8828583F0D083D0821218A91218A912" },
+{ 0x40, 0xA0, 0x18A2, "18A91218A9E473E493A3C583C5F0C583" },
+{ 0x40, 0xA0, 0x18B2, "C8C582C8F0A3C583C5F0C583C8C582C8" },
+{ 0x40, 0xA0, 0x18C2, "22" },
+{ 0x40, 0xA0, 0x18C3, "A42582F582E5F03583F58322" },
+{ 0x40, 0xA0, 0x18CF, "D083D082F8E4937012740193700DA3A3" },
+{ 0x40, 0xA0, 0x18DF, "93F8740193F5828883E473740293B5F0" },
+{ 0x40, 0xA0, 0x18EF, "067403936860E9A3A3A3A380D8" },
+{ 0x40, 0xA0, 0x1774, "020469E493A3F8E493A34003F68001F2" },
+{ 0x40, 0xA0, 0x1784, "08DFF48029E493A3F85407240CC8C333" },
+{ 0x40, 0xA0, 0x1794, "C4540F4420C8834004F456800146F6DF" },
+{ 0x40, 0xA0, 0x17A4, "E4800B01020408102040809011B5E47E" },
+{ 0x40, 0xA0, 0x17B4, "019360BCA3FF543F30E509541FFEE493" },
+{ 0x40, 0xA0, 0x17C4, "A360010ECF54C025E060A840B8E493A3" },
+{ 0x40, 0xA0, 0x17D4, "FAE493A3F8E493A3C8C582C8CAC583CA" },
+{ 0x40, 0xA0, 0x17E4, "F0A3C8C582C8CAC583CADFE9DEE780BE" },
+{ 0x40, 0xA0, 0x1288, "00" },
+{ 0x40, 0xA0, 0x7F92, "01" },
+{ 0x40, 0xA0, 0x7F92, "00" },
+{ 0, 0, 0, 0 }
+};
diff --git a/src/progs/icd2/base/icd_prog.cpp b/src/progs/icd2/base/icd_prog.cpp
new file mode 100644
index 0000000..6fadf06
--- /dev/null
+++ b/src/progs/icd2/base/icd_prog.cpp
@@ -0,0 +1,39 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "icd_prog.h"
+
+#include "common/global/pfile.h"
+#include "progs/base/prog_config.h"
+#include "devices/list/device_list.h"
+
+bool Icd::ProgrammerBase::doUploadFirmware(PURL::File &file)
+{
+  const Device::Data &data = *Device::lister().data("16F876");
+  Pic::Memory memory(static_cast<const Pic::Data &>(data));
+  QStringList errors, warnings;
+  Pic::Memory::WarningTypes warningTypes;
+  if ( !memory.load(file.stream(), errors, warningTypes, warnings) ) {
+    log(Log::LineType::Error, i18n("Could not read firmware hex file \"%1\": %2.").arg(file.url().pretty()).arg(errors[0]));
+    return false;
+  }
+  if ( warningTypes!=Pic::Memory::NoWarning ) {
+    log(Log::LineType::Error, i18n("Firmware hex file seems incompatible with device 16F876 inside ICD."));
+    return false;
+  }
+  if ( !hardware().uploadFirmware(memory) ) {
+    log(Log::LineType::Error, i18n("Failed to upload firmware."));
+    return false;
+  }
+  return true;
+}
+
+bool Icd::ProgrammerBase::readFirmwareVersion()
+{
+  return hardware().getFirmwareVersion(_firmwareVersion);
+}
diff --git a/src/progs/icd2/base/icd_prog.h b/src/progs/icd2/base/icd_prog.h
new file mode 100644
index 0000000..ba6d9bb
--- /dev/null
+++ b/src/progs/icd2/base/icd_prog.h
@@ -0,0 +1,40 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef ICD_PROG_H
+#define ICD_PROG_H
+
+#include "common/global/global.h"
+#include "icd.h"
+namespace PURL { class File; }
+
+namespace Icd
+{
+//----------------------------------------------------------------------------
+class ProgrammerBase : public ::Programmer::PicBase
+{
+Q_OBJECT
+public:
+  ProgrammerBase(const Programmer::Group &group, const Pic::Data *data, const char *name)
+    : ::Programmer::PicBase(group, data, name) {}
+  virtual bool readFirmwareVersion();
+
+protected:
+  Hardware &hardware() { return static_cast<Hardware &>(*_hardware); }
+  virtual bool doUploadFirmware(PURL::File &file);
+};
+
+//----------------------------------------------------------------------------
+class Group : public ::Programmer::PicGroup
+{
+public:
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/icd2/base/microchip.cpp b/src/progs/icd2/base/microchip.cpp
new file mode 100644
index 0000000..b5229f6
--- /dev/null
+++ b/src/progs/icd2/base/microchip.cpp
@@ -0,0 +1,11 @@
+/***************************************************************************
+ * Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "microchip.h"
+
+const uint Microchip::VENDOR_ID = 0x04d8;
diff --git a/src/progs/icd2/base/microchip.h b/src/progs/icd2/base/microchip.h
new file mode 100644
index 0000000..627b2ad
--- /dev/null
+++ b/src/progs/icd2/base/microchip.h
@@ -0,0 +1,19 @@
+/***************************************************************************
+ * Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef MICROCHIP_H
+#define MICROCHIP_H
+
+#include <qstring.h>
+
+namespace Microchip
+{
+  extern const uint VENDOR_ID;
+} // namespace
+
+#endif
diff --git a/src/progs/icd2/base/promate2.xml b/src/progs/icd2/base/promate2.xml
new file mode 100644
index 0000000..9e85009
--- /dev/null
+++ b/src/progs/icd2/base/promate2.xml
@@ -0,0 +1,235 @@
+<!-- ************************************************************************* -->
+<!-- * Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             * -->
+<!-- *                                                                       * -->
+<!-- * This program is free software; you can redistribute it and/or modify  * -->
+<!-- * it under the terms of the GNU General Public License as published by  * -->
+<!-- * the Free Software Foundation; either version 2 of the License, or     * -->
+<!-- * (at your option) any later version.                                   * -->
+<!-- *************************************************************************/-->
+<!DOCTYPE piklab>
+
+<programmer name="promate2">
+  <device name="12C508" first_revision="0x039900" os="0x10" part="0x00" socket="0x60" />
+  <device name="12C508A" first_revision="0x041001" os="0x10" part="0x02" socket="0x60" />
+  <device name="12C509" first_revision="0x039900" os="0x10" part="0x01" socket="0x60" />
+  <device name="12C509A" first_revision="0x041001" os="0x10" part="0x03" socket="0x60" />
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+  <device name="18F6621" first_revision="0x060001" os="0x11" part="0x17" socket="0xD0" />
+  <device name="18F6680" first_revision="0x060001" os="0x11" part="0x18" socket="0xD0" />
+  <device name="18F6720" first_revision="0x057002" os="0x11" part="0x11" socket="0xD0" />
+  <device name="18F8410" first_revision="0x062011" os="0x11" part="0x1E" socket="0xD0" />
+  <device name="18F8490" first_revision="0x062011" os="0x11" part="0x1D" socket="0xD0" />
+  <device name="18F8520" first_revision="0x059015" os="0x11" part="0x14" socket="0xD0" />
+  <device name="18F8525" first_revision="0x060001" os="0x11" part="0x19" socket="0xD0" />
+  <device name="18F8585" first_revision="0x060001" os="0x11" part="0x1A" socket="0xD0" />
+  <device name="18F8620" first_revision="0x057002" os="0x11" part="0x10" socket="0xD0" />
+  <device name="18F8621" first_revision="0x060001" os="0x11" part="0x1B" socket="0xD0" />
+  <device name="18F8680" first_revision="0x060001" os="0x11" part="0x1C" socket="0xD0" />
+  <device name="18F8720" first_revision="0x057002" os="0x11" part="0x0F" socket="0xD0" />
+  <device name="30F2010" first_revision="0x060000" os="0x13" part="0x04" socket="0x50" />
+  <device name="30F2011" first_revision="0x060000" os="0x13" part="0x05" socket="0x50" />
+  <device name="30F2012" first_revision="0x060000" os="0x13" part="0x06" socket="0x50" />
+  <device name="30F3011" first_revision="0x060000" os="0x13" part="0x08" socket="0x50" />
+  <device name="30F3012" first_revision="0x060000" os="0x13" part="0x09" socket="0x50" />
+  <device name="30F3013" first_revision="0x060000" os="0x13" part="0x0A" socket="0x50" />
+  <device name="30F3014" first_revision="0x060000" os="0x13" part="0x0B" socket="0x50" />
+  <device name="30F4011" first_revision="0x060000" os="0x13" part="0x0C" socket="0x50" />
+  <device name="30F4012" first_revision="0x060000" os="0x13" part="0x0D" socket="0x50" />
+  <device name="30F4013" first_revision="0x060000" os="0x13" part="0x17" socket="0x50" />
+  <device name="30F5011" first_revision="0x060000" os="0x13" part="0x0E" socket="0x50" />
+  <device name="30F5013" first_revision="0x060000" os="0x13" part="0x0F" socket="0x50" />
+  <device name="30F5015" first_revision="0x060000" os="0x13" part="0x16" socket="0x50" />
+  <device name="30F6010" first_revision="0x060000" os="0x13" part="0x10" socket="0x50" />
+  <device name="30F6011" first_revision="0x060000" os="0x13" part="0x11" socket="0x50" />
+  <device name="30F6012" first_revision="0x060000" os="0x13" part="0x12" socket="0x50" />
+  <device name="30F6013" first_revision="0x060000" os="0x13" part="0x13" socket="0x50" />
+  <device name="30F6014" first_revision="0x060000" os="0x13" part="0x14" socket="0x50" />
+</programmer>
\ No newline at end of file
diff --git a/src/progs/icd2/gui/Makefile.am b/src/progs/icd2/gui/Makefile.am
new file mode 100644
index 0000000..df597a0
--- /dev/null
+++ b/src/progs/icd2/gui/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+libicd2ui_la_LDFLAGS = $(all_libraries)
+noinst_LTLIBRARIES = libicd2ui.la
+
+libicd2ui_la_SOURCES = icd2_group_ui.cpp
diff --git a/src/progs/icd2/gui/icd2_group_ui.cpp b/src/progs/icd2/gui/icd2_group_ui.cpp
new file mode 100644
index 0000000..6f00788
--- /dev/null
+++ b/src/progs/icd2/gui/icd2_group_ui.cpp
@@ -0,0 +1,81 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "icd2_group_ui.h"
+
+#include "common/gui/misc_gui.h"
+#include "progs/gui/prog_config_widget.h"
+#include "progs/base/prog_group.h"
+#include "progs/icd2/base/icd2_debug.h"
+
+//----------------------------------------------------------------------------
+Icd2::AdvancedDialog::AdvancedDialog(ProgrammerBase &base, QWidget *parent)
+  : ::Programmer::PicAdvancedDialog(base, parent, "icd2_advanced_dialog")
+{
+  uint row = _firmwareContainer->numRows();
+  QLabel *label = new QLabel(i18n("Id:"), _firmwareContainer);
+  _firmwareContainer->addWidget(label, row,row, 0,0);
+  _firmwareIdLabel = new QLabel(_firmwareContainer);
+  _firmwareContainer->addWidget(_firmwareIdLabel, row,row, 1,1);
+  row++;
+
+  row = _programmerContainer->numRows();
+  if ( base.group().properties() & ::Programmer::Debugger ) {
+    ButtonContainer *container = new ::Programmer::ButtonContainer(i18n("Debug Executive"), this, SLOT(updateDebugExecutive()), _programmerContainer);
+    _programmerContainer->addWidget(container, row,row, 0,1);
+    label = new QLabel(i18n("Version:"), container);
+    container->addWidget(label, 1,1, 0,0);
+    _debugExecLabel = new QLabel(container);
+    container->addWidget(_debugExecLabel, 1,1, 1,1);
+    row++;
+  } else _debugExecLabel = 0;
+
+  for (uint i=0; i<TestData::Nb_VoltageTypes; i++) {
+    QLabel *label = new QLabel(i18n(TestData::VOLTAGE_LABELS[i]) + ":", _selfTestContainer);
+    _selfTestContainer->addWidget(label, 1+i,1+i, 0,0);
+    _tests[i] = new QLabel(_selfTestContainer);
+    _selfTestContainer->addWidget(_tests[i], 1+i,1+i, 1,1);
+  }
+}
+
+void Icd2::AdvancedDialog::updateDebugExecutive()
+{
+  ::BusyCursor bc;
+  if ( ensureConnected() ) {
+    Pic::TargetMode mode;
+    if ( !base().getTargetMode(mode) ) return;
+    if ( mode==Pic::TargetInProgramming )
+      MessageBox::sorry(i18n("You need to initiate debugging to read the debug executive version."), Log::Show);
+    else static_cast<DebugProgrammer &>(base()).readDebugExecutiveVersion();
+  }
+  updateDisplay();
+}
+
+void Icd2::AdvancedDialog::updateDisplay()
+{
+  ::Programmer::PicAdvancedDialog::updateDisplay();
+  uchar id = base().firmwareId();
+  _firmwareIdLabel->setText(id==0 ? "---" : toHexLabel(id, 2));
+  if (_debugExecLabel) {
+    const VersionData &vd = static_cast<DebugProgrammer &>(base()).debugExecutiveVersion();
+    _debugExecLabel->setText(vd.isValid() ? vd.pretty() : "---");
+  }
+  for (uint i=0; i<TestData::Nb_VoltageTypes; i++)
+    _tests[i]->setText(base().testData().result(TestData::VoltageType(i)));
+}
+
+//----------------------------------------------------------------------------
+::Programmer::ConfigWidget *Icd2::GroupUI::createConfigWidget(QWidget *parent) const
+{
+  return new ::Programmer::ConfigWidget(static_cast<const Group &>(group()), parent);
+}
+
+::Programmer::AdvancedDialog *Icd2::GroupUI::createAdvancedDialog(::Programmer::Base &base, QWidget *parent) const
+{
+  return new AdvancedDialog(static_cast<ProgrammerBase &>(base), parent);
+}
diff --git a/src/progs/icd2/gui/icd2_group_ui.h b/src/progs/icd2/gui/icd2_group_ui.h
new file mode 100644
index 0000000..93d66e7
--- /dev/null
+++ b/src/progs/icd2/gui/icd2_group_ui.h
@@ -0,0 +1,48 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef ICD2_GROUP_UI_H
+#define ICD2_GROUP_UI_H
+
+#include "devices/pic/gui/pic_prog_group_ui.h"
+#include "progs/icd2/base/icd2_prog.h"
+
+namespace Icd2
+{
+class ProgrammerBase;
+class Group;
+
+//----------------------------------------------------------------------------
+class AdvancedDialog : public ::Programmer::PicAdvancedDialog
+{
+Q_OBJECT
+public:
+  AdvancedDialog(ProgrammerBase &base, QWidget *parent);
+  virtual void updateDisplay();
+
+private slots:
+  void updateDebugExecutive();
+
+private:
+  QLabel *_firmwareIdLabel, *_debugExecLabel;
+  QLabel *_tests[TestData::Nb_VoltageTypes];
+  ProgrammerBase &base() { return static_cast<ProgrammerBase &>(_base); }
+};
+
+//----------------------------------------------------------------------------
+class GroupUI : public ::Programmer::GroupUI
+{
+public:
+  virtual ::Programmer::ConfigWidget *createConfigWidget(QWidget *parent) const;
+  virtual bool hasAdvancedDialog() const { return true; }
+  virtual ::Programmer::AdvancedDialog *createAdvancedDialog(::Programmer::Base &base, QWidget *parent) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/icd2/icd2.pro b/src/progs/icd2/icd2.pro
new file mode 100644
index 0000000..a67dbb2
--- /dev/null
+++ b/src/progs/icd2/icd2.pro
@@ -0,0 +1,2 @@
+TEMPLATE = subdirs
+SUBDIRS = icd2_data xml base
diff --git a/src/progs/icd2/icd2_data/Makefile.am b/src/progs/icd2/icd2_data/Makefile.am
new file mode 100644
index 0000000..4c5b34e
--- /dev/null
+++ b/src/progs/icd2/icd2_data/Makefile.am
@@ -0,0 +1,5 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+libicd2data_la_LDFLAGS = -no-undefined $(all_libraries)
+noinst_LTLIBRARIES = libicd2data.la
+libicd2data_la_SOURCES = icd2_data.cpp
diff --git a/src/progs/icd2/icd2_data/icd2_data.cpp b/src/progs/icd2/icd2_data/icd2_data.cpp
new file mode 100644
index 0000000..ba3f5ce
--- /dev/null
+++ b/src/progs/icd2/icd2_data/icd2_data.cpp
@@ -0,0 +1,84 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2002-2003 Stephen Landamore <stephen@landamore.com>     *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "progs/icd2/base/icd2_data.h"
+
+const Icd2::FirmwareVersionData Icd2::MIN_VERSION_DATA = {
+  7, 21, // MPLAB 7.21
+ {{ 2,  6,  5 }, // 01
+  { 0,  0,  0 }, // 02 [none]
+  { 0,  0,  0 }, // 03 [none]
+  { 2,  6,  6 }, // 04
+  { 1,  2,  5 }, // 05
+  { 1,  2,  2 }, // 06
+  { 1,  2,  9 }, // 07
+  { 1,  3,  4 }, // 08
+  { 1,  0,  0 }, // 09
+  { 1,  3,  1 }, // 10
+  { 0,  0, 27 }, // 11
+  { 1,  2,  0 }, // 12
+  { 0,  0,  0 }, // 13 [none]
+  { 0,  0,  0 }, // 14
+  { 0,  0,  0 }} // 15
+};
+
+const Icd2::FirmwareVersionData Icd2::MAX_VERSION_DATA = {
+  7, 41, // MPLAB 7.41
+ {{ 2, 7, 0 }, // 01
+  { 0, 0, 0 }, // 02 [none]
+  { 0, 0, 0 }, // 03 [none]
+  { 2, 6, 8 }, // 04
+  { 1, 3, 9 }, // 05
+  { 1, 2, 2 }, // 06
+  { 1, 4, 0 }, // 07
+  { 1, 5, 0 }, // 08
+  { 1, 0, 0 }, // 09
+  { 1, 4, 4 }, // 10
+  { 1, 0, 4 }, // 11
+  { 1, 2, 0 }, // 12
+  { 0, 0, 0 }, // 13 [none]
+  { 2, 0, 6 }, // 14
+  { 1, 1, 0 }} // 15
+};
+
+const Icd2::FamilyData Icd2::FAMILY_DATA[] = {
+  { "12F629",       1, "12F629",  0x0300, 0x0DF, 0x0DE, 0x0D4/*?*/ }, // 12F629/675
+  { "16F676",       1, "16F676",  0x0300, 0x0DF, 0x0DE, 0x0D4/*?*/ }, // 16F630/676
+  { "16F648A",      1, "16F648A", 0x0F00, 0x16F, 0x16E, 0x1F0/*?*/ }, // 16F627A/628A/648A
+  { "16F716",       1, "16F716",  0x0700, 0x06F, 0x06E, 0x0F0/*?*/ },
+  { "16F7X7",       1, "16F7X7",  0x1F00, 0x16F, 0x16E, 0x1F0/*?*/ }, // 16F737/747/767/777
+  { "16F819",       1, "16F819",  0x0700, 0x16F, 0x16E, 0x1F0/*?*/ }, // 16F818/819
+  { "16F88",        1, "16F88",   0x0F00, 0x1EF, 0x1EE, 0x1F0/*?*/ }, // 16F87/88
+  { "16F872",       1, "16F872",  0x0700, 0x1BF, 0x1BE, 0x1F0 }, // 16F870/871/872
+  { "16F874",       1, "16F874",  0x0F00, 0x1FF, 0x1FE, 0x17F/*?*/ }, // 16F873/873A/874/874A
+  { "16F877",       1, "16F877",  0x1F00, 0x1EF, 0x1EE, 0x1F0/*?*/ }, // 16F876/876A/877/877A
+  { "16F7X",        1, 0,         0,      0,     0,     0          }, // 16F73
+  { 0,              2, 0,         0,      0,     0,     0          }, // 30F for revision A2 (legacy: not in MPLAB 7)
+  { 0,              3, "30F",     0,      0,     0,     0          }, // 30F for revision A3/B0 (legacy: not in MPLAB 7)
+  { "18F_4",        4, "",        0,      0,     0,     0          }, // debug executive filename is computed at runtime
+  { "18F_5",        5, "",        0,      0,     0,     0          }, // debug executive filename is computed at runtime
+  { "18CX01",       6, 0,/*"18CX01"*/0,      0,     0,     0          }, // 16C601/801
+  { "10F2XX",       7, 0,         0,      0,     0,     0          },
+  { "16F5X",        7, 0,         0,      0,     0,     0          }, // 16F505/506
+  { "12F635",       8, "12F635",  0x0700, 0x06F, 0x06E, 0x0F0/*?*/ }, // 12F635/683 16F636/639
+  { "16F785",       8, "16F916",  0x0700, 0x06F, 0x06E, 0x1F0/*?*/ }, // 16F785
+  { "16F916",       8, "16F916",  0x1F00, 0x16F, 0x16E, 0x1F0/*?*/ }, // 16F913/914/916/917/946
+  { "16F684",       8, "16F684",  0x0700, 0x16F, 0x16E, 0x1F0/*?*/ }, // 16F684
+  { "16F688",       8, "16F688",  0x0F00, 0x16F, 0x16E, 0x1F0/*?*/ }, // 16F685/687/688/689/690
+  { "16F677",       8, 0,         0,      0,     0,     0          }, // 16F677
+  { "16F629",       9, 0,         0,      0,     0,     0          }, // 16F629
+  { "30F",         10, 0/*"30F_REVB"*/,0, 0,     0,     0          }, // 30F revision B1 and above
+  { "18F_J",       11, 0,         0,      0,     0,     0          }, // 18FXXJXX (?)
+  { "16F72",       12, 0,         0,      0,     0,     0          }, // 16F72/8X/627/628/84A
+  { "24F",         14, 0/*"24F"*/,0,      0,     0,     0          }, // from MPLAB 7.3
+  { "33F",         14, 0/*"33F"*/,0,      0,     0,     0          }, // from MPLAB 7.3
+  { "16F61X",      15, 0,         0,      0,     0,     0          }, // 12F61X/16F61X
+
+  { 0,              0, 0,         0,      0,     0,     0          }
+};
diff --git a/src/progs/icd2/icd2_data/icd2_data.pro b/src/progs/icd2/icd2_data/icd2_data.pro
new file mode 100644
index 0000000..e53d0ab
--- /dev/null
+++ b/src/progs/icd2/icd2_data/icd2_data.pro
@@ -0,0 +1,5 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = icd2data
+SOURCES += icd2_data.cpp
diff --git a/src/progs/icd2/xml/Makefile.am b/src/progs/icd2/xml/Makefile.am
new file mode 100644
index 0000000..52af4ee
--- /dev/null
+++ b/src/progs/icd2/xml/Makefile.am
@@ -0,0 +1,15 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_PROGRAMS = xml_icd2_parser
+xml_icd2_parser_SOURCES = xml_icd2_parser.cpp
+OBJECTS = $(top_builddir)/src/progs/icd2/icd2_data/libicd2data.la \
+        $(top_builddir)/src/devices/list/libdevicelistnoui.la \
+	$(top_builddir)/src/devices/pic/pic/libpic.la $(top_builddir)/src/devices/pic/base/libpicbase.la \
+	$(top_builddir)/src/devices/pic/xml_data/libpicxml.la \
+	$(top_builddir)/src/devices/mem24/mem24/libmem24.la $(top_builddir)/src/devices/mem24/base/libmem24base.la \
+	$(top_builddir)/src/devices/mem24/xml_data/libmem24xml.la \
+	$(top_builddir)/src/xml_to_data/libxmltodata.la $(top_builddir)/src/devices/base/libdevicebase.la \
+	$(top_builddir)/src/common/common/libcommon.la
+xml_icd2_parser_DEPENDENCIES = $(OBJECTS)
+xml_icd2_parser_LDADD = $(OBJECTS) $(LIB_KDECORE)
diff --git a/src/progs/icd2/xml/xml.pro b/src/progs/icd2/xml/xml.pro
new file mode 100644
index 0000000..a9a5d97
--- /dev/null
+++ b/src/progs/icd2/xml/xml.pro
@@ -0,0 +1,17 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/app.pro)
+
+TARGET   = xml_icd2_parser
+SOURCES += xml_icd2_parser.cpp
+LIBS    += ../icd2_data/libicd2data.a ../../../devices/list/libdevicelist.a \
+           ../../../devices/mem24/mem24/libmem24.a ../../../devices/mem24/xml_data/libmem24xml.a \
+           ../../../devices/mem24/base/libmem24base.a \
+           ../../../devices/pic/pic/libpic.a ../../../devices/pic/xml_data/libpicxml.a \
+           ../../../devices/pic/base/libpicbase.a ../../../xml_to_data/libxmltodata.a \
+           ../../../devices/base/libdevicebase.a ../../../common/global/libglobal.a \
+           ../../../common/nokde/libnokde.a ../../../common/common/libcommon.a
+
+unix:QMAKE_POST_LINK = cd ../base && ../xml/xml_icd2_parser
+unix:QMAKE_CLEAN += ../base/icd2_data.cpp
+win32:QMAKE_POST_LINK = cd ..\base && ..\xml\xml_icd2_parser.exe
+win32:QMAKE_CLEAN += ..\base\icd2_data.cpp
diff --git a/src/progs/icd2/xml/xml_icd2_parser.cpp b/src/progs/icd2/xml/xml_icd2_parser.cpp
new file mode 100644
index 0000000..7ce2ad9
--- /dev/null
+++ b/src/progs/icd2/xml/xml_icd2_parser.cpp
@@ -0,0 +1,53 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "xml_to_data/prog_xml_to_data.h"
+#include "progs/icd2/base/icd2_data.h"
+
+//-----------------------------------------------------------------------------
+namespace Icd2
+{
+
+class XmlToData : public Programmer::XmlToData<Data>
+{
+public:
+  XmlToData() : Programmer::XmlToData<Data>("icd2", "Icd2") {}
+
+private:
+  virtual uint familyIndex(const QString &family) const;
+  virtual void parseData(QDomElement element, Data &data);
+  virtual void outputData(const Data &data, QTextStream &s) const;
+};
+
+uint Icd2::XmlToData::familyIndex(const QString &family) const
+{
+  uint i = 0;
+  for (; Icd2::FAMILY_DATA[i].efid!=0; i++)
+    if ( family==Icd2::FAMILY_DATA[i].name ) break;
+  if ( Icd2::FAMILY_DATA[i].efid==0 ) qFatal(QString("Family \"%1\" is unknown").arg(family));
+  return i;
+}
+
+void Icd2::XmlToData::parseData(QDomElement element, Data &data)
+{
+  bool ok;
+  data.famid = fromHexLabel(element.attribute("famid"), 2, &ok);
+  if ( !ok ) qFatal("Missing or malformed famid attribute");
+  data.debugSupport = extractSupport(element.attribute("debug_support_type"));
+}
+
+void Icd2::XmlToData::outputData(const Data &data, QTextStream &s) const
+{
+  s << toHexLabel(data.famid, 2) << ", ";
+  s << "::Group::Support::Type(" << data.debugSupport.type() << ")";
+}
+
+} // namespace
+
+//-----------------------------------------------------------------------------
+XML_MAIN(Icd2::XmlToData)
diff --git a/src/progs/list/Makefile.am b/src/progs/list/Makefile.am
new file mode 100644
index 0000000..9cc833f
--- /dev/null
+++ b/src/progs/list/Makefile.am
@@ -0,0 +1,8 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libproglistui.la libproglistnoui.la
+libproglistui_la_LDFLAGS = $(all_libraries)
+libproglistui_la_SOURCES = prog_list.cpp prog_list_ui.cpp
+libproglistnoui_la_LDFLAGS = $(all_libraries)
+libproglistnoui_la_SOURCES = prog_list.cpp prog_list_noui.cpp
diff --git a/src/progs/list/list.pro b/src/progs/list/list.pro
new file mode 100644
index 0000000..d6711fd
--- /dev/null
+++ b/src/progs/list/list.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = progslist
+HEADERS += prog_list.h
+SOURCES += prog_list.cpp prog_list_noui.cpp
diff --git a/src/progs/list/prog_list.cpp b/src/progs/list/prog_list.cpp
new file mode 100644
index 0000000..eb69472
--- /dev/null
+++ b/src/progs/list/prog_list.cpp
@@ -0,0 +1,15 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "prog_list.h"
+
+namespace Programmer
+{
+  Lister _lister;
+  const Lister &lister() { return _lister; }
+}
diff --git a/src/progs/list/prog_list.h b/src/progs/list/prog_list.h
new file mode 100644
index 0000000..204fbaa
--- /dev/null
+++ b/src/progs/list/prog_list.h
@@ -0,0 +1,28 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PROG_LIST_H
+#define PROG_LIST_H
+
+#include "common/common/lister.h"
+#include "progs/base/prog_group.h"
+
+namespace Programmer
+{
+
+class Lister : public ::Group::Lister<Group>
+{
+public:
+  Lister();
+  const Group &defaultGroup(Property property);
+};
+extern const Lister &lister();
+
+} // namespace
+
+#endif
diff --git a/src/progs/list/prog_list_noui.cpp b/src/progs/list/prog_list_noui.cpp
new file mode 100644
index 0000000..f7ec669
--- /dev/null
+++ b/src/progs/list/prog_list_noui.cpp
@@ -0,0 +1,38 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "prog_list.h"
+
+#include "progs/direct/base/direct_prog.h"
+#include "progs/icd2/base/icd2_prog.h"
+#include "progs/icd2/base/icd2_debug.h"
+#include "progs/icd1/base/icd1_prog.h"
+#include "progs/pickit2/base/pickit2_prog.h"
+#include "progs/pickit1/base/pickit1_prog.h"
+#include "progs/psp/base/psp_prog.h"
+#include "progs/gpsim/base/gpsim_debug.h"
+#include "progs/picdem_bootloader/base/picdem_bootloader_prog.h"
+#include "progs/pickit2_bootloader/base/pickit2_bootloader_prog.h"
+#include "progs/tbl_bootloader/base/tbl_bootloader_prog.h"
+#include "progs/pickit2v2/base/pickit2v2_prog.h"
+
+Programmer::Lister::Lister()
+{
+  addGroup(new Direct::DGroup, 0);
+  addGroup(new Icd2::ProgrammerGroup, 0);
+  addGroup(new Icd2::DebuggerGroup, 0);
+  addGroup(new Icd1::Group, 0);
+  addGroup(new Pickit2::Group, 0);
+  //addGroup(new Pickit2V2::Group, 0);
+  addGroup(new Pickit1::Group, 0);
+  addGroup(new Psp::Group, 0);
+  addGroup(new GPSim::Group, 0);
+  addGroup(new PicdemBootloader::Group, 0);
+  addGroup(new Pickit2Bootloader::Group, 0);
+  addGroup(new TinyBootloader::Group, 0);
+}
diff --git a/src/progs/list/prog_list_ui.cpp b/src/progs/list/prog_list_ui.cpp
new file mode 100644
index 0000000..6f57a42
--- /dev/null
+++ b/src/progs/list/prog_list_ui.cpp
@@ -0,0 +1,49 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "prog_list.h"
+
+#include "progs/direct/base/direct_prog.h"
+#include "progs/direct/gui/direct_config_widget.h"
+#include "progs/icd2/base/icd2_prog.h"
+#include "progs/icd2/base/icd2_debug.h"
+#include "progs/icd2/gui/icd2_group_ui.h"
+#include "progs/icd1/base/icd1_prog.h"
+#include "progs/icd1/gui/icd1_group_ui.h"
+#include "progs/pickit2/base/pickit2_prog.h"
+#include "progs/pickit2/gui/pickit2_group_ui.h"
+#include "progs/pickit2v2/base/pickit2v2_prog.h"
+#include "progs/pickit2v2/gui/pickit2v2_group_ui.h"
+#include "progs/pickit1/base/pickit1_prog.h"
+#include "progs/pickit1/gui/pickit1_group_ui.h"
+#include "progs/psp/base/psp_prog.h"
+#include "progs/psp/gui/psp_group_ui.h"
+#include "progs/gpsim/base/gpsim_debug.h"
+#include "progs/gpsim/gui/gpsim_group_ui.h"
+#include "progs/picdem_bootloader/base/picdem_bootloader_prog.h"
+#include "progs/picdem_bootloader/gui/picdem_bootloader_ui.h"
+#include "progs/pickit2_bootloader/base/pickit2_bootloader_prog.h"
+#include "progs/pickit2_bootloader/gui/pickit2_bootloader_ui.h"
+#include "progs/tbl_bootloader/base/tbl_bootloader_prog.h"
+#include "progs/tbl_bootloader/gui/tbl_bootloader_ui.h"
+
+Programmer::Lister::Lister()
+{
+  addGroup(new Direct::DGroup, new Direct::GroupUI);
+  addGroup(new Icd2::ProgrammerGroup, new Icd2::GroupUI);
+  addGroup(new Icd2::DebuggerGroup, new Icd2::GroupUI);
+  addGroup(new Icd1::Group, new Icd1::GroupUI);
+  addGroup(new Pickit2::Group, new Pickit2::GroupUI);
+  //addGroup(new Pickit2V2::Group, new Pickit2V2::GroupUI);
+  addGroup(new Pickit1::Group, new Pickit1::GroupUI);
+  addGroup(new Psp::Group, new Psp::GroupUI);
+  addGroup(new GPSim::Group, new GPSim::GroupUI);
+  addGroup(new PicdemBootloader::Group, new PicdemBootloader::GroupUI);
+  addGroup(new Pickit2Bootloader::Group, new Pickit2Bootloader::GroupUI);
+  addGroup(new TinyBootloader::Group, new TinyBootloader::GroupUI);
+}
diff --git a/src/progs/manager/Makefile.am b/src/progs/manager/Makefile.am
new file mode 100644
index 0000000..565dae5
--- /dev/null
+++ b/src/progs/manager/Makefile.am
@@ -0,0 +1,5 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+libprogmanager_la_LDFLAGS = $(all_libraries)
+noinst_LTLIBRARIES = libprogmanager.la
+libprogmanager_la_SOURCES = breakpoint.cpp debug_manager.cpp prog_manager.cpp
diff --git a/src/progs/manager/breakpoint.cpp b/src/progs/manager/breakpoint.cpp
new file mode 100644
index 0000000..15e08e0
--- /dev/null
+++ b/src/progs/manager/breakpoint.cpp
@@ -0,0 +1,74 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "breakpoint.h"
+
+#include "coff/base/coff.h"
+
+//----------------------------------------------------------------------------
+namespace Breakpoint
+{
+  List *_list = 0;
+}
+Breakpoint::List &Breakpoint::list()
+{
+  if ( _list==0 ) _list = new List;
+  return *_list;
+}
+
+void Breakpoint::List::append(const Data &data)
+{
+  Q_ASSERT( !contains(data) );
+  StateData sdata;
+  sdata.data = data;
+  _list.append(sdata);
+  delayedChanged();
+}
+
+void Breakpoint::List::remove(const Data &data)
+{
+  Q_ASSERT( contains(data) );
+  _list.remove(find(data));
+  delayedChanged();
+}
+
+void Breakpoint::List::clear()
+{
+  _list.clear();
+  delayedChanged();
+}
+
+QValueList<Breakpoint::List::StateData>::iterator Breakpoint::List::find(const Data &data)
+{
+  QValueList<StateData>::iterator it;
+  for (it=_list.begin(); it!=_list.end(); ++it)
+    if ( (*it).data==data ) return it;
+  return _list.end();
+}
+
+QValueList<Breakpoint::List::StateData>::const_iterator Breakpoint::List::find(const Data &data) const
+{
+  QValueList<StateData>::const_iterator it;
+  for (it=_list.begin(); it!=_list.end(); ++it)
+    if ( (*it).data==data ) return it;
+  return _list.end();
+}
+
+void Breakpoint::List::setState(const Data &data, State state)
+{
+  Q_ASSERT( contains(data) );
+  (*find(data)).state = state;
+  delayedChanged();
+}
+
+void Breakpoint::List::setAddress(const Data &data, Address address)
+{
+  Q_ASSERT( contains(data) );
+  (*find(data)).address = address;
+  delayedChanged();
+}
diff --git a/src/progs/manager/breakpoint.h b/src/progs/manager/breakpoint.h
new file mode 100644
index 0000000..fca0570
--- /dev/null
+++ b/src/progs/manager/breakpoint.h
@@ -0,0 +1,70 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef BREAKPOINT_H
+#define BREAKPOINT_H
+
+#include "common/common/storage.h"
+#include "common/global/purl.h"
+#include "devices/base/generic_device.h"
+
+namespace Breakpoint
+{
+class List;
+enum State { Unknown, Active, Disabled };
+enum MarkType { ProgramCounterActive = 0, ProgramCounterDisabled,
+                BreakpointActive, BreakpointDisabled, BreakpointReached,
+                BreakpointInvalid, Nb_MarkTypes };
+
+//----------------------------------------------------------------------------
+class Data {
+public:
+  Data(const PURL::Url &purl = PURL::Url(), uint pline = 0) : url(purl), line(pline) {}
+  bool operator <(const Data &data) const { return ( url<data.url || line<data.line ); }
+  bool operator ==(const Data &data) const { return ( url==data.url && line==data.line ); }
+  PURL::Url url;
+  uint line;
+};
+extern void updateActions(const Data *data);
+
+//----------------------------------------------------------------------------
+class List;
+extern List &list();
+
+class List : public GenericStorage
+{
+Q_OBJECT
+public:
+  List() {}
+  void append(const Data &data);
+  void remove(const Data &data);
+  void clear();
+  uint count() const { return _list.count(); }
+  const Data &data(uint i) const { return _list[i].data; }
+  bool contains(const Data &data) const { return find(data)!=_list.end(); }
+  State state(const Data &data) const { return (*find(data)).state; }
+  Address address(const Data &data) const { return (*find(data)).address; }
+  void setState(const Data &data, State state);
+  void setAddress(const Data &data, Address address);
+
+private:
+  class StateData {
+  public:
+    StateData() : state(Unknown) {}
+    Data    data;
+    Address address;
+    State   state;
+  };
+  QValueList<StateData> _list;
+  QValueList<StateData>::const_iterator find(const Data &data) const;
+  QValueList<StateData>::iterator find(const Data &data);
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/manager/debug_manager.cpp b/src/progs/manager/debug_manager.cpp
new file mode 100644
index 0000000..7889432
--- /dev/null
+++ b/src/progs/manager/debug_manager.cpp
@@ -0,0 +1,392 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "debug_manager.h"
+
+#include <qtimer.h>
+#include <qeventloop.h>
+
+#include "coff/base/text_coff.h"
+#include "coff/base/cdb_parser.h"
+#include "progs/base/generic_prog.h"
+#include "progs/base/generic_debug.h"
+#include "progs/base/prog_group.h"
+#include "devices/base/register.h"
+#include "progs/base/debug_config.h"
+#include "prog_manager.h"
+
+Debugger::Manager *Debugger::manager = 0;
+
+Debugger::Manager::Manager()
+  :  QObject(Programmer::manager, "debug_manager"), Log::Base(Programmer::manager), GenericView(Breakpoint::list()),
+    _coff(0), _data(0)
+{
+  connect(&_runTimer, SIGNAL(timeout()), SLOT(slotRunTimeout()));
+  connect(&_stepTimer, SIGNAL(timeout()), SLOT(doStep()));
+}
+
+Debugger::Manager::~Manager()
+{
+  delete _coff;
+}
+
+bool Debugger::Manager::isStepping() const
+{
+  return (programmer() ? programmer()->state()==Programmer::Halted : false) && _stepTimer.isActive();
+}
+
+Debugger::Base *Debugger::Manager::debugger() const
+{
+  return (programmer() ? programmer()->debugger() : 0);
+}
+
+void Debugger::Manager::updateDevice()
+{
+  const Device::Data *data = deviceData();
+  if ( data==_data ) return;
+  _data = data;
+  Register::list().clearWatched();
+  clear();
+}
+
+bool Debugger::Manager::checkState(bool &first)
+{
+  if ( programmer()->state()==Programmer::NotConnected ) {
+    if ( !prepareDebugging() ) return false;
+    if ( !programmer()->connectHardware() ) return false;
+  }
+  first = ( debugger()->hasError() || programmer()->state()==Programmer::Stopped );
+  if (first) {
+    log(Log::LineType::Normal, "--------------------------------------------------");
+    programmer()->debugger()->setCoff(_coff);
+    if ( !programmer()->debugger()->init() ) return false;
+  }
+  return true;
+}
+
+bool Debugger::Manager::init()
+{
+  if ( !internalInit() ) return false;
+  return update(true);
+}
+
+bool Debugger::Manager::internalInit()
+{
+  clear();
+  if ( !coffUrl().exists() ) return false;
+  Log::Base log;
+  log.setView(compileView());
+  log.log(Log::LineType::Information, i18n("Parsing COFF file: %1").arg(coffUrl().pretty()));
+  _coff = new Coff::TextObject(_data, coffUrl());
+  if ( !_coff->parse(log) ) {
+    delete _coff;
+    _coff = 0;
+    return false;
+  }
+  computeBreakpointAddresses();
+  return true;
+}
+
+void Debugger::Manager::clearBreakpoints()
+{
+  Breakpoint::list().clear();
+}
+
+void Debugger::Manager::freeActiveBreakpoint()
+{
+  uint nb = 0;
+  Breakpoint::Data last;
+  for (uint i=0; i<Breakpoint::list().count(); i++) {
+    const Breakpoint::Data &data = Breakpoint::list().data(i);
+    if ( Breakpoint::list().state(data)!=Breakpoint::Active ) continue;
+    nb++;
+    last = data;
+  }
+  uint max = programmerGroup()->maxNbBreakpoints(deviceData());
+  Q_ASSERT( nb<=max && max!=0 );
+  if ( nb==max ) {
+    log(Log::LineType::Warning, i18n("The number of active breakpoints is higher than the maximum for the current debugger (%1): disabling the last breakpoint.").arg(max));
+    Breakpoint::list().setState(last, Breakpoint::Disabled);
+  }
+}
+
+BitValue Debugger::Manager::pc() const
+{
+  return (debugger() ? debugger()->pc() : BitValue());
+}
+
+Breakpoint::MarkType Debugger::Manager::breakpointType(const Breakpoint::Data &data) const
+{
+  if ( _coff==0 ) return Breakpoint::BreakpointDisabled;
+  Address address = Breakpoint::list().address(data);
+  if ( !address.isValid() ) return Breakpoint::BreakpointInvalid;
+  if ( Breakpoint::list().state(data)!=Breakpoint::Active ) return Breakpoint::BreakpointDisabled;
+  if ( address==pc() ) {
+    if ( programmer()->state()==::Programmer::Halted ) return Breakpoint::BreakpointReached;
+    return Breakpoint::ProgramCounterDisabled;
+  }
+  return Breakpoint::BreakpointActive;
+}
+
+bool Debugger::Manager::checkBreakpoint(const Breakpoint::Data &bdata, bool onlyWarn, Address &address)
+{
+  address = Address();
+  if ( _coff==0 ) return true;
+  QValueVector<Address> addresses = _coff->addresses(bdata.url, bdata.line);
+  if ( addresses.isEmpty() ) {
+    QString s = i18n("Breakpoint at non-code line.");
+    if (onlyWarn) log(Log::LineType::Warning, s);
+    else sorry(s);
+    return false;
+  }
+  if ( addresses.count()>1 ) log(Log::LineType::Warning, i18n("Breakpoint corresponds to several addresses. Using the first one."));
+  address = addresses[0];
+  return true;
+}
+
+void Debugger::Manager::computeBreakpointAddresses()
+{
+  if ( programmerGroup()==0 ) return;
+  int nb = programmerGroup()->maxNbBreakpoints(deviceData());
+  for (int i=Breakpoint::list().count()-1; i>=0; i--) {
+    const Breakpoint::Data &data = Breakpoint::list().data(i);
+    Address address;
+    checkBreakpoint(data, true, address);
+    Breakpoint::list().setAddress(data, address);
+    if ( _coff==0 ) Breakpoint::list().setState(data, Breakpoint::Unknown);
+    else if ( Breakpoint::list().address(data).isValid() && nb>0 ) {
+      Breakpoint::list().setState(data, Breakpoint::Active);
+      nb--;
+    }
+  }
+}
+
+QValueList<Address> Debugger::Manager::activeBreakpointAddresses() const
+{
+  QValueList<Address> addresses;
+  for (uint i=0; i<Breakpoint::list().count(); i++) {
+    const Breakpoint::Data &data = Breakpoint::list().data(i);
+    if ( Breakpoint::list().state(data)==Breakpoint::Active ) addresses.append(Breakpoint::list().address(data));
+  }
+  return addresses;
+}
+
+void Debugger::Manager::clear()
+{
+  _runTimer.stop();
+  _stepTimer.stop();
+  if ( programmer() ) programmer()->clear();
+  delete _coff;
+  _coff = 0;
+  _currentSourceLines.clear();
+  computeBreakpointAddresses();
+  update(true);
+}
+
+bool Debugger::Manager::update(bool gotoPC)
+{
+  _readRegisters.clear();
+  if ( !updateRegisters() ) return false;
+  if ( debugger() ) emit statusChanged(debugger()->statusString());
+  else emit statusChanged(QString::null);
+  _currentSourceLines.clear();
+  if (_coff) _currentSourceLines = _coff->sourceLinesForAddress(pc().toUInt());
+  updateView(gotoPC);
+  return true;
+}
+
+bool Debugger::Manager::updateRegister(const Register::TypeData &data)
+{
+  // read related registers
+  const Device::RegistersData *rdata = deviceData()->registersData();
+  Q_ASSERT(rdata);
+  QValueList<Register::TypeData> related = rdata->relatedRegisters(data);
+  for (uint k=0; k<uint(related.count()); k++)
+    if ( !readRegister(related[k]) ) return false;
+  // read port status
+  if ( data.type()==Register::Regular ) {
+    int index = rdata->portIndex(data.address());
+    if ( index!=-1 ) {
+      QMap<uint, Device::PortBitData> data;
+      if ( !debugger()->updatePortStatus(index, data) ) return false;
+      Register::list().setPortData(index, data);
+    }
+  }
+  return true;
+}
+
+bool Debugger::Manager::updateRegisters()
+{
+  if ( programmer()==0 || programmer()->state()!=Programmer::Halted ) return true;
+  QValueList<Register::TypeData> watched = Register::list().watched();
+  for (uint i=0; i<uint(watched.count()); i++)
+    if ( !updateRegister(watched[i]) ) return false;
+  return true;
+}
+
+bool Debugger::Manager::run()
+{
+  _stepTimer.stop();
+  _runTimer.stop();
+  bool first;
+  if ( !checkState(first) ) return false;
+  if ( !debugger()->setBreakpoints(activeBreakpointAddresses()) ) return false;
+  if ( !debugger()->run() ) return false;
+  log(Log::LineType::Information, i18n("Running..."));
+  if ( !update(true) ) return false;
+  _runTimer.start(programmer()->runUpdateWait());
+  return true;
+}
+
+bool Debugger::Manager::halt()
+{
+  _stepTimer.stop();
+  _runTimer.stop();
+  if ( !debugger()->halt() ) return false;
+  return update(true);
+}
+
+bool Debugger::Manager::reset()
+{
+  _stepTimer.stop();
+  _runTimer.stop();
+  log(Log::LineType::Normal, "--------------------------------------------------");
+  if ( !debugger()->reset() ) return false;
+  return doStep(true, false);
+}
+
+bool Debugger::Manager::checkIfContinueStepping(bool &continueStepping)
+{
+  continueStepping = false;
+  if ( !readConfigEntry(Config::OnlyStopOnSourceLine).toBool() ) return true;
+  if ( !update(false) ) return false;
+  QMap<PURL::Url, uint>::const_iterator it;
+  for (it=_currentSourceLines.begin(); it!=_currentSourceLines.end(); ++it) {
+    PURL::FileGroup group = it.key().fileType().data().group;
+    if ( group!=PURL::Source && group!=PURL::Header ) continue;
+    if ( !it.key().exists() ) continue;
+    if ( readConfigEntry(Config::OnlyStopOnProjectSourceLine).toBool() && !isProjectSource(it.key()) ) continue;
+    QValueVector<Address> addresses = _coff->addresses(it.key(), it.data());
+    qHeapSort(addresses);
+    Q_ASSERT( addresses.count()!=0 );
+    if ( pc()!=addresses[0] ) continue; // we only break if pc is on the first instruction of the source line
+    break;
+  }
+  continueStepping = ( it==_currentSourceLines.end() );
+  return true;
+}
+
+bool Debugger::Manager::doStep(bool first, bool continued)
+{
+  if ( programmer()->state()!=Programmer::Halted ) return true; // has been stopped
+  if ( continued && !_stepTimer.isActive() ) return true; // has been stopped
+  _stepTimer.stop();
+  if ( !first && !debugger()->step() ) return false;
+  bool continueStepping;
+  if ( !checkIfContinueStepping(continueStepping) ) return false;
+  if (continueStepping) _stepTimer.start(0);
+  else updateView(true);
+  return true;
+}
+
+bool Debugger::Manager::step()
+{
+  bool first;
+  if ( !checkState(first) ) return false;
+  if ( !debugger()->setBreakpoints(activeBreakpointAddresses()) ) return false;
+  log(Log::LineType::Information, i18n("Step"));
+  programmer()->setState(Programmer::Halted);
+  return doStep(first, false);
+}
+
+void Debugger::Manager::slotRunTimeout()
+{
+  if ( programmer()->state()!=Programmer::Running ) return; // has been stopped
+  if ( !_runTimer.isActive() ) return; // has been stopped
+  _runTimer.stop();
+  if ( !debugger()->update() ) return;
+  if ( programmer()->state()==Programmer::Running ) {
+    _runTimer.start(programmer()->runUpdateWait());
+    return;
+  }
+  log(Log::LineType::Information, i18n("Reached breakpoint."));
+  update(true);
+  emit targetStateChanged();
+}
+
+void Debugger::Manager::setRegisterWatched(const Register::TypeData &data, bool watched)
+{
+  if (watched) {
+    if ( Register::list().isWatched(data) ) return;
+    Register::list().setWatched(data, true);
+    if ( programmer() && programmer()->state()==Programmer::Halted ) updateRegister(data);
+  } else Register::list().setWatched(data, false);
+}
+
+bool Debugger::Manager::readRegister(const Register::TypeData &data)
+{
+  Q_ASSERT( data.type()==Register::Regular || data.type()==Register::Special );
+  if ( _readRegisters.contains(data) ) return true;
+  BitValue value;
+  if ( !debugger()->readRegister(data, value) ) return false;
+  Register::list().setValue(data, value);
+  _readRegisters.append(data);
+  return true;
+}
+
+bool Debugger::Manager::writeRegister(const Register::TypeData &data, BitValue value)
+{
+  Q_ASSERT( data.type()==Register::Regular || data.type()==Register::Special );
+  if ( !debugger()->writeRegister(data, value) ) return false;
+  _readRegisters.clear();
+  if ( !updateRegister(data) ) return false;
+  emit statusChanged(debugger()->statusString());
+  return true;
+}
+
+bool Debugger::Manager::readAllRegisters()
+{
+  const Device::RegistersData *rdata = _data->registersData();
+  for (uint i=0; i<rdata->nbRegisters(); i++) {
+    Register::TypeData rtd(rdata->addressFromIndex(i), rdata->nbChars());
+    if ( !updateRegister(rtd) ) return false;
+  }
+  return true;
+}
+
+void Debugger::Manager::stopWatchAll()
+{
+  Register::list().clearWatched();
+}
+
+bool Debugger::Manager::prepareDebugging()
+{
+  if ( programmerGroup()->isSoftware() && programmerGroup()->isDebugger() ) {
+    PURL::Url curl = coffUrl();
+    if ( curl.isEmpty() ) {
+      log(Log::LineType::Error, i18n("Cannot start debugging session without input file (not specified)."));
+      return false;
+    }
+    PURL::Url first;
+    uint i = 0;
+    for (; i<Programmer::Nb_InputFileTypes; i++) {
+      PURL::FileType type = Programmer::INPUT_FILE_TYPE_DATA[i];
+      if ( !programmerGroup()->isInputFileTypeSupported(type) ) continue;
+      PURL::Url url = curl.toFileType(type);
+      if ( first.isEmpty() ) first = url;
+      if ( !url.exists() ) continue;
+      debugger()->setupInput(type, url.directory().path(), url.filename());
+      break;
+    }
+    if ( i==Programmer::Nb_InputFileTypes ) {
+      log(Log::LineType::Error, i18n("Cannot start debugging session without input file (%1).").arg(first.pretty()));
+      return false;
+    }
+  }
+  return true;
+}
diff --git a/src/progs/manager/debug_manager.h b/src/progs/manager/debug_manager.h
new file mode 100644
index 0000000..90b8584
--- /dev/null
+++ b/src/progs/manager/debug_manager.h
@@ -0,0 +1,99 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DEBUG_MANAGER_H
+#define DEBUG_MANAGER_H
+
+#include <qtimer.h>
+
+#include "common/global/log.h"
+#include "common/global/purl.h"
+#include "common/common/storage.h"
+#include "devices/base/generic_device.h"
+#include "devices/base/register.h"
+#include "breakpoint.h"
+#include "prog_manager.h"
+#include "progs/base/generic_debug.h"
+namespace Coff { class TextObject; }
+namespace CDB { class Object; }
+
+namespace Debugger
+{
+class Manager : public QObject, public Log::Base, public GenericView
+{
+Q_OBJECT
+public:
+  Manager();
+  virtual ~Manager();
+  virtual PURL::Url coffUrl() const = 0;
+  virtual const Programmer::Group *programmerGroup() const = 0;
+  Programmer::Base *programmer() const { return Programmer::manager->programmer(); }
+  virtual const Device::Data *deviceData() const = 0;
+  Debugger::Base *debugger() const;
+  virtual void updateDevice();
+  bool prepareDebugging();
+  bool init();
+  const Coff::TextObject *coff() const { return _coff; }
+  virtual void clear();
+  Breakpoint::MarkType breakpointType(const Breakpoint::Data &data) const;
+  bool run();
+  bool halt();
+  bool reset();
+  bool step();
+  bool readRegister(const Register::TypeData &data);
+  bool writeRegister(const Register::TypeData &data, BitValue value);
+  BitValue pc() const;
+  bool isStepping() const;
+
+public slots:
+  void clearBreakpoints();
+  virtual bool update(bool gotoPC);
+  void setRegisterWatched(const Register::TypeData &data, bool watched);
+  bool readAllRegisters();
+  void stopWatchAll();
+
+signals:
+  void statusChanged(const QString &text);
+  void targetStateChanged();
+  void actionMessage(const QString &text);
+
+protected:
+  Coff::TextObject      *_coff;
+  QMap<PURL::Url, uint>  _currentSourceLines;
+
+  void freeActiveBreakpoint();
+  bool checkBreakpoint(const Breakpoint::Data &bdata, bool onlyWarn, Address &address);
+  bool updateRegisters();
+  virtual bool internalInit();
+  virtual bool checkState(bool &first);
+  virtual Log::View *compileView() = 0;
+  virtual bool isProjectSource(const PURL::Url &url) const = 0;
+  virtual bool checkIfContinueStepping(bool &continueStepping);
+
+private slots:
+  void slotRunTimeout();
+  bool doStep(bool first = false, bool continued = true);
+
+private:
+  const Device::Data *_data;
+  QTimer _runTimer, _stepTimer;
+  QValueList<Register::TypeData> _readRegisters;
+
+  void computeBreakpointAddresses();
+  QValueList<Address> activeBreakpointAddresses() const;
+  void updateBreakpointsDisplay();
+  virtual void updateView() { updateView(false); }
+  virtual void updateView(bool gotoPC) = 0;
+  bool updateRegister(const Register::TypeData &data);
+};
+
+extern Manager *manager;
+
+} // namespace
+
+#endif
diff --git a/src/progs/manager/manager.pro b/src/progs/manager/manager.pro
new file mode 100644
index 0000000..44b80d0
--- /dev/null
+++ b/src/progs/manager/manager.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = progmanager
+HEADERS += breakpoint.h prog_manager.h debug_manager.h
+SOURCES += breakpoint.cpp prog_manager.cpp debug_manager.cpp
diff --git a/src/progs/manager/prog_manager.cpp b/src/progs/manager/prog_manager.cpp
new file mode 100644
index 0000000..bc824c9
--- /dev/null
+++ b/src/progs/manager/prog_manager.cpp
@@ -0,0 +1,217 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "prog_manager.h"
+
+#include "progs/base/generic_prog.h"
+#include "progs/base/prog_group.h"
+#include "progs/base/generic_debug.h"
+#include "progs/base/prog_config.h"
+#include "debug_manager.h"
+
+//----------------------------------------------------------------------------
+Programmer::Manager *Programmer::manager = 0;
+
+Programmer::Manager::Manager(QObject *parent)
+  : QObject(parent, "programmer_manager"), _programmer(0)
+{}
+
+Programmer::Manager::~Manager()
+{
+  delete _programmer;
+}
+
+void Programmer::Manager::clear()
+{
+  delete _programmer;
+  _programmer = 0;
+}
+
+void Programmer::Manager::createProgrammer(const Device::Data *data, const HardwareDescription &hd)
+{
+  if ( _programmer && _programmer->device()==data && !hasError() ) return;
+  delete _programmer;
+  _programmer = group().createProgrammer(isTargetSelfPowered(), data, hd);
+  _programmer->Log::Base::setParent(this);
+  connect(_programmer, SIGNAL(actionMessage(const QString &)), SIGNAL(actionMessage(const QString &)));
+  connect(&_programmer->progressMonitor(), SIGNAL(setLabel(const QString &)), SIGNAL(actionMessage(const QString &)));
+  connect(&_programmer->progressMonitor(), SIGNAL(setTotalProgress(uint)), SIGNAL(setTotalProgress(uint)));
+  connect(&_programmer->progressMonitor(), SIGNAL(setProgress(uint)), SIGNAL(setProgress(uint)));
+  connect(&_programmer->progressMonitor(), SIGNAL(showProgress(bool)), SIGNAL(showProgress(bool)));
+}
+
+bool Programmer::Manager::initProgramming(bool debugging)
+{
+  if ( !internalInitProgramming(debugging) ) return false;
+  setState(Programming);
+  return true;
+}
+
+bool Programmer::Manager::internalInitProgramming(bool)
+{
+  if ( device()==0 ) {
+    sorry(i18n("You need to specify the device for programming."));
+    return false;
+  }
+  if ( !group().isSupported(device()->name()) ) {
+    if ( group().isSoftware() && group().supportedDevices().isEmpty() )
+      sorry(i18n("Could not detect supported devices for \"%1\". Please check installation.").arg(group().label()));
+    else sorry(i18n("The current programmer \"%1\" does not support device \"%2\".").arg(group().label()).arg(device()->name()));
+    return false;
+  }
+  createProgrammer(device());
+  return true;
+}
+
+void Programmer::Manager::endProgramming()
+{
+  ::Debugger::manager->update(true);
+  setState(Idle);
+}
+
+bool Programmer::Manager::program(const Device::Memory &memory, const Device::MemoryRange &range)
+{
+  if ( !initProgramming(false) ) return false;
+  bool ok = _programmer->program(memory, range);
+  endProgramming();
+  if ( ok && !group().isDebugger() && readConfigEntry(Config::RunAfterProgram).toBool() ) return run();
+  return ok;
+}
+
+bool Programmer::Manager::verify(const Device::Memory &memory, const Device::MemoryRange &range)
+{
+  if ( !initProgramming(false) ) return false;
+  bool ok = _programmer->verify(memory, range);
+  endProgramming();
+  return ok;
+}
+
+bool Programmer::Manager::read(Device::Memory &memory, const Device::MemoryRange &range)
+{
+  if ( !initProgramming(false) ) return false;
+  bool ok = _programmer->read(memory, range);
+  endProgramming();
+  return ok;
+}
+
+bool Programmer::Manager::erase(const Device::MemoryRange &range)
+{
+  if ( !initProgramming(false) ) return false;
+  bool ok = _programmer->erase(range);
+  endProgramming();
+  return ok;
+}
+
+bool Programmer::Manager::blankCheck(const Device::MemoryRange &range)
+{
+  if ( !initProgramming(false) ) return false;
+  bool ok = _programmer->blankCheck(range);
+  endProgramming();
+  return ok;
+}
+
+bool Programmer::Manager::connectDevice()
+{
+  if ( !initProgramming(false) ) return false;
+  _programmer->disconnectHardware();
+  bool ok = ::Debugger::manager->prepareDebugging();
+  if (ok) ok = _programmer->connectDevice();
+  if ( ok && group().isSoftware() && group().isDebugger() ) {
+    ok = _programmer->debugger()->init();
+    if (ok) ::Debugger::manager->update(true);
+  }
+  endProgramming();
+  return ok;
+}
+
+bool Programmer::Manager::setDevicePower(bool on)
+{
+  if ( !initProgramming(false) ) return false;
+  bool ok = true;
+  if ( _programmer->isTargetSelfPowered() )
+    sorry(i18n("Cannot toggle target power since target is self-powered."), QString::null);
+  else {
+    emit actionMessage(i18n("Toggle Device Power..."));
+    ok = _programmer->setTargetPowerOn(on);
+  }
+  endProgramming();
+  return ok;
+}
+
+bool Programmer::Manager::disconnectDevice()
+{
+  ::Debugger::manager->clear();
+  emit actionMessage(i18n("Disconnecting..."));
+  bool debugger = group().isDebugger();
+  _programmer->setTargetPowerOn(false);
+  _programmer->disconnectHardware();
+  endProgramming();
+  if (debugger) log(Log::LineType::Information, i18n("Stopped."));
+  return true;
+}
+
+bool Programmer::Manager::run()
+{
+  bool debugger = group().isDebugger();
+  if ( !initProgramming(debugger) ) return false;
+  bool ok = (debugger ? ::Debugger::manager->run() : _programmer->run());
+  setState(Idle);
+  return ok;
+}
+
+bool Programmer::Manager::halt()
+{
+  bool debugger = group().isDebugger();
+  bool ok = (debugger ? ::Debugger::manager->halt() : _programmer->stop());
+  if (debugger) setState(Idle);
+  else {
+    endProgramming();
+    log(Log::LineType::Information, i18n("Stopped."));
+  }
+  return ok;
+}
+
+void Programmer::Manager::stop()
+{
+  if (_programmer) _programmer->disconnectHardware();
+}
+
+bool Programmer::Manager::restart()
+{
+  bool ok;
+  if (group().isDebugger()) {
+    if ( _programmer==0 || _programmer->state()==::Programmer::NotConnected
+         || _programmer->state()==::Programmer::Stopped ) return step();
+    if ( !initProgramming(true) ) return false;
+    ok = ::Debugger::manager->reset();
+    log(Log::LineType::Information, i18n("Reset.<Translators: please translate the past form of the verb>", "Reset."));
+    setState(Idle);
+  } else {
+    log(Log::LineType::Information, i18n("Restarting..."));
+    ok = _programmer->stop();
+    Port::msleep(200);
+    if (ok) ok = _programmer->run();
+    endProgramming();
+  }
+  return ok;
+}
+
+bool Programmer::Manager::step()
+{
+  if ( !initProgramming(true) ) return false;
+  bool ok = ::Debugger::manager->step();
+  setState(Idle);
+  return ok;
+}
+
+bool Programmer::Manager::isTargetSelfPowered() const
+{
+  if ( group().targetPowerMode()==TargetPowerModeFromConfig ) return readConfigEntry(Config::TargetSelfPowered).toBool();
+  return ( group().targetPowerMode()==TargetSelfPowered );
+}
diff --git a/src/progs/manager/prog_manager.h b/src/progs/manager/prog_manager.h
new file mode 100644
index 0000000..11f7401
--- /dev/null
+++ b/src/progs/manager/prog_manager.h
@@ -0,0 +1,74 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PROG_MANAGER_H
+#define PROG_MANAGER_H
+
+#include <qobject.h>
+
+#include "common/global/log.h"
+namespace Device { class Data; class Memory; class MemoryRange; }
+namespace Port { class Description; }
+
+namespace Programmer
+{
+class Base;
+class Group;
+class HardwareDescription;
+
+class Manager : public QObject, public Log::Base
+{
+Q_OBJECT
+public:
+  Manager(QObject *parent);
+  virtual ~Manager();
+  ::Programmer::Base *programmer() { return _programmer; }
+  virtual void createProgrammer(const Device::Data *data) = 0;
+  bool initProgramming(bool debugging);
+  void endProgramming();
+  void clear();
+  void stop();
+  bool program(const Device::Memory &memory, const Device::MemoryRange &range);
+  bool verify(const Device::Memory &memory, const Device::MemoryRange &range);
+  bool read(Device::Memory &memory, const Device::MemoryRange &range);
+  bool erase(const Device::MemoryRange &range);
+  bool blankCheck(const Device::MemoryRange &range);
+  bool setDevicePower(bool on);
+  enum State { Idle, Programming };
+  virtual void setState(State state) = 0;
+
+public slots:
+  bool connectDevice();
+  bool disconnectDevice();
+  bool run();
+  bool halt();
+  bool restart();
+  bool step();
+
+signals:
+  void actionMessage(const QString &message);
+  void showProgress(bool show);
+  void setTotalProgress(uint steps);
+  void setProgress(uint steps);
+
+protected:
+  ::Programmer::Base *_programmer;
+
+  virtual const Group &group() const = 0;
+  virtual bool internalInitProgramming(bool debugging);
+  virtual const Device::Data *device() const = 0;
+  virtual bool isTargetSelfPowered() const;
+  virtual void createProgrammer(const Device::Data *data, const HardwareDescription &hd);
+};
+
+extern Manager *manager;
+
+} // namespace
+
+#endif
diff --git a/src/progs/picdem_bootloader/Makefile.am b/src/progs/picdem_bootloader/Makefile.am
new file mode 100644
index 0000000..fccf96d
--- /dev/null
+++ b/src/progs/picdem_bootloader/Makefile.am
@@ -0,0 +1,3 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+SUBDIRS = xml base gui
diff --git a/src/progs/picdem_bootloader/base/Makefile.am b/src/progs/picdem_bootloader/base/Makefile.am
new file mode 100644
index 0000000..13a3add
--- /dev/null
+++ b/src/progs/picdem_bootloader/base/Makefile.am
@@ -0,0 +1,11 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libpicdembootloader.la
+libpicdembootloader_la_SOURCES = picdem_bootloader_data.cpp picdem_bootloader.cpp picdem_bootloader_prog.cpp
+libpicdembootloader_la_DEPENDENCIES = picdem_bootloader_data.cpp
+
+noinst_DATA = picdem_bootloader.xml
+picdem_bootloader_data.cpp: ../xml/xml_picdem_bootloader_parser picdem_bootloader.xml
+	../xml/xml_picdem_bootloader_parser
+CLEANFILES = picdem_bootloader_data.cpp
diff --git a/src/progs/picdem_bootloader/base/base.pro b/src/progs/picdem_bootloader/base/base.pro
new file mode 100644
index 0000000..8551799
--- /dev/null
+++ b/src/progs/picdem_bootloader/base/base.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = picdem_bootloader
+HEADERS += picdem_bootloader.h picdem_bootloader_prog.h picdem_bootloader_data.h
+SOURCES += picdem_bootloader.cpp picdem_bootloader_prog.cpp picdem_bootloader_data.cpp
diff --git a/src/progs/picdem_bootloader/base/picdem_bootloader.cpp b/src/progs/picdem_bootloader/base/picdem_bootloader.cpp
new file mode 100644
index 0000000..f22eecb
--- /dev/null
+++ b/src/progs/picdem_bootloader/base/picdem_bootloader.cpp
@@ -0,0 +1,184 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "picdem_bootloader.h"
+
+#include "progs/icd2/base/microchip.h"
+
+//-----------------------------------------------------------------------------
+uint PicdemBootloader::Config::readVendorId()
+{
+  Config config;
+  return qMin(config.readUIntEntry("vendor_id", Microchip::VENDOR_ID), uint(0xFFFF));
+}
+void PicdemBootloader::Config::writeVendorId(uint id)
+{
+  Config config;
+  config.writeEntry("vendor_id", id);
+}
+
+uint PicdemBootloader::Config::readProductId()
+{
+  Config config;
+  return qMin(config.readUIntEntry("product_id", 0x000B), uint(0xFFFF));
+}
+void PicdemBootloader::Config::writeProductId(uint id)
+{
+  Config config;
+  config.writeEntry("product_id", id);
+}
+
+//-----------------------------------------------------------------------------
+PicdemBootloader::Port::Port(Log::Base &log)
+  : Port::USB(log, Config::readVendorId(), Config::readProductId(), 1, 0)
+{}
+
+bool PicdemBootloader::Port::receive(uint nb, QMemArray<uchar> &data)
+{
+  data.resize(nb);
+  if ( !read(0x81, (char *)data.data(), nb) ) return false;
+  log(Log::DebugLevel::Max, QString("received: \"%1\"").arg(toPrintable(data, PrintEscapeAll)));
+  return true;
+}
+
+bool PicdemBootloader::Port::send(const QMemArray<uchar> &cmd)
+{
+  log(Log::DebugLevel::Extra, QString("send: \"%1\"").arg(toPrintable(cmd, PrintEscapeAll)));
+  return write(0x01, (const char *)cmd.data(), cmd.count());
+}
+
+bool PicdemBootloader::Port::sendAndReceive(QMemArray<uchar> &data, uint nb)
+{
+  if ( !send(data) ) return false;
+  return receive(nb, data);
+}
+
+QMemArray<uchar> PicdemBootloader::Port::command(uchar instruction, uint address, uint len, uint nb) const
+{
+  QMemArray<uchar> cmd(5+nb);
+  cmd[0] = instruction;
+  cmd[1] = len;
+  cmd[2] = address & 0xFF;
+  cmd[3] = (address >> 8) & 0xFF;
+  cmd[4] = (address >> 16) & 0xFF;
+  return cmd;
+}
+
+//-----------------------------------------------------------------------------
+PicdemBootloader::Hardware::Hardware(::Programmer::Base &base)
+  : Bootloader::Hardware(base, new Port(base))
+{}
+
+bool PicdemBootloader::Hardware::internalConnectHardware()
+{
+  if ( !openPort() ) return false;
+  QMemArray<uchar> cmd(5);
+  cmd.fill(0);
+  if ( !port().sendAndReceive(cmd, 4) ) return false;
+  VersionData version(cmd[3], cmd[2], 0);
+  log(Log::LineType::Information, i18n("Bootloader version %1 detected").arg(version.pretty()));
+  if ( version.majorNum()!=1 ) {
+    log(Log::LineType::Error, i18n("Only bootloader version 1.x is supported"));
+    return false;
+  }
+  return true;
+}
+
+uchar PicdemBootloader::Hardware::writeInstruction(Pic::MemoryRangeType type)
+{
+  switch (type.type()) {
+    case Pic::MemoryRangeType::Code: return 0x02;
+    case Pic::MemoryRangeType::Eeprom: return 0x05;
+    case Pic::MemoryRangeType::UserId: return 0x07;
+    default: Q_ASSERT(false); break;
+  }
+  return 0x00;
+}
+
+bool PicdemBootloader::Hardware::write(Pic::MemoryRangeType type, const Device::Array &data)
+{
+  Q_ASSERT( data.count()==device().nbWords(type) );
+  if ( type==Pic::MemoryRangeType::Code ) { // check that there is nothing in bootloader reserved area
+    for (uint i=0; i<data.count(); i++) {
+      if ( i>=0x400 ) continue;
+      if ( data[i]==device().mask(Pic::MemoryRangeType::Code) ) continue;
+      uint address = device().addressIncrement(Pic::MemoryRangeType::Code) * i;
+      log(Log::LineType::Warning, "  " + i18n("Code is present in bootloader reserved area (at address %1). It will be ignored.").arg(toHexLabel(address, device().nbCharsAddress())));
+      break;
+    }
+  }
+  uint nbBytesWord = device().nbBytesWord(type);
+  uint nbBytes = nbBytesWord * device().nbWords(type);
+  uint offset = (type==Pic::MemoryRangeType::Code ? 0x0800 : 0x00);
+  for (; offset<nbBytes; offset+=16) {
+    QMemArray<uchar> cmd = port().command(0x02, device().range(type).start.toUInt() + offset, 16, 16);
+    for (uint k=0; k<16; k += nbBytesWord) {
+      uint index = (offset + k) / nbBytesWord;
+      cmd[5 + k] = data[index].byte(0);
+      if ( nbBytesWord==2 ) cmd[5 + k+1] = data[index].byte(1);
+    }
+    if ( !port().sendAndReceive(cmd, 1) ) return false;
+  }
+  return true;
+}
+
+uchar PicdemBootloader::Hardware::readInstruction(Pic::MemoryRangeType type)
+{
+  switch (type.type()) {
+    case Pic::MemoryRangeType::Code: return 0x01;
+    case Pic::MemoryRangeType::Eeprom: return 0x04;
+    case Pic::MemoryRangeType::Config:
+    case Pic::MemoryRangeType::DeviceId:
+    case Pic::MemoryRangeType::UserId: return 0x06;
+    default: Q_ASSERT(false); break;
+  }
+  return 0x00;
+}
+
+bool PicdemBootloader::Hardware::read(Pic::MemoryRangeType type, Device::Array &data, const ::Programmer::VerifyData *vdata)
+{
+  data.resize(device().nbWords(type));
+  Device::Array varray;
+  if (vdata) varray = static_cast<const Pic::Memory &>(vdata->memory).arrayForWriting(type);
+  uint nbBytesWord = device().nbBytesWord(type);
+  uint nbBytes = nbBytesWord * device().nbWords(type);
+  uint nb = QMIN(uint(16), nbBytes);
+  for (uint offset=0; offset<nbBytes; offset+=16) {
+    QMemArray<uchar> cmd = port().command(readInstruction(type), device().range(type).start.toUInt() + offset, nb, 0);
+    if ( !port().sendAndReceive(cmd, 5+nb) ) return false;
+    for (uint k=0; k<nb; k += nbBytesWord) {
+      uint index = (offset + k) / nbBytesWord;
+      data[index]= cmd[5 + k] & 0xFF;
+      if ( nbBytesWord==2 ) data[index] |= (cmd[5 + k+1] << 8);
+      if ( vdata && index>=0x0800 && data[index]!=varray[index] ) {
+        log(Log::LineType::Error, i18n("Device memory does not match hex file (at address 0x%2: reading 0x%3 and expecting 0x%4).")
+                    .arg(QString(toHex(index/2, device().nbCharsAddress())))
+                    .arg(QString(toHex(data[index], device().nbCharsWord(type))))
+                    .arg(QString(toHex(varray[index], device().nbCharsWord(type)))));
+         return false;
+      }
+    }
+  }
+  return true;
+}
+
+bool PicdemBootloader::Hardware::erase(Pic::MemoryRangeType type)
+{
+  if ( type==Pic::MemoryRangeType::Eeprom ) {
+    Pic::Memory memory(device());
+    Device::Array data = memory.arrayForWriting(Pic::MemoryRangeType::Eeprom);
+    return write(Pic::MemoryRangeType::Eeprom, data);
+  }
+  uint nbBytesWord = device().nbBytesWord(type);
+  uint nbBytes = nbBytesWord * device().nbWords(type);
+  for (uint offset=0x0800; offset<nbBytes; offset+=64) {
+    QMemArray<uchar> cmd = port().command(0x03, device().range(type).start.toUInt() + offset, 1, 0);
+    if ( !port().sendAndReceive(cmd, 1) ) return false;
+  }
+  return true;
+}
diff --git a/src/progs/picdem_bootloader/base/picdem_bootloader.h b/src/progs/picdem_bootloader/base/picdem_bootloader.h
new file mode 100644
index 0000000..3081382
--- /dev/null
+++ b/src/progs/picdem_bootloader/base/picdem_bootloader.h
@@ -0,0 +1,72 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICDEM_BOOTLOADER_H
+#define PICDEM_BOOTLOADER_H
+
+#include "progs/bootloader/base/bootloader.h"
+#include "common/port/usb_port.h"
+
+namespace PicdemBootloader
+{
+//-----------------------------------------------------------------------------
+class Config : public GenericConfig
+{
+public:
+  static uint readVendorId();
+  static void writeVendorId(uint id);
+  static uint readProductId();
+  static void writeProductId(uint id);
+
+private:
+  Config() : GenericConfig("picdem_bootloader") {}
+};
+
+//-----------------------------------------------------------------------------
+class Port : public ::Port::USB
+{
+public:
+  Port(Log::Base &base);
+  bool receive(uint nb, QMemArray<uchar> &array);
+  bool send(const QMemArray<uchar> &array);
+  bool sendAndReceive(QMemArray<uchar> &data, uint nb);
+  QMemArray<uchar> command(uchar instruction, uint address, uint len, uint nb) const;
+};
+
+//-----------------------------------------------------------------------------
+class Hardware : public Bootloader::Hardware
+{
+public:
+  Hardware(::Programmer::Base &base);
+  Port &port() { return static_cast<Port &>(*_port); }
+  virtual bool write(Pic::MemoryRangeType type, const Device::Array &data);
+  virtual bool read(Pic::MemoryRangeType type, Device::Array &data, const ::Programmer::VerifyData *vdata);
+  virtual bool erase(Pic::MemoryRangeType type);
+  virtual bool internalConnectHardware();
+
+private:
+  static uchar readInstruction(Pic::MemoryRangeType type);
+  static uchar writeInstruction(Pic::MemoryRangeType type);
+};
+
+//-----------------------------------------------------------------------------
+class DeviceSpecific : public Bootloader::DeviceSpecific
+{
+public:
+  DeviceSpecific(::Programmer::Base &base) : Bootloader::DeviceSpecific(base) {}
+  virtual bool canEraseAll() const { return true; }
+  virtual bool canEraseRange(Pic::MemoryRangeType type) const { return ( type==Pic::MemoryRangeType::Eeprom || type==Pic::MemoryRangeType::Code ); }
+  virtual bool canReadRange(Pic::MemoryRangeType) const { return true; }
+  virtual bool canWriteRange(Pic::MemoryRangeType type) const { return ( type==Pic::MemoryRangeType::Eeprom || type==Pic::MemoryRangeType::Code ); }
+  virtual bool doEraseRange(Pic::MemoryRangeType type) { return static_cast<Hardware &>(hardware()).erase(type); }
+  virtual bool doErase(bool) { return doEraseRange(Pic::MemoryRangeType::Code) && doEraseRange(Pic::MemoryRangeType::Eeprom); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/picdem_bootloader/base/picdem_bootloader.xml b/src/progs/picdem_bootloader/base/picdem_bootloader.xml
new file mode 100644
index 0000000..1cbfecb
--- /dev/null
+++ b/src/progs/picdem_bootloader/base/picdem_bootloader.xml
@@ -0,0 +1,16 @@
+<!-- ************************************************************************* -->
+<!-- * Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  * -->
+<!-- *                                                                       * -->
+<!-- * This program is free software; you can redistribute it and/or modify  * -->
+<!-- * it under the terms of the GNU General Public License as published by  * -->
+<!-- * the Free Software Foundation; either version 2 of the License, or     * -->
+<!-- * (at your option) any later version.                                   * -->
+<!-- *************************************************************************/-->
+<!DOCTYPE piklab>
+
+<type name="picdem_bootloader">
+  <device name="18F2455" family="generic" id="0x00" />
+  <device name="18F2550" family="generic" id="0x00" />
+  <device name="18F4455" family="generic" id="0x00" />
+  <device name="18F4550" family="generic" id="0x00" />
+</type>
diff --git a/src/progs/picdem_bootloader/base/picdem_bootloader_data.h b/src/progs/picdem_bootloader/base/picdem_bootloader_data.h
new file mode 100644
index 0000000..bf2a40f
--- /dev/null
+++ b/src/progs/picdem_bootloader/base/picdem_bootloader_data.h
@@ -0,0 +1,19 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICDEM_BOOTLOADER_DATA_H
+#define PICDEM_BOOTLOADER_DATA_H
+
+namespace PicdemBootloader
+{
+  struct Data {};
+  extern bool isSupported(const QString &device);
+  extern const Data &data(const QString &device);
+} // namespace
+
+#endif
diff --git a/src/progs/picdem_bootloader/base/picdem_bootloader_prog.cpp b/src/progs/picdem_bootloader/base/picdem_bootloader_prog.cpp
new file mode 100644
index 0000000..72fc384
--- /dev/null
+++ b/src/progs/picdem_bootloader/base/picdem_bootloader_prog.cpp
@@ -0,0 +1,14 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "picdem_bootloader_prog.h"
+
+//-----------------------------------------------------------------------------
+PicdemBootloader::ProgrammerBase::ProgrammerBase(const Programmer::Group &group, const Pic::Data *data)
+  : Bootloader::ProgrammerBase(group, data, "picdem_bootloader_programmer_base")
+{}
diff --git a/src/progs/picdem_bootloader/base/picdem_bootloader_prog.h b/src/progs/picdem_bootloader/base/picdem_bootloader_prog.h
new file mode 100644
index 0000000..698d612
--- /dev/null
+++ b/src/progs/picdem_bootloader/base/picdem_bootloader_prog.h
@@ -0,0 +1,46 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICDEM_BOOTLOADER_PROG_H
+#define PICDEM_BOOTLOADER_PROG_H
+
+#include "progs/bootloader/base/bootloader_prog.h"
+#include "picdem_bootloader.h"
+
+namespace PicdemBootloader
+{
+
+//-----------------------------------------------------------------------------
+class ProgrammerBase : public Bootloader::ProgrammerBase
+{
+Q_OBJECT
+public:
+  ProgrammerBase(const Programmer::Group &group, const Pic::Data *data);
+};
+
+//-----------------------------------------------------------------------------
+class Group : public ::Bootloader::Group
+{
+public:
+  virtual QString name() const { return "picdem_bootloader"; }
+  virtual QString label() const { return i18n("Picdem Bootloader"); }
+  virtual ::Programmer::Properties properties() const { return ::Programmer::Programmer | ::Programmer::CanReadMemory; }
+  virtual ::Programmer::TargetPowerMode targetPowerMode() const { return ::Programmer::TargetSelfPowered; }
+  virtual bool isPortSupported(PortType type) const { return type==PortType::USB; }
+  virtual bool canReadVoltage(Pic::VoltageType) const { return false; }
+
+protected:
+  virtual void initSupported();
+  virtual ::Programmer::Base *createBase(const Device::Data *data) const { return new ProgrammerBase(*this, static_cast<const Pic::Data *>(data)); }
+  virtual ::Programmer::Hardware *createHardware(::Programmer::Base &base, const ::Programmer::HardwareDescription &) const { return new Hardware(base); }
+  virtual ::Programmer::DeviceSpecific *createDeviceSpecific(::Programmer::Base &base) const { return new DeviceSpecific(base); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/picdem_bootloader/gui/Makefile.am b/src/progs/picdem_bootloader/gui/Makefile.am
new file mode 100644
index 0000000..57d10bb
--- /dev/null
+++ b/src/progs/picdem_bootloader/gui/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libpicdembootloaderui.la
+libpicdembootloaderui_la_LDFLAGS = $(all_libraries)
+libpicdembootloaderui_la_SOURCES = picdem_bootloader_ui.cpp
diff --git a/src/progs/picdem_bootloader/gui/picdem_bootloader_ui.cpp b/src/progs/picdem_bootloader/gui/picdem_bootloader_ui.cpp
new file mode 100644
index 0000000..c958249
--- /dev/null
+++ b/src/progs/picdem_bootloader/gui/picdem_bootloader_ui.cpp
@@ -0,0 +1,48 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "picdem_bootloader_ui.h"
+
+#include "progs/picdem_bootloader/base/picdem_bootloader.h"
+
+//-----------------------------------------------------------------------------
+PicdemBootloader::ConfigWidget::ConfigWidget(const ::Programmer::Group &group, QWidget *parent)
+  : ::Programmer::ConfigWidget(group, parent)
+{
+  uint row = numRows();
+
+  QLabel *label = new QLabel(i18n("USB Vendor Id:"), this);
+  addWidget(label, row,row, 0,0);
+  _vendorId = new HexWordEditor(4, this);
+  addWidget(_vendorId, row,row, 1,1);
+  row++;
+
+  label = new QLabel(i18n("USB Product Id:"), this);
+  addWidget(label, row,row, 0,0);
+  _productId = new HexWordEditor(4, this);
+  addWidget(_productId, row,row, 1,1);
+  row++;
+}
+
+void PicdemBootloader::ConfigWidget::saveConfig()
+{
+  Config::writeVendorId(_vendorId->value().toUInt());
+  Config::writeProductId(_productId->value().toUInt());
+}
+
+void PicdemBootloader::ConfigWidget::loadConfig()
+{
+  _vendorId->setValue(Config::readVendorId());
+  _productId->setValue(Config::readProductId());
+}
+
+//-----------------------------------------------------------------------------
+::Programmer::ConfigWidget *PicdemBootloader::GroupUI::createConfigWidget(QWidget *parent) const
+{
+  return new ConfigWidget(static_cast<const ::Programmer::Group &>(group()), parent);
+}
diff --git a/src/progs/picdem_bootloader/gui/picdem_bootloader_ui.h b/src/progs/picdem_bootloader/gui/picdem_bootloader_ui.h
new file mode 100644
index 0000000..50777af
--- /dev/null
+++ b/src/progs/picdem_bootloader/gui/picdem_bootloader_ui.h
@@ -0,0 +1,37 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICDEM_BOOTLOADER_UI_H
+#define PICDEM_BOOTLOADER_UI_H
+
+#include "progs/bootloader/gui/bootloader_ui.h"
+
+namespace PicdemBootloader
+{
+//----------------------------------------------------------------------------
+class ConfigWidget: public ::Programmer::ConfigWidget
+{
+Q_OBJECT
+public:
+  ConfigWidget(const ::Programmer::Group &group, QWidget *parent);
+  virtual void loadConfig();
+  virtual void saveConfig();
+
+private:
+  HexWordEditor *_vendorId, *_productId;
+};
+
+//----------------------------------------------------------------------------
+class GroupUI : public ::Bootloader::GroupUI
+{
+public:
+  virtual ::Programmer::ConfigWidget *createConfigWidget(QWidget *parent) const;
+};
+} // namespace
+
+#endif
diff --git a/src/progs/picdem_bootloader/picdem_bootloader.pro b/src/progs/picdem_bootloader/picdem_bootloader.pro
new file mode 100644
index 0000000..60ac0f5
--- /dev/null
+++ b/src/progs/picdem_bootloader/picdem_bootloader.pro
@@ -0,0 +1,2 @@
+TEMPLATE = subdirs
+SUBDIRS = xml base
diff --git a/src/progs/picdem_bootloader/xml/Makefile.am b/src/progs/picdem_bootloader/xml/Makefile.am
new file mode 100644
index 0000000..5ed38e6
--- /dev/null
+++ b/src/progs/picdem_bootloader/xml/Makefile.am
@@ -0,0 +1,14 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_PROGRAMS = xml_picdem_bootloader_parser
+xml_picdem_bootloader_parser_SOURCES = xml_picdem_bootloader_parser.cpp
+OBJECTS = $(top_builddir)/src/devices/list/libdevicelistnoui.la \
+          $(top_builddir)/src/devices/pic/pic/libpic.la $(top_builddir)/src/devices/pic/base/libpicbase.la \
+          $(top_builddir)/src/devices/pic/xml_data/libpicxml.la \
+          $(top_builddir)/src/devices/mem24/mem24/libmem24.la $(top_builddir)/src/devices/mem24/base/libmem24base.la \
+          $(top_builddir)/src/devices/mem24/xml_data/libmem24xml.la \
+          $(top_builddir)/src/xml_to_data/libxmltodata.la $(top_builddir)/src/devices/base/libdevicebase.la \
+          $(top_builddir)/src/common/common/libcommon.la
+xml_picdem_bootloader_parser_DEPENDENCIES = $(OBJECTS)
+xml_picdem_bootloader_parser_LDADD = $(OBJECTS) $(LIB_KDECORE)
diff --git a/src/progs/picdem_bootloader/xml/xml.pro b/src/progs/picdem_bootloader/xml/xml.pro
new file mode 100644
index 0000000..4e2eb15
--- /dev/null
+++ b/src/progs/picdem_bootloader/xml/xml.pro
@@ -0,0 +1,17 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/app.pro)
+
+TARGET   = xml_picdem_bootloader_parser
+SOURCES += xml_picdem_bootloader_parser.cpp
+LIBS    += ../../../devices/list/libdevicelist.a \
+           ../../../devices/mem24/mem24/libmem24.a ../../../devices/mem24/xml_data/libmem24xml.a \
+           ../../../devices/mem24/base/libmem24base.a \
+           ../../../devices/pic/pic/libpic.a ../../../devices/pic/xml_data/libpicxml.a \
+           ../../../devices/pic/base/libpicbase.a ../../../xml_to_data/libxmltodata.a \
+           ../../../devices/base/libdevicebase.a ../../../common/global/libglobal.a \
+           ../../../common/nokde/libnokde.a ../../../common/common/libcommon.a
+
+unix:QMAKE_POST_LINK = cd ../base && ../xml/xml_picdem_bootloader_parser
+unix:QMAKE_CLEAN += ../base/picdem_bootloader_data.cpp
+win32:QMAKE_POST_LINK = cd ..\base && ..\xml\xml_picdem_bootloader_parser.exe
+win32:QMAKE_CLEAN += ..\base\picdem_bootloader_data.cpp
diff --git a/src/progs/picdem_bootloader/xml/xml_picdem_bootloader_parser.cpp b/src/progs/picdem_bootloader/xml/xml_picdem_bootloader_parser.cpp
new file mode 100644
index 0000000..745b6a0
--- /dev/null
+++ b/src/progs/picdem_bootloader/xml/xml_picdem_bootloader_parser.cpp
@@ -0,0 +1,39 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "xml_to_data/prog_xml_to_data.h"
+
+#include "progs/picdem_bootloader/base/picdem_bootloader_data.h"
+#include "devices/base/device_group.h"
+#include "devices/pic/base/pic.h"
+
+//-----------------------------------------------------------------------------
+namespace PicdemBootloader
+{
+
+class XmlToData : public Programmer::XmlToData<Data>
+{
+public:
+  XmlToData() : Programmer::XmlToData<Data>("picdem_bootloader", "PicdemBootloader") {}
+
+private:
+  virtual void parseData(QDomElement element, Data &data);
+};
+
+void PicdemBootloader::XmlToData::parseData(QDomElement, Data &)
+{
+  const Device::Data *ddata = Device::lister().data(currentDevice());
+  if ( ddata->group().name()!="pic" ) qFatal("non-pic device not supported");
+  const Pic::Data *pdata = static_cast<const Pic::Data *>(ddata);
+  if ( !pdata->hasFeature(Pic::Feature::USB) ) qFatal("device does not have USB");
+}
+
+} // namespace
+
+//-----------------------------------------------------------------------------
+XML_MAIN(PicdemBootloader::XmlToData)
diff --git a/src/progs/pickit1/Makefile.am b/src/progs/pickit1/Makefile.am
new file mode 100644
index 0000000..fccf96d
--- /dev/null
+++ b/src/progs/pickit1/Makefile.am
@@ -0,0 +1,3 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+SUBDIRS = xml base gui
diff --git a/src/progs/pickit1/base/Makefile.am b/src/progs/pickit1/base/Makefile.am
new file mode 100644
index 0000000..74d56f0
--- /dev/null
+++ b/src/progs/pickit1/base/Makefile.am
@@ -0,0 +1,11 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libpickit1.la
+libpickit1_la_SOURCES = pickit1.cpp pickit1_prog.cpp pickit1_data.cpp
+libpickit1_la_DEPENDENCIES = pickit1_data.cpp
+
+noinst_DATA = pickit1.xml
+pickit1_data.cpp: ../xml/xml_pickit1_parser pickit1.xml
+	../xml/xml_pickit1_parser
+CLEANFILES = pickit1_data.cpp
diff --git a/src/progs/pickit1/base/base.pro b/src/progs/pickit1/base/base.pro
new file mode 100644
index 0000000..bdd257b
--- /dev/null
+++ b/src/progs/pickit1/base/base.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = pickit1
+HEADERS += pickit1.h pickit1_prog.h pickit1_data.h
+SOURCES += pickit1.cpp pickit1_prog.cpp pickit1_data.cpp
diff --git a/src/progs/pickit1/base/pickit1.cpp b/src/progs/pickit1/base/pickit1.cpp
new file mode 100644
index 0000000..c5ab021
--- /dev/null
+++ b/src/progs/pickit1/base/pickit1.cpp
@@ -0,0 +1,102 @@
+/***************************************************************************
+ * Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pickit1.h"
+
+bool Pickit1::Baseline::init()
+{
+  Array cmd;
+  cmd[0] = 'c';
+  cmd[1] = 0x00;  // Load Configuration
+  cmd[2] = 0x02;  // Load Program latches
+  cmd[3] = 0x03;  // Load Data latches
+  cmd[4] = 0x04;  // Read Program memory
+  cmd[5] = 0x05;  // Read Data latches
+  cmd[6] = 0x06;  // Increment Address
+  cmd[7] = 0x08;  // Begin programming internally timed
+  if ( !hardware().port().command(cmd) ) return false;
+  cmd[0] = 0x08;  // Begin Programming externally timed
+  cmd[1] = 0x0E;  // End externally time programming cycle
+  cmd[2] = 0x09;  // Bulk Erase program memory
+  cmd[3] = 0x0B;  // Bulk Erase Data memory
+  cmd[4] = 0xFF;  // Read Program memory
+  cmd[5] = 0xFF;  // Read Data latches
+  cmd[6] = 0xFF;  // Increment Address
+  cmd[7] = 0xFF;  // Begin programming internally timed
+  return hardware().port().command(cmd);
+}
+
+bool Pickit1::Baseline::incrementPC(uint nb)
+{
+  if ( (nb & 0xFF)!=0 ) return Pickit::Baseline::incrementPC(nb);
+  // work around bugs in firmware
+  Array cmd;
+  uint high = (nb >> 8) & 0xFF;
+  log(Log::DebugLevel::Extra, QString("work around bug in firmware (nb_inc=%1 high=%2)")
+                       .arg(toHexLabel(nb, 4)).arg(toHexLabel(high, 2)));
+  if ( high==1 ) {
+      cmd[0] = 'I';
+      cmd[1] = 0x40;
+      cmd[2] = 0x00;
+      cmd[3] = 'I';
+      cmd[4] = 0xC0;
+      cmd[5] = 0x00;
+  } else {
+    cmd[0] = 'I';
+    cmd[1] = 0x00;
+    cmd[2] = high-1;
+  }
+  return hardware().port().command(cmd);
+}
+
+//----------------------------------------------------------------------------
+bool Pickit1::P16F::init()
+{
+  Array cmd;
+  cmd[0] = 'c';
+  cmd[1] = 0x00;   // Load Configuration
+  cmd[2] = 0x02;   // Load Program latches
+  cmd[3] = 0x03;   // Load Data latches
+  cmd[4] = 0x04;   // Read Program memory
+  cmd[5] = 0x05;   // Read Data latches
+  cmd[6] = 0x06;   // Increment Address
+  cmd[7] = 0x08;   // Begin programming internally timed
+  if ( !hardware().port().command(cmd) ) return false;
+  cmd[0] = 0x18;   // Begin Programming externally timed
+  cmd[1] = 0x0A;   // End externally time programming cycle
+  cmd[2] = 0x09;  // Bulk Erase program memory
+  cmd[3] = 0x0B;  // Bulk Erase Data memory
+  cmd[4] = 0xFF;  // Read Program memory
+  cmd[5] = 0xFF;  // Read Data latches
+  cmd[6] = 0xFF;  // Increment Address
+  cmd[7] = 0xFF;  // Begin programming internally timed
+  return hardware().port().command(cmd);
+}
+
+bool Pickit1::P16F716::init()
+{
+  Array cmd;
+  cmd[0] = 'c';
+  cmd[1] = 0x00;   // Load Configuration
+  cmd[2] = 0x02;   // Load Program latches
+  cmd[3] = 0x03;   // Load Data latches
+  cmd[4] = 0x04;   // Read Program memory
+  cmd[5] = 0x05;   // Read Data latches
+  cmd[6] = 0x06;   // Increment Address
+  cmd[7] = 0x08;   // Begin programming internally timed
+  if ( !hardware().port().command(cmd) ) return false;
+  cmd[0] = 0x18;   // Begin Programming externally timed
+  cmd[1] = 0x0E;   // End externally time programming cycle
+  cmd[2] = 0x09;  // Bulk Erase program memory
+  cmd[3] = 0x0B;  // Bulk Erase Data memory
+  cmd[4] = 0xFF;  // Read Program memory
+  cmd[5] = 0xFF;  // Read Data latches
+  cmd[6] = 0xFF;  // Increment Address
+  cmd[7] = 0xFF;  // Begin programming internally timed
+  return hardware().port().command(cmd);
+}
diff --git a/src/progs/pickit1/base/pickit1.h b/src/progs/pickit1/base/pickit1.h
new file mode 100644
index 0000000..75e1d82
--- /dev/null
+++ b/src/progs/pickit1/base/pickit1.h
@@ -0,0 +1,73 @@
+/***************************************************************************
+ * Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICKIT1_H
+#define PICKIT1_H
+
+#include "progs/pickit2/base/pickit.h"
+#include "pickit1_data.h"
+
+namespace Pickit1
+{
+//-----------------------------------------------------------------------------
+class Array : public Pickit::Array
+{
+public:
+  Array() : Pickit::Array(8, 'Z', PrintAlphaNum) {}
+};
+
+//-----------------------------------------------------------------------------
+class USBPort : public Pickit::USBPort
+{
+public:
+  USBPort(Log::Base &log) : Pickit::USBPort(0x0032, log) {}
+  virtual Pickit::Array array() const { return Array(); }
+
+private:
+  virtual uint readEndPoint() const { return 0x81; }
+  virtual uint writeEndPoint() const { return 0x01; }
+};
+
+//-----------------------------------------------------------------------------
+class Hardware : public Pickit::Hardware
+{
+public:
+  Hardware(::Programmer::Base &base) : Pickit::Hardware(base, new USBPort(base)) {}
+};
+
+//----------------------------------------------------------------------------
+class Baseline : public Pickit::Baseline
+{
+public:
+  Baseline(::Programmer::Base &base) : Pickit::Baseline(base) {}
+  virtual char entryMode() const { return data(device().name()).entryMode; }
+  virtual bool init();
+  virtual uint nbWrites(Pic::MemoryRangeType) const { return 1; }
+  virtual bool incrementPC(uint nb);
+};
+
+//----------------------------------------------------------------------------
+class P16F : public Pickit::P16F
+{
+public:
+  P16F(::Programmer::Base &base) : Pickit::P16F(base) {}
+  virtual char entryMode() const { return data(device().name()).entryMode; }
+  virtual bool init();
+  virtual uint nbWrites(Pic::MemoryRangeType) const { return 1; }
+};
+
+class P16F716 : public P16F
+{
+public:
+  P16F716(::Programmer::Base &base) : P16F(base) {}
+  virtual bool init();
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/pickit1/base/pickit1.xml b/src/progs/pickit1/base/pickit1.xml
new file mode 100644
index 0000000..899b504
--- /dev/null
+++ b/src/progs/pickit1/base/pickit1.xml
@@ -0,0 +1,52 @@
+<!-- ************************************************************************* -->
+<!-- * Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  * -->
+<!-- *                                                                       * -->
+<!-- * This program is free software; you can redistribute it and/or modify  * -->
+<!-- * it under the terms of the GNU General Public License as published by  * -->
+<!-- * the Free Software Foundation; either version 2 of the License, or     * -->
+<!-- * (at your option) any later version.                                   * -->
+<!-- *************************************************************************/-->
+<!DOCTYPE piklab>
+
+<type name="pickit1">
+  <device name="10F200" family="Baseline" entry="O" support_type="tested" />
+  <device name="10F202" family="Baseline" entry="O" support_type="tested" />
+  <device name="10F204" family="Baseline" entry="O" support_type="tested" />
+  <device name="10F206" family="Baseline" entry="O" support_type="tested" />
+  <device name="10F220" family="Baseline" entry="O" />
+  <device name="10F222" family="Baseline" entry="O" />
+  <device name="12F508" family="Baseline" entry="O" support_type="tested" />
+  <device name="12F509" family="Baseline" entry="O" support_type="tested" />
+  <device name="12F510" family="Baseline" entry="O" support_type="tested" />
+  <device name="16F505" family="Baseline" entry="O" />
+  <device name="16F506" family="Baseline" entry="O" />
+  <device name="16F54"  family="Baseline" entry="O" />
+  <device name="16F57"  family="Baseline" entry="O" />
+  <device name="16F59"  family="Baseline" entry="O" />
+
+  <device name="12F629" family="P16F"  entry="P" regen="true" support_type="tested" />
+  <device name="12F635" family="P16F"  entry="P" support_type="tested" />
+  <device name="12F675" family="P16F"  entry="P" regen="true" support_type="tested" />
+  <device name="12F683" family="P16F"  entry="P" support_type="tested" />
+  <device name="16F627A" family="P16F" entry="P" />
+  <device name="16F628A" family="P16F" entry="P" />
+  <device name="16F630"  family="P16F" entry="P" regen="true" support_type="tested" />
+  <device name="16F636"  family="P16F" entry="P" support_type="tested" />
+  <device name="16F639"  family="P16F" entry="P" support_type="tested" />
+  <device name="16F648A" family="P16F" entry="P" />
+  <device name="16F676"  family="P16F" entry="P" regen="true" support_type="tested" />
+  <device name="16F684"  family="P16F" entry="P" support_type="tested" />
+  <device name="16F685"  family="P16F" entry="P" />
+  <device name="16F687"  family="P16F" entry="P" />
+  <device name="16F688"  family="P16F" entry="P" support_type="tested" />
+  <device name="16F689"  family="P16F" entry="P" />
+  <device name="16F690"  family="P16F" entry="P" />
+  <device name="16F716"  family="P16F716" entry="O" />
+  <device name="16F785"  family="P16F" entry="P" />
+  <device name="16F877A" family="P16F" entry="O" />
+  <device name="16F913"  family="P16F" entry="O" />
+  <device name="16F914"  family="P16F" entry="O" />
+  <device name="16F916"  family="P16F" entry="O" />
+  <device name="16F917"  family="P16F" entry="O" />
+  <device name="16F946"  family="P16F" entry="O" />
+</type>
diff --git a/src/progs/pickit1/base/pickit1_data.h b/src/progs/pickit1/base/pickit1_data.h
new file mode 100644
index 0000000..767fc4b
--- /dev/null
+++ b/src/progs/pickit1/base/pickit1_data.h
@@ -0,0 +1,23 @@
+/***************************************************************************
+ * Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICKIT1_DATA_H
+#define PICKIT1_DATA_H
+
+#include <qstring.h>
+
+namespace Pickit1
+{
+  struct Data {
+    char entryMode;
+    bool regenerateOsccal;
+  };
+  extern const Data &data(const QString &device);
+} // namespace
+
+#endif
diff --git a/src/progs/pickit1/base/pickit1_prog.cpp b/src/progs/pickit1/base/pickit1_prog.cpp
new file mode 100644
index 0000000..b43a19c
--- /dev/null
+++ b/src/progs/pickit1/base/pickit1_prog.cpp
@@ -0,0 +1,28 @@
+/***************************************************************************
+ * Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pickit1_prog.h"
+
+#include "pickit1.h"
+
+//----------------------------------------------------------------------------
+bool Pickit1::Base::deviceHasOsccalRegeneration() const
+{
+  return data(device()->name()).regenerateOsccal;
+}
+
+bool Pickit1::Base::setTarget()
+{
+  return static_cast<Pickit::DeviceSpecific *>(_specific)->init();
+}
+
+//----------------------------------------------------------------------------
+Programmer::Hardware *Pickit1::Group::createHardware(Programmer::Base &base, const ::Programmer::HardwareDescription &) const
+{
+  return new Hardware(base);
+}
diff --git a/src/progs/pickit1/base/pickit1_prog.h b/src/progs/pickit1/base/pickit1_prog.h
new file mode 100644
index 0000000..c0763b4
--- /dev/null
+++ b/src/progs/pickit1/base/pickit1_prog.h
@@ -0,0 +1,47 @@
+/***************************************************************************
+ * Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICKIT1_PROG_H
+#define PICKIT1_PROG_H
+
+#include "progs/pickit2/base/pickit_prog.h"
+
+namespace Pickit1
+{
+//----------------------------------------------------------------------------
+class Base : public Pickit::Base
+{
+Q_OBJECT
+public:
+  Base(const Programmer::Group &group, const Pic::Data *data) : Pickit::Base(group, data) {}
+  virtual bool deviceHasOsccalRegeneration() const;
+  virtual bool canReadVoltage(Pic::VoltageType) const { return false; }
+  virtual bool setTarget();
+
+private:
+  virtual VersionData firmwareVersion(Programmer::FirmwareVersionType) const { return VersionData(2, 0, 0); }
+};
+
+//----------------------------------------------------------------------------
+class Group : public Pickit::Group
+{
+public:
+  virtual QString name() const { return "pickit1"; }
+  virtual QString label() const { return i18n("PICkit1"); }
+  virtual Programmer::Properties properties() const { return ::Programmer::Programmer | ::Programmer::HasFirmware | ::Programmer::CanReadMemory | ::Programmer::HasConnectedState; }
+
+protected:
+  virtual void initSupported();
+  virtual Programmer::Base *createBase(const Device::Data *data) const { return new ::Pickit1::Base(*this, static_cast<const Pic::Data *>(data)); }
+  virtual Programmer::Hardware *createHardware(Programmer::Base &base, const ::Programmer::HardwareDescription &hd) const;
+  virtual Programmer::DeviceSpecific *createDeviceSpecific(Programmer::Base &base) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/pickit1/gui/Makefile.am b/src/progs/pickit1/gui/Makefile.am
new file mode 100644
index 0000000..239184b
--- /dev/null
+++ b/src/progs/pickit1/gui/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libpickit1ui.la
+libpickit1ui_la_SOURCES = pickit1_group_ui.cpp
+libpickit1ui_la_LDFLAGS = $(all_libraries)
diff --git a/src/progs/pickit1/gui/pickit1_group_ui.cpp b/src/progs/pickit1/gui/pickit1_group_ui.cpp
new file mode 100644
index 0000000..2c862fb
--- /dev/null
+++ b/src/progs/pickit1/gui/pickit1_group_ui.cpp
@@ -0,0 +1,23 @@
+/***************************************************************************
+ * Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pickit1_group_ui.h"
+
+#include "progs/gui/prog_config_widget.h"
+#include "progs/pickit2/gui/pickit2_group_ui.h"
+#include "progs/pickit1/base/pickit1_prog.h"
+
+::Programmer::ConfigWidget *Pickit1::GroupUI::createConfigWidget(QWidget *parent) const
+{
+  return new ::Programmer::ConfigWidget(static_cast<const ::Programmer::Group &>(group()), parent);
+}
+
+::Programmer::AdvancedDialog *Pickit1::GroupUI::createAdvancedDialog(::Programmer::Base &base, QWidget *parent) const
+{
+  return new Pickit::AdvancedDialog(static_cast<Base &>(base), parent, "pickit1_advanced_dialog");
+}
diff --git a/src/progs/pickit1/gui/pickit1_group_ui.h b/src/progs/pickit1/gui/pickit1_group_ui.h
new file mode 100644
index 0000000..5fb8ad6
--- /dev/null
+++ b/src/progs/pickit1/gui/pickit1_group_ui.h
@@ -0,0 +1,27 @@
+/***************************************************************************
+ * Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICKIT1_GROUP_UI_H
+#define PICKIT1_GROUP_UI_H
+
+#include "devices/pic/gui/pic_prog_group_ui.h"
+
+namespace Pickit1
+{
+
+class GroupUI : public ::Programmer::GroupUI
+{
+public:
+  virtual ::Programmer::ConfigWidget *createConfigWidget(QWidget *parent) const;
+  virtual bool hasAdvancedDialog() const { return true; }
+  virtual ::Programmer::AdvancedDialog *createAdvancedDialog(::Programmer::Base &base, QWidget *parent) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/pickit1/pickit1.pro b/src/progs/pickit1/pickit1.pro
new file mode 100644
index 0000000..60ac0f5
--- /dev/null
+++ b/src/progs/pickit1/pickit1.pro
@@ -0,0 +1,2 @@
+TEMPLATE = subdirs
+SUBDIRS = xml base
diff --git a/src/progs/pickit1/xml/Makefile.am b/src/progs/pickit1/xml/Makefile.am
new file mode 100644
index 0000000..f0cc91a
--- /dev/null
+++ b/src/progs/pickit1/xml/Makefile.am
@@ -0,0 +1,14 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_PROGRAMS = xml_pickit1_parser
+xml_pickit1_parser_SOURCES = xml_pickit1_parser.cpp
+OBJECTS = $(top_builddir)/src/devices/list/libdevicelistnoui.la \
+	$(top_builddir)/src/devices/pic/pic/libpic.la $(top_builddir)/src/devices/pic/base/libpicbase.la \
+	$(top_builddir)/src/devices/pic/xml_data/libpicxml.la \
+	$(top_builddir)/src/devices/mem24/mem24/libmem24.la $(top_builddir)/src/devices/mem24/base/libmem24base.la \
+	$(top_builddir)/src/devices/mem24/xml_data/libmem24xml.la \
+	$(top_builddir)/src/xml_to_data/libxmltodata.la $(top_builddir)/src/devices/base/libdevicebase.la \
+	$(top_builddir)/src/common/common/libcommon.la
+xml_pickit1_parser_DEPENDENCIES = $(OBJECTS)
+xml_pickit1_parser_LDADD = $(OBJECTS) $(LIB_KDECORE)
diff --git a/src/progs/pickit1/xml/xml.pro b/src/progs/pickit1/xml/xml.pro
new file mode 100644
index 0000000..e368c49
--- /dev/null
+++ b/src/progs/pickit1/xml/xml.pro
@@ -0,0 +1,18 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/app.pro)
+
+TARGET   = xml_pickit1_parser
+SOURCES += xml_pickit1_parser.cpp
+LIBS    += ../../../devices/list/libdevicelist.a \
+           ../../../devices/mem24/mem24/libmem24.a ../../../devices/mem24/xml_data/libmem24xml.a \
+           ../../../devices/mem24/base/libmem24base.a \
+           ../../../devices/pic/pic/libpic.a ../../../devices/pic/xml_data/libpicxml.a \
+           ../../../devices/pic/base/libpicbase.a ../../../xml_to_data/libxmltodata.a \
+           ../../../devices/base/libdevicebase.a ../../../common/global/libglobal.a \
+           ../../../common/nokde/libnokde.a ../../../common/common/libcommon.a
+
+unix:QMAKE_POST_LINK = cd ../base && ../xml/xml_pickit1_parser
+unix:QMAKE_CLEAN += ../base/pickit1_data.cpp
+win32:QMAKE_POST_LINK = cd ..\base && ..\xml\xml_pickit1_parser.exe
+win32:QMAKE_CLEAN += ..\base\pickit1_data.cpp
+
diff --git a/src/progs/pickit1/xml/xml_pickit1_parser.cpp b/src/progs/pickit1/xml/xml_pickit1_parser.cpp
new file mode 100644
index 0000000..e5d1b78
--- /dev/null
+++ b/src/progs/pickit1/xml/xml_pickit1_parser.cpp
@@ -0,0 +1,61 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "xml_to_data/prog_xml_to_data.h"
+#include "progs/pickit1/base/pickit1_data.h"
+
+namespace Pickit1
+{
+
+class XmlToData : public Programmer::XmlToData<Data>
+{
+public:
+  XmlToData() : Programmer::XmlToData<Data>("pickit1", "Pickit1") {}
+
+private:
+  virtual void parseData(QDomElement element, Data &data);
+  virtual void outputData(const Data &data, QTextStream &s) const;
+  virtual void outputFunctions(QTextStream &s) const;
+};
+
+void Pickit1::XmlToData::parseData(QDomElement element, Data &data)
+{
+  QString s = element.attribute("entry");
+  if ( s.length()!=1 || (s[0]!='O' && s[0]!='P') ) qFatal("Invalid or missing entry mode");
+  data.entryMode = s[0].latin1();
+  s = element.attribute("regen");
+  if ( s.isEmpty() || s=="false" ) data.regenerateOsccal = false;
+  else if ( s=="true" ) data.regenerateOsccal = true;
+  else qFatal("Invalid regen value");
+}
+
+void Pickit1::XmlToData::outputData(const Data &data, QTextStream &s) const
+{
+  s << "'" << data.entryMode << "', " << (data.regenerateOsccal ? "true" : "false");
+}
+
+void Pickit1::XmlToData::outputFunctions(QTextStream &s) const
+{
+  Programmer::XmlToData<Data>::outputFunctions(s);
+  s << "::Programmer::DeviceSpecific *Group::createDeviceSpecific(Programmer::Base &base) const" << endl;
+  s << "{" << endl;
+  s << "  uint i = family(static_cast< ::Pickit1::Base &>(base).device()->name());" << endl;
+  s << "  switch(i) {" << endl;
+  for (uint i=0; i<uint(families().count()); i++) {
+    s << "    case " + QString::number(i) + ": return new " + families()[i] + "(base);" << endl;
+  }
+  s << "  }" << endl;
+  s << "  Q_ASSERT(false);" << endl;
+  s << "  return 0;" << endl;
+  s << "}" << endl;
+}
+
+} // namespace
+
+//-----------------------------------------------------------------------------
+XML_MAIN(Pickit1::XmlToData)
diff --git a/src/progs/pickit2/Makefile.am b/src/progs/pickit2/Makefile.am
new file mode 100644
index 0000000..fccf96d
--- /dev/null
+++ b/src/progs/pickit2/Makefile.am
@@ -0,0 +1,3 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+SUBDIRS = xml base gui
diff --git a/src/progs/pickit2/base/Makefile.am b/src/progs/pickit2/base/Makefile.am
new file mode 100644
index 0000000..a436012
--- /dev/null
+++ b/src/progs/pickit2/base/Makefile.am
@@ -0,0 +1,12 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libpickit2.la
+libpickit2_la_SOURCES = pickit2_data.cpp pickit.cpp pickit_prog.cpp \
+	pickit2.cpp pickit2_prog.cpp
+libpickit2_la_DEPENDENCIES = pickit2_data.cpp
+
+noinst_DATA = pickit2.xml
+pickit2_data.cpp: ../xml/xml_pickit2_parser pickit2.xml
+	../xml/xml_pickit2_parser
+CLEANFILES = pickit2_data.cpp
diff --git a/src/progs/pickit2/base/base.pro b/src/progs/pickit2/base/base.pro
new file mode 100644
index 0000000..3a229e3
--- /dev/null
+++ b/src/progs/pickit2/base/base.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = pickit2
+HEADERS += pickit.h pickit_prog.h pickit2.h pickit2_data.h pickit2_prog.h
+SOURCES += pickit.cpp pickit_prog.cpp pickit2.cpp pickit2_data.cpp pickit2_prog.cpp
diff --git a/src/progs/pickit2/base/pickit.cpp b/src/progs/pickit2/base/pickit.cpp
new file mode 100644
index 0000000..7da2d18
--- /dev/null
+++ b/src/progs/pickit2/base/pickit.cpp
@@ -0,0 +1,337 @@
+/***************************************************************************
+ * Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pickit.h"
+
+#include "devices/base/device_group.h"
+#include "progs/base/prog_group.h"
+
+//-----------------------------------------------------------------------------
+Pickit::Array::Array(uint length, uchar fillChar, PrintMode mode)
+  : _fillChar(fillChar), _mode(mode), _data(length)
+{
+  _data.fill(fillChar);
+}
+
+QString Pickit::Array::pretty() const
+{
+  int end = _data.count() - 1;
+  for (; end>=0; end--)
+    if ( _data[end]!=_fillChar ) break;
+  QString s;
+  for (int i=0; i<=end; i++) s += toPrintable(_data[i], _mode);
+  return s;
+}
+
+//-----------------------------------------------------------------------------
+Pickit::USBPort::USBPort(uint deviceId, Log::Base &log)
+  : Port::USB(log, Microchip::VENDOR_ID, deviceId, CONFIG_VENDOR, 0)
+{}
+
+bool Pickit::USBPort::command(uchar c)
+{
+  Array a = array();
+  a._data[0] = c;
+  return command(a);
+}
+
+bool Pickit::USBPort::command(const char *s)
+{
+  Array a = array();
+  if (s) {
+    Q_ASSERT( strlen(s)<=a.length() );
+    for (uint i=0; i<strlen(s); i++) a._data[i] = s[i];
+  }
+  return command(a);
+}
+
+bool Pickit::USBPort::command(const Array &cmd)
+{
+  log(Log::DebugLevel::Extra, QString("send command: \"%1\"").arg(cmd.pretty()));
+  return write(writeEndPoint(), (const char *)cmd._data.data(), cmd.length());
+}
+
+bool Pickit::USBPort::receive(Pickit::Array &array)
+{
+  if ( !read(readEndPoint(), (char *)array._data.data(), array.length()) ) return false;
+  log(Log::DebugLevel::Max, QString("received: \"%1\"").arg(array.pretty()));
+  return true;
+}
+
+bool Pickit::USBPort::getMode(VersionData &version, ::Programmer::Mode &mode)
+{
+  if ( !command('v') ) return false;
+  Array a = array();
+  if ( !receive(a) ) return false;
+  if ( a[5]=='B' ) {
+    version = VersionData(a[6], a[7], 0);
+    mode = ::Programmer::BootloadMode;
+  } else {
+    version = VersionData(a[0], a[1], a[2]);
+    mode = ::Programmer::NormalMode;
+  }
+  return true;
+}
+
+bool Pickit::USBPort::receiveWords(uint nbBytesWord, uint nbRead, QValueVector<uint> &words, uint offset)
+{
+  log(Log::DebugLevel::Max, QString("receive words nbBytesWord=%1 nbRead=%2 offset=%3").arg(nbBytesWord).arg(nbRead).arg(offset));
+  Array a = array();
+  QMemArray<uchar> data(nbRead*a.length());
+  uint l = 0;
+  for (uint i=0; i<nbRead; i++) {
+    if ( !receive(a) ) return false;
+    for (uint k=offset; k<a.length(); k++) {
+      data[l] = a[k];
+      l++;
+    }
+  }
+  words.resize(data.count()/nbBytesWord);
+  for (uint i=0; i<uint(words.count()); i++) {
+    words[i] = 0;
+    for (uint k=0; k<nbBytesWord; k++) words[i] |= data[nbBytesWord*i + k] << (8*k);
+  }
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+Pickit::Hardware::Hardware(::Programmer::Base &base, USBPort *port)
+  : ::Programmer::PicHardware(base, port, QString::null)
+{}
+
+bool Pickit::Hardware::internalConnectHardware()
+{
+  return port().open();
+}
+
+bool Pickit::Hardware::setTargetPower(uint v)
+{
+  Array cmd = port().array();
+  cmd[0] = 'V';
+  cmd[1] = v;
+  return port().command(cmd);
+}
+
+bool Pickit::Hardware::writeWords(uint max, char c, uint nbBytesWord,
+                                  uint &i, const Device::Array &data)
+{
+  Q_ASSERT( i<data.count() );
+  Q_ASSERT( nbBytesWord==1 || nbBytesWord==2 );
+  Array cmd = port().array();
+  uint n = (nbBytesWord==1 ? 2 : 3);
+  Q_ASSERT( n*max<=cmd.length() );
+  for (uint k=0; k<max; k++) {
+    cmd[n*k] = c;
+    cmd[n*k+1] = data[i].byte(0);
+    if ( nbBytesWord==2 ) cmd[n*k+2] = data[i].byte(1);
+    i++;
+    if ( i>=data.count() ) break;
+  }
+  return port().command(cmd);
+}
+
+bool Pickit::Hardware::regenerateOsccal(BitValue &newValue)
+{
+  if ( !setTargetPower(Osc2_5kHz) ) return false;
+  if ( !setTargetPower(PowerOn + Osc2_5kHz) ) return false;
+  Port::usleep(400000); // 400 ms
+  if ( !setTargetPower(PowerOff) ) return false;
+  Pickit::Array cmd = port().array();
+  cmd[0] = 'P';
+  cmd[1] = 'I';
+  cmd[2] = 120;
+  cmd[3] = 0;
+  cmd[4] = 'r';
+  cmd[5] = 'p';
+  if ( !port().command(cmd) ) return false;
+  QValueVector<uint> words;
+  if ( !port().receiveWords(1, 1, words) ) return false;
+  newValue = words[7] | 0x3400;
+  return true;
+}
+
+//----------------------------------------------------------------------------
+bool Pickit::DeviceSpecific::setPowerOn()
+{
+  return hardware().port().command(entryMode());
+}
+
+bool Pickit::DeviceSpecific::setPowerOff()
+{
+  return hardware().port().command('p');
+}
+
+bool Pickit::DeviceSpecific::setTargetPowerOn(bool on)
+{
+  return hardware().setTargetPower(on ? PowerOn : PowerOff);
+}
+
+//----------------------------------------------------------------------------
+bool Pickit::BMDeviceSpecific::doRead(Pic::MemoryRangeType type, Device::Array &data, const ::Programmer::VerifyData *vdata)
+{
+  data.resize(device().nbWords(type));
+  gotoMemory(type);
+  QValueVector<uint> words;
+  switch (type.type()) {
+    case Pic::MemoryRangeType::Config:
+    case Pic::MemoryRangeType::Code:
+    case Pic::MemoryRangeType::Cal:
+    case Pic::MemoryRangeType::CalBackup:
+    case Pic::MemoryRangeType::UserId:
+    case Pic::MemoryRangeType::DeviceId:
+      for (uint i=0; i<data.count();) {
+        if ( !hardware().port().command('R') ) return false;
+        if ( !hardware().port().receiveWords(2, 1, words) ) return false;
+        for (uint k=0; k<uint(words.count()); k++) {
+          data[i] = words[k];
+          if ( vdata && !hardware().verifyWord(i, data[i], type, *vdata) ) return false;
+          i++;
+          if ( i>=data.count() ) break;
+        }
+      }
+      break;
+    case Pic::MemoryRangeType::Eeprom:
+      for (uint i=0; i<data.count();) {
+        if ( !hardware().port().command('r') ) return false; // #### not sure this is correct for Pickit1: "rrrrrrrr" used by usb_pickit
+        if ( !hardware().port().receiveWords(1, 1, words) ) return false;
+        for (uint k=0; k<uint(words.count()); k++) {
+          data[i] = words[k];
+          if ( vdata && !hardware().verifyWord(i, data[i], type, *vdata) ) return false;
+          i++;
+          if ( i>=data.count() ) break;
+        }
+      }
+      break;
+    case Pic::MemoryRangeType::DebugVector:
+    case Pic::MemoryRangeType::HardwareStack:
+    case Pic::MemoryRangeType::ProgramExecutive:
+    case Pic::MemoryRangeType::Nb_Types: Q_ASSERT(false); return false;
+  }
+  if ( type==Pic::MemoryRangeType::Code || type==Pic::MemoryRangeType::Eeprom )
+    _base.progressMonitor().addTaskProgress(data.count());
+  return true;
+}
+
+bool Pickit::BMDeviceSpecific::incrementPC(uint nb)
+{
+  Pickit::Array cmd = hardware().port().array();
+  cmd[0] = 'I';
+  cmd[1] = nb & 0xFF;
+  cmd[2] = (nb >> 8) & 0xFF;
+  return hardware().port().command(cmd);
+}
+
+bool Pickit::BMDeviceSpecific::doEraseRange(Pic::MemoryRangeType type)
+{
+  Q_ASSERT( type==Pic::MemoryRangeType::Code );
+  return hardware().port().command('E');
+}
+
+bool Pickit::BMDeviceSpecific::doWrite(Pic::MemoryRangeType type, const Device::Array &data, bool force)
+{
+  // #### TODO: speed optimize...
+  Q_UNUSED(force);
+  gotoMemory(type);
+  uint nb = nbWrites(type);
+  switch (type.type()) {
+    case Pic::MemoryRangeType::Config:
+    case Pic::MemoryRangeType::Code:
+    case Pic::MemoryRangeType::Cal:
+    case Pic::MemoryRangeType::UserId:
+      for (uint i=0; i<data.count(); )
+        hardware().writeWords(nb, writeCode(), 2, i, data);
+      break;
+    case Pic::MemoryRangeType::Eeprom:
+      for (uint i=0; i<data.count(); )
+        hardware().writeWords(nb, writeData(), 1, i, data);
+      break;
+    case Pic::MemoryRangeType::CalBackup:
+    case Pic::MemoryRangeType::DeviceId:
+    case Pic::MemoryRangeType::DebugVector:
+    case Pic::MemoryRangeType::HardwareStack:
+    case Pic::MemoryRangeType::ProgramExecutive:
+    case Pic::MemoryRangeType::Nb_Types: Q_ASSERT(false); return false;
+  }
+  if ( type==Pic::MemoryRangeType::Code || type==Pic::MemoryRangeType::Eeprom )
+    _base.progressMonitor().addTaskProgress(data.count());
+  return true;
+}
+
+//----------------------------------------------------------------------------
+bool Pickit::Baseline::gotoMemory(Pic::MemoryRangeType type)
+{
+  switch (type.type()) {
+    case Pic::MemoryRangeType::Config:
+    case Pic::MemoryRangeType::Eeprom: return true;
+    case Pic::MemoryRangeType::Code:
+    case Pic::MemoryRangeType::Cal:
+    case Pic::MemoryRangeType::UserId:
+    case Pic::MemoryRangeType::CalBackup: return incrementPC(1+device().range(type).start.toUInt());
+    case Pic::MemoryRangeType::DeviceId:
+    case Pic::MemoryRangeType::DebugVector:
+    case Pic::MemoryRangeType::HardwareStack:
+    case Pic::MemoryRangeType::ProgramExecutive:
+    case Pic::MemoryRangeType::Nb_Types: break;
+  }
+  Q_ASSERT(false);
+  return false;
+}
+
+//----------------------------------------------------------------------------
+bool Pickit::P16F::gotoMemory(Pic::MemoryRangeType type)
+{
+  Pickit::Array cmd = hardware().port().array();
+  cmd[0] = 'C';
+  switch (type.type()) {
+    case Pic::MemoryRangeType::Code: return true;
+    case Pic::MemoryRangeType::Eeprom: return true;
+    case Pic::MemoryRangeType::UserId: return hardware().port().command(cmd);
+    case Pic::MemoryRangeType::DeviceId:
+      cmd[1] = 'I';
+      cmd[2] = 0x06;
+      cmd[3] = 0x00;
+      return hardware().port().command(cmd);
+    case Pic::MemoryRangeType::Config:
+      cmd[1] = 'I';
+      cmd[2] = 0x07;
+      cmd[3] = 0x00;
+      return hardware().port().command(cmd);
+    case Pic::MemoryRangeType::Cal:
+      if ( device().range(type).start==device().range(Pic::MemoryRangeType::Code).end+1 )
+        return incrementPC(device().range(type).start.toUInt());
+      cmd[1] = 'I';
+      cmd[2] = 0x08;
+      cmd[3] = 0x00;
+      return hardware().port().command(cmd);
+    case Pic::MemoryRangeType::CalBackup:
+    case Pic::MemoryRangeType::DebugVector:
+    case Pic::MemoryRangeType::HardwareStack:
+    case Pic::MemoryRangeType::ProgramExecutive:
+    case Pic::MemoryRangeType::Nb_Types: break;
+  }
+  Q_ASSERT(false);
+  return false;
+}
+
+bool Pickit::P16F::doErase(bool)
+{
+  Pickit::Array cmd = hardware().port().array();
+  cmd[0] = 'C';
+  cmd[1] = writeCode();
+  cmd[2] = 0xFF;
+  cmd[3] = 0x3F;
+  cmd[4] = 'E';
+  cmd[5] = 'e';
+  return hardware().port().command(cmd);
+}
+
+bool Pickit::P16F::doEraseRange(Pic::MemoryRangeType type)
+{
+  if ( type==Pic::MemoryRangeType::Eeprom ) return hardware().port().command('e');
+  return BMDeviceSpecific::doEraseRange(type);
+}
diff --git a/src/progs/pickit2/base/pickit.h b/src/progs/pickit2/base/pickit.h
new file mode 100644
index 0000000..741ed61
--- /dev/null
+++ b/src/progs/pickit2/base/pickit.h
@@ -0,0 +1,137 @@
+/***************************************************************************
+ * Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICKIT_H
+#define PICKIT_H
+
+#include "progs/icd2/base/microchip.h"
+#include "common/port/usb_port.h"
+#include "devices/pic/pic/pic_memory.h"
+#include "devices/pic/prog/pic_prog.h"
+
+namespace Pickit
+{
+enum PowerType { PowerOff = 0, PowerOn = 1, Osc2_5kHz = 2 };
+
+//-----------------------------------------------------------------------------
+class Array
+{
+public:
+  uint length() const { return _data.count(); }
+  QString pretty() const;
+  uchar &operator[](uint i) { return _data[i]; }
+  uchar operator[](uint i) const { return _data[i]; }
+
+protected:
+  Array(uint length, uchar fillChar, PrintMode mode);
+
+private:
+  uchar _fillChar;
+  PrintMode _mode;
+  QMemArray<uchar> _data;
+
+  friend class USBPort;
+};
+
+//-----------------------------------------------------------------------------
+class USBPort : public Port::USB
+{
+public:
+  USBPort(uint deviceId, Log::Base &manager);
+  virtual Array array() const = 0;
+  bool command(const Array &cmd);
+  bool command(uchar c);
+  bool command(const char *s);
+  bool receive(Array &data);
+  bool getMode(VersionData &version, ::Programmer::Mode &mode);
+  bool receiveWords(uint nbBytesWord, uint nbRead, QValueVector<uint> &data, uint offset = 0);
+
+protected:
+  virtual uint writeEndPoint() const = 0;
+  virtual uint readEndPoint() const = 0;
+
+private:
+  virtual uint timeout(uint) const { return 10000; } // 10s
+  enum { CONFIG_HID = 1, // use HID for pickit configuration
+         CONFIG_VENDOR = 2 // vendor specific configuration
+  };
+};
+
+//-----------------------------------------------------------------------------
+class Hardware : public ::Programmer::PicHardware
+{
+public:
+  Hardware(::Programmer::Base &base, USBPort *port);
+  bool setTargetPower(uint value);
+  USBPort &port() { return static_cast<USBPort &>(*_port); }
+  const USBPort &port() const { return static_cast<USBPort &>(*_port); }
+  bool writeWords(uint max, char c, uint nbBytesWord,
+                  uint &i, const Device::Array &data);
+  bool regenerateOsccal(BitValue &newValue);
+
+protected:
+  virtual bool internalConnectHardware();
+};
+
+//-----------------------------------------------------------------------------
+class DeviceSpecific : public ::Programmer::PicDeviceSpecific
+{
+public:
+  DeviceSpecific(::Programmer::Base &base) : ::Programmer::PicDeviceSpecific(base) {}
+  virtual bool canEraseAll() const { return true; }
+  virtual bool canEraseRange(Pic::MemoryRangeType type) const { return ( type==Pic::MemoryRangeType::Code || type==Pic::MemoryRangeType::Eeprom ); }
+  virtual bool canReadRange(Pic::MemoryRangeType) const { return true; }
+  virtual bool canWriteRange(Pic::MemoryRangeType) const { return true; }
+  Hardware &hardware() { return static_cast<Hardware &>(*_base.hardware()); }
+  virtual bool init() = 0;
+  virtual bool setPowerOn();
+  virtual bool setPowerOff();
+  virtual bool setTargetPowerOn(bool on);
+  virtual char entryMode() const = 0;
+};
+
+//-----------------------------------------------------------------------------
+class BMDeviceSpecific : public DeviceSpecific
+{
+public:
+  BMDeviceSpecific(::Programmer::Base &base) : DeviceSpecific(base) {}
+  virtual bool gotoMemory(Pic::MemoryRangeType type) = 0;
+  virtual bool doRead(Pic::MemoryRangeType type, Device::Array &data, const ::Programmer::VerifyData *vdata);
+  virtual bool incrementPC(uint nb);
+  virtual uint nbWrites(Pic::MemoryRangeType type) const = 0;
+  virtual char writeCode() const = 0;
+  virtual char writeData() const = 0;
+  virtual bool doWrite(Pic::MemoryRangeType type, const Device::Array &data, bool force);
+  virtual bool doEraseRange(Pic::MemoryRangeType type);
+};
+
+//-----------------------------------------------------------------------------
+class Baseline : public BMDeviceSpecific
+{
+public:
+  Baseline(::Programmer::Base &base) : BMDeviceSpecific(base) {}
+  virtual bool doErase(bool) { return doEraseRange(Pic::MemoryRangeType::Code); }
+  virtual bool gotoMemory(Pic::MemoryRangeType type);
+  virtual char writeCode() const { return 'w'; }
+  virtual char writeData() const { return 'D'; }
+};
+
+class P16F : public BMDeviceSpecific
+{
+public:
+  P16F(::Programmer::Base &base) : BMDeviceSpecific(base) {}
+  virtual bool gotoMemory(Pic::MemoryRangeType type);
+  virtual bool doEraseRange(Pic::MemoryRangeType type);
+  virtual bool doErase(bool);
+  virtual char writeCode() const { return 'W'; }
+  virtual char writeData() const { return 'D'; }
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/pickit2/base/pickit2.cpp b/src/progs/pickit2/base/pickit2.cpp
new file mode 100644
index 0000000..6458fa2
--- /dev/null
+++ b/src/progs/pickit2/base/pickit2.cpp
@@ -0,0 +1,447 @@
+/***************************************************************************
+ * Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pickit2.h"
+
+#include "common/global/global.h"
+#include "devices/list/device_list.h"
+#include "common/port/port.h"
+
+//-----------------------------------------------------------------------------
+void Pickit2::USBPort::fillCommand(Pickit::Array &cmd, uchar command, uint nbBytes,
+                                   uint address, uint i, bool longAddress) const
+{
+  cmd[i] = command;
+  cmd[i+1] = nbBytes;
+  cmd[i+2] = address & 0xFF;
+  cmd[i+3] = (address >> 8) & 0xFF;
+  if (longAddress) cmd[i+4] = (address >> 16) & 0xFF;
+}
+
+Pickit::Array Pickit2::USBPort::createCommand(uchar c, uint nbBytes, uint address, bool longAddress) const
+{
+  Array cmd;
+  fillCommand(cmd, c, nbBytes, address, 0, longAddress);
+  return cmd;
+}
+
+bool Pickit2::USBPort::readFirmwareCodeMemory(Device::Array &data, const Device::Array *vdata, ProgressMonitor &monitor)
+{
+  const Pic::Data *device = static_cast<const Pic::Data *>(Device::lister().data("18F2455"));
+  log(Log::DebugLevel::Normal, "  Read pickit2 firmware");
+  for (uint i=0; i<data.count(); i+=16) { // 2 bytes/word and 32 bytes/command max
+    uint start = 0;
+    for (; start<16; start++) if ( data[i + start].isInitialized() ) break;
+    if ( start==16 ) continue;
+    uint end = 15;
+    for (; end>start; end--) if ( data[i + end].isInitialized() ) break;
+    uint nb = end - start + 1;
+    Pickit::Array cmd = createCommand(1, 2*nb, 2*i);
+    if ( !command(cmd) ) return false;
+    QValueVector<uint> read;
+    if ( !receiveWords(1, 1, read) ) return false;
+    for (uint k=0; k<nb; k++) {
+      uint index = i + start + k;
+      data[index]= read[5 + 2*k] & 0xFF | (read[6 + 2*k] << 8);
+      if ( vdata && index>=0x1000 && index<0x3FF0 && data[index]!=(*vdata)[index] ) {
+        log(Log::LineType::Error, i18n("Firmware memory does not match hex file (at address 0x%2: reading 0x%3 and expecting 0x%4).")
+                    .arg(QString(toHex(index/2, device->nbCharsAddress())))
+                    .arg(QString(toHex(data[index], device->nbCharsWord(Pic::MemoryRangeType::Code))))
+                    .arg(QString(toHex((*vdata)[index], device->nbCharsWord(Pic::MemoryRangeType::Code)))));
+         return false;
+      }
+    }
+  }
+  monitor.addTaskProgress(data.count());
+  return true;
+}
+
+bool Pickit2::USBPort::eraseFirmwareCodeMemory()
+{
+  log(Log::DebugLevel::Normal, "  Erase pickit2 firmware");
+  Pickit::Array cmd = createCommand(3, 0xC0, 0x2000);
+  if ( !command(cmd) ) return false; // erase 0x2000-0x4FFF
+  Port::usleep(1000000);
+  cmd = createCommand(3, 0xC0, 0x5000);
+  if ( !command(cmd) ) return false; // erase 0x5000-0x7FFF
+  Port::usleep(1000000);
+  return true;
+}
+
+bool Pickit2::USBPort::writeFirmwareCodeMemory(const Device::Array &data, ProgressMonitor &monitor)
+{
+  log(Log::DebugLevel::Normal, "  Write pickit2 firmware");
+  for (uint i=0x1000; i<data.count(); i+=16) { // 2 bytes/word and 32 bytes/command max
+    uint start = 0;
+    for (; start<16; start++) if ( data[i + start].isInitialized() ) break;
+    if ( start==16 ) continue;
+    uint end = 15;
+    for (; end>start; end--) if ( data[i + end].isInitialized() ) break;
+    uint nb = end - start + 1;
+    Pickit::Array cmd = createCommand(2, 2*nb, 2*i);
+    for (uint k=0; k<nb; k++) {
+      cmd[5 + 2*k] = data[i + start + k].byte(0);
+      cmd[6 + 2*k] = data[i + start + k].byte(1);
+    }
+    if ( !command(cmd) ) return false;
+    Port::usleep(100000);
+  }
+  monitor.addTaskProgress(data.count());
+  Device::Array read;
+  if ( !readFirmwareCodeMemory(read, &data, monitor) ) return false;
+  log(Log::DebugLevel::Normal, "  Write pickit2 firmware-loaded key");
+  Pickit::Array cmd = createCommand(2, 2, 0x7FFE);
+  cmd[5] = 0x55;
+  cmd[6] = 0x55;
+  return command(cmd);
+}
+
+bool Pickit2::USBPort::uploadFirmware(const Pic::Memory &memory, ProgressMonitor &monitor)
+{
+  if ( !eraseFirmwareCodeMemory() ) return false;
+  Device::Array data = memory.arrayForWriting(Pic::MemoryRangeType::Code);
+  return writeFirmwareCodeMemory(data, monitor);
+}
+
+//-----------------------------------------------------------------------------
+bool Pickit2::Hardware::readVoltages(VoltagesData &voltages)
+{
+  log(Log::DebugLevel::Extra, QString("readVoltages: Firmware is %1").arg(_base.firmwareVersion().pretty()));
+  if ( _base.firmwareVersion()<VersionData(1, 20, 0) ) {
+    log(Log::LineType::Warning, i18n("Cannot read voltages with this firmware version."));
+    return true;
+  }
+  if ( !port().command('M') ) return false;
+  Array a;
+  if ( !port().receive(a) ) return false;
+  voltages[Pic::TargetVdd].value = double(a[1] + a[2]*256) * 5.0 / 65535;
+  voltages[Pic::TargetVpp].value = double(a[3] + a[4]*256) * (5.0 /65535) * (7.4 / 2.7);
+  voltages[Pic::TargetVdd].error = ( a[0] & 0x08 );
+  voltages[Pic::TargetVpp].error = ( a[0] & 0x10 );
+  return true;
+}
+
+bool Pickit2::Hardware::setVddVpp(double vdd, double vpp)
+{
+  log(Log::DebugLevel::Extra, QString("setVddVpp: Firmware is %1").arg(_base.firmwareVersion().pretty()));
+  if ( _base.firmwareVersion()<VersionData(1, 20, 0) ) return true;
+  log(Log::DebugLevel::Normal, QString("  set Vdd = %1 V and Vpp = %2 V").arg(vdd).arg(vpp));
+  Array cmd;
+  cmd[0] = 's';
+  uint cvdd = uint(32.0 * vdd + 12.5);
+  cvdd <<= 6;
+  cmd[1] = cvdd & 0xC0;
+  cmd[2] = cvdd >> 8;
+  uint cvpp = uint(18.61 * vpp);
+  cmd[3] = 0x40;
+  cmd[4] = cvpp;
+  cmd[5] = uchar(4.5 * (cvdd >> 8)); // linit to 75% of vdd
+  cmd[6] = uchar(0.75 * cvpp);       // linit to 75% of vpp
+  if ( !port().command(cmd) ) return false;
+  // wait until vpp is stabilized
+  for (uint i=0; i<30; i++) {
+    Port::usleep(50000);
+    VoltagesData voltages;
+    if ( !readVoltages(voltages) ) return false;
+    if ( voltages[Pic::TargetVpp].value<(vpp+0.5) ) break;
+  }
+  return true;
+}
+
+//-----------------------------------------------------------------------------
+bool Pickit2::Baseline::init()
+{
+  Array cmd;
+  cmd[0] = 'c';
+  cmd[1] = 0x00;   // Load Configuration
+  cmd[2] = 0x02;   // Load Program latches
+  cmd[3] = 0x03;   // Load Data latches
+  cmd[4] = 0x04;   // Read Program memory
+  cmd[5] = 0x05;   // Read Data latches
+  cmd[6] = 0x06;   // Increment Address
+  cmd[7] = 0x08;   // Begin programming internally timed
+  cmd[8] = 0x08;   // Begin Programming externally timed
+  cmd[9] = 0x0E;   // End externally time programming cycle
+  cmd[10] = 0x09;  // Bulk Erase program memory
+  cmd[11] = 0x0B;  // Bulk Erase Data memory
+  cmd[12] = 0xFF;  // Read Program memory
+  cmd[13] = 0xFF;  // Read Data latches
+  cmd[14] = 0xFF;  // Increment Address
+  cmd[15] = 0xFF;  // Begin programming internally timed
+  return hardware().port().command(cmd);
+}
+
+//-----------------------------------------------------------------------------
+bool Pickit2::P16F::init()
+{
+  Array cmd;
+  cmd[0] = 'c';
+  cmd[1] = 0x00;   // Load Configuration
+  cmd[2] = 0x02;   // Load Program latches
+  cmd[3] = 0x03;   // Load Data latches
+  cmd[4] = 0x04;   // Read Program memory
+  cmd[5] = 0x05;   // Read Data latches
+  cmd[6] = 0x06;   // Increment Address
+  cmd[7] = 0x08;   // Begin programming internally timed
+  cmd[8] = 0x18;   // Begin Programming externally timed
+  cmd[9] = 0x0A;   // End externally time programming cycle
+  cmd[10] = 0x09;  // Bulk Erase program memory
+  cmd[11] = 0x0B;  // Bulk Erase Data memory
+  cmd[12] = 0xFF;  // Read Program memory
+  cmd[13] = 0xFF;  // Read Data latches
+  cmd[14] = 0xFF;  // Increment Address
+  cmd[15] = 0xFF;  // Begin programming internally timed
+  return hardware().port().command(cmd);
+}
+
+//-----------------------------------------------------------------------------
+bool Pickit2::P16F87XA::init()
+{
+  Array cmd;
+  cmd[0] = 'c';
+  cmd[1] = 0x00;   // Load Configuration
+  cmd[2] = 0x02;   // Load Program latches
+  cmd[3] = 0x03;   // Load Data latches
+  cmd[4] = 0x04;   // Read Program memory
+  cmd[5] = 0x05;   // Read Data latches
+  cmd[6] = 0x06;   // Increment Address
+  cmd[7] = 0x08;   // Begin programming internally timed
+  cmd[8] = 0x18;   // Begin Programming externally timed
+  cmd[9] = 0x17;   // End externally time programming cycle
+  cmd[10] = 0x1F;  // Bulk Erase program memory
+  cmd[11] = 0x1F;  // Bulk Erase Data memory
+  cmd[12] = 0xFF;  // Read Program memory
+  cmd[13] = 0xFF;  // Read Data latches
+  cmd[14] = 0xFF;  // Increment Address
+  cmd[15] = 0xFF;  // Begin programming internally timed
+  return hardware().port().command(cmd);
+}
+
+//-----------------------------------------------------------------------------
+bool Pickit2::P16F7X::init()
+{
+  Array cmd;
+  cmd[0] = 'c';
+  cmd[1] = 0x00;   // Load Configuration
+  cmd[2] = 0x02;   // Load Program latches
+  cmd[3] = 0x03;   // Load Data latches
+  cmd[4] = 0x04;   // Read Program memory
+  cmd[5] = 0x05;   // Read Data latches
+  cmd[6] = 0x06;   // Increment Address
+  cmd[7] = 0x08;   // Begin programming internally timed
+  cmd[8] = 0x08;   // Begin Programming externally timed
+  cmd[9] = 0x0E;   // End externally time programming cycle
+  cmd[10] = 0x09;  // Bulk Erase program memory
+  cmd[11] = 0x0B;  // Bulk Erase Data memory
+  cmd[12] = 0xFF;  // Read Program memory
+  cmd[13] = 0xFF;  // Read Data latches
+  cmd[14] = 0xFF;  // Increment Address
+  cmd[15] = 0xFF;  // Begin programming internally timed
+  return hardware().port().command(cmd);
+}
+
+bool Pickit2::P16F716::init()
+{
+  Array cmd;
+  cmd[0] = 'c';
+  cmd[1] = 0x00;   // Load Configuration
+  cmd[2] = 0x02;   // Load Program latches
+  cmd[3] = 0x03;   // Load Data latches
+  cmd[4] = 0x04;   // Read Program memory
+  cmd[5] = 0x05;   // Read Data latches
+  cmd[6] = 0x06;   // Increment Address
+  cmd[7] = 0x08;   // Begin programming internally timed
+  cmd[8] = 0x18;   // Begin Programming externally timed
+  cmd[9] = 0x0E;   // End externally time programming cycle
+  cmd[10] = 0x09;  // Bulk Erase program memory
+  cmd[11] = 0x0B;  // Bulk Erase Data memory
+  cmd[12] = 0xFF;  // Read Program memory
+  cmd[13] = 0xFF;  // Read Data latches
+  cmd[14] = 0xFF;  // Increment Address
+  cmd[15] = 0xFF;  // Begin programming internally timed
+  return hardware().port().command(cmd);
+}
+
+//-----------------------------------------------------------------------------
+bool Pickit2::P18F::init()
+{
+  Array cmd;
+  cmd[0] = 'c';
+  cmd[1] = 0x00;   // Load Configuration
+  cmd[2] = 0x02;   // Load Program latches
+  cmd[3] = 0x03;   // Load Data latches
+  cmd[4] = 0x04;   // Read Program memory
+  cmd[5] = 0x05;   // Read Data latches
+  cmd[6] = 0x06;   // Increment Address
+  cmd[7] = 0x08;   // Begin programming internally timed
+  cmd[8] = 0x18;   // Begin Programming externally timed
+  cmd[9] = 0x0A;   // End externally time programming cycle
+  cmd[10] = 0x09;  // Bulk Erase program memory
+  cmd[11] = 0x0B;  // Bulk Erase Data memory
+  cmd[12] = 0xFF;  // Read Program memory
+  cmd[13] = 0xFF;  // Read Data latches
+  cmd[14] = 0xFF;  // Increment Address
+  cmd[15] = 0xFF;  // Begin programming internally timed
+  return hardware().port().command(cmd);
+}
+
+bool Pickit2::P18F::doEraseCommand(uint cmd1, uint cmd2)
+{
+  Array cmd;
+  cmd[0] = 0x85;
+  cmd[1] = cmd1;
+  cmd[2] = cmd2;
+  return hardware().port().command(cmd);
+}
+
+bool Pickit2::P18F::doEraseRange(Pic::MemoryRangeType type)
+{
+  if ( type==Pic::MemoryRangeType::Eeprom ) return doEraseCommand(0x84, 0x00);
+  Q_ASSERT( type==Pic::MemoryRangeType::Code );
+  if ( !doEraseCommand(0x81, 0x00) ) return false; // boot
+  for (uint i=0; i<device().config().protection().nbBlocks(); i++)
+    if ( !doEraseCommand(1 << i, 0x80) ) return false;
+  return true;
+}
+
+bool Pickit2::P18F::doRead(Pic::MemoryRangeType type, Device::Array &data, const ::Programmer::VerifyData *vdata)
+{
+  USBPort &port = static_cast<USBPort &>(hardware().port());
+  data.resize(device().nbWords(type));
+  QValueVector<uint> words;
+  switch (type.type()) {
+    case Pic::MemoryRangeType::DeviceId:
+    case Pic::MemoryRangeType::UserId:
+    case Pic::MemoryRangeType::Config: {
+      Pickit::Array cmd = port.createCommand(0x80, data.count(), device().range(type).start.toUInt());
+      if ( !port.command(cmd) ) return false;
+      if ( !hardware().port().receiveWords(1, 1, words) ) return false;
+      for (uint k=0; k<data.count(); k++) {
+        data[k] = words[k];
+        if ( vdata && !hardware().verifyWord(k, data[k], type, *vdata) ) return false;
+      }
+      return true;
+    }
+    case Pic::MemoryRangeType::Code:
+      for (uint i=0; i<data.count();) {
+        Array cmd;
+        for (uint k=0; k<8; k++) port.fillCommand(cmd, 0x80, 64, 2*(i + 32 * k), 5*k);
+        if ( !port.command(cmd) ) return false;
+        for (uint k=0; k<8; k++) {
+          if ( !hardware().port().receiveWords(2, 1, words) ) return false;
+          for (uint k=0; k<32; k++) {
+            data[i] = words[k];
+            if ( vdata && !hardware().verifyWord(i, data[i], type, *vdata) ) return false;
+            i++;
+          }
+        }
+      }
+      _base.progressMonitor().addTaskProgress(data.count());
+      return true;
+    case Pic::MemoryRangeType::Eeprom:
+      for (uint i=0; i<data.count();) {
+       Pickit::Array cmd = port.createCommand(0x81, 64, i, false);
+        if ( !port.command(cmd) ) return false;
+        if ( !hardware().port().receiveWords(1, 1, words) ) return false;
+        for (uint k=0; k<64; k++) {
+          data[i] = words[k];
+          if ( vdata && !hardware().verifyWord(i, data[i], type, *vdata) ) return false;
+          i++;
+        }
+      }
+      _base.progressMonitor().addTaskProgress(data.count());
+      return true;
+    case Pic::MemoryRangeType::Cal:
+    case Pic::MemoryRangeType::CalBackup:
+    case Pic::MemoryRangeType::DebugVector:
+    case Pic::MemoryRangeType::HardwareStack:
+    case Pic::MemoryRangeType::ProgramExecutive:
+    case Pic::MemoryRangeType::Nb_Types: break;
+  }
+  Q_ASSERT(false);
+  return false;
+}
+
+bool Pickit2::P18F::doWrite(Pic::MemoryRangeType type, const Device::Array &data, bool force)
+{
+  Q_UNUSED(force);
+  USBPort &port = static_cast<USBPort &>(hardware().port());
+  switch (type.type()) {
+    case Pic::MemoryRangeType::UserId: {
+      Pickit::Array cmd = port.createCommand(0x82, data.count() / 2, device().range(type).start.toUInt());
+      for (uint i=0; i<data.count(); i++) cmd[i + 5] = data[i].byte(0);
+      return port.command(cmd);
+    }
+    case Pic::MemoryRangeType::Config: {
+      Array cmd;
+      for (uint i=0; i<data.count()/2; i++) {
+        cmd[4*i]     = 0x84;
+        cmd[1 + 4*i] = 2*i;
+        cmd[2 + 4*i] = data[2*i].byte(0);
+        cmd[3 + 4*i] = data[2*i+1].byte(0);
+      }
+      return port.command(cmd);
+    }
+    case Pic::MemoryRangeType::Code: {
+      uint nb = Pickit2::data(device().name()).progWidth;
+      for (uint i=0; i<data.count();) {
+        bool allBlank = true;
+        Pickit::Array cmd = port.createCommand(0x82, nb, 2*i);
+        for (uint k=0; k<nb; k++) {
+          if ( data[i].byte(0)!=0xFF || data[i].byte(1)!=0xFF ) allBlank = false;
+          cmd[5 + 2*k] = data[i].byte(0);
+          cmd[6 + 2*k] = data[i].byte(1);
+          i++;
+        }
+        if ( !allBlank && !port.command(cmd) ) return false;
+      }
+      _base.progressMonitor().addTaskProgress(data.count());
+      return true;
+    }
+    case Pic::MemoryRangeType::Eeprom:
+      for (uint i=0; i<data.count();) {
+        bool allBlank = true;
+        Pickit::Array cmd = port.createCommand(0x87, 32, i, false);
+        for (uint k=0; k<32; k++) {
+          if ( data[i].byte(0)!=0xFF ) allBlank = false;
+          cmd[4+k] = data[i].byte(0);
+          i++;
+        }
+        if ( !allBlank && !port.command(cmd) ) return false;
+      }
+      _base.progressMonitor().addTaskProgress(data.count());
+      return true;
+    case Pic::MemoryRangeType::DeviceId:
+    case Pic::MemoryRangeType::Cal:
+    case Pic::MemoryRangeType::CalBackup:
+    case Pic::MemoryRangeType::DebugVector:
+    case Pic::MemoryRangeType::HardwareStack:
+    case Pic::MemoryRangeType::ProgramExecutive:
+    case Pic::MemoryRangeType::Nb_Types: break;
+  }
+  Q_ASSERT(false);
+  return false;
+}
+
+bool Pickit2::P18F2X20::doEraseCommand(uint cmd1)
+{
+  Array cmd;
+  cmd[0] = 0x86;
+  cmd[1] = cmd1;
+  return hardware().port().command(cmd);
+}
+
+bool Pickit2::P18F2X20::doEraseRange(Pic::MemoryRangeType type)
+{
+  if ( type==Pic::MemoryRangeType::Eeprom ) return doEraseCommand(0x81);
+  Q_ASSERT( type==Pic::MemoryRangeType::Code );
+  if ( !doEraseCommand(0x83) ) return false; // boot
+  for (uint i=0; i<device().config().protection().nbBlocks(); i++)
+    if ( !doEraseCommand(0x88 + i) ) return false;
+  return true;
+}
diff --git a/src/progs/pickit2/base/pickit2.h b/src/progs/pickit2/base/pickit2.h
new file mode 100644
index 0000000..8efa8ff
--- /dev/null
+++ b/src/progs/pickit2/base/pickit2.h
@@ -0,0 +1,123 @@
+/***************************************************************************
+ * Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICKIT2_H
+#define PICKIT2_H
+
+#include "pickit.h"
+#include "pickit2_data.h"
+
+namespace Pickit2
+{
+//-----------------------------------------------------------------------------
+class Array : public Pickit::Array
+{
+public:
+  Array() : Pickit::Array(64, 'Z', PrintAlphaNum) {}
+};
+
+//-----------------------------------------------------------------------------
+class USBPort : public Pickit::USBPort
+{
+public:
+  USBPort(Log::Base &log) : Pickit::USBPort(0x0033, log) {}
+  virtual Pickit::Array array() const { return Array(); }
+  void fillCommand(Pickit::Array &cmd1, uchar cmd2, uint nbBytes, uint address, uint i, bool longAddress = true) const;
+  Pickit::Array createCommand(uchar cmd, uint nbBytes, uint address, bool longAddress = true) const;
+
+  bool readFirmwareCodeMemory(Device::Array &data, const Device::Array *vdata, ProgressMonitor &monitor);
+  //bool readFirmwareEepromMemory(Device::Array &data);
+  bool eraseFirmwareCodeMemory();
+  bool writeFirmwareCodeMemory(const Device::Array &data, ProgressMonitor &monitor);
+  //bool writeFirmwareEepromMemory(const Device::Array &data);
+  bool resetFirmwareDevice(::Programmer::Mode mode) { return command(mode==::Programmer::BootloadMode ? 'B' : 0xFF); }
+  bool uploadFirmware(const Pic::Memory &memory, ProgressMonitor &monitor);
+
+private:
+  virtual uint readEndPoint() const { return 0x81; }
+  virtual uint writeEndPoint() const { return 0x01; }
+};
+
+//-----------------------------------------------------------------------------
+class Hardware : public Pickit::Hardware
+{
+public:
+  Hardware(::Programmer::Base &base) : Pickit::Hardware(base, new USBPort(base)) {}
+  virtual bool readVoltages(VoltagesData &voltages);
+  bool setVddVpp(double vdd, double vpp);
+};
+
+//-----------------------------------------------------------------------------
+class Baseline : public Pickit::Baseline
+{
+public:
+  Baseline(::Programmer::Base &base) : Pickit::Baseline(base) {}
+  virtual bool init();
+  virtual char entryMode() const { return data(device().name()).entryMode; }
+  virtual uint nbWrites(Pic::MemoryRangeType type) const { return (type==Pic::MemoryRangeType::Eeprom ? 4 : 16); }
+};
+
+//-----------------------------------------------------------------------------
+class P16F : public Pickit::P16F
+{
+public:
+  P16F(::Programmer::Base &base) : Pickit::P16F(base) {}
+  virtual bool init();
+  virtual char entryMode() const { return data(device().name()).entryMode; }
+  virtual uint nbWrites(Pic::MemoryRangeType type) const { return (type==Pic::MemoryRangeType::Code ? 16 : 4); }
+};
+
+class P16F87XA : public P16F
+{
+public:
+  P16F87XA(::Programmer::Base &base) : P16F(base) {}
+  virtual bool init();
+};
+
+class P16F7X : public P16F
+{
+public:
+  P16F7X(::Programmer::Base &base) : P16F(base) {}
+  virtual bool init();
+  virtual char writeCode() const { return 'w'; }
+};
+
+class P16F716 : public P16F
+{
+public:
+  P16F716(::Programmer::Base &base) : P16F(base) {}
+  virtual bool init();
+};
+
+//-----------------------------------------------------------------------------
+class P18F : public Pickit::DeviceSpecific
+{
+public:
+  P18F(::Programmer::Base &base) : Pickit::DeviceSpecific(base) {}
+  Hardware &hardware() { return static_cast<Hardware &>(Pickit::DeviceSpecific::hardware()); }
+  virtual bool init();
+  virtual bool doEraseRange(Pic::MemoryRangeType type);
+  virtual bool doErase(bool) { return doEraseCommand(0x87, 0x0F); }
+  bool doEraseCommand(uint cmd1, uint cmd2);
+  virtual bool doRead(Pic::MemoryRangeType type, Device::Array &data, const ::Programmer::VerifyData *vdata);
+  virtual bool doWrite(Pic::MemoryRangeType type, const Device::Array &data, bool force);
+  virtual char entryMode() const { return data(device().name()).entryMode; }
+};
+
+class P18F2X20 : public P18F
+{
+public:
+  P18F2X20(::Programmer::Base &base) : P18F(base) {}
+  virtual bool doEraseRange(Pic::MemoryRangeType type);
+  virtual bool doErase(bool) { return doEraseCommand(0x80); }
+  bool doEraseCommand(uint cmd);
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/pickit2/base/pickit2.xml b/src/progs/pickit2/base/pickit2.xml
new file mode 100644
index 0000000..044b7bc
--- /dev/null
+++ b/src/progs/pickit2/base/pickit2.xml
@@ -0,0 +1,114 @@
+<!-- ************************************************************************* -->
+<!-- * Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             * -->
+<!-- *                                                                       * -->
+<!-- * This program is free software; you can redistribute it and/or modify  * -->
+<!-- * it under the terms of the GNU General Public License as published by  * -->
+<!-- * the Free Software Foundation; either version 2 of the License, or     * -->
+<!-- * (at your option) any later version.                                   * -->
+<!-- *************************************************************************/-->
+<!DOCTYPE piklab>
+
+<type name="pickit2">
+  <device name="10F200"  family="Baseline" entry="O" pmode="0" support_type="tested" />
+  <device name="10F202"  family="Baseline" entry="O" pmode="0" support_type="tested" />
+  <device name="10F204"  family="Baseline" entry="O" pmode="0" support_type="tested" />
+  <device name="10F206"  family="Baseline" entry="O" pmode="0" support_type="tested" />
+  <device name="10F220"  family="Baseline" entry="O" pmode="0" />
+  <device name="10F222"  family="Baseline" entry="O" pmode="0" />
+  <device name="12F508"  family="Baseline" entry="O" pmode="0" support_type="tested" />
+  <device name="12F509"  family="Baseline" entry="O" pmode="0" support_type="tested" />
+  <device name="12F510"  family="Baseline" entry="O" pmode="0" support_type="tested" />
+  <device name="16F505"  family="Baseline" entry="O" pmode="0" />
+  <device name="16F506"  family="Baseline" entry="O" pmode="0" />
+  <device name="16F54"   family="Baseline" entry="O" pmode="0" />
+  <device name="16F57"   family="Baseline" entry="O" pmode="0" />
+  <device name="16F59"   family="Baseline" entry="O" pmode="0" />
+
+  <device name="12F615"  family="P16F" entry="P" pmode="n" pwidth="1" support_type="tested" />
+  <device name="12F629"  family="P16F" entry="P" pmode="1" regen="true" support_type="tested" />
+  <device name="12F635"  family="P16F" entry="P" pmode="4" support_type="tested" />
+  <device name="12F675"  family="P16F" entry="P" pmode="1" regen="true" support_type="tested" />
+  <device name="12F683"  family="P16F" entry="P" pmode="4" support_type="tested" />
+  <device name="16F616"  family="P16F" entry="P" pmode="n" pwidth="4" support_type="tested" />
+  <device name="16F627A" family="P16F" entry="P" pmode="1" support_type="tested" />
+  <device name="16F628A" family="P16F" entry="P" pmode="1" support_type="tested" />
+  <device name="16F630"  family="P16F" entry="P" pmode="1" regen="true" support_type="tested" />
+  <device name="16F631"  family="P16F" entry="P" pmode="1" support_type="tested" />
+  <device name="16F636"  family="P16F" entry="P" pmode="4" support_type="tested" />
+  <device name="16F639"  family="P16F" entry="P" pmode="1" support_type="tested" />
+  <device name="16F648A" family="P16F" entry="P" pmode="1" support_type="tested" />
+  <device name="16F676"  family="P16F" entry="P" pmode="1" regen="true" support_type="tested" />
+  <device name="16F677"  family="P16F" entry="P" pmode="1" support_type="tested" />
+  <device name="16F684"  family="P16F" entry="P" pmode="4" support_type="tested" />
+  <device name="16F685"  family="P16F" entry="P" pmode="4" support_type="tested" />
+  <device name="16F687"  family="P16F" entry="P" pmode="4" support_type="tested" />
+  <device name="16F688"  family="P16F" entry="P" pmode="4" support_type="tested" />
+  <device name="16F689"  family="P16F" entry="P" pmode="4" support_type="tested" />
+  <device name="16F690"  family="P16F" entry="P" pmode="4" support_type="tested" />
+  <device name="16F716"  family="P16F716" entry="O" pmode="4" />
+  <device name="16F73"   family="P16F7X" entry="O" pmode="n" pwidth="2" />
+  <device name="16F74"   family="P16F7X" entry="O" pmode="n" pwidth="2" />
+  <device name="16F76"   family="P16F7X" entry="O" pmode="n" pwidth="2" />
+  <device name="16F77"   family="P16F7X" entry="O" pmode="n" pwidth="2" />
+  <device name="16F737"  family="P16F7X" entry="O" pmode="n" pwidth="2" />
+  <device name="16F747"  family="P16F7X" entry="O" pmode="n" pwidth="2" />
+  <device name="16F767"  family="P16F7X" entry="O" pmode="n" pwidth="2" />
+  <device name="16F777"  family="P16F7X" entry="O" pmode="n" pwidth="2" />
+  <device name="16F785"  family="P16F"   entry="P" pmode="4" />
+  <device name="16F818"  family="P16F87XA" entry="O" pmode="n" pwidth="4" support_type="tested" />
+  <device name="16F819"  family="P16F87XA" entry="O" pmode="n" pwidth="4" support_type="tested" />
+  <device name="16F87"   family="P16F87XA" entry="O" pmode="n" pwidth="4" />
+  <device name="16F88"   family="P16F87XA" entry="O" pmode="n" pwidth="4" />
+  <device name="16F873"  family="P16F" entry="O" pmode="n" pwidth="8" />
+  <device name="16F874"  family="P16F" entry="O" pmode="n" pwidth="8" />
+  <device name="16F876"  family="P16F" entry="O" pmode="n" pwidth="8" />
+  <device name="16F877"  family="P16F" entry="O" pmode="n" pwidth="8" />
+  <device name="16F873A" family="P16F87XA" entry="O" pmode="n" pwidth="8" support_type="tested" />
+  <device name="16F874A" family="P16F87XA" entry="O" pmode="n" pwidth="8" support_type="tested" />
+  <device name="16F876A" family="P16F87XA" entry="O" pmode="n" pwidth="8" support_type="tested" />
+  <device name="16F877A" family="P16F87XA" entry="O" pmode="n" pwidth="8" support_type="tested" />
+  <device name="16F913"  family="P16F" entry="O" pmode="n" pwidth="4" support_type="tested" />
+  <device name="16F914"  family="P16F" entry="O" pmode="n" pwidth="4" support_type="tested" />
+  <device name="16F916"  family="P16F" entry="O" pmode="n" pwidth="8" support_type="tested" />
+  <device name="16F917"  family="P16F" entry="O" pmode="n" pwidth="8" support_type="tested" />
+  <device name="16F946"  family="P16F" entry="O" pmode="n" pwidth="8" />
+
+  <device name="18F1220" family="P18F2X20" entry="O" pmode="n" pwidth="4" />
+  <device name="18F1320" family="P18F2X20" entry="O" pmode="n" pwidth="4" />
+  <device name="18F2220" family="P18F2X20" entry="P" pmode="n" pwidth="4" />
+  <device name="18F2221" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F2320" family="P18F2X20" entry="P" pmode="n" pwidth="4" />
+  <device name="18F2321" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F2410" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F2420" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F2455" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F2480" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F2510" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F2515" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F2520" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F2525" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F2550" family="P18F" entry="P" pmode="n" pwidth="16" support_type="tested" />
+  <device name="18F2580" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F2585" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F2610" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F2620" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F2680" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F4220" family="P18F2X20" entry="P" pmode="n" pwidth="4" />
+  <device name="18F4221" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F4320" family="P18F2X20" entry="P" pmode="n" pwidth="4" />
+  <device name="18F4321" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F4410" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F4420" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F4455" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F4480" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F4510" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F4515" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F4520" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F4525" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F4550" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F4580" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F4585" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F4610" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F4620" family="P18F" entry="P" pmode="n" pwidth="16" />
+  <device name="18F4680" family="P18F" entry="P" pmode="n" pwidth="16" />
+</type>
diff --git a/src/progs/pickit2/base/pickit2_data.h b/src/progs/pickit2/base/pickit2_data.h
new file mode 100644
index 0000000..abae867
--- /dev/null
+++ b/src/progs/pickit2/base/pickit2_data.h
@@ -0,0 +1,24 @@
+/***************************************************************************
+ * Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICKIT2_DATA_H
+#define PICKIT2_DATA_H
+
+#include <qstring.h>
+
+namespace Pickit2
+{
+  struct Data {
+    char  entryMode, progMode;
+    uchar progWidth;
+    bool  regenerateOsccal;
+  };
+  extern const Data &data(const QString &device);
+} // namespace
+
+#endif
diff --git a/src/progs/pickit2/base/pickit2_prog.cpp b/src/progs/pickit2/base/pickit2_prog.cpp
new file mode 100644
index 0000000..88b73b9
--- /dev/null
+++ b/src/progs/pickit2/base/pickit2_prog.cpp
@@ -0,0 +1,78 @@
+/***************************************************************************
+ * Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pickit2_prog.h"
+
+#include "devices/list/device_list.h"
+#include "pickit2.h"
+
+//----------------------------------------------------------------------------
+VersionData Pickit2::Base::firmwareVersion(Programmer::FirmwareVersionType type) const
+{
+  switch (type.type()) {
+    case Programmer::FirmwareVersionType::Min: return VersionData(1, 10, 0);
+    case Programmer::FirmwareVersionType::Recommended:
+    case Programmer::FirmwareVersionType::Max: return VersionData(1, 20, 0);
+    case Programmer::FirmwareVersionType::Nb_Types: break;
+  }
+  Q_ASSERT(false);
+  return VersionData();
+}
+
+bool Pickit2::Base::deviceHasOsccalRegeneration() const
+{
+  return data(device()->name()).regenerateOsccal;
+}
+
+bool Pickit2::Base::setTarget()
+{
+  // #### FIXME: this needs to test for 18J first to protected them
+  if ( !static_cast<Pickit2::Hardware &>(hardware()).setVddVpp(5.0, 12.0) ) return false;
+  return static_cast<Pickit::DeviceSpecific *>(_specific)->init();
+}
+
+bool Pickit2::Base::internalEnterMode(::Programmer::Mode mode)
+{
+  USBPort &port = static_cast<USBPort &>(hardware().port());
+  if ( !port.resetFirmwareDevice(mode) ) return false;
+  log(Log::DebugLevel::Extra, "disconnecting and try to reconnect PICkit2 in new mode...");
+  disconnectHardware();
+  Port::usleep(3000000);
+  return connectHardware();
+}
+
+bool Pickit2::Base::doUploadFirmware(PURL::File &file)
+{
+  const Pic::Data &data = static_cast<const Pic::Data &>(*Device::lister().data("18F2550"));
+  Pic::Memory memory(static_cast<const Pic::Data &>(data));
+  QStringList errors, warnings;
+  Pic::Memory::WarningTypes warningTypes;
+  if ( !memory.load(file.stream(), errors, warningTypes, warnings) ) {
+    log(Log::LineType::Error, i18n("Could not read firmware hex file \"%1\" (%2).").arg(file.url().pretty()).arg(errors[0]));
+    return false;
+  }
+  if ( warningTypes!=Pic::Memory::NoWarning ) {
+    log(Log::LineType::Error, i18n("Firmware hex file seems incompatible with device 18F2550 inside PICkit2."));
+    return false;
+  }
+  log(Log::LineType::Information, i18n("  Uploading PICkit2 firmware..."));
+  if ( !enterMode(::Programmer::BootloadMode) ) return false;
+  _progressMonitor.insertTask(i18n("Uploading Firmware..."), 2*data.nbWords(Pic::MemoryRangeType::Code));
+  if ( !static_cast<USBPort &>(hardware().port()).uploadFirmware(memory, _progressMonitor) ) {
+    log(Log::LineType::Error, i18n("Failed to upload firmware."));
+    return false;
+  }
+  log(Log::LineType::Information, i18n("Firmware succesfully uploaded."));
+  return enterMode(::Programmer::NormalMode);
+}
+
+//----------------------------------------------------------------------------
+Programmer::Hardware *Pickit2::Group::createHardware(::Programmer::Base &base, const ::Programmer::HardwareDescription &) const
+{
+  return new Hardware(base);
+}
diff --git a/src/progs/pickit2/base/pickit2_prog.h b/src/progs/pickit2/base/pickit2_prog.h
new file mode 100644
index 0000000..5a67e2a
--- /dev/null
+++ b/src/progs/pickit2/base/pickit2_prog.h
@@ -0,0 +1,50 @@
+/***************************************************************************
+ * Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICKIT2_PROG_H
+#define PICKIT2_PROG_H
+
+#include "common/global/global.h"
+#include "pickit_prog.h"
+
+namespace Pickit2
+{
+//----------------------------------------------------------------------------
+class Base : public Pickit::Base
+{
+Q_OBJECT
+public:
+  Base(const Programmer::Group &group, const Pic::Data *data) : Pickit::Base(group, data) {}
+  virtual bool deviceHasOsccalRegeneration() const;
+  virtual bool setTarget();
+
+private:
+  virtual VersionData firmwareVersion(Programmer::FirmwareVersionType type) const;
+  virtual bool internalEnterMode(::Programmer::Mode mode);
+  virtual bool doUploadFirmware(PURL::File &file);
+};
+
+//----------------------------------------------------------------------------
+class Group : public Pickit::Group
+{
+public:
+  virtual QString name() const { return "pickit2"; }
+  virtual QString label() const { return i18n("PICkit2 Firmware 1.x"); }
+  virtual Programmer::Properties properties() const { return ::Programmer::Programmer | ::Programmer::HasFirmware | ::Programmer::CanUploadFirmware | ::Programmer::CanReadMemory | ::Programmer::HasConnectedState; }
+  virtual bool canReadVoltage(Pic::VoltageType type) const { return ( type==Pic::TargetVdd || type==Pic::TargetVpp ); }
+
+protected:
+  virtual void initSupported();
+  virtual Programmer::Base *createBase(const Device::Data *data) const { return new ::Pickit2::Base(*this, static_cast<const Pic::Data *>(data)); }
+  virtual Programmer::Hardware *createHardware(Programmer::Base &base, const ::Programmer::HardwareDescription &hd) const;
+  virtual Programmer::DeviceSpecific *createDeviceSpecific(Programmer::Base &base) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/pickit2/base/pickit_prog.cpp b/src/progs/pickit2/base/pickit_prog.cpp
new file mode 100644
index 0000000..c11dd08
--- /dev/null
+++ b/src/progs/pickit2/base/pickit_prog.cpp
@@ -0,0 +1,54 @@
+/***************************************************************************
+ * Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pickit_prog.h"
+
+#include "common/global/global.h"
+#include "pickit.h"
+#include "progs/base/prog_config.h"
+
+Pickit::Base::Base(const Programmer::Group &group, const Pic::Data *data)
+  : ::Programmer::PicBase(group, data, "pickit_programmer")
+{}
+
+Pickit::Hardware &Pickit::Base::hardware()
+{
+  return static_cast<Hardware &>(*_hardware);
+}
+
+bool Pickit::Base::readFirmwareVersion()
+{
+  return hardware().port().getMode(_firmwareVersion, _mode);
+}
+
+bool Pickit::Base::regenerateOsccal(const PURL::Url &url)
+{
+  log(Log::DebugLevel::Normal, QString("  Calibration firmware file: %1").arg(url.pretty()));
+  Log::StringView sview;
+  PURL::File file(url, sview);
+  if ( !file.openForRead() ) {
+    log(Log::LineType::Error, i18n("Could not open firmware file \"%1\".").arg(url.pretty()));
+    return false;
+  }
+  Pic::Memory memory(*device());
+  QStringList errors, warnings;
+  Pic::Memory::WarningTypes warningTypes;
+  if ( !memory.load(file.stream(), errors, warningTypes, warnings) ) {
+    log(Log::LineType::Error, i18n("Could not read calibration firmware file \"%1\" (%2).").arg(url.pretty()).arg(errors[0]));
+    return false;
+  }
+  if ( warningTypes!=Pic::Memory::NoWarning ) {
+    log(Log::LineType::Error, i18n("Calibration firmware file seems incompatible with selected device %1.").arg(device()->name()));
+    return false;
+  }
+  if ( !askContinue(i18n("This will overwrite the device code memory. Continue anyway?")) ) return false;
+  if ( !program(memory, Pic::MemoryRange(Pic::MemoryRangeType::Nb_Types)) ) return false;
+  Device::Array array(1);
+  if ( !static_cast<Hardware &>(hardware()).regenerateOsccal(array[0]) ) return false;
+  return programCalibration(array);
+}
diff --git a/src/progs/pickit2/base/pickit_prog.h b/src/progs/pickit2/base/pickit_prog.h
new file mode 100644
index 0000000..b35fc92
--- /dev/null
+++ b/src/progs/pickit2/base/pickit_prog.h
@@ -0,0 +1,45 @@
+/***************************************************************************
+ * Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICKIT_PROG_H
+#define PICKIT_PROG_H
+
+#include "common/global/global.h"
+#include "progs/icd2/base/microchip.h"
+#include "progs/base/prog_group.h"
+#include "pickit.h"
+
+namespace Pickit
+{
+class Hardware;
+
+//----------------------------------------------------------------------------
+class Base : public Programmer::PicBase
+{
+Q_OBJECT
+public:
+  Base(const Programmer::Group &group, const Pic::Data *data);
+  virtual bool deviceHasOsccalRegeneration() const = 0;
+  bool regenerateOsccal(const PURL::Url &url);
+  virtual bool readFirmwareVersion();
+
+protected:
+  Hardware &hardware();
+};
+
+//----------------------------------------------------------------------------
+class Group : public Programmer::PicGroup
+{
+public:
+  virtual ::Programmer::TargetPowerMode targetPowerMode() const { return ::Programmer::TargetExternallyPowered; }
+  virtual bool isPortSupported(PortType type) const { return ( type==PortType::USB ); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/pickit2/gui/Makefile.am b/src/progs/pickit2/gui/Makefile.am
new file mode 100644
index 0000000..d2fa763
--- /dev/null
+++ b/src/progs/pickit2/gui/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libpickit2ui.la
+libpickit2ui_la_SOURCES = pickit2_group_ui.cpp
+libpickit2ui_la_LDFLAGS = $(all_libraries)
\ No newline at end of file
diff --git a/src/progs/pickit2/gui/pickit2_group_ui.cpp b/src/progs/pickit2/gui/pickit2_group_ui.cpp
new file mode 100644
index 0000000..f36395a
--- /dev/null
+++ b/src/progs/pickit2/gui/pickit2_group_ui.cpp
@@ -0,0 +1,52 @@
+/***************************************************************************
+ * Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pickit2_group_ui.h"
+
+#include <kfiledialog.h>
+
+#include "common/global/purl.h"
+#include "common/gui/misc_gui.h"
+#include "progs/gui/prog_config_widget.h"
+#include "progs/base/prog_group.h"
+#include "progs/pickit2/base/pickit2_prog.h"
+#include "progs/pickit2/base/pickit2.h"
+
+//----------------------------------------------------------------------------
+Pickit::AdvancedDialog::AdvancedDialog(Base &base, QWidget *parent, const char *name)
+  : ::Programmer::PicAdvancedDialog(base, parent, name)
+{}
+
+void Pickit::AdvancedDialog::regenerateCalibration()
+{
+  if ( !base().deviceHasOsccalRegeneration() ) {
+    MessageBox::sorry(i18n("Osccal regeneration not available for the selected device."), Log::Show);
+    return;
+  }
+  KFileDialog dialog(":open_autohex", PURL::filter(PURL::Hex), this, "autohex_dialog", true);
+  dialog.setOperationMode(KFileDialog::Opening);
+  dialog.setCaption(i18n("Open Calibration Firmware"));
+  dialog.setMode(KFile::File);
+  //dialog.ops->clearHistory();
+  dialog.setSelection("autocal.hex");
+  dialog.exec();
+  PURL::Url url(dialog.selectedURL());
+  if ( url.isEmpty() ) return;
+  base().regenerateOsccal(url);
+}
+
+//----------------------------------------------------------------------------
+::Programmer::ConfigWidget *Pickit2::GroupUI::createConfigWidget(QWidget *parent) const
+{
+  return new ::Programmer::ConfigWidget(static_cast<const ::Programmer::Group &>(group()), parent);
+}
+
+::Programmer::AdvancedDialog *Pickit2::GroupUI::createAdvancedDialog(::Programmer::Base &base, QWidget *parent) const
+{
+  return new Pickit::AdvancedDialog(static_cast<Base &>(base), parent, "pickit2_advanced_dialog");
+}
diff --git a/src/progs/pickit2/gui/pickit2_group_ui.h b/src/progs/pickit2/gui/pickit2_group_ui.h
new file mode 100644
index 0000000..f79aa1f
--- /dev/null
+++ b/src/progs/pickit2/gui/pickit2_group_ui.h
@@ -0,0 +1,42 @@
+/***************************************************************************
+ * Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICKIT2_GROUP_UI_H
+#define PICKIT2_GROUP_UI_H
+
+#include "devices/pic/gui/pic_prog_group_ui.h"
+#include "progs/pickit2/base/pickit_prog.h"
+
+//----------------------------------------------------------------------------
+namespace Pickit
+{
+class AdvancedDialog : public ::Programmer::PicAdvancedDialog
+{
+Q_OBJECT
+public:
+  AdvancedDialog(Base &base, QWidget *parent, const char *name);
+  Base &base() { return static_cast<Base &>(_base); }
+
+public slots:
+  virtual void regenerateCalibration();
+};
+} // namespace
+
+//----------------------------------------------------------------------------
+namespace Pickit2
+{
+class GroupUI : public ::Programmer::GroupUI
+{
+public:
+  virtual ::Programmer::ConfigWidget *createConfigWidget(QWidget *parent) const;
+  virtual bool hasAdvancedDialog() const { return true; }
+  virtual ::Programmer::AdvancedDialog *createAdvancedDialog(::Programmer::Base &base, QWidget *parent) const;
+};
+} // namespace
+
+#endif
diff --git a/src/progs/pickit2/pickit2.pro b/src/progs/pickit2/pickit2.pro
new file mode 100644
index 0000000..60ac0f5
--- /dev/null
+++ b/src/progs/pickit2/pickit2.pro
@@ -0,0 +1,2 @@
+TEMPLATE = subdirs
+SUBDIRS = xml base
diff --git a/src/progs/pickit2/xml/Makefile.am b/src/progs/pickit2/xml/Makefile.am
new file mode 100644
index 0000000..5e8197e
--- /dev/null
+++ b/src/progs/pickit2/xml/Makefile.am
@@ -0,0 +1,14 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_PROGRAMS = xml_pickit2_parser
+xml_pickit2_parser_SOURCES = xml_pickit2_parser.cpp
+OBJECTS = $(top_builddir)/src/devices/list/libdevicelistnoui.la \
+	$(top_builddir)/src/devices/pic/pic/libpic.la $(top_builddir)/src/devices/pic/base/libpicbase.la \
+	$(top_builddir)/src/devices/pic/xml_data/libpicxml.la \
+	$(top_builddir)/src/devices/mem24/mem24/libmem24.la $(top_builddir)/src/devices/mem24/base/libmem24base.la \
+	$(top_builddir)/src/devices/mem24/xml_data/libmem24xml.la \
+	$(top_builddir)/src/xml_to_data/libxmltodata.la $(top_builddir)/src/devices/base/libdevicebase.la \
+	$(top_builddir)/src/common/common/libcommon.la
+xml_pickit2_parser_DEPENDENCIES = $(OBJECTS)
+xml_pickit2_parser_LDADD = $(OBJECTS) $(LIB_KDECORE)
diff --git a/src/progs/pickit2/xml/xml.pro b/src/progs/pickit2/xml/xml.pro
new file mode 100644
index 0000000..0604fbb
--- /dev/null
+++ b/src/progs/pickit2/xml/xml.pro
@@ -0,0 +1,17 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/app.pro)
+
+TARGET   = xml_pickit2_parser
+SOURCES += xml_pickit2_parser.cpp
+LIBS    += ../../../devices/list/libdevicelist.a \
+           ../../../devices/mem24/mem24/libmem24.a ../../../devices/mem24/xml_data/libmem24xml.a \
+           ../../../devices/mem24/base/libmem24base.a \
+           ../../../devices/pic/pic/libpic.a ../../../devices/pic/xml_data/libpicxml.a \
+           ../../../devices/pic/base/libpicbase.a ../../../xml_to_data/libxmltodata.a \
+           ../../../devices/base/libdevicebase.a ../../../common/global/libglobal.a \
+           ../../../common/nokde/libnokde.a ../../../common/common/libcommon.a
+
+unix:QMAKE_POST_LINK = cd ../base && ../xml/xml_pickit2_parser
+unix:QMAKE_CLEAN += ../base/pickit2_data.cpp
+win32:QMAKE_POST_LINK = cd ..\base && ..\xml\xml_pickit2_parser.exe
+win32:QMAKE_CLEAN += ..\base\pickit2_data.cpp
diff --git a/src/progs/pickit2/xml/xml_pickit2_parser.cpp b/src/progs/pickit2/xml/xml_pickit2_parser.cpp
new file mode 100644
index 0000000..ffc82f7
--- /dev/null
+++ b/src/progs/pickit2/xml/xml_pickit2_parser.cpp
@@ -0,0 +1,75 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "xml_to_data/prog_xml_to_data.h"
+#include "progs/pickit2/base/pickit2_data.h"
+
+namespace Pickit2
+{
+
+class XmlToData : public Programmer::XmlToData<Data>
+{
+public:
+  XmlToData() : Programmer::XmlToData<Data>("pickit2", "Pickit2") {}
+
+private:
+  virtual void parseData(QDomElement element, Data &data);
+  virtual void outputData(const Data &data, QTextStream &s) const;
+  virtual void outputFunctions(QTextStream &s) const;
+};
+
+void Pickit2::XmlToData::parseData(QDomElement element, Data &data)
+{
+  QString s = element.attribute("entry");
+  if ( s.length()!=1 || (s[0]!='O' && s[0]!='P') ) qFatal("Invalid or missing entry mode");
+  data.entryMode = s[0].latin1();
+  s = element.attribute("pmode");
+  if ( s.length()!=1 || (s[0]!='0' && s[0]!='1' && s[0]!='4' && s[0]!='n') )
+    qFatal("Invalid or missing program mode");
+  data.progMode = s[0].latin1();
+  s = element.attribute("pwidth");
+  if ( data.progMode!='n' ) {
+    if ( s.length()!=0 ) qFatal("Program width should not be defined");
+    data.progWidth = 0;
+  } else {
+    bool ok;
+    data.progWidth = s.toUInt(&ok);
+    if ( !ok ) qFatal("Invalid or missing program width");
+  }
+  s = element.attribute("regen");
+  if ( s.isEmpty() || s=="false" ) data.regenerateOsccal = false;
+  else if ( s=="true" ) data.regenerateOsccal = true;
+  else qFatal("Invalid regen value");
+}
+
+void Pickit2::XmlToData::outputData(const Data &data, QTextStream &s) const
+{
+  s <<  "'" << data.entryMode << "', '" << data.progMode;
+  s << "', " << data.progWidth << ", " << (data.regenerateOsccal ? "true" : "false");
+}
+
+void Pickit2::XmlToData::outputFunctions(QTextStream &s) const
+{
+  Programmer::XmlToData<Data>::outputFunctions(s);
+  s << "::Programmer::DeviceSpecific *Group::createDeviceSpecific(::Programmer::Base &base) const" << endl;
+  s << "{" << endl;
+  s << "  uint i = family(static_cast< ::Pickit2::Base &>(base).device()->name());" << endl;
+  s << "  switch(i) {" << endl;
+  for (uint i=0; i<uint(families().count()); i++) {
+    s << "    case " + QString::number(i) + ": return new " + families()[i] + "(base);" << endl;
+  }
+  s << "  }" << endl;
+  s << "  Q_ASSERT(false);" << endl;
+  s << "  return 0;" << endl;
+  s << "}" << endl;
+}
+
+} // namespace
+
+//-----------------------------------------------------------------------------
+XML_MAIN(Pickit2::XmlToData)
diff --git a/src/progs/pickit2_bootloader/Makefile.am b/src/progs/pickit2_bootloader/Makefile.am
new file mode 100644
index 0000000..fccf96d
--- /dev/null
+++ b/src/progs/pickit2_bootloader/Makefile.am
@@ -0,0 +1,3 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+SUBDIRS = xml base gui
diff --git a/src/progs/pickit2_bootloader/base/Makefile.am b/src/progs/pickit2_bootloader/base/Makefile.am
new file mode 100644
index 0000000..db87222
--- /dev/null
+++ b/src/progs/pickit2_bootloader/base/Makefile.am
@@ -0,0 +1,11 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libpickit2bootloader.la
+libpickit2bootloader_la_SOURCES = pickit2_bootloader_data.cpp pickit2_bootloader_prog.cpp pickit2_bootloader.cpp
+libpickit2bootloader_la_DEPENDENCIES = pickit2_bootloader_data.cpp
+
+noinst_DATA = pickit2_bootloader.xml
+pickit2_bootloader_data.cpp: ../xml/xml_pickit2_bootloader_parser pickit2_bootloader.xml
+	../xml/xml_pickit2_bootloader_parser
+CLEANFILES = pickit2_bootloader_data.cpp
diff --git a/src/progs/pickit2_bootloader/base/base.pro b/src/progs/pickit2_bootloader/base/base.pro
new file mode 100644
index 0000000..9a2fe76
--- /dev/null
+++ b/src/progs/pickit2_bootloader/base/base.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = pickit2_bootloader
+HEADERS += pickit2_bootloader.h pickit2_bootloader_prog.h pickit2_bootloader_data.h
+SOURCES += pickit2_bootloader.cpp pickit2_bootloader_prog.cpp pickit2_bootloader_data.cpp
diff --git a/src/progs/pickit2_bootloader/base/pickit2_bootloader.cpp b/src/progs/pickit2_bootloader/base/pickit2_bootloader.cpp
new file mode 100644
index 0000000..d080481
--- /dev/null
+++ b/src/progs/pickit2_bootloader/base/pickit2_bootloader.cpp
@@ -0,0 +1,73 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pickit2_bootloader.h"
+
+//-----------------------------------------------------------------------------
+Pickit2Bootloader::Hardware::Hardware(::Programmer::Base &base)
+  : Bootloader::Hardware(base, new Pickit2::USBPort(base))
+{}
+
+bool Pickit2Bootloader::Hardware::internalConnectHardware()
+{
+  if ( !openPort() ) return false;
+  ::Programmer::Mode mode;
+  VersionData version;
+  if ( !port().getMode(version, mode) ) return false;
+  if ( mode!=::Programmer::BootloadMode ) {
+    log(Log::LineType::Information, i18n("Trying to enter bootloader mode..."));
+    if ( !port().resetFirmwareDevice(::Programmer::BootloadMode) ) return false;
+    for (uint i=0;; i++) {
+      port().close();
+      Port::usleep(500000); // ??
+      if ( !openPort() ) continue;
+      if ( !port().getMode(version, mode) ) continue;
+      if ( i==4 || mode!=::Programmer::BootloadMode ) {
+        log(Log::LineType::Error, i18n("Could not detect device in bootloader mode."));
+        return false;
+      }
+    }
+  }
+  log(Log::LineType::Information, i18n("Bootloader version %1 detected.").arg(version.pretty()));
+  if ( version.majorNum()!=2 ) {
+    log(Log::LineType::Error, i18n("Only bootloader version 2.x is supported."));
+    return false;
+  }
+  return true;
+}
+
+bool Pickit2Bootloader::Hardware::write(Pic::MemoryRangeType type, const Device::Array &data)
+{
+  Q_ASSERT( data.count()==device().nbWords(type) );
+  Q_ASSERT( type==Pic::MemoryRangeType::Code );
+  // check that there is nothing in bootloader reserved area
+  for (uint i=0; i<data.count(); i++) {
+    if ( i>=0x1000 && i<0x3FF0 ) continue;
+    if ( data[i]==device().mask(Pic::MemoryRangeType::Code) ) continue;
+    uint address = device().addressIncrement(Pic::MemoryRangeType::Code) * i;
+    log(Log::LineType::Warning, "  " + i18n("Code is present in bootloader reserved area (at address %1). It will be ignored.").arg(toHexLabel(address, device().nbCharsAddress())));
+    break;
+  }
+  return port().writeFirmwareCodeMemory(data, _base.progressMonitor());
+}
+
+bool Pickit2Bootloader::Hardware::read(Pic::MemoryRangeType type, Device::Array &data, const ::Programmer::VerifyData *vdata)
+{
+  Q_ASSERT( type==Pic::MemoryRangeType::Code );
+  data.resize(device().nbWords(type));
+  Device::Array varray;
+  if (vdata) varray = static_cast<const Pic::Memory &>(vdata->memory).arrayForWriting(Pic::MemoryRangeType::Code);
+  return port().readFirmwareCodeMemory(data, vdata ? &varray : 0, _base.progressMonitor());
+}
+
+//-----------------------------------------------------------------------------
+bool Pickit2Bootloader::DeviceSpecific::doEraseRange(Pic::MemoryRangeType type)
+{
+  Q_ASSERT( type==Pic::MemoryRangeType::Code );
+  return static_cast<Hardware &>(hardware()).port().eraseFirmwareCodeMemory();
+}
diff --git a/src/progs/pickit2_bootloader/base/pickit2_bootloader.h b/src/progs/pickit2_bootloader/base/pickit2_bootloader.h
new file mode 100644
index 0000000..7af0957
--- /dev/null
+++ b/src/progs/pickit2_bootloader/base/pickit2_bootloader.h
@@ -0,0 +1,43 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICKIT2_BOOTLOADER_H
+#define PICKIT2_BOOTLOADER_H
+
+#include "progs/bootloader/base/bootloader.h"
+#include "progs/pickit2/base/pickit2.h"
+
+namespace Pickit2Bootloader
+{
+//-----------------------------------------------------------------------------
+class Hardware : public Bootloader::Hardware
+{
+public:
+  Hardware(::Programmer::Base &base);
+  Pickit2::USBPort &port() { return static_cast<Pickit2::USBPort &>(*_port); }
+  virtual bool write(Pic::MemoryRangeType type, const Device::Array &data);
+  virtual bool read(Pic::MemoryRangeType type, Device::Array &data, const ::Programmer::VerifyData *vdata);
+  virtual bool internalConnectHardware();
+};
+
+//-----------------------------------------------------------------------------
+class DeviceSpecific : public Bootloader::DeviceSpecific
+{
+public:
+  DeviceSpecific(::Programmer::Base &base) : Bootloader::DeviceSpecific(base) {}
+  virtual bool canEraseAll() const { return true; }
+  virtual bool canEraseRange(Pic::MemoryRangeType type) const { return ( type==Pic::MemoryRangeType::Code ); }
+  virtual bool canReadRange(Pic::MemoryRangeType type) const { return ( type==Pic::MemoryRangeType::Code ); }
+  virtual bool canWriteRange(Pic::MemoryRangeType type) const { return ( type==Pic::MemoryRangeType::Code ); }
+  virtual bool doEraseRange(Pic::MemoryRangeType type);
+  virtual bool doErase(bool) { return doEraseRange(Pic::MemoryRangeType::Code); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/pickit2_bootloader/base/pickit2_bootloader.xml b/src/progs/pickit2_bootloader/base/pickit2_bootloader.xml
new file mode 100644
index 0000000..2e87949
--- /dev/null
+++ b/src/progs/pickit2_bootloader/base/pickit2_bootloader.xml
@@ -0,0 +1,16 @@
+<!-- ************************************************************************* -->
+<!-- * Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  * -->
+<!-- *                                                                       * -->
+<!-- * This program is free software; you can redistribute it and/or modify  * -->
+<!-- * it under the terms of the GNU General Public License as published by  * -->
+<!-- * the Free Software Foundation; either version 2 of the License, or     * -->
+<!-- * (at your option) any later version.                                   * -->
+<!-- *************************************************************************/-->
+<!DOCTYPE piklab>
+
+<type name="pickit2_bootloader">
+  <device name="18F2455" family="generic" />
+  <device name="18F2550" family="generic" />
+  <device name="18F4455" family="generic" />
+  <device name="18F4550" family="generic" />
+</type>
diff --git a/src/progs/pickit2_bootloader/base/pickit2_bootloader_data.h b/src/progs/pickit2_bootloader/base/pickit2_bootloader_data.h
new file mode 100644
index 0000000..87aead1
--- /dev/null
+++ b/src/progs/pickit2_bootloader/base/pickit2_bootloader_data.h
@@ -0,0 +1,19 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICKIT2_BOOTLOADER_DATA_H
+#define PICKIT2_BOOTLOADER_DATA_H
+
+namespace Pickit2Bootloader
+{
+  struct Data {};
+  extern bool isSupported(const QString &device);
+  extern const Data &data(const QString &device);
+} // namespace
+
+#endif
diff --git a/src/progs/pickit2_bootloader/base/pickit2_bootloader_prog.cpp b/src/progs/pickit2_bootloader/base/pickit2_bootloader_prog.cpp
new file mode 100644
index 0000000..7f734ba
--- /dev/null
+++ b/src/progs/pickit2_bootloader/base/pickit2_bootloader_prog.cpp
@@ -0,0 +1,14 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pickit2_bootloader_prog.h"
+
+//-----------------------------------------------------------------------------
+Pickit2Bootloader::ProgrammerBase::ProgrammerBase(const Programmer::Group &group, const Pic::Data *data)
+  : Bootloader::ProgrammerBase(group, data, "pickit2_bootloader_programmer_base")
+{}
diff --git a/src/progs/pickit2_bootloader/base/pickit2_bootloader_prog.h b/src/progs/pickit2_bootloader/base/pickit2_bootloader_prog.h
new file mode 100644
index 0000000..461d734
--- /dev/null
+++ b/src/progs/pickit2_bootloader/base/pickit2_bootloader_prog.h
@@ -0,0 +1,47 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICKIT2_BOOTLOADER_PROG_H
+#define PICKIT2_BOOTLOADER_PROG_H
+
+#include "progs/bootloader/base/bootloader_prog.h"
+#include "pickit2_bootloader.h"
+
+namespace Pickit2Bootloader
+{
+
+//-----------------------------------------------------------------------------
+class ProgrammerBase : public ::Bootloader::ProgrammerBase
+{
+Q_OBJECT
+public:
+  ProgrammerBase(const Programmer::Group &group, const Pic::Data *data);
+  virtual bool verifyDeviceId() { return true; }
+};
+
+//-----------------------------------------------------------------------------
+class Group : public ::Bootloader::Group
+{
+public:
+  virtual QString name() const { return "pickit2_bootloader"; }
+  virtual QString label() const { return i18n("Pickit2 Bootloader"); }
+  virtual ::Programmer::Properties properties() const { return ::Programmer::Programmer | ::Programmer::CanReadMemory; }
+  virtual ::Programmer::TargetPowerMode targetPowerMode() const { return ::Programmer::TargetSelfPowered; }
+  virtual bool isPortSupported(PortType type) const { return type==PortType::USB; }
+  virtual bool canReadVoltage(Pic::VoltageType) const { return false; }
+
+protected:
+  virtual void initSupported();
+  virtual ::Programmer::Base *createBase(const Device::Data *data) const { return new ProgrammerBase(*this, static_cast<const Pic::Data *>(data)); }
+  virtual ::Programmer::Hardware *createHardware(::Programmer::Base &base, const ::Programmer::HardwareDescription &) const { return new Hardware(base); }
+  virtual ::Programmer::DeviceSpecific *createDeviceSpecific(::Programmer::Base &base) const { return new DeviceSpecific(base); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/pickit2_bootloader/gui/Makefile.am b/src/progs/pickit2_bootloader/gui/Makefile.am
new file mode 100644
index 0000000..b9be2b0
--- /dev/null
+++ b/src/progs/pickit2_bootloader/gui/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libpickit2bootloaderui.la
+libpickit2bootloaderui_la_LDFLAGS = $(all_libraries)
+libpickit2bootloaderui_la_SOURCES = pickit2_bootloader_ui.cpp
diff --git a/src/progs/pickit2_bootloader/gui/pickit2_bootloader_ui.cpp b/src/progs/pickit2_bootloader/gui/pickit2_bootloader_ui.cpp
new file mode 100644
index 0000000..89bf5c7
--- /dev/null
+++ b/src/progs/pickit2_bootloader/gui/pickit2_bootloader_ui.cpp
@@ -0,0 +1,20 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pickit2_bootloader_ui.h"
+
+//-----------------------------------------------------------------------------
+Pickit2Bootloader::ConfigWidget::ConfigWidget(const::Programmer::Group &group, QWidget *parent)
+  : ::Programmer::ConfigWidget(group, parent)
+{}
+
+//-----------------------------------------------------------------------------
+::Programmer::ConfigWidget *Pickit2Bootloader::GroupUI::createConfigWidget(QWidget *parent) const
+{
+  return new ConfigWidget(static_cast<const ::Programmer::Group &>(group()), parent);
+}
diff --git a/src/progs/pickit2_bootloader/gui/pickit2_bootloader_ui.h b/src/progs/pickit2_bootloader/gui/pickit2_bootloader_ui.h
new file mode 100644
index 0000000..d715574
--- /dev/null
+++ b/src/progs/pickit2_bootloader/gui/pickit2_bootloader_ui.h
@@ -0,0 +1,36 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICKIT2_BOOTLOADER_UI_H
+#define PICKIT2_BOOTLOADER_UI_H
+
+#include "progs/bootloader/gui/bootloader_ui.h"
+
+//-----------------------------------------------------------------------------
+namespace Pickit2Bootloader
+{
+class ConfigWidget: public ::Programmer::ConfigWidget
+{
+Q_OBJECT
+public:
+  ConfigWidget(const::Programmer::Group &group, QWidget *parent);
+  virtual void loadConfig() {}
+  virtual void saveConfig() {}
+};
+
+
+//----------------------------------------------------------------------------
+class GroupUI : public ::Bootloader::GroupUI
+{
+public:
+  virtual ::Programmer::ConfigWidget *createConfigWidget(QWidget *parent) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/pickit2_bootloader/pickit2_bootloader.pro b/src/progs/pickit2_bootloader/pickit2_bootloader.pro
new file mode 100644
index 0000000..60ac0f5
--- /dev/null
+++ b/src/progs/pickit2_bootloader/pickit2_bootloader.pro
@@ -0,0 +1,2 @@
+TEMPLATE = subdirs
+SUBDIRS = xml base
diff --git a/src/progs/pickit2_bootloader/xml/Makefile.am b/src/progs/pickit2_bootloader/xml/Makefile.am
new file mode 100644
index 0000000..899aa3b
--- /dev/null
+++ b/src/progs/pickit2_bootloader/xml/Makefile.am
@@ -0,0 +1,14 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_PROGRAMS = xml_pickit2_bootloader_parser
+xml_pickit2_bootloader_parser_SOURCES = xml_pickit2_bootloader_parser.cpp
+OBJECTS = $(top_builddir)/src/devices/list/libdevicelistnoui.la \
+          $(top_builddir)/src/devices/pic/pic/libpic.la $(top_builddir)/src/devices/pic/base/libpicbase.la \
+          $(top_builddir)/src/devices/pic/xml_data/libpicxml.la \
+          $(top_builddir)/src/devices/mem24/mem24/libmem24.la $(top_builddir)/src/devices/mem24/base/libmem24base.la \
+          $(top_builddir)/src/devices/mem24/xml_data/libmem24xml.la \
+          $(top_builddir)/src/xml_to_data/libxmltodata.la $(top_builddir)/src/devices/base/libdevicebase.la \
+          $(top_builddir)/src/common/common/libcommon.la
+xml_pickit2_bootloader_parser_DEPENDENCIES = $(OBJECTS)
+xml_pickit2_bootloader_parser_LDADD = $(OBJECTS) $(LIB_KDECORE)
diff --git a/src/progs/pickit2_bootloader/xml/xml.pro b/src/progs/pickit2_bootloader/xml/xml.pro
new file mode 100644
index 0000000..2e2aef1
--- /dev/null
+++ b/src/progs/pickit2_bootloader/xml/xml.pro
@@ -0,0 +1,17 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/app.pro)
+
+TARGET   = xml_pickit2_bootloader_parser
+SOURCES += xml_pickit2_bootloader_parser.cpp
+LIBS    += ../../../devices/list/libdevicelist.a \
+           ../../../devices/mem24/mem24/libmem24.a ../../../devices/mem24/xml_data/libmem24xml.a \
+           ../../../devices/mem24/base/libmem24base.a \
+           ../../../devices/pic/pic/libpic.a ../../../devices/pic/xml_data/libpicxml.a \
+           ../../../devices/pic/base/libpicbase.a ../../../xml_to_data/libxmltodata.a \
+           ../../../devices/base/libdevicebase.a ../../../common/global/libglobal.a \
+           ../../../common/nokde/libnokde.a ../../../common/common/libcommon.a
+
+unix:QMAKE_POST_LINK = cd ../base && ../xml/xml_pickit2_bootloader_parser
+unix:QMAKE_CLEAN += ../base/pickit2_bootloader_data.cpp
+win32:QMAKE_POST_LINK = cd ..\base && ..\xml\xml_pickit2_bootloader_parser.exe
+win32:QMAKE_CLEAN += ..\base\pickit2_bootloader_data.cpp
diff --git a/src/progs/pickit2_bootloader/xml/xml_pickit2_bootloader_parser.cpp b/src/progs/pickit2_bootloader/xml/xml_pickit2_bootloader_parser.cpp
new file mode 100644
index 0000000..150e814
--- /dev/null
+++ b/src/progs/pickit2_bootloader/xml/xml_pickit2_bootloader_parser.cpp
@@ -0,0 +1,39 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "xml_to_data/prog_xml_to_data.h"
+
+#include "progs/pickit2_bootloader/base/pickit2_bootloader_data.h"
+#include "devices/base/device_group.h"
+#include "devices/pic/base/pic.h"
+
+//-----------------------------------------------------------------------------
+namespace Pickit2Bootloader
+{
+
+class XmlToData : public Programmer::XmlToData<Data>
+{
+public:
+  XmlToData() : Programmer::XmlToData<Data>("pickit2_bootloader", "Pickit2Bootloader") {}
+
+private:
+  virtual void parseData(QDomElement element, Data &data);
+};
+
+void Pickit2Bootloader::XmlToData::parseData(QDomElement, Data &)
+{
+  const Device::Data *ddata = Device::lister().data(currentDevice());
+  if ( ddata->group().name()!="pic" ) qFatal("non-pic device not supported");
+  const Pic::Data *pdata = static_cast<const Pic::Data *>(ddata);
+  if ( !pdata->hasFeature(Pic::Feature::USB) ) qFatal("device does not have USB");
+}
+
+} // namespace
+
+//-----------------------------------------------------------------------------
+XML_MAIN(Pickit2Bootloader::XmlToData)
diff --git a/src/progs/pickit2v2/Makefile.am b/src/progs/pickit2v2/Makefile.am
new file mode 100644
index 0000000..490a53d
--- /dev/null
+++ b/src/progs/pickit2v2/Makefile.am
@@ -0,0 +1,3 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+SUBDIRS = base gui
diff --git a/src/progs/pickit2v2/base/Makefile.am b/src/progs/pickit2v2/base/Makefile.am
new file mode 100644
index 0000000..b5a7688
--- /dev/null
+++ b/src/progs/pickit2v2/base/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libpickit2v2.la
+libpickit2v2_la_DEPENDENCIES = pickit2v2_data.cpp
+libpickit2v2_la_SOURCES = pickit2v2.cpp pickit2v2_data.cpp pickit2v2_prog.cpp
diff --git a/src/progs/pickit2v2/base/base.pro b/src/progs/pickit2v2/base/base.pro
new file mode 100644
index 0000000..70ccaef
--- /dev/null
+++ b/src/progs/pickit2v2/base/base.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = pickit2v2
+HEADERS += pickit2v2.h pickit2v2_prog.h pickit2v2_data.h
+SOURCES += pickit2v2.cpp pickit2v2_prog.cpp pickit2v2_data.cpp
diff --git a/src/progs/pickit2v2/base/pickit2v2.cpp b/src/progs/pickit2v2/base/pickit2v2.cpp
new file mode 100644
index 0000000..31dd6ca
--- /dev/null
+++ b/src/progs/pickit2v2/base/pickit2v2.cpp
@@ -0,0 +1,432 @@
+/***************************************************************************
+ * Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pickit2v2.h"
+
+#include "progs/base/prog_config.h"
+#include "progs/icd2/base/microchip.h"
+#include "pickit2v2_data.h"
+
+//-----------------------------------------------------------------------------
+const Pickit2V2::FamilyData *Pickit2V2::familyData(const Pic::Data &device)
+{
+  for (uint i=0; FAMILY_DATA[i].architecture!=Pic::Architecture::Nb_Types; i++)
+    if ( FAMILY_DATA[i].architecture==device.architecture() ) return &FAMILY_DATA[i];
+  Q_ASSERT(false);
+  return 0;
+}
+
+//-----------------------------------------------------------------------------
+Pickit2V2::Hardware::Hardware(::Programmer::Base &base)
+  : ::Programmer::PicHardware(base, new USBPort(base), QString::null),
+    _scriptBufferChecksum(0), _deviceSet(false)
+{}
+
+bool Pickit2V2::Hardware::internalConnectHardware()
+{
+  return port().open();
+}
+
+bool Pickit2V2::Hardware::setTarget()
+{
+  //setIcspSpeed(0); // #### ??
+  _fastProgramming = true; // #### ??
+  uint checksum;
+  if ( !getScriptBufferChecksum(checksum) ) return false;
+  if ( !_deviceSet || _scriptBufferChecksum!=checksum ) {
+    if ( !downloadScripts() ) return false;
+  }
+  _deviceSet = true;
+  return true;
+}
+
+bool Pickit2V2::Hardware::readStatus(ushort &status)
+{
+  if ( !port().command(ReadStatus) ) return false;
+  Array a;
+  if ( !port().receive(a) ) return false;
+  status = (a[1] << 8) + a[0];
+  return true;
+}
+
+bool Pickit2V2::Hardware::sendScript(const ushort *script, uint length)
+{
+  Array cmd;
+  cmd[0] = ClearUploadBuffer;
+  cmd[1] = ExecuteScript;
+  cmd[2] = length;
+  for (uint i=0; i<length; i++) cmd[3+i] = script[i];
+  return port().command(cmd);
+}
+
+bool Pickit2V2::Hardware::executeScript(uint i)
+{
+  Q_ASSERT( i!=0 );
+  const ScriptData &sdata = SCRIPT_DATA[i-1];
+  log(Log::DebugLevel::Extra, QString("execute script #%1: %2").arg(i).arg(sdata.name));
+  return sendScript(sdata.data, sdata.length);
+}
+
+bool Pickit2V2::Hardware::getScriptBufferChecksum(uint &checksum)
+{
+  if ( !port().command(ScriptBufferChecksum) ) return false;
+  Array array;
+  if ( !port().receive(array) ) return false;
+  checksum = (array[0] << 24) + (array[1] << 16) + (array[2] << 8) + array[3];
+  log(Log::DebugLevel::Extra, QString("get script buffer checksum: %1").arg(toHexLabel(checksum, 8)));
+  return true;
+}
+
+bool Pickit2V2::Hardware::downloadScript(ScriptType type, uint i)
+{
+  if (i==0 ) return true; // empty script
+  const ScriptData &sdata = SCRIPT_DATA[i-1];
+  log(Log::DebugLevel::Max, QString("  download script #%1 (\"%2\") at position #%3")
+                            .arg(i-1).arg(sdata.name).arg(toHexLabel(type, 2)));
+  Array cmd;
+  cmd[0] = DownloadScript;
+  cmd[1] = type;
+  cmd[2] = sdata.length;
+  for (uint k=0; k<sdata.length; k++) {
+    if ( !_fastProgramming && sdata.data[k]==0xAAE7 ) {
+      ushort next = sdata.data[k+1];
+      if ( (next & 0xFF)<170 && next!=0 ) {
+        cmd[3+k] = sdata.data[k];
+        cmd[3+k+1] = next + next/2;
+      } else {
+        cmd[3+k] = DelayLong;
+        cmd[3+k+1] = 2;
+      }
+      k++;
+    } else if ( !_fastProgramming && sdata.data[k]==0xAAE8 ) {
+      ushort next = sdata.data[k+1];
+      if ( (next & 0xFF)<171 && next!=0 ) {
+        cmd[3+k] = sdata.data[k];
+        cmd[3+k+1] = next + next/2;
+      } else {
+        cmd[3+k] = DelayLong;
+        cmd[3+k+1] = 0;
+      }
+      k++;
+    } else cmd[3+k] = sdata.data[k];
+  }
+  return port().command(cmd);
+}
+
+bool Pickit2V2::Hardware::downloadScripts()
+{
+  if ( !port().command(ClearDownloadBuffer) ) return false;
+  log(Log::DebugLevel::Extra, "clear scripts buffer");
+  if ( !port().command(ClearScriptBuffer) ) return false;
+  log(Log::DebugLevel::Extra, "download scripts");
+  const Data &d = data(device().name());
+  for (uint i=0; i<Nb_ScriptTypes; i++) {
+    if ( i==TestMemoryRead || i==ConfigErase ) continue; // ### to get same checksum as pk2cmd
+    if ( !downloadScript(ScriptType(i), d.scriptIndexes[i]) ) return false;
+  }
+  return getScriptBufferChecksum(_scriptBufferChecksum);
+}
+
+bool Pickit2V2::Hardware::setTargetReset(Pic::ResetMode mode)
+{
+  ushort script[1];
+  switch (mode) {
+    case Pic::ResetHeld: script[0] = MclrGroundOn; break;
+    case Pic::ResetReleased: script[0] = MclrGroundOff; break;
+    case Pic::Nb_ResetModes: Q_ASSERT(false); return false;
+  }
+  return sendScript(script, 1);
+}
+
+bool Pickit2V2::Hardware::setVddVoltage(double value, double threshold)
+{
+  ushort v = ushort(qRound(32.0*value + 10.5)) << 6;
+  uchar vfault = uchar(qRound(256.0 * (threshold * value) / 5.0));
+  if ( vfault>210 ) vfault = 210;
+  Array cmd;
+  cmd[0] = SetVdd;
+  cmd[1] = v & 0xFF;
+  cmd[2] = v >> 8;
+  cmd[3] = vfault;
+  return port().command(cmd);
+}
+
+bool Pickit2V2::Hardware::setVppVoltage(double value, double threshold)
+{
+  Array cmd;
+  cmd[0] = SetVpp;
+  cmd[1] = 0x40;
+  cmd[2] = uchar(qRound(18.61*value));
+  cmd[3] = uchar(qRound(18.61*value*threshold));
+  return port().command(cmd);
+}
+
+bool Pickit2V2::Hardware::setVddOn(bool on)
+{
+  log(Log::DebugLevel::Extra, QString("Vdd set to %1, self powered is %2").arg(on).arg(_base.isTargetSelfPowered()));
+  ushort script[2];
+  script[0] = (on ? VddGroundOff : VddOff);
+  if ( _base.isTargetSelfPowered() ) script[1] = (on ? VddOff : VddGroundOff);
+  else script[1] = (on ? VddOn : VddGroundOn);
+  return sendScript(script, 2);
+}
+
+bool Pickit2V2::Hardware::setIcspSpeed(uchar speed)
+{
+  ushort script[2];
+  script[0] = SetIcspSpeed;
+  script[1] = speed;
+  return sendScript(script, 2);
+}
+
+bool Pickit2V2::Hardware::getMode(VersionData &version, ::Programmer::Mode &mode)
+{
+  if ( !port().command(FirmwareVersion) ) return false;
+  Array data;
+  if ( !port().receive(data) ) return false;
+  if ( data[0]=='B' ) {
+    mode = ::Programmer::BootloadMode;
+    version = VersionData();
+  } else {
+    mode = ::Programmer::NormalMode;
+    version = VersionData(data[0], data[1], data[2]);
+  }
+  return true;
+}
+
+bool Pickit2V2::Hardware::readVoltages(VoltagesData &voltagesData)
+{
+  if ( !port().command(ReadVoltages) ) return false;
+  Array array;
+  if ( !port().receive(array) ) return false;
+  double vadc = 256 * array[1] + array[0];
+  voltagesData[Pic::TargetVdd].value = 5.0 * (vadc / 65536);
+  voltagesData[Pic::TargetVdd].error = false;
+  vadc = 256 * array[3] + array[2];
+  voltagesData[Pic::TargetVpp].value = 13.7 * (vadc / 65536);
+  voltagesData[Pic::TargetVpp].error = false;
+  return true;
+}
+
+bool Pickit2V2::Hardware::downloadAddress(Address address)
+{
+  log(Log::DebugLevel::Max, QString("download address %1").arg(toHexLabel(address, 6)));
+  Array cmd;
+  cmd[0] = ClearDownloadBuffer;
+  cmd[1] = DownloadData;
+  cmd[2] = 3;
+  cmd[3] = address.toUInt() & 0xFF;
+  cmd[4] = (address.toUInt() >> 8) & 0xFF;
+  cmd[5] = (address.toUInt() >> 16) & 0xFF;
+  return port().command(cmd);
+}
+
+bool Pickit2V2::Hardware::runScript(ScriptType stype, uint repetitions, uint nbNoLens)
+{
+  log(Log::DebugLevel::Max, QString("run script %1: repetitions=%2 nbNoLen=%3")
+                            .arg(toHexLabel(stype, 2)).arg(repetitions).arg(nbNoLens));
+#if 0 // ALTERNATE METHOD
+  const Data &d = data(device().name());
+  for (uint i=0; i<repetitions; i++)
+    if ( !executeScript(d.scriptIndexes[stype]) ) return false;
+  if (nbNoLens) {
+    Array cmd;
+    for (uint i=0; i<nbNoLens; i++) cmd[i] = UploadDataNoLen;
+    if ( !port().command(cmd) ) return false;
+  }
+#else
+  Array cmd;
+  cmd[0] = ClearUploadBuffer;
+  cmd[1] = RunScript;
+  cmd[2] = stype;
+  cmd[3] = repetitions;
+  for (uint i=0; i<nbNoLens; i++) cmd[4+i] = UploadDataNoLen;
+  if ( !port().command(cmd) ) return false;
+#endif
+  if ( stype==ProgExit && !setTargetReset(Pic::ResetReleased) ) return false;
+  return true;
+}
+
+bool Pickit2V2::Hardware::prepareRead(Pic::MemoryRangeType type, uint wordIndex)
+{
+  ScriptType stype = prepareReadScript(type);
+  if ( type!=Pic::MemoryRangeType::Cal && (stype==Nb_ScriptTypes || data(device().name()).scriptIndexes[stype]==0) ) return true;
+  switch (type.type()) {
+  case Pic::MemoryRangeType::Code:
+    if ( !device().architecture().data().hasAddressAccess ) return true;
+    if ( !downloadAddress(0x10000 * (wordIndex / 0x8000)) ) return false;
+    break;
+  case Pic::MemoryRangeType::Eeprom:
+    if ( device().nbBytesWord(Pic::MemoryRangeType::Eeprom)==4 ) {
+      if ( !downloadAddress(device().range(Pic::MemoryRangeType::Eeprom).start.toUInt()) ) return false; // #### correct ?
+    } else if ( !downloadAddress(0x0) ) return false;
+    break;
+  case Pic::MemoryRangeType::Config: return true; // ConfigPrepareRead unused (?)
+  case Pic::MemoryRangeType::UserId: break;
+  case Pic::MemoryRangeType::Cal: {
+    Address start = device().range(Pic::MemoryRangeType::Cal).start;
+    Q_ASSERT( start==device().range(Pic::MemoryRangeType::Code).end+1 );
+    return downloadAddress(start.toUInt());
+  }
+  default: return true;
+  case Pic::MemoryRangeType::Nb_Types: Q_ASSERT(false); return false;
+  }
+  return runScript(stype);
+}
+
+bool Pickit2V2::Hardware::readMemory(Pic::MemoryRangeType otype, Device::Array &data, const ::Programmer::VerifyData *vdata)
+{
+  uint nbWords = device().nbWords(otype);
+  data.resize(nbWords);
+  log(Log::DebugLevel::Max, QString("read %1 nbWords=%2").arg(otype.label()).arg(nbWords));
+  uint nbBytesWord = device().nbBytesWord(otype);
+  // EEPROM is read like regular program memory in midrange
+  if ( !device().is18Family() && !device().is16bitFamily() && otype==Pic::MemoryRangeType::Eeprom ) nbBytesWord = 2;
+  uint wordOffset = 0;
+  Pic::MemoryRangeType type = otype;
+  if ( otype==Pic::MemoryRangeType::Config && device().range(Pic::MemoryRangeType::Config).start==device().range(Pic::MemoryRangeType::Code).end+1 ) {  // config in code memory
+    wordOffset = device().range(Pic::MemoryRangeType::Config).start.toUInt();
+    type = Pic::MemoryRangeType::Code;
+  }
+  bool setAddress = true;
+  ScriptType stype = readScript(type);
+  Q_ASSERT( stype!=Nb_ScriptTypes );
+  const FamilyData *fdata = familyData(device());
+  uint nbRunWords = QMIN(UploadBufferNbBytes / nbBytesWord, nbWords);
+  uint nbRuns = 1;
+  uint nbReceive = (nbRunWords*nbBytesWord + 63) / 64;
+  switch (type.type()) {
+    case Pic::MemoryRangeType::Code:   nbRuns = nbRunWords / Pickit2V2::data(device().name()).codeMemoryNbReadWords; break;
+    case Pic::MemoryRangeType::Eeprom: nbRuns = nbRunWords / Pickit2V2::data(device().name()).eepromMemoryNbReadWords; break;
+    default: break;
+  }
+
+  if ( !runScript(ProgEntry) ) return false;
+  for (uint i=0; i<nbWords; ) {
+    if (setAddress) {
+      setAddress = false;
+      if ( !prepareRead(type, wordOffset + i) ) return false;
+    }
+    QValueVector<uint> words;
+    if ( type==Pic::MemoryRangeType::Config || type==Pic::MemoryRangeType::Cal ) {
+      if ( !runScript(stype, 1, 0) ) return false;
+      if ( !port().command(UploadData) ) return false;
+      // config memory return includes a length byte that we need to ignore
+      if ( !port().receiveWords(nbBytesWord, nbReceive, words, 1) ) return false;
+    } else {
+      if ( !runScript(stype, nbRuns, nbReceive) ) return false;
+      if ( !port().receiveWords(nbBytesWord, nbReceive, words) ) return false;
+    }
+    log(Log::DebugLevel::Max, QString("nbRunWords=%1 readNbWords=%2 index=%3/%4").arg(nbRunWords).arg(words.count()).arg(i).arg(nbWords));
+    for (uint k=0; k<words.count(); k++) {
+      if ( i>=nbWords ) break;
+      data[i] = words[k];
+      if (fdata->progMemShift) data[i] >>= 1;
+      data[i] = data[i].maskWith(device().mask(type)); // ### correct ?
+      if ( vdata && !verifyWord(i, data[i], type, *vdata) ) return false;
+      if ( type==Pic::MemoryRangeType::Code && i!=0x0 && i%0x8000==0 ) setAddress = true;
+      i++;
+    }
+  }
+  if ( !runScript(ProgExit) ) return false;
+  return true;
+}
+
+bool Pickit2V2::Hardware::eraseAll()
+{
+  const Data &d = data(device().name());
+  if ( d.scriptIndexes[ConfigErase]!=0 ) {
+    if ( !runScript(ProgEntry) ) return false;
+    if ( d.scriptIndexes[ConfigWritePrepare]!=0 ) {
+      if ( !downloadAddress(0) ) return false;
+      if ( !runScript(ConfigWritePrepare) ) return false;
+    }
+    if ( !runScript(ConfigErase) ) return false;
+    if ( !runScript(ProgExit) ) return false;
+  }
+  if ( !runScript(ProgEntry) ) return false;
+  if ( d.scriptIndexes[EraseChipPrepare]!=0 && !runScript(EraseChipPrepare) ) return false;
+  if ( !runScript(ChipErase) ) return false;
+  if ( !runScript(ProgExit) ) return false;
+  return true;
+}
+
+bool Pickit2V2::Hardware::eraseRange(Pic::MemoryRangeType type)
+{
+  if ( type==Pic::MemoryRangeType::Code ) {
+    if ( !runScript(ProgEntry) ) return false;
+    if ( !runScript(ProgMemoryErase) ) return false;
+    if ( !runScript(ProgExit) ) return false;
+    return true;
+  }
+  if ( type==Pic::MemoryRangeType::Eeprom ) {
+    if ( !runScript(ProgEntry) ) return false;
+    if ( !runScript(EepromErase) ) return false;
+    if ( !runScript(ProgExit) ) return false;
+    return true;
+  }
+  Q_ASSERT(false);
+  return false;
+}
+
+bool Pickit2V2::Hardware::prepareWrite(Pic::MemoryRangeType type, uint wordIndex)
+{
+  ScriptType stype = prepareWriteScript(type);
+  if ( stype==Nb_ScriptTypes || data(device().name()).scriptIndexes[stype]==0 ) return true;
+  switch (type.type()) {
+  case Pic::MemoryRangeType::Code:
+  case Pic::MemoryRangeType::Config:
+    if ( !device().architecture().data().hasAddressAccess ) return true;
+    if ( !downloadAddress(0x10000 * (wordIndex / 0x8000)) ) return false;
+    break;
+  case Pic::MemoryRangeType::Eeprom: {
+    Address address = (device().nbBytesWord(Pic::MemoryRangeType::Eeprom)==4 ? device().range(Pic::MemoryRangeType::Eeprom).start : 0x000000);
+    if ( !downloadAddress(address) ) return false;
+    break;
+  }
+  case Pic::MemoryRangeType::UserId: break;
+  default: return true;
+  case Pic::MemoryRangeType::Nb_Types: Q_ASSERT(false); return false;
+  }
+  return runScript(stype);
+}
+
+bool Pickit2V2::Hardware::writeMemory(Pic::MemoryRangeType otype, const Device::Array &data, bool force)
+{
+  Q_UNUSED(force);
+  return false; // ### TODO
+}
+
+//-----------------------------------------------------------------------------
+bool Pickit2V2::DeviceSpecific::canEraseRange(Pic::MemoryRangeType type) const
+{
+  const Data &d = data(device().name());
+  if ( type==Pic::MemoryRangeType::Code ) return d.scriptIndexes[ProgMemoryErase];
+  if ( type==Pic::MemoryRangeType::Eeprom ) return d.scriptIndexes[EepromErase];
+  return false;
+}
+
+bool Pickit2V2::DeviceSpecific::canReadRange(Pic::MemoryRangeType type) const
+{
+  const Data &d = data(device().name());
+  if ( type==Pic::MemoryRangeType::Cal ) return d.scriptIndexes[OsccalRead];
+  return true;
+}
+
+bool Pickit2V2::DeviceSpecific::canWriteRange(Pic::MemoryRangeType type) const
+{
+  const Data &d = data(device().name());
+  if ( type==Pic::MemoryRangeType::Cal ) return d.scriptIndexes[OsccalWrite];
+  return true;
+}
+
+bool Pickit2V2::DeviceSpecific::doWrite(Pic::MemoryRangeType type, const Device::Array &data, bool force)
+{
+  Q_ASSERT( data.size()==device().nbWords(type) );
+  return hardware().writeMemory(type, data, force);
+}
diff --git a/src/progs/pickit2v2/base/pickit2v2.h b/src/progs/pickit2v2/base/pickit2v2.h
new file mode 100644
index 0000000..7c6f294
--- /dev/null
+++ b/src/progs/pickit2v2/base/pickit2v2.h
@@ -0,0 +1,145 @@
+/***************************************************************************
+ * Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICKIT2V2_H
+#define PICKIT2V2_H
+
+#include "progs/pickit2/base/pickit2.h"
+#include "pickit2v2_data.h"
+
+namespace Pickit2V2
+{
+//-----------------------------------------------------------------------------
+enum FirmwareCommand {
+  EnterBootloader = 0x42, NoOperation = 0x5A, FirmwareVersion = 0x76,
+
+  SetVdd = 0xA0, SetVpp = 0xA1, ReadStatus = 0xA2, ReadVoltages = 0xA3,
+  DownloadScript = 0xA4, RunScript = 0xA5, ExecuteScript = 0xA6,
+  ClearDownloadBuffer = 0xA7, DownloadData = 0xA8, ClearUploadBuffer = 0xA9,
+  UploadData = 0xAA, ClearScriptBuffer = 0xAB, UploadDataNoLen = 0xAC,
+  EndOfBuffer = 0xAD, Reset = 0xAE, ScriptBufferChecksum = 0xAF,
+
+  SetVoltageCalibrations = 0xB0, WriteInternalEEprom = 0xB1,
+  ReadInternalEEprom = 0xB2, EnterUARTMode = 0xB3, ExitUARTMode = 0xB4
+};
+
+enum ScriptCommand {
+  VddOn = 0xFF, VddOff = 0xFE, VddGroundOn = 0xFD, VddGroundOff = 0xFC,
+  VppOn = 0xFB, VppOff = 0xFA, VppPwmOn = 0xF9, VppPwmOff = 0xF8,
+  MclrGroundOn = 0xF7, MclrGroundOff = 0xF6, BusyLedOn = 0xF5, BusyLedOff = 0xF4,
+  SetIcspPins = 0xF3, WriteByteLiteral = 0xF2, WriteByteBuffer = 0xF1,
+  ReadByteBuffer = 0xF0, ReadByte = 0xEF, WriteBitsLiteral = 0xEE,
+  WriteBitsBuffer = 0xED, ReadBitsBuffer = 0xEC, ReadBits = 0xEB,
+  SetIcspSpeed = 0xEA, Loop = 0xE9, DelayLong = 0xE8, DelayShort = 0xE7,
+  IfEqGoto = 0xE6, IfGtGoto = 0xE5, GotoIndex = 0xE4, ExitScript = 0xE3,
+
+  PeekSfr = 0xE2, PokeSfr = 0xE1, IcdSlaveRx = 0xE0, IcdSlaveTxLiteral = 0xDF,
+  IcdSlaveTxBuffer = 0xDE, LoopBuffer = 0xDD, IcspStatesBuffer = 0xDC,
+  PopDownload = 0xDB, CoreInst18 = 0xDA, CoreInst24 = 0xD9, Nop24 = 0xD8,
+  Visi24 = 0xD7, Rd2ByteBuffer = 0xD6, Rd2BitsBuffer = 0xD5, WriteBufWordW = 0xD4,
+  WriteBufByteW = 0xD3, ConstWriteDl = 0xD2, WriteBitsLitHld = 0xD1,
+  WriteBitsBufHld = 0xD0, SetAux = 0xCF, AuxStateBuffer = 0xCE, I2cStart = 0xCD,
+  I2cStop = 0xCC, I2cWriteByteLiteral = 0xCB, I2cWriteByteBuffer = 0xCA,
+  I2cReadByteAck = 0xC9, I2cReadByteNack = 0xC8, SpiWriteByteLiteral = 0xC7,
+  SpiWriteByteBuffer = 0xC6, SpiReadByteBuffer = 0xC5, SpiReadWriteByteLiteral = 0xC4,
+  SpiReadWriteByteBuffer = 0xC3
+};
+extern const FamilyData *familyData(const Pic::Data &device);
+
+//-----------------------------------------------------------------------------
+class Array : public Pickit::Array
+{
+public:
+  Array() : Pickit::Array(64, EndOfBuffer, PrintEscapeAll) {}
+};
+
+//-----------------------------------------------------------------------------
+class USBPort : public Pickit2::USBPort
+{
+public:
+  USBPort(Log::Base &manager) : Pickit2::USBPort(manager) {}
+  virtual Pickit::Array array() const { return Array(); }
+};
+
+enum StatusFlag {
+  DownloadBufferOverflow = 0x8000, ScriptBufferOverflow = 0x4000,
+  RunScriptOnEmptyScript = 0x2000, ScriptAbortDownloadEmpty = 0x1000,
+  ScriptAbortUploadFull = 0x0800, IcdTransferTimeout = 0x0400,
+  UARTModeEnabled = 0x0200, ResetSinceLastStatusRead = 0x0100,
+  ButtonPressed = 0x0040, VppError = 0x0020, VddError = 0x0010,
+  VppIsOn = 0x0008, VppGroundIsOn = 0x0004,
+  VddIsOn = 0x0002, VddGroundIsOn = 0x0001 };
+Q_DECLARE_FLAGS(StatusFlags, StatusFlag)
+Q_DECLARE_OPERATORS_FOR_FLAGS(StatusFlags)
+
+//-----------------------------------------------------------------------------
+class Hardware : public ::Programmer::PicHardware
+{
+public:
+  Hardware(::Programmer::Base &base);
+  USBPort &port() { return static_cast<USBPort &>(*_port); }
+  const USBPort &port() const { return static_cast<USBPort &>(*_port); }
+
+  bool getMode(VersionData &version, ::Programmer::Mode &mode);
+  bool setTargetReset(Pic::ResetMode mode);
+  bool setVddVoltage(double value, double threshold);
+  bool setVppVoltage(double value, double threshold);
+  bool setVddOn(bool on);
+  bool executeScript(uint i);
+  bool setTarget();
+  bool setFastProgramming(bool fast);
+  virtual bool readVoltages(VoltagesData &voltagesData);
+  bool readStatus(ushort &status);
+  bool readMemory(Pic::MemoryRangeType type, ::Device::Array &data, const ::Programmer::VerifyData *vdata);
+  bool writeMemory(Pic::MemoryRangeType type, const ::Device::Array &data, bool force);
+  bool eraseAll();
+  bool eraseRange(Pic::MemoryRangeType type);
+
+private:
+  enum { UploadBufferNbBytes = 128, DownloadBufferNbBytes = 256 };
+  uint _scriptBufferChecksum;
+  bool _deviceSet, _fastProgramming;
+
+  virtual bool internalConnectHardware();
+  bool getScriptBufferChecksum(uint &checksum);
+  bool downloadScript(ScriptType type, uint i);
+  bool downloadScripts();
+  bool sendScript(const ushort *script, uint length);
+  bool resetPickit2() { return port().command(Reset); }
+  bool setIcspSpeed(uchar speed);
+  bool downloadAddress(Address address);
+  bool runScript(ScriptType stype, uint repetitions = 1, uint nbNoLens = 0);
+  bool prepareRead(Pic::MemoryRangeType type, uint wordIndex);
+  bool prepareWrite(Pic::MemoryRangeType type, uint wordIndex);
+};
+
+//-----------------------------------------------------------------------------
+class DeviceSpecific : public ::Programmer::PicDeviceSpecific
+{
+public:
+  DeviceSpecific(::Programmer::Base &base) : ::Programmer::PicDeviceSpecific(base) {}
+  virtual bool canEraseAll() const { return true; }
+  virtual bool canEraseRange(Pic::MemoryRangeType type) const;
+  virtual bool canReadRange(Pic::MemoryRangeType) const;
+  virtual bool canWriteRange(Pic::MemoryRangeType) const;
+  Hardware &hardware() { return static_cast<Hardware &>(*_base.hardware()); }
+  virtual bool setPowerOn() { return true; }
+  virtual bool setPowerOff() { return true; }
+  virtual bool setTargetPowerOn(bool on) { return hardware().setVddOn(on); }
+  virtual bool doErase(bool) { return hardware().eraseAll(); }
+  virtual bool doEraseRange(Pic::MemoryRangeType type) { return hardware().eraseRange(type); }
+  virtual bool doRead(Pic::MemoryRangeType type, ::Device::Array &data, const ::Programmer::VerifyData *vdata) {
+    return hardware().readMemory(type, data, vdata);
+  }
+  virtual bool doWrite(Pic::MemoryRangeType type, const Device::Array &data, bool force);
+
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/pickit2v2/base/pickit2v2_data.cpp b/src/progs/pickit2v2/base/pickit2v2_data.cpp
new file mode 100644
index 0000000..b93fad4
--- /dev/null
+++ b/src/progs/pickit2v2/base/pickit2v2_data.cpp
@@ -0,0 +1,951 @@
+// this file is autogenerated, do not edit !
+
+#include "devices/list/device_list.h"
+#include "pickit2v2_prog.h"
+#include "pickit2v2_data.h"
+
+namespace Pickit2V2
+{
+struct CData {
+  const char *name;
+  Data data;
+};
+
+const CData PIC10F200_DATA = { "10F200", { 32, 0, 1, 0,
+  { 1, 2, 0, 36, 0, 31, 0, 40, 0, 0, 0, 0, 0, 37, 0, 43, 0, 47, 0, 49, 39, 44, 45, 0, 0, 0, 0, 134, 0 } } };
+const CData PIC10F202_DATA = { "10F202", { 32, 0, 1, 0,
+  { 1, 2, 0, 36, 0, 31, 0, 40, 0, 0, 0, 0, 0, 37, 0, 43, 0, 48, 0, 50, 39, 44, 46, 0, 0, 0, 0, 134, 0 } } };
+const CData PIC10F204_DATA = { "10F204", { 32, 0, 1, 0,
+  { 1, 2, 0, 36, 0, 31, 0, 40, 0, 0, 0, 0, 0, 37, 0, 43, 0, 47, 0, 49, 39, 44, 45, 0, 0, 0, 0, 134, 0 } } };
+const CData PIC10F206_DATA = { "10F206", { 32, 0, 1, 0,
+  { 1, 2, 0, 36, 0, 31, 0, 40, 0, 0, 0, 0, 0, 37, 0, 43, 0, 48, 0, 50, 39, 44, 46, 0, 0, 0, 0, 134, 0 } } };
+const CData PIC10F220_DATA = { "10F220", { 32, 0, 1, 0,
+  { 1, 2, 0, 36, 0, 31, 0, 40, 0, 0, 0, 0, 0, 37, 0, 43, 0, 47, 0, 49, 39, 44, 45, 0, 0, 0, 0, 134, 0 } } };
+const CData PIC10F222_DATA = { "10F222", { 32, 0, 1, 0,
+  { 1, 2, 0, 36, 0, 31, 0, 40, 0, 0, 0, 0, 0, 37, 0, 43, 0, 48, 0, 50, 39, 44, 46, 0, 0, 0, 0, 134, 0 } } };
+const CData PIC12F508_DATA = { "12F508", { 32, 0, 1, 0,
+  { 1, 2, 0, 36, 0, 31, 0, 40, 0, 0, 0, 0, 0, 37, 0, 43, 0, 48, 0, 50, 39, 44, 46, 0, 0, 0, 0, 134, 0 } } };
+const CData PIC12F509_DATA = { "12F509", { 32, 0, 1, 0,
+  { 1, 2, 0, 36, 0, 31, 0, 40, 0, 0, 0, 0, 0, 37, 0, 43, 0, 38, 0, 42, 39, 44, 54, 0, 0, 0, 0, 134, 0 } } };
+const CData PIC12F510_DATA = { "12F510", { 32, 0, 1, 0,
+  { 1, 2, 0, 36, 0, 31, 0, 40, 0, 0, 0, 0, 0, 37, 0, 43, 0, 38, 0, 42, 39, 44, 54, 0, 0, 0, 0, 134, 0 } } };
+const CData PIC12F519_DATA = { "12F519", { 32, 32, 1, 1,
+  { 1, 2, 0, 36, 0, 31, 0, 40, 167, 36, 167, 40, 0, 37, 0, 43, 0, 162, 0, 163, 164, 165, 166, 168, 169, 0, 0, 134, 0 } } };
+const CData PIC12F609_DATA = { "12F609", { 32, 0, 1, 0,
+  { 1, 2, 3, 5, 0, 0, 0, 109, 0, 0, 0, 0, 0, 8, 0, 72, 0, 7, 0, 79, 0, 139, 77, 0, 0, 0, 0, 132, 0 } } };
+const CData PIC12F615_DATA = { "12F615", { 32, 0, 1, 0,
+  { 1, 2, 3, 5, 0, 0, 0, 109, 0, 0, 0, 0, 0, 8, 0, 72, 0, 7, 0, 79, 0, 139, 77, 0, 0, 0, 0, 132, 0 } } };
+const CData PIC12F629_DATA = { "12F629", { 32, 32, 1, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 28, 0, 6, 0, 10, 0, 8, 0, 12, 0, 7, 0, 11, 29, 30, 4, 110, 0, 0, 0, 132, 0 } } };
+const CData PIC12F635_DATA = { "12F635", { 32, 32, 4, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 13, 0, 6, 0, 10, 0, 8, 0, 12, 0, 7, 0, 11, 0, 136, 4, 110, 0, 172, 102, 132, 0 } } };
+const CData PIC12F675_DATA = { "12F675", { 32, 32, 1, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 28, 0, 6, 0, 10, 0, 8, 0, 12, 0, 7, 0, 11, 29, 30, 4, 110, 0, 0, 0, 132, 0 } } };
+const CData PIC12F683_DATA = { "12F683", { 32, 32, 4, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 13, 0, 6, 0, 10, 0, 8, 0, 12, 0, 7, 0, 11, 0, 138, 4, 110, 0, 172, 102, 132, 0 } } };
+const CData PIC12HV609_DATA = { "12HV609", { 32, 0, 1, 0,
+  { 1, 2, 3, 5, 0, 0, 0, 109, 0, 0, 0, 0, 0, 8, 0, 72, 0, 7, 0, 79, 0, 139, 77, 0, 0, 0, 0, 132, 0 } } };
+const CData PIC12HV615_DATA = { "12HV615", { 32, 0, 1, 0,
+  { 1, 2, 3, 5, 0, 0, 0, 109, 0, 0, 0, 0, 0, 8, 0, 72, 0, 7, 0, 79, 0, 139, 77, 0, 0, 0, 0, 132, 0 } } };
+const CData PIC16F505_DATA = { "16F505", { 32, 0, 1, 0,
+  { 1, 2, 0, 36, 0, 31, 0, 40, 0, 0, 0, 0, 0, 37, 0, 43, 0, 38, 0, 42, 39, 44, 54, 0, 0, 0, 0, 134, 0 } } };
+const CData PIC16F506_DATA = { "16F506", { 32, 0, 1, 0,
+  { 1, 2, 0, 36, 0, 31, 0, 40, 0, 0, 0, 0, 0, 37, 0, 43, 0, 38, 0, 42, 39, 44, 54, 0, 0, 0, 0, 134, 0 } } };
+const CData PIC16F526_DATA = { "16F526", { 32, 32, 1, 1,
+  { 1, 2, 0, 36, 0, 31, 0, 40, 167, 36, 167, 40, 0, 37, 0, 43, 0, 162, 0, 163, 164, 165, 166, 168, 169, 0, 0, 134, 0 } } };
+const CData PIC16F54_DATA = { "16F54", { 32, 0, 1, 0,
+  { 1, 2, 0, 36, 0, 31, 0, 40, 0, 0, 0, 0, 0, 37, 0, 43, 0, 48, 0, 50, 0, 0, 46, 0, 0, 0, 0, 134, 0 } } };
+const CData PIC16F57_DATA = { "16F57", { 32, 0, 4, 0,
+  { 1, 2, 0, 36, 0, 31, 0, 53, 0, 0, 0, 0, 0, 37, 0, 43, 0, 52, 0, 51, 0, 0, 41, 0, 0, 0, 0, 134, 0 } } };
+const CData PIC16F59_DATA = { "16F59", { 32, 0, 4, 0,
+  { 1, 2, 0, 36, 0, 31, 0, 53, 0, 0, 0, 0, 0, 37, 0, 43, 0, 52, 0, 51, 0, 0, 41, 0, 0, 0, 0, 134, 0 } } };
+const CData PIC16F610_DATA = { "16F610", { 32, 0, 1, 0,
+  { 1, 2, 3, 5, 0, 0, 0, 109, 0, 0, 0, 0, 0, 8, 0, 72, 0, 7, 0, 79, 0, 139, 77, 0, 0, 0, 0, 132, 0 } } };
+const CData PIC16F616_DATA = { "16F616", { 32, 0, 4, 0,
+  { 1, 2, 3, 5, 0, 0, 0, 78, 0, 0, 0, 0, 0, 8, 0, 72, 0, 7, 0, 79, 0, 139, 77, 0, 0, 0, 0, 132, 0 } } };
+const CData PIC16F627_DATA = { "16F627", { 32, 32, 1, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 105, 0, 6, 0, 10, 0, 34, 0, 107, 0, 7, 0, 106, 0, 0, 101, 126, 0, 0, 0, 132, 0 } } };
+const CData PIC16F627A_DATA = { "16F627A", { 32, 32, 1, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 28, 0, 6, 0, 10, 0, 8, 0, 80, 0, 7, 0, 11, 0, 0, 4, 110, 0, 0, 0, 132, 0 } } };
+const CData PIC16F628_DATA = { "16F628", { 32, 32, 1, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 105, 0, 6, 0, 10, 0, 34, 0, 107, 0, 7, 0, 106, 0, 0, 101, 126, 0, 0, 0, 132, 0 } } };
+const CData PIC16F628A_DATA = { "16F628A", { 32, 32, 1, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 28, 0, 6, 0, 10, 0, 8, 0, 80, 0, 7, 0, 11, 0, 0, 4, 110, 0, 0, 0, 132, 0 } } };
+const CData PIC16F630_DATA = { "16F630", { 32, 32, 1, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 28, 0, 6, 0, 10, 0, 8, 0, 12, 0, 7, 0, 11, 29, 30, 4, 110, 0, 0, 0, 132, 0 } } };
+const CData PIC16F631_DATA = { "16F631", { 32, 32, 4, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 13, 0, 6, 0, 10, 0, 8, 0, 12, 0, 7, 0, 11, 0, 0, 4, 110, 0, 0, 0, 132, 0 } } };
+const CData PIC16F636_DATA = { "16F636", { 32, 32, 4, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 13, 0, 6, 0, 10, 0, 8, 0, 12, 0, 7, 0, 11, 0, 136, 4, 110, 0, 172, 102, 132, 0 } } };
+const CData PIC16F639_DATA = { "16F639", { 32, 32, 4, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 13, 0, 6, 0, 10, 0, 8, 0, 12, 0, 7, 0, 11, 0, 136, 4, 110, 0, 172, 102, 132, 0 } } };
+const CData PIC16F648A_DATA = { "16F648A", { 32, 32, 1, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 28, 0, 6, 0, 10, 0, 8, 0, 80, 0, 7, 0, 11, 0, 0, 4, 110, 0, 0, 0, 132, 0 } } };
+const CData PIC16F676_DATA = { "16F676", { 32, 32, 1, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 28, 0, 6, 0, 10, 0, 8, 0, 12, 0, 7, 0, 11, 29, 30, 4, 110, 0, 0, 0, 132, 0 } } };
+const CData PIC16F677_DATA = { "16F677", { 32, 32, 4, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 13, 0, 6, 0, 10, 0, 8, 0, 12, 0, 7, 0, 11, 0, 0, 4, 110, 0, 0, 0, 132, 0 } } };
+const CData PIC16F684_DATA = { "16F684", { 32, 32, 4, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 13, 0, 6, 0, 10, 0, 8, 0, 12, 0, 7, 0, 11, 0, 138, 4, 110, 0, 172, 102, 132, 0 } } };
+const CData PIC16F685_DATA = { "16F685", { 32, 32, 4, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 13, 0, 6, 0, 10, 0, 8, 0, 12, 0, 7, 0, 11, 0, 138, 4, 110, 0, 172, 102, 132, 0 } } };
+const CData PIC16F687_DATA = { "16F687", { 32, 32, 4, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 13, 0, 6, 0, 10, 0, 8, 0, 12, 0, 7, 0, 11, 0, 138, 4, 110, 0, 172, 102, 132, 0 } } };
+const CData PIC16F688_DATA = { "16F688", { 32, 32, 4, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 13, 0, 6, 0, 10, 0, 8, 0, 12, 0, 7, 0, 11, 0, 138, 4, 110, 0, 172, 102, 132, 0 } } };
+const CData PIC16F689_DATA = { "16F689", { 32, 32, 4, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 13, 0, 6, 0, 10, 0, 8, 0, 12, 0, 7, 0, 11, 0, 138, 4, 110, 0, 172, 102, 132, 0 } } };
+const CData PIC16F690_DATA = { "16F690", { 32, 32, 4, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 13, 0, 6, 0, 10, 0, 8, 0, 12, 0, 7, 0, 11, 0, 138, 4, 110, 0, 172, 102, 132, 0 } } };
+const CData PIC16F716_DATA = { "16F716", { 32, 0, 4, 0,
+  { 1, 2, 3, 5, 0, 31, 0, 118, 0, 0, 0, 0, 0, 8, 0, 120, 0, 7, 0, 119, 0, 0, 77, 0, 0, 0, 0, 132, 0 } } };
+const CData PIC16F72_DATA = { "16F72", { 32, 0, 2, 0,
+  { 1, 2, 3, 5, 0, 0, 0, 81, 0, 0, 0, 0, 0, 8, 0, 84, 0, 7, 0, 83, 0, 0, 82, 0, 0, 0, 0, 132, 0 } } };
+const CData PIC16F73_DATA = { "16F73", { 32, 0, 2, 0,
+  { 1, 2, 3, 5, 0, 0, 0, 81, 0, 0, 0, 0, 0, 8, 0, 84, 0, 7, 0, 83, 0, 0, 82, 0, 0, 0, 0, 132, 0 } } };
+const CData PIC16F737_DATA = { "16F737", { 32, 0, 2, 0,
+  { 1, 2, 3, 5, 0, 31, 0, 81, 0, 0, 0, 0, 0, 34, 0, 85, 0, 7, 0, 83, 0, 0, 82, 0, 0, 0, 0, 132, 0 } } };
+const CData PIC16F74_DATA = { "16F74", { 32, 0, 2, 0,
+  { 1, 2, 3, 5, 0, 0, 0, 81, 0, 0, 0, 0, 0, 8, 0, 84, 0, 7, 0, 83, 0, 0, 82, 0, 0, 0, 0, 132, 0 } } };
+const CData PIC16F747_DATA = { "16F747", { 32, 0, 2, 0,
+  { 1, 2, 3, 5, 0, 31, 0, 81, 0, 0, 0, 0, 0, 34, 0, 85, 0, 7, 0, 83, 0, 0, 82, 0, 0, 0, 0, 132, 0 } } };
+const CData PIC16F76_DATA = { "16F76", { 32, 0, 2, 0,
+  { 1, 2, 3, 5, 0, 0, 0, 81, 0, 0, 0, 0, 0, 8, 0, 84, 0, 7, 0, 83, 0, 0, 82, 0, 0, 0, 0, 132, 0 } } };
+const CData PIC16F767_DATA = { "16F767", { 32, 0, 2, 0,
+  { 1, 2, 3, 5, 0, 31, 0, 81, 0, 0, 0, 0, 0, 34, 0, 85, 0, 7, 0, 83, 0, 0, 82, 0, 0, 0, 0, 132, 0 } } };
+const CData PIC16F77_DATA = { "16F77", { 32, 0, 2, 0,
+  { 1, 2, 3, 5, 0, 0, 0, 81, 0, 0, 0, 0, 0, 8, 0, 84, 0, 7, 0, 83, 0, 0, 82, 0, 0, 0, 0, 132, 0 } } };
+const CData PIC16F777_DATA = { "16F777", { 32, 0, 2, 0,
+  { 1, 2, 3, 5, 0, 31, 0, 81, 0, 0, 0, 0, 0, 34, 0, 85, 0, 7, 0, 83, 0, 0, 82, 0, 0, 0, 0, 132, 0 } } };
+const CData PIC16F785_DATA = { "16F785", { 32, 32, 4, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 13, 0, 6, 0, 10, 0, 8, 0, 12, 0, 7, 0, 11, 0, 136, 4, 110, 0, 0, 0, 132, 0 } } };
+const CData PIC16F818_DATA = { "16F818", { 32, 32, 4, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 87, 0, 6, 0, 90, 0, 34, 0, 91, 0, 7, 0, 88, 0, 0, 86, 111, 114, 174, 173, 132, 0 } } };
+const CData PIC16F819_DATA = { "16F819", { 32, 32, 4, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 87, 0, 6, 0, 90, 0, 34, 0, 91, 0, 7, 0, 88, 0, 0, 86, 111, 114, 174, 173, 132, 0 } } };
+const CData PIC16F84A_DATA = { "16F84A", { 32, 32, 1, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 105, 0, 6, 0, 10, 0, 34, 0, 107, 0, 7, 0, 106, 0, 0, 101, 113, 0, 0, 0, 132, 0 } } };
+const CData PIC16F87_DATA = { "16F87", { 32, 32, 4, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 87, 0, 6, 0, 90, 0, 34, 0, 89, 0, 7, 0, 88, 0, 0, 86, 111, 114, 174, 173, 132, 0 } } };
+const CData PIC16F870_DATA = { "16F870", { 32, 32, 1, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 105, 0, 6, 0, 10, 0, 34, 0, 107, 0, 7, 0, 106, 0, 0, 101, 113, 0, 0, 0, 132, 0 } } };
+const CData PIC16F871_DATA = { "16F871", { 32, 32, 1, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 105, 0, 6, 0, 10, 0, 34, 0, 107, 0, 7, 0, 106, 0, 0, 101, 113, 0, 0, 0, 132, 0 } } };
+const CData PIC16F872_DATA = { "16F872", { 32, 32, 1, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 105, 0, 6, 0, 10, 0, 34, 0, 107, 0, 7, 0, 106, 0, 0, 101, 113, 0, 0, 0, 132, 0 } } };
+const CData PIC16F873_DATA = { "16F873", { 32, 32, 1, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 105, 0, 6, 0, 10, 0, 34, 0, 107, 0, 7, 0, 106, 0, 0, 101, 113, 0, 0, 0, 132, 0 } } };
+const CData PIC16F873A_DATA = { "16F873A", { 32, 32, 8, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 92, 0, 6, 0, 90, 0, 34, 0, 80, 0, 7, 0, 88, 0, 0, 86, 111, 114, 0, 0, 132, 0 } } };
+const CData PIC16F874_DATA = { "16F874", { 32, 32, 1, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 105, 0, 6, 0, 10, 0, 34, 0, 107, 0, 7, 0, 106, 0, 0, 101, 113, 0, 0, 0, 132, 0 } } };
+const CData PIC16F874A_DATA = { "16F874A", { 32, 32, 8, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 92, 0, 6, 0, 90, 0, 34, 0, 80, 0, 7, 0, 88, 0, 0, 86, 111, 114, 0, 0, 132, 0 } } };
+const CData PIC16F876_DATA = { "16F876", { 32, 32, 1, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 105, 0, 6, 0, 10, 0, 34, 0, 107, 0, 7, 0, 106, 0, 0, 101, 113, 0, 0, 0, 132, 0 } } };
+const CData PIC16F876A_DATA = { "16F876A", { 32, 32, 8, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 92, 0, 6, 0, 90, 0, 34, 0, 80, 0, 7, 0, 88, 0, 0, 86, 111, 114, 0, 0, 132, 0 } } };
+const CData PIC16F877_DATA = { "16F877", { 32, 32, 1, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 105, 0, 6, 0, 10, 0, 34, 0, 107, 0, 7, 0, 106, 0, 0, 101, 113, 0, 0, 0, 132, 0 } } };
+const CData PIC16F877A_DATA = { "16F877A", { 32, 32, 8, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 92, 0, 6, 0, 90, 0, 34, 0, 80, 0, 7, 0, 88, 0, 0, 86, 111, 114, 0, 0, 132, 0 } } };
+const CData PIC16F88_DATA = { "16F88", { 32, 32, 4, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 87, 0, 6, 0, 90, 0, 34, 0, 89, 0, 7, 0, 88, 0, 0, 86, 111, 114, 174, 173, 132, 0 } } };
+const CData PIC16F882_DATA = { "16F882", { 32, 32, 4, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 127, 0, 6, 0, 10, 0, 34, 0, 35, 0, 7, 0, 33, 0, 137, 4, 110, 0, 172, 102, 132, 0 } } };
+const CData PIC16F883_DATA = { "16F883", { 32, 32, 4, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 127, 0, 6, 0, 10, 0, 34, 0, 35, 0, 7, 0, 33, 0, 137, 4, 110, 0, 172, 102, 132, 0 } } };
+const CData PIC16F884_DATA = { "16F884", { 32, 32, 4, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 127, 0, 6, 0, 10, 0, 34, 0, 35, 0, 7, 0, 33, 0, 137, 4, 110, 0, 172, 102, 132, 0 } } };
+const CData PIC16F886_DATA = { "16F886", { 32, 32, 8, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 32, 0, 6, 0, 10, 0, 34, 0, 35, 0, 7, 0, 33, 0, 137, 4, 110, 0, 172, 102, 132, 0 } } };
+const CData PIC16F887_DATA = { "16F887", { 32, 32, 8, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 32, 0, 6, 0, 10, 0, 34, 0, 35, 0, 7, 0, 33, 0, 137, 4, 110, 0, 172, 102, 132, 0 } } };
+const CData PIC16F913_DATA = { "16F913", { 32, 32, 4, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 13, 0, 6, 0, 10, 0, 8, 0, 12, 0, 7, 0, 11, 0, 136, 4, 110, 0, 172, 102, 132, 0 } } };
+const CData PIC16F914_DATA = { "16F914", { 32, 32, 4, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 13, 0, 6, 0, 10, 0, 8, 0, 12, 0, 7, 0, 11, 0, 136, 4, 110, 0, 172, 102, 132, 0 } } };
+const CData PIC16F916_DATA = { "16F916", { 32, 32, 8, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 9, 0, 6, 0, 10, 0, 8, 0, 12, 0, 7, 0, 11, 0, 136, 4, 110, 0, 172, 102, 132, 0 } } };
+const CData PIC16F917_DATA = { "16F917", { 32, 32, 8, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 9, 0, 6, 0, 10, 0, 8, 0, 12, 0, 7, 0, 11, 0, 136, 4, 110, 0, 172, 102, 132, 0 } } };
+const CData PIC16F946_DATA = { "16F946", { 32, 32, 8, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 9, 0, 6, 0, 10, 0, 8, 0, 12, 0, 7, 0, 11, 0, 136, 4, 110, 0, 172, 102, 132, 0 } } };
+const CData PIC16HV610_DATA = { "16HV610", { 32, 0, 1, 0,
+  { 1, 2, 3, 5, 0, 0, 0, 109, 0, 0, 0, 0, 0, 8, 0, 72, 0, 7, 0, 79, 0, 139, 77, 0, 0, 0, 0, 132, 0 } } };
+const CData PIC16HV616_DATA = { "16HV616", { 32, 0, 4, 0,
+  { 1, 2, 3, 5, 0, 0, 0, 78, 0, 0, 0, 0, 0, 8, 0, 72, 0, 7, 0, 79, 0, 139, 77, 0, 0, 0, 0, 132, 0 } } };
+const CData PIC16HV785_DATA = { "16HV785", { 32, 32, 4, 1,
+  { 1, 2, 3, 5, 0, 31, 0, 13, 0, 6, 0, 10, 0, 8, 0, 12, 0, 7, 0, 11, 0, 136, 4, 110, 0, 0, 0, 132, 0 } } };
+const CData PIC18F1220_DATA = { "18F1220", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 58, 59, 68, 69, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F1230_DATA = { "18F1230", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F1320_DATA = { "18F1320", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 58, 59, 68, 69, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F1330_DATA = { "18F1330", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F2220_DATA = { "18F2220", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 58, 59, 68, 69, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F2221_DATA = { "18F2221", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F2320_DATA = { "18F2320", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 58, 59, 68, 69, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F2321_DATA = { "18F2321", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F2331_DATA = { "18F2331", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 58, 59, 68, 69, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F2410_DATA = { "18F2410", { 64, 0, 16, 0,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 0, 0, 0, 0, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 0, 0, 0, 0, 135, 0 } } };
+const CData PIC18F242_DATA = { "18F242", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 58, 59, 68, 69, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F2420_DATA = { "18F2420", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F2423_DATA = { "18F2423", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F2431_DATA = { "18F2431", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 58, 59, 68, 69, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F2450_DATA = { "18F2450", { 64, 0, 8, 0,
+  { 1, 2, 55, 56, 0, 57, 63, 94, 0, 0, 0, 0, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 0, 0, 0, 0, 135, 0 } } };
+const CData PIC18F2455_DATA = { "18F2455", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F2458_DATA = { "18F2458", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F248_DATA = { "18F248", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 58, 59, 68, 69, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F2480_DATA = { "18F2480", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F24J10_DATA = { "18F24J10", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F24K20_DATA = { "18F24K20", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 130, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F2510_DATA = { "18F2510", { 64, 0, 16, 0,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 0, 0, 0, 0, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 0, 0, 0, 0, 135, 0 } } };
+const CData PIC18F2515_DATA = { "18F2515", { 64, 0, 32, 0,
+  { 1, 2, 55, 56, 0, 57, 63, 104, 0, 0, 0, 0, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 0, 0, 0, 0, 135, 0 } } };
+const CData PIC18F252_DATA = { "18F252", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 58, 59, 68, 69, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F2520_DATA = { "18F2520", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F2523_DATA = { "18F2523", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F2525_DATA = { "18F2525", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 104, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F2550_DATA = { "18F2550", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F2553_DATA = { "18F2553", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F258_DATA = { "18F258", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 58, 59, 68, 69, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F2580_DATA = { "18F2580", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F2585_DATA = { "18F2585", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 104, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F25J10_DATA = { "18F25J10", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F25K20_DATA = { "18F25K20", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 130, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F2610_DATA = { "18F2610", { 64, 0, 32, 0,
+  { 1, 2, 55, 56, 0, 57, 63, 104, 0, 0, 0, 0, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 0, 0, 0, 0, 135, 0 } } };
+const CData PIC18F2620_DATA = { "18F2620", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 104, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F2680_DATA = { "18F2680", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 104, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F2682_DATA = { "18F2682", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 104, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 117, 0, 0, 0, 135, 0 } } };
+const CData PIC18F2685_DATA = { "18F2685", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 104, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 117, 0, 0, 0, 135, 0 } } };
+const CData PIC18F4220_DATA = { "18F4220", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 58, 59, 68, 69, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F4221_DATA = { "18F4221", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F4320_DATA = { "18F4320", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 58, 59, 68, 69, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F4321_DATA = { "18F4321", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F4331_DATA = { "18F4331", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 58, 59, 68, 69, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F4410_DATA = { "18F4410", { 64, 0, 16, 0,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 0, 0, 0, 0, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 0, 0, 0, 0, 135, 0 } } };
+const CData PIC18F442_DATA = { "18F442", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 58, 59, 68, 69, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F4420_DATA = { "18F4420", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F4423_DATA = { "18F4423", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F4431_DATA = { "18F4431", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 58, 59, 68, 69, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F4450_DATA = { "18F4450", { 64, 0, 8, 0,
+  { 1, 2, 55, 56, 0, 57, 63, 94, 0, 0, 0, 0, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 0, 0, 0, 0, 135, 0 } } };
+const CData PIC18F4455_DATA = { "18F4455", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F4458_DATA = { "18F4458", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F448_DATA = { "18F448", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 58, 59, 68, 69, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F4480_DATA = { "18F4480", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F44J10_DATA = { "18F44J10", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F44K20_DATA = { "18F44K20", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 130, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F4510_DATA = { "18F4510", { 64, 0, 16, 0,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 0, 0, 0, 0, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 0, 0, 0, 0, 135, 0 } } };
+const CData PIC18F4515_DATA = { "18F4515", { 64, 0, 32, 0,
+  { 1, 2, 55, 56, 0, 57, 63, 104, 0, 0, 0, 0, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 0, 0, 0, 0, 135, 0 } } };
+const CData PIC18F452_DATA = { "18F452", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 58, 59, 68, 69, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F4520_DATA = { "18F4520", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F4523_DATA = { "18F4523", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F4525_DATA = { "18F4525", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 104, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F4550_DATA = { "18F4550", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F4553_DATA = { "18F4553", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F458_DATA = { "18F458", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 58, 59, 68, 69, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F4580_DATA = { "18F4580", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F4585_DATA = { "18F4585", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 104, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F45J10_DATA = { "18F45J10", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F45K20_DATA = { "18F45K20", { 64, 32, 16, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 103, 97, 98, 99, 100, 0, 60, 66, 130, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F4610_DATA = { "18F4610", { 64, 0, 32, 0,
+  { 1, 2, 55, 56, 0, 57, 63, 104, 0, 0, 0, 0, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 0, 0, 0, 0, 135, 0 } } };
+const CData PIC18F4620_DATA = { "18F4620", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 104, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F4680_DATA = { "18F4680", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 104, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 115, 0, 0, 0, 135, 0 } } };
+const CData PIC18F4682_DATA = { "18F4682", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 104, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 117, 0, 0, 0, 135, 0 } } };
+const CData PIC18F4685_DATA = { "18F4685", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 104, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 93, 117, 0, 0, 0, 135, 0 } } };
+const CData PIC18F6310_DATA = { "18F6310", { 64, 0, 8, 0,
+  { 1, 2, 55, 56, 0, 57, 63, 129, 0, 0, 0, 0, 0, 60, 66, 130, 0, 61, 0, 131, 0, 0, 128, 0, 0, 0, 0, 135, 0 } } };
+const CData PIC18F6390_DATA = { "18F6390", { 64, 0, 8, 0,
+  { 1, 2, 55, 56, 0, 57, 63, 129, 0, 0, 0, 0, 0, 60, 66, 130, 0, 61, 0, 131, 0, 0, 128, 0, 0, 0, 0, 135, 0 } } };
+const CData PIC18F63J11_DATA = { "18F63J11", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F63J90_DATA = { "18F63J90", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F6410_DATA = { "18F6410", { 64, 0, 8, 0,
+  { 1, 2, 55, 56, 0, 57, 63, 129, 0, 0, 0, 0, 0, 60, 66, 130, 0, 61, 0, 131, 0, 0, 128, 0, 0, 0, 0, 135, 0 } } };
+const CData PIC18F6490_DATA = { "18F6490", { 64, 0, 8, 0,
+  { 1, 2, 55, 56, 0, 57, 63, 129, 0, 0, 0, 0, 0, 60, 66, 130, 0, 61, 0, 131, 0, 0, 128, 0, 0, 0, 0, 135, 0 } } };
+const CData PIC18F64J11_DATA = { "18F64J11", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F64J90_DATA = { "18F64J90", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F6520_DATA = { "18F6520", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 97, 98, 99, 108, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F6525_DATA = { "18F6525", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 97, 98, 99, 108, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F6527_DATA = { "18F6527", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 96, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 95, 117, 0, 176, 177, 135, 0 } } };
+const CData PIC18F6585_DATA = { "18F6585", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 97, 98, 99, 108, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F65J10_DATA = { "18F65J10", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F65J11_DATA = { "18F65J11", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F65J15_DATA = { "18F65J15", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F65J50_DATA = { "18F65J50", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F65J90_DATA = { "18F65J90", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F6620_DATA = { "18F6620", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 97, 98, 99, 108, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F6621_DATA = { "18F6621", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 97, 98, 99, 108, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F6622_DATA = { "18F6622", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 96, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 95, 117, 0, 176, 177, 135, 0 } } };
+const CData PIC18F6627_DATA = { "18F6627", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 96, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 95, 117, 0, 176, 177, 135, 0 } } };
+const CData PIC18F6628_DATA = { "18F6628", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 96, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 95, 117, 0, 176, 177, 135, 0 } } };
+const CData PIC18F6680_DATA = { "18F6680", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 97, 98, 99, 108, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F66J10_DATA = { "18F66J10", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F66J11_DATA = { "18F66J11", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F66J15_DATA = { "18F66J15", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F66J16_DATA = { "18F66J16", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F66J50_DATA = { "18F66J50", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F66J55_DATA = { "18F66J55", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F66J60_DATA = { "18F66J60", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F66J65_DATA = { "18F66J65", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F6720_DATA = { "18F6720", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 97, 98, 99, 108, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F6722_DATA = { "18F6722", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 96, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 95, 117, 0, 176, 177, 135, 0 } } };
+const CData PIC18F6723_DATA = { "18F6723", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 96, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 95, 117, 0, 176, 177, 135, 0 } } };
+const CData PIC18F67J10_DATA = { "18F67J10", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F67J11_DATA = { "18F67J11", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F67J50_DATA = { "18F67J50", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F67J60_DATA = { "18F67J60", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F8310_DATA = { "18F8310", { 64, 0, 8, 0,
+  { 1, 2, 55, 56, 0, 57, 63, 129, 0, 0, 0, 0, 0, 60, 66, 130, 0, 61, 0, 131, 0, 0, 128, 0, 0, 0, 0, 135, 0 } } };
+const CData PIC18F8390_DATA = { "18F8390", { 64, 0, 8, 0,
+  { 1, 2, 55, 56, 0, 57, 63, 129, 0, 0, 0, 0, 0, 60, 66, 130, 0, 61, 0, 131, 0, 0, 128, 0, 0, 0, 0, 135, 0 } } };
+const CData PIC18F83J11_DATA = { "18F83J11", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F83J90_DATA = { "18F83J90", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F8410_DATA = { "18F8410", { 64, 0, 8, 0,
+  { 1, 2, 55, 56, 0, 57, 63, 129, 0, 0, 0, 0, 0, 60, 66, 130, 0, 61, 0, 131, 0, 0, 128, 0, 0, 0, 0, 135, 0 } } };
+const CData PIC18F8490_DATA = { "18F8490", { 64, 0, 8, 0,
+  { 1, 2, 55, 56, 0, 57, 63, 129, 0, 0, 0, 0, 0, 60, 66, 130, 0, 61, 0, 131, 0, 0, 128, 0, 0, 0, 0, 135, 0 } } };
+const CData PIC18F84J11_DATA = { "18F84J11", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F84J90_DATA = { "18F84J90", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F8520_DATA = { "18F8520", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 97, 98, 99, 108, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F8525_DATA = { "18F8525", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 97, 98, 99, 108, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F8527_DATA = { "18F8527", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 96, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 95, 117, 0, 176, 177, 135, 0 } } };
+const CData PIC18F8585_DATA = { "18F8585", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 97, 98, 99, 108, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F85J10_DATA = { "18F85J10", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F85J11_DATA = { "18F85J11", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F85J15_DATA = { "18F85J15", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F85J50_DATA = { "18F85J50", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F85J90_DATA = { "18F85J90", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F8620_DATA = { "18F8620", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 97, 98, 99, 108, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F8621_DATA = { "18F8621", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 97, 98, 99, 108, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F8622_DATA = { "18F8622", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 96, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 95, 117, 0, 176, 177, 135, 0 } } };
+const CData PIC18F8627_DATA = { "18F8627", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 96, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 95, 117, 0, 176, 177, 135, 0 } } };
+const CData PIC18F8628_DATA = { "18F8628", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 96, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 95, 117, 0, 176, 177, 135, 0 } } };
+const CData PIC18F8680_DATA = { "18F8680", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 97, 98, 99, 108, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F86J10_DATA = { "18F86J10", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F86J11_DATA = { "18F86J11", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F86J15_DATA = { "18F86J15", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F86J16_DATA = { "18F86J16", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F86J50_DATA = { "18F86J50", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F86J55_DATA = { "18F86J55", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F86J60_DATA = { "18F86J60", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F86J65_DATA = { "18F86J65", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F8720_DATA = { "18F8720", { 64, 32, 4, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 64, 97, 98, 99, 108, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 62, 0, 0, 176, 175, 135, 0 } } };
+const CData PIC18F8722_DATA = { "18F8722", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 96, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 95, 117, 0, 176, 177, 135, 0 } } };
+const CData PIC18F8723_DATA = { "18F8723", { 64, 32, 32, 1,
+  { 1, 2, 55, 56, 0, 57, 63, 96, 97, 98, 99, 100, 0, 60, 66, 67, 0, 61, 0, 65, 0, 0, 95, 117, 0, 176, 177, 135, 0 } } };
+const CData PIC18F87J10_DATA = { "18F87J10", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F87J11_DATA = { "18F87J11", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F87J50_DATA = { "18F87J50", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F87J60_DATA = { "18F87J60", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F96J60_DATA = { "18F96J60", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F96J65_DATA = { "18F96J65", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18F97J60_DATA = { "18F97J60", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18LF24J10_DATA = { "18LF24J10", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18LF25J10_DATA = { "18LF25J10", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18LF44J10_DATA = { "18LF44J10", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC18LF45J10_DATA = { "18LF45J10", { 64, 0, 32, 0,
+  { 70, 2, 55, 56, 0, 57, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 71, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24FJ128GA006_DATA = { "24FJ128GA006", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24FJ128GA008_DATA = { "24FJ128GA008", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24FJ128GA010_DATA = { "24FJ128GA010", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24FJ16GA002_DATA = { "24FJ16GA002", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24FJ16GA004_DATA = { "24FJ16GA004", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24FJ32GA002_DATA = { "24FJ32GA002", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24FJ32GA004_DATA = { "24FJ32GA004", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24FJ48GA002_DATA = { "24FJ48GA002", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24FJ48GA004_DATA = { "24FJ48GA004", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24FJ64GA002_DATA = { "24FJ64GA002", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24FJ64GA004_DATA = { "24FJ64GA004", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24FJ64GA006_DATA = { "24FJ64GA006", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24FJ64GA008_DATA = { "24FJ64GA008", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24FJ64GA010_DATA = { "24FJ64GA010", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24FJ96GA006_DATA = { "24FJ96GA006", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24FJ96GA008_DATA = { "24FJ96GA008", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24FJ96GA010_DATA = { "24FJ96GA010", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24HJ128GP206_DATA = { "24HJ128GP206", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24HJ128GP210_DATA = { "24HJ128GP210", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24HJ128GP306_DATA = { "24HJ128GP306", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24HJ128GP310_DATA = { "24HJ128GP310", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24HJ128GP506_DATA = { "24HJ128GP506", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24HJ128GP510_DATA = { "24HJ128GP510", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24HJ12GP201_DATA = { "24HJ12GP201", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24HJ12GP202_DATA = { "24HJ12GP202", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24HJ256GP206_DATA = { "24HJ256GP206", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24HJ256GP210_DATA = { "24HJ256GP210", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24HJ256GP610_DATA = { "24HJ256GP610", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24HJ64GP206_DATA = { "24HJ64GP206", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24HJ64GP210_DATA = { "24HJ64GP210", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24HJ64GP506_DATA = { "24HJ64GP506", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC24HJ64GP510_DATA = { "24HJ64GP510", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC30F1010_DATA = { "30F1010", { 42, 0, 32, 0,
+  { 21, 2, 22, 143, 159, 23, 26, 158, 0, 0, 0, 0, 0, 121, 156, 157, 133, 154, 160, 158, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC30F2010_DATA = { "30F2010", { 42, 64, 32, 16,
+  { 1, 2, 140, 143, 112, 142, 146, 147, 142, 145, 148, 149, 0, 144, 150, 151, 153, 154, 155, 147, 0, 0, 141, 0, 0, 179, 178, 0, 180 } } };
+const CData PIC30F2011_DATA = { "30F2011", { 42, 0, 32, 0,
+  { 1, 2, 140, 143, 112, 142, 146, 147, 0, 0, 0, 0, 0, 144, 150, 151, 153, 154, 155, 147, 0, 0, 141, 0, 0, 179, 178, 0, 0 } } };
+const CData PIC30F2012_DATA = { "30F2012", { 42, 0, 32, 0,
+  { 1, 2, 140, 143, 112, 142, 146, 147, 0, 0, 0, 0, 0, 144, 150, 151, 153, 154, 155, 147, 0, 0, 141, 0, 0, 179, 178, 0, 0 } } };
+const CData PIC30F2020_DATA = { "30F2020", { 42, 0, 32, 0,
+  { 21, 2, 22, 143, 159, 23, 26, 158, 0, 0, 0, 0, 0, 121, 156, 157, 133, 154, 160, 158, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC30F2023_DATA = { "30F2023", { 42, 0, 32, 0,
+  { 21, 2, 22, 143, 159, 23, 26, 158, 0, 0, 0, 0, 0, 121, 156, 157, 133, 154, 160, 158, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC30F3010_DATA = { "30F3010", { 42, 64, 32, 16,
+  { 1, 2, 140, 143, 112, 142, 146, 147, 142, 145, 148, 149, 0, 144, 150, 151, 153, 154, 155, 147, 0, 0, 141, 0, 0, 179, 178, 0, 180 } } };
+const CData PIC30F3011_DATA = { "30F3011", { 42, 64, 32, 16,
+  { 1, 2, 140, 143, 112, 142, 146, 147, 142, 145, 148, 149, 0, 144, 150, 151, 153, 154, 155, 147, 0, 0, 141, 0, 0, 179, 178, 0, 180 } } };
+const CData PIC30F3012_DATA = { "30F3012", { 42, 64, 32, 16,
+  { 1, 2, 140, 143, 112, 142, 146, 147, 142, 145, 148, 149, 0, 144, 150, 151, 153, 154, 155, 147, 0, 0, 141, 0, 0, 179, 178, 0, 180 } } };
+const CData PIC30F3013_DATA = { "30F3013", { 42, 64, 32, 16,
+  { 1, 2, 140, 143, 112, 142, 146, 147, 142, 145, 148, 149, 0, 144, 150, 151, 153, 154, 155, 147, 0, 0, 141, 0, 0, 179, 178, 0, 180 } } };
+const CData PIC30F3014_DATA = { "30F3014", { 42, 64, 32, 16,
+  { 1, 2, 140, 143, 112, 142, 146, 147, 142, 145, 148, 149, 0, 144, 150, 151, 153, 154, 155, 147, 0, 0, 141, 0, 0, 179, 178, 0, 180 } } };
+const CData PIC30F4011_DATA = { "30F4011", { 42, 64, 32, 16,
+  { 1, 2, 140, 143, 112, 142, 146, 147, 142, 145, 148, 149, 0, 144, 150, 151, 153, 154, 155, 147, 0, 0, 141, 0, 0, 179, 178, 0, 180 } } };
+const CData PIC30F4012_DATA = { "30F4012", { 42, 64, 32, 16,
+  { 1, 2, 140, 143, 112, 142, 146, 147, 142, 145, 148, 149, 0, 144, 150, 151, 153, 154, 155, 147, 0, 0, 141, 0, 0, 179, 178, 0, 180 } } };
+const CData PIC30F4013_DATA = { "30F4013", { 42, 64, 32, 16,
+  { 1, 2, 140, 143, 112, 142, 146, 147, 142, 145, 148, 149, 0, 144, 150, 151, 153, 154, 155, 147, 0, 0, 141, 0, 0, 179, 178, 0, 180 } } };
+const CData PIC30F5011_DATA = { "30F5011", { 42, 64, 32, 16,
+  { 1, 2, 140, 143, 112, 142, 146, 147, 142, 145, 148, 149, 0, 144, 150, 151, 153, 154, 155, 147, 0, 0, 141, 0, 0, 152, 0, 0, 0 } } };
+const CData PIC30F5013_DATA = { "30F5013", { 42, 64, 32, 16,
+  { 1, 2, 140, 143, 112, 142, 146, 147, 142, 145, 148, 149, 0, 144, 150, 151, 153, 154, 155, 147, 0, 0, 141, 0, 0, 152, 0, 0, 0 } } };
+const CData PIC30F5015_DATA = { "30F5015", { 42, 64, 32, 16,
+  { 1, 2, 140, 143, 112, 142, 146, 147, 142, 145, 148, 149, 0, 144, 150, 151, 153, 154, 155, 147, 0, 0, 141, 0, 0, 179, 178, 0, 180 } } };
+const CData PIC30F5016_DATA = { "30F5016", { 42, 64, 32, 16,
+  { 1, 2, 140, 143, 112, 142, 146, 147, 142, 145, 148, 149, 0, 144, 150, 151, 153, 154, 155, 147, 0, 0, 141, 0, 0, 179, 178, 0, 180 } } };
+const CData PIC30F6010A_DATA = { "30F6010A", { 42, 64, 32, 16,
+  { 1, 2, 140, 143, 112, 142, 146, 147, 142, 145, 148, 149, 0, 144, 150, 151, 153, 154, 155, 147, 0, 0, 141, 0, 0, 179, 178, 0, 180 } } };
+const CData PIC30F6011A_DATA = { "30F6011A", { 42, 64, 32, 16,
+  { 1, 2, 140, 143, 112, 142, 146, 147, 142, 145, 148, 149, 0, 144, 150, 151, 153, 154, 155, 147, 0, 0, 141, 0, 0, 179, 178, 0, 180 } } };
+const CData PIC30F6012A_DATA = { "30F6012A", { 42, 64, 32, 16,
+  { 1, 2, 140, 143, 112, 142, 146, 147, 142, 145, 148, 149, 0, 144, 150, 151, 153, 154, 155, 147, 0, 0, 141, 0, 0, 179, 178, 0, 180 } } };
+const CData PIC30F6013A_DATA = { "30F6013A", { 42, 64, 32, 16,
+  { 1, 2, 140, 143, 112, 142, 146, 147, 142, 145, 148, 149, 0, 144, 150, 151, 153, 154, 155, 147, 0, 0, 141, 0, 0, 179, 178, 0, 180 } } };
+const CData PIC30F6014A_DATA = { "30F6014A", { 42, 64, 32, 16,
+  { 1, 2, 140, 143, 112, 142, 146, 147, 142, 145, 148, 149, 0, 144, 150, 151, 153, 154, 155, 147, 0, 0, 141, 0, 0, 179, 178, 0, 180 } } };
+const CData PIC30F6015_DATA = { "30F6015", { 42, 64, 32, 16,
+  { 1, 2, 140, 143, 112, 142, 146, 147, 142, 145, 148, 149, 0, 144, 150, 151, 153, 154, 155, 147, 0, 0, 141, 0, 0, 179, 178, 0, 180 } } };
+const CData PIC33FJ128GP206_DATA = { "33FJ128GP206", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ128GP306_DATA = { "33FJ128GP306", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ128GP310_DATA = { "33FJ128GP310", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ128GP706_DATA = { "33FJ128GP706", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ128GP708_DATA = { "33FJ128GP708", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ128GP710_DATA = { "33FJ128GP710", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ128MC506_DATA = { "33FJ128MC506", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ128MC510_DATA = { "33FJ128MC510", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ128MC706_DATA = { "33FJ128MC706", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ128MC708_DATA = { "33FJ128MC708", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ128MC710_DATA = { "33FJ128MC710", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ12GP201_DATA = { "33FJ12GP201", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ12GP202_DATA = { "33FJ12GP202", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ12MC201_DATA = { "33FJ12MC201", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ12MC202_DATA = { "33FJ12MC202", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ256GP506_DATA = { "33FJ256GP506", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ256GP510_DATA = { "33FJ256GP510", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ256GP710_DATA = { "33FJ256GP710", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ256MC510_DATA = { "33FJ256MC510", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ256MC710_DATA = { "33FJ256MC710", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ64GP206_DATA = { "33FJ64GP206", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ64GP306_DATA = { "33FJ64GP306", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ64GP310_DATA = { "33FJ64GP310", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ64GP706_DATA = { "33FJ64GP706", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ64GP708_DATA = { "33FJ64GP708", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ64GP710_DATA = { "33FJ64GP710", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ64MC506_DATA = { "33FJ64MC506", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ64MC508_DATA = { "33FJ64MC508", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ64MC510_DATA = { "33FJ64MC510", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ64MC706_DATA = { "33FJ64MC706", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+const CData PIC33FJ64MC710_DATA = { "33FJ64MC710", { 42, 0, 64, 0,
+  { 21, 2, 22, 24, 0, 23, 26, 123, 0, 0, 0, 0, 0, 121, 0, 125, 0, 122, 0, 124, 0, 0, 25, 0, 0, 0, 0, 0, 0 } } };
+
+const CData *DATA_LIST[] = {
+&PIC10F200_DATA,&PIC10F202_DATA,&PIC10F204_DATA,&PIC10F206_DATA,&PIC10F220_DATA,&PIC10F222_DATA,&PIC12F508_DATA,&PIC12F509_DATA,&PIC12F510_DATA,&PIC12F519_DATA,&PIC12F609_DATA,&PIC12F615_DATA,&PIC12F629_DATA,&PIC12F635_DATA,&PIC12F675_DATA,&PIC12F683_DATA,&PIC12HV609_DATA,&PIC12HV615_DATA,&PIC16F505_DATA,&PIC16F506_DATA,
+&PIC16F526_DATA,&PIC16F54_DATA,&PIC16F57_DATA,&PIC16F59_DATA,&PIC16F610_DATA,&PIC16F616_DATA,&PIC16F627_DATA,&PIC16F627A_DATA,&PIC16F628_DATA,&PIC16F628A_DATA,&PIC16F630_DATA,&PIC16F631_DATA,&PIC16F636_DATA,&PIC16F639_DATA,&PIC16F648A_DATA,&PIC16F676_DATA,&PIC16F677_DATA,&PIC16F684_DATA,&PIC16F685_DATA,&PIC16F687_DATA,
+&PIC16F688_DATA,&PIC16F689_DATA,&PIC16F690_DATA,&PIC16F716_DATA,&PIC16F72_DATA,&PIC16F73_DATA,&PIC16F737_DATA,&PIC16F74_DATA,&PIC16F747_DATA,&PIC16F76_DATA,&PIC16F767_DATA,&PIC16F77_DATA,&PIC16F777_DATA,&PIC16F785_DATA,&PIC16F818_DATA,&PIC16F819_DATA,&PIC16F84A_DATA,&PIC16F87_DATA,&PIC16F870_DATA,&PIC16F871_DATA,
+&PIC16F872_DATA,&PIC16F873_DATA,&PIC16F873A_DATA,&PIC16F874_DATA,&PIC16F874A_DATA,&PIC16F876_DATA,&PIC16F876A_DATA,&PIC16F877_DATA,&PIC16F877A_DATA,&PIC16F88_DATA,&PIC16F882_DATA,&PIC16F883_DATA,&PIC16F884_DATA,&PIC16F886_DATA,&PIC16F887_DATA,&PIC16F913_DATA,&PIC16F914_DATA,&PIC16F916_DATA,&PIC16F917_DATA,&PIC16F946_DATA,
+&PIC16HV610_DATA,&PIC16HV616_DATA,&PIC16HV785_DATA,&PIC18F1220_DATA,&PIC18F1230_DATA,&PIC18F1320_DATA,&PIC18F1330_DATA,&PIC18F2220_DATA,&PIC18F2221_DATA,&PIC18F2320_DATA,&PIC18F2321_DATA,&PIC18F2331_DATA,&PIC18F2410_DATA,&PIC18F242_DATA,&PIC18F2420_DATA,&PIC18F2423_DATA,&PIC18F2431_DATA,&PIC18F2450_DATA,&PIC18F2455_DATA,&PIC18F2458_DATA,
+&PIC18F248_DATA,&PIC18F2480_DATA,&PIC18F24J10_DATA,&PIC18F24K20_DATA,&PIC18F2510_DATA,&PIC18F2515_DATA,&PIC18F252_DATA,&PIC18F2520_DATA,&PIC18F2523_DATA,&PIC18F2525_DATA,&PIC18F2550_DATA,&PIC18F2553_DATA,&PIC18F258_DATA,&PIC18F2580_DATA,&PIC18F2585_DATA,&PIC18F25J10_DATA,&PIC18F25K20_DATA,&PIC18F2610_DATA,&PIC18F2620_DATA,&PIC18F2680_DATA,
+&PIC18F2682_DATA,&PIC18F2685_DATA,&PIC18F4220_DATA,&PIC18F4221_DATA,&PIC18F4320_DATA,&PIC18F4321_DATA,&PIC18F4331_DATA,&PIC18F4410_DATA,&PIC18F442_DATA,&PIC18F4420_DATA,&PIC18F4423_DATA,&PIC18F4431_DATA,&PIC18F4450_DATA,&PIC18F4455_DATA,&PIC18F4458_DATA,&PIC18F448_DATA,&PIC18F4480_DATA,&PIC18F44J10_DATA,&PIC18F44K20_DATA,&PIC18F4510_DATA,
+&PIC18F4515_DATA,&PIC18F452_DATA,&PIC18F4520_DATA,&PIC18F4523_DATA,&PIC18F4525_DATA,&PIC18F4550_DATA,&PIC18F4553_DATA,&PIC18F458_DATA,&PIC18F4580_DATA,&PIC18F4585_DATA,&PIC18F45J10_DATA,&PIC18F45K20_DATA,&PIC18F4610_DATA,&PIC18F4620_DATA,&PIC18F4680_DATA,&PIC18F4682_DATA,&PIC18F4685_DATA,&PIC18F6310_DATA,&PIC18F6390_DATA,&PIC18F63J11_DATA,
+&PIC18F63J90_DATA,&PIC18F6410_DATA,&PIC18F6490_DATA,&PIC18F64J11_DATA,&PIC18F64J90_DATA,&PIC18F6520_DATA,&PIC18F6525_DATA,&PIC18F6527_DATA,&PIC18F6585_DATA,&PIC18F65J10_DATA,&PIC18F65J11_DATA,&PIC18F65J15_DATA,&PIC18F65J50_DATA,&PIC18F65J90_DATA,&PIC18F6620_DATA,&PIC18F6621_DATA,&PIC18F6622_DATA,&PIC18F6627_DATA,&PIC18F6628_DATA,&PIC18F6680_DATA,
+&PIC18F66J10_DATA,&PIC18F66J11_DATA,&PIC18F66J15_DATA,&PIC18F66J16_DATA,&PIC18F66J50_DATA,&PIC18F66J55_DATA,&PIC18F66J60_DATA,&PIC18F66J65_DATA,&PIC18F6720_DATA,&PIC18F6722_DATA,&PIC18F6723_DATA,&PIC18F67J10_DATA,&PIC18F67J11_DATA,&PIC18F67J50_DATA,&PIC18F67J60_DATA,&PIC18F8310_DATA,&PIC18F8390_DATA,&PIC18F83J11_DATA,&PIC18F83J90_DATA,&PIC18F8410_DATA,
+&PIC18F8490_DATA,&PIC18F84J11_DATA,&PIC18F84J90_DATA,&PIC18F8520_DATA,&PIC18F8525_DATA,&PIC18F8527_DATA,&PIC18F8585_DATA,&PIC18F85J10_DATA,&PIC18F85J11_DATA,&PIC18F85J15_DATA,&PIC18F85J50_DATA,&PIC18F85J90_DATA,&PIC18F8620_DATA,&PIC18F8621_DATA,&PIC18F8622_DATA,&PIC18F8627_DATA,&PIC18F8628_DATA,&PIC18F8680_DATA,&PIC18F86J10_DATA,&PIC18F86J11_DATA,
+&PIC18F86J15_DATA,&PIC18F86J16_DATA,&PIC18F86J50_DATA,&PIC18F86J55_DATA,&PIC18F86J60_DATA,&PIC18F86J65_DATA,&PIC18F8720_DATA,&PIC18F8722_DATA,&PIC18F8723_DATA,&PIC18F87J10_DATA,&PIC18F87J11_DATA,&PIC18F87J50_DATA,&PIC18F87J60_DATA,&PIC18F96J60_DATA,&PIC18F96J65_DATA,&PIC18F97J60_DATA,&PIC18LF24J10_DATA,&PIC18LF25J10_DATA,&PIC18LF44J10_DATA,&PIC18LF45J10_DATA,
+&PIC24FJ128GA006_DATA,&PIC24FJ128GA008_DATA,&PIC24FJ128GA010_DATA,&PIC24FJ16GA002_DATA,&PIC24FJ16GA004_DATA,&PIC24FJ32GA002_DATA,&PIC24FJ32GA004_DATA,&PIC24FJ48GA002_DATA,&PIC24FJ48GA004_DATA,&PIC24FJ64GA002_DATA,&PIC24FJ64GA004_DATA,&PIC24FJ64GA006_DATA,&PIC24FJ64GA008_DATA,&PIC24FJ64GA010_DATA,&PIC24FJ96GA006_DATA,&PIC24FJ96GA008_DATA,&PIC24FJ96GA010_DATA,&PIC24HJ128GP206_DATA,&PIC24HJ128GP210_DATA,&PIC24HJ128GP306_DATA,
+&PIC24HJ128GP310_DATA,&PIC24HJ128GP506_DATA,&PIC24HJ128GP510_DATA,&PIC24HJ12GP201_DATA,&PIC24HJ12GP202_DATA,&PIC24HJ256GP206_DATA,&PIC24HJ256GP210_DATA,&PIC24HJ256GP610_DATA,&PIC24HJ64GP206_DATA,&PIC24HJ64GP210_DATA,&PIC24HJ64GP506_DATA,&PIC24HJ64GP510_DATA,&PIC30F1010_DATA,&PIC30F2010_DATA,&PIC30F2011_DATA,&PIC30F2012_DATA,&PIC30F2020_DATA,&PIC30F2023_DATA,&PIC30F3010_DATA,&PIC30F3011_DATA,
+&PIC30F3012_DATA,&PIC30F3013_DATA,&PIC30F3014_DATA,&PIC30F4011_DATA,&PIC30F4012_DATA,&PIC30F4013_DATA,&PIC30F5011_DATA,&PIC30F5013_DATA,&PIC30F5015_DATA,&PIC30F5016_DATA,&PIC30F6010A_DATA,&PIC30F6011A_DATA,&PIC30F6012A_DATA,&PIC30F6013A_DATA,&PIC30F6014A_DATA,&PIC30F6015_DATA,&PIC33FJ128GP206_DATA,&PIC33FJ128GP306_DATA,&PIC33FJ128GP310_DATA,&PIC33FJ128GP706_DATA,
+&PIC33FJ128GP708_DATA,&PIC33FJ128GP710_DATA,&PIC33FJ128MC506_DATA,&PIC33FJ128MC510_DATA,&PIC33FJ128MC706_DATA,&PIC33FJ128MC708_DATA,&PIC33FJ128MC710_DATA,&PIC33FJ12GP201_DATA,&PIC33FJ12GP202_DATA,&PIC33FJ12MC201_DATA,&PIC33FJ12MC202_DATA,&PIC33FJ256GP506_DATA,&PIC33FJ256GP510_DATA,&PIC33FJ256GP710_DATA,&PIC33FJ256MC510_DATA,&PIC33FJ256MC710_DATA,&PIC33FJ64GP206_DATA,&PIC33FJ64GP306_DATA,&PIC33FJ64GP310_DATA,&PIC33FJ64GP706_DATA,
+&PIC33FJ64GP708_DATA,&PIC33FJ64GP710_DATA,&PIC33FJ64MC506_DATA,&PIC33FJ64MC508_DATA,&PIC33FJ64MC510_DATA,&PIC33FJ64MC706_DATA,&PIC33FJ64MC710_DATA,0
+};
+
+const CData *cdata(const QString &device)
+{
+for(uint i=0; DATA_LIST[i]; i++)
+  if ( device==DATA_LIST[i]->name ) return DATA_LIST[i];
+return 0;
+}
+::Group::Support support(const QString &)
+{
+  return ::Group::Support::Untested;
+}
+const Data &data(const QString &device)
+{
+  return cdata(device)->data;
+}
+void Group::initSupported()
+{
+  for (uint i=0; DATA_LIST[i]; i++) {
+    const Device::Data *data = Device::lister().data(DATA_LIST[i]->name);
+    if ( data==0 ) continue;
+    addDevice(data->name(), data, ::Group::Support::Untested);
+  }
+}
+
+const FamilyData FAMILY_DATA[] = {
+  { Pic::Architecture::Type(1), 12, 0x0001, 0x0002, 0x0003, true },
+  { Pic::Architecture::Type(0), 12, 0x0001, 0x0002, 0x0000, true },
+  { Pic::Architecture::Type(4), 12, 0x0001, 0x0002, 0x0037, false },
+  { Pic::Architecture::Nb_Types, 0.0, 0x0000, 0x0000, 0x0000, false }
+};
+
+const ScriptData SCRIPT_DATA[] = {
+  { "HVProgEntry1", 5, 18, { 0xAAFA, 0xAAF7, 0xAAF9, 0xAAF5, 0xAAF3, 0xBB00, 0xAAE8, 0x0014, 0xAAF6, 0xAAFB, 0xAAE7, 0x007F, 0xAAF7, 0xAAFA, 0xAAFB, 0xAAF6, 0xAAE8, 0x0013 } },
+  { "HVProgExit1", 4, 8, { 0xAAFA, 0xAAF7, 0xAAF8, 0xAAF3, 0xBB03, 0xAAE8, 0x000A, 0xAAF4 } },
+  { "MR_RdDevID1", 0, 18, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB05, 0xAAEE, 0xBB06, 0xBB04, 0xAAF0, 0xAAF0 } },
+  { "MR_ChpEraseEE10msI", 0, 17, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB09, 0xAAE8, 0xBB02, 0xAAEE, 0xBB06, 0xBB0B, 0xAAE8, 0xBB02 } },
+  { "MR_ProgMemRd32.1", 0, 11, { 0xAAEE, 0xBB06, 0xBB04, 0xAAF0, 0xAAF0, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB08, 0x001F } },
+  { "MR_EERd32.1", 0, 11, { 0xAAEE, 0xBB06, 0xBB05, 0xAAF0, 0xAAF0, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB08, 0x001F } },
+  { "MR_UsrIDRd4.1", 0, 18, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB04, 0xAAF0, 0xAAF0, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB08, 0xBB03 } },
+  { "MR_CfgRd1.1", 0, 18, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB06, 0xAAEE, 0xBB06, 0xBB04, 0xAAF0, 0xAAF0 } },
+  { "MR_PrgMemWr8Int.1", 1, 24, { 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAE9, 0xBB08, 0xBB06, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x008D, 0xAAEE, 0xBB06, 0xBB06 } },
+  { "MR_EEWr1Int.1", 0, 13, { 0xAAEE, 0xBB06, 0xBB03, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE8, 0x0001, 0xAAEE, 0xBB06, 0xBB06 } },
+  { "MR_UsrIDWrInt.1", 0, 23, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x008D, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000D, 0xBB03 } },
+  { "MR_CfgWr1Int.1", 0, 16, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB06, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x008D } },
+  { "MR_PrgMemWr4Int.1", 0, 24, { 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAE9, 0xBB08, 0xBB02, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x0076, 0xAAEE, 0xBB06, 0xBB06 } },
+  { "DBG_Halt.1", 1, 10, { 0xAAF3, 0xBB04, 0xAAE7, 0x002F, 0xAAF3, 0xBB00, 0xAAE7, 0x0005, 0xAAF3, 0xBB01 } },
+  { "DBG_RdDEVer.1", 1, 11, { 0xAAF5, 0xAADF, 0xBB02, 0xAAE0, 0xAAE6, 0xBB00, 0xBB05, 0xAAE0, 0xAAE0, 0xAAE0, 0xAAF4 } },
+  { "DBG_Run.1", 1, 10, { 0xAAF5, 0xAADF, 0xBB19, 0xAAE0, 0xAAF4, 0xAAE6, 0xBB00, 0xBB04, 0xAAE3, 0xAAE0 } },
+  { "DBG_BulkWrData.1", 1, 18, { 0xAAF5, 0xAADF, 0xBB04, 0xAAE0, 0xAAE6, 0xBB00, 0x000C, 0xAADE, 0xAADE, 0xAADE, 0xAADE, 0xAADE, 0xAADD, 0xBB01, 0xAAF4, 0xAAE3, 0xAAE0, 0xAAF4 } },
+  { "DBG_BulkRdData.1", 1, 18, { 0xAAF5, 0xAADF, 0xBB03, 0xAAE0, 0xAAE6, 0xBB00, 0x000C, 0xAADE, 0xAADE, 0xAADE, 0xAADE, 0xAAE0, 0xAADD, 0xBB01, 0xAAF4, 0xAAE3, 0xAAE0, 0xAAF4 } },
+  { "DBG_SStep.1", 1, 10, { 0xAAF5, 0xAADF, 0xBB1A, 0xAAE0, 0xAAF4, 0xAAE6, 0xBB00, 0xBB04, 0xAAE3, 0xAAE0 } },
+  { "DBG_Status.1", 0, 1, { 0xAADC } },
+  { "24_ProgEntry.1", 1, 31, { 0xAAFA, 0xAAF7, 0xAAF9, 0xAAF5, 0xAAF3, 0xBB00, 0xAAE8, 0x0014, 0xAAF6, 0xAAFB, 0xAAE7, 0x00EB, 0xAAFA, 0xAAF7, 0xAAE7, 0x002F, 0xAAF2, 0xBBB2, 0xAAF2, 0xBBC2, 0xAAF2, 0xBB12, 0xAAF2, 0xBB8A, 0xAAF6, 0xAAFB, 0xAAE8, 0x0009, 0xAAEE, 0xBB05, 0xBB00 } },
+  { "24_RdDevID.1", 0, 47, { 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAD9, 0xBBF0, 0xBB0F, 0xBB20, 0xAAD9, 0xBB90, 0xBB01, 0xBB88, 0xAAD9, 0xBB06, 0xBB00, 0xBB20, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB07, 0xBB00, 0xBB20, 0xAAD9, 0xBBB6, 0xBB0B, 0xBBBA, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB20, 0xBB3C, 0xBB88, 0xAAD8, 0xAAD7, 0xAAD8 } },
+  { "24_SetAddr.1", 0, 29, { 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAD4, 0xBB06, 0xAAD3, 0xBB00, 0xAAD9, 0xBB90, 0xBB01, 0xBB88, 0xAAD9, 0xBB47, 0xBB78, 0xBB20, 0xAAD8 } },
+  { "24_ProgMemRd42.1", 0, 28, { 0xAAD9, 0xBB96, 0xBB0B, 0xBBBA, 0xAAD8, 0xAAD8, 0xAAD7, 0xAAD9, 0xBBB6, 0xBB8B, 0xBBBA, 0xAAD8, 0xAAD8, 0xAAEE, 0xBB04, 0xBB01, 0xAAF2, 0xBB00, 0xAAD6, 0xAAEF, 0xAAE9, 0x0014, 0x0029, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8 } },
+  { "24_ChpErase450ms.1", 0, 39, { 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAD9, 0xBBFA, 0xBB04, 0xBB24, 0xAAD9, 0xBB0A, 0xBB3B, 0xBB88, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAE9, 0xBB01, 0xBB00, 0xAAE8, 0x0050 } },
+  { "24_ProgMemWrPrep.1", 0, 33, { 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAD9, 0xBB1A, 0xBB00, 0xBB24, 0xAAD9, 0xBB0A, 0xBB3B, 0xBB88, 0xAAD4, 0xBB07, 0xAAD3, 0xBB00, 0xAAD9, 0xBB90, 0xBB01, 0xBB88, 0xAAD8 } },
+  { "24_ProgMemWr64.1", 0, 50, { 0xAAD4, 0xBB00, 0xAAD3, 0xBB01, 0xAAD4, 0xBB03, 0xAAD3, 0xBB02, 0xAAD9, 0xBB80, 0xBB0B, 0xBBBB, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB81, 0xBB9B, 0xBBBB, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB82, 0xBB8B, 0xBBBB, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB83, 0xBB1B, 0xBBBB, 0xAAD8, 0xAAD8, 0xAAE9, 0x0020, 0x001F, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAE9, 0xBB01, 0x0003, 0xAAE7, 0xBC64 } },
+  { "MR_ProgMemWr1Int.1", 0, 13, { 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x0076, 0xAAEE, 0xBB06, 0xBB06 } },
+  { "MR_RdOSCCAL.1", 0, 13, { 0xAAE4, 0xBB05, 0xAAEE, 0xBB06, 0xBB06, 0xAADD, 0xBB03, 0xAADB, 0xAAEE, 0xBB06, 0xBB04, 0xAAF0, 0xAAF0 } },
+  { "MR_WrOSCCALInt.1", 0, 18, { 0xAAE4, 0xBB05, 0xAAEE, 0xBB06, 0xBB06, 0xAADD, 0xBB03, 0xAADB, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x0076 } },
+  { "MR_AddrSet.1", 0, 16, { 0xAAFA, 0xAAF7, 0xAAE7, 0x005E, 0xAAF6, 0xAAFB, 0xAAE7, 0x002F, 0xAAE4, 0xBB05, 0xAAEE, 0xBB06, 0xBB06, 0xAADD, 0xBB03, 0xAADB } },
+  { "MR_PrgMemWr8Int.2", 0, 24, { 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAE9, 0xBB08, 0xBB06, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x008D, 0xAAEE, 0xBB06, 0xBB06 } },
+  { "MR_UsrIDWrInt.2", 0, 23, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x008D, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000D, 0xBB03 } },
+  { "MR_CfgRd2.1", 0, 24, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB06, 0xAAEE, 0xBB06, 0xBB04, 0xAAF0, 0xAAF0, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB08, 0xBB01 } },
+  { "MR_CfgWr2Int.1", 0, 29, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB06, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x008D, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x008D } },
+  { "BL_PrgMemRd32.1", 0, 11, { 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB04, 0xAAF0, 0xAAF0, 0xAAE9, 0xBB08, 0x001F } },
+  { "BL_CfgRd1.1", 0, 5, { 0xAAEE, 0xBB06, 0xBB04, 0xAAF0, 0xAAF0 } },
+  { "BL_UsrIDRd4@x400", 0, 26, { 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000C, 0x00FF, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB04, 0xAAF0, 0xAAF0, 0xAAE9, 0xBB08, 0xBB03 } },
+  { "BL_OSCCALRd1.1", 0, 11, { 0xAAEE, 0xBB06, 0xBB06, 0xAADD, 0xBB03, 0xAADB, 0xAAEE, 0xBB06, 0xBB04, 0xAAF0, 0xAAF0 } },
+  { "BL_PrgMemWr1Ext.1", 0, 16, { 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x005E, 0xAAEE, 0xBB06, 0xBB0E } },
+  { "BL_ChpErase@x800", 0, 38, { 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000C, 0x00FF, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000C, 0x00FF, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB09, 0xAAE8, 0xBB02 } },
+  { "BL_UsrIDWr4Ext@x400", 1, 36, { 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000C, 0x00FF, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x005E, 0xAAEE, 0xBB06, 0xBB0E, 0xAAE7, 0xBB05, 0xAAE9, 0x0012, 0xBB03 } },
+  { "BL_CfgWr1Ext", 0, 13, { 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x005E, 0xAAEE, 0xBB06, 0xBB0E } },
+  { "BL_OSCCALWrExt", 0, 19, { 0xAAEE, 0xBB06, 0xBB06, 0xAADD, 0xBB03, 0xAADB, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x005E, 0xAAEE, 0xBB06, 0xBB0E } },
+  { "BL_ChpErase@x100", 0, 23, { 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000C, 0x003F, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB09, 0xAAE8, 0xBB02 } },
+  { "BL_ChpErase@x200", 0, 23, { 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000C, 0x007F, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB09, 0xAAE8, 0xBB02 } },
+  { "BL_UsrIDRd4@x100", 0, 26, { 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000C, 0x003F, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB04, 0xAAF0, 0xAAF0, 0xAAE9, 0xBB08, 0xBB03 } },
+  { "BL_UsrIDRd4@x200", 0, 26, { 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000C, 0x007F, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB04, 0xAAF0, 0xAAF0, 0xAAE9, 0xBB08, 0xBB03 } },
+  { "BL_UsrIDWr4Ext@x100", 1, 36, { 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000C, 0x003F, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x005E, 0xAAEE, 0xBB06, 0xBB0E, 0xAAE7, 0xBB05, 0xAAE9, 0x0012, 0xBB03 } },
+  { "BL_UsrIDWr4Ext@x200", 1, 36, { 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000C, 0x007F, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x005E, 0xAAEE, 0xBB06, 0xBB0E, 0xAAE7, 0xBB05, 0xAAE9, 0x0012, 0xBB03 } },
+  { "BL_UsrIDWr4Ext@x800", 0, 51, { 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000C, 0x00FF, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000C, 0x00FF, 0xAAEE, 0xBB06, 0x0006, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x005E, 0xAAEE, 0xBB06, 0xBB0E, 0xAAE7, 0xBB05, 0xAAE9, 0x0012, 0xBB03 } },
+  { "BL_UsrIDRd4@x800", 0, 41, { 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000C, 0x00FF, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000C, 0x00FF, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB04, 0xAAF0, 0xAAF0, 0xAAE9, 0xBB08, 0xBB03 } },
+  { "BL_PrgMemWr4Ext.1", 0, 19, { 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAE9, 0xBB08, 0xBB03, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x005E, 0xAAEE, 0xBB06, 0xBB0E } },
+  { "BL_ChpErase@x400", 0, 23, { 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000C, 0x00FF, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB09, 0xAAE8, 0xBB02 } },
+  { "18F_DevIDRd.1", 1, 30, { 0xAADA, 0xBB00, 0xBB00, 0xAADA, 0xBB3F, 0xBB0E, 0xAADA, 0xBBF8, 0xBB6E, 0xAADA, 0xBBFF, 0xBB0E, 0xAADA, 0xBBF7, 0xBB6E, 0xAADA, 0xBBFE, 0xBB0E, 0xAADA, 0xBBF6, 0xBB6E, 0xAAEE, 0xBB04, 0xBB09, 0xAAF2, 0xBB00, 0xAAF0, 0xAAE9, 0xBB06, 0xBB01 } },
+  { "18F_PrgMemRd64", 0, 9, { 0xAAEE, 0xBB04, 0xBB09, 0xAAF2, 0xBB00, 0xAAF0, 0xAAE9, 0x0006, 0x007F } },
+  { "18F_SetAddr.1", 0, 27, { 0xAAEE, 0xBB04, 0xBB00, 0xAAF1, 0xAAF2, 0xBB0E, 0xAADA, 0xBBF6, 0xBB6E, 0xAAEE, 0xBB04, 0xBB00, 0xAAF1, 0xAAF2, 0xBB0E, 0xAADA, 0xBBF7, 0xBB6E, 0xAAEE, 0xBB04, 0xBB00, 0xAAF1, 0xAAF2, 0xBB0E, 0xAADA, 0xBBF8, 0xBB6E } },
+  { "18F_EERdPrepSmall.1", 0, 17, { 0xAADA, 0xBBA6, 0xBB9E, 0xAADA, 0xBBA6, 0xBB9C, 0xAAEE, 0xBB04, 0xBB00, 0xAAF1, 0xAAF2, 0xBB0E, 0xAADB, 0xAADB, 0xAADA, 0xBBA9, 0xBB6E } },
+  { "18F_EERd32Small.1", 0, 21, { 0xAADA, 0xBBA6, 0xBB80, 0xAADA, 0xBBA8, 0xBB50, 0xAADA, 0xBBF5, 0xBB6E, 0xAAEE, 0xBB04, 0xBB02, 0xAAF2, 0xBB00, 0xAAF0, 0xAADA, 0xBBA9, 0xBB2A, 0xAAE9, 0x0012, 0x001F } },
+  { "18F_CfgRd7.1", 0, 27, { 0xAADA, 0xBB30, 0xBB0E, 0xAADA, 0xBBF8, 0xBB6E, 0xAADA, 0xBB00, 0xBB0E, 0xAADA, 0xBBF7, 0xBB6E, 0xAADA, 0xBB00, 0xBB0E, 0xAADA, 0xBBF6, 0xBB6E, 0xAAEE, 0xBB04, 0xBB09, 0xAAF2, 0xBB00, 0xAAF0, 0xAAE9, 0xBB06, 0x000D } },
+  { "18F_UsrIDRd4.1", 0, 27, { 0xAADA, 0xBB20, 0xBB0E, 0xAADA, 0xBBF8, 0xBB6E, 0xAADA, 0xBB00, 0xBB0E, 0xAADA, 0xBBF7, 0xBB6E, 0xAADA, 0xBB00, 0xBB0E, 0xAADA, 0xBBF6, 0xBB6E, 0xAAEE, 0xBB04, 0xBB09, 0xAAF2, 0xBB00, 0xAAF0, 0xAAE9, 0xBB06, 0x0007 } },
+  { "18F_ChpErase.x80", 0, 37, { 0xAADA, 0xBB3C, 0xBB0E, 0xAADA, 0xBBF8, 0xBB6E, 0xAADA, 0xBB00, 0xBB0E, 0xAADA, 0xBBF7, 0xBB6E, 0xAADA, 0xBB04, 0xBB0E, 0xAADA, 0xBBF6, 0xBB6E, 0xAAEE, 0xBB04, 0xBB0C, 0xAAF2, 0xBB80, 0xAAF2, 0xBB80, 0xAADA, 0xBB00, 0xBB00, 0xAAEE, 0xBB04, 0xBB00, 0xAAE8, 0xBB01, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00 } },
+  { "18F_PrgMemWrPrep.1", 0, 33, { 0xAAEE, 0xBB04, 0xBB00, 0xAAF1, 0xAAF2, 0xBB0E, 0xAADA, 0xBBF6, 0xBB6E, 0xAAEE, 0xBB04, 0xBB00, 0xAAF1, 0xAAF2, 0xBB0E, 0xAADA, 0xBBF7, 0xBB6E, 0xAAEE, 0xBB04, 0xBB00, 0xAAF1, 0xAAF2, 0xBB0E, 0xAADA, 0xBBF8, 0xBB6E, 0xAADA, 0xBBA6, 0xBB8E, 0xAADA, 0xBBA6, 0xBB9C } },
+  { "18F_ProgMemWr4.1ms", 0, 35, { 0xAAEE, 0xBB04, 0xBB0D, 0xAAF1, 0xAAF1, 0xAAE9, 0xBB05, 0xBB02, 0xAAEE, 0xBB04, 0xBB0F, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB03, 0xBB00, 0xAAF3, 0xBB04, 0xAAE7, 0x002F, 0xAAF3, 0xBB00, 0xAAE7, 0xBB05, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB04, 0xBB0D, 0xAAF2, 0xBBFF, 0xAAF2, 0xBBFF } },
+  { "18F_UsrIDWr4.1ms", 0, 47, { 0xAADA, 0xBB20, 0xBB0E, 0xAADA, 0xBBF8, 0xBB6E, 0xAADA, 0xBB00, 0xBB0E, 0xAADA, 0xBBF7, 0xBB6E, 0xAADA, 0xBBF6, 0xBB6E, 0xAADA, 0xBBA6, 0xBB8E, 0xAADA, 0xBBA6, 0xBB9C, 0xAAEE, 0xBB04, 0xBB0D, 0xAAF1, 0xAAF1, 0xAAE9, 0xBB05, 0xBB02, 0xAAEE, 0xBB04, 0xBB0F, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB03, 0xBB00, 0xAAF3, 0xBB04, 0xAAE7, 0x002F, 0xAAF3, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00 } },
+  { "18F_CfgWrPrep", 0, 30, { 0xAADA, 0xBBA6, 0xBB8E, 0xAADA, 0xBBA6, 0xBB8C, 0xAADA, 0xBB00, 0xBBEF, 0xAADA, 0xBB00, 0xBBF8, 0xAADA, 0xBB30, 0xBB0E, 0xAADA, 0xBBF8, 0xBB6E, 0xAADA, 0xBB00, 0xBB0E, 0xAADA, 0xBBF7, 0xBB6E, 0xAADA, 0xBBF6, 0xBB6E, 0xAADB, 0xAADB, 0xAADB } },
+  { "18F_CfgWr7_1ms", 0, 51, { 0xAAEE, 0xBB04, 0xBB0F, 0xAAF1, 0xAAF2, 0xBB00, 0xAAEE, 0xBB03, 0xBB00, 0xAAF3, 0xBB04, 0xAAE7, 0x002F, 0xAAF3, 0xBB00, 0xAAE7, 0xBB05, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAADA, 0xBBF6, 0xBB2A, 0xAAEE, 0xBB04, 0xBB0F, 0xAAF2, 0xBB00, 0xAAF1, 0xAAEE, 0xBB03, 0xBB00, 0xAAF3, 0xBB04, 0xAAE7, 0x002F, 0xAAF3, 0xBB00, 0xAAE7, 0xBB05, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAADA, 0xBBF6, 0xBB2A, 0xAAE9, 0x0030, 0x0006 } },
+  { "18F_EEWrPrepSmall", 0, 17, { 0xAADA, 0xBBA6, 0xBB9E, 0xAADA, 0xBBA6, 0xBB9C, 0xAAEE, 0xBB04, 0xBB00, 0xAAF1, 0xAAF2, 0xBB0E, 0xAADA, 0xBBA9, 0xBB6E, 0xAADB, 0xAADB } },
+  { "18F_EEWr1Small5ms", 0, 38, { 0xAAEE, 0xBB04, 0xBB00, 0xAAF1, 0xAAF2, 0xBB0E, 0xAADA, 0xBBA8, 0xBB6E, 0xAADA, 0xBBA6, 0xBB84, 0xAADA, 0xBB55, 0xBB0E, 0xAADA, 0xBBA7, 0xBB6E, 0xAADA, 0xBBAA, 0xBB0E, 0xAADA, 0xBBA7, 0xBB6E, 0xAADA, 0xBBA6, 0xBB82, 0xAADA, 0xBB00, 0xBB00, 0xAADA, 0xBB00, 0xBB00, 0xAAE8, 0xBB01, 0xAADA, 0xBBA9, 0xBB2A } },
+  { "18J_ProgEntry", 1, 28, { 0xAAFA, 0xAAF7, 0xAAF9, 0xAAF5, 0xAAF3, 0xBB00, 0xAAE8, 0x0014, 0xAAF6, 0xAAFB, 0xAAE7, 0x002F, 0xAAFA, 0xAAF7, 0xAAE7, 0x002F, 0xAAF2, 0xBBB2, 0xAAF2, 0xBBC2, 0xAAF2, 0xBB12, 0xAAF2, 0xBB0A, 0xAAF6, 0xAAFB, 0xAAE7, 0x00EB } },
+  { "18J_ChpErase400ms", 0, 52, { 0xAADA, 0xBB3C, 0xBB0E, 0xAADA, 0xBBF8, 0xBB6E, 0xAADA, 0xBB00, 0xBB0E, 0xAADA, 0xBBF7, 0xBB6E, 0xAADA, 0xBB05, 0xBB0E, 0xAADA, 0xBBF6, 0xBB6E, 0xAAEE, 0xBB04, 0xBB0C, 0xAAF2, 0xBB01, 0xAAF2, 0xBB01, 0xAADA, 0xBB04, 0xBB0E, 0xAADA, 0xBBF6, 0xBB6E, 0xAAEE, 0xBB04, 0xBB0C, 0xAAF2, 0xBB80, 0xAAF2, 0xBB80, 0xAADA, 0xBB00, 0xBB00, 0xAAEE, 0xBB04, 0xBB00, 0xAAE8, 0x004A, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAE8, 0xBB19 } },
+  { "MR_CfgWr1Ext.1", 0, 21, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB06, 0xAAEE, 0xBB06, 0xBB18, 0xAAE7, 0x0076, 0xAAEE, 0xBB06, 0xBB0A, 0xAAE7, 0xBB05 } },
+  { "MR_DbgVctWr2Int.1", 0, 29, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB03, 0xAAEE, 0xBB06, 0x0002, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x008D, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000D, 0xBB01 } },
+  { "MR_DbgVctRd2.1", 0, 24, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB03, 0xAAEE, 0xBB06, 0xBB04, 0xAAF0, 0xAAF0, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB08, 0xBB01 } },
+  { "18J_PrgMemWrPrep", 0, 30, { 0xAAEE, 0xBB04, 0xBB00, 0xAAF1, 0xAAF2, 0xBB0E, 0xAADA, 0xBBF6, 0xBB6E, 0xAAEE, 0xBB04, 0xBB00, 0xAAF1, 0xAAF2, 0xBB0E, 0xAADA, 0xBBF7, 0xBB6E, 0xAAEE, 0xBB04, 0xBB00, 0xAAF1, 0xAAF2, 0xBB0E, 0xAADA, 0xBBF8, 0xBB6E, 0xAADA, 0xBBA6, 0xBB84 } },
+  { "18J_PrgMemWr32", 0, 35, { 0xAAEE, 0xBB04, 0xBB0D, 0xAAF1, 0xAAF1, 0xAAE9, 0xBB05, 0x001E, 0xAAEE, 0xBB04, 0xBB0F, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB03, 0xBB00, 0xAAF3, 0xBB04, 0xAAE8, 0x0001, 0xAAE7, 0x00D6, 0xAAF3, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB04, 0xBB0D, 0xAAF2, 0xBBFF, 0xAAF2, 0xBBFF } },
+  { "MR_ChpErase10ms", 0, 12, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB09, 0xAAE8, 0xBB02 } },
+  { "MR_PrgMemWr4Ext.1", 0, 29, { 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB08, 0xBB02, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB18, 0xAAE7, 0x0076, 0xAAEE, 0xBB06, 0xBB0A, 0xAAE7, 0xBB05, 0xAAEE, 0xBB06, 0xBB06 } },
+  { "MR_UsrIDWr4Ext.1", 0, 28, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB18, 0xAAE7, 0x0076, 0xAAEE, 0xBB06, 0xBB0A, 0xAAE7, 0xBB05, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x0012, 0xBB03 } },
+  { "MR_CfgWr1Int.2", 0, 23, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB06, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x008D } },
+  { "MR_PrgMemWr2Ext.1", 0, 26, { 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x002F, 0xAAEE, 0xBB06, 0xBB0E, 0xAAE7, 0xBB05, 0xAAEE, 0xBB06, 0xBB06 } },
+  { "MR_ChpErase30ms", 0, 12, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB09, 0xAAE8, 0xBB06 } },
+  { "MR_UsrIDWr4Ext.2", 0, 28, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x002F, 0xAAEE, 0xBB06, 0xBB0E, 0xAAE7, 0xBB05, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x0012, 0xBB03 } },
+  { "MR_CfgWr1Ext.2", 0, 28, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB06, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x002F, 0xAAEE, 0xBB06, 0xBB0E, 0xAAE7, 0xBB05 } },
+  { "MR_CfgWr2Ext.2", 0, 34, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB06, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x002F, 0xAAEE, 0xBB06, 0xBB0E, 0xAAE7, 0xBB05, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x0012, 0xBB01 } },
+  { "MR_ChpErase\"Chip\"1F", 0, 12, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB1F, 0xAAE8, 0xBB02 } },
+  { "MR_PrgMemWr4Ext.2", 1, 29, { 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB08, 0xBB02, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB18, 0xAAE7, 0x005E, 0xAAEE, 0xBB06, 0xBB17, 0xAAE7, 0xBB05, 0xAAEE, 0xBB06, 0xBB06 } },
+  { "MR_UsrIDWr4Ext.3", 1, 28, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB18, 0xAAE7, 0x005E, 0xAAEE, 0xBB06, 0xBB17, 0xAAE7, 0xBB05, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x0012, 0xBB03 } },
+  { "MR_CfgWr2Ext.3", 0, 34, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB06, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB18, 0xAAE7, 0x002F, 0xAAEE, 0xBB06, 0xBB17, 0xAAE7, 0x0005, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x0012, 0xBB01 } },
+  { "MR_EEWr1Ext.1", 2, 24, { 0xAAEE, 0xBB06, 0xBB03, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x00BC, 0xAAEE, 0xBB06, 0xBB17, 0xAAEE, 0xBB06, 0xBB18, 0xAAE7, 0x005E, 0xAAEE, 0xBB06, 0xBB17, 0xAAEE, 0xBB06, 0xBB06 } },
+  { "MR_CfgWr1Ext.3", 1, 28, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB06, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB18, 0xAAE7, 0x005E, 0xAAEE, 0xBB06, 0xBB17, 0xAAE7, 0x0005 } },
+  { "MR_PrgMemWr8Ext.2", 0, 29, { 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB08, 0xBB06, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB18, 0xAAE7, 0x002F, 0xAAEE, 0xBB06, 0xBB17, 0xAAE7, 0xBB05, 0xAAEE, 0xBB06, 0xBB06 } },
+  { "18F_ChpErase.x3F8F", 1, 50, { 0xAADA, 0xBB3C, 0xBB0E, 0xAADA, 0xBBF8, 0xBB6E, 0xAADA, 0xBB00, 0xBB0E, 0xAADA, 0xBBF7, 0xBB6E, 0xAADA, 0xBB05, 0xBB0E, 0xAADA, 0xBBF6, 0xBB6E, 0xAAEE, 0xBB04, 0xBB0C, 0xAAF2, 0xBB3F, 0xAAF2, 0xBB3F, 0xAADA, 0xBB04, 0xBB0E, 0xAADA, 0xBBF6, 0xBB6E, 0xAAEE, 0xBB04, 0xBB0C, 0xAAF2, 0xBB8F, 0xAAF2, 0xBB8F, 0xAADA, 0xBB00, 0xBB00, 0xAAEE, 0xBB04, 0xBB00, 0xAAE8, 0xBB01, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00 } },
+  { "18F_ProgMemWr8.1ms", 0, 35, { 0xAAEE, 0xBB04, 0xBB0D, 0xAAF1, 0xAAF1, 0xAAE9, 0xBB05, 0xBB06, 0xAAEE, 0xBB04, 0xBB0F, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB03, 0xBB00, 0xAAF3, 0xBB04, 0xAAE7, 0x002F, 0xAAF3, 0xBB00, 0xAAE7, 0xBB05, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB04, 0xBB0D, 0xAAF2, 0xBBFF, 0xAAF2, 0xBBFF } },
+  { "18F_ChpErase.xFF87", 0, 50, { 0xAADA, 0xBB3C, 0xBB0E, 0xAADA, 0xBBF8, 0xBB6E, 0xAADA, 0xBB00, 0xBB0E, 0xAADA, 0xBBF7, 0xBB6E, 0xAADA, 0xBB05, 0xBB0E, 0xAADA, 0xBBF6, 0xBB6E, 0xAAEE, 0xBB04, 0xBB0C, 0xAAF2, 0xBBFF, 0xAAF2, 0xBBFF, 0xAADA, 0xBB04, 0xBB0E, 0xAADA, 0xBBF6, 0xBB6E, 0xAAEE, 0xBB04, 0xBB0C, 0xAAF2, 0xBB87, 0xAAF2, 0xBB87, 0xAADA, 0xBB00, 0xBB00, 0xAAEE, 0xBB04, 0xBB00, 0xAAE8, 0xBB01, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00 } },
+  { "18F_ProgMemWr32.1ms-", 0, 35, { 0xAAEE, 0xBB04, 0xBB0D, 0xAAF1, 0xAAF1, 0xAAE9, 0xBB05, 0x001E, 0xAAEE, 0xBB04, 0xBB0F, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB03, 0xBB00, 0xAAF3, 0xBB04, 0xAAE7, 0x002F, 0xAAF3, 0xBB00, 0xAAE7, 0xBB05, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB04, 0xBB0D, 0xAAF2, 0xBBFF, 0xAAF2, 0xBBFF } },
+  { "18F_EERdPrepLarge.1", 0, 31, { 0xAADA, 0xBBA6, 0xBB9E, 0xAADA, 0xBBA6, 0xBB9C, 0xAAEE, 0xBB04, 0xBB00, 0xAAF1, 0xAAF2, 0xBB0E, 0xAADA, 0xBBA9, 0xBB6E, 0xAAEE, 0xBB04, 0xBB00, 0xAAF1, 0xAAF2, 0xBB0E, 0xAADA, 0xBBAA, 0xBB6E, 0xAADB, 0xAADA, 0xBB99, 0xBB0E, 0xAADA, 0xBBF5, 0xBB6E } },
+  { "18F_EERd32Large.1", 0, 33, { 0xAADA, 0xBBA6, 0xBB80, 0xAADA, 0xBBA8, 0xBB50, 0xAADA, 0xBBF5, 0xBB6E, 0xAADA, 0xBB00, 0xBB00, 0xAADA, 0xBB00, 0xBB00, 0xAAEE, 0xBB04, 0xBB02, 0xAAF2, 0xBB00, 0xAAF0, 0xAADA, 0xBBA9, 0xBB2A, 0xAADA, 0xBBD8, 0xBBB0, 0xAADA, 0xBBAA, 0xBB2A, 0xAAE9, 0x001E, 0x001F } },
+  { "18F_EEWrPrepLarge.1", 0, 25, { 0xAADA, 0xBBA6, 0xBB9E, 0xAADA, 0xBBA6, 0xBB9C, 0xAAEE, 0xBB04, 0xBB00, 0xAAF1, 0xAAF2, 0xBB0E, 0xAADA, 0xBBA9, 0xBB6E, 0xAAEE, 0xBB04, 0xBB00, 0xAAF1, 0xAAF2, 0xBB0E, 0xAADA, 0xBBAA, 0xBB6E, 0xAADB } },
+  { "18F_EEWr1Large5ms", 0, 35, { 0xAAEE, 0xBB04, 0xBB00, 0xAAF1, 0xAAF2, 0xBB0E, 0xAADA, 0xBBA8, 0xBB6E, 0xAADA, 0xBBA6, 0xBB84, 0xAADA, 0xBBA6, 0xBB82, 0xAADA, 0xBB00, 0xBB00, 0xAAE9, 0xBB03, 0xBB03, 0xAAE8, 0x0001, 0xAADA, 0xBB00, 0xBB00, 0xAADA, 0xBBA9, 0xBB2A, 0xAADA, 0xBBD8, 0xBBB0, 0xAADA, 0xBBAA, 0xBB2A } },
+  { "MR_ChpErase87x", 0, 56, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBBFE, 0xAAF2, 0xBB7F, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB06, 0xAAEE, 0xBB06, 0xBB01, 0xAAEE, 0xBB06, 0xBB07, 0xAAEE, 0xBB06, 0xBB08, 0xAAE8, 0xBB02, 0xAAEE, 0xBB06, 0xBB01, 0xAAEE, 0xBB06, 0xBB07, 0xAAE8, 0xBB02, 0xAAEE, 0xBB06, 0xBB03, 0xAAF2, 0xBBFE, 0xAAF2, 0xBB7F, 0xAAEE, 0xBB06, 0xBB01, 0xAAEE, 0xBB06, 0xBB07, 0xAAEE, 0xBB06, 0xBB08, 0xAAE8, 0xBB02, 0xAAEE, 0xBB06, 0xBB01, 0xAAEE, 0xBB06, 0xBB07 } },
+  { "MR_RowErase16.1", 0, 13, { 0xAAEE, 0xBB06, 0xBB11, 0xAAE8, 0xBB01, 0xAAE7, 0x0019, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0x000F } },
+  { "18F_ProgMemWr16.1ms", 0, 35, { 0xAAEE, 0xBB04, 0xBB0D, 0xAAF1, 0xAAF1, 0xAAE9, 0xBB05, 0x000E, 0xAAEE, 0xBB04, 0xBB0F, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB03, 0xBB00, 0xAAF3, 0xBB04, 0xAAE7, 0x002F, 0xAAF3, 0xBB00, 0xAAE7, 0xBB05, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB04, 0xBB0D, 0xAAF2, 0xBBFF, 0xAAF2, 0xBBFF } },
+  { "18F_ProgMemWr32.1ms", 0, 35, { 0xAAEE, 0xBB04, 0xBB0D, 0xAAF1, 0xAAF1, 0xAAE9, 0xBB05, 0x001E, 0xAAEE, 0xBB04, 0xBB0F, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB03, 0xBB00, 0xAAF3, 0xBB04, 0xAAE7, 0x002F, 0xAAF3, 0xBB00, 0xAAE7, 0xBB05, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB04, 0xBB0D, 0xAAF2, 0xBBFF, 0xAAF2, 0xBBFF } },
+  { "MR_ProgMemWr1Int.2", 0, 13, { 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB18, 0xAAE7, 0x00BC, 0xAAEE, 0xBB06, 0xBB06 } },
+  { "MR_UsrIDWrInt.3", 0, 23, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB18, 0xAAE7, 0x00BC, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000D, 0xBB03 } },
+  { "MR_CfgWr1Int.2", 0, 23, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB06, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB18, 0xAAE7, 0x00BC } },
+  { "18F_EEWr1LargeAA55", 0, 44, { 0xAAEE, 0xBB04, 0xBB00, 0xAAF1, 0xAAF2, 0xBB0E, 0xAADA, 0xBBA8, 0xBB6E, 0xAADA, 0xBBA6, 0xBB84, 0xAADA, 0xBB55, 0xBB0E, 0xAADA, 0xBBA7, 0xBB6E, 0xAADA, 0xBBAA, 0xBB0E, 0xAADA, 0xBBA7, 0xBB6E, 0xAADA, 0xBBA6, 0xBB82, 0xAADA, 0xBB00, 0xBB00, 0xAADA, 0xBB00, 0xBB00, 0xAAE8, 0xBB01, 0xAADA, 0xBBA9, 0xBB2A, 0xAADA, 0xBBD8, 0xBBB0, 0xAADA, 0xBBAA, 0xBB2A } },
+  { "MR_ProgMemWr1Ext.1", 0, 18, { 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB18, 0xAAE7, 0x0076, 0xAAEE, 0xBB06, 0xBB0A, 0xAAE7, 0xBB05, 0xAAEE, 0xBB06, 0xBB06 } },
+  { "MR_PMemErase10msI", 0, 12, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB09, 0xAAE8, 0xBB02 } },
+  { "MR_PMemEraseExt", 0, 18, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB09, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x005E, 0xAAEE, 0xBB06, 0xBB17 } },
+  { "30_ChpErasePrep", 0, 23, { 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB01, 0xBB04, 0xAAD8, 0xAAD9, 0xBB06, 0xBB5C, 0xBB20, 0xAAD9, 0xBB16, 0xBB3B, 0xBB88, 0xAAD9, 0xBB06, 0xBB08, 0xBB20, 0xAAD9, 0xBB26, 0xBB3B, 0xBB88 } },
+  { "MR_PMemErase87x", 0, 32, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBBFE, 0xAAF2, 0xBB7F, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB06, 0xAAEE, 0xBB06, 0xBB01, 0xAAEE, 0xBB06, 0xBB07, 0xAAEE, 0xBB06, 0xBB08, 0xAAE8, 0xBB02, 0xAAEE, 0xBB06, 0xBB01, 0xAAEE, 0xBB06, 0xBB07, 0xAAE8, 0xBB02 } },
+  { "MR_EEMemEraseExt", 0, 11, { 0xAAEE, 0xBB06, 0xBB0B, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x005E, 0xAAEE, 0xBB06, 0xBB17 } },
+  { "18F_PMemErase.xF83", 0, 50, { 0xAADA, 0xBB3C, 0xBB0E, 0xAADA, 0xBBF8, 0xBB6E, 0xAADA, 0xBB00, 0xBB0E, 0xAADA, 0xBBF7, 0xBB6E, 0xAADA, 0xBB05, 0xBB0E, 0xAADA, 0xBBF6, 0xBB6E, 0xAAEE, 0xBB04, 0xBB0C, 0xAAF2, 0xBB0F, 0xAAF2, 0xBB0F, 0xAADA, 0xBB04, 0xBB0E, 0xAADA, 0xBBF6, 0xBB6E, 0xAAEE, 0xBB04, 0xBB0C, 0xAAF2, 0xBB83, 0xAAF2, 0xBB83, 0xAADA, 0xBB00, 0xBB00, 0xAAEE, 0xBB04, 0xBB00, 0xAAE8, 0xBB01, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00 } },
+  { "18F_EraseTest2", 0, 43, { 0xBBD2, 0xBB83, 0xBBD2, 0xBB88, 0xAADA, 0xBB3C, 0xBB0E, 0xAADA, 0xBBF8, 0xBB6E, 0xAADA, 0xBB00, 0xBB0E, 0xAADA, 0xBBF7, 0xBB6E, 0xAADA, 0xBB04, 0xBB0E, 0xAADA, 0xBBF6, 0xBB6E, 0xAAEE, 0xBB04, 0xBB0C, 0xAAF1, 0xAAF2, 0xBB00, 0xAADA, 0xBB00, 0xBB00, 0xAAEE, 0xBB04, 0xBB00, 0xAAE8, 0xBB01, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAE9, 0x0024, 0xBB01 } },
+  { "18F_PMemErase.xFF83", 0, 50, { 0xAADA, 0xBB3C, 0xBB0E, 0xAADA, 0xBBF8, 0xBB6E, 0xAADA, 0xBB00, 0xBB0E, 0xAADA, 0xBBF7, 0xBB6E, 0xAADA, 0xBB05, 0xBB0E, 0xAADA, 0xBBF6, 0xBB6E, 0xAAEE, 0xBB04, 0xBB0C, 0xAAF2, 0xBBFF, 0xAAF2, 0xBBFF, 0xAADA, 0xBB04, 0xBB0E, 0xAADA, 0xBBF6, 0xBB6E, 0xAAEE, 0xBB04, 0xBB0C, 0xAAF2, 0xBB83, 0xAAF2, 0xBB83, 0xAADA, 0xBB00, 0xBB00, 0xAAEE, 0xBB04, 0xBB00, 0xAAE8, 0xBB01, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00 } },
+  { "MR_PrgMemWr4Ext.3", 0, 29, { 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB08, 0xBB02, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB18, 0xAAE7, 0x005E, 0xAAEE, 0xBB06, 0xBB0E, 0xAAE7, 0xBB05, 0xAAEE, 0xBB06, 0xBB06 } },
+  { "MR_UsrIDWr4Ext.4", 0, 28, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB18, 0xAAE7, 0x0076, 0xAAEE, 0xBB06, 0xBB0E, 0xAAE7, 0xBB05, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x0012, 0xBB03 } },
+  { "MR_CfgWr1Ext.4", 1, 27, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB06, 0xAAEE, 0xBB06, 0xBB18, 0xAAE7, 0x0076, 0xAAEE, 0xBB06, 0xBB0E, 0xAAE7, 0xBB05, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000D, 0x0001 } },
+  { "33_CfgRd8", 0, 48, { 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAD9, 0xBB80, 0xBB0F, 0xBB20, 0xAAD9, 0xBB90, 0xBB01, 0xBB88, 0xAAD9, 0xBB00, 0xBB03, 0xBBEB, 0xAAD9, 0xBB47, 0xBB78, 0xBB20, 0xAAD8, 0xAAD9, 0xBBB6, 0xBB0B, 0xBBBA, 0xAAD8, 0xAAD8, 0xAAD7, 0xAAE9, 0xBB08, 0xBB07, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8 } },
+  { "33_UserIDRd4", 0, 54, { 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAD9, 0xBB80, 0xBB0F, 0xBB20, 0xAAD9, 0xBB90, 0xBB01, 0xBB88, 0xAAD9, 0xBB06, 0xBB01, 0xBB20, 0xAAD9, 0xBB47, 0xBB78, 0xBB20, 0xAAD8, 0xAAD9, 0xBBB6, 0xBB0B, 0xBBBA, 0xAAD8, 0xAAD8, 0xAAEE, 0xBB04, 0xBB01, 0xAAF2, 0xBB00, 0xAAD6, 0xAAEF, 0xAAE9, 0x000D, 0xBB03, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8 } },
+  { "33_ProgMemWr64.1", 0, 50, { 0xAAD4, 0xBB00, 0xAAD3, 0xBB01, 0xAAD4, 0xBB03, 0xAAD3, 0xBB02, 0xAAD9, 0xBB80, 0xBB0B, 0xBBBB, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB81, 0xBB9B, 0xBBBB, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB82, 0xBB8B, 0xBBBB, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB83, 0xBB1B, 0xBBBB, 0xAAD8, 0xAAD8, 0xAAE9, 0x0020, 0x001F, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAE9, 0xBB01, 0x0003, 0xAAE7, 0x0048 } },
+  { "33_UsrIDWr4", 0, 60, { 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAD9, 0xBB07, 0xBB01, 0xBB20, 0xAAD9, 0xBB0A, 0xBB00, 0xBB24, 0xAAD9, 0xBB0A, 0xBB3B, 0xBB88, 0xAAD9, 0xBB80, 0xBB0F, 0xBB20, 0xAAD9, 0xBB90, 0xBB01, 0xBB88, 0xAAD3, 0xBB00, 0xAAD9, 0xBB80, 0xBB1B, 0xBBBB, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA8, 0xAAD8, 0xAAD8, 0xAAE8, 0xBB06, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA9, 0xAAD8, 0xAAE9, 0x0015, 0xBB03 } },
+  { "33_CfgWr8", 0, 60, { 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAD9, 0xBB07, 0xBB00, 0xBB20, 0xAAD9, 0xBB0A, 0xBB00, 0xBB24, 0xAAD9, 0xBB0A, 0xBB3B, 0xBB88, 0xAAD9, 0xBB80, 0xBB0F, 0xBB20, 0xAAD9, 0xBB90, 0xBB01, 0xBB88, 0xAAD4, 0xBB00, 0xAAD9, 0xBB80, 0xBB1B, 0xBBBB, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA8, 0xAAD8, 0xAAD8, 0xAAE8, 0x0006, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA9, 0xAAD8, 0xAAE9, 0x0015, 0xBB07 } },
+  { "MR_PMemErase15msI", 0, 15, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBBFE, 0xAAF2, 0xBB7F, 0xAAEE, 0xBB06, 0xBB09, 0xAAEE, 0xBB06, 0xBB08, 0xAAE8, 0xBB03 } },
+  { "MR_PrgMemWr4Int.2", 0, 24, { 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAE9, 0xBB08, 0xBB02, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x008D, 0xAAEE, 0xBB06, 0xBB06 } },
+  { "18F_ChpErase.x018A", 0, 50, { 0xAADA, 0xBB3C, 0xBB0E, 0xAADA, 0xBBF8, 0xBB6E, 0xAADA, 0xBB00, 0xBB0E, 0xAADA, 0xBBF7, 0xBB6E, 0xAADA, 0xBB05, 0xBB0E, 0xAADA, 0xBBF6, 0xBB6E, 0xAAEE, 0xBB04, 0xBB0C, 0xAAF2, 0xBB01, 0xAAF2, 0xBB01, 0xAADA, 0xBB04, 0xBB0E, 0xAADA, 0xBBF6, 0xBB6E, 0xAAEE, 0xBB04, 0xBB0C, 0xAAF2, 0xBB8A, 0xAAF2, 0xBB8A, 0xAADA, 0xBB00, 0xBB00, 0xAAEE, 0xBB04, 0xBB00, 0xAAE8, 0xBB06, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00 } },
+  { "18F_ProgMemWr8.2ms", 0, 35, { 0xAAEE, 0xBB04, 0xBB0D, 0xAAF1, 0xAAF1, 0xAAE9, 0xBB05, 0x0006, 0xAAEE, 0xBB04, 0xBB0F, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB03, 0xBB00, 0xAAF3, 0xBB04, 0xAAE7, 0x005E, 0xAAF3, 0xBB00, 0xAAE7, 0xBB06, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB04, 0xBB0D, 0xAAF2, 0xBBFF, 0xAAF2, 0xBBFF } },
+  { "18F_CfgWr7_2ms", 0, 60, { 0xAADA, 0xBBA6, 0xBB84, 0xAAEE, 0xBB04, 0xBB0F, 0xAAF1, 0xAAF2, 0xBB00, 0xAAEE, 0xBB03, 0xBB00, 0xAAF3, 0xBB04, 0xAAE7, 0x005E, 0xAAF3, 0xBB00, 0xAAE7, 0x000C, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAADA, 0xBB00, 0xBB00, 0xAADA, 0xBBF6, 0xBB2A, 0xAAEE, 0xBB04, 0xBB0F, 0xAAF2, 0xBB00, 0xAAF1, 0xAAEE, 0xBB03, 0xBB00, 0xAAF3, 0xBB04, 0xAAE7, 0x005E, 0xAAF3, 0xBB00, 0xAAE7, 0xBB12, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAADA, 0xBB00, 0xBB00, 0xAADA, 0xBBF6, 0xBB2A, 0xAAE9, 0x0036, 0x0006 } },
+  { "18F_UsrIDWr4.2ms", 0, 49, { 0xAADA, 0xBB20, 0xBB0E, 0xAADA, 0xBBF8, 0xBB6E, 0xAADA, 0xBB00, 0xBB0E, 0xAADA, 0xBBF7, 0xBB6E, 0xAADA, 0xBBF6, 0xBB6E, 0xAADA, 0xBBA6, 0xBB9C, 0xAADA, 0xBBA6, 0xBB84, 0xAAEE, 0xBB04, 0xBB0D, 0xAAF1, 0xAAF1, 0xAAE9, 0xBB05, 0xBB02, 0xAAEE, 0xBB04, 0xBB0F, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB03, 0xBB00, 0xAAF3, 0xBB04, 0xAAE7, 0x005E, 0xAAF3, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAE7, 0xBB06 } },
+  { "MR_TstMemRd8", 0, 11, { 0xAAEE, 0xBB06, 0xBB04, 0xAAF0, 0xAAF0, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB08, 0xBB07 } },
+  { "30S_UsrIDRdPrep", 0, 33, { 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAD9, 0xBB06, 0xBB5C, 0xBB20, 0xAAD9, 0xBB00, 0xBB08, 0xBB20, 0xAAD9, 0xBB90, 0xBB01, 0xBB88, 0xAAD9, 0xBB47, 0xBB78, 0xBB20, 0xAAD8 } },
+  { "BL_TestMemRd8", 0, 11, { 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB04, 0xAAF0, 0xAAF0, 0xAAE9, 0xBB08, 0x0007 } },
+  { "18F_TstMemRd8.1", 0, 9, { 0xAAEE, 0xBB04, 0xBB09, 0xAAF2, 0xBB00, 0xAAF0, 0xAAE9, 0xBB06, 0x000F } },
+  { "MR_CalWrdsErWr91x", 0, 46, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB07, 0xAAEE, 0xBB06, 0xBB09, 0xAAE8, 0xBB02, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x008D, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB09, 0xAAE8, 0xBB02, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x008D } },
+  { "MR_CalWrdsErWr88x", 0, 28, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB08, 0xAAEE, 0xBB06, 0xBB09, 0xAAE8, 0xBB02, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x008D } },
+  { "MR_CalWrdsErWr6xx-1", 0, 28, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB07, 0xAAEE, 0xBB06, 0xBB09, 0xAAE8, 0xBB02, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x008D } },
+  { "MR_CalWrdErWr61x", 0, 33, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB07, 0xAAEE, 0xBB06, 0xBB09, 0xAAE8, 0xBB02, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB18, 0xAAE7, 0x0076, 0xAAEE, 0xBB06, 0xBB0A, 0xAAE7, 0xBB05 } },
+  { "30_RdDevID", 0, 49, { 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB01, 0xBB04, 0xAAD8, 0xAAE9, 0xBB07, 0xBB01, 0xAAD9, 0xBBF0, 0xBB0F, 0xBB20, 0xAAD9, 0xBB90, 0xBB01, 0xBB88, 0xAAD9, 0xBB06, 0xBB00, 0xBB20, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB80, 0xBB03, 0xBBEB, 0xAAD9, 0xBBB6, 0xBB0B, 0xBBBA, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB20, 0xBB3C, 0xBB88, 0xAAD8, 0xAAEE, 0xBB04, 0xBB01, 0xAAF2, 0xBB00, 0xAAF0, 0xAAF0, 0xAAD8 } },
+  { "30_ChpErase4ms", 0, 49, { 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB01, 0xBB04, 0xAAD8, 0xAAD9, 0xBBFA, 0xBB07, 0xBB24, 0xAAD9, 0xBB0A, 0xBB3B, 0xBB88, 0xAAD9, 0xBB58, 0xBB05, 0xBB20, 0xAAD9, 0xBBA9, 0xBB0A, 0xBB20, 0xAAD9, 0xBB38, 0xBB3B, 0xBB88, 0xAAD9, 0xBB39, 0xBB3B, 0xBB88, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAE7, 0x00BC, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA9, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD8 } },
+  { "30_SetAddr.1", 1, 35, { 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB01, 0xBB04, 0xAAD8, 0xAAE9, 0xBB07, 0xBB01, 0xAAD4, 0xBB06, 0xAAD3, 0xBB00, 0xAAD9, 0xBB90, 0xBB01, 0xBB88, 0xAAD9, 0xBB16, 0xBB3B, 0xBB88, 0xAAD9, 0xBB20, 0xBB3B, 0xBB88, 0xAAD9, 0xBB05, 0xBB02, 0xBB20, 0xAAD9, 0xBB47, 0xBB78, 0xBB20, 0xAAD8 } },
+  { "30_ProgMemRd42.1", 0, 34, { 0xAAD9, 0xBB96, 0xBB0B, 0xBBBA, 0xAAD8, 0xAAD8, 0xAAEE, 0xBB04, 0xBB01, 0xAAF2, 0xBB00, 0xAAF0, 0xAAF0, 0xAAD9, 0xBBB6, 0xBB8B, 0xBBBA, 0xAAD8, 0xAAD8, 0xAAEE, 0xBB04, 0xBB01, 0xAAF2, 0xBB00, 0xAAF0, 0xAAEF, 0xAAE9, 0x001A, 0x0029, 0xAAD9, 0xBB00, 0xBB01, 0xBB04, 0xAAD8 } },
+  { "30_CfgRd7", 0, 48, { 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB01, 0xBB04, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB80, 0xBB0F, 0xBB20, 0xAAD9, 0xBB90, 0xBB01, 0xBB88, 0xAAD9, 0xBB06, 0xBB00, 0xBB20, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB80, 0xBB03, 0xBBEB, 0xAAD9, 0xBBB6, 0xBB0B, 0xBBBA, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB20, 0xBB3C, 0xBB88, 0xAAD8, 0xAAEE, 0xBB04, 0xBB01, 0xAAF2, 0xBB00, 0xAAF0, 0xAAF0, 0xAAD8, 0xAAE9, 0x0013, 0xBB06 } },
+  { "30_EERd64.1", 0, 21, { 0xAAD9, 0xBBB6, 0xBB0B, 0xBBBA, 0xAAD8, 0xAAD8, 0xAAEE, 0xBB04, 0xBB01, 0xAAF2, 0xBB00, 0xAAF0, 0xAAF0, 0xAAE9, 0x000D, 0x003F, 0xAAD9, 0xBB00, 0xBB01, 0xBB04, 0xAAD8 } },
+  { "30_ProgMemWrPrep.1", 1, 41, { 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB01, 0xBB04, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB1A, 0xBB00, 0xBB24, 0xAAD9, 0xBB0A, 0xBB3B, 0xBB88, 0xAAD4, 0xBB07, 0xAAD3, 0xBB00, 0xAAD9, 0xBB90, 0xBB01, 0xBB88, 0xAAD8, 0xAAD9, 0xBB00, 0xBB03, 0xBBEB, 0xAAD9, 0xBB16, 0xBB3B, 0xBB88, 0xAAD9, 0xBB26, 0xBB3B, 0xBB88, 0xAAD9, 0xBB05, 0xBB04, 0xBB20 } },
+  { "30_ProgMemWr32.1", 0, 61, { 0xAAD4, 0xBB00, 0xAAD3, 0xBB01, 0xAAD9, 0xBB80, 0xBB0B, 0xBBBB, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB81, 0xBB9B, 0xBBBB, 0xAAD8, 0xAAD8, 0xAAE9, 0x0010, 0x001F, 0xAAD9, 0xBB58, 0xBB05, 0xBB20, 0xAAD9, 0xBB38, 0xBB3B, 0xBB88, 0xAAD9, 0xBBA9, 0xBB0A, 0xBB20, 0xAAD9, 0xBB39, 0xBB3B, 0xBB88, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAE7, 0x005E, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA9, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB01, 0xBB04, 0xAAD8, 0xAAD9, 0xBB0A, 0xBB3B, 0xBB88 } },
+  { "30_EEWrPrep.1", 0, 25, { 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB01, 0xBB04, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB5A, 0xBB00, 0xBB24, 0xAAD9, 0xBB0A, 0xBB3B, 0xBB88, 0xAAD4, 0xBB07, 0xAAD3, 0xBB00, 0xAAD9, 0xBB90, 0xBB01, 0xBB88, 0xAAD8 } },
+  { "30_EEWr16.1", 0, 61, { 0xAAD4, 0xBB00, 0xAAD4, 0xBB01, 0xAAD9, 0xBB80, 0xBB1B, 0xBBBB, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB81, 0xBB1B, 0xBBBB, 0xAAD8, 0xAAD8, 0xAAE9, 0x0010, 0x0007, 0xAAD9, 0xBB58, 0xBB05, 0xBB20, 0xAAD9, 0xBB38, 0xBB3B, 0xBB88, 0xAAD9, 0xBBA9, 0xBB0A, 0xBB20, 0xAAD9, 0xBB39, 0xBB3B, 0xBB88, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAE7, 0x005E, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA9, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB01, 0xBB04, 0xAAD8, 0xAAD9, 0xBB0A, 0xBB3B, 0xBB88 } },
+  { "30_CfgWrPrep.1", 0, 28, { 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB01, 0xBB04, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB8A, 0xBB00, 0xBB24, 0xAAD9, 0xBB0A, 0xBB3B, 0xBB88, 0xAAD4, 0xBB07, 0xAADB, 0xAAD9, 0xBB81, 0xBB0F, 0xBB20, 0xAAD9, 0xBB91, 0xBB01, 0xBB88, 0xAAD8 } },
+  { "30_CfgWr7.1", 0, 53, { 0xAAD4, 0xBB00, 0xAAD9, 0xBB80, 0xBB1B, 0xBBBB, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB58, 0xBB05, 0xBB20, 0xAAD9, 0xBB38, 0xBB3B, 0xBB88, 0xAAD9, 0xBBA9, 0xBB0A, 0xBB20, 0xAAD9, 0xBB39, 0xBB3B, 0xBB88, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAE7, 0x005E, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA9, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB0A, 0xBB3B, 0xBB88, 0xAAD8, 0xAAD8, 0xAAE9, 0x0032, 0x0006 } },
+  { "30_CfgClear7.1", 0, 55, { 0xAAD9, 0xBB00, 0xBB00, 0xBB20, 0xAAD9, 0xBB80, 0xBB1B, 0xBBBB, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB58, 0xBB05, 0xBB20, 0xAAD9, 0xBB38, 0xBB3B, 0xBB88, 0xAAD9, 0xBBA9, 0xBB0A, 0xBB20, 0xAAD9, 0xBB39, 0xBB3B, 0xBB88, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAE7, 0x005E, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA9, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB0A, 0xBB3B, 0xBB88, 0xAAD8, 0xAAD8, 0xAAE9, 0x0030, 0x0006 } },
+  { "30_UsrIDRdPrep", 0, 25, { 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB01, 0xBB04, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB06, 0xBB5C, 0xBB20, 0xAAD9, 0xBB00, 0xBB08, 0xBB20, 0xAAD9, 0xBB90, 0xBB01, 0xBB88, 0xAAD9, 0xBB47, 0xBB78, 0xBB20, 0xAAD8 } },
+  { "30_UsrIDRd32.1", 0, 34, { 0xAAD9, 0xBB96, 0xBB0B, 0xBBBA, 0xAAD8, 0xAAD8, 0xAAEE, 0xBB04, 0xBB01, 0xAAF2, 0xBB00, 0xAAF0, 0xAAF0, 0xAAD9, 0xBBB6, 0xBB8B, 0xBBBA, 0xAAD8, 0xAAD8, 0xAAEE, 0xBB04, 0xBB01, 0xAAF2, 0xBB00, 0xAAF0, 0xAAEF, 0xAAE9, 0x001A, 0x001F, 0xAAD9, 0xBB00, 0xBB01, 0xBB04, 0xAAD8 } },
+  { "30_UsrIDWrPrep.1", 0, 29, { 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB01, 0xBB04, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB1A, 0xBB00, 0xBB24, 0xAAD9, 0xBB0A, 0xBB3B, 0xBB88, 0xAAD9, 0xBB07, 0xBB5C, 0xBB20, 0xAAD9, 0xBB00, 0xBB08, 0xBB20, 0xAAD9, 0xBB90, 0xBB01, 0xBB88, 0xAAD8 } },
+  { "30S_CfgWrPrep", 0, 27, { 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAADB, 0xAADB, 0xAADB, 0xAAD9, 0xBB07, 0xBB00, 0xBB20, 0xAAD9, 0xBB8A, 0xBB00, 0xBB24 } },
+  { "30S_CfgWr8", 0, 45, { 0xAAD9, 0xBB0A, 0xBB3B, 0xBB88, 0xAAD9, 0xBB80, 0xBB0F, 0xBB20, 0xAAD9, 0xBB90, 0xBB01, 0xBB88, 0xAAD4, 0xBB00, 0xAAD9, 0xBB80, 0xBB1B, 0xBBBB, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAE8, 0xBB01, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA9, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAE9, 0x002A, 0xBB07 } },
+  { "30S_ProgMemWr32", 0, 46, { 0xAAD4, 0xBB00, 0xAAD3, 0xBB01, 0xAAD9, 0xBB80, 0xBB0B, 0xBBBB, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB81, 0xBB9B, 0xBBBB, 0xAAD8, 0xAAD8, 0xAAE9, 0x0010, 0x001F, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAE7, 0xBB94, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA9, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAD9, 0xBB0A, 0xBB3B, 0xBB88 } },
+  { "30S_ChpErasePrep", 0, 27, { 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB06, 0xBB5C, 0xBB20, 0xAAD9, 0xBB16, 0xBB3B, 0xBB88, 0xAAD9, 0xBB06, 0xBB08, 0xBB20, 0xAAD9, 0xBB26, 0xBB3B, 0xBB88 } },
+  { "30S_UsrIDWrPrep.1", 0, 32, { 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD9, 0xBB00, 0xBB02, 0xBB04, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB1A, 0xBB00, 0xBB24, 0xAAD9, 0xBB0A, 0xBB3B, 0xBB88, 0xAAD9, 0xBB07, 0xBB5C, 0xBB20, 0xAAD9, 0xBB00, 0xBB08, 0xBB20, 0xAAD9, 0xBB90, 0xBB01, 0xBB88, 0xAAD8 } },
+  { "MR_DbgVctWr2Ext.3", 0, 34, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB03, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB18, 0xAAE7, 0x002F, 0xAAEE, 0xBB06, 0xBB17, 0xAAE7, 0x0005, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x0012, 0xBB01 } },
+  { "BL_UsrIDRd4@x440", 0, 32, { 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000C, 0x00FF, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0x003F, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB04, 0xAAF0, 0xAAF0, 0xAAE9, 0xBB08, 0xBB03 } },
+  { "BL_UsrIDWr4Ext@x440", 1, 42, { 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000C, 0x00FF, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0x003F, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x005E, 0xAAEE, 0xBB06, 0xBB0E, 0xAAE7, 0xBB05, 0xAAE9, 0x0012, 0xBB03 } },
+  { "BL_OSCCALRd1@x3FF", 0, 23, { 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000C, 0x00FF, 0xAADB, 0xAADB, 0xAADB, 0xAAEE, 0xBB06, 0xBB04, 0xAAF0, 0xAAF0 } },
+  { "BL_OSCCALWrExt@x3FF", 0, 31, { 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000C, 0x00FF, 0xAADB, 0xAADB, 0xAADB, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x005E, 0xAAEE, 0xBB06, 0xBB0E } },
+  { "BL_ChpErase-519", 0, 45, { 0xAAEE, 0xBB06, 0xBB02, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x005E, 0xAAEE, 0xBB06, 0xBB0E, 0xAAE7, 0x000A, 0xAAEE, 0xBB06, 0xBB09, 0xAAE8, 0xBB02, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000F, 0x00DA, 0xAAEE, 0xBB06, 0xBB09, 0xAAE8, 0xBB02 } },
+  { "BL_EEPrep-x400", 0, 15, { 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000C, 0x00FF } },
+  { "BL_PMemErase-519", 0, 28, { 0xAAEE, 0xBB06, 0xBB09, 0xAAE8, 0xBB02, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000F, 0x00DA, 0xAAEE, 0xBB06, 0xBB09, 0xAAE8, 0xBB02 } },
+  { "BL_EEMemErase-519", 0, 23, { 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000C, 0x00FF, 0xAAEE, 0xBB06, 0xBB06, 0xAAEE, 0xBB06, 0xBB09, 0xAAE8, 0xBB02 } },
+  { "18F_DbgVctWr2.2ms", 0, 49, { 0xAADA, 0xBB20, 0xBB0E, 0xAADA, 0xBBF8, 0xBB6E, 0xAADA, 0xBB00, 0xBB0E, 0xAADA, 0xBBF7, 0xBB6E, 0xAADA, 0xBB28, 0xBB0E, 0xAADA, 0xBBF6, 0xBB6E, 0xAADA, 0xBBA6, 0xBB8E, 0xAADA, 0xBBA6, 0xBB9C, 0xAAEE, 0xBB04, 0xBB0D, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB04, 0xBB0F, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB03, 0xBB00, 0xAAF3, 0xBB04, 0xAAE7, 0x005E, 0xAAF3, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAE7, 0xBB06 } },
+  { "18F_DbgVctRd2.1", 0, 27, { 0xAADA, 0xBB20, 0xBB0E, 0xAADA, 0xBBF8, 0xBB6E, 0xAADA, 0xBB00, 0xBB0E, 0xAADA, 0xBBF7, 0xBB6E, 0xAADA, 0xBB28, 0xBB0E, 0xAADA, 0xBBF6, 0xBB6E, 0xAAEE, 0xBB04, 0xBB09, 0xAAF2, 0xBB00, 0xAAF0, 0xAAE9, 0xBB06, 0x0003 } },
+  { "MR_CfgRowErase.1", 0, 14, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB11, 0xAAE8, 0xBB01, 0xAAE7, 0x0019 } },
+  { "MR_RowErase32.2", 0, 21, { 0xAAEE, 0xBB06, 0xBB02, 0xAAF2, 0xBBFE, 0xAAF2, 0xBB7F, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x005E, 0xAAEE, 0xBB06, 0xBB17, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0x001F } },
+  { "MR_CfgRowErase.2", 0, 15, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x005E, 0xAAEE, 0xBB06, 0xBB17 } },
+  { "18F_RowErase32.5ms.1", 0, 47, { 0xAADA, 0xBBA6, 0xBB84, 0xAADA, 0xBBA6, 0xBB88, 0xAADA, 0xBB55, 0xBB0E, 0xAADA, 0xBBA7, 0xBB6E, 0xAADA, 0xBBAA, 0xBB0E, 0xAADA, 0xBBA7, 0xBB6E, 0xAADA, 0xBBA6, 0xBB82, 0xAADA, 0xBB00, 0xBB00, 0xAAE8, 0xBB01, 0xAADA, 0xBBA6, 0xBB94, 0xAADA, 0xBB40, 0xBB0E, 0xAADA, 0xBBF6, 0xBB26, 0xAADA, 0xBBD8, 0xBBB0, 0xAADA, 0xBBF7, 0xBB2A, 0xAADA, 0xBBD8, 0xBBB0, 0xAADA, 0xBBF8, 0xBB2A } },
+  { "18F_UsrIDRowErs.5ms", 0, 29, { 0xAADA, 0xBBA6, 0xBB84, 0xAADA, 0xBBA6, 0xBB88, 0xAADA, 0xBB55, 0xBB0E, 0xAADA, 0xBBA7, 0xBB6E, 0xAADA, 0xBBAA, 0xBB0E, 0xAADA, 0xBBA7, 0xBB6E, 0xAADA, 0xBBA6, 0xBB82, 0xAADA, 0xBB00, 0xBB00, 0xAAE8, 0xBB01, 0xAADA, 0xBBA6, 0xBB94 } },
+  { "18F_RowErase32.5ms.2", 0, 50, { 0xAADA, 0xBBA6, 0xBB84, 0xAADA, 0xBBA6, 0xBB88, 0xAADA, 0xBBA6, 0xBB82, 0xAAEE, 0xBB03, 0xBB00, 0xAAF3, 0xBB04, 0xAAE7, 0x002F, 0xAAF3, 0xBB00, 0xAAE7, 0x0005, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAADA, 0xBB40, 0xBB0E, 0xAADA, 0xBBF6, 0xBB26, 0xAADA, 0xBBD8, 0xBBB0, 0xAADA, 0xBBF7, 0xBB2A, 0xAADA, 0xBBD8, 0xBBB0, 0xAADA, 0xBBF8, 0xBB2A, 0xAAE7, 0xBB47, 0xAADA, 0xBB00, 0xBB00, 0xAADA, 0xBB00, 0xBB00 } },
+  { "30_RowErase32.1", 0, 61, { 0xAAD9, 0xBB1A, 0xBB07, 0xBB24, 0xAAD9, 0xBB0A, 0xBB3B, 0xBB88, 0xAAD9, 0xBB58, 0xBB05, 0xBB20, 0xAAD9, 0xBB38, 0xBB3B, 0xBB88, 0xAAD9, 0xBBA9, 0xBB0A, 0xBB20, 0xAAD9, 0xBB39, 0xBB3B, 0xBB88, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAE7, 0x005E, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA9, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB01, 0xBB04, 0xAAD8, 0xAAD9, 0xBB05, 0xBB03, 0xBB43, 0xAAD9, 0xBB42, 0xBB00, 0xBBAF, 0xAAD9, 0xBB64, 0xBB27, 0xBBEC, 0xAAD9, 0xBB16, 0xBB3B, 0xBB88 } },
+  { "30_UsrIDErase.1", 0, 61, { 0xAAD9, 0xBB06, 0xBB5C, 0xBB20, 0xAAD9, 0xBB16, 0xBB3B, 0xBB88, 0xAAD9, 0xBB06, 0xBB08, 0xBB20, 0xAAD9, 0xBB26, 0xBB3B, 0xBB88, 0xAAD9, 0xBB1A, 0xBB07, 0xBB24, 0xAAD9, 0xBB0A, 0xBB3B, 0xBB88, 0xAAD9, 0xBB58, 0xBB05, 0xBB20, 0xAAD9, 0xBB38, 0xBB3B, 0xBB88, 0xAAD9, 0xBBA9, 0xBB0A, 0xBB20, 0xAAD9, 0xBB39, 0xBB3B, 0xBB88, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAE7, 0x005E, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA9, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB01, 0xBB04, 0xAAD8 } },
+  { "30_EERowErase8.1", 0, 61, { 0xAAD9, 0xBB5A, 0xBB07, 0xBB24, 0xAAD9, 0xBB0A, 0xBB3B, 0xBB88, 0xAAD9, 0xBB58, 0xBB05, 0xBB20, 0xAAD9, 0xBB38, 0xBB3B, 0xBB88, 0xAAD9, 0xBBA9, 0xBB0A, 0xBB20, 0xAAD9, 0xBB39, 0xBB3B, 0xBB88, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAD8, 0xAAE7, 0x005E, 0xAAD9, 0xBB61, 0xBBE7, 0xBBA9, 0xAAD8, 0xAAD8, 0xAAD9, 0xBB00, 0xBB01, 0xBB04, 0xAAD8, 0xAAD9, 0xBB05, 0xBB03, 0xBB43, 0xAAD9, 0xBB42, 0xBB00, 0xBBAF, 0xAAD9, 0xBB64, 0xBB27, 0xBBEC, 0xAAD9, 0xBB16, 0xBB3B, 0xBB88 } },
+  { "MR_DbgVctWr2Ext.2", 0, 34, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB03, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB08, 0xAAE7, 0x002F, 0xAAEE, 0xBB06, 0xBB0E, 0xAAE7, 0x0005, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x0012, 0xBB01 } },
+  { "HVProgEntryVpp1st", 0, 22, { 0xAAFA, 0xAAF7, 0xAAFE, 0xAAFD, 0xAAF9, 0xAAF5, 0xAAF3, 0xBB00, 0xAAE8, 0x0014, 0xAAF6, 0xAAFB, 0xAAFC, 0xAAFF, 0xAAE7, 0x007F, 0xAAF7, 0xAAFA, 0xAAFB, 0xAAF6, 0xAAE8, 0x0013 } },
+  { "DoNothing", 0, 1, { 0xAAE3 } },
+  { "HCS_Write12", 0, 33, { 0xAAF5, 0xAAEA, 0x0064, 0xAAF3, 0xBB00, 0xAAE8, 0x000A, 0xAAF3, 0xBB04, 0xAAE7, 0x00BC, 0xAAF3, 0xBB0C, 0xAAE7, 0x00BC, 0xAAF3, 0xBB04, 0xAAE7, 0xBB03, 0xAAF3, 0xBB00, 0xAAE7, 0x00BC, 0xAAD0, 0xBB08, 0xAAD0, 0xBB08, 0xAAE8, 0x000A, 0xAAE9, 0xBB06, 0x000B, 0xAAF4 } },
+  { "HCS_Verify12", 0, 11, { 0xAAF5, 0xAAEA, 0x0064, 0xAAD6, 0xAAD6, 0xAAE9, 0xBB02, 0x000B, 0xAAF4, 0xAAF3, 0xBB03 } },
+  { "HCS_Write18", 0, 33, { 0xAAF5, 0xAAEA, 0x0064, 0xAAF3, 0xBB00, 0xAAE8, 0x000A, 0xAAF3, 0xBB04, 0xAAE7, 0x00BC, 0xAAF3, 0xBB0C, 0xAAE7, 0x00BC, 0xAAF3, 0xBB04, 0xAAE7, 0xBB03, 0xAAF3, 0xBB00, 0xAAE7, 0x00BC, 0xAAD0, 0xBB08, 0xAAD0, 0xBB08, 0xAAE8, 0x000A, 0xAAE9, 0xBB06, 0x0011, 0xAAF4 } },
+  { "HCS_Verify18", 0, 11, { 0xAAF5, 0xAAEA, 0x0064, 0xAAD6, 0xAAD6, 0xAAE9, 0xBB02, 0x0011, 0xAAF4, 0xAAF3, 0xBB03 } },
+  { "HCS_Write360-361", 0, 34, { 0xAAEA, 0x0064, 0xAAD0, 0xBB07, 0xAAD0, 0xBB08, 0xAAD0, 0xBB08, 0xAAD0, 0xBB08, 0xAAF3, 0xBB06, 0xAAE8, 0x000A, 0xAAF3, 0xBB00, 0xAAD0, 0xBB08, 0xAAD0, 0xBB08, 0xAAD0, 0xBB08, 0xAAD0, 0xBB08, 0xAAF3, 0xBB06, 0xAAE8, 0xBB10, 0xAAF3, 0xBB00, 0xAAE9, 0x000E, 0x000A, 0xAAF4 } },
+  { "HCS_VPPSetup", 0, 25, { 0xAADB, 0xAADB, 0xAADB, 0xAAF5, 0xAAFA, 0xAAF7, 0xAAF9, 0xAAF3, 0xBB00, 0xAAE8, 0x0014, 0xAAEA, 0x0064, 0xAAF3, 0xBB00, 0xAAE8, 0x000A, 0xAAF3, 0xBB04, 0xAAE7, 0x00B2, 0xAAF3, 0xBB0C, 0xAAE8, 0xBB01 } },
+  { "HCS_Verify360-361", 0, 14, { 0xAAF5, 0xAAEA, 0x0064, 0xAAD6, 0xAAD6, 0xAAE9, 0xBB02, 0x000B, 0xAAF3, 0xBB03, 0xAAFA, 0xAAF7, 0xAAF8, 0xAAF4 } },
+  { "EE24_ProgEntry", 0, 7, { 0xAAF5, 0xAAF3, 0xBB06, 0xAACF, 0xBB01, 0xAAE8, 0xBB02 } },
+  { "EE24_ProgExit", 0, 7, { 0xAAF4, 0xAAF3, 0xBB03, 0xAACF, 0xBB01, 0xAAE8, 0xBB02 } },
+  { "EE24_RdPrep1Adr", 0, 4, { 0xAACD, 0xAACA, 0xAADB, 0xAACA } },
+  { "EE24_Rd64", 0, 16, { 0xAACD, 0xAACA, 0xAADB, 0xAADB, 0xAAC9, 0xAAC9, 0xAAC9, 0xAAC9, 0xAAE9, 0xBB04, 0x000E, 0xAAC9, 0xAAC9, 0xAAC9, 0xAAC8, 0xAACC } },
+  { "EE24_Wr8Adr1.5ms", 0, 15, { 0xAACD, 0xAACA, 0xAADB, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACC, 0xAAE7, 0x00EB } },
+  { "EE24_RdPrep2Adr", 0, 4, { 0xAACD, 0xAACA, 0xAACA, 0xAACA } },
+  { "EE24_Wr32Adr2.5ms", 0, 18, { 0xAACD, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAAE9, 0xBB08, 0xBB03, 0xAACC, 0xAAE7, 0x00EB } },
+  { "EE24_Wr1Adr1.5ms", 0, 8, { 0xAACD, 0xAACA, 0xAADB, 0xAACA, 0xAACA, 0xAACC, 0xAAE7, 0x00EB } },
+  { "EE24_Rd16", 0, 16, { 0xAACD, 0xAACA, 0xAADB, 0xAADB, 0xAAC9, 0xAAC9, 0xAAC9, 0xAAC9, 0xAAE9, 0xBB04, 0x0002, 0xAAC9, 0xAAC9, 0xAAC9, 0xAAC8, 0xAACC } },
+  { "EE24_Wr16Adr1.5ms", 0, 18, { 0xAACD, 0xAACA, 0xAADB, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAAE9, 0xBB08, 0xBB01, 0xAACC, 0xAAE7, 0x00EB } },
+  { "EE25_ProgEntry", 0, 32, { 0xAAFA, 0xAAF7, 0xAAF9, 0xAAF5, 0xAAF3, 0xBB02, 0xAACF, 0xBB00, 0xAAE8, 0x0014, 0xAAF6, 0xAAFB, 0xAAE8, 0x000A, 0xAAFA, 0xAAF7, 0xAAC7, 0xBB06, 0xAAFC, 0xAAFB, 0xAAE7, 0xBB01, 0xAAFA, 0xAAF7, 0xAAC7, 0xBB01, 0xAAC7, 0xBB00, 0xAAF6, 0xAAFB, 0xAAE7, 0x00EB } },
+  { "EE25_ProgExit", 4, 10, { 0xAAFA, 0xAAF7, 0xAAF8, 0xAAF3, 0xBB03, 0xAACF, 0xBB01, 0xAAE8, 0x000A, 0xAAF4 } },
+  { "EE25_Rd64Adr1", 0, 18, { 0xAAFA, 0xAAF7, 0xAAC6, 0xAADB, 0xAAC6, 0xAAC5, 0xAAC5, 0xAAC5, 0xAAC5, 0xAAC5, 0xAAC5, 0xAAC5, 0xAAC5, 0xAAE9, 0xBB08, 0xBB07, 0xAAF6, 0xAAFB } },
+  { "EE25_Wr16Adr1.5ms", 0, 24, { 0xAAFA, 0xAAF7, 0xAAC7, 0xBB06, 0xAAF6, 0xAAFB, 0xAAE7, 0xBB01, 0xAAFA, 0xAAF7, 0xAAC6, 0xAADB, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAE9, 0xBB04, 0xBB03, 0xAAF6, 0xAAFB, 0xAAE7, 0x00EB } },
+  { "EE25_Wr16Adr2.5ms", 0, 24, { 0xAAFA, 0xAAF7, 0xAAC7, 0xBB06, 0xAAF6, 0xAAFB, 0xAAE7, 0xBB01, 0xAAFA, 0xAAF7, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAE9, 0xBB04, 0xBB03, 0xAAF6, 0xAAFB, 0xAAE7, 0x00EB } },
+  { "EE25_Rd64Adr2", 0, 18, { 0xAAFA, 0xAAF7, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC5, 0xAAC5, 0xAAC5, 0xAAC5, 0xAAC5, 0xAAC5, 0xAAC5, 0xAAC5, 0xAAE9, 0xBB08, 0xBB07, 0xAAF6, 0xAAFB } },
+  { "EE93_ProgEntry", 0, 10, { 0xAAFA, 0xAAF7, 0xAAF9, 0xAAF5, 0xAAF3, 0xBB02, 0xAACF, 0xBB00, 0xAAE8, 0x0014 } },
+  { "EE93_Rd8Adr2.8", 0, 11, { 0xAAF6, 0xAAFB, 0xAADB, 0xAAC6, 0xAAC6, 0xAAC5, 0xAAE9, 0xBB01, 0x0007, 0xAAFA, 0xAAF7 } },
+  { "EE93_PrgMemWrPrep", 0, 8, { 0xAAF6, 0xAAFB, 0xAAC7, 0xBB26, 0xAAC7, 0xBB00, 0xAAFA, 0xAAF7 } },
+  { "EE93_PrgMemWr1A2.8", 0, 12, { 0xAAF6, 0xAAFB, 0xAADB, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAFA, 0xAAF7, 0xAAE8, 0xBB01, 0xAAE7, 0x001A } },
+  { "EE93_ChpErase", 0, 20, { 0xAAF6, 0xAAFB, 0xAAC7, 0xBB26, 0xAAC7, 0xBB00, 0xAAFA, 0xAAF7, 0xAAE7, 0xBB05, 0xAAF6, 0xAAFB, 0xAAC7, 0xBB24, 0xAAC7, 0xBB00, 0xAAFA, 0xAAF7, 0xAAE8, 0xBB02 } },
+  { "EE93_Rd1Adr2.16", 0, 9, { 0xAAF6, 0xAAFB, 0xAADB, 0xAAC6, 0xAAC6, 0xAAC5, 0xAAC5, 0xAAFA, 0xAAF7 } },
+  { "EE93_PrgMemWr1A2.16", 0, 13, { 0xAAF6, 0xAAFB, 0xAADB, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAFA, 0xAAF7, 0xAAE8, 0xBB01, 0xAAE7, 0x0031 } },
+  { "EE24_Wr64Adr2.5ms", 0, 18, { 0xAACD, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAAE9, 0xBB08, 0xBB07, 0xAACC, 0xAAE7, 0x00EB } },
+  { "EE24_Wr128Adr2.5ms", 0, 18, { 0xAACD, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAACA, 0xAAE9, 0xBB08, 0x000F, 0xAACC, 0xAAE7, 0x00EB } },
+  { "EE25_Wr32Adr2.5ms", 0, 24, { 0xAAFA, 0xAAF7, 0xAAC7, 0xBB06, 0xAAF6, 0xAAFB, 0xAAE7, 0xBB01, 0xAAFA, 0xAAF7, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAE9, 0xBB04, 0xBB07, 0xAAF6, 0xAAFB, 0xAAE7, 0x00EB } },
+  { "EE25_Wr64Adr2.5ms", 0, 24, { 0xAAFA, 0xAAF7, 0xAAC7, 0xBB06, 0xAAF6, 0xAAFB, 0xAAE7, 0xBB01, 0xAAFA, 0xAAF7, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAE9, 0xBB04, 0x000F, 0xAAF6, 0xAAFB, 0xAAE7, 0x00EB } },
+  { "EE25_Wr128Adr3.5ms", 0, 26, { 0xAAFA, 0xAAF7, 0xAAC7, 0xBB06, 0xAAF6, 0xAAFB, 0xAAE7, 0xBB01, 0xAAFA, 0xAAF7, 0xAAC7, 0xBB02, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAE9, 0xBB04, 0x001F, 0xAAF6, 0xAAFB, 0xAAE7, 0x00EB } },
+  { "EE25_Rd64Adr3", 0, 20, { 0xAAFA, 0xAAF7, 0xAAC7, 0xBB03, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC5, 0xAAC5, 0xAAC5, 0xAAC5, 0xAAC5, 0xAAC5, 0xAAC5, 0xAAC5, 0xAAE9, 0xBB08, 0x0007, 0xAAF6, 0xAAFB } },
+  { "MR_DbgVctWr2Int.3", 0, 29, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB03, 0xAAEE, 0xBB06, 0x0002, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB18, 0xAAE7, 0x00BC, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x000D, 0xBB01 } },
+  { "MR_DbgVctWr2Ext.4", 0, 34, { 0xAAEE, 0xBB06, 0xBB00, 0xAAF2, 0xBB00, 0xAAF2, 0xBB00, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0xBB03, 0xBB03, 0xAAEE, 0xBB06, 0xBB02, 0xAAF1, 0xAAF1, 0xAAEE, 0xBB06, 0xBB18, 0xAAE7, 0x0076, 0xAAEE, 0xBB06, 0xBB0E, 0xAAE7, 0x0005, 0xAAEE, 0xBB06, 0xBB06, 0xAAE9, 0x0012, 0xBB01 } },
+  { "DBG_Halt.BL", 1, 8, { 0xAAF3, 0xBB06, 0xAAE7, 0x002F, 0xAAF3, 0xBB02, 0xAAE7, 0x0005 } },
+  { "DBG_Run.BL", 0, 10, { 0xAAF5, 0xAAC1, 0xBB19, 0xAAC2, 0xAAF4, 0xAAE6, 0xBB00, 0xBB04, 0xAAE3, 0xAAC2 } },
+  { "DBG_RdDEVer.BL", 0, 11, { 0xAAF5, 0xAAC1, 0xBB02, 0xAAC2, 0xAAE6, 0xBB00, 0xBB05, 0xAAC2, 0xAAC2, 0xAAC2, 0xAAF4 } },
+  { "DBG_SStep.BL", 0, 10, { 0xAAF5, 0xAAC1, 0xBB1A, 0xAAC2, 0xAAF4, 0xAAE6, 0xBB00, 0xBB04, 0xAAE3, 0xAAC2 } },
+  { "DBG_BulkWrData.BL", 0, 18, { 0xAAF5, 0xAAC1, 0xBB04, 0xAAC2, 0xAAE6, 0xBB00, 0x000C, 0xAAC0, 0xAAC0, 0xAAC0, 0xAAC0, 0xAAC0, 0xAADD, 0xBB01, 0xAAF4, 0xAAE3, 0xAAC2, 0xAAF4 } },
+  { "DBG_BulkRdData.BL", 0, 18, { 0xAAF5, 0xAAC1, 0xBB03, 0xAAC2, 0xAAE6, 0xBB00, 0x000C, 0xAAC0, 0xAAC0, 0xAAC0, 0xAAC0, 0xAAC2, 0xAADD, 0xBB01, 0xAAF4, 0xAAE3, 0xAAC2, 0xAAF4 } },
+  { "EE25_Wr128Adr2.5ms", 0, 24, { 0xAAFA, 0xAAF7, 0xAAC7, 0xBB06, 0xAAF6, 0xAAFB, 0xAAE7, 0xBB01, 0xAAFA, 0xAAF7, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAC6, 0xAAE9, 0xBB04, 0x001F, 0xAAF6, 0xAAFB, 0xAAE7, 0x00EB } },
+  { "HVProgEntryVppClose", 0, 22, { 0xAAFA, 0xAAF7, 0xAAFE, 0xAAFD, 0xAAF9, 0xAAF5, 0xAAF3, 0xBB00, 0xAAE8, 0x003C, 0xAAFC, 0xAAFF, 0xAAF6, 0xAAFB, 0xAAE7, 0x007F, 0xAAF7, 0xAAFA, 0xAAFB, 0xAAF6, 0xAAE8, 0x0013 } },
+  { 0, 0, 0, {} }
+};
+} // namespace
diff --git a/src/progs/pickit2v2/base/pickit2v2_data.h b/src/progs/pickit2v2/base/pickit2v2_data.h
new file mode 100644
index 0000000..272fe92
--- /dev/null
+++ b/src/progs/pickit2v2/base/pickit2v2_data.h
@@ -0,0 +1,103 @@
+/***************************************************************************
+ * Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICKIT2V2_DATA_H
+#define PICKIT2V2_DATA_H
+
+#include <qstring.h>
+
+namespace Pickit2V2
+{
+
+enum ScriptType {
+  ProgEntry = 0x00, ProgExit = 0x01, DeviceIdRead = 0x02, ProgMemoryRead = 0x03,
+  EraseChipPrepare = 0x04, ProgMemoryAddressSet = 0x05, ProgMemoryWritePrepare = 0x06,
+  ProgMemoryWrite = 0x07, EepromReadPrepare = 0x08, EepromRead = 0x09, EepromWritePrepare = 0x0A,
+  EepromWrite = 0x0B, ConfigReadPrepare = 0x0C, ConfigRead = 0x0D, ConfigWritePrepare = 0x0E,
+  ConfigWrite = 0x0F, UserIdReadPrepare = 0x10, UserIdRead = 0x11, UserIdWritePrepare = 0x12,
+  UserIdWrite = 0x13, OsccalRead = 0x14, OsccalWrite = 0x15, ChipErase = 0x16,
+  ProgMemoryErase = 0x17, EepromErase = 0x18, ConfigErase = 0x19,
+  RowErase = 0x1A, TestMemoryRead = 0x1B, EEpromRowErase = 0x1C,
+  Nb_ScriptTypes = 0x1D
+};
+
+inline ScriptType prepareReadScript(Pic::MemoryRangeType type)
+{
+  switch (type.type()) {
+    case Pic::MemoryRangeType::Code: return ProgMemoryAddressSet;
+    case Pic::MemoryRangeType::Eeprom: return EepromReadPrepare;
+    case Pic::MemoryRangeType::Config: return ConfigReadPrepare;
+    case Pic::MemoryRangeType::UserId: return UserIdReadPrepare;
+    default: break;
+  }
+  return Nb_ScriptTypes;
+}
+
+inline ScriptType readScript(Pic::MemoryRangeType type)
+{
+  switch (type.type()) {
+    case Pic::MemoryRangeType::Code: return ProgMemoryRead;
+    case Pic::MemoryRangeType::Eeprom: return EepromRead;
+    case Pic::MemoryRangeType::Config: return ConfigRead;
+    case Pic::MemoryRangeType::UserId: return UserIdRead;
+    case Pic::MemoryRangeType::Cal: return OsccalRead;
+    default: break;
+  }
+  return Nb_ScriptTypes;
+}
+
+inline ScriptType prepareWriteScript(Pic::MemoryRangeType type)
+{
+  switch (type.type()) {
+    case Pic::MemoryRangeType::Code: return ProgMemoryWritePrepare;
+    case Pic::MemoryRangeType::Eeprom: return EepromWritePrepare;
+    case Pic::MemoryRangeType::Config: return ConfigWritePrepare;
+    case Pic::MemoryRangeType::UserId: return UserIdWritePrepare;
+    default: break;
+  }
+  return Nb_ScriptTypes;
+}
+
+inline ScriptType writeScript(Pic::MemoryRangeType type)
+{
+  switch (type.type()) {
+    case Pic::MemoryRangeType::Code: return ProgMemoryWrite;
+    case Pic::MemoryRangeType::Eeprom: return EepromWrite;
+    case Pic::MemoryRangeType::Config: return ConfigWrite;
+    case Pic::MemoryRangeType::UserId: return UserIdWrite;
+    case Pic::MemoryRangeType::Cal: return OsccalWrite;
+    default: break;
+  }
+  return Nb_ScriptTypes;
+}
+
+struct Data {
+  uchar codeMemoryNbReadWords, eepromMemoryNbReadWords;
+  uchar codeMemoryNbWriteWords, eepromMemoryNbWriteWords;
+  uchar scriptIndexes[Nb_ScriptTypes];
+};
+extern const Data &data(const QString &device);
+
+struct FamilyData {
+  Pic::Architecture architecture;
+  double vpp;
+  ushort progEntryScript, progExitScript, readDevIdScript;
+  bool progMemShift;
+};
+extern const FamilyData FAMILY_DATA[];
+
+struct ScriptData {
+  const char *name;
+  ushort version, length;
+  const ushort data[64];
+};
+extern const ScriptData SCRIPT_DATA[];
+
+} // namespace
+
+#endif
diff --git a/src/progs/pickit2v2/base/pickit2v2_prog.cpp b/src/progs/pickit2v2/base/pickit2v2_prog.cpp
new file mode 100644
index 0000000..3a44bca
--- /dev/null
+++ b/src/progs/pickit2v2/base/pickit2v2_prog.cpp
@@ -0,0 +1,117 @@
+/***************************************************************************
+ * Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pickit2v2_prog.h"
+
+#include "devices/list/device_list.h"
+#include "progs/base/prog_config.h"
+#include "pickit2v2.h"
+
+//----------------------------------------------------------------------------
+Pickit2V2::Base::Base(const Programmer::Group &group, const Pic::Data *data)
+  : Pickit2::Base(group, data)
+{}
+
+VersionData Pickit2V2::Base::firmwareVersion(Programmer::FirmwareVersionType type) const
+{
+  switch (type.type()) {
+    case Programmer::FirmwareVersionType::Min: return VersionData(2, 10, 0);
+    case Programmer::FirmwareVersionType::Recommended: return VersionData(2, 10, 0);
+    case Programmer::FirmwareVersionType::Max: return VersionData(2, 10, 0);
+    case Programmer::FirmwareVersionType::Nb_Types: break;
+  }
+  Q_ASSERT(false);
+  return VersionData();
+}
+
+Pickit2V2::Hardware &Pickit2V2::Base::hardware()
+{
+  return static_cast<Hardware &>(*_hardware);
+}
+
+bool Pickit2V2::Base::identifyDevice()
+{
+  double vdd = 3.3; // set 3.3V to check for fragile devices
+  if ( !_targetSelfPowered ) {
+    if ( !hardware().setVddVoltage(vdd, 0.85)) return false;
+  }
+  QString message = i18n("Unknown device");
+  for (uint i=0; FAMILY_DATA[i].architecture!=Pic::Architecture::Nb_Types; i++) {
+    const FamilyData &fdata = FAMILY_DATA[i];
+    if ( fdata.readDevIdScript==0 ) {
+      if ( device()->architecture()==fdata.architecture ) return true; // not autodetectable
+      continue;
+    }
+    hardware().setVddOn(false);
+    if ( fdata.vpp==0.0 ) hardware().setVppVoltage(vdd, 0.7);
+    else hardware().setVppVoltage(fdata.vpp, 0.7);
+    hardware().setVddOn(true);
+    if ( !hardware().executeScript(fdata.progEntryScript) ) return false;
+    if ( !hardware().executeScript(fdata.readDevIdScript) ) return false;
+    if ( !hardware().port().command(UploadData) ) return false;
+    Array data;
+    if ( !hardware().port().receive(data) ) return false;
+    if ( !hardware().executeScript(fdata.progExitScript) ) return false;
+    uint rawId = (data[2]<<8) + data[1];
+    if (fdata.progMemShift) rawId >>= 1;
+    log(Log::DebugLevel::Normal, QString("Read id for family %1: %2").arg(fdata.architecture.key()).arg(toHexLabelAbs(rawId)));
+    QMap<QString, Device::IdData> ids;
+    ::Group::Base::ConstIterator it;
+    for (it=group().begin(); it!=group().end(); ++it) {
+      const Pic::Data *data = static_cast<const Pic::Data *>(it.data().data);
+      if ( data->architecture()!=fdata.architecture ) continue;
+      Device::IdData idata;
+      if ( data->matchId(rawId, idata) ) ids[it.key()] = idata;
+    }
+    if ( ids.count()!=0 ) {
+      log(Log::LineType::Information, i18n("Read id: %1").arg(device()->idNames(ids).join("; ")));
+      if ( ids.contains(device()->name()) ) return true;
+      message = i18n("Read id does not match the specified device name \"%1\".").arg(device()->name());
+      break;
+    }
+  }
+  if ( !askContinue(message) ) {
+    logUserAbort();
+    return false;
+  }
+  log(Log::LineType::Information, i18n("Continue with the specified device name: \"%1\"...").arg(device()->name()));
+  return true;
+}
+
+bool Pickit2V2::Base::setTarget()
+{
+  if ( !identifyDevice() ) return false;
+  return hardware().setTarget();
+}
+
+bool Pickit2V2::Base::selfTest(bool ask)
+{
+  ushort status;
+  if ( !hardware().readStatus(status) ) return false;
+  QString error;
+  if ( status & VppError ) error += i18n("Vpp voltage level error; ");
+  if ( status & VddError ) error += i18n("Vdd voltage level error; ");
+  if ( error.isEmpty() ) return true;
+  log(Log::LineType::Warning, i18n("Self-test failed: %1").arg(error));
+  if ( ask && !askContinue(i18n("Self-test failed (%1). Do you want to continue anyway?").arg(error)) ) {
+      logUserAbort();
+      return false;
+    }
+  return true;
+}
+
+//----------------------------------------------------------------------------
+Programmer::Hardware *Pickit2V2::Group::createHardware(Programmer::Base &base, const Programmer::HardwareDescription &) const
+{
+  return new Hardware(base);
+}
+
+Programmer::DeviceSpecific *Pickit2V2::Group::createDeviceSpecific(Programmer::Base &base) const
+{
+  return new DeviceSpecific(base);
+}
diff --git a/src/progs/pickit2v2/base/pickit2v2_prog.h b/src/progs/pickit2v2/base/pickit2v2_prog.h
new file mode 100644
index 0000000..3653649
--- /dev/null
+++ b/src/progs/pickit2v2/base/pickit2v2_prog.h
@@ -0,0 +1,54 @@
+/***************************************************************************
+ * Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICKIT2V2_PROG_H
+#define PICKIT2V2_PROG_H
+
+#include "progs/pickit2/base/pickit2_prog.h"
+
+namespace Pickit2V2
+{
+class Hardware;
+
+//----------------------------------------------------------------------------
+class Base : public Pickit2::Base
+{
+Q_OBJECT
+public:
+  Base(const Programmer::Group &group, const Pic::Data *data);
+  virtual bool setTarget();
+
+private:
+  Hardware &hardware();
+  virtual VersionData firmwareVersion(Programmer::FirmwareVersionType type) const;
+  virtual bool verifyDeviceId() { return true; } // it is done by "setTarget"
+  virtual bool selfTest(bool ask);
+  bool identifyDevice();
+};
+
+//----------------------------------------------------------------------------
+class Group : public Programmer::PicGroup
+{
+public:
+  virtual QString name() const { return "pickit2v2"; }
+  virtual QString label() const { return i18n("PICkit2 Firmware 2.x"); }
+  virtual Programmer::Properties properties() const { return ::Programmer::Programmer | ::Programmer::HasFirmware | ::Programmer::CanUploadFirmware | ::Programmer::CanReadMemory | ::Programmer::HasConnectedState; }
+  virtual bool canReadVoltage(Pic::VoltageType type) const { return ( type==Pic::TargetVdd || type==Pic::TargetVpp ); }
+  virtual ::Programmer::TargetPowerMode targetPowerMode() const { return ::Programmer::TargetPowerModeFromConfig; }
+  virtual bool isPortSupported(PortType type) const { return ( type==PortType::USB ); }
+
+protected:
+  virtual void initSupported();
+  virtual Programmer::Base *createBase(const Device::Data *data) const { return new ::Pickit2V2::Base(*this, static_cast<const Pic::Data *>(data)); }
+  virtual Programmer::Hardware *createHardware(Programmer::Base &base, const Programmer::HardwareDescription &hd) const;
+  virtual Programmer::DeviceSpecific *createDeviceSpecific(Programmer::Base &base) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/pickit2v2/gui/Makefile.am b/src/progs/pickit2v2/gui/Makefile.am
new file mode 100644
index 0000000..dae6832
--- /dev/null
+++ b/src/progs/pickit2v2/gui/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libpickit2v2ui.la
+libpickit2v2ui_la_SOURCES = pickit2v2_group_ui.cpp
+libpickit2v2ui_la_LDFLAGS = $(all_libraries)
\ No newline at end of file
diff --git a/src/progs/pickit2v2/gui/pickit2v2_group_ui.cpp b/src/progs/pickit2v2/gui/pickit2v2_group_ui.cpp
new file mode 100644
index 0000000..b3596fd
--- /dev/null
+++ b/src/progs/pickit2v2/gui/pickit2v2_group_ui.cpp
@@ -0,0 +1,22 @@
+/***************************************************************************
+ * Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pickit2v2_group_ui.h"
+
+#include "progs/gui/prog_config_widget.h"
+#include "progs/pickit2v2/base/pickit2v2_prog.h"
+
+::Programmer::ConfigWidget *Pickit2V2::GroupUI::createConfigWidget(QWidget *parent) const
+{
+  return new ::Programmer::ConfigWidget(static_cast<const ::Programmer::Group &>(group()), parent);
+}
+
+::Programmer::AdvancedDialog *Pickit2V2::GroupUI::createAdvancedDialog(::Programmer::Base &base, QWidget *parent) const
+{
+  return new ::Programmer::AdvancedDialog(static_cast<Base &>(base), parent, "pickit2v2_advanced_dialog");
+}
diff --git a/src/progs/pickit2v2/gui/pickit2v2_group_ui.h b/src/progs/pickit2v2/gui/pickit2v2_group_ui.h
new file mode 100644
index 0000000..6c5ff64
--- /dev/null
+++ b/src/progs/pickit2v2/gui/pickit2v2_group_ui.h
@@ -0,0 +1,25 @@
+/***************************************************************************
+ * Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                    *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICKIT2V2_GROUP_UI_H
+#define PICKIT2V2_GROUP_UI_H
+
+#include "devices/pic/gui/pic_prog_group_ui.h"
+
+namespace Pickit2V2
+{
+class GroupUI : public ::Programmer::GroupUI
+{
+public:
+  virtual ::Programmer::ConfigWidget *createConfigWidget(QWidget *parent) const;
+  virtual bool hasAdvancedDialog() const { return true; }
+  virtual ::Programmer::AdvancedDialog *createAdvancedDialog(::Programmer::Base &base, QWidget *parent) const;
+};
+} // namespace
+
+#endif
diff --git a/src/progs/pickit2v2/pickit2v2.pro b/src/progs/pickit2v2/pickit2v2.pro
new file mode 100644
index 0000000..fe430fe
--- /dev/null
+++ b/src/progs/pickit2v2/pickit2v2.pro
@@ -0,0 +1,2 @@
+TEMPLATE = subdirs
+SUBDIRS = base
diff --git a/src/progs/progs.pro b/src/progs/progs.pro
new file mode 100644
index 0000000..3b9a442
--- /dev/null
+++ b/src/progs/progs.pro
@@ -0,0 +1,3 @@
+TEMPLATE = subdirs
+SUBDIRS = base list direct icd2 icd1 pickit2 pickit1 psp gpsim pickit2v2 \
+          bootloader tbl_bootloader pickit2_bootloader picdem_bootloader manager
diff --git a/src/progs/psp/Makefile.am b/src/progs/psp/Makefile.am
new file mode 100644
index 0000000..fccf96d
--- /dev/null
+++ b/src/progs/psp/Makefile.am
@@ -0,0 +1,3 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+SUBDIRS = xml base gui
diff --git a/src/progs/psp/base/Makefile.am b/src/progs/psp/base/Makefile.am
new file mode 100644
index 0000000..93ce348
--- /dev/null
+++ b/src/progs/psp/base/Makefile.am
@@ -0,0 +1,11 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libpsp.la
+libpsp_la_SOURCES = psp_prog.cpp psp_serial.cpp psp_data.cpp psp.cpp
+libpsp_la_DEPENDENCIES = psp_data.cpp
+
+noinst_DATA = psp.xml
+psp_data.cpp: ../xml/xml_psp_parser psp.xml
+	../xml/xml_psp_parser
+CLEANFILES = psp_data.cpp
diff --git a/src/progs/psp/base/base.pro b/src/progs/psp/base/base.pro
new file mode 100644
index 0000000..4dca18d
--- /dev/null
+++ b/src/progs/psp/base/base.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = psp
+HEADERS += psp.h psp_prog.h psp_data.h psp_serial.h
+SOURCES += psp.cpp psp_prog.cpp psp_data.cpp psp_serial.cpp
diff --git a/src/progs/psp/base/psp.cpp b/src/progs/psp/base/psp.cpp
new file mode 100644
index 0000000..1b76bf5
--- /dev/null
+++ b/src/progs/psp/base/psp.cpp
@@ -0,0 +1,346 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2002-2003 Stephen Landamore <stephen@landamore.com>     *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "psp.h"
+
+#include "common/global/global.h"
+#include "common/common/misc.h"
+
+//-----------------------------------------------------------------------------
+QMemArray<uchar> Psp::createConfigInfo(const Pic::Data &data)
+{
+  QMemArray<uchar> array(33);
+  array.fill(0x00);
+
+  const Pic::Config &config = data.config();
+  for (uint i=0; i<uint(config._words.count()); i++) {
+    BitValue v = config._words[i].usedMask();
+    if ( data.nbBytesWord(Pic::MemoryRangeType::UserId)==1 ) array[i ^ 1] = v.byte(0);
+    else {
+      array[2*i] = v.byte(1);
+      array[2*i + 1] = v.byte(0);
+    }
+  }
+  for (uint i=0; i<16; i++) array[i + 16] = array[i];
+
+  // checksum
+  for (uint i=0; i<32; i++) array[32] += array[i];
+
+  return array;
+}
+
+QMemArray<uchar> Psp::createDeviceInfo(const Pic::Data &data)
+{
+  QMemArray<uchar> config = createConfigInfo(data);
+  QMemArray<uchar> array(45);
+  array.fill(0x00);
+
+  // memory code length
+  BitValue v = data.nbWords(Pic::MemoryRangeType::Code);
+  array[0] = v.byte(1);
+  array[1] = v.byte(0);
+  // address word width
+  v = data.mask(Pic::MemoryRangeType::Code);
+  array[2] = v.byte(1);
+  array[3] = v.byte(0);
+  // data word width
+  array[4] = v.byte(1);
+  array[5] = v.byte(0);
+
+  if ( data.isReadable(Pic::MemoryRangeType::UserId) ) {
+    // user id width
+    v = data.userIdRecommendedMask();
+    if ( data.nbBytesWord(Pic::MemoryRangeType::UserId)==1 ) v += v << 8;
+    array[6] = v.byte(1);
+    array[7] = v.byte(0);
+    // user id mask
+    array[8] = v.byte(1);
+    array[9] = v.byte(0);
+  }
+
+  // memory config mask
+  array[10] = config[0];
+  array[11] = config[1];
+  array[12] = config[16];
+  array[13] = config[17];
+
+  if ( data.isReadable(Pic::MemoryRangeType::Eeprom) ) {
+    // memory eeprom width
+    v = data.mask(Pic::MemoryRangeType::Eeprom);
+    array[14] = v.byte(1);
+    array[15] = v.byte(0);
+    // memory eeprom mask
+    array[16] = v.byte(1);
+    array[17] = v.byte(0);
+  }
+
+  if ( data.isReadable(Pic::MemoryRangeType::Cal) ) {
+    // memory calibration width
+    v = data.mask(Pic::MemoryRangeType::Cal);
+    array[18] = v.byte(1);
+    array[19] = v.byte(0);
+    // memory calibration mask
+    array[20] = v.byte(1);
+    array[21] = v.byte(0);
+  }
+
+  // memory code start
+  array[22] = 0x00;
+  array[23] = 0x00;
+  // memory code length
+  array[24] = 0x00; // array[0]; in lplab and for some devices in picp...
+  array[25] = 0x01; // array[1]; in lplab and for some devices in picp...
+
+  if ( data.isReadable(Pic::MemoryRangeType::UserId) ) {
+    // user id start
+    v = data.range(Pic::MemoryRangeType::UserId).start.toUInt();
+    array[26] = v.byte(1);
+    array[27] = v.byte(0);
+    // user id length
+    v = data.nbWords(Pic::MemoryRangeType::UserId);
+    if ( data.nbBytesWord(Pic::MemoryRangeType::UserId)==1 ) v >>= 1;
+    array[28] = v.byte(0);
+  }
+
+  if ( data.isReadable(Pic::MemoryRangeType::Config) ) {
+    // config start
+    v = data.range(Pic::MemoryRangeType::Config).start.toUInt();
+    array[29] = v.byte(1);
+    array[30] = v.byte(0);
+    // config length
+    v = data.nbWords(Pic::MemoryRangeType::Config);
+    if ( data.nbBytesWord(Pic::MemoryRangeType::Config)==1 ) v >>= 1;
+    array[31] = v.byte(0);
+  }
+
+  if ( data.isReadable(Pic::MemoryRangeType::Config) ) {
+    // eeprom start
+    array[32] = 0x00;
+    array[33] = 0x00;
+    // eeprom length
+    v = data.nbWords(Pic::MemoryRangeType::Eeprom);
+    array[34] = v.byte(1);
+    array[35] = v.byte(0);
+  }
+
+  if ( data.isReadable(Pic::MemoryRangeType::Cal) ) {
+    // calibration start
+    v = data.range(Pic::MemoryRangeType::Cal).start.toUInt();
+    array[36] = v.byte(1);
+    array[37] = v.byte(0);
+    // calibration length
+    v = data.nbWords(Pic::MemoryRangeType::Cal);
+    array[38] = v.byte(1);
+    array[39] = v.byte(0);
+  }
+
+  // programming
+  const Psp::Data &pdata = Psp::data(data.name());
+  array[40] = pdata.overprogram;
+  array[41] = pdata.tries;
+  array[42] = pdata.algorithm;
+  if ( data.memoryTechnology()==Device::MemoryTechnology::Flash ) array[43] |= 0x01;
+  if ( data.isReadable(Pic::MemoryRangeType::UserId) ) array[43] |= 0x02;
+  if ( data.isReadable(Pic::MemoryRangeType::Config) ) array[43] |= 0x04;
+  if ( data.isReadable(Pic::MemoryRangeType::Eeprom) ) array[43] |= 0x08;
+  if ( data.isReadable(Pic::MemoryRangeType::Cal) )    array[43] |= 0x10;
+  if ( data.config().findMask("PARITY") )  array[43] |= 0x20;
+
+  // checksum
+  for (uint i=0; i<44; i++) array[44] += array[i];
+
+  return array;
+}
+
+//-----------------------------------------------------------------------------
+Psp::Hardware::Hardware(::Programmer::Base &base, const QString &portDevice)
+  : Programmer::PicHardware(base, new SerialPort(portDevice, base), QString::null)
+{}
+
+bool Psp::Hardware::internalConnectHardware()
+{
+  if ( !port()->open() ) return false;
+  if ( !port()->reset() ) return false;
+  // #### TODO: detect Warp13 or JuPic
+  QMemArray<uchar> a;
+  if ( !port()->command(0x88, 1, a) ) return false;
+  if ( a[0]!=0xAB ) {
+    log(Log::LineType::Error, i18n("Wrong programmer connected"));
+    return false;
+  }
+  return true;
+}
+
+bool Psp::Hardware::getFirmwareVersion(VersionData &version)
+{
+  QMemArray<uchar> a1;
+  if ( !port()->commandAck(0x8D, 2, &a1) ) return false;
+  if ( a1[1]==0xFF ) {
+    log(Log::LineType::Warning, i18n("Invalid firmware version"));
+    version = VersionData(0xFF, 0, 0);
+  } else {
+    QMemArray<uchar> a2;
+    if ( !port()->receive(2, a2) ) return false;
+    version = VersionData(a1[1], a2[0], a2[1]);
+  }
+  return true;
+}
+
+bool Psp::Hardware::setTarget()
+{
+  log(Log::DebugLevel::Max, "set target");
+  // load device info
+  if ( !port()->commandAck(0x81) ) return false;
+  QMemArray<uchar> a = createDeviceInfo(device());
+  if ( !port()->send(a) ) return false;
+  if ( !port()->receiveEnd() ) return false;
+
+  // load config info
+  if ( !port()->commandAck(0x82) ) return false;
+  a = createConfigInfo(device());
+  if ( !port()->send(a) ) return false;
+  if ( !port()->receiveEnd() ) return false;
+
+  return true;
+}
+
+bool Psp::Hardware::setRange(uint start, uint size)
+{
+  QMemArray<uchar> a(6);
+  a[0] = 0x8E;
+  a[1] = start >> 16;
+  a[2] = (start >> 8) & 0xFF;
+  a[3] = start & 0xFF;
+  a[4] = size >> 8;
+  a[5] = size & 0xFF;
+  if ( !port()->send(a) ) return false;
+  QMemArray<uchar> r;
+  if ( !port()->receive(6, r) ) return false;
+  for (uint i=0; i<6; i++) {
+    if ( r[i]!=a[i] ) {
+      log(Log::LineType::Error, i18n("Failed to set range"));
+      return false;
+    }
+  }
+  return true;
+}
+
+char Psp::Hardware::readCommand(Pic::MemoryRangeType type)
+{
+  switch (type.type()) {
+    case Pic::MemoryRangeType::Code:    return 'T';
+    case Pic::MemoryRangeType::Eeprom:  return 'd';
+    case Pic::MemoryRangeType::Config:  return 'f';
+    case Pic::MemoryRangeType::UserId:  return 'e';
+    case Pic::MemoryRangeType::Cal:     return 'c';
+    case Pic::MemoryRangeType::DeviceId:
+    case Pic::MemoryRangeType::CalBackup:
+    case Pic::MemoryRangeType::DebugVector:
+    case Pic::MemoryRangeType::ProgramExecutive:
+    case Pic::MemoryRangeType::HardwareStack:
+    case Pic::MemoryRangeType::Nb_Types: break;
+  }
+  return 0;
+}
+
+char Psp::Hardware::writeCommand(Pic::MemoryRangeType type)
+{
+  switch (type.type()) {
+    case Pic::MemoryRangeType::Code:    return 'Q';
+    case Pic::MemoryRangeType::Eeprom:  return 'i';
+    case Pic::MemoryRangeType::Config:  return 'g';
+    case Pic::MemoryRangeType::UserId:  return 'h';
+    case Pic::MemoryRangeType::Cal:     return 'q';
+    case Pic::MemoryRangeType::DeviceId:
+    case Pic::MemoryRangeType::CalBackup:
+    case Pic::MemoryRangeType::DebugVector:
+    case Pic::MemoryRangeType::ProgramExecutive:
+    case Pic::MemoryRangeType::HardwareStack:
+    case Pic::MemoryRangeType::Nb_Types: break;
+  }
+  return 0;
+}
+
+bool Psp::Hardware::readMemory(Pic::MemoryRangeType type, Device::Array &data, const ::Programmer::VerifyData *vdata)
+{
+  QMemArray<uchar> a;
+  uint nbWords = device().nbWords(type);
+  data.resize(nbWords);
+  uint nbBytes = nbWords * device().nbBytesWord(type);
+  char c = readCommand(type);
+  switch (type.type()) {
+    case Pic::MemoryRangeType::Code:
+      if ( !setRange(0, nbWords) ) return false;
+      if ( !port()->commandAck(c) ) return false;
+      for (uint i=0; i<data.count(); i++) {
+        if ( !port()->receive(2, a) ) return false;
+        data[i] = (a[0] << 8) + a[1];
+//        log(Log::DebugLevel::Max, QString("code data %1: %2 (%3, %4)").arg(i).arg(toHexLabel(data[i], 4))
+//                           .arg(toHexLabel(a[0], 2)).arg(toHexLabel(a[1], 2)));
+      }
+      if ( !port()->receiveEnd() ) return false;
+      break;
+    case Pic::MemoryRangeType::Eeprom:
+      if ( !port()->commandAck(c) ) return false;
+      for (uint i=0; i<data.count(); i++) {
+        if ( !port()->receive(1, a) ) return false;
+        data[i] = a[0];
+      }
+      if ( !port()->receiveEnd() ) return false;
+      break;
+    case Pic::MemoryRangeType::UserId:
+      if ( !port()->commandAckEnd(c, nbBytes+2, a) ) return false;
+      for (uint i=0; i<data.count(); i++) data[i] = (a[1+2*i] << 8) + a[1+2*i+1];
+      break;
+    case Pic::MemoryRangeType::Config:
+      if ( !port()->commandAckEnd(c, nbBytes+2, a) ) return false;
+      for (uint i=0; i<data.count(); i++) data[i] = (a[1+2*i] << 8) + a[1+2*i+1];
+      break;
+    case Pic::MemoryRangeType::Cal:
+      if ( !setRange(0, nbWords) ) return false;
+      if ( !port()->commandAckEnd(c, nbBytes+2, a) ) return false;
+      for (uint i=0; i<data.count(); i++) data[i] = (a[1+2*i] << 8) + a[1+2*i+1];
+      break;
+    case Pic::MemoryRangeType::DeviceId:
+    case Pic::MemoryRangeType::CalBackup:
+      data.resize(0);
+      return true;
+    case Pic::MemoryRangeType::DebugVector:
+    case Pic::MemoryRangeType::HardwareStack:
+    case Pic::MemoryRangeType::ProgramExecutive:
+    case Pic::MemoryRangeType::Nb_Types: Q_ASSERT(false); return false;
+  }
+  if (vdata) {
+    for (uint i=0; i<data.count(); i++)
+      if ( !verifyWord(i, data[i], type, *vdata) ) return false;
+  }
+  return true;
+}
+
+bool Psp::Hardware::writeMemory(Pic::MemoryRangeType type, const Device::Array &data, bool force)
+{
+  Q_UNUSED(force); // #### TODO: optimize for program memory
+  if ( type==Pic::MemoryRangeType::Code && !setRange(0, data.count()) ) return false;
+  uint nbBytes = device().nbBytesWord(type);
+  if ( !port()->commandAck(writeCommand(type)) ) return false;
+  for (uint i=0; i<data.count(); i++)
+    if ( !port()->sendData(data[i].toUInt(), nbBytes) ) return false;
+  return port()->receiveEnd();
+}
+
+bool Psp::Hardware::eraseAll()
+{
+  QMemArray<uchar> a;
+  if ( !port()->commandAck(0x8F, 2, &a) ) return false;
+  if ( a[1]!=0x00 ) {
+    log(Log::LineType::Error, i18n("Erase failed"));
+    return false;
+  }
+  return true;
+}
diff --git a/src/progs/psp/base/psp.h b/src/progs/psp/base/psp.h
new file mode 100644
index 0000000..ad4a160
--- /dev/null
+++ b/src/progs/psp/base/psp.h
@@ -0,0 +1,63 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2002-2003 Stephen Landamore <stephen@landamore.com>     *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PSP_H
+#define PSP_H
+
+#include "devices/pic/prog/pic_prog.h"
+#include "psp_serial.h"
+#include "psp_data.h"
+
+namespace Psp
+{
+  extern QMemArray<uchar> createConfigInfo(const Pic::Data &data);
+  extern QMemArray<uchar> createDeviceInfo(const Pic::Data &data);
+
+//-----------------------------------------------------------------------------
+class Hardware : public Programmer::PicHardware
+{
+public:
+  Hardware(::Programmer::Base &base, const QString &portDevice);
+  SerialPort *port() { return static_cast<SerialPort *>(_port); }
+  virtual bool uploadFirmware(const Pic::Memory &) { return false; }
+  virtual bool setTarget();
+  virtual bool getFirmwareVersion(VersionData &version);
+  virtual bool readMemory(Pic::MemoryRangeType type, Device::Array &data, const ::Programmer::VerifyData *vdata);
+  virtual bool writeMemory(Pic::MemoryRangeType type, const Device::Array &data, bool force);
+  virtual bool eraseAll();
+  virtual bool internalConnectHardware();
+
+private:
+  bool setRange(uint start, uint end);
+  static char readCommand(Pic::MemoryRangeType type);
+  static char writeCommand(Pic::MemoryRangeType type);
+};
+
+//-----------------------------------------------------------------------------
+class DeviceSpecific : public ::Programmer::PicDeviceSpecific
+{
+public:
+  DeviceSpecific(::Programmer::Base &base) : ::Programmer::PicDeviceSpecific(base) {}
+  virtual bool canEraseAll() const { return true; }
+  virtual bool canEraseRange(Pic::MemoryRangeType) const { return false; }
+  virtual bool canReadRange(Pic::MemoryRangeType type) const { return ( type!=Pic::MemoryRangeType::DeviceId ); }
+  virtual bool canWriteRange(Pic::MemoryRangeType) const { return true; }
+  Hardware &hardware() { return static_cast<Hardware &>(*_base.hardware()); }
+  virtual bool setPowerOff() { return false; }
+  virtual bool setPowerOn() { return false; }
+  virtual bool setTargetPowerOn(bool) { return true; }
+  virtual bool doEraseRange(Pic::MemoryRangeType) { return false; }
+  virtual bool doErase(bool) { return hardware().eraseAll(); }
+  virtual bool doRead(Pic::MemoryRangeType type, Device::Array &data, const ::Programmer::VerifyData *vdata) { return hardware().readMemory(type, data, vdata); }
+  virtual bool doWrite(Pic::MemoryRangeType type, const Device::Array &data, bool force) { return hardware().writeMemory(type, data, force); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/psp/base/psp.xml b/src/progs/psp/base/psp.xml
new file mode 100644
index 0000000..a009584
--- /dev/null
+++ b/src/progs/psp/base/psp.xml
@@ -0,0 +1,195 @@
+<!-- ************************************************************************* -->
+<!-- * Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             * -->
+<!-- *                                                                       * -->
+<!-- * This program is free software; you can redistribute it and/or modify  * -->
+<!-- * it under the terms of the GNU General Public License as published by  * -->
+<!-- * the Free Software Foundation; either version 2 of the License, or     * -->
+<!-- * (at your option) any later version.                                   * -->
+<!-- *************************************************************************/-->
+<!DOCTYPE piklab>
+
+<type name="psp">
+  <device name="10F200" family="generic" algorithm="29" overprogram="1" tries="1" />
+  <device name="10F202" family="generic" algorithm="29" overprogram="1" tries="1" />
+  <device name="10F204" family="generic" algorithm="29" overprogram="1" tries="1" />
+  <device name="10F206" family="generic" algorithm="29" overprogram="1" tries="1" />
+
+  <device name="12C508" family="generic" algorithm="10" overprogram="11" tries="8" />
+  <device name="12C508A" family="generic" algorithm="10" overprogram="11" tries="8" />
+  <device name="12F508" family="generic" algorithm="28" overprogram="1" tries="1" />
+  <device name="12C509" family="generic" algorithm="10" overprogram="11" tries="8" />
+  <device name="12C509A" family="generic" algorithm="10" overprogram="11" tries="8" />
+  <device name="12F509" family="generic" algorithm="28" overprogram="1" tries="1" />
+  <device name="12C671" family="generic" algorithm="9" overprogram="3" tries="25" />
+  <device name="12C672" family="generic" algorithm="9" overprogram="3" tries="25" />
+  <device name="12CE518" family="generic" algorithm="10" overprogram="11" tries="8" />
+  <device name="12CE519" family="generic" algorithm="10" overprogram="11" tries="8" />
+  <device name="12CE673" family="generic" algorithm="9" overprogram="3" tries="25" />
+  <device name="12CE674" family="generic" algorithm="9" overprogram="3" tries="25" />
+  <device name="12CR509A" family="generic" algorithm="10" overprogram="11" tries="8" />
+  <device name="12F629" family="generic" algorithm="15" overprogram="1" tries="1" support_type="tested" />
+  <device name="12F675" family="generic" algorithm="15" overprogram="1" tries="1" support_type="tested" />
+  <device name="12F683" family="generic" algorithm="15" overprogram="1" tries="1" support_type="tested" />
+
+  <device name="14000" family="generic" algorithm="1" overprogram="3" tries="25" />
+
+  <device name="16C505" family="generic" algorithm="10" overprogram="11" tries="8" />
+  <device name="16C52" family="generic" algorithm="5" overprogram="11" tries="8" />
+  <device name="16C54" family="generic" algorithm="5" overprogram="11" tries="8" />
+  <device name="16C54A" family="generic" algorithm="5" overprogram="11" tries="8" />
+  <device name="16C54B" family="generic" algorithm="5" overprogram="11" tries="8" />
+  <device name="16C54C" family="generic" algorithm="5" overprogram="11" tries="8" />
+  <device name="16C55" family="generic" algorithm="6" overprogram="11" tries="8" />
+  <device name="16C554" family="generic" algorithm="2" overprogram="3" tries="25" />
+  <device name="16C558" family="generic" algorithm="2" overprogram="3" tries="25" />
+  <device name="16C55A" family="generic" algorithm="6" overprogram="11" tries="8" />
+  <device name="16C56" family="generic" algorithm="5" overprogram="11" tries="8" />
+  <device name="16C56A" family="generic" algorithm="5" overprogram="11" tries="8" />
+  <device name="16C57" family="generic" algorithm="6" overprogram="11" tries="8" />
+  <device name="16C57C" family="generic" algorithm="6" overprogram="11" tries="8" />
+  <device name="16C58A" family="generic" algorithm="5" overprogram="11" tries="8" />
+  <device name="16C58B" family="generic" algorithm="5" overprogram="11" tries="8" />
+  <device name="16C61" family="generic" algorithm="2" overprogram="3" tries="25" />
+  <device name="16C62" family="generic" algorithm="3" overprogram="3" tries="25" />
+  <device name="16C620" family="generic" algorithm="2" overprogram="3" tries="25" />
+  <device name="16C620A" family="generic" algorithm="2" overprogram="3" tries="25" />
+  <device name="16C621" family="generic" algorithm="2" overprogram="3" tries="25" />
+  <device name="16C621A" family="generic" algorithm="2" overprogram="3" tries="25" />
+  <device name="16C622" family="generic" algorithm="2" overprogram="3" tries="25" />
+  <device name="16C622A" family="generic" algorithm="2" overprogram="3" tries="25" />
+  <device name="16C62A" family="generic" algorithm="3" overprogram="3" tries="25" />
+  <device name="16C62B" family="generic" algorithm="3" overprogram="3" tries="25" />
+  <device name="16C63" family="generic" algorithm="3" overprogram="3" tries="25" />
+  <device name="16C63A" family="generic" algorithm="3" overprogram="3" tries="25" />
+  <device name="16C64" family="generic" algorithm="4" overprogram="3" tries="25" />
+  <device name="16C642" family="generic" algorithm="3" overprogram="3" tries="25" />
+  <device name="16C64A" family="generic" algorithm="4" overprogram="3" tries="25" />
+  <device name="16C65" family="generic" algorithm="4" overprogram="3" tries="25" />
+  <device name="16C65A" family="generic" algorithm="4" overprogram="3" tries="25" />
+  <device name="16C65B" family="generic" algorithm="4" overprogram="3" tries="25" />
+  <device name="16C66" family="generic" algorithm="3" overprogram="3" tries="25" />
+  <device name="16C662" family="generic" algorithm="4" overprogram="3" tries="25" />
+  <device name="16C67" family="generic" algorithm="4" overprogram="3" tries="25" />
+  <device name="16C71" family="generic" algorithm="2" overprogram="3" tries="25" />
+  <device name="16C710" family="generic" algorithm="2" overprogram="3" tries="25" />
+  <device name="16C711" family="generic" algorithm="2" overprogram="3" tries="25" />
+  <device name="16C712" family="generic" algorithm="2" overprogram="3" tries="25" />
+  <device name="16C715" family="generic" algorithm="2" overprogram="3" tries="25" />
+  <device name="16C716" family="generic" algorithm="2" overprogram="3" tries="25" />
+  <device name="16C717" family="generic" algorithm="12" overprogram="3" tries="25" />
+  <device name="16C72" family="generic" algorithm="3" overprogram="3" tries="25" />
+  <device name="16C72A" family="generic" algorithm="3" overprogram="3" tries="25" />
+  <device name="16C73" family="generic" algorithm="3" overprogram="3" tries="25" />
+  <device name="16C73A" family="generic" algorithm="3" overprogram="3" tries="25" />
+  <device name="16C73B" family="generic" algorithm="3" overprogram="3" tries="25" />
+  <device name="16C74" family="generic" algorithm="4" overprogram="3" tries="25" />
+  <device name="16C745" family="generic" algorithm="3" overprogram="3" tries="25" />
+  <device name="16C74A" family="generic" algorithm="4" overprogram="3" tries="25" />
+  <device name="16C74B" family="generic" algorithm="4" overprogram="3" tries="25" />
+  <device name="16C76" family="generic" algorithm="3" overprogram="3" tries="25" />
+  <device name="16C765" family="generic" algorithm="4" overprogram="3" tries="25" />
+  <device name="16C77" family="generic" algorithm="4" overprogram="3" tries="25" />
+  <device name="16C770" family="generic" algorithm="8" overprogram="3" tries="25" />
+  <device name="16C771" family="generic" algorithm="8" overprogram="3" tries="25" />
+  <device name="16C773" family="generic" algorithm="4" overprogram="3" tries="25" />
+  <device name="16C774" family="generic" algorithm="4" overprogram="3" tries="25" />
+  <device name="16C781" family="generic" algorithm="8" overprogram="3" tries="25" />
+  <device name="16C782" family="generic" algorithm="8" overprogram="3" tries="25" />
+  <device name="16C84" family="generic" algorithm="2" overprogram="3" tries="1" />
+  <device name="16C923" family="generic" algorithm="4" overprogram="3" tries="25" />
+  <device name="16C924" family="generic" algorithm="4" overprogram="3" tries="25" />
+  <device name="16C925" family="generic" algorithm="4" overprogram="3" tries="25" />
+  <device name="16C926" family="generic" algorithm="4" overprogram="3" tries="25" />
+  <device name="16CE623" family="generic" algorithm="2" overprogram="3" tries="25" />
+  <device name="16CE624" family="generic" algorithm="2" overprogram="3" tries="25" />
+  <device name="16CE625" family="generic" algorithm="2" overprogram="3" tries="25" />
+  <device name="16CR620A" family="generic" algorithm="2" overprogram="3" tries="25" />
+  <device name="16CR72" family="generic" algorithm="3" overprogram="3" tries="25" />
+
+  <device name="16F54" family="generic" algorithm="5" overprogram="11" tries="8" />
+  <device name="16F57" family="generic" algorithm="6" overprogram="11" tries="8" />
+  <device name="16F627" family="generic" algorithm="12" overprogram="0" tries="1" support_type="tested" />
+  <device name="16F627A" family="generic" algorithm="19" overprogram="0" tries="1" />
+  <device name="16F628" family="generic" algorithm="12" overprogram="0" tries="1" support_type="tested" />
+  <device name="16F628A" family="generic" algorithm="19" overprogram="0" tries="1" />
+  <device name="16F630" family="generic" algorithm="15" overprogram="0" tries="1" />
+  <device name="16F648A" family="generic" algorithm="19" overprogram="1" tries="1" />
+  <device name="16F676" family="generic" algorithm="15" overprogram="0" tries="1" />
+  <device name="16F684" family="generic" algorithm="21" overprogram="0" tries="1" />
+  <device name="16F688" family="generic" algorithm="21" overprogram="0" tries="1" />
+  <device name="16F690" family="generic" algorithm="21" overprogram="0" tries="1" />
+  <device name="16F716" family="generic" algorithm="22" overprogram="0" tries="1" />
+  <device name="16F72" family="generic" algorithm="13" overprogram="0" tries="1" />
+  <device name="16F73" family="generic" algorithm="13" overprogram="0" tries="1" />
+  <device name="16F737" family="generic" algorithm="23" overprogram="3" tries="1" />
+  <device name="16F74" family="generic" algorithm="13" overprogram="0" tries="1" />
+  <device name="16F747" family="generic" algorithm="23" overprogram="3" tries="1" />
+  <device name="16F76" family="generic" algorithm="13" overprogram="0" tries="1" />
+  <device name="16F767" family="generic" algorithm="23" overprogram="3" tries="1" />
+  <device name="16F77" family="generic" algorithm="13" overprogram="0" tries="1" />
+  <device name="16F777" family="generic" algorithm="23" overprogram="3" tries="1" />
+  <device name="16F818" family="generic" algorithm="16" overprogram="0" tries="1" />
+  <device name="16F819" family="generic" algorithm="16" overprogram="0" tries="1" />
+  <device name="16F83" family="generic" algorithm="2" overprogram="3" tries="1" />
+  <device name="16F84" family="generic" algorithm="2" overprogram="3" tries="1" />
+  <device name="16F84A" family="generic" algorithm="2" overprogram="0" tries="1" />
+  <device name="16F87" family="generic" algorithm="20" overprogram="0" tries="1" />
+  <device name="16F870" family="generic" algorithm="3" overprogram="0" tries="1" />
+  <device name="16F871" family="generic" algorithm="4" overprogram="0" tries="1" />
+  <device name="16F872" family="generic" algorithm="3" overprogram="0" tries="1" />
+  <device name="16F873" family="generic" algorithm="4" overprogram="0" tries="1" support_type="tested" />
+  <device name="16F873A" family="generic" algorithm="17" overprogram="0" tries="1" />
+  <device name="16F874" family="generic" algorithm="4" overprogram="0" tries="1" />
+  <device name="16F874A" family="generic" algorithm="17" overprogram="0" tries="1" />
+  <device name="16F876" family="generic" algorithm="4" overprogram="0" tries="1" />
+  <device name="16F876A" family="generic" algorithm="17" overprogram="0" tries="1" />
+  <device name="16F877" family="generic" algorithm="4" overprogram="0" tries="1" />
+  <device name="16F877A" family="generic" algorithm="17" overprogram="0" tries="1" />
+  <device name="16F88" family="generic" algorithm="20" overprogram="0" tries="1" />
+  <device name="16F913" family="generic" algorithm="32" overprogram="1" tries="3" />
+  <device name="16F917" family="generic" algorithm="32" overprogram="1" tries="3" />
+  <device name="16HV540" family="generic" algorithm="5" overprogram="11" tries="8" />
+
+  <device name="17C42" family="generic" algorithm="7" overprogram="3" tries="25" />
+  <device name="17C42A" family="generic" algorithm="7" overprogram="3" tries="25" />
+  <device name="17C43" family="generic" algorithm="7" overprogram="3" tries="25" />
+  <device name="17C44" family="generic" algorithm="7" overprogram="3" tries="25" />
+  <device name="17C752" family="generic" algorithm="7" overprogram="3" tries="25" />
+  <device name="17C756" family="generic" algorithm="7" overprogram="3" tries="25" />
+  <device name="17C756A" family="generic" algorithm="7" overprogram="3" tries="25" />
+  <device name="17C762" family="generic" algorithm="7" overprogram="3" tries="25" />
+  <device name="17C766" family="generic" algorithm="7" overprogram="3" tries="25" />
+<!--
+  <device name="18C242" family="generic" algorithm="11" overprogram="3" tries="25" />
+  <device name="18C252" family="generic" algorithm="11" overprogram="3" tries="25" />
+  <device name="18C442" family="generic" algorithm="11" overprogram="3" tries="25" />
+  <device name="18C452" family="generic" algorithm="11" overprogram="3" tries="25" />
+  <device name="18C658" family="generic" algorithm="11" overprogram="3" tries="25" />
+  <device name="18C858" family="generic" algorithm="11" overprogram="3" tries="25" />
+
+  <device name="18F1220" family="generic" algorithm="18" overprogram="1" tries="1" />
+  <device name="18F1320" family="generic" algorithm="18" overprogram="1" tries="1" />
+  <device name="18F2220" family="generic" algorithm="24" overprogram="1" tries="1" />
+  <device name="18F2320" family="generic" algorithm="24" overprogram="1" tries="1" />
+  <device name="18F242" family="generic" algorithm="14" overprogram="3" tries="25" />
+  <device name="18F2455" family="generic" algorithm="30" overprogram="3" tries="13" />
+  <device name="18F248" family="generic" algorithm="14" overprogram="3" tries="25" />
+  <device name="18F252" family="generic" algorithm="14" overprogram="3" tries="25" />
+  <device name="18F258" family="generic" algorithm="14" overprogram="3" tries="25" />
+  <device name="18F2680" family="generic" algorithm="30" overprogram="3" tries="13" />
+  <device name="18F4220" family="generic" algorithm="24" overprogram="1" tries="1" />
+  <device name="18F4320" family="generic" algorithm="24" overprogram="1" tries="1" />
+  <device name="18F442" family="generic" algorithm="14" overprogram="3" tries="25" />
+  <device name="18F4431" family="generic" algorithm="14" overprogram="3" tries="25" />
+  <device name="18F4455" family="generic" algorithm="30" overprogram="3" tries="13" />
+  <device name="18F448" family="generic" algorithm="14" overprogram="3" tries="25" />
+  <device name="18F452" family="generic" algorithm="14" overprogram="3" tries="25" />
+  <device name="18F4550" family="generic" algorithm="14" overprogram="3" tries="25" />
+  <device name="18F458" family="generic" algorithm="14" overprogram="3" tries="25" />
+  <device name="18F6620" family="generic" algorithm="14" overprogram="3" tries="25" />
+  <device name="18F6520" family="generic" algorithm="14" overprogram="3" tries="25" />
+  <device name="18F6720" family="generic" algorithm="14" overprogram="3" tries="25" />
+  <device name="18F8620" family="generic" algorithm="14" overprogram="3" tries="25" />
+  <device name="18F8720" family="generic" algorithm="14" overprogram="3" tries="25" />
+-->
+</type>
diff --git a/src/progs/psp/base/psp_data.h b/src/progs/psp/base/psp_data.h
new file mode 100644
index 0000000..c643961
--- /dev/null
+++ b/src/progs/psp/base/psp_data.h
@@ -0,0 +1,23 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PSP_DATA_H
+#define PSP_DATA_H
+
+#include <qstring.h>
+
+namespace Psp
+{
+  struct Data {
+    uint algorithm, overprogram, tries;
+  };
+  extern bool isSupported(const QString &device);
+  extern const Data &data(const QString &device);
+} // namespace
+
+#endif
diff --git a/src/progs/psp/base/psp_prog.cpp b/src/progs/psp/base/psp_prog.cpp
new file mode 100644
index 0000000..891cb73
--- /dev/null
+++ b/src/progs/psp/base/psp_prog.cpp
@@ -0,0 +1,31 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "psp_prog.h"
+
+//----------------------------------------------------------------------------
+bool Psp::Base::readFirmwareVersion()
+{
+  return hardware().getFirmwareVersion(_firmwareVersion);
+}
+
+//----------------------------------------------------------------------------
+Programmer::Properties Psp::Group::properties() const
+{
+   return ::Programmer::Programmer | ::Programmer::HasFirmware | ::Programmer::CanReadMemory | ::Programmer::HasConnectedState; // | ::Programmer::CanUploadFirmware;
+}
+
+Programmer::Hardware *Psp::Group::createHardware(::Programmer::Base &base, const ::Programmer::HardwareDescription &hd) const
+{
+  return new Hardware(base, hd.port.device);
+}
+
+Programmer::DeviceSpecific *Psp::Group::createDeviceSpecific(::Programmer::Base &base) const
+{
+  return new DeviceSpecific(base);
+}
diff --git a/src/progs/psp/base/psp_prog.h b/src/progs/psp/base/psp_prog.h
new file mode 100644
index 0000000..ef525cd
--- /dev/null
+++ b/src/progs/psp/base/psp_prog.h
@@ -0,0 +1,53 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PSP_PROG_H
+#define PSP_PROG_H
+
+#include "common/global/global.h"
+#include "psp.h"
+
+namespace Psp
+{
+//-----------------------------------------------------------------------------
+class Base : public Programmer::PicBase
+{
+Q_OBJECT
+public:
+  Base(const Programmer::Group &group, const Pic::Data *data)
+    : Programmer::PicBase(group, data, "psp_programmer_base") {}
+  virtual bool readFirmwareVersion();
+  virtual bool setTarget() { return hardware().setTarget(); }
+
+protected:
+  Hardware &hardware() { return static_cast<Hardware &>(*_hardware); }
+  virtual VersionData firmwareVersion(Programmer::FirmwareVersionType type) const { return (type==Programmer::FirmwareVersionType::Min ? VersionData(4, 30, 3) : VersionData()); }
+};
+
+//-----------------------------------------------------------------------------
+class Group : public ::Programmer::PicGroup
+{
+public:
+  virtual QString name() const { return "psp"; }
+  virtual QString label() const { return i18n("Picstart Plus"); }
+  virtual QString xmlName() const { return "psp"; }
+  virtual ::Programmer::Properties properties() const;
+  virtual ::Programmer::TargetPowerMode targetPowerMode() const { return ::Programmer::TargetExternallyPowered; }
+  virtual bool isPortSupported(PortType type) const { return ( type==PortType::Serial ); }
+  virtual bool canReadVoltage(Pic::VoltageType type) const { return ( type==Pic::TargetVdd || type==Pic::TargetVpp ); }
+
+protected:
+  virtual void initSupported();
+  virtual ::Programmer::Base *createBase(const Device::Data *data) const { return new ::Psp::Base(*this, static_cast<const Pic::Data *>(data)); }
+  virtual ::Programmer::Hardware *createHardware(::Programmer::Base &base, const ::Programmer::HardwareDescription &hd) const;
+  virtual ::Programmer::DeviceSpecific *createDeviceSpecific(::Programmer::Base &base) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/psp/base/psp_serial.cpp b/src/progs/psp/base/psp_serial.cpp
new file mode 100644
index 0000000..964d604
--- /dev/null
+++ b/src/progs/psp/base/psp_serial.cpp
@@ -0,0 +1,110 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2002-2003 Stephen Landamore <stephen@landamore.com>     *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "psp_serial.h"
+
+#include "common/global/global.h"
+#include "common/common/misc.h"
+#include "common/common/number.h"
+
+//-----------------------------------------------------------------------------
+Psp::SerialPort::SerialPort(const QString &device, Log::Base &log)
+  : Port::Serial(device, NeedFlush, log)
+{}
+
+bool Psp::SerialPort::open()
+{
+  if ( !Port::Serial::open() ) return false;
+  return setMode(NoInputFlag, ByteSize8 | IgnoreControlLines | EnableReceiver, S19200, 100);
+}
+
+bool Psp::SerialPort::reset()
+{
+  if ( !setHardwareFlowControl(false) ) return false;
+  // reset
+  setPinOn(DTR, false, Port::PositiveLogic);
+  Port::msleep(250);
+  // remove reset
+  setPinOn(DTR, true, Port::PositiveLogic);
+  for (uint i=0; i<=100; i++) {
+    bool bit;
+    if ( !readPin(CTS, Port::PositiveLogic, bit) ) return false;
+    if ( bit ) break;
+    if ( i==100 ) {
+      log(Log::LineType::Error, i18n("Could not contact Picstart+"));
+      return false;
+    }
+    Port::msleep(1);
+  }
+  if ( !setHardwareFlowControl(true) ) return false;
+  return flush(0);
+}
+
+bool Psp::SerialPort::command(uchar c, uint nbBytes, QMemArray<uchar> &a)
+{
+  log(Log::DebugLevel::Extra, QString("Command %1").arg(toHexLabel(c, 2)));
+  if ( !sendChar(c) ) return false;
+  return receive(nbBytes, a);
+}
+
+bool Psp::SerialPort::checkAck(uchar ec, uchar rc)
+{
+  if ( ec==rc ) return true;
+  log(Log::LineType::Error, i18n("Incorrect ack: expecting %1, received %2")
+                  .arg(QString(toHex(ec, 2))).arg(QString(toHex(rc, 2))));
+  return false;
+}
+
+bool Psp::SerialPort::checkEnd(uchar c)
+{
+  if ( c==0 ) return true;
+  log(Log::LineType::Error, i18n("Incorrect received data end: expecting 00, received %1")
+                  .arg(QString(toHex(c, 2))));
+  return false;
+}
+
+bool Psp::SerialPort::commandAck(uchar c, uint nbBytes, QMemArray<uchar> *a)
+{
+  Q_ASSERT( nbBytes>=1 );
+  QMemArray<uchar> tmp;
+  if ( !command(c, nbBytes, tmp) ) return false;
+  if ( !checkAck(c, tmp[0]) ) return false;
+  if (a) *a = tmp;
+  return true;
+}
+
+bool Psp::SerialPort::receiveEnd()
+{
+  QMemArray<uchar> a;
+  if ( !receive(1, a) ) return false;
+  if ( !checkEnd(a[0]) ) return false;
+  return true;
+}
+
+bool Psp::SerialPort::commandAckEnd(uchar c, uint nbBytes, QMemArray<uchar> &a)
+{
+  Q_ASSERT( nbBytes>=2 );
+  if ( !command(c, nbBytes, a) ) return false;
+  if ( !checkAck(c, a[0]) ) return false;
+  if ( !checkEnd(a[nbBytes-1]) ) return false;
+  return true;
+}
+
+bool Psp::SerialPort::sendData(uint value, uint nbBytes)
+{
+  Q_ASSERT( nbBytes==1 || nbBytes==2 );
+  Q_ASSERT( value<uint(1 << 8*nbBytes) );
+  QMemArray<uchar> a(nbBytes);
+  if ( nbBytes==2 ) {
+    a[0] = value / 256;
+    a[1] = value & 0xFF;
+  } else a[0] = value;
+  if ( !send(a) ) return false;
+  return receive(nbBytes, a);
+}
diff --git a/src/progs/psp/base/psp_serial.h b/src/progs/psp/base/psp_serial.h
new file mode 100644
index 0000000..6f379dd
--- /dev/null
+++ b/src/progs/psp/base/psp_serial.h
@@ -0,0 +1,37 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2002-2003 Stephen Landamore <stephen@landamore.com>     *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PSP_SERIAL_H
+#define PSP_SERIAL_H
+
+#include "common/port/serial.h"
+
+namespace Psp
+{
+
+class SerialPort : public Port::Serial
+{
+public:
+  SerialPort(const QString &portDevice, Log::Base &log);
+  bool open();
+  bool reset();
+  bool command(uchar c, uint nbBytes, QMemArray<uchar> &a);
+  bool commandAck(uchar c, uint nbBytes = 1, QMemArray<uchar> *a = 0);
+  bool commandAckEnd(uchar c, uint nbBytes, QMemArray<uchar> &a);
+  bool receiveEnd();
+  bool sendData(uint value, uint nbBytes);
+
+private:
+  bool checkAck(uchar ec, uchar rc);
+  bool checkEnd(uchar c);
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/psp/gui/Makefile.am b/src/progs/psp/gui/Makefile.am
new file mode 100644
index 0000000..c11240d
--- /dev/null
+++ b/src/progs/psp/gui/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libpspui.la
+libpspui_la_LDFLAGS = $(all_libraries)
+libpspui_la_SOURCES = psp_group_ui.cpp
diff --git a/src/progs/psp/gui/psp_group_ui.cpp b/src/progs/psp/gui/psp_group_ui.cpp
new file mode 100644
index 0000000..e3f2546
--- /dev/null
+++ b/src/progs/psp/gui/psp_group_ui.cpp
@@ -0,0 +1,22 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "psp_group_ui.h"
+
+#include "progs/gui/prog_config_widget.h"
+#include "devices/pic/gui/pic_prog_group_ui.h"
+
+::Programmer::ConfigWidget *Psp::GroupUI::createConfigWidget(QWidget *parent) const
+{
+  return new ::Programmer::ConfigWidget(static_cast<const ::Programmer::Group &>(group()), parent);
+}
+
+::Programmer::AdvancedDialog *Psp::GroupUI::createAdvancedDialog(::Programmer::Base &base, QWidget *parent) const
+{
+  return new ::Programmer::PicAdvancedDialog(static_cast< ::Programmer::PicBase &>(base), parent, "psp_advanced_dialog");
+}
diff --git a/src/progs/psp/gui/psp_group_ui.h b/src/progs/psp/gui/psp_group_ui.h
new file mode 100644
index 0000000..fc1534a
--- /dev/null
+++ b/src/progs/psp/gui/psp_group_ui.h
@@ -0,0 +1,28 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PSP_GROUP_UI_H
+#define PSP_GROUP_UI_H
+
+#include "devices/pic/gui/pic_prog_group_ui.h"
+
+namespace Psp
+{
+class Group;
+
+class GroupUI : public ::Programmer::GroupUI
+{
+public:
+  virtual ::Programmer::ConfigWidget *createConfigWidget(QWidget *parent) const;
+  virtual bool hasAdvancedDialog() const { return true; }
+  virtual ::Programmer::AdvancedDialog *createAdvancedDialog(::Programmer::Base &base, QWidget *parent) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/psp/psp.pro b/src/progs/psp/psp.pro
new file mode 100644
index 0000000..60ac0f5
--- /dev/null
+++ b/src/progs/psp/psp.pro
@@ -0,0 +1,2 @@
+TEMPLATE = subdirs
+SUBDIRS = xml base
diff --git a/src/progs/psp/xml/Makefile.am b/src/progs/psp/xml/Makefile.am
new file mode 100644
index 0000000..156e485
--- /dev/null
+++ b/src/progs/psp/xml/Makefile.am
@@ -0,0 +1,14 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_PROGRAMS = xml_psp_parser
+xml_psp_parser_SOURCES = xml_psp_parser.cpp
+OBJECTS = $(top_builddir)/src/devices/list/libdevicelistnoui.la \
+	$(top_builddir)/src/devices/pic/pic/libpic.la $(top_builddir)/src/devices/pic/base/libpicbase.la \
+	$(top_builddir)/src/devices/pic/xml_data/libpicxml.la \
+	$(top_builddir)/src/devices/mem24/mem24/libmem24.la $(top_builddir)/src/devices/mem24/base/libmem24base.la \
+	$(top_builddir)/src/devices/mem24/xml_data/libmem24xml.la \
+	$(top_builddir)/src/xml_to_data/libxmltodata.la $(top_builddir)/src/devices/base/libdevicebase.la \
+	$(top_builddir)/src/common/common/libcommon.la
+xml_psp_parser_DEPENDENCIES = $(OBJECTS)
+xml_psp_parser_LDADD = $(OBJECTS) $(LIB_KDECORE)
diff --git a/src/progs/psp/xml/xml.pro b/src/progs/psp/xml/xml.pro
new file mode 100644
index 0000000..0c88b4c
--- /dev/null
+++ b/src/progs/psp/xml/xml.pro
@@ -0,0 +1,17 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/app.pro)
+
+TARGET   = xml_psp_parser
+SOURCES += xml_psp_parser.cpp
+LIBS    += ../../../devices/list/libdevicelist.a \
+           ../../../devices/mem24/mem24/libmem24.a ../../../devices/mem24/xml_data/libmem24xml.a \
+           ../../../devices/mem24/base/libmem24base.a \
+           ../../../devices/pic/pic/libpic.a ../../../devices/pic/xml_data/libpicxml.a \
+           ../../../devices/pic/base/libpicbase.a ../../../xml_to_data/libxmltodata.a \
+           ../../../devices/base/libdevicebase.a ../../../common/global/libglobal.a \
+           ../../../common/nokde/libnokde.a ../../../common/common/libcommon.a
+
+unix:QMAKE_POST_LINK = cd ../base && ../xml/xml_psp_parser
+unix:QMAKE_CLEAN += ../base/psp_data.cpp
+win32:QMAKE_POST_LINK = cd ..\base && ..\xml\xml_psp_parser.exe
+win32:QMAKE_CLEAN += ..\base\psp_data.cpp
diff --git a/src/progs/psp/xml/xml_psp_parser.cpp b/src/progs/psp/xml/xml_psp_parser.cpp
new file mode 100644
index 0000000..5cdd289
--- /dev/null
+++ b/src/progs/psp/xml/xml_psp_parser.cpp
@@ -0,0 +1,45 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "xml_to_data/prog_xml_to_data.h"
+#include "progs/psp/base/psp_data.h"
+
+//-----------------------------------------------------------------------------
+namespace Psp
+{
+
+class XmlToData : public Programmer::XmlToData<Data>
+{
+public:
+  XmlToData() : Programmer::XmlToData<Data>("psp", "Psp") {}
+
+private:
+  virtual void parseData(QDomElement element, Data &data);
+  virtual void outputData(const Data &data, QTextStream &s) const;
+};
+
+void Psp::XmlToData::parseData(QDomElement element, Data &data)
+{
+  bool ok;
+  data.algorithm = element.attribute("algorithm").toUInt(&ok);
+  if ( !ok ) qFatal("Missing or invalid algorithm");
+  data.overprogram = element.attribute("overprogram").toUInt(&ok);
+  if ( !ok ) qFatal("Missing or invalid overprogram");
+  data.tries = element.attribute("tries").toUInt(&ok);
+  if ( !ok ) qFatal("Missing or invalid tries");
+}
+
+void Psp::XmlToData::outputData(const Data &data, QTextStream &s) const
+{
+  s << data.algorithm << ", " << data.overprogram << ", " << data.tries;
+}
+
+} // namespace
+
+//-----------------------------------------------------------------------------
+XML_MAIN(Psp::XmlToData)
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new file mode 100644
index 0000000..e57c92d
--- /dev/null
+++ b/src/progs/sdcdb/Makefile
@@ -0,0 +1,733 @@
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+# KDE tags expanded automatically by am_edit - $Revision: 877 $ 
+# src/progs/sdcdb/Makefile.  Generated from Makefile.in by configure.
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005  Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+
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+host_alias = i486-linux-gnu
+host_cpu = i486
+host_os = linux-gnu
+host_vendor = pc
+htmldir = ${docdir}
+include_ARTS_FALSE = #
+include_ARTS_TRUE = 
+include_x11_FALSE = #
+include_x11_TRUE = 
+includedir = ${prefix}/include
+infodir = ${prefix}/share/info
+install_sh = /home/miriam/piklab/piklab-0.15.2/admin/install-sh
+kde_appsdir = ${datadir}/applnk
+kde_bindir = ${exec_prefix}/bin
+kde_confdir = ${datadir}/config
+kde_datadir = ${datadir}/apps
+kde_htmldir = ${datadir}/doc/HTML
+kde_icondir = ${datadir}/icons
+kde_includes = /usr/include/kde
+kde_kcfgdir = ${datadir}/config.kcfg
+kde_libraries = /usr/lib
+kde_libs_htmldir = /usr/share/doc/kde/HTML
+kde_libs_prefix = /usr
+kde_locale = ${datadir}/locale
+kde_mimedir = ${datadir}/mimelnk
+kde_moduledir = ${libdir}/kde3
+kde_qtver = 3
+kde_servicesdir = ${datadir}/services
+kde_servicetypesdir = ${datadir}/servicetypes
+kde_sounddir = ${datadir}/sounds
+kde_styledir = ${libdir}/kde3/plugins/styles
+kde_templatesdir = ${datadir}/templates
+kde_wallpaperdir = ${datadir}/wallpapers
+kde_widgetdir = /usr/lib/kde3/plugins/designer
+kdeinitdir = $(kde_moduledir)
+libdir = ${exec_prefix}/lib
+libexecdir = ${exec_prefix}/libexec
+localedir = ${datarootdir}/locale
+localstatedir = ${prefix}/var
+man_SUBDIR_included_FALSE = #
+man_SUBDIR_included_TRUE = 
+mandir = ${prefix}/share/man
+mkdir_p = mkdir -p --
+oldincludedir = /usr/include
+pdfdir = ${docdir}
+po_SUBDIR_included_FALSE = #
+po_SUBDIR_included_TRUE = 
+prefix = /usr
+program_transform_name = s,x,x,
+psdir = ${docdir}
+qt_includes = /usr/share/qt3/include
+qt_libraries = /usr/share/qt3/lib
+sbindir = ${exec_prefix}/sbin
+sharedstatedir = ${prefix}/com
+src_SUBDIR_included_FALSE = #
+src_SUBDIR_included_TRUE = 
+sysconfdir = ${prefix}/etc
+target = i486-pc-linux-gnu
+target_alias = 
+target_cpu = i486
+target_os = linux-gnu
+target_vendor = pc
+unsermake_enable_pch_FALSE = 
+unsermake_enable_pch_TRUE = #
+x_includes = .
+x_libraries = /usr/lib
+xdg_appsdir = ${datadir}/applications/kde
+xdg_directorydir = ${datadir}/desktop-directories
+xdg_menudir = ${sysconfdir}/xdg/menus
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+SUBDIRS = base gui
+#>- all: all-recursive
+#>+ 1
+all: docs-am  all-recursive
+
+.SUFFIXES:
+$(srcdir)/Makefile.in:  $(srcdir)/Makefile.am  $(am__configure_deps)
+#>- 	@for dep in $?; do \
+#>- 	  case '$(am__configure_deps)' in \
+#>- 	    *$$dep*) \
+#>- 	      cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh \
+#>- 		&& exit 0; \
+#>- 	      exit 1;; \
+#>- 	  esac; \
+#>- 	done; \
+#>- 	echo ' cd $(top_srcdir) && $(AUTOMAKE) --gnu  src/progs/sdcdb/Makefile'; \
+#>- 	cd $(top_srcdir) && \
+#>- 	  $(AUTOMAKE) --gnu  src/progs/sdcdb/Makefile
+#>+ 12
+	@for dep in $?; do \
+	  case '$(am__configure_deps)' in \
+	    *$$dep*) \
+	      cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh \
+		&& exit 0; \
+	      exit 1;; \
+	  esac; \
+	done; \
+	echo ' cd $(top_srcdir) && $(AUTOMAKE) --gnu  src/progs/sdcdb/Makefile'; \
+	cd $(top_srcdir) && \
+	  $(AUTOMAKE) --gnu  src/progs/sdcdb/Makefile
+	cd $(top_srcdir) && perl admin/am_edit src/progs/sdcdb/Makefile.in
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+	@case '$?' in \
+	  *config.status*) \
+	    cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+	  *) \
+	    echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
+	    cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \
+	esac;
+
+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
+	cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+$(top_srcdir)/configure:  $(am__configure_deps)
+	cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+$(ACLOCAL_M4):  $(am__aclocal_m4_deps)
+	cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+mostlyclean-libtool:
+	-rm -f *.lo
+
+clean-libtool:
+	-rm -rf .libs _libs
+
+distclean-libtool:
+	-rm -f libtool
+uninstall-info-am:
+
+# This directory's subdirectories are mostly independent; you can cd
+# into them and run `make' without going through this Makefile.
+# To change the values of `make' variables: instead of editing Makefiles,
+# (1) if the variable is set in `config.status', edit `config.status'
+#     (which will cause the Makefiles to be regenerated when you run `make');
+# (2) otherwise, pass the desired values on the `make' command line.
+$(RECURSIVE_TARGETS):
+	@failcom='exit 1'; \
+	for f in x $$MAKEFLAGS; do \
+	  case $$f in \
+	    *=* | --[!k]*);; \
+	    *k*) failcom='fail=yes';; \
+	  esac; \
+	done; \
+	dot_seen=no; \
+	target=`echo $@ | sed s/-recursive//`; \
+	list='$(SUBDIRS)'; for subdir in $$list; do \
+	  echo "Making $$target in $$subdir"; \
+	  if test "$$subdir" = "."; then \
+	    dot_seen=yes; \
+	    local_target="$$target-am"; \
+	  else \
+	    local_target="$$target"; \
+	  fi; \
+	  (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
+	  || eval $$failcom; \
+	done; \
+	if test "$$dot_seen" = "no"; then \
+	  $(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \
+	fi; test -z "$$fail"
+
+mostlyclean-recursive clean-recursive distclean-recursive \
+maintainer-clean-recursive:
+	@failcom='exit 1'; \
+	for f in x $$MAKEFLAGS; do \
+	  case $$f in \
+	    *=* | --[!k]*);; \
+	    *k*) failcom='fail=yes';; \
+	  esac; \
+	done; \
+	dot_seen=no; \
+	case "$@" in \
+	  distclean-* | maintainer-clean-*) list='$(DIST_SUBDIRS)' ;; \
+	  *) list='$(SUBDIRS)' ;; \
+	esac; \
+	rev=''; for subdir in $$list; do \
+	  if test "$$subdir" = "."; then :; else \
+	    rev="$$subdir $$rev"; \
+	  fi; \
+	done; \
+	rev="$$rev ."; \
+	target=`echo $@ | sed s/-recursive//`; \
+	for subdir in $$rev; do \
+	  echo "Making $$target in $$subdir"; \
+	  if test "$$subdir" = "."; then \
+	    local_target="$$target-am"; \
+	  else \
+	    local_target="$$target"; \
+	  fi; \
+	  (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
+	  || eval $$failcom; \
+	done && test -z "$$fail"
+tags-recursive:
+	list='$(SUBDIRS)'; for subdir in $$list; do \
+	  test "$$subdir" = . || (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) tags); \
+	done
+ctags-recursive:
+	list='$(SUBDIRS)'; for subdir in $$list; do \
+	  test "$$subdir" = . || (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) ctags); \
+	done
+
+ID: $(HEADERS) $(SOURCES) $(LISP) $(TAGS_FILES)
+	list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+	unique=`for i in $$list; do \
+	    if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+	  done | \
+	  $(AWK) '    { files[$$0] = 1; } \
+	       END { for (i in files) print i; }'`; \
+	mkid -fID $$unique
+tags: TAGS
+
+TAGS: tags-recursive $(HEADERS) $(SOURCES)  $(TAGS_DEPENDENCIES) \
+		$(TAGS_FILES) $(LISP)
+	tags=; \
+	here=`pwd`; \
+	if ($(ETAGS) --etags-include --version) >/dev/null 2>&1; then \
+	  include_option=--etags-include; \
+	  empty_fix=.; \
+	else \
+	  include_option=--include; \
+	  empty_fix=; \
+	fi; \
+	list='$(SUBDIRS)'; for subdir in $$list; do \
+	  if test "$$subdir" = .; then :; else \
+	    test ! -f $$subdir/TAGS || \
+	      tags="$$tags $$include_option=$$here/$$subdir/TAGS"; \
+	  fi; \
+	done; \
+	list='$(SOURCES) $(HEADERS)  $(LISP) $(TAGS_FILES)'; \
+	unique=`for i in $$list; do \
+	    if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+	  done | \
+	  $(AWK) '    { files[$$0] = 1; } \
+	       END { for (i in files) print i; }'`; \
+	if test -z "$(ETAGS_ARGS)$$tags$$unique"; then :; else \
+	  test -n "$$unique" || unique=$$empty_fix; \
+	  $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
+	    $$tags $$unique; \
+	fi
+ctags: CTAGS
+CTAGS: ctags-recursive $(HEADERS) $(SOURCES)  $(TAGS_DEPENDENCIES) \
+		$(TAGS_FILES) $(LISP)
+	tags=; \
+	here=`pwd`; \
+	list='$(SOURCES) $(HEADERS)  $(LISP) $(TAGS_FILES)'; \
+	unique=`for i in $$list; do \
+	    if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+	  done | \
+	  $(AWK) '    { files[$$0] = 1; } \
+	       END { for (i in files) print i; }'`; \
+	test -z "$(CTAGS_ARGS)$$tags$$unique" \
+	  || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \
+	     $$tags $$unique
+
+GTAGS:
+	here=`$(am__cd) $(top_builddir) && pwd` \
+	  && cd $(top_srcdir) \
+	  && gtags -i $(GTAGS_ARGS) $$here
+
+distclean-tags:
+	-rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags
+
+distdir: $(DISTFILES)
+	@srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`; \
+	topsrcdirstrip=`echo "$(top_srcdir)" | sed 's|.|.|g'`; \
+	list='$(DISTFILES)'; for file in $$list; do \
+	  case $$file in \
+	    $(srcdir)/*) file=`echo "$$file" | sed "s|^$$srcdirstrip/||"`;; \
+	    $(top_srcdir)/*) file=`echo "$$file" | sed "s|^$$topsrcdirstrip/|$(top_builddir)/|"`;; \
+	  esac; \
+	  if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \
+	  dir=`echo "$$file" | sed -e 's,/[^/]*$$,,'`; \
+	  if test "$$dir" != "$$file" && test "$$dir" != "."; then \
+	    dir="/$$dir"; \
+	    $(mkdir_p) "$(distdir)$$dir"; \
+	  else \
+	    dir=''; \
+	  fi; \
+	  if test -d $$d/$$file; then \
+	    if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \
+	      cp -pR $(srcdir)/$$file $(distdir)$$dir || exit 1; \
+	    fi; \
+	    cp -pR $$d/$$file $(distdir)$$dir || exit 1; \
+	  else \
+	    test -f $(distdir)/$$file \
+	    || cp -p $$d/$$file $(distdir)/$$file \
+	    || exit 1; \
+	  fi; \
+	done
+	list='$(DIST_SUBDIRS)'; for subdir in $$list; do \
+	  if test "$$subdir" = .; then :; else \
+	    test -d "$(distdir)/$$subdir" \
+	    || $(mkdir_p) "$(distdir)/$$subdir" \
+	    || exit 1; \
+	    distdir=`$(am__cd) $(distdir) && pwd`; \
+	    top_distdir=`$(am__cd) $(top_distdir) && pwd`; \
+	    (cd $$subdir && \
+	      $(MAKE) $(AM_MAKEFLAGS) \
+	        top_distdir="$$top_distdir" \
+	        distdir="$$distdir/$$subdir" \
+	        distdir) \
+	      || exit 1; \
+	  fi; \
+	done
+check-am: all-am
+check: check-recursive
+all-am: Makefile
+installdirs: installdirs-recursive
+installdirs-am:
+install: install-recursive
+install-exec: install-exec-recursive
+install-data: install-data-recursive
+uninstall: uninstall-recursive
+
+install-am: all-am
+	@$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
+
+installcheck: installcheck-recursive
+install-strip:
+	$(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
+	  install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
+	  `test -z '$(STRIP)' || \
+	    echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install
+mostlyclean-generic:
+
+clean-generic:
+
+distclean-generic:
+	-test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
+
+maintainer-clean-generic:
+	@echo "This command is intended for maintainers to use"
+	@echo "it deletes files that may require special tools to rebuild."
+#>- clean: clean-recursive
+#>+ 1
+clean: kde-rpo-clean  clean-recursive
+
+#>- clean-am: clean-generic clean-libtool mostlyclean-am
+#>+ 1
+clean-am: clean-bcheck  clean-generic clean-libtool mostlyclean-am
+
+distclean: distclean-recursive
+	-rm -f Makefile
+distclean-am: clean-am distclean-generic distclean-libtool \
+	distclean-tags
+
+dvi: dvi-recursive
+
+dvi-am:
+
+html: html-recursive
+
+info: info-recursive
+
+info-am:
+
+install-data-am:
+
+install-exec-am:
+
+install-info: install-info-recursive
+
+install-man:
+
+installcheck-am:
+
+maintainer-clean: maintainer-clean-recursive
+	-rm -f Makefile
+maintainer-clean-am: distclean-am maintainer-clean-generic
+
+mostlyclean: mostlyclean-recursive
+
+mostlyclean-am: mostlyclean-generic mostlyclean-libtool
+
+pdf: pdf-recursive
+
+pdf-am:
+
+ps: ps-recursive
+
+ps-am:
+
+uninstall-am: uninstall-info-am
+
+uninstall-info: uninstall-info-recursive
+
+.PHONY: $(RECURSIVE_TARGETS) CTAGS GTAGS all all-am check check-am \
+	clean clean-generic clean-libtool clean-recursive ctags \
+	ctags-recursive distclean distclean-generic distclean-libtool \
+	distclean-recursive distclean-tags distdir dvi dvi-am html \
+	html-am info info-am install install-am install-data \
+	install-data-am install-exec install-exec-am install-info \
+	install-info-am install-man install-strip installcheck \
+	installcheck-am installdirs installdirs-am maintainer-clean \
+	maintainer-clean-generic maintainer-clean-recursive \
+	mostlyclean mostlyclean-generic mostlyclean-libtool \
+	mostlyclean-recursive pdf pdf-am ps ps-am tags tags-recursive \
+	uninstall uninstall-am uninstall-info-am
+
+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
+
+#>+ 2
+KDE_DIST=Makefile.in sdcdb.pro Makefile.am 
+
+#>+ 2
+docs-am:
+
+#>+ 15
+force-reedit:
+		@for dep in $?; do \
+	  case '$(am__configure_deps)' in \
+	    *$$dep*) \
+	      cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh \
+		&& exit 0; \
+	      exit 1;; \
+	  esac; \
+	done; \
+	echo ' cd $(top_srcdir) && $(AUTOMAKE) --gnu  src/progs/sdcdb/Makefile'; \
+	cd $(top_srcdir) && \
+	  $(AUTOMAKE) --gnu  src/progs/sdcdb/Makefile
+	cd $(top_srcdir) && perl admin/am_edit src/progs/sdcdb/Makefile.in
+
+
+#>+ 21
+clean-bcheck: 
+	rm -f *.bchecktest.cc *.bchecktest.cc.class a.out
+
+bcheck: bcheck-recursive
+
+bcheck-am:
+	@for i in ; do \
+	    if test $(srcdir)/$$i -nt $$i.bchecktest.cc; then \
+	        echo "int main() {return 0;}" > $$i.bchecktest.cc ; \
+	        echo "#include \"$$i\"" >> $$i.bchecktest.cc ; \
+	        echo "$$i"; \
+	        if ! $(CXX) $(DEFS) -I. -I$(srcdir) -I$(top_builddir) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(CXXFLAGS) $(KDE_CXXFLAGS)  --dump-class-hierarchy -c $$i.bchecktest.cc; then \
+	            rm -f $$i.bchecktest.cc; exit 1; \
+	        fi ; \
+	        echo "" >> $$i.bchecktest.cc.class; \
+	        perl $(top_srcdir)/admin/bcheck.pl $$i.bchecktest.cc.class || { rm -f $$i.bchecktest.cc; exit 1; }; \
+	        rm -f a.out; \
+	    fi ; \
+	done
+
+
+#>+ 3
+final:
+	$(MAKE) all-am
+
+#>+ 3
+final-install:
+	$(MAKE) install-am
+
+#>+ 3
+no-final:
+	$(MAKE) all-am
+
+#>+ 3
+no-final-install:
+	$(MAKE) install-am
+
+#>+ 3
+kde-rpo-clean:
+	-rm -f *.rpo
+
+#>+ 3
+nmcheck: 
+nmcheck-am: nmcheck
diff --git a/src/progs/sdcdb/Makefile.am b/src/progs/sdcdb/Makefile.am
new file mode 100644
index 0000000..490a53d
--- /dev/null
+++ b/src/progs/sdcdb/Makefile.am
@@ -0,0 +1,3 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+SUBDIRS = base gui
diff --git a/src/progs/sdcdb/base/Makefile b/src/progs/sdcdb/base/Makefile
new file mode 100644
index 0000000..a2e6af5
--- /dev/null
+++ b/src/progs/sdcdb/base/Makefile
@@ -0,0 +1,724 @@
+# Makefile.in generated by automake 1.9.6 from Makefile.am.
+# KDE tags expanded automatically by am_edit - $Revision: 877 $ 
+# src/progs/sdcdb/base/Makefile.  Generated from Makefile.in by configure.
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005  Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+
+
+srcdir = .
+top_srcdir = ../../../..
+
+pkgdatadir = $(datadir)/piklab
+pkglibdir = $(libdir)/piklab
+pkgincludedir = $(includedir)/piklab
+top_builddir = ../../../..
+am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
+INSTALL = /usr/bin/install -c -p
+install_sh_DATA = $(install_sh) -c -m 644
+install_sh_PROGRAM = $(install_sh) -c
+install_sh_SCRIPT = $(install_sh) -c
+INSTALL_HEADER = $(INSTALL_DATA)
+transform = $(program_transform_name)
+NORMAL_INSTALL = :
+PRE_INSTALL = :
+POST_INSTALL = :
+NORMAL_UNINSTALL = :
+PRE_UNINSTALL = :
+POST_UNINSTALL = :
+build_triplet = i486-pc-linux-gnu
+host_triplet = i486-pc-linux-gnu
+target_triplet = i486-pc-linux-gnu
+subdir = src/progs/sdcdb/base
+DIST_COMMON = $(srcdir)/Makefile.am $(srcdir)/Makefile.in
+ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
+am__aclocal_m4_deps = $(top_srcdir)/acinclude.m4 \
+	$(top_srcdir)/configure.in
+am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
+	$(ACLOCAL_M4)
+mkinstalldirs = $(SHELL) $(top_srcdir)/admin/mkinstalldirs
+CONFIG_HEADER = $(top_builddir)/config.h
+CONFIG_CLEAN_FILES =
+LTLIBRARIES = $(noinst_LTLIBRARIES)
+libsdcdb_la_LIBADD =
+am_libsdcdb_la_OBJECTS = sdcdb.lo sdcdb_debug.lo
+#>- libsdcdb_la_OBJECTS = $(am_libsdcdb_la_OBJECTS)
+#>+ 5
+libsdcdb_la_final_OBJECTS = libsdcdb_la.all_cpp.lo 
+libsdcdb_la_nofinal_OBJECTS = sdcdb.lo sdcdb_debug.lo\
+sdcdb_debug.moc.lo 
+libsdcdb_la_OBJECTS = $(libsdcdb_la_nofinal_OBJECTS)
+#libsdcdb_la_OBJECTS = $(libsdcdb_la_final_OBJECTS)
+DEFAULT_INCLUDES = -I. -I$(srcdir) -I$(top_builddir)
+depcomp = $(SHELL) $(top_srcdir)/admin/depcomp
+am__depfiles_maybe = depfiles
+#>- CXXCOMPILE = $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) \
+#>- 	$(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CXXFLAGS) $(CXXFLAGS)
+#>+ 2
+CXXCOMPILE = $(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) \
+	$(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CXXFLAGS) $(CXXFLAGS) $(KDE_CXXFLAGS)
+#>- LTCXXCOMPILE = $(LIBTOOL) --tag=CXX --mode=compile $(CXX) $(DEFS) \
+#>- 	$(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) \
+#>- 	$(AM_CXXFLAGS) $(CXXFLAGS)
+#>+ 3
+LTCXXCOMPILE = $(LIBTOOL) --tag=CXX --mode=compile $(CXX) $(DEFS) \
+	$(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) \
+	$(AM_CXXFLAGS) $(CXXFLAGS) $(KDE_CXXFLAGS)
+CXXLD = $(CXX)
+#>- CXXLINK = $(LIBTOOL) --tag=CXX --mode=link $(CXXLD) $(AM_CXXFLAGS) \
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+	install install-am install-data install-data-am install-exec \
+	install-exec-am install-info install-info-am install-man \
+	install-strip installcheck installcheck-am installdirs \
+	maintainer-clean maintainer-clean-generic mostlyclean \
+	mostlyclean-compile mostlyclean-generic mostlyclean-libtool \
+	pdf pdf-am ps ps-am tags uninstall uninstall-am \
+	uninstall-info-am
+
+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
+
+#>+ 3
+sdcdb_debug.moc.cpp: $(srcdir)/sdcdb_debug.h
+	$(MOC) $(srcdir)/sdcdb_debug.h -o sdcdb_debug.moc.cpp
+
+#>+ 2
+mocs: sdcdb_debug.moc.cpp
+
+#>+ 3
+clean-metasources:
+	-rm -f  sdcdb_debug.moc.cpp
+
+#>+ 2
+KDE_DIST=base.pro Makefile.in sdcdb_debug.h Makefile.am 
+
+#>+ 2
+docs-am:
+
+#>+ 15
+force-reedit:
+		@for dep in $?; do \
+	  case '$(am__configure_deps)' in \
+	    *$$dep*) \
+	      cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh \
+		&& exit 0; \
+	      exit 1;; \
+	  esac; \
+	done; \
+	echo ' cd $(top_srcdir) && $(AUTOMAKE) --gnu  src/progs/sdcdb/base/Makefile'; \
+	cd $(top_srcdir) && \
+	  $(AUTOMAKE) --gnu  src/progs/sdcdb/base/Makefile
+	cd $(top_srcdir) && perl admin/am_edit src/progs/sdcdb/base/Makefile.in
+
+
+#>+ 21
+clean-bcheck: 
+	rm -f *.bchecktest.cc *.bchecktest.cc.class a.out
+
+bcheck: bcheck-am
+
+bcheck-am:
+	@for i in ; do \
+	    if test $(srcdir)/$$i -nt $$i.bchecktest.cc; then \
+	        echo "int main() {return 0;}" > $$i.bchecktest.cc ; \
+	        echo "#include \"$$i\"" >> $$i.bchecktest.cc ; \
+	        echo "$$i"; \
+	        if ! $(CXXCOMPILE)  --dump-class-hierarchy -c $$i.bchecktest.cc; then \
+	            rm -f $$i.bchecktest.cc; exit 1; \
+	        fi ; \
+	        echo "" >> $$i.bchecktest.cc.class; \
+	        perl $(top_srcdir)/admin/bcheck.pl $$i.bchecktest.cc.class || { rm -f $$i.bchecktest.cc; exit 1; }; \
+	        rm -f a.out; \
+	    fi ; \
+	done
+
+
+#>+ 11
+libsdcdb_la.all_cpp.cpp: $(srcdir)/Makefile.in sdcdb.cpp $(srcdir)/sdcdb_debug.cpp sdcdb_debug.moc.cpp 
+	@echo 'creating libsdcdb_la.all_cpp.cpp ...'; \
+	rm -f libsdcdb_la.all_cpp.files libsdcdb_la.all_cpp.final; \
+	echo "#define KDE_USE_FINAL 1" >> libsdcdb_la.all_cpp.final; \
+	for file in sdcdb.cpp sdcdb_debug.cpp sdcdb_debug.moc.cpp ; do \
+	  echo "#include \"$$file\"" >> libsdcdb_la.all_cpp.files; \
+	  test ! -f $(srcdir)/$$file || egrep '^#pragma +implementation' $(srcdir)/$$file >> libsdcdb_la.all_cpp.final; \
+	done; \
+	cat libsdcdb_la.all_cpp.final libsdcdb_la.all_cpp.files > libsdcdb_la.all_cpp.cpp; \
+	rm -f libsdcdb_la.all_cpp.final libsdcdb_la.all_cpp.files
+
+#>+ 3
+clean-final:
+	-rm -f libsdcdb_la.all_cpp.cpp
+
+#>+ 3
+final:
+	$(MAKE) libsdcdb_la_OBJECTS="$(libsdcdb_la_final_OBJECTS)" all-am
+
+#>+ 3
+final-install:
+	$(MAKE) libsdcdb_la_OBJECTS="$(libsdcdb_la_final_OBJECTS)" install-am
+
+#>+ 3
+no-final:
+	$(MAKE) libsdcdb_la_OBJECTS="$(libsdcdb_la_nofinal_OBJECTS)" all-am
+
+#>+ 3
+no-final-install:
+	$(MAKE) libsdcdb_la_OBJECTS="$(libsdcdb_la_nofinal_OBJECTS)" install-am
+
+#>+ 3
+kde-rpo-clean:
+	-rm -f *.rpo
+
+#>+ 3
+nmcheck: 
+nmcheck-am: nmcheck
diff --git a/src/progs/sdcdb/base/Makefile.am b/src/progs/sdcdb/base/Makefile.am
new file mode 100644
index 0000000..4ceb14f
--- /dev/null
+++ b/src/progs/sdcdb/base/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libsdcdb.la
+libsdcdb_la_LDFLAGS = $(all_libraries)
+libsdcdb_la_SOURCES = sdcdb.cpp sdcdb_debug.cpp
diff --git a/src/progs/sdcdb/base/base.pro b/src/progs/sdcdb/base/base.pro
new file mode 100644
index 0000000..c01db02
--- /dev/null
+++ b/src/progs/sdcdb/base/base.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = sdcdb
+HEADERS += sdcdb.h sdcdb_debug.h
+SOURCES += sdcdb.cpp sdcdb_debug.cpp
diff --git a/src/progs/sdcdb/base/sdcdb_debug.cpp b/src/progs/sdcdb/base/sdcdb_debug.cpp
new file mode 100644
index 0000000..fcccf22
--- /dev/null
+++ b/src/progs/sdcdb/base/sdcdb_debug.cpp
@@ -0,0 +1,281 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "gpsim_debug.h"
+
+#include <signal.h>
+#include <qregexp.h>
+
+#include "devices/list/device_list.h"
+#include "devices/pic/pic/pic_debug.h"
+#include "devices/pic/base/pic_register.h"
+#include "coff/base/coff.h"
+
+//----------------------------------------------------------------------------
+GPSim::Debugger::Debugger(Programmer &programmer)
+  : ::Debugger::PicBase(programmer), _nbBreakpoints(0)
+{}
+
+bool GPSim::Debugger::internalInit()
+{
+  if ( !hardware()->execute("processor pic" + device()->name().lower(), true) ) return false;
+  if ( _inputType==PURL::Cod ) return hardware()->execute("load s " + _filename, true);
+  Q_ASSERT( _inputType==PURL::Hex );
+  return hardware()->execute("load h " + _filename, true);
+}
+
+bool GPSim::Debugger::internalRun()
+{
+  return hardware()->execute("run", false);
+}
+
+bool GPSim::Debugger::hardHalt()
+{
+  log(Log::Warning, i18n("Failed to halt target: kill process."));
+  _programmer.disconnectHardware();
+  return true;
+}
+
+bool GPSim::Debugger::softHalt(bool &success)
+{
+  success = hardware()->signal(SIGINT, true);
+  return true;
+}
+
+bool GPSim::Debugger::internalStep()
+{
+  return hardware()->execute("step", true);
+}
+
+bool GPSim::Debugger::setBreakpoints(const QValueList<Address> &list)
+{
+  for (uint i=0; i<_nbBreakpoints; i++)
+    if ( !hardware()->execute("clear " + QString::number(i), true) ) return false;
+  for (uint i=0; i<uint(list.count()); i++)
+    if ( !hardware()->execute("break e 0x" + toHex(list[i], nbChars(list[i].toUInt())), true) ) return false;
+  _nbBreakpoints = list.count();
+  return true;
+}
+
+bool GPSim::Debugger::internalReset()
+{
+  if ( _programmer.state()==::Programmer::Running && !halt() ) return false;
+  return hardware()->execute("reset", true);
+}
+
+bool GPSim::Debugger::updateState()
+{
+  if ( hardware()->isReady() ) _programmer.setState(::Programmer::Halted);
+  else _programmer.setState(::Programmer::Running);
+  return true;
+}
+
+bool GPSim::Debugger::findRegExp(const QStringList &lines, const QString &pattern,
+                                 const QString &label, QString &value) const
+{
+  QRegExp rexp(pattern);
+  uint i = 0;
+  for (; i<uint(lines.count()); i++) {
+    int offset = 0;
+    for (;;) {
+      offset = rexp.search(lines[i], offset, QRegExp::CaretAtOffset);
+      if ( offset==-1 || rexp.cap(1)==label ) break;
+      offset += rexp.cap(0).length();
+    }
+    if ( offset!=-1 ) break;
+  }
+  if ( i==uint(lines.count()) ) return false;
+  value = rexp.cap(2);
+  return true;
+}
+
+bool GPSim::Debugger::readWreg(BitValue &value)
+{
+  // #### only known for version 4 and 11
+  if ( hardware()->version()<=VersionData(0, 21, 7) || hardware()->version()>=VersionData(0, 22, 0) )
+    return getRegister("W", value);
+  QStringList lines;
+  if ( !hardware()->execute("dump s", true, &lines) ) return false;
+  QString s;
+  if ( !findRegExp(lines, "^\\s*[0-9A-Fa-f]+\\s+(\\w+)\\s*=\\s*([0-9A-Fa-f]+)", "W", s) ) {
+    log(Log::Error, i18n("Error reading register \"W\""));
+    return false;
+  }
+  value = fromHex(s, 0);
+  return true;
+}
+
+bool GPSim::Debugger::getRegister(const QString &name, BitValue &value)
+{
+  QStringList lines;
+  QRegExp r;
+  if ( hardware()->version()<VersionData(0, 22, 0) ) {
+    if ( !hardware()->execute("x " + name, true, &lines) ) return false;
+    r.setPattern("\\w+\\s*[][\\w]+\\s*=\\s*(?:0x|)([0-9A-Fa-f]+)(?:\\W.*|)");
+  } else {
+    if ( !hardware()->execute(name, true, &lines) ) return false;
+    r.setPattern("[^=]*=\\s*(?:0x|\\$)([0-9A-Fa-f]+)(?:\\W.*|)");
+  }
+  uint i = 0;
+  for (; i<uint(lines.count()); i++)
+    if ( r.exactMatch(lines[i]) ) break;
+  if ( i==uint(lines.count()) ) {
+    log(Log::Error, i18n("Error reading register \"%1\"").arg(name));
+    return false;
+  }
+  value = fromHex(r.cap(1), 0);
+  return true;
+}
+
+bool GPSim::Debugger::getRegister(Address address, BitValue &value)
+{
+  const Pic::RegistersData &rdata = device()->registersData();
+  QString name = toHex(address, rdata.nbCharsAddress());
+  if ( hardware()->version()<VersionData(0, 22, 0) ) return getRegister("0x" + name, value);
+  return getRegister(QString("ramData[$%1]").arg(name), value);
+}
+
+bool GPSim::Debugger::readRegister(const Register::TypeData &data, BitValue &value)
+{
+  if ( data.type()==Register::Special ) {
+    if ( data.name()=="WREG" ) return readWreg(value);
+    if ( data.name()=="PC" ) return getRegister("pc", value);
+    Q_ASSERT(false);
+    return true;
+  }
+  QString name = device()->registersData().sfrNames[data.address()];
+  if ( name=="WREG" ) return readWreg(value);
+  if ( !name.isEmpty() ) return getRegister(name.lower(), value);
+  return getRegister(data.address(), value);
+}
+
+bool GPSim::Debugger::setRegister(const QString &name, BitValue value)
+{
+  if ( hardware()->version()<VersionData(0, 22, 0) ) {
+    log(Log::Warning, i18n("Writing registers is not supported by this version of gpsim"));
+    return true;
+  }
+  const Pic::RegistersData &rdata = device()->registersData();
+  QString s = QString("%1 = %2").arg(name).arg(toHexLabel(value, rdata.nbChars()));
+  return hardware()->execute(s, true);
+}
+
+bool GPSim::Debugger::setRegister(Address address, BitValue value)
+{
+  const Pic::RegistersData &rdata = device()->registersData();
+  QString s = QString("ramData[$%1]").arg(toHex(address, rdata.nbCharsAddress()));
+  return setRegister(s, value);
+}
+
+bool GPSim::Debugger::writeRegister(const Register::TypeData &data, BitValue value)
+{
+  if ( data.type()==Register::Special ) {
+    if ( data.name()=="WREG" ) return writeWreg(value);
+    if ( data.name()=="PC" ) {
+      log(Log::Warning, i18n("Writing PC is not supported by gpsim"));
+      return true;
+    }
+    Q_ASSERT(false);
+    return false;
+  }
+  const Pic::RegistersData &rdata = device()->registersData();
+  QString name = rdata.sfrNames[data.address()];
+  if ( !name.isEmpty() ) return setRegister(name.lower(), value);
+  return setRegister(data.address(), value);
+}
+
+bool GPSim::Debugger::writeWreg(BitValue value)
+{
+  return setRegister("W", value);
+}
+
+bool GPSim::Debugger::updatePortStatus(uint index, QMap<uint, Device::PortBitData> &bits)
+{
+  for (uint i=0; i<Device::MAX_NB_PORT_BITS; i++) {
+    if ( !device()->registersData().hasPortBit(index, i) ) continue;
+    QString name = device()->registersData().portName(index).lower() + QString::number(i);
+    QStringList lines;
+    if ( !hardware()->execute("symbol " + name, true, &lines) ) return false;
+    QString pattern = "^(\\w+)=([^\\s])+\\s*", value;
+    if ( !findRegExp(lines, pattern, "bitState", value) || value.length()!=1 ) {
+      log(Log::Error, i18n("Error reading state of IO bit: %1").arg(name));
+      return false;
+    }
+    switch (value[0].latin1()) {
+      case 'H':
+      case '1': bits[i].state = Device::High; break;
+      case 'L':
+      case '0': bits[i].state = Device::Low; break;
+      case 'W': bits[i].state = Device::WeakPullUp; break;
+      case 'w': bits[i].state = Device::WeakPullDown; break;
+      case 'Z': bits[i].state = Device::HighImpedance; break;
+      case 'X': bits[i].state = Device::Unknown; break;
+      default:
+        bits[i].state = Device::Unknown;
+        log(Log::Warning, i18n("Unknown state for IO bit: %1 (%2)").arg(name).arg(value));
+        break;
+    }
+    if ( !findRegExp(lines, pattern, "Driving", value) || value.length()!=1 ) {
+      log(Log::Error, i18n("Error reading driving state of IO bit: %1").arg(name));
+      return false;
+    }
+    bits[i].driving = ( value[0]=='1' );
+    if (bits[i].driving) {
+      if ( !findRegExp(lines, pattern, "drivingState", value) || value.length()!=1 ) {
+        log(Log::Error, i18n("Error reading driving state of IO bit: %1").arg(name));
+        return false;
+      }
+      bits[i].drivingState = (value[0]=='0' ? Device::IoLow : Device::IoHigh);
+      bits[i].drivenState = Device::IoUnknown;
+    } else {
+      if ( !findRegExp(lines, pattern, "drivenState", value) || value.length()!=1 ) {
+        log(Log::Error, i18n("Error reading driven state of IO bit: %1").arg(name));
+        return false;
+      }
+      bits[i].drivenState = (value[0]=='0' ? Device::IoLow : Device::IoHigh);
+      bits[i].drivingState = Device::IoUnknown;
+    }
+  }
+  return true;
+}
+
+//----------------------------------------------------------------------------
+QString GPSim::Group::statusLabel() const
+{
+  return i18n("GPSim (4MHz)"); // #### FIXME: add config
+}
+
+void GPSim::Group::initSupported()
+{
+  ProcessManager manager(0);
+  if ( !manager.start() ) return;
+  VersionData version;
+  if ( !manager.getVersion(version) ) return;
+  bool oldGpsim = ( version<VersionData(0, 21, 11) );
+  if ( !manager.sendCommand("processor list", true) ) return;
+  QStringList devices = QStringList::split(" ", manager.process().sout().join(" "));
+  for (uint i=0; i<uint(devices.count()); i++) {
+    QString s = devices[i].upper();
+    if ( s.startsWith("PIC") ) s = s.mid(3);
+    const Pic::Data *data = static_cast<const Pic::Data *>(Device::lister().data(s));
+    if (data) {
+      if ( data->architecture()==Pic::Architecture::P18F && oldGpsim ) continue;
+      addDevice(data->name(), data, ::Group::Tested);
+    }
+  }
+}
+
+Programmer::Hardware *GPSim::Group::createHardware(::Programmer::Base &base, const ::Programmer::HardwareDescription &) const
+{
+  return new Hardware(base);
+}
+
+Programmer::DeviceSpecific *GPSim::Group::createDeviceSpecific(::Programmer::Base &base) const
+{
+  return new DeviceSpecific(base);
+}
diff --git a/src/progs/sdcdb/base/sdcdb_debug.h b/src/progs/sdcdb/base/sdcdb_debug.h
new file mode 100644
index 0000000..55cda75
--- /dev/null
+++ b/src/progs/sdcdb/base/sdcdb_debug.h
@@ -0,0 +1,95 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef SDCDB_DEBUG_H
+#define SDCDB_DEBUG_H
+
+#include "sdcdb.h"
+#include "devices/pic/pic/pic_prog.h"
+#include "devices/pic/pic/pic_debug.h"
+
+namespace SDCDB
+{
+//-----------------------------------------------------------------------------
+class Programmer : public ::Programmer::PicBase
+{
+Q_OBJECT
+public:
+  Programmer(const ::Programmer::Group &group, const Pic::Data *data)
+   : Programmer::PicBase(group, data, "sdcdb_programmer") {}
+
+private:
+  virtual VersionData minVersion() const { return VersionData(0, 8, 0); }
+  virtual bool verifyDeviceId() { return true; }
+  virtual bool checkErase() { return false; }
+  virtual bool internalErase(const Device::MemoryRange &) { return false; }
+  virtual bool checkRead() { return false; }
+  virtual bool internalRead(Device::Memory &, const Device::MemoryRange &) { return false; }
+  virtual bool checkProgram(const Device::Memory &) { return false; }
+  virtual bool internalProgram(const Device::Memory &, const Device::MemoryRange &) { return false; }
+  virtual bool checkVerify() { return false; }
+  virtual bool internalVerify(const Device::Memory &, const Device::MemoryRange &, ::Programmer::VerifyActions) { return false; }
+};
+
+//-----------------------------------------------------------------------------
+class Debugger : public ::Debugger::PicBase
+{
+public:
+  Debugger(Programmer &programmer);
+  virtual bool setBreakpoints(const QValueList<Address> &list);
+  virtual bool readRegister(const Register::TypeData &data, BitValue &value);
+  virtual bool writeRegister(const Register::TypeData &data, BitValue value);
+  virtual bool updatePortStatus(uint index, QMap<uint, Device::PortBitData> &bits);
+
+private:
+  uint _nbBreakpoints;
+
+  bool findRegExp(const QStringList &lines, const QString &pattern,
+                  const QString &label, QString &value) const;
+  bool getRegister(const QString &name, BitValue &value);
+  bool setRegister(const QString &name, BitValue value);
+  bool getRegister(Address address, BitValue &value);
+  bool setRegister(Address address, BitValue value);
+  Hardware *hardware() { return static_cast<Hardware *>(_programmer.hardware()); }
+  const Pic::Data *device() const { return static_cast<const Pic::Data *>(_programmer.device()); }
+  virtual bool internalInit();
+  virtual bool updateState();
+  virtual bool internalRun();
+  virtual bool internalStep();
+  virtual bool softHalt(bool &success);
+  virtual bool hardHalt();
+  virtual bool internalReset();
+  bool readWreg(BitValue &value);
+  bool writeWreg(BitValue value);
+};
+
+//-----------------------------------------------------------------------------
+class Group : public ::Programmer::PicGroup
+{
+public:
+  virtual QString name() const { return "sdcdb"; }
+  virtual QString label() const { return i18n("SDCDB"); }
+  virtual QString statusLabel() const;
+  virtual ::Programmer::Properties properties() const { return ::Programmer::Debugger | ::Programmer::HasConnectedState; }
+  virtual ::Programmer::TargetPowerMode targetPowerMode() const { return ::Programmer::TargetSelfPowered; }
+  virtual bool isPortSupported(Port::Type) const { return false; }
+  virtual uint maxNbBreakpoints(const Device::Data *) const { return 100; }
+  virtual bool isInputFileTypeSupported(PURL::FileType type) const { return ( type==PURL::Cod || type==PURL::Hex ); }
+
+protected:
+  virtual void initSupported();
+  virtual ::Programmer::Base *createBase(const Device::Data *data) const { return new Programmer(*this, static_cast<const Pic::Data *>(data)); }
+  virtual ::Programmer::Hardware *createHardware(::Programmer::Base &base, const ::Programmer::HardwareDescription &hd) const;
+  virtual ::Programmer::DeviceSpecific *createDeviceSpecific(::Programmer::Base &base) const;
+  virtual ::Debugger::Base *createDebuggerBase(::Programmer::Base &base) const { return new Debugger(static_cast<Programmer &>(base)); }
+  virtual ::Debugger::Specific *createDebuggerSpecific(::Debugger::Base &) const { return 0; }
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/sdcdb/sdcdb.pro b/src/progs/sdcdb/sdcdb.pro
new file mode 100644
index 0000000..fe430fe
--- /dev/null
+++ b/src/progs/sdcdb/sdcdb.pro
@@ -0,0 +1,2 @@
+TEMPLATE = subdirs
+SUBDIRS = base
diff --git a/src/progs/tbl_bootloader/Makefile.am b/src/progs/tbl_bootloader/Makefile.am
new file mode 100644
index 0000000..fccf96d
--- /dev/null
+++ b/src/progs/tbl_bootloader/Makefile.am
@@ -0,0 +1,3 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+SUBDIRS = xml base gui
diff --git a/src/progs/tbl_bootloader/base/Makefile.am b/src/progs/tbl_bootloader/base/Makefile.am
new file mode 100644
index 0000000..60b11bc
--- /dev/null
+++ b/src/progs/tbl_bootloader/base/Makefile.am
@@ -0,0 +1,11 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libtblbootloader.la
+libtblbootloader_la_SOURCES = tbl_bootloader_data.cpp tbl_bootloader.cpp tbl_bootloader_prog.cpp
+libtblbootloader_la_DEPENDENCIES = tbl_bootloader_data.cpp
+
+noinst_DATA = tbl_bootloader.xml
+tbl_bootloader_data.cpp: ../xml/xml_tbl_bootloader_parser tbl_bootloader.xml
+	../xml/xml_tbl_bootloader_parser
+CLEANFILES = tbl_bootloader_data.cpp
diff --git a/src/progs/tbl_bootloader/base/base.pro b/src/progs/tbl_bootloader/base/base.pro
new file mode 100644
index 0000000..1ccb8e9
--- /dev/null
+++ b/src/progs/tbl_bootloader/base/base.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = tbl_bootloader
+HEADERS += tbl_bootloader_data.h tbl_bootloader.h tbl_bootloader_prog.h
+SOURCES += tbl_bootloader_data.cpp tbl_bootloader.cpp tbl_bootloader_prog.cpp
diff --git a/src/progs/tbl_bootloader/base/tbl_bootloader.cpp b/src/progs/tbl_bootloader/base/tbl_bootloader.cpp
new file mode 100644
index 0000000..419ad86
--- /dev/null
+++ b/src/progs/tbl_bootloader/base/tbl_bootloader.cpp
@@ -0,0 +1,327 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "tbl_bootloader.h"
+
+#include "tbl_bootloader_data.h"
+#include "progs/base/prog_config.h"
+
+//-----------------------------------------------------------------------------
+Port::Serial::Speed TinyBootloader::Config::readSpeed()
+{
+  uint speed = readUIntEntry("port_speed", 19200);
+  for (uint i=0; i<Port::Serial::Nb_Speeds; i++)
+    if ( speed==Port::Serial::SPEED_VALUES[i] ) return Port::Serial::Speed(i);
+  return Port::Serial::S19200;
+}
+void TinyBootloader::Config::writeSpeed(Port::Serial::Speed speed)
+{
+  writeEntry("port_speed", Port::Serial::SPEED_VALUES[speed]);
+}
+
+uint TinyBootloader::Config::readTimeout()
+{
+  return readUIntEntry("timeout", 300);
+}
+void TinyBootloader::Config::writeTimeout(uint timeout)
+{
+  writeEntry("timeout", timeout);
+}
+
+uint TinyBootloader::Config::readRetries()
+{
+  return readUIntEntry("nb_retries", 5);
+}
+void TinyBootloader::Config::writeRetries(uint nb)
+{
+  writeEntry("nb_retries", nb);
+}
+
+//-----------------------------------------------------------------------------
+TinyBootloader::Hardware::Hardware(::Programmer::Base &base, const QString &portDevice)
+  : ::Bootloader::Hardware(base, new Port::Serial(portDevice, Port::Serial::NoProperty, base))
+{
+  Config config;
+  _timeout = config.readTimeout();
+  _retries = config.readRetries();
+}
+
+bool TinyBootloader::Hardware::openPort()
+{
+  if ( !port()->open() ) return false;
+  Config config;
+  if ( !port()->setMode(Port::Serial::IgnoreBreak | Port::Serial::IgnoreParity,
+                        Port::Serial::ByteSize8 | Port::Serial::IgnoreControlLines,
+                        config.readSpeed(), _timeout) )
+    return false;
+  return true;
+}
+
+bool TinyBootloader::Hardware::internalConnectHardware()
+{
+  if ( !openPort() ) return false;
+  // #### possibly do hard (RTS) or soft reset (codes)
+  uchar uc = 0xC1;
+  if ( !port()->sendChar(uc, _timeout) ) return false;
+  if ( !port()->receiveChar((char &)_id, _timeout) ) return false;
+  if ( !waitReady(0) ) return false;
+  return true;
+}
+
+bool TinyBootloader::Hardware::verifyDeviceId()
+{
+  uchar id = data(device().name()).id;
+  QValueVector<QString> list = _base.group().supportedDevices();
+  QStringList devices;
+  for (uint i=0; i<uint(list.count()); i++)
+    if ( _id==data(list[i]).id ) devices.append(list[i]);
+  if ( _id!=id ) {
+    if ( devices.count()==0 ) log(Log::LineType::Error, i18n("Unknown id returned by bootloader (%1 read and %2 expected).").arg(toHexLabel(_id, 2)).arg(toHexLabel(id, 2)));
+    else log(Log::LineType::Error, i18n("Id returned by bootloader corresponds to other devices: %1 (%2 read and %3 expected).").arg(devices.join(" ")).arg(toHexLabel(_id, 2)).arg(toHexLabel(id, 2)));
+    // we can't ask for "continue anyway?" because bootloader can timeout...
+    return false;
+  }
+  log(Log::LineType::Information, "  " + i18n("Bootloader identified device as: %1").arg(devices.join(" ")));
+  return true;
+}
+
+bool TinyBootloader::Hardware::waitReady(bool *checkCRC)
+{
+  char c;
+  if ( !port()->receiveChar(c, _timeout) ) return false;
+  if ( c=='K' ) {
+    if (checkCRC) *checkCRC = true;
+    return true;
+  }
+  if (checkCRC) {
+    *checkCRC = false;
+    if ( c=='N' ) return true;
+    log(Log::LineType::Error, i18n("Received unexpected character ('%1' received; 'K' or 'N' expected).").arg(toPrintable(c, PrintAlphaNum)));
+    return true;
+  }
+  log(Log::LineType::Error, i18n("Received unexpected character ('%1' received; 'K' expected).").arg(toPrintable(c, PrintAlphaNum)));
+  return false;
+}
+
+bool TinyBootloader::Hardware::sendChar(char c, uchar *crc)
+{
+  if (crc) *crc += c;
+  return port()->sendChar(c, 10*_timeout);
+}
+
+bool TinyBootloader::Hardware::sendCodeAddress(uint address, uchar &crc)
+{
+  switch (device().architecture().type()) {
+    case Pic::Architecture::P16X:
+      if ( !sendChar(address >> 8, &crc) ) return false;          // address high
+      if ( !sendChar(address & 0xFF, &crc) ) return false;        // address low
+      break;
+    case Pic::Architecture::P18F:
+      if ( !sendChar(address >> 16, &crc) ) return false;           // address upper
+      if ( !sendChar((address >> 8) & 0xFF, &crc) ) return false;   // address high
+      if ( !sendChar(address & 0xFF, &crc) ) return false;          // address low
+      break;
+    case Pic::Architecture::P30F:
+      if ( !sendChar(address & 0xFF, &crc) ) return false;          // address low
+      if ( !sendChar((address >> 8) & 0xFF, &crc) ) return false;   // address high
+      if ( !sendChar(address >> 16, &crc) ) return false;           // address upper
+      break;
+    default: Q_ASSERT(false); return false;
+  }
+  return true;
+}
+
+bool TinyBootloader::Hardware::endWrite(uchar crc, uint &retries, bool &ok)
+{
+  if ( !sendChar(-crc & 0xFF, 0) ) return false;
+  if ( !waitReady(&ok) ) return false;
+  if ( !ok ) {
+    if ( retries==0 ) {
+      log(Log::LineType::Error, i18n("Too many failures: bailing out."));
+      return false;
+    }
+    retries--;
+    log(Log::LineType::Warning, i18n("CRC error from bootloader: retrying..."));
+  }
+  return true;
+}
+
+bool TinyBootloader::Hardware::writeCode(const Device::Array &data, bool erase)
+{
+  uint nb = data.count() - 100;
+  Device::Array wdata(nb+4);
+
+  // check that there is nothing on top of bootloader
+  for (uint i=nb; i<data.size(); i++) {
+    if ( data[i]==device().mask(Pic::MemoryRangeType::Code) ) continue;
+    uint address = device().addressIncrement(Pic::MemoryRangeType::Code) * i;
+    log(Log::LineType::Warning, "  " + i18n("Code is present in bootloader reserved area (at address %1). It will be ignored.").arg(toHexLabel(address, device().nbCharsAddress())));
+    break;
+  }
+
+  // check first 4 instructions for "goto" and copy them
+  if (erase) {
+    for (uint i=0; i<4; i++) wdata[nb+i] = device().nopInstruction();
+  } else {
+    bool ok = false;
+    for (uint i=0; i<4; i++) {
+      wdata[nb+i] = data[i];
+      if ( !ok && device().isGotoInstruction(data[i]) ) {
+        ok = true;
+        if ( i==3 && device().gotoInstruction(0x0, false).count()==2 )
+          log(Log::LineType::Warning, "  " + i18n("Only the first word of the \"goto\" instruction is into the first four instructions."));
+      }
+    }
+    if ( !ok ) log(Log::LineType::Warning, "  " + i18n("No \"goto\" instruction in the first four instructions."));
+  }
+
+  // place "goto size-100" at reset vector
+  wdata[0] = device().nopInstruction(); // for icd2
+  uint address = device().addressIncrement(Pic::MemoryRangeType::Code) * (nb+4);
+  Device::Array a = device().gotoInstruction(address, true);
+  for (uint i=0; i<a.size(); i++) wdata[1+i] = a[i];
+  // copy the rest
+  for (uint i=4; i<nb; i++) wdata[i] = data[i];
+
+  uint retries = _retries, nbWords = 0x20; // 16F: 64 bytes (80 bytes reserved) ; 18F: 64 bytes ; 30F: 96 bytes
+  Q_ASSERT( (data.count()%nbWords)==0 );
+  for (uint i=0; i<wdata.count(); i+=nbWords) {
+    if ( !erase ) {
+      bool write = false;
+      for (uint k=0; k<nbWords; k++) {
+        if ( wdata[i+k]==device().mask(Pic::MemoryRangeType::Code) ) continue;
+        write = true;
+        break;
+      }
+      if ( !write ) continue; // skip
+    }
+    for (;;) {
+      uchar crc = 0;
+      uint address = device().addressIncrement(Pic::MemoryRangeType::Code) * i;
+      if ( !sendCodeAddress(address, crc) ) return false;
+      uint nbw = device().nbBytesWord(Pic::MemoryRangeType::Code);
+      if ( !sendChar(nbw*nbWords, &crc) ) return false;
+      log(Log::DebugLevel::Normal, QString("write code memory at %1: %2 bytes").arg(toHexLabel(address, 4)).arg(2*nbWords));
+      for(uint k=0; k<nbWords; k++) {
+        if ( !sendChar(wdata[i+k].byte(0), &crc) ) return false;           // data low
+        if ( !sendChar(wdata[i+k].byte(1), &crc) ) return false;           // data high
+        if ( nbw==3 && !sendChar(wdata[i+k].byte(2), &crc) ) return false; // upper byte
+      }
+      bool ok;
+      if ( !endWrite(crc, retries, ok) ) return false;
+      if (ok) break;
+    }
+  }
+  return true;
+}
+
+bool TinyBootloader::Hardware::writeConfig(const Device::Array &data)
+{
+  if ( device().architecture()==Pic::Architecture::P16X ) return false;
+  uint retries = _retries;
+  for (uint i=0; i<data.count(); i++) {
+    for (;;) {
+      uchar crc = 0;
+      Address address = device().range(Pic::MemoryRangeType::Config).start + i;
+      switch (device().architecture().type()) {
+        case Pic::Architecture::P18F:
+          if ( !sendChar(0x80 | address.byte(2), &crc) ) return false; // address upper | flag
+          if ( !sendChar(address.byte(1), &crc) ) return false;        // address high
+          if ( !sendChar(address.byte(0), &crc) ) return false;        // address low
+          if ( !sendChar(1, &crc) ) return false;                       // nb bytes
+          if ( !sendChar(data[i].byte(0), &crc) ) return false;        // data
+          break;
+        case Pic::Architecture::P30F:
+          if ( !sendChar(address.byte(0), &crc) ) return false; // address low
+          if ( !sendChar(address.byte(1), &crc) ) return false; // address high
+          if ( !sendChar(address.byte(2), &crc) ) return false; // address upper
+          if ( !sendChar(2, &crc) ) return false;                // nb bytes
+          if ( !sendChar(data[i].byte(0), &crc) ) return false; // data low
+          if ( !sendChar(data[i].byte(1), &crc) ) return false; // data high
+          break;
+        default: Q_ASSERT(false); return false;
+      }
+      bool ok;
+      if ( !endWrite(crc, retries, ok) ) return false;
+      if (ok) break;
+    }
+  }
+  return true;
+}
+
+bool TinyBootloader::Hardware::writeEeprom(const Device::Array &data)
+{
+  uint retries = _retries;
+  for (uint i=0; i<data.count(); i++) {
+    for (;;) {
+      uchar crc = 0;
+      Address address = device().range(Pic::MemoryRangeType::Config).start + i;
+      switch (device().architecture().type()) {
+        case Pic::Architecture::P16X:
+          if ( !sendChar(0x40, &crc) ) return false;             // flag
+          if ( !sendChar(address.byte(0), &crc) ) return false; // address
+          if ( !sendChar(1, &crc) ) return false;                // nb bytes
+          if ( !sendChar(data[i].byte(0), &crc) ) return false; // data
+          break;
+        case Pic::Architecture::P18F:
+          if ( !sendChar(0x40, &crc) ) return false;             // flag
+          if ( !sendChar(address.byte(0), &crc) ) return false; // address
+          if ( !sendChar(data[i].byte(0), &crc) ) return false; // data
+          if ( !sendChar(0x00, &crc) ) return false;             // dummy
+          break;
+        case Pic::Architecture::P30F:
+          if ( !sendChar(address.byte(0), &crc) ) return false; // address low
+          if ( !sendChar(address.byte(1), &crc) ) return false; // address high
+          if ( !sendChar(address.byte(2), &crc) ) return false; // address upper
+          if ( !sendChar(2, &crc) ) return false;                // nb bytes
+          if ( !sendChar(data[i].byte(0), &crc) ) return false; // data low
+          if ( !sendChar(data[i].byte(1), &crc) ) return false; // data high
+          break;
+        default: Q_ASSERT(false); return false;
+      }
+      bool ok;
+      if ( !endWrite(crc, retries, ok) ) return false;
+      if (ok) break;
+    }
+  }
+  return true;
+}
+
+bool TinyBootloader::Hardware::write(Pic::MemoryRangeType type, const Device::Array &data)
+{
+  Q_ASSERT( data.count()==device().nbWords(type) );
+  if ( type==Pic::MemoryRangeType::Code ) return writeCode(data, false);
+  if ( type==Pic::MemoryRangeType::Config ) return writeConfig(data);
+  if ( type==Pic::MemoryRangeType::Eeprom ) return writeEeprom(data);
+  return false;
+}
+
+//-----------------------------------------------------------------------------
+bool TinyBootloader::DeviceSpecific::canWriteRange(Pic::MemoryRangeType type) const
+{
+  if ( type==Pic::MemoryRangeType::Eeprom || type==Pic::MemoryRangeType::Code ) return true;
+  if ( device().architecture()==Pic::Architecture::P18F && type==Pic::MemoryRangeType::Config ) return true;
+  return false;
+}
+
+bool TinyBootloader::DeviceSpecific::doErase(bool)
+{
+  bool eeprom = readConfigEntry(::Programmer::Config::ProgramEeprom).toBool();
+  if (eeprom) log(Log::LineType::Warning, "  " + i18n("Only code and EEPROM will be erased."));
+  else log(Log::LineType::Warning, "  " + i18n("Only code will be erased."));
+  if ( doEraseRange(Pic::MemoryRangeType::Code)==false ) return false;
+  if ( eeprom && doEraseRange(Pic::MemoryRangeType::Eeprom)==false ) return false;
+  return true;
+}
+
+bool TinyBootloader::DeviceSpecific::doEraseRange(Pic::MemoryRangeType type)
+{
+  Pic::Memory memory(device());
+  if ( type==Pic::MemoryRangeType::Code ) return static_cast<Hardware &>(hardware()).writeCode(memory.arrayForWriting(type), true);
+  return hardware().write(type, memory.arrayForWriting(type));
+}
diff --git a/src/progs/tbl_bootloader/base/tbl_bootloader.h b/src/progs/tbl_bootloader/base/tbl_bootloader.h
new file mode 100644
index 0000000..b6e759f
--- /dev/null
+++ b/src/progs/tbl_bootloader/base/tbl_bootloader.h
@@ -0,0 +1,74 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef TBL_BOOTLOADER_H
+#define TBL_BOOTLOADER_H
+
+#include "progs/bootloader/base/bootloader.h"
+#include "progs/bootloader/base/bootloader_prog.h"
+#include "common/port/serial.h"
+#include "common/global/generic_config.h"
+
+namespace TinyBootloader
+{
+//-----------------------------------------------------------------------------
+class Config : public GenericConfig
+{
+public:
+  Config() : GenericConfig("tiny_bootloader") {}
+  Port::Serial::Speed readSpeed();
+  void writeSpeed(Port::Serial::Speed speed);
+  uint readTimeout(); // ms
+  void writeTimeout(uint timeout); // ms
+  uint readRetries();
+  void writeRetries(uint nb);
+};
+
+//-----------------------------------------------------------------------------
+class Hardware : public ::Bootloader::Hardware
+{
+public:
+  Hardware(::Programmer::Base &base, const QString &portDevice);
+  Port::Serial *port() { return static_cast<Port::Serial *>(_port); }
+  bool verifyDeviceId();
+  virtual bool write(Pic::MemoryRangeType type, const Device::Array &data);
+  virtual bool read(Pic::MemoryRangeType, Device::Array &, const ::Programmer::VerifyData *) { return false; }
+  bool writeCode(const Device::Array &data, bool erase);
+  bool writeConfig(const Device::Array &data);
+  bool writeEeprom(const Device::Array &data);
+  virtual bool internalConnectHardware();
+  virtual bool openPort();
+
+private:
+  uchar _id;
+  uint _timeout; // ms
+  uint _retries;
+
+  bool waitReady(bool *checkCRC);
+  bool sendChar(char c, uchar *crc);
+  bool sendCodeAddress(uint address, uchar &crc);
+  bool endWrite(uchar crc, uint &retries, bool &ok);
+};
+
+//-----------------------------------------------------------------------------
+class DeviceSpecific : public ::Bootloader::DeviceSpecific
+{
+public:
+  DeviceSpecific(::Programmer::Base &base) : ::Bootloader::DeviceSpecific(base) {}
+  virtual bool canEraseAll() const { return true; }
+  virtual bool canEraseRange(Pic::MemoryRangeType type) const { return canWriteRange(type); }
+  virtual bool emulatedErase() const { return true; }
+  virtual bool canReadRange(Pic::MemoryRangeType) const { return false; }
+  virtual bool canWriteRange(Pic::MemoryRangeType type) const;
+  virtual bool doEraseRange(Pic::MemoryRangeType type);
+  virtual bool doErase(bool);
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/tbl_bootloader/base/tbl_bootloader.xml b/src/progs/tbl_bootloader/base/tbl_bootloader.xml
new file mode 100644
index 0000000..bbad6dd
--- /dev/null
+++ b/src/progs/tbl_bootloader/base/tbl_bootloader.xml
@@ -0,0 +1,70 @@
+<!-- ************************************************************************* -->
+<!-- * Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  * -->
+<!-- *                                                                       * -->
+<!-- * This program is free software; you can redistribute it and/or modify  * -->
+<!-- * it under the terms of the GNU General Public License as published by  * -->
+<!-- * the Free Software Foundation; either version 2 of the License, or     * -->
+<!-- * (at your option) any later version.                                   * -->
+<!-- *************************************************************************/-->
+<!DOCTYPE piklab>
+
+<type name="tbl_bootloader">
+  <device name="16F873A" family="generic" id="0x32" />
+  <device name="16F874A" family="generic" id="0x32" />
+  <device name="16F876A" family="generic" id="0x31" />
+  <device name="16F877A" family="generic" id="0x31" />
+  <device name="16F87"   family="generic" id="0x33" />
+  <device name="16F88"   family="generic" id="0x33" />
+
+  <device name="18F1220" family="generic" id="0x46" />
+  <device name="18F1320" family="generic" id="0x45" />
+  <device name="18F2220" family="generic" id="0x46" />
+  <device name="18F2320" family="generic" id="0x45" />
+  <device name="18F4220" family="generic" id="0x48" />
+  <device name="18F4320" family="generic" id="0x47" />
+  <device name="18F6720" family="generic" id="0x4A" />
+  <device name="18F8720" family="generic" id="0x4A" />
+  <device name="18F6620" family="generic" id="0x4B" />
+  <device name="18F8620" family="generic" id="0x4B" />
+  <device name="18F6520" family="generic" id="0x4C" />
+  <device name="18F8520" family="generic" id="0x4C" />
+  <device name="18F8680" family="generic" id="0x4D" />
+  <device name="18F2525" family="generic" id="0x4E" />
+  <device name="18F4525" family="generic" id="0x4E" />
+  <device name="18F2620" family="generic" id="0x4F" />
+  <device name="18F4620" family="generic" id="0x4F" />
+  <device name="18F242"  family="generic" id="0x42" />
+  <device name="18F252"  family="generic" id="0x41" />
+  <device name="18F442"  family="generic" id="0x42" />
+  <device name="18F452"  family="generic" id="0x41" />
+  <device name="18F2420" family="generic" id="0x42" />
+  <device name="18F2520" family="generic" id="0x41" />
+  <device name="18F4420" family="generic" id="0x42" />
+  <device name="18F4520" family="generic" id="0x41" />
+  <device name="18F248"  family="generic" id="0x44" />
+  <device name="18F258"  family="generic" id="0x43" />
+  <device name="18F448"  family="generic" id="0x44" />
+  <device name="18F458"  family="generic" id="0x43" />
+  <device name="18F2480" family="generic" id="0x44" />
+  <device name="18F2580" family="generic" id="0x43" />
+  <device name="18F4480" family="generic" id="0x44" />
+  <device name="18F4580" family="generic" id="0x43" />
+  <device name="18F2455" family="generic" id="0x56" />
+  <device name="18F2550" family="generic" id="0x55" />
+  <device name="18F4455" family="generic" id="0x56" />
+  <device name="18F4550" family="generic" id="0x55" />
+
+  <device name="30F2010" family="generic" id="0x70" />
+  <device name="30F6014" family="generic" id="0x71" />
+  <device name="30F6012" family="generic" id="0x71" />
+  <device name="30F6013" family="generic" id="0x72" />
+  <device name="30F6011" family="generic" id="0x72" />
+  <device name="30F3013" family="generic" id="0x73" />
+  <device name="30F3012" family="generic" id="0x73" />
+  <device name="30F2012" family="generic" id="0x74" />
+  <device name="30F2011" family="generic" id="0x74" />
+  <device name="30F4011" family="generic" id="0x75" />
+  <device name="30F4012" family="generic" id="0x75" />
+  <device name="30F3010" family="generic" id="0x76" />
+  <device name="30F3011" family="generic" id="0x76" />
+</type>
diff --git a/src/progs/tbl_bootloader/base/tbl_bootloader_data.h b/src/progs/tbl_bootloader/base/tbl_bootloader_data.h
new file mode 100644
index 0000000..51be528
--- /dev/null
+++ b/src/progs/tbl_bootloader/base/tbl_bootloader_data.h
@@ -0,0 +1,21 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef TBL_BOOTLOADER_DATA_H
+#define TBL_BOOTLOADER_DATA_H
+
+namespace TinyBootloader
+{
+  struct Data {
+    uchar id;
+  };
+  extern bool isSupported(const QString &device);
+  extern const Data &data(const QString &device);
+} // namespace
+
+#endif
diff --git a/src/progs/tbl_bootloader/base/tbl_bootloader_prog.cpp b/src/progs/tbl_bootloader/base/tbl_bootloader_prog.cpp
new file mode 100644
index 0000000..22c831e
--- /dev/null
+++ b/src/progs/tbl_bootloader/base/tbl_bootloader_prog.cpp
@@ -0,0 +1,14 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "tbl_bootloader_prog.h"
+
+//-----------------------------------------------------------------------------
+TinyBootloader::ProgrammerBase::ProgrammerBase(const Programmer::Group &group, const Pic::Data *data)
+  : Bootloader::ProgrammerBase(group, data, "tiny_bootloader_programmer_base")
+{}
diff --git a/src/progs/tbl_bootloader/base/tbl_bootloader_prog.h b/src/progs/tbl_bootloader/base/tbl_bootloader_prog.h
new file mode 100644
index 0000000..75b986d
--- /dev/null
+++ b/src/progs/tbl_bootloader/base/tbl_bootloader_prog.h
@@ -0,0 +1,46 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef TBL_BOOTLOADER_PROG_H
+#define TBL_BOOTLOADER_PROG_H
+
+#include "tbl_bootloader.h"
+
+namespace TinyBootloader
+{
+
+//-----------------------------------------------------------------------------
+class ProgrammerBase : public ::Bootloader::ProgrammerBase
+{
+Q_OBJECT
+public:
+  ProgrammerBase(const Programmer::Group &group, const Pic::Data *data);
+  virtual bool verifyDeviceId() { return static_cast<Hardware &>(hardware()).verifyDeviceId(); }
+};
+
+//-----------------------------------------------------------------------------
+class Group : public ::Bootloader::Group
+{
+public:
+  virtual QString name() const { return "tbl_bootloader"; }
+  virtual QString label() const { return i18n("Tiny Bootloader"); }
+  virtual ::Programmer::Properties properties() const { return ::Programmer::Programmer; }
+  virtual ::Programmer::TargetPowerMode targetPowerMode() const { return ::Programmer::TargetSelfPowered; }
+  virtual bool isPortSupported(PortType type) const { return type==PortType::Serial; }
+  virtual bool canReadVoltage(Pic::VoltageType) const { return false; }
+
+protected:
+  virtual void initSupported();
+  virtual ::Programmer::Base *createBase(const Device::Data *data) const { return new ProgrammerBase(*this, static_cast<const Pic::Data *>(data)); }
+  virtual ::Programmer::Hardware *createHardware(::Programmer::Base &base, const ::Programmer::HardwareDescription &hd) const { return new Hardware(base, hd.port.device); }
+  virtual ::Programmer::DeviceSpecific *createDeviceSpecific(::Programmer::Base &base) const { return new DeviceSpecific(base); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/tbl_bootloader/gui/Makefile.am b/src/progs/tbl_bootloader/gui/Makefile.am
new file mode 100644
index 0000000..d10b944
--- /dev/null
+++ b/src/progs/tbl_bootloader/gui/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libtblbootloaderui.la
+libtblbootloaderui_la_LDFLAGS = $(all_libraries)
+libtblbootloaderui_la_SOURCES = tbl_bootloader_ui.cpp
diff --git a/src/progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp b/src/progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp
new file mode 100644
index 0000000..5b576b9
--- /dev/null
+++ b/src/progs/tbl_bootloader/gui/tbl_bootloader_ui.cpp
@@ -0,0 +1,80 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "tbl_bootloader_ui.h"
+
+#include "progs/tbl_bootloader/base/tbl_bootloader.h"
+#include "common/port/serial.h"
+
+//-----------------------------------------------------------------------------
+TinyBootloader::ConfigWidget::ConfigWidget(const::Programmer::Group &group, QWidget *parent)
+  : ::Programmer::ConfigWidget(group, parent)
+{
+  uint row = numRows();
+
+  QLabel *label = new QLabel(i18n("Port Speed:"), this);
+  addWidget(label, row,row, 0,0);
+  _speed = new KComboBox(this);
+  for (uint i=0; i<Port::Serial::Nb_Speeds; i++) {
+    if ( Port::Serial::SPEED_VALUES[i]==0 || !Port::Serial::SPEED_DATA[i].supported ) continue;
+    _speed->insertItem(QString::number(Port::Serial::SPEED_VALUES[i]));
+  }
+  addWidget(_speed, row,row, 1,1);
+  row++;
+
+  label = new QLabel(i18n("Timeout (ms):"), this);
+  addWidget(label, row,row, 0,0);
+  _timeout = new KIntNumInput(this);
+  _timeout->setMinValue(0);
+  addWidget(_timeout, row,row, 1,1);
+  row++;
+
+  label = new QLabel(i18n("No of Retries:"), this);
+  addWidget(label, row,row, 0,0);
+  _retries = new KIntNumInput(this);
+  _retries->setMinValue(0);
+  addWidget(_retries, row,row, 1,1);
+  row++;
+}
+
+void TinyBootloader::ConfigWidget::saveConfig()
+{
+  Config config;
+  uint k = 0;
+  for (uint i=0; i<Port::Serial::Nb_Speeds; i++) {
+    if ( Port::Serial::SPEED_VALUES[i]==0 || !Port::Serial::SPEED_DATA[i].supported ) continue;
+    if ( uint(_speed->currentItem())==k ) {
+      config.writeSpeed(Port::Serial::Speed(i));
+      break;
+    }
+    k++;
+  }
+  config.writeTimeout(_timeout->value());
+  config.writeRetries(_retries->value());
+}
+
+void TinyBootloader::ConfigWidget::loadConfig()
+{
+  Config config;
+  Port::Serial::Speed speed = config.readSpeed();
+  uint k = 0;
+  for (uint i=0; i<Port::Serial::Nb_Speeds; i++) {
+    if ( Port::Serial::SPEED_VALUES[i]==0 || !Port::Serial::SPEED_DATA[i].supported ) continue;
+    if ( i==uint(speed) ) break;
+    k++;
+  }
+  _speed->setCurrentItem(k);
+  _timeout->setValue(config.readTimeout());
+  _retries->setValue(config.readRetries());
+}
+
+//-----------------------------------------------------------------------------
+::Programmer::ConfigWidget *TinyBootloader::GroupUI::createConfigWidget(QWidget *parent) const
+{
+  return new ConfigWidget(static_cast<const ::Programmer::Group &>(group()), parent);
+}
diff --git a/src/progs/tbl_bootloader/gui/tbl_bootloader_ui.h b/src/progs/tbl_bootloader/gui/tbl_bootloader_ui.h
new file mode 100644
index 0000000..d0285af
--- /dev/null
+++ b/src/progs/tbl_bootloader/gui/tbl_bootloader_ui.h
@@ -0,0 +1,42 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef TBL_BOOTLOADER_UI_H
+#define TBL8BOOTLOADER_UI_H
+
+#include <kcombobox.h>
+#include <knuminput.h>
+
+#include "progs/bootloader/gui/bootloader_ui.h"
+
+//-----------------------------------------------------------------------------
+namespace TinyBootloader
+{
+class ConfigWidget: public ::Programmer::ConfigWidget
+{
+Q_OBJECT
+public:
+  ConfigWidget(const ::Programmer::Group &group, QWidget *parent);
+  virtual void loadConfig();
+  virtual void saveConfig();
+
+private:
+  KIntNumInput *_timeout, *_retries;
+  KComboBox    *_type, *_speed;
+};
+
+//----------------------------------------------------------------------------
+class GroupUI : public ::Bootloader::GroupUI
+{
+public:
+  virtual ::Programmer::ConfigWidget *createConfigWidget(QWidget *parent) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/progs/tbl_bootloader/tbl_bootloader.pro b/src/progs/tbl_bootloader/tbl_bootloader.pro
new file mode 100644
index 0000000..60ac0f5
--- /dev/null
+++ b/src/progs/tbl_bootloader/tbl_bootloader.pro
@@ -0,0 +1,2 @@
+TEMPLATE = subdirs
+SUBDIRS = xml base
diff --git a/src/progs/tbl_bootloader/xml/Makefile.am b/src/progs/tbl_bootloader/xml/Makefile.am
new file mode 100644
index 0000000..609ca90
--- /dev/null
+++ b/src/progs/tbl_bootloader/xml/Makefile.am
@@ -0,0 +1,14 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_PROGRAMS = xml_tbl_bootloader_parser
+xml_tbl_bootloader_parser_SOURCES = xml_tbl_bootloader_parser.cpp
+OBJECTS = $(top_builddir)/src/devices/list/libdevicelistnoui.la \
+          $(top_builddir)/src/devices/pic/pic/libpic.la $(top_builddir)/src/devices/pic/base/libpicbase.la \
+          $(top_builddir)/src/devices/pic/xml_data/libpicxml.la \
+          $(top_builddir)/src/devices/mem24/mem24/libmem24.la $(top_builddir)/src/devices/mem24/base/libmem24base.la \
+          $(top_builddir)/src/devices/mem24/xml_data/libmem24xml.la \
+          $(top_builddir)/src/xml_to_data/libxmltodata.la $(top_builddir)/src/devices/base/libdevicebase.la \
+          $(top_builddir)/src/common/common/libcommon.la
+xml_tbl_bootloader_parser_DEPENDENCIES = $(OBJECTS)
+xml_tbl_bootloader_parser_LDADD = $(OBJECTS) $(LIB_KDECORE)
diff --git a/src/progs/tbl_bootloader/xml/xml.pro b/src/progs/tbl_bootloader/xml/xml.pro
new file mode 100644
index 0000000..a7d488a
--- /dev/null
+++ b/src/progs/tbl_bootloader/xml/xml.pro
@@ -0,0 +1,17 @@
+STOPDIR = ../../../..
+include($${STOPDIR}/app.pro)
+
+TARGET   = xml_tbl_bootloader_parser
+SOURCES += xml_tbl_bootloader_parser.cpp
+LIBS    += ../../../devices/list/libdevicelist.a \
+           ../../../devices/mem24/mem24/libmem24.a ../../../devices/mem24/xml_data/libmem24xml.a \
+           ../../../devices/mem24/base/libmem24base.a \
+           ../../../devices/pic/pic/libpic.a ../../../devices/pic/xml_data/libpicxml.a \
+           ../../../devices/pic/base/libpicbase.a ../../../xml_to_data/libxmltodata.a \
+           ../../../devices/base/libdevicebase.a ../../../common/global/libglobal.a \
+           ../../../common/nokde/libnokde.a ../../../common/common/libcommon.a
+
+unix:QMAKE_POST_LINK = cd ../base && ../xml/xml_tbl_bootloader_parser
+unix:QMAKE_CLEAN += ../base/tbl_bootloader_data.cpp
+win32:QMAKE_POST_LINK = cd ..\base && ..\xml\xml_tbl_bootloader_parser.exe
+win32:QMAKE_CLEAN += ..\base\tbl_bootloader_data.cpp
diff --git a/src/progs/tbl_bootloader/xml/xml_tbl_bootloader_parser.cpp b/src/progs/tbl_bootloader/xml/xml_tbl_bootloader_parser.cpp
new file mode 100644
index 0000000..62ed806
--- /dev/null
+++ b/src/progs/tbl_bootloader/xml/xml_tbl_bootloader_parser.cpp
@@ -0,0 +1,48 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "xml_to_data/prog_xml_to_data.h"
+
+#include "progs/tbl_bootloader/base/tbl_bootloader_data.h"
+#include "devices/base/device_group.h"
+#include "devices/pic/base/pic.h"
+
+//-----------------------------------------------------------------------------
+namespace TinyBootloader
+{
+
+class XmlToData : public Programmer::XmlToData<Data>
+{
+public:
+  XmlToData() : Programmer::XmlToData<Data>("tbl_bootloader", "TinyBootloader") {}
+
+private:
+  virtual void parseData(QDomElement element, Data &data);
+  virtual void outputData(const Data &data, QTextStream &s) const;
+};
+
+void TinyBootloader::XmlToData::parseData(QDomElement element, Data &data)
+{
+  const Device::Data *ddata = Device::lister().data(currentDevice());
+  if ( ddata->group().name()!="pic" ) qFatal("non-pic device not supported");
+  const Pic::Data *pdata = static_cast<const Pic::Data *>(ddata);
+  if ( !pdata->hasFeature(Pic::Feature::USART) ) qFatal("device does not have USART");
+  bool ok;
+  data.id = fromHexLabel(element.attribute("id"), 2, &ok);
+  if ( !ok ) qFatal("Invalid \"id\" tag");
+}
+
+void TinyBootloader::XmlToData::outputData(const Data &data, QTextStream &s) const
+{
+  s << data.id;
+}
+
+} // namespace
+
+//-----------------------------------------------------------------------------
+XML_MAIN(TinyBootloader::XmlToData)
diff --git a/src/src.pro b/src/src.pro
new file mode 100644
index 0000000..bbb9f17
--- /dev/null
+++ b/src/src.pro
@@ -0,0 +1,2 @@
+TEMPLATE = subdirs
+SUBDIRS  = common xml_to_data devices piklab-hex coff piklab-coff progs piklab-prog
diff --git a/src/tools/Makefile.am b/src/tools/Makefile.am
new file mode 100644
index 0000000..0b287af
--- /dev/null
+++ b/src/tools/Makefile.am
@@ -0,0 +1,3 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+SUBDIRS = base gui gputils sdcc picc pic30 c18 jal ccsc jalv2 boost mpc cc5x custom list
diff --git a/src/tools/base/Makefile.am b/src/tools/base/Makefile.am
new file mode 100644
index 0000000..2154bf4
--- /dev/null
+++ b/src/tools/base/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libtoolbase.la
+libtoolbase_la_LDFLAGS = $(all_libraries)
+libtoolbase_la_SOURCES = generic_tool.cpp tool_group.cpp
diff --git a/src/tools/base/generic_tool.cpp b/src/tools/base/generic_tool.cpp
new file mode 100644
index 0000000..d595362
--- /dev/null
+++ b/src/tools/base/generic_tool.cpp
@@ -0,0 +1,60 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "generic_tool.h"
+
+#include "devices/list/device_list.h"
+#include "common/global/process.h"
+#include "tools/list/compile_config.h"
+
+//----------------------------------------------------------------------------
+const Tool::Category::Data Tool::Category::DATA[Nb_Types] = {
+  { "compiler",     I18N_NOOP("Compiler:"),     I18N_NOOP("Compiler")     },
+  { "assembler",    I18N_NOOP("Assembler:"),    I18N_NOOP("Assembler")    },
+  { "linker",       I18N_NOOP("Linker:"),       I18N_NOOP("Linker")       },
+  { "bin_to_hex",   I18N_NOOP("Bin to Hex:"),   I18N_NOOP("Bin to Hex")   },
+  { "librarian",    I18N_NOOP("Librarian:"),    I18N_NOOP("Librarian")    }
+};
+
+const Tool::ExecutableType::Data Tool::ExecutableType::DATA[Nb_Types] = {
+  { "unix",    I18N_NOOP("Unix")    },
+  { "windows", I18N_NOOP("Windows") }
+};
+
+const Compile::DirectoryType::Data Compile::DirectoryType::DATA[Nb_Types] = {
+  { "executable",    I18N_NOOP("Executable directory")    },
+  { "include",       I18N_NOOP("Header directory")        },
+  { "linker_script", I18N_NOOP("Linker Script Directory") },
+  { "library",       I18N_NOOP("Library Directory")       },
+  { "source",        I18N_NOOP("Source Directory")        }
+};
+
+const Tool::OutputExecutableType::Data Tool::OutputExecutableType::DATA[Nb_Types] = {
+  { I18N_NOOP("COFF"), "coff", PURL::Coff },
+  { I18N_NOOP("ELF"),  "elf",  PURL::Elf  }
+};
+
+const Tool::OutputType::Data Tool::OutputType::DATA[Nb_Types] = {
+  { "executable", I18N_NOOP("Executable") },
+  { "library",    I18N_NOOP("Library")    }
+};
+
+//-----------------------------------------------------------------------------
+PURL::Directory Tool::Base::executableDirectory() const
+{
+  return Compile::Config::directory(*_group, Compile::DirectoryType::Executable);
+}
+
+::Process::LineOutput *Tool::Base::checkExecutableProcess(const PURL::Directory &dir, bool withWine, OutputExecutableType type) const
+{
+  ::Process::LineOutput *process = new ::Process::LineOutput;
+  process->setup(dir.path() + baseExecutable(withWine, type), checkExecutableOptions(withWine), withWine);
+  PURL::Directory wdir = checkExecutableWorkingDirectory();
+  if ( !wdir.isEmpty() ) process->setWorkingDirectory(wdir.path());
+  return process;
+}
diff --git a/src/tools/base/generic_tool.h b/src/tools/base/generic_tool.h
new file mode 100644
index 0000000..3b3299d
--- /dev/null
+++ b/src/tools/base/generic_tool.h
@@ -0,0 +1,104 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef GENERIC_TOOL_H
+#define GENERIC_TOOL_H
+
+#include "common/global/purl.h"
+#include "common/common/key_enum.h"
+namespace Device { class Data; class Memory; }
+namespace Process { class LineOutput; }
+class Project;
+
+namespace Tool
+{
+//----------------------------------------------------------------------------
+  struct CategoryData {
+    const char *key, *label, *title;
+  };
+  BEGIN_DECLARE_ENUM(Category)
+    Compiler = 0, Assembler, Linker, BinToHex, Librarian
+  END_DECLARE_ENUM(Category, CategoryData)
+
+  BEGIN_DECLARE_ENUM(ExecutableType)
+    Unix = 0, Windows
+  END_DECLARE_ENUM_STD(ExecutableType)
+} // namespace
+
+namespace Compile
+{
+  enum LinkType { NormalLinking, Icd2Linking };
+  class Process;
+  class Config;
+
+  class TodoItem {
+  public:
+    TodoItem() {}
+    TodoItem(const PURL::Url &_url, bool _generated) : url(_url), generated(_generated) {}
+    PURL::Url url;
+    bool generated;
+  };
+
+  class Data {
+  public:
+    Data() {}
+    Data(Tool::Category c, const QValueList<TodoItem> &i, const QString &d, const Project *p, LinkType lt)
+      : category(c), items(i), device(d), project(p), linkType(lt) {}
+    Tool::Category category;
+    QValueList<TodoItem> items;
+    QString  device;
+    const Project *project;
+    LinkType linkType;
+  };
+
+  BEGIN_DECLARE_ENUM(DirectoryType)
+    Executable = 0, Header, LinkerScript, Library, Source
+  END_DECLARE_ENUM_STD(DirectoryType)
+
+} // namespace
+
+namespace Tool
+{
+  class Group;
+
+  struct OutputExecutableTypeData {
+    const char    *label, *key;
+    PURL::FileType type;
+  };
+  BEGIN_DECLARE_ENUM(OutputExecutableType)
+    Coff = 0, Elf
+  END_DECLARE_ENUM(OutputExecutableType, OutputExecutableTypeData)
+
+  BEGIN_DECLARE_ENUM(OutputType)
+    Executable = 0, Library
+  END_DECLARE_ENUM_STD(OutputType)
+
+//-----------------------------------------------------------------------------
+class Base
+{
+public:
+  virtual ~Base() {}
+  const Group &group() const { return *_group; }
+  virtual QString baseExecutable(bool withWine, OutputExecutableType type) const = 0;
+  PURL::Directory executableDirectory() const;
+  virtual bool checkExecutable() const { return true; }
+  virtual QStringList checkExecutableOptions(bool withWine) const = 0;
+  virtual PURL::Directory checkExecutableWorkingDirectory() const { return PURL::Directory(); }
+  virtual ::Process::LineOutput *checkExecutableProcess(const PURL::Directory &dir, bool withWine, OutputExecutableType type) const;
+  virtual bool checkExecutableResult(bool withWine, QStringList &lines) const = 0;
+
+protected:
+  Category _category;
+  const Group *_group;
+
+  friend class Group;
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/base/tool_group.cpp b/src/tools/base/tool_group.cpp
new file mode 100644
index 0000000..fb347ce
--- /dev/null
+++ b/src/tools/base/tool_group.cpp
@@ -0,0 +1,140 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "tool_group.h"
+
+#include "devices/list/device_list.h"
+#include "devices/base/device_group.h"
+#include "devices/base/generic_memory.h"
+#include "common/global/process.h"
+#include "tools/list/compile_config.h"
+#include "tools/list/compile_process.h"
+#include "libgui/project.h"
+
+//-----------------------------------------------------------------------------
+const char *Tool::Group::CUSTOM_NAME = "custom";
+
+Tool::Group::Group()
+  : _sourceGenerator(0), _checkDevicesError(true)
+{}
+
+void Tool::Group::init()
+{
+  delete _sourceGenerator;
+  _sourceGenerator = sourceGeneratorFactory();
+  FOR_EACH(Category, i) {
+    delete _bases[i].base;
+    _bases[i] = baseFactory(i);
+    if (_bases[i].base) {
+      _bases[i].base->_category = i;
+      _bases[i].base->_group = this;
+    }
+  }
+  ::Group::Base::init();
+  _version = getToolchainVersion();
+}
+
+Compile::Process *Tool::Group::createCompileProcess(const Compile::Data &data, Compile::Manager *manager) const
+{
+  Compile::Process *p = processFactory(data);
+  if (p) p->init(data, manager);
+  return p;
+}
+
+Compile::Config *Tool::Group::createConfig(::Project *project) const
+{
+  Compile::Config *c = configFactory(project);
+  if (c) c->_group = this;
+  return c;
+}
+
+PURL::Directory Tool::Group::autodetectDirectory(Compile::DirectoryType, const PURL::Directory &, bool) const
+{
+  return PURL::Directory();
+}
+
+QString Tool::Group::defaultLinkerScriptFilename(Compile::LinkType type, const QString &device) const
+{
+  QString basename = device.lower();
+  if ( type==Compile::Icd2Linking ) basename += 'i';
+  return basename + '.' + PURL::extension(PURL::Lkr);
+}
+
+bool Tool::Group::hasCustomLinkerScript(const ::Project *project) const
+{
+  return ( project && !project->customLinkerScript().isEmpty() );
+}
+
+PURL::Url Tool::Group::linkerScript(const ::Project *project, Compile::LinkType type) const
+{
+  if ( hasCustomLinkerScript(project) ) return project->customLinkerScript();
+  QString filename = defaultLinkerScriptFilename(type, Compile::Config::device(project));
+  return PURL::Url(Compile::Config::directory(*this, Compile::DirectoryType::LinkerScript), filename);
+}
+
+::Process::LineOutput *Tool::Group::checkDevicesProcess(uint i, const PURL::Directory &dir, bool withWine) const
+{
+  ::Process::LineOutput *process = new ::Process::LineOutput;
+  Tool::Category cat = checkDevicesCategory();
+  QString exec = base(cat)->baseExecutable(withWine, Compile::Config::outputExecutableType(*this));
+  process->setup(dir.path() + exec, checkDevicesOptions(i), withWine);
+  return process;
+}
+
+bool Tool::Group::checkExecutable(Tool::Category category, QStringList &lines)
+{
+  PURL::Directory dir = Compile::Config::directory(*this, Compile::DirectoryType::Executable);
+  bool withWine = Compile::Config::withWine(*this);
+  Tool::OutputExecutableType outputType = Compile::Config::outputExecutableType(*this);
+  ::Process::LineOutput * process = _bases[category].base->checkExecutableProcess(dir, withWine, outputType);
+  ::Process::State state = ::Process::runSynchronously(*process, ::Process::Start, 10000);
+  if ( state!=::Process::Exited ) return false;
+  lines = process->sout() + process->serr();
+  return _bases[category].base->checkExecutableResult(withWine, lines);
+}
+
+void Tool::Group::initSupported()
+{
+  _checkDevicesError = false;
+  Tool::Category cat = checkDevicesCategory();
+  QValueList<const Device::Data *> list;
+  if ( cat==Tool::Category::Nb_Types ) list = getSupportedDevices(QString::null);
+  else {
+    PURL::Directory dir = Compile::Config::directory(*this, Compile::DirectoryType::Executable);
+    for (uint i=0; i<nbCheckDevices(); i++) {
+      QStringList lines;
+      ::Process::LineOutput *process = checkDevicesProcess(i, dir, Compile::Config::withWine(*this));
+      ::Process::State state = ::Process::runSynchronously(*process, ::Process::Start, 10000);
+      if ( state==::Process::Exited ) {
+        QStringList lines = process->sout() + process->serr();
+        list += getSupportedDevices(lines.join("\n"));
+      } else _checkDevicesError = true;
+      delete process;
+    }
+  }
+  QValueList<const Device::Data *>::const_iterator it;
+  for (it=list.begin(); it!=list.end(); ++it) addDevice((*it)->name(), *it, ::Group::Support::Tested);
+}
+
+bool Tool::Group::check(const QString &device, Log::Generic *log) const
+{
+  const_cast<Tool::Group *>(this)->checkInitSupported();
+  if ( hasCheckDevicesError() )
+    return (log ? log->askContinue(i18n("There were errors detecting supported devices for the selected toolchain (%1). Please check the toolchain configuration. Continue anyway?").arg(label())) : false);
+  if ( !device.isEmpty() && device!=Device::AUTO_DATA.name && !isSupported(device) )
+    return (log ? log->askContinue(i18n("The selected toolchain (%1) does not support device %2. Continue anyway?").arg(label()).arg(device)) : false);
+  return true;
+}
+
+bool Tool::Group::needs(bool withProject, Tool::Category category) const
+{
+  if ( _bases[category].base==0 ) return false;
+  if ( withProject && _bases[category].type==StandaloneOnly ) return false;
+  if ( !withProject && _bases[category].type==ProjectOnly ) return false;
+  return true;
+}
diff --git a/src/tools/base/tool_group.h b/src/tools/base/tool_group.h
new file mode 100644
index 0000000..c4adb84
--- /dev/null
+++ b/src/tools/base/tool_group.h
@@ -0,0 +1,85 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef TOOL_GROUP_H
+#define TOOL_GROUP_H
+
+#include "common/global/purl.h"
+#include "common/common/group.h"
+#include "common/common/version_data.h"
+#include "generic_tool.h"
+#include "coff/base/disassembler.h"
+namespace Compile { class Manager; }
+
+namespace Tool
+{
+enum CompileType { SeparateFiles, AllFiles, SingleFile };
+class SourceGenerator;
+
+//-----------------------------------------------------------------------------
+class Group : public ::Group::Base
+{
+public:
+  static const char *CUSTOM_NAME;
+  Group();
+  bool isCustom() const { return ( name()==CUSTOM_NAME ); }
+  virtual QString comment() const { return QString::null; }
+  virtual void init();
+  virtual const ::Tool::Base *base(Category category) const { return _bases[category].base; }
+  virtual QString informationText() const = 0;
+  virtual ExecutableType preferedExecutableType() const = 0;
+  virtual bool hasDirectory(Compile::DirectoryType) const { return false; }
+  virtual PURL::FileType linkerScriptType() const { return PURL::Nb_FileTypes; }
+  virtual PURL::Directory autodetectDirectory(Compile::DirectoryType type, const PURL::Directory &execDir, bool withWine) const;
+  virtual bool hasOutputExecutableType(Tool::OutputExecutableType type) const { return ( type==Tool::OutputExecutableType::Coff ); }
+  virtual uint nbCheckDevices() const { return 1; }
+  bool hasCheckDevicesError() const { return _checkDevicesError; }
+  virtual Tool::Category checkDevicesCategory() const = 0;
+  virtual QStringList checkDevicesOptions(uint) const { return QStringList(); }
+  ::Process::LineOutput *checkDevicesProcess(uint i, const PURL::Directory &execDir, bool withWine) const;
+  virtual QValueList<const Device::Data *> getSupportedDevices(const QString &s) const = 0;
+  virtual CompileType compileType() const = 0;
+  virtual bool needs(bool withProject, Category category) const;
+  Compile::Process *createCompileProcess(const Compile::Data &data, Compile::Manager *manager) const;
+  Compile::Config *createConfig(::Project *project) const;
+  bool hasCustomLinkerScript(const ::Project *project) const;
+  virtual PURL::Url linkerScript(const ::Project *project, Compile::LinkType type) const;
+  virtual PURL::FileType implementationType(PURL::ToolType type) const = 0;
+  virtual Compile::Process *processFactory(const Compile::Data &data) const = 0;
+  const SourceGenerator *sourceGenerator() const { return _sourceGenerator; }
+  bool check(const QString &device, Log::Generic *log) const;
+  const VersionData &version() const { return _version; }
+  virtual bool generateDebugInformation(const QString &device) const { Q_UNUSED(device); return true; }
+
+protected:
+  enum NeedType { StandaloneOnly, ProjectOnly, Both };
+  class BaseData {
+  public:
+    BaseData() : base(0), type(Both) {}
+    BaseData(::Tool::Base *b, NeedType t) : base(b), type(t) {}
+    ::Tool::Base *base;
+    NeedType type;
+  };
+  virtual void initSupported();
+  virtual BaseData baseFactory(Category category) const = 0;
+  virtual QString defaultLinkerScriptFilename(Compile::LinkType type, const QString &device) const;
+  virtual Compile::Config *configFactory(::Project *project) const = 0;
+  virtual SourceGenerator *sourceGeneratorFactory() const = 0;
+  bool checkExecutable(Tool::Category category, QStringList &lines);
+  virtual VersionData getToolchainVersion() { return VersionData(); }
+
+private:
+  SourceGenerator *_sourceGenerator;
+  QMap<Category, BaseData> _bases;
+  bool _checkDevicesError;
+  VersionData _version;
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/boost/Makefile.am b/src/tools/boost/Makefile.am
new file mode 100644
index 0000000..725e078
--- /dev/null
+++ b/src/tools/boost/Makefile.am
@@ -0,0 +1,9 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libboost.la
+libboost_la_SOURCES = boostc.cpp boostc_compile.cpp boost_config.cpp \
+			boost.cpp boostcpp.cpp boostbasic.cpp boost_generator.cpp
+libboost_la_LDFLAGS = $(all_libraries)
+
+SUBDIRS = gui
\ No newline at end of file
diff --git a/src/tools/boost/boost.cpp b/src/tools/boost/boost.cpp
new file mode 100644
index 0000000..86e304c
--- /dev/null
+++ b/src/tools/boost/boost.cpp
@@ -0,0 +1,102 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "boost.h"
+
+#include "boostc_compile.h"
+#include "boost_config.h"
+#include "devices/pic/pic/pic_memory.h"
+#include "devices/list/device_list.h"
+#include "devices/base/device_group.h"
+
+//----------------------------------------------------------------------------
+bool Boost::Linker::checkExecutableResult(bool, QStringList &lines) const
+{
+  return ( lines.count()>0 && lines[0].startsWith("BoostLink ") );
+}
+
+PURL::Directory Boost::Linker::checkExecutableWorkingDirectory() const
+{
+  return static_cast<const Group *>(_group)->checkExecutableUrl().directory();
+}
+
+QStringList Boost::Linker16::checkExecutableOptions(bool) const
+{
+  // #### otherwise may stall...
+  QStringList args;
+  args += "-t PIC16F873";
+  args += static_cast<const Group *>(_group)->checkExecutableUrl().toExtension("obj").filename();
+  return args;
+}
+
+QStringList Boost::Linker18::checkExecutableOptions(bool) const
+{
+  // #### otherwise may stall...
+  QStringList args;
+  args += "-t PIC18F452";
+  args += static_cast<const Group *>(_group)->checkExecutableUrl().toExtension("obj").filename();
+  return args;
+}
+
+//----------------------------------------------------------------------------
+QStringList Boost::Compiler::checkExecutableOptions(bool) const
+{
+  // #### otherwise may stall...
+  return static_cast<const Group *>(_group)->checkExecutableUrl().filename();
+}
+
+PURL::Directory Boost::Compiler::checkExecutableWorkingDirectory() const
+{
+  return static_cast<const Group *>(_group)->checkExecutableUrl().directory();
+}
+
+//----------------------------------------------------------------------------
+Boost::Group::Group(const QString &extension, const QString &text)
+  : _checkExecTmp(_sview, extension)
+{
+  if ( _checkExecTmp.openForWrite() ) _checkExecTmp.appendText(text);
+  _checkExecTmp.close();
+}
+
+QString Boost::Group::comment() const
+{
+  return i18n("The Boost toolchain needs to be run by Wine with \"Windows NT 4.0\" compatibility. This can be configured with the Wine configuration utility.");
+}
+
+PURL::Directory Boost::Group::autodetectDirectory(Compile::DirectoryType type, const PURL::Directory &execDir, bool) const
+{
+  if ( type==Compile::DirectoryType::Library ) return execDir.path() + "Lib";
+  return PURL::Directory();
+}
+
+Compile::Process *Boost::Group::processFactory(const Compile::Data &data) const
+{
+  switch (data.category.type()) {
+    case Tool::Category::Compiler: return new Boost::CompileFile;
+    case Tool::Category::Linker: return new Boost::Link;
+    default: break;
+  }
+  Q_ASSERT(false);
+  return 0;
+}
+
+Compile::Config *Boost::Group::configFactory(::Project *project) const
+{
+  return new Boost::Config(project);
+}
+
+QValueList<const Device::Data *> Boost::Group::getSupportedDevices(const QString &) const
+{
+  QValueList<const Device::Data *> list;
+  QValueVector<QString> devices = Device::lister().group("pic")->supportedDevices();
+  for (uint i=0; i<devices.count(); i++) {
+    const Device::Data *data = Device::lister().data(devices[i]);
+    if ( supportedArchitecture(static_cast<const Pic::Data *>(data)->architecture()) ) list.append(data);
+  }
+  return list;
+}
diff --git a/src/tools/boost/boost.h b/src/tools/boost/boost.h
new file mode 100644
index 0000000..d6142c9
--- /dev/null
+++ b/src/tools/boost/boost.h
@@ -0,0 +1,74 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef BOOST_H
+#define BOOST_H
+
+#include "tools/base/tool_group.h"
+#include "common/gui/pfile_ext.h"
+#include "devices/pic/base/pic.h"
+
+namespace Boost
+{
+//----------------------------------------------------------------------------
+class Linker : public Tool::Base
+{
+private:
+  virtual QString baseExecutable(bool, Tool::OutputExecutableType) const { return "boostlink.pic.exe"; }
+  virtual bool checkExecutableResult(bool withWine, QStringList &lines) const;
+  virtual PURL::Directory checkExecutableWorkingDirectory() const;
+};
+
+class Linker16 : public Linker
+{
+private:
+  virtual QStringList checkExecutableOptions(bool withWine) const;
+};
+
+class Linker18 : public Linker
+{
+private:
+  virtual QStringList checkExecutableOptions(bool withWine) const;
+};
+
+//----------------------------------------------------------------------------
+class Compiler : public Tool::Base
+{
+private:
+  virtual QStringList checkExecutableOptions(bool withWine) const;
+  virtual PURL::Directory checkExecutableWorkingDirectory() const;
+};
+
+//----------------------------------------------------------------------------
+class Group : public Tool::Group
+{
+public:
+  Group(const QString &extension, const QString &text);
+  PURL::Url checkExecutableUrl() const { return _checkExecTmp.url(); }
+  virtual QString comment() const;
+  virtual Tool::Category checkDevicesCategory() const { return Tool::Category::Nb_Types; }
+  virtual Tool::ExecutableType preferedExecutableType() const { return Tool::ExecutableType::Windows; }
+  virtual Tool::CompileType compileType() const { return Tool::SeparateFiles; }
+  virtual bool hasDirectory(Compile::DirectoryType type) const { return type==Compile::DirectoryType::Library; }
+  virtual PURL::Directory autodetectDirectory(Compile::DirectoryType type, const PURL::Directory &execDir, bool withWine) const;
+
+protected:
+  virtual bool supportedArchitecture(Pic::Architecture architecture) const = 0;
+
+private:
+  Log::StringView _sview;
+  PURL::TempFile  _checkExecTmp;
+
+  virtual QValueList<const Device::Data *> getSupportedDevices(const QString &s) const;
+  virtual Compile::Process *processFactory(const Compile::Data &data) const;
+  virtual Compile::Config *configFactory(::Project *project) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/boost/boost_config.cpp b/src/tools/boost/boost_config.cpp
new file mode 100644
index 0000000..b64f0af
--- /dev/null
+++ b/src/tools/boost/boost_config.cpp
@@ -0,0 +1,9 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "boost_config.h"
diff --git a/src/tools/boost/boost_config.h b/src/tools/boost/boost_config.h
new file mode 100644
index 0000000..c8b540e
--- /dev/null
+++ b/src/tools/boost/boost_config.h
@@ -0,0 +1,24 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef BOOST_CONFIG_H
+#define BOOST_CONFIG_H
+
+#include "tools/list/compile_config.h"
+
+namespace Boost
+{
+class Config : public Compile::Config
+{
+public:
+  Config(Project *project) : Compile::Config(project) {}
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/boost/boost_generator.cpp b/src/tools/boost/boost_generator.cpp
new file mode 100644
index 0000000..2fa1393
--- /dev/null
+++ b/src/tools/boost/boost_generator.cpp
@@ -0,0 +1,81 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "boost_generator.h"
+
+#include "devices/pic/pic/pic_memory.h"
+
+//---------------------------------------------------------------------------
+SourceLine::List Boost::CSourceGenerator::configLines(PURL::ToolType, const Device::Memory &memory, bool &ok) const
+{
+  const Pic::Memory &pmemory = static_cast<const Pic::Memory &>(memory);
+  const Pic::Data &data = pmemory.device();
+  const Pic::Config &config = data.config();
+  SourceLine::List lines;
+  Address address = data.range(Pic::MemoryRangeType::Config).start;
+  for (uint i=0; i<data.nbWords(Pic::MemoryRangeType::Config); i++) {
+   const Pic::Config::Word &cword = config._words[i];
+    QStringList cnames = SourceLine::configNames(Pic::ConfigNameType::Default, pmemory, i, ok);
+    if ( cnames.isEmpty() ) continue;
+      QString code = "#pragma DATA ";
+    if ( cword.name.isEmpty() ) code += toHexLabel(address, data.nbCharsAddress());
+    else code += "__" + cword.name;
+     code += cnames.join(" & ") + ";";
+    lines.appendNotIndentedCode(code);
+    address += data.addressIncrement(Pic::MemoryRangeType::Config);
+  }
+  return lines;
+}
+
+SourceLine::List Boost::CSourceGenerator::includeLines(PURL::ToolType, const Device::Data &) const
+{
+  SourceLine::List lines;
+  lines.appendNotIndentedCode("#include <system.h>");
+  return lines;
+}
+
+SourceLine::List Boost::CSourceGenerator::sourceFileContent(PURL::ToolType, const Device::Data &, bool &) const
+{
+  SourceLine::List lines;
+  lines.appendTitle(i18n("interrupt service routine"));
+  lines.appendNotIndentedCode("void interrupt(void) {");
+  lines.appendIndentedCode(QString::null, "<< " + i18n("insert interrupt code") + " >>");
+  lines.appendNotIndentedCode("}");
+  lines.appendEmpty();
+  lines.appendTitle(i18n("main program"));
+  lines.appendNotIndentedCode("void main() {");
+  lines.appendIndentedCode(QString::null, "<< " + i18n("insert code") + " >>");
+  lines.appendNotIndentedCode("}");
+  return lines;
+}
+
+//---------------------------------------------------------------------------
+SourceLine::List Boost::BasicSourceGenerator::configLines(PURL::ToolType, const Device::Memory &, bool &ok) const
+{
+  // config bits ?
+  ok = false;
+  return SourceLine::List();
+}
+
+SourceLine::List Boost::BasicSourceGenerator::includeLines(PURL::ToolType, const Device::Data &) const
+{
+  return SourceLine::List();
+}
+
+SourceLine::List Boost::BasicSourceGenerator::sourceFileContent(PURL::ToolType, const Device::Data &, bool &ok) const
+{
+  SourceLine::List lines;
+  ok = true;
+  lines.appendTitle(i18n("main program"));
+  lines.appendNotIndentedCode("Sub main()");
+  lines.appendIndentedCode(QString::null, "<< " + i18n("insert code") + " >>");
+  lines.appendIndentedCode("Do while 1", i18n("loop forever"));
+  lines.appendIndentedCode("Loop");
+  lines.appendNotIndentedCode("End Sub");
+  return lines;
+}
diff --git a/src/tools/boost/boost_generator.h b/src/tools/boost/boost_generator.h
new file mode 100644
index 0000000..0986ee1
--- /dev/null
+++ b/src/tools/boost/boost_generator.h
@@ -0,0 +1,37 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef BOOST_GENERATOR_H
+#define BOOST_GENERATOR_H
+
+#include "tools/base/tool_group.h"
+
+namespace Boost
+{
+
+//---------------------------------------------------------------------------
+class CSourceGenerator : public Tool::SourceGenerator
+{
+public:
+  virtual SourceLine::List configLines(PURL::ToolType type, const Device::Memory &memory, bool &ok) const;
+  virtual SourceLine::List sourceFileContent(PURL::ToolType type, const Device::Data &data, bool &ok) const;
+  virtual SourceLine::List includeLines(PURL::ToolType type, const Device::Data &data) const;
+};
+
+//---------------------------------------------------------------------------
+class BasicSourceGenerator : public Tool::SourceGenerator
+{
+public:
+  virtual SourceLine::List configLines(PURL::ToolType type, const Device::Memory &memory, bool &ok) const;
+  virtual SourceLine::List sourceFileContent(PURL::ToolType type, const Device::Data &data, bool &ok) const;
+  virtual SourceLine::List includeLines(PURL::ToolType type, const Device::Data &data) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/boost/boostbasic.cpp b/src/tools/boost/boostbasic.cpp
new file mode 100644
index 0000000..9983874
--- /dev/null
+++ b/src/tools/boost/boostbasic.cpp
@@ -0,0 +1,42 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "boostbasic.h"
+
+#include "boost_generator.h"
+
+//----------------------------------------------------------------------------
+bool Boost::CompilerBasic::checkExecutableResult(bool, QStringList &lines) const
+{
+  return ( lines.count()>0 && lines[0].startsWith("BoostBasic ") );
+}
+
+//----------------------------------------------------------------------------
+QString Boost::GroupBasic::informationText() const
+{
+  return i18n("<a href=\"%1\">BoostBasic Compiler</a> is a Basic compiler distributed by SourceBoost Technologies.").arg("http://www.sourceboost.com/Products/BoostBasic/Overview.html");
+}
+
+Tool::SourceGenerator *Boost::GroupBasic::sourceGeneratorFactory() const
+{
+  return new BasicSourceGenerator;
+}
+
+Tool::Group::BaseData Boost::GroupBasic16::baseFactory(Tool::Category category) const
+{
+  if ( category==Tool::Category::Compiler ) return BaseData(new Boost::CompilerBasic16, Both);
+  if ( category==Tool::Category::Linker )   return BaseData(new Boost::Linker16, Both);
+  return BaseData();
+}
+
+Tool::Group::BaseData Boost::GroupBasic18::baseFactory(Tool::Category category) const
+{
+  if ( category==Tool::Category::Linker )   return BaseData(new Boost::Linker18, Both);
+  if ( category==Tool::Category::Compiler ) return BaseData(new Boost::CompilerBasic18, Both);
+  return BaseData();
+}
diff --git a/src/tools/boost/boostbasic.h b/src/tools/boost/boostbasic.h
new file mode 100644
index 0000000..5f3b820
--- /dev/null
+++ b/src/tools/boost/boostbasic.h
@@ -0,0 +1,72 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef BOOSTBASIC_H
+#define BOOSTBASIC_H
+
+#include "boost.h"
+
+namespace Boost
+{
+//----------------------------------------------------------------------------
+class CompilerBasic : public Compiler
+{
+private:
+  virtual bool checkExecutableResult(bool withWine, QStringList &lines) const;
+};
+
+class CompilerBasic16 : public CompilerBasic
+{
+public:
+  virtual QString baseExecutable(bool, Tool::OutputExecutableType) const { return "boostbasic.pic16.exe"; }
+};
+
+class CompilerBasic18 : public CompilerBasic
+{
+public:
+  virtual QString baseExecutable(bool, Tool::OutputExecutableType) const { return "boostbasic.pic18.exe"; }
+};
+
+//----------------------------------------------------------------------------
+class GroupBasic : public Group
+{
+public:
+  GroupBasic() : Group(".bas", "Sub main()\nEnd Sub\n") {}
+  virtual QString informationText() const;
+  virtual PURL::FileType implementationType(PURL::ToolType type) const { return (type==PURL::ToolType::Compiler ? PURL::BasicSource : PURL::Nb_FileTypes); }
+
+private:
+  virtual Tool::SourceGenerator *sourceGeneratorFactory() const;
+};
+
+class GroupBasic16 : public GroupBasic
+{
+public:
+  virtual QString name() const { return "boostbasic16"; }
+  virtual QString label() const { return i18n("BoostBasic Compiler for PIC16"); }
+
+private:
+  virtual BaseData baseFactory(Tool::Category) const;
+  virtual bool supportedArchitecture(Pic::Architecture architecture) const { return ( architecture==Pic::Architecture::P16X ); }
+};
+
+class GroupBasic18 : public GroupBasic
+{
+public:
+  virtual QString name() const { return "boostbasic18"; }
+  virtual QString label() const { return i18n("BoostBasic Compiler for PIC18"); }
+
+private:
+  virtual BaseData baseFactory(Tool::Category) const;
+  virtual bool supportedArchitecture(Pic::Architecture architecture) const
+    { return ( architecture==Pic::Architecture::P18C || architecture==Pic::Architecture::P18F || architecture==Pic::Architecture::P18J ); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/boost/boostc.cpp b/src/tools/boost/boostc.cpp
new file mode 100644
index 0000000..9a6ada9
--- /dev/null
+++ b/src/tools/boost/boostc.cpp
@@ -0,0 +1,42 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "boostc.h"
+
+#include "boost_generator.h"
+
+//----------------------------------------------------------------------------
+bool Boost::CompilerC::checkExecutableResult(bool, QStringList &lines) const
+{
+  return ( lines.count()>0 && lines[0].startsWith("BoostC ") );
+}
+
+//----------------------------------------------------------------------------
+QString Boost::GroupC::informationText() const
+{
+  return i18n("<a href=\"%1\">BoostC Compiler</a> is a C compiler distributed by SourceBoost Technologies.").arg("http://www.sourceboost.com/Products/BoostC/Overview.html");
+}
+
+Tool::SourceGenerator *Boost::GroupC::sourceGeneratorFactory() const
+{
+  return new CSourceGenerator;
+}
+
+Tool::Group::BaseData Boost::GroupC16::baseFactory(Tool::Category category) const
+{
+  if ( category==Tool::Category::Compiler ) return BaseData(new Boost::CompilerC16, Both);
+  if ( category==Tool::Category::Linker )   return BaseData(new Boost::Linker16, Both);
+  return BaseData();
+}
+
+Tool::Group::BaseData Boost::GroupC18::baseFactory(Tool::Category category) const
+{
+  if ( category==Tool::Category::Compiler ) return BaseData(new Boost::CompilerC18, Both);
+  if ( category==Tool::Category::Linker )   return BaseData(new Boost::Linker18, Both);
+  return BaseData();
+}
diff --git a/src/tools/boost/boostc.h b/src/tools/boost/boostc.h
new file mode 100644
index 0000000..5191560
--- /dev/null
+++ b/src/tools/boost/boostc.h
@@ -0,0 +1,72 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef BOOSTC_H
+#define BOOSTC_H
+
+#include "boost.h"
+
+namespace Boost
+{
+//----------------------------------------------------------------------------
+class CompilerC : public Compiler
+{
+private:
+  virtual bool checkExecutableResult(bool withWine, QStringList &lines) const;
+};
+
+class CompilerC16 : public CompilerC
+{
+public:
+  virtual QString baseExecutable(bool, Tool::OutputExecutableType) const { return "boostc.pic16.exe"; }
+};
+
+class CompilerC18 : public CompilerC
+{
+public:
+  virtual QString baseExecutable(bool, Tool::OutputExecutableType) const { return "boostc.pic18.exe"; }
+};
+
+//----------------------------------------------------------------------------
+class GroupC : public Group
+{
+public:
+  GroupC() : Group(".c", "void main(void) {}\n") {}
+  virtual QString informationText() const;
+  virtual PURL::FileType implementationType(PURL::ToolType type) const { return (type==PURL::ToolType::Compiler ? PURL::CSource : PURL::Nb_FileTypes); }
+
+private:
+  virtual Tool::SourceGenerator *sourceGeneratorFactory() const;
+};
+
+class GroupC16 : public GroupC
+{
+public:
+  virtual QString name() const { return "boostc16"; }
+  virtual QString label() const { return i18n("BoostC Compiler for PIC16"); }
+
+private:
+  virtual BaseData baseFactory(Tool::Category) const;
+  virtual bool supportedArchitecture(Pic::Architecture architecture) const { return ( architecture==Pic::Architecture::P16X ); }
+};
+
+class GroupC18 : public GroupC
+{
+public:
+  virtual QString name() const { return "boostc18"; }
+  virtual QString label() const { return i18n("BoostC Compiler for PIC18"); }
+
+private:
+  virtual BaseData baseFactory(Tool::Category) const;
+  virtual bool supportedArchitecture(Pic::Architecture architecture) const
+    { return ( architecture==Pic::Architecture::P18C || architecture==Pic::Architecture::P18F || architecture==Pic::Architecture::P18J ); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/boost/boostc_compile.cpp b/src/tools/boost/boostc_compile.cpp
new file mode 100644
index 0000000..2298361
--- /dev/null
+++ b/src/tools/boost/boostc_compile.cpp
@@ -0,0 +1,56 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "boostc_compile.h"
+
+#include "boost_config.h"
+
+//----------------------------------------------------------------------------
+void Boost::Process::logStderrLine(const QString &line)
+{
+  if ( parseErrorLine(line, Compile::ParseErrorData("(.*)\\((\\d+).*\\): (error|warning):(.*)", 1, 2, 4, 3)) ) return;
+  doLog(Log::LineType::Normal, line, QString::null, 0);
+}
+
+//----------------------------------------------------------------------------
+QStringList Boost::CompileFile::genericArguments(const Compile::Config &config) const
+{
+  QStringList args;
+  args += "-t %DEVICE";
+  args += "-i";
+  args += config.includeDirs(Tool::Category::Compiler, "-I", QString::null, ";");
+  args += config.customOptions(Tool::Category::Compiler);
+  args += "%I";
+  return args;
+}
+
+QString Boost::CompileFile::outputFiles() const
+{
+  return "obj";
+}
+
+//----------------------------------------------------------------------------
+QStringList Boost::Link::genericArguments(const Compile::Config &config) const
+{
+  QStringList args;
+  args += "-t %DEVICE";
+  args += "-p";
+  args += "%PROJECT";
+  args += config.includeDirs(Tool::Category::Linker, "-ld%SEP");
+  PURL::Directory dir = Compile::Config::directory(group(), Compile::DirectoryType::Library);
+  if ( !dir.isEmpty() ) args += "-ld%SEP" + dir.path();
+  args += config.customOptions(Tool::Category::Linker);
+  args += "%OBJS";
+  return args;
+}
+
+QString Boost::Link::outputFiles() const
+{
+  return "PURL::Lst PURL::Hex PURL::Coff PURL::AsmGPAsm stat tree casm";
+}
+
diff --git a/src/tools/boost/boostc_compile.h b/src/tools/boost/boostc_compile.h
new file mode 100644
index 0000000..5c3696a
--- /dev/null
+++ b/src/tools/boost/boostc_compile.h
@@ -0,0 +1,46 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef BOOSTC_COMPILE_H
+#define BOOSTC_COMPILE_H
+
+#include "tools/list/compile_process.h"
+
+namespace Boost
+{
+//----------------------------------------------------------------------------
+class Process : public Compile::Process
+{
+Q_OBJECT
+protected:
+  virtual QString deviceName() const { return "PIC" + _data.device; }
+  virtual void logStderrLine(const QString &line);
+};
+
+//----------------------------------------------------------------------------
+class CompileFile : public Process
+{
+Q_OBJECT
+protected:
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+  virtual QString outputFiles() const;
+};
+
+//----------------------------------------------------------------------------
+class Link : public Process
+{
+Q_OBJECT
+protected:
+  virtual QString objectExtension() const { return "obj"; }
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+  virtual QString outputFiles() const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/boost/boostcpp.cpp b/src/tools/boost/boostcpp.cpp
new file mode 100644
index 0000000..8991de7
--- /dev/null
+++ b/src/tools/boost/boostcpp.cpp
@@ -0,0 +1,43 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "boostcpp.h"
+
+#include "boostc.h"
+#include "boost_generator.h"
+
+//----------------------------------------------------------------------------
+bool Boost::CompilerCpp::checkExecutableResult(bool, QStringList &lines) const
+{
+  return ( lines.count()>0 && lines[0].startsWith("BoostC++ ") );
+}
+
+//----------------------------------------------------------------------------
+QString Boost::GroupCpp::informationText() const
+{
+  return i18n("<a href=\"%1\">BoostC++ Compiler</a> is a C compiler distributed by SourceBoost Technologies.").arg("http://www.sourceboost.com/Products/BoostCpp/Overview.html");
+}
+
+Tool::SourceGenerator *Boost::GroupCpp::sourceGeneratorFactory() const
+{
+  return new CSourceGenerator;
+}
+
+Tool::Group::BaseData Boost::GroupCpp16::baseFactory(Tool::Category category) const
+{
+  if ( category==Tool::Category::Compiler ) return BaseData(new Boost::CompilerCpp16, Both);
+  if ( category==Tool::Category::Linker )   return BaseData(new Boost::Linker16, Both);
+  return BaseData();
+}
+
+Tool::Group::BaseData Boost::GroupCpp18::baseFactory(Tool::Category category) const
+{
+  if ( category==Tool::Category::Compiler ) return BaseData(new Boost::CompilerCpp18, Both);
+  if ( category==Tool::Category::Linker )   return BaseData(new Boost::Linker18, Both);
+  return BaseData();
+}
diff --git a/src/tools/boost/boostcpp.h b/src/tools/boost/boostcpp.h
new file mode 100644
index 0000000..bf5e2ee
--- /dev/null
+++ b/src/tools/boost/boostcpp.h
@@ -0,0 +1,71 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef BOOSTCPP_H
+#define BOOSTCPP_H
+
+#include "boost.h"
+
+namespace Boost
+{
+//----------------------------------------------------------------------------
+class CompilerCpp : public Compiler
+{
+private:
+  virtual bool checkExecutableResult(bool withWine, QStringList &lines) const;
+};
+
+class CompilerCpp16 : public CompilerCpp
+{
+public:
+  virtual QString baseExecutable(bool, Tool::OutputExecutableType) const { return "boostc++.pic16.exe"; }
+};
+
+class CompilerCpp18 : public CompilerCpp
+{
+public:
+  virtual QString baseExecutable(bool, Tool::OutputExecutableType) const { return "boostc++.pic18.exe"; }
+};
+
+//----------------------------------------------------------------------------
+class GroupCpp : public Group
+{
+public:
+  GroupCpp() : Group(".cpp", "void main(void) {}\n") {}
+  virtual QString informationText() const;
+  virtual PURL::FileType implementationType(PURL::ToolType type) const { return (type==PURL::ToolType::Compiler ? PURL::CppSource : PURL::Nb_FileTypes); }
+
+private:
+  virtual Tool::SourceGenerator *sourceGeneratorFactory() const;
+};
+
+class GroupCpp16 : public GroupCpp
+{
+public:
+  virtual QString name() const { return "boostc++16"; }
+  virtual QString label() const { return i18n("BoostC++ Compiler for PIC16"); }
+
+private:
+  virtual BaseData baseFactory(Tool::Category) const;
+  virtual bool supportedArchitecture(Pic::Architecture architecture) const { return ( architecture==Pic::Architecture::P16X ); }
+};
+
+class GroupCpp18 : public GroupCpp
+{
+public:
+  virtual QString name() const { return "boostc++18"; }
+  virtual QString label() const { return i18n("BoostC++ Compiler for PIC18"); }
+
+private:
+  virtual BaseData baseFactory(Tool::Category) const;
+  virtual bool supportedArchitecture(Pic::Architecture architecture) const
+    { return ( architecture==Pic::Architecture::P18C || architecture==Pic::Architecture::P18F || architecture==Pic::Architecture::P18J ); }
+};
+} // namespace
+
+#endif
diff --git a/src/tools/boost/gui/Makefile.am b/src/tools/boost/gui/Makefile.am
new file mode 100644
index 0000000..94fda00
--- /dev/null
+++ b/src/tools/boost/gui/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libboostui.la
+libboostui_la_SOURCES = boost_ui.cpp
+libboostui_la_LDFLAGS = $(all_libraries)
diff --git a/src/tools/boost/gui/boost_ui.cpp b/src/tools/boost/gui/boost_ui.cpp
new file mode 100644
index 0000000..2357165
--- /dev/null
+++ b/src/tools/boost/gui/boost_ui.cpp
@@ -0,0 +1,19 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "boost_ui.h"
+
+//----------------------------------------------------------------------------
+Boost::ConfigWidget::ConfigWidget(Project *project)
+  : ToolConfigWidget(project)
+{}
+
+void Boost::ConfigWidget::initEntries()
+{
+  createIncludeDirectoriesEntry();
+}
diff --git a/src/tools/boost/gui/boost_ui.h b/src/tools/boost/gui/boost_ui.h
new file mode 100644
index 0000000..6cafcf6
--- /dev/null
+++ b/src/tools/boost/gui/boost_ui.h
@@ -0,0 +1,35 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef BOOST_UI_H
+#define BOOST_UI_H
+
+#include "tools/gui/tool_config_widget.h"
+#include "tools/gui/tool_group_ui.h"
+
+namespace Boost
+{
+//----------------------------------------------------------------------------
+class ConfigWidget : public ToolConfigWidget
+{
+Q_OBJECT
+public:
+  ConfigWidget(Project *project);
+  virtual void initEntries();
+};
+
+//----------------------------------------------------------------------------
+class GroupUI : public Tool::GroupUI
+{
+public:
+  virtual ToolConfigWidget *configWidgetFactory(Tool::Category, ::Project *project) const { return new ConfigWidget(project); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/c18/Makefile.am b/src/tools/c18/Makefile.am
new file mode 100644
index 0000000..032e53a
--- /dev/null
+++ b/src/tools/c18/Makefile.am
@@ -0,0 +1,8 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+libc18_la_LDFLAGS = $(all_libraries)
+noinst_LTLIBRARIES = libc18.la
+libc18_la_SOURCES = c18_compile.cpp c18_config.cpp c18.cpp
+
+SUBDIRS = gui
\ No newline at end of file
diff --git a/src/tools/c18/c18.cpp b/src/tools/c18/c18.cpp
new file mode 100644
index 0000000..4eb5bfd
--- /dev/null
+++ b/src/tools/c18/c18.cpp
@@ -0,0 +1,86 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "c18.h"
+
+#include <qdir.h>
+
+#include "c18_compile.h"
+#include "c18_config.h"
+#include "devices/pic/pic/pic_memory.h"
+#include "devices/list/device_list.h"
+#include "devices/pic/pic/pic_group.h"
+#include "common/global/process.h"
+
+//----------------------------------------------------------------------------
+bool C18::Compiler::checkExecutableResult(bool, QStringList &lines) const
+{
+  return ( lines.count()>0 && lines[0].startsWith("MPLAB C18") );
+}
+
+bool C18::Linker::checkExecutableResult(bool, QStringList &lines) const
+{
+  return ( lines.count()>0 && lines[0].startsWith("MPLINK") );
+}
+
+//----------------------------------------------------------------------------
+QValueList<const Device::Data *> C18::Group::getSupportedDevices(const QString &) const
+{
+  QValueVector<QString> devices = Device::lister().group("pic")->supportedDevices();
+  QValueList<const Device::Data *> list;
+  for (uint i=0; i<devices.count(); i++) {
+    const Device::Data *data = Device::lister().data(devices[i]);
+    if ( static_cast<const Pic::Data *>(data)->is18Family() ) list.append(data);
+  }
+  return list;
+}
+
+Compile::Process *C18::Group::processFactory(const Compile::Data &data) const
+{
+  if ( data.category==Tool::Category::Compiler ) return new CompileFile;
+  Q_ASSERT( data.category==Tool::Category::Linker );
+  return new Link;
+}
+
+PURL::Directory C18::Group::autodetectDirectory(Compile::DirectoryType type, const PURL::Directory &execDir, bool) const
+{
+  QDir dir(execDir.path());
+  if ( !dir.cdUp() ) return PURL::Directory();
+  switch (type.type()) {
+    case Compile::DirectoryType::LinkerScript:
+      if ( dir.cd("lkr") ) return dir.path();
+      break;
+    case Compile::DirectoryType::Header:
+      if ( dir.cd("h") ) return dir.path();
+      break;
+    case Compile::DirectoryType::Library:
+      if ( dir.cd("lib") ) return dir.path();
+      break;
+    case Compile::DirectoryType::Executable:
+    case Compile::DirectoryType::Source:
+    case Compile::DirectoryType::Nb_Types: Q_ASSERT(false); break;
+  }
+  return PURL::Directory();
+}
+
+Compile::Config *C18::Group::configFactory(::Project *project) const
+{
+  return new Config(project);
+}
+
+Tool::Group::BaseData C18::Group::baseFactory(Tool::Category category) const
+{
+  if ( category==Tool::Category::Compiler ) return BaseData(new Compiler, Both);
+  if ( category==Tool::Category::Linker )   return BaseData(new Linker, Both);
+  return BaseData();
+}
+
+QString C18::Group::informationText() const
+{
+  return i18n("<qt><a href=\"%1\">C18</a> is a C compiler distributed by Microchip.</qt>").arg("http://www.microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=1406&dDocName=en010014&part=SW006011");
+}
diff --git a/src/tools/c18/c18.h b/src/tools/c18/c18.h
new file mode 100644
index 0000000..fac739e
--- /dev/null
+++ b/src/tools/c18/c18.h
@@ -0,0 +1,62 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef C18_H
+#define C18_H
+
+#include "tools/base/tool_group.h"
+
+namespace C18
+{
+//----------------------------------------------------------------------------
+class Compiler : public Tool::Base
+{
+public:
+  virtual QString baseExecutable(bool, Tool::OutputExecutableType) const { return "mcc18"; }
+
+private:
+  virtual QStringList checkExecutableOptions(bool) const { return "-v"; }
+  virtual bool checkExecutableResult(bool withWine, QStringList &lines) const;
+};
+
+class Linker : public Tool::Base
+{
+public:
+  virtual QString baseExecutable(bool, Tool::OutputExecutableType) const { return "mplink"; }
+
+private:
+  virtual QStringList checkExecutableOptions(bool) const { return "/v"; }
+  virtual bool checkExecutableResult(bool withWine, QStringList &lines) const;
+};
+
+//----------------------------------------------------------------------------
+class Group : public Tool::Group
+{
+public:
+  virtual QString name() const { return "c18"; }
+  virtual QString label() const { return i18n("C18 Compiler"); }
+  virtual QString informationText() const;
+  virtual Tool::Category checkDevicesCategory() const { return Tool::Category::Nb_Types; }
+  virtual bool hasDirectory(Compile::DirectoryType type) const { return ( type!=Compile::DirectoryType::Source ); }
+  virtual PURL::FileType linkerScriptType() const { return PURL::Lkr; }
+  virtual Tool::ExecutableType preferedExecutableType() const { return Tool::ExecutableType::Windows; }
+  virtual Tool::CompileType compileType() const { return Tool::SeparateFiles; }
+  virtual PURL::Directory autodetectDirectory(Compile::DirectoryType type, const PURL::Directory &execDir, bool withWine) const;
+  virtual PURL::FileType implementationType(PURL::ToolType type) const { return (type==PURL::ToolType::Compiler ? PURL::CSource : PURL::Nb_FileTypes); }
+
+private:
+  virtual QValueList<const Device::Data *> getSupportedDevices(const QString &s) const;
+  virtual Compile::Process *processFactory(const Compile::Data &data) const;
+  virtual Compile::Config *configFactory(::Project *project) const;
+  virtual BaseData baseFactory(Tool::Category category) const;
+  virtual Tool::SourceGenerator *sourceGeneratorFactory() const { /*TODO*/ return 0; }
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/c18/c18_compile.cpp b/src/tools/c18/c18_compile.cpp
new file mode 100644
index 0000000..181da36
--- /dev/null
+++ b/src/tools/c18/c18_compile.cpp
@@ -0,0 +1,65 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "c18_compile.h"
+
+#include "c18_config.h"
+#include "c18.h"
+#include "devices/list/device_list.h"
+
+//-----------------------------------------------------------------------------
+QStringList C18::CompileFile::genericArguments(const Compile::Config &config) const
+{
+  QStringList args;
+  args += config.includeDirs(Tool::Category::Compiler, "-I");
+  args += "-I" + Compile::Config::directory(group(), Compile::DirectoryType::Header).path();
+  args += "$NO_AUTO_DEVICE(-p)";
+  args += "$NO_AUTO_DEVICE(%DEVICE)";
+  args += config.customOptions(Tool::Category::Compiler);
+  args += "-fo=%OBJECT";
+  args += "%I";
+  return args;
+}
+
+QString C18::CompileFile::outputFiles() const
+{
+  return "PURL::Object";
+}
+
+void C18::CompileFile::logStderrLine(const QString &line)
+{
+  // #### TODO
+  doLog(Log::LineType::Normal, line, QString::null, 0);
+}
+
+//-----------------------------------------------------------------------------
+QStringList C18::Link::genericArguments(const Compile::Config &config) const
+{
+  QStringList args;
+  args += "/k%LKR_PATH";
+  args += "%LKR_NAME";
+  args += "/l" + Compile::Config::directory(group(), Compile::DirectoryType::Library).path();
+  args += config.customOptions(Tool::Category::Linker);
+  args += "/o%COFF";
+  args += "/m%MAP";
+  args += "%OBJS";
+  args += "%LIBS";
+  args += config.customLibraries(Tool::Category::Linker);
+  return args;
+}
+
+QString C18::Link::outputFiles() const
+{
+  return "PURL::Lkr PURL::Map PURL::Hex PURL::Coff PURL::Lst PURL::Cod";
+}
+
+void C18::Link::logStderrLine(const QString &line)
+{
+  // #### TODO
+  doLog(Log::LineType::Normal, line, QString::null, 0);
+}
diff --git a/src/tools/c18/c18_compile.h b/src/tools/c18/c18_compile.h
new file mode 100644
index 0000000..74f0f06
--- /dev/null
+++ b/src/tools/c18/c18_compile.h
@@ -0,0 +1,46 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef C18_COMPILE_H
+#define C18_COMPILE_H
+
+#include "tools/list/compile_process.h"
+
+namespace C18
+{
+//-----------------------------------------------------------------------------
+class Process : public Compile::Process
+{
+Q_OBJECT
+protected:
+  virtual QString deviceName() const { return _data.device.lower(); }
+};
+
+//-----------------------------------------------------------------------------
+class CompileFile : public Process
+{
+Q_OBJECT
+protected:
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+  virtual QString outputFiles() const;
+  virtual void logStderrLine(const QString &line);
+};
+
+//-----------------------------------------------------------------------------
+class Link : public Process
+{
+Q_OBJECT
+protected:
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+  virtual QString outputFiles() const;
+  virtual void logStderrLine(const QString &line);
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/c18/c18_config.cpp b/src/tools/c18/c18_config.cpp
new file mode 100644
index 0000000..fdf6164
--- /dev/null
+++ b/src/tools/c18/c18_config.cpp
@@ -0,0 +1,13 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "c18_config.h"
+
+const char * const C18::Config::WARNING_LEVEL_LABELS[Nb_WarningLevels] = {
+  I18N_NOOP("All messages"), I18N_NOOP("Warning and errors"), I18N_NOOP("Errors only")
+};
diff --git a/src/tools/c18/c18_config.h b/src/tools/c18/c18_config.h
new file mode 100644
index 0000000..dead1a1
--- /dev/null
+++ b/src/tools/c18/c18_config.h
@@ -0,0 +1,29 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef C18_CONFIG_H
+#define C18_CONFIG_H
+
+#include "tools/list/compile_config.h"
+
+namespace C18
+{
+
+class Config : public Compile::Config
+{
+public:
+  Config(Project *project) : Compile::Config(project) {}
+  enum { Nb_WarningLevels = 3 };
+  static const char * const WARNING_LEVEL_LABELS[Nb_WarningLevels];
+  uint warningLevel() const { return QMIN(Compile::Config::warningLevel(Tool::Category::Compiler), uint(Nb_WarningLevels)); }
+  void setWarningLevel(uint level) { Compile::Config::setWarningLevel(Tool::Category::Compiler, level); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/c18/gui/Makefile.am b/src/tools/c18/gui/Makefile.am
new file mode 100644
index 0000000..3e97599
--- /dev/null
+++ b/src/tools/c18/gui/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libc18ui.la
+libc18ui_la_LDFLAGS = $(all_libraries)
+libc18ui_la_SOURCES = c18_ui.cpp
diff --git a/src/tools/c18/gui/c18_ui.cpp b/src/tools/c18/gui/c18_ui.cpp
new file mode 100644
index 0000000..c10f328
--- /dev/null
+++ b/src/tools/c18/gui/c18_ui.cpp
@@ -0,0 +1,50 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "c18_ui.h"
+
+#include <qlabel.h>
+#include "tools/c18/c18_config.h"
+
+//----------------------------------------------------------------------------
+C18::ConfigWidget::ConfigWidget(Project *project)
+  : ToolConfigWidget(project), _warningLevel(0)
+{}
+
+void C18::ConfigWidget::initEntries()
+{
+  if ( _category==Tool::Category::Compiler ) {
+    uint row = container()->numRows();
+    QLabel *label = new QLabel(i18n("Warning level:"), container());
+    container()->addWidget(label, row,row, 0,0);
+    _warningLevel = new QComboBox(container());
+    connect(_warningLevel, SIGNAL(activated(int)), SIGNAL(changed()));
+    for (uint i=0; i<Config::Nb_WarningLevels; i++)
+      _warningLevel->insertItem(i18n(Config::WARNING_LEVEL_LABELS[i]));
+    container()->addWidget(_warningLevel, row,row, 1,1);
+    createIncludeDirectoriesEntry();
+  }
+  if ( _category==Tool::Category::Linker ) {
+    createCustomLibrariesEntry();
+    createHexFormatEntry();
+  }
+}
+
+void C18::ConfigWidget::loadConfig(const Compile::Config &config)
+{
+  ToolConfigWidget::loadConfig(config);
+  if ( _category==Tool::Category::Compiler )
+    _warningLevel->setCurrentItem(static_cast<const Config &>(config).warningLevel());
+}
+
+void C18::ConfigWidget::saveConfig(Compile::Config &config) const
+{
+  ToolConfigWidget::saveConfig(config);
+  if ( _category==Tool::Category::Compiler )
+    static_cast<Config &>(config).setWarningLevel(_warningLevel->currentItem());
+}
diff --git a/src/tools/c18/gui/c18_ui.h b/src/tools/c18/gui/c18_ui.h
new file mode 100644
index 0000000..d7d45c4
--- /dev/null
+++ b/src/tools/c18/gui/c18_ui.h
@@ -0,0 +1,40 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef C18_UI_H
+#define C18_UI_H
+
+#include "tools/gui/tool_config_widget.h"
+#include "tools/gui/tool_group_ui.h"
+
+namespace C18
+{
+//----------------------------------------------------------------------------
+class ConfigWidget : public ToolConfigWidget
+{
+Q_OBJECT
+public:
+  ConfigWidget(Project *project);
+
+private:
+  QComboBox *_warningLevel;
+  virtual void initEntries();
+  virtual void loadConfig(const Compile::Config &config);
+  virtual void saveConfig(Compile::Config &config) const;
+};
+
+//----------------------------------------------------------------------------
+class GroupUI : public Tool::GroupUI
+{
+public:
+  virtual ToolConfigWidget *configWidgetFactory(Tool::Category, ::Project *project) const { return new ConfigWidget(project); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/cc5x/Makefile.am b/src/tools/cc5x/Makefile.am
new file mode 100644
index 0000000..b72d8bb
--- /dev/null
+++ b/src/tools/cc5x/Makefile.am
@@ -0,0 +1,8 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libcc5x.la
+libcc5x_la_SOURCES = cc5x.cpp cc5x_compile.cpp cc5x_config.cpp
+libcc5x_la_LDFLAGS = $(all_libraries)
+
+SUBDIRS = gui
\ No newline at end of file
diff --git a/src/tools/cc5x/cc5x.cpp b/src/tools/cc5x/cc5x.cpp
new file mode 100644
index 0000000..5b28397
--- /dev/null
+++ b/src/tools/cc5x/cc5x.cpp
@@ -0,0 +1,62 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "cc5x.h"
+
+#include <qregexp.h>
+
+#include "cc5x_compile.h"
+#include "cc5x_config.h"
+#include "devices/pic/pic/pic_memory.h"
+#include "devices/list/device_list.h"
+#include "devices/base/device_group.h"
+
+//----------------------------------------------------------------------------
+bool CC5X::Base::checkExecutableResult(bool, QStringList &lines) const
+{
+  return ( lines.count()>0 && lines[0].startsWith("CC5X") );
+}
+
+//----------------------------------------------------------------------------
+QValueList<const Device::Data *> CC5X::Group::getSupportedDevices(const QString &) const
+{
+  QValueList<const Device::Data *> list;
+  QValueVector<QString> devices = Device::lister().group("pic")->supportedDevices();
+  for (uint i=0; i<devices.count(); i++) {
+    const Pic::Data *data = static_cast<const Pic::Data *>(Device::lister().data(devices[i]));
+    if ( data->architecture()!=Pic::Architecture::P10X && data->architecture()!=Pic::Architecture::P16X ) continue;
+    list.append(data);
+  }
+  return list;
+}
+
+Compile::Process *CC5X::Group::processFactory(const Compile::Data &data) const
+{
+  switch (data.category.type()) {
+    case Tool::Category::Compiler: return new CC5X::CompileFile;
+    default: break;
+  }
+  Q_ASSERT(false);
+  return 0;
+}
+
+Compile::Config *CC5X::Group::configFactory(::Project *project) const
+{
+  return new Config(project);
+}
+
+QString CC5X::Group::informationText() const
+{
+  return i18n("<a href=\"%1\">CC5X</a> is a C compiler distributed by B Knudsen Data.").arg("http://www.bknd.com/cc5x/index.shtml");
+}
+
+Tool::Group::BaseData CC5X::Group::baseFactory(Tool::Category category) const
+{
+  if ( category==Tool::Category::Compiler ) return BaseData(new CC5X::Base, Both);
+  return BaseData();
+}
diff --git a/src/tools/cc5x/cc5x.h b/src/tools/cc5x/cc5x.h
new file mode 100644
index 0000000..054a9ef
--- /dev/null
+++ b/src/tools/cc5x/cc5x.h
@@ -0,0 +1,50 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef CC5X_H
+#define CC5X_H
+
+#include "tools/base/tool_group.h"
+#include "common/global/pfile.h"
+
+namespace CC5X
+{
+//----------------------------------------------------------------------------
+class Base : public Tool::Base
+{
+public:
+  virtual QString baseExecutable(bool, Tool::OutputExecutableType) const { return "cc5x"; }
+
+private:
+  virtual QStringList checkExecutableOptions(bool) const { return QStringList(); }
+  virtual bool checkExecutableResult(bool withWine, QStringList &lines) const;
+};
+
+//----------------------------------------------------------------------------
+class Group : public Tool::Group
+{
+public:
+  virtual QString name() const { return "cc5x"; }
+  virtual QString label() const { return i18n("CC5X Compiler"); }
+  virtual QString informationText() const;
+  virtual Tool::Category checkDevicesCategory() const { return Tool::Category::Nb_Types; }
+  virtual Tool::ExecutableType preferedExecutableType() const { return Tool::ExecutableType::Windows; }
+  virtual Tool::CompileType compileType() const { return Tool::SingleFile; }
+  virtual PURL::FileType implementationType(PURL::ToolType type) const { return (type==PURL::ToolType::Compiler ? PURL::CSource : PURL::Nb_FileTypes); }
+
+private:
+  virtual QValueList<const Device::Data *> getSupportedDevices(const QString &s) const;
+  virtual Compile::Process *processFactory(const Compile::Data &data) const;
+  virtual Compile::Config *configFactory(::Project *project) const;
+  virtual BaseData baseFactory(Tool::Category) const;
+  virtual Tool::SourceGenerator *sourceGeneratorFactory() const { /*TODO*/ return 0; }
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/cc5x/cc5x_compile.cpp b/src/tools/cc5x/cc5x_compile.cpp
new file mode 100644
index 0000000..6956eb8
--- /dev/null
+++ b/src/tools/cc5x/cc5x_compile.cpp
@@ -0,0 +1,37 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "cc5x_compile.h"
+
+#include "cc5x_config.h"
+
+QStringList CC5X::CompileFile::genericArguments(const Compile::Config &config) const
+{
+  QStringList args;
+  args += "-a";   // produce asm file
+  args += "-CC";  // produce cod c file
+  args += "-L";   // produce list file
+  args += "-eL";  // error details
+  //args += "-FM";  // error format for MPLAB
+  args += "-o%O"; // set output file
+  args += config.includeDirs(Tool::Category::Compiler, "-I");
+  args += config.customOptions(Tool::Category::Compiler);
+  args += "%I";
+  return args;
+}
+
+void CC5X::CompileFile::logStderrLine(const QString &line)
+{
+  if ( parseErrorLine(line, Compile::ParseErrorData("(.*):([0-9]+):(.+)\\[([0-9]+)\\](.+)", 1, 2, 5, 3)) ) return;
+  doLog(Log::LineType::Normal, line, QString::null, 0); // unrecognized
+}
+
+QString CC5X::CompileFile::outputFiles() const
+{
+  return "PURL::Lst PURL::AsmGPAsm PURL::Hex PURL::Cod occ";
+}
diff --git a/src/tools/cc5x/cc5x_compile.h b/src/tools/cc5x/cc5x_compile.h
new file mode 100644
index 0000000..f400380
--- /dev/null
+++ b/src/tools/cc5x/cc5x_compile.h
@@ -0,0 +1,29 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef CC5X_COMPILE_H
+#define CC5X_COMPILE_H
+
+#include "tools/list/compile_process.h"
+
+namespace CC5X
+{
+
+class CompileFile : public Compile::Process
+{
+Q_OBJECT
+protected:
+  virtual QString deviceName() const { return QString::null; }
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+  virtual void logStderrLine(const QString &line);
+  virtual QString outputFiles() const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/cc5x/cc5x_config.cpp b/src/tools/cc5x/cc5x_config.cpp
new file mode 100644
index 0000000..96def5c
--- /dev/null
+++ b/src/tools/cc5x/cc5x_config.cpp
@@ -0,0 +1,9 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "cc5x_config.h"
diff --git a/src/tools/cc5x/cc5x_config.h b/src/tools/cc5x/cc5x_config.h
new file mode 100644
index 0000000..da1d1f9
--- /dev/null
+++ b/src/tools/cc5x/cc5x_config.h
@@ -0,0 +1,25 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef CC5X_CONFIG_H
+#define CC5X_CONFIG_H
+
+#include "tools/list/compile_config.h"
+
+namespace CC5X
+{
+//----------------------------------------------------------------------------
+class Config : public Compile::Config
+{
+public:
+  Config(Project *project) : Compile::Config(project) {}
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/cc5x/gui/Makefile.am b/src/tools/cc5x/gui/Makefile.am
new file mode 100644
index 0000000..760aee9
--- /dev/null
+++ b/src/tools/cc5x/gui/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libcc5xui.la
+libcc5xui_la_SOURCES = cc5x_ui.cpp
+libcc5xui_la_LDFLAGS = $(all_libraries)
\ No newline at end of file
diff --git a/src/tools/cc5x/gui/cc5x_ui.cpp b/src/tools/cc5x/gui/cc5x_ui.cpp
new file mode 100644
index 0000000..b35e6af
--- /dev/null
+++ b/src/tools/cc5x/gui/cc5x_ui.cpp
@@ -0,0 +1,19 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "cc5x_ui.h"
+
+//----------------------------------------------------------------------------
+CC5X::ConfigWidget::ConfigWidget(Project *project)
+  : ToolConfigWidget(project)
+{}
+
+void CC5X::ConfigWidget::initEntries()
+{
+  if ( _category!=Tool::Category::Linker ) createIncludeDirectoriesEntry();
+}
diff --git a/src/tools/cc5x/gui/cc5x_ui.h b/src/tools/cc5x/gui/cc5x_ui.h
new file mode 100644
index 0000000..7bf0a37
--- /dev/null
+++ b/src/tools/cc5x/gui/cc5x_ui.h
@@ -0,0 +1,35 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef CC5X_UI_H
+#define CC5X_UI_H
+
+#include "tools/gui/tool_config_widget.h"
+#include "tools/gui/tool_group_ui.h"
+
+namespace CC5X
+{
+//----------------------------------------------------------------------------
+class ConfigWidget : public ToolConfigWidget
+{
+Q_OBJECT
+public:
+  ConfigWidget(Project *project);
+  virtual void initEntries();
+};
+
+//----------------------------------------------------------------------------
+class GroupUI : public Tool::GroupUI
+{
+public:
+  virtual ToolConfigWidget *configWidgetFactory(Tool::Category, ::Project *project) const { return new ConfigWidget(project); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/ccsc/Makefile.am b/src/tools/ccsc/Makefile.am
new file mode 100644
index 0000000..e0d3844
--- /dev/null
+++ b/src/tools/ccsc/Makefile.am
@@ -0,0 +1,8 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libccsc.la
+libccsc_la_LDFLAGS = $(all_libraries)
+libccsc_la_SOURCES = ccsc.cpp ccsc_compile.cpp ccsc_config.cpp
+
+SUBDIRS = gui
\ No newline at end of file
diff --git a/src/tools/ccsc/ccsc.cpp b/src/tools/ccsc/ccsc.cpp
new file mode 100644
index 0000000..b28f29a
--- /dev/null
+++ b/src/tools/ccsc/ccsc.cpp
@@ -0,0 +1,106 @@
+/***************************************************************************
+ *   Copyright (C) 2006-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "ccsc.h"
+
+#include <qregexp.h>
+
+#include "ccsc_compile.h"
+#include "ccsc_config.h"
+#include "devices/pic/pic/pic_memory.h"
+#include "devices/list/device_list.h"
+#include "devices/base/device_group.h"
+
+//----------------------------------------------------------------------------
+QStringList CCSC::Base::checkExecutableOptions(bool withWine) const
+{
+  QStringList args;
+  if (withWine) {
+    args += "+STDOUT";
+    args += "+FM";
+    args += static_cast<const Group *>(_group)->checkExecutableUrl().filename();
+  } else args += "+V";
+  return args;
+}
+
+PURL::Directory CCSC::Base::checkExecutableWorkingDirectory() const
+{
+  return static_cast<const Group *>(_group)->checkExecutableUrl().directory();
+}
+
+bool CCSC::Base::checkExecutableResult(bool withWine, QStringList &lines) const
+{
+  if (withWine) {
+    PURL::Url url = static_cast<const Group *>(_group)->checkExecutableUrl().toExtension("err");
+    Log::StringView sview;
+    PURL::File file(url, sview);
+    if ( !file.openForRead() ) {
+      url = static_cast<const Group *>(_group)->checkExecutableUrl().appendExtension("err");
+      file.setUrl(url);
+      if ( !file.openForRead() ) return false;
+    }
+    lines = file.readLines();
+  }
+  return true;
+}
+
+//----------------------------------------------------------------------------
+CCSC::Group::Group()
+  : _checkExecTmp(_sview, ".c")
+{
+  if ( _checkExecTmp.openForWrite() ) _checkExecTmp.appendText("#include <16f877a.h>\nvoid main(void) {}\n");
+  _checkExecTmp.close();
+}
+
+QValueList<const Device::Data *> CCSC::Group::getSupportedDevices(const QString &) const
+{
+  QValueList<const Device::Data *> list;
+  QValueVector<QString> devices = Device::lister().group("pic")->supportedDevices();
+  for (uint i=0; i<devices.count(); i++) {
+    const Device::Data *data = Device::lister().data(devices[i]);
+    Pic::Architecture arch = static_cast<const Pic::Data *>(data)->architecture();
+    if ( arch==Pic::Architecture::P30F || arch==Pic::Architecture::P33F ) continue;
+    list.append(data);
+  }
+  return list;
+}
+
+Compile::Process *CCSC::Group::processFactory(const Compile::Data &data) const
+{
+  switch (data.category.type()) {
+    case Tool::Category::Compiler: return new CCSC::CompileFile;
+    default: break;
+  }
+  Q_ASSERT(false);
+  return 0;
+}
+
+Compile::Config *CCSC::Group::configFactory(::Project *project) const
+{
+  return new Config(project);
+}
+
+QString CCSC::Group::informationText() const
+{
+  return i18n("<a href=\"%1\">CCS Compiler</a> is a C compiler distributed by CCS.").arg("http://www.ccsinfo.com/content.php?page=compilers");
+}
+
+Tool::Group::BaseData CCSC::Group::baseFactory(Tool::Category category) const
+{
+  if ( category==Tool::Category::Compiler ) return BaseData(new CCSC::Base, Both);
+  return BaseData();
+}
+
+VersionData CCSC::Group::getToolchainVersion()
+{
+  if ( !Compile::Config::withWine(*this) ) {
+    QStringList lines;
+    if ( checkExecutable(Tool::Category::Compiler, lines) && lines.count()>=1 && lines[0].contains("3.") ) return VersionData(3, 0, 0);
+  }
+  return VersionData(4, 0, 0); // default
+}
diff --git a/src/tools/ccsc/ccsc.h b/src/tools/ccsc/ccsc.h
new file mode 100644
index 0000000..aef2005
--- /dev/null
+++ b/src/tools/ccsc/ccsc.h
@@ -0,0 +1,57 @@
+/***************************************************************************
+ *   Copyright (C) 2006-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef CCSC_H
+#define CCSC_H
+
+#include "tools/base/tool_group.h"
+#include "common/gui/pfile_ext.h"
+
+namespace CCSC
+{
+//----------------------------------------------------------------------------
+class Base : public Tool::Base
+{
+public:
+  virtual QString baseExecutable(bool, Tool::OutputExecutableType) const { return "ccsc"; }
+
+private:
+  virtual QStringList checkExecutableOptions(bool withWine) const;
+  virtual bool checkExecutableResult(bool withWine, QStringList &lines) const;
+  virtual PURL::Directory checkExecutableWorkingDirectory() const;
+};
+
+//----------------------------------------------------------------------------
+class Group : public Tool::Group
+{
+public:
+  Group();
+  PURL::Url checkExecutableUrl() const { return _checkExecTmp.url(); }
+  virtual QString name() const { return "ccsc"; }
+  virtual QString label() const { return i18n("CCS Compiler"); }
+  virtual QString informationText() const;
+  virtual Tool::Category checkDevicesCategory() const { return Tool::Category::Nb_Types; }
+  virtual Tool::ExecutableType preferedExecutableType() const { return Tool::ExecutableType::Unix; }
+  virtual Tool::CompileType compileType() const { return Tool::SingleFile; }
+  virtual PURL::FileType implementationType(PURL::ToolType type) const { return (type==PURL::ToolType::Compiler ? PURL::CSource : PURL::Nb_FileTypes); }
+
+private:
+  Log::StringView _sview;
+  PURL::TempFile  _checkExecTmp;
+
+  virtual QValueList<const Device::Data *> getSupportedDevices(const QString &s) const;
+  virtual Compile::Process *processFactory(const Compile::Data &data) const;
+  virtual Compile::Config *configFactory(::Project *project) const;
+  virtual BaseData baseFactory(Tool::Category) const;
+  virtual Tool::SourceGenerator *sourceGeneratorFactory() const { /*TODO*/ return 0; }
+  virtual VersionData getToolchainVersion();
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/ccsc/ccsc_compile.cpp b/src/tools/ccsc/ccsc_compile.cpp
new file mode 100644
index 0000000..56897e8
--- /dev/null
+++ b/src/tools/ccsc/ccsc_compile.cpp
@@ -0,0 +1,107 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "ccsc_compile.h"
+
+#include "ccsc.h"
+#include "common/global/pfile.h"
+#include "ccsc_config.h"
+#include "devices/list/device_list.h"
+#include "devices/pic/base/pic.h"
+
+QString CCSC::CompileFile::familyName() const
+{
+  const Pic::Data *pdata = static_cast<const Pic::Data *>(Device::lister().data(_data.device));
+  switch (pdata->architecture().type()) {
+    case Pic::Architecture::P10X: return "B";
+    case Pic::Architecture::P16X: return "M";
+    case Pic::Architecture::P17C: return "7";
+    case Pic::Architecture::P18C:
+    case Pic::Architecture::P18F:
+    case Pic::Architecture::P18J: return "H";
+    case Pic::Architecture::P24F:
+    case Pic::Architecture::P24H:
+    case Pic::Architecture::P30F:
+    case Pic::Architecture::P33F: break;
+    case Pic::Architecture::Nb_Types: break;
+  }
+  Q_ASSERT(false);
+  return QString::null;
+}
+
+QStringList CCSC::CompileFile::genericArguments(const Compile::Config &config) const
+{
+  bool isVersion3 = ( static_cast<const Group &>(Main::toolGroup()).version().majorNum()==3 );
+  QStringList args;
+  args += "+STDOUT"; // output messages on stdout
+  if ( !isVersion3 ) args += "+EA";     // show all messages and warnings
+  args += "-P";      // close compile windows after compilation done
+  if ( !isVersion3 ) args += "+DF";     // output COFF file
+  args += "+LSlst";  // normal list file
+  args += "+O8hex";  // produce 8bit Intel file
+  if ( !isVersion3 ) args += "+M";      // generate symbol file
+  args += "-J";      // do not create project file
+  args += "-A";      // do not create stat file
+  args += "+F%FAMILY";
+  if ( isVersion3 ) args += config.includeDirs(Tool::Category::Compiler, "I=\"", "\"");
+  else args += config.includeDirs(Tool::Category::Compiler, "I+=\"", "\"");
+  args += config.customOptions(Tool::Category::Compiler);
+  args += "%I";
+  return args;
+}
+
+void CCSC::CompileFile::logStderrLine(const QString &line)
+{
+  // ignore output for wine
+  if ( !Compile::Config::withWine(group()) ) parseLine(line);
+}
+
+void CCSC::CompileFile::parseLine(const QString &line)
+{
+  Log::LineType type;
+  if ( line.startsWith(">>>") )      type = Log::LineType::Warning;
+  else if ( line.startsWith("***") ) type = Log::LineType::Error;
+  else if ( line.startsWith("---") ) type = Log::LineType::Information;
+  else {
+    doLog(Log::LineType::Normal, line, QString::null, 0); // unrecognized
+    return;
+  }
+  if ( parseErrorLine(line, Compile::ParseErrorData("[*>-]+\\s\\w+\\s\\d+\\s\"([^\"]*)\"\\sLine\\s(\\d+)\\([^)]*\\):(.*)", 1, 2, 3, type)) ) return;
+  if ( parseErrorLine(line, Compile::ParseErrorData("[*>-]+\\s\"([^\"]*)\"\\sLine\\s(\\d+):\\s\\w+\\s#\\d+:(.*)", 1, 2, 3, type)) ) return;
+  doLog(type, line, QString::null, 0);
+}
+
+void CCSC::CompileFile::done(int code)
+{
+  // with wine, rely on error file
+  if ( Compile::Config::withWine(group()) ) {
+    PURL::Url url = PURL::Url(directory(), inputFilepath(0)).toExtension("err");
+    Log::StringView sview;
+    PURL::File file(url, sview);
+    if ( !file.openForRead() ) doLog(Log::LineType::Error, i18n("Could not find error file (%1).").arg(url.pretty()), QString::null, 0);
+    else {
+      QStringList lines = file.readLines();
+      for (uint i=0; i<lines.count(); i++) parseLine(lines[i]);
+    }
+  }
+  Compile::Process::done(code);
+}
+
+PURL::Url CCSC::CompileFile::url(PURL::FileType type, uint i) const
+{
+  PURL::Url url;
+  Q_ASSERT( i<_data.items.count() );
+  url = _data.items[i].url;
+  if ( type==PURL::Nb_FileTypes ) return url;
+  return url.toFileType(type);
+}
+
+QString CCSC::CompileFile::outputFiles() const
+{
+  return "PURL::Lst PURL::Hex PURL::Coff PURL::Cod sym err esym occ";
+}
diff --git a/src/tools/ccsc/ccsc_compile.h b/src/tools/ccsc/ccsc_compile.h
new file mode 100644
index 0000000..ddf8f20
--- /dev/null
+++ b/src/tools/ccsc/ccsc_compile.h
@@ -0,0 +1,37 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef CCSC_COMPILE_H
+#define CCSC_COMPILE_H
+
+#include "tools/list/compile_process.h"
+
+namespace CCSC
+{
+
+class CompileFile : public Compile::Process
+{
+Q_OBJECT
+protected:
+  virtual QString deviceName() const { return QString::null; }
+  virtual QString familyName() const;
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+  virtual void logStderrLine(const QString &line);
+  virtual QString outputFiles() const;
+  virtual PURL::Url url(PURL::FileType type = PURL::Nb_FileTypes, uint i = 0) const;
+
+protected slots:
+  virtual void done(int code);
+
+private:
+  void parseLine(const QString &line);
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/ccsc/ccsc_config.cpp b/src/tools/ccsc/ccsc_config.cpp
new file mode 100644
index 0000000..333bc14
--- /dev/null
+++ b/src/tools/ccsc/ccsc_config.cpp
@@ -0,0 +1,9 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "ccsc_config.h"
diff --git a/src/tools/ccsc/ccsc_config.h b/src/tools/ccsc/ccsc_config.h
new file mode 100644
index 0000000..f4ddef6
--- /dev/null
+++ b/src/tools/ccsc/ccsc_config.h
@@ -0,0 +1,25 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef CCSC_CONFIG_H
+#define CCSC_CONFIG_H
+
+#include "tools/list/compile_config.h"
+
+namespace CCSC
+{
+
+class Config : public Compile::Config
+{
+public:
+  Config(Project *project) : Compile::Config(project) {}
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/ccsc/gui/Makefile.am b/src/tools/ccsc/gui/Makefile.am
new file mode 100644
index 0000000..e3703bb
--- /dev/null
+++ b/src/tools/ccsc/gui/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libccscui.la
+libccscui_la_LDFLAGS = $(all_libraries)
+libccscui_la_SOURCES = ccsc_ui.cpp
diff --git a/src/tools/ccsc/gui/ccsc_ui.cpp b/src/tools/ccsc/gui/ccsc_ui.cpp
new file mode 100644
index 0000000..eb2a900
--- /dev/null
+++ b/src/tools/ccsc/gui/ccsc_ui.cpp
@@ -0,0 +1,19 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "ccsc_ui.h"
+
+//----------------------------------------------------------------------------
+CCSC::ConfigWidget::ConfigWidget(Project *project)
+  : ToolConfigWidget(project)
+{}
+
+void CCSC::ConfigWidget::initEntries()
+{
+  if ( _category!=Tool::Category::Linker ) createIncludeDirectoriesEntry();
+}
diff --git a/src/tools/ccsc/gui/ccsc_ui.h b/src/tools/ccsc/gui/ccsc_ui.h
new file mode 100644
index 0000000..356cf22
--- /dev/null
+++ b/src/tools/ccsc/gui/ccsc_ui.h
@@ -0,0 +1,35 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef CCSC_UI_H
+#define CCSC_UI_H
+
+#include "tools/gui/tool_config_widget.h"
+#include "tools/gui/tool_group_ui.h"
+
+namespace CCSC
+{
+//----------------------------------------------------------------------------
+class ConfigWidget : public ToolConfigWidget
+{
+Q_OBJECT
+public:
+  ConfigWidget(Project *project);
+  virtual void initEntries();
+};
+
+//----------------------------------------------------------------------------
+class GroupUI : public Tool::GroupUI
+{
+public:
+  virtual ToolConfigWidget *configWidgetFactory(Tool::Category, ::Project *project) const { return new ConfigWidget(project); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/custom/Makefile.am b/src/tools/custom/Makefile.am
new file mode 100644
index 0000000..2e45534
--- /dev/null
+++ b/src/tools/custom/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libcustom.la
+libcustom_la_LDFLAGS = $(all_libraries)
+libcustom_la_SOURCES = custom.cpp
diff --git a/src/tools/custom/custom.cpp b/src/tools/custom/custom.cpp
new file mode 100644
index 0000000..3779957
--- /dev/null
+++ b/src/tools/custom/custom.cpp
@@ -0,0 +1,23 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "custom.h"
+
+#include "devices/list/device_list.h"
+#include "devices/base/device_group.h"
+
+QValueList<const Device::Data *> CustomTool::Group::getSupportedDevices(const QString &) const
+{
+  QValueVector<QString> devices = Device::lister().supportedDevices();
+  QValueList<const Device::Data *> list;
+  for (uint i=0; i<devices.count(); i++) {
+    const Device::Data *data = Device::lister().data(devices[i]);
+    list.append(data);
+  }
+  return list;
+}
diff --git a/src/tools/custom/custom.h b/src/tools/custom/custom.h
new file mode 100644
index 0000000..770515a
--- /dev/null
+++ b/src/tools/custom/custom.h
@@ -0,0 +1,38 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef CUSTOM_TOOL_H
+#define CUSTOM_TOOL_H
+
+#include "tools/base/tool_group.h"
+
+namespace CustomTool
+{
+
+class Group : public Tool::Group
+{
+public:
+  virtual QString name() const { return CUSTOM_NAME; }
+  virtual QString label() const { return i18n("Custom"); }
+  virtual QString informationText() const { return QString::null; }
+  virtual Tool::Category checkDevicesCategory() const { return Tool::Category::Nb_Types; }
+  virtual Tool::ExecutableType preferedExecutableType() const { return Tool::ExecutableType::Unix; }
+  virtual Tool::CompileType compileType() const { return Tool::AllFiles; }
+  virtual PURL::FileType implementationType(PURL::ToolType) const { return PURL::Nb_FileTypes; }
+
+protected:
+  virtual BaseData baseFactory(Tool::Category) const { return BaseData(); }
+  virtual QValueList<const Device::Data *> getSupportedDevices(const QString &s) const;
+  virtual Compile::Process *processFactory(const Compile::Data &) const { return 0; }
+  virtual Compile::Config *configFactory(::Project *) const { return 0; }
+  virtual Tool::SourceGenerator *sourceGeneratorFactory() const { return 0; }
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/gputils/Makefile.am b/src/tools/gputils/Makefile.am
new file mode 100644
index 0000000..157784c
--- /dev/null
+++ b/src/tools/gputils/Makefile.am
@@ -0,0 +1,9 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libgputils.la
+libgputils_la_LDFLAGS = $(all_libraries)
+libgputils_la_SOURCES = gputils_compile.cpp gputils_config.cpp gputils.cpp \
+	gputils_generator.cpp
+
+SUBDIRS = gui
\ No newline at end of file
diff --git a/src/tools/gputils/gputils.cpp b/src/tools/gputils/gputils.cpp
new file mode 100644
index 0000000..3219598
--- /dev/null
+++ b/src/tools/gputils/gputils.cpp
@@ -0,0 +1,107 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "gputils.h"
+
+#include <qregexp.h>
+
+#include "gputils_compile.h"
+#include "gputils_config.h"
+#include "devices/pic/pic/pic_memory.h"
+#include "common/global/process.h"
+#include "gputils_generator.h"
+
+//----------------------------------------------------------------------------
+QString GPUtils::Base::baseExecutable(bool, Tool::OutputExecutableType) const
+{
+  switch (_category.type()) {
+    case Tool::Category::Assembler: return "gpasm";
+    case Tool::Category::Linker:    return "gplink";
+    case Tool::Category::Librarian: return "gplib";
+    default: break;
+  }
+  return QString::null;
+}
+
+bool GPUtils::Base::checkExecutableResult(bool withWine, QStringList &lines) const
+{
+  return ( lines.count()>0 && lines[0].startsWith(baseExecutable(withWine, Tool::OutputExecutableType::Coff)) );
+}
+
+//----------------------------------------------------------------------------
+QString GPUtils::Group::informationText() const
+{
+  return i18n("<a href=\"%1\">GPUtils</a> is an open-source assembler and linker suite.<br>").arg("http://gputils.sourceforge.net");
+}
+
+Tool::Group::BaseData GPUtils::Group::baseFactory(Tool::Category category) const
+{
+  if ( category==Tool::Category::Assembler ) return BaseData(new ::GPUtils::Base, Both);
+  if ( category==Tool::Category::Linker || category==Tool::Category::Librarian ) return BaseData(new ::GPUtils::Base, ProjectOnly);
+  return BaseData();
+}
+
+PURL::Directory GPUtils::Group::autodetectDirectory(Compile::DirectoryType type, const PURL::Directory &execDir, bool withWine) const
+{
+  switch (type.type()) {
+    case Compile::DirectoryType::LinkerScript: {
+      QString exec = execDir.path() + base(Tool::Category::Linker)->baseExecutable(withWine, Tool::OutputExecutableType::Coff);
+      ::Process::StringOutput process;
+      process.setup(exec, "-h", withWine);
+      if ( ::Process::runSynchronously(process, ::Process::Start, 1000)!=::Process::Exited ) return PURL::Directory();
+      QString s = process.sout() + process.serr();
+      QRegExp re(".*Default linker script path ([^\\n]*)\\n.*");
+      if ( !re.exactMatch(s) ) return PURL::Directory();
+      return PURL::Directory(re.cap(1));
+    }
+    case Compile::DirectoryType::Header: {
+      QString exec = execDir.path() + base(Tool::Category::Assembler)->baseExecutable(withWine, Tool::OutputExecutableType::Coff);
+      ::Process::StringOutput process;
+      process.setup(exec, "-h", withWine);
+      if ( ::Process::runSynchronously(process, ::Process::Start, 1000)!=::Process::Exited ) return PURL::Directory();
+      QString s = process.sout() + process.serr();
+      QRegExp re(".*Default header file path ([^\\n]*)\\n.*");
+      if ( !re.exactMatch(s) ) return PURL::Directory();
+      return PURL::Directory(re.cap(1));
+    }
+    case Compile::DirectoryType::Executable:
+    case Compile::DirectoryType::Library:
+    case Compile::DirectoryType::Source:
+    case Compile::DirectoryType::Nb_Types: break;
+  }
+  return PURL::Directory();
+}
+
+Compile::Process *GPUtils::Group::processFactory(const Compile::Data &data) const
+{
+  switch (data.category.type()) {
+    case Tool::Category::Assembler:
+      if (data.project) return new GPUtils::AssembleProjectFile;
+      return new GPUtils::AssembleStandaloneFile;
+    case Tool::Category::Linker:
+      Q_ASSERT(data.project);
+      return new GPUtils::LinkProject;
+    case Tool::Category::Librarian:
+      Q_ASSERT(data.project);
+      return new GPUtils::LibraryProject;
+    default: break;
+  }
+  Q_ASSERT(false);
+  return 0;
+}
+
+Compile::Config *GPUtils::Group::configFactory(::Project *project) const
+{
+  return new Config(project);
+}
+
+Tool::SourceGenerator *GPUtils::Group::sourceGeneratorFactory() const
+{
+  return new SourceGenerator;
+}
diff --git a/src/tools/gputils/gputils.h b/src/tools/gputils/gputils.h
new file mode 100644
index 0000000..b8bcded
--- /dev/null
+++ b/src/tools/gputils/gputils.h
@@ -0,0 +1,54 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef GPUTILS_H
+#define GPUTILS_H
+
+#include "tools/base/tool_group.h"
+#include "gputils_generator.h"
+
+namespace GPUtils
+{
+//----------------------------------------------------------------------------
+class Base : public Tool::Base
+{
+public:
+  virtual QString baseExecutable(bool withWine, Tool::OutputExecutableType type) const;
+
+private:
+  virtual QStringList checkExecutableOptions(bool) const { return "-v"; }
+  virtual bool checkExecutableResult(bool withWine, QStringList &lines) const;
+};
+
+//----------------------------------------------------------------------------
+class Group : public Tool::Group
+{
+public:
+  virtual QString name() const { return "gputils"; }
+  virtual QString label() const { return i18n("GPUtils"); }
+  virtual QString informationText() const;
+  virtual Tool::Category checkDevicesCategory() const { return Tool::Category::Assembler; }
+  virtual QStringList checkDevicesOptions(uint) const { return "-l"; }
+  virtual PURL::Directory autodetectDirectory(Compile::DirectoryType type, const PURL::Directory &execDir, bool withWine) const;
+  virtual bool hasDirectory(Compile::DirectoryType type) const { return type==Compile::DirectoryType::Header || type==Compile::DirectoryType::LinkerScript; }
+  virtual PURL::FileType linkerScriptType() const { return PURL::Lkr; }
+  virtual Tool::ExecutableType preferedExecutableType() const { return Tool::ExecutableType::Unix; }
+  virtual Tool::CompileType compileType() const { return Tool::SeparateFiles; }
+  virtual PURL::FileType implementationType(PURL::ToolType type) const { return (type==PURL::ToolType::Assembler ? PURL::AsmGPAsm : PURL::Nb_FileTypes); }
+
+protected:
+  virtual BaseData baseFactory(Tool::Category c) const;
+  virtual QValueList<const Device::Data *> getSupportedDevices(const QString &s) const { return GPUtils::getSupportedDevices(s); }
+  virtual Compile::Process *processFactory(const Compile::Data &data) const;
+  virtual Compile::Config *configFactory(::Project *project) const;
+  virtual Tool::SourceGenerator *sourceGeneratorFactory() const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/gputils/gputils_compile.cpp b/src/tools/gputils/gputils_compile.cpp
new file mode 100644
index 0000000..c59828c
--- /dev/null
+++ b/src/tools/gputils/gputils_compile.cpp
@@ -0,0 +1,109 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "gputils_compile.h"
+
+#include "gputils.h"
+#include "gputils_config.h"
+#include "devices/list/device_list.h"
+#include "coff/base/disassembler.h"
+
+//-----------------------------------------------------------------------------
+QString GPUtils::Process::deviceName() const
+{
+  return toDeviceName(_data.device);
+}
+
+//-----------------------------------------------------------------------------
+void GPUtils::AssembleFile::logStderrLine(const QString &line)
+{
+  if ( parseErrorLine(line, Compile::ParseErrorData("([^:]*):([0-9]+):(.+)\\[[0-9]+\\](.+)", 1, 2, 4, 3)) ) return;
+  if ( parseErrorLine(line, Compile::ParseErrorData("([^:]*):([^:]+):([0-9]+):(.+)", 2, 3, 4, Log::LineType::Warning)) ) return;
+  doLog(Log::LineType::Normal, line, QString::null, 0); // unrecognized
+}
+
+//-----------------------------------------------------------------------------
+QStringList GPUtils::AssembleStandaloneFile::genericArguments(const Compile::Config &config) const
+{
+  QStringList args;
+  args += "-L"; // force list
+  args += "-o%O";
+  uint wl = static_cast<const Config &>(config).gpasmWarningLevel();
+  if ( wl!=Config::Nb_WarningLevels ) args += "-w" + QString::number(wl);
+  args += config.includeDirs(Tool::Category::Assembler, "-I");
+  args += "$NO_AUTO_DEVICE(-p%DEVICE)";
+  HexBuffer::Format format = config.hexFormat();
+  if( format!=HexBuffer::Nb_Formats ) args += QString("-a") + HexBuffer::FORMATS[format];
+  args += config.customOptions(Tool::Category::Assembler);
+  args += "%I";
+  return args;
+}
+
+QString GPUtils::AssembleStandaloneFile::outputFiles() const
+{
+  return "PURL::Lst PURL::Cod PURL::Hex";
+}
+
+//-----------------------------------------------------------------------------
+QStringList GPUtils::AssembleProjectFile::genericArguments(const Compile::Config &config) const
+{
+  QStringList args;
+  args += "-c"; // relocatable code
+  args += config.includeDirs(Tool::Category::Assembler, "-I");
+  if ( !_data.items[0].generated ) args += "-p%DEVICE";
+  uint wl = static_cast<const Config &>(config).gpasmWarningLevel() ;
+  if( wl!=Config::Nb_WarningLevels ) args += "-w" + QString::number(wl);
+  args += config.customOptions(Tool::Category::Assembler);
+  args += "%I";
+  return args;
+}
+
+QString GPUtils::AssembleProjectFile::outputFiles() const
+{
+  return "PURL::Object PURL::Lst";
+}
+
+//-----------------------------------------------------------------------------
+QStringList GPUtils::LinkProject::genericArguments(const Compile::Config &config) const
+{
+  QStringList args;
+  args += "-o%O";
+  args += "-c"; // create coff file
+  HexBuffer::Format f = config.hexFormat();
+  if ( f!=HexBuffer::Nb_Formats ) args += QString("-a") + HexBuffer::FORMATS[f];
+  args += "-m";  // with map
+  args += config.includeDirs(Tool::Category::Linker, "-I");
+  args += "$LKR(-s%LKR)";
+  args += config.customOptions(Tool::Category::Linker);
+  args += "%OBJS";
+  args += "%LIBS";
+  return args;
+}
+
+QString GPUtils::LinkProject::outputFiles() const
+{
+  return "PURL::Lkr PURL::Map PURL::Lst PURL::Cod PURL::Coff PURL::Hex";
+}
+
+//-----------------------------------------------------------------------------
+QStringList GPUtils::LibraryProject::genericArguments(const Compile::Config &config) const
+{
+  QStringList args;
+  args += "-c"; // create archive
+  args += "%O";
+  args += config.customOptions(Tool::Category::Librarian);
+  args += "%OBJS";
+  args += "%LIBS";
+  return args;
+}
+
+QString GPUtils::LibraryProject::outputFiles() const
+{
+  return "PURL::Library";
+}
diff --git a/src/tools/gputils/gputils_compile.h b/src/tools/gputils/gputils_compile.h
new file mode 100644
index 0000000..a6a09c9
--- /dev/null
+++ b/src/tools/gputils/gputils_compile.h
@@ -0,0 +1,73 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef GPUTILS_COMPILE_H
+#define GPUTILS_COMPILE_H
+
+#include "tools/list/compile_process.h"
+
+namespace GPUtils
+{
+//-----------------------------------------------------------------------------
+class Process : public Compile::Process
+{
+Q_OBJECT
+private:
+  virtual QString deviceName() const;
+  virtual bool hasLinkerScript() const { return ( _data.linkType==Compile::Icd2Linking || Compile::Process::hasLinkerScript() ); }
+};
+
+//-----------------------------------------------------------------------------
+class AssembleFile : public Process
+{
+Q_OBJECT
+private:
+  virtual void logStderrLine(const QString &line);
+};
+
+//-----------------------------------------------------------------------------
+class AssembleStandaloneFile : public AssembleFile
+{
+Q_OBJECT
+private:
+  virtual QString outputFiles() const;
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+};
+
+//-----------------------------------------------------------------------------
+class AssembleProjectFile : public AssembleFile
+{
+Q_OBJECT
+private:
+  virtual QString outputFiles() const;
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+};
+
+//-----------------------------------------------------------------------------
+class LinkProject : public Process
+{
+Q_OBJECT
+private:
+  virtual QString outputFiles() const;
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+  virtual void logStderrLine(const QString &line) { doLog(filterType(line), line, QString::null, 0); }
+};
+
+//-----------------------------------------------------------------------------
+class LibraryProject : public Process
+{
+Q_OBJECT
+private:
+  virtual QString outputFiles() const;
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+  virtual void logStderrLine(const QString &line) { doLog(filterType(line), line, QString::null, 0); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/gputils/gputils_config.cpp b/src/tools/gputils/gputils_config.cpp
new file mode 100644
index 0000000..8f7bca2
--- /dev/null
+++ b/src/tools/gputils/gputils_config.cpp
@@ -0,0 +1,19 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "gputils_config.h"
+
+const char * const GPUtils::Config::WARNING_LEVEL_LABELS[Nb_WarningLevels] = {
+  I18N_NOOP("All messages"), I18N_NOOP("Warning and errors"), I18N_NOOP("Errors only")
+};
+
+uint GPUtils::Config::gpasmWarningLevel() const
+{
+  return QMIN(warningLevel(Tool::Category::Assembler), uint(Nb_WarningLevels));
+}
diff --git a/src/tools/gputils/gputils_config.h b/src/tools/gputils/gputils_config.h
new file mode 100644
index 0000000..cdaa66e
--- /dev/null
+++ b/src/tools/gputils/gputils_config.h
@@ -0,0 +1,30 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef GPUTILS_CONFIG_H
+#define GPUTILS_CONFIG_H
+
+#include "tools/list/compile_config.h"
+
+namespace GPUtils
+{
+
+class Config : public Compile::Config
+{
+public:
+  Config(Project *project) : Compile::Config(project) {}
+  enum { Nb_WarningLevels = 3 };
+  static const char * const WARNING_LEVEL_LABELS[Nb_WarningLevels];
+  uint gpasmWarningLevel() const;
+  void setGPAsmWarningLevel(uint level) { setWarningLevel(Tool::Category::Assembler, level); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/gputils/gputils_generator.cpp b/src/tools/gputils/gputils_generator.cpp
new file mode 100644
index 0000000..3bcebac
--- /dev/null
+++ b/src/tools/gputils/gputils_generator.cpp
@@ -0,0 +1,256 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "gputils_generator.h"
+
+#include "devices/pic/pic/pic_memory.h"
+#include "devices/pic/base/pic_register.h"
+#include "devices/list/device_list.h"
+
+//----------------------------------------------------------------------------
+QValueList<const Device::Data *> GPUtils::getSupportedDevices(const QString &s)
+{
+  QStringList devices = QStringList::split(' ', s.simplifyWhiteSpace().upper());
+  QValueList<const Device::Data *> list;
+  for (uint i=0; i<devices.count(); i++) {
+    QString name = devices[i];
+    if ( devices[i].startsWith("P1") ) name = name.mid(1);
+    const Device::Data *data = Device::lister().data(name);
+    if (data) list.append(data);
+  }
+  return list;
+}
+
+//----------------------------------------------------------------------------
+SourceLine::List GPUtils::SourceGenerator::configLines(PURL::ToolType, const Device::Memory &memory, bool &ok) const
+{
+  return GPUtils::generateConfigLines(static_cast<const Pic::Memory &>(memory), ok);
+}
+
+SourceLine::List GPUtils::SourceGenerator::includeLines(PURL::ToolType, const Device::Data &data) const
+{
+  return GPUtils::includeLines(data);
+}
+
+SourceLine::List GPUtils::SourceGenerator::sourceFileContent(PURL::ToolType, const Device::Data &data, bool &ok) const
+{
+  ok = true;
+  SourceLine::List lines;
+  lines.appendSeparator();
+  const Pic::Data &pdata = static_cast<const Pic::Data &>(data);
+  const Pic::RegistersData &rdata = static_cast<const Pic::RegistersData &>(*data.registersData());
+  switch (pdata.architecture().type()) {
+  case Pic::Architecture::P10X:
+    lines.appendTitle(i18n("relocatable code"));
+    lines.appendNotIndentedCode("PROG CODE");
+    lines.appendNotIndentedCode("start");
+    lines.appendIndentedCode(QString::null, "<< " + i18n("insert code") + " >>");
+    lines.appendIndentedCode("goto    $", i18n("loop forever"));
+    lines.appendEmpty();
+    lines.appendNotIndentedCode("END");
+    break;
+  case Pic::Architecture::P16X: {
+    lines.appendTitle(i18n("Variables declaration"));
+    bool needPCLATH = ( pdata.nbWords(Pic::MemoryRangeType::Code)>0x400 );
+    uint first;
+    bool allShared;
+    bool hasShared = rdata.hasSharedGprs(first, allShared);
+    if ( hasShared && !allShared ) lines.appendNotIndentedCode("INT_VAR UDATA_SHR");
+    else {
+      first = rdata.firstGprIndex();
+      lines.appendNotIndentedCode("INT_VAR UDATA " + toHexLabel(first, rdata.nbCharsAddress()));
+    }
+    lines.appendNotIndentedCode("w_saved      RES 1", i18n("variable used for context saving"));
+    lines.appendNotIndentedCode("status_saved RES 1", i18n("variable used for context saving"));
+    first += 2;
+    if (needPCLATH) {
+      lines.appendNotIndentedCode("pclath_saved RES 1", i18n("variable used for context saving"));
+      first++;
+    }
+    lines.appendEmpty();
+    lines.appendNotIndentedCode("var1         RES 1", i18n("example variable"));
+    if ( !hasShared ) {
+      for (uint i=1; i<rdata.nbBanks; i++) {
+        uint address = first + i*rdata.nbBytesPerBank();
+        lines.appendNotIndentedCode(QString("INT_VAR%1 UDATA ").arg(i) + toHexLabel(address, rdata.nbCharsAddress()), i18n("variables used for context saving"));
+        lines.appendNotIndentedCode(QString("w_saved%1     RES 1").arg(i), i18n("variable used for context saving"));
+      }
+    }
+    lines.appendEmpty();
+    lines.appendSeparator();
+    lines.appendTitle(i18n("reset vector"));
+    lines.appendNotIndentedCode("STARTUP CODE 0x000");
+    lines.appendIndentedCode("nop", i18n("needed for ICD2 debugging"));
+    lines.appendIndentedCode("movlw   high start", i18n("load upper byte of 'start' label"));
+    lines.appendIndentedCode("movwf   PCLATH", i18n("initialize PCLATH"));
+    lines.appendIndentedCode("goto    start", i18n("go to start of main code"));
+    lines.appendEmpty();
+    lines.appendTitle(i18n("interrupt vector"));
+    lines.appendNotIndentedCode("INT_VECTOR CODE 0x004");
+    lines.appendIndentedCode("goto    interrupt", i18n("go to start of interrupt code"));
+    lines.appendEmpty();
+    lines.appendTitle(i18n("relocatable code"));
+    lines.appendNotIndentedCode("PROG CODE");
+    lines.appendNotIndentedCode("interrupt");
+    lines.appendIndentedCode("movwf   w_saved", i18n("save context"));
+    lines.appendIndentedCode("swapf   STATUS,w");
+    if ( !hasShared ) lines.appendIndentedCode("clrf    STATUS");
+    lines.appendIndentedCode("movwf   status_saved");
+    if (needPCLATH) {
+      lines.appendIndentedCode("movf    PCLATH,w", i18n("only required if using more than first page"));
+      lines.appendIndentedCode("movwf   pclath_saved");
+      lines.appendIndentedCode("clrf    PCLATH");
+    }
+    lines.appendIndentedCode(QString::null, "<< " + i18n("insert interrupt code") + " >>");
+    if (needPCLATH) {
+      lines.appendIndentedCode("movf    pclath_saved,w", i18n("restore context"));
+      lines.appendIndentedCode("movwf   PCLATH");
+      lines.appendIndentedCode("swapf   status_saved,w");
+    } else lines.appendIndentedCode("swapf   status_saved,w", i18n("restore context"));
+    lines.appendIndentedCode("movwf   STATUS");
+    lines.appendIndentedCode("swapf   w_saved,f");
+    lines.appendIndentedCode("swapf   w_saved,w");
+    lines.appendIndentedCode("retfie");
+    lines.appendEmpty();
+    lines.appendNotIndentedCode("start");
+    lines.appendIndentedCode(QString::null, "<< " + i18n("insert main code") + " >>");
+    lines.appendIndentedCode("goto    $", i18n("loop forever"));
+    lines.appendEmpty();
+    lines.appendNotIndentedCode("END");
+    break;
+  }
+  case Pic::Architecture::P17C:
+    lines.appendTitle(i18n("Variables declaration"));
+    lines.appendNotIndentedCode("INT_VAR UDATA " + toHexLabel(rdata.accessBankSplit, rdata.nbCharsAddress()));
+    lines.appendNotIndentedCode("wred_saved   RES 1", i18n("variable used for context saving (for low-priority interrupts only)"));
+    lines.appendNotIndentedCode("alusta_saved RES 1", i18n("variable used for context saving (for low-priority interrupts only)"));
+    lines.appendNotIndentedCode("bsr_saved    RES 1", i18n("variable used for context saving (for low-priority interrupts only)"));
+    lines.appendNotIndentedCode("pclath_saved RES 1", i18n("variable used for context saving (for low-priority interrupts only)"));
+    lines.appendEmpty();
+    lines.appendNotIndentedCode("var1 RES 1", i18n("example variable"));
+    lines.appendEmpty();
+    lines.appendSeparator();
+    lines.appendTitle(i18n("Macros"));
+    lines.appendNotIndentedCode("PUSH MACRO", i18n("for saving context"));
+    lines.appendIndentedCode("movpf   WREG,wred_saved");
+    lines.appendIndentedCode("movpf   ALUSTA,alusta_saved");
+    lines.appendIndentedCode("movpf   BSR,bsr_saved");
+    lines.appendIndentedCode("movpf   PCLATH,pclath_saved");
+    lines.appendIndentedCode("ENDM");
+    lines.appendEmpty();
+    lines.appendNotIndentedCode("POP MACRO", i18n("for restoringing context"));
+    lines.appendIndentedCode("movfp   pclath_saved,PCLATH");
+    lines.appendIndentedCode("movfp   bsr_saved,BSR");
+    lines.appendIndentedCode("movfp   alusta_saved,ALUSTA");
+    lines.appendIndentedCode("movfp   wred_saved,WREG");
+    lines.appendIndentedCode("ENDM");
+    lines.appendSeparator();
+    lines.appendTitle(i18n("reset vector"));
+    lines.appendNotIndentedCode("STARTUP CODE 0x0000");
+    lines.appendIndentedCode("nop", i18n("needed for ICD2 debugging"));
+    lines.appendIndentedCode("nop", i18n("needed for ICD2 debugging"));
+    lines.appendIndentedCode("goto    start", i18n("go to start of main code"));
+    lines.appendEmpty();
+    lines.appendNotIndentedCode("INT_PIN_VECTOR CODE 0x0008");
+    lines.appendIndentedCode("PUSH");
+    lines.appendIndentedCode("goto    int_pin_isr", i18n("go to start of int pin interrupt code"));
+    lines.appendEmpty();
+    lines.appendNotIndentedCode("TIMER0_VECTOR CODE 0x0010");
+    lines.appendIndentedCode("PUSH");
+    lines.appendIndentedCode("goto    timer0_isr", i18n("go to start of timer0 interrupt code"));
+    lines.appendEmpty();
+    lines.appendNotIndentedCode("T0CKI_VECTOR CODE 0x00018");
+    lines.appendIndentedCode("PUSH");
+    lines.appendIndentedCode("goto    t0cki_isr", i18n("go to start of t0cki interrupt code"));
+    lines.appendEmpty();
+    lines.appendNotIndentedCode("PERIPHERAL_VECTOR CODE 0x0020");
+    lines.appendIndentedCode("PUSH");
+    lines.appendIndentedCode("goto    peripheral_isr", i18n("go to start of peripheral interrupt code"));
+    lines.appendEmpty();
+    lines.appendNotIndentedCode("start:");
+    lines.appendIndentedCode(QString::null, "<< " + i18n("insert main code") + " >>");
+    lines.appendIndentedCode("goto    $", i18n("loop forever"));
+    lines.appendEmpty();
+    lines.appendTitle(i18n("INT pin interrupt service routine"));
+    lines.appendNotIndentedCode("int_pin_isr:");
+    lines.appendIndentedCode(QString::null, "<< " + i18n("insert INT pin interrupt code") + " >>");
+    lines.appendIndentedCode("POP");
+    lines.appendIndentedCode("retfie");
+    lines.appendEmpty();
+    lines.appendTitle(i18n("TIMER0 interrupt service routine"));
+    lines.appendNotIndentedCode("timer0_isr:");
+    lines.appendIndentedCode(QString::null, "<< " + i18n("insert TIMER0 interrupt code") + " >>");
+    lines.appendIndentedCode("POP");
+    lines.appendIndentedCode("retfie");
+    lines.appendEmpty();
+    lines.appendTitle(i18n("T0CKI interrupt service routine"));
+    lines.appendNotIndentedCode("t0cki_isr:");
+    lines.appendIndentedCode(QString::null, "<< " + i18n("insert T0CKI interrupt code") + " >>");
+    lines.appendIndentedCode("POP");
+    lines.appendIndentedCode("retfie");
+    lines.appendEmpty();
+    lines.appendTitle(i18n("peripheral interrupt service routine"));
+    lines.appendNotIndentedCode("peripheral_isr:");
+    lines.appendIndentedCode(QString::null, "<< " + i18n("insert peripheral interrupt code") + " >>");
+    lines.appendIndentedCode("POP");
+    lines.appendIndentedCode("retfie");
+    lines.appendEmpty();
+    lines.appendNotIndentedCode("END");
+    break;
+  case Pic::Architecture::P18C:
+  case Pic::Architecture::P18F:
+  case Pic::Architecture::P18J: // ??
+    lines.appendTitle(i18n("Variables declaration"));
+    lines.appendNotIndentedCode("INT_VAR UDATA " + toHexLabel(rdata.accessBankSplit, rdata.nbCharsAddress()));
+    lines.appendNotIndentedCode("w_saved      RES 1", i18n("variable used for context saving (for low-priority interrupts only)"));
+    lines.appendNotIndentedCode("status_saved RES 1", i18n("variable used for context saving (for low-priority interrupts only)"));
+    lines.appendNotIndentedCode("bsr_saved    RES 1", i18n("variable used for context saving (for low-priority interrupts only)"));
+    lines.appendEmpty();
+    lines.appendNotIndentedCode("var1 RES 1", i18n("example variable"));
+    lines.appendEmpty();
+    lines.appendSeparator();
+    lines.appendTitle(i18n("reset vector"));
+    lines.appendNotIndentedCode("STARTUP CODE 0x0000");
+    lines.appendIndentedCode("nop", i18n("needed for ICD2 debugging"));
+    lines.appendIndentedCode("nop", i18n("needed for ICD2 debugging"));
+    lines.appendIndentedCode("goto    start", i18n("go to start of main code"));
+    lines.appendEmpty();
+    lines.appendTitle(i18n("high priority interrupt vector"));
+    lines.appendNotIndentedCode("HIGH_INT_VECTOR CODE 0x0008");
+    lines.appendIndentedCode("bra    high_interrupt", i18n("go to start of high priority interrupt code"));
+    lines.appendEmpty();
+    lines.appendTitle(i18n("low priority interrupt vector"));
+    lines.appendNotIndentedCode("LOW_INT_VECTOR CODE 0x0018");
+    lines.appendIndentedCode("movff   STATUS,status_saved", i18n("save context"));
+    lines.appendIndentedCode("movff   WREG,w_saved");
+    lines.appendIndentedCode("movff   BSR,bsr_saved");
+    lines.appendIndentedCode(QString::null, "<< " + i18n("insert low priority interrupt code") + " >>");
+    lines.appendIndentedCode("movff   bsr_saved,BSR", i18n("restore context"));
+    lines.appendIndentedCode("movff   w_saved,WREG");
+    lines.appendIndentedCode("movff   status_saved,STATUS");
+    lines.appendIndentedCode("retfie");
+    lines.appendEmpty();
+    lines.appendTitle(i18n("high priority interrupt service routine"));
+    lines.appendNotIndentedCode("high_interrupt:");
+    lines.appendIndentedCode(QString::null, "<< " + i18n("insert high priority interrupt code") + " >>");
+    lines.appendIndentedCode("retfie  FAST");
+    lines.appendEmpty();
+    lines.appendNotIndentedCode("start:");
+    lines.appendIndentedCode(QString::null, "<< " + i18n("insert main code") + " >>");
+    lines.appendIndentedCode("goto    $", i18n("loop forever"));
+    lines.appendEmpty();
+    lines.appendNotIndentedCode("END");
+    break;
+  case Pic::Architecture::P24F:
+  case Pic::Architecture::P24H:
+  case Pic::Architecture::P30F:
+  case Pic::Architecture::P33F: ok = false; break;
+  case Pic::Architecture::Nb_Types: Q_ASSERT(false); break;
+  }
+  return lines;
+}
diff --git a/src/tools/gputils/gputils_generator.h b/src/tools/gputils/gputils_generator.h
new file mode 100644
index 0000000..38da66d
--- /dev/null
+++ b/src/tools/gputils/gputils_generator.h
@@ -0,0 +1,29 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef GPUTILS_GENERATOR_H
+#define GPUTILS_GENERATOR_H
+
+#include "coff/base/disassembler.h"
+
+namespace GPUtils
+{
+
+extern QValueList<const Device::Data *> getSupportedDevices(const QString &s);
+
+class SourceGenerator : public Tool::SourceGenerator
+{
+public:
+  virtual SourceLine::List configLines(PURL::ToolType type, const Device::Memory &memory, bool &ok) const;
+  virtual SourceLine::List sourceFileContent(PURL::ToolType type, const Device::Data &data, bool &ok) const;
+  virtual SourceLine::List includeLines(PURL::ToolType type, const Device::Data &data) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/gputils/gui/Makefile.am b/src/tools/gputils/gui/Makefile.am
new file mode 100644
index 0000000..0ac81c9
--- /dev/null
+++ b/src/tools/gputils/gui/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libgputilsui.la
+libgputilsui_la_LDFLAGS = $(all_libraries)
+libgputilsui_la_SOURCES = gputils_ui.cpp
diff --git a/src/tools/gputils/gui/gputils_ui.cpp b/src/tools/gputils/gui/gputils_ui.cpp
new file mode 100644
index 0000000..35cdce8
--- /dev/null
+++ b/src/tools/gputils/gui/gputils_ui.cpp
@@ -0,0 +1,53 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "gputils_ui.h"
+
+#include <qlabel.h>
+#include "tools/gputils/gputils_config.h"
+
+//----------------------------------------------------------------------------
+GPUtils::ConfigWidget::ConfigWidget(Project *project)
+  : ToolConfigWidget(project), _gpasmWarning(0)
+{}
+
+void GPUtils::ConfigWidget::initEntries()
+{
+  if ( _category==Tool::Category::Assembler ) {
+    uint row = container()->numRows();
+    QLabel *label = new QLabel(i18n("Warning level:"), container());
+    container()->addWidget(label, row,row, 0,0);
+    _gpasmWarning = new QComboBox(container());
+    connect(_gpasmWarning, SIGNAL(activated(int)), SIGNAL(changed()));
+    for (uint i=0; i<GPUtils::Config::Nb_WarningLevels; i++)
+      _gpasmWarning->insertItem(i18n(GPUtils::Config::WARNING_LEVEL_LABELS[i]));
+    _gpasmWarning->insertItem(i18n("as in LIST directive"));
+    container()->addWidget(_gpasmWarning, row,row, 1,1);
+    createIncludeDirectoriesEntry();
+    if ( _project==0 ) createHexFormatEntry();
+  }
+  if ( _category==Tool::Category::Linker ) {
+    createHexFormatEntry();
+    createIncludeDirectoriesEntry();
+  }
+}
+
+void GPUtils::ConfigWidget::loadConfig(const Compile::Config &config)
+{
+  ToolConfigWidget::loadConfig(config);
+  if ( _category==Tool::Category::Assembler )
+    _gpasmWarning->setCurrentItem(static_cast<const Config &>(config).gpasmWarningLevel());
+}
+
+void GPUtils::ConfigWidget::saveConfig(Compile::Config &config) const
+{
+  ToolConfigWidget::saveConfig(config);
+  if ( _category==Tool::Category::Assembler )
+    static_cast<Config &>(config).setGPAsmWarningLevel(_gpasmWarning->currentItem());
+}
diff --git a/src/tools/gputils/gui/gputils_ui.h b/src/tools/gputils/gui/gputils_ui.h
new file mode 100644
index 0000000..8d6daea
--- /dev/null
+++ b/src/tools/gputils/gui/gputils_ui.h
@@ -0,0 +1,41 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef GPUTILS_UI_H
+#define GPUTILS_UI_H
+
+#include "tools/gui/tool_config_widget.h"
+#include "tools/gui/tool_group_ui.h"
+
+namespace GPUtils
+{
+//----------------------------------------------------------------------------
+class ConfigWidget : public ToolConfigWidget
+{
+Q_OBJECT
+public:
+  ConfigWidget(Project *project);
+  virtual void initEntries();
+
+protected:
+  QComboBox *_gpasmWarning;
+  virtual void loadConfig(const Compile::Config &config);
+  virtual void saveConfig(Compile::Config &config) const;
+};
+
+//----------------------------------------------------------------------------
+class GroupUI : public Tool::GroupUI
+{
+public:
+  virtual ToolConfigWidget *configWidgetFactory(Tool::Category, ::Project *project) const { return new ConfigWidget(project); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/gui/Makefile.am b/src/tools/gui/Makefile.am
new file mode 100644
index 0000000..0d582eb
--- /dev/null
+++ b/src/tools/gui/Makefile.am
@@ -0,0 +1,7 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libtoolui.la
+libtoolui_la_LDFLAGS = $(all_libraries)
+libtoolui_la_SOURCES = tool_group_ui.cpp toolchain_config_widget.cpp \
+	tool_config_widget.cpp toolchain_config_center.cpp
diff --git a/src/tools/gui/tool_config_widget.cpp b/src/tools/gui/tool_config_widget.cpp
new file mode 100644
index 0000000..308e61b
--- /dev/null
+++ b/src/tools/gui/tool_config_widget.cpp
@@ -0,0 +1,181 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2004 Alain Gibaud <alain.gibaud@free.fr>                *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "tool_config_widget.h"
+
+#include <qtooltip.h>
+#include <qwidgetstack.h>
+#include <qvgroupbox.h>
+#include <klocale.h>
+
+#include "devices/base/hex_buffer.h"
+#include "tools/list/compile_config.h"
+#include "libgui/project.h"
+#include "common/gui/purl_gui.h"
+#include "tools/list/compile_process.h"
+
+const char * const ToolConfigWidget::ARGUMENTS_TYPE_LABELS[Nb_ArgumentsTypes] = {
+  I18N_NOOP("Automatic"), I18N_NOOP("Custom")
+};
+
+ToolConfigWidget::ToolConfigWidget(Project *project)
+  : ::ConfigWidget(0), _group(0), _project(project),
+    _customOptions(0), _customLibraries(0), _includeDirs(0), _hexFormat(0),
+    _config(0), _tmpConfig(0), _process(0), _tmpProject(0)
+{
+
+  Container *container = new Container(this);
+  container->setColStretch(2, 1);
+  addWidget(container, 0,0, 0,0);
+  QLabel *label = new QLabel(i18n("Configuration:"), container);
+  container->addWidget(label, 0,0, 0,0);
+  _argumentsType = new KComboBox(container);
+  for (uint i=0; i<Nb_ArgumentsTypes; i++)
+    _argumentsType->insertItem(i18n(ARGUMENTS_TYPE_LABELS[i]), i);
+  connect(_argumentsType, SIGNAL(activated(int)), SLOT(updateArguments()));
+  container->addWidget(_argumentsType, 0,0, 1,1);
+  label = new QLabel(i18n("Arguments:"), container);
+  container->addWidget(label, 1,1, 0,0);
+  _arguments = new KLineEdit(container);
+  _arguments->setReadOnly(true);
+  container->addWidget(_arguments, 1,1, 1,2);
+  KPushButton *button = new KPushButton(KGuiItem(QString::null, "help"), container);
+  connect(button, SIGNAL(clicked()), SIGNAL(displayHelp()));
+  container->addWidget(button, 1,1, 3,3);
+  _argumentsEditor = new EditListBox(1, container, "arguments_editor", EditListBox::DuplicatesAllowed,
+                                     EditListBox::Add | EditListBox::Remove | EditListBox::UpDown | EditListBox::RemoveAll | EditListBox::Reset);
+  connect(_argumentsEditor, SIGNAL(changed()), SLOT(updateArguments()));
+  connect(_argumentsEditor, SIGNAL(reset()), SLOT(resetCustomArguments()));
+  container->addWidget(_argumentsEditor, 2,2, 0,3);
+
+  _container = new Container(container);
+  _container->setColStretch(2, 1);
+  container->addWidget(_container, 3,3, 0,3);
+
+  connect(this, SIGNAL(changed()), SLOT(updateArguments()));
+}
+
+void ToolConfigWidget::init(Tool::Category category, const Tool::Group &group)
+{
+  _category = category;
+  _group = &group;
+  _config = _group->createConfig(_project);
+  _tmpProject = new Project(PURL::Url());
+  _tmpConfig = _group->createConfig(_tmpProject);
+  Compile::Data data(_category, QValueList<Compile::TodoItem>(), QString::null, _project, Compile::NormalLinking);
+  _process = _group->createCompileProcess(data, 0);
+
+  initEntries();
+  createCustomOptionsEntry();
+}
+
+ToolConfigWidget::~ToolConfigWidget()
+{
+  delete _process;
+  delete _tmpConfig;
+  delete _tmpProject;
+  delete _config;
+}
+
+PURL::DirectoriesWidget *ToolConfigWidget::createDirectoriesEntry(const QString &text)
+{
+  uint row = container()->numRows();
+  PURL::DirectoriesWidget *sdw = new PURL::DirectoriesWidget(text, _project ? _project->directory().path() : QString::null, container());
+  connect(sdw, SIGNAL(changed()), SIGNAL(changed()));
+  container()->addWidget(sdw, row,row, 0,2);
+  return sdw;
+}
+
+void ToolConfigWidget::createCustomOptionsEntry()
+{
+  uint row = container()->numRows();
+  QLabel *label = new QLabel(i18n("Custom options:"), container());
+  container()->addWidget(label, row,row, 0,0);
+  _customOptions = new QLineEdit(container());
+  connect(_customOptions, SIGNAL(textChanged(const QString &)), SIGNAL(changed()));
+  container()->addWidget(_customOptions, row,row, 1,2);
+}
+
+void ToolConfigWidget::createCustomLibrariesEntry()
+{
+  uint row = container()->numRows();
+  QLabel *label = new QLabel(i18n("Custom libraries:"), container());
+  container()->addWidget(label, row,row, 0,0);
+  _customLibraries = new QLineEdit(container());
+  connect(_customLibraries, SIGNAL(textChanged(const QString &)), SIGNAL(changed()));
+  QToolTip::add(_customLibraries, i18n("<qt>This values will be placed after the linked objects.</qt>")) ;
+  container()->addWidget(_customLibraries, row,row, 1,2);
+}
+
+void ToolConfigWidget::createHexFormatEntry()
+{
+  uint row = container()->numRows();
+  QLabel *label = new QLabel(i18n("Hex file format:"), container());
+  container()->addWidget(label, row,row, 0,0);
+  _hexFormat = new QComboBox(container());
+  connect(_hexFormat, SIGNAL(activated(int)), SIGNAL(changed()));
+  for (uint i=0; i<HexBuffer::Nb_Formats; i++)
+    _hexFormat->insertItem(HexBuffer::FORMATS[i]);
+  _hexFormat->insertItem(i18n("as in LIST directive"));
+  container()->addWidget(_hexFormat, row,row, 1,1);
+}
+
+void ToolConfigWidget::loadConfig()
+{
+  loadConfig(*_config);
+  if ( _config->customArguments(_category).isEmpty() ) resetCustomArguments();
+  else updateArguments();
+}
+
+void ToolConfigWidget::resetCustomArguments()
+{
+  _argumentsEditor->setTexts(arguments(AutomaticArguments));
+  updateArguments();
+}
+
+void ToolConfigWidget::loadConfig(const Compile::Config &config)
+{
+  _argumentsType->setCurrentItem(config.hasCustomArguments(_category) ? CustomArguments : AutomaticArguments);
+  _argumentsEditor->setTexts(config.customArguments(_category));
+  if (_includeDirs) _includeDirs->setDirectories(config.rawIncludeDirs(_category)) ;
+  if (_customOptions) _customOptions->setText(config.rawCustomOptions(_category));
+  if (_customLibraries) _customLibraries->setText(config.rawCustomLibraries(_category));
+  if (_hexFormat) _hexFormat->setCurrentItem(config.hexFormat());
+}
+
+void ToolConfigWidget::saveConfig(Compile::Config &config) const
+{
+  config.setHasCustomArguments(_category, _argumentsType->currentItem()==CustomArguments);
+  config.setCustomArguments(_category, _argumentsEditor->texts());
+  if (_includeDirs) config.setRawIncludeDirs(_category, _includeDirs->directories());
+  if (_customOptions) config.setRawCustomOptions(_category, _customOptions->text());
+  if (_customLibraries) config.setRawCustomLibraries(_category, _customLibraries->text());
+  if (_hexFormat) config.setHexFormat(HexBuffer::Format(_hexFormat->currentItem()));
+}
+
+QStringList ToolConfigWidget::arguments(ArgumentsType type) const
+{
+  if ( _tmpConfig==0 ) return QStringList();
+  saveConfig(*_tmpConfig);
+  if ( type==AutomaticArguments ) return _process->genericArguments(*_tmpConfig);
+  return _argumentsEditor->texts();
+}
+
+void ToolConfigWidget::updateArguments()
+{
+  ArgumentsType type = ArgumentsType(_argumentsType->currentItem());
+  if ( type==AutomaticArguments ) {
+    _argumentsEditor->hide();
+    _container->show();
+  } else {
+    _argumentsEditor->show();
+    _container->hide();
+  }
+  _arguments->setText(arguments(type).join(" "));
+}
diff --git a/src/tools/gui/tool_config_widget.h b/src/tools/gui/tool_config_widget.h
new file mode 100644
index 0000000..5b38753
--- /dev/null
+++ b/src/tools/gui/tool_config_widget.h
@@ -0,0 +1,79 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2004 Alain Gibaud <alain.gibaud@free.fr>                *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef TOOL_CONFIG_WIDGET_H
+#define TOOL_CONFIG_WIDGET_H
+
+#include <qcombobox.h>
+#include <qlayout.h>
+#include <qtabwidget.h>
+#include <qvaluevector.h>
+#include <kcombobox.h>
+#include <klineedit.h>
+
+#include "common/gui/container.h"
+#include "tools/base/generic_tool.h"
+#include "tools/base/tool_group.h"
+#include "common/gui/config_widget.h"
+#include "common/gui/editlistbox.h"
+namespace PURL { class DirectoriesWidget; }
+
+class ToolConfigWidget : public ::ConfigWidget
+{
+Q_OBJECT
+public:
+  ToolConfigWidget(Project *project);
+  void init(Tool::Category category, const Tool::Group &group);
+  virtual ~ToolConfigWidget();
+
+signals:
+  void changed();
+  void displayHelp();
+
+public slots:
+  virtual void loadConfig();
+  virtual void saveConfig() { saveConfig(*_config); }
+
+private slots:
+  void updateArguments();
+  void resetCustomArguments();
+
+protected:
+  const Tool::Group *_group;
+  Tool::Category _category;
+  Project       *_project;
+  QLineEdit     *_customOptions, *_customLibraries;
+  PURL::DirectoriesWidget *_includeDirs;
+  QComboBox     *_hexFormat;
+
+  Container *container() { return _container; }
+  PURL::DirectoriesWidget * createDirectoriesEntry(const QString &label);
+  void createIncludeDirectoriesEntry() { _includeDirs = createDirectoriesEntry(i18n("Include directories:")); }
+  void createCustomOptionsEntry();
+  void createCustomLibrariesEntry();
+  void createHexFormatEntry();
+  virtual void initEntries() = 0;
+  virtual void loadConfig(const Compile::Config &config);
+  virtual void saveConfig(Compile::Config &config) const;
+
+private:
+  enum ArgumentsType { AutomaticArguments = 0, CustomArguments, Nb_ArgumentsTypes };
+  static const char * const ARGUMENTS_TYPE_LABELS[Nb_ArgumentsTypes];
+  Compile::Config  *_config, *_tmpConfig;
+  Compile::Process *_process;
+  Project          *_tmpProject;
+  KComboBox        *_argumentsType;
+  KLineEdit        *_arguments;
+  EditListBox      *_argumentsEditor;
+  Container        *_container;
+
+  QStringList arguments(ArgumentsType type) const;
+};
+
+#endif
diff --git a/src/tools/gui/tool_group_ui.cpp b/src/tools/gui/tool_group_ui.cpp
new file mode 100644
index 0000000..9bb02dd
--- /dev/null
+++ b/src/tools/gui/tool_group_ui.cpp
@@ -0,0 +1,25 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "tool_group_ui.h"
+
+#include "tool_config_widget.h"
+#include "toolchain_config_widget.h"
+
+ToolchainConfigWidget *Tool::GroupUI::toolchainConfigWidgetFactory(QWidget *parent) const
+{
+  return new ToolchainConfigWidget(static_cast<const Group &>(group()), parent);
+}
+
+ToolConfigWidget *Tool::GroupUI::createConfigWidget(Category category, ::Project *project) const
+{
+  ToolConfigWidget *cw = configWidgetFactory(category, project);
+  Q_ASSERT(cw);
+  cw->init(category, static_cast<const Group &>(group()));
+  return cw;
+}
diff --git a/src/tools/gui/tool_group_ui.h b/src/tools/gui/tool_group_ui.h
new file mode 100644
index 0000000..4d1f42c
--- /dev/null
+++ b/src/tools/gui/tool_group_ui.h
@@ -0,0 +1,32 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef TOOL_GROUP_UI_H
+#define TOOL_GROUP_UI_H
+
+#include "tools/base/tool_group.h"
+#include "tools/base/generic_tool.h"
+class ToolConfigWidget;
+class ToolchainConfigWidget;
+
+namespace Tool
+{
+
+class GroupUI : public ::Group::BaseGui
+{
+public:
+  ToolConfigWidget *createConfigWidget(Category category, ::Project *project) const;
+  virtual ToolConfigWidget *configWidgetFactory(Category category, ::Project *project) const = 0;
+  virtual ToolchainConfigWidget *toolchainConfigWidgetFactory(QWidget *parent) const;
+};
+
+inline const GroupUI &groupui(const Base &base) { return static_cast<const GroupUI &>(*base.group().gui()); }
+
+} // namespace
+
+#endif
diff --git a/src/tools/gui/toolchain_config_center.cpp b/src/tools/gui/toolchain_config_center.cpp
new file mode 100644
index 0000000..c8b889d
--- /dev/null
+++ b/src/tools/gui/toolchain_config_center.cpp
@@ -0,0 +1,111 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2004 Alain Gibaud <alain.gibaud@free.fr>                *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "toolchain_config_center.h"
+
+#include <qlabel.h>
+#include <qlayout.h>
+#include <kiconloader.h>
+
+#include "tools/list/tools_config_widget.h"
+#include "tools/list/compile_config.h"
+#include "tools/list/tool_list.h"
+#include "toolchain_config_widget.h"
+#include "tool_group_ui.h"
+
+ToolchainsConfigCenter::ToolchainsConfigCenter(const Tool::Group &sgroup, QWidget *parent)
+  : TreeListDialog(parent, "configure_toolchains_dialog", true,
+                   i18n("Configure Toolchains"), Ok|User1|User2|Cancel, Cancel, false)
+{
+  setButtonGuiItem(User1, KStdGuiItem::reset());
+  setButtonGuiItem(User2, KGuiItem(i18n("Update"), "reload"));
+
+  _titleBox->addStretch(1);
+  _infoButton = new KPushButton(KGuiItem(QString::null, "viewmag"), _frame);
+  connect(_infoButton, SIGNAL(clicked()), SLOT(showInformationDialog()));
+  _titleBox->addWidget(_infoButton);
+
+  QWidget *current = 0;
+  FOR_EACH(PURL::SourceFamily, family) {
+    Tool::Lister::ConstIterator it;
+    for (it=Tool::lister().begin(); it!=Tool::lister().end(); ++it) {
+      PURL::FileType type = it.data()->implementationType(family.data().toolType);
+      if ( type==PURL::Nb_FileTypes || type.data().sourceFamily!=family ) continue;
+      if ( family==PURL::SourceFamily::Asm && it.data()->implementationType(PURL::ToolType::Compiler)!=PURL::Nb_FileTypes ) continue;
+      QStringList names = family.label();
+      names += it.data()->label();
+      QWidget *page = addPage(names);
+      QVBoxLayout *vbox = new QVBoxLayout(page);
+      ToolchainConfigWidget *tcw = static_cast<const ::Tool::GroupUI *>(it.data()->gui())->toolchainConfigWidgetFactory(page);
+      tcw->init();
+      tcw->loadConfig();
+      vbox->addWidget(tcw);
+      _pages[page] = tcw;
+      if ( it.key()==sgroup.name() ) current = page;
+    }
+  }
+  showPage(current);
+  aboutToShowPageSlot(current);
+  connect(this, SIGNAL(aboutToShowPage(QWidget *)), SLOT(aboutToShowPageSlot(QWidget *)));
+}
+
+void ToolchainsConfigCenter::aboutToShowPageSlot(QWidget *page)
+{
+  if ( !_pages.contains(page) ) _infoButton->hide();
+  else {
+    _infoButton->show();
+    QTimer::singleShot(0, _pages[page], SLOT(detect()));
+  }
+}
+
+void ToolchainsConfigCenter::slotApply()
+{
+  QMap<QWidget *, ToolchainConfigWidget *>::iterator it;
+  for (it=_pages.begin(); it!=_pages.end(); ++it) it.data()->saveConfig();
+}
+
+void ToolchainsConfigCenter::slotOk()
+{
+  slotApply();
+  accept();
+}
+
+ToolchainConfigWidget *ToolchainsConfigCenter::current() const
+{
+  int i = activePageIndex();
+  if ( i==-1 ) return 0;
+  QMap<QWidget *, ToolchainConfigWidget *>::const_iterator it;
+  for (it=_pages.begin(); it!=_pages.end(); ++it)
+    if ( pageIndex(it.key())==i ) return it.data();
+  Q_ASSERT(false);
+  return 0;
+}
+
+void ToolchainsConfigCenter::slotUser1()
+{
+  ToolchainConfigWidget *tcw = current();
+  if (tcw) {
+    tcw->loadConfig();
+    tcw->forceDetect();
+  }
+}
+
+void ToolchainsConfigCenter::slotUser2()
+{
+  ToolchainConfigWidget *tcw = current();
+  if (tcw) tcw->forceDetect();
+}
+
+void ToolchainsConfigCenter::showInformationDialog()
+{
+  ToolchainConfigWidget *tcw = current();
+  Q_ASSERT(tcw);
+  TextEditorDialog dialog(tcw->group().informationText(), tcw->group().label(), true, this);
+  dialog.exec();
+}
diff --git a/src/tools/gui/toolchain_config_center.h b/src/tools/gui/toolchain_config_center.h
new file mode 100644
index 0000000..4b2110b
--- /dev/null
+++ b/src/tools/gui/toolchain_config_center.h
@@ -0,0 +1,45 @@
+/***************************************************************************
+ *   Copyright (C) 2005 Nicolas Hadacek <hadacek@kde.org>                  *
+ *   Copyright (C) 2004 Alain Gibaud <alain.gibaud@free.fr>                *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef TOOLCHAIN_CONFIG_CENTER_H
+#define TOOLCHAIN_CONFIG_CENTER_H
+
+#include <qcheckbox.h>
+#include <qcombobox.h>
+#include <qlineedit.h>
+#include <qwidgetstack.h>
+
+#include "tools/gui/tool_config_widget.h"
+#include "common/gui/dialog.h"
+class ToolchainConfigWidget;
+
+class ToolchainsConfigCenter : public TreeListDialog
+{
+Q_OBJECT
+public:
+  ToolchainsConfigCenter(const Tool::Group &group, QWidget *parent);
+
+public slots:
+  virtual void slotOk();
+  virtual void slotApply();
+  virtual void slotUser1();
+  virtual void slotUser2();
+
+private slots:
+  void aboutToShowPageSlot(QWidget *page);
+  void showInformationDialog();
+
+private:
+  KPushButton *_infoButton;
+  QMap<QWidget *, ToolchainConfigWidget *> _pages;
+
+  ToolchainConfigWidget *current() const;
+};
+
+#endif
diff --git a/src/tools/gui/toolchain_config_widget.cpp b/src/tools/gui/toolchain_config_widget.cpp
new file mode 100644
index 0000000..aede699
--- /dev/null
+++ b/src/tools/gui/toolchain_config_widget.cpp
@@ -0,0 +1,301 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "toolchain_config_widget.h"
+
+#include <qlabel.h>
+#include <qlayout.h>
+#include <qtooltip.h>
+#include <qgroupbox.h>
+#include <qtabwidget.h>
+#include <kiconloader.h>
+#include <ktextedit.h>
+
+#include "tools/list/compile_config.h"
+#include "common/gui/purl_gui.h"
+#include "common/global/process.h"
+#include "common/gui/container.h"
+
+//----------------------------------------------------------------------------
+ToolchainConfigWidget::ToolchainConfigWidget(const Tool::Group &group, QWidget *parent)
+  : ::ConfigWidget(parent),
+    _group(group), _dirty(false), _outputType(0), _devicesData(group.nbCheckDevices())
+{
+  _config = group.createConfig(0);
+}
+
+ToolchainConfigWidget::~ToolchainConfigWidget()
+{
+  delete _config;
+}
+
+void ToolchainConfigWidget::init()
+{
+  Container *container = new Container(this, Container::Sunken);
+  addWidget(container, 0,0, 0,3);
+  container->setColStretch(3, 1);
+
+  uint row = 0;
+  QLabel *label = new QLabel(Compile::DirectoryType(Compile::DirectoryType::Executable).label() + ":", container);
+  container->addWidget(label, row,row, 0,0);
+  _dirs[Compile::DirectoryType::Executable] = new PURL::DirectoryWidget(container);
+  connect(_dirs[Compile::DirectoryType::Executable], SIGNAL(changed()), SLOT(forceDetect()));
+  container->addWidget(_dirs[Compile::DirectoryType::Executable], row,row, 1,3);
+  row++;
+
+  label = new QLabel(i18n("Executable Type:"), container);
+  container->addWidget(label, row,row, 0,0);
+  _execType = new QComboBox(container);
+  FOR_EACH(Tool::ExecutableType, type) _execType->insertItem(type.label());
+  connect(_execType, SIGNAL(activated(int)), SLOT(forceDetect()));
+  container->addWidget(_execType, row,row, 1,2);
+  row++;
+
+  uint nbOutputTypes = 0;
+  FOR_EACH(Tool::OutputExecutableType, type)
+    if ( _group.hasOutputExecutableType(type) ) nbOutputTypes++;
+  if ( nbOutputTypes>1 ) {
+    label = new QLabel(i18n("Output Executable Type:"), container);
+    container->addWidget(label, row,row, 0,0);
+    _outputType = new KeyComboBox<Tool::OutputExecutableType>(container);
+    FOR_EACH(Tool::OutputExecutableType, type)
+      if ( _group.hasOutputExecutableType(type) ) _outputType->appendItem(type, type.label());
+    connect(_outputType->widget(), SIGNAL(activated(int)), SLOT(forceDetect()));
+    container->addWidget(_outputType->widget(), row,row, 1,1);
+    row++;
+  }
+
+  addCustomExecutableOptions(container);
+
+  FOR_EACH(Tool::Category, k) {
+    const Tool::Base *base = _group.base(k);
+    if ( base==0 ) continue;
+    label = new QLabel(k.label(), container);
+    container->addWidget(label, row,row, 0,0);
+    _data[k].label = new QLabel(container);
+    container->addWidget(_data[k].label, row,row, 1,1);
+    _data[k].button = new KPushButton(KGuiItem(QString::null, "viewmag"), container);
+    connect(_data[k].button, SIGNAL(clicked()), SLOT(showDetails()));
+    container->addWidget(_data[k].button, row,row, 2,2);
+    row++;
+  }
+
+  label = new QLabel(i18n("Device detection:"), container);
+  container->addWidget(label, row,row, 0,0);
+  _devicesLabel = new QLabel(container);
+  container->addWidget(_devicesLabel, row,row, 1,1);
+  KPushButton *button = new KPushButton(KGuiItem(QString::null, "viewmag"), container);
+  connect(button, SIGNAL(clicked()), SLOT(showDeviceDetails()));
+  container->addWidget(button, row,row, 2,2);
+  row++;
+
+  row = numRows();
+  FOR_EACH(Compile::DirectoryType, type) {
+    if ( type==Compile::DirectoryType::Executable ) continue;
+    if ( !_group.hasDirectory(type) ) _dirs[type] = 0;
+    else {
+      label = new QLabel(type.label() + ":", this);
+      addWidget(label, row,row, 0,0);
+      _dirs[type] = new PURL::DirectoryWidget(this);
+      addWidget(_dirs[type], row,row, 1,3);
+      row++;
+    }
+  }
+
+  if ( !_group.comment().isEmpty() ) {
+    KTextEdit *w = new KTextEdit(_group.comment(), QString::null, this);
+    w->setReadOnly(true);
+    w->setWordWrap(QTextEdit::WidgetWidth);
+    addWidget(w, row,row, 0,3);
+    row++;
+  }
+
+  setColStretch(3, 1);
+}
+
+void ToolchainConfigWidget::loadConfig()
+{
+  _execType->blockSignals(true);
+  _execType->setCurrentItem(Compile::Config::withWine(_group) ? Tool::ExecutableType::Windows : Tool::ExecutableType::Unix);
+  _execType->blockSignals(false);
+  if (_outputType) {
+    _outputType->widget()->blockSignals(true);
+    _outputType->setCurrentItem(Compile::Config::outputExecutableType(_group));
+    _outputType->widget()->blockSignals(false);
+  }
+  FOR_EACH(Compile::DirectoryType, type) {
+    if ( _dirs[type]==0 ) continue;
+    _dirs[type]->blockSignals(true);
+    _dirs[type]->setDirectory(Compile::Config::directory(_group, type));
+    _dirs[type]->blockSignals(false);
+  }
+  _dirty = true;
+}
+
+void ToolchainConfigWidget::saveConfig()
+{
+  Compile::Config::setWithWine(_group, withWine());
+  if (_outputType) Compile::Config::setOutputExecutableType(_group, outputType());
+  FOR_EACH(Compile::DirectoryType, type)
+    if ( _dirs[type] ) Compile::Config::setDirectory(_group, type, _dirs[type]->directory());
+}
+
+void ToolchainConfigWidget::forceDetect()
+{
+  _dirty = true;
+  detect();
+}
+
+void ToolchainConfigWidget::checkExecutableDone()
+{
+  FOR_EACH(Tool::Category, i) {
+    if ( _data[i].process!=sender() ) continue;
+    if ( _data[i].process->state()==::Process::Timedout ) {
+      _data[i].label->setText(i18n("Timeout"));
+      return;
+    }
+    _data[i].checkLines = _data[i].process->sout() + _data[i].process->serr();
+    const Tool::Base *base = _group.base(i);
+    QString exec = base->baseExecutable(withWine(), outputType());
+    if ( base->checkExecutableResult(withWine(), _data[i].checkLines) ) _data[i].label->setText(i18n("\"%1\" found").arg(exec));
+    else _data[i].label->setText(i18n("\"%1\" not recognized").arg(exec));
+    break;
+  }
+}
+
+void ToolchainConfigWidget::checkDevicesDone()
+{
+  for(uint i=0; i<_devicesData.count(); i++) {
+    if ( _devicesData[i].process!=sender() ) continue;
+    if ( _devicesData[i].process->state()==::Process::Timedout ) {
+      _devicesLabel->setText(i18n("Timeout"));
+      return;
+    }
+    _devicesData[i].checkLines = _devicesData[i].process->sout() + _devicesData[i].process->serr();
+    _devicesData[i].done = true;
+    break;
+  }
+  QValueList<const Device::Data *> list;
+  for(uint i=0; i<_devicesData.count(); i++) {
+    if ( !_devicesData[i].done ) return;
+    list += _group.getSupportedDevices(_devicesData[i].checkLines.join("\n"));
+  }
+  _devicesLabel->setText(i18n("Detected (%1)").arg(list.count()));
+}
+
+bool ToolchainConfigWidget::withWine() const
+{
+  return ( _execType->currentItem()==Tool::ExecutableType::Windows );
+}
+
+Tool::OutputExecutableType ToolchainConfigWidget::outputType() const
+{
+  return (_outputType==0 ? Compile::Config::outputExecutableType(_group) : _outputType->currentItem());
+}
+
+QString ToolchainConfigWidget::baseExecutable(Tool::Category category) const
+{
+  return _group.base(category)->baseExecutable(withWine(), outputType());
+}
+
+::Process::LineOutput *ToolchainConfigWidget::checkExecutableProcess(Tool::Category category) const
+{
+  PURL::Directory execDir = _dirs[Compile::DirectoryType::Executable]->directory();
+  return _group.base(category)->checkExecutableProcess(execDir, withWine(), outputType());
+}
+
+::Process::LineOutput *ToolchainConfigWidget::checkDevicesProcess(uint i) const
+{
+  PURL::Directory execDir = _dirs[Compile::DirectoryType::Executable]->directory();
+  return _group.checkDevicesProcess(i, execDir, withWine());
+}
+
+void ToolchainConfigWidget::detect()
+{
+  if ( !_dirty ) return;
+  FOR_EACH(Tool::Category, k) {
+    if ( _data[k].label==0 ) continue;
+    if ( !_group.base(k)->checkExecutable() ) _data[k].label->setText(i18n("Unknown"));
+    else {
+      delete _data[k].process;
+      _data[k].checkLines.clear();
+      _data[k].process = checkExecutableProcess(k);
+      _data[k].command = _data[k].process->prettyCommand();
+      connect(_data[k].process, SIGNAL(done(int)), SLOT(checkExecutableDone()));
+      connect(_data[k].process, SIGNAL(timeout()), SLOT(checkExecutableDone()));
+      QString exec = baseExecutable(k);
+      if ( !_data[k].process->start(10000) ) _data[k].label->setText(i18n("\"%1\" not found").arg(exec));
+      else _data[k].label->setText(i18n("Detecting \"%1\"...").arg(exec));
+    }
+  }
+  if ( _group.checkDevicesCategory()==Tool::Category::Nb_Types ) {
+    QValueVector<QString> supported = _group.supportedDevices();
+    _devicesLabel->setText(i18n("Hardcoded (%1)").arg(supported.count()));
+  } else {
+    for (uint i=0; i<_devicesData.count(); i++) {
+      delete _devicesData[i].process;
+      _devicesData[i].process = checkDevicesProcess(i);
+      _devicesData[i].command = _devicesData[i].process->prettyCommand();
+      connect(_devicesData[i].process, SIGNAL(done(int)), SLOT(checkDevicesDone()));
+      connect(_devicesData[i].process, SIGNAL(timeout()), SLOT(checkDevicesDone()));
+      _devicesData[i].done = false;
+      _devicesData[i].checkLines.clear();
+      if ( !_devicesData[i].process->start(10000) ) _devicesLabel->setText(i18n("Failed"));
+      else _devicesLabel->setText(i18n("Detecting ..."));
+    }
+  }
+  FOR_EACH(Compile::DirectoryType, type) {
+    if ( _dirs[type]==0 || type==Compile::DirectoryType::Executable ) continue;
+    PURL::Directory execDir = _dirs[Compile::DirectoryType::Executable]->directory();
+    PURL::Directory dir = _group.autodetectDirectory(type, execDir, withWine());
+    if ( !dir.isEmpty() ) _dirs[type]->setDirectory(dir);
+  }
+  _dirty = false;
+}
+
+void ToolchainConfigWidget::showDetails()
+{
+  FOR_EACH(Tool::Category, k) {
+    if ( sender()!=_data[k].button ) continue;
+    QString s;
+    const Tool::Base *base = _group.base(k);
+    if ( base->checkExecutable() ) {
+      s += i18n("<qt><b>Command for executable detection:</b><br>%1<br>").arg(_data[k].command);
+      s += i18n("<b>Version string:</b><br>%1<br></qt>").arg(_data[k].checkLines.join("<br>"));
+    } else s += i18n("This tool cannot be automatically detected.");
+    MessageBox::text(s, Log::Show);
+    break;
+  }
+}
+
+void ToolchainConfigWidget::showDeviceDetails()
+{
+  QString s;
+  if ( _group.checkDevicesCategory()==Tool::Category::Nb_Types ) {
+    s += "<qt>";
+    QValueVector<QString> supported = _group.supportedDevices();
+    for (uint i=0; i<supported.count(); i++) {
+      if ( i!=0 ) {
+        if ( (i%10)==0 ) s += "<br>";
+        s += " ";
+      }
+      s += supported[i];
+    }
+    s += "</qt>";
+  } else {
+    uint nb = _group.nbCheckDevices();
+    for (uint i=0; i<nb; i++) {
+      if ( nb==1 ) s += i18n("<qt><b>Command for devices detection:</b><br>%1<br>").arg(_devicesData[i].command);
+      else s += i18n("<qt><b>Command #%1 for devices detection:</b><br>%2<br>").arg(i+1).arg(_devicesData[i].command);
+      QString ss = _devicesData[i].checkLines.join("<br>");
+      if ( nb==1 ) s += i18n("<b>Device string:</b><br>%1<br>").arg(ss);
+      else s += i18n("<b>Device string #%1:</b><br>%2<br>").arg(i+1).arg(ss);
+    }
+  }
+  MessageBox::text(s, Log::Show);
+}
diff --git a/src/tools/gui/toolchain_config_widget.h b/src/tools/gui/toolchain_config_widget.h
new file mode 100644
index 0000000..ad7978a
--- /dev/null
+++ b/src/tools/gui/toolchain_config_widget.h
@@ -0,0 +1,85 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef TOOLCHAIN_CONFIG_WIDGET_H
+#define TOOLCHAIN_CONFIG_WIDGET_H
+
+#include <qwidgetstack.h>
+#include <qlabel.h>
+#include <klocale.h>
+#include <kpushbutton.h>
+
+#include "common/gui/key_gui.h"
+#include "common/global/process.h"
+#include "common/gui/config_widget.h"
+#include "tools/list/compile_process.h"
+class Container;
+namespace PURL { class DirectoryWidget; }
+namespace Tool { class Group; }
+
+//----------------------------------------------------------------------------
+class ToolchainConfigWidget : public ::ConfigWidget
+{
+  Q_OBJECT
+public:
+  ToolchainConfigWidget(const Tool::Group &group, QWidget *parent);
+  virtual ~ToolchainConfigWidget();
+  const Tool::Group &group() const { return _group; }
+  void init();
+
+public slots:
+  void detect();
+  void forceDetect();
+  virtual void loadConfig();
+  virtual void saveConfig();
+
+protected:
+  bool withWine() const;
+  Tool::OutputExecutableType outputType() const;
+  virtual void addCustomExecutableOptions(Container *) {}
+  virtual QString baseExecutable(Tool::Category category) const;
+  virtual ::Process::LineOutput *checkExecutableProcess(Tool::Category category) const;
+  virtual ::Process::LineOutput *checkDevicesProcess(uint i) const;
+
+protected slots:
+  void showDetails();
+  void showDeviceDetails();
+  void checkExecutableDone();
+  void checkDevicesDone();
+
+protected:
+  const Tool::Group &_group;
+  Compile::Config   *_config;
+  bool               _dirty;
+  QComboBox         *_execType;
+  KeyComboBox<Tool::OutputExecutableType> *_outputType;
+  QLabel            *_devicesLabel;
+  QMap<Compile::DirectoryType, PURL::DirectoryWidget *> _dirs;
+  class ExecData {
+  public:
+    ExecData() : label(0), button(0), process(0) {}
+    ~ExecData() { delete process; }
+    QLabel *label;
+    QString command;
+    QStringList checkLines;
+    KPushButton *button;
+    ::Process::LineOutput *process;
+  };
+  QMap<Tool::Category, ExecData> _data;
+  class DevicesData {
+  public:
+    DevicesData() : process(0) {}
+    bool done;
+    QString command;
+    QStringList checkLines;
+    ::Process::LineOutput *process;
+  };
+  QValueVector<DevicesData> _devicesData;
+};
+
+#endif
diff --git a/src/tools/jal/Makefile.am b/src/tools/jal/Makefile.am
new file mode 100644
index 0000000..b0d8b43
--- /dev/null
+++ b/src/tools/jal/Makefile.am
@@ -0,0 +1,8 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libjal.la
+libjal_la_LDFLAGS = $(all_libraries)
+libjal_la_SOURCES = jal_compile.cpp jal_config.cpp jal.cpp jal_generator.cpp
+
+SUBDIRS = gui
\ No newline at end of file
diff --git a/src/tools/jal/gui/Makefile.am b/src/tools/jal/gui/Makefile.am
new file mode 100644
index 0000000..60341d3
--- /dev/null
+++ b/src/tools/jal/gui/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libjalui.la
+libjalui_la_LDFLAGS = $(all_libraries)
+libjalui_la_SOURCES = jal_ui.cpp
diff --git a/src/tools/jal/gui/jal_ui.cpp b/src/tools/jal/gui/jal_ui.cpp
new file mode 100644
index 0000000..4300de0
--- /dev/null
+++ b/src/tools/jal/gui/jal_ui.cpp
@@ -0,0 +1,14 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "jal_ui.h"
+
+//----------------------------------------------------------------------------
+JAL::ConfigWidget::ConfigWidget(Project *project)
+  : ToolConfigWidget(project)
+{}
diff --git a/src/tools/jal/gui/jal_ui.h b/src/tools/jal/gui/jal_ui.h
new file mode 100644
index 0000000..aa6957e
--- /dev/null
+++ b/src/tools/jal/gui/jal_ui.h
@@ -0,0 +1,35 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef JAL_UI_H
+#define JAL_UI_H
+
+#include "tools/gui/tool_config_widget.h"
+#include "tools/gui/tool_group_ui.h"
+
+namespace JAL
+{
+//----------------------------------------------------------------------------
+class ConfigWidget : public ToolConfigWidget
+{
+Q_OBJECT
+public:
+  ConfigWidget(Project *project);
+  virtual void initEntries() {}
+};
+
+//----------------------------------------------------------------------------
+class GroupUI : public Tool::GroupUI
+{
+public:
+  virtual ToolConfigWidget *configWidgetFactory(Tool::Category, ::Project *project) const { return new ConfigWidget(project); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/jal/jal.cpp b/src/tools/jal/jal.cpp
new file mode 100644
index 0000000..009ea21
--- /dev/null
+++ b/src/tools/jal/jal.cpp
@@ -0,0 +1,72 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "jal.h"
+
+#include "jal_compile.h"
+#include "jal_config.h"
+#include "devices/pic/pic/pic_memory.h"
+#include "devices/list/device_list.h"
+#include "common/global/process.h"
+#include "jal_generator.h"
+
+//----------------------------------------------------------------------------
+bool JAL::Base::checkExecutableResult(bool, QStringList &lines) const
+{
+  QStringList tmp;
+  for (uint i=0; i<lines.count(); i++)
+    if ( !lines[i].contains('\r') ) tmp += lines[i]; // ??
+  lines = tmp;
+  return ( lines.count()>0 && lines[0].startsWith("jal") );
+}
+
+//----------------------------------------------------------------------------
+QString JAL::Group::informationText() const
+{
+  return i18n("<a href=\"%1\">JAL</a> is a high-level language for PIC microcontrollers.").arg("http://jal.sourceforge.net");
+}
+
+Tool::Group::BaseData JAL::Group::baseFactory(Tool::Category category) const
+{
+  if ( category==Tool::Category::Compiler ) return BaseData(new ::JAL::Base, Both);
+  return BaseData();
+}
+
+const char * const SUPPORTED_DEVICES[] = {
+  "12C508", "12C509A", "12CE674", "12F629", "12F675",
+  "16C84", "16F84", "16F88", "16F873", "16F876", "16F877", "16F628",
+  "18F242", "18F252", "18F442", "18F452",
+  0
+};
+
+QValueList<const Device::Data *> JAL::Group::getSupportedDevices(const QString &) const
+{
+  QValueList<const Device::Data *> list;
+  for (uint i=0; SUPPORTED_DEVICES[i]; i++) {
+    const Device::Data *data = Device::lister().data(SUPPORTED_DEVICES[i]);
+    Q_ASSERT(data);
+    list.append(data);
+  }
+  return list;
+}
+
+Compile::Process *JAL::Group::processFactory(const Compile::Data &data) const
+{
+  Q_ASSERT( data.category==Tool::Category::Compiler );
+  return new CompileFile;
+}
+
+Compile::Config *JAL::Group::configFactory(::Project *project) const
+{
+  return new Config(project);
+}
+
+Tool::SourceGenerator *JAL::Group::sourceGeneratorFactory() const
+{
+  return new SourceGenerator;
+}
diff --git a/src/tools/jal/jal.h b/src/tools/jal/jal.h
new file mode 100644
index 0000000..0c0d790
--- /dev/null
+++ b/src/tools/jal/jal.h
@@ -0,0 +1,49 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef JAL_H
+#define JAL_H
+
+#include "tools/base/tool_group.h"
+
+namespace JAL
+{
+//----------------------------------------------------------------------------
+class Base : public Tool::Base
+{
+public:
+  virtual QString baseExecutable(bool, Tool::OutputExecutableType) const { return "jal"; }
+
+private:
+  virtual QStringList checkExecutableOptions(bool) const { return QStringList(); }
+  virtual bool checkExecutableResult(bool withWine, QStringList &lines) const;
+};
+
+//----------------------------------------------------------------------------
+class Group : public Tool::Group
+{
+public:
+  virtual QString name() const { return "jal"; }
+  virtual QString label() const { return i18n("JAL"); }
+  virtual QString informationText() const;
+  virtual Tool::Category checkDevicesCategory() const { return Tool::Category::Nb_Types; }
+  virtual Tool::ExecutableType preferedExecutableType() const { return Tool::ExecutableType::Unix; }
+  virtual Tool::CompileType compileType() const { return Tool::AllFiles; }
+  virtual PURL::FileType implementationType(PURL::ToolType type) const { return (type==PURL::ToolType::Compiler ? PURL::JalSource : PURL::Nb_FileTypes); }
+
+private:
+  virtual BaseData baseFactory(Tool::Category c) const;
+  virtual QValueList<const Device::Data *> getSupportedDevices(const QString &s) const;
+  virtual Compile::Process *processFactory(const Compile::Data &data) const;
+  virtual Compile::Config *configFactory(::Project *project) const;
+  virtual Tool::SourceGenerator *sourceGeneratorFactory() const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/jal/jal_compile.cpp b/src/tools/jal/jal_compile.cpp
new file mode 100644
index 0000000..4d62e68
--- /dev/null
+++ b/src/tools/jal/jal_compile.cpp
@@ -0,0 +1,26 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "jal_compile.h"
+
+void JAL::CompileFile::logStderrLine(const QString &line)
+{
+  if ( line.contains('\r') ) return; // what are those lines ?
+  // #### TODO
+  doLog(Log::LineType::Normal, line, QString::null, 0); // unrecognized
+}
+
+QStringList JAL::CompileFile::genericArguments(const Compile::Config &) const
+{
+  return "%I";
+}
+
+QString JAL::CompileFile::outputFiles() const
+{
+  return "PURL::AsmGPAsm PURL::Hex";
+}
diff --git a/src/tools/jal/jal_compile.h b/src/tools/jal/jal_compile.h
new file mode 100644
index 0000000..e63f603
--- /dev/null
+++ b/src/tools/jal/jal_compile.h
@@ -0,0 +1,29 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef JAL_COMPILE_H
+#define JAL_COMPILE_H
+
+#include "tools/list/compile_process.h"
+
+namespace JAL
+{
+//-----------------------------------------------------------------------------
+class CompileFile : public Compile::Process
+{
+Q_OBJECT
+protected:
+  virtual QString deviceName() const { return _data.device; }
+  virtual void logStderrLine(const QString &line);
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+  virtual QString outputFiles() const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/jal/jal_config.cpp b/src/tools/jal/jal_config.cpp
new file mode 100644
index 0000000..c51ddf6
--- /dev/null
+++ b/src/tools/jal/jal_config.cpp
@@ -0,0 +1,9 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "jal_config.h"
diff --git a/src/tools/jal/jal_config.h b/src/tools/jal/jal_config.h
new file mode 100644
index 0000000..0d0a513
--- /dev/null
+++ b/src/tools/jal/jal_config.h
@@ -0,0 +1,25 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef JAL_CONFIG_H
+#define JAL_CONFIG_H
+
+#include "tools/list/compile_config.h"
+
+namespace JAL
+{
+
+class Config : public Compile::Config
+{
+public:
+  Config(Project *project) : Compile::Config(project) {}
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/jal/jal_generator.cpp b/src/tools/jal/jal_generator.cpp
new file mode 100644
index 0000000..6aa9b08
--- /dev/null
+++ b/src/tools/jal/jal_generator.cpp
@@ -0,0 +1,35 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "jal_generator.h"
+
+#include "devices/pic/base/pic.h"
+
+SourceLine::List JAL::SourceGenerator::configLines(PURL::ToolType, const Device::Memory &, bool &) const
+{
+  // no config lines (?)
+  return SourceLine::List();
+}
+
+SourceLine::List JAL::SourceGenerator::includeLines(PURL::ToolType, const Device::Data &data) const
+{
+  SourceLine::List lines;
+  lines.appendNotIndentedCode("include " + data.name().lower() + "_10", i18n("10MHz crystal"));
+  lines.appendNotIndentedCode("include jlib", i18n("jal standard library"));
+  return lines;
+}
+
+SourceLine::List JAL::SourceGenerator::sourceFileContent(PURL::ToolType, const Device::Data &, bool &) const
+{
+  SourceLine::List lines;
+  lines.appendTitle(i18n("main code"));
+  lines.appendNotIndentedCode(QString::null, "<< " + i18n("insert code") + " >>");
+  lines.appendNotIndentedCode("forever loop", i18n("loop forever"));
+  lines.appendNotIndentedCode("end loop");
+  return lines;
+}
diff --git a/src/tools/jal/jal_generator.h b/src/tools/jal/jal_generator.h
new file mode 100644
index 0000000..b6beddb
--- /dev/null
+++ b/src/tools/jal/jal_generator.h
@@ -0,0 +1,27 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef JAL_GENERATOR_H
+#define JAL_GENERATOR_H
+
+#include "tools/base/tool_group.h"
+
+namespace JAL
+{
+
+class SourceGenerator : public Tool::SourceGenerator
+{
+public:
+  virtual SourceLine::List configLines(PURL::ToolType type, const Device::Memory &memory, bool &ok) const;
+  virtual SourceLine::List sourceFileContent(PURL::ToolType type, const Device::Data &data, bool &ok) const;
+  virtual SourceLine::List includeLines(PURL::ToolType type, const Device::Data &data) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/jalv2/Makefile.am b/src/tools/jalv2/Makefile.am
new file mode 100644
index 0000000..3b59ea9
--- /dev/null
+++ b/src/tools/jalv2/Makefile.am
@@ -0,0 +1,8 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libjalv2.la
+libjalv2_la_SOURCES = jalv2_compile.cpp jalv2_config.cpp jalv2.cpp
+libjalv2_la_LDFLAGS = $(all_libraries)
+
+SUBDIRS = gui
\ No newline at end of file
diff --git a/src/tools/jalv2/gui/Makefile.am b/src/tools/jalv2/gui/Makefile.am
new file mode 100644
index 0000000..92e338c
--- /dev/null
+++ b/src/tools/jalv2/gui/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libjalv2ui.la
+libjalv2ui_la_SOURCES = jalv2_ui.cpp
+libjalv2ui_la_LDFLAGS = $(all_libraries)
diff --git a/src/tools/jalv2/gui/jalv2_ui.cpp b/src/tools/jalv2/gui/jalv2_ui.cpp
new file mode 100644
index 0000000..0990c6d
--- /dev/null
+++ b/src/tools/jalv2/gui/jalv2_ui.cpp
@@ -0,0 +1,19 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "jalv2_ui.h"
+
+//----------------------------------------------------------------------------
+JALV2::ConfigWidget::ConfigWidget(Project *project)
+  : ToolConfigWidget(project)
+{}
+
+void JALV2::ConfigWidget::initEntries()
+{
+  createIncludeDirectoriesEntry();
+}
diff --git a/src/tools/jalv2/gui/jalv2_ui.h b/src/tools/jalv2/gui/jalv2_ui.h
new file mode 100644
index 0000000..93085c1
--- /dev/null
+++ b/src/tools/jalv2/gui/jalv2_ui.h
@@ -0,0 +1,35 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef JALV2_UI_H
+#define JALV2_UI_H
+
+#include "tools/gui/tool_config_widget.h"
+#include "tools/gui/tool_group_ui.h"
+
+namespace JALV2
+{
+//----------------------------------------------------------------------------
+class ConfigWidget : public ToolConfigWidget
+{
+Q_OBJECT
+public:
+  ConfigWidget(Project *project);
+  virtual void initEntries();
+};
+
+//----------------------------------------------------------------------------
+class GroupUI : public Tool::GroupUI
+{
+public:
+  virtual ToolConfigWidget *configWidgetFactory(Tool::Category, ::Project *project) const { return new ConfigWidget(project); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/jalv2/jalv2.cpp b/src/tools/jalv2/jalv2.cpp
new file mode 100644
index 0000000..1d910b8
--- /dev/null
+++ b/src/tools/jalv2/jalv2.cpp
@@ -0,0 +1,77 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "jalv2.h"
+
+#include "jalv2_compile.h"
+#include "jalv2_config.h"
+#include "devices/pic/pic/pic_memory.h"
+#include "devices/list/device_list.h"
+#include "common/global/process.h"
+#include "tools/jal/jal_generator.h"
+
+//----------------------------------------------------------------------------
+bool JALV2::Base::checkExecutableResult(bool, QStringList &lines) const
+{
+  QStringList tmp;
+  for (uint i=0; i<lines.count(); i++)
+    if ( !lines[i].contains('\r') ) tmp += lines[i]; // ??
+  lines = tmp;
+  return ( lines.count()>0 && lines[0].startsWith("jal") );
+}
+
+//----------------------------------------------------------------------------
+QString JALV2::Group::informationText() const
+{
+  return i18n("<a href=\"%1\">JAL V2</a> is a new compiler for the high-level language JAL.").arg("http://www.casadeyork.com/jalv2");
+}
+
+Tool::Group::BaseData JALV2::Group::baseFactory(Tool::Category category) const
+{
+  if ( category==Tool::Category::Compiler ) return BaseData(new ::JALV2::Base, Both);
+  return BaseData();
+}
+
+const char * const SUPPORTED_DEVICES[] = {
+  "12C509A", "12F675",
+  "16F628",
+  "16F818", "16F819",
+  "16C84", "16F84",
+  "16F87", "16F88",
+  "16F873", "16F874", "16F876", "16F877",
+  "16F873A", "16F874A", "16F876A", "16F877A",
+  "18F242", "18F252", "18F452",
+  0
+};
+
+QValueList<const Device::Data *> JALV2::Group::getSupportedDevices(const QString &) const
+{
+  QValueList<const Device::Data *> list;
+  for (uint i=0; SUPPORTED_DEVICES[i]; i++) {
+    const Device::Data *data = Device::lister().data(SUPPORTED_DEVICES[i]);
+    Q_ASSERT(data);
+    list.append(data);
+  }
+  return list;
+}
+
+Compile::Process *JALV2::Group::processFactory(const Compile::Data &data) const
+{
+  Q_ASSERT( data.category==Tool::Category::Compiler );
+  return new CompileFile;
+}
+
+Compile::Config *JALV2::Group::configFactory(::Project *project) const
+{
+  return new Config(project);
+}
+
+Tool::SourceGenerator *JALV2::Group::sourceGeneratorFactory() const
+{
+  return new JAL::SourceGenerator;
+}
diff --git a/src/tools/jalv2/jalv2.h b/src/tools/jalv2/jalv2.h
new file mode 100644
index 0000000..80c3d02
--- /dev/null
+++ b/src/tools/jalv2/jalv2.h
@@ -0,0 +1,50 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef JALV2_H
+#define JALV2_H
+
+#include "tools/base/tool_group.h"
+
+namespace JALV2
+{
+//----------------------------------------------------------------------------
+class Base : public Tool::Base
+{
+public:
+  virtual QString baseExecutable(bool, Tool::OutputExecutableType) const { return "jalv2"; }
+
+private:
+  virtual QStringList checkExecutableOptions(bool) const { return QStringList(); }
+  virtual bool checkExecutableResult(bool withWine, QStringList &lines) const;
+};
+
+//----------------------------------------------------------------------------
+class Group : public Tool::Group
+{
+public:
+  virtual QString name() const { return "jalv2"; }
+  virtual QString label() const { return i18n("JAL V2"); }
+  virtual QString informationText() const;
+  virtual bool hasDirectory(Compile::DirectoryType type) const { return type==Compile::DirectoryType::Header; }
+  virtual Tool::Category checkDevicesCategory() const { return Tool::Category::Nb_Types; }
+  virtual Tool::ExecutableType preferedExecutableType() const { return Tool::ExecutableType::Unix; }
+  virtual Tool::CompileType compileType() const { return Tool::AllFiles; }
+  virtual PURL::FileType implementationType(PURL::ToolType type) const { return (type==PURL::ToolType::Compiler ? PURL::JalSource : PURL::Nb_FileTypes); }
+
+private:
+  virtual BaseData baseFactory(Tool::Category c) const;
+  virtual QValueList<const Device::Data *> getSupportedDevices(const QString &s) const;
+  virtual Compile::Process *processFactory(const Compile::Data &data) const;
+  virtual Compile::Config *configFactory(::Project *project) const;
+  virtual Tool::SourceGenerator *sourceGeneratorFactory() const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/jalv2/jalv2_compile.cpp b/src/tools/jalv2/jalv2_compile.cpp
new file mode 100644
index 0000000..0b1e7f5
--- /dev/null
+++ b/src/tools/jalv2/jalv2_compile.cpp
@@ -0,0 +1,43 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "jalv2_compile.h"
+
+#include "jalv2.h"
+#include "common/common/misc.h"
+#include "tools/list/compile_config.h"
+
+QStringList JALV2::CompileFile::genericArguments(const Compile::Config &config) const
+{
+  QStringList args;
+  QStringList includes = config.includeDirs(Tool::Category::Compiler, QString::null, QString::null, ";");
+  QString s = (includes.isEmpty() ? QString::null : includes[0]);
+  PURL::Directory dir = Compile::Config::directory(group(), Compile::DirectoryType::Header).path();
+  if ( !dir.isEmpty() ) {
+    if ( !s.isEmpty() ) s += ";";
+    s += dir.path();
+  }
+  if ( !s.isEmpty() ) {
+     args += "-s";
+     args += s;
+  }
+  args += "%I";
+  return args;
+}
+
+void JALV2::CompileFile::logStderrLine(const QString &line)
+{
+  if ( parseErrorLine(line, Compile::ParseErrorData("([^:]*):([0-9]+):\\s*(warning)(.+)", 1, 2, 4, 3)) ) return;
+  if ( parseErrorLine(line, Compile::ParseErrorData("([^:]*):([0-9]+):\\s*(.+)", 1, 2, 3, Log::LineType::Error)) ) return;
+  doLog(Log::LineType::Normal, line, QString::null, 0); // unrecognized
+}
+
+QString JALV2::CompileFile::outputFiles() const
+{
+  return "PURL::AsmGPAsm PURL::Hex";
+}
diff --git a/src/tools/jalv2/jalv2_compile.h b/src/tools/jalv2/jalv2_compile.h
new file mode 100644
index 0000000..de0257d
--- /dev/null
+++ b/src/tools/jalv2/jalv2_compile.h
@@ -0,0 +1,28 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef JALV2_COMPILE_H
+#define JALV2_COMPILE_H
+
+#include "tools/list/compile_process.h"
+
+namespace JALV2
+{
+class CompileFile : public Compile::Process
+{
+Q_OBJECT
+protected:
+  virtual QString deviceName() const { return _data.device; }
+  virtual void logStderrLine(const QString &line);
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+  virtual QString outputFiles() const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/jalv2/jalv2_config.cpp b/src/tools/jalv2/jalv2_config.cpp
new file mode 100644
index 0000000..c172c5e
--- /dev/null
+++ b/src/tools/jalv2/jalv2_config.cpp
@@ -0,0 +1,9 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "jalv2_config.h"
diff --git a/src/tools/jalv2/jalv2_config.h b/src/tools/jalv2/jalv2_config.h
new file mode 100644
index 0000000..e2811d3
--- /dev/null
+++ b/src/tools/jalv2/jalv2_config.h
@@ -0,0 +1,25 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef JALV2_CONFIG_H
+#define JALV2_CONFIG_H
+
+#include "tools/list/compile_config.h"
+
+namespace JALV2
+{
+
+class Config : public Compile::Config
+{
+public:
+  Config(Project *project) : Compile::Config(project) {}
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/list/Makefile.am b/src/tools/list/Makefile.am
new file mode 100644
index 0000000..9d62533
--- /dev/null
+++ b/src/tools/list/Makefile.am
@@ -0,0 +1,7 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libtoollist.la
+libtoollist_la_LDFLAGS = $(all_libraries)
+libtoollist_la_SOURCES = tool_list.cpp tools_config_widget.cpp \
+	compile_config.cpp device_info.cpp compile_manager.cpp compile_process.cpp
diff --git a/src/tools/list/compile_config.cpp b/src/tools/list/compile_config.cpp
new file mode 100644
index 0000000..5ec8dfc
--- /dev/null
+++ b/src/tools/list/compile_config.cpp
@@ -0,0 +1,189 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "compile_config.h"
+
+#include "common/global/generic_config.h"
+#include "devices/list/device_list.h"
+#include "libgui/project.h"
+#include "tool_list.h"
+
+//----------------------------------------------------------------------------
+PURL::Directory Compile::Config::directory(const Tool::Group &group, DirectoryType type)
+{
+  QString def;
+  if ( type!=DirectoryType::Executable )
+    def = group.autodetectDirectory(type, directory(group, DirectoryType::Executable), withWine(group)).path();
+  return PURL::Directory(value(group.name(), QString::null, type.key() + QString("_path"), def));
+}
+void Compile::Config::setDirectory(const Tool::Group &group, DirectoryType type, const PURL::Directory &dir)
+{
+  setValue(group.name(), QString::null, type.key() + QString("_path"), dir.path());
+  if ( type==DirectoryType::Executable ) const_cast<Tool::Group &>(group).init();
+}
+
+bool Compile::Config::withWine(const Tool::Group &group)
+{
+  QString def = (group.preferedExecutableType()==Tool::ExecutableType::Unix ? "false" : "true");
+  return ( value(group.name(), QString::null, "with_wine", def)=="true" );
+}
+void Compile::Config::setWithWine(const Tool::Group &group, bool withWine)
+{
+  setValue(group.name(), QString::null, "with_wine", withWine ? "true" : "false");
+  const_cast<Tool::Group &>(group).init();
+}
+
+Tool::OutputExecutableType Compile::Config::outputExecutableType(const Tool::Group &group)
+{
+  QString s = value(group.name(), QString::null, "output_type", Tool::OutputExecutableType(Tool::OutputExecutableType::Coff).key());
+  return Tool::OutputExecutableType::fromKey(s);
+}
+void Compile::Config::setOutputExecutableType(const Tool::Group &group, Tool::OutputExecutableType type)
+{
+  setValue(group.name(), QString::null, "output_type", type.key());
+  const_cast<Tool::Group &>(group).init();
+}
+
+QString Compile::Config::value(const QString &group, const QString &subGroup, const QString &key, const QString &defaultValue)
+{
+  QString grp = (subGroup.isEmpty() ? group : group + '-' + subGroup);
+  GenericConfig gc(grp);
+  return gc.readEntry(key, defaultValue);
+}
+void Compile::Config::setValue(const QString &group, const QString &subGroup, const QString &key, const QString &value)
+{
+  QString grp = (subGroup.isEmpty() ? group : group + '-' + subGroup);
+  GenericConfig gc(grp);
+  gc.writeEntry(key, value);
+}
+QStringList Compile::Config::listValues(const QString &group, const QString &subGroup, const QString &key, const QStringList &defaultValues)
+{
+  QString grp = (subGroup.isEmpty() ? group : group + '-' + subGroup);
+  GenericConfig gc(grp);
+  return gc.readListEntry(key, defaultValues);
+}
+void Compile::Config::setListValues(const QString &group, const QString &subGroup, const QString &key, const QStringList &values)
+{
+  QString grp = (subGroup.isEmpty() ? group : group + '-' + subGroup);
+  GenericConfig gc(grp);
+  gc.writeEntry(key, values);
+}
+
+QStringList Compile::Config::includeDirs(Tool::Category category, const QString &prefix, const QString &suffix, const QString &separator) const
+{
+  QStringList list;
+  QStringList raw = rawIncludeDirs(category);
+  for (uint i=0; i<raw.size(); i++) {
+    if ( separator.isEmpty() ) list.append(prefix + raw[i] + suffix);
+    else if ( i==0 ) list.append(prefix + raw[i]);
+    else list[0] += separator + raw[i];
+  }
+  if ( !separator.isEmpty() && list.count()!=0 ) list[0] += suffix;
+  return list;
+}
+
+HexBuffer::Format Compile::Config::hexFormat() const
+{
+  QString s = value(Tool::Category::Linker, "format", HexBuffer::FORMATS[HexBuffer::IHX32]);
+  for (uint i=0; i<HexBuffer::Nb_Formats; i++)
+    if ( s==HexBuffer::FORMATS[i] ) return HexBuffer::Format(i);
+  return HexBuffer::Nb_Formats;
+}
+void Compile::Config::setHexFormat(HexBuffer::Format f)
+{
+  QString s = (f==HexBuffer::Nb_Formats ? 0 : HexBuffer::FORMATS[f]);
+  setValue(Tool::Category::Linker, "format", s);
+}
+
+QString Compile::Config::device(const Project *project)
+{
+  QString device = globalValue(project, "device", QString::null);
+  return Device::lister().checkName(device);
+}
+
+const Tool::Group &Compile::Config::toolGroup(const Project *project)
+{
+  QString s = globalValue(project, "tool", QString::null);
+  const Tool::Group *group = Tool::lister().group(s);
+  if ( group==0 ) return *Tool::lister().begin().data();
+  return *group;
+}
+
+QStringList Compile::Config::customOptions(Tool::Category category) const
+{
+  return QStringList::split(' ', rawCustomOptions(category));
+}
+
+QStringList Compile::Config::customLibraries(Tool::Category category) const
+{
+  return QStringList::split(' ', rawCustomLibraries(category));
+}
+
+void Compile::Config::setValue(Tool::Category category, const QString &key, const QString &value)
+{
+  Q_ASSERT( category!=Tool::Category::Nb_Types );
+  Q_ASSERT( _project || _group );
+  if (_project) _project->setValue(category.key(), key, value);
+  else Config::setValue(_group->name(), category.key(), key, value);
+}
+QString Compile::Config::value(Tool::Category category, const QString &key, const QString &defaultValue) const
+{
+  Q_ASSERT( category!=Tool::Category::Nb_Types );
+  Q_ASSERT( _project || _group );
+  if (_project) return _project->value(category.key(), key, defaultValue);
+  return Config::value(_group->name(), category.key(), key, defaultValue);
+}
+void Compile::Config::setListValues(Tool::Category category, const QString &key, const QStringList &values)
+{
+  Q_ASSERT( category!=Tool::Category::Nb_Types );
+  Q_ASSERT( _project || _group );
+  if (_project) _project->setListValues(category.key(), key, values);
+  else Config::setListValues(_group->name(), category.key(), key, values);
+}
+QStringList Compile::Config::listValues(Tool::Category category, const QString &key, const QStringList &defaultValues) const
+{
+  Q_ASSERT( category!=Tool::Category::Nb_Types );
+  Q_ASSERT( _project || _group );
+  if (_project) return _project->listValues(category.key(), key, defaultValues);
+  return Config::listValues(_group->name(), category.key(), key, defaultValues);
+}
+bool Compile::Config::boolValue(Tool::Category category, const QString &key, bool defaultValue) const
+{
+  QString s = value(category, key, QString::null);
+  if ( s.isNull() ) return defaultValue;
+  return !( s=="false" || s=="0" );
+}
+uint Compile::Config::uintValue(Tool::Category category, const QString &key, uint defaultValue) const
+{
+  bool ok;
+  uint i = value(category, key, QString::null).toUInt(&ok);
+  if ( !ok ) return defaultValue;
+  return i;
+}
+
+QString Compile::Config::globalValue(const Project *project, const QString &key, const QString &defaultValue)
+{
+  if (project) return project->value("general", key, defaultValue);
+  return Config::value("general", QString::null, key, defaultValue);
+}
+void Compile::Config::setGlobalValue(Project *project, const QString &key, const QString &value)
+{
+  if (project) project->setValue("general", key, value);
+  else Config::setValue("general", QString::null, key, value);
+}
+
+QStringList Compile::Config::globalListValues(const Project *project, const QString &key, const QStringList &defaultValues)
+{
+  if (project) return project->listValues("general", key, defaultValues);
+  return Config::listValues("general", QString::null, key, defaultValues);
+}
+void Compile::Config::setGlobalListValues(Project *project, const QString &key, const QStringList &values)
+{
+  if (project) project->setListValues("general", key, values);
+  else Config::setListValues("general", QString::null, key, values);
+}
diff --git a/src/tools/list/compile_config.h b/src/tools/list/compile_config.h
new file mode 100644
index 0000000..13beff4
--- /dev/null
+++ b/src/tools/list/compile_config.h
@@ -0,0 +1,84 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef COMPILE_CONFIG_H
+#define COMPILE_CONFIG_H
+
+#include "common/global/purl.h"
+#include "devices/base/hex_buffer.h"
+#include "tools/base/tool_group.h"
+class Project;
+
+//----------------------------------------------------------------------------
+namespace Compile
+{
+class Config
+{
+public:
+  Config(Project *project) : _group(0), _project(project) {}
+
+  bool hasCustomArguments(Tool::Category category) const { return boolValue(category, "has_custom_arguments", false); }
+  void setHasCustomArguments(Tool::Category category, bool custom) { setValue(category, "has_custom_arguments", custom); }
+  QStringList customArguments(Tool::Category category) const { return listValues(category, "custom_arguments", QStringList()); }
+  void setCustomArguments(Tool::Category category, const QStringList &args) { return setListValues(category, "custom_arguments", args); }
+  QStringList rawIncludeDirs(Tool::Category category) const { return listValues(category, "includes", "$(SRCPATH)"); }
+  QStringList includeDirs(Tool::Category category, const QString &prefix, const QString &suffix = QString::null, const QString &separator = QString::null) const;
+  void setRawIncludeDirs(Tool::Category category, const QStringList &dirs) { setListValues(category, "includes", dirs); }
+  QString rawCustomOptions(Tool::Category category) const { return value(category, "custom_options", QString::null); }
+  QStringList customOptions(Tool::Category category) const;
+  void setRawCustomOptions(Tool::Category category, const QString &value) { setValue(category, "custom_options", value); }
+  QString rawCustomLibraries(Tool::Category category) const { return value(category, "custom_libraries", QString::null); }
+  QStringList customLibraries(Tool::Category category) const;
+  void setRawCustomLibraries(Tool::Category category, const QString &value) { setValue(category, "custom_libraries", value); }
+  uint warningLevel(Tool::Category category) const { return uintValue(category, "warning_level", 0); }
+  void setWarningLevel(Tool::Category category, uint level) { setValue(category, "warning_level", QString::number(level)); }
+  HexBuffer::Format hexFormat() const;
+  void setHexFormat(HexBuffer::Format format);
+
+  static const Tool::Group &toolGroup(const Project *project);
+  static void setToolGroup(Project *project, const Tool::Group &group) { setGlobalValue(project, "tool", group.name()); }
+  static QString device(const Project *project);
+  static void setDevice(Project *project, const QString &device) { setGlobalValue(project, "device", device); }
+  static QStringList customCommands(Project *project) { return globalListValues(project, "custom_shell_commands", QStringList()); }
+  static void setCustomCommands(Project *project, const QStringList &commands) { setGlobalListValues(project, "custom_shell_commands", commands); }
+  static QString globalValue(const Project *project, const QString &key, const QString &defaultValue);
+  static void setGlobalValue(Project *project, const QString &key, const QString &value);
+  static QStringList globalListValues(const Project *project, const QString &key, const QStringList &defaultValues);
+  static void setGlobalListValues(Project *project, const QString &key, const QStringList &value);
+
+  static PURL::Directory directory(const Tool::Group &group, DirectoryType type);
+  static void setDirectory(const Tool::Group &group, DirectoryType type, const PURL::Directory &dir);
+  static bool withWine(const Tool::Group &group);
+  static void setWithWine(const Tool::Group &group, bool withWine);
+  static Tool::OutputExecutableType outputExecutableType(const Tool::Group &group);
+  static void setOutputExecutableType(const Tool::Group &group, Tool::OutputExecutableType type);
+
+protected:
+  const Tool::Group *_group;
+  Project *_project;
+
+  void setValue(Tool::Category category, const QString &key, const QString &value);
+  QString value(Tool::Category category, const QString &key, const QString &defaultValue) const;
+  void setListValues(Tool::Category category, const QString &key, const QStringList &values);
+  QStringList listValues(Tool::Category category, const QString &key, const QStringList &defaultValues) const;
+  void setValue(Tool::Category category, const QString &key, bool value) { setValue(category, key, QString(value ? "true" : "false")); }
+  bool boolValue(Tool::Category category, const QString &key, bool defaultValue) const;
+  void setValue(Tool::Category category, const QString &key, uint value) { setValue(category, key, QString::number(value)); }
+  uint uintValue(Tool::Category category, const QString &key, uint defaultValue) const;
+
+  static QString value(const QString &group, const QString &subGroup, const QString &key, const QString &defaultValue);
+  static void setValue(const QString &group, const QString &subGroup, const QString &key, const QString &value);
+  static QStringList listValues(const QString &group, const QString &subGroup, const QString &key, const QStringList &defaultValues);
+  static void setListValues(const QString &group, const QString &subGroup, const QString &key, const QStringList &values);
+
+  friend class Tool::Group;
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/list/compile_manager.cpp b/src/tools/list/compile_manager.cpp
new file mode 100644
index 0000000..00a4182
--- /dev/null
+++ b/src/tools/list/compile_manager.cpp
@@ -0,0 +1,292 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "compile_manager.h"
+
+#include <qtimer.h>
+
+#include "libgui/project.h"
+#include "common/gui/misc_gui.h"
+#include "compile_config.h"
+
+Compile::Manager::Manager(QObject *parent)
+  : QObject(parent, "compile_manager"), _base(0)
+{}
+
+void Compile::Manager::cleanFile(const PURL::Url &url)
+{
+  setupFile(Clean, TodoItem(url, false));
+}
+
+bool Compile::Manager::compileFile(const TodoItem &item)
+{
+  _label = i18n("Compiling file...");
+  return setupFile(Clean | (Main::project() ? CompileOnly : Build), item);
+}
+
+bool Compile::Manager::setupFile(Operations op, const TodoItem &item)
+{
+  Log::Base::clear();
+  clearAll();
+  _operations = op;
+  _type = NormalLinking;
+  _todo.append(item);
+  _action = Compiling;
+  _wholeProject = false;
+  QTimer::singleShot(0, this, SLOT(start()));
+  return true;
+}
+
+void Compile::Manager::cleanProject(LinkType type)
+{
+  setupProject(Clean, type);
+}
+
+bool Compile::Manager::buildProject(LinkType type)
+{
+  _label = i18n("Building project...");
+  return setupProject(Clean | Build, type);
+}
+
+bool Compile::Manager::setupProject(Operations op, LinkType type)
+{
+  Log::Base::clear();
+  clearAll();
+  _operations = op;
+  _type = type;
+  PURL::UrlList files = Main::project()->absoluteFiles();
+  if ( files.count()==0 ) {
+    MessageBox::sorry(i18n("Cannot build empty project."), Log::Show);
+    return false;
+  }
+  PURL::UrlList::const_iterator it;
+  for (it=files.begin(); it!=files.end(); ++it)
+    if ( (*it).data().group==PURL::Source ) _todo.append(TodoItem(*it, false));
+  if ( _todo.count()>1 && Main::toolGroup().compileType()==Tool::SingleFile ) {
+    MessageBox::sorry(i18n("The selected toolchain only supports single-file project."), Log::Show);
+    return false;
+  }
+  _action = Compiling;
+  _wholeProject = true;
+  QTimer::singleShot(0, this, SLOT(start()));
+  return true;
+}
+
+void Compile::Manager::kill()
+{
+  if ( clearAll() ) Log::Base::log(Log::LineType::Error, i18n("*** Aborted ***"), Log::Delayed);
+  emit failure();
+}
+
+bool Compile::Manager::clearAll()
+{
+  bool running = ( _base!=0 );
+  delete _base;
+  _base = 0;
+  _todo.clear();
+  return running;
+}
+
+void Compile::Manager::setup(Tool::Category category)
+{
+  delete _base;
+  Compile::Data data(category, _items, Main::device(), Main::project(), _type);
+  _base = Main::toolGroup().createCompileProcess(data, this);
+}
+
+bool Compile::Manager::setupCompile()
+{
+  PURL::FileType type = Main::toolGroup().implementationType(PURL::ToolType::Compiler);
+  for (uint i=0; i<_items.count(); i++) {
+    if ( _items[i].url.fileType()!=type ) {
+      if ( _operations!=Clean ) {
+        QString e = PURL::extensions(type);
+        MessageBox::detailedSorry(i18n("The selected toolchain (%1) cannot compile file. It only supports files with extensions: %2")
+                                  .arg(Main::toolGroup().label()).arg(e), i18n("File: %1").arg(_items[i].url.pretty()), Log::Show);
+        Log::Base::log(Log::LineType::Error, i18n("*** Aborted ***"), Log::Delayed);
+        processFailed();
+      }
+      return false;
+    }
+  }
+  if ( !compileOnly() && Main::toolGroup().needs(Main::project(), Tool::Category::Assembler) ) {
+    PURL::FileType type = Main::toolGroup().implementationType(PURL::ToolType::Assembler);
+    for (uint i=0; i<_items.count(); i++)
+      _todo.append(TodoItem(_items[i].url.toFileType(type), true));
+  }
+  setup(Tool::Category::Compiler);
+  return true;
+}
+
+bool Compile::Manager::setupAssemble()
+{
+  PURL::FileType type = Main::toolGroup().implementationType(PURL::ToolType::Assembler);
+  for (uint i=0; i<_items.count(); i++) {
+    if ( _items[i].url.fileType()!=type ) {
+      if ( _operations!=Clean ) {
+        if ( type==PURL::Nb_FileTypes ) type = Main::toolGroup().implementationType(PURL::ToolType::Compiler);
+        QString e = PURL::extensions(type);
+        MessageBox::detailedSorry(i18n("The selected toolchain (%1) cannot assemble file. It only supports files with extensions: %2")
+                                  .arg(Main::toolGroup().label()).arg(e), i18n("File: %1").arg(_items[i].url.pretty()), Log::Show);
+        Log::Base::log(Log::LineType::Error, i18n("*** Aborted ***"), Log::Delayed);
+        processFailed();
+      }
+      return false;
+    }
+  }
+  setup(Tool::Category::Assembler);
+  return true;
+}
+
+bool Compile::Manager::setupLink()
+{
+  _action = Linking;
+  Tool::Category category = (Main::project() && Main::project()->outputType()==Tool::OutputType::Library ? Tool::Category::Librarian : Tool::Category::Linker);
+  if ( !Main::toolGroup().needs(Main::project(), category) ) {
+    start();
+    return false;
+  }
+  setup(category);
+  return true;
+}
+
+bool Compile::Manager::setupBinToHex()
+{
+  _action = BinToHex;
+  if ( !Main::toolGroup().needs(Main::project(), Tool::Category::BinToHex) ) {
+    start();
+    return false;
+  }
+  setup(Tool::Category::BinToHex);
+  return true;
+}
+
+bool Compile::Manager::prepareAction()
+{
+  switch (_action) {
+    case Compiling:
+      if ( _todo.count()!=0 ) {
+        _items.clear();
+        if ( Main::toolGroup().compileType()==Tool::AllFiles ) {
+          _items = _todo;
+          _todo.clear();
+        } else {
+          _items.append(_todo[0]);
+          _todo.remove(_todo.begin());
+        }
+        PURL::SourceFamily family = _items[0].url.data().sourceFamily;
+        if ( family.data().toolType==PURL::ToolType::Compiler && Main::toolGroup().base(Tool::Category::Compiler) )
+          return setupCompile();
+        return setupAssemble();
+      }
+      if ( !compileOnly() ) return setupLink();
+      break;
+    case Linking: return setupBinToHex();
+    case BinToHex: break;
+  }
+  if ( !(_operations & Clean) ) {
+    Log::Base::log(Log::LineType::Information, i18n("*** Success ***"), Log::Delayed);
+    emit success();
+  } else if ( _operations!=Clean ) {
+    _operations &= ~Clean;
+    if (_wholeProject) setupProject(_operations, _type);
+    else setupFile(_operations, _items[0]);
+  }
+  return false;
+}
+
+void Compile::Manager::start()
+{
+  if ( Main::toolGroup().isCustom() ) {
+    executeCustomCommands();
+    return;
+  }
+  delete _base;
+  _base = 0;
+  if ( !prepareAction() ) return;
+  if ( !_base->check() ) {
+    processFailed();
+    return;
+  }
+  if ( _operations & Clean ) {
+    _base->files(0).onlyExistingFiles().cleanGenerated();
+    QTimer::singleShot(0, this, SLOT(start()));
+    return;
+  }
+  if ( !_base->start() ) {
+    Log::Base::log(Log::LineType::Error, i18n("Failed to execute command: check toolchain configuration."), Log::Delayed);
+    processFailed();
+  }
+}
+
+void Compile::Manager::log(Log::LineType type, const QString &message, const QString &filepath, uint line)
+{
+  if ( type==Log::LineType::Error ) setError(message);
+  static_cast<LogWidget *>(view())->appendLine(type, message, filepath, line);
+}
+
+void Compile::Manager::log(Log::DebugLevel level, const QString &message, const QString &filepath, uint line)
+{
+  static_cast<LogWidget *>(view())->appendLine(level, message, filepath, line);
+}
+
+void Compile::Manager::processDone()
+{
+  if ( hasError() ) {
+    processFailed();
+    return;
+  }
+  if ( Main::toolGroup().isCustom() ) {
+    _customCommandIndex++;
+    startCustomCommand();
+  } else {
+    FileData::List list = _base->files(0).onlyExistingFiles();
+    FileData::List::iterator it;
+    for (it=list.begin(); it!=list.end(); ++it) emit updateFile(*it);
+    QTimer::singleShot(0, this, SLOT(start()));
+  }
+}
+
+void Compile::Manager::processFailed()
+{
+  clearAll();
+  emit failure();
+}
+
+void Compile::Manager::startCustomCommand()
+{
+  delete _base;
+  _base = 0;
+  QStringList commands = Compile::Config::customCommands(Main::project());
+  if ( _customCommandIndex==commands.count() ) {
+    Log::Base::log(Log::LineType::Information, i18n("*** Success ***"), Log::Delayed);
+    emit success();
+    return;
+  }
+  QString command = commands[_customCommandIndex];
+  _base = new CustomProcess(command);
+  Compile::Data data(Tool::Category::Nb_Types, _todo, Main::device(), Main::project(), _type);
+  _base->init(data, this);
+  if ( !_base->start() ) {
+    Log::Base::log(Log::LineType::Error, i18n("Failed to execute custom command #%1.").arg(_customCommandIndex+1), Log::Delayed);
+    processFailed();
+  }
+}
+
+void Compile::Manager::executeCustomCommands()
+{
+  _customCommandIndex = 0;
+  if ( Compile::Config::customCommands(Main::project()).isEmpty() ) {
+    MessageBox::sorry(i18n("No custom commands specified."), Log::Show);
+    emit failure();
+    return;
+  }
+  log(Log::LineType::Information, i18n("Executing custom commands..."));
+  startCustomCommand();
+}
diff --git a/src/tools/list/compile_manager.h b/src/tools/list/compile_manager.h
new file mode 100644
index 0000000..6f617b4
--- /dev/null
+++ b/src/tools/list/compile_manager.h
@@ -0,0 +1,74 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef COMPILE_MANAGER_H
+#define COMPILE_MANAGER_H
+
+#include "compile_process.h"
+
+namespace Compile
+{
+
+class Manager : public QObject, public Log::Base
+{
+Q_OBJECT
+public:
+  enum Operation { NoOperation = 0, Clean = 1, CompileOnly = 2, Build = 4 };
+  Q_DECLARE_FLAGS(Operations, Operation)
+
+public:
+  Manager(QObject *parent);
+  QString label() const { return _label; }
+  bool compileFile(const TodoItem &item);
+  void cleanFile(const PURL::Url &url);
+  bool buildProject(LinkType type);
+  void cleanProject(LinkType type);
+  void kill();
+  bool compileOnly() const { return (_operations & CompileOnly); }
+  void processDone();
+  void processFailed();
+  void log(Log::LineType type, const QString &message, const QString &filepath = QString::null, uint line = 0);
+  void log(Log::DebugLevel debug, const QString &message, const QString &filepath = QString::null, uint line = 0);
+
+signals:
+  void success();
+  void failure();
+  void updateFile(const Compile::FileData &fdata);
+
+private slots:
+  void start();
+
+private:
+  Operations _operations;
+  enum Action { Compiling, Linking, BinToHex };
+  Action     _action;
+  QValueList<TodoItem> _todo, _items;
+  BaseProcess *_base;
+  QString    _label;
+  LinkType   _type;
+  bool       _wholeProject;
+  uint       _customCommandIndex;
+
+  bool startProject();
+  bool clearAll();
+  bool setupFile(Operations operations, const TodoItem &item);
+  bool setupProject(Operations operations, LinkType type);
+  void setup(Tool::Category category);
+  bool setupCompile();
+  bool setupAssemble();
+  bool setupLink();
+  bool setupBinToHex();
+  bool prepareAction();
+  void startCustomCommand();
+  void executeCustomCommands();
+};
+Q_DECLARE_OPERATORS_FOR_FLAGS(Manager::Operations)
+
+} // namespace
+
+#endif
diff --git a/src/tools/list/compile_process.cpp b/src/tools/list/compile_process.cpp
new file mode 100644
index 0000000..4f251bc
--- /dev/null
+++ b/src/tools/list/compile_process.cpp
@@ -0,0 +1,376 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2003-2004 Alain Gibaud <alain.gibaud@free.fr>           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "compile_process.h"
+
+#include <qtimer.h>
+#include <qregexp.h>
+
+#include "devices/list/device_list.h"
+#include "common/global/process.h"
+#include "common/gui/misc_gui.h"
+#include "libgui/text_editor.h"
+#include "libgui/editor_manager.h"
+#include "libgui/project.h"
+#include "compile_config.h"
+#include "compile_manager.h"
+
+//-----------------------------------------------------------------------------
+const Compile::ArgumentData Compile::ARGUMENT_DATA[] = {
+  { "$(SRCPATH)",  I18N_NOOP("Replaced by the source directory.") },
+  { "$LKR(xxx)",   I18N_NOOP("Replaced by \"xxx\" when there is a custom linker script.") },
+  { "$WINE(xxx)",  I18N_NOOP("Replaced by \"xxx\" when \"wine\" is used.") },
+  { "$NO_AUTO_DEVICE(xxx)", I18N_NOOP("Replaced by \"xxx\" when the device name is specified.") },
+  { "%OBJS",       I18N_NOOP("Replaced by the list of additionnal objects.") },
+  { "%LIBS",       I18N_NOOP("Replaced by the list of additionnal libraries.") },
+  { "%O",          I18N_NOOP("Replaced by the output filename.") },
+  { "%PROJECT",    I18N_NOOP("Replaced by the project name.") },
+  { "%COFF",       I18N_NOOP("Replaced by the COFF filename.") },
+  { "%MAP",        I18N_NOOP("Replaced by the map filename.") },
+  { "%SYM",        I18N_NOOP("Replaced by the symbol filename.") },
+  { "%LIST",       I18N_NOOP("Replaced by the list filename.") },
+  { "%DEVICE",     I18N_NOOP("Replaced by the device name.") },
+  { "%FAMILY",     I18N_NOOP("Replaced by the device family name (when needed).") },
+  { "%I",          I18N_NOOP("Replaced by the relative input filepath(s).") },
+  { "%OBJECT",     I18N_NOOP("Replaced by the object file name.") },
+  { "%LKR_PATH",   I18N_NOOP("Replaced by the linker script path.") },
+  { "%LKR_NAME",   I18N_NOOP("Replaced by the linker script basename.") },
+  { "%LKR",        I18N_NOOP("Replaced by the linker script filename.") },
+  { "%SEP",        I18N_NOOP("Replaced by a separation into two arguments.") },
+  { 0, 0 }
+};
+
+//-----------------------------------------------------------------------------
+Compile::FileData::List Compile::FileData::List::onlyExistingFiles() const
+{
+  List list;
+  List::const_iterator it;
+  for (it=begin(); it!=end(); ++it) {
+    FileData data = *it;
+    if ( PURL::findExistingUrl(data.url) ) list.append(data);
+  }
+  return list;
+}
+
+void Compile::FileData::List::cleanGenerated() const
+{
+  Log::StringView sview;
+  List::const_iterator it;
+  for (it=begin(); it!=end(); ++it)
+    if ( (*it).actions & Generated ) (*it).url.del(sview);
+}
+
+//-----------------------------------------------------------------------------
+Compile::LogWidget::LogWidget(QWidget *parent)
+  : Log::Widget(parent, "compile_log")
+{
+  connect(this, SIGNAL(clicked(int, int)), SLOT(lineClicked(int)));
+}
+
+void Compile::LogWidget::clear()
+{
+  Log::Widget::clear();
+  _map.clear();
+}
+
+void Compile::LogWidget::appendLine(Log::LineType type, const QString &message, const QString &filepath, uint line)
+{
+  log(type, message, Log::Delayed);
+  if ( !filepath.isEmpty() ) _map[paragraphs()-1] = Data(filepath, line);
+}
+
+void Compile::LogWidget::appendLine(Log::DebugLevel level, const QString &message, const QString &filepath, uint line)
+{
+  log(level, message, Log::Delayed);
+  if ( !filepath.isEmpty() ) _map[paragraphs()-1] = Data(filepath, line);
+}
+
+void Compile::LogWidget::lineClicked(int line)
+{
+  if ( !_map.contains(line) ) return;
+  PURL::Url url = PURL::Url::fromPathOrUrl(_map[line].filepath);
+  TextEditor *e = ::qt_cast<TextEditor *>(Main::editorManager().openEditor(url));
+  if ( e==0 ) return;
+  e->setCursor(_map[line].line, 0);
+}
+
+//-----------------------------------------------------------------------------
+Compile::BaseProcess::BaseProcess()
+  : QObject(0, "compile_process"), _manager(0), _process(0)
+{}
+
+void Compile::BaseProcess::init(const Data &data, Manager *manager)
+{
+  _data = data;
+  _manager = manager;
+}
+
+PURL::Directory Compile::BaseProcess::directory(uint i) const
+{
+  if (_data.project) return _data.project->directory();
+  Q_ASSERT( i<_data.items.count() );
+  return _data.items[i].url.directory();
+}
+
+bool Compile::BaseProcess::start()
+{
+  _stdout = QString::null;
+  _stderr = QString::null;
+  delete _process;
+  _process = new ::Process::LineSignal;
+  connect(_process, SIGNAL(done(int)), SLOT(done(int)));
+  connect(_process, SIGNAL(timeout()), SLOT(timeout()));
+  connect(_process, SIGNAL(logStdoutLine(const QString &)), SLOT(logStdoutLine(const QString &)));
+  connect(_process, SIGNAL(logStderrLine(const QString &)), SLOT(logStderrLine(const QString &)));
+  _process->setWorkingDirectory(directory().path());
+  setupProcess();
+  _manager->log(Log::LineType::Command, _process->arguments().join(" "));
+  return _process->start(0); // no timeout
+}
+
+void Compile::BaseProcess::done(int code)
+{
+  if ( code!=0 ) {
+    _manager->log(Log::LineType::Error, i18n("*** Exited with status: %1 ***").arg(code));
+    _manager->processFailed();
+  } else if ( _manager->hasError() ) {
+    _manager->log(Log::LineType::Error, i18n("*** Error ***"));
+    _manager->processFailed();
+  } else _manager->processDone();
+}
+
+void Compile::BaseProcess::timeout()
+{
+  _manager->log(Log::LineType::Error, i18n("*** Timeout ***"));
+  _manager->processFailed();
+}
+
+//-----------------------------------------------------------------------------
+void Compile::Process::init(const Data &data, Manager *manager)
+{
+  BaseProcess::init(data, manager);
+  _config = group().createConfig(const_cast<Project *>(data.project));
+}
+
+Compile::Process::~Process()
+{
+  delete _config;
+}
+
+bool Compile::Process::check() const
+{
+  return group().check(_data.device, _manager);
+}
+
+PURL::Url Compile::Process::url(PURL::FileType type, uint i) const
+{
+  PURL::Url url;
+  if ( _data.project && (type==PURL::Hex || _data.category==Tool::Category::Linker || _data.category==Tool::Category::BinToHex) )
+    url = _data.project->url();
+  else if ( _data.project && (type==PURL::Library || _data.category==Tool::Category::Librarian) )
+    return _data.project->url().toExtension(libraryExtension());
+  else {
+    Q_ASSERT( i<_data.items.count() );
+    url = _data.items[i].url;
+  }
+  if ( type==PURL::Nb_FileTypes ) return url;
+  return url.toFileType(type);
+}
+
+QString Compile::Process::filepath(PURL::FileType type, uint i) const
+{
+  return url(type, i).relativeTo(directory(), Compile::Config::withWine(group()) ? PURL::WindowsSeparator : PURL::UnixSeparator);
+}
+
+QString Compile::Process::outputFilepath() const
+{
+  if ( _data.category==Tool::Category::Librarian ) return filepath(PURL::Library);
+  return filepath(PURL::Hex);
+}
+
+Compile::FileData Compile::Process::fileData(PURL::FileType type, FileActions actions) const
+{
+  return FileData(url(type, nbFiles()-1), actions);
+}
+
+Compile::FileData::List Compile::Process::files(bool *ok) const
+{
+  if (ok) *ok = true;
+  FileData::List list;
+  QRegExp rexp("PURL::(.*)");
+  QStringList files = QStringList::split(" ", outputFiles());
+  for (uint i=0; i<files.count(); i++) {
+    if ( rexp.exactMatch(files[i]) ) {
+      PURL::FileType type = PURL::FileType::fromKey(rexp.cap(1));
+      if ( type==PURL::Nb_FileTypes ) {
+        if (ok) *ok = false;
+        qWarning("Unknown PURL::FileType in file list for %s", _manager->label().latin1());
+        continue;
+      }
+      if ( type.data().group==PURL::LinkerScript ) {
+        PURL::Url lkr = Main::toolGroup().linkerScript(_data.project, _data.linkType);
+        list += FileData(lkr, Included | InProject);
+      } else {
+        FileActions actions = Generated;
+        if ( type.data().group==PURL::Source || type==PURL::Hex
+             || type==PURL::Map || type==PURL::Coff || type==PURL::Library ) actions |= InProject;
+        if ( type==PURL::Hex && _data.project==0 ) actions |= Show;
+        list += fileData(type, actions);
+      }
+    } else list += FileData(url().toExtension(files[i]), Compile::Generated);
+  }
+  return list;
+}
+
+bool Compile::Process::checkIs(const QString &s, const QString &key)
+{
+  if ( !s.contains(key) ) return false;
+  if ( s!=key ) qWarning("Argument should be only %s, the rest will be ignored...", key.latin1());
+  return true;
+}
+
+QString Compile::Process::replaceIf(const QString &s, const QString &key, bool condition)
+{
+  QRegExp rexp("(.*)\\$" + key + "\\(([^)]*)\\)(.*)");
+  if ( !rexp.exactMatch(s) ) return s;
+  return rexp.cap(1) + (condition ? rexp.cap(2) : QString::null) + rexp.cap(3);
+}
+
+QStringList Compile::Process::arguments() const
+{
+  bool custom = _config->hasCustomArguments(_data.category);
+  bool withWine = Compile::Config::withWine(group());
+  QStringList args = (custom ? _config->customArguments(_data.category) : genericArguments(*_config));
+  PURL::Url lkr = Main::toolGroup().linkerScript(_data.project, _data.linkType);
+  QStringList nargs;
+  for (uint i=0; i<args.count(); i++) {
+    if ( args[i].contains("$(SRCPATH)") ) {
+      args[i].replace("$(SRCPATH)", directory().path());
+      args[i].replace("//", "/");
+    }
+    args[i] = replaceIf(args[i], "WINE", withWine);
+    args[i] = replaceIf(args[i], "LKR", hasLinkerScript());
+    args[i] = replaceIf(args[i], "NO_AUTO_DEVICE", _data.device!=Device::AUTO_DATA.name);
+    if ( checkIs(args[i], "%OBJS") ) { // before %O
+      if (_data.project) nargs += _data.project->objectsForLinker(objectExtension(), withWine);
+      else {
+        PURL::Url tmp = url(PURL::Object);
+        if ( !objectExtension().isEmpty() ) tmp = tmp.toExtension(objectExtension());
+        nargs += tmp.relativeTo(directory(), withWine ? PURL::WindowsSeparator : PURL::UnixSeparator);
+      }
+      continue;
+    }
+    if ( checkIs(args[i], "%LIBS") ) {
+      if (_data.project) nargs += _data.project->librariesForLinker(QString::null, withWine);
+      continue;
+    }
+    args[i].replace("%OBJECT", filepath(PURL::Object)); // before %O
+    args[i].replace("%O", outputFilepath());
+    args[i].replace("%COFF", filepath(PURL::Coff));
+    if (_data.project) args[i].replace("%PROJECT", _data.project->name());
+    else  args[i].replace("%PROJECT", url().basename());
+    args[i].replace("%MAP", filepath(PURL::Map));
+    args[i].replace("%SYM", url().toExtension("sym").relativeTo(directory(), withWine ? PURL::WindowsSeparator : PURL::UnixSeparator));
+    args[i].replace("%LIST", filepath(PURL::Lst));
+    args[i].replace("%DEVICE", deviceName());
+    args[i].replace("%FAMILY", familyName());
+    args[i].replace("%LKR_PATH", lkr.path()); // before %LKR
+    args[i].replace("%LKR_NAME", lkr.filename()); // before LKR
+    args[i].replace("%LKR", lkr.filepath());
+    if ( checkIs(args[i], "%I") ) {
+      for (uint k=0; k<nbFiles(); k++) nargs += inputFilepath(k);
+      continue;
+    }
+    if ( !args[i].isEmpty() ) nargs += args[i];
+  }
+  args.clear();
+  for (uint i=0; i<nargs.count(); i++) args += QStringList::split("%SEP", nargs[i]);
+  return args;
+}
+
+void Compile::Process::setupProcess()
+{
+  bool withWine = Compile::Config::withWine(group());
+  QString exec = tool()->baseExecutable(withWine, Compile::Config::outputExecutableType(group()));
+  QString path = tool()->executableDirectory().path();
+  _process->setup(path + exec, arguments(), withWine);
+}
+
+Log::LineType Compile::Process::filterType(const QString &type) const
+{
+  QString s = type.lower();
+  if ( s.startsWith("warning") ) return Log::LineType::Warning;
+  if ( s.startsWith("error") )   return Log::LineType::Error;
+  if ( s.startsWith("message") ) return Log::LineType::Information;
+  return Log::LineType::Normal;
+}
+
+bool Compile::Process::parseErrorLine(const QString &s, const ParseErrorData &data)
+{
+  QRegExp re(data.pattern);
+  if ( !re.exactMatch(s) ) return false;
+  QString file;
+  if ( data.indexFile>=0 ) {
+    file = re.cap(data.indexFile).stripWhiteSpace();
+    if ( file.endsWith(".") ) file = file.mid(0, file.length()-1);
+    if ( file=="-" ) file = QString::null;
+  }
+  bool ok;
+  int line = -1;
+  if ( data.indexLine>=0 ) line = re.cap(data.indexLine).stripWhiteSpace().toUInt(&ok) - 1;
+  if ( !ok ) line = -1;
+  QString message;
+  if ( data.indexMessage>=0 ) message= re.cap(data.indexMessage).stripWhiteSpace();
+  Log::LineType type = data.defaultLineType;
+  if ( data.indexLogType>=0 ) {
+    QString s = re.cap(data.indexLogType).stripWhiteSpace();
+    if ( s.isEmpty() ) type = data.defaultLineType;
+    else type = filterType(s);
+  }
+  doLog(type, message, file, line);
+  return true;
+}
+
+void Compile::Process::doLog(const QString &type, const QString &message, const QString &surl, uint line)
+{
+  doLog(filterType(type), message, surl, line);
+}
+
+void Compile::Process::doLog(Log::LineType type, const QString &message, const QString &surl, uint line)
+{
+  if ( surl.isEmpty() ) {
+    _manager->log(type, message);
+    return;
+  }
+  PURL::Url url = PURL::Url::fromPathOrUrl(surl);
+  QString s;
+  if ( !url.isEmpty() ) {
+    if ( !url.exists() && !url.isInto(directory()) ) url = PURL::Url(directory(), surl);
+    s += url.filename() + ":" + QString::number(line+1) + ": ";
+  }
+  switch (type.type()) {
+    case Log::LineType::Warning:     s += i18n("warning: "); break;
+    case Log::LineType::Error:       s += i18n("error: ");   break;
+    case Log::LineType::Information: s += i18n("message: "); break;
+    default: break;
+  }
+  _manager->log(type, s + message.stripWhiteSpace(), url.filepath(), line);
+}
+
+//-----------------------------------------------------------------------------
+void Compile::CustomProcess::setupProcess()
+{
+  _process->setUseShell(true);
+  _process->setup(_command, QStringList(), false);
+}
+
+void Compile::CustomProcess::logStderrLine(const QString &line)
+{
+  _manager->log(Log::LineType::Normal, line);
+}
diff --git a/src/tools/list/compile_process.h b/src/tools/list/compile_process.h
new file mode 100644
index 0000000..4fe396e
--- /dev/null
+++ b/src/tools/list/compile_process.h
@@ -0,0 +1,179 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef COMPILE_PROCESS_H
+#define COMPILE_PROCESS_H
+
+#include "common/common/qflags.h"
+#include "common/global/purl.h"
+#include "libgui/log_view.h"
+#include "devices/base/hex_buffer.h"
+#include "tools/base/tool_group.h"
+#include "tools/base/generic_tool.h"
+#include "libgui/main_global.h"
+namespace Process { class LineSignal; }
+
+namespace Compile
+{
+  class Manager;
+  enum FileAction { NoAction = 0, Show = 1, InProject = 2, Generated = 8, Included = 16 };
+  Q_DECLARE_FLAGS(FileActions, FileAction)
+  Q_DECLARE_OPERATORS_FOR_FLAGS(FileActions)
+
+  class FileData {
+  public:
+    FileData() {}
+    FileData(const PURL::Url &u, FileActions a) : url(u), actions(a) {}
+    PURL::Url url;
+    FileActions actions;
+    class List : public QValueList<FileData> {
+    public:
+      List() {}
+      List(const FileData &data) { append(data); }
+      List onlyExistingFiles() const;
+      void cleanGenerated() const;
+    };
+  };
+
+  struct ArgumentData {
+    const char *key, *description;
+  };
+  extern const ArgumentData ARGUMENT_DATA[];
+
+  class ParseErrorData {
+  public:
+    ParseErrorData(const QString &p, int iFile, int iLine, int iMessage, Log::LineType dLineType)
+      : pattern(p), indexFile(iFile), indexLine(iLine), indexMessage(iMessage), indexLogType(-1),
+        defaultLineType(dLineType) {}
+    ParseErrorData(const QString &p, int iFile, int iLine, int iMessage, uint iLogType,
+                   Log::LineType dLineType = Log::LineType::Error)
+      : pattern(p), indexFile(iFile), indexLine(iLine), indexMessage(iMessage), indexLogType(iLogType),
+        defaultLineType(dLineType) {}
+    QString pattern;
+    int indexFile, indexLine, indexMessage, indexLogType;
+    Log::LineType defaultLineType;
+  };
+
+//-----------------------------------------------------------------------------
+class LogWidget : public Log::Widget
+{
+  Q_OBJECT
+public:
+  LogWidget(QWidget *parent);
+  void appendLine(Log::LineType type, const QString &message, const QString &filepath, uint line);
+  void appendLine(Log::DebugLevel debug, const QString &message, const QString &filepath, uint line);
+  virtual void clear();
+
+private slots:
+  void lineClicked(int line);
+
+private:
+  class Data {
+  public:
+    Data() {}
+    Data(const QString &fp, uint l) : filepath(fp), line(l) {}
+    QString filepath;
+    uint line;
+  };
+  QMap<uint, Data> _map;
+};
+
+//-----------------------------------------------------------------------------
+class BaseProcess : public QObject
+{
+Q_OBJECT
+public:
+  BaseProcess();
+  virtual void init(const Data &data, Manager *manager);
+  virtual bool check() const = 0;
+  virtual FileData::List files(bool *ok) const = 0;
+  bool start();
+
+signals:
+  void success();
+  void failure();
+
+protected:
+  Manager *_manager;
+  Data    _data;
+  ::Process::LineSignal *_process;
+  QString _stdout, _stderr;
+
+  const Tool::Group &group() const { return Main::toolGroup(); }
+  PURL::Directory directory(uint i = 0) const;
+  virtual void setupProcess() = 0;
+
+protected slots:
+  virtual void logStdoutLine(const QString &line) { logStderrLine(line); }
+  virtual void logStderrLine(const QString &line) = 0;
+  virtual void done(int code);
+  void timeout();
+};
+
+//-----------------------------------------------------------------------------
+class Process : public BaseProcess
+{
+Q_OBJECT
+public:
+  virtual ~Process();
+  virtual void init(const Data &data, Manager *manager);
+  virtual bool check() const;
+  virtual FileData::List files(bool *ok) const;
+  virtual QStringList genericArguments(const Compile::Config &config) const = 0;
+  void checkArguments() const;
+
+protected:
+  Config  *_config;
+
+  virtual PURL::Url url(PURL::FileType type = PURL::Nb_FileTypes, uint i = 0) const;
+  QString filepath(PURL::FileType type, uint i=0) const;
+  virtual QString outputFilepath() const;
+  virtual QString outputFiles() const = 0;
+  uint nbFiles() const { return _data.items.count(); }
+  virtual QString inputFilepath(uint i) const { return filepath(PURL::Nb_FileTypes, i); }
+  virtual QString deviceName() const = 0;
+  virtual QString familyName() const { return QString::null; }
+  virtual QString objectExtension() const { return QString::null; }
+  virtual QString libraryExtension() const { return "lib"; }
+  virtual bool hasLinkerScript() const { return group().hasCustomLinkerScript(_data.project); }
+  FileData fileData(PURL::FileType type, FileActions actions) const;
+  bool parseErrorLine(const QString &s, const ParseErrorData &data);
+  virtual Log::LineType filterType(const QString &type) const;
+  void doLog(const QString &type, const QString &message, const QString &surl, uint line);
+  void doLog(Log::LineType type, const QString &message, const QString &surl, uint line);
+  virtual void setupProcess();
+  QStringList arguments() const;
+  const Tool::Base *tool() const { return group().base(_data.category); }
+
+private:
+  static bool checkIs(const QString &s, const QString &key);
+  static QString replaceIf(const QString &s, const QString &key, bool condition);
+};
+
+//-----------------------------------------------------------------------------
+class CustomProcess : public BaseProcess
+{
+Q_OBJECT
+public:
+  CustomProcess(const QString &command) : _command(command) {}
+  virtual bool check() const { return true; }
+  virtual FileData::List files(bool *ok) const { if (ok) *ok = true; return FileData::List(); }
+
+protected:
+  virtual void setupProcess();
+
+protected slots:
+  virtual void logStderrLine(const QString &line);
+
+private:
+  QString _command;
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/list/device_info.cpp b/src/tools/list/device_info.cpp
new file mode 100644
index 0000000..78ca7a7
--- /dev/null
+++ b/src/tools/list/device_info.cpp
@@ -0,0 +1,63 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "device_info.h"
+
+#include "devices/base/generic_device.h"
+#include "progs/list/prog_list.h"
+#include "tool_list.h"
+
+QString Device::webpageHtml(const Device::Data &data)
+{
+  const Device::Documents &documents = data.documents();
+  QString url = "http://www.microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&amp;nodeId=";
+  if ( documents.webpage.isEmpty() ) url += "2044&amp;AllWords=" + data.name();
+  else url += "1335&amp;dDocName=en" + documents.webpage;
+  return "<a href=\"" + url + "\">" + i18n("Device Page") + "</a> ";
+}
+
+QString documentHtml(const QString &document, const QString &label)
+{
+  if ( document.isEmpty() ) return QString::null;
+  return ", <a href=\"document://" + document + "\">" + label + "</a>";
+}
+
+QString Device::documentHtml(const Device::Data &data)
+{
+  QString s = webpageHtml(data);
+  s += documentHtml(data.documents().datasheet, i18n("Datasheet"));
+  s += documentHtml(data.documents().progsheet, i18n("Programming Specifications"));
+  return htmlTableRow(i18n("Documents"), s);
+}
+
+QString Device::supportedHtmlInfo(const Device::Data &data)
+{
+  QString doc;
+  doc += "<hr />\n";
+  doc += "<table>\n";
+  QString tools;
+  Tool::Lister::ConstIterator tit;
+  for (tit=Tool::lister().begin(); tit!=Tool::lister().end(); ++tit) {
+    if ( !tit.data()->isSupported(data.name()) ) continue;
+    if ( tit.data()->isCustom() ) continue;
+    if ( !tools.isEmpty() ) tools += ", ";
+    tools += tit.data()->label();
+  }
+  doc += htmlTableRow(i18n("Tools"), tools) + "\n";
+  QString progs;
+  Programmer::Lister::ConstIterator pit;
+  for (pit=Programmer::lister().begin(); pit!=Programmer::lister().end(); ++pit) {
+    if ( !pit.data()->isSupported(data.name()) ) continue;
+    if ( !progs.isEmpty() ) progs += ", ";
+    progs += pit.data()->label();
+  }
+  doc += htmlTableRow(i18n("Programmers"), progs) + "\n";
+  doc += "</table>\n";
+
+  return doc;
+}
diff --git a/src/tools/list/device_info.h b/src/tools/list/device_info.h
new file mode 100644
index 0000000..ad69c59
--- /dev/null
+++ b/src/tools/list/device_info.h
@@ -0,0 +1,22 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DEVICE_INFO_H
+#define DEVICE_INFO_H
+
+#include <qstring.h>
+namespace Device { class Data; }
+
+namespace Device
+{
+  extern QString webpageHtml(const Device::Data &data);
+  extern QString documentHtml(const Device::Data &data);
+  extern QString supportedHtmlInfo(const Device::Data &data);
+} // namespace
+
+#endif
diff --git a/src/tools/list/tool_list.cpp b/src/tools/list/tool_list.cpp
new file mode 100644
index 0000000..da21cd7
--- /dev/null
+++ b/src/tools/list/tool_list.cpp
@@ -0,0 +1,69 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "tool_list.h"
+
+#include "tools/gputils/gputils.h"
+#include "tools/gputils/gui/gputils_ui.h"
+#include "tools/sdcc/sdcc.h"
+#include "tools/sdcc/gui/sdcc_ui.h"
+#include "tools/pic30/pic30.h"
+#include "tools/pic30/gui/pic30_ui.h"
+#include "tools/picc/picc.h"
+#include "tools/picc/gui/picc_ui.h"
+#include "tools/jal/jal.h"
+#include "tools/jal/gui/jal_ui.h"
+#include "tools/c18/c18.h"
+#include "tools/c18/gui/c18_ui.h"
+#include "tools/ccsc/ccsc.h"
+#include "tools/ccsc/gui/ccsc_ui.h"
+#include "tools/jalv2/jalv2.h"
+#include "tools/jalv2/gui/jalv2_ui.h"
+#include "tools/boost/boostc.h"
+#include "tools/boost/boostcpp.h"
+#include "tools/boost/boostbasic.h"
+#include "tools/boost/gui/boost_ui.h"
+#include "tools/mpc/mpc.h"
+#include "tools/mpc/gui/mpc_ui.h"
+#include "tools/cc5x/cc5x.h"
+#include "tools/cc5x/gui/cc5x_ui.h"
+#include "tools/custom/custom.h"
+
+Tool::Lister::Lister()
+{
+  addGroup(new GPUtils::Group, new GPUtils::GroupUI);
+  addGroup(new SDCC::Group, new SDCC::GroupUI);
+  addGroup(new PIC30::Group, new PIC30::GroupUI);
+  addGroup(new PICC::PICCLiteGroup, new PICC::GroupUI);
+  addGroup(new PICC::PICCGroup, new PICC::GroupUI);
+  addGroup(new PICC::PICC18Group, new PICC::GroupUI);
+  addGroup(new JAL::Group, new JAL::GroupUI);
+  addGroup(new C18::Group, new C18::GroupUI);
+  addGroup(new CCSC::Group, new CCSC::GroupUI);
+  addGroup(new JALV2::Group, new JALV2::GroupUI);
+  addGroup(new Boost::GroupC16, new Boost::GroupUI);
+  addGroup(new Boost::GroupC18, new Boost::GroupUI);
+  addGroup(new Boost::GroupCpp16, new Boost::GroupUI);
+  addGroup(new Boost::GroupCpp18, new Boost::GroupUI);
+  addGroup(new Boost::GroupBasic16, new Boost::GroupUI);
+  addGroup(new Boost::GroupBasic18, new Boost::GroupUI);
+  addGroup(new MPC::Group, new MPC::GroupUI);
+  addGroup(new CC5X::Group, new CC5X::GroupUI);
+  addGroup(new CustomTool::Group, 0);
+}
+
+namespace Tool
+{
+  Lister *_lister = 0;
+}
+
+const Tool::Lister &Tool::lister()
+{
+  if ( _lister==0 ) _lister = new Lister;
+  return *_lister;
+}
diff --git a/src/tools/list/tool_list.h b/src/tools/list/tool_list.h
new file mode 100644
index 0000000..b63aee0
--- /dev/null
+++ b/src/tools/list/tool_list.h
@@ -0,0 +1,28 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef TOOL_LIST_H
+#define TOOL_LIST_H
+
+#include "common/common/lister.h"
+#include "tools/base/tool_group.h"
+
+namespace Tool
+{
+
+class Lister : public ::Group::Lister<Group>
+{
+public:
+  Lister();
+};
+
+extern const Lister &lister();
+
+} // namespace
+
+#endif
diff --git a/src/tools/list/tools_config_widget.cpp b/src/tools/list/tools_config_widget.cpp
new file mode 100644
index 0000000..449183d
--- /dev/null
+++ b/src/tools/list/tools_config_widget.cpp
@@ -0,0 +1,144 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2004 Alain Gibaud <alain.gibaud@free.fr>                *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "tools_config_widget.h"
+
+#include <qwidgetstack.h>
+#include <qlabel.h>
+
+#include "tool_list.h"
+#include "tools/gui/tool_config_widget.h"
+#include "tools/gui/tool_group_ui.h"
+#include "compile_config.h"
+#include "compile_process.h"
+#include "libgui/project.h"
+
+//----------------------------------------------------------------------------
+HelpDialog::HelpDialog(QWidget *parent)
+  : Dialog(parent, "help_dialog", false, i18n("Help Dialog"), Close, Close, false)
+{
+  QGridLayout *top = new QGridLayout(mainWidget(), 1, 1, 10, 10);
+  uint k = 0;
+  for (; Compile::ARGUMENT_DATA[k].key; k++) {
+    QLabel *label = new QLabel(Compile::ARGUMENT_DATA[k].key, mainWidget());
+    top->addWidget(label, k, 0);
+    label = new QLabel(i18n(Compile::ARGUMENT_DATA[k].description), mainWidget());
+    top->addWidget(label, k, 1);
+  }
+  top->setColStretch(2, 1);
+  top->setRowStretch(k, 1);
+}
+
+//----------------------------------------------------------------------------
+ToolsConfigWidget::ToolsConfigWidget(Project *project, QWidget *parent)
+  : ::ConfigWidget(parent), _project(project), _helpDialog(0)
+{
+  uint row = 0;
+
+  QLabel *label = new QLabel(i18n("Toolchain:"), this);
+  addWidget(label, row,row, 0,0);
+  _tool = new KeyComboBox<QString>(this);
+  Tool::Lister::ConstIterator it;
+  for (it=Tool::lister().begin(); it!=Tool::lister().end(); ++it)
+    _tool->appendItem(it.key(), it.data()->label());
+  connect(_tool->widget(), SIGNAL(activated(int)), SLOT(toolChanged()));
+  addWidget(_tool->widget(), row,row, 1,1);
+  label = new QLabel(i18n("Output type:"), this);
+  addWidget(label, row,row, 2,2);
+  _output = new KeyComboBox<Tool::OutputType>(this);
+  FOR_EACH(Tool::OutputType, type) _output->appendItem(type, type.label());
+  addWidget(_output->widget(), row,row, 3,3);
+  row++;
+
+  _mainStack = new QWidgetStack(this);
+  addWidget(_mainStack, row,row, 0,4);
+  row++;
+  _tabWidget = new QTabWidget(_mainStack);
+  _mainStack->addWidget(_tabWidget);
+  FOR_EACH(Tool::Category, category) {
+    _stacks[category] = new KeyWidgetStack<QString>(_tabWidget);
+    _stacks[category]->widget()->setMargin(10);
+    Tool::Lister::ConstIterator it;
+    for (it=Tool::lister().begin(); it!=Tool::lister().end(); ++it) {
+      if ( it.data()->isCustom() ) continue;
+      if ( !it.data()->needs(_project, category) ) continue;
+      ToolConfigWidget *cw = static_cast<const Tool::GroupUI *>(it.data()->gui())->createConfigWidget(category, project);
+      Q_ASSERT(cw);
+      _stacks[category]->appendItem(it.key(), cw);
+      connect(cw, SIGNAL(displayHelp()), SLOT(displayHelp()));
+    }
+  }
+  _customWidget = new QWidget(_mainStack);
+  _mainStack->addWidget(_customWidget);
+  QVBoxLayout *vbox = new QVBoxLayout(_customWidget);
+  label = new QLabel(i18n("Custom shell commands:"), _customWidget);
+  vbox->addWidget(label);
+  _commandsEditor = new EditListBox(1, _customWidget, "command_editor", EditListBox::DuplicatesAllowed);
+  vbox->addWidget(_commandsEditor);
+
+  setColStretch(4, 1);
+}
+
+void ToolsConfigWidget::toolChanged()
+{
+  QString name = _tool->currentItem();
+  bool canMakeLibrary = Tool::lister().group(name)->needs(_project, Tool::Category::Librarian);
+  _output->widget()->setEnabled(canMakeLibrary);
+  if ( !canMakeLibrary ) _output->setCurrentItem(Tool::OutputType::Executable);
+  if ( name==Tool::Group::CUSTOM_NAME ) _mainStack->raiseWidget(_customWidget);
+  else {
+    _mainStack->raiseWidget(_tabWidget);
+    FOR_EACH(Tool::Category, k) {
+      _tabWidget->removePage(_stacks[k]->widget());
+      _stacks[k]->widget()->hide();
+      if ( _stacks[k]->contains(name) ) {
+        _stacks[k]->setCurrentItem(name);
+        _stacks[k]->widget()->show();
+        _tabWidget->addTab(_stacks[k]->widget(), i18n(k.data().title));
+      }
+    }
+    _tabWidget->setCurrentPage(0);
+  }
+}
+
+void ToolsConfigWidget::loadConfig()
+{
+  const Tool::Group &group = Compile::Config::toolGroup(_project);
+  _tool->setCurrentItem(group.name());
+  _output->setCurrentItem(_project->outputType());
+  QStringList commands = Compile::Config::customCommands(_project);
+  _commandsEditor->setTexts(commands);
+  toolChanged();
+  FOR_EACH(Tool::Category, k) {
+    KeyWidgetStack<QString>::ConstIterator it;
+    for (it=_stacks[k]->begin(); it!=_stacks[k]->end(); ++it) {
+      if ( it.key()==Tool::Group::CUSTOM_NAME ) continue;
+      static_cast<ToolConfigWidget *>(_stacks[k]->item(it.key()))->loadConfig();
+    }
+  }
+}
+
+void ToolsConfigWidget::saveConfig()
+{
+  QString name = _tool->currentItem();
+  Compile::Config::setToolGroup(_project, *Tool::lister().group(name));
+  _project->setOutputType(_output->currentItem());
+  Compile::Config::setCustomCommands(_project, _commandsEditor->texts());
+  FOR_EACH(Tool::Category, k) {
+    if ( !_stacks[k]->contains(name) ) continue;
+    QWidget *w = _stacks[k]->item(name);
+    static_cast<ToolConfigWidget *>(w)->saveConfig();
+  }
+}
+
+void ToolsConfigWidget::displayHelp()
+{
+  if ( _helpDialog.isNull() ) _helpDialog = new HelpDialog(this);
+  _helpDialog->show();
+}
diff --git a/src/tools/list/tools_config_widget.h b/src/tools/list/tools_config_widget.h
new file mode 100644
index 0000000..0f41b6a
--- /dev/null
+++ b/src/tools/list/tools_config_widget.h
@@ -0,0 +1,60 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *   Copyright (C) 2004 Alain Gibaud <alain.gibaud@free.fr>                *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef TOOLS_CONFIG_WIDGET_H
+#define TOOLS_CONFIG_WIDGET_H
+
+#include <qcombobox.h>
+#include <qtabwidget.h>
+#include <qvaluevector.h>
+
+#include "common/gui/config_widget.h"
+#include "common/gui/dialog.h"
+#include "common/gui/key_gui.h"
+#include "common/gui/editlistbox.h"
+#include "tools/base/generic_tool.h"
+class Project;
+class ToolConfigWidget;
+
+//----------------------------------------------------------------------------
+class HelpDialog : public Dialog
+{
+Q_OBJECT
+public:
+  HelpDialog(QWidget *parent);
+};
+
+//----------------------------------------------------------------------------
+class ToolsConfigWidget : public ConfigWidget
+{
+Q_OBJECT
+public:
+  ToolsConfigWidget(Project *project, QWidget *parent);
+  virtual void loadConfig();
+
+public slots:
+  virtual void saveConfig();
+  virtual void displayHelp();
+
+private slots:
+  void toolChanged();
+
+private:
+  Project      *_project;
+  KeyComboBox<QString> *_tool;
+  KeyComboBox<Tool::OutputType> *_output;
+  QWidgetStack *_mainStack;
+  QWidget      *_customWidget;
+  EditListBox  *_commandsEditor;
+  QTabWidget   *_tabWidget;
+  QMap<Tool::Category, KeyWidgetStack<QString> *> _stacks;
+  QGuardedPtr<Dialog> _helpDialog;
+};
+
+#endif
diff --git a/src/tools/mpc/Makefile.am b/src/tools/mpc/Makefile.am
new file mode 100644
index 0000000..debc478
--- /dev/null
+++ b/src/tools/mpc/Makefile.am
@@ -0,0 +1,8 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libmpc.la
+libmpc_la_SOURCES = mpc.cpp mpc_compile.cpp mpc_config.cpp
+libmpc_la_LDFLAGS = $(all_libraries)
+
+SUBDIRS = gui
\ No newline at end of file
diff --git a/src/tools/mpc/gui/Makefile.am b/src/tools/mpc/gui/Makefile.am
new file mode 100644
index 0000000..5d590c6
--- /dev/null
+++ b/src/tools/mpc/gui/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libmpcui.la
+libmpcui_la_SOURCES = mpc_ui.cpp
+libmpcui_la_LDFLAGS = $(all_libraries)
\ No newline at end of file
diff --git a/src/tools/mpc/gui/mpc_ui.cpp b/src/tools/mpc/gui/mpc_ui.cpp
new file mode 100644
index 0000000..b3ad4e7
--- /dev/null
+++ b/src/tools/mpc/gui/mpc_ui.cpp
@@ -0,0 +1,14 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "mpc_ui.h"
+
+//----------------------------------------------------------------------------
+MPC::ConfigWidget::ConfigWidget(Project *project)
+  : ToolConfigWidget(project)
+{}
diff --git a/src/tools/mpc/gui/mpc_ui.h b/src/tools/mpc/gui/mpc_ui.h
new file mode 100644
index 0000000..2fc51f9
--- /dev/null
+++ b/src/tools/mpc/gui/mpc_ui.h
@@ -0,0 +1,35 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef MPC_UI_H
+#define MPC_UI_H
+
+#include "tools/gui/tool_config_widget.h"
+#include "tools/gui/tool_group_ui.h"
+
+namespace MPC
+{
+//----------------------------------------------------------------------------
+class ConfigWidget : public ToolConfigWidget
+{
+Q_OBJECT
+public:
+  ConfigWidget(Project *project);
+  virtual void initEntries() {}
+};
+
+//----------------------------------------------------------------------------
+class GroupUI : public Tool::GroupUI
+{
+public:
+  virtual ToolConfigWidget *configWidgetFactory(Tool::Category, ::Project *project) const { return new ConfigWidget(project); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/mpc/mpc.cpp b/src/tools/mpc/mpc.cpp
new file mode 100644
index 0000000..88f9ec2
--- /dev/null
+++ b/src/tools/mpc/mpc.cpp
@@ -0,0 +1,57 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "mpc.h"
+
+#include <qregexp.h>
+
+#include "mpc_compile.h"
+#include "mpc_config.h"
+#include "devices/pic/pic/pic_memory.h"
+#include "devices/list/device_list.h"
+#include "devices/base/device_group.h"
+
+//----------------------------------------------------------------------------
+QValueList<const Device::Data *> MPC::Group::getSupportedDevices(const QString &) const
+{
+  QValueList<const Device::Data *> list;
+  QValueVector<QString> devices = Device::lister().group("pic")->supportedDevices();
+  for (uint i=0; i<devices.count(); i++) {
+    const Device::Data *data = Device::lister().data(devices[i]);
+    Pic::Architecture arch = static_cast<const Pic::Data *>(data)->architecture();
+    if ( arch!=Pic::Architecture::P16X && arch!=Pic::Architecture::P17C ) continue;
+    list.append(data);
+  }
+  return list;
+}
+
+Compile::Process *MPC::Group::processFactory(const Compile::Data &data) const
+{
+  switch (data.category.type()) {
+    case Tool::Category::Compiler: return new MPC::CompileFile;
+    default: break;
+  }
+  Q_ASSERT(false);
+  return 0;
+}
+
+Compile::Config *MPC::Group::configFactory(::Project *project) const
+{
+  return new Config(project);
+}
+
+QString MPC::Group::informationText() const
+{
+  return i18n("<a href=\"%1\">MPC Compiler</a> is a C compiler distributed by Byte Craft.").arg("http://www.bytecraft.com/mpccaps.html");
+}
+
+Tool::Group::BaseData MPC::Group::baseFactory(Tool::Category category) const
+{
+  if ( category==Tool::Category::Compiler ) return BaseData(new MPC::Base, Both);
+  return BaseData();
+}
diff --git a/src/tools/mpc/mpc.h b/src/tools/mpc/mpc.h
new file mode 100644
index 0000000..a378307
--- /dev/null
+++ b/src/tools/mpc/mpc.h
@@ -0,0 +1,49 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef MPC_H
+#define MPC_H
+
+#include "tools/base/tool_group.h"
+#include "common/global/pfile.h"
+
+namespace MPC
+{
+//----------------------------------------------------------------------------
+class Base : public Tool::Base
+{
+public:
+  virtual QString baseExecutable(bool, Tool::OutputExecutableType) const { return "mpcw"; }
+  virtual bool checkExecutable() const { return false; }
+  virtual QStringList checkExecutableOptions(bool) const { return QStringList(); }
+  virtual bool checkExecutableResult(bool, QStringList &) const { return true; }
+};
+
+//----------------------------------------------------------------------------
+class Group : public Tool::Group
+{
+public:
+  virtual QString name() const { return "mpcw"; }
+  virtual QString label() const { return i18n("MPC Compiler"); }
+  virtual QString informationText() const;
+  virtual Tool::Category checkDevicesCategory() const { return Tool::Category::Nb_Types; }
+  virtual Tool::ExecutableType preferedExecutableType() const { return Tool::ExecutableType::Windows; }
+  virtual Tool::CompileType compileType() const { return Tool::SingleFile; }
+  virtual PURL::FileType implementationType(PURL::ToolType type) const { return (type==PURL::ToolType::Compiler ? PURL::CSource : PURL::Nb_FileTypes); }
+
+private:
+  virtual QValueList<const Device::Data *> getSupportedDevices(const QString &s) const;
+  virtual Compile::Process *processFactory(const Compile::Data &data) const;
+  virtual Compile::Config *configFactory(::Project *project) const;
+  virtual BaseData baseFactory(Tool::Category) const;
+  virtual Tool::SourceGenerator *sourceGeneratorFactory() const { /*TODO*/ return 0; }
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/mpc/mpc_compile.cpp b/src/tools/mpc/mpc_compile.cpp
new file mode 100644
index 0000000..69ee994
--- /dev/null
+++ b/src/tools/mpc/mpc_compile.cpp
@@ -0,0 +1,51 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "mpc_compile.h"
+
+#include "common/global/pfile.h"
+#include "mpc_config.h"
+#include "devices/list/device_list.h"
+#include "devices/pic/base/pic.h"
+
+QStringList MPC::CompileFile::genericArguments(const Compile::Config &) const
+{
+  QStringList args;
+  args += "%I";
+  return args;
+}
+
+void MPC::CompileFile::logStderrLine(const QString &)
+{
+  // ignore output
+}
+
+void MPC::CompileFile::parseLine(const QString &line)
+{
+  if ( parseErrorLine(line, Compile::ParseErrorData("(\\w+)\\s+(.*)\\s+(\\d+):\\d+:(.*)", 2, 3, 4, 1)) ) return;
+  doLog(Log::LineType::Normal, line, QString::null, 0); // unrecognized
+}
+
+void MPC::CompileFile::done(int code)
+{
+  // rely on error file
+  PURL::Url url = PURL::Url(directory(), inputFilepath(0)).toExtension("err");
+  Log::StringView sview;
+  PURL::File file(url, sview);
+  if ( !file.openForRead() ) doLog(Log::LineType::Error, i18n("Could not find error file (%1).").arg(url.pretty()), QString::null, 0);
+  else {
+    QStringList lines = file.readLines();
+    for (uint i=0; i<lines.count(); i++) parseLine(lines[i]);
+  }
+  Compile::Process::done(code);
+}
+
+QString MPC::CompileFile::outputFiles() const
+{
+  return "PURL::Lst PURL::Hex PURL::Cod err";
+}
diff --git a/src/tools/mpc/mpc_compile.h b/src/tools/mpc/mpc_compile.h
new file mode 100644
index 0000000..a699734
--- /dev/null
+++ b/src/tools/mpc/mpc_compile.h
@@ -0,0 +1,35 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef MPC_COMPILE_H
+#define MPC_COMPILE_H
+
+#include "tools/list/compile_process.h"
+
+namespace MPC
+{
+
+class CompileFile : public Compile::Process
+{
+Q_OBJECT
+protected:
+  virtual QString deviceName() const { return QString::null; }
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+  virtual void logStderrLine(const QString &line);
+  virtual QString outputFiles() const;
+
+protected slots:
+  virtual void done(int code);
+
+private:
+  void parseLine(const QString &line);
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/mpc/mpc_config.cpp b/src/tools/mpc/mpc_config.cpp
new file mode 100644
index 0000000..d477e1e
--- /dev/null
+++ b/src/tools/mpc/mpc_config.cpp
@@ -0,0 +1,9 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "mpc_config.h"
diff --git a/src/tools/mpc/mpc_config.h b/src/tools/mpc/mpc_config.h
new file mode 100644
index 0000000..45ae64c
--- /dev/null
+++ b/src/tools/mpc/mpc_config.h
@@ -0,0 +1,25 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef MPC_CONFIG_H
+#define MPC_CONFIG_H
+
+#include "tools/list/compile_config.h"
+
+namespace MPC
+{
+//----------------------------------------------------------------------------
+class Config : public Compile::Config
+{
+public:
+  Config(Project *project) : Compile::Config(project) {}
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/pic30/Makefile.am b/src/tools/pic30/Makefile.am
new file mode 100644
index 0000000..edf11c8
--- /dev/null
+++ b/src/tools/pic30/Makefile.am
@@ -0,0 +1,9 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libpic30.la
+libpic30_la_LDFLAGS = $(all_libraries)
+libpic30_la_SOURCES = pic30_compile.cpp pic30_config.cpp pic30.cpp \
+	pic30_generator.cpp
+
+SUBDIRS = gui
\ No newline at end of file
diff --git a/src/tools/pic30/gui/Makefile.am b/src/tools/pic30/gui/Makefile.am
new file mode 100644
index 0000000..4ee894e
--- /dev/null
+++ b/src/tools/pic30/gui/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libpic30ui.la
+libpic30ui_la_LDFLAGS = $(all_libraries)
+libpic30ui_la_SOURCES = pic30_ui.cpp
diff --git a/src/tools/pic30/gui/pic30_ui.cpp b/src/tools/pic30/gui/pic30_ui.cpp
new file mode 100644
index 0000000..9d1b2c4
--- /dev/null
+++ b/src/tools/pic30/gui/pic30_ui.cpp
@@ -0,0 +1,26 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pic30_ui.h"
+
+#include <qlabel.h>
+
+#include "common/gui/purl_gui.h"
+#include "tools/pic30/pic30_config.h"
+
+//----------------------------------------------------------------------------
+PIC30::ConfigWidget::ConfigWidget(Project *project)
+  : ToolConfigWidget(project)
+{}
+
+void PIC30::ConfigWidget::initEntries()
+{
+  if ( _category==Tool::Category::Compiler || _category==Tool::Category::Assembler || _category==Tool::Category::Linker )
+    createIncludeDirectoriesEntry();
+  if ( _category==Tool::Category::Linker ) createCustomLibrariesEntry();
+}
diff --git a/src/tools/pic30/gui/pic30_ui.h b/src/tools/pic30/gui/pic30_ui.h
new file mode 100644
index 0000000..d9890e7
--- /dev/null
+++ b/src/tools/pic30/gui/pic30_ui.h
@@ -0,0 +1,36 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PIC30_UI_H
+#define PIC30_UI_H
+
+#include "tools/gui/tool_config_widget.h"
+#include "tools/gui/tool_group_ui.h"
+
+namespace PIC30
+{
+
+//----------------------------------------------------------------------------
+class ConfigWidget : public ToolConfigWidget
+{
+Q_OBJECT
+public:
+  ConfigWidget(Project *project);
+  virtual void initEntries();
+};
+
+//----------------------------------------------------------------------------
+class GroupUI : public Tool::GroupUI
+{
+public:
+  virtual ::ToolConfigWidget *configWidgetFactory(Tool::Category, ::Project *project) const { return new ConfigWidget(project); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/pic30/pic30.cpp b/src/tools/pic30/pic30.cpp
new file mode 100644
index 0000000..45b9270
--- /dev/null
+++ b/src/tools/pic30/pic30.cpp
@@ -0,0 +1,137 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pic30.h"
+
+#include "devices/list/device_list.h"
+#include "devices/base/device_group.h"
+#include "pic30_compile.h"
+#include "pic30_config.h"
+#include "devices/pic/pic/pic_memory.h"
+#include "common/global/process.h"
+#include "pic30_generator.h"
+
+//----------------------------------------------------------------------------
+QString PIC30::Base::baseExecutable(bool, Tool::OutputExecutableType type) const
+{
+  QString s = "pic30-";
+  if ( type==Tool::OutputExecutableType::Coff ) s += "coff";
+  else s += "elf";
+  s += "-";
+  switch (_category.type()) {
+    case Tool::Category::Compiler:  return s + "gcc";
+    case Tool::Category::Assembler: return s + "as";
+    case Tool::Category::Linker:    return s + "ld";
+    case Tool::Category::Librarian: return s + "ar";
+    case Tool::Category::BinToHex:  return s + "bin2hex";
+    case Tool::Category::Nb_Types:  break;
+  }
+  Q_ASSERT(false);
+  return QString::null;
+}
+
+QStringList PIC30::Base::checkExecutableOptions(bool) const
+{
+  if ( _category!=Tool::Category::BinToHex ) return "--version";
+  return QStringList();
+}
+
+bool PIC30::Base::checkExecutableResult(bool, QStringList &lines) const
+{
+  if ( lines.count()==0 ) return false;
+  lines[0] = lines[0].stripWhiteSpace();
+  switch (_category.type()) {
+    case Tool::Category::Compiler:  return lines[0].startsWith("pic30");
+    case Tool::Category::Assembler: return lines[0].startsWith("GNU assembler");
+    case Tool::Category::Linker:    return lines[0].startsWith("GNU ld");
+    case Tool::Category::BinToHex:  return lines.join(" ").contains("Microchip ");
+    case Tool::Category::Librarian: return lines[0].startsWith("GNU ar");
+    case Tool::Category::Nb_Types:  break;
+  }
+  Q_ASSERT(false);
+  return false;
+}
+
+//----------------------------------------------------------------------------
+QString PIC30::Group::informationText() const
+{
+  return i18n("The <a href=\"%1\">PIC30 ToolChain</a> is a toolsuite for 16-bit PICs available from Microchip. Most of it is available under the GNU Public License.").arg("http://microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=1406&dDocName=en010065&part=SW006012");
+}
+
+Tool::Group::BaseData PIC30::Group::baseFactory(Tool::Category category) const
+{
+  if ( category==Tool::Category::Compiler || category==Tool::Category::Assembler
+       || category==Tool::Category::Linker || category==Tool::Category::BinToHex ) return BaseData(new ::PIC30::Base, Both);
+  if ( category==Tool::Category::Librarian ) return BaseData(new ::PIC30::Base, ProjectOnly);
+  return BaseData();
+}
+
+QValueList<const Device::Data *> PIC30::Group::getSupportedDevices(const QString &) const
+{
+  QValueList<const Device::Data *> list;
+  QValueVector<QString> devices = Device::lister().group("pic")->supportedDevices();
+  for (uint i=0; i<devices.count(); i++) {
+    const Device::Data *data = Device::lister().data(devices[i]);
+    if ( static_cast<const Pic::Data *>(data)->is16bitFamily() ) list.append(data);
+  }
+  return list;
+}
+
+Compile::Process *PIC30::Group::processFactory(const Compile::Data &data) const
+{
+  switch (data.category.type()) {
+    case Tool::Category::Compiler:
+      if (data.project) return new PIC30::CompileProjectFile;
+      return new PIC30::CompileStandaloneFile;
+    case Tool::Category::Assembler:
+      if (data.project) return new PIC30::AssembleProjectFile;
+      return new PIC30::AssembleStandaloneFile;
+    case Tool::Category::Linker:
+      if (data.project) return new PIC30::LinkProject;
+      return new PIC30::LinkStandalone;
+    case Tool::Category::Librarian:
+      Q_ASSERT(data.project);
+      return new PIC30::LibraryProject;
+    case Tool::Category::BinToHex: return new PIC30::BinToHex;
+    case Tool::Category::Nb_Types: break;
+  }
+  Q_ASSERT(false);
+  return 0;
+}
+
+Compile::Config *PIC30::Group::configFactory(::Project *project) const
+{
+  return new Config(project);
+}
+
+PURL::FileType PIC30::Group::implementationType(PURL::ToolType type) const
+{
+  if ( type==PURL::ToolType::Assembler ) return PURL::AsmPIC30;
+  if ( type==PURL::ToolType::Compiler ) return PURL::CSource;
+  return PURL::Nb_FileTypes;
+}
+
+Tool::SourceGenerator *PIC30::Group::sourceGeneratorFactory() const
+{
+  return new SourceGenerator;
+}
+
+PURL::Directory PIC30::Group::autodetectDirectory(Compile::DirectoryType type, const PURL::Directory &execDir, bool withWine) const
+{
+  if ( !withWine ) return PURL::Directory();
+  PURL::Directory baseDir = execDir.up();
+  switch (type.type()) {
+    case Compile::DirectoryType::LinkerScript: return baseDir.down("support/gld");
+    case Compile::DirectoryType::Header: return baseDir.down("support/h");
+    case Compile::DirectoryType::Library: return baseDir.down("lib");
+    case Compile::DirectoryType::Executable:
+    case Compile::DirectoryType::Source:
+    case Compile::DirectoryType::Nb_Types: Q_ASSERT(false); break;
+  }
+  return PURL::Directory();
+}
diff --git a/src/tools/pic30/pic30.h b/src/tools/pic30/pic30.h
new file mode 100644
index 0000000..a490ed0
--- /dev/null
+++ b/src/tools/pic30/pic30.h
@@ -0,0 +1,54 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PIC30_H
+#define PIC30_H
+
+#include "tools/base/tool_group.h"
+
+namespace PIC30
+{
+
+//----------------------------------------------------------------------------
+class Base : public Tool::Base
+{
+public:
+  virtual QString baseExecutable(bool withWine, Tool::OutputExecutableType type) const;
+
+private:
+  virtual QStringList checkExecutableOptions(bool withWine) const;
+  virtual bool checkExecutableResult(bool withWine, QStringList &lines) const;
+};
+
+//----------------------------------------------------------------------------
+class Group : public Tool::Group
+{
+public:
+  virtual QString name() const { return "pic30"; }
+  virtual QString label() const { return i18n("PIC30 Toolchain"); }
+  virtual QString informationText() const;
+  virtual bool hasDirectory(Compile::DirectoryType type) const { return type==Compile::DirectoryType::Header || type==Compile::DirectoryType::LinkerScript || type==Compile::DirectoryType::Library; }
+  virtual PURL::Directory autodetectDirectory(Compile::DirectoryType type, const PURL::Directory &execDir, bool withWine) const;
+  virtual bool hasOutputExecutableType(Tool::OutputExecutableType type) const { return ( type==Tool::OutputExecutableType::Coff || type==Tool::OutputExecutableType::Elf ); }
+  virtual Tool::Category checkDevicesCategory() const { return Tool::Category::Nb_Types; }
+  virtual Tool::ExecutableType preferedExecutableType() const { return Tool::ExecutableType::Unix; }
+  virtual Tool::CompileType compileType() const { return Tool::SeparateFiles; }
+  virtual PURL::FileType linkerScriptType() const { return PURL::Gld; }
+  virtual PURL::FileType implementationType(PURL::ToolType type) const;
+
+private:
+  virtual BaseData baseFactory(Tool::Category category) const;
+  virtual QValueList<const Device::Data *> getSupportedDevices(const QString &s) const;
+  virtual Compile::Process *processFactory(const Compile::Data &data) const;
+  virtual Compile::Config *configFactory(::Project *project) const;
+  virtual Tool::SourceGenerator *sourceGeneratorFactory() const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/pic30/pic30_compile.cpp b/src/tools/pic30/pic30_compile.cpp
new file mode 100644
index 0000000..02cbb35
--- /dev/null
+++ b/src/tools/pic30/pic30_compile.cpp
@@ -0,0 +1,196 @@
+/***************************************************************************
+ *   Copyright (C) 2006-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pic30_compile.h"
+
+#include "config.h"
+#include "pic30_config.h"
+#include "devices/list/device_list.h"
+
+//-----------------------------------------------------------------------------
+QStringList PIC30::CompileFile::genericArguments(const Compile::Config &config) const
+{
+  QStringList args;
+  args += "-S"; // compile only
+  args += "$NO_AUTO_DEVICE(-mcpu=%DEVICE)";
+  args += config.includeDirs(Tool::Category::Compiler, "-I");
+  PURL::Directory purl = Compile::Config::directory(group(), Compile::DirectoryType::Header);
+  if ( !purl.isEmpty() ) args += "-I" + purl.path();
+  args += config.customOptions(Tool::Category::Compiler);
+  return args;
+}
+
+QString PIC30::CompileFile::outputFiles() const
+{
+  return "PURL::AsmPIC30";
+}
+
+void PIC30::CompileFile::logStderrLine(const QString &line)
+{
+  // #### TODO
+  doLog(Log::LineType::Normal, line, QString::null, 0); // unrecognized
+}
+
+//-----------------------------------------------------------------------------
+QStringList PIC30::CompileStandaloneFile::genericArguments(const Compile::Config &config) const
+{
+  QStringList args = CompileFile::genericArguments(config);
+  args += "%I";
+  return args;
+}
+
+QString PIC30::CompileStandaloneFile::outputFiles() const
+{
+  return CompileFile::outputFiles() + " PURL::Object PURL::Elf";
+}
+
+//-----------------------------------------------------------------------------
+QStringList PIC30::CompileProjectFile::genericArguments(const Compile::Config &config) const
+{
+  QStringList args = CompileFile::genericArguments(config);
+  args += "-g";
+  args += "%I";
+  return args;
+}
+
+//-----------------------------------------------------------------------------
+QStringList PIC30::AssembleFile::genericArguments(const Compile::Config &config) const
+{
+  QStringList args;
+  args += "-g";
+  args += "-a=%LIST"; // listing
+  args += "-o%O";
+  args += config.includeDirs(Tool::Category::Assembler, "-I");
+  args += config.customOptions(Tool::Category::Assembler);
+  return args;
+}
+
+QString PIC30::AssembleFile::outputFiles() const
+{
+  return "PURL::Object PURL::Lst";
+}
+
+void PIC30::AssembleFile::logStderrLine(const QString &line)
+{
+  // #### TODO
+  doLog(Log::LineType::Normal, line, QString::null, 0); // unrecognized
+}
+
+//-----------------------------------------------------------------------------
+QStringList PIC30::AssembleStandaloneFile::genericArguments(const Compile::Config &config) const
+{
+  QStringList args = AssembleFile::genericArguments(config);
+  args += "$NO_AUTO_DEVICE(-p%DEVICE)";
+  args += "%I";
+  return args;
+}
+
+//-----------------------------------------------------------------------------
+QStringList PIC30::AssembleProjectFile::genericArguments(const Compile::Config &config) const
+{
+  QStringList args = AssembleFile::genericArguments(config);
+  if ( !_data.items[0].generated ) args += "-p%DEVICE";
+  args += "%I";
+  return args;
+}
+
+//-----------------------------------------------------------------------------
+QString PIC30::Link::outputFilepath() const
+{
+  PURL::FileType type = Compile::Config::outputExecutableType(group()).data().type;
+  return filepath(type);
+}
+
+QStringList PIC30::Link::genericArguments(const Compile::Config &config) const
+{
+  QStringList args;
+  args += "-Map";
+  args += "%MAP";
+  args += "-o%O";
+  args += config.includeDirs(Tool::Category::Linker, "-L");
+  PURL::Directory purl = Compile::Config::directory(group(), Compile::DirectoryType::Library);
+  if ( !purl.isEmpty() ) args += "-L" + purl.path();
+  args += "$LKR(-T%LKR)";
+  args += config.customOptions(Tool::Category::Linker);
+  args += "%OBJS";
+  return args;
+}
+
+QString PIC30::Link::outputFiles() const
+{
+  PURL::FileType type = Compile::Config::outputExecutableType(group()).data().type;
+  return QString("PURL::Map PURL::") + type.key();
+}
+
+void PIC30::Link::logStderrLine(const QString &line)
+{
+  // #### TODO
+  doLog(Log::LineType::Normal, line, QString::null, 0); // unrecognized
+}
+
+//-----------------------------------------------------------------------------
+QStringList PIC30::LinkStandalone::genericArguments(const Compile::Config &config) const
+{
+  QStringList args = Link::genericArguments(config);
+  args += config.customLibraries(Tool::Category::Linker);
+  return args;
+}
+
+//-----------------------------------------------------------------------------
+QStringList PIC30::LinkProject::genericArguments(const Compile::Config &config) const
+{
+  QStringList args = Link::genericArguments(config);
+  args += "%LIBS";
+  args += config.customLibraries(Tool::Category::Linker);
+  return args;
+}
+
+//-----------------------------------------------------------------------------
+QStringList PIC30::LibraryProject::genericArguments(const Compile::Config &) const
+{
+  QStringList args;
+  args += "-rc"; // insert new + do not warn if creating library
+  args += "%O";
+  args += "%LIBS";
+  args += "%OBJS";
+  return args;
+}
+
+void PIC30::LibraryProject::logStderrLine(const QString &line)
+{
+  // #### TODO
+  doLog(Log::LineType::Normal, line, QString::null, 0); // unrecognized
+}
+
+QString PIC30::LibraryProject::outputFiles() const
+{
+  return "PURL::Library";
+}
+
+//-----------------------------------------------------------------------------
+QString PIC30::BinToHex::inputFilepath(uint) const
+{
+  PURL::FileType type = Compile::Config::outputExecutableType(group()).data().type;
+  return filepath(type);
+}
+
+QStringList PIC30::BinToHex::genericArguments(const Compile::Config &) const
+{
+  return "%I";
+}
+
+QString PIC30::BinToHex::outputFiles() const
+{
+  return "PURL::Hex";
+}
+
+void PIC30::BinToHex::logStderrLine(const QString &line)
+{
+  // #### TODO
+  doLog(Log::LineType::Normal, line, QString::null, 0); // unrecognized
+}
diff --git a/src/tools/pic30/pic30_compile.h b/src/tools/pic30/pic30_compile.h
new file mode 100644
index 0000000..c298eac
--- /dev/null
+++ b/src/tools/pic30/pic30_compile.h
@@ -0,0 +1,128 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PIC30_COMPILE_H
+#define PIC30_COMPILE_H
+
+#include "tools/list/compile_process.h"
+
+namespace PIC30
+{
+//-----------------------------------------------------------------------------
+class Process : public Compile::Process
+{
+Q_OBJECT
+protected:
+  virtual QString deviceName() const { return _data.device; }
+};
+
+//-----------------------------------------------------------------------------
+class CompileFile : public Process
+{
+Q_OBJECT
+protected:
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+  virtual QString outputFiles() const;
+  virtual void logStderrLine(const QString &line);
+};
+
+//-----------------------------------------------------------------------------
+class CompileStandaloneFile : public CompileFile
+{
+Q_OBJECT
+protected:
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+  virtual QString outputFiles() const;
+};
+
+//-----------------------------------------------------------------------------
+class CompileProjectFile : public CompileFile
+{
+Q_OBJECT
+protected:
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+};
+
+//-----------------------------------------------------------------------------
+class AssembleFile : public Process
+{
+Q_OBJECT
+protected:
+  virtual QString outputFilepath() const { return filepath(PURL::Object); }
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+  virtual QString outputFiles() const;
+  virtual void logStderrLine(const QString &line);
+};
+
+//-----------------------------------------------------------------------------
+class AssembleStandaloneFile : public AssembleFile
+{
+Q_OBJECT
+protected:
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+};
+
+//-----------------------------------------------------------------------------
+class AssembleProjectFile : public AssembleFile
+{
+Q_OBJECT
+protected:
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+};
+
+//-----------------------------------------------------------------------------
+class Link : public Process
+{
+Q_OBJECT
+protected:
+  virtual QString outputFilepath() const;
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+  virtual QString outputFiles() const;
+  virtual void logStderrLine(const QString &line);
+};
+
+//-----------------------------------------------------------------------------
+class LinkStandalone : public Link
+{
+Q_OBJECT
+protected:
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+};
+
+//-----------------------------------------------------------------------------
+class LinkProject : public Link
+{
+Q_OBJECT
+protected:
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+};
+
+//-----------------------------------------------------------------------------
+class LibraryProject : public Process
+{
+Q_OBJECT
+protected:
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+  virtual QString outputFiles() const;
+  virtual void logStderrLine(const QString &line);
+};
+
+//-----------------------------------------------------------------------------
+class BinToHex : public Process
+{
+Q_OBJECT
+protected:
+  virtual QString inputFilepath(uint i) const;
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+  virtual QString outputFiles() const;
+  virtual void logStderrLine(const QString &line);
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/pic30/pic30_config.cpp b/src/tools/pic30/pic30_config.cpp
new file mode 100644
index 0000000..32ef7e0
--- /dev/null
+++ b/src/tools/pic30/pic30_config.cpp
@@ -0,0 +1,9 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pic30_config.h"
diff --git a/src/tools/pic30/pic30_config.h b/src/tools/pic30/pic30_config.h
new file mode 100644
index 0000000..f0b1520
--- /dev/null
+++ b/src/tools/pic30/pic30_config.h
@@ -0,0 +1,25 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PIC30_CONFIG_H
+#define PIC30_CONFIG_H
+
+#include "tools/list/compile_config.h"
+
+namespace PIC30
+{
+//----------------------------------------------------------------------------
+class Config : public Compile::Config
+{
+public:
+  Config(Project *project) : Compile::Config(project) {}
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/pic30/pic30_generator.cpp b/src/tools/pic30/pic30_generator.cpp
new file mode 100644
index 0000000..fe874e3
--- /dev/null
+++ b/src/tools/pic30/pic30_generator.cpp
@@ -0,0 +1,111 @@
+/***************************************************************************
+ *   Copyright (C) 2006-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "pic30_generator.h"
+
+#include "devices/pic/pic/pic_memory.h"
+
+SourceLine::List PIC30::SourceGenerator::configLines(PURL::ToolType type, const Device::Memory &memory, bool &ok) const
+{
+  const Pic::Memory &pmemory = static_cast<const Pic::Memory &>(memory);
+  const Pic::Data &data = pmemory.device();
+  const Pic::Config &config = data.config();
+  SourceLine::List lines;
+  for (uint i=0; i<data.nbWords(Pic::MemoryRangeType::Config); i++) {
+    const Pic::Config::Word &cword = config._words[i];
+    QStringList cnames = SourceLine::configNames(Pic::ConfigNameType::Default, pmemory, i, ok);
+    if ( cnames.isEmpty() ) continue;
+    QString code;
+    if ( type==PURL::ToolType::Assembler ) code += "config __" + cword.name + ", ";
+    else code += "_" + cword.name + "(";
+    code += cnames.join(" & ");
+    if ( type==PURL::ToolType::Compiler ) code += ");";
+    lines.appendNotIndentedCode(code);
+  }
+  return lines;
+}
+
+SourceLine::List PIC30::SourceGenerator::includeLines(PURL::ToolType type, const Device::Data &data) const
+{
+  SourceLine::List lines;
+  if ( type==PURL::ToolType::Assembler ) lines.appendIndentedCode(".include \"p" + data.name().lower() + ".inc\"");
+  else lines.appendNotIndentedCode("#include <p" + data.name().lower() + ".h>");
+  return lines;
+}
+
+SourceLine::List PIC30::SourceGenerator::sourceFileContent(PURL::ToolType type, const Device::Data &, bool &ok) const
+{
+  SourceLine::List lines;
+  if ( type==PURL::ToolType::Assembler ) {
+    lines.appendTitle(i18n("Global declarations"));
+    lines.appendIndentedCode(".global _wreg_init");
+    lines.appendIndentedCode(".global __reset", i18n("label for code start"));
+    lines.appendIndentedCode(".global __T1Interrrupt", i18n("declare Timer1 ISR"));
+    lines.appendEmpty();
+    lines.appendSeparator();
+    lines.appendTitle(i18n("Constants in program space"));
+    lines.appendIndentedCode(".section .constbuffer, code");
+    lines.appendIndentedCode(".palign 2");
+    lines.appendNotIndentedCode("const1:");
+    lines.appendIndentedCode(".hword 0x0001, 0x0002, 0X0003");
+    lines.appendEmpty();
+    lines.appendTitle(i18n("Unitialized variables in X-space"));
+    lines.appendIndentedCode(".section .xbss, bss, xmemory");
+    lines.appendNotIndentedCode("x_var1: .space 4", i18n("allocating 4 bytes"));
+    lines.appendEmpty();
+    lines.appendTitle(i18n("Unitialized variables in Y-space"));
+    lines.appendIndentedCode(".section .ybss, bss, ymemory");
+    lines.appendNotIndentedCode("y_var1: .space 2", i18n("allocating 2 bytes"));
+    lines.appendEmpty();
+    lines.appendTitle(i18n("Unitialized variables in near data memory"));
+    lines.appendIndentedCode(".section .nbss, bss, near");
+    lines.appendNotIndentedCode("var1: .space 4", i18n("allocating 4 bytes"));
+    lines.appendEmpty();
+    lines.appendSeparator();
+    lines.appendTitle("Code section");
+    lines.appendNotIndentedCode(".text");
+    lines.appendNotIndentedCode("__reset:");
+    lines.appendIndentedCode("MOV #__SP_init, W15", i18n("initialize stack pointer"));
+    lines.appendIndentedCode("MOV #__SPLIM_init, W0", i18n("initialize stack pointer limit register"));
+    lines.appendIndentedCode("MOV W0, SPLIM");
+    lines.appendIndentedCode("NOP", i18n("nop after SPLIM initialization"));
+    lines.appendIndentedCode("CALL _wreg_init", i18n("call _wreg_init subroutine"));
+    lines.appendEmpty();
+    lines.appendIndentedCode(QString::null, "<<" + i18n("insert code") + ">>");
+    lines.appendEmpty();
+    lines.appendNotIndentedCode("done:");
+    lines.appendIndentedCode("BRA done", i18n("loop forever"));
+    lines.appendEmpty();
+    lines.appendSeparator();
+    lines.appendTitle(i18n("Subroutine to initialize W registers to 0x0000"));
+    lines.appendNotIndentedCode("_wreg_init:");
+    lines.appendIndentedCode("CLR W0");
+    lines.appendIndentedCode("MOV W0, W14");
+    lines.appendIndentedCode("REPEAT #12");
+    lines.appendIndentedCode("MOV W0, [++W14]");
+    lines.appendIndentedCode("CLR W14");
+    lines.appendIndentedCode("RETURN");
+    lines.appendEmpty();
+    lines.appendSeparator();
+    lines.appendTitle(i18n("Timer1 interrupt service routine"));
+    lines.appendNotIndentedCode("__T1Interrupt:");
+    lines.appendIndentedCode("PUSH.D W4", i18n("example of context saving (push W4 and W5)"));
+    lines.appendIndentedCode(QString::null, "<<" + i18n("insert interrupt code") + ">>");
+    lines.appendIndentedCode("BCLR IFS0, #T1IF", i18n("clear Timer1 interrupt flag status bit"));
+    lines.appendIndentedCode("POP.D W4", i18n("restore context from stack"));
+    lines.appendIndentedCode("RETFIE");
+    lines.appendEmpty();
+    lines.appendSeparator();
+    lines.appendTitle(i18n("End of all code sections"));
+    lines.appendNotIndentedCode(".end");
+  } else {
+    // #### TODO
+    ok = false;
+  }
+  return lines;
+}
diff --git a/src/tools/pic30/pic30_generator.h b/src/tools/pic30/pic30_generator.h
new file mode 100644
index 0000000..510a483
--- /dev/null
+++ b/src/tools/pic30/pic30_generator.h
@@ -0,0 +1,27 @@
+/***************************************************************************
+ *   Copyright (C) 2006-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PIC30_GENERATOR_H
+#define PIC30_GENERATOR_H
+
+#include "tools/base/tool_group.h"
+
+namespace PIC30
+{
+
+class SourceGenerator : public Tool::SourceGenerator
+{
+public:
+  virtual SourceLine::List configLines(PURL::ToolType type, const Device::Memory &memory, bool &ok) const;
+  virtual SourceLine::List sourceFileContent(PURL::ToolType type, const Device::Data &data, bool &ok) const;
+  virtual SourceLine::List includeLines(PURL::ToolType type, const Device::Data &data) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/picc/Makefile.am b/src/tools/picc/Makefile.am
new file mode 100644
index 0000000..9a6d0c2
--- /dev/null
+++ b/src/tools/picc/Makefile.am
@@ -0,0 +1,8 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libpicc.la
+libpicc_la_LDFLAGS = $(all_libraries)
+libpicc_la_SOURCES = picc_compile.cpp picc_config.cpp picc.cpp
+
+SUBDIRS = gui
\ No newline at end of file
diff --git a/src/tools/picc/gui/Makefile.am b/src/tools/picc/gui/Makefile.am
new file mode 100644
index 0000000..ddc928d
--- /dev/null
+++ b/src/tools/picc/gui/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libpiccui.la
+libpiccui_la_LDFLAGS = $(all_libraries)
+libpiccui_la_SOURCES = picc_ui.cpp
diff --git a/src/tools/picc/gui/picc_ui.cpp b/src/tools/picc/gui/picc_ui.cpp
new file mode 100644
index 0000000..207a7cb
--- /dev/null
+++ b/src/tools/picc/gui/picc_ui.cpp
@@ -0,0 +1,20 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "picc_ui.h"
+
+//----------------------------------------------------------------------------
+PICC::ConfigWidget::ConfigWidget(Project *project)
+  : ToolConfigWidget(project)
+{}
+
+void PICC::ConfigWidget::initEntries()
+{
+  if ( _category==Tool::Category::Compiler || _category==Tool::Category::Assembler )
+    createIncludeDirectoriesEntry();
+}
diff --git a/src/tools/picc/gui/picc_ui.h b/src/tools/picc/gui/picc_ui.h
new file mode 100644
index 0000000..ec096c2
--- /dev/null
+++ b/src/tools/picc/gui/picc_ui.h
@@ -0,0 +1,35 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICC_UI_H
+#define PICC_UI_H
+
+#include "tools/gui/tool_config_widget.h"
+#include "tools/gui/tool_group_ui.h"
+
+namespace PICC
+{
+//----------------------------------------------------------------------------
+class ConfigWidget : public ToolConfigWidget
+{
+Q_OBJECT
+public:
+  ConfigWidget(Project *project);
+  virtual void initEntries();
+};
+
+//----------------------------------------------------------------------------
+class GroupUI : public Tool::GroupUI
+{
+public:
+  virtual ToolConfigWidget *configWidgetFactory(Tool::Category, ::Project *project) const { return new ConfigWidget(project); }
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/picc/picc.cpp b/src/tools/picc/picc.cpp
new file mode 100644
index 0000000..f0d6e83
--- /dev/null
+++ b/src/tools/picc/picc.cpp
@@ -0,0 +1,127 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "picc.h"
+
+#include <qregexp.h>
+
+#include "picc_compile.h"
+#include "picc_config.h"
+#include "devices/pic/pic/pic_memory.h"
+#include "devices/list/device_list.h"
+#include "common/global/process.h"
+
+//----------------------------------------------------------------------------
+bool PICC::Base::checkExecutableResult(bool, QStringList &lines) const
+{
+  return lines.join(" ").contains("HI-TECH");
+}
+
+QString PICC::BaseLite::baseExecutable(bool, Tool::OutputExecutableType) const
+{
+  if ( _category.type()==Tool::Category::Librarian ) return "libr";
+  return "picl";
+}
+
+QString PICC::BaseNormal::baseExecutable(bool, Tool::OutputExecutableType) const
+{
+  if ( _category.type()==Tool::Category::Librarian ) return "libr";
+  return "picc";
+}
+
+QString PICC::Base18::baseExecutable(bool, Tool::OutputExecutableType) const
+{
+  if ( _category.type()==Tool::Category::Librarian ) return "libr";
+  return "picc18";
+}
+
+//----------------------------------------------------------------------------
+QValueList<const Device::Data *> PICC::Group::getSupportedDevices(const QString &s) const
+{
+  QValueList<const Device::Data *> list;
+  QStringList lines = QStringList::split('\n', s);
+  for (uint i=0; i<lines.count(); i++) {
+    QRegExp re("([A-Za-z0-9]+):.*");
+    if ( !re.exactMatch(lines[i]) ) continue;
+    const Device::Data *data = Device::lister().data(re.cap(1));
+    if (data) list.append(data);
+  }
+  return list;
+}
+
+Compile::Process *PICC::Group::processFactory(const Compile::Data &data) const
+{
+  switch (data.category.type()) {
+    case Tool::Category::Compiler:
+      if (data.project) return new PICC::CompileProjectFile;
+      return new PICC::CompileStandaloneFile;
+    case Tool::Category::Assembler:
+      if (data.project) return new PICC::AssembleProjectFile;
+      return new PICC::AssembleStandaloneFile;
+    case Tool::Category::Linker:
+      Q_ASSERT(data.project);
+      return new PICC::LinkProject;
+    case Tool::Category::Librarian:
+      Q_ASSERT(data.project);
+      return new PICC::LibraryProject;
+    default: break;
+  }
+  Q_ASSERT(false);
+  return 0;
+}
+
+Compile::Config *PICC::Group::configFactory(::Project *project) const
+{
+  return new Config(project);
+}
+
+PURL::FileType PICC::Group::implementationType(PURL::ToolType type) const
+{
+  if ( type==PURL::ToolType::Assembler ) return PURL::AsmPICC;
+  if ( type==PURL::ToolType::Compiler ) return PURL::CSource;
+  return PURL::Nb_FileTypes;
+}
+
+//----------------------------------------------------------------------------
+QString PICC::PICCLiteGroup::informationText() const
+{
+  return i18n("<a href=\"%1\">PICC-Lite</a> is a freeware C compiler distributed by HTSoft.").arg("http://www.htsoft.com");
+}
+
+Tool::Group::BaseData PICC::PICCLiteGroup::baseFactory(Tool::Category category) const
+{
+  if ( category==Tool::Category::Compiler || category==Tool::Category::Assembler ) return BaseData(new BaseLite, Both);
+  if ( category==Tool::Category::Linker || category==Tool::Category::Librarian )   return BaseData(new BaseLite, ProjectOnly);
+  return BaseData();
+}
+
+//----------------------------------------------------------------------------
+QString PICC::PICCGroup::informationText() const
+{
+  return i18n("<a href=\"%1\">PICC</a> is a C compiler distributed by HTSoft.").arg("http://www.htsoft.com");
+}
+
+Tool::Group::BaseData PICC::PICCGroup::baseFactory(Tool::Category category) const
+{
+  if ( category==Tool::Category::Compiler || category==Tool::Category::Assembler ) return BaseData(new BaseNormal, Both);
+  if ( category==Tool::Category::Linker || category==Tool::Category::Librarian )   return BaseData(new BaseNormal, ProjectOnly);
+  return BaseData();
+}
+
+//----------------------------------------------------------------------------
+QString PICC::PICC18Group::informationText() const
+{
+  return i18n("<a href=\"%1\">PICC 18</a> is a C compiler distributed by HTSoft.").arg("http://www.htsoft.com");
+}
+
+Tool::Group::BaseData PICC::PICC18Group::baseFactory(Tool::Category category) const
+{
+  if ( category==Tool::Category::Compiler || category==Tool::Category::Assembler ) return BaseData(new Base18, Both);
+  if ( category==Tool::Category::Linker || category==Tool::Category::Librarian )   return BaseData(new Base18, ProjectOnly);
+  return BaseData();
+}
diff --git a/src/tools/picc/picc.h b/src/tools/picc/picc.h
new file mode 100644
index 0000000..af44d02
--- /dev/null
+++ b/src/tools/picc/picc.h
@@ -0,0 +1,97 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICC_H
+#define PICC_H
+
+#include "tools/base/tool_group.h"
+
+namespace PICC
+{
+//----------------------------------------------------------------------------
+class Base : public Tool::Base
+{
+private:
+  virtual QStringList checkExecutableOptions(bool) const { return "--ver"; }
+  virtual bool checkExecutableResult(bool withWine, QStringList &lines) const;
+};
+
+class BaseLite : public Base
+{
+public:
+  virtual QString baseExecutable(bool, Tool::OutputExecutableType) const;
+};
+
+class BaseNormal : public Base
+{
+public:
+  virtual QString baseExecutable(bool, Tool::OutputExecutableType) const;
+};
+
+class Base18 : public Base
+{
+public:
+  virtual QString baseExecutable(bool, Tool::OutputExecutableType) const;
+};
+
+//----------------------------------------------------------------------------
+class Group : public Tool::Group
+{
+public:
+  virtual Tool::Category checkDevicesCategory() const { return Tool::Category::Compiler; }
+  virtual QStringList checkDevicesOptions(uint) const { return "--CHIPINFO"; }
+  virtual Tool::ExecutableType preferedExecutableType() const { return Tool::ExecutableType::Unix; }
+  virtual Tool::CompileType compileType() const { return Tool::SeparateFiles; }
+  virtual PURL::FileType implementationType(PURL::ToolType type) const;
+
+private:
+  virtual QValueList<const Device::Data *> getSupportedDevices(const QString &s) const;
+  virtual Compile::Process *processFactory(const Compile::Data &data) const;
+  virtual Compile::Config *configFactory(::Project *project) const;
+  virtual Tool::SourceGenerator *sourceGeneratorFactory() const { /*TODO*/ return 0; }
+};
+
+//----------------------------------------------------------------------------
+class PICCLiteGroup : public Group
+{
+public:
+  virtual QString name() const { return "picclite"; }
+  virtual QString label() const { return i18n("PICC Lite Compiler"); }
+  virtual QString informationText() const;
+
+private:
+  virtual BaseData baseFactory(Tool::Category) const;
+};
+
+//----------------------------------------------------------------------------
+class PICCGroup : public Group
+{
+public:
+  virtual QString name() const { return "picc"; }
+  virtual QString label() const { return i18n("PICC Compiler"); }
+  virtual QString informationText() const;
+
+private:
+  virtual BaseData baseFactory(Tool::Category) const;
+};
+
+//----------------------------------------------------------------------------
+class PICC18Group : public Group
+{
+public:
+  virtual QString name() const { return "picc18"; }
+  virtual QString label() const { return i18n("PICC-18 Compiler"); }
+  virtual QString informationText() const;
+
+private:
+  virtual BaseData baseFactory(Tool::Category) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/picc/picc_compile.cpp b/src/tools/picc/picc_compile.cpp
new file mode 100644
index 0000000..63fd127
--- /dev/null
+++ b/src/tools/picc/picc_compile.cpp
@@ -0,0 +1,136 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "picc_compile.h"
+
+#include "picc_config.h"
+
+//-----------------------------------------------------------------------------
+QStringList PICC::Process::genericArguments(const Compile::Config &) const
+{
+  QStringList args;
+  args += "--ERRFORMAT";
+  args += "--WARNFORMAT";
+  args += "--MSGFORMAT";
+  args += "--CHIP=%DEVICE";
+  args += "--IDE=mplab";
+  args += "-Q"; // suppress copyright message
+  return args;
+}
+
+void PICC::Process::logStderrLine(const QString &line)
+{
+  // #### TODO
+  doLog(Log::LineType::Normal, line, QString::null, 0);
+}
+
+//-----------------------------------------------------------------------------
+QStringList PICC::CompileStandaloneFile::genericArguments(const Compile::Config &config) const
+{
+  QStringList args = Process::genericArguments(config);
+  args += "-M%MAP";
+  args += "-G%SYM";
+  args += "--ASMLIST";
+  args += config.includeDirs(Tool::Category::Compiler, "-I");
+  args += config.customOptions(Tool::Category::Compiler);
+  args += "%I";
+  return args;
+}
+
+QString PICC::CompileStandaloneFile::outputFiles() const
+{
+  return "PURL::Lst PURL::Map obj PURL::Hex PURL::Coff sym sdb hxl rlf";
+}
+
+//-----------------------------------------------------------------------------
+QStringList PICC::CompileProjectFile::genericArguments(const Compile::Config &config) const
+{
+  QStringList args = Process::genericArguments(config);
+  args += "-S";
+  args += config.includeDirs(Tool::Category::Compiler, "-I");
+  args += config.customOptions(Tool::Category::Compiler);
+  args += "%I";
+  return args;
+}
+
+QString PICC::CompileProjectFile::outputFiles() const
+{
+  return "PURL::AsmPICC";
+}
+
+//-----------------------------------------------------------------------------
+QStringList PICC::AssembleStandaloneFile::genericArguments(const Compile::Config &config) const
+{
+  QStringList args = Process::genericArguments(config);
+  args += "-M%MAP";
+  args += "-G%SYM";
+  args += "--ASMLIST";
+  args += config.includeDirs(Tool::Category::Assembler, "-I");
+  args += config.customOptions(Tool::Category::Assembler);
+  args += "%I";
+  return args;
+}
+
+QString PICC::AssembleStandaloneFile::outputFiles() const
+{
+  return "PURL::Lst PURL::Map obj PURL::Hex sym sdb hxl rlf";
+}
+
+//-----------------------------------------------------------------------------
+QStringList PICC::AssembleProjectFile::genericArguments(const Compile::Config &config) const
+{
+  QStringList args = Process::genericArguments(config);
+  args += "-C";
+  args += "--ASMLIST";
+  args += config.includeDirs(Tool::Category::Assembler, "-I");
+  args += config.customOptions(Tool::Category::Assembler);
+  args += "%I";
+  return args;
+}
+
+QString PICC::AssembleProjectFile::outputFiles() const
+{
+  return "obj PURL::Lst rlf";
+}
+
+//-----------------------------------------------------------------------------
+QStringList PICC::LinkProject::genericArguments(const Compile::Config &config) const
+{
+  QStringList args = Process::genericArguments(config);
+  args += "-O%O";
+  args += "-M%MAP";
+  args += "-G%SYM";
+  if ( _data.linkType==Compile::Icd2Linking ) args += "--DEBUGGER=icd2";
+  args += config.customOptions(Tool::Category::Linker);
+  args += "%OBJS";
+  args += "%LIBS";
+  args += config.customLibraries(Tool::Category::Linker);
+  return args;
+}
+
+QString PICC::LinkProject::outputFiles() const
+{
+  return "PURL::Map PURL::Hex PURL::Coff sym sdb hxl";
+}
+
+//-----------------------------------------------------------------------------
+QStringList PICC::LibraryProject::genericArguments(const Compile::Config &config) const
+{
+  QStringList args;
+  args += config.customOptions(Tool::Category::Librarian);
+  args += "r";
+  args += "%O";
+  args += "%OBJS";
+  args += "%LIBS";
+  return args;
+}
+
+QString PICC::LibraryProject::outputFiles() const
+{
+  return "PURL::Library";
+}
diff --git a/src/tools/picc/picc_compile.h b/src/tools/picc/picc_compile.h
new file mode 100644
index 0000000..6db92ca
--- /dev/null
+++ b/src/tools/picc/picc_compile.h
@@ -0,0 +1,83 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICC_COMPILE_H
+#define PICC_COMPILE_H
+
+#include "tools/list/compile_process.h"
+
+namespace PICC
+{
+//-----------------------------------------------------------------------------
+class Process : public Compile::Process
+{
+Q_OBJECT
+protected:
+  virtual QString deviceName() const { return _data.device; }
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+  virtual void logStderrLine(const QString &line);
+  virtual QString objectExtension() const { return "obj"; }
+};
+
+//-----------------------------------------------------------------------------
+class CompileStandaloneFile : public Process
+{
+Q_OBJECT
+protected:
+  virtual QString outputFiles() const;
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+};
+
+//-----------------------------------------------------------------------------
+class CompileProjectFile : public Process
+{
+Q_OBJECT
+protected:
+  virtual QString outputFiles() const;
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+};
+
+//-----------------------------------------------------------------------------
+class AssembleStandaloneFile : public Process
+{
+Q_OBJECT
+protected:
+  virtual QString outputFiles() const;
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+};
+
+//-----------------------------------------------------------------------------
+class AssembleProjectFile : public Process
+{
+Q_OBJECT
+protected:
+  virtual QString outputFiles() const;
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+};
+
+//-----------------------------------------------------------------------------
+class LinkProject : public Process
+{
+Q_OBJECT
+protected:
+  virtual QString outputFiles() const;
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+};
+
+//-----------------------------------------------------------------------------
+class LibraryProject : public Process
+{
+Q_OBJECT
+protected:
+  virtual QString outputFiles() const;
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/picc/picc_config.cpp b/src/tools/picc/picc_config.cpp
new file mode 100644
index 0000000..3404bb5
--- /dev/null
+++ b/src/tools/picc/picc_config.cpp
@@ -0,0 +1,9 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "picc_config.h"
diff --git a/src/tools/picc/picc_config.h b/src/tools/picc/picc_config.h
new file mode 100644
index 0000000..c78f186
--- /dev/null
+++ b/src/tools/picc/picc_config.h
@@ -0,0 +1,25 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PICC_CONFIG_H
+#define PICC_CONFIG_H
+
+#include "tools/list/compile_config.h"
+
+namespace PICC
+{
+//----------------------------------------------------------------------------
+class Config : public Compile::Config
+{
+public:
+  Config(Project *project) : Compile::Config(project) {}
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/sdcc/Makefile.am b/src/tools/sdcc/Makefile.am
new file mode 100644
index 0000000..d5fa9da
--- /dev/null
+++ b/src/tools/sdcc/Makefile.am
@@ -0,0 +1,9 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libsdcc.la
+libsdcc_la_LDFLAGS = $(all_libraries)
+libsdcc_la_SOURCES = sdcc_compile.cpp sdcc_config.cpp sdcc.cpp \
+	sdcc_generator.cpp
+
+SUBDIRS = gui
diff --git a/src/tools/sdcc/gui/Makefile.am b/src/tools/sdcc/gui/Makefile.am
new file mode 100644
index 0000000..35ee59a
--- /dev/null
+++ b/src/tools/sdcc/gui/Makefile.am
@@ -0,0 +1,6 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+noinst_LTLIBRARIES = libsdccui.la
+libsdccui_la_LDFLAGS = $(all_libraries)
+libsdccui_la_SOURCES = sdcc_ui.cpp
\ No newline at end of file
diff --git a/src/tools/sdcc/gui/sdcc_ui.cpp b/src/tools/sdcc/gui/sdcc_ui.cpp
new file mode 100644
index 0000000..bc14f78
--- /dev/null
+++ b/src/tools/sdcc/gui/sdcc_ui.cpp
@@ -0,0 +1,29 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "sdcc_ui.h"
+
+#include "tools/gputils/gui/gputils_ui.h"
+
+//----------------------------------------------------------------------------
+SDCC::ConfigWidget::ConfigWidget(Project *project)
+  : ToolConfigWidget(project)
+{}
+
+void SDCC::ConfigWidget::initEntries()
+{
+  if ( _category==Tool::Category::Linker ) createHexFormatEntry();
+  createIncludeDirectoriesEntry();
+}
+
+//----------------------------------------------------------------------------
+ToolConfigWidget *SDCC::GroupUI::configWidgetFactory(Tool::Category category, Project *project) const
+{
+  if ( category==Tool::Category::Librarian ) return new GPUtils::ConfigWidget(project);
+  return new ConfigWidget(project);
+}
diff --git a/src/tools/sdcc/gui/sdcc_ui.h b/src/tools/sdcc/gui/sdcc_ui.h
new file mode 100644
index 0000000..a0f0ffc
--- /dev/null
+++ b/src/tools/sdcc/gui/sdcc_ui.h
@@ -0,0 +1,35 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef SDCC_UI_H
+#define SDCC_UI_H
+
+#include "tools/gui/tool_config_widget.h"
+#include "tools/gui/tool_group_ui.h"
+
+namespace SDCC
+{
+//----------------------------------------------------------------------------
+class ConfigWidget : public ToolConfigWidget
+{
+Q_OBJECT
+public:
+  ConfigWidget(Project *project);
+  virtual void initEntries();
+};
+
+//----------------------------------------------------------------------------
+class GroupUI : public Tool::GroupUI
+{
+public:
+  virtual ToolConfigWidget *configWidgetFactory(Tool::Category category, ::Project *project) const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/sdcc/sdcc.cpp b/src/tools/sdcc/sdcc.cpp
new file mode 100644
index 0000000..ba86273
--- /dev/null
+++ b/src/tools/sdcc/sdcc.cpp
@@ -0,0 +1,115 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "sdcc.h"
+
+#include "devices/list/device_list.h"
+#include "sdcc_compile.h"
+#include "sdcc_config.h"
+#include "devices/pic/pic/pic_memory.h"
+#include "common/global/pfile.h"
+#include "common/global/process.h"
+#include "sdcc_generator.h"
+
+//----------------------------------------------------------------------------
+bool SDCC::Base::checkExecutableResult(bool, QStringList &lines) const
+{
+  return ( lines.count()>0 && lines[0].startsWith("SDCC") );
+}
+
+//----------------------------------------------------------------------------
+QString SDCC::Group::informationText() const
+{
+  return i18n("The <a href=\"%1\">Small Devices C Compiler</a> is an open-source C compiler for several families of microcontrollers.").arg("http://sdcc.sourceforge.net");
+}
+
+const ::Tool::Base *SDCC::Group::base(Tool::Category category) const
+{
+  if ( category==Tool::Category::Assembler || category==Tool::Category::Librarian )
+    return Tool::lister().group("gputils")->base(category);
+  return Tool::Group::base(category);
+}
+
+Tool::Group::BaseData SDCC::Group::baseFactory(Tool::Category category) const
+{
+  if ( category==Tool::Category::Compiler ) return BaseData(new ::SDCC::Base, Both);
+  if ( category==Tool::Category::Linker)    return BaseData(new ::SDCC::Base, ProjectOnly);
+  return BaseData();
+}
+
+SDCC::Group::Group()
+  : _checkDevicesTmp(_sview, ".c")
+{
+  // used to obtain device list
+  if ( _checkDevicesTmp.openForWrite() ) _checkDevicesTmp.appendText("void main(void) {}\n");
+  _checkDevicesTmp.close();
+}
+
+QStringList SDCC::Group::checkDevicesOptions(uint i) const
+{
+  QStringList options;
+  options += QString("-m") + SDCC::FAMILY_DATA[i].name;
+  options += "-phelp";
+  options += _checkDevicesTmp.url().filepath();
+  return options;
+}
+
+PURL::Directory SDCC::Group::autodetectDirectory(Compile::DirectoryType type, const PURL::Directory &dir, bool withWine) const
+{
+  return Tool::lister().group("gputils")->autodetectDirectory(type, dir, withWine);
+}
+
+bool SDCC::Group::needs(bool withProject, Tool::Category category) const
+{
+  if ( category==Tool::Category::Assembler || category==Tool::Category::Librarian ) return Tool::lister().group("gputils")->needs(withProject, category);
+  return Tool::Group::needs(withProject, category);
+}
+
+Compile::Process *SDCC::Group::processFactory(const Compile::Data &data) const
+{
+  switch (data.category.type()) {
+    case Tool::Category::Assembler:
+    case Tool::Category::Librarian:
+      return Tool::lister().group("gputils")->processFactory(data);
+    case Tool::Category::Compiler:
+      if (data.project) return new SDCC::CompileProjectFile;
+      return new SDCC::CompileStandaloneFile;
+    case Tool::Category::Linker:
+      return new SDCC::LinkProjectFile;
+    default: break;
+  }
+  return 0;
+}
+
+Compile::Config *SDCC::Group::configFactory(::Project *project) const
+{
+  return new Config(project);
+}
+
+PURL::FileType SDCC::Group::implementationType(PURL::ToolType type) const
+{
+  if ( type==PURL::ToolType::Assembler ) return PURL::AsmGPAsm;
+  if ( type==PURL::ToolType::Compiler ) return PURL::CSource;
+  return PURL::Nb_FileTypes;
+}
+
+Tool::SourceGenerator *SDCC::Group::sourceGeneratorFactory() const
+{
+  return new SourceGenerator;
+}
+
+bool SDCC::Group::generateDebugInformation(const QString &device) const
+{
+  switch (family(device)) {
+    case P14: return false;
+    case P16: return true;
+    case Nb_Families: break;
+  }
+  Q_ASSERT(false);
+  return false;
+}
diff --git a/src/tools/sdcc/sdcc.h b/src/tools/sdcc/sdcc.h
new file mode 100644
index 0000000..3155273
--- /dev/null
+++ b/src/tools/sdcc/sdcc.h
@@ -0,0 +1,63 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef SDCC_H
+#define SDCC_H
+
+#include "tools/list/tool_list.h"
+#include "common/gui/pfile_ext.h"
+#include "sdcc_generator.h"
+
+namespace SDCC
+{
+//----------------------------------------------------------------------------
+class Base : public Tool::Base
+{
+public:
+  virtual QString baseExecutable(bool, Tool::OutputExecutableType) const { return "sdcc"; }
+
+private:
+  virtual QStringList checkExecutableOptions(bool) const { return "-v"; }
+  virtual bool checkExecutableResult(bool withWine, QStringList &lines) const;
+};
+
+//----------------------------------------------------------------------------
+class Group : public Tool::Group
+{
+public:
+  Group();
+  virtual QString name() const { return "sdcc"; }
+  virtual QString label() const { return i18n("Small Device C Compiler"); }
+  virtual QString informationText() const;
+  virtual const ::Tool::Base *base(Tool::Category category) const;
+  virtual uint nbCheckDevices() const { return SDCC::Nb_Families; }
+  virtual bool hasDirectory(Compile::DirectoryType type) const { return type==Compile::DirectoryType::Header || type==Compile::DirectoryType::LinkerScript; }
+  virtual PURL::FileType linkerScriptType() const { return PURL::Lkr; }
+  virtual PURL::Url linkerScript(const ::Project *project, Compile::LinkType type) const { return Tool::lister().group("gputils")->linkerScript(project, type); }
+  virtual PURL::Directory autodetectDirectory(Compile::DirectoryType type, const PURL::Directory &execDir, bool withWine) const;
+  virtual Tool::ExecutableType preferedExecutableType() const { return Tool::ExecutableType::Unix; }
+  virtual Tool::CompileType compileType() const { return Tool::SeparateFiles; }
+  virtual Tool::Category checkDevicesCategory() const { return Tool::Category::Compiler; }
+  virtual QStringList checkDevicesOptions(uint i) const;
+  virtual bool needs(bool withProject, Tool::Category category) const;
+  virtual PURL::FileType implementationType(PURL::ToolType type) const;
+  virtual bool generateDebugInformation(const QString &device) const;
+
+private:
+  Log::StringView _sview;
+  PURL::TempFile  _checkDevicesTmp;
+  virtual BaseData baseFactory(Tool::Category category) const;
+  virtual QValueList<const Device::Data *> getSupportedDevices(const QString &s) const { return SDCC::getSupportedDevices(s); }
+  virtual Compile::Process *processFactory(const Compile::Data &data) const;
+  virtual Compile::Config *configFactory(::Project *project) const;
+  virtual Tool::SourceGenerator *sourceGeneratorFactory() const;
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/sdcc/sdcc_compile.cpp b/src/tools/sdcc/sdcc_compile.cpp
new file mode 100644
index 0000000..a3c072f
--- /dev/null
+++ b/src/tools/sdcc/sdcc_compile.cpp
@@ -0,0 +1,103 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "sdcc_compile.h"
+
+#include "sdcc.h"
+#include "sdcc_config.h"
+#include "tools/list/tool_list.h"
+#include "sdcc_generator.h"
+
+//-----------------------------------------------------------------------------
+QString SDCC::Process::familyName() const
+{
+  return FAMILY_DATA[family(_data.device)].name;
+}
+
+QString SDCC::Process::deviceName() const
+{
+  return toDeviceName(_data.device);
+}
+
+QStringList SDCC::Process::genericArguments(const Compile::Config &) const
+{
+  QStringList args;
+  args += "-m%FAMILY";
+  args += "-%DEVICE";
+  args += "-V"; // verbose
+  args += "--debug";
+  return args;
+}
+
+QString SDCC::Process::outputFiles() const
+{
+  return "PURL::Object PURL::AsmGPAsm adb p d PURL::Lst";
+}
+
+void SDCC::Process::logStderrLine(const QString &line)
+{
+  if ( parseErrorLine(line, Compile::ParseErrorData("([^:]*):([0-9]+):(error|warning|message):(.+)", 1, 2, 4, 3)) ) return;
+  if ( parseErrorLine(line, Compile::ParseErrorData("([^:]*):([0-9]+):(\\w+)\\s*\\[[0-9]+\\](.+)", 1, 2, 4, 3)) ) return;
+  if ( parseErrorLine(line, Compile::ParseErrorData("([^:]*)\\s*[0-9]+:(.+)", -1, -1, 2, 1, Log::LineType::Warning)) ) return;
+  if ( parseErrorLine(line, Compile::ParseErrorData("([^:]*):([0-9]+):(.+)", 1, 2, 3, Log::LineType::Warning)) ) return;
+  if ( parseErrorLine(line, Compile::ParseErrorData("([^:]*):([^:]+):([0-9]+):(.+)", 2, 3, 4, Log::LineType::Warning)) ) return;
+  if ( parseErrorLine(line, Compile::ParseErrorData("([^:]+):(.+)", -1, -1, 2, 1, Log::LineType::Warning)) ) return;
+  doLog(filterType(line), line, QString::null, 0);
+}
+
+//-----------------------------------------------------------------------------
+QStringList SDCC::CompileStandaloneFile::genericArguments(const Compile::Config &config) const
+{
+  QStringList args = Process::genericArguments(config);
+  args += config.includeDirs(Tool::Category::Compiler, "-I");
+  args += config.customOptions(Tool::Category::Compiler);
+  args += "-Wl-o%O";
+  args += "-Wl-m"; // output map file
+  HexBuffer::Format format = config.hexFormat();
+  if( format!=HexBuffer::Nb_Formats )
+    args += QString("-Wl-a") + HexBuffer::FORMATS[format];
+  args += "%I";
+  return args;
+}
+
+QString SDCC::CompileStandaloneFile::outputFiles() const
+{
+  return Process::outputFiles() + " PURL::Map PURL::Hex PURL::Cod rst sym mem lnk";
+}
+
+//-----------------------------------------------------------------------------
+QStringList SDCC::CompileProjectFile::genericArguments(const Compile::Config &config) const
+{
+  QStringList args = Process::genericArguments(config);
+  args += config.includeDirs(Tool::Category::Compiler, "-I");
+  args += config.customOptions(Tool::Category::Compiler);
+  args += "-c"; // compile only
+  args += "%I";
+  return args;
+}
+
+//-----------------------------------------------------------------------------
+QStringList SDCC::LinkProjectFile::genericArguments(const Compile::Config &config) const
+{
+  QStringList args = Process::genericArguments(config);
+  args += "-Wl-c"; // create coff file
+  args += "-Wl-m"; // output map file
+  args += "$LKR(-Wl-s%LKR)";
+  args += config.includeDirs(Tool::Category::Linker, "-I");
+  args += config.customOptions(Tool::Category::Linker);
+  args += "-o%O";
+  args += "%OBJS";
+  args += "%LIBS";
+  args += config.customLibraries(Tool::Category::Linker);
+  return args;
+}
+
+QString SDCC::LinkProjectFile::outputFiles() const
+{
+  return Process::outputFiles() + " PURL::Lkr PURL::Hex PURL::Cod PURL::Coff PURL::Map";
+}
diff --git a/src/tools/sdcc/sdcc_compile.h b/src/tools/sdcc/sdcc_compile.h
new file mode 100644
index 0000000..8ba4c30
--- /dev/null
+++ b/src/tools/sdcc/sdcc_compile.h
@@ -0,0 +1,58 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef SDCC_COMPILE_H
+#define SDCC_COMPILE_H
+
+#include "tools/list/compile_process.h"
+
+namespace SDCC
+{
+//-----------------------------------------------------------------------------
+class Process : public Compile::Process
+{
+Q_OBJECT
+protected:
+  virtual QString deviceName() const;
+  virtual QString familyName() const;
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+  virtual QString outputFiles() const;
+  virtual void logStderrLine(const QString &line);
+  virtual bool hasLinkerScript() const { return ( _data.linkType==Compile::Icd2Linking || Main::toolGroup().hasCustomLinkerScript(_data.project) ); }
+};
+
+//-----------------------------------------------------------------------------
+class CompileStandaloneFile : public Process
+{
+Q_OBJECT
+private:
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+  virtual QString outputFiles() const;
+};
+
+//-----------------------------------------------------------------------------
+class CompileProjectFile : public Process
+{
+Q_OBJECT
+private:
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+};
+
+//-----------------------------------------------------------------------------
+class LinkProjectFile : public Process
+{
+Q_OBJECT
+private:
+  virtual QStringList genericArguments(const Compile::Config &config) const;
+  virtual QString outputFiles() const;
+  virtual QString objectExtension() const { return "o"; }
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/sdcc/sdcc_config.cpp b/src/tools/sdcc/sdcc_config.cpp
new file mode 100644
index 0000000..5b44673
--- /dev/null
+++ b/src/tools/sdcc/sdcc_config.cpp
@@ -0,0 +1,9 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "sdcc_config.h"
diff --git a/src/tools/sdcc/sdcc_config.h b/src/tools/sdcc/sdcc_config.h
new file mode 100644
index 0000000..c4bafdd
--- /dev/null
+++ b/src/tools/sdcc/sdcc_config.h
@@ -0,0 +1,25 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef SDCC_CONFIG_H
+#define SDCC_CONFIG_H
+
+#include "tools/gputils/gputils_config.h"
+
+namespace SDCC
+{
+//----------------------------------------------------------------------------
+class Config : public GPUtils::Config
+{
+public:
+  Config(Project *project) : GPUtils::Config(project) {}
+};
+
+} // namespace
+
+#endif
diff --git a/src/tools/sdcc/sdcc_generator.cpp b/src/tools/sdcc/sdcc_generator.cpp
new file mode 100644
index 0000000..fb57ab6
--- /dev/null
+++ b/src/tools/sdcc/sdcc_generator.cpp
@@ -0,0 +1,117 @@
+/***************************************************************************
+ *   Copyright (C) 2006-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "sdcc_generator.h"
+
+#include "devices/pic/pic/pic_memory.h"
+#include "devices/list/device_list.h"
+#include "tools/gputils/gputils.h"
+
+//----------------------------------------------------------------------------
+const SDCC::FamilyData SDCC::FAMILY_DATA[Nb_Families] = {
+  { "pic14" },
+  { "pic16" }
+};
+
+SDCC::Family SDCC::family(const QString &device)
+{
+  const Device::Data *data = Device::lister().data(device);
+  switch (static_cast<const Pic::Data *>(data)->architecture().type()) {
+    case Pic::Architecture::P10X:
+    case Pic::Architecture::P16X: return P14;
+    case Pic::Architecture::P17C:
+    case Pic::Architecture::P18C:
+    case Pic::Architecture::P18F:
+    case Pic::Architecture::P18J: return P16;
+    case Pic::Architecture::P24F:
+    case Pic::Architecture::P24H:
+    case Pic::Architecture::P30F:
+    case Pic::Architecture::P33F:
+    case Pic::Architecture::Nb_Types: break;
+  }
+  Q_ASSERT(false);
+  return Nb_Families;
+}
+
+QString SDCC::toDeviceName(const QString &device)
+{
+  return GPUtils::toDeviceName(device);
+}
+
+QValueList<const Device::Data *> SDCC::getSupportedDevices(const QString &s)
+{
+  return GPUtils::getSupportedDevices(s);
+}
+
+SourceLine::List SDCC::SourceGenerator::configLines(PURL::ToolType type, const Device::Memory &memory, bool &ok) const
+{
+  if ( type==PURL::ToolType::Assembler ) {
+    GPUtils::SourceGenerator generator;
+    return generator.configLines(type, memory, ok);
+  }
+  const Pic::Memory &pmemory = static_cast<const Pic::Memory &>(memory);
+  const Pic::Data &data = pmemory.device();
+  const Pic::Config &config = data.config();
+  SourceLine::List lines;
+  if ( !data.is18Family() ) lines.appendNotIndentedCode("typedef unsigned int word;");
+  Address address = data.range(Pic::MemoryRangeType::Config).start;
+  QString prefix = (data.nbWords(Pic::MemoryRangeType::Config)==2 || data.name().startsWith("16F9") ? "_" : "__");
+  for (uint i=0; i<data.nbWords(Pic::MemoryRangeType::Config); i++) {
+    const Pic::Config::Word &cword = config._words[i];
+    QStringList cnames = SourceLine::configNames(Pic::ConfigNameType::SDCC, pmemory, i, ok);
+    if ( cnames.isEmpty() ) continue;
+    QString code;
+    if ( data.is18Family() ) code += "code char at ";
+    else code += "word at ";
+    if ( cword.name.isEmpty() ) code += toHexLabel(address, data.nbCharsAddress()) + " CONFIG";
+    else code += prefix + cword.name + " " + cword.name;
+    code += " = " + cnames.join(" & ") + ";";
+    lines.appendNotIndentedCode(code);
+    address += data.addressIncrement(Pic::MemoryRangeType::Config);
+  }
+  return lines;
+}
+
+//----------------------------------------------------------------------------
+SourceLine::List SDCC::SourceGenerator::includeLines(PURL::ToolType type, const Device::Data &data) const
+{
+  if ( type==PURL::ToolType::Assembler ) {
+    GPUtils::SourceGenerator generator;
+    return generator.includeLines(type, data);
+  }
+  SourceLine::List lines;
+  lines.appendNotIndentedCode("#include <pic" + data.name().lower() + ".h>");
+  return lines;
+}
+
+SourceLine::List SDCC::SourceGenerator::sourceFileContent(PURL::ToolType type, const Device::Data &data, bool &ok) const
+{
+  if ( type==PURL::ToolType::Assembler ) {
+    GPUtils::SourceGenerator generator;
+    return generator.sourceFileContent(type, data, ok);
+  }
+  SourceLine::List lines;
+  switch (static_cast<const Pic::Data &>(data).architecture().type()) {
+    case Pic::Architecture::P16X:
+      lines.appendNotIndentedCode("void isr() interrupt 0 {", i18n("interrupt service routine"));
+      lines.appendIndentedCode(QString::null, "<< " + i18n("insert interrupt code") + " >>");
+      lines.appendNotIndentedCode("}");
+      lines.appendEmpty();
+      break;
+    case Pic::Architecture::P18C:
+    case Pic::Architecture::P18F:
+    case Pic::Architecture::P18J:
+      // #### TODO: template interrupt code
+      break;
+    default: Q_ASSERT(false); break;
+  }
+  lines.appendNotIndentedCode("void main() {");
+  lines.appendIndentedCode(QString::null, "<< " + i18n("insert code") + " >>");
+  lines.appendNotIndentedCode("}");
+  return lines;
+}
diff --git a/src/tools/sdcc/sdcc_generator.h b/src/tools/sdcc/sdcc_generator.h
new file mode 100644
index 0000000..e5f0101
--- /dev/null
+++ b/src/tools/sdcc/sdcc_generator.h
@@ -0,0 +1,45 @@
+/***************************************************************************
+ *   Copyright (C) 2006-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef SDCC_GENERATOR_H
+#define SDCC_GENERATOR_H
+
+#include "coff/base/disassembler.h"
+
+namespace SDCC
+{
+//----------------------------------------------------------------------------
+enum Family { P14 = 0, P16, Nb_Families };
+struct FamilyData {
+  const char *name;
+};
+extern const FamilyData FAMILY_DATA[Nb_Families];
+extern Family family(const QString &device);
+extern QString toDeviceName(const QString &device);
+extern QValueList<const Device::Data *> getSupportedDevices(const QString &s);
+
+//----------------------------------------------------------------------------
+class SourceGenerator : public Tool::SourceGenerator
+{
+public:
+  virtual SourceLine::List configLines(PURL::ToolType type, const Device::Memory &memory, bool &ok) const;
+  virtual SourceLine::List sourceFileContent(PURL::ToolType type, const Device::Data &data, bool &ok) const;
+  virtual SourceLine::List includeLines(PURL::ToolType type, const Device::Data &data) const;
+
+private:
+  struct P16CNameData {
+    const char *cname, *sdccName;
+  };
+  static const P16CNameData P16_CNAME_DATA[];
+  static void transformCName(QString &cname, const Pic::Data &data);
+
+};
+
+} // namespace
+
+#endif
diff --git a/src/xml_to_data/Makefile.am b/src/xml_to_data/Makefile.am
new file mode 100644
index 0000000..66985ca
--- /dev/null
+++ b/src/xml_to_data/Makefile.am
@@ -0,0 +1,7 @@
+INCLUDES = -I$(top_srcdir)/src $(all_includes)
+METASOURCES = AUTO
+
+libxmltodata_la_LDFLAGS = $(all_libraries)
+noinst_LTLIBRARIES = libxmltodata.la
+libxmltodata_la_SOURCES = xml_to_data.cpp xml_to_data.cpp device_xml_to_data.cpp
+libxmltodata_la_LIBADD = $(LIB_QT)
diff --git a/src/xml_to_data/device_xml_to_data.cpp b/src/xml_to_data/device_xml_to_data.cpp
new file mode 100644
index 0000000..9ad1940
--- /dev/null
+++ b/src/xml_to_data/device_xml_to_data.cpp
@@ -0,0 +1,260 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "device_xml_to_data.h"
+
+#include <qdir.h>
+#include <qfile.h>
+#include <qtextstream.h>
+#include <qregexp.h>
+
+bool Device::XmlToDataBase::getFrequencyRange(OperatingCondition oc, Special special, QDomElement element)
+{
+  QDomElement range;
+  for (QDomNode child=element.firstChild(); !child.isNull(); child=child.nextSibling()) {
+    if ( child.nodeName()!="frequency_range" ) continue;
+    if ( !child.isElement() ) qFatal("\"frequency_range\" should be an element");
+    if ( child.toElement().attribute("name")!=oc.key() ) continue;
+    Special s = Special::fromKey(child.toElement().attribute("special"));
+    if ( s==Special::Nb_Types ) qFatal("Unrecognized special");
+    if ( special!=s ) continue;
+    if ( !range.isNull() ) qFatal("Duplicated \"frequency_range\"");
+    range = child.toElement();
+  }
+  if ( range.isNull() ) return false;
+  FrequencyRange frange;
+  frange.operatingCondition = oc;
+  frange.special = special;
+  for (QDomNode child=range.firstChild(); !child.isNull(); child=child.nextSibling()) {
+    if ( child.nodeName()=="frequency" ) {
+      if ( !child.isElement() ) qFatal("Frequency is not an element");
+      QDomElement frequency = child.toElement();
+      bool ok1, ok2, ok3, ok4;
+      RangeBox box;
+      box.start.x = frequency.attribute("start").toDouble(&ok1);
+      box.end.x = frequency.attribute("end").toDouble(&ok2);
+      box.start.yMin = frequency.attribute("vdd_min").toDouble(&ok3);
+      box.start.yMax = frequency.attribute("vdd_max").toDouble(&ok4);
+      box.end.yMax = box.start.yMax;
+      if ( !ok1 || !ok2 || !ok3 || !ok4
+           || box.start.x<0.0 || box.start.x>box.end.x
+           || box.start.yMin<0.0 || box.start.yMin>box.start.yMax )
+        qFatal("Malformed frequency element");
+      if ( frequency.attribute("vdd_min_end").isEmpty() ) box.end.yMin = box.start.yMin;
+      else {
+        box.end.yMin = frequency.attribute("vdd_min_end").toDouble(&ok1);
+        if ( !ok1 || box.end.yMin>box.end.yMax ) qFatal("Malformed frequency element");
+      }
+      box.mode = frequency.attribute("mode");
+      box.osc = frequency.attribute("osc");
+      box.special = frequency.attribute("special");
+      for (uint i=0; i<uint(frange.vdds.count()); i++)
+        if ( box.start.x<frange.vdds[i].end.x && box.end.x>frange.vdds[i].start.x ) {
+          if ( box.mode.isEmpty() && box.osc.isEmpty() && box.special.isEmpty() )
+            qFatal("Overlapping frequency ranges");
+          continue; // #### FIXME: ignore additionnal mode
+      }
+//      qDebug("add Freq Range: %s %s %f=[%f %f] %f=[%f %f]",
+//             Device::FrequencyRange::TYPE_LABELS[type], Device::FrequencyRange::SPECIAL_LABELS[type],
+//             box.start.x, box.start.yMin, box.start.yMax,
+//             box.end.x, box.end.yMin, box.end.yMax);
+      frange.vdds.append(box);
+   }
+  }
+  if ( frange.vdds.count()==0 ) qFatal("Empty frequency range");
+  _data->_frequencyRanges.append(frange);
+  return true;
+}
+
+bool Device::XmlToDataBase::getMemoryTechnology(QDomElement element)
+{
+  QString s = element.attribute("memory_technology");
+  _data->_memoryTechnology = MemoryTechnology::fromKey(s);
+  if ( _data->_memoryTechnology!=MemoryTechnology::Nb_Types ) return true;
+  if ( !s.isNull() ) qFatal("Unrecognized memory technology");
+  return false;
+}
+
+void Device::XmlToDataBase::processDevice(QDomElement device)
+{
+  QString name = device.attribute("name").upper();
+  if ( name.isEmpty() ) qFatal("Device has no name");
+  if ( _map.contains(name) ) qFatal(QString("Device \"%1\" already defined").arg(name));
+  _data = createData();
+  _map[name] = _data;
+  _data->_name = name;
+  _data->_alternatives = QStringList::split(' ', device.attribute("alternative"));
+  if ( _data->_alternatives.count() ) _alternatives[name] = _data->_alternatives;
+  _data->_status = Status::fromKey(device.attribute("status"));
+  switch (_data->_status.type()) {
+    case Status::Nb_Types:
+      qFatal("Unrecognized or absent device status");
+      break;
+    case Status::Future:
+      if ( _data->_alternatives.count() ) qFatal("Future device has alternative");
+      break;
+    case Status::NotRecommended:
+    case Status::Mature:
+      if ( _data->_alternatives.count()==0 ) warning("Not-recommended/mature device has no alternative");
+      break;
+    case Status::InProduction:
+    case Status::EOL:
+    case Status::Unknown: break;
+  }
+
+  // document
+  _data->_documents.webpage = device.attribute("document"); // ### REMOVE ME
+  QDomElement documents = findUniqueElement(device, "documents", QString::null, QString::null);
+  if ( documents.isNull() ) {
+    if ( _data->_documents.webpage.isEmpty() ) qFatal("Missing \"documents\" element");
+  } else {
+    if ( !_data->_documents.webpage.isEmpty() ) qFatal("document should be removed from root element");
+    _data->_documents.webpage = documents.attribute("webpage");
+    if ( _data->_documents.webpage.isEmpty() ) qFatal("Missing webpage");
+    _data->_documents.datasheet = documents.attribute("datasheet");
+    QRegExp rexp("\\d{5}");
+    if ( _data->_documents.datasheet=="?" ) warning("No datasheet specified");
+    if ( !rexp.exactMatch(_data->_documents.datasheet) ) qFatal(QString("Malformed datasheet \"%1\" (5 digits)").arg(_data->_documents.datasheet));
+    _data->_documents.progsheet = documents.attribute("progsheet");
+    if ( _data->_documents.progsheet=="?" ) warning("No progsheet specified");
+    if ( !rexp.exactMatch(_data->_documents.datasheet) ) qFatal(QString("Malformed progsheet \"%1\" (5 digits)").arg(_data->_documents.progsheet));
+    _data->_documents.erratas = QStringList::split(" ", documents.attribute("erratas"));
+    for (uint i=0; i<uint(_data->_documents.erratas.count()); i++) {
+      QString errata = _data->_documents.erratas[i];
+      if ( !rexp.exactMatch(errata) ) {
+        QRegExp rexp2("\\d{5}e\\d");
+        if ( !rexp2.exactMatch(errata) && !errata.startsWith("er") && errata.mid(2)!=_data->_name.lower() )
+          qFatal(QString("Malformed erratas \"%1\" (5 digits or 5 digits + e + 1 digit or \"er\" + name)").arg(errata));
+      }
+    }
+  }
+  if ( _data->_documents.webpage=="?" ) warning("No webpage specified");
+  else {
+    QRegExp rexp("\\d{6}");
+    if ( !rexp.exactMatch(_data->_documents.webpage) ) qFatal(QString("Malformed webpage \"%1\" (6 digits)").arg(_data->_documents.webpage));
+    if ( _documents.contains(_data->_documents.webpage) )
+      qFatal(QString("webpage duplicated (already used for %1)").arg(_documents[_data->_documents.webpage]));
+    _documents[_data->_documents.webpage] = name;
+  }
+
+  // frequency ranges
+  QStringList names;
+  bool ok = false;
+  FOR_EACH(OperatingCondition, oc) {
+    names += oc.key();
+    FOR_EACH(Special, special)
+      if ( getFrequencyRange(oc, special, device) && special==Special::Normal ) ok = true;
+  }
+  if ( !ok ) qWarning("No normal frequency range defined");
+  checkTagNames(device, "frequency_range", names);
+
+  // memory technology
+  if ( !getMemoryTechnology(device) ) qFatal("Memory technology not defined");
+
+  // packages
+  for (QDomNode child=device.firstChild(); !child.isNull(); child=child.nextSibling()) {
+    if ( !child.isElement() || child.nodeName()!="package" ) continue;
+    Package p = processPackage(child.toElement());
+    QMap<QString, uint> pinLabels;
+    for (uint i=0; i<uint(p.pins.count()); i++) {
+      if ( p.pins[i].isEmpty() || p.pins[i]=="N/C" ) continue;
+      QStringList labels = QStringList::split("/", p.pins[i]);
+      for(uint k=0; k<uint(labels.count()); k++) {
+        if ( pinLabels.contains(labels[k]) ) pinLabels[labels[k]]++;
+        else pinLabels[labels[k]] = 1;
+      }
+    }
+    for (uint k=0; k<uint(_data->_packages.count()); k++)
+      for (uint l=0; l<uint(p.types.count()); l++)
+        for (uint j=0; j<uint(_data->_packages[k].types.count()); j++)
+          if ( _data->_packages[k].types[j]==p.types[l] && _data->_packages[k].pins.count()==p.pins.count() ) qFatal("Duplicated package type");
+    if ( !pinLabels.isEmpty() ) checkPins(pinLabels);
+    _data->_packages.append(p);
+  }
+}
+
+Device::Package Device::XmlToDataBase::processPackage(QDomElement element)
+{
+  Package package;
+  // nb pins
+  bool ok;
+  uint nb = element.attribute("nb_pins").toUInt(&ok);
+  if ( !ok || nb==0 ) qFatal("Malformed \"nb_pins\"");
+  package.pins.resize(nb);
+  // types
+  QStringList types = QStringList::split(" ", element.attribute("types"));
+  if ( types.isEmpty() ) qFatal("No package types specified");
+  for (uint k=0; k<uint(types.count()); k++) {
+    uint i = 0;
+    for (; Package::TYPE_DATA[i].name; i++) {
+      if ( types[k]!=Package::TYPE_DATA[i].name ) continue;
+      for (uint j=0; j<uint(package.types.count()); j++)
+        if ( package.types[j]==i ) qFatal(QString("Duplicated package type %1").arg(types[k]));
+      uint j = 0;
+      for (; j<Package::MAX_NB; j++)
+        if ( nb==Package::TYPE_DATA[i].nbPins[j] ) break;
+      if ( j==Package::MAX_NB ) qFatal(QString("Package %1 does not have the correct number of pins %2 (%3)").arg(types[k]).arg(nb).arg(Package::TYPE_DATA[i].nbPins[0]));
+      package.types.append(i);
+      break;
+    }
+    if ( Package::TYPE_DATA[i].name==0 ) qFatal(QString("Unknown package type \"%1\"").arg(types[k]));
+  }
+  // pins
+  QString name = Package::TYPE_DATA[package.types[0]].name;
+  if ( name=="sot23" ) {
+    if ( package.types.count()!=1 ) qFatal("SOT23 should be a specific package");
+  } else if ( (nb%2)!=0 ) qFatal(QString("\"nb_pins\" should be even for package \"%1\"").arg(name));
+  uint have_pins = false;
+  QMemArray<bool> found(nb);
+  found.fill(false);
+  QDomNode child = element.firstChild();
+  while ( !child.isNull() ) {
+    if ( child.nodeName()=="pin" ) {
+      if ( !child.isElement() ) qFatal("\"pin\" is not an element");
+      QDomElement pin = child.toElement();
+      bool ok;
+      uint i = pin.attribute("index").toUInt(&ok);
+      if ( !ok || i==0 || i>nb ) qFatal("Malformed pin index");
+      if (found[i-1]) qFatal("Duplicated pin index");
+      found[i-1] = true;
+      QString name = pin.attribute("name");
+      if ( !name.isEmpty() && name!="N/C" ) {
+        QStringList labels = QStringList::split("/", name);
+        if ( name.contains(" ") || labels.count()==0 ) qFatal("Malformed pin name");
+        if ( name!=name.upper() ) qFatal("Pin name should be uppercase");
+      }
+      package.pins[i-1] = name;
+      have_pins = true;
+    }
+   child = child.nextSibling();
+  }
+  if ( !have_pins ) ;//warning("Pins not specified"); // #### REMOVE ME !!
+  else for (uint i=0; i<nb; i++) if ( !found[i] ) qFatal(QString("Pin #%1 not specified").arg(i+1));
+  return package;
+}
+
+void Device::XmlToDataBase::parse()
+{
+  // process device files
+  QStringList files = QDir::current().entryList("*.xml");
+  for (uint i=0; i<uint(files.count()); i++) {
+    _data = 0;
+    QDomDocument doc = parseFile(files[i]);
+    QDomElement root = doc.documentElement();
+    if ( root.nodeName()!="device" ) qFatal("root node should be \"device\"");
+    processDevice(root);
+  }
+
+  // check alternatives
+  QMap<QString, QStringList>::const_iterator ait = _alternatives.begin();
+  for (; ait!=_alternatives.end(); ++ait) {
+    QStringList::const_iterator lit = ait.data().begin();
+    for (; lit!=ait.data().end(); ++lit)
+      if ( !_map.contains(*lit) ) qFatal(QString("Unknown alternative %1 for device %2").arg((*lit)).arg(ait.key()));
+  }
+}
diff --git a/src/xml_to_data/device_xml_to_data.h b/src/xml_to_data/device_xml_to_data.h
new file mode 100644
index 0000000..a1d0529
--- /dev/null
+++ b/src/xml_to_data/device_xml_to_data.h
@@ -0,0 +1,88 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2007 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef DEVICE_XML_TO_DATA_H
+#define DEVICE_XML_TO_DATA_H
+
+#include <qmap.h>
+#include <qfile.h>
+#include <qtextstream.h>
+
+#include "common/common/misc.h"
+#include "common/common/streamer.h"
+#include "devices/base/generic_device.h"
+#include "xml_to_data.h"
+
+namespace Device
+{
+class XmlToDataBase : public ::XmlToData
+{
+public:
+  XmlToDataBase() : _data(0) {}
+
+protected:
+  mutable Data *_data;
+  QMap<QString, Data *> _map;          // device -> data
+
+  virtual void parse();
+  virtual QString currentDevice() const { return (_data ? _data->name() : QString::null); }
+  virtual QString namespaceName() const = 0;
+  virtual Data *createData() const = 0;
+  virtual void processDevice(QDomElement device);
+  virtual void checkPins(const QMap<QString, uint> &pinLabels) const = 0;
+
+private:
+  QMap<QString, QString>     _documents;    // document -> device
+  QMap<QString, QStringList> _alternatives; // device -> alternatives
+
+  bool getFrequencyRange(OperatingCondition oc, Special special, QDomElement element);
+  bool getMemoryTechnology(QDomElement element);
+  Device::Package processPackage(QDomElement element);
+};
+
+template <class DataType>
+class XmlToData : public XmlToDataBase, public DataStreamer<DataType>
+{
+public:
+  virtual Device::Data *createData() const { return new DataType; }
+  DataType *data() { return static_cast<DataType *>(_data); }
+  const DataType *data() const { return static_cast<DataType *>(_data); }
+  virtual void output() {
+    QFile dfile("deps.mak");
+    if ( !dfile.open(IO_WriteOnly) ) return;
+    QTextStream dts(&dfile);
+    dts << "noinst_DATA = ";
+    uint i = 0;
+    QMap<QString, Data *>::const_iterator it;
+    for (it=_map.begin(); it!=_map.end(); ++it) {
+      if ( (i%10)==0 ) dts << "\\" << endl << "    ";
+      dts << " " << it.key() << ".xml";
+      i++;
+    }
+    dts << endl;
+    dfile.close();
+
+    QFile file(namespaceName().lower() + "_data.cpp");
+    if ( !file.open(IO_WriteOnly) ) return;
+    QTextStream ts(&file);
+    ts << "#include \"devices/" << namespaceName().lower() << "/"
+       << namespaceName().lower() << "/" << namespaceName().lower() << "_group.h\"" << endl << endl;
+    ts << "const char *" << namespaceName() << "::DATA_STREAM =" << endl;
+    QValueList<DataType *> list;
+    for (it=_map.begin(); it!=_map.end(); ++it)
+      list.append(static_cast<const DataType *>(it.data()));
+    uint size = toCppString(list, ts);
+    ts << ";" << endl;
+    ts << "const uint " << namespaceName() << "::DATA_SIZE = " << size << ";" << endl;
+    file.close();
+  }
+};
+
+} // namespace
+
+#endif
diff --git a/src/xml_to_data/prog_xml_to_data.h b/src/xml_to_data/prog_xml_to_data.h
new file mode 100644
index 0000000..f4e820b
--- /dev/null
+++ b/src/xml_to_data/prog_xml_to_data.h
@@ -0,0 +1,218 @@
+/***************************************************************************
+ *   Copyright (C) 2006 Nicolas Hadacek <hadacek@kde.org>                  *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef PROG_XML_TO_DATA_H
+#define PROG_XML_TO_DATA_H
+
+#include <qfile.h>
+#include <qtextstream.h>
+#include <qmap.h>
+
+#include "xml_to_data.h"
+#include "devices/list/device_list.h"
+
+//----------------------------------------------------------------------------
+template <class Data>
+class ExtXmlToData : public ::XmlToData
+{
+public:
+  ExtXmlToData(const QString &basename, const QString &namespac)
+    : _basename(basename), _namespace(namespac) {}
+
+protected:
+  QString _basename, _namespace;
+  virtual bool hasFamilies() const { return true; }
+  const QStringList &families() const { return _families; }
+  virtual uint familyIndex(const QString &family) const { return _families.findIndex(family); }
+  virtual void parseData(QDomElement, Data &) = 0;
+  virtual void includes(QTextStream &) const {}
+  virtual void outputData(const Data &, QTextStream &) const {}
+  virtual void outputFunctions(QTextStream &) const {}
+  virtual QString currentDevice() const { return _current; }
+  virtual void parseDevice(QDomElement element);
+  ::Group::Support extractSupport(const QString &s) const;
+  bool hasDevice(const QString &device) const { return _map.contains(device); }
+  virtual void parse();
+
+protected:
+  QString _current;
+  class PData {
+  public:
+    uint family;
+    ::Group::Support support;
+    Data data;
+  };
+  QMap<QString, PData> _map;
+  QStringList         _families;
+
+  virtual void output();
+};
+
+template <class Data>
+Group::Support ExtXmlToData<Data>::extractSupport(const QString &s) const
+{
+  if ( s.isEmpty() ) return Group::Support::Untested;
+  Group::Support support = Group::Support::fromKey(s);
+  if ( support==Group::Support::None ) qFatal("Cannot be \"not supported\"");
+  if ( support==Group::Support::Nb_Types ) qFatal("Unknown support type");
+  return support;
+}
+
+template <class Data>
+void ExtXmlToData<Data>::parseDevice(QDomElement element)
+{
+  if ( element.nodeName()!="device" ) qFatal("Root node child should be named \"device\"");
+  _current = element.attribute("name").upper();
+  if ( Device::lister().data(_current)==0 ) qFatal(QString("Device name \"%1\" unknown").arg(_current));
+  if ( _map.contains(_current) ) qFatal(QString("Device \"%1\" already parsed").arg(_current));
+  PData data;
+  if ( hasFamilies() ) {
+    QString family = element.attribute("family");
+    if ( family.isEmpty() ) qFatal(QString("Family is empty").arg(family));
+    if ( _families.find(family)==_families.end() ) _families.append(family);
+    data.family = familyIndex(family);
+  }
+  data.support = extractSupport(element.attribute("support_type"));
+  parseData(element, data.data);
+  _map[_current] = data;
+}
+
+template <class Data>
+void ExtXmlToData<Data>::parse()
+{
+  QDomDocument doc = parseFile(_basename + ".xml");
+  QDomElement root = doc.documentElement();
+  if ( root.nodeName()!="type" ) qFatal("Root node should be \"type\"");
+  if ( root.attribute("name")!=_basename ) qFatal(QString("Root node name is not \"%1\"").arg(_basename));
+  QDomNode child = root.firstChild();
+  while ( !child.isNull() ) {
+    if ( child.isComment() ) qDebug("comment: %s", child.toComment().data().latin1());
+    else {
+      if ( !child.isElement() ) qFatal("Root node child should be an element");
+      parseDevice(child.toElement());
+    }
+    child = child.nextSibling();
+  }
+}
+
+template <class Data>
+void ExtXmlToData<Data>::output()
+{
+  // write .cpp file
+  QFile file(_basename + "_data.cpp");
+  if ( !file.open(IO_WriteOnly) ) qFatal(QString("Cannot open output file \"%1\"").arg(file.name()));
+  QTextStream s(&file);
+  s << "// #### Do not edit: this file is autogenerated !!!" << endl << endl;
+  s << "#include \"devices/list/device_list.h\"" << endl;
+  s << "#include \"" + _basename + ".h\"" << endl;
+  s << "#include \"" + _basename + "_data.h\"" << endl;
+  includes(s);
+  s << endl;
+  s << "namespace " << _namespace << endl;
+  s << "{" << endl;
+  s << "struct CData {" << endl;
+  s << "  const char *name;" << endl;
+  if ( hasFamilies() ) s << "  uint family;" << endl;
+  s << "  uint support;" << endl;
+  s << "  Data data;" << endl;
+  s << "};" << endl;
+  s << endl;
+
+  // data list
+  typename QMap<QString, PData>::const_iterator it = _map.begin();
+  for (; it!=_map.end(); ++it) {
+    s << "const CData PIC" << it.key() << "_DATA = {";
+    s << "  \"" << it.key() << "\", ";
+    if ( hasFamilies() ) s << it.data().family << ", ";
+    s << it.data().support.type() << ", ";
+    s << "{ ";
+    outputData(it.data().data, s);
+    s << " }";
+    s << " };" << endl;
+  }
+  s << endl;
+  s << "const CData *DATA_LIST[] = {" << endl;
+  uint i = 0;
+  it = _map.begin();
+  for (; it!=_map.end(); ++it) {
+    s << "&PIC" << it.key() << "_DATA,";
+    i++;
+    if ( (i%10)==0 ) s << endl;
+  }
+  s << "0 " << endl;
+  s << "};" << endl;
+
+  // functions
+  s << endl;
+  s << "const CData *cdata(const QString &device)" << endl;
+  s << "{" << endl;
+  s << "  for(uint i=0; DATA_LIST[i]; i++)" << endl;
+  s << "    if ( device==DATA_LIST[i]->name ) return DATA_LIST[i];" << endl;
+  s << "  return 0;" << endl;
+  s << "}" << endl;
+  s << "bool isSupported(const QString &device)" << endl;
+  s << "{" << endl;
+  s << "  return cdata(device);" << endl;
+  s << "}" << endl;
+  if ( hasFamilies() ) {
+    s << "uint family(const QString &device)" << endl;
+    s << "{" << endl;
+    s << "  return cdata(device)->family;" << endl;
+    s << "}" << endl;
+  }
+  s << "::Group::Support support(const QString &device)" << endl;
+  s << "{" << endl;
+  s << "  return ::Group::Support::Type(cdata(device)->support);" << endl;
+  s << "}" << endl;
+  s << "const Data &data(const QString &device)" << endl;
+  s << "{" << endl;
+  s << "  return cdata(device)->data;" << endl;
+  s << "}" << endl;
+  s << endl;
+  outputFunctions(s);
+  s << endl;
+  s << "}" << endl;
+}
+
+//----------------------------------------------------------------------------
+namespace Programmer
+{
+template <class Data>
+class XmlToData : public ExtXmlToData<Data>
+{
+public:
+  XmlToData(const QString &basename, const QString &namespac)
+    : ExtXmlToData<Data>(basename, namespac) {}
+
+protected:
+  virtual void outputFunctions(QTextStream &s) const;
+  virtual void includes(QTextStream &) const;
+};
+
+template <class Data>
+void Programmer::XmlToData<Data>::outputFunctions(QTextStream &s) const
+{
+  s << "void Group::initSupported()" << endl;
+  s << "{" << endl;
+  s << "  for (uint i=0; DATA_LIST[i]; i++) {" << endl;
+  s << "    const Device::Data *data = Device::lister().data(DATA_LIST[i]->name);" << endl;
+  s << "    addDevice(data->name(), data, ::Group::Support::Type(DATA_LIST[i]->support));" << endl;
+  s << "  }" << endl;
+  s << "}" << endl;
+  s << endl;
+}
+
+template <class Data>
+void Programmer::XmlToData<Data>::includes(QTextStream &s) const
+{
+  s << "#include \"" << ExtXmlToData<Data>::_basename << "_prog.h\"" << endl;
+}
+
+} // namespace
+
+#endif
diff --git a/src/xml_to_data/xml_to_data.cpp b/src/xml_to_data/xml_to_data.cpp
new file mode 100644
index 0000000..d31ded0
--- /dev/null
+++ b/src/xml_to_data/xml_to_data.cpp
@@ -0,0 +1,71 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#include "xml_to_data.h"
+
+#include <qfile.h>
+#include <qtextstream.h>
+
+QDomElement XmlToData::findUniqueElement(QDomElement parent, const QString &tag,
+                                         const QString &attribute, const QString &value) const
+{
+  QDomElement element;
+  QDomNode child = parent.firstChild();
+  while ( !child.isNull() ) {
+    if ( child.nodeName()==tag && child.isElement()
+         && (attribute.isEmpty() || child.toElement().attribute(attribute)==value) ) {
+      if ( !element.isNull() ) qFatal(QString("Duplicated element \"%1/%2\"").arg(tag).arg(value));
+      element = child.toElement();
+    }
+    child = child.nextSibling();
+  }
+  return element;
+}
+
+void XmlToData::checkTagNames(QDomElement element, const QString &tag,
+                              const QStringList &names) const
+{
+  QDomNodeList list = element.elementsByTagName(tag);
+  for (uint i=0; i<uint(list.count()); i++) {
+    if ( !list.item(i).isElement() ) continue;
+    QString name = list.item(i).toElement().attribute("name");
+    if ( names.find(name)==names.end() ) qFatal(QString("Illegal name %1 for %2 element").arg(name).arg(tag));
+  }
+}
+
+QDomDocument XmlToData::parseFile(const QString &filename) const
+{
+  qDebug("Parsing XML file \"%s\"...", filename.latin1());
+  QFile file(filename);
+  if ( !file.open(IO_ReadOnly) ) qFatal("Cannot open file!");
+  QDomDocument doc;
+  QString error;
+  int errorLine, errorColumn;
+  if ( !doc.setContent(&file, false, &error, &errorLine, &errorColumn) )
+    qFatal(QString("Error parsing XML file (%1 at line %2, column %3)").arg(error).arg(errorLine).arg(errorColumn));
+  return doc;
+}
+
+void XmlToData::warning(const QString &message) const
+{
+  if ( currentDevice().isEmpty() ) ::qWarning("Warning: %s", message.latin1());
+  else ::qWarning("Warning [%s]: %s", currentDevice().latin1(), message.latin1());
+}
+void XmlToData::qFatal(const QString &message) const
+{
+  if ( currentDevice().isEmpty() ) ::qFatal("Fatal: %s", message.latin1());
+  else ::qFatal("Fatal [%s]: %s", currentDevice().latin1(), message.latin1());
+}
+
+void XmlToData::process()
+{
+  parse();
+  qDebug("Parsing XML successful.");
+  output();
+  qDebug("Output written.");
+}
diff --git a/src/xml_to_data/xml_to_data.h b/src/xml_to_data/xml_to_data.h
new file mode 100644
index 0000000..bd7e166
--- /dev/null
+++ b/src/xml_to_data/xml_to_data.h
@@ -0,0 +1,47 @@
+/***************************************************************************
+ *   Copyright (C) 2005-2006 Nicolas Hadacek <hadacek@kde.org>             *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ ***************************************************************************/
+#ifndef XML_TO_DATA_H
+#define XML_TO_DATA_H
+
+#include "common/global/global.h"
+#if QT_VERSION<0x040000
+#  include <qdom.h>
+#else
+#  include <QtXml/QDomDocument>
+#endif
+#include <qstringlist.h>
+
+class XmlToData
+{
+public:
+  XmlToData() {}
+  virtual ~XmlToData() {}
+  void process();
+
+protected:
+  virtual void parse() = 0;
+  virtual void output() = 0;
+  virtual QString currentDevice() const = 0;
+  virtual void warning(const QString &message) const;
+  virtual void qFatal(const QString &message) const;
+  QDomElement findUniqueElement(QDomElement parent, const QString &nodeName,
+                                const QString &attribute, const QString &value) const;
+  void checkTagNames(QDomElement element, const QString &tag, const QStringList &names) const;
+  QDomDocument parseFile(const QString &filename) const;
+};
+
+#define XML_MAIN(_type) \
+  int main(int, char **) \
+  { \
+    _type dx; \
+    dx.process(); \
+    return 0; \
+  }
+
+#endif
diff --git a/src/xml_to_data/xml_to_data.pro b/src/xml_to_data/xml_to_data.pro
new file mode 100644
index 0000000..0f6e151
--- /dev/null
+++ b/src/xml_to_data/xml_to_data.pro
@@ -0,0 +1,6 @@
+STOPDIR = ../..
+include($${STOPDIR}/lib.pro)
+
+TARGET   = xmltodata
+HEADERS += xml_to_data.h device_xml_to_data.h prog_xml_to_data.h
+SOURCES += xml_to_data.cpp device_xml_to_data.cpp
diff --git a/stamp-h.in b/stamp-h.in
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/stamp-h.in
diff --git a/subdirs b/subdirs
new file mode 100644
index 0000000..b668b73
--- /dev/null
+++ b/subdirs
@@ -0,0 +1,4 @@
+doc
+man
+po
+src
diff --git a/test/boost/interrupt.cpp b/test/boost/interrupt.cpp
new file mode 100644
index 0000000..a5c8963
--- /dev/null
+++ b/test/boost/interrupt.cpp
@@ -0,0 +1,80 @@
+/*
+  Basic sample for BoostC++ compiler.
+  Use the 'Led Block' plugin to see
+  changing value on port B.
+*/
+#include <system.h>
+
+// Set configuration word (sample only, ajust for your particular case)
+#ifdef _PIC16
+	#pragma DATA 0x2007, _HS_OSC & _WDT_OFF
+#endif //_PIC16
+
+class CPort
+{
+public:	
+	CPort();
+	
+	void Toggle( void )
+	{
+#ifdef _PIC16
+		portb++;
+#else
+		latb++;
+#endif
+
+	}
+};
+
+CPort::CPort()
+{
+	trisb = 0;		//configure port B
+
+#ifdef _PIC16
+	portb = 0;		//clear port B
+#else
+	latb = 0;		//clear port B
+#endif
+}
+
+class CTimer
+{
+public:
+	CTimer();
+};
+
+CTimer::CTimer()
+{
+#ifdef _PIC16
+	option_reg = 7;	//set prescaler
+#else
+	// configure Timer0
+	set_bit( t0con, TMR0ON );	//enable timer
+	clear_bit( t0con, T08BIT );	//set 16-bit mode
+	clear_bit( t0con, T0CS );	// select internal clock
+	clear_bit( t0con, PSA ); 	// select prescaler
+	set_bit( t0con, T0PS0 );	// set 1:64 prescale ratio
+	clear_bit( t0con, T0PS1 );  
+	set_bit( t0con, T0PS2 );
+#endif
+	// enable interrupts
+	set_bit( intcon, T0IE ); //enable TMR0 overflow bit    
+}
+
+class CPort port; //configure port
+class CTimer timer; //configure prescaler
+			
+void interrupt( void )
+{
+	port.Toggle();
+
+	clear_bit( intcon, T0IF );  //clear TMR0 overflow flag
+}
+
+void main()
+{
+	// enable interrupts
+	set_bit( intcon, GIE );
+	
+	while( 1 ); //endless loop
+}
diff --git a/test/boost/interrupt.pic16.bas b/test/boost/interrupt.pic16.bas
new file mode 100644
index 0000000..370e582
--- /dev/null
+++ b/test/boost/interrupt.pic16.bas
@@ -0,0 +1,34 @@
+#include <basic\PIC16F877.bas>
+'
+'  Basic sample for BoostBasic compiler.
+'  Use the "Led Block" plugin to see
+'  changing value on port B.
+'
+
+' Set configuration word (sample only, ajust for your particular case)
+#pragma DATA _CONFIG, _HS_OSC & _WDT_OFF
+
+Sub interrupt()
+
+	portb = portb + 1
+
+	intcon = intcon & ~(1 << T0IF) 'clear TMR0 overflow flag
+	
+End Sub
+
+Sub main()
+
+	trisb = 0		'configure port B
+	portb = 0		'clear port B
+
+	option_reg = 7	'set prescaler
+
+	' enable interrupts
+	intcon = intcon | (1 << T0IE) 'enable TMR0 overflow bit    
+	intcon = intcon | (1 << GIE)  'set global interrupt bit
+	
+	' endless loop
+	Do while 1 
+	Loop
+	
+End Sub
diff --git a/test/boost/rand.piklab b/test/boost/rand.piklab
new file mode 100644
index 0000000..e1127c6
--- /dev/null
+++ b/test/boost/rand.piklab
@@ -0,0 +1,41 @@
+<!DOCTYPE piklab>
+<piklab>
+  <general>
+    <device>16F873</device>
+    <files>
+      <item>randtest.c</item>
+    </files>
+    <description/>
+    <version>0.1</version>
+    <tool>boostc16</tool>
+    <opened_files>
+      <item>randtest.c</item>
+    </opened_files>
+  </general>
+  <compiler>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_options/>
+    <custom_arguments>
+      <item>-t %DEVICE</item>
+      <item>-i</item>
+      <item>-I$(SRCPATH)</item>
+      <item>%I</item>
+    </custom_arguments>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+  </compiler>
+  <linker>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_options>rand.pic16.lib</custom_options>
+    <custom_arguments>
+      <item>-t %DEVICE</item>
+      <item>-p</item>
+      <item>rand</item>
+      <item>-ld</item>
+      <item>/home/nicolas/wine/Program Files/SourceBoost/Lib</item>
+      <item>rand.pic16.lib</item>
+      <item>%OBJS</item>
+    </custom_arguments>
+  </linker>
+</piklab>
diff --git a/test/boost/randtest.c b/test/boost/randtest.c
new file mode 100644
index 0000000..812dfd6
--- /dev/null
+++ b/test/boost/randtest.c
@@ -0,0 +1,48 @@
+/*
+  Random number generator sample for BoostC compiler.
+  Use the 'Led Block' plugin to see
+  changing random value on port B.
+*/
+	
+#include <system.h>
+#include <rand.h>
+
+#pragma CLOCK_FREQ 20000000
+
+// Set configuration word
+#ifdef _PIC16
+	#pragma DATA 0x2007, _HS_OSC & _WDT_OFF
+#endif //_PIC16
+	
+
+void main()
+{
+    trisb = 0;		//configure port B
+    portb = 0;
+
+#ifdef _PIC16
+    option_reg = 7;	//set prescaler
+
+    set_bit( intcon, GIE );
+    set_bit( intcon, T0IE );  //enable TMR0 overflow bit
+#else
+    clear_bit( t0con, T0CS );  // select internal clock
+    clear_bit( t0con, PSA );  // select pres-scaler
+    set_bit( t0con, T0PS0 );  // set pres-scaler to 1:256
+    set_bit( t0con, T0PS1 );  
+    set_bit( t0con, T0PS2 );
+
+    // enable interrupts
+    set_bit( intcon, GIE );
+    set_bit( intcon, TMR0IE ); //enable TMR0 overflow bit    
+#endif
+
+    //Set ramdom number generator seed
+    srand( 0x1234 );
+
+    while( 1 ) //endless loop
+    {
+        portb = rand();
+        delay_ms( 100 );
+    }
+}
diff --git a/test/c18/main.c b/test/c18/main.c
new file mode 100644
index 0000000..2bab570
--- /dev/null
+++ b/test/c18/main.c
@@ -0,0 +1,13 @@
+/* Compile options:  -ml (Large code model) */
+
+#include <stdio.h>
+
+#pragma config WDT = OFF
+
+void main (void)
+{
+  printf ("Hello, world!\n");
+
+  while (1)
+    ;
+}
diff --git a/test/c18/test.piklab b/test/c18/test.piklab
new file mode 100644
index 0000000..be034ac
--- /dev/null
+++ b/test/c18/test.piklab
@@ -0,0 +1,13 @@
+<!DOCTYPE piklab>
+<piklab>
+  <general>
+    <device>18F452</device>
+    <tool>c18</tool>
+    <files>
+      <item>main.c</item>
+    </files>
+    <opened_files>
+      <item>main.c</item>
+    </opened_files>
+  </general>
+</piklab>
diff --git a/test/cc5x/SAMPLE1.C b/test/cc5x/SAMPLE1.C
new file mode 100644
index 0000000..021b5cb
--- /dev/null
+++ b/test/cc5x/SAMPLE1.C
@@ -0,0 +1,61 @@
+
+/* global variables */
+char a;
+bit b1, b2;
+
+/* assign names to port pins */
+bit in  @ PORTB.0;
+bit out @ PORTB.1;
+
+void sub( void)
+{
+    char i;      /* a local variable */
+
+    /* generate 20 pulses */
+    for ( i = 0; i < 20; i++)  {
+        out = 1;
+        nop();
+        out = 0;
+    }
+}
+
+
+
+void main( void)
+{
+    // if (TO == 1 && PD == 1 /* power up */)  {
+    //   WARM_RESET:
+    //     clearRAM(); // clear all RAM
+    // }
+
+    /* NOTE 1: some devices have a comparator module
+       that have to be switched off to use certain
+       pins as digital IO */
+    //CMCON = 0x07;  // switch comparators off
+
+    /* NOTE 2: devices having AD converter may need to
+       configure the pins assigned to 'in' and 'out' as
+       digital IO */
+    //ADCON1 = ..
+
+    /* First decide the initial output level on the
+       output port pins, and then define the input/
+       output configuration. This avoids spikes at the
+       output pins. */
+
+    PORTB = 0b.0000.0010;  /* out = 1 */
+    TRISB = 0b.1111.0001;  /* xxxx 0001 */
+
+    a = 9;  /* value assigned to global variable */
+
+    do  {
+        if (in == 0)  /* stop if 'in' is low */
+             break;
+        sub();
+    } while ( -- a > 0);  /* 9 iterations */
+
+    // if (some condition)
+    //    goto WARM_RESET;
+
+    /* main is terminated by a SLEEP instruction */
+}
diff --git a/test/cc5x/sample1.piklab b/test/cc5x/sample1.piklab
new file mode 100644
index 0000000..f89a9dc
--- /dev/null
+++ b/test/cc5x/sample1.piklab
@@ -0,0 +1,10 @@
+<!DOCTYPE piklab>
+<piklab>
+  <general>
+    <device>16F690</device>
+    <tool>cc5x</tool>
+    <files>
+      <item>SAMPLE1.C</item>
+    </files>
+  </general>
+</piklab>
diff --git a/test/ccsc/blinker.piklab b/test/ccsc/blinker.piklab
new file mode 100644
index 0000000..a0810cd
--- /dev/null
+++ b/test/ccsc/blinker.piklab
@@ -0,0 +1,33 @@
+<!DOCTYPE piklab>
+<piklab>
+  <general>
+    <device>16F877</device>
+    <files>
+      <item>test.c</item>
+    </files>
+    <tool>ccsc</tool>
+    <description/>
+    <version>0.1</version>
+    <opened_files>
+      <item>test.c</item>
+    </opened_files>
+  </general>
+  <compiler>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_options/>
+    <custom_arguments>
+      <item>+STDERR</item>
+      <item>-P</item>
+      <item>+LSlst</item>
+      <item>+OWhex</item>
+      <item>-J</item>
+      <item>-A</item>
+      <item>+F%FAMILY</item>
+      <item>-ICD</item>
+      <item>%I</item>
+    </custom_arguments>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+  </compiler>
+</piklab>
diff --git a/test/ccsc/standalone_blinker.c b/test/ccsc/standalone_blinker.c
new file mode 100644
index 0000000..e1d3384
--- /dev/null
+++ b/test/ccsc/standalone_blinker.c
@@ -0,0 +1,18 @@
+// This file is used to test the CCS compiler from within Piklab
+// The resulting HEX file has not been verified in hardware
+
+#include <16F877.h>
+#fuses HS,NOWDT,PUT,NOPROTECT
+#use delay(clock=4000000)
+
+#define LED_PIN PIN_B0
+
+void main(void)
+{
+	while(1){
+		output_low(LED_PIN);
+		delay_ms(500);
+		output_high(LED_PIN);
+		delay_ms(500);
+	}
+}
\ No newline at end of file
diff --git a/test/ccsc/test.c b/test/ccsc/test.c
new file mode 100644
index 0000000..e4a5c5a
--- /dev/null
+++ b/test/ccsc/test.c
@@ -0,0 +1,18 @@
+// This file is used to test the CCS compiler from within Piklab
+// The resulting HEX file has not been verified in hardware
+
+#include </home/azhyd/prog/ccs/devices/16f877.h>
+#fuses HS,NOWDT,PUT,NOPROTECT
+#use delay(clock=4000000)
+
+#define LED_PIN PIN_B0
+
+void main(void)
+{
+	while(1){
+		output_low(LED_PIN);
+		delay_ms(500);
+		output_high(LED_PIN);
+		delay_ms(500);
+	}
+}
\ No newline at end of file
diff --git a/test/commands/icd2_18F452_connect.dat b/test/commands/icd2_18F452_connect.dat
new file mode 100644
index 0000000..04e4213
--- /dev/null
+++ b/test/commands/icd2_18F452_connect.dat
@@ -0,0 +1,43 @@
+<0801C9>
+ [0E0102060806]
+<0807CF>
+ [0A07043C]
+<0A2A824E>
+ [082ADB]
+<0E06007FFF44>
+ [0806CE]
+<0A05FF62>
+ [0805CD]
+<0837D2>
+ [0A37A450]
+<0834CF>
+ [0A347746]
+<0835D0>
+ [0A35A34D]
+<0837D2>
+ [0A37A450]
+<0834CF>
+ [0A347746]
+<0835D0>
+ [0A35A44E]
+<082CDD>
+ [0A2C0248]
+<184A003FFFFE000000014F>
+ [084ADD]
+ {2604CC}
+ [084ADD]
+<0A330037>
+ [0833CE]
+02
+<0808D0>
+ [0A080039]
+<0801C9>
+ [0E0102060806]
+<082CDD>
+ [0A2C0248]
+<0807CF>
+ [0A07043C]
+<0802CA>
+ [12020000000000A5]
+<0A330037>
+ [0833CE]
diff --git a/test/commands/icd2_18F452_program_debug.dat b/test/commands/icd2_18F452_program_debug.dat
new file mode 100644
index 0000000..806c556
--- /dev/null
+++ b/test/commands/icd2_18F452_program_debug.dat
@@ -0,0 +1,283 @@
+<0A330037>
+ [0833CE]
+<0834CF>
+ [0A34503D]
+<082CDD>
+ [0A2C0248]
+<184A003FFFFE000000014F>
+ [084ADD]
+ {2604CC}
+ [084ADD]
+<0A330037>
+ [0833CE]
+<0A330037>
+ [0833CE]
+<0829D3>
+ [0829D3]
+<082CDD>
+ [0A2C0248]
+<18450030000000000007DC>
+ [0845D1]
+{00270F0F000185000FC00FE00F40F1}
+ [0845D1]
+<082CDD>
+ [0A2C0248]
+<18430000000000000020D2>
+ [0843CF]
+{00000000E06A936A816A81800DEC00F081900DEC00F005EF00F0100E3D6E100E3E6EFF0E3F6E3F2E13EF00F03E2E11EF00F03D2E0FEF00F01200FFFFFFFFFFFFF9}
+ [0843CF]
+<082CDD>
+ [0A2C0248]
+<184300007DC00000012001>
+ [0843CF]
+{23D0EAD8F950FA45F926000036D03AD044D045D062D063D080D081D07ED07FD0ACD00ED0B3D00CD00BD00AD009D008D007D006D005D004D003D002D0B2D0B3D0FA6BE2D8E1D8DDD7E0CFFDF50501D8CFFEF5FF6FE9CFFCF5EACFFBF5FACFF5F5FBCFF4F5D450C80B5209D46EFC66C9D7FC2AFD6AFE6AFF6AC4D7C6D8000EFA6FC3D8BFD7C1D8010EFA6FBED8000EFA6FBBD8030EFA6FB8D8B4D7F69101D0F681B3D89AD8FAC5E9FF97D8FAC5EAFF94D8FAC5F9F591D8FAC5F8F5F967F82BF6B104D0EECFFAF5A0D803D086D8FAC5EEFFF92FF5D7F82FF3D794D7F69102D0F68100D092D879D8A96E77D876D8FAC5F9F573D8A69EF6B105D0A680A8CFFAF584D807D0A68469D8FAC5A8FF60D8A6B2FED7A92AF92FEFD7A69474D7F69101D0F68173D85AD8FAC5F6FF57D8FAC5F7FF54D8FAC5F8FF51D850D8FAC5F9F54DD8FAC5F8F5F82BF6A104D0940EA66E3FD80000F6A105D041D8FAC5F5FF0D0004D00900F5CFFAF551D8F92FF3D7F82FF1D7F6A148D7F6062BD8000044D746D82DD8FA53D8A402D0D49801D0D4883BD73DD8FDCFFAF53AD8FECFFAF537D8FFCFFAF534D830D732D803D030D8D48A00D0FCC5E9FFFBC5EAFFFF51FEC5D8FFFDC5E0FFF4C5FBFFF5C5FAFFD480D498E100550EA76EAA0EA76EA6821200D484D450E8B6FDD7D450E8A6FDD7D494200EE82CFED7080EF76FD484D494FA47FA91D450E8B6FA81F72FF7D7D4941200D484D450E8B6FDD7D450E8A6FDD7D494D492200EE82CFED7080ED484FABFD486FAAFD496D494FA47E82CF7D7D494D4821200FFFFFFFFFFFF5B}
+ [0843CF]
+<082CDD>
+ [0A2C0248]
+<18410020002800000008E2>
+ [0841CD]
+{E0EF3EF000FFFFFFFFFFFFFFFFFFFFFF52}
+ [0841CD]
+<0A0C0044>
+ [080CDB]
+<082CDD>
+ [0A2C0248]
+<184200000FB500000001FD>
+ [0842CE]
+<0A0C0145>
+ [080CDB]
+<0A330037>
+ [0833CE]
+<0834CF>
+ [0A344F52]
+<082CDD>
+ [0A2C0248]
+<184A003FFFFE000000014F>
+ [084ADD]
+ {2604CC}
+ [084ADD]
+<0A330037>
+ [0833CE]
+<082CDD>
+ [0A2C0248]
+<18470000000000000020D6>
+ [0847D3]
+ {00000000E06A936A816A81800DEC00F081900DEC00F005EF00F0100E3D6E100E3E6EFF0E3F6E3F2E13EF00F03E2E11EF00F03D2E0FEF00F01200FFFFFFFFFFFFF9}
+ [0847D3]
+<082CDD>
+ [0A2C0248]
+<184700007DC00000012005>
+ [0847D3]
+ {23D0EAD8F950FA45F926000036D03AD044D045D062D063D080D081D07ED07FD0ACD00ED0B3D00CD00BD00AD009D008D007D006D005D004D003D002D0B2D0B3D0FA6BE2D8E1D8DDD7E0CFFDF50501D8CFFEF5FF6FE9CFFCF5EACFFBF5FACFF5F5FBCFF4F5D450C80B5209D46EFC66C9D7FC2AFD6AFE6AFF6AC4D7C6D8000EFA6FC3D8BFD7C1D8010EFA6FBED8000EFA6FBBD8030EFA6FB8D8B4D7F69101D0F681B3D89AD8FAC5E9FF97D8FAC5EAFF94D8FAC5F9F591D8FAC5F8F5F967F82BF6B104D0EECFFAF5A0D803D086D8FAC5EEFFF92FF5D7F82FF3D794D7F69102D0F68100D092D879D8A96E77D876D8FAC5F9F573D8A69EF6B105D0A680A8CFFAF584D807D0A68469D8FAC5A8FF60D8A6B2FED7A92AF92FEFD7A69474D7F69101D0F68173D85AD8FAC5F6FF57D8FAC5F7FF54D8FAC5F8FF51D850D8FAC5F9F54DD8FAC5F8F5F82BF6A104D0940EA66E3FD80000F6A105D041D8FAC5F5FF0D0004D00900F5CFFAF551D8F92FF3D7F82FF1D7F6A148D7F6062BD8000044D746D82DD8FA53D8A402D0D49801D0D4883BD73DD8FDCFFAF53AD8FECFFAF537D8FFCFFAF534D830D732D803D030D8D48A00D0FCC5E9FFFBC5EAFFFF51FEC5D8FFFDC5E0FFF4C5FBFFF5C5FAFFD480D498E100550EA76EAA0EA76EA6821200D484D450E8B6FDD7D450E8A6FDD7D494200EE82CFED7080EF76FD484D494FA47FA91D450E8B6FA81F72FF7D7D4941200D484D450E8B6FDD7D450E8A6FDD7D494D492200EE82CFED7080ED484FABFD486FAAFD496D494FA47E82CF7D7D494D4821200FFFFFFFFFFFF5B}
+ [0847D3]
+<082CDD>
+ [0A2C0248]
+<18400020002800000008E1>
+ [0840CC]
+ {E0EF3EF000FFFFFFFFFFFFFFFFFFFFFF52}
+ [0840CC]
+<0A330037>
+ [0833CE]
+<0834CF>
+ [0A34503D]
+<082CDD>
+ [0A2C0248]
+<184A003FFFFE000000014F>
+ [084ADD]
+ {2604CC}
+ [084ADD]
+<082CDD>
+ [0A2C0248]
+<18450030000000000005DA>
+ [0845D1]
+{FFF9FEF0FFFE7BFFFFFF40}
+ [0845D1]
+<082CDD>
+ [0A2C0248]
+<18450030000C00000001E9>
+ [0845D1]
+{0F40DA}
+ [0845D1]
+<082CDD>
+ [0A2C0248]
+<18450030000A00000001E7>
+ [0845D1]
+{FFFF18}
+ [0845D1]
+<082CDD>
+ [0A2C0248]
+<18490030000000000007E0>
+ [0849D5]
+ {00210E00000001000FC00FE00F40C7}
+ [0849D5]
+<082CDD>
+ [0A2C0248]
+<0A330138>
+ [0833CE]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<181B00000FB5000000010A>
+ [081BDB]
+{0060}
+ [081BDB]
+02
+<0808D0>
+ [0A080039]
+<0801C9>
+ [0E0102060806]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<0804CC>
+ [0E04010003FD]
+<0807CF>
+ [0A07043C]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<181B00000FB5000000010A>
+ [081BDB]
+{0161}
+ [081BDB]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<082DDE>
+ [082DDE]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<181B00000FB5000000010A>
+ [081BDB]
+{0060}
+ [081BDB]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<181B00000FB5000000010A>
+ [081BDB]
+{0060}
+ [081BDB]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<181E000000000000002CF4>
+ [081EDE]
+ {3000AA09400800B00721002A906000090280188070102480014440014008200200A01008000380800C528020A1}
+ [081EDE]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<181E000005FE0000000110>
+ [081EDE]
+ {1061}
+ [081EDE]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<181E000005FD000000010F>
+ [081EDE]
+ {0060}
+ [081EDE]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<181E000005FF0000000111>
+ [081EDE]
+ {D67A}
+ [081EDE]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<181B00000FB5000000010A>
+ [081BDB]
+{0060}
+ [081BDB]
+<083DDF>
+ [103D0000000058]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<082CDD>
+ [0A2C0046]
+<0804CC>
+ [0E04010003FD]
+<181B00000FB5000000010A>
+ [081BDB]
+{0060}
+ [081BDB]
+<083DDF>
+ [103D0000000058]
diff --git a/test/dummy_hex.txt b/test/dummy_hex.txt
new file mode 100644
index 0000000..4dfa09f
--- /dev/null
+++ b/test/dummy_hex.txt
@@ -0,0 +1,32 @@
+* 10F200:
+   code:    [000-0FE] 123 456 789 FFF...FFF 012
+   cal:     [0FF-0FF] 345
+   user id: [100-103] 1 2 3 4
+   config:  [1FF] FE3 (invalid config !!)
+
+* 12C508A:
+   code:    [000-1FE] 123 456 FFF...FFF 123
+   cal:     [1FF-1FF] 345
+   user id: [200-203] 1 2 3 4
+   config:  [0FFF]    FE9
+
+* 16F877:
+   code:    [0000-1FFF] 1234 3456 3FFF...3FFF 3456 0123
+   user id: [2000-2003] 12 34 56 78
+   config:  [2007]      0E02
+   eeprom:  [0000-00FF] FF FF...FF (0x0080) 12 34 FF..FF 56 78
+
+* 17C42A:
+   code:    [000000-0007FF] 1234 5678 FFFF...FFFF 1234 5678
+   config:  [00FE00]        FFE2
+
+* 18F452:
+    code:    [000000-007FFF] 1234 5678 90FF FF...FF 1234
+    user id: [200000-200007] 1 2 3 4 5 6 7 8
+    config:  [300000-30000D] 22 08 0F 01 85 0F C0 0F E0 0F 40
+    eeprom:  [000000-0000FF] 12 34 FF...FF 56 78
+
+* 30F2010:
+    code:   [000000-001FFF] 123456 789012 FF...FF 987654 321098
+    config: [F80000-F8000D] C10F 003F 83A3 0005 C003  (0005 is invalid !!)
+    eeprom: [7FFC00-7FFFFF] 1234 5678 FFF...FFF 0987 6543
diff --git a/test/dummy_hex_32/dummy_10F200_inhx32.hex b/test/dummy_hex_32/dummy_10F200_inhx32.hex
new file mode 100644
index 0000000..37c4cd9
--- /dev/null
+++ b/test/dummy_hex_32/dummy_10F200_inhx32.hex
@@ -0,0 +1,37 @@
+:020000040000FA
+:10000000230156048907FF0FFF0FFF0FFF0FFF0F9C
+:10001000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F70
+:10002000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F60
+:10003000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F50
+:10004000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F40
+:10005000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F30
+:10006000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F20
+:10007000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F10
+:10008000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F00
+:10009000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FF0
+:1000A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FE0
+:1000B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FD0
+:1000C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FC0
+:1000D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FB0
+:1000E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FA0
+:1000F000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F90
+:10010000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F7F
+:10011000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F6F
+:10012000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F5F
+:10013000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F4F
+:10014000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F3F
+:10015000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F2F
+:10016000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F1F
+:10017000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F0F
+:10018000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FFF
+:10019000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FEF
+:1001A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FDF
+:1001B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FCF
+:1001C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FBF
+:1001D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FAF
+:1001E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F9F
+:0E01F000FF0FFF0FFF0FFF0FFF0FFF0F12009B
+:021FFE00E30FEF
+:080200000100020003000400EC
+:0201FE004503B7
+:00000001FF
diff --git a/test/dummy_hex_32/dummy_10F204_inhx32.hex b/test/dummy_hex_32/dummy_10F204_inhx32.hex
new file mode 100644
index 0000000..d3471bd
--- /dev/null
+++ b/test/dummy_hex_32/dummy_10F204_inhx32.hex
@@ -0,0 +1,40 @@
+:020000040000FA
+:1000000023015604FF0FFF0FFF0FFF0FFF0FFF0F1E
+:10001000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F70
+:10002000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F60
+:10003000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F50
+:10004000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F40
+:10005000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F30
+:10006000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F20
+:10007000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F10
+:10008000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F00
+:10009000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FF0
+:1000A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FE0
+:1000B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FD0
+:1000C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FC0
+:1000D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FB0
+:1000E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FA0
+:1000F000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F90
+:10010000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F7F
+:10011000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F6F
+:10012000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F5F
+:10013000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F4F
+:10014000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F3F
+:10015000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F2F
+:10016000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F1F
+:10017000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F0F
+:10018000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FFF
+:10019000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FEF
+:1001A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FDF
+:1001B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FCF
+:1001C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FBF
+:1001D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FAF
+:1001E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F9F
+:0E01F000FF0FFF0FFF0FFF0FFF0F67059008B7
+:020000040000FA
+:021FFE001B00C6
+:020000040000FA
+:080200000100020003000400EC
+:020000040000FA
+:0201FE00000CF3
+:00000001FF
diff --git a/test/dummy_hex_32/dummy_12C508A_inhx32.hex b/test/dummy_hex_32/dummy_12C508A_inhx32.hex
new file mode 100644
index 0000000..b0e6acb
--- /dev/null
+++ b/test/dummy_hex_32/dummy_12C508A_inhx32.hex
@@ -0,0 +1,69 @@
+:020000040000FA
+:1000000023015604FF0FFF0FFF0FFF0FFF0FFF0F1E
+:10001000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F70
+:10002000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F60
+:10003000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F50
+:10004000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F40
+:10005000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F30
+:10006000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F20
+:10007000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F10
+:10008000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F00
+:10009000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FF0
+:1000A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FE0
+:1000B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FD0
+:1000C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FC0
+:1000D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FB0
+:1000E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FA0
+:1000F000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F90
+:10010000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F7F
+:10011000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F6F
+:10012000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F5F
+:10013000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F4F
+:10014000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F3F
+:10015000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F2F
+:10016000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F1F
+:10017000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F0F
+:10018000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FFF
+:10019000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FEF
+:1001A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FDF
+:1001B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FCF
+:1001C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FBF
+:1001D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FAF
+:1001E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F9F
+:1001F000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F8F
+:10020000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F7E
+:10021000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F6E
+:10022000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F5E
+:10023000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F4E
+:10024000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F3E
+:10025000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F2E
+:10026000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F1E
+:10027000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F0E
+:10028000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FFE
+:10029000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FEE
+:1002A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FDE
+:1002B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FCE
+:1002C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FBE
+:1002D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FAE
+:1002E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F9E
+:1002F000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F8E
+:10030000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F7D
+:10031000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F6D
+:10032000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F5D
+:10033000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F4D
+:10034000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F3D
+:10035000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F2D
+:10036000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F1D
+:10037000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F0D
+:10038000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FFD
+:10039000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FED
+:1003A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FDD
+:1003B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FCD
+:1003C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FBD
+:1003D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FAD
+:1003E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F9D
+:0E03F000FF0FFF0FFF0FFF0FFF0FFF0F230187
+:021FFE00E90FE9
+:080400000100020003000400EA
+:0203FE005604A3
+:00000001FF
diff --git a/test/dummy_hex_32/dummy_12F508_inhx32.hex b/test/dummy_hex_32/dummy_12F508_inhx32.hex
new file mode 100644
index 0000000..d0058b9
--- /dev/null
+++ b/test/dummy_hex_32/dummy_12F508_inhx32.hex
@@ -0,0 +1,69 @@
+:020000040000FA
+:1000000023015604FF0FFF0FFF0FFF0FFF0FFF0F1E
+:10001000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F70
+:10002000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F60
+:10003000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F50
+:10004000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F40
+:10005000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F30
+:10006000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F20
+:10007000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F10
+:10008000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F00
+:10009000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FF0
+:1000A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FE0
+:1000B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FD0
+:1000C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FC0
+:1000D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FB0
+:1000E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FA0
+:1000F000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F90
+:10010000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F7F
+:10011000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F6F
+:10012000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F5F
+:10013000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F4F
+:10014000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F3F
+:10015000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F2F
+:10016000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F1F
+:10017000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F0F
+:10018000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FFF
+:10019000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FEF
+:1001A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FDF
+:1001B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FCF
+:1001C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FBF
+:1001D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FAF
+:1001E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F9F
+:1001F000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F8F
+:10020000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F7E
+:10021000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F6E
+:10022000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F5E
+:10023000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F4E
+:10024000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F3E
+:10025000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F2E
+:10026000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F1E
+:10027000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F0E
+:10028000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FFE
+:10029000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FEE
+:1002A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FDE
+:1002B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FCE
+:1002C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FBE
+:1002D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FAE
+:1002E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F9E
+:1002F000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F8E
+:10030000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F7D
+:10031000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F6D
+:10032000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F5D
+:10033000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F4D
+:10034000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F3D
+:10035000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F2D
+:10036000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F1D
+:10037000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F0D
+:10038000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FFD
+:10039000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FED
+:1003A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FDD
+:1003B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FCD
+:1003C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FBD
+:1003D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FAD
+:1003E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F9D
+:0E03F000FF0FFF0FFF0FFF0FFF0F67059008B5
+:021FFE00FA0FD8
+:080400000100020003000400EA
+:0203FE00000CF1
+:00000001FF
diff --git a/test/dummy_hex_32/dummy_16F737_inhx32.hex b/test/dummy_hex_32/dummy_16F737_inhx32.hex
new file mode 100644
index 0000000..2ffe8fd
--- /dev/null
+++ b/test/dummy_hex_32/dummy_16F737_inhx32.hex
@@ -0,0 +1,518 @@
+:020000040000FA
+:1000000034125634FF3FFF3FFF3FFF3FFF3FFF3FAC
+:10001000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FF0
+:10002000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FE0
+:10003000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FD0
+:10004000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FC0
+:10005000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FB0
+:10006000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FA0
+:10007000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F90
+:10008000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F80
+:10009000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F70
+:1000A000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F60
+:1000B000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F50
+:1000C000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F40
+:1000D000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F30
+:1000E000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F20
+:1000F000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F10
+:10010000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FFF
+:10011000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FEF
+:10012000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FDF
+:10013000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FCF
+:10014000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FBF
+:10015000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FAF
+:10016000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F9F
+:10017000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F8F
+:10018000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F7F
+:10019000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F6F
+:1001A000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F5F
+:1001B000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F4F
+:1001C000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F3F
+:1001D000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F2F
+:1001E000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F1F
+:1001F000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F0F
+:10020000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FFE
+:10021000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FEE
+:10022000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FDE
+:10023000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FCE
+:10024000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FBE
+:10025000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FAE
+:10026000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F9E
+:10027000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F8E
+:10028000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F7E
+:10029000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F6E
+:1002A000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F5E
+:1002B000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F4E
+:1002C000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F3E
+:1002D000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F2E
+:1002E000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F1E
+:1002F000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F0E
+:10030000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FFD
+:10031000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FED
+:10032000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FDD
+:10033000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FCD
+:10034000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FBD
+:10035000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FAD
+:10036000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F9D
+:10037000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F8D
+:10038000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F7D
+:10039000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F6D
+:1003A000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F5D
+:1003B000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F4D
+:1003C000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F3D
+:1003D000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F2D
+:1003E000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F1D
+:1003F000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F0D
+:10040000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FFC
+:10041000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FEC
+:10042000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FDC
+:10043000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FCC
+:10044000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FBC
+:10045000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FAC
+:10046000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F9C
+:10047000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F8C
+:10048000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F7C
+:10049000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F6C
+:1004A000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F5C
+:1004B000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F4C
+:1004C000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F3C
+:1004D000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F2C
+:1004E000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F1C
+:1004F000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F0C
+:10050000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FFB
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diff --git a/test/dummy_hex_32/dummy_16F877_inhx32.hex b/test/dummy_hex_32/dummy_16F877_inhx32.hex
new file mode 100644
index 0000000..e92ef3e
--- /dev/null
+++ b/test/dummy_hex_32/dummy_16F877_inhx32.hex
@@ -0,0 +1,1060 @@
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diff --git a/test/dummy_hex_32/dummy_17C42A_inhx32.hex b/test/dummy_hex_32/dummy_17C42A_inhx32.hex
new file mode 100644
index 0000000..770d9ef
--- /dev/null
+++ b/test/dummy_hex_32/dummy_17C42A_inhx32.hex
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diff --git a/test/dummy_hex_32/dummy_18F2455_inhx32.hex b/test/dummy_hex_32/dummy_18F2455_inhx32.hex
new file mode 100644
index 0000000..2601c61
--- /dev/null
+++ b/test/dummy_hex_32/dummy_18F2455_inhx32.hex
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diff --git a/test/dummy_hex_32/dummy_18F452_inhx32.hex b/test/dummy_hex_32/dummy_18F452_inhx32.hex
new file mode 100644
index 0000000..5183a75
--- /dev/null
+++ b/test/dummy_hex_32/dummy_18F452_inhx32.hex
@@ -0,0 +1,2071 @@
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diff --git a/test/dummy_hex_32/dummy_30F2010_inhx32.hex b/test/dummy_hex_32/dummy_30F2010_inhx32.hex
new file mode 100644
index 0000000..c1e62f7
--- /dev/null
+++ b/test/dummy_hex_32/dummy_30F2010_inhx32.hex
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diff --git a/test/dummy_hex_8s/dummy_10F200_inhx8s.hxh b/test/dummy_hex_8s/dummy_10F200_inhx8s.hxh
new file mode 100644
index 0000000..28b181e
--- /dev/null
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diff --git a/test/dummy_hex_8s/dummy_10F200_inhx8s.hxl b/test/dummy_hex_8s/dummy_10F200_inhx8s.hxl
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diff --git a/test/dummy_hex_8s/dummy_16F877_inhx8s.hxh b/test/dummy_hex_8s/dummy_16F877_inhx8s.hxh
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diff --git a/test/dummy_hex_8s/dummy_16F877_inhx8s.hxl b/test/dummy_hex_8s/dummy_16F877_inhx8s.hxl
new file mode 100644
index 0000000..3f74fb1
--- /dev/null
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diff --git a/test/dummy_hex_8s/dummy_18F452_inhx8s.hxh b/test/dummy_hex_8s/dummy_18F452_inhx8s.hxh
new file mode 100644
index 0000000..69044ed
--- /dev/null
+++ b/test/dummy_hex_8s/dummy_18F452_inhx8s.hxh
@@ -0,0 +1,2067 @@
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diff --git a/test/dummy_hex_8s/dummy_18F452_inhx8s.hxl b/test/dummy_hex_8s/dummy_18F452_inhx8s.hxl
new file mode 100644
index 0000000..a0e0852
--- /dev/null
+++ b/test/dummy_hex_8s/dummy_18F452_inhx8s.hxl
@@ -0,0 +1,2067 @@
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diff --git a/test/dummy_hex_8s/dummy_30F2010_inhx8s.hxh b/test/dummy_hex_8s/dummy_30F2010_inhx8s.hxh
new file mode 100644
index 0000000..84576e7
--- /dev/null
+++ b/test/dummy_hex_8s/dummy_30F2010_inhx8s.hxh
@@ -0,0 +1,1155 @@
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diff --git a/test/dummy_hex_8s/dummy_30F2010_inhx8s.hxl b/test/dummy_hex_8s/dummy_30F2010_inhx8s.hxl
new file mode 100644
index 0000000..5797026
--- /dev/null
+++ b/test/dummy_hex_8s/dummy_30F2010_inhx8s.hxl
@@ -0,0 +1,1155 @@
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diff --git a/test/empty.piklab b/test/empty.piklab
new file mode 100644
index 0000000..55b4945
--- /dev/null
+++ b/test/empty.piklab
@@ -0,0 +1,7 @@
+<!DOCTYPE piklab>
+<piklab>
+  <general>
+    <device>16F871</device>
+    <tool>gputils</tool>
+  </general>
+</piklab>
diff --git a/test/gputils/blinker/blinker.asm b/test/gputils/blinker/blinker.asm
new file mode 100644
index 0000000..42f946b
--- /dev/null
+++ b/test/gputils/blinker/blinker.asm
@@ -0,0 +1,148 @@
+
+    #include    <p16f877.inc>   ; processor specific variable definitions
+
+    __CONFIG _CP_OFF & _WDT_OFF & _BODEN_OFF & _PWRTE_ON & _XT_OSC & _WRT_ENABLE_ON & _LVP_OFF & _CPD_OFF
+    ;__CONFIG _CP_OFF & _WDT_OFF & _PWRTE_ON & _EXTRC_CLKOUT
+
+;**********************************************************************
+M_SAVE_STATE macro
+    movwf w_saved
+    movfw STATUS
+    movwf status_saved
+    endm
+
+M_RESTORE_STATE macro
+    movfw status_saved
+    movwf STATUS
+    swapf w_saved,f
+    swapf w_saved,w
+    endm
+
+BANK0 = 0x0
+BANK1 = 0x80
+BANK2 = 0x100
+BANK3 = 0x180
+
+;**********************************************************************
+INT_VAR UDATA_SHR 0x20
+w_saved      RES 1
+status_saved RES 1
+pclath_saved RES 1
+INT1_VAR UDATA_SHR 0xA0
+w_saved1     RES 1
+
+TEMP_VAR UDATA_SHR
+count        RES 1
+count2       RES 1
+ledA         RES 1
+ledC         RES 1
+ledB         RES 1
+
+;**********************************************************************
+STARTUP CODE 0x000          ; processor reset vector
+    nop                     ; for debugger
+    movlw   high start      ; load upper byte of 'start' label
+    movwf   PCLATH          ; initialize PCLATH
+    goto    start           ; go to beginning of program
+
+;**********************************************************************
+INT_VECTOR CODE 0x004       ; interrupt vector location
+    goto interrupt
+
+;**********************************************************************
+PROG1 CODE
+interrupt
+    M_SAVE_STATE
+    M_SAVE_STATE ; try using twice a macro
+
+; increment duty cycle
+;    btfss  CCP1CON ^ BANK0,4
+;    goto   duty_cycle_inc_bit0
+;    bcf    CCP1CON ^ BANK0,4
+;    btfss  CCP1CON ^ BANK0,5
+;    goto   duty_cycle_inc_bit1
+;    bcf    CCP1CON ^ BANK0,5
+;    incfsz CCPR1L ^ BANK0,f
+;    goto   update_duty_cycle_done
+;duty_cycle_inc_bit0
+;    bsf    CCP1CON ^ BANK0,4
+;    goto   update_duty_cycle_done
+;duty_cycle_inc_bit1
+;    bsf    CCP1CON ^ BANK0,5
+;update_duty_cycle_done
+
+; increment count
+    decfsz  count,1
+    goto    done
+    movlw   .10
+    movwf   count
+
+; blink and output
+    movfw   ledB
+    xorlw   B'00001111'
+    movwf   ledB
+    movwf   PORTB
+
+done
+    bcf INTCON,2            ; reset TMR0 interrupt flag
+    M_RESTORE_STATE
+    retfie                  ; return from interrupt
+
+;**********************************************************************
+start
+; initialize microchip
+    clrf TMR0 ^ BANK0
+    clrf INTCON ^ BANK0
+;    clrf PORTA ^ BANK0
+    clrf PORTB ^ BANK0
+;    clrf PORTC ^ BANK0
+;    clrf PORTD ^ BANK0
+;    clrf PORTE ^ BANK0
+    banksel TRISA       ; bank 1
+;    clrf TRISA ^ BANK1  ; all outputs
+    clrf TRISB ^ BANK1  ; all outputs
+;    clrf TRISC ^ BANK1  ; all outputs
+;   clrf TRISD ^ BANK1  ; all outputs
+;   clrf TRISE ^ BANK1  ; all outputs
+    movlw B'11010101'   ; set prescaler to 64
+    movwf OPTION_REG ^ BANK1 ; and start TMR0 (internal source clock)
+;    movlw B'00000110'   ; set PORTA and PORTE to be all digital
+;    movwf ADCON1 ^ BANK1
+    banksel INTCON      ; back to bank 0
+    bsf INTCON,T0IE     ; enable TMR0 interrupt
+    bsf INTCON,GIE      ; enable all interrupts
+
+; initialize PWM
+;    CLRF CCP1CON ^ BANK0  ; disable CCP module
+;    CLRF TMR2 ^ BANK0     ; clear Timer2 (also set the pre-scaler to 1)
+;    MOVLW .1
+;    MOVWF CCPR1L ^ BANK0  ; set duty cycle = (CCPR1L+1)/(PR2+1) [25% for (31+1)/(127+1)]
+;    banksel PR2           ; select bank 1
+;    MOVLW .255
+;    MOVWF PR2 ^ BANK1     ; set period = Fosc/4/pre-scaler/(PR2+1)
+;    BCF TRISC ^ BANK1,2   ; set CCP1 pin as output
+;    banksel PIR1          ; back to bank 0
+;    MOVLW B'001100'
+;    MOVWF CCP1CON ^ BANK0 ; set PWM mode (the 2 LSBs of the duty cycle are set to '00')
+;    BSF T2CON ^ BANK0,TMR2ON ; Timer2 starts to increment
+
+    ; The CCP1 interrupt is disabled,
+    ; do polling on the TMR2 Interrupt flag bit
+;PWM_Period_Match
+;   BTFSS PIR1, TMR2IF
+;   GOTO PWM_Period_Match
+
+    ; Update this PWM period and the following PWM Duty cycle
+;   BCF PIR1, TMR2IF
+
+; initialize variables
+    movlw B'00000101'
+    movwf ledB
+    movlw .10
+    movwf count
+
+; loop forever
+    goto $
+
+;**********************************************************************
+    END
diff --git a/test/gputils/blinker/blinker.piklab b/test/gputils/blinker/blinker.piklab
new file mode 100644
index 0000000..4ac7729
--- /dev/null
+++ b/test/gputils/blinker/blinker.piklab
@@ -0,0 +1,89 @@
+<!DOCTYPE piklab>
+<piklab>
+  <general>
+    <files>
+      <item>blinker.asm</item>
+    </files>
+    <version>0.1</version>
+    <description/>
+    <device>16F877</device>
+    <tool>gputils</tool>
+    <custom_linker_script/>
+    <is_library>true</is_library>
+    <output_type>executable</output_type>
+    <opened_files>
+      <item>blinker.asm</item>
+    </opened_files>
+  </general>
+  <assembler>
+    <warning_level>0</warning_level>
+    <include_dir/>
+    <custom_options/>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_arguments>
+      <item>-c</item>
+      <item>-I$(SRCPATH)</item>
+      <item>-p%DEVICE</item>
+      <item>-w1</item>
+      <item>%I</item>
+      <item>-g</item>
+      <item>-I/usr/share/gputils/header</item>
+    </custom_arguments>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+  </assembler>
+  <linker>
+    <debug>0</debug>
+    <hex_format>inhx32</hex_format>
+    <object_dir/>
+    <custom_options/>
+    <format>inhx32</format>
+    <custom_linker_script>/home/nicolas/prog/piklab/piklab/test/sdcc/16f873.lkr</custom_linker_script>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_libraries/>
+    <custom_arguments>
+      <item>-o%O</item>
+      <item>-c</item>
+      <item>-ainhx32</item>
+      <item>-m</item>
+      <item>-I$(SRCPATH)</item>
+      <item>$LKR(-s%LKR)</item>
+      <item>%OBJS</item>
+      <item>%LIBS</item>
+    </custom_arguments>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+  </linker>
+  <sdcc>
+    <custom_options/>
+    <include_dir/>
+  </sdcc>
+  <compiler>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_options/>
+    <warning_level>0</warning_level>
+    <custom_arguments>
+      <item>-I$(SRCPATH)</item>
+      <item>-I</item>
+      <item>-p</item>
+      <item>%DEVICE</item>
+      <item>%I</item>
+    </custom_arguments>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+  </compiler>
+  <librarian>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_options/>
+    <custom_arguments>
+      <item>-c</item>
+      <item>%O</item>
+      <item>%OBJS</item>
+      <item>%LIBS</item>
+    </custom_arguments>
+  </librarian>
+  <editors/>
+</piklab>
diff --git a/test/gputils/blinker18/blinker_18.asm b/test/gputils/blinker18/blinker_18.asm
new file mode 100644
index 0000000..4a00daf
--- /dev/null
+++ b/test/gputils/blinker18/blinker_18.asm
@@ -0,0 +1,59 @@
+;    LIST    p=18F452      ;PIC18F452 is the target processor
+    INCLUDE "p18f452.inc"  ;Include file with register defines
+
+	;Programming Configuration Information
+	__CONFIG    _CONFIG1H, _XT_OSC_1H				;XT HS PLL (10MHz XTAL)
+	__CONFIG    _CONFIG2L, _BOR_ON_2L & _PWRT_ON_2L	;Power-Up timer ON, Brown-out at 2.7V
+
+	__CONFIG    _CONFIG2H, _WDT_OFF_2H & _WDTPS_1_2H				;WDT OFF for debug
+	__CONFIG    _CONFIG3H, _CCP2MX_OFF_3H							;CCP Module Off
+	__CONFIG    _CONFIG4L, _LVP_OFF_4L & _DEBUG_OFF_4L
+	
+	;UnProtect entire device program space for DEBUG
+	__CONFIG    _CONFIG5L, _CP0_OFF_5L & _CP1_OFF_5L & _CP2_OFF_5L
+	__CONFIG    _CONFIG5H, _CPB_OFF_5H & _CPD_OFF_5H
+	__CONFIG    _CONFIG6L, _WRT0_OFF_6L & _WRT1_OFF_6L & _WRT2_OFF_6L
+	__CONFIG    _CONFIG6H, _WRTC_OFF_6H & _WRTB_OFF_6H & _WRTD_OFF_6H
+
+;Assorted miscellaneous general-purpose registers
+DlyRegA     equ     0x3D   ;Temp register for delay
+DlyRegB     equ     0x3E   ;Temp register for delay
+DlyRegC     equ     0x3F   ;Temp register for delay
+
+STARTUP CODE 0x000
+	nop					;Required for ICD Debugging
+	nop
+	goto Main
+		
+Main
+	clrf	BSR,A	 	;Ensure BSR register points to first block
+	clrf    TRISB,A
+	movlw   0x7
+	movwf   PORTB,A
+
+Loop
+	bsf		PORTB,0	;Turn the LED on
+	call	LongDelay
+	bcf		PORTB,0	;Turn the LED off
+	call	LongDelay
+	goto	Loop
+
+;A long delay
+LongDelay
+		movlw   H'10'		;Adjust to produce a suitable time delay
+		movwf   DlyRegA
+ldelayc	movlw   H'10'
+		movwf   DlyRegB
+ldelayb movlw   H'FF'
+		movwf   DlyRegC
+ldelaya decfsz  DlyRegC,f	;Inner Loop
+		goto    ldelaya
+		decfsz  DlyRegB,f   ;Middle Loop
+		goto    ldelayb
+		decfsz  DlyRegA,f   ;Outer Loop
+		goto    ldelayc
+		return
+
+       END
+
+
diff --git a/test/gputils/blinker18/blinker_18.piklab b/test/gputils/blinker18/blinker_18.piklab
new file mode 100644
index 0000000..c1582de
--- /dev/null
+++ b/test/gputils/blinker18/blinker_18.piklab
@@ -0,0 +1,52 @@
+<!DOCTYPE piklab>
+<piklab>
+  <general>
+    <device>18F452</device>
+    <files>
+      <item>blinker_18.asm</item>
+    </files>
+    <watched_ios>
+      <item>3969</item>
+    </watched_ios>
+    <description/>
+    <version>0.1</version>
+    <tool>gputils</tool>
+    <opened_files>
+      <item>blinker_18.asm</item>
+    </opened_files>
+  </general>
+  <assembler>
+    <custom_options/>
+    <warning_level>0</warning_level>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_arguments>
+      <item>-c</item>
+      <item>-I$(SRCPATH)</item>
+      <item>-w0</item>
+      <item>%I</item>
+      <item>-g</item>
+    </custom_arguments>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+  </assembler>
+  <linker>
+    <custom_options/>
+    <format>inhx32</format>
+    <custom_libraries/>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_arguments>
+      <item>-o%O</item>
+      <item>-c</item>
+      <item>-ainhx8m</item>
+      <item>-m</item>
+      <item>-I$(SRCPATH)</item>
+      <item>$LKR(-s%LKR)</item>
+      <item>%OBJS</item>
+      <item>%LIBS</item>
+    </custom_arguments>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+  </linker>
+</piklab>
diff --git a/test/gputils/compile_error/blinker.asm b/test/gputils/compile_error/blinker.asm
new file mode 100644
index 0000000..cd9f495
--- /dev/null
+++ b/test/gputils/compile_error/blinker.asm
@@ -0,0 +1,145 @@
+;   list        p=16f871        ; list directive to define processor
+    #include    <p16f871.inc>   ; processor specific variable definitions
+
+    __CONFIG _CP_OFF & _WDT_OFF & _BODEN_OFF & _PWRTE_ON & _XT_OSC & _WRT_ENABLE_ON & _LVP_OFF & _CPD_OFF
+    ;__CONFIG _CP_OFF & _WDT_OFF & _PWRTE_ON & _EXTRC_CLKOUT
+
+;**********************************************************************
+M_SAVE_STATE macro
+    mov wf w_saved
+    movfw STATUS
+    movwf status_saved
+    endm
+
+M_RESTORE_STATE macro
+    movfw status_saved
+    movwf STATUS
+    swapf w_saved,f
+    swapf w_saved,w
+    endm
+
+BANK0 = 0x0
+BANK1 = 0x80
+BANK2 = 0x100
+BANK3 = 0x180
+
+;**********************************************************************
+INT_VAR UDATA_SHR
+w_saved      RES 1      ; variable used for context saving
+status_saved RES 1      ; variable used for context saving
+
+TEMP_VAR UDATA_SHR
+count        RES 1
+count2       RES 1
+ledA         RES 1
+ledC         RES 1
+ledB         RES 1
+
+;**********************************************************************
+STARTUP CODE 0x000          ; processor reset vector
+    nop                     ; for debugger
+    movlw   high start      ; load upper byte of 'start' label
+    movwf   PCLATH          ; initialize PCLATH
+    goto    start           ; go to beginning of program
+
+;**********************************************************************
+INT_VECTOR CODE 0x004       ; interrupt vector location
+    goto interrupt
+
+;**********************************************************************
+PROG1 CODE
+interrupt
+    M_SAVE_STATE
+    M_SAVE_STATE ; try using twice a macro
+
+; increment duty cycle
+;    btfss  CCP1CON ^ BANK0,4
+;    goto   duty_cycle_inc_bit0
+;    bcf    CCP1CON ^ BANK0,4
+;    btfss  CCP1CON ^ BANK0,5
+;    goto   duty_cycle_inc_bit1
+;    bcf    CCP1CON ^ BANK0,5
+;    incfsz CCPR1L ^ BANK0,f
+;    goto   update_duty_cycle_done
+;duty_cycle_inc_bit0
+;    bsf    CCP1CON ^ BANK0,4
+;    goto   update_duty_cycle_done
+;duty_cycle_inc_bit1
+;    bsf    CCP1CON ^ BANK0,5
+;update_duty_cycle_done
+
+; increment count
+    decfsz  count,1
+    goto    done
+    movlw   .10
+    movwf   count
+
+; blink and output
+    movfw   ledB
+    xorlw   B'00001111'
+    movwf   ledB
+    movwf   PORTB
+
+done
+    bcf INTCON,2            ; reset TMR0 interrupt flag
+    M_RESTORE_STATE
+    retfie                  ; return from interrupt
+
+;**********************************************************************
+start
+; initialize microchip
+    clrf TMR0 ^ BANK0
+    clrf INTCON ^ BANK0
+;    clrf PORTA ^ BANK0
+    clrf PORTB ^ BANK0
+;    clrf PORTC ^ BANK0
+;    clrf PORTD ^ BANK0
+;    clrf PORTE ^ BANK0
+    banksel TRISA       ; bank 1
+;    clrf TRISA ^ BANK1  ; all outputs
+    clrf TRISB ^ BANK1  ; all outputs
+;    clrf TRISC ^ BANK1  ; all outputs
+;   clrf TRISD ^ BANK1  ; all outputs
+;   clrf TRISE ^ BANK1  ; all outputs
+    movlw B'11010101'   ; set prescaler to 64
+    movwf OPTION_REG ^ BANK1 ; and start TMR0 (internal source clock)
+;    movlw B'00000110'   ; set PORTA and PORTE to be all digital
+;    movwf ADCON1 ^ BANK1
+    banksel INTCON      ; back to bank 0
+    bsf INTCON,T0IE     ; enable TMR0 interrupt
+    bsf INTCON,GIE      ; enable all interrupts
+
+; initialize PWM
+;    CLRF CCP1CON ^ BANK0  ; disable CCP module
+;    CLRF TMR2 ^ BANK0     ; clear Timer2 (also set the pre-scaler to 1)
+;    MOVLW .1
+;    MOVWF CCPR1L ^ BANK0  ; set duty cycle = (CCPR1L+1)/(PR2+1) [25% for (31+1)/(127+1)]
+;    banksel PR2           ; select bank 1
+;    MOVLW .255
+;    MOVWF PR2 ^ BANK1     ; set period = Fosc/4/pre-scaler/(PR2+1)
+;    BCF TRISC ^ BANK1,2   ; set CCP1 pin as output
+;    banksel PIR1          ; back to bank 0
+;    MOVLW B'001100'
+;    MOVWF CCP1CON ^ BANK0 ; set PWM mode (the 2 LSBs of the duty cycle are set to '00')
+;    BSF T2CON ^ BANK0,TMR2ON ; Timer2 starts to increment
+
+    ; The CCP1 interrupt is disabled,
+    ; do polling on the TMR2 Interrupt flag bit
+;PWM_Period_Match
+;   BTFSS PIR1, TMR2IF
+;   GOTO PWM_Period_Match
+
+    ; Update this PWM period and the following PWM Duty cycle
+;   BCF PIR1, TMR2IF
+
+; initialize variables
+    movlw B00000101'
+    movwf ledB
+    movlw .10
+    movwf count
+
+; loop forever
+    goto $
+
+;**********************************************************************
+    END
\ No newline at end of file
diff --git a/test/gputils/compile_error/compile_error.piklab b/test/gputils/compile_error/compile_error.piklab
new file mode 100644
index 0000000..a5d6ad4
--- /dev/null
+++ b/test/gputils/compile_error/compile_error.piklab
@@ -0,0 +1,74 @@
+<!DOCTYPE piklab>
+<piklab>
+  <general>
+    <files>
+      <item>blinker.asm</item>
+    </files>
+    <version>0.1</version>
+    <description/>
+    <device>16F877</device>
+    <tool>gputils</tool>
+    <custom_linker_script/>
+    <opened_files>
+      <item>blinker.asm</item>
+    </opened_files>
+  </general>
+  <assembler>
+    <warning_level>0</warning_level>
+    <include_dir/>
+    <custom_options/>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_arguments>
+      <item>-c</item>
+      <item>-I$(SRCPATH)</item>
+      <item>-p%DEVICE</item>
+      <item>-w1</item>
+      <item>%I</item>
+    </custom_arguments>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+  </assembler>
+  <linker>
+    <debug>0</debug>
+    <hex_format>inhx32</hex_format>
+    <object_dir/>
+    <custom_options/>
+    <format>inhx32</format>
+    <custom_linker_script>/home/nicolas/prog/piklab/piklab/test/sdcc/16f873.lkr</custom_linker_script>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_libraries/>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+    <custom_arguments>
+      <item>-o%O</item>
+      <item>-c</item>
+      <item>-ainhx32</item>
+      <item>-m</item>
+      <item>-I$(SRCPATH)</item>
+      <item>$LKR(-s%LKR)</item>
+      <item>%OBJS</item>
+      <item>%LIBS</item>
+    </custom_arguments>
+  </linker>
+  <sdcc>
+    <custom_options/>
+    <include_dir/>
+  </sdcc>
+  <compiler>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_options/>
+    <warning_level>0</warning_level>
+    <custom_arguments>
+      <item>-I$(SRCPATH)</item>
+      <item>-I</item>
+      <item>-p</item>
+      <item>%DEVICE</item>
+      <item>%I</item>
+    </custom_arguments>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+  </compiler>
+</piklab>
diff --git a/test/gputils/project/test.asm b/test/gputils/project/test.asm
new file mode 100644
index 0000000..e4fcbe8
--- /dev/null
+++ b/test/gputils/project/test.asm
@@ -0,0 +1,60 @@
+;  list      p=16f877
+  #include <p16f871.inc>
+  #include <test.inc>
+
+  __CONFIG _CP_OFF & _WDT_OFF & _BODEN_OFF & _PWRTE_ON & _RC_OSC & _WRT_ENABLE_ON & _LVP_ON & _CPD_OFF
+
+;**********************************************************************
+BANK0 = 0x0
+BANK1 = 0x80
+BANK2 = 0x100
+BANK3 = 0x180
+
+;**********************************************************************
+INT_VAR UDATA_SHR
+w_saved      RES 1 ; variable used for context saving
+status_saved RES 1 ; variable used for context saving
+
+TEMP_VAR UDATA_SHR 0x20
+index       RES 1
+
+;**********************************************************************
+STARTUP CODE                    ; processor reset vector
+        nop                     ; for debugger
+        movlw high start        ; load upper byte of 'start' label
+        movwf PCLATH            ; initialize PCLATH
+        goto  start             ; go to beginning of program
+
+;**********************************************************************
+INT_VECTOR CODE 0x0004          ; interrupt vector location
+        movwf w_saved
+        movfw  STATUS
+        movwf status_saved
+
+        bcf   INTCON,2          ; reset TMR0 interrupt flag
+        bsf   PORTB,0
+
+        movfw  status_saved
+        movwf STATUS
+        swapf w_saved,f
+        swapf w_saved,w
+        retfie                  ; return from interrupt
+
+;**********************************************************************
+MAIN CODE
+start
+; initialize microchip
+        clrf TMR0 ^ BANK0
+        clrf INTCON ^ BANK0
+        banksel TRISA            ; bank 1
+        movlw B'11010100'        ; set prescaler at 32 (32768 Hz / 4 / 256 / 32 = 1 Hz)
+        movwf OPTION_REG ^ BANK1 ; and start TMR0 (internal source clock)
+        movlw B'00000110'        ; set PORTA and PORTE to be all digital
+        movwf ADCON1 ^ BANK1
+        banksel INTCON           ; back to bank 0
+        bsf INTCON,T0IE          ; enable TMR0 interrupt
+        bsf INTCON,GIE           ; enable all interrupts
+
+        nop
+
+        END     ; directive 'end of program'
diff --git a/test/gputils/project/test.inc b/test/gputils/project/test.inc
new file mode 100644
index 0000000..e956bd9
--- /dev/null
+++ b/test/gputils/project/test.inc
@@ -0,0 +1 @@
+; empty
diff --git a/test/gputils/project/test.lib b/test/gputils/project/test.lib
new file mode 100644
index 0000000..d0050e3
--- /dev/null
+++ b/test/gputils/project/test.lib
diff --git a/test/gputils/project/test2.asm b/test/gputils/project/test2.asm
new file mode 100644
index 0000000..6a9ed66
--- /dev/null
+++ b/test/gputils/project/test2.asm
@@ -0,0 +1,6 @@
+MAIN CODE
+
+; loop forever
+    goto $
+        END     ; directive 'end of program'
+
diff --git a/test/gputils/project/test_project.piklab b/test/gputils/project/test_project.piklab
new file mode 100644
index 0000000..2a26260
--- /dev/null
+++ b/test/gputils/project/test_project.piklab
@@ -0,0 +1,52 @@
+<!DOCTYPE piklab>
+<piklab>
+  <general>
+    <files>
+      <item>test.asm</item>
+      <item>test.lib</item>
+      <item>test2.asm</item>
+    </files>
+    <version>0.2</version>
+    <description/>
+    <device>16F871</device>
+    <tool>gputils</tool>
+    <opened_files>
+      <item>test.asm</item>
+      <item>test2.asm</item>
+    </opened_files>
+  </general>
+  <assembler>
+    <warning_level>0</warning_level>
+    <custom_options/>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_arguments>
+      <item>-c</item>
+      <item>-I$(SRCPATH)</item>
+      <item>-p%DEVICE</item>
+      <item>-w0</item>
+      <item>%I</item>
+    </custom_arguments>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+  </assembler>
+  <linker>
+    <format>inhx32</format>
+    <custom_options/>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_arguments>
+      <item>-o%O</item>
+      <item>-c</item>
+      <item>-ainhx32</item>
+      <item>-m</item>
+      <item>-I$(SRCPATH)</item>
+      <item>$LKR(-s%LKR)</item>
+      <item>%OBJS</item>
+      <item>%LIBS</item>
+    </custom_arguments>
+  </linker>
+  <compiler>
+    <includes>$(SRCPATH)</includes>
+    <custom_options/>
+  </compiler>
+</piklab>
diff --git a/test/gputils/project/test_project.pikprj b/test/gputils/project/test_project.pikprj
new file mode 100644
index 0000000..341ea8d
--- /dev/null
+++ b/test/gputils/project/test_project.pikprj
@@ -0,0 +1,20 @@
+[Assembler]
+include-dir=
+other-options=
+radix=dec
+target-device=16F871
+warn-level=0
+
+[Files]
+inputFiles=test.asm,test2.asm,test.lib
+
+[General]
+description=
+output=test_project.hex
+version=0.1
+
+[Linker]
+debug=false
+hex-format=inhx32
+objs-libs-dir=
+other-options=
diff --git a/test/gputils/standalone/test_stand_alone.asm b/test/gputils/standalone/test_stand_alone.asm
new file mode 100644
index 0000000..27e607a
--- /dev/null
+++ b/test/gputils/standalone/test_stand_alone.asm
@@ -0,0 +1,53 @@
+  list      p=16f877
+  #include <p16f877.inc>
+
+  __CONFIG _CP_ALL & _WDT_OFF & _BODEN_OFF & _PWRTE_ON & _RC_OSC & _WRT_ENABLE_ON & _LVP_ON & _CPD_OFF
+
+;**********************************************************************
+BANK0 = 0x0
+BANK1 = 0x80
+BANK2 = 0x100
+BANK3 = 0x180
+
+;**********************************************************************
+w_saved      EQU 0x70 ; variable used for context saving
+status_saved EQU 0x71 ; variable used for context saving
+index        EQU 0x20
+
+;**********************************************************************
+        ORG 0x000               ; processor reset vector
+        movlw high start        ; load upper byte of 'start' label
+        movwf PCLATH            ; initialize PCLATH
+        goto  start             ; go to beginning of program
+
+;**********************************************************************
+        ORG 0x004               ; interrupt vector location
+        movwf w_saved
+        movfw STATUS
+        movwf status_saved
+
+        bcf   INTCON,2          ; reset TMR0 interrupt flag
+
+        movfw status_saved
+        movwf STATUS
+        swapf w_saved,f
+        swapf w_saved,w
+        retfie                  ; return from interrupt
+
+;**********************************************************************
+start
+; initialize microchip
+        clrf TMR0 ^ BANK0
+        clrf INTCON ^ BANK0
+        banksel TRISA            ; bank 1
+        movlw B'11010100'        ; set prescaler at 32 (32768 Hz / 4 / 256 / 32 = 1 Hz)
+        movwf OPTION_REG ^ BANK1 ; and start TMR0 (internal source clock)
+        movlw B'00000110'        ; set PORTA and PORTE to be all digital
+        movwf ADCON1 ^ BANK1
+        banksel INTCON           ; back to bank 0
+        bsf INTCON,T0IE          ; enable TMR0 interrupt
+        bsf INTCON,GIE           ; enable all interrupts
+
+; loop forever
+    goto $
+        END     ; directive 'end of program'
diff --git a/test/hex_test/broken_format.hex b/test/hex_test/broken_format.hex
new file mode 100644
index 0000000..9998fa9
--- /dev/null
+++ b/test/hex_test/broken_format.hex
@@ -0,0 +1,37 @@
+:020000040000FA
+:11000000230156048907FF0FFF0FFF0FFF0FFF0F9C
+:10001000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F70
+:10002000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F60
+:10003000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F50
+:10004000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F40
+:10005000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F30
+:10006000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F20
+:10007000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F10
+:10008000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F00
+:10009000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FF0
+:1000A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FE0
+:1000B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FD0
+:1000C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FC0
+:1000D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FB0
+:1000E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FA0
+:1000F000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F90
+:10010000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F7F
+:10011000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F6F
+:10012000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F5F
+:10013000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F4F
+:10014000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F3F
+:10015000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F2F
+:10016000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F1F
+:10017000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F0F
+:10018000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FFF
+:10019000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FEF
+:1001A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FDF
+:1001B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FCF
+:1001C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FBF
+:1001D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FAF
+:1001E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F9F
+:0E01F000FF0FFF0FFF0FFF0FFF0FFF0F12009B
+:021FFE00E30FEF
+:080200000100020003000400EC
+:0201FE004503B7
+:00000001FF
diff --git a/test/hex_test/file_truncated.hex b/test/hex_test/file_truncated.hex
new file mode 100644
index 0000000..190dca6
--- /dev/null
+++ b/test/hex_test/file_truncated.hex
@@ -0,0 +1,37 @@
+:020000040000FA
+:10000000230156048907FF0FFF0FFF0FFF0FFF0F9C
+:10001000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F70
+:10002000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F60
+:10003000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F50
+:10004000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F40
+:10005000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F30
+:10006000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F20
+:10007000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F10
+:10008000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F00
+:10009000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FF0
+:1000A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FE0
+:1000B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FD0
+:1000C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FC0
+:1000D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FB0
+:1000E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FA0
+:1000F000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F90
+:10010000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F7F
+:10011000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F6F
+:10012000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F5F
+:10013000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F4F
+:10014000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F3F
+:10015000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F2F
+:10016000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F1F
+:10017000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F0F
+:10018000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FFF
+:10019000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FEF
+:1001A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FDF
+:1001B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FCF
+:1001C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FBF
+:1001D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FAF
+:1001E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F9F
+:0E01F000FF0FFF0FFF0FFF0FFF0FFF0F12009B
+:021FFE00E30FEF
+:080200000100020003000400EC
+:0201FE004503B7
+
diff --git a/test/hex_test/good.hex b/test/hex_test/good.hex
new file mode 100644
index 0000000..37c4cd9
--- /dev/null
+++ b/test/hex_test/good.hex
@@ -0,0 +1,37 @@
+:020000040000FA
+:10000000230156048907FF0FFF0FFF0FFF0FFF0F9C
+:10001000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F70
+:10002000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F60
+:10003000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F50
+:10004000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F40
+:10005000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F30
+:10006000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F20
+:10007000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F10
+:10008000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F00
+:10009000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FF0
+:1000A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FE0
+:1000B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FD0
+:1000C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FC0
+:1000D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FB0
+:1000E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FA0
+:1000F000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F90
+:10010000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F7F
+:10011000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F6F
+:10012000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F5F
+:10013000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F4F
+:10014000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F3F
+:10015000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F2F
+:10016000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F1F
+:10017000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F0F
+:10018000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FFF
+:10019000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FEF
+:1001A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FDF
+:1001B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FCF
+:1001C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FBF
+:1001D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FAF
+:1001E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F9F
+:0E01F000FF0FFF0FFF0FFF0FFF0FFF0F12009B
+:021FFE00E30FEF
+:080200000100020003000400EC
+:0201FE004503B7
+:00000001FF
diff --git a/test/hex_test/good_equal.hex b/test/hex_test/good_equal.hex
new file mode 100644
index 0000000..bd18067
--- /dev/null
+++ b/test/hex_test/good_equal.hex
@@ -0,0 +1,37 @@
+:020000040000FA
+:10000000230156048907FF0FFF0FFF0FFF0FFF0F9C
+:10001000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F70
+:10002000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F60
+:10003000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F50
+:10004000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F40
+:10005000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F30
+:10006000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F20
+:10007000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F10
+:10008000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F00
+:10009000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FF0
+:1000A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FE0
+:1000B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FD0
+:1000C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FC0
+:1000D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FB0
+:1000E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FA0
+:1000F000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F90
+:10010000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F7F
+:10011000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F6F
+:10012000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F5F
+:10013000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F4F
+:10014000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F3F
+:10015000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F2F
+:10016000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F1F
+:10017000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F0F
+:10018000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FFF
+:10019000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FEF
+:1001A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FDF
+:1001B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FCF
+:1001C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FBF
+:1001D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FAF
+:1001E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F9F
+:1001F000FF0FFF0FFF0FFF0FFF0FFF0F1200FFFF9B
+:021FFE00E30FEF
+:100200000100020003000400FFFFFFFFFFFFFFFFEC
+:0201FE004503B7
+:00000001FF
diff --git a/test/hex_test/good_subset.hex b/test/hex_test/good_subset.hex
new file mode 100644
index 0000000..bba3548
--- /dev/null
+++ b/test/hex_test/good_subset.hex
@@ -0,0 +1,6 @@
+:020000040000FA
+:10000000230156048907FF0FFF0FFF0FFF0FFF0F9C
+:021FFE00E30FEF
+:080200000100020003000400EC
+:0201FE004503B7
+:00000001FF
diff --git a/test/hex_test/line_truncated.hex b/test/hex_test/line_truncated.hex
new file mode 100644
index 0000000..d61742b
--- /dev/null
+++ b/test/hex_test/line_truncated.hex
@@ -0,0 +1,37 @@
+:020000040000
+:10000000230156048907FF0FFF0FFF0FFF0FFF0F9C
+:10001000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F70
+:10002000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F60
+:10003000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F50
+:10004000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F40
+:10005000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F30
+:10006000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F20
+:10007000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F10
+:10008000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F00
+:10009000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FF0
+:1000A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FE0
+:1000B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FD0
+:1000C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FC0
+:1000D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FB0
+:1000E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FA0
+:1000F000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F90
+:10010000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F7F
+:10011000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F6F
+:10012000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F5F
+:10013000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F4F
+:10014000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F3F
+:10015000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F2F
+:10016000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F1F
+:10017000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F0F
+:10018000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FFF
+:10019000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FEF
+:1001A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FDF
+:1001B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FCF
+:1001C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FBF
+:1001D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FAF
+:1001E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F9F
+:0E01F000FF0FFF0FFF0FFF0FFF0FFF0F12009B
+:021FFE00E30FEF
+:080200000100020003000400EC
+:0201FE004503B7
+:00000001FF
diff --git a/test/hex_test/no_format.hex b/test/hex_test/no_format.hex
new file mode 100644
index 0000000..cb0b573
--- /dev/null
+++ b/test/hex_test/no_format.hex
@@ -0,0 +1,2 @@
+ :080200000100020003000400EC
+:00000001FF
diff --git a/test/hex_test/wrong_crc.hex b/test/hex_test/wrong_crc.hex
new file mode 100644
index 0000000..e12758c
--- /dev/null
+++ b/test/hex_test/wrong_crc.hex
@@ -0,0 +1,37 @@
+:020000040000FA
+:10000000230156048907FF0FFF0FFF0FFF0FFF0FAA
+:10001000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F70
+:10002000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F60
+:10003000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F50
+:10004000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F00
+:10005000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F30
+:10006000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F20
+:10007000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F11
+:10008000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F00
+:10009000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FF0
+:1000A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FE0
+:1000B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FD0
+:1000C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FC0
+:1000D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FB0
+:1000E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FA0
+:1000F000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F90
+:10010000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F7F
+:10011000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F6F
+:10012000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F5F
+:10013000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F4F
+:10014000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F3F
+:10015000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F2F
+:10016000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F1F
+:10017000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F0F
+:10018000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FFF
+:10019000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FEF
+:1001A000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FDF
+:1001B000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FCF
+:1001C000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FBF
+:1001D000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0FAF
+:1001E000FF0FFF0FFF0FFF0FFF0FFF0FFF0FFF0F9F
+:0E01F000FF0FFF0FFF0FFF0FFF0FFF0F12009B
+:021FFE00E30FEF
+:080200000100020003000400EC
+:0201FE004503B7
+:00000001FF
diff --git a/test/jal/test.jal b/test/jal/test.jal
new file mode 100644
index 0000000..c19fbc7
--- /dev/null
+++ b/test/jal/test.jal
@@ -0,0 +1,13 @@
+include 16c84_10
+
+include jdelay
+include hd447804
+
+
+HD44780_clear
+
+HD44780_write( 72  ) -- H
+HD44780_write( 97  ) -- a
+HD44780_write( 108 ) -- l
+HD44780_write( 108 ) -- l
+HD44780_write( 111 ) -- o
diff --git a/test/jal/test.piklab b/test/jal/test.piklab
new file mode 100644
index 0000000..6a6a4ff
--- /dev/null
+++ b/test/jal/test.piklab
@@ -0,0 +1,15 @@
+<!DOCTYPE piklab>
+<piklab>
+  <general>
+    <device>16C84</device>
+    <tool>jal</tool>
+    <files>
+      <item>test.jal</item>
+      <item>test2.jal</item>
+    </files>
+    <opened_files>
+      <item>test.jal</item>
+      <item>test2.jal</item>
+    </opened_files>
+  </general>
+</piklab>
diff --git a/test/jal/test2.jal b/test/jal/test2.jal
new file mode 100644
index 0000000..e26aa9c
--- /dev/null
+++ b/test/jal/test2.jal
@@ -0,0 +1,2 @@
+
+HD44780_write( 111 ) -- o
\ No newline at end of file
diff --git a/test/jal/test_standalone.jal b/test/jal/test_standalone.jal
new file mode 100644
index 0000000..c19fbc7
--- /dev/null
+++ b/test/jal/test_standalone.jal
@@ -0,0 +1,13 @@
+include 16c84_10
+
+include jdelay
+include hd447804
+
+
+HD44780_clear
+
+HD44780_write( 72  ) -- H
+HD44780_write( 97  ) -- a
+HD44780_write( 108 ) -- l
+HD44780_write( 108 ) -- l
+HD44780_write( 111 ) -- o
diff --git a/test/pic30/standalone_test.s b/test/pic30/standalone_test.s
new file mode 100644
index 0000000..98a8d5c
--- /dev/null
+++ b/test/pic30/standalone_test.s
@@ -0,0 +1,19 @@
+         .title " Sample dsPIC Assembler Source Code"
+         .sbttl " For illustration only."
+         ; dsPIC registers
+         .equ CORCONL, CORCON
+         .equ PSV,2
+         .section .const,psv
+hello:
+         .ascii "Hello world!\n\0"
+         .text
+         .global __reset
+__reset:
+         ; set PSVPAG to page that contains 'hello'
+         mov     #psvpage(hello),w0
+         mov     w0,PSVPAG
+         ; enable Program Space Visibility
+         bset.b CORCONL,#PSV
+         ; make a pointer to 'hello'
+         mov     #psvoffset(hello),w0
+         .end
diff --git a/test/pic30/standalone_test_c.c b/test/pic30/standalone_test_c.c
new file mode 100644
index 0000000..9e9be37
--- /dev/null
+++ b/test/pic30/standalone_test_c.c
@@ -0,0 +1,18 @@
+//#include <p30f2010.h>
+
+int main(void);
+unsigned int Add(unsigned int a, unsigned int b);
+unsigned int x, y, z;
+
+int main(void)
+{
+  x = 2;
+  y = 5;
+  z = Add(x,y);
+  return 0;
+}
+
+unsigned int Add(unsigned int a, unsigned int b)
+{
+  return(a+b);
+}
diff --git a/test/pic30/test.piklab b/test/pic30/test.piklab
new file mode 100644
index 0000000..9ec721d
--- /dev/null
+++ b/test/pic30/test.piklab
@@ -0,0 +1,27 @@
+<!DOCTYPE piklab>
+<piklab>
+  <general>
+    <device>30F6015</device>
+    <files>
+      <item>test.s</item>
+    </files>
+    <description/>
+    <version>0.1</version>
+    <tool>pic30</tool>
+    <opened_files>
+      <item>test.s</item>
+    </opened_files>
+  </general>
+  <compiler>
+    <includes>$(SRCPATH)</includes>
+    <custom_options/>
+  </compiler>
+  <assembler>
+    <includes>$(SRCPATH)</includes>
+    <custom_options/>
+  </assembler>
+  <linker>
+    <custom_options/>
+    <format>inhx32</format>
+  </linker>
+</piklab>
diff --git a/test/pic30/test.s b/test/pic30/test.s
new file mode 100644
index 0000000..98a8d5c
--- /dev/null
+++ b/test/pic30/test.s
@@ -0,0 +1,19 @@
+         .title " Sample dsPIC Assembler Source Code"
+         .sbttl " For illustration only."
+         ; dsPIC registers
+         .equ CORCONL, CORCON
+         .equ PSV,2
+         .section .const,psv
+hello:
+         .ascii "Hello world!\n\0"
+         .text
+         .global __reset
+__reset:
+         ; set PSVPAG to page that contains 'hello'
+         mov     #psvpage(hello),w0
+         mov     w0,PSVPAG
+         ; enable Program Space Visibility
+         bset.b CORCONL,#PSV
+         ; make a pointer to 'hello'
+         mov     #psvoffset(hello),w0
+         .end
diff --git a/test/pic30/test_c.c b/test/pic30/test_c.c
new file mode 100644
index 0000000..5205e53
--- /dev/null
+++ b/test/pic30/test_c.c
@@ -0,0 +1,22 @@
+#include <p30f3010.h>
+_FOSC(XT_PLL16 & FRC & CSW_FSCM_OFF);
+_FWDT(WDTPSB_16 & WDTPSA_512 & WDT_OFF);
+_FBORPOR(PWRT_64 & BORV_20 & PBOR_ON & MCLR_EN);
+//_FGS(CODE_PROT_ON);
+
+void delay(void);
+
+int main (void)
+{
+int i = 0xFFFF;
+
+for (;;) {
+  delay();
+}
+}
+
+void delay()
+{
+int i;
+for (i = 0; i < 0xFFFF; i++) {;}
+} 
diff --git a/test/pic30/test_c.piklab b/test/pic30/test_c.piklab
new file mode 100644
index 0000000..0985934
--- /dev/null
+++ b/test/pic30/test_c.piklab
@@ -0,0 +1,103 @@
+<!DOCTYPE piklab>
+<piklab>
+  <general>
+    <device>30F3010</device>
+    <files>
+      <item>test_c.c</item>
+      <item>test.s</item>
+      <item>libp30F3010-coff.a</item>
+    </files>
+    <description/>
+    <version>0.1</version>
+    <tool>pic30</tool>
+    <custom_linker_script/>
+    <is_library>false</is_library>
+    <opened_files>
+      <item>test_c.c</item>
+    </opened_files>
+  </general>
+  <sdcc>
+    <custom_options/>
+    <include_dir/>
+  </sdcc>
+  <assembler>
+    <warning_level>0</warning_level>
+    <custom_options/>
+    <include_dir/>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_arguments>
+      <item>--ERRFORMAT</item>
+      <item>--WARNFORMAT</item>
+      <item>--MSGFORMAT</item>
+      <item>--CHIP=%DEVICE</item>
+      <item>--IDE=mplab</item>
+      <item>-Q</item>
+      <item>-C</item>
+      <item>--ASMLIST</item>
+      <item>-I$(SRCPATH)</item>
+      <item>%I</item>
+      <item>-D</item>
+    </custom_arguments>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+  </assembler>
+  <linker>
+    <hex_format>inhx32</hex_format>
+    <object_dir/>
+    <custom_options/>
+    <format>inhx32</format>
+    <custom_libraries/>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_arguments>
+      <item>/k%LKR_PATH</item>
+      <item>%LKR_NAME</item>
+      <item>/l</item>
+      <item>/o%COFF</item>
+      <item>/m%MAP</item>
+      <item>%OBJS</item>
+      <item>%LIBS</item>
+    </custom_arguments>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+  </linker>
+  <compiler>
+    <custom_options/>
+    <has_custom_arguments>false</has_custom_arguments>
+    <warning_level>0</warning_level>
+    <custom_arguments>
+      <item>-S</item>
+      <item>$NO_AUTO_DEVICE(-mcpu=%DEVICE)</item>
+      <item>-I/home/nicolas/wine/Program Files/Microchip/MPLAB C30/support/h/</item>
+      <item>-g</item>
+      <item>%I</item>
+    </custom_arguments>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+  </compiler>
+  <bin_to_hex>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_options/>
+    <custom_arguments>
+      <item>%I</item>
+    </custom_arguments>
+  </bin_to_hex>
+  <librarian>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_options/>
+    <custom_arguments>
+      <item>-rc</item>
+      <item>%O</item>
+      <item>%LIBS</item>
+      <item>%OBJS</item>
+    </custom_arguments>
+  </librarian>
+  <editors>
+    <bookmarks>
+      <item>file:///home/nicolas/prog/trunk/piklab/test/pic30/test.s,9</item>
+      <item>file:///home/nicolas/prog/trunk/piklab/test/pic30/test_c.c,1</item>
+    </bookmarks>
+  </editors>
+</piklab>
diff --git a/test/picc/standalone_test.c b/test/picc/standalone_test.c
new file mode 100644
index 0000000..4173cf8
--- /dev/null
+++ b/test/picc/standalone_test.c
@@ -0,0 +1,350 @@
+/*
+ * level - electronic level using the ADXL202
+ *
+ * $Id: standalone_test.c 713 2006-03-15 00:01:20Z azhyd $
+ * $Source$
+ *
+ * This program consists of an interrupt routine that measures the pulse
+ * width from the ADXL202 and a main routine that updates the dot matrix
+ * display on the DISPLAY board.
+ *
+ * Timer1 and the two Capture/Compare registers are used to measure the
+ * pulse width.
+ *
+ * Use PICCLITE to compile this program for the PIC16F877.
+ *
+ * Status: Sept 25, 2003
+ *   Working. The code is pretty brute force and the resolution isn't
+ *   what I expected. Need to review calculations for angle vs. accel
+ *   (gravity). I determined the zero offsets empirically and hard coded
+ *   them. For coding simplicity I am discarding any measurements where
+ *   the counter overflows during the measurement.
+ *
+ *   Improvements should include: a method to zero the offsets at
+ *   runtime and increased gain (which probably means going to 16 bit
+ *   values). Also consider filtering the measured values to gain stability.
+ *   Add code to handle counter overflow.
+ */
+
+#include <pic.h>
+
+/*
+ * bit macros suggested by the PICCLITE manual
+ */
+#define BITSET(var, bitno) ((var) |= 1 << (bitno))
+#define BITCLR(var, bitno) ((var) &= ~(1 << (bitno)))
+
+
+/*
+ * pulse with variables
+ *
+ * These are set up the measurePW() ISR and read by the main loop
+ */
+unsigned char PeriodStartX;
+unsigned char PeriodEndX;
+unsigned char PulseEndX;
+unsigned char PulseEndTempX;
+unsigned char PWSyncX;
+
+unsigned char PeriodStartY;
+unsigned char PeriodEndY;
+unsigned char PulseEndY;
+unsigned char PulseEndTempY;
+unsigned char PWSyncY;
+
+/*
+ * interrupt service routine to measure pulse width
+ *
+ * This routine uses the capture facility of the 16F877 to measure the
+ * period and the pulse width of a signal. This routine has two states
+ * the first looks for the rising edge of the signal which indicates the
+ * end of one period and the beginning of the next. The second state
+ * looks for the falling edge of the signal to determine the pulse
+ * width.
+ *
+ * Only the high 8 bits of the captured time are record. At 20MHz this
+ * yields a time resolution of approximately 51us.
+ *
+ * RC0 and RC1 indicate ISR over-run (in other words the main loop did
+ * not handle the measured values quickly enough).
+ */
+void interrupt
+measurePW(void)
+{
+  /* determined which capture register requires service */
+  if (CCP1IF == 1)
+  {
+    /* CCP1 */
+    if ((CCP1CON & 0b00000111) == 0b00000101)
+    {
+      /* rising edge-
+       *   record last rise time (period_end -> period_start)
+       *   record last falling time (pulse_end_temp -> pulse_end)
+       *   record this rise time (capture -> period_end)
+       *   set synchronization flag
+       *   change mode to look for falling edge
+       */
+      PeriodStartX = PeriodEndX;
+      PulseEndX = PulseEndTempX;
+      PeriodEndX = CCPR1H;
+      PWSyncX++;
+      CCP1CON = 0b00000100;
+
+      /* Indicated an ISR over-run if the sync flag was
+       * not cleared by the main loop
+       */
+      if (PWSyncX > 1)
+      {
+        RC0 = 0;
+      }
+    }
+    else /* assume falling edge */
+    {
+      /* falling-
+       *   save this falling time for later
+       *   change mode to look for rising edge
+       */
+      PulseEndTempX = CCPR1H;
+      CCP1CON = 0b00000101;
+    }
+    /*
+     * clear interrupt flags and return
+     */
+    CCP1IF = 0;
+  }
+  else
+  {
+    /* CCP2 */
+    if ((CCP2CON & 0b00000111) == 0b00000101)
+    {
+      /* rising edge-
+       *   record last rise time (period_end -> period_start)
+       *   record last falling time (pulse_end_temp -> pulse_end)
+       *   record this rise time (capture -> period_end)
+       *   set synchronization flag
+       *   change mode to look for falling edge
+       */
+      PeriodStartY = PeriodEndY;
+      PulseEndY = PulseEndTempY;
+      PeriodEndY = CCPR2H;
+      PWSyncY++;
+      CCP2CON = 0b00000100;
+
+      /* Indicated an ISR over-run if the sync flag was
+       * not cleared by the main loop
+       */
+      if (PWSyncY > 1)
+      {
+        RC3 = 0;
+      }
+    }
+    else /* assume falling edge */
+    {
+      /* falling-
+       *   save this falling time for later
+       *   change mode to look for rising edge
+       */
+      PulseEndTempY = CCPR2H;
+      CCP2CON = 0b00000101;
+    }
+    /*
+     * clear interrupt flags and return
+     */
+    CCP2IF = 0;
+  }
+}
+    
+
+/*
+ * measure tilt and update dot matrix display
+ *
+ * This program uses the times recorded by the measurePW() ISR to
+ * calculate pulse width. The pulse width is then translated into a tilt
+ * measurement and finally displayed on the dot matrix display.
+ */
+void
+main(void)
+{
+  unsigned char periodX = 0;
+  unsigned char pulseX = 0;
+  unsigned char periodY = 0;
+  unsigned char pulseY = 0;
+  int tiltX;
+  int tiltY;
+
+  /*
+   * Setup I/O ports
+   *  RC0 and RC3 outputs, the rest are inputs.
+   *  RA5 output (power to ADXL202)
+   *  Set port C outputs high to turn off the LEDs
+   */
+  TRISC = 0b11110110;
+  RA5 = 1;
+  PORTC = 0xff;
+
+  /*
+   * Setup the I/O ports that control the dot matrix display
+   */
+  TRISA = 0b11000000;
+  TRISB = 0b11100000;
+  TRISD = 0b10000000;
+  ADCON1 = 0x06;        /* disable ADC so that port A is digital I/O */
+  PORTD = 0;            /* turn off all rows */
+  PORTB = 0xff;         /* turn off all columns */
+  PORTA = 0xff;         /* turn off all columns */
+
+  /* configure timer1
+   *   1:1 prescale
+   *   Internal clock (Fosc/4)
+   *   Enabled
+   */
+  T1CON = 0b00000001;
+
+  /*
+   * configure capture registers
+   * capture on rising edge
+   */
+  CCP1CON = 0b00000101;
+  CCP2CON = 0b00000101;
+
+  /*
+   * clear sync flag
+   */
+  PWSyncX = 0;
+  PWSyncY = 0;
+
+  /*
+   * enable interrupts
+   */
+  PEIE = 1;
+  CCP1IE = 1;
+  CCP2IE = 1;
+  ei();
+
+  /*
+   * main loop
+   */
+  for (;;)
+  {
+    /*
+     * kick watchdog
+     */
+    CLRWDT();
+
+    if (PWSyncX > 0)
+    {
+      /*
+       * Test for easy calculations
+       * i.e., no counter roll over during the measurment
+       */
+      if (PeriodEndX > PeriodStartX)
+      {
+        if (PulseEndX > PeriodStartX)
+        {
+          /*
+           * no roll over, so proceed
+           */
+          periodX = PeriodEndX - PeriodStartX;
+          pulseX = PulseEndX - PeriodStartX;
+
+          periodX = (periodX / 2) + 9;  /* offset = 9 */
+          tiltX = (periodX) - pulseX;
+
+          /*
+           * turn off all rows and then figure out which row to turn
+           * on based on the tilt
+           */
+          PORTD = 0;
+          if (tiltX < -5)
+          {
+            RD6 = 1;
+          }
+          else if (tiltX < -4)
+          {
+            RD5 = 1;
+          }
+          else if (tiltX < -2)
+          {
+            RD4 = 1;
+          }
+          else if (tiltX > 5)
+          {
+            RD0 = 1;
+          }
+          else if (tiltX > 4)
+          {
+            RD1 = 1;
+          }
+          else if (tiltX > 2)
+          {
+            RD2 = 1;
+          }
+          else
+          {
+            RD3 = 1;
+          }
+        }
+      }
+      PWSyncX = 0;
+    }
+
+    if (PWSyncY > 0)
+    {
+      /*
+       * Test for easy calculations
+       * i.e., no counter roll over during the measurment
+       */
+      if (PeriodEndY > PeriodStartY)
+      {
+        if (PulseEndY > PeriodStartY)
+        {
+          /*
+           * no roll over, so proceed
+           */
+          periodY = PeriodEndY - PeriodStartY;
+          pulseY = PulseEndY - PeriodStartY;
+
+          periodY = (periodY / 2) - 1;  /* offset = -1 */
+          tiltY = (periodY) - pulseY;
+
+          /*
+           * turn off all columns then figure out which column
+           * to turn on based on the tilt
+           */
+          PORTA = PORTA | 0b00111111;
+          PORTB = PORTB | 0b00011111;
+          if (tiltY < -5)
+          {
+            RB1 = 0;
+          }
+          else if (tiltY < -4)
+          {
+            RB0 = 0;
+          }
+          else if (tiltY < -2)
+          {
+            RA4 = 0;
+          }
+          else if (tiltY > 5)
+          {
+            RA0 = 0;
+          }
+          else if (tiltY > 4)
+          {
+            RA1 = 0;
+          }
+          else if (tiltY > 2)
+          {
+            RA2 = 0;
+          }
+          else
+          {
+            RA3 = 0;
+          }
+        }
+      }
+      PWSyncY = 0;
+    }
+  }
+}
+
diff --git a/test/picc/test.c b/test/picc/test.c
new file mode 100644
index 0000000..5fc2e81
--- /dev/null
+++ b/test/picc/test.c
@@ -0,0 +1,348 @@
+/*
+ * level - electronic level using the ADXL202
+ *
+ * This program consists of an interrupt routine that measures the pulse
+ * width from the ADXL202 and a main routine that updates the dot matrix
+ * display on the DISPLAY board.
+ *
+ * Timer1 and the two Capture/Compare registers are used to measure the
+ * pulse width.
+ *
+ * Use PICCLITE to compile this program for the PIC16F877.
+ *
+ * Status: Sept 25, 2003
+ *   Working. The code is pretty brute force and the resolution isn't
+ *   what I expected. Need to review calculations for angle vs. accel
+ *   (gravity). I determined the zero offsets empirically and hard coded
+ *   them. For coding simplicity I am discarding any measurements where
+ *   the counter overflows during the measurement.
+ *
+ *   Improvements should include: a method to zero the offsets at
+ *   runtime and increased gain (which probably means going to 16 bit
+ *   values). Also consider filtering the measured values to gain stability.
+ *   Add code to handle counter overflow.
+ */
+
+#include <pic.h>
+#include "test.h"
+
+/*
+ * bit macros suggested by the PICCLITE manual
+ */
+#define BITSET(var, bitno) ((var) |= 1 << (bitno))
+#define BITCLR(var, bitno) ((var) &= ~(1 << (bitno)))
+
+
+/*
+ * pulse with variables
+ *
+ * These are set up the measurePW() ISR and read by the main loop
+ */
+unsigned char PeriodStartX;
+unsigned char PeriodEndX;
+unsigned char PulseEndX;
+unsigned char PulseEndTempX;
+unsigned char PWSyncX;
+
+unsigned char PeriodStartY;
+unsigned char PeriodEndY;
+unsigned char PulseEndY;
+unsigned char PulseEndTempY;
+unsigned char PWSyncY;
+
+/*
+ * interrupt service routine to measure pulse width
+ *
+ * This routine uses the capture facility of the 16F877 to measure the
+ * period and the pulse width of a signal. This routine has two states
+ * the first looks for the rising edge of the signal which indicates the
+ * end of one period and the beginning of the next. The second state
+ * looks for the falling edge of the signal to determine the pulse
+ * width.
+ *
+ * Only the high 8 bits of the captured time are record. At 20MHz this
+ * yields a time resolution of approximately 51us.
+ *
+ * RC0 and RC1 indicate ISR over-run (in other words the main loop did
+ * not handle the measured values quickly enough).
+ */
+void interrupt
+measurePW(void)
+{
+  /* determined which capture register requires service */
+  if (CCP1IF == 1)
+  {
+    /* CCP1 */
+    if ((CCP1CON & 0b00000111) == 0b00000101)
+    {
+      /* rising edge-
+       *   record last rise time (period_end -> period_start)
+       *   record last falling time (pulse_end_temp -> pulse_end)
+       *   record this rise time (capture -> period_end)
+       *   set synchronization flag
+       *   change mode to look for falling edge
+       */
+      PeriodStartX = PeriodEndX;
+      PulseEndX = PulseEndTempX;
+      PeriodEndX = CCPR1H;
+      PWSyncX++;
+      CCP1CON = 0b00000100;
+
+      /* Indicated an ISR over-run if the sync flag was
+       * not cleared by the main loop
+       */
+      if (PWSyncX > 1)
+      {
+        RC0 = 0;
+      }
+    }
+    else /* assume falling edge */
+    {
+      /* falling-
+       *   save this falling time for later
+       *   change mode to look for rising edge
+       */
+      PulseEndTempX = CCPR1H;
+      CCP1CON = 0b00000101;
+    }
+    /*
+     * clear interrupt flags and return
+     */
+    CCP1IF = 0;
+  }
+  else
+  {
+    /* CCP2 */
+    if ((CCP2CON & 0b00000111) == 0b00000101)
+    {
+      /* rising edge-
+       *   record last rise time (period_end -> period_start)
+       *   record last falling time (pulse_end_temp -> pulse_end)
+       *   record this rise time (capture -> period_end)
+       *   set synchronization flag
+       *   change mode to look for falling edge
+       */
+      PeriodStartY = PeriodEndY;
+      PulseEndY = PulseEndTempY;
+      PeriodEndY = CCPR2H;
+      PWSyncY++;
+      CCP2CON = 0b00000100;
+
+      /* Indicated an ISR over-run if the sync flag was
+       * not cleared by the main loop
+       */
+      if (PWSyncY > 1)
+      {
+        RC3 = 0;
+      }
+    }
+    else /* assume falling edge */
+    {
+      /* falling-
+       *   save this falling time for later
+       *   change mode to look for rising edge
+       */
+      PulseEndTempY = CCPR2H;
+      CCP2CON = 0b00000101;
+    }
+    /*
+     * clear interrupt flags and return
+     */
+    CCP2IF = 0;
+  }
+}
+    
+
+/*
+ * measure tilt and update dot matrix display
+ *
+ * This program uses the times recorded by the measurePW() ISR to
+ * calculate pulse width. The pulse width is then translated into a tilt
+ * measurement and finally displayed on the dot matrix display.
+ */
+void
+main(void)
+{
+  unsigned char periodX = 0;
+  unsigned char pulseX = 0;
+  unsigned char periodY = 0;
+  unsigned char pulseY = 0;
+  int tiltX;
+  int tiltY;
+
+  /*
+   * Setup I/O ports
+   *  RC0 and RC3 outputs, the rest are inputs.
+   *  RA5 output (power to ADXL202)
+   *  Set port C outputs high to turn off the LEDs
+   */
+  TRISC = 0b11110110;
+  RA5 = 1;
+  PORTC = 0xff;
+
+  /*
+   * Setup the I/O ports that control the dot matrix display
+   */
+  TRISA = 0b11000000;
+  TRISB = 0b11100000;
+  TRISD = 0b10000000;
+  ADCON1 = 0x06;        /* disable ADC so that port A is digital I/O */
+  PORTD = 0;            /* turn off all rows */
+  PORTB = 0xff;         /* turn off all columns */
+  PORTA = 0xff;         /* turn off all columns */
+
+  /* configure timer1
+   *   1:1 prescale
+   *   Internal clock (Fosc/4)
+   *   Enabled
+   */
+  T1CON = 0b00000001;
+
+  /*
+   * configure capture registers
+   * capture on rising edge
+   */
+  CCP1CON = 0b00000101;
+  CCP2CON = 0b00000101;
+
+  /*
+   * clear sync flag
+   */
+  PWSyncX = 0;
+  PWSyncY = 0;
+
+  /*
+   * enable interrupts
+   */
+  PEIE = 1;
+  CCP1IE = 1;
+  CCP2IE = 1;
+  ei();
+
+  /*
+   * main loop
+   */
+  for (;;)
+  {
+    /*
+     * kick watchdog
+     */
+    CLRWDT();
+
+    if (PWSyncX > 0)
+    {
+      /*
+       * Test for easy calculations
+       * i.e., no counter roll over during the measurment
+       */
+      if (PeriodEndX > PeriodStartX)
+      {
+        if (PulseEndX > PeriodStartX)
+        {
+          /*
+           * no roll over, so proceed
+           */
+          periodX = PeriodEndX - PeriodStartX;
+          pulseX = PulseEndX - PeriodStartX;
+
+          periodX = (periodX / 2) + 9;  /* offset = 9 */
+          tiltX = (periodX) - pulseX;
+
+          /*
+           * turn off all rows and then figure out which row to turn
+           * on based on the tilt
+           */
+          PORTD = 0;
+          if (tiltX < -5)
+          {
+            RD6 = 1;
+          }
+          else if (tiltX < -4)
+          {
+            RD5 = 1;
+          }
+          else if (tiltX < -2)
+          {
+            RD4 = 1;
+          }
+          else if (tiltX > 5)
+          {
+            RD0 = 1;
+          }
+          else if (tiltX > 4)
+          {
+            RD1 = 1;
+          }
+          else if (tiltX > 2)
+          {
+            RD2 = 1;
+          }
+          else
+          {
+            RD3 = 1;
+          }
+        }
+      }
+      PWSyncX = 0;
+    }
+
+    if (PWSyncY > 0)
+    {
+      /*
+       * Test for easy calculations
+       * i.e., no counter roll over during the measurment
+       */
+      if (PeriodEndY > PeriodStartY)
+      {
+        if (PulseEndY > PeriodStartY)
+        {
+          /*
+           * no roll over, so proceed
+           */
+          periodY = PeriodEndY - PeriodStartY;
+          pulseY = PulseEndY - PeriodStartY;
+
+          periodY = (periodY / 2) - 1;  /* offset = -1 */
+          tiltY = (periodY) - pulseY;
+
+          /*
+           * turn off all columns then figure out which column
+           * to turn on based on the tilt
+           */
+          PORTA = PORTA | 0b00111111;
+          PORTB = PORTB | 0b00011111;
+          if (tiltY < -5)
+          {
+            RB1 = 0;
+          }
+          else if (tiltY < -4)
+          {
+            RB0 = 0;
+          }
+          else if (tiltY < -2)
+          {
+            RA4 = 0;
+          }
+          else if (tiltY > 5)
+          {
+            RA0 = 0;
+          }
+          else if (tiltY > 4)
+          {
+            RA1 = 0;
+          }
+          else if (tiltY > 2)
+          {
+            RA2 = 0;
+          }
+          else
+          {
+            RA3 = 0;
+          }
+        }
+      }
+      PWSyncY = 0;
+    }
+  }
+}
+
diff --git a/test/picc/test.h b/test/picc/test.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/test/picc/test.h
diff --git a/test/picc/test.piklab b/test/picc/test.piklab
new file mode 100644
index 0000000..c3424f7
--- /dev/null
+++ b/test/picc/test.piklab
@@ -0,0 +1,85 @@
+<!DOCTYPE piklab>
+<piklab>
+  <general>
+    <device>16F877</device>
+    <files>
+      <item>test.c</item>
+    </files>
+    <description/>
+    <version>0.1</version>
+    <tool>picclite</tool>
+    <is_library>true</is_library>
+    <opened_files>
+      <item>test.c</item>
+    </opened_files>
+  </general>
+  <compiler>
+    <custom_options/>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_arguments>
+      <item>--ERRFORMAT</item>
+      <item>--WARNFORMAT</item>
+      <item>--MSGFORMAT</item>
+      <item>--CHIP=%DEVICE</item>
+      <item>--IDE=mplab</item>
+      <item>-Q</item>
+      <item>-S</item>
+      <item>-I$(SRCPATH)</item>
+      <item>%I</item>
+    </custom_arguments>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+  </compiler>
+  <assembler>
+    <custom_options/>
+    <warning_level>0</warning_level>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_arguments>
+      <item>--ERRFORMAT</item>
+      <item>--WARNFORMAT</item>
+      <item>--MSGFORMAT</item>
+      <item>--CHIP=%DEVICE</item>
+      <item>--IDE=mplab</item>
+      <item>-Q</item>
+      <item>-C</item>
+      <item>--ASMLIST</item>
+      <item>-I$(SRCPATH)</item>
+      <item>%I</item>
+    </custom_arguments>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+  </assembler>
+  <linker>
+    <custom_options/>
+    <format>inhx32</format>
+    <has_custom_arguments>false</has_custom_arguments>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+    <custom_arguments>
+      <item>--ERRFORMAT</item>
+      <item>--WARNFORMAT</item>
+      <item>--MSGFORMAT</item>
+      <item>--CHIP=%DEVICE</item>
+      <item>--IDE=mplab</item>
+      <item>-Q</item>
+      <item>-O%O</item>
+      <item>-M%MAP</item>
+      <item>-G%SYM</item>
+      <item>%OBJS</item>
+      <item>%LIBS</item>
+    </custom_arguments>
+  </linker>
+  <librarian>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_options/>
+    <custom_arguments>
+      <item>r</item>
+      <item>%O</item>
+      <item>%OBJS</item>
+      <item>%LIBS</item>
+    </custom_arguments>
+  </librarian>
+</piklab>
diff --git a/test/sdcc/add.c b/test/sdcc/add.c
new file mode 100644
index 0000000..3cc7636
--- /dev/null
+++ b/test/sdcc/add.c
@@ -0,0 +1,9 @@
+#include <pic16f873.h>
+
+extern unsigned char ms_delay;
+
+void test() {
+  ms_delay++;
+  PIR1 = 0;
+  PEIE = 1;
+}
diff --git a/test/sdcc/add_sdcc250.c b/test/sdcc/add_sdcc250.c
new file mode 100644
index 0000000..9b4d2a3
--- /dev/null
+++ b/test/sdcc/add_sdcc250.c
@@ -0,0 +1,9 @@
+#include "sdcc250_pic16f873.h"
+
+extern unsigned char ms_delay;
+
+void test() {
+  ms_delay++;
+  PIR1 = 0;
+  PEIE = 1;
+}
diff --git a/test/sdcc/blink.piklab b/test/sdcc/blink.piklab
new file mode 100644
index 0000000..5fa967a
--- /dev/null
+++ b/test/sdcc/blink.piklab
@@ -0,0 +1,101 @@
+<!DOCTYPE piklab>
+<piklab>
+  <general>
+    <device>16F873</device>
+    <description/>
+    <version>0.1</version>
+    <tool>sdcc</tool>
+    <custom_linker_script/>
+    <files>
+      <item>add.c</item>
+      <item>blinker.c</item>
+    </files>
+    <is_library>true</is_library>
+    <opened_files>
+      <item>add.c</item>
+      <item>blinker.c</item>
+    </opened_files>
+  </general>
+  <sdcc>
+    <custom_options/>
+    <include_dir>/home/nicolas/prog/piklab/test/sdcc/</include_dir>
+  </sdcc>
+  <assembler>
+    <warning_level>0</warning_level>
+    <custom_options/>
+    <include_dir>/home/nicolas/prog/piklab/test/sdcc/</include_dir>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_arguments>
+      <item>-c</item>
+      <item>-I$(SRCPATH)</item>
+      <item>-p%DEVICE</item>
+      <item>-w0</item>
+      <item>%I</item>
+    </custom_arguments>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+  </assembler>
+  <linker>
+    <hex_format>inhx32</hex_format>
+    <object_dir>/home/nicolas/prog/piklab/test/sdcc/</object_dir>
+    <custom_options>-Wl-r</custom_options>
+    <format>inhx32</format>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_arguments>
+      <item>-m%FAMILY</item>
+      <item>-%DEVICE</item>
+      <item>-V</item>
+      <item>--debug</item>
+      <item>-Wl-c</item>
+      <item>$LKR(-Wl-s%LKR)</item>
+      <item>-I$(SRCPATH)</item>
+      <item>-Wl-r</item>
+      <item>-o%O</item>
+      <item>%OBJS</item>
+      <item>%LIBS</item>
+    </custom_arguments>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+  </linker>
+  <compiler>
+    <custom_options/>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_arguments>
+      <item>-m%FAMILY</item>
+      <item>-%DEVICE</item>
+      <item>-V</item>
+      <item>--debug</item>
+      <item>-I$(SRCPATH)</item>
+      <item>-c</item>
+      <item>%I</item>
+      <item>-Wa-g</item>
+    </custom_arguments>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+  </compiler>
+  <bin_to_hex>
+    <includes>$(SRCPATH)</includes>
+    <custom_options/>
+  </bin_to_hex>
+  <object_viewer>
+    <includes>$(SRCPATH)</includes>
+    <custom_options/>
+  </object_viewer>
+  <disassembler>
+    <includes>$(SRCPATH)</includes>
+    <custom_options/>
+  </disassembler>
+  <librarian>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_options/>
+    <custom_arguments>
+      <item>-c</item>
+      <item>%O</item>
+      <item>%OBJS</item>
+      <item>%LIBS</item>
+    </custom_arguments>
+  </librarian>
+</piklab>
diff --git a/test/sdcc/blinker.c b/test/sdcc/blinker.c
new file mode 100644
index 0000000..f6a7355
--- /dev/null
+++ b/test/sdcc/blinker.c
@@ -0,0 +1,35 @@
+#define __16F873
+#include <pic16f873.h>
+
+typedef unsigned int word;
+word at 0x2007 CONFIG = _CP_OFF & _WDT_OFF & _BODEN_ON & \
+         _PWRTE_ON & _HS_OSC & _WRT_ENABLE_ON & \
+         _LVP_OFF & _DEBUG_OFF & _CPD_OFF;
+
+unsigned char count, x = 2;
+unsigned char ms_delay = 0;
+
+void Intr() interrupt 0 {
+  ms_delay++;
+  PIR1 = 0;
+  PEIE = 1;
+}
+
+void main() {
+  NOT_RBPU = 0;
+  T2CON = 0x7f;
+  GIE = 1;
+  PEIE = 1;
+  //INTCON=0xc0;
+  PIR1 = 0;
+  PIE1 = 2;
+  PR2 = 200;
+
+  TRISB = 0;
+  ms_delay = 0;
+  while(1) {
+    count = ms_delay;
+    x = PIE1;
+    PORTB = (count & 0xf0) | (x & 0xf);
+  }
+}
diff --git a/test/sdcc/blinker.h b/test/sdcc/blinker.h
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/test/sdcc/blinker.h
diff --git a/test/sdcc/blinker.piklab b/test/sdcc/blinker.piklab
new file mode 100644
index 0000000..bd2c19e
--- /dev/null
+++ b/test/sdcc/blinker.piklab
@@ -0,0 +1,78 @@
+<!DOCTYPE piklab>
+<piklab>
+  <general>
+    <device>16F873</device>
+    <description/>
+    <version>0.1</version>
+    <tool>sdcc</tool>
+    <custom_linker_script/>
+    <files>
+      <item>add.c</item>
+      <item>blinker.c</item>
+    </files>
+    <opened_files>
+      <item>add.c</item>
+      <item>blinker.c</item>
+    </opened_files>
+  </general>
+  <sdcc>
+    <custom_options/>
+    <include_dir>/home/nicolas/prog/piklab/test/sdcc/</include_dir>
+  </sdcc>
+  <assembler>
+    <warning_level>0</warning_level>
+    <custom_options/>
+    <include_dir>/home/nicolas/prog/piklab/test/sdcc/</include_dir>
+    <includes>$(SRCPATH)</includes>
+  </assembler>
+  <linker>
+    <hex_format>inhx32</hex_format>
+    <object_dir>/home/nicolas/prog/piklab/test/sdcc/</object_dir>
+    <custom_options>-Wl-r</custom_options>
+    <format>inhx32</format>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_arguments>
+      <item>-m%FAMILY</item>
+      <item>-%DEVICE</item>
+      <item>-V</item>
+      <item>--debug</item>
+      <item>-Wl-c</item>
+      <item>$LKR(-Wl-s%LKR)</item>
+      <item>-I$(SRCPATH)</item>
+      <item>-Wl-r</item>
+      <item>-o%O</item>
+      <item>%OBJS</item>
+      <item>%LIBS</item>
+    </custom_arguments>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+  </linker>
+  <compiler>
+    <custom_options/>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_arguments>
+      <item>-m%FAMILY</item>
+      <item>-%DEVICE</item>
+      <item>-V</item>
+      <item>-I$(SRCPATH)</item>
+      <item>-c</item>
+      <item>%I</item>
+    </custom_arguments>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+  </compiler>
+  <bin_to_hex>
+    <includes>$(SRCPATH)</includes>
+    <custom_options/>
+  </bin_to_hex>
+  <object_viewer>
+    <includes>$(SRCPATH)</includes>
+    <custom_options/>
+  </object_viewer>
+  <disassembler>
+    <includes>$(SRCPATH)</includes>
+    <custom_options/>
+  </disassembler>
+</piklab>
diff --git a/test/sdcc/blinker_sdcc250.c b/test/sdcc/blinker_sdcc250.c
new file mode 100644
index 0000000..ffe2dc8
--- /dev/null
+++ b/test/sdcc/blinker_sdcc250.c
@@ -0,0 +1,35 @@
+#define __16F873
+#include "sdcc250_pic16f873.h"
+
+typedef unsigned int word;
+word at 0x2007 CONFIG = _CP_OFF & _WDT_OFF & _BODEN_ON & \
+         _PWRTE_ON & _HS_OSC & _WRT_ENABLE_ON & \
+         _LVP_OFF & _DEBUG_OFF & _CPD_OFF;
+
+unsigned char count, x = 2;
+unsigned char ms_delay;
+
+void Intr() interrupt 0 {
+  ms_delay++;
+  PIR1 = 0;
+  PEIE = 1;
+}
+
+void main() {
+  NOT_RBPU = 0;
+  T2CON = 0x7f;
+  GIE = 1;
+  PEIE = 1;
+  //INTCON=0xc0;
+  PIR1 = 0;
+  PIE1 = 2;
+  PR2 = 200;
+
+  TRISB = 0;
+  ms_delay = 0;
+  while(1) {
+    count = ms_delay;
+    x = PIE1;
+    PORTB = (count & 0xf0) | (x & 0xf);
+  }
+}
diff --git a/test/sdcc/blinker_sdcc250.piklab b/test/sdcc/blinker_sdcc250.piklab
new file mode 100644
index 0000000..abd565c
--- /dev/null
+++ b/test/sdcc/blinker_sdcc250.piklab
@@ -0,0 +1,50 @@
+<!DOCTYPE piklab>
+<piklab>
+  <general>
+    <device>16F873</device>
+    <files>
+      <item>blinker.c</item>
+      <item>add.c</item>
+    </files>
+    <description/>
+    <version>0.1</version>
+    <tool>sdcc</tool>
+    <custom_linker_script/>
+    <opened_files>
+      <item>blinker.c</item>
+    </opened_files>
+  </general>
+  <sdcc>
+    <custom_options/>
+    <include_dir>/home/nicolas/prog/piklab/test/sdcc/</include_dir>
+  </sdcc>
+  <assembler>
+    <warning_level>0</warning_level>
+    <custom_options/>
+    <include_dir>/home/nicolas/prog/piklab/test/sdcc/</include_dir>
+    <includes>$(SRCPATH)</includes>
+  </assembler>
+  <linker>
+    <hex_format>inhx32</hex_format>
+    <object_dir>/home/nicolas/prog/piklab/test/sdcc/</object_dir>
+    <custom_options>-r</custom_options>
+    <format>inhx32</format>
+    <includes>$(SRCPATH)</includes>
+  </linker>
+  <compiler>
+    <includes>$(SRCPATH)</includes>
+    <custom_options>-Wl-r</custom_options>
+  </compiler>
+  <bin_to_hex>
+    <includes>$(SRCPATH)</includes>
+    <custom_options/>
+  </bin_to_hex>
+  <object_viewer>
+    <includes>$(SRCPATH)</includes>
+    <custom_options/>
+  </object_viewer>
+  <disassembler>
+    <includes>$(SRCPATH)</includes>
+    <custom_options/>
+  </disassembler>
+</piklab>
diff --git a/test/sdcc/sdcc250_16f783.lkr b/test/sdcc/sdcc250_16f783.lkr
new file mode 100644
index 0000000..755ee4f
--- /dev/null
+++ b/test/sdcc/sdcc250_16f783.lkr
@@ -0,0 +1,29 @@
+// Sample linker command file for 16F873
+// $Id: sdcc250_16f783.lkr 1399 2006-10-01 14:01:23Z azhyd $
+
+LIBPATH  .
+
+CODEPAGE   NAME=vectors  START=0x0      END=0x4      PROTECTED
+CODEPAGE   NAME=page0    START=0x5      END=0x7FF
+CODEPAGE   NAME=page1    START=0x800    END=0xFFF
+CODEPAGE   NAME=.idlocs  START=0x2000   END=0x2003   PROTECTED
+CODEPAGE   NAME=.config  START=0x2007   END=0x2007   PROTECTED
+CODEPAGE   NAME=eedata   START=0x2100   END=0x217F   PROTECTED
+
+DATABANK   NAME=sfr0     START=0x0      END=0x1F     PROTECTED
+DATABANK   NAME=sfr1     START=0x80     END=0x9F     PROTECTED
+DATABANK   NAME=sfr2     START=0x100    END=0x10F    PROTECTED
+DATABANK   NAME=sfr3     START=0x180    END=0x18F    PROTECTED
+
+DATABANK   NAME=gpr0     START=0x20     END=0x7F
+SHAREBANK   NAME=gpr0     START=0x120    END=0x17F
+
+SHAREBANK   NAME=gpr1     START=0xA0     END=0xFF
+SHAREBANK   NAME=gpr1     START=0x1A0    END=0x1FF
+
+SECTION    NAME=STARTUP  ROM=vectors    // Reset and interrupt vectors
+SECTION    NAME=PROG1    ROM=page0      // ROM code space - page0
+SECTION    NAME=PROG2    ROM=page1      // ROM code space - page1
+SECTION    NAME=IDLOCS   ROM=.idlocs    // ID locations
+SECTION    NAME=CONFIG   ROM=.config    // Configuration bits location
+SECTION    NAME=DEEPROM  ROM=eedata     // Data EEPROM
diff --git a/test/sdcc/sdcc250_pic16f873.h b/test/sdcc/sdcc250_pic16f873.h
new file mode 100644
index 0000000..c4957b8
--- /dev/null
+++ b/test/sdcc/sdcc250_pic16f873.h
@@ -0,0 +1,505 @@
+//
+// Register Declarations for Microchip 16F873 Processor
+//
+//
+// This header file was automatically generated by:
+//
+//	inc2h.pl V1.5
+//
+//	Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
+//
+//	SDCC is licensed under the GNU Public license (GPL) v2.  Note that
+//	this license covers the code to the compiler and other executables,
+//	but explicitly does not cover any code or objects generated by sdcc.
+//	We have not yet decided on a license for the run time libraries, but
+//	it will not put any requirements on code linked against it. See:
+// 
+//	http://www.gnu.org/copyleft/gpl/html
+//
+//	See http://sdcc.sourceforge.net/ for the latest information on sdcc.
+//
+// 
+#ifndef P16F873_H
+#define P16F873_H
+
+#define udata udata_shr
+
+#ifndef BIT_AT
+#define BIT_AT(base,bitno) sbit at ((base<<3)+bitno)
+#endif
+
+//
+// Register addresses.
+//
+#define INDF_ADDR	0x0000
+#define TMR0_ADDR	0x0001
+#define PCL_ADDR	0x0002
+#define STATUS_ADDR	0x0003
+#define FSR_ADDR	0x0004
+#define PORTA_ADDR	0x0005
+#define PORTB_ADDR	0x0006
+#define PORTC_ADDR	0x0007
+#define PCLATH_ADDR	0x000A
+#define INTCON_ADDR	0x000B
+#define PIR1_ADDR	0x000C
+#define PIR2_ADDR	0x000D
+#define TMR1L_ADDR	0x000E
+#define TMR1H_ADDR	0x000F
+#define T1CON_ADDR	0x0010
+#define TMR2_ADDR	0x0011
+#define T2CON_ADDR	0x0012
+#define SSPBUF_ADDR	0x0013
+#define SSPCON_ADDR	0x0014
+#define CCPR1L_ADDR	0x0015
+#define CCPR1H_ADDR	0x0016
+#define CCP1CON_ADDR	0x0017
+#define RCSTA_ADDR	0x0018
+#define TXREG_ADDR	0x0019
+#define RCREG_ADDR	0x001A
+#define CCPR2L_ADDR	0x001B
+#define CCPR2H_ADDR	0x001C
+#define CCP2CON_ADDR	0x001D
+#define ADRESH_ADDR	0x001E
+#define ADCON0_ADDR	0x001F
+#define OPTION_REG_ADDR	0x0081
+#define TRISA_ADDR	0x0085
+#define TRISB_ADDR	0x0086
+#define TRISC_ADDR	0x0087
+#define PIE1_ADDR	0x008C
+#define PIE2_ADDR	0x008D
+#define PCON_ADDR	0x008E
+#define SSPCON2_ADDR	0x0091
+#define PR2_ADDR	0x0092
+#define SSPADD_ADDR	0x0093
+#define SSPSTAT_ADDR	0x0094
+#define TXSTA_ADDR	0x0098
+#define SPBRG_ADDR	0x0099
+#define ADRESL_ADDR	0x009E
+#define ADCON1_ADDR	0x009F
+#define EEDATA_ADDR	0x010C
+#define EEADR_ADDR	0x010D
+#define EEDATH_ADDR	0x010E
+#define EEADRH_ADDR	0x010F
+#define EECON1_ADDR	0x018C
+#define EECON2_ADDR	0x018D
+
+//
+// Memory organization.
+//
+#pragma maxram 0x1FF
+
+#pragma memmap 0x0020 0x007f RAM 0x100
+#pragma memmap 0x00a0 0x00ff RAM 0x100
+
+#pragma memmap INDF_ADDR INDF_ADDR SFR 0x000	// INDF
+#pragma memmap TMR0_ADDR TMR0_ADDR SFR 0x000	// TMR0
+#pragma memmap PCL_ADDR PCL_ADDR SFR 0x000	// PCL
+#pragma memmap STATUS_ADDR STATUS_ADDR SFR 0x000	// STATUS
+#pragma memmap FSR_ADDR FSR_ADDR SFR 0x000	// FSR
+#pragma memmap PORTA_ADDR PORTA_ADDR SFR 0x000	// PORTA
+#pragma memmap PORTB_ADDR PORTB_ADDR SFR 0x000	// PORTB
+#pragma memmap PORTC_ADDR PORTC_ADDR SFR 0x000	// PORTC
+#pragma memmap PCLATH_ADDR PCLATH_ADDR SFR 0x000	// PCLATH
+#pragma memmap INTCON_ADDR INTCON_ADDR SFR 0x000	// INTCON
+#pragma memmap PIR1_ADDR PIR1_ADDR SFR 0x000	// PIR1
+#pragma memmap PIR2_ADDR PIR2_ADDR SFR 0x000	// PIR2
+#pragma memmap TMR1L_ADDR TMR1L_ADDR SFR 0x000	// TMR1L
+#pragma memmap TMR1H_ADDR TMR1H_ADDR SFR 0x000	// TMR1H
+#pragma memmap T1CON_ADDR T1CON_ADDR SFR 0x000	// T1CON
+#pragma memmap TMR2_ADDR TMR2_ADDR SFR 0x000	// TMR2
+#pragma memmap T2CON_ADDR T2CON_ADDR SFR 0x000	// T2CON
+#pragma memmap SSPBUF_ADDR SSPBUF_ADDR SFR 0x000	// SSPBUF
+#pragma memmap SSPCON_ADDR SSPCON_ADDR SFR 0x000	// SSPCON
+#pragma memmap CCPR1L_ADDR CCPR1L_ADDR SFR 0x000	// CCPR1L
+#pragma memmap CCPR1H_ADDR CCPR1H_ADDR SFR 0x000	// CCPR1H
+#pragma memmap CCP1CON_ADDR CCP1CON_ADDR SFR 0x000	// CCP1CON
+#pragma memmap RCSTA_ADDR RCSTA_ADDR SFR 0x000	// RCSTA
+#pragma memmap TXREG_ADDR TXREG_ADDR SFR 0x000	// TXREG
+#pragma memmap RCREG_ADDR RCREG_ADDR SFR 0x000	// RCREG
+#pragma memmap CCPR2L_ADDR CCPR2L_ADDR SFR 0x000	// CCPR2L
+#pragma memmap CCPR2H_ADDR CCPR2H_ADDR SFR 0x000	// CCPR2H
+#pragma memmap CCP2CON_ADDR CCP2CON_ADDR SFR 0x000	// CCP2CON
+#pragma memmap ADRESH_ADDR ADRESH_ADDR SFR 0x000	// ADRESH
+#pragma memmap ADCON0_ADDR ADCON0_ADDR SFR 0x000	// ADCON0
+#pragma memmap OPTION_REG_ADDR OPTION_REG_ADDR SFR 0x000	// OPTION_REG
+#pragma memmap TRISA_ADDR TRISA_ADDR SFR 0x000	// TRISA
+#pragma memmap TRISB_ADDR TRISB_ADDR SFR 0x000	// TRISB
+#pragma memmap TRISC_ADDR TRISC_ADDR SFR 0x000	// TRISC
+#pragma memmap PIE1_ADDR PIE1_ADDR SFR 0x000	// PIE1
+#pragma memmap PIE2_ADDR PIE2_ADDR SFR 0x000	// PIE2
+#pragma memmap PCON_ADDR PCON_ADDR SFR 0x000	// PCON
+#pragma memmap SSPCON2_ADDR SSPCON2_ADDR SFR 0x000	// SSPCON2
+#pragma memmap PR2_ADDR PR2_ADDR SFR 0x000	// PR2
+#pragma memmap SSPADD_ADDR SSPADD_ADDR SFR 0x000	// SSPADD
+#pragma memmap SSPSTAT_ADDR SSPSTAT_ADDR SFR 0x000	// SSPSTAT
+#pragma memmap TXSTA_ADDR TXSTA_ADDR SFR 0x000	// TXSTA
+#pragma memmap SPBRG_ADDR SPBRG_ADDR SFR 0x000	// SPBRG
+#pragma memmap ADRESL_ADDR ADRESL_ADDR SFR 0x000	// ADRESL
+#pragma memmap ADCON1_ADDR ADCON1_ADDR SFR 0x000	// ADCON1
+#pragma memmap EEDATA_ADDR EEDATA_ADDR SFR 0x000	// EEDATA
+#pragma memmap EEADR_ADDR EEADR_ADDR SFR 0x000	// EEADR
+#pragma memmap EEDATH_ADDR EEDATH_ADDR SFR 0x000	// EEDATH
+#pragma memmap EEADRH_ADDR EEADRH_ADDR SFR 0x000	// EEADRH
+#pragma memmap EECON1_ADDR EECON1_ADDR SFR 0x000	// EECON1
+#pragma memmap EECON2_ADDR EECON2_ADDR SFR 0x000	// EECON2
+
+
+//         LIST
+// P16F873.INC  Standard Header File, Version 1.00    Microchip Technology, Inc.
+//         NOLIST
+
+// This header file defines configurations, registers, and other useful bits of
+// information for the PIC16F873 microcontroller.  These names are taken to match 
+// the data sheets as closely as possible.  
+
+// Note that the processor must be selected before this file is 
+// included.  The processor may be selected the following ways:
+
+//       1. Command line switch:
+//               C:\ MPASM MYFILE.ASM /PIC16F873
+//       2. LIST directive in the source file
+//               LIST   P=PIC16F873
+//       3. Processor Type entry in the MPASM full-screen interface
+
+//==========================================================================
+//
+//       Revision History
+//
+//==========================================================================
+
+//Rev:   Date:    Reason:
+
+//1.12   01/12/00 Changed some bit names, a register name, configuration bits
+//                 to match datasheet (DS30292B)
+//1.11   10/18/98 Changes to file registers to match updated DOS
+//1.10   08/17/98 Fixed typo in processor name, RCSTA and ADCON1 
+//1.00   08/07/98 Initial Release
+
+//==========================================================================
+//
+//       Verify Processor
+//
+//==========================================================================
+
+//        IFNDEF __16F873
+//            MESSG "Processor-header file mismatch.  Verify selected processor."
+//         ENDIF
+
+//==========================================================================
+//
+//       Register Definitions
+//
+//==========================================================================
+
+#define W                    0x0000
+#define F                    0x0001
+
+//----- Register Files------------------------------------------------------
+
+data at INDF_ADDR volatile char        INDF;
+sfr  at TMR0_ADDR                      TMR0;
+data at PCL_ADDR volatile char         PCL;
+sfr  at STATUS_ADDR                    STATUS;
+sfr  at FSR_ADDR                       FSR;
+sfr  at PORTA_ADDR                     PORTA;
+sfr  at PORTB_ADDR                     PORTB;
+sfr  at PORTC_ADDR                     PORTC;
+sfr  at PCLATH_ADDR                    PCLATH;
+sfr  at INTCON_ADDR                    INTCON;
+sfr  at PIR1_ADDR                      PIR1;
+sfr  at PIR2_ADDR                      PIR2;
+sfr  at TMR1L_ADDR                     TMR1L;
+sfr  at TMR1H_ADDR                     TMR1H;
+sfr  at T1CON_ADDR                     T1CON;
+sfr  at TMR2_ADDR                      TMR2;
+sfr  at T2CON_ADDR                     T2CON;
+sfr  at SSPBUF_ADDR                    SSPBUF;
+sfr  at SSPCON_ADDR                    SSPCON;
+sfr  at CCPR1L_ADDR                    CCPR1L;
+sfr  at CCPR1H_ADDR                    CCPR1H;
+sfr  at CCP1CON_ADDR                   CCP1CON;
+sfr  at RCSTA_ADDR                     RCSTA;
+sfr  at TXREG_ADDR                     TXREG;
+sfr  at RCREG_ADDR                     RCREG;
+sfr  at CCPR2L_ADDR                    CCPR2L;
+sfr  at CCPR2H_ADDR                    CCPR2H;
+sfr  at CCP2CON_ADDR                   CCP2CON;
+sfr  at ADRESH_ADDR                    ADRESH;
+sfr  at ADCON0_ADDR                    ADCON0;
+
+sfr  at OPTION_REG_ADDR                OPTION_REG;
+sfr  at TRISA_ADDR                     TRISA;
+sfr  at TRISB_ADDR                     TRISB;
+sfr  at TRISC_ADDR                     TRISC;
+sfr  at PIE1_ADDR                      PIE1;
+sfr  at PIE2_ADDR                      PIE2;
+sfr  at PCON_ADDR                      PCON;
+sfr  at SSPCON2_ADDR                   SSPCON2;
+sfr  at PR2_ADDR                       PR2;
+sfr  at SSPADD_ADDR                    SSPADD;
+sfr  at SSPSTAT_ADDR                   SSPSTAT;
+sfr  at TXSTA_ADDR                     TXSTA;
+sfr  at SPBRG_ADDR                     SPBRG;
+sfr  at ADRESL_ADDR                    ADRESL;
+sfr  at ADCON1_ADDR                    ADCON1;
+
+sfr  at EEDATA_ADDR                    EEDATA;
+sfr  at EEADR_ADDR                     EEADR;
+sfr  at EEDATH_ADDR                    EEDATH;
+sfr  at EEADRH_ADDR                    EEADRH;
+
+sfr  at EECON1_ADDR                    EECON1;
+sfr  at EECON2_ADDR                    EECON2;
+//----- STATUS Bits --------------------------------------------------------
+
+BIT_AT(STATUS_ADDR,7)	IRP;
+BIT_AT(STATUS_ADDR,6)	RP1;
+BIT_AT(STATUS_ADDR,5)	RP0;
+BIT_AT(STATUS_ADDR,4)	NOT_TO;
+BIT_AT(STATUS_ADDR,3)	NOT_PD;
+BIT_AT(STATUS_ADDR,2)	Z;
+BIT_AT(STATUS_ADDR,1)	DC;
+BIT_AT(STATUS_ADDR,0)	C;
+
+//----- INTCON Bits --------------------------------------------------------
+
+BIT_AT(INTCON_ADDR,7)	GIE;
+BIT_AT(INTCON_ADDR,6)	PEIE;
+BIT_AT(INTCON_ADDR,5)	T0IE;
+BIT_AT(INTCON_ADDR,4)	INTE;
+BIT_AT(INTCON_ADDR,3)	RBIE;
+BIT_AT(INTCON_ADDR,2)	T0IF;
+BIT_AT(INTCON_ADDR,1)	INTF;
+BIT_AT(INTCON_ADDR,0)	RBIF;
+
+//----- PIR1 Bits ----------------------------------------------------------
+BIT_AT(PIR1_ADDR,6)	ADIF;
+BIT_AT(PIR1_ADDR,5)	RCIF;
+BIT_AT(PIR1_ADDR,4)	TXIF;
+BIT_AT(PIR1_ADDR,3)	SSPIF;
+BIT_AT(PIR1_ADDR,2)	CCP1IF;
+BIT_AT(PIR1_ADDR,1)	TMR2IF;
+BIT_AT(PIR1_ADDR,0)	TMR1IF;
+
+//----- PIR2 Bits ----------------------------------------------------------
+
+BIT_AT(PIR2_ADDR,6)	CMIF;
+BIT_AT(PIR2_ADDR,4)	EEIF;   
+BIT_AT(PIR2_ADDR,3)	BCLIF;
+BIT_AT(PIR2_ADDR,0)	CCP2IF;
+
+//----- T1CON Bits ---------------------------------------------------------
+
+BIT_AT(T1CON_ADDR,5)	T1CKPS1;
+BIT_AT(T1CON_ADDR,4)	T1CKPS0;
+BIT_AT(T1CON_ADDR,3)	T1OSCEN;
+BIT_AT(T1CON_ADDR,2)	NOT_T1SYNC;
+BIT_AT(T1CON_ADDR,2)	T1INSYNC;    // Backward compatibility only
+BIT_AT(T1CON_ADDR,2)	T1SYNC;
+BIT_AT(T1CON_ADDR,1)	TMR1CS;
+BIT_AT(T1CON_ADDR,0)	TMR1ON;
+
+//----- T2CON Bits ---------------------------------------------------------
+
+BIT_AT(T2CON_ADDR,6)	TOUTPS3;
+BIT_AT(T2CON_ADDR,5)	TOUTPS2;
+BIT_AT(T2CON_ADDR,4)	TOUTPS1;
+BIT_AT(T2CON_ADDR,3)	TOUTPS0;
+BIT_AT(T2CON_ADDR,2)	TMR2ON;
+BIT_AT(T2CON_ADDR,1)	T2CKPS1;
+BIT_AT(T2CON_ADDR,0)	T2CKPS0;
+
+//----- SSPCON Bits --------------------------------------------------------
+
+BIT_AT(SSPCON_ADDR,7)	WCOL;
+BIT_AT(SSPCON_ADDR,6)	SSPOV;
+BIT_AT(SSPCON_ADDR,5)	SSPEN;
+BIT_AT(SSPCON_ADDR,4)	CKP;
+BIT_AT(SSPCON_ADDR,3)	SSPM3;
+BIT_AT(SSPCON_ADDR,2)	SSPM2;
+BIT_AT(SSPCON_ADDR,1)	SSPM1;
+BIT_AT(SSPCON_ADDR,0)	SSPM0;
+
+//----- CCP1CON Bits -------------------------------------------------------
+
+BIT_AT(CCP1CON_ADDR,5)	CCP1X;
+BIT_AT(CCP1CON_ADDR,4)	CCP1Y;
+BIT_AT(CCP1CON_ADDR,3)	CCP1M3;
+BIT_AT(CCP1CON_ADDR,2)	CCP1M2;
+BIT_AT(CCP1CON_ADDR,1)	CCP1M1;
+BIT_AT(CCP1CON_ADDR,0)	CCP1M0;
+
+//----- RCSTA Bits ---------------------------------------------------------
+
+BIT_AT(RCSTA_ADDR,7)	SPEN;
+BIT_AT(RCSTA_ADDR,6)	RX9;
+BIT_AT(RCSTA_ADDR,6)	RC9;    // Backward compatibility only
+BIT_AT(RCSTA_ADDR,6)	NOT_RC8;    // Backward compatibility only
+BIT_AT(RCSTA_ADDR,6)	RC8_9;    // Backward compatibility only
+BIT_AT(RCSTA_ADDR,5)	SREN;
+BIT_AT(RCSTA_ADDR,4)	CREN;
+BIT_AT(RCSTA_ADDR,3)	ADDEN;
+BIT_AT(RCSTA_ADDR,2)	FERR;
+BIT_AT(RCSTA_ADDR,1)	OERR;
+BIT_AT(RCSTA_ADDR,0)	RX9D;
+BIT_AT(RCSTA_ADDR,0)	RCD8;    // Backward compatibility only
+
+//----- CCP2CON Bits -------------------------------------------------------
+
+BIT_AT(CCP2CON_ADDR,5)	CCP2X;
+BIT_AT(CCP2CON_ADDR,4)	CCP2Y;
+BIT_AT(CCP2CON_ADDR,3)	CCP2M3;
+BIT_AT(CCP2CON_ADDR,2)	CCP2M2;
+BIT_AT(CCP2CON_ADDR,1)	CCP2M1;
+BIT_AT(CCP2CON_ADDR,0)	CCP2M0;
+
+//----- ADCON0 Bits --------------------------------------------------------
+
+BIT_AT(ADCON0_ADDR,7)	ADCS1;
+BIT_AT(ADCON0_ADDR,6)	ADCS0;
+BIT_AT(ADCON0_ADDR,5)	CHS2;
+BIT_AT(ADCON0_ADDR,4)	CHS1;
+BIT_AT(ADCON0_ADDR,3)	CHS0;
+BIT_AT(ADCON0_ADDR,2)	GO;
+BIT_AT(ADCON0_ADDR,2)	NOT_DONE;
+BIT_AT(ADCON0_ADDR,2)	GO_DONE;
+BIT_AT(ADCON0_ADDR,0)	ADON;
+
+//----- OPTION_REG Bits ----------------------------------------------------
+
+BIT_AT(OPTION_REG_ADDR,7)	NOT_RBPU;
+BIT_AT(OPTION_REG_ADDR,6)	INTEDG;
+BIT_AT(OPTION_REG_ADDR,5)	T0CS;
+BIT_AT(OPTION_REG_ADDR,4)	T0SE;
+BIT_AT(OPTION_REG_ADDR,3)	PSA;
+BIT_AT(OPTION_REG_ADDR,2)	PS2;
+BIT_AT(OPTION_REG_ADDR,1)	PS1;
+BIT_AT(OPTION_REG_ADDR,0)	PS0;
+
+//----- PIE1 Bits ----------------------------------------------------------
+
+BIT_AT(PIE1_ADDR,6)	ADIE;
+BIT_AT(PIE1_ADDR,5)	RCIE;
+BIT_AT(PIE1_ADDR,4)	TXIE;
+BIT_AT(PIE1_ADDR,3)	SSPIE;
+BIT_AT(PIE1_ADDR,2)	CCP1IE;
+BIT_AT(PIE1_ADDR,1)	TMR2IE;
+BIT_AT(PIE1_ADDR,0)	TMR1IE;
+
+//----- PIE2 Bits ----------------------------------------------------------
+
+BIT_AT(PIE2_ADDR,4)	EEIE;   
+BIT_AT(PIE2_ADDR,3)	BCLIE;
+BIT_AT(PIE2_ADDR,0)	CCP2IE;
+
+//----- PCON Bits ----------------------------------------------------------
+
+BIT_AT(PCON_ADDR,1)	NOT_POR;
+BIT_AT(PCON_ADDR,0)	NOT_BO;
+BIT_AT(PCON_ADDR,0)	NOT_BOR;
+
+//----- SSPCON2 Bits --------------------------------------------------------
+
+BIT_AT(SSPCON2_ADDR,7)	GCEN;
+BIT_AT(SSPCON2_ADDR,6)	ACKSTAT;
+BIT_AT(SSPCON2_ADDR,5)	ACKDT;
+BIT_AT(SSPCON2_ADDR,4)	ACKEN;
+BIT_AT(SSPCON2_ADDR,3)	RCEN;
+BIT_AT(SSPCON2_ADDR,2)	PEN;
+BIT_AT(SSPCON2_ADDR,1)	RSEN;   
+BIT_AT(SSPCON2_ADDR,0)	SEN;   
+
+//----- SSPSTAT Bits -------------------------------------------------------
+
+BIT_AT(SSPSTAT_ADDR,7)	SMP;
+BIT_AT(SSPSTAT_ADDR,6)	CKE;
+BIT_AT(SSPSTAT_ADDR,5)	D;
+BIT_AT(SSPSTAT_ADDR,5)	I2C_DATA;
+BIT_AT(SSPSTAT_ADDR,5)	NOT_A;
+BIT_AT(SSPSTAT_ADDR,5)	NOT_ADDRESS;
+BIT_AT(SSPSTAT_ADDR,5)	D_A;
+BIT_AT(SSPSTAT_ADDR,5)	DATA_ADDRESS;
+BIT_AT(SSPSTAT_ADDR,4)	P;
+BIT_AT(SSPSTAT_ADDR,4)	I2C_STOP;
+BIT_AT(SSPSTAT_ADDR,3)	S;
+BIT_AT(SSPSTAT_ADDR,3)	I2C_START;
+BIT_AT(SSPSTAT_ADDR,2)	R;
+BIT_AT(SSPSTAT_ADDR,2)	I2C_READ;
+BIT_AT(SSPSTAT_ADDR,2)	NOT_W;
+BIT_AT(SSPSTAT_ADDR,2)	NOT_WRITE;
+BIT_AT(SSPSTAT_ADDR,2)	R_W;
+BIT_AT(SSPSTAT_ADDR,2)	READ_WRITE;
+BIT_AT(SSPSTAT_ADDR,1)	UA;
+BIT_AT(SSPSTAT_ADDR,0)	BF;
+
+//----- TXSTA Bits ---------------------------------------------------------
+
+BIT_AT(TXSTA_ADDR,7)	CSRC;
+BIT_AT(TXSTA_ADDR,6)	TX9;
+BIT_AT(TXSTA_ADDR,6)	NOT_TX8;    // Backward compatibility only
+BIT_AT(TXSTA_ADDR,6)	TX8_9;    // Backward compatibility only
+BIT_AT(TXSTA_ADDR,5)	TXEN;
+BIT_AT(TXSTA_ADDR,4)	SYNC;
+BIT_AT(TXSTA_ADDR,2)	BRGH;
+BIT_AT(TXSTA_ADDR,1)	TRMT;
+BIT_AT(TXSTA_ADDR,0)	TX9D;
+BIT_AT(TXSTA_ADDR,0)	TXD8;    // Backward compatibility only
+
+//----- ADCON1 Bits --------------------------------------------------------
+
+BIT_AT(ADCON1_ADDR,7)	ADFM;
+BIT_AT(ADCON1_ADDR,3)	PCFG3;
+BIT_AT(ADCON1_ADDR,2)	PCFG2;
+BIT_AT(ADCON1_ADDR,1)	PCFG1;
+BIT_AT(ADCON1_ADDR,0)	PCFG0;
+
+//----- EECON1 Bits --------------------------------------------------------
+
+BIT_AT(EECON1_ADDR,7)	EEPGD;
+BIT_AT(EECON1_ADDR,3)	WRERR;
+BIT_AT(EECON1_ADDR,2)	WREN;
+BIT_AT(EECON1_ADDR,1)	WR;
+BIT_AT(EECON1_ADDR,0)	RD;
+
+//==========================================================================
+//
+//       RAM Definition
+//
+//==========================================================================
+
+//         __MAXRAM H'1FF'
+//         __BADRAM H'8F'-H'90', H'95'-H'97', H'9A'-H'9D'
+//         __BADRAM H'105', H'107'-H'109', H'110'-H'11F'
+//         __BADRAM H'185', H'187'-H'189', H'18E'-H'19F'
+
+//==========================================================================
+//
+//       Configuration Bits
+//
+//==========================================================================
+
+#define _CP_ALL              0x0FCF
+#define _CP_HALF             0x1FDF
+#define _CP_UPPER_256        0x2FEF
+#define _CP_OFF              0x3FFF
+#define _DEBUG_ON            0x37FF
+#define _DEBUG_OFF           0x3FFF
+#define _WRT_ENABLE_ON       0x3FFF
+#define _WRT_ENABLE_OFF      0x3DFF
+#define _CPD_ON              0x3EFF
+#define _CPD_OFF             0x3FFF
+#define _LVP_ON              0x3FFF 
+#define _LVP_OFF             0x3F7F	
+#define _BODEN_ON            0x3FFF
+#define _BODEN_OFF           0x3FBF
+#define _PWRTE_OFF           0x3FFF
+#define _PWRTE_ON            0x3FF7
+#define _WDT_ON              0x3FFF
+#define _WDT_OFF             0x3FFB
+#define _LP_OSC              0x3FFC
+#define _XT_OSC              0x3FFD
+#define _HS_OSC              0x3FFE
+#define _RC_OSC              0x3FFF
+
+//         LIST
+#endif
diff --git a/test/sdcc/standalone_blinker.c b/test/sdcc/standalone_blinker.c
new file mode 100644
index 0000000..b4049e6
--- /dev/null
+++ b/test/sdcc/standalone_blinker.c
@@ -0,0 +1,35 @@
+#define __16F873
+#include "pic16f873.h"
+
+typedef unsigned int word;
+word at 0x2007  __CONFIG = _CP_OFF & _WDT_OFF & _BODEN_ON & \
+         _PWRTE_ON & _HS_OSC & _WRT_ENABLE_ON & \
+         _LVP_OFF & _DEBUG_OFF & _CPD_OFF;
+
+unsigned char count, x;
+unsigned char ms_delay;
+
+void Intr() interrupt 0 {
+  ms_delay++;
+  PIR1 = 0;
+  PEIE = 1;
+}
+
+void main() {
+  NOT_RBPU=0;
+  T2CON=0x7f;
+  GIE = 1;
+  PEIE = 1;
+  //INTCON=0xc0;
+  PIR1 = 0;
+  PIE1 = 2;
+  PR2 = 200;
+
+  TRISB = 0;
+  ms_delay = 0;
+  while(1) {
+    count = ms_delay;
+    x = PIE1;
+    PORTB = (count & 0xf0) | (x & 0xf);
+  }
+}
diff --git a/test/sdcc18/test18.c b/test/sdcc18/test18.c
new file mode 100644
index 0000000..00dc375
--- /dev/null
+++ b/test/sdcc18/test18.c
@@ -0,0 +1,14 @@
+#include <pic18f452.h>
+
+void main(void)
+{
+  float f = TRISA;
+  int a = TRISB;
+  LATA = 0xFF;
+  LATAbits.LATA1 = 0;
+//       UIE = 0x55;
+  f /= a;
+  a = f;
+  TRISA = a;
+  while(1);
+}
diff --git a/test/sdcc18/test18.piklab b/test/sdcc18/test18.piklab
new file mode 100644
index 0000000..d9e688d
--- /dev/null
+++ b/test/sdcc18/test18.piklab
@@ -0,0 +1,17 @@
+<!DOCTYPE piklab>
+<piklab>
+  <general>
+    <device>18F452</device>
+    <tool>sdcc</tool>
+    <files>
+      <item>test18.c</item>
+    </files>
+    <opened_files>
+      <item>test18.c</item>
+    </opened_files>
+    <watched_registers>
+      <item>0 2 </item>
+    </watched_registers>
+  </general>
+  <editors/>
+</piklab>
diff --git a/test/sdcc18/usart_test.c b/test/sdcc18/usart_test.c
new file mode 100644
index 0000000..1b611d9
--- /dev/null
+++ b/test/sdcc18/usart_test.c
@@ -0,0 +1,105 @@
+// read and write eeprom of PIC18F2550 (and 18F2455, 18F4455, 18F4550)
+// EEPROM size is 256 bytes
+// (c) Raphael Wimmer. Licensed under GNU GPL v2 or higher
+#include <pic18f452.h>
+//#include <pic18fregs.h>
+#include <stdio.h>
+#include <usart.h>
+#include <adc.h>
+
+code char at __CONFIG1H config1h = 0xFF & _OSC_XT_1H & _OSCS_OFF_1H;
+code char at __CONFIG2L config2l = 0xFF & _PUT_ON_2L & _BODEN_OFF_2L & _BODENV_2_7V_2L;
+code char at __CONFIG2H config2h = 0xFF & _WDT_OFF_2H;
+code char at __CONFIG3H config3h = 0xFF & _CCP2MUX_RC1_3H;
+code char at __CONFIG4L config4l = 0xFF & _LVP_OFF_4L & _BACKBUG_ON_4L & _STVR_OFF_4L;
+code char at __CONFIG5L config5l = 0xFF & _CP_0_OFF_5L & _CP_1_OFF_5L;
+code char at __CONFIG5H config5h = 0xFF & _CPD_OFF_5H & _CPB_OFF_5H;
+code char at __CONFIG6L config6l = 0xFF & _WRT_0_OFF_6L & _WRT_1_OFF_6L;
+code char at __CONFIG6H config6h = 0xFF & _WRTD_OFF_6H & _WRTB_OFF_6H & _WRTC_OFF_6H;
+code char at __CONFIG7L config7l = 0xFF & _EBTR_0_OFF_7L & _EBTR_1_OFF_7L;
+code char at __CONFIG7H config7h = 0xFF & _EBTRB_OFF_7H;
+
+#pragma stack 0x300 0xff // set 64 byte stack at 0x300, needed by sdcc
+
+static void isr(void) interrupt 1 {
+/*
+n Interrupt     Vector  Interrupt Vector Address
+0 RESET         vector  0x000000
+1 HIGH priority interrupts 0x000008
+2 LOW priority interrupts 0x000018
+*/
+}
+
+void ee_write_byte(unsigned char address, unsigned char *_data){
+
+    EEDATA = *_data;
+    EEADR = address;
+    // start write sequence as described in datasheet, page 91
+    EECON1bits.EEPGD = 0;
+    EECON1bits.CFGS = 0;
+    EECON1bits.WREN = 1; // enable writes to data EEPROM
+    INTCONbits.GIE = 0;  // disable interrupts
+    EECON2 = 0x55;
+    EECON2 = 0x0AA;
+    EECON1bits.WR = 1;   // start writing
+    while(EECON1bits.WR){
+        _asm nop _endasm;}
+    if(EECON1bits.WRERR){
+       // printf("ERROR: writing to EEPROM failed!\n");
+    }
+    EECON1bits.WREN = 0;
+    INTCONbits.GIE = 1;  // enable interrupts
+}
+
+void adc_start() {
+
+        adc_open(ADC_CHN_1, ADC_FOSC_4, ADC_CFG_5A_0R, ADC_FRM_RJUST);
+        while (adc_busy()) ;
+        adc_read();
+//unsigned char channel, unsigned char fosc, unsigned char pcfg, unsigned char config
+
+}
+
+void ee_read_byte(unsigned char address, unsigned char *_data){
+    EEADR = address;
+    EECON1bits.CFGS = 0;
+    EECON1bits.EEPGD = 0;
+    EECON1bits.RD = 1;
+    *_data = EEDATA;
+}
+
+void initUsart()
+{
+    usart_open(    // Use USART library to initialise the hardware
+            USART_TX_INT_OFF
+            & USART_RX_INT_OFF
+            & USART_BRGH_HIGH
+            & USART_ASYNCH_MODE
+            & USART_EIGHT_BIT,
+            10                      // '10' = 115200 Baud with 20 MHz oscillator and BRGH=1
+            );
+    stdout = STREAM_USART;
+}
+
+
+
+// very simple example. use on an erased eeprom
+
+void main(){
+
+    char save_me = 'c';
+    char from_eeprom;
+       adc_start();
+    initUsart();
+
+    printf("E");
+    ee_read_byte(0x00, &from_eeprom);
+    printf("%c", from_eeprom);
+
+    ee_write_byte(0x00, &save_me);
+    printf("%c", save_me);
+
+    ee_read_byte(0x00, &from_eeprom);
+    printf("%c", from_eeprom);
+while (1){}
+}
diff --git a/test/sdcc18/usart_test.piklab b/test/sdcc18/usart_test.piklab
new file mode 100644
index 0000000..71da3cf
--- /dev/null
+++ b/test/sdcc18/usart_test.piklab
@@ -0,0 +1,51 @@
+<!DOCTYPE piklab>
+<piklab>
+  <general>
+    <device>18F452</device>
+    <tool>sdcc</tool>
+    <files>
+      <item>usart_test.c</item>
+      <item>/usr/share/sdcc/lib/pic16/libio18f452.lib</item>
+      <item>/usr/share/sdcc/lib/pic16/libc18f.lib</item>
+    </files>
+    <description/>
+    <version>0.1</version>
+  </general>
+  <compiler>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_options/>
+    <custom_arguments>
+      <item>-m%FAMILY</item>
+      <item>-%DEVICE</item>
+      <item>-V</item>
+      <item>--debug</item>
+      <item>-I$(SRCPATH)</item>
+      <item>-c</item>
+      <item>%I</item>
+    </custom_arguments>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+  </compiler>
+  <linker>
+    <has_custom_arguments>false</has_custom_arguments>
+    <custom_options/>
+    <format>inhx32</format>
+    <custom_arguments>
+      <item>-m%FAMILY</item>
+      <item>-%DEVICE</item>
+      <item>-V</item>
+      <item>--debug</item>
+      <item>-Wl-c</item>
+      <item>$LKR(-Wl-s%LKR)</item>
+      <item>-I$(SRCPATH)</item>
+      <item>-o%O</item>
+      <item>%OBJS</item>
+      <item>%LIBS</item>
+    </custom_arguments>
+    <includes>
+      <item>$(SRCPATH)</item>
+    </includes>
+  </linker>
+  <editors/>
+</piklab>
diff --git a/test/test_hex_32/test_16F871_inhx32.hex b/test/test_hex_32/test_16F871_inhx32.hex
new file mode 100644
index 0000000..a872486
--- /dev/null
+++ b/test/test_hex_32/test_16F871_inhx32.hex
@@ -0,0 +1,271 @@
+:020000040000FA
+:10000000000000308A001A280528F4000308F500D3
+:10001000F10B14280A30F10072082F3AF200850023
+:1000200073083F3AF30086000B1175088300F40E45
+:10003000740E090081018B0185018601831603136B
+:1000400085018601D530810006309F00831203139D
+:100050008B168B172530F2001530F3000A30F100B3
+:10006000302800340034FF3FFF3FFF3FFF3FFF3F9A
+:10007000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F90
+:10008000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3F80
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+:10010000FF3FFF3FFF3FFF3FFF3FFF3FFF3FFF3FFF
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+:020000040000FA
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diff --git a/test/test_hex_32/test_18F452_inhx32.hex b/test/test_hex_32/test_18F452_inhx32.hex
new file mode 100644
index 0000000..62679ed
--- /dev/null
+++ b/test/test_hex_32/test_18F452_inhx32.hex
@@ -0,0 +1,2071 @@
+:020000040000FA
+:1000000004EF00F0FFFFFFFF9390060EC16E050E98
+:1000100017EC00F0018035EC00F0050E17EC00F055
+:10002000019035EC00F007EF00F015EF00F0026EE4
+:100030000250036E640E046E0A0E1FEF00F0056E90
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diff --git a/test/test_procedure.txt b/test/test_procedure.txt
new file mode 100644
index 0000000..7dbf5c5
--- /dev/null
+++ b/test/test_procedure.txt
@@ -0,0 +1,27 @@
+1. HEX FILES (10F200 12C508A 16F877 17C42A 18F452 30F2010):
+  - for each devices with hex file from "dummy_hex_32" directory:
+    * load with correct device type: display should be as described in "dummy_hex.txt"
+    * save with same hex format: check the file is the same
+    * optionnally: load with incorrect device type: should not crash (may warn about incorrect memory ranges)
+
+2. STANDALONE ASM FILES:
+  - load "test_asm_standalone.asm" and compile
+
+3. PROJECT:
+  - load project "test_project" and compile
+  - save/create new: #### TODO
+
+3. GUI + COMMAND-LINE PROGRAMMING (serial + USB ICD2 with 16F871 and 18F452):
+  - for each available devices with hex file from "test_hex_32" directory:
+      * connect: check correct ids are detected
+      * blank: should be ok
+      * blank_check: should be ok
+      * load hex file
+      * verify: should fail
+      * program: should be ok
+      * verify: should be ok (should warn if some blocks are protected)
+      * blank_check: should fail
+      * release reset: should run program
+      * hold reset: should stop program
+      * read: should be ok
+      * verify: should be ok